SemiWell Semiconductor SFP50N06

N-Channel MOSFET
Features
Symbol { 2. Drain
■ Low RDS(on) (0.023 Ω )@VGS=10V
■ Low Gate Charge (Typical 39nC) ●

■ Low Crss (Typical 110pF) ◀ ▲

1. Gate { ●

■ Improved dv/dt Capability ●

■ 100% Avalanche Tested

{
3. Source
■ Maximum Junction Temperature Range (175°C)

General Description
TO-220
This Power MOSFET is produced using SemiWell’s advanced
planar stripe, DMOS technology. This latest technology has been
especially designed to minimize on-state resistance, have a low
gate charge with superior switching performance, and rugged
avalanche characteristics. This Power MOSFET is well suited
for synchronous DC-DC Converters and Power Management in 1 2
portable and battery operated products. 3

Absolute Maximum Ratings

Symbol Parameter Value Units
VDSS Drain to Source Voltage 60 V
Continuous Drain Current(@TC = 25°C) 50 A
ID
Continuous Drain Current(@TC = 100°C) 35.2 A
IDM Drain Current Pulsed (Note 1) 200 A
VGS Gate to Source Voltage ±20 V
EAS Single Pulsed Avalanche Energy (Note 2) 470 mJ
EAR Repetitive Avalanche Energy (Note 1) 13 mJ
IAR Avalnche Current (Note 1) 50 A
dv/dt Peak Diode Recovery dv/dt (Note 3) 7 V/ns
Total Power Dissipation(@TC = 25 °C) 130 W
PD
Derating Factor above 25 °C 0.87 W/°C
TSTG, TJ Operating Junction Temperature & Storage Temperature - 55 ~ 175 °C
Maximum Lead Temperature for soldering purpose,
TL 300 °C
1/8 from Case for 5 seconds.

Thermal Characteristics
Value
Symbol Parameter Units
Min. Typ. Max.
RθJC Thermal Resistance, Junction-to-Case - - 1.15 °C/W
RθCS Thermal Resistance, Case to Sink - 0.5 - °C/W
RθJA Thermal Resistance, Junction-to-Ambient - - 62.5 °C/W

December, 2002. Rev. 1. 1/7

Copyright@SemiWell Semiconductor Co., Ltd., All rights reserved.
SFP50N06

Electrical Characteristics ( TC = 25 °C unless otherwise noted )

Symbol Parameter Test Conditions Min Typ Max Units

Off Characteristics
BVDSS Drain-Source Breakdown Voltage VGS = 0V, ID = 250uA 60 - - V
Δ BVDSS/ Breakdown Voltage Temperature
ID = 250uA, referenced to 25 °C - 0.06 - V/°C
Δ TJ coefficient

VDS = 60V, VGS = 0V - - 1 uA

IDSS Drain-Source Leakage Current
VDS = 48V, TC = 150 °C - - 10 uA
Gate-Source Leakage, Forward VGS = 20V, VDS = 0V - - 100 nA
IGSS
Gate-source Leakage, Reverse VGS = -20V, VDS = 0V - - -100 nA
On Characteristics
VGS(th) Gate Threshold Voltage VDS = VGS, ID = 250uA 2.0 - 4.0 V
Static Drain-Source On-state Resis-
RDS(ON) VGS =10 V, ID = 25A - 0.018 0.023 Ω
tance
Dynamic Characteristics
Ciss Input Capacitance - 880 1140
Coss Output Capacitance - 430 560 pF
VGS =0 V, VDS =25V, f = 1MHz
Crss Reverse Transfer Capacitance - 110 140
Dynamic Characteristics
td(on) Turn-on Delay Time - 60 130
tr Rise Time VDD =30V, ID =25A, RG =50Ω - 185 380
ns
td(off) Turn-off Delay Time - 75 160
※ see fig. 13. (Note 4, 5)
tf Fall Time - 60 130
Qg Total Gate Charge - 39 45
Qgs Gate-Source Charge VDS =48V, VGS =10V, ID =50A - 9.5 - nC
Qgd Gate-Drain Charge(Miller Charge) ※ see fig. 12. (Note 4, 5) - 13 -

Source-Drain Diode Ratings and Characteristics

Symbol Parameter Test Conditions Min. Typ. Max. Unit.
IS Continuous Source Current Integral Reverse p-n Junction - - 50
Diode in the MOSFET A
ISM Pulsed Source Current - - 200
VSD Diode Forward Voltage IS =50A, VGS =0V - - 1.5 V
trr Reverse Recovery Time - 54 - ns
IS=50A,VGS=0V,dIF/dt=100A/us
Qrr Reverse Recovery Charge - 81 - nC

※ NOTES
1. Repeativity rating : pulse width limited by junction temperature, δ <1％
2. L = 220uH, IAS =50A, VDD = 25V, RG = 0Ω , Starting TJ = 25°C
3. ISD ≤ 50A, di/dt ≤ 300A/us, VDD ≤ BVDSS, Starting TJ = 25°C
4. Pulse Test : Pulse Width ≤ 300us, Duty Cycle ≤ 2%
5. Essentially independent of operating temperature.

2/7
 SFP50N06

Fig 1. On-State Characteristics Fig 2. Transfer Characteristics

VGS
Top : 15.0 V
2 2
10 10.0 V 10
8.0 V
7.0 V
6.0 V

ID, Drain Current [A]

ID, Drain Current[A]

5.5 V
5.0 V
Bottom : 4.5 V
o
175 C
1 1
10 10

o
25 C
o
-55 C ※ Notes :
※ Notes :
1. 250µ s Pulse Test 1. VDS = 30V
2. TC = 25℃ 2. 250µ s Pulse Test

0
10
0
10
-1 0 1 2 4 6 8 10
10 10 10

VDS, Drain-Source Voltage[V] VGS, Gate-Source Voltage [V]

Fig 3. On Resistance Variation vs. Fig 4. On State Current vs.

Drain Current and Gate Voltage Allowable Case Temperature
70
Drain to Source on Resistance[mΩ ]

2
60 10
IDR, Reverse Drain Current[A]

50
RDS(ON),

40
VGS=10V

1
30 10

o
20 175 C 25 C
o
VGS=20V

※ Notes :
10 1. VGS = 0V
o
※ Note TJ = 25 C 2. 250µ s Pulse Test
0
0 10
0 20 40 60 80 100 120 140 160 180 200 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8
ID, Drain Current[ A ] VSD, Source-Drain voltage[V]

Fig 5. Capacitance Characteristics Fig 6. Gate Charge Characteristics

3000 12
Ciss=Cgs+Cgd(Cds=shorted)
Coss=Cds+Cgd
Crss=Cgd
2500 10
VDS = 30V
VGS, Gate-Source Voltage [V]

VDS = 48V
2000 8
Capacitance [pF]

※ Notes :
1. VGS = 0V
2. f=1MHz
1500 6

Ciss
1000 4
Coss

500 2

Crss ※ Note : ID = 50A

0 0
5 10 15 20 25 30 35 0 5 10 15 20 25 30 35 40 45
VDS, Drain-Source Voltage [V] Qg, Total Gate Charge [nC]

3/7
 SFP50N06

Fig 7. Breakdown Voltage Variation Fig 8. On-Resistance Variation

vs. Junction Temperature vs. Junction Temperature
1.2 3.0
Drain-Source Breakdown Voltage

2.5

Drain-Source On-Resistance
1.1
BVDSS, (Normalized)

RDS(ON), (Normalized)
2.0

1.0 1.5

1.0

0.9 ※ Notes :
1. VGS = 0 V ※ Notes :
2. ID = 250 µ A 0.5
1. VGS = 10 V
2. ID = 25 A

0.8 0.0
-100 -50 0 50 100 150 200 -100 -50 0 50 100 150 200
o o
TJ, Junction Temperature [ C] TJ, Junction Temperature [ C]

Fig 9. Maximum Safe Operating Area Fig 10. Maximum Drain Current
vs. Case Temperature
10
3
50
Operation in This Area
is Limited by R DS(on)

40
10
2 100 µs
ID, Drain Current [A]

1 ms
ID' Drain Current [A]

10 ms 30

10
1 DC

20

0
10 ※ Notes :
1. TC = 25 C
o 10
o
2. TJ = 150 C
3. Single Pulse
-1
10 0
-1 0 1 2
10 10 10 10 25 50 75 100 125 150 175

VDS, Drain-Source Voltage [V] TC' Case Temperature [ C]

o

Fig 11. Transient Thermal Response Curve

0
10

D = 0 .5
Zθ JC(t), Thermal Response

※ N o te s :
1 . Z θ J C(t) = 1 .1 5 ℃ /W M a x .
0 .2 2 . D u ty F a c to r, D = t 1 /t 2
3 . T J M - T C = P D M * Z θ J C(t)
0 .1
-1
10
0 .0 5

0 .0 2
0 .0 1
s in g le p u ls e

-2
10
-5 -4 -3 -2 -1 0 1
10 10 10 10 10 10 10

t 1 , S q u a re W a v e P u ls e D u ra tio n [s e c ]

4/7
 SFP50N06

Fig. 12. Gate Charge Test Circuit & Waveforms

VGS
Same Type
50KΩ
as DUT Qg
12V 200nF
300nF 10V
VDS
VGS Qgs Qgd

DUT
1mA

Charge

Fig 13. Switching Time Test Circuit & Waveforms

RL VDS
VDS 90%

VDD
( 0.5 rated V DS )

10%
10V
V Vin
RG DUT
Pulse
td(on) tr td(off)
Generator tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

L BVDSS
VDS 1
EAS = ---- LL IAS2 --------------------
2 BVDSS -- VDD
VDD
BVDSS
ID
IAS
RG
ID (t)

DUT VDD VDS (t)

10V

tp Time

5/7
SFP50N06

Fig. 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT
+

VDS

IS
L

Driver
RG
Same Type
as DUT VDD

VGS • dv/dt controlled by RG

• IS controlled by pulse period

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop

6/7
 SFP50N06

TO-220 Package Dimension

mm Inch
Dim.
Min. Typ. Max. Min. Typ. Max.
A 9.7 10.1 0.382 0.398
B 6.3 6.7 0.248 0.264
C 9.0 9.47 0.354 0.373
D 12.8 13.3 0.504 0.524
E 1.2 1.4 0.047 0.055
F 1.7 0.067
G 2.5 0.098
H 3.0 3.4 0.118 0.134
I 1.25 1.4 0.049 0.055
J 2.4 2.7 0.094 0.106
K 5.0 5.15 0.197 0.203
L 2.2 2.6 0.087 0.102
M 1.25 1.55 0.049 0.061
N 0.45 0.6 0.018 0.024
O 0.6 1.0 0.024 0.039
Ø 3.6 0.142

H I φ
E A

B
F

M
G L
1
D 2 1. Gate
3 2. Drain
3. Source
J N O
K

7/7