EPE3301

Power Electronics
DC‐AC Inverters
Dr Lee Sze Sing, CEng

SzeSing.Lee@newcastle.ac.uk

SIT-NU Electrical Power Engineering

 Introduction
• Converts DC to AC.
• Inverters transfer power from a DC source to an AC load.
• Synthesize a sinusoidal voltage waveform (fundamental
component) that has a controlled frequency and magnitude
from a DC supply.
• Applications: adjustable‐speed AC motor drives, uninterruptable
power supplies (UPS), running ac appliances from dc power
source such as automobile battery.

+ AC output
‐Battery
‐PV
vin (t ) C 1 or 3
‐ VSI
‐AC load
‐AC power grid

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Types of Inverter
Voltage Source Inverter
Single‐phase
• Half‐Bridge
• H‐Bridge (Full‐bridge)
• Multilevel topologies (Cascaded H‐bridge, Neutral‐Point‐
Clamped inverter, etc)
Three‐phase
• Two level voltage source inverter (VSI)
• Multilevel topologies (Cascaded H‐bridge, Neutral‐Point‐
Clamped inverter, etc)

Current Source Inverter

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 Power Flow in an Inverter
Inverter has four quadrants of operation: capable of bidirectional
power flow.

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 Half‐Bridge: Square Wave Operation
Switches S1 and S2 are complementary.
They should not be ON together to prevent short circuit.
They should not be OFF together to avoid floating load
terminals.
(200 V)
Square wave operation is simple. However, it has high
voltage THD and the magnitude of output voltage is fixed.
N

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 Half‐Bridge: Square Wave Operation

Square wave

FFT of square wave

Alternative: Control the half‐bridge with sinusoidal pulse width modulation (SPWM)
Advantages of SPWM: (1) decrease harmonics to reduce filter requirements. (2) control of
the output voltage amplitude.
Control of the switches for sinusoidal PWM (SPWM) output requires (1) a reference signal,
sometimes called a modulating or control signal, which is a sinusoid in this case and (2) a
carrier signal, which is a triangular wave thatSScontrols
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the switching frequency. 6
Half‐Bridge: Sinusoidal PWM
Sinusoidal pulse width
modulation is used to control
the magnitude of output
(200 V)
voltage.

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 Half‐Bridge: Sinusoidal PWM
To derive the magnitude of output voltage,
vaN is analyzed.
vaN consists of low frequency component
(DC offset and fundamental component) and
high frequency component (switching
(200 V) frequency, fs)
vaN  vaN , LF  vaN , HF
N
Low frequency component can be
Vˆsine Vˆtri obtained by averaging the
instantaneous voltage at switching
Vˆtri frequency
1 t Ts
vaN , LF   vaN dt
Ts t
vaN (Finding the average of vaN
for each switching period)

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 Half‐Bridge: Sinusoidal PWM
To derive the magnitude of output voltage,
vaN is analyzed.

1 t Ts
vaN , LF   vaN dt
(200 V)
Ts t
1
vaN , LF   dTs  Vdc  (1  d )Ts  0
N Ts
vaN Consider one switching period
vaN , LF  dVdc
Vdc
d = duty-cycle of S1. This duty-cycle
dTs is varying sinusoidally due to
sinusoidal reference.
0
Vdc= voltage of DC supply (constant)
t Ts
Duty-cycle at time t is d.
When S1 is on during dTs, the voltage is Vdc.
Whe S1 is OFF (S2 ON) during (1-d)Ts, the voltage
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 Half‐Bridge: Sinusoidal PWM
To derive the duty-cycle, d
analyze the reference and carrier signals
2Vˆtri

(200 V) 0

Vˆsine
dTs
Vˆtri

Ts
Vˆtri
vref  Vˆsine sin t   Vˆtri
vref Vˆsine 1
d  sin t  
vaN 2Vˆtri 2Vˆtri 2
Therefore,

1 Vˆsine 1
vaN , LF  vaN ,1  VaN ,dc vSSaNLee, LF  dVdc  Vdc sin t 10 Vdc
2 Vˆtri 2
 Half‐Bridge: Sinusoidal PWM
From the half-bridge circuit diagram,
the output voltage is
vao  vaN  voN
1
where, voN  Vdc
2
(200 V)
Therefore, 1
vao ,LF  vaN ,LF  Vdc
N 2
Vˆsine Vˆtri
1 Vˆsine
vao ,LF  Vdc sin t 
Vˆtri 2 Vˆtri
The low frequency output voltage
is sinusoid at fundamental frequency
given by the frequency of reference.
Finally, the fundamental output
voltage is
1
vao ,1  M Vdc sin t 
2
Peak of fundamental
ˆ 1 Vˆsine
Vao ,1  M Vdc M Modulation index,
output voltage
2 SS Lee Vˆtri 0 < M < 1 for linear region 11
 Half‐Bridge: Sinusoidal PWM
Vˆsine
Vˆsine  0.8, Vˆtri  1 M  0.8
ˆ
Vtri

(200 V)

Generalized equation for SPWM FFT of output voltage

Peak of fundamental output voltage
80 V
Vˆout ,1  MVmax
Modulation
index: Vmax is max level of 1 1
ˆ
Vao ,1  M Vdc  0.8   200  80V
Vˆsine instantaneous output
2 2
M voltage (without DC
Vˆtri offset) SS Lee 12
H‐Bridge
+
S1 S3 vao(t) vbo(t) vab(t) S1 S3

V d2
c
V d2 V d2 V 2 V d2

V d2 V d2 V d2 V 2
c

c
‐ R L
0 0   0 o
a b

V d2
+

c
Vd
c

c S2
0 1    S4

c
Vd ‐ N
d
c

  
c
1 0
c

d
c

1 1   0

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 H‐Bridge: Square Wave Operation
+
S1 S3
D3 SS1
V d2

D1 1
c

S4
S3
‐ R L S3
S2
o
a b S2
S4
V d2

+
c

S2 S4 Vab
D2 D4 Vout

‐ N Dead time
During dead time, inductive load current freewheels through antiparallel diode of power
switches

The output voltage of square wave inverter

consists of odd harmonics.

D1 S1 D2 S2
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D4 S4 D3 S3
 H‐Bridge: Sinusoidal PWM
Two types of SPWM switching schemes: (1) Bipolar modulation. (2) Unipolar modulation.

Bipolar SPWM Unipolar SPWM

One reference signal and one carrier Two reference signals and one carrier
signal for H‐bridge. signal.

vaN
vab
vbN

vab
Output voltage is bipolar.
+Vdc, ‐Vdc for both positive and negative Output voltage is unipolar.
half‐cycle 0, +Vdc for positive half‐cycle
0, ‐Vdc for negative half‐cycle
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H‐Bridge: Sinusoidal PWM (Bipolar)
Peak of fundamental
output voltage

Vˆout ,1  MVmax
(200 V)
Vˆsine
M Vmax  Vdc
N Vˆtri

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H‐Bridge: Sinusoidal PWM (Unipolar)
Peak of fundamental
output voltage

Vˆout ,1  MVmax
(200 V)
Vˆsine
M Vmax  Vdc
N Vˆtri

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 H‐Bridge: Sinusoidal PWM (Unipolar)
Vˆsine
Vˆsine  0.8, Vˆtri  1 M  0.8
ˆ
Vtri

(200 V)
160 V
N
Vˆab ,1  MVdc  0.8  200  160V

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H‐Bridge: Bipolar SPWM vs. Unipolar SPWM
Same RL load, modulation index and carrier frequency are considered.

Bipolar SPWM Unipolar SPWM

fs
fs

5
0
0
H
z
5
0
0
H
z

 Output voltage  Output voltage

Load current Load current

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Unipolar SPWM generates better waveform with lower THD
 H‐Bridge: PWM Harmonics
Due to PWM switching, the output voltage consists of high frequency harmonics.
Frequency spectrum of output voltage can be used to analysed the harmonic components
Frequency spectrum for bipolar SPWM (M = 1) Frequency spectrum for unipolar SPWM (M = 1)
The harmonics in the
output of unipolar SPWM
begin at higher frequency

Fundamental High frequency harmonics Fundamental High frequency harmonics

component component

fs f tri frequency of triangular carrier (switching frequency)

mf   
f1 f sin e frequency of sinusoidal ref (fundamental frequency)
n  harmonic order  f / f1 SS Lee 20
H‐Bridge: Switching Frequency
Same RL load and modulation index are considered for unipolar SPWM.
fs

fs
5
0
0
H
z

4
k
H
z
 Output voltage
 Output voltage

Load current Load current

By increasing mf, the harmonics in the output voltage begin at higher frequency.
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Current harmonics are reduced due to increased RL load impedance at higher frequency.
21
Three‐Phase Inverter: Six‐Step Operation
S1

S6
S1 S3 S5
S3
S2

S5
S2 S4 S6
S4

N n
vAB
vAn

vBC
vBn

vCA
vCn
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Three‐Phase Inverter: Six‐Step Operation
How/where to start?
1. Each switch has a duty‐
S1 S3 S5
cycle of 50%.
2. Top switches:
a: S1 begin at 0 degree
S2 S4 S6
b: S3 begin at –120 degree
N n
c: S5 begin at –240 degree
3. Bottom switches:
4. Based on switches condition, complimentary signals
sketch the equivalent circuit for
a: S2 = S1
each state.
5. Perform circuit analysis: KVL b: S4 = S3
c: S6 = S5
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Three‐Phase Inverter: Six‐Step Operation
vAn

S2 vBnS4 S6

N n

vCn

0 60 120 180 240 300 360

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Three‐Phase Inverter: SPWM
S1 S3 S5
SPWM operation
• Similar concept as the SPWM for
Half bridge.
S2 S4 S6
• Each pair of switches (one leg)
N
requires a separate sinusoidal
n reference.
• The three reference sinusoids are
Leg A Leg B Leg C 120‐degree apart to produce a
balanced three‐phase output.
(For H‐bridge, 2 sinusoidal
references with 180‐degree apart
are used)

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Three‐Phase VSI: Sinusoidal PWM

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 Three‐Phase VSI: Sinusoidal PWM

(200 V)

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 Three‐Phase Inverter: SPWM
Modulation index is used to control the magnitude of output voltage
The time domain fundamental voltage is
S1 S3 S5 1
v AN ,1  M Vdc sin t 
2
1
vBN ,1  M Vdc sin t  120o 
2
1
vCN ,1  M Vdc sin t  240o 
S2 S4 S6
N 2
n
The fundamental voltage taking N as
From previous analysis, reference can be written in phasor domain
1
Vˆout ,1  MVmax VAN ,1 ( j )  M Vdc 0o
2
The peak of fundamental voltage taking 1
N as reference is VBN ,1 ( j )  M Vdc   120o
2
ˆ ˆ ˆ 1 1
VAN ,1  VBN ,1  VCN ,1  M Vdc VCN ,1 ( j )  M Vdc   240o
2 2

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 Three‐Phase Inverter: SPWM
Modulation index is used to control the magnitude of output voltage
The line‐to‐line voltage can be calculated
S1 S3 S5 (take A to B as example)
VAB ,1 ( j )  VAN ,1 ( j )  VBN ,1 ( j )
1
VAB ,1 ( j )  M Vdc 10o  1  120o 
S2 S6
2
S4
3
N
VAB ,1 ( j )  M Vdc 30o
n 2
The fundamental voltage taking N as
reference in phasor domain Therefore, the peak of fundamental line‐
1 to‐line voltage is
VAN ,1 ( j )  M Vdc 0o
2
ˆ 3
1 Vline ,1  M Vdc
VBN ,1 ( j )  M Vdc   120o 2
2
The peak of fundamental phase voltage is
1
VCN ,1 ( j )  M Vdc   240o 1
2 ˆ
V phase ,1  M Vdc
2
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 Three‐Phase Inverter: SPWM
Common mode voltage of three‐phase inverter
vaN (t )  van (t )  vnN (t )

vbN (t )  vbn (t )  vnN (t )
S1 S3 S5

v (t )  v (t )  v (t )
 cN cn nN

S2 S4 S6

N n
common mode voltage (CMV)
vnN (t )
Consists of low frequency and
high frequency components
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vaN (t )  vbN (t )  vcN (t )
 van (t )  vbn (t )  vcn (t )  3vnN (t )
van (t )  vbn (t )  vcn (t )  0
vaN (t )  vbN (t )  vcN (t )
 vnN (t ) 
3
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 Three‐Phase Inverter: SPWM
Common mode voltage of three‐phase inverter

S1 S3 S5 vaN(t) vbN(t) vcN(t) vnN(t)

0 0 0 0 0 0 0
1
0 0 1 0 0 Vdc Vdc
3
1
0 1 0 0 Vdc 0 Vdc
3
2
0 1 1 0 Vdc Vdc Vdc
3
1
1 0 0 Vdc 0 0 Vdc
3
2 vaN (t )  vbN (t )  vcN (t )
Vdc Vdc Vdc vnN (t ) 
1 0 1 0 3 3
2
1 1 0 Vdc Vdc 0 Vdc
3
1 1 1 Vdc Vdc Vdc V dc
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 Multilevel Inverters
Cascaded H‐Bridge (CHB)
Example: Two modules for five levels generation

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 Multilevel Inverters
Cascaded H‐Bridge (CHB)
Example: Five modules for 11 levels generation

For n cascaded modules (H‐bridge), the number of levels generation,

number of isolated DC sources and number of switches are
N level  2n  1, N dc  n, N switch  4n
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 Multilevel Inverters
Neutral‐Point‐Clamped (NPC) Inverter
Example: three level NPC

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 Multilevel Inverters
Flying Capacitor (FC) Inverter
Example: three level FC inverter

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 Multilevel Inverters
T‐Type Inverter (3‐level)

state [+1] :
vo  0.5Vdc : S1,S3 ON

 state [-1]:
vo vo  0.5Vdc : S2,S4 ON

state [0]:
vo  0 : S1,S2 ON

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