ELEC/MECH 6th Semester

Industrial Automation & PLC Programming

Review of Sequential Logic Designs

Prof. Ashraf A. Zaher

German International University
Faculty of Engineering
Department of Electrical Engineering
 Combinational Logic
❑ Logic circuits for digital systems may be combinational or sequential.
❑ A combinational circuit consists of an interconnection of logic gates whose outputs at any time are
determined from only the present combination of inputs.
❑ A combinational circuit performs an operation that can be specified logically by a set of Boolean
functions.
❑ Sequential circuits, however, employ storage elements in addition to logic gates
❑ A block diagram of a combinational circuit is shown below:

❑ The n input binary variables come from an external source; the m output variables are produced by
the internal combinational logic circuit and go to an external destination.
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 Analysis Requirements
❑ We firstly write:

❑ Then we can write:

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 Design Procedure
1. Determine the number of inputs and outputs and name them
2. Derive the truth table
3. Obtain the simplified Boolean functions for each output
4. Draw the logic diagram
5. Verify the correctness of the design

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 BCD-to-Excess-3 Code Converter

Validate the design

Reduce the logic

Implement using MSI

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 Design of a Half Adder (HA)

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 Design of a Full Adder (FA)

Using two HAs

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 Extensions to HAs and FAs

Binary Adder

Binary Subtractor

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 Extensions to HAs and FAs

Decoders
Incoders
Multiplexers
…
…

Mode

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 Sequential Logic Circuits
❑ A sequential circuit consists of a combinational circuit to which storage elements are
connected to form a feedback path

The need for storage elements

❑ The storage elements are capable of storing binary information

❑ The binary information stored in these elements at any given time defines the state of the
sequential circuit at that time
❑ The sequential circuit receives binary information from external inputs that, together with
the present state of the storage elements, determine the binary value of the outputs
❑ These external inputs also determine the condition for changing the state in the storage
elements
❑ The block diagram demonstrates that the outputs in a sequential circuit are functions not
only of the inputs, but also of the present state of the storage elements
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 Sequential Logic Circuits
❑ There are two main types of sequential circuits:
➢ Synchronous sequential circuits: depend on input signals at discrete instants of time
➢ Asynchronous sequential circuits: depend on input signals at any instant of time and the
order in which the inputs change

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 Sequential Logic Circuits

The need for registers as memory elements Notice input dependence

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 Sequential Logic Circuits

Example of a Example of a
Mealy Machine Moore Machine
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 Registers or Memory Elements
❑ Storage elements (memory) used in clocked sequential circuits are called flip-flops (FFs)
❑ A FF is a binary storage device capable of storing one bit of information
❑ A change in state of the FFs is initiated only by a clock pulse transition
❑ When a clock pulse is not active, the feedback loop between the value stored in the FF and
the value formed at the input to the FF is effectively broken because the FF outputs cannot
change even if the outputs of the combinational circuit driving their inputs change in value
❑ Thus, the transition from one state to the next occurs only at predetermined intervals
dictated by the clock pulses
❑ Storage elements that operate with signal levels are referred to as latches
➢ Level-sensitive devices
❑ Storage elements that operate with signal transitions are referred to as FFs
➢ Edge-sensitive devices
❑ Latches are the basic circuits from which all FFs are constructed
❑ Latches are useful for the design of asynchronous sequential circuits
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 The Set/Reset FF (SR latch)

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 The D Latch

Shorting S and R

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 The D FF

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 The JK FF

Check the
operation No change Set Reset Toggle

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 The T FF

Characteristic Tables Excitation Tables

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 State Table, Equation, and Diagram

Derive the
equations

Is it Moore or
Mealy Machine?

𝐴(𝑘 + 1) = 𝐴(𝑘)𝑥(𝑘) + 𝐵(𝑘)𝑥(𝑘)

𝐵(𝑘 + 1) = 𝐴′(𝑘)𝑥(𝑘)
𝑦(𝑘) = [𝐴 𝑘 + 𝐵(𝑘)]𝑥′(𝑡)
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 Example of a Sequential Circuit (D FF)
𝐷𝐴 = 𝐴⨁𝑥⨁𝑦
𝐴(𝑡 + 1) = 𝐴 ⊕ 𝑥 ⊕ 𝑦

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 Example of a Sequential Circuit (JK FF)

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 Example of a Sequential Circuit (T FF)

Moore
or
Mealy?

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 State Reduction Procedure

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 State Assignment and FF Excitation Tables

Unused State!

Don’t Care Conditions!

What about the D FF?

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 Design Procedure of a FSM
❑ The procedure for designing synchronous sequential circuits can be summarized
by a list of recommended steps:
1. From the word description and specifications of the desired operation, derive a state
diagram for the circuit (the most critical step)

2. Reduce the number of states if necessary.

3. Assign binary values to the states.

4. Obtain the binary-coded state table.

5. Choose the type of flip-flops to be used.

6. Derive the simplified flip-flop input equations and output equations.

7. Draw the logic diagram.

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 Design Examples
❑ Suppose we wish to design a circuit that detects a sequence of three or more consecutive 1’s
in a string of bits coming through an input line
➢ That is, the input is a serial bit stream
❑ The state diagram for this type of circuit is given below

Complete the design

Synthesis using
different FFs

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 Synthesis Using the D FF

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 Synthesis Using the JK FF

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 Synthesis Using the JK FF

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 Synthesis Using the T FF
❑ Let’s now design a binary counter using T flip-flops
❑ An n -bit binary counter consists of n flip-flops that can count in binary from 0 to 2𝑛 − 1
❑ The state diagram of a 3-bit counter is shown below:

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 Synthesis Using the T FF

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