Computer Architecture Unit 12

The Input-Output bus consists of the following:

 data lines
 address lines
 control lines
A general-purpose computer makes use of printer, magnetic disk. In
computers, magnetic tape is utilised for backup storage. All peripheral
devices are connected with it by means of interface unit.
All interfaces decode the address as well as control obtained from I/O bus.
Every interface decodes them for peripheral. Also it offers signals for
peripheral controller. Data flow is synchronised and the transfer among
processor and peripheral is administered. Every peripheral comprises its
individual controller. A specific electromechanical device is operated by this
controller. For instance, paper movement, print timing in addition to the
printing characters selection are controlled by means of printer controller.
Perhaps, a controller is stored individually or is physically incorporated with
peripheral. Input-Output bus from processor is connected every peripheral
interface.
It is required for the processor to place the address of a device on address
lines in order to converse with a device. Every interface which is connected
to I/O bus includes address decoder. The function of address decoder is to
monitor address lines. The path among bus lines and device that are
controlled by interface gets activated, when the interface identifies its own
address. The interface disables those peripherals whose address is not
matching with the address in bus. Address lines contain the address. Also, a
function code is provided by processor in control lines.
An interface chosen replies to the function code. Then and continues to
implement it. You can consider function code as an Input-Output command.
Basically, the instruction which is carried out in interface and it is connected
in peripheral unit is known as a function code.
Interface may obtain different kinds of commands. The different kinds of
commands are:
 Control: We give a control command to activate the peripheral.
Particularly, a control command given relies on peripheral. Every
peripheral obtains its own differentiated series of commands, according
to its operation mode.

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 Status: This command is used for testing different conditions of status

in peripheral as well as interface. For instance, before initiating a
transfer, computer may want to verify the peripheral’s status. When the
transfer is going on, some errors may take place. These errors are
observed by interface.
 Data output: In this command, the interface responds by transmitting
data. Data is transmitted from bus into any of its registers. As an
example, consider a tape unit. By means of a control command, the
computer begins the tape moving. Then the status of tape is monitored
by processor. This is done by using status command.
 Data input: By giving this command, interface obtains a data item from
peripheral. This data item is placed in buffer register of interface. The
availability of data is checked by the processor. This is done by using
status command. Then, data input command is issued. Here, the
interface puts the data on data lines. Also the data gets accepted by the
processor.
12.4.1 Input-Output vs. memory bus
It is required for processor to converse with memory unit in order to
converse with I/O. Memory bus consists of the following:
 data
 address
 read/write control lines
Computer buses can communicate with I/O and memory by using the
following techniques:
 Make use of two different buses, the first bus for memory and the
second bus for I/O.
 Make use of a common bus for I/O as well as memory. However
different control lines should be there for each.
 Make use of a common bus for I/O as well as memory having common
control lines.
In case of first technique, the computer comprises the following:
 data
 address
 control buses, one bus for I/O and other for accessing memory

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This is performed in computers having an individual IOP (input-output

Processor) (IOP) and CPU (Central Processing Unit). By means of a
memory bus, the memory converses with central processing unit as well as
input-output processing. IOP also converses with input as well as output
devices. This is done through an individual I/O bus having its individual
data, address in addition to control lines. IOP provides independent path for
transferring information among internal memory and external devices.
12.4.2 Isolated versus memory-mapped I/O
Information transfer between I/O or memory and CPU can be carried over
one common bus. Memory transfer and I/O transfer differs in that they use
separate lines for read and write operations. CPU task is to distinguish that r
the address on the address lines is for an interface register or for memory
word. It is done by enabling either the read lines or the write lines.
During the I/O transfer, control lines are enabled for I/O read and I/O writes
operations. During a memory transfer, the lines are enabled for the memory
read and memory write operations. By this configuration, I/O interface
addresses are isolated from the addresses assigned to memory. This
arrangement is known as isolated I/O method. It is used in the common bus
to assign addresses. In memory mapped I/O, all peripherals devices are
treated as memory locations.
12.4.3 Example of I/O interface
Figure 12.5 shows an example of an I/O interface. It has two data registers
called ports, a control register, a status register, bus buffers, and timing and
control circuits. The interface communicates with the CPU through the data
bus.

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Figure 12.5: Example of I/O Interface Unit

The chip select and register select inputs determine the address assigned to
the interface. The I/O read and writes are two control lines that specify an
input or output, respectively. The four registers: Port A Register, Port B
register, Control Register and Status register communicate directly with the
I/O device attached to the interface. The input-output data to and from the
device can be transferred into either port A or port B.
The interface may operate with an output device or with an input device, or
with a device that requires both input and output. If the interface is
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Computer Architecture Unit 12

connected to a printer, it will only output data, and if it services a character

reader, it will only input data. A magnetic disk unit is used to transfer data in
both directions but not at the same time, so the interface can use bi-
directional lines. A command is passed to the I/O device by sending a word
to the appropriate interface register.
In a system like this, the function code in the I/O bus is not needed because
control is sent to the control register, status information is received from the
status register, and data are transferred to and from ports A and B registers.
Thus the transfer of data, control, and status information is always via the
common data bus.
The distinction between data, control, or status information is determined
from the particular interface register with which the CPU communicates. The
control register gets control information from the CPU. By loading
appropriate bits into the control register, the interface and the I/O device
attached to it can be placed in a variety of operating modes. For example,
port A may be defined as an input port and port B as an output port, A
magnetic tape unit may be instructed to rewind the tape or to start the tape
moving in the forward direction. The bits in the status register are used for
status conditions and for recording errors that may occur during the data
transfer. For example, a status bit may indicate that port-A has received a
new data item from the I/O device.
The interface registers uses bi-directional data bus to communicate with the
CPU. The address bus selects the interface unit through the chip select and
the two register select inputs. A circuit must be provided externally (usually,
a decoder) to detect the address assigned to the interface registers. This
circuit enables the chip select (CS) input to select the address bus. The two
register select-inputs RSl and RSO are usually connected to the two least
significant lines of the address bus. Out of those two inputs, select one of
the four registers in the interface as specified in the table accompanying the
diagram. The content of the selected register is transferred into the CPU via
the data bus when the I/O read signal is ended. The CPU transfers binary
information into the selected register via the data bus when the I/O write
input is enabled.

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