Chapter one

Digital logic Gate

A Digital Logic Gate is an electronic circuit which makes logical
decisions based on the combination of digital signals present on its
inputs Digital logic gates can have more than one inputs, but generally
only have one digital output.
Individual logic gates can be connected or cascaded together to form a
logic gate function with any desired number of inputs, or to form
combinational and sequential type circuits, or to produce different logic
gate functions from standard gates.
 Types of Logical Gates
• AND Gate
• OR Gate
• NOT Gate
• NANAD Gate
• NOR Gate
• XOR Gate
• XNOR Gate
 The Logic AND Gate is a type of digital logic circuit
AND Gate whose output goes HIGH to a logic level 1 only
when all of its inputs are HIGH
 • 74LS08 Quad 2-input
74LS11 Triple 3-input
TTL AND Gate • 74LS21 Dual 4-input
 • CD4081 Quad 2-input
CMOS Logic AND • CD4073 Triple 3-input
Gate • CD4082 Dual 4-input
 • The Logic OR Gate is a type of digital logic circuit
OR Gate whose output goes HIGH to a logic level 1 only
when one or more of its inputs are HIGH
TTL Logic OR Gates

74LS32 Quad 2-input

 • CD4071 Quad 2-input
CMOS Logic OR • CD4075 Triple 3-input
Gates • CD4072 Dual 4-input
NOT Gate
• The Logic NOT Gate is the most basic of all the logical gates and is
often referred to as an Inverting Buffer or simply an Inverter.
Inverting NOT gates are single input devices which have an output
level that is normally at logic level “1” and goes “LOW” to a logic level
“0” when its single input is at logic level “1”, in other words it
“inverts” (complements) its input signal.
TTL Logic NOT Gates

74LS04 Hex Inverting NOT Gate

CMOS Logic NOT Gates

• CD4009 Hex Inverting NOT Gate

 Schmitt Inverter
A standard Inverter or Logic NOT Gate, is usually made up from
transistor switching circuits that do not switch from one state to
the next instantly, there will always be some delay in the
switching action.
Also, as a transistor is a basic current amplifier, it can also operate
in a linear mode and any small variation to its input level will cause
a variation to its output level or may even switch “ON” and “OFF”
several times if there is any noise present in the circuit
One way to overcome these problems is to use a Schmitt
Inverter or Hex Inverter.
A Schmitt Inverter is designed to operate or switch state when its
input signal goes above an “Upper Threshold Voltage”
or UTV limit in which case the output changes and goes “LOW”,
and will remain in that state until the input signal falls below the
“Lower Threshold Voltage” or LTV level in which case the output
signal goes “HIGH”.
Schmitt Inverter
TTL NOT Gate
• 74LS14 Hex Schmitt Inverting NOT
Gate
NAND Gate
The Logic NAND Gate is a combination
of a digital logic AND gate and a NOT
gate connected together in series
The NAND (Not – AND) gate has an
output that is normally at logic level “1”
and only goes “LOW” to logic level “0”
when ALL of its inputs are at logic level
“1”. The Logic NAND Gate is the reverse
or “Complementary” form of the AND
gate we have seen previously
 • 74LS00 Quad 2-input
TTL Logic NAND • 74LS10 Triple 3-input
Gates • 74LS20 Dual 4-input 74LS30 Single 8-input
 • CD4011 Quad 2-input
CMOS Logic NAND • CD4023 Triple 3-input
Gates • CD4012 Dual 4-input
NOR Gate
The Logic NOR Gate gate is a
combination of the digital logic OR gate
and an inverter or NOT gate connected
together in series
 • 74LS02 Quad 2-input
TTL Logic NOR Gates • 74LS27 Triple 3-input
• 74LS260 Dual 4-input
 • CD4001 Quad 2-input
CMOS Logic NOR • CD4025 Triple 3-input
Gates • CD4002 Dual 4-input
XOR Gate
Exclusive-OR gate ONLY goes “HIGH”
when both of its two input terminals are
at “DIFFERENT” logic levels with respect
to each other. If these two inputs, A and
B are both at logic level “1” or both at
logic level “0” the output is a “0”
TTL Logic Ex-OR Gates

• 74LS86 Quad 2-input

CMOS Logic Ex-
OR Gates

• CD4030 Quad 2-input

XNOR Gate
The Exclusive-NOR Gate function is a
digital logic gate that is the reverse or
complementary form of the Exclusive-
OR function
TTL Logic Ex-
NOR Gates

• 74LS266 Quad 2-input

Tri-State Buffer

The tri-state buffer functions just as a

regular digital buffer, but with an
additional capability that allows us to
configure its output to a Hi-Z (high
impedance) state.
Tri stae
buffer
TTL tri state
buffer
 Tri-State
Buffer
Application
 Minterm and Maxterm Expansions

Minterm
A minterm of n variables = product of n literals in which each variable appears exactly once
either in T or F form, but not in both. (Also known as a standard product term)

A function can be written as a sum of minterm s, which is referred to as a minterm

expansion or a standard sum of products.

Minterms present in f correspond with the 1’s of f in the truth table.

 Maxterm
Maxterm
A maxterm of n variables = sum of n literals in which each variable
appears exactly once in T or F from, but not in both.

A function can be written as a product of maxterms, which is referred to

as a maxterm expansion or a standard product of sums.

Maxterms present in f correspond with the 0’s of f in the truth table.

Logic Levels

Digital electronics involves circuits and systems in which there are only two
possible states. These states are represented by two different voltage levels:
A HIGH and a LOW.

In digital systems such as computers, combinations of the two states, called

codes, are used to represent numbers, symbols, alphabetic characters, and
other types of information. The two-state number system is called binary,
and its two digits are 0 and 1. A binary digit is called a bit.
 Binary Digits

Each of the two digits in the binary system, 1 and 0, is called a bit,
which is a contraction of the words binary digit. In digital circuits, two
different voltage levels are used to represent the two bits. Generally, 1
is represented by the higher voltage, which we will refer to as a HIGH,
and a 0 is represented by the lower voltage level, which we will refer to
as a LOW.

HIGH = 1 and LOW = 0

 Logic Levels

The voltages used to represent a 1 and a 0 are called logic levels. Ideally, one
voltage level represents a HIGH and another voltage level represents a LOW.
In a practical digital circuit, however, a HIGH can be any voltage between a
specified minimum value and a specified maximum value. Likewise, a LOW
can be any voltage between a specified minimum and specified maximum.
There can be no overlap between the accepted range of HIGH levels and the
accepted range of LOW levels.
Digital Waveforms
Types of pulse
Ideal pulse
Non ideal pulse
The Clock

An example of a clock waveform is shown in

Figure below. Notice that, in this case, each
change in level of waveform A occurs at the
leading edge of the clock waveform. In other
cases, level changes occur at the trailing edge
of the clock. During each bit time of the
clock, waveform A is either HIGH or LOW.
These HIGHs and LOWs represent a sequence
of bits as indicated. A group of several bits
can contain binary information, such as a
number or a letter. The clock waveform itself
does not carry information.
In digital systems, all waveforms are synchronized with a basic timing
waveform called the clock. The clock is a periodic waveform in which
each interval between pulses (the period) equals the time for one bit.
 Don’t Care
• K-Map with Don’t Care Conditions In certain cases some of the
minterms may never occur or it may not matter what happens if they
do – In such cases we fill in the Karnaugh map with an X that meaning
don't care – When minimizing an X is like a "joker" • X can be 0 or 1 -
whatever helps best with the minimization