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Physical Design

Basic flow
1. Designer(Schematic/Digital)
2. Synthesis
3. DFT(Design For Testing)
4. Physical Design
5. Verification
• Design Verification
• Physical Verification
• Formal Verification
• Conformal Low Power
• Static Timing Analysis
TapeOut
Physical Design
• Floorplan
• Powerplanning
• Place
- Setup Optimization ,Trial Route,DRV such as FanOut,Cap,Trans.
• CTS
- Build Clocktree

• Post CTS – Hold Optimization


• Route - Global and Detail Route
• Post Route Optimization-DRV,Setup & Hold Optimization.
• Physical Verification
1. DRC-Design Rule Check
2. LVS-Layout Versus Schematic
3. ERC-Electric Rule Check
4. PERC-Programmable Electric Rule Check
5. ESD-Electrostatic Discharge
6. Softcheck
• Tapeout
- Base Tapeout(BTO)
- First BTO go to foundary .Once will go we will not change anything.It
contain base layers like poly,cont,OD etc.,
- Metal Tapeout(MTO)
• Formal Verification
- Functionality check of synthesis layout and final layout.
• Conformal low power
- Check power intend of the design.
- We have different block working in different voltage.
- Level shifter are used to boost the voltage.
Static Timing Analysis
- Set up - Before the clock edge the data is ready
- Hold – The data must be hold in some times.
- Trans - Transition time
-Cap - load
• Floorplanning
- Die and core area estimation
- Macroplacement
- Pin placement
- Add End cap and Welltap cells
Physical Cells
-Well Tap Cells -To prevent latch problem
-Endcap Cells - It will placed around the boundary of core
region.To prevent DRC problem.
Blockages
- Can’t place any standard cells.
• Halo
- It will place around the macros.
- Macros are move and also move macro.
• Pitch
- Min Spacing and Min width of the metal.
• Macroplacement.
- In flylines are used to check the connections.
- It will place around the boundary of the core.
ThankYou

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