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B.V.V.L.KALA BHARATHI
Dept of ELECTRICAL AND ELECTRONICS ENGINEERING
Aditya Engineering College(A)
Surampalem.
Aditya Engineering College (A)
Logic gates:
• Logic gates are building blocks of any digital system.
• It is an electronic circuit having one or more than one input and only
one one output.
• The relation between the input and output is based on a certain logic.
NOT Gate:
• The simplest form of a digital logic circuit is the inverter or the NOT
gate
• It consists of one input and one output and the input can only be
binary numbers namely; 0 and 1
Truth table for NOT Gate:
AND Gate:
The AND gate is a logic circuit that has two or more inputs and a single
output
The operation of the gate is such that
• the output of the gate is a binary 1 if and only if all inputs are binary 1
• Similarly, if any one or more inputs are binary 0, the output will be
binary 0.
OR Gate:
Like the AND gate, it can have two or more inputs and a single output.
The operation of OR gate is such that
• the output is a binary 1 if any one or all inputs are binary 1
• and the output is binary 0 only when all the inputs are binary 0.
Universal Gates:
• A universal gate is a gate which can implement any boolean function
without need to use other gate type.
• All the other gates like And,Or,Not,can be derived from it.
• These are economical and easy to fabricate.
Two types:
NAND Gate
NOR Gate
NAND Gate
• The term NAND is a contraction of the expression NOT-AND gate.
• A NAND gate, is an AND gate followed by an inverter.
• The algebraic output expression of the NAND gate is Y = A.B.
NOR Gate:
• The term NOR is a contradiction of the expression NOT-OR.
• A NOR gate, is an OR gate followed by an inverter.
• The algebraic output expression of the NOR gate is Y = A + B.
• EX-OR and EX-NOR gates are also denoted by XOR and XNOR
respectively.
EX-OR Gate
• The Ex-OR (Exclusive- OR) gate returns high output with one of two high inputs
(but not with both high inputs or both low inputs)
• The algebraic output expression of the Ex-OR gate is Y = A ⊕ B =
A B A⊕B
0 0 0
0 1 1
1 0 1
1 1 0
EX-NOR Gate
• The Ex-NOR (Exclusive- NOR) gate is a circuit that returns low output
with one of two high inputs (but not with both high inputs)
The output expression of the Ex-NOR gate is Y = AʘB = AB+AB=
A B AʘB
0 0 1
0 1 0
1 0 0
1 1 1
Precedence of Operators
Precedence of Operators
Duality
Duality Principle – every valid Boolean expression (equality)
remains valid if the operators and identity elements are
interchanged, as follows:
+.
10
Example: Given the expression
a + (b.c) = (a+b).(a+c)
then its dual expression is
a . (b+c) = (a.b) + (a.c)
Duality
Duality gives free theorems – “two for the price of one”. You prove one
theorem and the other comes for free!
If (x+y+z)' = x'.y.'z' is valid, then its dual is also valid:
(x.y.z)' = x'+y'+z’
If x + 1 = 1 is valid, then its dual is also valid:
x.0=0
7. Consensus theorem:
(a) x.y + x'.z + y.z = x.y + x'.z
(b) (x+y).(x'+z).(y+z) = (x+y).(x'+z)
CANONICAL Form:
It is the way of representing Boolean outputs using boolean algebra.
Two types:
Sum-of-Products (SOP )form
Product-of-Sums(POS) form
Literals: a variable on its own or in its complemented form.
Examples: x, x' , y, y'
Product Term: a single literal or a logical product (AND) of several literals.
Examples: x , x.y.z‘ , A'.B , A.B
Sum Term: a single literal or a logical sum (OR) of several literals.
Examples: x, x+y+z‘ , A'+B , A+B
Maxterm
That means
minterms are product terms.
Maxterms are sum terms.
Therfore
Sum of minterms is SOP Canonical Form.
Example:A.B+A'.B' +A.B’
product of Maxterms is POS Canonical Form.
Example: A+B).(A'+B')+(A+B’)
Obtain the functions F1,F2 and F3 from the given table using minterms
x y z F1 = x.y.z' = m(6)
F2F1 F3
0 0 0 0 0 0
0 0 1 0 1 F2 1= x'.y'.z + x.y'.z‘ + x.y'.z + x.y.z‘ + x.y.z
0 1 0 0 0 0
0 1 1 0 0
= m(1,4,5,6,7)
1
1 0 0 0 1 1
1 0 1 0 1
F3 =
1
x'.y'.z + x'.y.z + x.y'.z' +x.y'.z
1 1 0 1 1 0
1 1 1 0 1
= m(1,3,4,5)
0
Obtain the functions F1,F2 and F3 from the given table using
MAXterms
x y z F1 F2 F3
0 0 0 0 0 0 F1= M(0,1,2,3,4,5,7)
0 0 1 0 1 1
0 1 0 0 0 0
=(x+y+z).(x+y+z’)(x+y'+z).(x+y'+z') (x’+y+z)(x’+y’+z) (x'+y'+z')
0 1 1 0 0 1 F2 = M(0,2,3)
1 0 0 0 1 1 = (x+y+z).(x+y'+z).(x+y'+z')
1 0 1 0 1 1
1 1 0 1 1 0
F3 = M(0,2,6,7)
1 1 1 0 1 0 = (x+y+z).(x+y'+z).(x'+y'+z).(x'+y'+z')
Sum-of-Minterms Product-of-Maxterms
Rewrite minterm shorthand using maxterm shorthand.
Replace minterm indices with indices not already used.
Product-of-Maxterms Sum-of-Minterms
Rewrite maxterm shorthand using minterm shorthand.
Replace maxterm indices with indices not already used.
THANK YOU