Introduction to FPGA

Architecture
Digital System: Implementation
Spectrum
Three generally available options to implement a Digital
Design:
Microcontroller
ASIC
FPGA

Microcontroller FPGA ASIC

Reconfigurable Software Reconfigurable Hardware Fixed Hardware

Fixed Hardware
 FPGA vs Microcontroller
FPGA
Faster speed due to concurrent
behavior of hardware
Can be used to build customized
hardware
Processing speed up to 100’s of
MHz
100’s of I/O pins available
Each I/O can be used to perform
any operation
Microcontroller
Slow Speed due to sequential instructions
execution
Only software can be used to complete the required
task. Fixed hardware
Processing speed limited to few MHz only
Limited I/O Pins (32 in 89c51)
Dedicated pins to perform operation e.g. Serial
Comm, Timers, SPI, Interrupts
 FPGA vs ASIC
FPGA
General Purpose
Reconfigurable Hardware
Suitable for Testing /
verification/Prototyping
No mask charges, no Minimum
Order Qty (MOQ)
Hardware design is rapidly
available to market
ASIC
Application Specific
Fixed Hardware
Suitable for Large manufacturing quantities (costs
about 1 million US$)
Huge setup/mask costs. MOQ exists for ASIC
production
Can take several months to produce first chip out of
a production lot
Digital Logic
Programmable Logic Devices PLD
 FPGA: Field Programmable Gate Array
FPGA is a form of programmable logic device introduced in
1985 by Xilinx, Inc.
An FPGA consists of an array of configurable logic blocks;
surrounded by programmable I/O blocks, and connected with
programmable interconnects.
Also, there will be clock circuitry
for driving the clock signals to
each logic block.
FPGA Technologies
Antifuse : One Time Programmable
SRAM: Reprogrammable FPGAs,
use SRAM configuration cell
Flash: Reprogrammable and
7 Nonvolatile
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FPGAs 6/4/21
 Configurable Logic Blocks (CLBs)
These blocks contain the logic for the FPGA.
The block contains RAM for creating combinatorial logic
functions, also known as lookup tables (LUTs).
It also contains flip-flops for clocked storage elements, and
multiplexers to route the logic within the block and to and
from external resources.
The multiplexers also allow
polarity selection and reset
and clear input selection.

2 LUTs in a CLB
of Xilinx XC4000

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 Combinational Logic Functions
Gates are combined to
create complex circuits
Multiplexer Example
If S=0, Z=A
If S=1, Z=B
Very Common Digital S A B Z
0 0 0 0
Circuit 0 0 1 0
0 1 0 1
Heavily Used in FPGA 0 1 1 1
1 0 0 0
S input is controlled by 1 0 1 1
1 1 0 0
Configuration memory bit 1 1 1 1

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 Look-up Tables
Recall MUX Example
Configuration Memory
holds outputs for truth
table
Internal signals
connect to control
signals of multiplexer
to select value of truth
table for any given
input value

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 Programmable Interconnect
 Local interconnects are fast and short
 Horizontal and vertical interconnects are of various lengths

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 Configurable I/O Block (IOBs)
IOB is used to bring signals onto the chip and send them back
off again.
It consists of an input buffer and an output buffer with three-
state and open collector output controls.
Typically there are pull up resistors on the outputs.
The polarity of the output can
usually be programmed for
active high or active low output,
and often the slew rate of the
output can be programmed for
fast or slow rise and fall times.

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Logic Block CLB
Look Up Tables
Clocked Logic
Circuit Compilation
Advantages of FPGA
Major FPGA Vendors