Chapter 3:

Bipolar Junction
Transistor - BJT
 CONSTRUCTION

- Constructed by 3 semiconductor pieces.

- 2 junctions
- 3 poles: Emitter (E), collector (C) and Base
(B)

Þ 2 BJT types:

PNP, NPN
 WORKING PRINCIPLE
A simplified equivalent circuit of BJT:

Depends on how we bias JE, JC  BJT has 3 working modes

BJT works in active zone

JE : forward bias

(for amplifying purposes)
JC : reverse bias

BJT works in saturation zone

JE : forward bias

JC : forward bias (happens in switching applications)

JE : reverse bias BJT works in cutoff zone


JC : reverse bias
(happens in switching applications)
TRANSISTOR OPERATION
Current in BJT:

pnp BJT type

RELATIONSHIPS BETWEEN IB, IC AND IE
COEFFICIENTS , 
IE = IC + IB (1)
IC

+ Emitter coefficient  IE
dc  ac  1  IC  IE
IC
+ Collector coefficient 

(is also the current amplifying factor) IB
dc  ac

Substitute IC = IB (2) in (1): IE = IB ( +1)

ɑ= 0,97- 0,99 or more

ß = 30-200 or more
BASIC BJT CONFIGURATIONS:
1. Common-base configuration (CB)

PNP NPN
* Input (driving point) static characteristics: IE = f(UEB)UCB = const
UEB = 0,7V (Si)
= 0,3V (Ge)
Output (collector) static charateristics: IC = f(UCB)IE = const
2. Common-Emitter configuration (CE)
* Input (Base) static characteristics: IB = f(UBE)UCE = const
UBE = 0,7V (Si)
= 0,3V (Ge)

Ideal input characteristics

Output (collector) static characteristics:

IC = f(UCE)IB = const
3. Common-Collector configuration (CC)

• high input impedance

and low output
impedance => Mainly
for impedance-
matching purposes
• Similar input and
output characteristics
to CE.
LIMITS OF OPERATION

Pmax
 LIMITS OF OPERATION

Active region is bounded by:

+ UCE sat  UCE > UCE sat

+ ICmax  IC ˂ ICmax

+ UCEmax  UCE ˂ UCEmax

+ ICE0  IC ˃ I CE0

 PC ˂PCmax
+ Pmax = PCmax= ICUCE
 SUMMARY
1. Transistors are three-terminal devices of three semiconductor layers having a base or
center layer a great deal thinner than the other two layers. The outer two layers are
both of either n- or p-type materials, with the sandwiched layer the opposite type.
2. One p–n junction of a transistor is forward-biased, whereas the other is reverse biased.
3. The dc emitter current is always the largest current of a transistor, whereas the base
current is always the smallest. The emitter current is always the sum of the other two.
4. The collector current is made up of two components: the majority component and
the minority current (also called the leakage current).
5. The arrow in the transistor symbol defines the direction of conventional current flow
for the emitter current and thereby defines the direction for the other currents of the
device.
6. A three-terminal device needs two sets of characteristics to completely define its
characteristics.
7. In the active region of a transistor, the base–emitter junction is forward-biased,
whereas the collector–base junction is reverse-biased.
8. In the cutoff region the base–emitter and collector–base junctions of a transistor are
both reverse-biased.
9. In the saturation region the base–emitter and collector–base junctions are forward biased.
 SUMMARY
10. On an average basis, as a first approximation, the base-to-emitter voltage of an operating
transistor can be assumed to be 0.7 V.
11. The quantity alpha (a) relates the collector and emitter currents and is always close to
one.
12. The impedance between terminals of a forward-biased junction is always relatively
small, whereas the impedance between terminals of a reverse-biased junction is usually quite large.
13. The arrow in the symbol of an npn transistor points out of the device (not pointing
in), whereas the arrow points in to the center of the symbol for a pnp transistor
(pointing in).
14. For linear amplification purposes, cutoff for the common-emitter configuration will
be defined by IC = ICEO.
15. The quantity beta (b) provides an important relationship between the base and collector currents,
and is usually between 50 and 400.
16. The dc beta is defined by a simple ratio of dc currents at an operating point,
whereas the ac beta is sensitive to the characteristics in the region of interest. For
most applications, however, the two are considered equivalent as a first approximation.
17. To ensure that a transistor is operating within its maximum power level rating, simply
find the product of the collector-to-emitter voltage and the collector current, and
compare it to the rated value
SUMMARY
 EXERCISES

1. What names are applied to the two types of BJT transistors? Sketch the basic construction of each
and label the various minority and majority carriers in each. Draw the graphic symbol next to each.
2. How must the two transistor junctions be biased for proper transistor amplifier operation?
3. What is the source of the leakage current in a transistor?
4. Sketch a figure similar to Fig. 3.4a for the forward-biased junction of an npn transistor.
Describe the resulting carrier motion.
5. Sketch a figure similar to Fig. 3.4b for the reverse-biased junction of an npn transistor. Describe
the resulting carrier motion.
6. Which of the transistor currents is always the largest? Which is always the smallest? Which
two currents are relatively close in magnitude?
7. If the emitter current of a transistor is 8 mA and IB is 1100 of IC, determine the levels of IC and I .
 DC BIASING FOR BJT

Biasing is to establish a fixed level of current and voltage, or an static operating

point Q on the characteristics.

 DC BIASING FOR BJT
1. Fixed-bias configuration (Base-bias)
* Find Q point:

- Q (IB; IC; UCE)

- intersection between BJT’s output characteristics and the circuit’s DC load line

VCC = IBRB + UBE (1)

 IBQ = (VCC - UBE)/RB ; ICQ = IBQ (2)

VCC = ICQRC + UCE  UCEQ = VCC - ICQRC (3)

* Circuit’s DC load line:

VCC = ICRC + UCE

 o
* Shifting issue of Q point due to changing t

o o
Because ICQ and UCEQ  ; while  changes when t changes (t increases will lead to increasing )

Example:

Given a fixed-bias configuration circuit for BJT:

0 0
VCC = 8V; RB = 200K ; RC = 1K ;  = 100 at t = 25 C, BJT is made of Si (UCE = 0.7V)

0 0
at t = 100 C, UCE = 0.55V,  = 150

0 0
Find Q point at 25 C and 100 C and comment on how it shifts due to changing temperature?
 2. Emitter-bias
* Find Q point:

VCC = IBRB + UBE+ IERE (1)

 VCC = IB[RB+(+1)RE] +UBE

  𝑬 𝑪 − 𝑼 𝑩𝑬
𝑰 𝑩𝑸 =
𝑹 𝑩 +( 𝜷+𝟏) 𝑹 𝑬

 ICQ = IBQ;
VCC = ICQRC + UCE + IERE
 UCEQ = VCC - ICQ.(RC+RE) due to IC  IE
* Circuit’s DC load line:

UCEQ = VCC - ICQ(RC+RE)

 o
* Shifting issue of Q point due to changing t

When  is big enough and ( +1)RE > 10RB:

   𝑉 𝐶 𝐶 − 𝑈 𝐵𝐸
𝐼 𝐶𝑄 ≅
𝑅𝐸
=> ICQ, UCEQ depends less on   Q point is more stable when temperature changes
3. Voltage-divider bias configuration

Thevenin
UBE
 * Find Q point

Thevenin:

Rth = R1//R2

Eth = Vcc.R2 / (R1+R2)

Eth = IBRth + UBE + IERE

Eth  U BE

I BQ 
Rth  (   1) RE
ICQ = IB

UCEQ = VCC - ICQ(RC+RE)

* Circuit’s DC load line

UCEQ = VCC - ICQ(RC+RE)

 o
* Shifting issue of Q point due to changing t

If  is big enough and (+1)RE >> 10Rth then:

Eth  U BE
I CQ 
RE

=> ICQ, UCEQ depends less on   Q point is more stable when temperature changes
 4. Collector feedback configuration

* Find Q point

VCC = IC RC + IB RB + UBE+ IERE (1)

 VCC = IB[RB+(+1)( RC+RE)] +UBE

 

because >> 1:

output

ÞICQ = IBQ;
Þ VCC = ICQRC + UCE + IERE
UCEQ = VCC - ICQ(RC+RE) due to IC  IE
Circuit’s DC load line:

UCEQ = VCC - ICQ(RC+RE)

 o
* Shifting issue of Q point due to changing t

If  is big enough and (RC+RE) >> RB:

  𝑉 𝐶 𝐶 −𝑈 𝐵𝐸
𝐼 𝐶𝑄 ≅
𝑅 𝐸 +𝑅𝐶
=> ICQ, UCEQ depends less on   Q point is more stable when temperature changes
 BJT IN SWITCHING MODE

* Ideal case:

BJT circuit for switching Switch closes, UCE = 0 Switch opens, IC = 0

 * Q point swings between saturation mode and cutoff mode:

At switching mode (ON-OFF), Q point of the BJT keeps swinging between Qon and Qoff
SOME EXAMPLES OF COMMERCIAL
BJT

E
B
Low power pnp BJT

High power pnp BJT

B
E

Extra high power pnp BJT

 SUMMARY
1. The operating point defines where the transistor will operate on its characteristic curves under dc
conditions. For linear (minimum distortion) amplification, the dc operating point should not be too
close to the maximum power, voltage, or current rating and should avoid the regions of saturation and
cutoff.
2. The fixed-bias configuration is the simplest of transistor biasing arrangements, but it is also quite
unstable due its sensitivity to beta at the operating point.
3. The equation for the load line of a transistor network can be found by applying Kirchhoff’s voltage
law to the output or collector network. The Q-point is then determined by finding the intersection
between the base current and the load line drawn on the device characteristics.
4. The emitter-stabilized biasing arrangement is less sensitive to changes in beta— providing more
stability for the network.
5. The voltage-divider bias configuration is probably the most common of all the configurations. Its
popularity is due primarily to its low sensitivity to changes in beta from one transistor to another of
the same lot (with the same transistor label).
6. In a switching configuration, a transistor quickly moves between saturation and cutoff, or vice
versa. Essentially, the impedance between collector and emitter can be approximated as a short circuit
for saturation and an open circuit for cutoff.
7. Beta is very sensitive to temperature, and VBE decreases about 2.5 mV (0.0025 V) for each 1°
increase in temperature on a Celsius scale. The reverse saturation current typically doubles for every
10° increase in Celsius temperature.