CMOS

Complementary
Metal-Oxide-Semiconductor

By:
Sulaiman Rajab Shehu
Peter Esene
 CONTENTS
• NMOS (n type metal oxide)
• PMOS (p type metal oxide)
• CMOS
• OPERATING CONDITIONS FOR CMOS
 NMOS
• P-type substrate
• p-n junction of source and drain are
reverse-biased.
• At threshold voltage the electrons end
up filling all the holes and a thin region
under the gate called the channel gets
inverted to act as an n-type
semiconductor - creating a conducting
path from the source to the drain,
allowing current to flow.
 PMOS
• N-type substrate.
• If a negative voltage (gate-source) , the induced
negative charge on the gate will drive away the
electrons and positive charges are attracted to
the underside of the Si-SiO2 interface
• If the bands under the gate are bent up
sufficiently it forms an inversion layer.

• It has a negative threshold voltage. (gate

voltage < substrate voltage).
• Fermi level is close to conduction band( n type
substrate).
 CMOS
• Combination of both an n-channel and p-type device on the same circuit.
• We need two different kinds of substrates, both a p-type substrate for the
n-channel transistor, and an n-type substrate for the p-channel device.
• We need what is called a tank or a moat. A moat is a relatively deep
region of one type of material placed into a host substrate of the opposite
type .
• The n-type source/drain regions into the p-substrate and p-type
source/drain regions into the n-moat.
 CMOS
The n-channel substrate is connected
to ground, the p-channel substrate is
connected to Vdd.
Note that since the n-moat is at Vdd
and the p-substrate is at ground, the
moat-substrate p-n junction is reverse
biased, and so no current should be
between them.
 CMOS
CMOS
• CMOS is a symmetric device. There is really no
way to tell the source from the drain. By
convention, we call the element which is
connected to the substrate (or moat) the
source, and the other the drain.
• If Vin is high (at or near Vdd) the NMOS
transistor will be turned on. The voltage
between the gate and substrate of the p-
channel device is at or near zero. The gate is at
Vdd and so is the moat! Hence the upper
transistor will be turned off. The output will
thus be low.
• If the input voltage is low (or zero) then the n-
channel device is turned off. The voltage
between the gate and substrate of the p-
channel device is now −Vdd. Therefore Vo will
connect to Vdd due to NMOS being an open
circuit.
 OPERATING CONDITIONS CMOS
A= Vin
CASE 1: When A is high or = VDD
For PMOS terminal
V(source-gate) = VDD-VDD =0
Therefore 0<VT so PMOS is cut off.

For NMOS terminal

V(gate-source) = VDD-0 = VDD
It is given that VDD > VT therefore NMOS
conducts.
From output to ground.

Output is low
 OPERATING CONDITIONS CMOS
OPERATION CONDITIONS CMOS
A= Vin
CASE 2: When A is low or = 0
For PMOS terminal
V(source-gate ) = VDD-0 = VDD
It is given that VDD > VT therefore PMOS
conducts.

For NMOS terminal

V(gate-source) = 0-ground= 0-0 =0
Therefore 0<VT so NMOS is cut off.

Output is High
 CONCLUSION
• NMOS
• PMOS
• CMOS
• Operating Conditions of CMOS