The Devices:

Diode

[Adapted from Rabaey’s Digital Integrated Circuits, ©2002, J. Rabaey et al.]

EE415 VLSI Design
 Goal of this chapter
•Present intuitive understanding of device operation
•Introduction of basic device equations
•Introduction of models for manual analysis
•Introduction of models for SPICE simulation
•Analysis of secondary deep-sub-micron effects
•Future trends

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 Outline
 Motivation and Goals
 Semiconductor Basics
 Diode Structure
 Operation
» Static model
– Depletion capacitance
– Carrier density profiles
 Diffusion capacitance
» Dynamic response 
– Switching speed  next session
 Spice model 
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 Semiconductor Basics  I
 Electrons in intrinsic (pure) Silicon

» covalently bonded to atoms

» “juggled” between neighbors
» thermally activated: density  eT
» move around the lattice, if free
» leave a positively charged `hole’ behind

EE415 VLSI Design http://www.masstech.org/cleanenergy/solar_info/images/crystal.gif

 Semiconductor Basics  II
 Two types of intrinsic carriers
» Electrons (ni) and holes (pi)
» In an intrinsic (no doping) material, ni=pi
» At 300K, ni=pi is low (1010cm-3)
» Use doping to improve conductivity

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 Semiconductor Basics  III
 Extrinsic carriers
» Also two types of dopants (donors or acceptors)
– Donors bring electron (n-type) and become ive ions
– Acceptors bring holes (p-type) and become ive ions
» Substantially higher densities (1015cm-3)
» Majority and minority carriers
– if n>>p (n-type) electrons majority and holes minority
– Random recombination and thermal generation

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 The Diode

B Al A
SiO 2

Cross section of pn-junction in an IC process

N-type region P-type region

doped with donor doped with
impurities acceptor
(phosphorus, impurities (boron)
arsenic)
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 The Diode
Simplified structure

A Al
p A

B B
The pn One-dimensional
region is representation diode symbol
assumed to
be thin (step Different concentrations of
or abrupt electrons (and holes) of the p and
junction) n-type regions cause a concentration
gradient at the boundary
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 Depletion Region
•Concentration Gradient causes electrons to diffuse from n to p,
and holes to diffuse from p to n
•This produces immobile ions in the vicinity of the boundary
•Region at the junction with the charged ions is called the
depletion region or space-charge region
•Charges create electric field that attracts the minority carriers,
causing them to drift
•Drift counteracts diffusion causing equilibrium ( Idrift = -Idiffusion )
hole diffusion
electron diffusion

p n

hole drift
electron drift

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 Depletion Region
hole diffusion
electron diffusion
•Zero bias conditions (a) Current flow.
p n
•p more heavily doped hole drift
than n (NA > NB) electron drift
Charge 
Density
•Electric field gives rise + x (b) Charge density.
Distance
to potential difference in -

the junction, known as

the built-in potential Electrical
Field

x
(c) Electric field.

V
Potential
 (d) Electrostatic
x potential.
-W 1 W2

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 Built-in Potential
 N AND 
 0   T ln  
n
2
 i 
Where T is the thermal voltage
kT
T   26mV (at 300 K )
q
ni is the intrinsic carrier concentration for
pure Si (1.5 X 1010 cm-3 at 300K), so for
 1   1 
N A  1015  3 , N B  1016  3 ,
 cm   cm 
 10151016 
 0  26 ln  2
mV  638mV

 1.5 *1010  
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 Forward Bias
hole diffusion
electron diffusion

p n

hole drift
electron drift

+ -

•Applied potential lowers the potential barrier, Idiffusion > I drift

•Mobile carriers drift through the dep. region into neutral regions
•become excess minority carriers and diffuse towards terminals
•Read about drift and diffusion currents at:
•http://ece-www.colorado.edu/~bart/book/book/chapter2/ch2_10.htm

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 Forward Bias
minority carrier concentration

Metal contact to n-region

Metal contact to p-region

pn (W2)
pn (x)

n p (x) pn0
Lp

np0

-Wp -W1 0 W2 Wn x
p-region n-region

diffusion

Typically avoided in Digital ICs

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 Reverse Bias
hole diffusion
electron diffusion

p n

hole drift
electron drift

- +

•Applied potential increases the potential barrier

•Diffusion current is reduced
•Diode works in the reverse bias with a very small drift current

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 Reverse Bias

Metal contact to n-region

Metal contact to p-region

pn0

np0
n p0

-Wp -W1 0 W2 Wn x

p-region n-region

diffusion

The Dominant Operation Mode

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 Models for Manual Analysis

ID = IS(eV D/T – 1) ID
+ +
+
VD VD VDon
–
– –

(a) Ideal diode model (b) First-order diode model

•Accurate •Conducting diode replaced
by voltage source VDon=0.7V
•Strongly non-linear
•Good for first order
•Prevents fast DC bias approximation
calculations
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 Typical Diode Parameters
Geometry, doping and material
constants lumped in Is
Diffusion coefficient
minority carrier concentration
+

VD
ID = IS(eV D/T – 1)
–
•Dn=25 cm2/sec D p D n
I S  qAD ( WnpWn 02  W pn Wp 01 )
•Dp=10cm2/sec
typical value
•Wn=5 m
I S  10 17 A / m 2
•Wp=0.7 m
•W2=0.15 m

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•W1=0.03 m
 Diode Current

VDon  0.7V
VDon  0.7V

Ideal diode equation:

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 Depletion Capacitance

 Due to depletion charges

» VD changes space charge
» Forms a capacitor Cj
– Charge modulated by voltage
 Ideality factor (m) depends on
junction gradient
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 Equivalent Capacitances  I
 Linearize diode capacitances
» Cj is a non-linear function of VD
– When bias changes then Cj also changes
– Hard to use in manual analyses
» Instead use equivalent capacitance
– Gives the same total charge for a given VD transition
» Equivalent depletion capacitance
– Must be worked out for a given V1V2 transition

Q j Q j (V2 )  Q j (V1 )
Ceq    K eqC j 0
VD V2  V1
 0m  (0  V2 )1m  (0  V1 )1m 
K eq 
(V2  V1 )(1  m)
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 Equivalent Capacitances  II
» Equivalent diffusion capacitance
– Must be worked out for currents at given V1V2 transition
Q j I D (V2 )  I D (V1 ) Cd (V2 )  Cd (V1 )
Ceq   T  T
VD V2  V1 V2  V1

 Ceq depends on process constants and {V1,V2}

» Example:
– for AD=0.5 m2 Cj0=2 fF/m2, 0=0.64 V and m=0.5
 then Keq0.622 and Ceq1.24 fF/m2 if switched between 0 and -2.5 V
 So unit capacitance Cj 0.9 fF/m2 or Cj 0.45 fF for the total diode area

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 Secondary Effects: Breakdown
 Cannot bear too large reverse biases
» Drift field in depletion region will get extremely large
» Minority carriers caught in this large field will get very energetic
– Energetic carriers can knock atoms and create a new n-p pair
– These carriers will get energetic, too, and so on: thus large currents!
0.1
 Two types
» Avalanche breakdown
– Above mechanism
» Zener breakdown
ID (A)

0 – More complicated
 Can damage diode

–0.1
–25.0 –15.0 –5.0 0 5.0
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VD (V)
 Diode SPICE Model
 Required for circuit simulations
» Must capture important characteristics but also remain efficient
» Extra parameter in the model: n (emission coefficient, 1 n 2)
– Fixes non-ideal behavior due to broken assumptions
 Additional series resistance accounts for body+contact
 Nonlinear capacitance includes both CD and Cj

I D  I S (eVD /nT 1)

RS

VD ID CD

-
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 SPICE Parameters
 Often supplied by the fab to the designer
» If not must be measured and fit the parameters
 Assumes default values, if not explicitly defined
 Pay attention to the units and spelling

EE415 VLSI Design