What Is Transistor ?: Property and Istor Mean Resistance Property Offered To The Junctions

What is Transistor ?
• Semiconductor device
• Transfers a weak signal from low resistance
circuit to high resistance circuit.
• Trans+ istor= Transistor
• The words trans mean transfer
property and istor mean resistance property
offered to the junctions.
• In other words, it is a switching device which
regulates and amplify the electrical signal likes
voltage or current.
AEL/APAHIR/PREREQUISTE 1
What is Transistor ?
• The transistor consists two PN diode connected
back to back.
• It has three terminals namely emitter, base and
collector.
• The base is the middle section which is made up
of thin layers.
• The right part of the diode is called emitter diode
and the left part is called collector-base diode.
These names are given as per the common
terminal of the transistor..
Types of Transistor
• NPN
• 2 n- and 1 p-type layers of material
Types of Transistor
• PNP
• 2 p- and 1 n-type layers of material
What is an amplifier?
• Amplifier raises the level of a weak signal.
• No change in the wave shape.

• No change in the frequency of the input signal
Need
• The signal is generally the o/p of a

transducer like microphone, thermo couple
• It is very weak.
.
• It must be amplified before feeding to the
loud speaker etc.
Different Configurations of Transistor
•
Common Base Configuration
•
Common Emitter Configuration
•
Common Collector Configuration
Common Base Configuration
Common Collector Configuration
Common Emitter Configuration
In how many regions a transistor can be operated?
1. Cut off region
2. Active region
3. Saturation region
Different operating regions of Transistor
Cut off region

Emitter junction & Collector junction are in
Reverse Biased
Active region
Emitter junction Forward Biased & Collector
junction Reverse Biased
Saturation region
Emitter junction & Collector Junction are in
Forward Biased
CIRCUIT OF C.E.AMPLIFIER
Working of C.E.Amplifier
• Base emitter junction is forward biased by VBB.
• Collector base junction is reverse biased by VCC.

•
During positive half cycle of signal forward bias is
increased.
• Hence base current IBis increased.
•
So Ic increases and ICRCdrop increases.
•
The output VCE decreases
as VCE= VCC-
•
ICRC
There is a phase shift of 180º betweenAEL/APAHIR/PREREQUISTE

input and output. 14
Output
Signal
Input Signal
Wave Forms of Input and Output Signals
Why C.E.Configuration Is Commonly Used?
• Its input and output impedances are suitable in many

applications.
• It offers current gain,voltage gain,power gain.
Concept of DC Load Line
The operating conditions of a transistor are determined by
• VCE collector to emitter voltage
• IC collector current
The value of IC for a given VCE can be known
• From output characteristics of a transistor.
• From D.C.Load Line .
Which one is convenient ?
•
D.C. Load Line
What is a D.C.Load Line ?
It is a graph drawn between collector current

IC and collector to emitter voltage VCE for a
given VCC and RC.
Why D.C.Load Line ?
The resistance Rc connected to the device is

called load or load resistance for the circuit
and line constructed using this load hence the
name load line.
To draw the d.c.Load Line of a transistor
• VCE is taken on X-axis
• IC is taken on Y-axis
How we can draw the D.C.Load Line?
• Only two points cut-off point and

saturation point are required.
• Line joining these two points is known

as load line.
CE Configuration
R1
VCC
Rc
IC
VCE
R2
RE
o/p equation VCC= VCE + ICRC

4
Determination of cut-off point
The output equation of a transistor in C.E.mode is
VCC= VCE + ICRC

When transistor is cut-off
IC = 0
So
VCC = VCE
Hence cut-off point = (VCC, 0)
Determination of Saturation point:
In Saturation VCE of a transistor is zero.
Hence
VCC = I C RC
Ic = VCC / RC
Hence Saturation point = (0,VCC / RC)
DC LOAD LINE
Saturation point
A (0,VCC/RC)
Ac
IC
ti
ve
R eg
ion
Cut off point
(VCC,0)
VCE B
• D.C.Load line represents all possible
DC operating points of a transistor for
a specified values of Vcc & Rc
• The lower end of the D.C.Load Line is

called cut-off point.
• The upper end of DC Load Line is

saturation point
• The entire region between these two
points indicates active region
AEI302.18
Need for biasing
For normal operation of a transistor amplifier circuit,
the transistor must be biased so that it operates in the
active region (linear) of it’scharacteristics. That means
• Forward bias on the emitter-base junction
• Reverse bias on the collector-base junction
For achieving faithful amplification the following
conditions should be satisfied
1. Proper Zero signal collector current IC.
2. Proper Base-Emitter voltage VBEat any instant .
3. Proper Collector-Emitter voltage VCE at any instant.
What is meant by Zero signal
collector current?
•
The current following through a transistor in the absence
of A.C signal is known as Zero signal collector current
IC.
Condition 1
Zero signal collector current IC should be

equal to the maximum collector current due
to signal alone.
For Example:
• An input signal causes a peak collector current of 1mA;
Then Zero signal collector current can be either 1mA or

more than 1mA.
I C > Maximum current due to A.C.Signal
1.5mA
1 mA
-0.5mA
0mA
Here IC= 1mA

• The maximum collector current due to signal is 0.5mA.
• So the total collector current varies between 1.5mA
to 0.5mA.
When I = Maximum current due to
C
A.C.Signal
2m
A
1m
A
0m
A
Here IC=
1mA
Maximum current due to A.C.Signal is 1mA.So total
current varies between 2 mA and0 mA
AEI302.20
When I < Maximum current due to A.C.Signal
C
1.5m
A
0.5m
A0.
m
-0.5m
A
IC= 0.5mA
Maximum current due to A.C.Signal is 1mA
Collector current ICbecomes –ve during some part of input
signal.
• It means output waveform is clipped during that part.
• Hence there is distortion in output.
We can conclude that:
• For faithful amplification
Zero signal collector current IC maximum collector current
due to signal alone
Condition - 2
Minimum proper Base -Emitter voltage .
• The Base – Emitter voltage VEBshould not fall below
• 0.3v for Germanium transistors.
• 0.7v for Silicon transistors.
• If VBE falls below these values during any part of the signal,
that part will be amplified to a smaller extent and

faithful amplification is not possible.
The conditions 1 & 2
ensures
• Emitter-Base junction remains properly forward biased during

all parts of input signal.
Condition - 3
Minimum proper Collector-Emitter voltage should not

fall below knee voltage.
• 0.5v for Germanium Transistors.
• 1.0v for Silicon Transistors.
• If VCE is less than knee voltage
• Collector Base junction is not properly reverse biased.
• Amplification is not uniform.
• Causes distortion in o/p waveform.
The condition 3 ensures
• The Collector-Base junction remains properly reverse biased

during all parts of input signal.
The proper flow of zero signal collector
current and maintenance of proper collector -
emitter voltage during the passage of signal is
called Transistor Biasing
A Transistor can be biased
• With the help of a battery.
• Associating a circuit with the Transistor.
The second method is more efficient:
• The circuit used for Transistor biasing is called
BIASING CIRCUIT.
• Transistor Biasing is very essential for proper operation
of a Transistor.
OPERATINGPOINT
•
It is a point on the DC load line which specifies collector
current IC and collector emitter voltage VCE that exist when
no signal is applied.
• The operating point is also known as “Quiescent

point” or “Q” point.
OPERATING POINT
• When an input signal is applied, base current varies
according to the input signal
• This causes collector current ICand out put voltage VCEto vary
• For faithful amplification selection of operating point is very

important.
A transistor should be biased to operate within the
maximum limits of the following.
• Maximum Collector Current ICmax
• Maximum Collector voltage VCmax
• Maximum Collector dissipation PCmax)
• Maximum Emitter –Base voltage VBEm( ax)
67
AEL/APAHIR/PREREQUISTE
DC Load
IC Line
Q Output
characteristic
2 Q s
Q
DC Load line is drawn on Voutput

CE
1
characteristics Fig
As shown in fig.1 operating point is the
intersection of D.C load line on O/P
characteristics of a transistor. There are
several operating points.
How the operating point is selected?
•If operating point is selected at Q1 near the cut off
region,
output current Ic, and voltage VCE clipped at the
negative peaks for a sinusoidal varying input

signal.
• If operating point is selected Q2, near the saturation
region, the output signal would be clipped at the

positive peaks for a sinusoidally varying input
How the operating point is selected
• Generally operating point is selected at the centre
of DC load line.
• Selecting the operating point on the centre of D.C.

Load Line is not a rule
• For large signal amplifiers “Q” point centre of DC

load line.
• For small signal amplifiers “Q” point can be taken

anywhere on DC load line depending upon the
circuit conditions.
Factors affecting the operating point
 Temperature
As temperature increases, the values of ICBO, β,

VBE gets affected.
ICBO gets doubled (for every 10o rise)
VBE decreases by 2.5mv (for every 1o rise)
5
STABILIZATION
Stabilization is nothing but keeping the\ Q- point

(operating point)stable irrespective of the variation in
temperature, β of the transistor and vbe
AEI302.22
•In a transistor amplifier fixing suitable operating
point is not sufficient.
•The operating point should remain stable.
Stabilization of operating point is essential
because, it may change due to
• Instability of Collector current IC.

 With temperature /ICBOor ICO
• Variation of VBE
• Change of β with transistor replacement.
Instability of IC
In a CE amplifier
IC = β IB + (1+β) * ICBO.
The reverse saturation current ICBO doubles for every 10 °C
rise in temperature.
Variation of VBE with temperature /change of
transistor.
Base-Emitter voltage VBE decreases at a rate of 2.5 mv

per°C.
Change of β factor
• The value of β is not same for any two transistors

even of same type.
• For Ex : BC147 is a Silicon transistor with β varying

from 100 to 600.
All the above factors can cause the bias point to shift
from the values originally fixed.
THERMAL RUNAWAY
• The collector current ICincreases with increase in temperature.
• This increases power dissipation and further

increases the temperature, and it will increase
and hence finally ic.
icb
o
• Being a cumulative process it can result in burn –out of

transistor.
AEI302.22
THERMAL RUNAWAY
• The self destruction of an un-stabilized transistor is

called as thermal runaway
Means of achieving stability for operating point
• Stabilization techniques.
• Compensation techniques.
STABILIZATION TECHNIQUES
• Use a resistive biasing circuit.
• It permits variation of base current IBto maintain

collector current Ic constant.
• ICis made constant against variations in ICBO,VBEand β
Transistor Biasing Techniques
 Base Resistor method

 Collector to Base bias
 Biasing with Collector feedback resistor
 Voltage-divider bias
7
Base resistor method
8
Collector to base
9
Biasing with Collector feedback resistor
0
Potential divider/Voltage divider
1
Which is more suitable
 Potential divider
2

What Is Transistor ?: Property and Istor Mean Resistance Property Offered To The Junctions

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What Is Transistor ?: Property and Istor Mean Resistance Property Offered To The Junctions

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What is Transistor ?

• Amplifier raises the level of a weak signal.

• No change in the wave shape.

• The signal is generally the o/p of a

1. Cut off region

Cut off region

• Base emitter junction is forward biased by VBB.

• Collector base junction is reverse biased by VCC.

There is a phase shift of 180º betweenAEL/APAHIR/PREREQUISTE

Wave Forms of Input and Output Signals

• Its input and output impedances are suitable in many

• It offers current gain,voltage gain,power gain.

• VCE collector to emitter voltage

• From output characteristics of a transistor.

• From D.C.Load Line .

It is a graph drawn between collector current

The resistance Rc connected to the device is

• VCE is taken on X-axis

• Only two points cut-off point and

• Line joining these two points is known

o/p equation VCC= VCE + ICRC

The output equation of a transistor in C.E.mode is

VCC= VCE + ICRC

In Saturation VCE of a transistor is zero.

Hence Saturation point = (0,VCC / RC)

• The lower end of the D.C.Load Line is

• The upper end of DC Load Line is

• Reverse bias on the collector-base junction

conditions should be satisfied

1. Proper Zero signal collector current IC.

2. Proper Base-Emitter voltage VBEat any instant .

3. Proper Collector-Emitter voltage VCE at any instant.

Zero signal collector current IC should be

• An input signal causes a peak collector current of 1mA;

Then Zero signal collector current can be either 1mA or

Here IC= 1mA

• The Base – Emitter voltage VEBshould not fall below

• 0.3v for Germanium transistors.

• 0.7v for Silicon transistors.

that part will be amplified to a smaller extent and

• Emitter-Base junction remains properly forward biased during

Minimum proper Collector-Emitter voltage should not

• 0.5v for Germanium Transistors.

• 1.0v for Silicon Transistors.

• Collector Base junction is not properly reverse biased.

• Amplification is not uniform.

• Causes distortion in o/p waveform.

• The Collector-Base junction remains properly reverse biased

• With the help of a battery.

• Associating a circuit with the Transistor.

• The circuit used for Transistor biasing is called

• The operating point is also known as “Quiescent

• For faithful amplification selection of operating point is very

• Maximum Collector Current ICmax

• Maximum Collector voltage VCmax

• Maximum Collector dissipation PCmax)

• Maximum Emitter –Base voltage VBEm( ax)

DC Load line is drawn on Voutput

output current Ic, and voltage VCE clipped at the

negative peaks for a sinusoidal varying input

• If operating point is selected Q2, near the saturation

region, the output signal would be clipped at the

• Selecting the operating point on the centre of D.C.