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CHAPTER NO. 02
2
Block diagram of a basic DC power supply with a load.
3
HALF-WAVE RECTIFIER (HWR)
4
Block diagram of a Half Wave Rectifier
5
Half-Wave Rectifier operation. The diode is considered to be
ideal
6
Average value of the Half-Wave Rectified signal.
7
Calculation of Average value for a Half-Wave
Rectifier
1 T
VDC
T 0 V dt
1 π 2
Vp sin θ dθ 0 dθ
2π 0
VP π
cos θ
2π 0
VP
π
8
Example # 2.1
9
Solution:
10
Calculation of RMS value for a Half-Wave
Rectifier
2 1 T 2
Vrms
T 0
V dt
1 π 2 2
V sin 2
θ dθ 0 dθ
2π 0
p
2 2
VP π VP 1
2
sin θ dθ
1 cos 2θ dθ
2π 0 2π 0
2
2
VP 1 π
θ sin 2θ
4π 2 0
2
VP
4
11
DC & RMS Level on Waveform of a HWR
VO
Vp
Vrms
VDC
t0 t1 t2 t3 t
12
The effect of the barrier potential on the half-wave rectified
output voltage is to reduce the peak value of the input by
about 0.7 V.
13
Output Waveform of a Half-Wave Rectifier
Vi(t)
Vp
VD
t
0 2
-VP
Vo(t)
Vp - VD
t
0 2
14
Example # 2.2
15
Solution:
16
The PIV occurs at the peak of each half-cycle of the input
voltage when the diode is reverse-biased. In this circuit, the
PIV occurs at the peak of each negative half-cycle.
17
Half-Wave Rectifier with transformer-coupled input
voltage.
18
Example # 2.3
19
Solution:
20
FULL-WAVE RECTIFIER
(FWR)
21
Block Diagram of a Full Wave Rectifier
22
Output Waveform of a Full Wave Rectifier
Vi(t)
Vp
t
0 2
-VP
Vo(t)
Vp - VD
t
0 2
1 π
π 0
Vp sin θ dθ
VP π
cos θ
π 0
2 VP
π
24
Example # 2.4
25
Solution:
26
Calculation of RMS value for a Full -Wave
Rectifier
2 1 T 2
Vrms
T 0
V dt
1 π 2
2
Vp sin θ dθ
π 0
2
VP 1
1 cos 2θ dθ
π 0
2
2
VP 1 π
θ sin 2θ
2π 2 0
2
VP
2
27
Types of Full-Wave Rectifier
28
CENTER-TAPPED FULL-WAVE RECTIFIER
29
Circuit Diagram of a Center-Tapped Full-Wave
Rectifier
30
Basic operation of a Center-Tapped Full-Wave Rectifier. Note that the
current through the load resistor is in the same direction during the entire
input cycle, so the output voltage always has the same polarity.
31
Center-tapped full-wave rectifier with a transformer turns ratio of
1.
Vp(pri) is the peak value of the primary voltage.
32
Center-tapped full-wave rectifier with a transformer turns
ratio of 2.
33
PIV of a Center Tapped Full Wave Rectifier
34
Calculation of PIV for a Center Tapped Full Wave
Rectifier
35
Example # 2.5
36
Solution:
37
BRIDGE FULL -WAVE RECTIFIER
38
Circuit Diagram of a Bridge Full-Wave Rectifier
39
Basic Operation of a Bridge Full Wave Rectifier
43
Example # 2.6
44
Solution:
45
POWER SUPPLY FILTERS
46
Basic Principle of Power Supply Filter
A power supply filter ideally eliminates the fluctuations in the output voltage
of a half wave or full wave rectifier and produces a constant level dc voltage
47
Capacitor Input Filter/ Pi(π) Filter
A Half Wave rectifier with a capacitor–input filter is shown in figure
to ground.
Dr. RS 48
Operation of a half-wave rectifier with a capacitor-input filter. The current
indicates charging or discharging of the capacitor.
Dr. RS 50
Comparison of ripple voltages for half-wave and full-wave
rectified voltages with the same filter capacitor and load and
derived from the same sinusoidal input voltage.
How
Note: The lower the ripple factor , the better the filter.
Dr. RS 53
Effects of C and RL on Ripple factor
The ripple factor can be lowered by increasing the value of
the filter capacitor or increasing the load resistance
R=1500Ω
C=1000µF C=470µF
R=1000Ω
C=100µF R=500Ω
a) Effect on C b) Effect on RL
Vr( pp ) 1
rfwr
VDC 4 3 fRL C
57
Solution:
58
DIODE CLIPPING & CLAMPLING CIRCUITS
59
Diode Clipper/Limiter
DEFINITION:
“Diode circuits which
are used to clip off portion of signal
voltages above or below at a certain levels are called
clippers/limiters “
60
Limiting of Positive Alternation
From fig (a), a diode circuit clips off the positive part of the input signal.
As the input signal goes positive, the diodes becomes forward biased.
Thus point A is clipped at 0.7v when the input exceeds this value.
when the input goes below 0.7v, the diode reverse biases and appears
as an open. The output voltage looks like the negative part of the input.
61
Limiting of Negative Alternation
From fig (b), the negative part of the input is clipped off. when the diode is
forward biased the negative part of the input point A is held at -0.7v by
the diode drop.
when the input goes above -0.7v, the diode is no longer forward biased
and a voltage appears across RL proportional to the input.
62
Example # 2.10
63
Solution
64
Biased Limiters
DEFINITION:
“The level to which an AC voltage is limited cab be adjusted
by adding a bias voltage VBias ,in series with a diode“
65
Biasing of Positive Limiter
To limit a voltage to a specified positive level, the diode and the
biased voltage must be connected as shown in a figure (a).
66
Biasing of Negative Limiter
To limit a voltage to a specified negative level, the diode and the
biased voltage must be connected as shown in a figure (b).
67
Modification of Positive Limiter
By turning the diode around, the positive limiter can be modified to limit the output voltage
to the portion of the input voltage waveform above (V BIAS - 0.7v) as shown in figure
below.
68
Modification of Negative Limiter
The negative limiter can be modified to limit the output voltage to the
portion of the input waveform below (-VBIAS + 0.7v) as shown in
figure below.
69
Example # 2.11
70
Solution
71
Replacement of VBias With Voltage Divider
Bias
The bias voltage sources that have been used to illustrate the basic operation of a diode
limiters can be replaced by a resistive voltage divider that drives the desired bias voltage
from the dc supply voltage. The bias voltage is set by the resistor values according to the
voltage divider formula;
72
Diode Limiters Implemented With Voltage
Divider Bias
The circuits for positively biased, Negatively biased and a variable biased limiters can be shown as;
73
Example # 2.12
74
Solution
75
Diode Clamping
DEFINITION:
“ The process of adding a dc level to an ac signal is
called diode clamping”. Clampers are some time known as
DC Restorers.”
76
Positive Level Clamping Operation
To understand the operation of positive level clamping, Consider first
negative half cycle of the input voltage. When the input goes
negative, the diode is forward biased allowing the capacitor to
charge near the peak of the input (Vp(in) - 0.7v) as shown in fig (a).
77
Positive Level Clamping Operation
The capacitor can discharge only through the high resistance of
RL.Thus from the peak of one negative half cycle to the next , the
capacitor discharges very little.The net effect of the clamping action
is that the capacitor retains a charge approx. equal to the peak
value of the input less the diode drop.i.e; (Vp(in) - 0.7v).
78
Negative Level Clamping Operation
If the diode is turned around,a negative dc voltage is added to the input signal. This would result in negative
level clamping operation as shown in figure below.
79
Example # 2.13
80
Solution
81