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  • Lecture12 SRAM

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    Ismat Jahan
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    This document discusses testing static random access memory (SRAM). It provides schematics of an SRAM cell and describes test sequences for writing 1s and 0s to the cell by activating the wordline for a short duration and checking the saved data. It also describes similar read test sequences that activate the wordline briefly to read the data at the bit and bitbar lines and check it matches what was written.

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    This document discusses testing static random access memory (SRAM). It provides schematics of an SRAM cell and describes test sequences for writing 1s and 0s to the cell by activating the wordline for a short duration and checking the saved data. It also describes similar read test sequences that activate the wordline briefly to read the data at the bit and bitbar lines and check it matches what was written.

    Copyright:

    © All Rights Reserved
    Download as PPTX, PDF, TXT or read online from Scribd
    Flag for inappropriate content
    10 views10 pages

    Lecture12 SRAM

    Uploaded by

    Ismat Jahan
    This document discusses testing static random access memory (SRAM). It provides schematics of an SRAM cell and describes test sequences for writing 1s and 0s to the cell by activating the wordline for a short duration and checking the saved data. It also describes similar read test sequences that activate the wordline briefly to read the data at the bit and bitbar lines and check it matches what was written.

    Copyright:

    © All Rights Reserved
    Download as PPTX, PDF, TXT or read online from Scribd
    Flag for inappropriate content
    of 10

    Lecture 12

    August 31, 2021


    SRAM

    1
    0 1 2
    1
    1 0 y
    x
    2

    0
    1
    Schematic
    y
    x

    1
    2
    Write test
    Write
    • Sequence
    • Make bit 1 or 0 + Make
    bitbar 0 or 1
    • Make wordline 1
    • Keep wordline 1 for a
    short duration
    • Make wordline 0
    • Check saved data

    Probe inside symbol?


    Read
    Read 1
    • Sequence
    • Make x 1 permanently
    • Make wordline 1
    • Keep wordline 1 for a short duration
    • Make wordline 0
    • Check test data at bit and bitbar
    Read 0
    • Sequence
    • Make x 0 permanently
    • Make wordline 1
    • Keep wordline 1 for a short duration
    • Make wordline 0
    • Check test data at bit and bitbar
    VDD

    wordline

    bitline bit

    VSS
    VDD
    wordline

    bitbar bit

    VSS

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