The Digital Logic Level

Computer Organization

Lecture #6
Jahan Zeb
Gates and Boolean Algebra

 The symbols and functional behavior for the five basic gates.
 Boolean function of n variable is completely described by
table with 2n rows, known as truth table
Lecture # 6, DIGITAL LOGIC LEVEL 2
 Majority Function
(a) Truth table for
majority function of
three variables.
(a) A circuit for (a).
 M=ABC+ABC+ABC
+ABC

Lecture # 6, DIGITAL LOGIC LEVEL 3

 Circuit Equivalence

 Construction of (a) NOT, (b) AND, and (c) OR gates

using only NAND gates or only NOR gates.
Lecture # 6, DIGITAL LOGIC LEVEL 4
 Circuit Equivalence (Cont…)
 To reduce complexity
designers try to reduce no.
of gates
 Circuit computing same
function as original with
fewer gates is preferred
 Boolean algebra can be
valuable
 Using Distributive law:
AB + AC = A (B+C)
Lecture # 6, DIGITAL LOGIC LEVEL 5
 Boolean Algebra Main Identities
 To Circuit designers start
with a Boolean function
and then apply the laws
of Boolean algebra to it
 In an attempt to find a
simpler but equivalent
one
 From the final function,
circuit can be constructed

Lecture # 6, DIGITAL LOGIC LEVEL 6

Alternate Symbols for NAND, NOR, AND, OR

 De Morgan’s law suggests an alternative notation, (a) an OR gate is

equivalent to the NAND gate with inverted inputs
 (b) NOR gate can be drawn with an AND gate with inverted inputs
 By negating both forms we arrive at (c) and (d) respectively

Lecture # 6, DIGITAL LOGIC LEVEL 7

 XOR, Conversion to NAND Gate
Only
 (a) The truth table for the
XOR function
 (b-d) Three circuits for
computing it

Lecture # 6, DIGITAL LOGIC LEVEL 8

Circuit Equivalence (Cont…)

 Same physical gate can compute different functions,

depending on the convention used
(a) Electrical characteristics of a device.
(b) Positive logic, AND function
(c) Negative logic, OR function
Lecture # 6, DIGITAL LOGIC LEVEL 9
Integrated Circuits

An SSI chip containing four gates

Lecture # 6, DIGITAL LOGIC LEVEL 10

Multiplexers
 An eight-input
multiplexer circuit

Lecture # 6, DIGITAL LOGIC LEVEL 11

Multiplexers

(a) An MSI multiplexer.

(b) The same multiplexer wired to compute the majority
function.
Lecture # 6, DIGITAL LOGIC LEVEL 12
Decoders
 A 3-to-8 decoder
circuit

Lecture # 6, DIGITAL LOGIC LEVEL 13

Comparators
 A simple 4-bit
comparator
.

Lecture # 6, DIGITAL LOGIC LEVEL 14

 Programmable Logic Arrays
 A 12-input, 6-output
programmable logic
array

The little squares

represent fuses that
can be burned out
.
.

Lecture # 6, DIGITAL LOGIC LEVEL 15

Shifters

A 1-bit left/right shifter

Lecture # 6, DIGITAL LOGIC LEVEL 16

Half Adder

(a) A truth table for 1-bit addition

(b) A circuit for a half adder

Lecture # 6, DIGITAL LOGIC LEVEL 17

Full Adder

(a) Truth table for a full adder

(b) Circuit for a full adder
Lecture # 6, DIGITAL LOGIC LEVEL 18
Arithmetic Logic Units
 A 1-bit ALU

Lecture # 6, DIGITAL LOGIC LEVEL 19

 Arithmetic Logic Units

 Eight 1-bit ALU slices connected to make an 8-bit ALU

 The enables and invert signals are not shown for simplicity

Lecture # 6, DIGITAL LOGIC LEVEL 20

 Clocks

(a) A clock
(b) The timing diagram for the clock
(c) Generation of an asymmetric clock

Lecture # 6, DIGITAL LOGIC LEVEL 21