ANGELES UNIVERSITY FOUNDATION

Mc Arthur Hi-Way, Angeles City

COLLEGE OF COMPUTER STUDIES

PRELIMINARY EXAMINATION
LD310: Logic Design and Switching Theory
NAME: ________________________________

DATE: ___________________________

COURSE & SEC: __________________________

INSTRUCTOR: ____________________

GENERAL INSTRUCTIONS:

Write your name, section, date and instructor on the questionnaire and answer sheet
Any form of erasures will be considered wrong.
Use black- or blue-inked pen only

PART I. Completion. Complete the given statement. Write your answers on the answer sheet provided. (1 pt each)
1. Binary means two. Binary numbers has a base of __. The digits used in a binary number system are 0 and 1.
2. A _______ is a group of devices that store digital data.
3. The abbreviation K indicates units of approximately 1,000 or precisely ______.
4. 4K means ______ bytes.
5. 64K means _____ bytes.
6. The hexadecimal number system is widely used in analyzing and programming microprocessors. The hexadecimal digits are 0 to 9, A
to ____.
7. A typical microcomputer may have 65,536 register in its memory. Each of this registers, usually called a memory location, stores 1
byte. Expressing it in K unit is _____.
8. The data on a register with 1111 0010 1110 1110 1110 0101 registered value (24 bits) has ______ bytes of data.
9. A(n) _______ is a logic circuit with one or more input signal but only one output signal.
10. A(n) _______ is a logic circuit with 2 or more input signal but only one output signal, one or more high input produces high output.
11. A(n) _______ is a logic circuit whose output is high only if all the inputs are high.
12. A(n) _______ is a gate with only one input and 1 output. The output is always the compliment of the input. Also known as NOT gate.
13. A(n) _______ is a table that shows all the input and output possibilities for a logic circuit. The input word are listed in binary
progression.
14. A(n) _______ is a gate that has high output when the input word has odd parity.
15. A(n) _______ is a gate that has high output when the input word has even parity.
PART II. Completion. Complete the given table. Write your answers on the answer sheet provided. (1 pt each)
TABLE A Number System
Decimal

Binary

Octal

Hexadecimal

1100

(1)

(2)

(3)

(4)

(5)

2547

(6)

(7)

(8)

(9)

BAD

(10)

1101 0110

(11)

(12)

TABLE B Standard TTL

Device Number

Description

(13)

Quad 2-input NOR gate

(14)

Quad 2-input XOR gate

(15)

Hex inverter

(16)

Quad 2-input AND gate

(17)

Quad 2-input OR gate

(18)

8-input NAND gate

(19)

Dual 4-input NAND gate

(20)

Triple 3-input AND gate

PART III. Problem Solving. Answer the given questions. Write your answer on the answer sheet provided. (1pt each)
A.

FIGURE 1 shows a 1-of-16 decoder. The signals coming out of the decoder are labeled LDA, SUB, and so on. The word formed by
the 4 leftmost register bits is called OP CODE. As an equation:

OP CODE = I15 I14 I13 I12

1.

If LDA is high, what does OP CODE equal? (Express your answer in hexadecimal)

2.
3.
4.

If ADD is high, what does it equal? (Express your answer in hexadecimal)

When OP CODE is 1001, which of the output signal is high?
Which output signal is high if OP CODE is 1111?

B. FIGURE 2 shows a NOR Gate Crossbar switch.

5. If all X and Y inputs are high, which of the Z outputs are high?
6. If all inputs are high except X2 and Y1, which Z output is high?
7. If X2 and Y0 are low and all other inputs are high , which Z output is high?
8. If you want Z4 to be high and all other outputs to be low, what values must the X and Y inputs have? (Express your answer in
Octal)
C. Suppose the NOR gates in FIGURE 2 are replaced by NAND Gate, then you will get a NAND-gate crossbar switch.
9. If all X and Y inputs are low, which Z outputs are low?
10. If all inputs are low except X2 and Y1, which Z output is low?
11. If all inputs are low except X0 and Y2, which Z output is low?
12. To get a low Z8 output, what values must the X and Y inputs have? (Express your answer in Octal)

D. FIGURE 3 shows a control

Only one of the timing signals T1
high at a time. Also, only one of
instructions, LDA to OUT, is high
Which are the high outputs for
the following conditions:
13. T6 and SUB is high
14. T5 and LDA is high
15. T2 is high
16. T6 and ADD is high

matrix.
to T6 is
the
at a time.
each of

E.

gray code
special
digital
X4X3

FIGURE 4 shows a binary-toconverter. (Gray code is a

purpose code used in analog-toconversions). The input word is
X0, and the output word is Y 4Y3
Y0. What does the output
word equal for each of these
inputs (in decimal)? (Express
your answers in decimal also)
17. X = 19
18. X = 14
19. X = 21
20. X = 28

P
PART IV. PROBLEM SOLVING. Simplify the following Boolean expressions: (4 pts each)
1.
2.
3.
4.
5.
6.

AB + BC + AB + BC
BC + B(AD + AD)
WX(Z + YZ) + X(W + WYZ)
XY + XYZ + XY
X + Y(Z + (X + Z))
((A + B) + AB)(CD + CD) + (AC)

PART V. PROBLEM SOLVING. Obtain the table of the following Boolean function by expressing its equivalen standard and canonical
form: (7 pts each)
1. F(A,B,C) = (A + B)(B + C)
2. F(x, y, z) = x + x(x + y)(y + z)
3. F(w, x, y, z) = wxy + wz + xy

Prepared by:

Evaluated by:

Approved by:

EUGENE Q. CASTRO
Instructor
DATE: 07-13-2015

DR. JAMES A. ESQUIVEL

BSCS Program Chair
DATE: ____________

DR. GILBERT M. TUMIBAY

Dean
DATE: ____________

ANGELES UNIVERSITY FOUNDATION

Mc Arthur Hi-Way, Angeles City
COLLEGE OF COMPUTER STUDIES

PRELIMINARY EXAMINATION
LD310: Logic Design and Switching Theory
NAME: ________________________________

DATE: ___________________________

COURSE & SEC: __________________________

INSTRUCTOR: ____________________

PART I.

PART II (cont)

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PART IV to PART V

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