Time Division Multiplexing

Claude Rigault
ENST
claude.rigault@enst.fr

Claude Rigault, ENST Communication networks 03 1

04/10/2004
Time division multiplexing

Claude Rigault, ENST Communication networks 03 2

04/10/2004
Time division multiplexing

Time Division multiplexing (1)

• Time Slot 1

Multiplexer De-multiplexer

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Time division multiplexing

Time Division multiplexing (2)

• Time Slot 2

Multiplexer De-multiplexer

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Time division multiplexing

Time Division multiplexing (3)

• Time Slot 3

Multiplexer De-multiplexer

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Time division multiplexing

Time Division multiplexing (4)

• Time Slot 4

Multiplexer De-multiplexer

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Time division multiplexing

Frames

• Each rotation corresponds to a frame on the multiplex

Multiplexer TS3 TS2 TS1 TS0

De-multiplexer

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Time division multiplexing

Time Division multiplexing

• Time division multiplexing is based on peak rate

• TDM is adapted to constant rate sources (like voice)
C
nt =
d max
Switching Switching
network Trunk circuits Trunk circuits network
J J

J J
J J
trunks
J J

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Time division multiplexing

Sampling an analog signal

• Time division multiplexing requires that only samples of

the signal are transmitted. If we have fs rotations /second,
the sampling frequency is fs

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Time division multiplexing

Effect of sampling
Energy

Fmax Fs-Fmax Fs 2Fs Frequency

To recover the original signal, there should be no

overlapping :
fs- fmax> fmax
or : fs> 2fmax
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Time division multiplexing

PAM modulation

Fs

Fmax

Fs > 2 Fmax

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Time division multiplexing

Voice spectrum
Energy

filter
4000

300 800 3400 Frequency (Hz)

Cut off frequency of filter is at 4000 Hz

⇒ fs = 8000 Hz

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Time division multiplexing

PAM and Time division multiplexing

• 8000 rotations / second

• Advantage of TDM : the filter is the same everywhere
• Disadvantage of PAM : analog system ⇒ noise sensitivity

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Time division multiplexing

PCM and Time division multiplexing

PCM
link

CODER DECODER
PAM PAM

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Time division multiplexing

Voice signal dynamics

• The dynamics of the voice signal is very large ⇒ quantization noise

gets very large on small signals

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Time division multiplexing

Quantization noise

• Quantization produces « Quantization noise »

• A linear measurement scale would result in a lower SNR for small
signals than for big signals

• What we want is an amplitude independent SNR

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Time division multiplexing

‘µ’ Law coding

x= v , y= c
Code
63
60
50
vmax cmax
Log(1+µx)
40

y=
Log(1+µ )
30

20
10 Volts
1,6

µ =255
0
0 0,5 1 1,5

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Time division multiplexing

‘A’ Law coding

140

120
Niveau du signal Code sur 13 bits Code sur 8 bits
100 0 à 25 mV 0 à 63 0 à 33
80
25 à 50 mV 64 à 127 34 à 49
50 à 100 mV 128 à 255 50 à 65
60
0,1 à 0,2 V 256 à 511 66 à 81
40 0,2 à 0,4 V 512 à 1023 82 à 97
20
0,4 à 0,8 V 1024 à 2047 98 à 113
0,8 à 1,6 V 2048 à 4095 114 à 128
0
0 0,5 1 1,5 2

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Time division multiplexing

Primary multiplex T1 (T1 carrier)

v0
v1 v23
Flag

signalisation IT23
IT0
IT1
(24×8)+1=193 bits par trame
193×8000 trames/s =1544 Kbit/s

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Time division multiplexing

Primary multiplex E1

IT0 IT16
IT1 IT31

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Time division multiplexing

E1 frame organization

v1 IT0 : x001 1011 ou z1zz zzzz v15 IT16 : supertrame de signalisation

v29
v2 v16 v30

IT0 IT16 IT30

IT1 IT15 IT17 IT31

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Time division multiplexing

In-band
2
16-2
16-18
15 2
15 1
500 Hz 8000 Hz
signalisation 16 0
16-15
16 17 31
16-31 30

31

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Time division multiplexing

PCM E1 : superframe

v 1-16 v 3-18 v 13-28 v 15-30

v 2-17 v 14-29

IT16-0 IT16-2 IT16-14

IT16-1 IT16-13 IT16-15

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Time division multiplexing

The HDB 3 line code

• 1 ⇒ Mark, 0 ⇒ Space
• Alternate Mark Inversion

Clock

Data 1 0 1 0 0 1 1 0

Line signal

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Time division multiplexing

The HDB 3 line code

• Coding of sequences of 4 zeros : alternate violations inversion

1 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0

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Time division multiplexing

Line Termination
circuit 1 HDB 3 Line code circuit 1

MUX LT LT DE-MUX

circuit 30 circuit 30
Galvanic insulation Repeater
Remote feeding
Line code
circuit 1 circuit 1

DE-MUX LT LT MUX

circuit 30 circuit 30

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Time division multiplexing

Asynchronous Transmission

• Slips occur after n bits

> te/2
1 0 1 1 0 1 0 0

1 0 0 1 0 1 1 0

1
te = fefr
n= =
2(te−tr)  1 1  2( fe− fr )
2 − 
 fr fe 
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Time division multiplexing

Asynchronous Transmission

• Start and Stop signals required

• Caracter Oriented Procedure (COP)

Start Te Te Te Te Te Stop

Tr Tr Tr Tr Tr

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Time division multiplexing

Synchronous Transmission

• 2 channels required : one for data, one for clock

• Bit Oriented Procedure (BOP)

SIGNAL

HORLOGE

0 1 1 1 1 0 0 0

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Time division multiplexing

Mixing clock and data

• Line codes such as the Manchester code give a mean to

recover the clock, at the expanse of bandwidth

Data
Line code

Clock

Line code

0 1 1 1 1 0 0 0
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Time division multiplexing

Asynchronous multiplexing
signal 1
clock 1 elastic store
1
f1

MUX

signal 4
fo
clock 4 elastic store
4
f4 Clock out
Control ./. 4

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Time division multiplexing

Justification
signal 1
clock 1 elastic store
1
f1
T j = nTi = 1
fo
− fi
MUX 4

signal 4
fo
clock 4 elastic store
4
f4 Clock out
Control ./. 4

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Time division multiplexing

European PDH hierarchy

1

E1 1

30 E2 1
64 kbit/s
4 E3 1
2 Mbit/s
4 E4 1
8 Mbit/s
4 E5
565 Mbit/s
34 Mbit/s
4
140 Mbit/s
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Time division multiplexing

American PDH hierarchy

• Caution ! One T3 multiplexes 7 T2 !

1

1
T1

24 1
T2
56 kbit/s
4
T3
44 Mbit/s
1,5 Mbit/s
7

6 Mbit/s

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Time division multiplexing

Point to point structure of PDH networks

64 kbit/s 64 Kbit/s
2 Mbit/s 2 Mbit/s
E1 E1

8 Mbit/s
E2 E2

2 Mbit/s 2 Mbit/s

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Time division multiplexing

SDH : Adding and Dropping

order n order n
order n order>n+1 order n
order n ADM order n
order n order n

order n
order n order n
order n order n
order n order n
order n

The condition : synchronous multiplexing

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Time division multiplexing

SDH : the STM-1 frame

9 Bytes 261 Bytes

Regenerator
Section
overhead

Payload
Pointers overhead
9 rows

Multiplexer
Section
overhead

STM-1 : Synchronous transfer module

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Time division multiplexing

Container and Virtual Container

P
C C + POH → VC
O
H

VC

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Synchronous multiplexing (high order)

• High Order Path (high order multiplex)

High order VC
pointer

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Time division multiplexing

Synchronous multiplexing (low order)

• Low Order Path (low order multiplex)
pointer

P Low order VC
O
H

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Time division multiplexing

SDH mechanisms
• C + POH → VC
• Low order VC + pointer → TU
• High order VC + pointer → AU

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SDH tributaries
Container Europe US
C11 T1 1,5 Mbit/s
C12 E1 2Mbit/s 4
C2 T2 6 Mbit/s
E3 34Mbit/s 7
C3 T3 44 Mbit/s
C4 E4 140Mbit/s

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Time division multiplexing

Multiplexing paths
STM-1 AUG AU-4 VC-4 C-4
3

TUG-3 TU-3 VC-3

3

AU-3 VC-3 C-3

7 7
1
TUG-2 TU-2 VC-2 C-2
3

TU-12 VC-12 C-
4 12
TU-11 VC-11 C-11

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