1

EXPERIMENT NO. : 1
DATE:

CHARACTERISTICS OF PN DIODE

AIM
To plot the forward and reverse VI characteristics of a PN diode and to calculate the
following parameters

1. Forward resistance
2. Reverse resistance
3. Cut in voltage

APPARATUS REQUIRED

EQUIPMENT RANGE
Power supply (0-10)V
Ammeter (0-30)mA, (0-100)µA
Volt meter (0-1)V, (0-10)V
Resistors 1K
Diode 1N 4001
Bread board & -
wires

THEORY
In a piece of semiconductor material, if one half is doped by P-type impurity and the other
half is doped by N-type impurity, a PN junction is formed. The plane dividing the two halves or
zones is called PN junction. The N-type material has high concentration of free electrons, while
P-type material has high concentration of holes. Therefore, at the junction there is a tendency for
the free electrons to diffuse over the P-side and holes the N-side. This process is called diffusion.
As the free electron moves across the junction from N-type to P-type, the donor irons become
positively charged. Hence a positive charge is built on the N-side of the junction. The free
electrons that cross the junction uncover the negative acceptor ions by filling in the holes.
Therefore, a net negative charge is established on the P-side of the junction. This net negative
charge on the P-side prevents further diffusion of electron in to the P-side. Similarly, the net
positive charge on the N-side repels the holes crossing from P-side to N-side. Thus a barrier is
set-up near the junction which prevents further movement of charge carriers. As the consequence
of the induced electric field across the depletion layer, an electrostatic potential difference is
established between P and N region, which is called the potential barrier, junction barrier,
diffusion potential, or contact potential, V O. The magnitude of the contact potential V O varies
with doping levels and temperature. V O is 0.3 V for germanium and 0.72 V for silicon.

Forward bias
When positive terminal of the battery is connected to the P-type and negative terminal to
the N-type of the PN diode, the bias is known as forward bias. Under the forward bias condition,
the applied positive potential repels the holes in P-type region so that the holes move towards the
junction and the applied negative potential repels the electron in the N-type region and the
electron move towards the junction. Eventually, when the applied potential is more than the
internal barrier potential the depletion region and internal potential barrier disappear. A feature
worth to be noted in the forward characteristics is the cut in or threshold voltage V R below which
the current is very small. It is 0.3 V for GE and 0.7 V for Si respectively. At the cut in voltage, the
potential is overcome and the current through the junction starts to increase rapidly.
 2

SYMBOL

A K

PN diode

PIN DIAGRAM
K
A

1N 4001
CONSTRUCTION

A K
P N

CIRCUIT DIAGRAM

FORWARD BIAS

1N 4001
R ( 0 - 30 ) mA

A
+ -
1K
(0-1)V
( 0 - 10 ) V
V
+ -

REVERSE BIAS
1N 4001
R ( 0 - 100 ) uA

A
1K + -
( 0 - 10 ) V
( 0 - 10 ) V
V
+ -
 3

Reverse bias
When the negative terminal of the battery is connected to the P-type and positive terminal
of the battery is connected to the N-type of the PN junction, the bias applied is known as reverse
bias. Under applied reverse bias, holes which form the majority carriers or the P-side moves
towards the negative terminal of the battery and electron which form the majority carrier of the N-
side are attracted towards the positive terminal of the battery. Hence, the width of the depletion
region which is depleted of the mobile charge carriers increases. Thus the electric field produced
by applied reverse bias, is in the same direction as the electric field of the potential barrier. Hence,
the resultant potential barrier is increased which prevents the flow of majority carriers in both the
directions. Therefore, theoretically no current should flow in the external circuit. But in practice, a
very small current of the order of a few microamperes flows under reverse bias.
Electron forming covalent bonds of the semiconductor atoms in the P and N-type regions
may absorb sufficient energy from heat and light to cause breaking of some covalent bonds.
Hence electron-hole pairs are continually produced in both the regions. Under the reverse bias
condition, the thermally generated holes in the P-region are attracted towards the negative
terminal of the battery and the electrons in the N-region are attracted towards the positive terminal
of the battery. Consequently, the minority carriers, electron on the P-region and holes in the N-
region, wander over to the junction and flow towards their majority carrier side giving rise to a
small reverse current. This current is known as reverse saturation current, IO. The magnitude of
reverse current depends upon the junction temperature because the major source of minority
carriers is thermally broken covalent bonds.
For large applied reverse bias, the free electrons from the N-type moving towards the
positive terminal of the battery acquire sufficient energy to move with high velocity to dislodge
valence electron from semiconductor atoms in the crystal. These newly liberated electrons, in turn,
acquire sufficient energy to dislodge other parent electrons. Thus, a large number of free electrons
are formed which is commonly called as an avalanche of free electrons. This leads to the
breakdown of the junction leading to very large reverse current. The reverse voltage at which the
junction breakdown occurs is known as breakdown voltage, VBD.

PN diode applications
An ideal PN diode is a two terminal polarity sensitive device that has zero resistance when
it is forward biased and infinite resistance when it is reverse biased. Due to this characteristic the
diode finds number of applications as given below.
1. Rectifier
2. Switch
3. Clamper
4. Clipper
5. Demodulation detector circuits

PROCEDURE

Forward bias

1. Connect the circuit as per the circuit diagram.

2. Vary the power supply voltage in such a way that the readings are taken in steps of 0.1
V in the voltmeter.
3. Note down the corresponding ammeter readings.
4. Plot the graph: V against I
5. Calculate the forward resistance RF = ∆VF / ∆IF
 4

TABULATION

FORWARD BIAS

Sl. SUPPLY VF IF
No. VOLTAGE (V) (mA)
1
2
3
4
5
6
7
8
9
10

REVERSE BIAS

Sl. SUPPLY VR IR
No. VOLTAGE (V) (µA)
1
2
3
4
5
6
7
8
9
10
 5

PROCEDURE

Reverse bias

1. Connect the circuit as per the circuit diagram.

2. Vary the power supply voltage in such a way that the readings are taken in steps of 0.5
V in the voltmeter.
3. Note down the corresponding ammeter readings.
4. Plot the graph: V against I
5. Calculate the forward resistance RR = ∆VR / ∆IR

VIVA-VOCE QUESTIONS

1. Explain how a potential barrier is created within a PN diode.

2. Define peak inverse voltage of a diode.

3. Mention the characteristics of an ideal diode.

4. What are the sources of reverse current in a diode?

5. What are the transition and diffusion capacitances?

 6

MODEL GRAPH

I
mA

V VOLTS

I
uA

CALCULATION

Forward resistance RF = ∆VF / ∆IF

Reverse resistance RR = ∆VR / ∆IR

=
 7

VIVA-VOCE QUESTIONS

6. Write the diode equation.

7. Why silicon devices are more popular than germanium devices?

8. What do you mean by valance electron?

9. Give the barrier potential for silicon and germanium.

10. Write the other name of PN diode.

RESULT
Thus the characteristics of PN diode were plotted and the following results were obtained.

Forward resistance RF
Reverse resistance RR
Cut In voltage
8
 9

EXPERIMENT NO. : 2
DATE:

CHARACTERISTICS OF ZENER DIODE

AIM
To plot the forward and reverse VI characteristics of a zener diode and to calculate the
following parameters

1. Forward resistance
2. Reverse resistance
3. Break down voltage

APPARATUS REQUIRED

EQUIPMENT RANGE
Power supply (0-30)V
Ammeter (0-30)mA, (0-100)mA
Volt meter (0-1)V, (0-10)V
Resistors 1K
Diode SZ 5.6
Bread board & -
wires

THEORY
Zener diode is heavily doped PN diode. When the reverse voltage reaches breakdown
voltage in normal PN diode the current through the junction and the power dissipated at the
junction will be high. Such an operation is destructive and the diode gets damaged. Diodes can be
designed with adequate power dissipation capabilities to operate in the breakdown region. One
such diode is known as Zener diode.
From the VI characteristics of the Zener diode, it is found that the operation of Zener diode
is same as that of ordinary PN diode under forward biased condition. Under reverse biased
condition, breakdown of the junction occurs. The breakdown voltage depends upon the amount of
doping. If the diode is heavily doped, depletion layer will be thin and, consequently, breakdown
occurs at lower reverse voltage and the breakdown voltage is sharp. The sharp increasing current
under breakdown conditions is due to the following two mechanisms.
1. Avalanche breakdown
2. Zener breakdown

Avalanche breakdown
As the applied reverse bias increases, the field across the junction increases
correspondingly, thermally generated carriers while traversing the junction acquire a large amount
of kinetic energy from this field. As a result the velocity of these carriers increases. These
electrons disrupt covalent bond by colliding with immobile ions and create new electron-hole pairs.
These new carriers again generating energy from the field and collide with other immobile ions
thereby generating further electron-hole pairs. This process is cumulative in nature and results in
generation of an avalanche of charge carriers within a short time. This mechanism of carrier
generation is known as avalanche multiplication. This process results in flow of large amount of
current at the same value of reverse bias.
 10

SYMBOL

A K

Zener diode

PIN DIAGRAM

K
A

SZ 5.6
CONSTRUCTION

A K
P N

Heavily doped

CIRCUIT DIAGRAM

FORWARD BIAS
SZ 5.6
(0-30)mA
R
A
+ -
1K

(0 - 30)V V
+ -
(0-1)V

REVERSE BIAS

SZ 5.6
(0-100)mA
R
A
+ -
1K

(0 - 30)V V
+ -
(0-10)V
 11

Zener breakdown
When the PN regions are heavily doped, direct rupture of covalent bonds takes place
because of strong electric fields, at the junction of PN diode. The new electron-hole pair so
created increases the reverse current in a reverse biased PN diode. The increase in current takes
place at a constant value of reverse bias typically below 6V for heavily doped diodes. As a result
of heavy doping of P and N regions, the depletion regions, the depletion region width becomes
very small and for applied voltage of 6V or less, the field across the depletion region becomes very
high, of the order of 107 V/m, making conditions suitable for Zener breakdown. For lightly doped
diodes, Zener breakdown voltage becomes high and breakdown is predominantly by Avalanche
multiplication. Though Zener breakdown occurs for lower breakdown voltage and Avalanche
breakdown occurs for higher breakdown voltage, such diodes are normally called Zener diodes.

Application
Zener diode can be used as a voltage regulator.

PROCEDURE

Forward Bias

1. Connect the circuit as per the circuit diagram.

2. Vary the power supply voltage in such a way that the readings are taken in steps of
0.1 V in the voltmeter.
3. Note down the corresponding ammeter readings.
4. Plot the graph: V against I
5. Calculate the forward resistance RF = ∆VF / ∆IF

Reverse Bias

1. Connect the circuit as per the circuit diagram.

2. Vary the power supply voltage in steps of 0.5 V.
3. Note down the corresponding ammeter readings.
4. Plot the graph: V against I
5. Calculate the forward resistance RR = ∆VR / ∆IR
 12

TABULATION

FORWARD BIAS

Sl. SUPPLY VF IF
No. VOLTAGE (V) (mA)
1
2
3
4
5
6
7
8
9
10

REVERSE BIAS

Sl. SUPPLY VR IR
No. VOLTAGE (V) (mA)
1
2
3
4
5
6
7
8
9
10
 13

VIVA-VOCE QUESTIONS

1. How Zener diode is formed?

2. What is Avalanche breakdown?

3. Mention few differences between PN diode and Zener diode.

4. What are the general applications of Zener diodes?

5. What is Zener breakdown?

 14

MODEL GRAPH

I
mA

V VOLTS

CALCULATION

Forward resistance RF = ∆VF / ∆IF

Reverse resistance RR = ∆VR / ∆IR

=
 15

RESULT
Thus the characteristics of Zener diode were plotted and the following results were
obtained.

Forward resistance RF
Reverse resistance RR
Breakdown voltage
16
 17

EXPERIMENT NO. : 3
DATE:

CHARACTERISTICS OF CE TRANSISTOR

AIM
To plot the input and output characteristics of an NPN transistor in common emitter
configuration and to find its

1. Input resistance
2. Output resistance

APPARATUS REQUIRED

EQUIPMENT RANGE
Power supply (0-30)V
Ammeter (0-500)µA,(0-10)mA
Voltmeter (0-5)V, (0-10)V
Resistors 500Ω, 1K
Bread board & -
wires
Transistor BC 107

THEORY
Transistor can be connected in a circuit in any of the three different configurations namely;
common emitter, common base, and common collector. Common emitter (CE) configuration is the
most frequently used configuration because it provides voltage, current, power gain more than
unity.
The name CE is because the emitter of the transistor is common to the input and output
circuits. Input is applied across the base and emitter, and the output is taken across the collector
and emitter. CE configuration is also called grounded emitter configuration.

Input Resistance
Input resistance can be calculated from the input characteristic curves. It is given by the
ratio of small change in base to emitter voltage to corresponding base current; keeping collector to
emitter voltage constant.
Ri = ∆VBE / ∆IB; keeping VCE constant.

Output Resistance
Output resistance can be calculated from the output characteristic curves. It is given by the
ratio of small change in collector to emitter voltage to corresponding collector current; keeping
base current constant.
Ro = ∆VCE / ∆IC; keeping IB constant.

Application
The CE configuration is used for audio frequency circuits.
 18

SYMBOL

E
NPN transistor

PIN DIAGRAM

C
E

C E
BC 107 B
CONSTRUCTION

E N P N C

CIRCUIT DIAGRAM

(0 - 10)mA
R2
- +
A
C IC
(0 - 500)uA 500 ohm
R1
A BC 107
+ - B
IB (0 - 30)V
1K
E + (0 - 10)V
V VCE
(0 - 30)V (0 - 5)V +
-
VBE V
-
 19

PROCEDURE

Input Characteristics

1. Rig up the circuit as per circuit diagram.

2. Set VCE and vary V BE insteps of 0.1 V and note down the corresponding IB. Repeat the
above procedure for various values of V CE.
3. Plot the graph: VBE vs IB for constant values of V CE.
4. Find the input resistance Ri = ∆VBE / ∆IB; keeping VCE constant.

Output Characteristics

1. Rig up the circuit as per circuit diagram.

2. Set IB and vary V CE insteps of 1 V and note down the corresponding IC. Repeat the
above procedure for various values of IB.
3. Plot the graph: V CE vs IC for constant values of IB.
4. Find the output resistance Ro = ∆VCE / ∆IC; keeping IB constant.

VIVA-VOCE QUESTIONS

1. What is the importance of a CE amplifier?

2. Mention the regions of operation of a transistor.

3. In which region of operation a transistor acts as an amplifier.

4. What is the use of CC amplifier stage?

5. What is an emitter follower and why it is called so

 20

TABULATION

INPUT CHARACTERISTICS

SL. VCE = VCE = VCE =

NO. VBE IB VBE IB VBE IB
(V) (µA) (V) (µA) (V) (µA)
1
2
3
4
5
6
7
8
9
10

OUTPUT CHARACTERISTICS

SL. IB = IB = IB =
NO. VCE IC VCE IC VCE IC
(V) (mA) (V) (mA) (V) (mA)
1
2
3
4
5
6
7
8
9
10
 21

VIVA-VOCE QUESTIONS

6. What is application of CB amplifier?

7. What the arrow in the symbol of transistor indicates.

8. Why the emitter of a transistor is highly doped.

9. Why the area of collector of transistors is largest.

10. Define transistor.

 22

MODEL GRAPH

INPUT CHARACTERISTICS

IB

uA

VBE Volts

MODEL GRAPH

OUTPUT CHARACTERISTICS

IC
mA

VCE Volts

CALCULATION

Input resistance RI = ∆VBE / ∆IB

Output resistance Ro = ∆VCE / ∆IC

 23

RESULT
Thus the characteristics of CE transistor were plotted and the following results were
obtained.

Input resistance RI
Output resistance Ro
24
 25

EXPERIMENT NO. : 4
DATE:

CHARACTERISTICS OF CB TRANSISTOR

AIM
To plot the input and output characteristics of an NPN transistor in common base
configuration and to find its

1. Input resistance
2. Output resistance

APPARATUS REQUIRED

EQUIPMENT RANGE
Power supply (0-5)V, (0-30)V
Ammeter (0-100)mA
Voltmeter (0-5)V, (0-10)V
Resistors 1K, 500 ohm
Bread board & -
wires
Transistor BC 107

THEORY
In common base configuration, the base of the transistor is common to the input and output
circuits. Input voltage is applied between emitter and base. Output is taken across collector and
base. CB configuration is also called as grounded base configuration. In this set up, an increase
in emitter current causes an increase in collector current. Collector current is given by the
expression IC = IE – IB. since IB is in the order of micro amperes. Collector current is almost same
as the emitter current in spite of the variations in the collector – base junction. Another important
expression for a common base transistor configuration is IC = α IE + ICBO where ICBO is the current
flowing through the collector circuit when the collector – base junction is reverse biased and
emitter - base junction is open circuited.
Transistor offers medium input resistance and very high output resistance when it is in CB
configuration. It provides almost unit current gain and high voltage gain.

Input Resistance
Input characteristics are plotted between the emitter current IE and emitter to base voltage
VBE for a constant value of collector to base voltage V CB. The reciprocal of the slope of the curve s
gives the value of dynamic input resistance Ri and is given by the expression Ri = ∆V BE/∆IE.

Output Resistance
Output characteristics are plotted between the collector current IC and collector to base
voltage VCB for a constant value of emitter current IE. The output resistance can be obtained from
the curves and is given by the expression Ro = ∆V CB/∆IC keeping IE constant. Ro has rather high
values since the curves are almost flat.

Application
The CB configuration is used for high frequency circuits.
 26

SYMBOL

E
NPN transistor

PIN DIAGRAM

C
E

C E
BC 107 B
CONSTRUCTION

E N P N C

B
CIRCUIT DIAGRAM

(0 - 100)mA (0 - 100)mA
R1 BC 107 R2
- + E C - +
A A
1K
IC 500 ohm
IE
B (0 - 30)V
- +
(0 - 5)V (0 - 10)V
(0 - 30)V
VEB V VCB V
+ -
 27

PROCEDURE

Input Characteristics

1. Rig up the circuit as per circuit diagram.

2. Set VCB and vary VEB insteps of 0.1 V and note down the corresponding IE. Repeat the
above procedure for various values of V CB.
3. Plot the graph: V EB vs IE for constant values of V CB.
4. Find the input resistance Ri = ∆VEB / ∆IE; keeping VCB constant.

Output Characteristics

1. Rig up the circuit as per circuit diagram.

2. Set IE and vary V CB insteps of 1 V and note down the corresponding IC. Repeat the
above procedure for various values of IE.
3. Plot the graph: V CB vs IC for constant values of IB.
4. Find the output resistance Ro = ∆VCB / ∆IC; keeping IE constant.

VIVA-VOCE QUESTIONS

1. What s the current amplification factor for CB stage?

2. Mention the characteristics of CB configuration.

3. Mention the application of CB amplifier?

4. Which configuration is good as a constant current source? Why?

5. What is collector power dissipation of transistor?

 28

TABULATION

INPUT CHARACTERISTICS

SL. VCB = VCB = VCB =

NO. VEB IE VEB IE VEB IE
(V) (mA) (V) (mA) (V) (mA)
1
2
3
4
5
6
7
8
9
10

OUTPUT CHARACTERISTICS

SL. IE = IE = IE =
NO. VCB IC VCB IC VCB IC
(V) (mA) (V) (mA) (V) (mA)
1
2
3
4
5
6
7
8
9
10
 29

VIVA-VOCE QUESTIONS

6. What is a bipolar junction transistor?

7. List the difference between NPN and PNP transistor.

8. What are the different BJT configurations?

9. Explain about early effect.

10. List the two types of bread down in transistors.

11. Draw the pin diagram of BC 107 transistor.

12. What is meant by base-width modulation?

13. Explain about punch through.

14. Give the application of CC configuration.

 30

MODEL GRAPH

INPUT CHARACTERISTICS

IE
mA

VBE Volts

OUTPUT CHARACTERISTICS

IC
mA

VCB
Volts

CALCULATION

Input resistance RI = ∆VEB / ∆IE

Output resistance Ro = ∆VCB/∆IC

 31

RESULT
Thus the characteristics of CE transistor were plotted and the following results were
obtained.

Input resistance RI
Output resistance Ro
32
 33

EXPERIMENT NO. : 5
DATE:

CHARACTERISTICS OF JFET

AIM
To plot the transfer and drain characteristics of JFET and to find the following parameters
1. Drain resistance
2. Mutual conductance
3. Amplification factor

APPARATUS REQUIRED

EQUIPMENT RANGE
Power supply (0-30)V
Ammeter (0-30)µA
Voltmeter (0-30)V
Bread board & wires -
Transistor BFW 10

THEORY
Junction field effect transistor (JFET) is a unipolar device since its function depends only
upon one type of carrier. JFET has high input impedance unlike BJT.
JFETs are two types, N-channel and P-channel. An N-channel JFET is an N-type silicon
bar with a P-type semiconductor is embedded on both sides of the bar. P-type semiconductor
forms the gate and the ends of the N-type bar are source and drain. The P-type regions are
externally shorted. The gate of an N-channel JFET is connected to negative potential with respect
to source. The drain is connected to positive with respect to the source.

Drain Resistance
It is defined as the ratio of change in drain to source voltage to the change in drain current
at an operating point, when gate to source voltage remains constant.
Rd = ∆VDS / ∆ID with VGS constant

Mutual Conductance
It is defined as the ratio of change in drain current to the change in gate to source voltage at
an operating point, when drain to source voltage remains constant.
Gm = ∆ID / ∆VGS with VDS constant.

Amplification Factor
It is defined as the product of drain resistance and mutual conductance.
µ = Rd * Gm
 34

SYMBOL

S
N - channel JFET
PIN DIAGRAM

D
Schield

G
BFW 10
CONSTRUCTION

S D
N Type

CIRCUIT DIAGRAM
ID
(0 - 30)mA
- +
A
D

BFW 10
G
S + (0 - 30)V
(0 - 30)V -
VGS VDS
V V
(0 - 5)V (0 - 10)V
+ -
 35

Application
1. FET is used as a buffer in measuring instruments, receivers since it has high input
impedance and low output impedance.
2. FETs are used in RF amplifiers in FM tuners and communication equipment for the low
noise level.
3. Since the input capacitance is low, FETs are used in cascade amplifiers in measuring and
test equipments.
4. Since the device is voltage controlled, it is used as a voltage variable resistor in operational
amplifiers and tone controls.
5. FET are used in mixer circuits in FM and TV receivers, and communication equipment
because inter modulation distortion is low.
6. As the coupling capacitor is small, FETs are used in low frequency amplifiers in hearing
aids and inductive transducers.
7. FETs are used in digital circuits in computers, LSD and memory circuits because of its
small size.

PROCEDURE

Drain Characteristics

1. Rig up the circuit as per circuit diagram.

2. Set VGS and vary V DS insteps of 0.5 V and note down the corresponding ID. Repeat the
above procedure for various values of V GS.
3. Plot the graph: V DS vs ID for constant values of V GS.
4. Find the drain resistance Rd = ∆VDS / ∆ID with VGS constant

Transfer Characteristics

1. Rig up the circuit as per circuit diagram.

2. Set VDS and vary V GS insteps of 0.5 V and note down the corresponding ID. Repeat the
above procedure for various values of V DS.
3. Plot the graph: V GS vs ID for constant values of V DS.
4. Find the Trans conductance. Gm = ∆ID / ∆VGS with VDS constant
 36

TABULATION

DRAIN CHARACTERISTICS

SL. VGS = VGS = VGS =

NO. VDS ID VDS ID VDS ID
(V) (mA) (V) (mA) (V) (mA)
1
2
3
4
5
6
7
8
9
10

TRANSFER CHARACTERISTICS
VDS = _________

SL. VGS ID
No. (V) (mA)
1
2
3
4
5

MODEL GRAPH

DRAIN CHARACTERISTICS
 37

ID
mA

V DS Volts

VIVA-VOCE QUESTIONS

1. Why a FET is said to be a voltage controlled device?

2. What is the ohmic region in FET output characteristics?

3. What is pinch off voltage?

4. Give the advantage of FET over BJT.

5. Prove µ = Rd * Gm

6. What does the arrow in the gate of symbol of FET indicate?

7. Why FET is called so?

8. How a FET function as a VVR.

 38

9. Mention the types of JFET.

10. Draw the small signal equivalent circuit of JFET

MODEL GRAPH

TRANSFER CHARACTERISTICS

ID
mA

Volts VGS

CALCULATION

Drain resistance Rd = ∆VDS / ∆ID

Mutual conductance Gm = ∆ID / ∆VGS

=
 39

Amplification factor µ = Rd * Gm

=
 40

RESULT
Thus the characteristics of JFET were plotted and the following results were obtained.

Drain resistance Rd
Mutual conductance Gm
Amplification factor µ
 41

EXPERIMENT NO. : 6
DATE:

CHARACTERISTICS OF MOSFET

AIM
To plot the transfer and drain characteristics of n-channel MOSFET and to find the following
parameters
1. Drain resistance
2. Mutual conductance
3. Amplification factor

APPARATUS REQUIRED

EQUIPMENT RANGE
Power supply (0-30)V
Ammeter (0-100)mA
Voltmeter (0-30)V
Bread board & wires -
Transistor BFW 96

THEORY
MOSFETs are three terminal devices having a source, gate and drain. MOSFET is the
abbreviation of metal oxide semiconductor field effect transistor. It uses a thin layer of silicon
dioxide as an insulator between gate and channel. It is also known as insulated gate field effect
transistor (IGFET). There are two kinds of MOSFET, depletion and enhancement type.
An N-channel depletion type MOSFET is shown in figure. A heavily doped two N-type wells
are doped on P-type substrate to form source and drain. Between these two N-type wells a lightly
doped N-type material forms a channel. A thin layer of Sio 2 which is an insulating material is
fabricated on the surface above the channel and gate terminal is attached to it. Source and drain
terminals are attached to heavily doped N-type material with metal contacts.
A positive voltage V DS is applied at the drain with respect to source to establish drain
current. When a negative voltage V GS is applied at the gate with respect to the source, electrons
under gate get repelled causing the channel effectively thinner. This reduces the current through
the channel. If the magnitude of V GS is increased, the drain current decreases. If it is increased
further drain current stops.
If a positive voltage is applied at the gate, electrons get attracted in to the channel and drain
current increases. A depletion type MOSFET can operate in depletion and enhancement modes.

Application
MOSFETs are widely used in VLSI circuits.
 42

SYMBOL
D

S
N - channel MOSFET
PIN DIAGRAM
S

D
Schield

G
BFW 96
CONSTRUCTION
S D G

N+ N N+

P- type substrate

CIRCUIT DIAGRAM
ID
R
-
+
A
D 1K
(0 - 100)mA
(0 - 30)V
-
R BFW 96 VDS
G V
(0 - 30)V
+
(0 - 30)V 1K -
VGS
V
(0 - 30)V S
+
 43

Drain Resistance
It is defined as the ratio of change in drain to source voltage to the change in drain current
at an operating point, when gate to source voltage remains constant.
Rd = ∆VDS / ∆ID with VGS constant

Mutual Conductance
It is defined as the ratio of change in drain current to the change in gate to source voltage at
an operating point, when drain to source voltage remains constant.
Gm = ∆ID / ∆VGS with VDS constant.

Amplification Factor
It is defined as the product of drain resistance and mutual conductance.
µ = Rd * Gm

PROCEDURE

Drain Characteristics

1. Rig up the circuit as per circuit diagram.

2. Set VGS = 0V and vary V DS insteps of 0.5 V and note down the corresponding ID. Repeat the
above procedure for V GS = -1V,-2V,-3V , for the depletion mode
3. Repeat the above procedure for VGS = 1V, 2V, 3V, for the enhancement mode .
4. Plot the graph: V DS vs ID for constant values of V GS.
5. Find the drain resistance Rd = ∆VDS / ∆ID with VGS constant

Transfer Characteristics

1. Rig up the circuit as per circuit diagram.

2. Set VDS and vary V GS insteps of 0.5 V and note down the corresponding ID. Repeat the
above procedure for various values of V DS.
3. Plot the graph: V GS vs ID for constant values of V DS.
4. Find the Trans conductance. Gm = ∆ID / ∆VGS with VDS constant
 44

TABULATION

DRAIN CHARACTERISTICS – DEPLETION MODE

SL. VGS = VGS = VGS =

NO. VDS ID VDS ID VDS ID
(V) (mA) (V) (mA) (V) (mA)
1
2
3
4
5
6
7
8

DRAIN CHARACTERISTICS – ENHANCEMENT MODE

SL. VGS = VGS = VGS =

NO. VDS ID VDS ID VDS ID
(V) (mA) (V) (mA) (V) (mA)
1
2
3
4
5
6
7
8

TRANSFER CHARACTERISTICS
VDS = _________

SL. VGS ID
No. (V) (mA)
1
2
3
4
5
 45

VIVA-VOCE QUESTIONS

1. What is a unipolar device?

2. What are the types of FET?

3. How a MOSFET is formed?

4. Mention the modes of MOSFET.

5. Explain enhancement mode.

 46

MODEL GRAPH

DRAIN CHARACTERISTICS

ID
mA

V DS Volts

TRANSFER CHARACTERISTICS

ID
mA

VGS Volts
CALCULATION

Drain resistance Rd = ∆VDS / ∆ID

Mutual conductance Gm = ∆ID / ∆VGS

Amplification factor µ = Rd * Gm

=
 47

RESULT
Thus the characteristics of MOSFET were plotted and the following results were obtained.

Drain resistance Rd
Mutual conductance Gm
Amplification factor µ
48
 49

EXPERIMENT NO. : 7
DATE:

CHARACTERISTICS OF UJT

AIM
To plot the VI characteristics of a uni-junction transistor (UJT) and to measure its intrinsic
stand off ratio.

APPARATUS REQUIRED

EQUIPMENT RANGE
Power supply (0-30)V
Ammeter (0-30)mA
Voltmeter (0-10)V
Resistors 1K
Bread board & -
wires
Transistor 2N 2646

THEORY
A uni-junction transistor consists of a bar of highly doped N-type semiconductor to which a
heavily doped P-type rod is attached. Ohmic contacts are made at opposite ends of the N-type
bar, which are called base 1 (B1) and base2 (B2) of the transistor. P-type rod is called the emitter.
The inter-base resistance RBB of N-type silicon bar appears as two resistors RB1 and RB2.
The intrinsic stand off ratio is given by the expression
η = RB1 / RBB with IE = 0
Due to the applied voltage at B 2 of the transistor, a positive voltage gets developed across
RB1 and it is equal to ηV BB.
If VE is less than the voltage across RB1, diode becomes reverse biased. When V E
increases, forward current flows through the emitter to B 1 region.
If VE is raised further, a sudden reduction of RB1 occurs. This happens because the
increase in current reduces RB1. Reduction in RB1 causes the increase in current through it. This
further reduces RB1 and so forth. In other words, a regenerative action takes place at a particular
value of V E, called peak voltage which is expressed as
VP = ηVBB + VD
Where VBB is the base supply voltage and V D is the junction voltage drop. After a particular value
of VE called valley point, emitter current increases with V E similar to that of an ordinary forward
biased diode.
As explained above, when VE is rises, forward resistance across the junction decreases
and the junction behaves as a short circuit. Then current through the E-B1 junction increases and
hence voltage across the junction decreases. This is equivalent to a negative resistance across
the junction. This continues up to a voltage called valley voltage after which junction behaves as
an ordinary diode.

Application
UJT can be employed in a variety of applications like, saw-tooth wave generator, pulse
generator, switching, timing, and phase control circuits.
 50

SYMBOL

B2
E

B1
UJT

PIN DIAGRAM

B1

B2
E

B2 E
B1
2N 2646

CONSTRUCTION

B2

E P

B1
CIRCUIT DIAGRAM

IE
R B2
+ - E
A
1K (0 - 30) mA
VB1B2
+ VEB1 +
(0 - 30) V B1 (0 - 30) V
V V
- (0 - 10) V - (0 - 10) V
 51

PROCEDURE

1. Rig up the circuit as per the circuit diagram.

2. Keeping VBB = 0, vary VBE from 0V to 5V in steps of 0.5V.
3. Take the voltmeter and ammeter reading s at the input side and enter it in tabular column.
4. Plot the VI characteristics with IE along X-axis and V BE1 along Y-axis.
Calculate the intrinsic stand off ratio from the graph.

VIVA-VOCE QUESTIONS

1. Draw the electrical equivalent circuit of UJT.

2. Define negative resistance.

3. Give two applications of UJT.

4. Comment on UJT when V BB = 0.

5. Why RB1 is greater than RB2?

 52

TABULATION

VB1B2 = 5V

Sl. VEB1 IE
No. (v) (mA)
1
2
3
4
5
6
7
8
9
10

MODEL GRAPH

VEB1
Volts

VP

VV

IP IV IE mA

CALCULATION

Intrinsic stand off ratio η = (VP – VD) / VBB

=
 53

RESULT
Thus the characteristic of UJT was plotted and the following result was obtained.

Intrinsic stand off ratio η

54
 55

EXPERIMENT NO. : 8
DATE:

CHARACTERISTICS OF SCR

AIM
To plot the VI characteristics of a silicon control rectifier (SCR) and to measure it’s holding
current and latching current.

APPARATUS REQUIRED

EQUIPMENT RANGE
Power supply (0-30)V
Ammeter (0-30)mA, (0-100)mA
Voltmeter (0-30)V
Resistors 1.5K,5K
Bread board & -
wires
SCR 2P4M
THEORY

Silicon control rectifier is a four layer PNPN device. It has three terminals namely,
anode (A), cathode (K), gate (G). Keeping gate open, if forward voltage is applied across SCR, it
will remain in OFF state. If applied voltage exceeds the break over voltage, it will turn ON and
heavy current will flow through it. The break over voltage can be reduced considerably, if a small
voltage is applied at the gate. As the gate current increases, the break over voltage decreases.
Once the SCR is fired, gate loses control over the current through the device. Even if gate
current is disconnected, anode current cannot be brought back to zero. To turn OFF the SCR,
anode current should be made less than the holding current.

Application

1. Relay control
2. Motor control
3. Phase control
4. Heater control
5. Battery chargers
6. Inverters
7. Regulated power supplies
8. Static switches
 56

SYMBOL

G K
SCR
PIN DIAGRAM

K AG
2P4M

CONSTRUCTION

P1

N1

G P2

N2

K
 57

PROCEDURE

1. Rig up the circuit as per the circuit diagram.

2. Switch ON the anode supply keeping at low voltage.
3. Set the gate current and watch the triggering of SCR by varying the anode voltage.
4. Repeated the above steps for various values of gate current.
5. Plot the VI characteristics with IA along Y-axis and V AK along X-axis.
6. Calculate the holding current and latching current.

VIVA-VOCE QUESTIONS

1. Define holding current and latch current.

2. Why an SCR called a thyristor?

3. Give the applications of SCR.

4. Why an SCR is called so?

5. Draw the transistor analogy of the SCR.

 58

CIRCUIT DIAGRAM
IA
- +
A
A
(0 - 30) mA
2P4M
VAK
G K +
IG
R (0 - 30) V
V
+ -
A
-
(0 - 30) V
1.5 K (0 - 5) mA
(0 - 30) V

TABULATION

SL. IG = 2.5 mA IG = 3 mA IG = 3.5 mA

NO. VAK IA VAK IA VAK IA
(V) (mA) (V) (mA) (V) (mA)
1
2
3
4
5
6
7
MODEL GRAPH

IA
mA

IH

VAK
VH Volts
 59

RESULT
Thus the characteristic of SCR was plotted and the following result was obtained.

Holding current IH
Latching current IL
60
 61

EXPERIMENT NO. : 9
DATE:

CHARACTERISTICS OF DIAC - ( DIODE A.C. SWITCH )

AIM
To plot the VI characteristics of a Diode A.C switch.

APPARATUS REQUIRED

EQUIPMENT RANGE
Power supply (0-30)V
Ammeter (0-10)mA
Voltmeter (0-100)V
Resistors 1.5K
Bread board & -
wires
Diac DB3

THEORY
Diac is a three layer, two terminal semiconductor device. MT1 and MT2 are the two main
terminals which are interchangeable. It acts as a bidirectional Avalanche diode. It does not have
any control terminal. It has two junctions J 1 and J2. Though the Diac resembles a bipolar transistor,
the central layer is free from any connection with the terminals.
From the characteristic of a Diac shown in figure it acts as a switch in both directions. As
the doping level at the two ends of the device is the same, the Diac has identical characteristics for
both positive and negative half of an a.c. cycle. During the positive half cycle, MT1 is positive with
respect to MT2 where as MT2 is positive with respect to MT1 in the negative half cycle. At voltages
less than the breakover voltage, a very small amount of current called the leakage current flows
through the device and the device remains in OFF state. When the voltage level reaches the
breakover voltage, the device starts conducting and it exhibits negative resistance characteristics,
i.e. the current flowing in the device starts increasing and the voltage across it starts decreasing.

Application
The Diac is not a control device. It is used as triggering device in Triac.

PRICEDURE

1. Rig up the circuit as per the circuit diagram.

2. Vary the power supply in regular steps and note down the corresponding current and
voltage of the diac.
3. Reverse the diac terminal.
4. Repeat the procedure 2.
5. Plot the graph: voltage Vs current.
 62

SYMBOL

MT1 MT2

PIN DIAGRAM

MT1 DB3 MT2

CONSTRUCTION

MT1

N
P

P
N

MT2
CIRCUIT DIAGRAM

R
+ -
A
1.5 K
(0 - 30)mA
MT1

+
(0 - 30)V V (0 - 100)V
-
MT2
 63

VIVA-VOCE QUESTIONS

1. What is meant by DIAC?

2. Draw the construction of DIAC.

3. Mention some applications of DIAC.

4. The DIAC is a thyristor? Why?

5. Draw the symbol of DIAC.

6. Compare DIAC with SCR.

 64

TABULATION

SL. FORWARD BIAS REVERSE BIAS

NO. Voltage Current Voltage Current
(V) (mA) (V) (mA)
1
2
3
4
5
6
7
8
9
10

MODEL GRAPH

Forward
current

ON

IBO

OFF

Reverse
voltage VBO
VBO Forward
voltage

OFF

IBO

ON
Reverse
current
 65

RESULT

Thus the characteristic of DIAC was plotted.

66
 67

EXPERIMENT NO. : 10
DATE:

CHARACTERISTICS OF TRIAC - ( TRIODE A.C. SWITCH )

AIM
To plot the VI characteristics of a Triode A.C switch.

APPARATUS REQUIRED

EQUIPMENT RANGE
Power supply (0-30)V
Ammeter (0-5)mA, (0-10)mA
Voltmeter (0-30)V
Resistors 1.5K,5K
Bread board & -
wires
Triac BT 136

THEORY
Triac is a three terminal semiconductor switching device which can control alternating
current in a load. Its three terminals are MT1, MT2 and the gate (G). The basic structure and circuit
symbol of a Triac are shown in figure.
Triac is equivalent to two SCRs connected in parallel but in the reverse direction. So, a
Triac will act a switch for both directions. The characteristics of a Triac are shown in figure. Like
SCR, a Triac also starts conducting only when the breakover voltage is reached. Earlier to that the
leakage current which is very small in magnitude flows through the device and therefore remains
in the OFF state. When the device, starts conducting, allows very heavy amount of current to flow
through it. The high inrush of current must be limited using external resistance, or it may otherwise
damage the device.

During the positive half cycle MT1 is positive with respect to MT2, where as MT2 is positive
with respect to MT1 during negative half cycle. A Triac is a bidirectional device and can be
triggered either by a positive or by a negative gate signal. By applying proper signal at the gate,
the breakover voltage, i.e. firing angle of the device can be changed; thus phase control process
can be achieved.

Application
Triac is used for illumination control, temperature control, liquid level control, motor speed
control and as static switch to turn a.c. power ON and OFF. Nowadays, the diac-triac pairs are
increasingly being replaced by a single component unit known as quadrac. Its main limitation in
comparison to SCR is its low power handling capacity.
 68

SYMBOL

MT2
MT1

TRIAC G

PIN DIAGRAM

MT1 G
MT2
BT 136

CONSTRUCTION

MT1 G

N N
P

P
N

MT2
 69

PROCEDURE

1. Set up the circuit after verifying the condition of the components. Switch on the anode
power supply at a low voltage.
2. Switch on gate dc supply and adjust it to make gate current 1mA.
3. Increase the anode voltage. At certain anode voltage it drops to a very low value indicating
that the triac has been triggered. The voltage just prior to this is the break over voltage.
Allow the anode current to increase further. Note down the values and draw the VI
characteristics in the first quadrant of the graph. Repeat this step for gate current of 1.5 mA.
4. Reverse the polarity of the triac, dc supplies and meters. Repeat the above steps and draw
the VI characteristics in the third quadrant.

VIVA-VOCE QUESTIONS
1. Define TRIAC.

2. Draw the symbol of TRIAC.

3. List the applications of TRIAC.

4. What is meant by quadrac?

5. Draw the pin diagram of TRIAC.

6. Compare SCR with TRIAC.

7. List the advantage of TRIAC over SCR.

 70

CIRCUIT DIAGRAM

(0 - 10)mA
R2
- +
A
MT1 5K

BT 136

IG
R1 G MT2
+ - +
A
V (0 - 30)V (0 - 30)V
1.5 K
(0 - 5)mA
-
(0 - 30)V

TABULATION

MT1 Positive

SL. IG = 1 mA IG = 1.5 mA
NO. VMT1:MT2 IMT1 VMT1:MT2 IMT1
(V) (mA) (V) (mA)
1
2
3
4
5
6
7
8
9
10
 71

VIVA-VOCE QUESTIONS

8. Why TRIAC is called as thyristor?

9. What is the function of gate terminal in SCR and TRIAC?

10. Compare the DIAC with TRIAC.

 72

TABULATION

MT1 Negative

SL. IG = -1 mA IG = -1.5 mA
NO. VMT1:MT2 IMT1 VMT1:MT2 IMT1
(V) (mA) (V) (mA)
1
2
3
4
5
6
7
8
9
10

MODEL GRAPH
 73

IA

MT1 +

ON
IH

OFF
-VH

- VAK OFF VH VAK

IH
ON

MT1 -

- IA
 74

RESULT

Thus the characteristic of TRIAC was plotted.

 75

EXPERIMENT NO. : 11
DATE:

VERIFICATION OF KIRCHHOFF’S LAW

AIM
To verify the Kirchoff’s current and voltage laws for a given circuit.

APPARATUS REQUIRED

EQUIPMENT RANGE
Power supply (0-15)V
Ammeter (0-30)mA
Voltmeter (0-10)V
Resistors 680Ω,820Ω,1K
Bread board & -
wires

THEORY

Kirchhoff’s Current Law (KCL)

It states that, at any node the sum of the currents entering a node is equal to the sum of the
currents leaving the node.

Kirchhoff’s Voltage Law (KVL)

It states that, any closed path in any network, the algebraic sum of the emfs is equal to the
algebraic sum of the IR drops.

PROCEDURE

1. Connections are given as per the circuit diagram.

2. Input supply is given to the circuit.
3. For various values of input supply the corresponding meter readings are noted.
4. Tabulate the readings.
5. Verify the Kirchhoff’s current law and voltage law.

VIVA-VOCE QUESTIONS

1. What is positive ion?

2. What is negative ion?

3. Define charge.
 76

CIRCUIT DIAGRAM

KIRCHHOFF’S CURRENT LAW

I1 I2
R1 R2
+ - + -
A A
680 820
(0-30)mA + (0-30)mA
I3
A
(0-30)mA
-
(0-30)V
R3
1K

TABULATION

AMMETER READINGS BY KCL

SL. SUPPLY I1 I2 I3 I1=I2+I3
NO. VOLTAGE (mA) (mA) (mA) (mA)

10
 77

VIVA-VOCE QUESTIONS

4. What is meant by static charge?

5. Define current.

6. Define potential difference.

7. Define power.

8. Give the relationship between power, voltage and current.

9. What are called passive elements?

10. What are called active elements?

11. Define resistance.

12. Define conductance.

13. What will be the equivalent resistance when it connected in series?

14. What will be the equivalent resistance when it connected in parallel?

15. State ohm’s law.

16. Define resistivity.

 78

CIRCUIT DIAGRAM

KIRCHHOFF’S VOLTAGE LAW

+ - + - + -
V1 V2 V3
(0-10)V (0-10)V (0-10)V

R1 R2 R3
680 820 1k

(0-30)V

TABULATION

VOLTMETER BY KVL
SL. SUPPLY READINGS VS=V1+V2+V3
NO. VOLTAGE V1 (V) V2 (V) V3 (V) (V)

10
 79

VIVA-VOCE QUESTIONS

17. What is the internal resistance of an ideal voltage source?

18. What is the internal resistance of an ideal current source?

19. State Kirchhoff’s current law.

20. State Kirchhoff’s voltage law.

THEORETICAL VERIFICATION - KCL

THEORETICAL VERIFICATION - KVL

RESULT
Thus the Kirchoff’s current and voltage laws were verified for the given circuit.
80
 81

EXPERIMENT NO. : 12
DATE:

VERIFICATION OF THEVENIN’S THEOREM

AIM
To verify Thevenin’s theorem for a given circuit.

APPARATUS REQUIRED

EQUIPMENT RANGE
Power supply (0-30)V
Ammeter (0-30)mA
Voltmeter (0-30)V
Resistors 1K,10K,DRB
Bread board & -
wires

THEORY

Statement
Any linear bilateral network containing one or more voltage sources can be replaced by a
single voltage source whose value is equal to open circuit voltage at output terminal with a series
Thevenin’s resistance. The Thevenin’s resistance is equal to the effective resistance looking back
from the output terminal by removing the load resistance.

PROCEDURE

To Find (IL)
1. Connect the ammeter in series with load.
2. Give the input supply.
3. Note the ammeter reading.

To Find (V TH)
1. Remove the load resistance.
2. Connect the voltmeter across open circuited terminals.
3. Give the input supply.
4. Note the voltmeter reading.

To Find (R TH)
1. Short circuit the source voltage.
2. Remove the load resistance.
3. Connect the Ohm meter across open circuited terminals
4. Note the Ohm meter reading.
 82

CIRCUIT DIAGRAM

ACTUAL CIRCUIT
1K 1K

RL
25V 10K 10K
1K

CIRCUIT TO FIND ACTUAL LOAD CURRENT (IL)

(0 - 30)mA
1K 1K
+ -
A

IL
RL
25V 10K
10K 1K

CIRCUIT TO FIND THEVENIN’S VOLTAGE (V TH)

1K 1K

+
10K V VTH
25V 10K
-

CIRCUIT TO FIND THEVENIN’S RESISTANCE (R TH)

1K 1K

Ohm
10K RTH
10K Meter

-
 83

VIVA-VOCE QUESTIONS

1. What is meant by short circuit?

2. What is meant by open circuit?

3. What is the voltage across the short circuit?

4. What is the current across the open circuit?

5. Define mesh.

6. Define loop.

7. Name the basic circuit law upon which the mesh analysis is based?

8. Name the basic circuit law upon which the nodal analysis is based?

9. State Thevenin’s theorem.

10. List the application of Thevenin’s theorem.

 84

THEVENIN’S EQUAVELENT CIRCUIT

RTH

RL
VTH
1K

CIRCUIT TO FIND LOAD CURRENT OF THEVENIN’S CIRCUIT (I L’)

(0 - 30)mA
RTH
A

IL'
RL
VTH
1K
 85

THEORETICAL VERIFICATION

RESULT
Thus the Thevenin’s circuit is verified for a given circuit and the following results were
obtained.

Thevenin’s Resistance RTH

Thevenin’s Voltage VTH
Load Current of Actual Ckt IL
Load Current of Thevenin’s Ckt IL’
86
 87

EXPERIMENT NO. : 13
DATE:

VERIFICATION OF NORTON’S THEOREM

AIM
To verify the Norton’s theorem for a given circuit.

APPARATUS REQUIRED

EQUIPMENT RANGE
Power supply (0-30)V
Ammeter (0-30)mA
Voltmeter (0-30)V
Resistors 1K,10K,DRB
Bread board & -
wires

THEORY

Statement
Any linear bilateral network containing one or more generators can be replaced by an
equivalent circuit consisting of current source (INOR) in parallel with admittance (YNOR). The INOR is
the short circuit current flowing through the output terminals and YNOR is the admittance measured
across the output terminals with all the sources replaced by its internal impedance.

PROCEDURE

To Find (V L)
1. Connect the voltmeter across the load.
2. Give the input supply.
3. Note the voltmeter reading.

To Find (IN)
1. Remove the load resistance.
2. Connect the ammeter across short circuited output terminals.
3. Give the input supply.
4. Note the ammeter reading.

To Find (R N)
1. Short circuit the source voltage.
2. Remove the load resistance.
3. Connect the Ohm meter across open circuited terminals
4. Note the Ohm meter reading.
 88

CIRCUIT DIAGRAM

ACTUAL CIRCUIT
1K 1K

25V 10K 10K RL

1K

CIRCUIT TO FIND ACTUAL LOAD VOLTAGE (V L)

1K 1K

+
RL
25V 10K V VL
10K 1K
(0-30)V
-

CIRCUIT TO FIND NORTON’S CURRENT (IN)

1K 1K

+
IN
25V 10K A
10K (0-30)mA
-

CIRCUIT TO FIND NORTON’S RESISTANCE (R N)

1K 1K

Ohm
10K RN
10K Meter

-
 89

VIVA-VOCE QUESTIONS

1. Define inductance.

2. Give the formula for energy stored in the inductor.

3. Write the formula for equivalent inductance when the inductors are connected in series.

4. Write the formula for equivalent inductance when the inductors are connected in parallel.

5. Define capacitance.

6. Give the formula for energy stored in the capacitor.

7. Give the charge – voltage relationship in a capacitor.

8. What is current voltage relation for capacitor?

9. State Norton’s theorem.

10. Give the application of Norton’s theorem.

 90

NORTON’S EQUAVELENT CIRCUIT

IN RN RL
1K

CIRCUIT TO FIND LOAD VOLTAGE OF NORTON’S CIRCUIT (V L’)

RN

+
RL VL'
VN V
1K (0-30)V
-

Where
VN = IN * RN
 91

THEORETICAL VERIFICATION

RESULT
Thus the Norton’s circuit is verified for a given circuit and the following results were
obtained.

Norton’s Resistance RN
Norton’s Voltage V N
Load Voltage of Actual Ckt V L
Load Voltage of Norton’s Ckt V L’
92
 93

EXPERIMENT NO. : 14
DATE:

VERIFICATION OF SUPER POSITION THEOREM

AIM
To verify the super position theorem for a given circuit.

APPARATUS REQUIRED

EQUIPMENT RANGE
Power supply (0-30)V
Ammeter (0-10)mA
Resistors 1K
Bread board & -
wires

THEORY

Statement
In linear bilateral network containing more than one generator, current flowing through any
branch is the algebraic sum of current flowing through that branch when generators are
considered one at a time replacing other generators by their internal impedance.

PROCEDURE

1. Connect the circuit as per the circuit diagram.

2. Switch on the DC power supplies (V 1, V2) and note down the corresponding ammeter
reading (IL).
3. Replace the power supply (V 2) by short circuit.
4. Switch on the DC power supply (V 1) and note down the ammeter reading (I1).
5. Connect back the power supply (V 2).
6. Replace the power supply (V 1) by short circuit.
7. Switch on the DC power supply (V 2) and note down the ammeter reading (I2).
8. Verify the condition: IL = I1 + I2

VIVA-VOCE QUESTIONS

1. Write the formula for equivalent capacitance when the capacitors are connected in series.

2. Write the formula for equivalent capacitance when the capacitors are connected in parallel.

3. When an inductor makes its presence known in a circuit?

 94

CIRCUIT DIAGRAM

ACTUAL CIRCUIT
1K 1K

+
IL A (0-10)mA
V1 V2
-
20 V 10V

1K

IL =________

CIRCUIT TO FIND CURRENT DUE TO VOLTAGE SOURCE V 1 (I1)

1K 1K

+
I1 A (0-10)mA
V1
-
20 V

1K

I1 =________

CIRCUIT TO FIND CURRENT DUE TO VOLTAGE SOURCE V 2 (I2)

1K 1K

+
I2 A (0-10)mA
V2
-
10V

1K

I2 =________
 95

VIVA-VOCE QUESTIONS

4. By what factor is the inductance of a coil increased when the number of turns is doubled?

5. Distinguish between an inductor and inductance.

6. When a capacitor makes its presence known in circuit? Explain.

7. What are lumped elements?

8. Define network.

9. State superposition theorem.

10. Where we can use superposition theorem.

THEORETICAL VERIFICATION

RESULT
Thus the Norton’s circuit is verified for a given circuit and the following results were
obtained.

Actual Current IL
Current Due To V 1 (I1)
Current Due To V 2 (I2)
IL = I1 + I2
96
 97

EXPERIMENT NO. : 15
DATE:

VERIFICATION OF MAXIMUM POWER TRANSFER THEOREM

AIM
To verify the Maximum power transfer theorem for a given circuit.

APPARATUS REQUIRED

EQUIPMENT RANGE
Power supply (0-30)V
Ammeter (0-30)mA
Resistors 1K,10K,DRB
Ohm meter -
Bread board & -
wires

THEORY

Statement
In any linear bilateral network maximum power will be transferred from the voltage source
to the load when the load impedance is equal to source impedance.

PROCEDURE

1. Connections are made as per circuit diagram.

2. Switch on the power supply.
3. Vary the resistance using DRB.
4. Note down the ammeter readings (IL).
5. Tabulate the readings and calculate the power.

VIVA-VOCE QUESTIONS

1. What are discrete elements?

2. Describe about voltage divider rule.

3. Describe about current divider rule.

 98

CIRCUIT DIAGRAM

ACTUAL CIRCUIT

1K 1K (0-30)mA
+ -
A

IL
25V 10K RL
10K

CIRCUIT TO FIND SOURCE RESISTANCE (R S)

1K 1K

Ohm
10K RS
10K Meter

TABULATION

SL. RL IL P = IL2 RL
NO. (Ω) (mA) (mW)
1
2
3
4
5
6
7
8
9
10
 99

VIVA-VOCE QUESTIONS

4. Distinguish between node and independent node.

5. Distinguish between a mesh and a loop of a circuit.

6. Which has the greater capacitance, two equal capacitors in series or in parallel?

7. What is meant by source transformation? Explain.

8. What is superposition? Explain.

9. State maximum power transfer theorem.

10. What is the significance of maximum power transfer theorem?

THEORETICAL VERIFICATION

RESULT
Thus the maximum power transfer thermo was verified and for the given circuit maximum
power was transferred if RS __________ = RL = _____________.
100
 101

EXPERIMENT NO. : 16
DATE:

VERIFICATION OF RECIPROCITY THEOREM

AIM
To verify the reciprocity theorem for a given circuit.

APPARATUS REQUIRED

EQUIPMENT RANGE
Power supply (0-30)V
Ammeter (0-30)mA
Resistors 100 ,470 ,940
Bread board & -
wires

THEORY

Statement
In any linear bilateral network the ratio of voltage to current response, in any element to the
input is constant even the position of the input and output are interchanged.

PROCEDURE

1. Connections are given as per the circuit diagram.

2. Note down the ammeter reading and find the ratio of output current to the input voltage.
3. Interchange the position of ammeter and voltage source.
4. Note down the ammeter reading and find the ratio of output current and input voltage.
5. Compare this value with the value obtained in step.2.

VIVA-VOCE QUESTIONS

1. What is called linear network?

2. What is called bilateral network?

3. State reciprocity theorem.

4. Mention the applications of reciprocity theorem.

 102

CIRCUIT DIAGRAM

CIRCUIT - I

940 100

IT IL

470 100
(0 -30)V
+
A (0 - 30)mA
-

CIRCUIT – II

940 100

IT IL

470 100
+
(0 - 30)mA A
(0 -30)V
-

TABULATION

CIRCUIT – I CIRCUIT - II
VOLTAGE CURRENT Z = V/I VOLTAGE CURRENT Z = V/I
V I V I
 103

THEORETICAL VERIFICATION

RESULT
Thus the reciprocity theorem was verified for a given circuit.
104
 105

EXPERIMENT NO. : 17
DATE:

SERIES RESONANCE CIRCUIT

AIM
To design and set up a series resonant circuit and to measure its resonant frequency,
bandwidth and quality factor.

APPARATUS REQUIRED

EQUIPMENT RANGE
AFO (0-2)MHz
Capacitor 0.01 uF
Resistors 5.6K
DIB 56 mH
Bread board & -
wires

THEORY
A circuit is said to be in resonance, when the applied voltage V and the resulting current I is
inphase. It means, at a particular frequency called resonance frequency the capacitive reactance
XC equals the inductive reactance X L and the circuit behaves as a purely resistive network. i.e.
2 foL = 1/2 foC. So, fo = 1/2 LC.
Since the impedance is minimum at resonance frequency, the current through the network
will be maximum. An ideal series resonance circuit acts as an ON switch for the supply at resonant
frequency and acts as an OFF switch for all other frequencies. That is, the circuit accepts signals
of a frequency only. Hence a series resonant circuit is also called as an acceptor circuit.
The graph of current versus frequency is plotted. At the resonant frequency f o, the current is
maximum (IO). Two points at which the current is 0.707 of its maximum are indicated. These points
are called half power points. The frequencies corresponding to half power points are f1 and f2.
The difference between these frequencies is called the bandwidth of the circuit. i.e. bandwidth =
f2 – f1.
Quality factor of a series resonant circuit is given by the expression Q O = OL/R = 1/ OCR.
Quality factor can also be expressed as the ratio of resonant frequency to the bandwidth. Hence
QO = fO/B.W.

PROCEDURE

1. Set up the circuit on bread board after testing the components using a multimeter.
2. Set the signal generator output at 2V peak to peak sine wave and feed it to the input of the
circuit and observe the input and output of the circuit across the resistor simultaneously on
the CRO screen.
3. Vary the input from Hz range to higher KHz range and note the frequency of the signal and
corresponding voltages across the resistor. Enter it in the tabular column and draw the
graph with frequency along X-axis and current along Y-axis.
4. Mark fo and half power points on the graph. Measure the bandwidth from the graph and
calculate Q of the circuit using the formula Q = fo/BW.
 106

DESIGN

1. Resonant frequency is given by the expression: fo = 1/2 LC

2. Let fo be 5 KHz
3. To avoid the over loading of the signal generator take R = 10 times of the output impedance
of the function generator. Take R = 5.6 K .
4. Take C = 0.01 F, then L = 56 mH.

CIRCUIT DIAGRAM
VO
C
R L

5.6 K 56 mH
0.01 uF

VIN
2V

TABULATION

FREQ Vo I = VO/R FREQ Vo I = VO/R FREQ Vo I = VO/R

(Hz) (mV) Amps (Hz) (mV) Amps (Hz) (mV) Amps
10 500 8k
20 600 9k
30 700 10k
40 800 20k
50 900 30k
60 1k 40k
70 2k 50k
80 3k 60k
90 4k 70k
100 5k 80k
200 6k 90k
300 7k 100k
400

MODEL GRAPH

I
Ampere

IO

0.707 IO

f1 f0 f2
f
Hz
 107

VIVA-VOCE QUESTIONS

1. Define resonance.

2. Why the series RLC resonant circuit is called acceptor circuit?

3. What change can be observed on the graph of RLC series circuit, if the resistance in the
circuit is increased?

4. Why the cut off frequency points are referred to as half power points?

5. State the application of series resonant circuit.

6. How does the coil resistance affect the performance of the series resonant circuit?

RESULT
Thus a series resonant circuit was designed, implemented and the following results were
obtained.

Resonant frequency fc
Bandwidth BW
Quality factor Q
108
 109

EXPERIMENT NO. : 18
DATE:

PARALLEL RESONANCE CIRCUIT

AIM
To design and set up a parallel resonant circuit and to measure its resonant frequency,
bandwidth and quality factor.

APPARATUS REQUIRED

EQUIPMENT RANGE
AFO (0-2)MHz
Capacitor 0.01 uF
Resistors 5.6K,100
DIB 56 mH
Bread board & -
wires

THEORY
A circuit is said to be in resonance, when the applied voltage V and the resulting current I is
inphase. It means, at a particular frequency called resonance frequency the capacitive reactance
XC equals the inductive reactance X L and the circuit behaves as a purely resistive network. i.e.
2 foL = 1/2 foC. So, fo = 1/2 LC.
In the parallel resonance circuit, the current through the inductor IL and that through the
capacitor IC are in opposite phase and it will cancel each other at the resonance frequency fo. So,
the impedance offered by an idea parallel resonant circuit is infinite at f o. It means that an ideal
parallel resonant circuit behaves as an OFF switch at resonance frequency. For all other
frequencies, the impedance becomes small and the circuit acts as an ON switch. That is, the
parallel LC circuit rejects supply at the frequency fo. Hence the circuit is also called as rejecter.
The graph of current versus frequency is plotted. At the resonant frequency fo, the current is
maximum (IO). Two points at which the current is 0.707 of its maximum are indicated. These points
are called half power points. The frequencies corresponding to half power points are f1 and f2.
The difference between these frequencies is called the bandwidth of the circuit. i.e. bandwidth =
f2 – f1.
Quality factor of a parallel resonant circuit is given by the expression Q O = R/ OL = OCR.
Quality factor can also be expressed as the ratio of resonant frequency to the bandwidth. Hence
QO = fO/B.W.

PROCEDURE

1. Set up the circuit on bread board after testing the components using a multimeter.
2. Set the signal generator output at 2V peak to peak sine wave and feed it to the input of the
circuit and observe the input and output of the circuit across the resistor simultaneously on
the CRO screen.
3. Vary the input from Hz range to higher KHz range and note the frequency of the signal and
corresponding voltages across the resistor. Enter it in the tabular column and draw the
graph with frequency along X-axis and current along Y-axis.
4. Mark fo and half power points on the graph. Measure the bandwidth from the graph and
calculate Q of the circuit using the formula Q = fo/BW.
 110

DESIGN

1. Resonant frequency is given by the expression: fo = 1/2 LC

2. Let fo be 5 KHz
3. To avoid the over loading of the signal generator take R = 10 times of the output impedance
of the function generator. Take R = 5.6 K .
4. Take C = 0.01 F, then L = 56 mH.
5. Take RL = 100 to limit the current through the inductor.

CIRCUIT DIAGRAM
R

5.6 K
RL 100
VIN C
2V
0.01 uF
L 56 mH

TABULATION

FREQ Vo I = VO/R FREQ Vo I = VO/R FREQ Vo I = VO/R

(Hz) (mV) Amps (Hz) (mV) Amps (Hz) (mV) Amps
10 500 8k
20 600 9k
30 700 10k
40 800 20k
50 900 30k
60 1k 40k
70 2k 50k
80 3k 60k
90 4k 70k
100 5k 80k
200 6k 90k
300 7k 100k
400

MODEL GRAPH

I
Ampere

0.707 IO

IO

f
f1 f0 f2
Hz
 111

VIVA-VOCE QUESTIONS

1. What is called parallel resonance circuit?

2. Why the parallel RLC resonant circuit is called rejecter circuit?

3. Define cut off frequency.

4. Define band width.

5. What are the applications of parallel LC circuits?

6. Define Q factor.

7. Compare series and parallel resonance circuits.

RESULT
Thus a parallel resonant circuit was designed, implemented and the following results were
obtained.

Resonant frequency fc
Bandwidth BW
Quality factor Q
112
 113

EXPERIMENT NO. : 19
DATE:

AUGMENTED EXPERIMENT
CHARACTERISTICS OF LED

AIM
To plot the VI characteristics of a Light Emitting Diode (LED).

APPARATUS REQUIRED

EQUIPMENT RANGE
Power supply (0-15)V
Ammeter (0-100)mA
Voltmeter (0-10)V
Resistors 100Ω
Bread board & -
wires
LED -

THEORY
A PN junction diode, emits light on forward biasing, is known as light emitting diode. The
emitted light may be either in the visible range, and the intensity of light depends on the applied
potential.
In a PN junction charge carrier recombination takes place when the electrons cross from
the N-layer to the P-layer. The electrons are in conduction band on the P-side while the holes are
in the valance ban on the P-side the conduction band has a higher energy level compared to the
valance band and so when the electrons recombines with a hole the difference in energy is given
out in the form of heat or light. In case of silicon or germanium, the energy dissipation in the form
of heat, where in the case of gallium- arsenide and gallium-phosphide, it is in the form of heat. But
this light is in the invisible region and so these materials cannot used in the manufacture of LED.
Hence gallium-arsenide phosphide which emits light in the visible region is used to manufacture
an LED.

PROCEDURE

1. Connect the circuit as per the circuit diagram.

2. Vary the power supply voltage in such a way that the readings are taken in steps of 0.1 V in
the voltmeter.
3. Note down the corresponding ammeter readings.
4. Plot the graph: V against I
 114

CIRCUIT DIAGRAM

LED
R
+ -
A
100 (0-100)mA

(0-15)V
V
+ -
(0-10)V

TABULATION

Sl. SUPPLY VF IF
No. VOLTAGE (V) (mA)
1
2
3
4
5
6
7
8
9
10

MODEL GRAPH

IF

mA

VF Volts
 115

VIVA-VOCE QUESTIONS

1. What is a LED?

2. How light is emitted from LED?

3. Name some semiconductor material used to form LED.

4. What is the advantage of LED?

5. Name some applications of the LED.

RESULT
Thus the VI characteristic of a light emitting diode was studied and the graph was plotted.
 116

RESISTOR COLOUR CODING

1st 2nd
COLOR MULTIPLIER TOLERANCE
DIGIT DIGIT
BLACK 0 0 1 Silver +/-10%; Gold +/-5%
BROWN 1 1 10 Silver +/-10%; Gold +/-5%
RED 2 2 100 Silver +/-10%; Gold +/-5%
ORANGE 3 3 1,000 Silver +/-10%; Gold +/-5%
YELLOW 4 4 10,000 Silver +/-10%; Gold +/-5%
GREEN 5 5 100,000 Silver +/-10%; Gold +/-5%
BLUE 6 6 1,000,000 Silver +/-10%; Gold +/-5%
VIOLET 7 7 10,000,000 Silver +/-10%; Gold +/-5%
GRAY 8 8 100,000,000 Silver +/-10%; Gold +/-5%
WHITE 9 9 1,000,000,000 Silver +/-10%; Gold +/-5%

RESISTANCE = (1ST DIGIT X 10 + 2ND DIGIT) X MULTIPLIER