Behzad Razavi Microelectronics Notes

Fundamentals of Microelectronics
 CH1 Why Microelectronics?

 CH2 Basic Physics of Semiconductors
 CH3 Diode Circuits
 CH4 Physics of Bipolar Transistors
 CH5 Bipolar Amplifiers
 CH6 Physics of MOS Transistors
 CH7 CMOS Amplifiers
 CH8 Operational Amplifier As A Black Box
1
Chapter 1 Why Microelectronics?
 1.1 Electronics versus Microelectronics
 1.2 Example of Electronic System: Cellular Telephone
 1.3 Analog versus Digital
2
Cellular Technology
 An important example of microelectronics.

 Microelectronics exist in black boxes that process the received
and transmitted voice signals.
CH1 Why Microelectronics? 3
Frequency Up-conversion
 Voice is “up-converted” by multiplying two sinusoids.

 When multiplying two sinusoids in time domain, their spectra
are convolved in frequency domain.
Transmitter
 Two frequencies are multiplied and radiated by an antenna in

(a).
 A power amplifier is added in (b) to boost the signal.

Receiver
 High frequency is translated to DC by multiplying by fC

.
 A low-noise amplifier is needed for signal boosting without
excessive noise.
Digital or Analog?
 X1
(
t
)i
s
op
er
a
t
i
ng
at
1
00
M
b/
s
a
nX
(
d
2t
)
i
so
pe
r
a
t
i
ng
at
1
Gb
/
s.
 A digital signal operating at very high frequency is very “analog”.

Chapter 2 Basic Physics of Semiconductors
 2.1 Semiconductor materials and their properties
 2.2 PN-junction diodes
 2.3 Reverse Breakdown
8
Semiconductor Physics
 Semiconductor devices serve as heart of microelectronics.

 PN junction is the most fundamental semiconductor device.
CH2 Basic Physics of Semiconductors 9

Charge Carriers in Semiconductor
 To understand PN junction’s IV characteristics, it is important to

understand charge carriers’ behavior in solids, how to modify
carrier densities, and different mechanisms of charge flow.

Periodic Table
 This abridged table contains elements with three to five valence

electrons, with Si being the most important.

Silicon
 Si has four valence electrons. Therefore, it can form covalent

bonds with four of its neighbors.
 When temperature goes up, electrons in the covalent bond can
become free.

Electron-Hole Pair Interaction
 With free electrons breaking off covalent bonds, holes are

generated.
 Holes can be filled by absorbing other free electrons, so
effectively there is a flow of charge carriers.

Free Electron Density at a Given Temperature
15 3 /2
 E g 3
n i  5 . 2  10 T exp electrons / cm
2 kT
0 10 3
n i ( T  300 K )  1 . 08  10 electrons / cm
0 15 3
n i ( T  600 K )  1 . 54  10 electrons / cm
 Eg ,or bandga p en er
g ydeter
m ine s how m uch ef
fort i
s ne ed e
d
to break offan e l
ectron f
rom itsc ovalent bond.
 There exists an exponential relationship between the free-
electron density and bandgap energy.

Doping (N type)
 Pure Si can be doped with other elements to change its

electrical properties.
 For example, if Si is doped with P (phosphorous), then it has
more electrons, or becomes type N (electron).

Doping (P type)
 If Si is doped with B (boron), then it has more holes, or becomes

type P.

Summary of Charge Carriers

Electron and Hole Densities
2
np  n i
Majority Carriers : p  N A
2
ni
Minority Carriers : n 
N A
Majority Carriers : n  ND
2
ni
Minority Carriers : p 
ND
 The product of electron and hole densities is ALWAYS equal to

the square of intrinsic electron density regardless of doping
levels.

First Charge Transportation Mechanism: Drift
 
vh   p
E
 
ve    n E
 The process in which charge particles move because of an

electric field is called drift.
 Charge particles will move at a velocity that is proportional to
the electric field.

Current Flow: General Case
I   v W  h  n  q
 Electric current is calculated as the amount of charge inv

meters that passes thru a cross-section if the charge travel with
v m/s.
a velocity of
Current Flow: Drift
Jn  n E  n  q
J tot  n E  n  q   p E  p  q
 q ( n n   p p ) E
 Since velocity is equal to E, drift characteristic is obtained by

substituting V with E in the general current equation.
 The total current density consists of both electrons and holes.

Velocity Saturation
0
 
1  bE
0
v sat 
b
0
v  E
 0E
1
v sat
 A topic treated in more advanced courses is velocity saturation.

 In reality, velocity does not increase linearly with electric field. It
will eventually saturate to a critical value.

Second Charge Transportation Mechanism: Diffusion
 Charge particles move from a region of high concentration to a

region of low concentration. It is analogous to an every day
example of an ink droplet in water.
Current Flow: Diffusion
dn dp
I  AqD n
J p   qD p
dx dx
dn dn dp
J n  qD n
J tot  q ( D n  D p
)
dx dx dx
 Diffusion current is proportional to the gradient of charge (dn/dx)

along the direction of current flow.
 Its total current density consists of both electrons and holes.

Example: Linear vs. Nonlinear Charge Density Profile
dn N dn  qD n N  x
J n  qD n
  qD n
 J n  qD  exp
dx L dx Ld Ld
 Linear charge density profile means constant diffusion current,

whereas nonlinear charge density profile means varying
diffusion current.

Einstein's Relation
D kT

 q
 While the underlying physics behind drift and diffusion currents

are totally different, Einstein’s relation provides a mysterious
link between the two.
PN Junction (Diode)
 When N-type and P-type dopants are introduced side-by-side in

a semiconductor, a PN junction or a diode is formed.
Diode’s Three Operation Regions
 In order to understand the operation of a diode, it is necessary

to study its three operation regions: equilibrium, reverse bias,
and forward bias.

Current Flow Across Junction: Diffusion
 Because each side of the junction contains an excess of holes

or electrons compared to the other side, there exists a large
concentration gradient. Therefore, a diffusion current flows
across the junction from each side.
Depletion Region
 As free electrons and holes diffuse across the junction, a region

of fixed ions is left behind. This region is known as the
“depletion region.”

Current Flow Across Junction: Drift
 The fixed ions in depletion region create an electric field that

results in a drift current.

Current Flow Across Junction: Equilibrium
I drift ,p
 I diff ,p
I drift ,n
 I diff ,n
 At equilibrium, the drift current flowing in one direction cancels

out the diffusion current flowing in the opposite direction,
creating a net current of zero.
 The figure shows the charge profile of the PN junction.

Built-in Potential
dp dV dp
q  p pE   qD p
 pp  D p
dx dx dx
x2 pn
dp D pp
 p  dV  D p  V ( x 2 )  V ( x1 ) 
p
ln
x1 pp p  p
pn
kT pp kT N AN D
V0  ln ,V0  ln 2
q pn q ni
 Because of the electric field across the junction, there exists a

built-in potential. Its derivation is shown above.

Diode in Reverse Bias
 When the N-type region of a diode is connected to a higher

potential than the P-type region, the diode is under reverse bias,
which results in wider depletion region and larger built-in
electric field across the junction.
Reverse Biased Diode’s Application: Voltage-Dependent
Capacitor
 The PN junction can be viewed as a capacitor. By varying VR

,
thedeple t
ion w i
d t
h chan ges,chan gingit
s c apa ci
tan ce value
;
ther
e f
ore ,
the PN juncti
o n i
sactua l
ly avoltage -depe nde nt
capaci
to r.
Voltage-Dependent Capacitance
C j0
C j

VR
1
V0
 si q N A N D 1
C j0

2 N A
 N D V0
 The equations that describe the voltage-dependent capacitance

are shown above.

Voltage-Controlled Oscillator
1 1
f res 
2 LC
 A very important application of a reverse-biased PN junction is

VCO, in which an LC tank is used in an oscillator. By changing VR
,
we ca n change C ,wh i
c ha l
s och an ges theo s ci
ll
a ti
on f
requenc y.

Diode in Forward Bias
 When the N-type region of a diode is at a lower potential than

the P-type region, the diode is in forward bias.
 The depletion width is shortened and the built-in electric field
decreased.

Minority Carrier Profile in Forward Bias
p p,e
pn,e 
V0
exp
VT
p p, f
pn, f 
V0  VF
exp
VT
 Under forward bias, minority carriers in each region increase

due to the lowering of built-in field/potential. Therefore,
diffusion currents increase to supply these minority carriers.

Diffusion Current in Forward Bias
ND VF N VF
np  (exp  1)  pn  A
(exp  1)
V0 VT V0 VT
exp exp
VT VT
NA VF ND VF
I tot  (exp  1)  (exp  1)
V0 VT V0 VT
exp exp
VT VT
VF 2 Dn D p
I tot  I s (exp  1) I s  Aqn i
(  )
VT N ALn NDLp
 Diffusion current will increase in order to supply the increase in

minority carriers. The mathematics are shown above.

Minority Charge Gradient
 Minority charge profile should not be constant along the x-axis;

otherwise, there is no concentration gradient and no diffusion
current.
 Recombination of the minority carriers with the majority carriers
accounts for the dropping of minority carriers as they go deep
into the P or N region.
Forward Bias Condition: Summary
 In forward bias, there are large diffusion currents of minority

carriers through the junction. However, as we go deep into the
P and N regions, recombination currents from the majority
carriers dominate. These two currents add up to a constant
value.

IV Characteristic of PN Junction
VD
I D  I S (exp  1)
VT
 The current and voltage relationship of a PN junction is

exponential in forward bias region, and relatively constant in
reverse bias region.

Parallel PN Junctions
 Since junction currents are proportional to the junction’s cross-

section area. Two PN junctions put in parallel are effectively
one PN junction with twice the cross-section area, and hence
twice the current.

Constant-Voltage Diode Model
 Diode operates as an open circuit if VD

<
V
D,
o
nan
daco
n
s
t
a
nt
volt
ag esou r
c eo fV D
,o
n i
fV Dte nds t o ex
c
e
edVD
,
o
n.

Example: Diode Calculations
I
V X  I X R 1  V D  I X R 1  V T ln X
IS
I X
 2 . 2 mA for V X  3V
I X
 0 . 2 mA for V X  1V
 This example shows the simplicity provided by a constant-

voltage model over an exponential model.
 For an exponential model, iterative method is needed to solve
for current, whereas constant-voltage model requires only linear
equations.
Reverse Breakdown
 When a large reverse bias voltage is applied, breakdown occurs

and an enormous current flows through the diode.
Zener vs. Avalanche Breakdown
 Zener breakdown is a result of the large electric field inside the

depletion region that breaks electrons or holes off their
covalent bonds.
 Avalanche breakdown is a result of electrons or holes colliding
with the fixed ions inside the depletion region.
Chapter 3 Diode Circuits
 3.1 Ideal Diode
 3.2 PN Junction as a Diode
 3.3 Applications of Diodes
49
Diode Circuits
 After we have studied in detail the physics of a diode, it is time

to study its behavior as a circuit element and its many
applications.
CH3 Diode Circuits 50
Diode’s Application: Cell Phone Charger
 An important application of diode is chargers.

 Diode acts as the black box (after transformer) that passes only
the positive half of the stepped-down sinusoid.
Diode’s Action in The Black Box (Ideal Diode)
 The diode behaves as a short circuit during the positive half

cycle (voltage across it tends to exceed zero), and an open
circuit during the negative half cycle (voltage across it is less
than zero).

Ideal Diode
 In an ideal diode, if the voltage across it tends to exceed zero,

current flows.
 It is analogous to a water pipe that allows water to flow in only
one direction.
Diodes in Series
 Diodes cannot be connected in series randomly. For the circuits

above, only a) can conduct current from A to C.

IV Characteristics of an Ideal Diode
V V
R  0 I    R    I   0
R R
 If the voltage across anode and cathode is greater than zero,

the resistance of an ideal diode is zero and current becomes
infinite. However, if the voltage is less than zero, the resistance
becomes infinite and current is zero.
Anti-Parallel Ideal Diodes
 If two diodes are connected in anti-parallel, it acts as a short for

all voltages.
Diode-Resistor Combination
 The IV characteristic of this diode-resistor combination is zero

for negative voltages and Ohm’s law for positive voltages.

Diode Implementation of OR Gate
 The circuit above shows an example of diode-implemented OR

gate.
 Voutc a
n on lybe eitherVAor VB,no
t both .

Input/Output Characteristics
 When Vi
i
nsl
e
ss
t
ha
n
z
er
o
,
th
ed
i
o
de
op
e
n
s
,
so
V=
o
u
tV
i
n.
 When Vi
i
nsg
r
e
a
te
r
t
ha
n
z
er
o
,
th
ed
i
o
de
sh
o
r
t
s
,
so
V=
o
u
t0
.
Diode’s Application: Rectifier
 A rectifier is a device that passes positive-half cycle of a

sinusoid and blocks the negative half-cycle or vice versa.
 When Vi n is
g
r
ea
te
r than 0 ,di
ode shor t
s ,so Vout= V i
n;ho w e
v
e
r
,
w h en V in i s
l
e
ss
t
ha n0 ,di
o de opens,n o curren tfl ow s t
h ruR
,
1
V o ut = IR 1
CH3 Diode Circuits
R=
0
1. 60
Signal Strength Indicator
V out  V p sin  t  0 for 0  t 

T
2
1 T
1 T /2
V out , avg   V out ( t ) dt   V p sin  tdt

T 0 T 0
1 Vp T /2 Vp T
   cos  t 0  for  t  T
2
T  
 The averaged value of a rectifier output can be used as a signal

strength indicator for the input, since Vo
u
t
,
av
g i
s proporti
o na ltoV p,
the i
np ut si
g nal’
s am p li
tud e.

Diode’s application: Limiter
 The purpose of a limiter is to force the output to remain below certain

value.
 In a), the addition of a 1 V battery forces the diode to turn on after V1
h as b eco m eg reater tha n 1V .
Limiter: When Battery Varies
 An interesting case occurs when VB

(
b
at
t
e
r
y)
v
ar
i
e
s.
 Rectification fails if VB
i
s
gr
ea
t
e
r
th
a
nt
h
ei
n
pu
ta
m
p
l
i
tu
d
e.
Different Models for Diode
 So far we have studied the ideal model of diode. However,

there are still the exponential and constant voltage models.
Input/Output Characteristics with Ideal and Constant-
Voltage Models
 The circuit above shows the difference between the ideal and
constant-voltage model; the two models yield two different
break points of slope.
Input/Output Characteristics with a Constant-Voltage
Model
 When using a constant-voltage model, the voltage drop across

the diode is no longer zero but Vd
,
o
nwhe n i
t con ducts.

Another Constant-Voltage Model Example
 In this example, since Vin is connected to the cathode, the diode

conducts when Vin is very negative.
 The break point where the slope changes is when the current
across R1 is equal to the current across R2.
Exponential Model
I in
I D1 
I s2
1
I s1
I in
ID2 
I s1
1
I s2
 In this example, since the two diodes have different cross-

section areas, only exponential model can be used.
 The two currents are solved by summing them with Ii n,and
e qua ti
n gthe
ir vo l
tage s.
Another Constant-Voltage Model Example
 This example shows the importance of good initial guess

and careful confirmation.
Cell Phone Adapter
V out  3V D
Ix  3V T ln
I X
Is
 Vo
=
u
t3
VD
,
o
ni
su
s
ed
t
o
ch
a
r
ge
c
e
l
lp
h
o
ne
s
.
 However, if Ix changes, iterative method is often needed to obtain
a solution, thus motivating a simpler technique.

Small-Signal Analysis
V
I D
 I D1
VT
 Small-signal analysis is performed around a bias point by

perturbing the voltage by a small amount and observing the
resulting linear current perturbation.
Small-Signal Analysis in Detail
I D dI
 D
|VD VD 1
VD dV D
Is I D1
 exp
VT VT
I D1

VT
 If two points on the IV curve of a diode are close enough, the

trajectory connecting the first to the second point is like a line,
with the slope being the proportionality factor between change
in voltage and change in current.
Small-Signal Incremental Resistance
VT
rd 
ID
 Since there’s a linear relationship between the small signal

current and voltage of a diode, the diode can be viewed as a
linear resistor when only small changes are of interest.
Small Sinusoidal Analysis
V0 VT
V ( t )  V 0  V p cos  t I D
(t )  I 0  I p
cos  t  I s exp  V p cos  t
VT I0
 If a sinusoidal voltage with small amplitude is applied, the

resulting current is also a small sinusoid around a DC value.
Cause and Effect
 In (a), voltage is the cause and current is the effect. In (b), the
other way around.
Adapter Example Revisited
3rd
v out  v ad
R1  3rd
 11 . 5 mV
 With our understanding of small-signal analysis, we can revisit

our cell phone charger example and easily solve it with just
algebra instead of iterations.
Simple is Beautiful
 V out   I D  ( 3 r d )
 0 . 5 mA ( 3  4 . 33  )
 6 . 5 mV
 In this example we study the effect of cell phone pulling some

current from the diodes. Using small signal analysis, this is
easily done. However, imagine the nightmare, if we were to
solve it using non-linear equations.
Applications of Diode

Half-Wave Rectifier
 A very common application of diodes is half-wave rectification,

where either the positive or negative half of the input is blocked.
 But, how do we generate aconstant output?

Diode-Capacitor Circuit: Constant Voltage Model
 If the resistor in half-wave rectifier is replaced by a capacitor, a

fixed voltage output is obtained since the capacitor (assumed
ideal) has no path to discharge.
Diode-Capacitor Circuit: Ideal Model
 Note that (b) is just like Vi

n
,o
nl
y
sh
i
ft
e
dd
o
wn
.

Diode-Capacitor With Load Resistor
 A path is available for capacitor to discharge. Therefore, Vo

u
t
willnot be con stan ta nd ari
p ple e xi
s ts.
Behavior for Different Capacitor Values
 For large C1
,
Vo
u
th
a
ss
m
a
l
lr
i
p
pl
e
.

Peak to Peak amplitude of Ripple
t
V out ( t )  (V p  V D , on ) exp 0  t  T in
RLC1
t V p  V D , on t
V out ( t )  (V p  V D , on )( 1  )  (V p  V D , on ) 
RLC1 RL C1
V p  V D , on T in V p  V D , on
VR   
RL C1 R L C 1 f in
 The ripple amplitude is the decaying part of the exponential.

 Ripple voltage becomes a problem if it goes above 5 to 10% of
the output voltage.

Maximum Diode Current
2V R Vp Vp 2V R
I p
 C 1 in V p   ( R L C 1 in  1)
Vp RL RL Vp
 The diode has its maximum current at t1

,
s
in
ce
t
h
a
t’
s
whe
n
t
h
e
sl
op e ofVouti
s t he g
reate
st.
 This current has to be carefully controlled so it does not
damage the device.
Full-Wave Rectifier
 A full-wave rectifier passes both the negative and positive half

cycles of the input, while inverting the negative half of the input.
 As proved later, a full-wave rectifier reduces the ripple by a
factor of two.

The Evolution of Full-Wave Rectifier
 Figures (e) and (f) show the topology that inverts the negative half
cycle of the input.
Full-Wave Rectifier: Bridge Rectifier
 The figure above shows a full-wave rectifier, where D1

a
n
dD
2
pass/i
nv ertthene gat
iv
e half cycl
e o fi
n put a ndD3 and
D
4p
a
ss
thep os
iti
v ehalfcycle
.
Input/Output Characteristics of a Full-Wave Rectifier
(Constant-Voltage Model)
 The dead-zone around Vi

a
nri
s
es
be
c
a
u
s
eV
m
i
nus
t
e
xc
e
e
d2
V
D
,
ONt
o turno nthe bri
dge .
Complete Full-Wave Rectifier
 Since C1
o
n
ly
ge
t
s
½o
fp
er
i
od
t
od
is
c
h
ar
g
e,
r
ip
pl
e
vo
l
ta
g
ei
s
decrea s
e
d
by
af
a
c
to
r
of
2.
Al
s
o(
b)
s
h
ow
st
ha
te
a
chd
i
o
de
i
s
subjecte
d
t
oa
pp
r
o
xi
m
at
el
y
on
eV
pr
e
v
er
s
eb
i
asd
r
op
(v
e
r
su
s
2V pi
n ha
l
f
-
wa
ve
r
e
ct
i
fi
er
).
Current Carried by Each Diode in the Full-Wave Rectifier

Summary of Half and Full-Wave Rectifiers
 Full-wave rectifier is more suited to adapter and charger

applications.
Voltage Regulator
 The ripple created by the rectifier can be unacceptable to

sensitive load; therefore, a regulator is required to obtain a very
stable output.
 Three diodes operate as a primitive regulator.
Voltage Regulation With Zener Diode
rD
V out  V in
rD  R1
 Voltage regulation can be accomplished with Zener diode.

Since rdissm all,l
a rgecha nge i
nthe inputw il
l n
ot be reflec t
e
d
at t
he ou t
put.
Line Regulation VS. Load Regulation
V out rD 1  rD 2 V out
  ( r D 1  r D 2 ) || R 1
V in rD 1  rD 2  R1 IL
 Line regulation is the suppression of change in Vo

d
u
u
tet
o
c
h a n g e in V
i
n(
b)
.
 Load regulation is the suppression of change in Vo
d
u
tu
et
o
CH3 c
h a n
Diode g e in
Circuits l
o
ad
cu
rr
en t(c)
. 95
Evolution of AC-DC Converter

Limiting Circuits
 The motivation of having limiting circuits is to keep the signal

below a threshold so it will not saturate the entire circuitry.
 When a receiver is close to a base station, signals are large and
limiting circuits may be required.

Input/Output Characteristics
 Note the clipping of the output voltage.

Limiting Circuit Using a Diode:
Positive Cycle Clipping
 As was studied in the past, the combination of resistor-diode

creates limiting effect.
Negative Cycle Clipping

Positive and Negative Cycle Clipping

General Voltage Limiting Circuit
 Two batteries in series with the antiparalle diodes control the

limiting voltages.

Non-idealities in Limiting Circuits
 The clipping region is not exactly flat since as Vin increases, the
currents through diodes change, and so does the voltage drop.

Capacitive Divider
C1
 V out   V in  V out   V in
C1  C 2

Waveform Shifter: Peak at -2Vp
 As Vi
i
nn
cr
e
a
se
s
,D
t
1u
r
n
s
on
an
d
V
o
u
ti
s
ze
r
o.
 As Vi
d
nec
r
e
a
se
s
,D
1t
u
r
ns
o
ff
,
an
dV
o
u
td
r
op
s
w
it
h
Vf
i
nr
om
z
e
ro
.
The l
o
wes
t
V
oc
a
u
tng
o
i
s-
2
V,
d
po
ub
l
i
n
gt
he
v
o
l
ta
g
e.
Waveform Shifter: Peak at 2Vp
 Similarly, when the terminals of the diode are switched, a

voltage doubler with peak value at 2Vp can be con cei
ve d.
Voltage Doubler
 The output increases byVp

V
,pV
/
2
,pe
/
4
,t
ci
n
ea
ch
i
n
pu
tc
y
c
l
e
,
even
tua l
lysett l
ing t
o2Vp .
Current thru D1
i
n
Vo
lt
a
g
eD
ou
b
l
e
r

Another Application: Voltage Shifter

Voltage Shifter (2VD
,
O
N)

Diode as Electronic Switch
 Diode as a switch finds application in logic circuits and data

converters.
Junction Feedthrough
C j /2
 V out   V in
C j /2  C1
 For the circuit shown in part e) of the previous slide, a small

feedthrough from input to output via the junction capacitors
exists even if the diodes are reverse biased
 Therefore, C1 has to belarge enough to m i
n i
m i
ze t
h is
fe e d t hr o
CH3 Diode Circuits
u
g
h
. 112
Chapter 4 Physics of Bipolar Transistors
 4.1 General Considerations
 4.2 Structure of Bipolar Transistor
 4.3 Operation of Bipolar Transistor in Active

Mode
 4.4 Bipolar Transistor Models
 4.5 Operation of Bipolar Transistor in

Saturation Mode
 4.6 The PNP Transistor

113
Bipolar Transistor
 In the chapter, we will study the physics of bipolar transistor and

derive large and small signal models.
CH4 Physics of Bipolar Transistors 114
Voltage-Dependent Current Source
V out
AV    KR L
V in
 A voltage-dependent current source can act as an amplifier.

 If KRLisgreatert
han 1 ,t
h en the si
gn ali
s am pl
ified .

Voltage-Dependent Current Source with Input
Resistance
 Regardless of the input resistance, the magnitude of

amplification remains unchanged.
Exponential Voltage-Dependent Current Source
 A three-terminal exponential voltage-dependent current source

is shown above.
 Ideally, bipolar transistor can be modeled as such.
Structure and Symbol of Bipolar Transistor
 Bipolar transistor can be thought of as a sandwich of three

doped Si regions. The outer two regions are doped with the
same polarity, while the middle region is doped with opposite
polarity.
Injection of Carriers
 Reverse biased PN junction creates a large electric field that

sweeps any injected minority carriers to their majority region.
 This ability proves essential in the proper operation of a bipolar
transistor.

Forward Active Region
 Forward active region: VB

>
0
E,
VB
C<
0
.
 Figure b) presents a wrong way of modeling figure a).

Accurate Bipolar Representation
 Collector also carries current due to carrier injection from base.

Carrier Transport in Base

Collector Current
2
A E qD n n i  V BE 
IC   exp  1
N EW B  VT 
V BE
IC  I S
exp
VT
2
A E qD n n i
I S

N EW B
 Applying the law of diffusion, we can determine the charge flow

across the base region into the collector.
 The equation above shows that the transistor is indeed a
voltage-controlled element, thus a good candidate as an
amplifier.
Parallel Combination of Transistors
 When two transistors are put in parallel and experience the

same potential across all three terminals, they can be thought
of as a single transistor with twice the emitter area.
Simple Transistor Configuration
 Although a transistor is a voltage to current converter, output

voltage can be obtained by inserting a load resistor at the
output and allowing the controlled current to pass thru it.

Constant Current Source
 Ideally, the collector current does not depend on the collector to

emitter voltage. This property allows the transistor to behave
as a constant current source when its base-emitter voltage is
fixed.
Base Current
IC  I B
 Base current consists of two components: 1) Reverse injection

of holes into the emitter and 2) recombination of holes with
electrons coming from the emitter.
Emitter Current
I E
 IC  I B
 1 
I E
 IC 1  
  
IC
 
I B
 Applying Kirchoff’s current law to the transistor, we can easily

find the emitter current.

Summary of Currents
V BE
I C
 I S
exp
VT
1 V BE
I B
 I S
exp
 VT
 1 V BE
I E
 I S
exp
 VT

 
 1

Bipolar Transistor Large Signal Model
 A diode is placed between base and emitter and a voltage

controlled current source is placed between the collector and
emitter.
Example: Maximum RL
 As RL i
ncrea ses,V xdrop s an
d even
tua l
lyforw ard b i
ase st
h
e
collector-
ba se j
u nction. Thi
s wil
lf
orce the transis t
o ro u
t
o
f
forw ardac ti
ve region .
 Therefore, there exists a maximum tolerable collector
resistance.
Characteristics of Bipolar Transistor

Example: IV Characteristics

Transconductance
d  V BE 
gm   I S exp 
dV BE  VT 
1 V BE
gm  I S exp
VT VT
IC
gm 
VT
 Transconductance, gm s
h
ow
sam
ea
s
u
r
eo
f
ho
w
w
el
l
th
e
tran s is t o r c o n v e r ts v
o
lt
a
ge
to
cu
r
re
n
t
.
 It will later be shown that gm i
so
n
eo
f
t
h
emo
s
t
i
mp
o
rt
a
nt
pa ra m e te r s in c ir c u
CH4 Physics of Bipolar Transistors
i
t
de
si
g
n. 134
Visualization of Transconductance
 gm
c
a
n
be
v
i
s
ua
l
i
ze
d
as
t
h
es
l
o
pe
of
I
v
Ce
r
s
us
V
B
E.
 A large IC
h
a
sa
l
a
rg
es
l
o
pe
an
d
t
h
er
e
f
or
e
al
a
r
geg
m
.
Transconductance and Area
 When the area of a transistor is increased by n, IS

i
n
cr
e
as
e
sb
y
n
.
Fo
ra c onstant VBE,ICa ndh enc e g mincreases by af
a
ct
o
ro
f
n
.

Transconductance and Ic
 The figure above shows that for a given VB

s
w
Ei
n
g,
t
hec
u
r
r
en
t
excursi
on a r
ound IC2i
sl
a rger tha n i
t w oul
db
e
ar
o
un
dI
C.
T
h
1i
si
s
because gm i
s l
arg erI
C.
2
Small-Signal Model: Derivation
 Small signal model is derived by perturbing voltage difference

every two terminals while fixing the third terminal and
analyzing the change in current of all three terminals. We then
represent these changes with controlled sources or resistors.

Small-Signal Model: VB
C
h
Ea
n
g
e

Small-Signal Model: VC
C
h
Ea
n
g
e
 Ideally, VCh
Easn o effec
t
o
nt
h
ec
ol
l
e
ct
or
c
ur
r
en
t
.
Th
u
s,
i
twi
l
l
n o tcon tr
i
buteto the sm
a
l
ls
i
g
na
l
mod
el
.
 It can be shown that VC
h
a
Bs
n
oe
f
fe
ct
on
t
hes
m
a
l
ls
i
gn
a
lmo
de
l
,
e ither
.
Small Signal Example I
IC 1
gm  
VT 3 . 75 

r   375 
gm
 Here, small signal parameters are calculated from DC operating

point and are used to calculate the change in collector current
due to a change in VBE.
Small Signal Example II
 In this example, a resistor is placed between the power supply

and collector, therefore, providing an output voltage.

AC Ground
 Since the power supply voltage does not vary with

time, it is regarded as a ground in small-signal
analysis.

Early Effect
 The claim that collector current does not depend on VC

i
s
En
ot
accura t
e.
 As VCEincrease s,th ed ep l
etionr egi
on be tween base an
d
coll
ec t
o ri
n cr
e ase s.T herefo r
e,th eeffectivebase w i
d t
h
decrea ses,wh ich leads to an i
n crease i
n the col
lectorc
u
rr
e
n
t.
Early Effect Illustration
 With Early effect, collector current becomes larger than usual

and a function of VC E.

Early Effect Representation

Early Effect and Large-Signal Model
 Early effect can be accounted for in large-signal model by

simply changing the collector current with a correction factor.
 In this mode, base current does not change.

Early Effect and Small-Signal Model
 V CE VA VA
ro   
IC V BE IC
I S exp
VT
Summary of Ideas

Bipolar Transistor in Saturation
 When collector voltage drops below base voltage and forward

biases the collector-base junction, base current increases and
decreases the current gain factor, .
Large-Signal Model for Saturation Region

Overall I/V Characteristics
 The speed of the BJT also drops in saturation.

Example: Acceptable VC
R
e
Cg
i
o
n
V CC  I C R C  (V BE  400 mV )
 In order to keep BJT at least in soft saturation region, the

collector voltage must not fall below the base voltage by more
than 400mV.
 A linear relationship can be derived for VC Cand RCand an
a ccepta ble r
e gionc an be cho sen.
Deep Saturation
 In deep saturation region, the transistor loses its voltage-

controlled current capability and VCE bec o mes con stant.

PNP Transistor
 With the polarities of emitter, collector, and base reversed, a

PNP transistor is formed.
 All the principles that applied to NPN's also apply to PNP’s, with
the exception that emitter is at a higher potential than base and
base at a higher potential than collector.
A Comparison between NPN and PNP Transistors
 The figure above summarizes the direction of current flow and

operation regions for both the NPN and PNP BJT’s.

PNP Equations
V EB
I C  I S exp
VT
IS V EB
IB  exp
 VT
 1 V EB
IE  I S exp
 VT
 V EB   V EC 
Early Effect IC   I S exp 1  
 VT  VA 

Large Signal Model for PNP

PNP Biasing
 Note that the emitter is at a higher potential than both the base
and collector.
Small Signal Analysis

Small-Signal Model for PNP Transistor
 The small signal model for PNP transistor is exactly IDENTICAL

to that of NPN. This is not a mistake because the current
direction is taken care of by the polarity of VB
E
.
Small Signal Model Example I

Small Signal Model Example II
 Small-signal model is identical to the previous ones.

Small Signal Model Example III
 Since during small-signal analysis, a constant voltage supply is

considered to be AC ground, the final small-signal model is
identical to the previous two.
Small Signal Model Example IV

Chapter 5 Bipolar Amplifiers
 5.2 Operating Point Analysis and Design
 5.3 Bipolar Amplifier Topologies
 5.4 Summary and Additional Examples
166
Bipolar Amplifiers
CH5 Bipolar Amplifiers 167

Voltage Amplifier
 In an ideal voltage amplifier, the input impedance is infinite and

the output impedance zero.
 But in reality, input or output impedances depart from their ideal
values.
Input/Output Impedances
Vx
Rx 
ix
 The figure above shows the techniques of measuring input and
output impedances.
Input Impedance Example I
vx
 r
ix
 When calculating input/output impedance, small-signal analysis
is assumed.
Impedance at a Node
 When calculating I/O impedances at a port, we usually ground

one terminal while applying the test source to the other
terminal of interest.
Impedance at Collector
R out  r o
 With Early effect, the impedance seen at the collector is equal

to the intrinsic output impedance of the transistor (if emitter is
grounded).
Impedance at Emitter
vx 1

ix 1
gm 
r
1
R out 
gm
(V A  )
 The impedance seen at the emitter of a transistor is

approximately equal to one over its transconductance (if the
base is grounded).
Three Master Rules of Transistor Impedances
 Rule # 1: looking into the base, the impedance is r i

f em
i
t
te
ri
s
(ac)g r
o un ded.
 Rule # 2: looking into the collector, the impedance is ro
i
f
em it
te ris (ac)gro und ed.
 Rule # 3: looking into the emitter, the impedance is 1/gm
i
f
base is (ac)g r
o un ded a nd Earlye ffe ctisneglec
ted.
Biasing of BJT
 Transistors and circuits must be biased because (1) transistors

must operate in the active region, (2) their small-signal
parameters depend on the bias conditions.
DC Analysis vs. Small-Signal Analysis
 First, DC analysis is performed to determine operating point and

obtain small-signal parameters.
 Second, sources are set to zero and small-signal model is used.

Notation Simplification
 Hereafter, the battery that supplies power to the circuit is

replaced by a horizontal bar labeled Vcc, and input signal is
simplified as one node called Vi n.
Example of Bad Biasing
 The microphone is connected to the amplifier in an attempt to

amplify the small output signal of the microphone.
 Unfortunately, there’s no DC bias current running thru the
transistor to set the transconductance.
Another Example of Bad Biasing
 The base of the amplifier is connected to Vc c,tr

ying t
o establ
is h
a DC bias.
 Unfortunately, the output signal produced by the microphone is
shorted to the power supply.
Biasing with Base Resistor
V CC V V CC V
IB  BE
,IC  BE
RB RB
 Assuming a constant value for VB

,
Eo
n
ec
a
n
so
l
v
ef
or
b
ot
h
I
Ba
n
d
I
C anddeterm inethe term i
n alv ol
t
a
ge
so
f
t
h
et
r
an
s
i
st
o
r
.
 However, bias point is sensitive to  variations.

Improved Biasing: Resistive Divider
R2
VX  V CC
R1  R 2
R2 V CC
IC  I S
exp( )
R1  R 2 VT
 Using resistor divider to set VB

,
i
t
Ei
sp
o
ss
i
b
l
et
op
r
o
du
ce
a
nI
C
thatis rel
a ti
ve l
y inde pe nden t
o
fi
fb
a
se
c
u
rr
e
nt
i
s
sm
al
l
.

Accounting for Base Current
 V Thev  I B R Thev 
IC  IS exp  
 VT 
 With proper ratio of R1

a
n
dR
,
2I
c
Ca
nb
e
in
s
e
n
si
t
i
ve
t
o
;
h
owe
v
er
,
i
ts expo nentiald epe nd
e
n
ce
o
nr
e
si
s
to
r
de
v
i
a
ti
o
ns
ma
k
e
si
tl
e
ss
useful.
Emitter Degeneration Biasing
 The presence of RE h elp sto abso rbth e error

i
nV
Xs
oV
s
t
a
B
Ey
s
rel
a ti
ve l
y consta nt
.
 This bias technique is less sensitive to  (I1

I
)
a
Bn
dV
B
E
vari
a ti
o ns.
Design Procedure
 Choose an IC
t
opr
o
vi
d
et
he
n
e
ce
s
s
a
r
ys
m
a
ll
s
ig
n
al
par
am eters ,
g,
mr
,
e

t
c
.
 Considering the variations of R1

,
R,
a
2n
dV
,
c
h
B
Eoo
s
e
a
va
l
u
e
fo
r VRE.
 With VR
c
h
o
Es
e
n,
an
dV
c
a
l
B
Ec
u
l
at
e
d
,V
c
xa
n
b
ed
e
t
e
r
mi
n
ed
.
 Select R1
a
n
dR
t
2o
p
r
o
vi
d
eV
x.
184
Self-Biasing Technique
 This bias technique utilizes the collector voltage to provide the

necessary Vx an dIB.
 One important characteristic of this technique is that collector
has a higher potential than the base, thus guaranteeing active
operation of the transistor.
Self-Biasing Design Guidelines
RB
(1) R C 

( 2)  V BE  V CC  V BE
 (1) provides insensitivity to  .

 (2) provides insensitivity to variation in VB
E
.

Summary of Biasing Techniques

PNP Biasing Techniques
 Same principles that apply to NPN biasing also apply to PNP

biasing with only polarity modifications.
Possible Bipolar Amplifier Topologies
 Three possible ways to apply an input to an amplifier and three

possible ways to sense its output.
 However, in reality only three of six input/output combinations
are useful.
Study of Common-Emitter Topology
 Analysis of CE Core
Inclusion of Early Effect
 Emitter Degeneration
 CE Stage with Biasing
190
Common-Emitter Topology

Small Signal of CE Amplifier
v out
Av 
v in
v out
  g m v   g m v in
RC
Av   g m R C
Limitation on CE Voltage Gain
I C RC V RC V CC  V BE
Av  Av  Av 
VT VT VT
 Since gm c a
n
be
wr
i
t
te
na
s
I
C/
V
T,
t
heC
E
vo
l
t
ag
eg
a
i
n
can
b
e
w rit ten a s t
h
er
a
t
i
oof
Va
n
R
Cd
VT
.
 VR C is th e p o
t
e
nt
i
al
d
if
f
er
e
n
ce
b
et
wee
n
Va
C
Cn
dV
,
a
C
En
dV
C
E
c a n n ot g o b
e
l
ow
Vi
B
En
or
d
er
f
o
rt
het
r
a
ns
i
s
to
r
to
b
e
i
nac
t
i
v
e
re g i on.
Tradeoff between Voltage Gain and Headroom

I/O Impedances of CE Stage
vX
R in 
vX
 r
R out  R C
iX
iX
 When measuring output impedance, the input port has to be

grounded so that Vi
=
n0.
CE Stage Trade-offs

A v   g m ( R C || r O )
R out  R C || r O
 Early effect will lower the gain of the CE amplifier, as it appears

in parallel with RC .
Intrinsic Gain
Av   g m rO
VA
Av 
VT
 As RC go es to i
n fin i
ty ,t
he vol
tage ga inre ache sthe p ro
d
uc
t
of
g
m
and rO,w hich rep res entsthe max i
m um voltage gain t
h
e
am plifie rcan have .
 The intrinsic gain is independent of the bias current.

Current Gain
i out
AI 
i in
AI CE

 Another parameter of the amplifier is the current gain, which is

defined as the ratio of current delivered to the load to the
current flowing into the input.
 For a CE stage, it is equal to .

Emitter Degeneration
 By inserting a resistor in series with the emitter, we “degenerate”

the CE stage.
 This topology will decrease the gain of the amplifier but
improve other aspects, such as linearity, and input impedance.

Small-Signal Model
gmRC
Av  
1 gmRE
RC
Av  
1
 RE
gm
 Interestingly, this gain is equal to the total load resistance to

ground divided by 1/gm plus t
he totalr esi
s ta nce pl
a ced i
n se ri
e
s
w it
h the em itter.
Emitter Degeneration Example I
RC
Av  
1
 R E || r 2
g m1
 The input impedance of Q2

c
a
nb
ec
o
m
b
in
e
di
n
pa
ra
l
l
e
lw
it
h
RE
toyieldan equi
val
ent im pe
d
a
nc
e
th
a
t
d
eg
e
ne
r
a
te
sQ
.
1

Emitter Degeneration Example II
R C || r 2
Av  
1
 RE
g m1
 In this example, the input impedance of Q2

c
an
b
ec
om
b
i
n
ed
i
n
p arallelw i
t
hR C to yi
e ldan eq
uival
ent co l
le
c
t
or
i
mp
e
da
n
c
e
to
g r
o un d.
Input Impedance of Degenerated CE Stage
VA 
vX  r i  R
X E
(1   ) i X
vX
R in   r   (   1) R E
iX
 With emitter degeneration, the input impedance is increased

from r
to r 
 E
(1)
R ;a d es i
rab leeffe ct
.
Output Impedance of Degenerated CE Stage
VA 
 v 
v in  0  v    g m
v   R  v   0
E
 r 
vX
R out  R C
iX
 Emitter degeneration does not alter the output impedance in

this case. (More on this later.)

Capacitor at Emitter
 At DC the capacitor is open and the current source biases the

amplifier.
 For ac signals, the capacitor is short and the amplifier is
degenerated by RE .

Example: Design CE Stage with Degeneration as a Black Box
VA 
v in
i out g
1  ( r g
m 1
m
)RE
i out gm
Gm  
v in 1 gmRE
 If gm
R
i
s
m
Euc
h
g
r
ea
t
e
r
th
a
nu
n
i
t
y
,G
mi
s
mor
e
l
i
ne
a
r.
Degenerated CE Stage with Base Resistance
VA 
v out v A v out
 .
v in v in v A
v out  R
 C
v in r  (   1) R  R E B
R
Av  C
1 RB
R 
CH5 Bipolar Amplifiers gm
E
 1 208
Input/Output Impedances
VA 
R in 1  r   (   1) R E
R in 2  R  r   (   1) R
B 2 E
R out R C
 Ri
n
1i
sm
or
e
i
mp
or
t
a
nt
i
np
r
ac
t
i
c
ea
sR
Bi
s
of
t
en
t
h
eo
u
t
pu
t
i
mped
a
n
ce
o
ft
h
ep
r
ev
i
o
us
st
a
g
e.
Emitter Degeneration Example III
 ( R C || R 1 )
Av 
1 RB
 R2 
gm  1
R in  r   (   1) R 2
R out  R C || R 1
Output Impedance of Degenerated Stage with VA
<

R out  1  g m ( R E || r ) r O  R E || r
R out  r O  ( g m r O  1)( R E || r )
R out  r O 1  g m ( R E || r ) 
 Emitter degeneration boosts the output impedance by a factor

of 1+gm(RE|
|r)

.
 This improves the gain of the amplifier and makes the circuit
a better current source.
Two Special Cases
1) R E  r 
R out r O
(1  g m r  )  r O
2) R E  r 
R out  (1  g m
R E ) rO

Analysis by Inspection
R out R 1
|| R out 1 R out 1  1  g m
( R 2 || r  ) r O R out  1  g m
( R 2 || r  ) r O || R 1
 This seemingly complicated circuit can be greatly simplified by

first recognizing that the capacitor creates an AC short to
ground, and gradually transforming the circuit to a known
topology.
Example: Degeneration by Another Transistor
R out  1  g m 1 ( r O 2 || r 1 ) r O 1
 Called a “cascode”, the circuit offers many advantages that are

described later in the book.
Study of Common-Emitter Topology
 Analysis of CE Core
 Emitter Degeneration
 CE Stage with Biasing
215
Bad Input Connection
 Since the microphone has a very low resistance that connects

from the base of Q1t
o grou nd,ita tt
en uate sthe base v
oltage
a ndren der
s Q 1with
out ab i
a scu rrent.
Use of Coupling Capacitor
 Capacitor isolates the bias network from the microphone at DC

but shorts the microphone to the amplifier at higher frequencies.

DC and AC Analysis
A v   g m ( R C || r O )
R in  r || R B
 Coupling capacitor is open for DC calculations and shorted for

AC calculations.
Bad Output Connection
 Since the speaker has an inductor, connecting it directly to the

amplifier would short the collector at DC and therefore push the
transistor into deep saturation.
Still No Gain!!!
 In this example, the AC coupling indeed allows correct biasing.

However, due to the speaker’s small input impedance, the
overall gain drops considerably.
CE Stage with Biasing
A v   g m ( R C || r O )
R in  r || R 1 || R 2

CE Stage with Robust Biasing
VA 
 RC
Av 
1
 RE
gm
R in   r  (   1) R E  || R 1 || R 2
R out  R C
Removal of Degeneration for Signals at AC
Av   g m R C
R in  r  || R 1 || R 2
R out  R C
 Capacitor shorts out RE

a
t
hi
g
he
rf
r
e
qu
e
n
ci
e
sa
nd
r
e
mo
v
es
degene r
a ti
o n.
Complete CE Stage
 R C || R L
Av 
1 R s || R 1 || R 2
 RE 
CH5 Bipolar Amplifiers
gm  1 224
Summary of CE Concepts

Common Base (CB) Amplifier
 In common base topology, where the base terminal is biased

with a fixed voltage, emitter is fed with a signal, and collector is
the output.
CB Core
Av  g m R C
 The voltage gain of CB stage is gm

R
C,
wh
ic
h
i
si
d
en
t
ic
a
l
t
ot
ha
t
o
f
CE stage inm ag nitude and op po s
i
t
ei
np
ha
s
e
.
Tradeoff between Gain and Headroom
IC
Av  .R C
VT
V CC  V BE

VT
 To maintain the transistor out of saturation, the maximum

voltage drop across RC can not ex ceed VC C-
V BE.
Simple CB Example
A v  g m R C  17 . 2
R 1  22 . 3 K 
R 2  67 . 7 K 

Input Impedance of CB
1
R in 
gm
 The input impedance of CB stage is much smaller than that of

the CE stage.
Practical Application of CB Stage
 To avoid “reflections”, need impedance matching.

 CB stage’s low input impedance can be used to create a match
with 50 .
Output Impedance of CB Stage
R out  r O || R C
 The output impedance of CB stage is similar to that of CE stage.

CB Stage with Source Resistance
RC
Av 
1
 RS
gm
 With an inclusion of a source resistor, the input signal is

attenuated before it reaches the emitter of the amplifier;
therefore, we see a lower voltage gain.
 This is similar to CE stage emitter degeneration; only the phase
is reversed.
Practical Example of CB Stage
 An antenna usually has low output impedance; therefore, a

correspondingly low input impedance is required for the
following stage.
Realistic Output Impedance of CB Stage
R out 1  1  g m ( R E || r  ) r O   R E || r  
R out  R C || R out 1
 The output impedance of CB stage is equal to RC

i
n
pa
ra
l
l
e
lw
it
h
theim peda ncelooki
ng do wn intoth e col
lect or.
Output Impedance of CE and CB Stages
 The output impedances of CE, CB stages are the same if both

circuits are under the same condition. This is because when
calculating output impedance, the input port is grounded, which
renders the same circuit for both CE and CB stages.

Fallacy of the “Old Wisdom”
 The statement “CB output impedance is higher than CE output

impedance” is flawed.

CB with Base Resistance
v out RC

v in RB 1
RE  
 1 gm
 With an addition of base resistance, the voltage gain degrades.

Comparison of CE and CB Stages with Base Resistance
 The voltage gain of CB amplifier with base resistance is exactly

the same as that of CE stage with base resistance and emitter
degeneration, except for a negative sign.
Input Impedance of CB Stage with Base Resistance
vX r  R B 1 RB
  
iX  1 gm  1
 The input impedance of CB with base resistance is equal to 1/

gmp lusR B di
vi
dedb y( 1)
. Th i
s isinc ontrastto de gener ated
CE stage, inwhic
h the re s
istanc einse ri
e sw i
th the em it
t er i
s
m ul
ti
plied by
(1)w he n s
e en fr
o m the ba se.
Input Impedance Seen at Emitter and Base

Input Impedance Example
1 1  1 RB 
RX     
g m2   1  g m1   1 
 To find the RX
,
weh
a
v
e
t
ofi
r
s
tfi
n
d
Rt
e
q
,r
ea
t
i
t
as
th
e
b
a
se
r
e
s
i
st
a
nc
e
of
Q
2a
n
dd
i
v
i
de
it
b
y

(1
)
.
Bad Bias Technique for CB Stage
 Unfortunately, no emitter current can flow.

Still No Good
 In haste, the student connects the emitter to ground, thinking it

will provide a DC current path to bias the amplifier. Little did
he/she know that the input signal has been shorted to ground
as well. The circuit still does not amplify.

Proper Biasing for CB Stage
1
R in  || R E
gm
v out 1
 gmRC
CH5 Bipolar Amplifiers
v in 1  1  g m R E  R S 245
Reduction of Input Impedance Due to RE
 The reduction of input impedance due to RE

i
sba
d
b
ec
a
us
e
it
shun t
s partof the i
npu tcurr
entto groun d i
n
st
e
ad
o
ft
o
Q(
a
n
1d
Rc).
Creation of Vb
 Resistive divider lowers the gain.

 To remedy this problem, a capacitor is inserted from base to
ground to short out the resistor divider at the frequency of
interest.
Example of CB Stage with Bias
 For the circuit shown above, RE

>
>1
/
g
m.
 R1and R 2are ch osenso th atVbi
s at t
heappro priat
ev
a
lu
e
an
d
th
e current that flows thru thedi
v id er
ism uch larger
t
h
an
t
he
basecu rrent.
 Capacitors are chosen to be small compared to 1/gm
a
tt
h
e
re
quired frequ ency.
Emitter Follower (Common Collector Amplifier)

Emitter Follower Core
 When the input is increased by V, output is also increased by an

amount that is less than V due to the increase in collector
current and hence the increase in potential drop across RE .
 However the absolute values of input and output differ by a VB
.
E

Small-Signal Model of Emitter Follower
VA 
v out 1 RE
 
v in r 1 1
1  RE 
  1 RE gm
 As shown above, the voltage gain is less than unity and positive.

Unity-Gain Emitter Follower
VA 
Av  1
 The voltage gain is unity because a constant collector current (=

I1
)resu l
ts i
n a con stan tV BE,
and he nce Vou
tfollow s Vi
ne xac t
ly.

Analysis of Emitter Follower as a Voltage Divider
VA 
Emitter Follower with Source Resistance
VA 
v out RE

v in RS 1
RE  
 1 gm

Input Impedance of Emitter Follower
VA 
vX
 r  (1   ) R E
iX
 The input impedance of emitter follower is exactly the same as

that of CE stage with emitter degeneration. This is not
surprising because the input impedance of CE with emitter
degeneration does not depend on the collector resistance.

Emitter Follower as Buffer
 Since the emitter follower increases the load resistance to a

much higher value, it is suited as a buffer between a CE stage
and a heavy load resistance to alleviate the problem of gain
degradation.
Output Impedance of Emitter Follower
 Rs 1 
R out     || R E
   1 gm 
 Emitter follower lowers the source impedance by a factor of 1

improved driving capability.
Emitter Follower with Early Effect
R E || r O
Av 
RS 1
R E || r O  
 1 gm
R in  r     1  R E || r O 
 Rs 1 
R out     || R E || r O
   1 gm 
 Since rO
i
s
in
pa
r
a
l
l
el
wi
t
hR
,
Ei
t
se
ff
e
c
tc
an
b
e
ea
s
i
l
y
i
n corpor
a
t
ed
in
t
o
vo
l
t
ag
eg
ai
n
an
di
n
pu
ta
n
d
o
ut
p
u
ti
m
pe
da
n
c
e
equ at
ion
s
.
Current Gain
 There is a current gain of (1) from base to emitter.

 Effectively speaking, the load resistance is multiplied by (1)
as seen from the base.
Emitter Follower with Biasing
 A biasing technique similar to that of CE stage can be used for

the emitter follower.
 Also, Vbca n be clo
s e t
oV cc bec aus et hec ol
lectoris al
so atV cc.

Supply-Independent Biasing
 By putting a constant current source at the emitter, the bias

current, VBE,and I
BRBa re fixed rega r
dles s ofthe sup p l
y value .

Summary of Amplifier Topologies
 The three amplifier topologies studied so far have different

properties and are used on different occasions.
 CE and CB have voltage gain with magnitude greater than one,
while follower’s voltage gain is at most one.
Amplifier Example I
v out R 2 || R C R1
  
v in R 1 || R S 1 R1  R S
  RE
 1 gm
 The keys in solving this problem are recognizing the AC ground

between R1 and R ,
2a nd T heve n
intran sfor
m a t
ion o ftheinput
netw or
k.
Amplifier Example II
v out RC R1
  
v in R S || R 1 1 R1  R S
  R2
 1 gm
 Again, AC ground/short and Thevenin transformation are

needed to transform the complex circuit into a simple stage
with emitter degeneration.
Amplifier Example III
R in  r 1  R 1  r 2
 RC
Av 
1 R1 1
 
g m1  1 g m2
 The key for solving this problem is first identifying Re

,
w
qh
ic
h
is
t
h e im pe d a nc
e
se
e
n at thee mit
te ro fQ 2 i
n pa rall
e lw
i
t
ht
he
i
n fi n ite o u t p u
t
i
mp
edanc eof anide alc u r
rent so urce.
Se
c
on
d,
us e th e e q u a
t
i
o
ns
fo
r de generat
e d C E stage w i
th REr
e
pl
a
ce
db
y
CH5Req.
Bipolar Amplifiers 265
Amplifier Example IV
R C || R 1
Av 
1
RS 
gm
 The key for solving this problem is recognizing that CB
a
t
fr
equ enc yo finteres tsh ortso u
tR 2 and provide a groun
d
f
or
R
.
1
 R1
ap
p
ea
r
si
n
pa
ra
l
l
e
lw
it
h
Ra
n
Cd
t
h
ec
i
r
cu
i
ts
i
mp
l
i
fie
s
to
a
si
m
pl
eC
Bs
t
a
ge
.
Amplifier Example V
1  R B 1   1
R in      || R E  
  1    1 g m2   g m1
 The key for solving this problem is recognizing the equivalent

base resistance of Q1 i
s the parall
e lconne ction ofR Eand the
i
m pe dan ce see n atth e em i
tterof Q 2.
Amplifier Example VI
v out R E || R 2 || r O R1
 
v in 1 R S || R 1 R  R
R E || R 2 || r O   1 S
gm  1
 R S || R 1 1 
R out     || R E || R 2 || r O
  1 gm 
 The key in solving this problem is recognizing a DC supply is
actually an AC ground and using Thevenin transformation to
simplify the circuit into an emitter follower.

Amplifier Example VII
 R B1 1 
R in  r  1     1  R E   
   1 g m2 
RB2 1
R out  R C  
 1 g m3
RB2 1
RC  
 1 g m3
Av  
R B1 1 1
 
 1 g m2 g m1
 Impedances seen at the emitter of Q1

a
n
dQ
2c
a
nb
el
u
mp
ed
w i
t
h RCandR E,r
esp ec ti
vely
,to form th
e
e
qu
i
va
l
e
nt
em
i
tt
e
ra
n
d
col
lect
orim pedan ces .
Chapter 6 Physics of MOS Transistors
 6.1 Structure of MOSFET
 6.2 Operation of MOSFET
 6.3 MOS Device Models
 6.4 PMOS Transistor
 6.5 CMOS Technology
 6.6 Comparison of Bipolar and CMOS

Devices
270
Chapter Outline
CH 6 Physics of MOS Transistors 271

Metal-Oxide-Semiconductor (MOS) Capacitor
 The MOS structure can be thought of as a parallel-plate

capacitor, with the top plate being the positive plate, oxide
being the dielectric, and Si substrate being the negative plate.
(We are assuming P-substrate.)
Structure and Symbol of MOSFET
 This device is symmetric, so either of the n+ regions can be

source or drain.
State of the Art MOSFET Structure
 The gate is formed by polysilicon, and the insulator by Silicon

dioxide.
Formation of Channel
 First, the holes are repelled by the positive gate voltage, leaving
behind negative ions and forming a depletion region. Next,
electrons are attracted to the interface, creating a channel
(“inversion layer”).
Voltage-Dependent Resistor
 The inversion channel of a MOSFET can be seen as a resistor.

 Since the charge density inside the channel depends on the
gate voltage, this resistance is also voltage-dependent.

Voltage-Controlled Attenuator
 As the gate voltage decreases, the output drops because the

channel resistance increases.
 This type of gain control finds application in cell phones to avoid
saturation near base stations.
MOSFET Characteristics
 The MOS characteristics are measured by varying VG

w
h
il
e
keepin
gV Dcon s
ta nt,a nd varyin
g VDw hi
le kee ping Vc
o
n
Gs
t
an
t
.
 (d) shows the voltage dependence of channel resistance.

L and to
D
e
xp
e
nd
e
n
c
e
 Small gate length and oxide thickness yield low channel

resistance, which will increase the drain current.
Effect of W
 As the gate width increases, the current increases due to a

decrease in resistance. However, gate capacitance also
increases thus, limiting the speed of the circuit.
 An increase in W can be seen as two devices in parallel.
Channel Potential Variation
 Since there’s a channel resistance between drain and source,

and if drain is biased higher than the source, channel potential
increases from source to drain, and the potential between gate
and channel will decrease from source to drain.

Channel Pinch-Off
 As the potential difference between drain and gate becomes more

positive, the inversion layer beneath the interface starts to pinch off
around drain.
 When VD – V G =Vth,the chan nelatd r
a into tal
ly pi
nc hes o ff
, an dw he nV
D
– VG > Vth ,
the chan nel l
engt hstar
ts to de creas e.
Channel Charge Density
Q  WC ox
(V GS  V TH )
 The channel charge density is equal to the gate capacitance

times the gate voltage in excess of the threshold voltage.

Charge Density at a Point
Q ( x )  WC ox
V GS  V ( x )  V TH 
 Let x be a point along the channel from source to drain, and V(x)
its potential; the expression above gives the charge density (per
unit length).
Charge Density and Current
I  Q v
 The current that flows from source to drain (electrons) is

related to the charge density in the channel by the charge
velocity.
Drain Current
dV
v  n
dx
dV ( x )
I D  WC ox
V GS  V ( x )  V TH  n
dx
1 W 2
ID   n C ox 2 (V GS  V TH )V DS  V DS 
2 L

Parabolic ID
-
V
D
SR
el
a
t
io
ns
h
i
p
 By keeping VG
c
on stant andv ary
ingV ,
w
D
Seo
b
t
ai
n
ap
ar
a
b
ol
i
c
rel
a t
ionship.
 The maximum current occurs when VD
e
Sq
ua
l
s
to
V-
G
SV
.
T
H
ID
-
V
D
Sf
or
D
i
ff
e
r
en
t
V
al
u
es
of
V
G
S
2
I D , max  V GS  V TH 

Linear Resistance
1
R on 
W
 n C ox V GS  V TH 
L
 At small VD S,the transistor can be view ed as
a
r
es
i
st
o
r
,w
i
t
h
th e r
esistan ced epe nding on the ga tevo l
ta g
e
.
 It finds application as an electronic switch.
Application of Electronic Switches
 In a cordless telephone system in which a single antenna is

used for both transmission and reception, a switch is used to
connect either the receiver or transmitter to the antenna.
Effects of On-Resistance
 To minimize signal attenuation, Ro

o
f
nt
h
es
w
i
tc
h
ha
s
t
ob
ea
s
sm al
la sposs i
b l
e. T hism ea ns lar
g
e
rW
/
La
s
pe
c
t
ra
t
i
o
an
d
great
e rVGS.
Different Regions of Operation

How to Determine ‘Region of Operation’
 When the potential difference between gate and drain is greater

than VT
H,the MO S F ET is i
n t
riode r
egion.
 When the potential difference between gate and drain becomes
equal to or less than VT
H,theM OSFETe nters s
atu r
a ti
o nregi
on.
Triode or Saturation?
 When the region of operation is not known, a region is assumed

(with an intelligent guess). Then, the final answer is checked
against the assumption.

Channel-Length Modulation
1 W 2
ID   n C ox V GS  V TH  1   V DS 
2 L
 The original observation that the current is constant in the

saturation region is not quite correct. The end point of the
channel actually moves toward the source as VD i
n crea ses ,
incr
e asing ID.T he r
e fore,the c ur
re ntin t
he s at
uration re gi
o n
is
a
we ak f
u nction oft he drain voltage .
 and L
 Unlike the Early voltage in BJT, the channel- length modulation

factor can be controlled by the circuit designer.
 For long L, the channel-length modulation effect is less than
that of short L.
Transconductance
W W 2I D
g m   n C ox V GS  V TH  gm  2  n C ox ID gm 
L L V GS  V TH
 Transconductance is a measure of how strong the drain current

changes when the gate voltage changes.
 It has three different expressions.
Doubling of gm
D
u
et
o
Do
u
bl
i
n
gW/
L
 If W/L is doubled, effectively two equivalent transistors are

added in parallel, thus doubling the current (if VG
S-VTH i
s
c onstan t)and he n ceg m.
Velocity Saturation
ID  v  Q  v  WC
sat sat ox
V GS V TH

I
gm  D
v WC
V
sat ox
GS
 Since the channel is very short, it does not take a very large drain
voltage to velocity saturate the charge particles.
 In velocity saturation, the drain current becomes a linear
function of gate voltage, and gm becomes a function of W.
Body Effect
V TH  V TH 0
  2 F  V SB  2 F 
 As the source potential departs from the bulk potential, the

threshold voltage changes.
Large-Signal Models
 Based on the value of VD

M
S
,OS
FE
Tc
a
n
b
er
e
p
re
s
en
t
e
dw
i
t
h
di
ffer
e ntlarge -
signa lm o
d
el
s.
Example: Behavior of ID
w
i
t
hV
1a
s
a
F
un
c
t
i
o
n
1 W 2
ID   n C ox V DD  V 1  V TH 
2 L
 Since V1
i
s
co
nn
e
c
t
e
da
t
t
he
s
ou
r
c
e
,a
s
it
i
n
cr
e
as
e
s
,t
h
ec
u
r
re
n
t
drops.
Small-Signal Model
1
ro 
I D
 When the bias point is not perturbed significantly, small-signal

model can be used to facilitate calculations.
 To represent channel-length modulation, an output resistance is
inserted into the model.
PMOS Transistor
 Just like the PNP transistor in bipolar technology, it is possible

to create a MOS device where holes are the dominant carriers.
It is called the PMOS transistor.
 It behaves like an NMOS device with all the polarities reversed.

PMOS Equations
1 W 2
I D , sat   p C ox V GS  V TH  (1   V DS )
2 L
1 W
 p C ox
2
I D , tri  2 V GS  V TH V DS  V DS 
2 L
1 W 2
I D , sat   p C ox  V GS  V TH  1   V DS 
2 L
1 W
 p C ox
2
I D , tri  2  V GS  V TH  V DS  V DS 
2 L

Small-Signal Model of PMOS Device
 The small-signal model of PMOS device is identical to that of

NMOS transistor; therefore, RX
e
qu al
s RY a n dhen ce ( 1/gm )||
ro .

CMOS Technology
 It possible to grow an n-well inside a p-substrate to create a

technology where both NMOS and PMOS can coexist.
 It is known as CMOS, or “Complementary MOS”.
Comparison of Bipolar and MOS Transistors
 Bipolar devices have a higher gm

t
h
an
M
OS
FE
T
sf
or
ag
i
v
en
bi
a
s
current due toits expon enti
al IV
c
h
ar
a
c
te
r
i
st
i
c
s.
Chapter 7 CMOS Amplifiers
 7.2 Common-Source Stage
 7.3 Common-Gate Stage
 7.4 Source Follower
 7.5 Summary and Additional Examples
309
Chapter Outline
CH7 CMOS Amplifiers 310

MOS Biasing
2  R 2V DD 
V GS   V 1  V TH   V1  2V 1   V TH 
 R1  R 2 
1
V1 
W
 n C ox RS
L
 Voltage at X is determined by VD
,
R
D,
a
1n
dR
.
2
 VG
c
a
n
Sb
ef
o
u
nd
u
si
n
gt
he
e
q
ua
t
i
on
a
bo
v
e,
an
dI
c
a
Dn
be
f
o
u
nd
by
u
s
i
ng
t
he
N
MO
Sc
u
rr
e
nt
e
qu
a
t
io
n
.
Self-Biased MOS Stage
I D R D  V GS  R S I D  V DD
 The circuit above is analyzed by noting M1 is in saturation and

no potential drop appears across RG .
Current Sources
 When in saturation region, a MOSFET behaves as a current

source.
 NMOS draws current from a point to ground (sinks current),
whereas PMOS draws current from VDD t
o a po i
nt (sources
cu rren t) .
Common-Source Stage
 0
Av  g m
RD
W
Av  2  n C ox I D RD
L
Operation in Saturation
R D I D  V DD  V GS  V TH 
 In order to maintain operation in saturation, Vo

c
u
ta
nn
o
t
f
a
ll
b elow V i
nb ymo reth ano ne thres holdv oltage .
 The condition above ensures operation in saturation.
CS Stage with 0
Av  g m
RL
R in 
R out R L
316
CS Stage with   0
A v   g m  R L || r O 
R in  
R out  R L || r O
 However, Early effect and channel length modulation affect CE

and CS stages in a similar manner.
CS Gain Variation with Channel Length
W
2  n C ox
L 2  n C ox WL
Av  
 ID ID
 Since  is inversely proportional to L, the voltage gain actually

becomes proportional to the square root of L.
CS Stage with Current-Source Load
A v   g m 1  r O 1 || r O 2 
R out  r O 1 || r O 2
 To alleviate the headroom problem, an active current-source
load is used.
 This is advantageous because a current-source has a high
output resistance and can tolerate a small voltage drop across
it.
PMOS CS Stage with NMOS as Load
A v   g m 2 ( r O 1 || r O 2 )
 Similarly, with PMOS as input stage and NMOS as the load, the
voltage gain is the same as before.
CS Stage with Diode-Connected Load
1 W / L 1
A v   g m1   
g m2 W / L  2
 1 
A v   g m 1  || r O 2 || r O 1 
 g m2 
 Lower gain, but less dependent on process parameters.
CS Stage with Diode-Connected PMOS Device
 1 
Av  g m2
 || r o 1 || r o 2 
gm1 
 Note that PMOS circuit symbol is usually drawn with the source
on top of the drain.
322
CS Stage with Degeneration
RD
Av 
1
R S
gm
 0
 Similar to bipolar counterpart, when a CS stage is degenerated,
its gain, I/O impedances, and linearity change.
Example of CS Stage with Degeneration
RD
Av  
1 1

g m1 g m2
 A diode-connected device degenerates a CS stage.

CS Stage with Gate Resistance
VR  0
G
 Since at low frequencies, the gate conducts no current, gate

resistance does not affect the gain or I/O impedances.

Output Impedance of CS Stage with Degeneration
r out  g m r O R S  r O
 Similar to the bipolar counterpart, degeneration boosts output

impedance.
Output Impedance Example (I)
 1  1
R out  r O 1  1  g m 1  
 g m2  g m2
 When 1/gm
i
s
pa
ra
l
l
e
lw
it
h
r
O,
w
2eo
f
t
e
nj
u
st
co
n
s
i
de
r
1/
g
.
m

Output Impedance Example (II)
R out  g m 1 r O 1 r O 2  r O 1
 In this example, the impedance that degenerates the CS stage

is rO,insteadof 1 /gm i
ntheprevious e xample.
CS Core with Biasing
R 1 || R 2  RD R 1 || R 2
Av   , Av   gmR D
R G  R 1 || R 2 1 R G  R 1 || R 2
 RS
gm
 Degeneration is used to stabilize bias point, and a bypass

capacitor can be used to obtain a larger small-signal voltage
gain at the frequency of interest.
Common-Gate Stage
Av  g m R D
 Common-gate stage is similar to common-base stage: a rise in

input causes a rise in output. So the gain is positive.
Signal Levels in CG Stage
 In order to maintain M1
i
n
sa
tu
r
a
t
i
on
,
th
es
i
g
na
l
sw
i
ng
a
tV
o
u
t
ca nnot fallbel
o w V -
bV.
T
H

I/O Impedances of CG Stage
 0
1
R in  R out  R D
gm
 The input and output impedances of CG stage are similar to

those of CB stage.
CG Stage with Source Resistance
RD
Av 
1
R S
gm
 When a source resistance is present, the voltage gain is equal
to that of a CS stage with degeneration, only positive.
Generalized CG Behavior
R out  1  g m r O  R S  r O
 When a gate resistance is present it does not affect the gain

and I/O impedances since there is no potential drop across it (
at low frequencies).
 The output impedance of a CG stage with source resistance is
identical to that of CS stage with degeneration.
Example of CG Stage
v out g m1 R D   1  
 R out   g m 1 r O 1  || R S   r O 1  || R D
v in 1   g m1  g m 2  R S   g m2  
 Diode-connected M2
a
c
ts
a
sa
r
e
s
i
st
o
rt
o
pr
o
v
id
e
t
he
b
i
a
s
current.
CG Stage with Biasing
v out R 3 || 1 / g m 
  gmRD
v in R 3 || 1 / g m   R S
 R1
a
n
dR
2p
r
o
v
id
e
ga
t
eb
i
a
sv
ol
t
a
ge
,a
n
dR
p
r
3o
v
i
d
es
ap
a
t
h
f
or
DC
b
i
as
c
ur
r
e
nt
o
fM
t
1o
fl
ow
to
gr
o
un
d
.
Source Follower Stage
Av 1

Source Follower Core
v out r O || R L

v in 1
 r O || R L
gm
 Similar to the emitter follower, the source follower can be
analyzed as a resistor divider.
Source Follower Example
r O 1 || r O 2
Av 
1
 r O 1 || r O 2
g m1
 In this example, M2
a
c
ts
a
sa
c
u
r
r
en
t
s
ou
r
c
e.

Output Resistance of Source Follower
1 1
R out  || r O || R L  || R L
gm gm
 The output impedance of a source follower is relatively low,
whereas the input impedance is infinite ( at low frequencies);
thus, a good candidate as a buffer.
Source Follower with Biasing
1 W 2
ID   n C ox V DD  I D R S  V TH 
2 L
 RGse t
s t
h eg ate vol
ta ge t
o VDD,w hereas RS sets t
h
ed
r
ai
n
cur
re nt
.
 The quadratic equation above can be solved for ID
.

Supply-Independent Biasing
 If Rs
i
s
re
pl
a
ce
db
y
a
cu
r
r
e
nt
s
ou
r
c
e,
dr
a
in
c
u
rr
e
n
tI
b
De
c
om
e
s
in de
p
e
nd
en
to
fs
u
p
p
l
yv
o
l
ta
g
e
.
Example of a CS Stage (I)
 1 
A v   g m 1  || r O 1 || r O 2 || r O 3 
 g m3 
1
R out  || r O 1 || r O 2 || r O 3
g m3
 M1
a
c
ts
a
st
h
ei
n
pu
td
e
v
i
c
ea
nd
M
,
M
2a
3s
t
h
el
o
ad
.
Example of a CS Stage (II)
rO 2
Av  
1 1
 || r O 3
g m1 g m3
 M1
a
c
ts
a
st
he
i
n
pu
td
e
v
i
c
e,
Ma
3s
t
h
es
o
ur
c
e
re
s
i
st
a
n
ce
,
an
dM
2
as
t
h
el
o
ad
.
Examples of CS and CG Stages
rO 2
A v _ CG 
A v _ CS  g m2
(1  g m 1 r O 1 ) R S r O1
 || r O 1 1
 RS
gm
 With the input connected to different locations, the two circuits,
although identical in other aspects, behave differently.

Example of a Composite Stage (I)
RD
Av 
1 1

g m1 g m2
 By replacing the left side with a Thevenin equivalent, and

recognizing the right side is actually a CG stage, the voltage
gain can be easily obtained.
Example of a Composite Stage (II)
1
|| r O 3 || r O 4
v out 2 g m3
 
v in 1 1
|| r O 2 
g m2 g m1
 This example shows that by probing different places in a circuit,

different types of output can be obtained.
 Vo ut
1isa r esul
t of M 1acti
n ga sa sourc efo l
l
o
w er wher eas V out
2 i
s
a resu l
to f M1a cti
n ga sa C Ss t
ag ew ithde g
enerati
on .
Chapter 8 Operational Amplifier as A Black Box
 8.2 Op-Amp-Based Circuits
 8.3 Nonlinear Functions
 8.4 Op-Amp Nonidealities
 8.5 Design Examples
348
Chapter Outline
CH8 Operational Amplifier as A Black Box 349

Basic Op Amp
V out  A 0 V in 1  V in 2 
 Op amp is a circuit that has two inputs and one output.

 It amplifies the difference between the two inputs.
Inverting and Non-inverting Op Amp
 If the negative input is grounded, the gain is positive.

 If the positive input is grounded, the gain is negative.
Ideal Op Amp
 Infinite gain
 Infinite input impedance
 Zero output impedance
 Infinite speed

Virtual Short
V in 1
V in 2
 Due to infinite gain of op amp, the circuit forces Vi

n
2t
ob
e
c
l
os
e
toVin1,thus creating a virtu
als hort.
Unity Gain Amplifier
V out  A 0 (V in  V out )
V out A0

V in 1  A0

Op Amp with Supply Rails
 To explicitly show the supply voltages, VC

a
n
d
CV
E
Ea
r
e
s
ho
wn
.
 In some cases, VE
i
s
Ez
e
r
o.

Noninverting Amplifier (Infinite A0
)
V out R1
 1
V in R2
 A noninverting amplifier returns a fraction of output signal thru

a resistor divider to the negative input.
 With a high Ao ,V ou/
tV i
n depend so n l
yon r
a
ti
o o fresi
s tors,w hich
i
s veryp r
e cise .
Noninverting Amplifier (Finite A0
)
V out  R1    R1  1 
 1   1   1   
V in  R 2    R 2 
A 0 
 The error term indicates the larger the closed-loop gain, the less
accurate the circuit becomes.
Extreme Cases of R2
(
I
n
fin
i
t
eA
)
0
 If R2
i
sze
ro
,
t
hel
o
op
i
so
pe
na
n
d
Vo
u/
V
ti
i
nse
q
u
al
t
ot
he
i
n
tr
i
n
si
c
g ain
of
th
eo
pam
p.
 If R2
i
si
nfi
ni
t
e,
t
hec
i
r
cu
i
tb
e
co
m
es
au
ni
ty
-
ga
i
n
amp
l
i
fie
r
an
d
V ou/
V
tb
i
nec
o
mes
eq
u
al
t
oo
ne
.
Inverting Amplifier
0 V V in
out

R1 R2
V out R
 1
V in R2
 Infinite A0
f
o
rc
e
st
h
en
e
ga
t
i
v
ei
n
pu
tt
o
be
av
i
r
t
ua
lg
r
o
un
d
.
Another View of Inverting Amplifier
Inverting Noninverting

Gain Error Due to Finite A0
V out R1  1  R1  
  1  1  
V in R2  A0  R2 
 The larger the closed loop gain, the more inaccurate the circuit
is.
Complex Impedances Around the Op Amp
V out Z1
 
V in Z2
 The closed-loop gain is still equal to the ratio of two

impedances.
Integrator
V out 1

1
  V out   V in dt
V in R 1C 1 s R 1C 1

Integrator with Pulse Input
1 V1
V out  
R 1C 1  V in dt  
R 1C 1
t 0  t  Tb

Comparison of Integrator and RC Lowpass Filter
 The RC low-pass filter is actually a “passive” approximation to

an integrator.
 With the RC time constant large enough, the RC filter output
approaches a ramp.
Lossy Integrator
V out 1

V in 1  1 
  1   R 1C 1 s
A0  A0 
 When finite op amp gain is considered, the integrator becomes

lossy as the pole moves from the origin to -1/[(1+A0
)
R 1C1]
.
 It can be approximated as an RC circuit with C boosted by a
factor of A0+1.

Differentiator
V out R1
dV in     R 1C 1 s
V out   R 1C 1 V in 1
dt
C 1s

Differentiator with Pulse Input
V out   R 1C 1V 1 ( t )

Comparison of Differentiator and High-Pass Filter
 The RC high-pass filter is actually a passive approximation to

the differentiator.
 When the RC time constant is small enough, the RC filter
approximates a differentiator.
Lossy Differentiator
V out  R 1C 1 s

V in 1 R 1C 1 s
1 
A0 A0
 When finite op amp gain is considered, the differentiator

becomes lossy as the zero moves from the origin to –(A0 +
1
)
/
R1C1.
 It can be approximated as an RC circuit with R reduced by a
factor of (A0 +
CH8 Operational Amplifier
1 ).
as A Black Box 370
Op Amp with General Impedances
V out Z1
 1
V in Z2
 This circuit cannot operate as ideal integrator or differentiator.

Voltage Adder
 V1 V2 
V out   RF   
 R1 R2 
Ao
 RF
V out  V 1  V 2 
R
If R1
=
R=
R
2
 If Ao
i
s
in
fi
ni
t
e,
Xi
sp
i
n
ne
da
t
g
ro
u
nd
,
c
ur
re
n
t
sp
r
o
p
or
t
i
on
a
l
to
V
1
a ndV
w
2i
l
lfl
ow
toX
a
nd
t
he
n
ac
r
os
s
Rt
Fo
p
r
od
u
c
ea
n
ou
t
p
ut
p rop
o
r
ti
o
na
l
to
th
es
u
mo
ft
w
ov
o
l
ta
g
es
.
Precision Rectifier
 When Vi nis p o s it
iv e , th e
c
i
rc
u
it
i
nb
)
be
ha
ve
s
l
ik
e
th
a
t
i
na
)
,
so
th e o ut put fo llo w s i
n pu t
.
 When Vi ni
s ne g ativ e , the
d
io
d
eo
pe
n
s,
an
dt
h
eo
u
t
pu
t
d
r
op
st
o
ze ro . T
CH8 Operational hus p
Amplifiere r
as f
Aorm
Black i
n g
Box r
e
c
ti
fi
ca
t
io
n
. 373
Inverting Precision Rectifier
 When Vi
i
nsp
o
s
i
ti
v
e,
t
hed
i
o
de
i
so
n
,V
i
s
yp
i
n
ne
da
r
o
u
nd
VD
,
o
n,
an
d Vxatv
i
rt
u
a
lg
r
ou
nd
.
 When Vi nis n e g a
t ive ,t h
e
d
i
o
de
i
so
f
f,
Vg
yo
e
s
ex
t
r
e
me
l
y
ne g a ti
v e,a n d V b
CH8 Operational Amplifier as Ax
e c o m
Black Box
e
s
e
qu
a
lt
o
V.
i
n 374
Logarithmic Amplifier
V in
V out   V T ln
R1I S
 By inserting a bipolar transistor in the loop, an amplifier with

logarithmic characteristic can be constructed.
 This is because the current to voltage conversion of a bipolar
transistor is a natural logarithm.
Square-Root Amplifier
2V in
V out    V TH
W
 n C ox R1
L
 By replacing the bipolar transistor with a MOSFET, an amplifier

with a square-root characteristic can be built.
 This is because the current to voltage conversion of a MOSFET
is square-root.
Op Amp Nonidealities: DC Offsets
 Offsets in an op amp that arise from input stage mismatch

cause the input-output characteristic to shift in either the
positive or negative direction (the plot displays positive
direction).
Effects of DC Offsets
 R1 
V out  1   V in  V os 
 R2 
 As it can be seen, the op amp amplifies the input as well as the

offset, thus creating errors.
Saturation Due to DC Offsets
 Since the offset will be amplified just like the input signal,
output of the first stage may drive the second stage into
saturation.
Offset in Integrator
V out R2 1
 
V in R1 R 2C 1s  1
 A resistor can be placed in parallel with the capacitor to “absorb”

the offset. However, this means the closed-loop transfer
function no longer has a pole at origin.
Input Bias Current
 The effect of bipolar base currents can be modeled as current

sources tied from the input to ground.
Effects of Input Bias Current on Noninverting Amplifier
 R1 
V out   R2I B2    R1I B 2
 R2 
 It turns out that IB
h
a
1s
n
oe
f
f
e
ct
o
nt
h
eo
u
t
pu
t
a
nd
I
B
2a
f
f
ec
t
s
th e outp utb ypro d
u
c
in
g
av
o
l
t
a
ged
r
o
pa
c
r
os
s
R
1
.
Input Bias Current Cancellation
 R1 
V out  V corr 1    I B 2 R1
 R2 
 We can cancel the effect of input bias current by inserting a

correction voltage in series with the positive terminal.
 In order to produce a zero output, Vcor=
r-I
B 2(R1||
R )
2.
Correction for  Variation
I B1  I B 2
 Since the correction voltage is dependent upon , and  varies

with process, we insert a parallel resistor combination in series
with the positive input. As long as IB1 I
B2, t
hecorrec t
ion v ol
ta ge
c
a
n
t
r
ac
k
t
h
e
v
ar
i
a
t
io
n.
Effects of Input Bias Currents on Integrator
1
V out 
R 1C 1    I B 2 R 1  dt
 Input bias current will be integrated by the integrator and

eventually saturate the amplifier.
Integrator’s Input Bias Current Cancellation
 By placing a resistor in series with the positive input, integrator

input bias current can be cancelled.
 However, the output still saturates due to other effects such as
input mismatch, etc.

Speed Limitation
V out A0
s 
V in 1 V in 2
1
s
 1
 Due to internal capacitances, the gain of op amps begins to roll

off.
Bandwidth and Gain Tradeoff
 Having a loop around the op amp (inverting, noninverting, etc)

helps to increase its bandwidth. However, it also decreases the
low frequency gain.
Slew Rate of Op Amp
 In the linear region, when the input doubles, the output and the
output slope also double. However, when the input is large, the
op amp slews so the output slope is fixed by a constant current
source charging a capacitor.
 This further limits the speed of the op amp.
Comparison of Settling with and without Slew Rate
 As it can be seen, the settling speed is faster without slew rate

(as determined by the closed-loop time constant).
Slew Rate Limit on Sinusoidal Signals
dV out  R1 
 V0 1    cos  t
dt  R2 
 As long as the output slope is less than the slew rate, the op
amp can avoid slewing.
 However, as operating frequency and/or amplitude is increased,
the slew rate becomes insufficient and the output becomes
distorted.
Maximum Op Amp Swing
V V SR

V max min
t 
V max min  
V out
2
sin
2
FP
V max V min
2
 To determine the maximum frequency before op amp slews,
first determine the maximum swing the op amp can have and
divide the slew rate by it.
Nonzero Output Resistance
R out
A0 
v out R1 R1
 
v in R2 R out R1
1  A0 
R2 R2
 In practical op amps, the output resistance is not zero.
 It can be seen from the closed loop gain that the nonzero output
resistance increases the gain error.

Design Examples
 Many design problems are presented at the end of

the chapter to study the effects of finite loop gain,
restrictions on peak to peak swing to avoid slewing,
and how to design for a certain gain error.

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Behzad Razavi Microelectronics Notes

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Fundamentals of Microelectronics

 CH1 Why Microelectronics?

 1.1 Electronics versus Microelectronics

 1.2 Example of Electronic System: Cellular Telephone

 1.3 Analog versus Digital

 An important example of microelectronics.

 Voice is “up-converted” by multiplying two sinusoids.

 Two frequencies are multiplied and radiated by an antenna in

CH1 Why Microelectronics? 5

 High frequency is translated to DC by multiplying by fC

CH1 Why Microelectronics? 7

 2.1 Semiconductor materials and their properties

 2.2 PN-junction diodes

 2.3 Reverse Breakdown

 Semiconductor devices serve as heart of microelectronics.

CH2 Basic Physics of Semiconductors 9

 To understand PN junction’s IV characteristics, it is important to

CH2 Basic Physics of Semiconductors 10

 This abridged table contains elements with three to ﬁve valence

CH2 Basic Physics of Semiconductors 11

 Si has four valence electrons. Therefore, it can form covalent

CH2 Basic Physics of Semiconductors 12

 With free electrons breaking off covalent bonds, holes are

CH2 Basic Physics of Semiconductors 13

CH2 Basic Physics of Semiconductors 14

 Pure Si can be doped with other elements to change its

CH2 Basic Physics of Semiconductors 15

 If Si is doped with B (boron), then it has more holes, or becomes

CH2 Basic Physics of Semiconductors 16

CH2 Basic Physics of Semiconductors 17

 The product of electron and hole densities is ALWAYS equal to

CH2 Basic Physics of Semiconductors 18

 The process in which charge particles move because of an

CH2 Basic Physics of Semiconductors 19

 Electric current is calculated as the amount of charge inv

 Since velocity is equal to E, drift characteristic is obtained by

CH2 Basic Physics of Semiconductors 21

 A topic treated in more advanced courses is velocity saturation.

CH2 Basic Physics of Semiconductors 22

 Charge particles move from a region of high concentration to a

 Diffusion current is proportional to the gradient of charge (dn/dx)

CH2 Basic Physics of Semiconductors 24

 Linear charge density proﬁle means constant diffusion current,

CH2 Basic Physics of Semiconductors 25

 While the underlying physics behind drift and diffusion currents

 When N-type and P-type dopants are introduced side-by-side in

 In order to understand the operation of a diode, it is necessary

CH2 Basic Physics of Semiconductors 28

 Because each side of the junction contains an excess of holes

 As free electrons and holes diffuse across the junction, a region

CH2 Basic Physics of Semiconductors 30

 The ﬁxed ions in depletion region create an electric ﬁeld that

CH2 Basic Physics of Semiconductors 31

 At equilibrium, the drift current ﬂowing in one direction cancels

CH2 Basic Physics of Semiconductors 32

 Because of the electric ﬁeld across the junction, there exists a

CH2 Basic Physics of Semiconductors 33

 When the N-type region of a diode is connected to a higher

 The PN junction can be viewed as a capacitor. By varying VR

 The equations that describe the voltage-dependent capacitance

CH2 Basic Physics of Semiconductors 36

 A very important application of a reverse-biased PN junction is

CH2 Basic Physics of Semiconductors 37

 When the N-type region of a diode is at a lower potential than