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CONSTRUCTION OF NEW 110/13.

8kV
SUBSTATION HAWIYAH-2
IN TAIF

Capacitor Bank Study

Transients Analysis

Athens, March 2013

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CONTENTS

SUMMARY .................................................................................... 3

1. SYSTEM DATA ........................................................................... 5


2. CIRCUIT MODEL CONSIDERATIONS ............................................. 9
3. CAPACITOR RELATED TRANSIENTS............................................ 10
4. CAPACITOR ENERGIZING-INRUSH CURRENTS ............................. 13
5. OUTRUSH CURRENTS............................................................... 14
6. CAPACITOR ENERGIZING – OVERVOLTAGES ............................... 15
7. SURGE ARRESTER VERIFICATION .............................................. 16
8. CONCLUSIONS........................................................................ 18

APPENDIX A ............................................................................... 19
APPENDIX B ............................................................................... 43

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SUMMARY
This study has been performed by Cooper Power Systems, Inc.

Scope of the study is to verify that transients related with the capacitor
banks and the detuning reactors of the new substation Hawiyah-2 cause
problems neither to the capacitor banks nor to the switchgear. Emphasis
is given to inrush and outrush currents with respect to the detuning
reactor. Surge arrester selection is also verified considering restrike
transients.

Simulations in EMTP-RV were executed in order to investigate the


characteristics of these transients for certain system conditions.

These simulations verified that the capacitor banks related transients


are in accordance with the applicable standards. Moreover, the rating
and energy absorption capability of the proposed line-ground arresters
installed at the capacitor banks is adequate.

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References
1. IEEE Std 1036-1992, IEEE Guide for Application of Shunt Power
Capacitors.

2. IEEE Std 1531.-2003: IEEE Guide for Application and Specification


of Harmonic Filters.

3. IEEE Std 18-1992: IEEE Standard for Shunt Power Capacitors.

4. ANSI/IEEE C37.99-1980: Guide for protection of shunt capacitor


banks.

5. ANSI C37.06-1987, American National Standard for AC High-


Voltage Circuit Breakers Rated on a Symmetrical Current Basis.

6. IEEE Std 519-1992: Recommended Practices and Requirements


for Harmonic control in Electrical Power Systems.

7. IEC 61000-3-6 (1996-10) Ed. 1.0 Electromagnetic compatibility


(EMC) - Part 3: Limits - Section 6: Assessment of emission limits
for distorting loads in MV and HV power systems - Basic EMC
publication.

8. IEEE Std C37.99-2000: IEEE Guide for the protection of shunt


capacitor banks.

Simulation software
CYME’s EMTP-RV (Electromagnetic Transients Program) version 2.2.1
was used for the entire studies described in this report.

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1. SYSTEM DATA
New Substation Hawiyah-2
1. 110 kV busbar short-circuit strength:
- Maximum 3-phase short-circuit current: 21.1 kA, X/R = 5.6
1-phase short-circuit current: 17.2 kA, X/R = 2.5
- Minimum 3-phase short-circuit current: 18.4 kA, X/R = 7.7
1-phase short-circuit current: 14.9 kA, X/R = 2.6
2. Three 40/60 MVA 110/15 kV transformers:
- Z=22% (at 50 MVA base)
- YNyn0 (d5)

Capacitor Banks
 3-phase capacitor bank rating: 8904 kVAR.
 Capacitor bank voltage rating: 15.93 kV (phase-to-phase).
 Nominal frequency: 60 Hz.
 Rated capacitor bank capacitance: 93.036 μF.
 Connected as double star ungrounded neutral.

Current Limiting Reactor


 Rated harmonic filter reactance: 3.48 mH.
 BIL: 125 kV.
 Nominal frequency: 60 Hz.
 Fundamental current rating: 500 A.

Harmonic filter
 Tuned frequency: 279.71 Hz (single tuned).
 Effective Harmonic Filter Bank Rating: 7002 kVAR at 13.8 kV.

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A simple drawing of the Taif’s new substation is given in Fig. 1. A more
detailed drawing of the substation is given in Fig. 2.

110 kV

13.8 kV

Capacitor banks &


reactors

Figure 1. Taif’s new substation (simplified drawing)

The operational scenarios that are considered in this report:


C1. 1 Transformer & 1 Capacitor
C2. 2 Transformers & 1 Capacitor
C3. 2 Transformers & 2 Capacitors (with paralleling)
C4. 2 Transformers & 2 Capacitors (no paralleling)
C5. 3 Transformers (two paralleled and one alone) & 2 Capacitors
C6. 3 Transformers (two paralleled and one alone) & 3 Capacitors
C7. 3 Transformers & 3 Capacitors (no paralleling)

Schematically, these operational scenarios are depicted in Fig. 3.

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Figure 2. Detailed drawing of Taif’s new substation
Hawiyah-2

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OPERATIONAL SCENARIOS

C1 C2

BUS-A BUS B BUS-A BUS B

C3 C4

BUS-A BUS B BUS-A BUS-B

C5 C6

BUS-A BUS-B
BUS-A BUS-B

C7

BUS-A BUS-B

Figure 3. Operational schemes for Taif’s New Substation Hawiyah-2

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2. CIRCUIT MODEL CONSIDERATIONS
For transient analysis purposes:

a. The load of the substation is modelled as a parallel combination of


resistance and reactance at 13.8 kV. It is set equal to 9 MVA with a
power factor of 0.7 for each busbar.

b. The source side is modelled as a series combination of resistance and


reactance calculated using the maximum and minimum 3-phase short-
circuit currents and the following formulae:

, X 1  R1   X R  ,
Z1
Z1  VN I SC _ 3 ph , R1 
1  X R
2

Z0
Z 2  Z 1 , Z 0  3  V N I SC _ 1 ph  Z 1  Z 2  , R0  , X 0  R0   X R 
1  X R
2

c. Busbar reactance is neglected because it is low and, in any case,


would lead in better results in terms of transients.

d. A three-phase model of the system under study is considered.

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3. CAPACITOR RELATED TRANSIENTS
Capacitor bank switching actions result to significant transients in
voltage and current that might cause problems to the bank itself or to
the components and the loads of the system (the low frequency
oscillation produced travels through transformers to the low voltage
networks). Additionally, capacitor banks are a concern during a nearby
fault. However, the use of large reactors (detuning reactors) in series
with the capacitors, reduce significantly the magnitude of the capacitor-
related phenomena.

There is a number of scenarios that must be considered regarding


capacitor banks in order to verify that the switching actions impose no
threat for the capacitor bank or the system. In general the following
cases should be investigated:

Capacitor energizing: when the circuit breaker that connects the


capacitor bank with the system is closed, a high-frequency, high-
magnitude current flows into the capacitor, attempting to equalize the
system voltage and the capacitor voltage. If the circuit breaker is closed
at a voltage peak, the voltage on the capacitor attempts to immediately
increase from the zero-voltage to peak voltage. This results to an
overshoot equal to the amount of the attempted voltage change. This
voltage surge is also of the same high frequency as the inrush current,
and rapidly decays to the system voltage. When a capacitor bank is
energized close to an already energized capacitor bank, a high-
frequency inrush current flows (back-to-back energizing). However the
limiting inductance is the inductance between the banks rather than the
system inductance. The magnitude and frequency of this inrush current
is, therefore, much higher than the inrush to an isolated bank.

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Fault clearing: in the occasion of a fault close to the capacitor bank,
the outrush current from the capacitor banks is a concern for the
breaker closing into the fault. The result is that a high-frequency, high-
magnitude current may flow in a breaker that is not rated for that duty.

Capacitor restrike: During the de-energizing of a capacitor bank, the


circuit breaker opens and discontinues the current flow. If the contactor
does not open successfully, an arc will be established between the
contacts and the capacitor will reignites or restrikes. The contactor
might open and restrike later. The same event might be repeated
several times (multiple restrikes). During normal grounded-wye
capacitor bank de-energizing, the capacitor bank current is interrupted
at the peak system voltage thus leaving a 1.0 pu trapped charge on the
capacitor bank. This trapped charge results in an offset in the transient
recovery voltage (TRV) that reaches a magnitude of 2.0 pu one-half
cycle after opening. Significant transient voltages can occur if the switch
restrikes during clearing. The worst restrike transient occurs when twice
the normal system peak voltage appears across the switch contacts.
Theoretically, in this case, the magnitude of the transient voltage
approaches 3.0 pu. Ungrounded-wye capacitor banks may expose the
capacitor bank switch to recovery voltages greater than 2.0 pu.
Recovery voltages may reach 2.5 pu on the first phase to open when the
other phases open at the next current zero. If two of the phases delay
opening, the recovery voltage may reach 3.0 pu on the first phase to
open. Finally, if one of the other phases delays, the transient recovery
voltage would be 4.1 pu. If a restrike occurs on the first phase to open
at 2.5 pu, a recovery voltage of 6.4 pu can occur on one of the other
two phases because of the voltage that builds up across the neutral
capacitance. The high recovery voltage on another phase can cause a
second restrike, resulting in a two-phase restrike.

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Dynamic overvoltages: energizing a transformer and a capacitor bank
together can result to high long-term dynamic overvoltages that affect
the transformer, the capacitors, protection systems and arresters. The
phenomenon is (up to a certain extend) similar to the harmonic
amplification due to the capacitor bank in frequencies where the system
impedance (as seen by the transformer) is high (parallel resonance).
The harmonics are produced by the transformer inrush due to its
asymmetric nature.

The phenomena that will be investigated are:


- Capacitor energizing, the resulting inrush current and the overvoltage
produced.
- 3-phase fault conditions in the 13.8 kV bus and the resulting outrush
current.
- Restrike phenomena considering multiple restrikes arranged to cause
maximum impact (in order to verify the surge arrester selection by
estimating the arrester’s energy duty).

It must be highlighted that transformer energizing (which could cause


problems as described above) should be performed with the capacitors
banks disconnected. This way the risk of overvoltages due to the
amplification of harmonic distortion is eliminated.

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4. CAPACITOR ENERGIZING-INRUSH CURRENTS
Inrush currents (all three phases) are obtained by simulating the
energizing of one 13.8 kV capacitor bank for BUS-A for all the
operational scenarios C1 to C7 and source maximum short-circuit
conditions considering that the other banks (depending on the scenario)
are already energized (back-to-back switching). Phase-a voltage is
maximum at the moment of energizing. The results are summarized in
the following Table. The corresponding figures are shown in Appendix A
(A.1-A.7).

Table 1. Capacitor energizing: Current Inrush

Current
Frequency
CASE maximum Ipeak x f
(f- Hz)
(Ipeak - kA)

C1 1.76 210 0.03696107

C2 1.91 236 0.04508107

C3 1.74 280 0.04872107

C4 1.76 212 0.03731107

C5 1.91 236 0.04508107

C6 1.75 280 0.04900107

C7 1.76 212 0.03731107

Considering a general purpose breaker, the above is in accordance with


ANSI standards because Ipeak x f  2107

It is important to realize that the presence of the detuning reactor


reduces dramatically the inrush current.

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5. OUTRUSH CURRENTS
Outrush currents (all three phases) of the capacitor banks are obtained
by simulating a 3-phase fault at the 13.8 kV BUS-A for all the
operational scenarios C1 to C7 considering maximum short-circuit
conditions for the source. Fault takes place at the peak of phase-a
voltage (worst case). The results are summarized in the following Table.
The corresponding figures are shown in Appendix A (A.8-A.14).

Table 2. Capacitor energizing: Current Outrush

Current
Frequency
CASE maximum Ipeak x f
(f- Hz)
(Ipeak - kA)

C1 1.94 280 0.05432107

C2 1.93 280 0.05404107

C3 1.94 280 0.05432107

C4 1.94 280 0.05432107

C5 1.93 280 0.05404107

C6 1.94 280 0.05432107

C7 1.94 280 0.05432107

Considering a general purpose breaker, the above is in accordance with


ANSI standards because Ipeak x f  2107.

Note that the detuning reactor reduces significantly the outrush current.

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6. CAPACITOR ENERGIZING – OVERVOLTAGES
Energizing the 13.8 kV capacitor bank with the detuning reactor is
simulated considering statistical switching of the capacitor bank circuit
breaker in order to determine the worst-case transient voltage levels.
Aim of the statistical switching is to take into account the differences in
the time instants in the closing of each phase of the breaker. The
switching instants of the three phases of the capacitor bank switch vary
randomly around phase-a voltage maximum instant assuming a breaker
pole span equal to 5 ms (Gaussian distribution).

Twenty statistical energizations of 13.8 kV BUS-A capacitor bank were


simulated in the weakest possible 110 kV network (minimum short-
circuit conditions) for all the operational scenarios C1 to C7 (total of 140
simulations). The worst cases found this way are shown in the Appendix
A (A.15-A.17) and are summarized in Table 3.

Table 3. Statistical Switching – Worst Cases

Parameter Case Value pu

Peak capacitor bank voltage (phase-ground) C2 21.59 kV 1.92

Peak busbar voltage (phase-ground) C1 15.75 kV 1.40

Peak busbar voltage (phase-phase) C1 29.04 kV 1.49

Assuming that the Basic Switching Impulse Level (BSL) of the 13.8 kV
reactors is approximately equal to:

BSL(ph-g)=80% BIL=0.8125=100 kVp or 8.88 pu


the evaluated worst case stresses are well below the withstand
capability of the reactors. None of these values are threatening either
for the capacitor bank or for the system.

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7. SURGE ARRESTER VERIFICATION
The analysis presented in this section is done with respect to the
following arrester which has been selected for the capacitor banks
according to the guidelines presented in the Appendix B:
MOV Arrester Data:
Manufacturer:..................….......................... Cooper Power Systems
Type: ...............................................VariSTAR Type AZG4 - Gapless
Rated Voltage (Ur):................................…..............................18kV
Maximum Continuous Operating Voltage (Uc) (MCOV):.............15.3kV
Switching Impulse Residual Voltage:..........…............. 38.1kV @ 500A
Switching Surge Energy Absorption Capability:...…...….. 8.9kJ/kVMCOV
Switching Surge Energy Absorption capability:....................…... 136kJ

A two-phase multiple restrike event has been considered in order to


verify that the arrester with the above characteristics is appropriate for
this substation. In the simulation model, the 18 kV Metal Oxide Varistor
(MOV) arrester is connected phase-to-ground between the filter reactor
and the capacitor bank (Figure 3). A typical V-I characteristic has been
used for the surge arrester. Maximum short-circuit current conditions
have been considered with only one capacitor bank (a second bank
would reduce the magnitude of the overvoltages). That is scenario C2.
The results are given in the Appendix A (A.18 – A.20). That is capacitor
voltage (phase-to-neutral), busbar voltage (phase-to-ground) and
capacitor current.

For the two-phase multiple restrike case:


1. The energy duty for the arrester is 129 kJ, i.e. below the minimum
guaranteed arrester capability of 136 kJ.
2. Peak capacitor phase-to-neutral voltage is 26.12 kV.

It must be highlighted that the surge arrester reduces the restrike


overvoltages. As shown in Appendix A, without the arrester all the
relevant parameters would be significantly higher (A.21-A.23). The
results are summarized in Table 4.

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Fig. 4. Surge arrester configuration

Table 4. Surge Arrester Evaluation

Two-phase multiple restrike


Parameter
-With arrester- -Without arrester-

Peak capacitor voltage 26.12 kV 64.86 kV

Peak busbar voltage 15.77 kV 26.43 kV

Peak capacitor current 4.11 kA 7.64 kA

Finally, it must be noted that since a restriking capacitor bank switching


device can result in transient voltages that may cause severe arrester
energy duty or equipment damage, it is desirable to choose a switching
device that will minimize the possibility of restrike.

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8. CONCLUSIONS
Simulations of power system transients related with the operation of the
7 MVar, 13.8 kV, 60 Hz harmonic filters of the new Makkah Substation
verified that the proposed filter (93.036 μF capacitor bank and 3.48 mH
detuning reactor) is in accordance with the applicable standards as
regards transients. Surge arrester selection was also verified considering
restrike transients.

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APPENDIX A
Simulation results

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A.1. INRUSH CURRENT – C1

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A.2. INRUSH CURRENT – C2

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A.3. INRUSH CURRENT – C3

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A.4. INRUSH CURRENT – C4

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A.5. INRUSH CURRENT – C5

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A.6. INRUSH CURRENT – C6

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A.7. INRUSH CURRENT – C7

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A.8. OUTRUSH CURRENT – C1

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A.9. OUTRUSH CURRENT – C2

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A.10. OUTRUSH CURRENT – C3

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A.11. OUTRUSH CURRENT – C4

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A.12. OUTRUSH CURRENT – C5

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A.13. OUTRUSH CURRENT – C6

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A.14. OUTRUSH CURRENT – C7

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A.15. CAPACITOR ENERGISING / CAPACITOR BANK VOLTAGE
(PHASE-GND) – C2 STATISTICAL SWITCHING (SIMULATION 4)

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A.16. CAPACITOR ENERGISING / BUSBAR VOLTAGE (PHASE-
GROUND) – C1 STATISTICAL SWITCHING (SIMULATION 18)

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A.17. CAPACITOR ENERGISING / BUSBAR VOLTAGE (PHASE-
PHASE) – C1 STATISTICAL SWITCHING (SIMULATION 18)

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A.18. TWO-PHASE MULTIPLE RESTRIKE /
CAPACITOR VOLTAGE – C2

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A.19. TWO-PHASE MULTIPLE RESTRIKE /
BUSBAR VOLTAGE – C2

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A.20. TWO-PHASE MULTIPLE RESTRIKE /
CAPACITOR CURRENT – C2

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A.21. TWO-PHASE MULTIPLE RESTRIKE /
CAPACITOR VOLTAGE – C2 (no arrester)

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A.22. TWO-PHASE MULTIPLE RESTRIKE /
BUSBAR VOLTAGE – C2 (no arrester)

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A.23. TWO-PHASE MULTIPLE RESTRIKE /
CAPACITOR CURRENT – C2 (no arrester)

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APPENDIX B
Surge arrester selection information

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