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  • PIC 16f877a Memory Overview

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    sjaradat
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    The document discusses memory systems including memory cells, registers, and memory chips. It describes how memory cells store bits of data using flip-flops or latches. It also explains how tri-state buffers are used to avoid unintended changes to memory cell contents. Additionally, it provides details on reading from and writing to memory cells, registers, and memory chips. Memory chip design including address decoding and determining the necessary number of address lines is also covered.

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    PIC 16f877A memory overview

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    The document discusses memory systems including memory cells, registers, and memory chips. It describes how memory cells store bits of data using flip-flops or latches. It also explains how tri-state buffers are used to avoid unintended changes to memory cell contents. Additionally, it provides details on reading from and writing to memory cells, registers, and memory chips. Memory chip design including address decoding and determining the necessary number of address lines is also covered.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Flag for inappropriate content
    14 views18 pages

    PIC 16f877a Memory Overview

    Uploaded by

    sjaradat
    The document discusses memory systems including memory cells, registers, and memory chips. It describes how memory cells store bits of data using flip-flops or latches. It also explains how tri-state buffers are used to avoid unintended changes to memory cell contents. Additionally, it provides details on reading from and writing to memory cells, registers, and memory chips. Memory chip design including address decoding and determining the necessary number of address lines is also covered.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Flag for inappropriate content
    of 18

    The buss system

    The buss system

    ١ prepared by : Maher Al-omari


    Memory ::
    Memory
    stores binary instructions and data for the µp
    stores binary instructions and data for the µp

    prime(main)memory storage memory

    •Memory Cell
    •Register
    •Memory chip

    ٢ •Memory word prepared by : Maher Al-omari


    The memory
    The memory cell
    cell
    (FFor
    (FF orlatch
    latchas
    asaastorage
    storageelement)
    element)

    Input data
    Output Signal
    –Output

    Enable
    Signal

    1. memory cell is the circuit that can store bit of data


    2. FF or latch is the basic element of memory

    ٣ prepared by : Maher Al-omari


    The memory
    The memory cell
    cell
    Usingof
    Using oftri
    tristate
    statebuffer
    bufferto
    toavoid
    avoidunintentional
    unintentionalchanges
    changes

    Tri State Buffer

    ٤ prepared by : Maher Al-omari


    Writing in
    Writing in to
    to aa memory
    memory cell
    cell

    1 1
    1

    ٥ prepared by : Maher Al-omari


    Reading from
    Reading from aa memory
    memory cell
    cell

    1 1

    ٦ prepared by : Maher Al-omari


    44-bit register (4
    -bit register (4 cells
    cells ))

    I0 I1 I2 I3

    WR
    D D D D
    Q Q Q Q

    EN EN EN EN
    EN

    RD O0 O1 O2 O3

    ٧ prepared by : Maher Al-omari


    Block Diagram
    Block Diagram Of
    Of 44 Bit
    Bit register
    register

    input

    Write Enable

    Read Enable output

    ٨ prepared by : Maher Al-omari


    The Memory
    The Memory chip
    chip

    EN

    EN

    EN

    EN
    Address lines

    ٩ prepared by : Maher Al-omari


    Reading from
    Reading from aa Memory
    Memory chip
    chip

    1
    EN

    EN
    0 EN

    EN

    ١٠ prepared by : Maher Al-omari


    Writing to
    Writing to aa Memory
    Memory chip
    chip

    1
    EN

    EN
    0 EN

    EN

    ١١ prepared by : Maher Al-omari


    The Design of a Memory Chip

     Since we have tri-state buffers on both the inputs and outputs of the flip
    flops, we can actually use one set of pins only.
    – The chip would now look like this:

    WR Input Buffers Size 4x4

    A D Memory Reg. 0 D0 D0
    d e
    A1 d c Memory Reg. 1 D1 A1 D1
    r o
    e d Memory Reg. 2 D2 D2
    A0 A0
    s e Memory Reg. 3
    s r D3 D3

    RD Output Buffers
    RD WR
    ١٢ prepared by : Maher Al-omari
    How to find the number of address lines
    needed for a memory chip

    number of words in the Memory = 2 x

    the number of address lines needed

    1024 x 8 needs : 2 x = 1024


    Log 2 x = log 1024
    X = log 1024/ log 2
    X=10
    ١٣ prepared by : Maher Al-omari
    Memory chip
    Memory chip size
    size and
    and address
    address range
    range
    256 x8
    256 x8

    CS RD WR 00
    0000 0000
    Lines
    Address

    A7
    256x8
    Ao The size of each
    register is 8 bits

    256 registers requires FF 1111 1111


    8 address lines
    8
    Data lines

    ١٤ prepared by : Maher Al-omari


    The chip
    The chip select
    select line
    line

    EN

    EN

    EN

    CS EN
    EN

    ١٥ prepared by : Maher Al-omari


    address decoding
    A3
    A2

    A3 A2 A1 A0 CS RD WR
    0 0 M1

    0011 R3
    Address
    range A1 0010 R2

    A0 0001 R1

    0000 R0

    ١٦ prepared by : Maher Al-omari


    address decoding (cont)
    A3
    A2

    A3 A2 A1 A0 CS RD WR
    1 0 M2

    1011 R11
    A1
    1010 R10

    A0 1001 R9

    1000 R8

    ١٧ prepared by : Maher Al-omari


    What is the total
    A9 s1
    3 Memory size ?
    2
    s0 1
    A8 0
    decoder

    CS RD WR CS RD WR CS RD WR CS RD WR

    000 100 200 300

    Address Lines

    Address Lines
    Address Lines

    Address Lines

    A7 A7 A7 A7
    256x8 256x8 256x8 256x8

    Ao Ao Ao Ao

    0FF 1FF 2FF 3FF

    Data lines Data lines Data lines Data lines

    Address range
    ١٨ prepared by : Maher Al-omari
    for each chip ?

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