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Addis Ababa University

Addis Ababa Institute of Technology

[DLD-Assignment 1]

Name:Mesfin Haftu

ID: ATE/2077/10

Due Date:13/06/20]
Addis Ababa Institute of Technology
School of Electrical and Computer Engineering

Assignment #3
Course no. ECEG-3201 Course title: Digital Logic Design

Q#1) You are required to design a decoder logic circuit that is used to drive a seven segment display, as shown in
Figure 1. The display is used to display six alphabets: H, E, L, P, S, O. Table 1 shows the active segments for each
alphabet. The seven-segment display used is ACTIVE-HlGH.

Table 1
Alphabet Se ments Activated
g
H B,C,E,F,G
E A,D,E,F,G
L D,E,F
P A,B,E,F,G
S A,C,D,F,G

Figure 1 O A,B,C,D,E,F

The decoder circuit has 3 inputs: A0, A1 and A2 and seven outputs (A to G), one for each segment of the seven-
segment display. Figure 2 shows the block diagram of the alphabet decoding logic. The relation between the
input combinations and the alphabet to be displayed is given in Table 2. There are only six input combinations
that will display the alphabets. The other two input combinations can be ignored (don't care).

Table 2
Inputs Alphabet to
be displayed
A2 A1 A0
0 0 0 H

0 0 1 E

0 1 0 L

0 1 0 P

1 0 0 S

Figure 2 1 0 1 O
Solution1:
I. Construct the truth table for the logic circuit showing all possible input combinations and the
corresponding values for the outputs A, B, C, D, E, F, G.
A2 A1 A0 A B C D E F G

H 0 0 0 0 1 1 0 1 1 1

E 0 0 1 1 0 0 1 1 1 1

L 0 1 0 0 0 0 1 1 1 0

P 0 1 1 1 1 0 0 1 1 1

S 1 0 0 1 0 1 1 0 1 1

O 1 0 1 1 1 1 1 1 1 0
II. Using Karnaugh maps, determine the minimized
Boolean expression for each output.
A B C D E F G
0 1 0 1 0 1 0 1 0 1 0 1 0 1

00 0 1 1 0 1 0 0 1 1 1 1 1 1 1

01 0 1 0 1 0 0 1 0 1 1 1 1 0 1

11 x x x x x x x x x x x x x x

10 1 1 0 1 1 1 1 1 0 1 1 1 1 0

A=A2 + A0

B=A2 ’A1’A0’+A1A0

C=A1’A0’

D=A2 +A1A0’+A1’A0

E=A2’+A0

F=1

G=A1’A0’+A2’A0
III. Draw the circuit diagram based on the minimized Boolean expressions.
Q#3) Design a combination circuit that encodes 16-line to 4 line (Hexadecimal to binary converter)

Digital input | binary output

AF AE AD AC AB AA A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 B3 B2 B1 B0

0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0

0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 x 0 0 0 1

0 0 0 0 0 0 0 0 0 0 0 0 0 1 x x 0 0 1 0

0 0 0 0 0 0 0 0 0 0 0 0 1 x x x 0 0 1 1

0 0 0 0 0 0 0 0 0 0 0 1 x x x x 0 1 0 0

0 0 0 0 0 0 0 0 0 0 1 x x x x x 0 1 0 1

0 0 0 0 0 0 0 0 0 1 x x x x x x 0 1 1 0

0 0 0 0 0 0 0 0 1 x x x x x x x 0 1 1 1

0 0 0 0 0 0 0 1 x x x x x x x x 1 0 0 0

0 0 0 0 0 0 1 x x x x x x x x x 1 0 0 1

0 0 0 0 0 1 x x x x x x x x x x 1 0 1 0

0 0 0 0 1 x x x x x x x x x x x 1 0 1 1

0 0 0 1 x x x x x x x x x x x x 1 1 0 0

0 0 1 x x x x x x x x x x x x x 1 1 0 1

0 1 x x x x x x x x x x x x x x 1 1 1 0

1 x x x x x x x x x x x x x x x 1 1 1 1
B0=  (1,3,5,7,9,11,13,15)
B0=  ( Af’Ae’Ad’Ac’Ab’Aa’A9’A8’A7’A6’A5’A4’A3’A2’A1 + Af’Ae’Ad’Ac’Ab’Aa’A9’A8’A7’A6’A5’A4’A3 +
Af’Ae’Ad’Ac’Ab’Aa’A9’A8’A7’A6’A5 + Af’Ae’Ad’Ac’Ab’Aa’A9’A8’A7 + Af’Ae’Ad’Ac’Ab’Aa’A9 +

Af’Ae’Ad’Ac’Ab + Af’Ae’Ad + Af )

B0 =  ( Ae’(Ac’Aa’A8’A6’A4’A2’A1 + Ac’Aa’A8’A6’A4’A3 + Ac’Aa’A8’A6’A5 + Ac’Aa’A8’A7 + Ac’Aa’A9


+ Ac’Ab + Ad ) + Af )

B1 =  ( 2,3,6,7,A,B,E.F)
B1=  ( Af’Ae’Ad’Ac’Ab’Aa’A9’A8’A7’A6’A5’A4’A3’A2 + Af’Ae’Ad’Ac’Ab’Aa’A9’A8’A7’A6’A5’A4’A3 +
Af’Ae’Ad’Ac’Ab’Aa’A9’A8’A7’A6 + Af’Ae’Ad’Ac’Ab’Aa’A9’A8’A7 + Af’Ae’Ad’Ac’Ab’Aa +

Af’Ae’Ad’Ac’Ab + Af’Ae + Af )

B2 =  ( 2,3,4,5,A,B,C,D)
B2 =  ( Af’Ae’Ad’Ac’Ab’Aa’A9’A8’A7’A6’A5’A4’A3’A2+ Af’Ae’Ad’Ac’Ab’Aa’A9’A8’A7’A6’A5’A4’A3 +
Af’Ae’Ad’Ac’Ab’Aa’A9’A8’A7’A6’A5’A4 + Af’Ae’Ad’Ac’Ab’Aa’A9’A8’A7A6’A5 + Af’Ae’Ad’Ac’Ab’Aa +

Af’Ae’Ad’Ac’Ab + Af’Ae’Ad‘Ac+ Af’Ae’Ad )

B3 =  ( 8,9,A,B,C,D,E,F)
B3 =  ( Af’Ae’Ad’Ac’Ab’Aa’A9’A8 + Af’Ae’Ad’Ac’Ab’Aa’A9 + Af’Ae’Ad’Ac’Ab’Aa + Af’Ae’Ad’Ac’Ab + Af’Ae’Ad’Ac +
Af’Ae’Ad + Af’Ae + Af )

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