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FDS6982S

September 2000

FDS6982S
Dual Notebook Power Supply N-Channel PowerTrench SyncFet™

General Description Features


The FDS6982S is designed to replace two single SO-8 • Q2: Optimized to minimize conduction losses
MOSFETs and Schottky diode in synchronous DC:DC Includes SyncFET Schottky body diode
power supplies that provide various peripheral voltages
for notebook computers and other battery powered 8.6A, 30V RDS(on) = 0.016Ω=@ VGS = 10V
electronic devices. FDS6982S contains two unique RDS(on) = 0.022Ω=@ VGS = 4.5V
30V, N-channel, logic level, PowerTrench MOSFETs
designed to maximize power conversion efficiency. • Q1: Optimized for low switching losses
Low Gate Charge ( 8.5 nC typical)
The high-side switch (Q1) is designed with specific
emphasis on reducing switching losses while the low- 6.3A, 30V RDS(on) = 0.028Ω=@ VGS = 10V
side switch (Q2) is optimized to reduce conduction
losses. Q2 also includes an integrated Schottky diode RDS(on) = 0.035Ω=@ VGS = 4.5V
using Fairchild’s monolithic SyncFET technology.

D1
D1 5 4
D2
6 Q1 3
D2
7 2
G1 Q2
S1 8 1
SO-8 G2
S2

Absolute Maximum Ratings TA = 25°C unless otherwise noted

Symbol Parameter Q2 Q1 Units


VDSS Drain-Source Voltage 30 30 V
VGSS Gate-Source Voltage ±20 ±20 V
ID Drain Current - Continuous (Note 1a) 8.6 6.3 A
- Pulsed 30 20
PD Power Dissipation for Dual Operation 2 W
Power Dissipation for Single Operation (Note 1a) 1.6
(Note 1b) 1
(Note 1c) 0.9
TJ, TSTG Operating and Storage Junction Temperature Range -55 to +150 °C

Thermal Characteristics
RθJA Thermal Resistance, Junction-to-Ambient (Note 1a) 78 °C/W
RθJC Thermal Resistance, Junction-to-Case (Note 1) 40 °C/W

Package Marking and Ordering Information


Device Marking Device Reel Size Tape width Quantity
FDS6982S FDS6982S 13” 12mm 2500 units

2000 Fairchild Semiconductor Corporation FDS6982S Rev C(W)


FDS6982S
Electrical Characteristics TA = 25°C unless otherwise noted

Symbol Parameter Test Conditions Type Min Typ Max Units


Off Characteristics
BVDSS Drain-Source Breakdown VGS = 0 V, ID = 1 mA Q2 30 V
Voltage VGS = 0 V, ID = 250 uA Q1 30
∆BVDSS Breakdown Voltage ID = 1 mA, Referenced to 25°C Q2 20 mV/°C
===∆TJ Temperature Coefficient ID = 250 µA, Referenced to 25°C Q1 26
IDSS Zero Gate Voltage Drain VDS = 24 V, VGS = 0 V Q2 500 µA
Current Q1 1
IGSSF Gate-Body Leakage, Forward VGS = 20 V, VDS = 0 V All 100 nA
IGSSR Gate-Body Leakage, Reverse VGS = -20 V, VDS = 0 V All -100 nA

On Characteristics (Note 2)
VGS(th) Gate Threshold Voltage VDS = VGS, ID = 1 mA Q2 1 3 V
VDS = VGS, ID = 250 µA Q1 1 3
∆VGS(th) Gate Threshold Voltage ID = 1 mA, Referenced to 25°C Q2 -3.5 mV/°C
===∆TJ Temperature Coefficient ID = 250 µA, Referenced to 25°C Q1 -5
RDS(on) Static Drain-Source VGS = 10 V, ID = 8.6 A Q2 0.013 0.016 Ω
On-Resistance VGS = 10 V, ID = 8.6 A, TJ = 125°C 0.020 0.027
VGS = 4.5 V, ID = 7.5 A 0.017 0.022
VGS = 10 V, ID = 6.3 A Q1 0.021 0.028
VGS = 10 V, ID = 6.3 A, TJ = 125°C 0.038 0.047
VGS = 4.5 V, ID = 5.6 A 0.028 0.035
ID(on) On-State Drain Current VGS = 10 V, VDS = 5 V Q2 30 A
Q1 20
gFS Forward Transconductance VDS = 5 V, ID = 8.6 A Q2 38 S
VDS = 5 V, ID = 6.3 A Q1 18
Dynamic Characteristics
Ciss Input Capacitance VDS = 10 V, VGS = 0 V, Q2 2040 pF
f = 1.0 MHz Q1 815
Coss Output Capacitance Q2 615 pF
Q1 186
Crss Reverse Transfer Capacitance Q2 216 pF
Q1 66

FDS6982S Rev C (W)


Electrical Characteristics (continued) TA = 25°C unless otherwise noted

Symbol Parameter Test Conditions Type Min Typ Max Units

Switching Characteristics (Note 2)


td(on) Turn-On Delay Time VDD = 15 V, ID = 1 A, Q2 10 18 ns
VGS = 10V, RGEN = 6 Ω Q1 10 18
tr Turn-On Rise Time Q2 10 18 ns
Q1 14 25
td(off) Turn-Off Delay Time Q2 34 55 ns
Q1 21 34
tf Turn-Off Fall Time Q2 14 23 ns
Q1 7 14
Qg Total Gate Charge Q2 Q2 17.5 25 nC
VDS = 15 V, ID = 11.5 A, VGS = 5 V Q1 8.5 12
Qgs Gate-Source Charge Q2 6.3 nC
Q1 Q1 2.4
Qgd Gate-Drain Charge VDS = 15 V, ID = 6.3 A, VGS = 5 V Q2 5.4 nC
Q1 3.1
Drain–Source Diode Characteristics and Maximum Ratings
IS Maximum Continuous Drain-Source Diode Forward Current Q2 3.0 A
Q1 1.3
tRR Reverse Recovery Time IF = 11.5A, Q2 20 ns
QRR Reverse Recovery Charge diF/dt = 300 A/µs (Note 3) 19.7 nC
VSD Drain-Source Diode Forward VGS = 0 V, IS = 3 A (Note 2) Q2 0.42 .7 V
Voltage VGS = 0 V, IS = 6 A (Note 2) Q2 0.56
VGS = 0 V, IS = 1.3 A (Note 2) Q1 0.70 1.2
Notes:
1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design.

a) 78°/W when b) 125°/W when c) 135°/W when mounted on a


mounted on a mounted on a .02 in2 minimum pad.
0.5 in2 pad of 2 oz pad of 2 oz copper
copper

Scale 1 : 1 on letter size paper

2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%

3. See “SyncFET Schottky body diode characteristics” below.

FDS6982S Rev C (W)


FDS6982S
Typical Characteristics: Q2

50 2.5
VGS = 10V

DRAIN-SOURCE ON-RESISTANCE
6.0V
40 4.5V
ID, DRAIN CURRENT (A)

RDS(ON), NORMALIZED
5.0V 4.0V VGS = 3.0V

30

3.5V 1.5 3.5V


4.0V
20 4.5V
6.0V
1 10V
10 3.0V

0.5
0
0 10 20 30 40 50
0 0.5 1 1.5 2 2.5
ID, DRAIN CURRENT (A)
VDS, DRAIN-SOURCE VOLTAGE (V)

Figure 1. On-Region Characteristics. Figure 2. On-Resistance Variation with


Drain Current and Gate Voltage.

2 0.04

ID = 11.5A ID = 11.5 A
DRAIN-SOURCE ON-RESISTANCE

1.8
RDS(ON), ON-RESISTANCE (OHM)

VGS = 10V 0.035


1.6
RDS(ON), NORMALIZED

0.03
1.4

1.2 0.025

1
0.02 TA = 125oC
0.8

0.6 0.015
TA = 25oC
0.4
0.01
-50 -25 0 25 50 75 100 125 150
2 4 6 8 10
o
TJ, JUNCTION TEMPERATURE ( C) VGS, GATE TO SOURCE VOLTAGE (V)

Figure 3. On-Resistance Variation with Figure 4. On-Resistance Variation with


Temperature. Gate-to-Source Voltage.

50 10
VGS = 0V
IS, REVERSE DRAIN CURRENT (A)

VDS = 5V TA = -55 C o

o
40 25 C
ID, DRAIN CURRENT (A)

100o 1
TA = 100oC
30
25oC

20 -55oC
0.1

10

0.01
0
0 0.2 0.4 0.6 0.8
1 2 3 4 5
VSD, BODY DIODE FORWARD VOLTAGE (V)
VGS, GATE TO SOURCE VOLTAGE (V)

Figure 5. Transfer Characteristics. Figure 6. Body Diode Forward Voltage Variation


with Source Current and Temperature.

FDS6982S Rev C (W)


FDS6982S
Typical Characteristics: Q2

10 3000
ID = 11.5A VDS = 5V
f = 1MHz
VGS, GATE-SOURCE VOLTAGE (V)

10V 2500 VGS = 0 V


8
15V CISS

CAPACITANCE (pF)
2000
6
1500
4
1000
COSS
2
500
CRSS
0 0
0 10 20 30 40 0 5 10 15 20 25 30
Qg, GATE CHARGE (nC) VDS, DRAIN TO SOURCE VOLTAGE (V)

Figure 7. Gate Charge Characteristics. Figure 8. Capacitance Characteristics.

100 50
RDS(ON) LIMIT
P(pk), PEAK TRANSIENT POWER (W)
100µs SINGLE PULSE
40 RθJA = 135°C/W
ID, DRAIN CURRENT (A)

10 1ms TA = 25°C
10ms
100ms 30
1s
1 10s
20
VGS = 10V DC
SINGLE PULSE
0.1
RθJA = 135oC/W 10
TA = 25oC

0.01 0
0.1 1 10 100 0.001 0.01 0.1 1 10 100 1000
VDS, DRAIN-SOURCE VOLTAGE (V) t1, TIME (sec)

Figure 9. Maximum Safe Operating Area. Figure 10. Single Pulse Maximum
Power Dissipation.

FDS6982S Rev C (W)


FDS6982S
Typical Characteristics Q1

40 2
VGS = 10V
6.0V 1.8
4.5V
30 4.0V
1.6 VGS = 3.5V

3.5V 4.0V
20 1.4
4.5V
5.0V
1.2
3.0V 6.0V
10 10V
1

2.5V
0.8
0
0 10 20 30 40
0 1 2 3 4
ID, DRAIN CURRENT (A)
VDS, DRAIN-SOURCE VOLTAGE (V)

Figure 11. On-Region Characteristics. Figure 12. On-Resistance Variation with


Drain Current and Gate Voltage.

1.6 0.08
ID = 6.3A
VGS = 10V ID = 3.5A
1.4
0.06

1.2 o
TA = 125 C
0.04
1

o
0.02 TA = 25 C
0.8

0.6
0
-50 -25 0 25 50 75 100 125 150
2 4 6 8 10
o
TJ, JUNCTION TEMPERATURE ( C) VGS, GATE TO SOURCE VOLTAGE (V)

Figure 13. On-Resistance Variation with Figure 14. On-Resistance Variation with
Temperature. Gate-to-Source Voltage.

40 100
o
TA = -55 C VGS = 0V
VDS = 5V o
25 C
125 C
o 10

30 TA = 125 C
o

1
o
25 C
20 0.1
o
-55 C
0.01

10
0.001

0 0.0001

1 2 3 4 5 6 0 0.4 0.8 1.2 1.6

VGS, GATE TO SOURCE VOLTAGE (V) VSD, BODY DIODE FORWARD VOLTAGE (V)

Figure 15. Transfer Characteristics. Figure 16. Body Diode Forward Voltage Variation
with Source Current and Temperature.

FDS6982S Rev C (W)


FDS6982S
Typical Characteristics Q1

10 1200
ID = 6.3A f = 1MHz
VDS = 5V 10V VGS = 0 V
1000
8
15V
800
CISS
6
600
4
400

2
200
COSS
CRSS
0 0
0 4 8 12 16 0 5 10 15 20 25 30

Qg, GATE CHARGE (nC) VDS, DRAIN TO SOURCE VOLTAGE (V)

Figure 17. Gate Charge Characteristics. Figure 18. Capacitance Characteristics.

100 30
SINGLE PULSE
o
100µs RθJA = 135 C/W
RDS(ON) LIMIT 25
1ms o
10 TA = 25 C
10ms
20
100ms
1s
1 10s 15
DC

VGS = 10V 10
0.1 SINGLE PULSE
o
RθJA = 135 C/W 5
o
TA = 25 C
0.01 0
0.1 1 10 100 0.01 0.1 1 10 100 1000
VDS, DRAIN-SOURCE VOLTAGE (V) SINGLE PULSE TIME (SEC)

Figure 19. Maximum Safe Operating Area. Figure 20. Single Pulse Maximum
Power Dissipation.

1
TRANSIENT THERMAL RESISTANCE

0.5 D = 0.5
r(t) , NO RMALIZED EFFECTIVE

0.2 0.2
R θJA (t) = r(t) * R θJA
0.1 0.1 R θJA = 135°C/W
0.05 0.05

0.02 P(pk)
0.02 0.01
0.01 Single Pulse
t1
t2
0.005
TJ - T A = P * R θJA(t)
0.002 Duty Cycle, D = t1 /t2

0.001
0.0001 0.001 0.01 0.1 1 10 100 300
t 1, TIME (s ec)

Figure 21. Transient Thermal Response Curve.


Thermal characterization performed using the conditions described in Note 1c.
Transient thermal response will change depending on the circuit board design.

FDS6982S Rev C (W)


FDS6982S
Typical Characteristics (continued)

SyncFET Schottky Body Diode


Characteristics
Fairchild’s SyncFET process embeds a Schottky diode in Schottky barrier diodes exhibit significant leakage at high
parallel with PowerTrench MOSFET. This diode exhibits temperature and high reverse voltage. This will increase
similar characteristics to a discrete external Schottky the power in the device.
diode in parallel with a MOSFET. Figure 12 shows the
reverse recovery characteristic of the FDS6982S.

IDSS, REVERSE LEAKAGE CURRENT (A)


0.1

0.01 100oC
Current: 3A/div

0.001

0
25oC

0.0001
0 10 20 30
VDS, REVERSE VOLTAGE (V)

Figure 14. SyncFET body diode reverse


leakage versus drain-source voltage and
10nS/div temperature.
Figure 12. FDS6982S SyncFET body diode
reverse recovery characteristic.

For comparison purposes, Figure 13 shows the reverse


recovery characteristics of the body diode of an
equivalent size MOSFET produced without SyncFET
(FDS6982).
Current: 3A/div

10nS/div

Figure 13. Non-SyncFET (FDS6982) body


diode reverse recovery characteristic.

FDS6982S Rev C (W)


TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ FASTr™ QFET™ VCX™


Bottomless™ GlobalOptoisolator™ QS™
CoolFET™ GTO™ QT Optoelectronics™
CROSSVOLT™ HiSeC™ Quiet Series™
DOME™ ISOPLANAR™ SuperSOT™-3
E2CMOSTM MICROWIRE™ SuperSOT™-6
EnSignaTM OPTOLOGIC™ SuperSOT™-8
FACT™ OPTOPLANAR™ SyncFET™
FACT Quiet Series™ POP™ TinyLogic™
FAST® PowerTrench® UHC™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER


NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and


supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product


that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.

Rev. F1

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