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Procedure:
Consider the circuit of MOSFET common source amplifier as shown in Figure 1. Use
R1=33KΩ, R2=18KΩ, RD=1KΩ, RS=470Ω, RL=10KΩ, and CG, CD, CS, Csupply=10µF.
Input Impedance
𝑅𝑖𝑛 = 𝑅1 ∥ 𝑅2 + 𝑅𝑠𝑖𝑔
Output Impedance
R out = 𝑅𝑑 ∥ 𝑅𝐿
R out = 1𝑘 ∥ 10𝑘
R out = 909.09Ω
Voltage Gain
𝑣𝑜
= −𝑔𝑚 (𝑅𝑑 ∥ 𝑅𝐿 )
𝑣𝑖
𝑣𝑜
= 25𝑚 ⋅ (1𝑘 ∥ 10𝑘)
𝑣𝑖
𝑣𝑜
= −22.727 (𝑁𝑂 𝑈𝑁𝐼𝑇)
𝑣𝑖
Simulate the circuit of Figure 1using Proteus/LTSpice software. Find the mid band gain, input
resistance and output resistance of the amplifier circuit and note down the values in Table 1. Add
the simulated circuit, simulated input and output waveforms in the space below.
Use Vsig=20mV(p-p), 5KHz. CIN and CL to model the capacitances introduce by the probes and
scope. For simulation, assume Rsig=50Ω, CIN and CLto be 20pF. (In hardware implementation,
these capacitances can be ignored).
Table 1
Conclusion:
In this experiment of Common Source as an amplifier when we apply sinusoidal
input signal of 20mv(peak-to-peak) we obtain an amplified signal at the output of the Amplifier.
We obtain amplified signal at the output of the amplifier but with the phase inversion of 180
degrees. In Short when we use common source as Amplifier we obtain an amplified signal at the
output of the amplifier but with phase inversion of 180 degrees.
Part:02 Characteristics of MOSFET common drain amplifier/source follower
Components Required:
2N7000 MOSFET, 33KΩ, 18KΩ, 1KΩ, 470Ω resistors, and 4×10µF capacitors.
Procedure:
Consider the circuit of MOSFET common drain amplifier as shown in Figure 2. Use R1=33KΩ,
R2=18KΩ, RD=1KΩ, RS=470Ω, RL=10KΩ, and CG, CD, CS, Csupply=10µF.
Write down the calculations for mid band gain, input resistance and output resistance in the
space provided below.
Input Impedance
𝑅𝑖𝑛1 = 𝑅1 ∥ 𝑅2
𝑅𝑖𝑛1 = 11.64𝑘Ω
𝑅𝑖𝑛 2 = 𝑅1 ∥ 𝑅2 + 𝑅𝑠𝑖𝑔
𝑅𝑖𝑛 2 = 11.64𝑘 + 50
𝑅𝑖𝑛 2 = 11.70𝑘Ω
Output Impedance
𝑅𝑜 1 = 𝑅𝑠 ||𝑟𝑒
𝑅𝑜 1 = 470 ||10
𝑅𝑜 1 = 9.7916
𝑅𝑜 2 = 𝑅𝑑 ∥ 𝑅𝐿 || 𝑟𝑒
𝑅𝑜 2 = 1𝑘 ∥ 10𝑘 ∥ 10
𝑅𝑜 2 = 9.76Ω
Voltage Gain
𝑣𝑜 𝑅1 ∥ 𝑅2
=
𝑣𝑖 𝑅𝑔 + 𝑅1 ∥ 𝑅2
𝑣𝑜 33𝑘 ∥ 18𝑘
=
𝑣𝑖 50 + 33𝑘 ∥ 18𝑘
𝑣𝑜
= 0.99897
𝑣𝑖
Simulate the circuit of Figure 2using Proteus/LTSpice software. Find the mid band gain, input
resistance and output resistance of the amplifier circuit and note down the values in Table 2. Add
the simulated circuit, simulated input and output waveforms in the space below.Use Vsig=20mV(p-
p), 5KHz. CIN and CL to model the capacitances introduce by the probes and scope. For simulation,
assume Rsig=50Ω, CIN and CLto be 20pF.(In hardware implementation, these capacitances can
be ignored).
Table 2
Conclusion:
In this experiment of common drain as an amplifier there is no amplification in output signal as
compared to input signal. Although source follower configuration by itself has voltage gain less
than unity it can used for improving the gain of the larger Amplifier system. Because of its large
input resistance it does not load the output of another Amplifier. Also Source follower has small
output resistance the Source follower can derive a heavy load whose presence would otherwise
reduce the voltage gain. For these reasons Source follower is valuable as an intermediate stage
between amplifier and load.
Part:03 To study the characteristics of MOSFET common gate amplifier
Components Required:
2N7000 MOSFET, 33KΩ, 18KΩ, 1KΩ, 470Ω resistors, and 4×10µF capacitors
Procedure:
Consider the circuit of MOSFET common gate amplifier as shown in Figure 3. Use R1=33KΩ,
R2=18KΩ, RD=1KΩ, RS=470Ω, RL=10KΩ, and CG, CD, CS, Csupply=10µF.
Write down the calculations for mid band gain, input resistance and output resistance in the
space provided below.
Input Impedance
𝑅𝑖 1 = 𝑅𝑠 ∥ 𝑟𝑒
𝑅𝑖 1 = 9.7916Ω
𝑅𝑖𝑛 2 = 𝑅𝑠𝑖𝑔 + 𝑅𝑠 ∥ 𝑟𝑒
𝑅𝑖𝑛2 = 50 + 9.7916
𝑅𝑖𝑛2 = 60Ω
Output Impedance
R out = 𝑅𝑑 ∥ 𝑅𝐿
R out = 1𝑘 ∥ 10𝑘
R out = 909.09Ω
Voltage Gain
𝑣𝑜 𝑔𝑚 (𝑅1 ∥ 𝑅2 )
= 𝑅𝑠𝑖𝑔
𝑣𝑖 𝑔𝑚 𝑅𝑠𝑖𝑔 + +1
𝑅𝑠
𝑣𝑜 25𝑚(909.9)
=
𝑣𝑖 (25𝑚)(50) + ( 𝟓𝟎 ) + 1
𝟒𝟕𝟎
𝑣𝑜
= 9.6449(𝑁𝑜 𝑈𝑛𝑖𝑡)
𝑣𝑖
Simulate the circuit of Figure 3 using Proteus/LTspice software. Find the mid band gain,
input resistance and output resistance of the amplifier circuit and note down the values in
Table 3. Add the screenshots of simulated circuit, input, and output waveforms in the space
below.Use Vsig=20mV(p-p), 5KHz. CIN and CL to model the capacitances introduce by the
probes and scope. For simulation, assume Rsig=50Ω, CIN and CL to be 20pF. (In hardware
implementation, these capacitances can be ignored).
Table 3
Conclusion:
In this experiment of Common Gate as an amplifier when we apply sinusoidal
input signal of 20mv(peak-to-peak) we obtain an amplified signal at the output of the Amplifier.
We obtain amplified signal at the output of the amplifier and also Amplified output signal is in
phase with input signal. Interesting fact is that although common gate configuration provides
amplified signal that is in phase with the input signal but voltage gain is somewhat less in common
gate configuration as compared to common Source configuration. In Short when we use common
source as Amplifier we obtain an amplified signal at the output of the amplifier without any phase
inversion.