In the name of ALLAH, the most Gracious, the Most Merciful

NSE – 847
Essentials of NEMS/MEMS
Course Instructor: Dr. Amna Safdar

Lecture#20&21-01 20/04/2020 1
 What are we up in coming Lectures?

Special (Advanced) Topics: LIGA, HEXSIL, DRIE

(including Bosch etching),
MicroFabrication
• MEMS-CMOS Processing
• MEMS-CMOS Integration Techniques
• Patented Industry Processes e.g., MUMPS, iMEMS,
SUMMiT, and ASIM-X.
• MEMS Structures
• Cantilever: Singly-Clamped Beams and Doubly-
Clamped Beams, Plates
The substrate and adding material to it.

Lecture#20&21-01 20/04/2020 2
 Typical process steps for surface micromachining
• modeling and simulation
• design a layout
• design a mask set

1 thin film formation (by

2 growth or deposition)
3
4
mask
This is where process
lithography
set flow becomes
C
complicated.
etching

die separation release

C
packaging

Lecture#20&21-01 20/04/2020 3

Schematic of a packaged MEMS pressure
detector
The MEMS must be made and a silicon cap
formed over a void with the strain gauges in the
cap. The silicon wafers must be bonded to the
lead frame, correct power and data
connections must be made with wire bonds or
bumps, the hard cap with an opening must be
placed over everything, and a gel dispensed
inside so that corrosive elements are kept out.
 More on packaging
Microscale devices are fragile and difficult to Schematic of a packaged MEMS pressure detector
interface in their ‘raw’ state.
corrosion and simple physical interference
showing some of the requirements unique to MEMS

• Mechanical support
• Protection from the environment
• protect against electromagnetic interference.
•

Miniaturization has decreased the power per unit

‘activity’ but has dramatically increased power
density and associated heating.
Packaging must remove this heat before it damages
the device while at the same time not stressing the
device due to differential thermal expansion and
contraction.
Lecture#20&21-01 20/04/2020 5
 MEMS pressure detector
Consists of two components:
• Fixed electrode
• Flexible diaphragm forming a moving
electrode
• Sealed vacuum cavity between the two
electrodes

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 Bulk μ-machined pressure sensor
Thin Si diaphragm changes shape
when pressure changes on one side
relative to the other.

Piezoresistors (implemented using p+

diffusion) sense the deformation.

Aluminum wires send resistive

electrical signal off the chip.

n+ diffusion is used as an etch stop for

the backside etch.

Oxide + Nitride provides wafer

protection for backside etch and
insulator between Al wires and wafer.
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 Process flow, pass 1
The first pass for determining the process flow is to decide which steps we need.
What are the basic steps necessary to build the
diaphragm?

• Etch backside
(Need to protect front of wafer during backside
etch)
• Add SiO2 and nitride layers
• Etch area above diaphragm to give diaphragm
ability to move easily
• Create an “etch stop” layer
o Reverse bias p-n junction will stop etch
o Start with p-type wafer
o Dope n-type layer or grow n-type epilayer
(layer produces with epitaxy)
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 Process flow, pass 1

The first pass for determining the process flow is to decide which steps we need.

What are the basic steps necessary to build the

sensor?

• Add diffusion to get piezoresistor

• Add wires so that piezoresistor can be connected
to external world
• Note that wires must be metal (Could use
diffusion if the distance is short)

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 Process flow, pass 1
The first pass for determining the process flow is to decide which steps we need.
What processing steps are required to produce entire
device?

• Deposit/pattern oxide and nitride

• Deposit/pattern Al for pads
• Backside etch
• n-type diffusion for etch stop
• p-type diffusion for resistors/wires

Each of these steps results in more steps in the detailed

process flow. But to begin, let’s determine the order in
which the steps must be placed.

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 Process flow, pass 1
Order of steps
What impacts our decisions on choosing an order?

1. Geometry
The oxide must be deposited before the nitride.

2. Temperature 3. Mechanical stress

High T processes must go first. High T If a following step can cause a device to break, you
processes can cause dopants to further diffuse may want to rethink the order if you can. This is why
and metals to melt and flow. release steps are often (though not always) done last.

Which processes are high T? 4. Interaction of chemicals

• Oxidation If an etch will attack another material, you must
• CVD (unless PECVD) either place is earlier in the process flow or protect
• Drive-in for diffusion the material.
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 Process flow, pass 1

Let’s choose an order Order of steps

1. n-type doping
2. Oxide: Can be done before doping of resistors if
oxide is thin. (Boron will implant through thin oxide
but not if oxide is thick!)
3. Dope resistors
4. Deposit nitride
Do we do backside etch or metallization next? Mask 1
A long backside etch will attack metal, and so we must do backside etch first.

Can we pattern nitride and oxide on both front and back at the
same time?
Yes, but etching both sides at the same time will etch all the way through the
silicon and you will not have a diaphragm! And so we do them at different
times because need to protect the front side during backside etch.
Lecture#20&21-01 20/04/2020 12
 Process flow, pass 1
Order of steps
Let’s choose an order

5. Backside etch:
Before etching backside, we must cut the nitride and
SiO2 using Mask 2. Nitride and SiO2 on topside
protects topside of wafer.
6. Front side etch:
Etch nitride and oxide on topside of wafer
6
7. Metallization: Mask 3
How does the metal connect to the doping? Must cut
through the nitride and oxide first. Holes are called
“vias” or “contact cuts”. Must pattern oxide and
nitride on topside of wafer to create contact cuts..
7
8. Metallization: Add aluminum for vias and pads

Mask 2
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 Pass 2, Detailed process flow
A detailed process flow is the list of all steps necessary for the process people to implement the device. It
should include each of the following:
1. All steps in the proper order, including when to clean the wafer
2. Any chemicals necessary
3. Thicknesses of materials

• These choices come for modeling.

• The “process people” can turn chemicals and thicknesses into times necessary for etches,
depositions, etc.

4. Equipment necessary

It is the responsibility of the process flow person to think about which equipment is
necessary for each step. Why? Because if you need a high temperature deposition to follow a
metallization, you need a PECVD to do it or your metal will flow. The process flow person
knows the entire process and makes design decisions.
5. MASKS for photoligthography
Lecture#20&21-01 20/04/2020 14
 Detailed process flow
Let’s revisit each of the basic steps that we came up with and see what is really involved. You will notice
that many of the steps actually turn into several steps when coming up with the detailed process flow. For
this exercise, we will ignore dimensions and chemicals. However, note that these are also important
components of the design flow.

1. n-type doping
a. No mask is required since it covers the entire wafer
b. This could be done by purchasing a wafer with an epilayer
or it requires 2 steps
i. implantation
ii. drive-in

2. Oxide
a. No mask is required since it covers the entire wafer.
b. Note that oxide will grow on both sides of the wafer. If you
do not want it on the backside of the wafer, you must
protect the backside of the wafer.
c. In this case, we do want oxide on both sides of the wafer.
Lecture#20&21-01 20/04/2020 15
 Detailed process flow
Mask 1

3. Dope resistors and wires

a. Mask 1 – what does it look like? (Assume positive
resist.)
b. This step requires 4 total steps
i. Photolithography so that ion implantation only
goes where you want it to go
ii. Ion implantation
iii. Remove photoresist (Must be done before
drive-in. Why?)
iv. Drive-in
4. Deposit nitride Mask 1
a. No mask is required since it covers the entire wafer
b. Depending on the process, you may need to process
both sides of the wafer.
i. PVD often only deposits on one side of the
wafer.
ii. CVD often deposits on both sides of the
Lecture#20&21-01 wafer 20/04/2020 16
 Detailed process flow Mask 2

5. Backside etch
a. Mask 2 – what does it look like? (Assume positive
resist.)
b. Must align Mask 2 with Mask 1 so that the resistors
are on the edge of the diaphragm. → Alignment
marks
c. This step requires 5 steps
i. Photolithography to determine where you want
the backside etch to start
ii. Etch nitride
iii. Etch SiO2
iv. Etch Si (Nitride and the SiO2 used as a “hard
mask” for the long Si etch.)
v. Remove photoresist

Lecture#20&21-01 20/04/2020
Mask 17
2
 Detailed process flow Mask 3

6. Contact Cuts/Diaphragm cut

a. Mask 3 – what does it look like? (Assume positive
resist.)
b. Must align Mask 3 with Mask 1 so that wires
connect to resistors. →Alignment marks
c. This step requires 3 total steps
i. Photolithography to determine where you
want material removed for the metal
ii. Etch the nitride and oxide Mask 3
iii. Remove the photoresist

Lecture#20&21-01 20/04/2020 18
 Detailed process flow Mask 4

7. Metallization
a. Mask 4 – what does it look like? (Assume positive
resist.)
b. Must align Mask 4 with Mask 1 so that metal does
not etch away. →Alignment marks
c. This step requires 4 total steps
i. Deposit the Aluminum
ii. Photolithography to determine which Al you
want to remove Mask 4
iii. Etch unwanted Al
iv. Remove the photoresist

Lecture#20&21-01 20/04/2020 19
 Pass 3, Final process flow

These steps can be combined to create a final process flow.

One additional requirement in process flows is to include information about when to

clean the wafer. Some general guidelines are:

• Always start with an RCA clean and an HF dip to get rid of every possible
• All future cleans are usually RCA cleans without an HF dip. HF may etch away your
MEMS structures.
• Always strip photoresist and clean before high temperature processes.
• Always clean before depositing a new layer.

Lecture#20&21-01 20/04/2020 20
 Final process flow
Final Process Flow for Bulk Micromachined Pressure Sensor
Starting material: 100mm (100) p-type silicon, 1×1015 cm-3 boron

1. Clean: Standard RCA clean with HF dip 14. Etch: Remove nitride and oxide from back of wafer
2. Oxide: Grow SiO2 on both sides of wafer 15. Backside etch: Etch backside with KOH using electrochemical
3. Photolithography: Mask 1 (alignment) C etch stop
Note: since the first patterned material is diffusion, which you cannot see, you Note: photoresist strip not necessary since returning to topside of wafer and
must add alignment marks in the wafer or the first material you can see. If strip will be done later for topside processing.
the first patterned material is something you can see, you do not need a 16. Photolithography: Mask 4 (vias/diaphragm opening)
separate alignment mark mask. 17. Etch: Plasma etch nitride and oxide for vias and diaphragm
4. Etch: Etch alignment marks into SiO2. opening
5. Strip: Strip photoresist 18. Strip: Strip photoresist
Note: since the next step is not a material deposition or a high temp step, a 19. Clean: RCA cleans, no HF dip
clean is not necessary. 20. Metal: Deposit 1 μm of aluminum
6. Photolithography: Mask 2 (piezoresistors) 21. Photolithography: Mask 5 (aluminum)
7. Implant: Ion implantation of boron to achieve 1×1019 cm-3 at 22. Etch: Remove Al with PAN etch
surface after drive-in 23. Strip: Strip photoresist
8. Strip: Strip photoresist 24. Sinter: Anneal contacts at 425°C, C 30 minutes
Note: following step is a high temp step, so must clean wafer before.
9. Clean: RCA cleans, no HF dip
10. Drive-in: Drive in diffusion to achieve 0.2 μm junction depth
Note: following step is a material deposition, so must clean wafer before.
11. Clean: RCA cleans, no HF dip
12. Nitride: Deposit 50 nm silicon nitride using LPCVD
Lecture#20&21-01 20/04/2020 21
13. Photolithography: Mask 3 (backside photolithography for the
 Process flow part 2

❑Develop a basic-level process flow for creating a simple MEMS device

❑State and explain the principles involved in attaining good mask alignment
❑Identify and explain the various issues involved with designing good process
flows

Lecture#20&21-01 20/04/2020 22
 Typical process steps for surface micromachining
• modeling and simulation
• design a layout
• design a mask set

1 thin film formation (by

2 growth or deposition)
3
4
mask
This is where process
lithography
set flow becomes
complicated.
etching

die separation release

packaging

Lecture#20&21-01 20/04/2020 23
 Mask design and layout
Mask layout

• The complete design with all mask layers combined is called the layout of the device.
• Typically use software specifically designed for masks
• Program allows you to place mask layers on top of each other to ensure good
alignment
• Each mask layer shown in a different color and/or line style
• The software will separate the layers into the individual masks for fabrication.
• The software also keeps track of whether masks should be positive or negative
depending on whether the process is typically additive or subtractive

Lecture#20&21-01 20/04/2020 24
 Mask design and layout
Mask alignment

Every mask must have alignment marks that will align the mask to the features on the wafer.

alignment alignment
feature on feature on
wafer mask

mask aligned
with wafer
Lecture#20&21-01 20/04/2020 25
 Mask design and layout
Mask alignment
Issues to think about when designing the shape and the placement of the alignment mark:

• Does the alignment mark shape give wafer orientation as well as alignment?
• Asymmetry is good → a cross is better than a “plus”
• A circular mask opening will produce a square etch in Si showing crystal directions. Align
next masks to the square
• Make sure your mask does not obscure your alignment mark!
• You must be able to see the entire alignment mark through your mask
• Dark areas on masks very dark in order to keep light from going through
• Features on a wafer tend to be gray
• It is good to leave a little “wiggle room” around alignment mark on the wafer

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 Mask design and layout
Mask alignment
• Use a variety of alignment marks
o Use one large alignment mark one to get a sense of where you are on the wafer
o Use smaller ones to fine tune the alignment
o Use several marks on opposite sides of the wafer. A small error in angle can propagate into a
large error across the distance of the wafer
T

• Be sure your alignment mark is in a material you can see.

o You can see edges in most structural materials and in metals
o You cannot see diffusion! T
o If your first step in the process flow is diffusion, you may need to add another mask to
create an alignment mark. Otherwise, you may place the first alignment mark in the first
mask you use
First patterning → first alignment mark

Lecture#20&21-01 20/04/2020 27
 Mask design and layout

Mask alignment
• Know the process flow of your alignment marks
o The process flow of the alignment marks may be different than that of the whole device
since the alignment marks see every mask layer and most of your structural/sacrificial
layers do not
o Does a process step obscure or eliminate an alignment mark you intended to use? (E.g.,
does a deposited layer covers it up?) If so, you must create another one.

• Backside alignment

Backside alignment requires a special “backside aligner” that uses lasers and/or mirror to
find the alignment mark on the backside of the wafer.

Lecture#20&21-01 20/04/2020 28
 Surface μ-machined pressure sensor
Silicon substrate

Poly-Si diaphragm forms one plate of

capacitor.

n+ diffusion layer forms other “plate”

of capacitor

Aluminum wires send capacitive

electrical signal off the chip.

Oxide layer insulates aluminum wires

from rest of chip

Nitride insulates poly-Si diaphragm

from n+ diffusion.

Notches to prevent uncompensated

stresses from breaking diaphragm
Lecture#20&21-01 during release
20/04/2020 29
 Process flow, pass 1
We can go through this example a little quicker.
What are the major steps to create the device?

1. Diffusion of n+ dopant for bottom “plate” of

capacitor
2. Deposit nitride for electrical insulation
3. Deposit sacrificial oxide
4. Add poly-Si diaphragm
o Need pedestals and
o notches to form diaphragm
5.
C
Sacrificial etch
6. Create wires

But isn’t release supposed to be last?

Lecture#20&21-01 20/04/2020 30
 Detailed process flow
Mask 2
1. Diffusion of n+ dopant for bottom “plate” of
capacitor
a. Note that since we cannot see diffusion we will need to etch
alignment marks in the wafer first.
b. Mask 2 – what does it look like? (Assume positive
resist.)
Mask 1 is for alignment marks
c. Breakdown of this step:
i. Etch alignment marks into wafer
ii. Photolithography so that ion implantation
only goes where you want it to go
iii. Ion implantation
iv. Remove photoresist Mask 2
v. Drive-in

2. Deposit nitride
No mask is required since it covers the entire wafer

Lecture#20&21-01 20/04/2020 31
 Detailed process flow Mask 534

3. Deposit sacrificial oxide

a. No mask is required since it covers the entire wafer
b. Why cover the whole wafer? Why not pattern oxide to go
just under the diaphragm and nowhere else?

4. Add poly-Si diaphragm

a. How do we produce notches and pedestals?
We will need two different etches.
b. What will our etch stop method be? Mask
→ Timed etch Mask 34
b. Breakdown of this step:
i. Photolithography notches (Mask?)
Mask 5
ii. Etch notches
iii. Photolithography pedestals (Mask?)
iv. Etch pedestals
v. Deposit poly-Si
vi. Photolithography poly-Si (Mask?)
vii. Etch poly

Lecture#20&21-01 20/04/2020 32
 Detailed process flow Mask 67

5. Sacrificial etch
a. If using oxide for both sacrificial layer and insulation for
the wires, need to do sacrificial etch before laying the oxide
for the wires. Why?
b. Contact lithography requires release to be done last. Why?
How would we change our process flow if we have to do
contact lithography?

6. Create wires The height of the features is

a. Deposit oxide exaggerated, but the
b. Photolith contact cuts (mask?)importance of the “depth of
c. Etch contact cuts
d. Deposit Al focus” idea is very clear. ☺
e. Photolith Al (mask?)
f. Etch Al Mask 7
Mask 6

Lecture#20&21-01 20/04/2020 33
 Final Process Flow for Surface Micromachined Pressure Sensor
Starting material: 100mm (100) p-type silicon, 1×1015 cm-3 boron with a 10 mm n-type epilayer, 5×1016 cm-3 phosphorus

1. Clean: Standard RCA cleans with HF dip 22. Etch: Etch polysilicon
2. Photolithography: Mask 1 (alignment) 23. Strip: Strip photoresist
3. Etch: Etch alignment marks into Silicon. 24. Sacrificial etch: Remove oxide leaving pedestal
4. Strip: Strip photoresist 25. Clean: RCA cleans, no HF dip
5. Photolithography: Mask 2 (n+ diffusion) 26. Oxide: Deposit SiO2 for insulation
6. Implant: Ion implantation of phosphorous 27. Photolithography: Mask 6 (vias)
7. Strip: Strip photoresist 28. Etch: Etch oxide to get vias
8. Clean: RCA cleans, no HF dip 29. Strip: Strip photoresist
9. Drive-in: Drive in diffusion 30. Clean: RCA cleans, no HF dip
10. Clean: RCA cleans, no HF dip 31. Metal: Deposit aluminum for wires
11. Nitride: Deposit insulating nitride layer 32. Photolithography: Mask 7
12. Oxide: Deposit sacrificial SiO2 33. Etch: Etch Aluminum
13. Photolithography: Mask 3 (notches) 34. Strip: Strip photoresist
14. Etch: Short etch to get notches 35. Sinter: Anneal contacts
15. Strip: Strip photoresist
16. Photolithography: Mask 4 (pedestals)
17.
18.
Etch: Longer etch to get pedestals
Strip: Strip photoresist
Final process flow
19. Clean: RCA cleans, no HF dip
20. Polysilicon: Deposit polysilicon for diaphragm
21. Photolithography: Mask 5 (diaphragm)
Lecture#20&21-01 20/04/2020 34
 Other issues in process flow
Other issues in designing good process flows
System partitioning:
• Whether or not to integrate the MEMS device and any necessary electronics on the same chip
• Integration limits MEMS process steps due to temperature, materials, etc.

Process partitioning:
• Material used in one process bond with and/or affect the properties of materials in another processes?
• If so, the order of the process steps may matter significantly.

Backside processing
• Makes many fabrication processes easier, but alignment is more difficult
• Also must take into account which steps affect both sides of wafer and which ones affect only one side

Thermal constraints
• E.g., photoresist cannot withstand high temperatures,
• High temperatures further drive-in dopants
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