ECE145A / 218A Notes: Basic Analysis of Analog Circuits: Mark Rodwell University of California, Santa Barbara

notes, M.
Rodwell, copyrighted
ECE145A / 218A Notes :

Basic Analysis of Analog Circuits
Mark Rodwell
University of California, Santa Barbara
rodwell@ece.ucsb.edu 805-893-3244, 805-893-3262 fax

notes, M. Rodwell, copyrighted
Comment
This (2009) is a transitional year:

Next year 145abc will be reorganized,
reorganized
145a: fundamentals (devices, analog & RF analysis, models)
145cb: RF systems at IC and system level
This year:
some students have taken 145c:
already
l d have
h device
d i models
d l
already know analog circuit analysis well
some students have not
must cover device models
must review some circuit analysis methods
These notes: shortened version (2009 only) of device models

Transistor Circuit Design
This note set
-reviews the basics

-starts at the level of a first IC design course
-moves very quickly
This will
-establish
establish a common terminology
-accommodate capable students having minimal background in ICs.
DC models
d l
DC bi
bias analysis
l i
Large-Signal Model For Bias Analysis
Ib Ic
+
Vbe -
Provided that Vce > 0,

I c = I s exp(Vbe / VT ) and I b = I c / β , where VT = kT / q
...note that Vbe is specified internal to the emitter resistance Rex
Th I e Rex drop
The d is i significan
i ifi t for
f HBTs
HBT operating
ti att currentt densities
d iti
near that required for peak transistor bandwidth.
DC Bias Example: Current Mirror
I ref
Ic2
Q2 Q1
Rex 2 I b 2 I b1 Rex1
b 1 + I e1 ( Rex1 + Ree1 ) = Vbe

b 2 + I e 2 ( Rex 2 + Ree 2 )
Ree 2 Ie2 I e1 Ree1
We have Vbe
and Vbe1 = Vt ln( I c1 / I s1 ), Vbe 2 = Vt ln( I c 2 / I s 2 )
Assume that β >> 1, Ree 2 = 2 Ree1

& assume that AE1 = AE 2 ( AE is the emitter area).
area)
This implies Rex1 = Rex 2 / 2 , and I s1 = 2 I s 2 ,

from which we find I c 2 = I c1 / 2
Simpler DC Model for Bias Analysis

Ib Ic Ib
Vbe Ic
Vbe
It is often sufficient in bias analysis to ignore the

variation of Vbeb with I c and instead take Vbe b ,on = φ .
b = Vbe
Vbe,on depends
d d upon currentt density
d it andd technolog
t h l y.
Biased at current densities within ~ 10% of peak bandwidth bias,
⎧ 0.9 V Modern Si/SiGe HBTs
⎪
Vbe,on = φ ~ ⎨0.7 or 0.9 V InGaAs/InP HBTs
⎪ 1.4 V GaAs/GaInP HBTs
⎩
Simple DC Bias Example
Rc
Ib2 Ib11
Rb
Q2 Q1
Ree
-Vee
If we neglect the I b Rb drops, then Vb1 = Vb 2 = 0 Volts.

Approximate Ve1 = Ve 2 = −φ ≅ −0.9 V (SiGe).
I c1 + I c 2 = 2 I c1 = (−Vee − 0.9V ) / Ree
I c1 = I c 2 = (−Vee − 0.9V ) / 2 Ree
Efficiently Handling Base Currents In Bias Analysis
If I b Rbdrop is singificant,
Rc
one can solve simultaneous equations : Ib2 Rb
Ib1
I c1 + I c 2 = 2 I c1 = ( −Vee − φ − I b1Rb ) / Ree

Q2
where I b1 = I c1 / β , Q1
Ree
Q i k : find
Quicker fi d by it ti :
b iteration
1) solve I c1 = ( −Vee − φ ) / 2 Ree
-Vee
2) solve I b1 ≅ I c1 / β
3) use this value of I b to solve I c1 = ( −Vee − φ − I b1Rb ) / 2 Ree
Works because any well - designed circuit has DC bias

only weakly dependent upon β .
small-signal
ll i l
b
baseband
b d analysis
l i
Hybrid-π Bipolar Transistor Model
Ccbx
Rbb Ccbi Rc
B C
Rbe = β / g m
τ f = τb + τ c Rbe Vbe gm Vbee -jωτc
Cbe,diff gmτ f Cje

b diff =g Rex
E
Accurate model, but too detailed for quick hand analysis

Oversimplified Model for Quick Hand Analysis

Cbe Rbe Ccb g mVbe Rbe g mVbe
B C B C
+ +
Vbe Vbe
− −
E E
In most high
high-frequency
frequency circuits
circuits, the node impedance is low and
Rce is therefore negligible.
Neglecting Rbb in high-frequency
high frequency analysis is a poor approximation
but is nevertheless common in introductory treatments.
The "textbook" analyses which follow use this oversimplified

model. These introductoryy treatments will later be refined.
Common Emitter Stage: Basics
RLeq
2) δVC = − RLeqq ⋅ δI C
7) Rin ,T = δVb / δI b = β (re + Re )
5) δI b = δI c / β
1) δI e ≅ δI c
+
4) δVbe = δI e / g m
−
3) δVe = RE ⋅ δI e
6) δVb = δI e ⋅ (re + Re ) = δI b ⋅ β (re + Re ) RE
8) δVout / δVin = δVout / δVB = − RLeq /(re + Re ) = − RLeq /( Re + 1 / g m )
Gain is - RLeq /( Re + 1 / g m ) ; Transistor Rin is β (re + RE )

Emitter Follower Stage: Basics
6) Rin ,T = δVb / δI b = β (re + RLeq )

4) δI b = δI c / β
1) δI e ≅ δI c
+
3) δVbe = δI e / g m
−
2) δVe = RLeq ⋅ δI e
RLeq
5) δVb = δI e ⋅ (re + RLeqq ) = δI b ⋅ β (re + RLeqq )
7) δVout / δVin = δVout / δVE = RLeq /(re + RLeq ) = RLeq /( RLeq + 1 / g m )
Gain is RLeq /( RLeq + 1 / g m ) ; Transistor Rin is β (re + RE )

Common-Base Stage: Basics

6) δVin = δI e ⋅ (re + Rb / β ) 2) δVout = RLeq ⋅ δI C
7) Rin ,T = δVe / δI e = re + RB / β
+
5) δVbe = δI e / g m − 1) δI e ≅ δI c
RLeq
RB
4) δVb = δI c ⋅ Rb / β
3) δI b = δI c / β
7) δVout / δVin = RLeq /(re + Rb / β )
Gain is RLeq /(re + Rb / β ) ; Transistor Rin is re + Rb / β

Emitter Follower Output Impedance

ECE145C /218C notes, M. Rodwell, copyrighted
Common-Base Stage: Basics

6) δVin = δI e ⋅ (re + Rb / β ) 2) δVout = RLeq ⋅ δI C
Rout ,emitter Rout ,amp 7) Rin ,T = δVe / δI e = re + RB / β

RB
+
5) δVbe = δI e / g m − 1) δI e ≅ δI c
RLeq
RB
4) δVb = δI c ⋅ Rb / β
3) δI b = δI c / β
7) δVout / δVin = RLeq /(re + Rb / β )
REE Gain is RLeq /(re + Rb / β ) ; Transistor Rin is re + Rb / β
E.F. output impedance is same problem as C.B. input impedance
Rout ,emitter = re + RB / β = 1 / g m + RB / β
Rout ,amp = Rout ,emitter REE

Including Bias Circuit Resistances
RLeq = RC RL RC
RB1
Rin , Amp = RB1 RB 2 RinT Rin ,T
Rgen Vin RL
Vgen RB1
Th are (trivially
These (t i i ll ) added
dd d in
i parallel
ll l with
ith the
th transisto
t it r
terminal impedances to determine the net circuit impedances.
From which, Vin / Vgen = Rin ,amp /( Rin ,amp + Rgen ) , etc.
Baseband Analysis Of Multistage Circuits
For baseband analysis of multi-stage circuits,

simply break into individual stages.
Q1 Q3 Load impedance of the Nth stage includes the input
Q2 Q4
impedance of the (N+1)th stage
Analysis is then trivial...
trivial
Rin2 Rin3
Vout2 Rin4
Vin1 Vout3
Q3
Q1 Vout1 Q4
Q2
Rin3 Vout2=Vin3
Vout3=Vin4
Vin2=V
Vout1 Rin4
Rin2
small-signal
ll i l
b
baseband
b d analysis
l i
High-Frequency Analysis: The General Problem
Ccbx = 6.4 fF Rc = 6500 Ω
B Rbb = 49 Ω Ccbi = 3.7 fF C
Vb'e Rπ = g mVb 'e

350 Ω
Cdiff = C je =
Rex = 4.3 Ω
182 fF 38 fF
E
Ccbx = 6.4 fF Rc = 6500 Ω
Vb'e Rπ = g mVb 'e

350 Ω
Q1 Cdiff = C je =
Q2 Rex = 4.3 Ω
182 fF 38 fF
Vgen
E
Analyzing frequency response is difficult: cannot separate stage-by-stage

y accurate,, ggeneral,, tedious.
Method #1: nodal analysis:
Method #2: method of time constants: accurate, limited applicabilty, quick & intuitive
N d l Analysis
Nodal A l i
Tutorial: Transfer Function Analysis: Nodal Analysis I

Simple & very familiar example : common - emitter amplifier.
Vin Vout
Rgen
Vgen
Rb C L RL
Ccb
Vin B C Vout
Rgen
Vgen
E
Rb
Cbe Rbe gmVbe CL RL
Tutorial: Transfer Function Analysis: Nodal Analysis II
Reduced circuit : Vin Vout
( Ri = Rgen || Rbe || Rb )
Ii=Vgen/Rgen Cbe Ri gmVbe CL RL
Step 1 : Write Nodal Equations from KCL
⎡Gi + sCbe + sCcb − sCcb ⎤ ⎡ Vin ⎤ ⎡ I i ⎤

⎢ g − sC ⎥ ⎢ ⎥ =⎢ ⎥
⎣ m cb GL + sCL + sCcb ⎦ ⎣Vout ⎦ ⎣ 0 ⎦
Tutorial: Transfer Function Analysis: Nodal Analysis III

Step 2 : Solve Nodal Equations :
Vout / I in = N ( s ) / D ( s )
Gi + sCbe + sCcb 1
N ( s) = = −( g m − sCcb )
g m − sCcb 0
Gi + sCbe + sCcb − sCcb
D( s) =
g m − sCcb GL + sCL + sCcb
D ( s ) = (Gi + sCbe + sCcb )(GL + sCL + sCcb ) − (g m − sCcb )(− sCcb )
Step 3 : Organize in powers of s

D ( s ) = GiGL
+ s(GiCL + GiCcb + GLCbe + GLCcb + g mCcb
+ s 2 (CbeCL + CbeCcb + CcbCL + CcbCcb − CcbCcb )
Tutorial: Transfer Function Analysis: Nodal Analysis IV
Step 4 : Separate into dimensionless ratio - of - polynomials form,

separating
p g constants and g
gains from the transfer function...
Vout Vout N ( s)
= =
I in Vgen / Rgen D ( s )
− ( g m − sCcb )
=
⎛ GiGL + s(GiCL + GiCcbb + GLCbe b + GLCcb b + g mCcb
b⎞
⎜ ⎟
⎜ + 2
+ + ⎟
⎝ s ( C C
be L C C
be cb C C
cb L ) ⎠
Vout − ( g m − sCcb ) Ri RL / Rggen

=
Vgen ⎛1 + s( RLCL + RLCcb + RiCbe + RiCcb + g m Ri RLCcb ⎞
⎜ ⎟
⎜ + 2
+ + ⎟
⎝ s ( C C
be L C C
be cb C C
cb L ) R R
i L ⎠
Tutorial: Transfer Function Analysis: Nodal Analysis V

Ri ( Rbe || Rb || Rgen ) ( Rbe || Rb ) Rin , Amp
note that = = =
Rggen Rggen ( Rbe || Rb ) + Rggen Rin , Ampp + Rggen
so...
⎛ Rin , Amp ⎞
Vout
=⎜ ⎟(− g m RL )
Vgen ⎜⎝ Rin , Amp + Rgen ⎟⎠ b1
− (1 − sC
Ccb / g m ) a1
×
⎛1 + s( RLCL + RLCcb + RiCbe + RiCcb + g m Ri RLCcb ) ⎞
⎜ ⎟
⎜ + 2
+ + ⎟
⎝ s ( C C
be L C C
be cb C C
cb L ) R R
i L ⎠ a2
Vout ( s ) Vout 1 + b1s

⇒ =
Vgen ( s ) Vgen 1 + a1s + a2 s 2
mid − band
Tutorial: Transfer Function Analysis: Nodal Analysis VI

Step 5 : Find the roots (poles & zeros) of the polynomial
Vout ( s ) Vout 1 + b1s Vout 1 + b1s

= =
Vgen ( s ) Vgen 1 + a1s + a2 s 2
Vgen (1 − s / s p1 )(1 − s / s p 2 )
mid −band mid − band
what are efficient methods of finding the poles ?

Finding
Fi di Poles
P l
f
from T
Transfer
f Functions
F ti
Finding Poles and Zeros
Ratio - of - Polynomial Form :

Vout ( s ) Vout 1 + b s + b s 2
+ ...
= *s m 1 2
Vgen ( s ) Vgen 1 + a1s + a2 s 2 + ...
at midband
Poles and Zeros :

Vout ( s ) Vout (1 − s / sz1 )(1 − s / sz1 )(1 − s / sz1 )...
= *s m
Vgen ( s ) Vgen (1 − s / s p1 )(1 − s / s p1 )(1 − s / s p1 ))...

at midband
Finding Poles: Complex Poles
Vout 1 + b1s + b2 s 2 + ...

=k
Vgen 1 + a1s + a2 s 2 + a3s 3
If a3 / a2 << a2 then we can ignore the s 3 at moderate frequencie s and
Vout ⎛ 1 + b1s + b2 s 2 + ... ⎞
≈ k ⎜⎜ ⎟⎟
Vgen ⎝ 1 + a 1 s + a 2 s 2
⎠ ωn
jωd
If the roots of this are complex,
complex then
Vout ⎛ 1 + b1s + b2 s 2 + ... ⎞ ⎛ 1 + b1s + b2 s 2 + ... ⎞
= k ⎜⎜ ⎟⎟ = k ⎜⎜ ⎟
2 ⎟
Vgen ⎝ 1 + a1s + a2 s ⎠
2
⎝ 1 + (2ζ / ωn ) s + s / ωn ⎠
2 ζωn
⎛ ⎞
⎜ ⎟
Vout ⎜ 1 + b1s + b2 s 2 + ... ⎟
= k⎜ ωd2 = ωn2 (1 − ζ 2 )
Vgen ⎛ s ⎞⎛ s ⎞⎟
⎜ ⎜⎜1 − ⎟
⎟⎜⎜ 1 + ⎟⎟ ⎟⎟
⎜
⎝ ⎝ − ζωn + jωd ⎠⎝ − ζωn − jωd ⎠⎠
Finding Poles: Separated Pole Approximation

If the roots are widely separated
g ( a2 /a1 ) << a1 , then
e.g.
Vout ⎛ 1 + b1s + b2 s 2 + ... ⎞
= k ⎜⎜ ⎟⎟
jω
⎝ 1 + a1s + a2 s ⎠
2
I in
Vout 1 + b1s + b2 s 2 + ...
s = − a2 / a1
≅k
I in ⎛ ⎛ a2 ⎞ ⎞ σ
(1 + a1s )⎜⎜1 + ⎜⎜ ⎟⎟ s ⎟⎟ s = − a1
⎝ ⎝ a1 ⎠ ⎠
a1 is the dominant pole.

IIntroductory
t d t
Ci
Circuit
it Design:
D i summary
Gain Stages: Elementary Bandwidth Analysis
Using the oversimplified device model below, with Cpi denoting the sum of
base-emitter depletion and diffusion capacitances, bandwidth of CE/CB/CC
stages
g can be found….
Cbe Rbe Ccb g mVbe

B C
+
Vbe
−
E
CE Stage: Elementary Bandwidth Analysis
CL
Rgen
RL
Rc
Rin
Ri is the parallel combination of Rgen, Rin, and Rpi

RLeq is the parallel combination of RL, Rc, and Ro
Note in the dominant pole (a1) the miller-multiplication of the collector base
capacitance
CC Stage: Elementary Bandwidth Analysis
Rgen
CL
RL
Rin
REE
Ri is the parallel combination of Rgen, and Rin,

RLeq is the parallel combination of Ree and RL
Note that the frequency response is a mess. Given CL, the transfer function
very often has complex poles
poles, and may show strong gain peaking
peaking, hence
ringing in the pulse response.
CB Stage: Elementary Bandwidth Analysis
Cin ,cb = C je + g mτ b
Rgen Rcc CL
RL
Rin
Rgen Vin Cin,cb Ccb Rcc CL
qI / kT
g m ( jω ) =
1 + jωτ c
V
Vgen RL
Rin Rin gm*Vin
Here we have a problem. To the extent that the CB stage is modeled by a very
very simple hybrid-pi model (explicitly, with zero Rbb), we find (by very simple
analysis) very high bandwidth
bandwidth, with poles having time constants equal to tautau_b,
b
to tau_c, and to the product of the load resistance times (Ccb+CL).
Note that
1) IInput capacitance
i is
i indeed
i d d as noted.
d Does
D not include
i l d effect
ff off tau_c
2) Ignoring Rbb in CB stage analysis, while appealing for simplicity (e.g.
g
undergrad classes)) is quite
q unreasonable,, as CcbRbb often dominates
high frequency rolloff. More regarding this later.
Method
M th d off
Ti
Time Constants
C t t
make revision for 2009----first before MOTC, give by summary

without derivation the standard stage expressions
expressions.
then define MOTC, first and second order

Method
M th d off
then show a 1-stage Darlington diff amp, and say caps to
ground, caps between inputs and outputs.
Ti
Time Constants
C t t
Give expression for caps to ground
Give expression for caps between in and out of general block
then use this for CD stage Cgs only

then use this for CC stage Cbe only
then do for CE stage Ccb only
then work the full Darlington diff amp
then show how CE (with degen) CB CC are same problem
then re-show stage relationship

Finding Bandwidth: Method of Time Constants
Ccbx = 6.4 fF Rc = 6500 Ω
Vb'b'e Rπ = g mVb 'e

350 Ω
Q1 C diff = C je =
Q2 Rex = 4.3 Ω
182 fF 38 fF
Vgen
E
Ccbx = 6.4 fF Rc = 6500 Ω
Vb'e Rπ = g mVb 'e

350 Ω
C diff = C je =
Rex = 4.3 Ω
182 fF 38 fF
take a general RC network (no inductors or delays

tau), and separate into 2 parts, network without
capacitors, and the capacitors:
MOTC: Separation into Capacitors & Resistive N-port
The internal capacitor-free network is now frequency-

independent The MOTC method (not proven here) relies on
independent.
results from n-port network theory
MOTC: Open-Circuit Resistances
R110 is
i the
h small
ll signal
i l resistance
i measuredd at port one with
ih
all other ports open - circuited. This is determined by
applying a test voltage (or current) at the port and computing
from this the resulting current (or voltage)
MOTC: the Dominant Time Constant
The MOTC first - order time constants directly give us the

dominant time constant a1 of the circuit. If (and only if) the
secondary time constant a2 is negligible, the 3 - dB
bandwidth is 1 / 2πa1. We must use the second - order
(short - circuit) time constants to determine a2 .
MOTC: Are We Saving Any Work ?
Are we saving work relative to brute-force nodal analysis:

MOTC would be of only moderate value if we had to calculate
all the Ri's each time. Fortunately, most terms involve quantities
already found in midband stage analysis: input and output
impedances, load impedances, etc.
MOTC: Short-Circuit Resistances
R112 is the small signal resistance measured at port one with

all other ports open - circuited,
except for port 2, which is shorted
MOTC: The Second-Order Time-Constant

MOTC: Working these Efficiently
Because Rxxy R yy0 = Rxx0 R yyx , we always have 2 choices in

finding each term in the MOTC. The trick is to work the
problem so that as much as possible :
1)) terms are related to input,
p ouput,
p load impedances
p
2) terms are ones found earlier, in a1 analysis.
There are 2 " funny
funny"cases which arise so often that I will
give them on the next 2 pages (note these are intimately
related
l d to the
h well
ll - known
k Miller
ill effect))
MOTC and the Miller Effect
R = Ri (1 + Av ) + Rout
y
xx
Av Rout
Ri
C
Av Rout
Ri
a1 = τ = [Ri (1 + Av ) + Rout ] • C
MOTC: port impedances between collector and base
If we decide explicitly that Rx is to denote the parallel

combination of any external circuit resistances and Rbe ,
and that RLeq similarly denotes the combined effect of
external resistors and Rce , then
R yy0 = Rx (1 + g m RLeq ) + RLeq
MOTC: Port Impedances Between Emitter & Base

MOTC: Multistage Example
work on the board...

E d
End

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notes, M.

ECE145A / 218A Notes :

rodwell@ece.ucsb.edu 805-893-3244, 805-893-3262 fax

This (2009) is a transitional year:

These notes: shortened version (2009 only) of device models

Transistor Circuit Design

This note set

-reviews the basics

Large-Signal Model For Bias Analysis

Provided that Vce > 0,

DC Bias Example: Current Mirror

b 1 + I e1 ( Rex1 + Ree1 ) = Vbe

Assume that β >> 1, Ree 2 = 2 Ree1

This implies Rex1 = Rex 2 / 2 , and I s1 = 2 I s 2 ,

Simpler DC Model for Bias Analysis

It is often sufficient in bias analysis to ignore the

Simple DC Bias Example

If we neglect the I b Rb drops, then Vb1 = Vb 2 = 0 Volts.

Efficiently Handling Base Currents In Bias Analysis

I c1 + I c 2 = 2 I c1 = ( −Vee − φ − I b1Rb ) / Ree

Works because any well - designed circuit has DC bias

τ f = τb + τ c Rbe Vbe gm Vbee -jωτc

Cbe,diff gmτ f Cje

Accurate model, but too detailed for quick hand analysis

Oversimplified Model for Quick Hand Analysis

The "textbook" analyses which follow use this oversimplified

Common Emitter Stage: Basics

8) δVout / δVin = δVout / δVB = − RLeq /(re + Re ) = − RLeq /( Re + 1 / g m )

Gain is - RLeq /( Re + 1 / g m ) ; Transistor Rin is β (re + RE )

Emitter Follower Stage: Basics

6) Rin ,T = δVb / δI b = β (re + RLeq )

7) δVout / δVin = δVout / δVE = RLeq /(re + RLeq ) = RLeq /( RLeq + 1 / g m )

Gain is RLeq /( RLeq + 1 / g m ) ; Transistor Rin is β (re + RE )

Common-Base Stage: Basics

Gain is RLeq /(re + Rb / β ) ; Transistor Rin is re + Rb / β

Emitter Follower Output Impedance

Common-Base Stage: Basics

Rout ,emitter Rout ,amp 7) Rin ,T = δVe / δI e = re + RB / β

REE Gain is RLeq /(re + Rb / β ) ; Transistor Rin is re + Rb / β

E.F. output impedance is same problem as C.B. input impedance

Rout ,amp = Rout ,emitter REE

Including Bias Circuit Resistances

Baseband Analysis Of Multistage Circuits

For baseband analysis of multi-stage circuits,

High-Frequency Analysis: The General Problem

Ccbx = 6.4 fF Rc = 6500 Ω

B Rbb = 49 Ω Ccbi = 3.7 fF C

Vb'e Rπ = g mVb 'e

B Rbb = 49 Ω Ccbi = 3.7 fF C

Vb'e Rπ = g mVb 'e

Analyzing frequency response is difficult: cannot separate stage-by-stage

Tutorial: Transfer Function Analysis: Nodal Analysis I

Tutorial: Transfer Function Analysis: Nodal Analysis II

Reduced circuit : Vin Vout

Ii=Vgen/Rgen Cbe Ri gmVbe CL RL

Step 1 : Write Nodal Equations from KCL

⎡Gi + sCbe + sCcb − sCcb ⎤ ⎡ Vin ⎤ ⎡ I i ⎤

Tutorial: Transfer Function Analysis: Nodal Analysis III

D ( s ) = (Gi + sCbe + sCcb )(GL + sCL + sCcb ) − (g m − sCcb )(− sCcb )

Step 3 : Organize in powers of s

Tutorial: Transfer Function Analysis: Nodal Analysis IV

Step 4 : Separate into dimensionless ratio - of - polynomials form,

Vout − ( g m − sCcb ) Ri RL / Rggen