ECE 695R:

SYSTEM-ON-CHIP DESIGN
Module 3: Behavioral Synthesis
Lecture 3.18: SIMD Units

Anand Raghunathan
raghunathan@purdue.edu
Fall 2014, ME 1052, T Th 12:00PM-1:15PM
ECE 695R: System-on-Chip Design, Fall 2014 © 2013 Anand Raghunathan 1
 Behavioral Synthesis with SIMD Units

• Basic idea: SIMD units are dynamically

reconfigurable to operate in various SIMD
modes

ECE 695R: System-on-Chip Design, Fall 2014 2

 SIMD Units: Example
• 32-bit adder with 4 SIMD modes
8 8 8 8 8 8 8 8

ADD8 ADD8 ADD8 ADD8

8 8 8 8
L3 L2 L1

c31, s31-s24 c24, s23-s16 c16, s15-s8 c8, s7-s0

C[1]
Ctrl. SIMD Delay Energy C[0]
C[1]
signal mode (ns) /op (pJ) c16 c8

00 32 12.68 209.2 L2 L1
01 16-16 6.51 202.8
10 16-8-8 6.51 201.1 C[1]
C[0]
11 8-8-8-8 3.30 199.6 c24
- None 11.93 193.5 L3
ECE 695R: System-on-Chip Design, Fall 2014 3
 Behavioral Synthesis with SIMD Units: Example

• SIMD units 8 8 8 8
255
8

are useful for *1 *2 +4

x5
behavioral 8
16 16

descriptions -1 +3
9

with variable 8 417

16
16 16

bitwidths +1
8
*3 +5
+2 16 16
Res. Constraint 8

1 ADD // 1 cycle M1 M2
1 SUB // 1 cycle
1 MUL // 2 cycles
2 MEM // 1 cycle :=

ECE 695R: System-on-Chip Design, Fall 2014 4

 Behavioral Synthesis with SIMD Units: Example
Schedule w/o SIMD units Schedule with SIMD units
EET = 2218 ns *1 +4
S0 :=1, *1, +4 S0 :=1
Energy = 11.19 nJ *2 +1
Area = 235.4 units
S1 +1, *1
-1, +2 S1
Simultaneous improvement
S2 *2, -1, +2
in performance and energy
consumption *3, +3 S2
S3 *2
*3, +5 S3
S4 *3, +3 EET = 1621 ns
Energy = 7.99 nJ M1, M2 S4
S5 *3, +5 Area = 241.9 units
done done
S6 M1, M2
ECE 695R: System-on-Chip Design, Fall 2014 5