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5 4 3 2 1

:tϮhD;ϭϰ͘ϬΗͿ/ŶƚĞůŚŝĞĨZŝǀĞƌůŽĐŬŝĂŐƌĂŵ Ϭϭ
D
Wϲ>^d<hW D

>ŽŶŶ;ϭϰ͘ϬΗͿ
>zZϭ͗dKW
Zϯ^K/DDϭ /ŶƚĞů/ǀLJƌŝĚŐĞͬ^ĂŶĚLJƌŝĚŐĞ
ZϯϭϯϯϯΕϭϲϬϬDdͬƐ W'ϭϰ >zZϮ͗^'E
DĂdžŝŵĂϰ'Ɛ
>zZϯ͗/Eϭ;,ŝŐŚͿ
W'ϭϮ WƌŽĐĞƐƐŽƌ͗ĂƵůŽƌĞ
ZdŽŶŶ >zZϰ͗/EϮ;>ŽǁͿ
WŽǁĞƌ͗ϯϱ;tĂƚƚͿ
>zZϱ͗^s
Zϯ^KͲ/DDϮ WĂĐŬĂŐĞ͗ƌW'ϵϵϴ W'ϭϱ
ZϯϭϯϯϯΕϭϲϬϬDdͬƐ >zZϲ͗Kd
DĂdžŝŵĂϰ'Ɛ ^ŝnjĞ͗ϯϳ͘ϱdžϯϳ͘ϱ;ŵŵͿ
W'ϭϯ ,D/ŽŶŶ
W'ϬϮͲϬϱ ŽƐƚZĞĚƵĐĞ WŽǁĞƌ^ŽƵƌĐĞ
W'ϭϱ
KϮDŝĐƌŽKϴϲϴϮ
><ϭϯϯD ^LJƐƚĞŵŚĂƌŐĞWŽǁĞƌ;нd,'Ϳ
D/džϰ &/džϴ W'Ϯϱ

C C

^dͲϭƐƚ, >s^/ŶƚĞƌĨĂĐĞ ^>'ϱϱϰϰϴsdZ


ȋͲȌ /ŶƚĞůWĂŶƚŚĞƌWŽŝŶƚ
WŽǁĞƌ͗ ^dϬϲ͘Ϭ'ďͬƐ Zd/ŶƚĞƌĨĂĐĞ ^LJƐƚĞŵŝƐĐŚĂƌŐĞWŽǁĞƌ
,Dϳϲ͕,DϳϬ;EŽŶsWZKͿ
WĂĐŬĂŐĞ͗ϵ͘ϱ;ŵŵͿ ,D//ŶƚĞƌĨĂĐĞ ȋȌ ;нϭ͘ϱsͬнϯsͬнϱsͿ W'ϯϰ
YDϳϳ;sWZKͿ ȋͳȌ
W'Ϯϯ h^ϯ͘Ϭ/ŶƚĞƌĨĂĐĞ h^ϯ͘ϬWŽƌƚdžϭ ȋͲȌ
WůĂƚĨŽƌŵ^ŽŶƚƌŽůůĞƌ,Ƶď h^Ϯ͘Ϭ
^W/ŝŶƚĞƌĨĂĐĞƐĞůĞĐƚ ^dͲͲZKD ȋʹȌ WŽǁĞƌ͗ϯ͘ϱtĂƚƚ
hϭϰ͗ ϮDĨŽƌEŽŶͲsWZK ^dϬϯ͘Ϭ'ďͬƐ W'Ϯϭ ZŝĐŬƚĞŬZdϴϮϮϯW
EŽŶ^ƚƵĨĨĨŽƌsWZK WŽǁĞƌ͗ WĂĐŬĂŐĞ͗&'ϵϴϵ ϯϮ͘ϳϲϴ<,nj
WĂĐŬĂŐĞ͗ϭϮ͘ϳ;ŵŵͿ ^ŝnjĞ͗ϮϱdžϮϱ;ŵŵͿ ȋͳȌ
^LJƐƚĞŵWŽǁĞƌ;нϯsWhͬнϱsWhͬ
hϭϯ͗ ϰDĨŽƌEŽŶͲsWZK h^ϯ͘ϬWŽƌƚdžϭ h^Ϯ͘Ϭ нϯs^ϱͬнϱs^ϱͿ W'Ϯϲ
ϴDĨŽƌsWZK W'Ϯϯ W'ϬϲͲϭϭ ^ƵƉƉŽƌƚh^ĐŚĂƌŐĞƌ
ȋʹȌ dW^Ϯϱϰϯ W'Ϯϭ
W,^W//ŶƚĞƌĨĂĐĞ h^Ϯ͘Ϭ/ŶƚĞƌĨĂĐĞ EWϲϭϯϮͬEWϱϵϭϭͬdW^ϱϭϰϲϮZ'Z
WƌŽĐĞƐƐŽƌWŽǁĞƌ;нsͺKZͬнs^Ϳ
W'Ϯϴ͕ϯϮ͕ϯϯ
njĂůŝĂ

B B
^LJƐƚĞŵ/K^ hϭϰ tĞďĐĂŵ džƚĞƌŶĂůh^ t>E h^Ϯ͘ϬdžϮ
^W/ZKD ȋʹȌ ȋͻǡͳͳȌ ȋͳͲȌ ȋͲǡͳȌ
W'Ϭϳ W'ϭϰ W'ϭϲ W'Ϯϯ W'Ϯϭ ZŝĐŚƚĞŬZdϴϮϬϳ>'Yt
^LJƐƚĞŵDĞŵŽƌLJWŽǁĞƌ;нϭ͘ϱs^h^ͬ
>W/ŶƚĞƌĨĂĐĞ W/'ĞŶϭdžϭ>ĂŶĞ нϬ͘ϳϱsͺZͺsddͿ W'Ϯϳ
ȋʹȌ ȋͶȌ ȋ͵Ȍ ȋͳȌ

/dϴϱϭϴͬ,y ^>ϵϲϯϱddϭ͘Ϯ ZĞĂůƚĞŬ>Ϯϲϵ ƚŚĞƌŽƐZϴϭϲϭͲ /ŶƚĞů>EϴϮϱϳϵ>D ZĞĂůƚĞŬZd^ϱϮϮϵ /ŶƚĞůZĂŵďŽWĞĂŬ ZŝĐŚƚĞŬZdϴϮϰϬYtͬ'Dd'ϵϲϲϭ


ŵďĞĚĚĞĚŽŶƚƌŽůůĞƌ dWDŽŶƚƌŽůůĞƌ ƵĚŝŽŽĚĞĐ >EŽŶƚƌŽůůĞƌ >EŽŶƚƌŽůůĞƌ ĂƌĚZĞĂĚĞƌ ,ĂůƚDŝŶŝĂƌĚ W,WŽǁĞƌ;нϭ͘Ϭϱͬнϭ͘ϴsͿ
,^W/ŝŶƚĞƌĨĂĐĞ sWZK EŽŶͲsWZK sWZK
t>EͬdŽŵďŽ W'Ϯϵ͕ϯϬ
WŽǁĞƌ͗ WŽǁĞƌ͗ WŽǁĞƌ͗ WŽǁĞƌ͗ WŽǁĞƌ͗ WŽǁĞƌ͗
WŽǁĞƌ͗
WĂĐŬĂŐĞ͗d^^KWͲϮϴ WĂĐŬĂŐĞ͗>YW&ϰϴ WĂĐŬĂŐĞ͗K&Eϰϴ WĂĐŬĂŐĞ͗K&Eϰϴ WĂĐŬĂŐĞ͗>YW&Ϯϰ WĂĐŬĂŐĞ͗
WĂĐŬĂŐĞ͗>YW&ϭϮϴ
^ŝnjĞ͗ϵ͘ϳdžϰ͘ϰ;ŵŵͿ ^ŝnjĞ͗ϳdžϳ;ŵŵͿ ^ŝnjĞ͗ϲdžϲ;ŵŵͿ ^ŝnjĞ͗ϲdžϲ;ŵŵͿ ^ŝnjĞ͗ϰdžϰ;ŵŵͿ ^ŝnjĞ͗ 'Ddͬ'ϱϭϳϯZϰϭh
^ŝnjĞ͗ϭϰdžϭϰ;ŵŵͿ
W'Ϯϰ W'ϭϵ W'ϭϲ EŽŶͲŝDd W'ϭϳ ŝDd W'ϭϴ W'ϮϬ W'ϮϮ W,s^t;нsϭ͘ϬϱDͿ&ŽƌsWZKŽŶůLJ
A
W'ϯϭ A

ϯϮ͘ϳϲϴ<,nj
'ƌĞĞŶ>< ϮϱD,nj ϮϱD,nj
<ĞLJďŽĂƌĚΘdW &t^W/ZKD
hϭϯ
^>'ϯEϮϰϰsdZ
'^dϱϬϬϵͲ>& 352-(&7-:
W'Ϯϯ W'Ϯϰ ^>'ϯEϮϰϲsdZ Z:ϰϱŽŶŶ
W'ϭϵ E^ϴϵϮϰϬϳ 4XDQWD&RPSXWHU,QF
dZE^&KZDZ
W'ϭϳ W'ϭϳ Size Document Number Rev
A3
1%
1A
ϮϱD,nj͕ϭϬƉƉŵ ůŽĐŬŝĂŐƌĂŵ
Date: Monday, December 12, 2011 Sheet 1 of 34
5 4 3 2 1
5 4 3 2 1

Ivy Bridge Processor (DMI,PEG,FDI)


U9A
PEG_ICOMPI J22
J21
PEG_COMP PEG_COMP connect to PIN H22&J22 W:4mils/S:15mils/L: 500mils.
Ivy Bridge Processor (CLK,MISC,JTAG)
U9B
ϬϮ
PEG_ICOMPO PEG_COMP connect to PIN J21 W:12mils/S:15mils/L: 500mils.
[6] DMI_TXN0 B27 DMI_RX#[0] PEG_RCOMPO H22
[6] DMI_TXN1 B25 DMI_RX#[1] BCLK A28 CLK_CPU_BCLKP [8]

MISC

CLOCKS
[6] DMI_TXN2 A25 DMI_RX#[2] [7] H_SNB_IVB# C26 PROC_SELECT# BCLK# A27 CLK_CPU_BCLKN [8]
[6] DMI_TXN3 B24 DMI_RX#[3] PEG_RX#[0] K33
PEG_RX#[1] M35
B28 L34 SNB_IVB# N.A at SNB EDS #27637 0.7v1 SKTOCC# AN34
D [6] DMI_TXP0 DMI_RX[0] PEG_RX#[2] TP49 SKTOCC# D
B26 J35 A16 CLK_DPLL_SSCLKP_R
[6] DMI_TXP1 DMI_RX[1] PEG_RX#[3] DPLL_REF_CLK

DMI
A24 J32 A15 CLK_DPLL_SSCLKN_R
[6] DMI_TXP2 DMI_RX[2] PEG_RX#[4] DPLL_REF_CLK#
[6] DMI_TXP3 B23 DMI_RX[3] PEG_RX#[5] H34
PEG_RX#[6] H31
G21 G33 TP_CATERR# AL33
[6] DMI_RXN0 DMI_TX#[0] PEG_RX#[7] TP48 CATERR#
[6] DMI_RXN1 E22 DMI_TX#[1] PEG_RX#[8] G30
[6] DMI_RXN2 F21 DMI_TX#[2] PEG_RX#[9] F35

THERMAL
[6] DMI_RXN3 D21 DMI_TX#[3] PEG_RX#[10] E34
E32 EC_PECI AN33 R8 CPU_DRAMRST#
PEG_RX#[11] [24] EC_PECI PECI SM_DRAMRST#
[6] DMI_RXP0 G22 DMI_TX[0] PEG_RX#[12] D33

DDR3
MISC
[6] DMI_RXP1 D22 DMI_TX[1] PEG_RX#[13] D31 close to VR side
F20 B33

PCI EXPRESS* - GRAPHICS


[6] DMI_RXP2 DMI_TX[2] PEG_RX#[14]
C21 C32 [24,32] H_PROCHOT# R77 56.2/F_4 H_PROCHOT#_R AL32 AK1 SM_RCOMP_0 R64 140/F_4
[6] DMI_RXP3 DMI_TX[3] PEG_RX#[15] PROCHOT# SM_RCOMP[0]
A5 SM_RCOMP_1 R281 25.5./F_4
C147 43P/50V_4 SM_RCOMP[1] SM_RCOMP_2 R280 200/F_4
PEG_RX[0] J33 SM_RCOMP[2] A4
PEG_RX[1] L35
PEG_RX[2] K34 [9,24] PM_THRMTRIP# AN32 THERMTRIP# SM_RCOMP[0] W:20mils/S:20mils/L: 500mils,
[6] FDI_TXN0 A21 FDI0_TX#[0] PEG_RX[3] H35 SM_RCOMP[1] W:20mils/S:20mils/L: 500mils,
[6] FDI_TXN1 H19 FDI0_TX#[1] PEG_RX[4] H32
E19 G34 SM_RCOMP[2] W:15mils/S:20mils/L: 500mils,
[6] FDI_TXN2 FDI0_TX#[2] PEG_RX[5]
F18 G31
Intel(R) FDI

[6] FDI_TXN3 FDI0_TX#[3] PEG_RX[6]


B21 F33 AP29 XDP_PRDY#_R
[6] FDI_TXN4 FDI1_TX#[0] PEG_RX[7] PRDY# TP53
C20 F30 AP27 XDP_PREQ#_R
[6] FDI_TXN5 FDI1_TX#[1] PEG_RX[8] PREQ# TP11
[6] FDI_TXN6 D18 FDI1_TX#[2] PEG_RX[9] E35
E17 E33 AR26 XDP_TCLK_R TP13
[6] FDI_TXN7 FDI1_TX#[3] PEG_RX[10] TCK

PWR MANAGEMENT
R299 0_4 PM_SYNC_R XDP_TMS_R

JTAG & BPM


PEG_RX[11] F32 [6] PM_SYNC TMS AR27 TP12
D34 AM34 AP30 XDP_TRST#_R TP56
PEG_RX[12] PM_SYNC TRST#
[6] FDI_TXP0 A22 FDI0_TX[0] PEG_RX[13] E31 B Test
G19 C33 C406 *33P/50V_4 AR28 XDP_TDI_R TP10
[6] FDI_TXP1 FDI0_TX[1] PEG_RX[14] TDI
E20 B32 AP26 XDP_TDO_R
C [6] FDI_TXP2 FDI0_TX[2] PEG_RX[15] TDO TP51 C
G18 H_PWRGOOD AP33
[6] FDI_TXP3 FDI0_TX[3] [9] H_PWRGOOD UNCOREPW RGOOD
B20 M29 R298 *1K/F_4 +3V
[6] FDI_TXP4 FDI1_TX[0] PEG_TX#[0]
C19 M32 R304 10K/F_4
[6] FDI_TXP5 FDI1_TX[1] PEG_TX#[1]
D19 M31 AL35 XDP_DBRST# XDP_DBRST# [6]
[6] FDI_TXP6 FDI1_TX[2] PEG_TX#[2] DBR#
F17 L32 PM_DRAM_PWRGD_R V8
[6] FDI_TXP7 FDI1_TX[3] PEG_TX#[3] SM_DRAMPW ROK
PEG_TX#[4] L29
J18 K31 AT28 XDP_BPM0_R
[6] FDI_FSYNC0
J17
FDI0_FSYNC PEG_TX#[5]
K28
CPU RESET# BPM#[0]
AR29 XDP_BPM1_R
TP52
TP57
[6] FDI_FSYNC1 FDI1_FSYNC PEG_TX#[6] BPM#[1]
J30 AR30 XDP_BPM2_R
PEG_TX#[7] BPM#[2] TP54
H20 J28 [8,17,18,19,20,22,24] PLTRST# R301 1.5K/F_4 CPU_PLTRST#_R AR33 AT30 XDP_BPM3_R TP58
[6] FDI_INT FDI_INT PEG_TX#[8] RESET# BPM#[3]
H29 AP32 XDP_BPM4_R TP50
PEG_TX#[9] BPM#[4] XDP_BPM5_R
[6] FDI_LSYNC0 J19 FDI0_LSYNC PEG_TX#[10] G27 BPM#[5] AR31 TP55
H17 E29 AT31 XDP_BPM6_R
[6] FDI_LSYNC1 FDI1_LSYNC PEG_TX#[11] BPM#[6] TP59
F27 R300 AR32 XDP_BPM7_R
PEG_TX#[12] BPM#[7] TP60
PEG_TX#[13] D28
F26 750/F_4
PEG_TX#[14]
PEG_TX#[15] E25
eDP_COMP A18 eDP_COMPIO Ivy Bridge_rPGA_2DPC_Rev0p61
A17 eDP_ICOMPO PEG_TX[0] M28
INT_eDP_HPD_Q B16 M33
eDP_HPD PEG_TX[1]
PEG_TX[2] M30
PEG_TX[3] L31
C15 eDP_AUX PEG_TX[4] L28
D15 K30
eDP_AUX# PEG_TX[5]
SM_DRAMPWROK Processor Input.
eDP

K27 +1.5V_CPU
PEG_TX[6]
PEG_TX[7] J29
C17 eDP_TX[0] PEG_TX[8] J27
F16 eDP_TX[1] PEG_TX[9] H28
C16 eDP_TX[2] PEG_TX[10] G28
G15 E28 R86
B eDP_TX[3] PEG_TX[11] 200/F_4 B
PEG_TX[12] F28
C18 eDP_TX#[0] PEG_TX[13] D27
E16 E26 PM_DRAM_PWRGD R83 130/F_4 PM_DRAM_PWRGD_R
eDP_TX#[1] PEG_TX[14] [6] PM_DRAM_PWRGD R82
D16 eDP_TX#[2] PEG_TX[15] D25
F15 eDP_TX#[3]

3
*39_4
Ivy Bridge_rPGA_2DPC_Rev0p61
R78
*3K/F_4 2 MAIN_ONG [4,34]

eDP_COMP connect to PIN A18 W:4mils/S:15mils/L: 500mils. Q13 [6,7,8,9,10,12,13,14,15,16,17,19,20,22,23,24,29,32,34] +3V


*2N7002
eDP_COMP connect to PIN A17 W:12mils/S:15mils/L: 500mils. [6,7,8,9,10,14,19,22,24,26,29,30,34] +3VS5

1
[4,10,22] +1.5V_CPU
[4,6,7,8,10,19,24,29,32] +1.05V

FDI disable DDR3 DRAM RESET Embedded Display PLL Clock DP & PEG Compensation Processor pull-up (CPU)
(DIS only stuff) +1.05V R287 *10K/F_4 INT_eDP_HPD_Q +1.05V
CLK_DPLL_SSCLKP_R R285 1K/F_4
H_PROCHOT# R80 62_4
+1.5VSUS R42 1K/F_4 +1.05V R288 24.9/F_4 eDP_COMP XDP_TDO_R R308 51_4
XDP_TMS_R R96 51_4
CLK_DPLL_SSCLKN_R R284 1K/F_4 XDP_TDI_R R92 51_4
+1.05V
[12,13] DDR3_DRAMRST# R40 1K/F_4 CPU_DRAMRST#_R 3 1 CPU_DRAMRST# eDP_COMPIO and ICOMPO signals should be shorted XDP_PREQ#_R R95 *51_4
A XDP_TCLK_R R98 51_4 A
near balls and routed with typical impedance <25 mohms XDP_TRST#_R R305 51_4
Q11
2

2N7002 +1.05V R43 24.9/F_4 PEG_COMP


[8,12,13] DRAMRST_CNTRL_PCH
R41

FDI_FSYNC can gang all these 4 C33


4.99K/F_4 PEG_ICOMPI and RCOMPO signals 352-(&7-:
signals together and tie them 0.047U/10V_4 should be routed within 500 mils typical
impedance = 43 mohms PEG_ICOMPO
4XDQWD&RPSXWHU,QF
with only one 1K resistor to GND
signals should be routed within 500 mils
(DG V0.5 Ch2.2.9). Size Document Number Rev
typical impedance = 14.5 mohms Custom
1% WƌŽĐĞƐƐŽƌϭͬϰ;,ŽƐƚͬ'WhͿ 1A

Date: Tuesday, February 07, 2012 Sheet 2 of 34


5 4 3 2 1
5 4 3 2 1

Ivy Bridge Processor (DDR3) Ϭϯ


U9C U9D

D D

SA_CLK[0] AB6 M_A_CLKP0 [12] [13] M_B_DQ[63:0] SB_CLK[0] AE2 M_B_CLKP0 [13]
[12] M_A_DQ[63:0] SA_CLK#[0] AA6 M_A_CLKN0 [12] SB_CLK#[0] AD2 M_B_CLKN0 [13]
M_A_DQ0 C5 V9 M_B_DQ0 C9 R9
SA_DQ[0] SA_CKE[0] M_A_CKE0 [12] SB_DQ[0] SB_CKE[0] M_B_CKE0 [13]
M_A_DQ1 D5 M_B_DQ1 A7
M_A_DQ2 SA_DQ[1] M_B_DQ2 SB_DQ[1]
D3 SA_DQ[2] D10 SB_DQ[2]
M_A_DQ3 D2 M_B_DQ3 C8
M_A_DQ4 SA_DQ[3] M_B_DQ4 SB_DQ[3]
D6 SA_DQ[4] SA_CLK[1] AA5 M_A_CLKP1 [12] A9 SB_DQ[4] SB_CLK[1] AE1 M_B_CLKP1 [13]
M_A_DQ5 C6 AB5 M_B_DQ5 A8 AD1
SA_DQ[5] SA_CLK#[1] M_A_CLKN1 [12] SB_DQ[5] SB_CLK#[1] M_B_CLKN1 [13]
M_A_DQ6 C2 V10 M_A_CKE1 [12] M_B_DQ6 D9 R10 M_B_CKE1 [13]
M_A_DQ7 SA_DQ[6] SA_CKE[1] M_B_DQ7 SB_DQ[6] SB_CKE[1]
C3 SA_DQ[7] D8 SB_DQ[7]
M_A_DQ8 F10 M_B_DQ8 G4
M_A_DQ9 SA_DQ[8] M_B_DQ9 SB_DQ[8]
F8 SA_DQ[9] F4 SB_DQ[9]
M_A_DQ10 G10 AB4 M_B_DQ10 F1 AB2
M_A_DQ11 SA_DQ[10] SA_CLK[2] M_B_DQ11 SB_DQ[10] SB_CLK[2]
G9 SA_DQ[11] SA_CLK#[2] AA4 G1 SB_DQ[11] SB_CLK#[2] AA2
M_A_DQ12 F9 W9 M_B_DQ12 G5 T9
M_A_DQ13 SA_DQ[12] SA_CKE[2] M_B_DQ13 SB_DQ[12] SB_CKE[2]
F7 SA_DQ[13] F5 SB_DQ[13]
M_A_DQ14 G8 M_B_DQ14 F2
M_A_DQ15 SA_DQ[14] M_B_DQ15 SB_DQ[14]
G7 SA_DQ[15] G2 SB_DQ[15]
M_A_DQ16 K4 AB3 M_B_DQ16 J7 AA1
M_A_DQ17 SA_DQ[16] SA_CLK[3] M_B_DQ17 SB_DQ[16] SB_CLK[3]
K5 SA_DQ[17] SA_CLK#[3] AA3 J8 SB_DQ[17] SB_CLK#[3] AB1
M_A_DQ18 K1 W 10 M_B_DQ18 K10 T10
M_A_DQ19 SA_DQ[18] SA_CKE[3] M_B_DQ19 SB_DQ[18] SB_CKE[3]
J1 SA_DQ[19] K9 SB_DQ[19]
M_A_DQ20 J5 M_B_DQ20 J9
M_A_DQ21 SA_DQ[20] M_B_DQ21 SB_DQ[20]
J4 SA_DQ[21] J10 SB_DQ[21]
M_A_DQ22 J2 AK3 M_A_CS#0 [12] M_B_DQ22 K8 AD3 M_B_CS#0 [13]
M_A_DQ23 SA_DQ[22] SA_CS#[0] M_B_DQ23 SB_DQ[22] SB_CS#[0]
K2 SA_DQ[23] SA_CS#[1] AL3 M_A_CS#1 [12] K7 SB_DQ[23] SB_CS#[1] AE3 M_B_CS#1 [13]
M_A_DQ24 M8 AG1 M_B_DQ24 M5 AD6
M_A_DQ25 SA_DQ[24] SA_CS#[2] M_B_DQ25 SB_DQ[24] SB_CS#[2]
N10 SA_DQ[25] SA_CS#[3] AH1 N4 SB_DQ[25] SB_CS#[3] AE6
M_A_DQ26 N8 M_B_DQ26 N2
C M_A_DQ27 SA_DQ[26] M_B_DQ27 SB_DQ[26] C
N7 SA_DQ[27] N1 SB_DQ[27]
M_A_DQ28 M10 M_B_DQ28 M4
M_A_DQ29 SA_DQ[28] M_B_DQ29 SB_DQ[28]
M9 SA_DQ[29] SA_ODT[0] AH3 M_A_ODT0 [12] N5 SB_DQ[29] SB_ODT[0] AE4 M_B_ODT0 [13]

DDR SYSTEM MEMORY B


M_A_DQ30 N9 AG3 M_B_DQ30 M2 AD4
DDR SYSTEM MEMORY A
SA_DQ[30] SA_ODT[1] M_A_ODT1 [12] SB_DQ[30] SB_ODT[1] M_B_ODT1 [13]
M_A_DQ31 M7 AG2 M_B_DQ31 M1 AD5
M_A_DQ32 SA_DQ[31] SA_ODT[2] M_B_DQ32 SB_DQ[31] SB_ODT[2]
AG6 SA_DQ[32] SA_ODT[3] AH2 AM5 SB_DQ[32] SB_ODT[3] AE5
M_A_DQ33 AG5 M_B_DQ33 AM6
M_A_DQ34 SA_DQ[33] M_B_DQ34 SB_DQ[33]
AK6 SA_DQ[34] AR3 SB_DQ[34]
M_A_DQ35 AK5 M_B_DQ35 AP3
M_A_DQ36 SA_DQ[35] M_B_DQ36 SB_DQ[35]
AH5 SA_DQ[36] M_A_DQSN[7:0] [12] AN3 SB_DQ[36] M_B_DQSN[7:0] [13]
M_A_DQ37 AH6 C4 M_A_DQSN0 M_B_DQ37 AN2 D7 M_B_DQSN0
M_A_DQ38 SA_DQ[37] SA_DQS#[0] M_A_DQSN1 M_B_DQ38 SB_DQ[37] SB_DQS#[0] M_B_DQSN1
AJ5 SA_DQ[38] SA_DQS#[1] G6 AN1 SB_DQ[38] SB_DQS#[1] F3
M_A_DQ39 AJ6 J3 M_A_DQSN2 M_B_DQ39 AP2 K6 M_B_DQSN2
M_A_DQ40 SA_DQ[39] SA_DQS#[2] M_A_DQSN3 M_B_DQ40 SB_DQ[39] SB_DQS#[2] M_B_DQSN3
AJ8 SA_DQ[40] SA_DQS#[3] M6 AP5 SB_DQ[40] SB_DQS#[3] N3
M_A_DQ41 AK8 AL6 M_A_DQSN4 M_B_DQ41 AN9 AN5 M_B_DQSN4
M_A_DQ42 SA_DQ[41] SA_DQS#[4] M_A_DQSN5 M_B_DQ42 SB_DQ[41] SB_DQS#[4] M_B_DQSN5
AJ9 SA_DQ[42] SA_DQS#[5] AM8 AT5 SB_DQ[42] SB_DQS#[5] AP9
M_A_DQ43 AK9 AR12 M_A_DQSN6 M_B_DQ43 AT6 AK12 M_B_DQSN6
M_A_DQ44 SA_DQ[43] SA_DQS#[6] M_A_DQSN7 M_B_DQ44 SB_DQ[43] SB_DQS#[6] M_B_DQSN7
AH8 SA_DQ[44] SA_DQS#[7] AM15 AP6 SB_DQ[44] SB_DQS#[7] AP15
M_A_DQ45 AH9 M_B_DQ45 AN8
M_A_DQ46 SA_DQ[45] M_B_DQ46 SB_DQ[45]
AL9 SA_DQ[46] AR6 SB_DQ[46]
M_A_DQ47 AL8 M_B_DQ47 AR5
M_A_DQ48 SA_DQ[47] M_B_DQ48 SB_DQ[47]
AP11 SA_DQ[48] M_A_DQSP[7:0] [12] AR9 SB_DQ[48] M_B_DQSP[7:0] [13]
M_A_DQ49 AN11 D4 M_A_DQSP0 M_B_DQ49 AJ11 C7 M_B_DQSP0
M_A_DQ50 SA_DQ[49] SA_DQS[0] M_A_DQSP1 M_B_DQ50 SB_DQ[49] SB_DQS[0] M_B_DQSP1
AL12 SA_DQ[50] SA_DQS[1] F6 AT8 SB_DQ[50] SB_DQS[1] G3
M_A_DQ51 AM12 K3 M_A_DQSP2 M_B_DQ51 AT9 J6 M_B_DQSP2
M_A_DQ52 SA_DQ[51] SA_DQS[2] M_A_DQSP3 M_B_DQ52 SB_DQ[51] SB_DQS[2] M_B_DQSP3
AM11 SA_DQ[52] SA_DQS[3] N6 AH11 SB_DQ[52] SB_DQS[3] M3
M_A_DQ53 AL11 AL5 M_A_DQSP4 M_B_DQ53 AR8 AN6 M_B_DQSP4
M_A_DQ54 SA_DQ[53] SA_DQS[4] M_A_DQSP5 M_B_DQ54 SB_DQ[53] SB_DQS[4] M_B_DQSP5
AP12 SA_DQ[54] SA_DQS[5] AM9 AJ12 SB_DQ[54] SB_DQS[5] AP8
M_A_DQ55 AN12 AR11 M_A_DQSP6 M_B_DQ55 AH12 AK11 M_B_DQSP6
M_A_DQ56 SA_DQ[55] SA_DQS[6] M_A_DQSP7 M_B_DQ56 SB_DQ[55] SB_DQS[6] M_B_DQSP7
AJ14 SA_DQ[56] SA_DQS[7] AM14 AT11 SB_DQ[56] SB_DQS[7] AP14
B M_A_DQ57 AH14 M_B_DQ57 AN14 B
M_A_DQ58 SA_DQ[57] M_B_DQ58 SB_DQ[57]
AL15 SA_DQ[58] AR14 SB_DQ[58]
M_A_DQ59 AK15 M_B_DQ59 AT14
M_A_DQ60 SA_DQ[59] M_B_DQ60 SB_DQ[59]
AL14 SA_DQ[60] M_A_A[15:0] [12] AT12 SB_DQ[60] M_B_A[15:0] [13]
M_A_DQ61 AK14 AD10 M_A_A0 M_B_DQ61 AN15 AA8 M_B_A0
M_A_DQ62 SA_DQ[61] SA_MA[0] M_A_A1 M_B_DQ62 SB_DQ[61] SB_MA[0] M_B_A1
AJ15 SA_DQ[62] SA_MA[1] W1 AR15 SB_DQ[62] SB_MA[1] T7
M_A_DQ63 AH15 W2 M_A_A2 M_B_DQ63 AT15 R7 M_B_A2
SA_DQ[63] SA_MA[2] M_A_A3 SB_DQ[63] SB_MA[2] M_B_A3
SA_MA[3] W7 SB_MA[3] T6
V3 M_A_A4 T2 M_B_A4
SA_MA[4] M_A_A5 SB_MA[4] M_B_A5
SA_MA[5] V2 SB_MA[5] T4
W3 M_A_A6 T3 M_B_A6
SA_MA[6] M_A_A7 SB_MA[6] M_B_A7
[12] M_A_BS#0 AE10 SA_BS[0] SA_MA[7] W6 [13] M_B_BS#0 AA9 SB_BS[0] SB_MA[7] R2
[12] M_A_BS#1 AF10 V1 M_A_A8 [13] M_B_BS#1 AA7 T5 M_B_A8
SA_BS[1] SA_MA[8] M_A_A9 SB_BS[1] SB_MA[8] M_B_A9
[12] M_A_BS#2 V6 SA_BS[2] SA_MA[9] W5 [13] M_B_BS#2 R6 SB_BS[2] SB_MA[9] R3
AD8 M_A_A10 AB7 M_B_A10
SA_MA[10] M_A_A11 SB_MA[10] M_B_A11
SA_MA[11] V4 SB_MA[11] R1
W4 M_A_A12 T1 M_B_A12
SA_MA[12] M_A_A13 SB_MA[12] M_B_A13
[12] M_A_CAS# AE8 SA_CAS# SA_MA[13] AF8 [13] M_B_CAS# AA10 SB_CAS# SB_MA[13] AB10
[12] M_A_RAS# AD9 V5 M_A_A14 [13] M_B_RAS# AB8 R5 M_B_A14
SA_RAS# SA_MA[14] M_A_A15 SB_RAS# SB_MA[14] M_B_A15
[12] M_A_WE# AF9 SA_W E# SA_MA[15] V7 [13] M_B_WE# AB9 SB_W E# SB_MA[15] R4

Ivy Bridge_rPGA_2DPC_Rev0p61 Ivy Bridge_rPGA_2DPC_Rev0p61

A A

352-(&7-:
4XDQWD&RPSXWHU,QF
Size Document Number Rev
Custom
1% WƌŽĐĞƐƐŽƌϮͬϰ;DĞŵŽƌLJͿ 1A

Date: Tuesday, February 07, 2012 Sheet 3 of 34


5 4 3 2 1
5 4 3 2 1

SNB: 55A +VCC_CORE


U9F POWER
Ivy Bridge Processor

SNB: 8.5A 22uF_8 x2 Socket TOP cavity U9G


POWER
R295 100/F_4 +VCC_GFX

VCC_AXG_SENSE [32]
VSS_AXG_SENSE [32]
Ϭϰ
+1.05V R296 100/F_4
IVY: 55A IVY: 8.5A 22uF_8 x2 Socket BOT cavity
AG35 VCC1

SENSE
LINES
AG34 AH13 22uF_8 x4 Socket TOP edge AT24 AK35 CAD Note: +VDDR_REF_CPU should
VCC2 VCCIO1 VAXG1 VAXG_SENSE
AG33 VCC3 VCCIO2 AH10 22uF_8 x4 Socket BOT edge AT23 VAXG2 VSSAXG_SENSE AK34 have 10 mil trace width
AG32 VCC4 VCCIO3 AG10 470uF_7343 x2 AT21 VAXG3
C387 C395 C31 AG31 AC10 C62 C64 C383 AT20 +VDDR_REF_CPU
D 22U/6.3VS_8 22U/6.3VS_8 22U/6.3VS_8 VCC5 VCCIO4 22U/6.3VS_8 22U/6.3VS_8 22U/6.3VS_8 VAXG4 D
AG30 VCC6 VCCIO5 Y10 AT18 VAXG5
AG29 VCC7 VCCIO6 U10
+VCC_GFX
SNB: 21.5A AT17 VAXG6 1 3 DDR_VTTREF [12,13,27]
AG28 VCC8 VCCIO7 P10 AR24
AG27 L10 IVY: 38A AR23
VAXG7 Q12
VCC9 VCCIO8 VAXG8 2N7002
AG26 J14 AR21

2
VCC10 VCCIO9 VAXG9 R66
AF35 VCC11 VCCIO10 J13 AR20 VAXG10
AF34 J12 C107 C65 C130 AR18 AL1 100K/F_4 MAIND MAIND [34]
C371 C370 C369 VCC12 VCCIO11 22U/6.3VS_8 22U/6.3VS_8 22U/6.3VS_8 C397 C100 VAXG11 SM_VREF
AF33 VCC13 VCCIO12 J11 AR17 VAXG12

VREF
22U/6.3VS_8 22U/6.3VS_8 22U/6.3VS_8 AF32 H14 22U/6.3VS_8 22U/6.3VS_8 AP24
VCC14 VCCIO13 VAXG13
AF31 VCC15 VCCIO14 H12 AP23 VAXG14
AF30 VCC16 VCCIO15 H11 AP21 VAXG15
AF29 VCC17 VCCIO16 G14 AP20 VAXG16 SA_DIMM_VREFDQ B4 SMDDR_VREF_DQ0_M3 [12]
AF28 VCC18 VCCIO17 G13 AP18 VAXG17 SB_DIMM_VREFDQ D1
SMDDR_VREF_DQ1_M3 [13]

PEG AND DDR


AF27 G12 C63 C78 C393 AP17
VCC19 VCCIO18 *22U/6.3VS_8 22U/6.3VS_8 22U/6.3VS_8 C125 C133 VAXG18
AF26 VCC20 VCCIO19 F14 AN24 VAXG19
C385 C39 C113 AD35 F13 22U/6.3VS_8 22U/6.3VS_8 AN23
22U/6.3VS_8 22U/6.3VS_8 22U/6.3VS_8 VCC21 VCCIO20 VAXG20 R279 R278
AD34 VCC22 VCCIO21 F12 AN21 VAXG21
AD33 F11 AN20 *1K/F_4 *1K/F_4
VCC23 VCCIO22 VAXG22

DDR3 -1.5V RAILS


AD32 VCC24 VCCIO23 E14 AN18 VAXG23
AD31 VCC25 VCCIO24 E12 AN17 VAXG24

GRAPHICS
AD30 C398 C66 C53 AM24 AF7 SNB: 5A
VCC26 *22U/6.3VS_8 *22U/6.3VS_8 *22U/6.3VS_8 C124 C155 VAXG25 VDDQ1 +1.5V_CPU
AD29 VCC27 VCCIO25 E11 AM23 VAXG26 VDDQ2 AF4
AD28 D14 22U/6.3VS_8 22U/6.3VS_8 AM21 AF1 IVY: 5A
C131 C54 C382 VCC28 VCCIO26 VAXG27 VDDQ3
AD27 VCC29 VCCIO27 D13 AM20 VAXG28 VDDQ4 AC7
22U/6.3VS_8 22U/6.3VS_8 22U/6.3VS_8 AD26 D12 AM18 AC4
VCC30 VCCIO28 VAXG29 VDDQ5
AC35 VCC31 VCCIO29 D11 AM17 VAXG30 VDDQ6 AC1
AC34 C14 AL24 Y7 C129 C121 C110 C139
VCC32 VCCIO30 C375 C51 C122 VAXG31 VDDQ7 10U/6.3VS_6 10U/6.3V_8 10U/6.3VS_6 10U/6.3VS_6
AC33 VCC33 VCCIO31 C13 AL23 VAXG32 VDDQ8 Y4
AC32 C12 22U/6.3VS_8 *22U/6.3VS_8 *22U/6.3VS_8 C132 C99 AL21 Y1
VCC34 VCCIO32 22U/6.3VS_8 22U/6.3VS_8 VAXG33 VDDQ9
AC31 VCC35 VCCIO33 C11 AL20 VAXG34 VDDQ10 U7
C AC30 B14 AL18 U4 330uF x1, 10uF_8 x6 Socket BOT edge. C
C57 C394 C69 VCC36 VCCIO34 VAXG35 VDDQ11
AC29 VCC37 VCCIO35 B12 AL17 VAXG36 VDDQ12 U1

1
22U/6.3VS_8 *22U/6.3VS_8 22U/6.3VS_8 AC28 A14 AK24 P7
VCC38 VCCIO36 VAXG37 VDDQ13 + C407
AC27 VCC39 VCCIO37 A13 AK23 VAXG38 VDDQ14 P4
AC26 A12 C376 C386 C88 AK21 P1 C142 C138 *100U 16V/6.3*5.8
VCC40 VCCIO38 *22U/6.3VS_8 22U/6.3VS_8 *22U/6.3VS_8 C152 C102 VAXG39 VDDQ15 10U/6.3VS_6 10U/6.3VS_6
AA35 A11 AK20

2
VCC41 VCCIO39 22U/6.3VS_8 22U/6.3VS_8 VAXG40
AA34 VCC42 AK18 VAXG41
AA33 VCC43 VCCIO40 J23 AK17 VAXG42
AA32 VCC44 AJ24 VAXG43
C400 C80 C126 AA31 AJ23
22U/6.3VS_8 22U/6.3VS_8 22U/6.3VS_8 VCC45 VAXG44
AA30 VCC46 AJ21 VAXG45 SNB: 6A +VCCSA
AA29 C392 C391 C46 AJ20
VCC47 *22U/6.3VS_8 22U/6.3VS_8 22U/6.3VS_8 C101 C396 VAXG46 IVY: 6A
AA28 VCC48 AJ18 VAXG47
AA27 22U/6.3VS_8 22U/6.3VS_8 AJ17 M27

SA RAIL
VCC49 VAXG48 VCCSA1
AA26 VCC50 +1.05V AH24 VAXG49 VCCSA2 M26
CORE SUPPLY

Y35 VCC51 AH23 VAXG50 VCCSA3 L26


Y34 22uF_8 x7 Socket TOP cavity AH21 J26 C377 C349 C42 C348
C94 C50 C399 VCC52 VAXG51 VCCSA4 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 *10U/6.3V_8
Y33 VCC53 22uF_8 x5 Socket BOT cavity AH20 VAXG52 VCCSA5 J25
22U/6.3VS_8 22U/6.3VS_8 22U/6.3VS_8 Y32 AH18 J24
VCC54 22uF_8 x2 Socket TOP cavity (no stuff) VAXG53 VCCSA6
Y31 VCC55 AH17 VAXG54 VCCSA7 H26
Y30 VCC56
22uF_8 x5 Socket BOT cavity (no stuff) VCCSA8 H25 330uF x1, 10uF_8 x1 Socket BOT edge,
Y29 VCC57 330uF_7343 x2 10uF_8 x2 Socket BOT cavity.
Y28 VCC58
Y27 VCC59
Y26 VCC60

1.8V RAIL
C30 C389 C95 V35 VCC61
SVID

*22U/6.3VS_8 *22U/6.3VS_8 22U/6.3VS_8 V34 AJ29 H_CPU_SVIDALRT# SNB: 1.5A H23 VCCUSA_SENSE_R R286 0_4
VCC62 VIDALERT# +1.8V VCCSA_SENSE VCCUSA_SENSE [28]
V33 AJ30 VR_SVID_CLK
VCC63 VIDSCLK VR_SVID_DATA IVY: 1.5A
V32 VCC64 VIDSOUT AJ28 VCCSA_SEL0 [28]
V31 VCC65 B6 VCCPLL1

MISC
B V30 A6 C22 R290 10K/F_4 B
VCC66 VCCPLL2 VCCSA_VID[0]
V29 VCC67 A2 VCCPLL3 VCCSA_VID[1] C24 VCCSA_SEL [28]
V28 C26 C27 C28 + C25
C388 C61 C390 VCC68 10U/6.3V_8 1U/6.3V_4 1U/6.3V_4 *330U/2V_7343 R291 10K/F_4
V27 VCC69
22U/6.3VS_8 22U/6.3VS_8 22U/6.3VS_8 V26 VCC70 R289 0_4
U35 VCC71 VCCIO_SEL A19 H_VTTVID1 [29]
U34 VCC72 330uF x1, 10uF_8 x1, 1uF_4 x2
U33 VCC73 Socket BOT edge.
U32 Ivy Bridge_rPGA_2DPC_Rev0p61
VCC74
U31 VCC75
U30 VCC76
C45 C401 C32 U29
22U/6.3VS_8 22U/6.3VS_8 *22U/6.3VS_8 VCC77
U28 VCC78
U27 VCC79
U26 VCC80 Layout note: need routing Place PU resistor SVID CLK
R35 +1.5VSUS +1.5V_CPU +1.5VSUS
VCC81 together and ALERT need close to VR
R34 VCC82
22uF_8 x8 Socket TOP cavity R33 between CLK and DATA. R75 *54.9/F_4 +1.05V C75 0.1U/10V_4
VCC83
22uF_8 x10 Socket BOT cavity R32 VCC84 Q23
R31 C83 0.1U/10V_4
22uF_8 x8 Socket TOP edge VCC85 VR_SVID_CLK QM3002N3
R30 VCC86 VR_SVID_CLK [32]
470uF_7343 x4 R29 VCC87
R63 100_4 +VCC_CORE 1 R105 C92 0.1U/10V_4
SENSE LINES

R28 5 2 220_8
VCC88 C68 0.1U/10V_4
R27 VCC89 VCC_SENSE AJ35 VCC_SENSE [32] 3
R26 AJ34 +1.05V B Test
VCC90 VSS_SENSE VSS_SENSE [32] SVID DATA

3
P35 VCC91 Del R67
P34 R65 100_4 Placement close to CPU.

4
VCC92 MAIND
P33 VCC93
P32 B10 VCCP_SENSE Place PU resistor 2
VCC94 VCCIO_SENSE VCCP_SENSE [29] MAIN_ONG [2,34]
P31 A10 VSSP_SENSE R68
A VCC95 VSS_SENSE_VCCIO VSSP_SENSE [29] close to CPU 130/F_4 C145 Q14 A
P30 VCC96
P29 *470P/50V_4 2N7002
VCC97 VR_SVID_DATA
P28 VR_SVID_DATA [32]
CPU VDDQ

1
VCC98
P27 VCC99 Trace Route to Power IC area.
P26 VCC100

[7,10,30] +1.8V
+1.05V Place PU resistor close to CPU SVID ALERT 352-(&7-:
[28] +VCCSA
[2,12,13,27] +1.5VSUS
Ivy Bridge_rPGA_2DPC_Rev0p61
VCCP_SENSE
VSSP_SENSE
R283
R282
10/F_4
10/F_4
+1.05V R74 75/F_4 4XDQWD&RPSXWHU,QF
[33] +VCC_GFX
[2,10,22] +1.5V_CPU
[2,6,7,8,10,19,24,29,32] +1.05V H_CPU_SVIDALRT# R72 43_4 VR_SVID_ALERT# [32] Size Document Number Rev
Custom
1%
[33] +VCC_CORE WƌŽĐĞƐƐŽƌϯͬϰ;WŽǁĞƌͿ 1A

Date: Tuesday, February 07, 2012 Sheet 4 of 34


5 4 3 2 1
5 4 3 2 1

AT35
U9H
Ivy Bridge Processor (GND)

AJ22
U9I
Ivy Bridge Processor (RESERVED, CFG)
U9E
Ϭϱ
VSS1 VSS81
AT32 VSS2 VSS82 AJ19
AT29 VSS3 VSS83 AJ16 T35 VSS161 VSS234 F22 VCC_DIE_SENSE AH27 VCC_DIE_SENSE TP1
AT27 AJ13 T34 F19 CFG0 AK28 AH26 VSS_DIE_SENSE
VSS4 VSS84 VSS162 VSS235 TP7 CFG1 CFG[0] VSS_DIE_SENSE TP2
AT25 VSS5 VSS85 AJ10 T33 VSS163 VSS236 E30 TP8 AK29 CFG[1]
AT22 AJ7 T32 E27 CFG2 AL26
VSS6 VSS86 VSS164 VSS237 CFG3 CFG[2] R60
AT19 VSS7 VSS87 AJ4 T31 VSS165 VSS238 E24 TP9 AL27 CFG[3]
D AT16 AJ3 T30 E21 CFG4 AK26 L7 *0_4 D
VSS8 VSS88 VSS166 VSS239 CFG5 CFG[4] RSVD28
AT13 VSS9 VSS89 AJ2 T29 VSS167 VSS240 E18 AL29 CFG[5] RSVD29 AG7
AT10 AJ1 T28 E15 CFG6 AL30 AE7 For Sandy Bridge R94 stuff
VSS10 VSS90 VSS168 VSS241 CFG7 CFG[6] RSVD30
AT7 VSS11 VSS91 AH35 T27 VSS169 VSS242 E13 AM31 CFG[7] RSVD31 AK2 For Ivy Bridge R94 no stuff
AT4 VSS12 VSS92 AH34 T26 VSS170 VSS243 E10 AM32 CFG[8]

CFG
AT3 VSS13 VSS93 AH32 P9 VSS171 VSS244 E9 AM30 CFG[9] RSVD32 W8
AR25 VSS14 VSS94 AH30 P8 VSS172 VSS245 E8 AM28 CFG[10]
AR22 VSS15 VSS95 AH29 P6 VSS173 VSS246 E7 AM26 CFG[11]
AR19 VSS16 VSS96 AH28 P5 VSS174 VSS247 E6 AN28 CFG[12] RSVD33 AT26
AR16 VSS17 VSS98 AH25 P3 VSS175 VSS248 E5 AN31 CFG[13] RSVD34 AM33
AR13 VSS18 VSS99 AH22 P2 VSS176 VSS249 E4 AN26 CFG[14] RSVD35 AJ27
AR10 VSS19 VSS100 AH19 N35 VSS177 VSS250 E3 AM27 CFG[15]
AR7 VSS20 VSS101 AH16 N34 VSS178 VSS251 E2 AK31 CFG[16]
AR4 VSS21 VSS102 AH7 N33 VSS179 VSS252 E1 AN29 CFG[17]
AR2 VSS22 VSS103 AH4 N32 VSS180 VSS253 D35
AP34 VSS23 VSS104 AG9 N31 VSS181 VSS254 D32
AP31 VSS24 VSS105 AG8 N30 VSS182 VSS255 D29 RSVD37 T8
AP28 VSS25 VSS106 AG4 N29 VSS183 VSS256 D26 RSVD38 J16
AP25 VSS26 VSS107 AF6 N28 VSS184 VSS257 D20 TP5 AJ31 VAXG_VAL_SENSE RSVD39 H16
AP22 VSS27 VSS108 AF5 N27 VSS185 VSS258 D17 TP3 AH31 VSSAXG_VAL_SENSE RSVD40 G16
AP19 VSS28 VSS109 AF3 N26 VSS186 VSS259 C34 AJ33 VCC_VAL_SENSE
AP16 VSS29 VSS110 AF2 M34 VSS187 VSS260 C31 AH33 VSS_VAL_SENSE
AP13 VSS30 VSS111 AE35 L33 VSS188 VSS261 C28
AP10 VSS31 VSS112 AE34 L30 VSS189 VSS262 C27
AP7 VSS32 VSS113 AE33 L27 VSS190 VSS263 C25 AJ26 RSVD5 RSVD41 AR35

RESERVED
AP4 VSS33 VSS114 AE32 L9 VSS191 VSS264 C23 RSVD42 AT34
AP1 VSS34 VSS115 AE31 L8 VSS192 VSS265 C10 RSVD43 AT33
AN30 VSS35 VSS116 AE30 L6 VSS193 VSS266 C1 RSVD44 AP35
AN27 VSS36 VSS117 AE29 L5 VSS194 VSS267 B22 RSVD45 AR34
AN25 AE28 L4 B19
C AN22
AN19
VSS37
VSS38
VSS39
VSS VSS118
VSS119
VSS120
AE27
AE26
L3
L2
VSS195
VSS196
VSS197
VSS VSS268
VSS269
VSS270
B17
B15 F25 RSVD8
C

AN16 VSS40 VSS121 AE9 L1 VSS198 VSS271 B13 F24 RSVD9


AN13 VSS41 VSS122 AD7 K35 VSS199 VSS272 B11 F23 RSVD10
AN10 VSS42 VSS123 AC9 K32 VSS200 VSS273 B9 D24 RSVD11 RSVD46 B34
AN7 VSS43 VSS124 AC8 K29 VSS201 VSS274 B8 G25 RSVD12 RSVD47 A33
AN4 VSS44 VSS125 AC6 K26 VSS202 VSS275 B7 G24 RSVD13 RSVD48 A34
AM29 VSS45 VSS126 AC5 J34 VSS203 VSS276 B5 E23 RSVD14 RSVD49 B35
AM25 VSS46 VSS127 AC3 J31 VSS204 VSS277 B3 D23 RSVD15 RSVD50 C35
AM22 VSS47 VSS128 AC2 H33 VSS205 VSS278 B2 C30 RSVD16
AM19 VSS48 VSS129 AB35 H30 VSS206 VSS279 A35 A31 RSVD17
AM16 VSS49 VSS130 AB34 H27 VSS207 VSS280 A32 B30 RSVD18
AM13 VSS50 VSS131 AB33 H24 VSS208 VSS281 A29 B29 RSVD19
AM10 VSS51 VSS132 AB32 H21 VSS209 VSS282 A26 D30 RSVD20 RSVD51 AJ32 TP4
AM7 VSS52 VSS133 AB31 H18 VSS210 VSS283 A23 B31 RSVD21 RSVD52 AK32 TP6
AM4 VSS53 VSS134 AB30 H15 VSS211 VSS284 A20 A30 RSVD22
AM3 VSS54 VSS135 AB29 H13 VSS212 VSS285 A3 C29 RSVD23
AM2 VSS55 VSS136 AB28 H10 VSS213
AM1 VSS56 VSS137 AB27 H9 VSS214 BCLK_ITP AN35
AL34 VSS57 VSS138 AB26 H8 VSS215 J20 RSVD24 BCLK_ITP# AM35
AL31 VSS58 VSS139 Y9 H7 VSS216 B18 RSVD25
AL28 VSS59 VSS140 Y8 H6 VSS217 #27636 SNB EDS0.7v1 no function.
AL25 VSS60 VSS141 Y6 H5 VSS218
AL22 VSS61 VSS142 Y5 H4 VSS219
AL19 VSS62 VSS143 Y3 H3 VSS220 J15 RSVD27 RSVD56 AT2
AL16 VSS63 VSS144 Y2 H2 VSS221 RSVD57 AT1
AL13 VSS64 VSS145 W 35 H1 VSS222 RSVD58 AR1
AL10 VSS65 VSS146 W 34 G35 VSS223
AL7 VSS66 VSS147 W 33 G32 VSS224 For rPGA socket, RSVD59 pin should be left NC.
AL4 VSS67 VSS148 W 32 G29 VSS225
B AL2 W 31 G26 B1 B
VSS68 VSS149 VSS226 KEY
AK33 VSS69 VSS150 W 30 G23 VSS227
AK30 VSS70 VSS151 W 29 G20 VSS228
AK27 VSS71 VSS152 W 28 G17 VSS229
AK25 VSS72 VSS153 W 27 G11 VSS230
AK22 VSS73 VSS154 W 26 F34 VSS231
AK19 U9 F31 Ivy Bridge_rPGA_2DPC_Rev0p61
VSS74 VSS155 VSS232
AK16 VSS75 VSS156 U8 F29 VSS233
AK13 VSS76 VSS157 U6
AK10 VSS77 VSS158 U5
AK7 VSS78 VSS159 U3
AK4 VSS79 VSS160 U2
AJ25 VSS80

Ivy Bridge_rPGA_2DPC_Rev0p61 Ivy Bridge_rPGA_2DPC_Rev0p61

CFG2 R90 *1K/F_4

CFG4
CFG[6:5] (PCIE Port Bifurcation Straps)
The CFG signals have a default value of '1' if not terminated on the board. R88 *1K/F_4
Processor Strapping 11: (Default) x16 - Device 1 functions 1 and 2 disabled
CFG7 R85 *1K/F_4 10: x8, x8 - Device 1 function 1 enabled ; function 2 disabled
1 0 01: Reserved - (Device 1 function 1 disabled ; function 2 enabled)
CFG2 CFG5 R76 *1K/F_4 00: x8,x4,x4 - Device 1 functions 1 and 2 enabled
A A
(PEG Static Lane Reversal) Normal Operation Lane Reversed CFG6 R81 *1K/F_4

CFG4
(DP Presence Strap) Disable; No physical DP attached to eDP Enable; An ext DP device is connected to eDP
352-(&7-:
CFG7 PEG train immediately following PEG wait for BIOS training 4XDQWD&RPSXWHU,QF
(PEG Defer Training) xxRESETB de assertion
Size Document Number Rev
Custom
1% WƌŽĐĞƐƐŽƌϰͬϰ;'ƌŽƵŶĚͿ 1A

Date: Thursday, December 08, 2011 Sheet 5 of 34


5 4 3 2 1
5 4 3 2 1

[2] DMI_RXN0
Cougar Point/Panther Point (DMI,FDI,PM)

BC24
U16C

BJ14
[14] PCH_LVDS_BLON
[14] PCH_DISP_ON
Cougar Point/Panther Point (LVDS,DDI)
J47
M45
U16D
L_BKLTEN SDVO_TVCLKINN AP43
AP45
Ϭϲ
DMI0RXN FDI_RXN0 FDI_TXN0 [2] L_VDD_EN SDVO_TVCLKINP
[2] DMI_RXN1 BE20 DMI1RXN FDI_RXN1 AY14 FDI_TXN1 [2]
[2] DMI_RXN2 BG18 DMI2RXN FDI_RXN2 BE14 FDI_TXN2 [2] [14] PCH_DPST_PWM P45 L_BKLTCTL SDVO_STALLN AM42
[2] DMI_RXN3 BG20 DMI3RXN FDI_RXN3 BH13 FDI_TXN3 [2] SDVO_STALLP AM40
BC12 [14] PCH_EDIDCLK PCH_EDIDCLK T40
FDI_RXN4 FDI_TXN4 [2] L_DDC_CLK
BE24 BJ12 PCH_EDIDDATA K47 AP39
[2] DMI_RXP0 DMI0RXP FDI_RXN5 FDI_TXN5 [2] [14] PCH_EDIDDATA L_DDC_DATA SDVO_INTN
BC20 BG10 AP40
D
[2]
[2]
DMI_RXP1
DMI_RXP2 BJ18
DMI1RXP FDI_RXN6
BG9
FDI_TXN6 [2]
+3V R172 2.2K_4 CTRL_CLK T45
SDVO_INTP INT. HDMI D
DMI2RXP FDI_RXN7 FDI_TXN7 [2] L_CTRL_CLK
[2] DMI_RXP3 BJ20 R158 2.2K_4 CTRL_DATA P39
DMI3RXP L_CTRL_DATA
FDI_RXP0 BG14 FDI_TXP0 [2]
AW 24 BB14 R183 2.37K/F_4 LVD_IBG AF37 P38 SDVO_CLK
[2] DMI_TXN0 DMI0TXN FDI_RXP1 FDI_TXP1 [2] LVD_IBG SDVO_CTRLCLK SDVO_CLK [15]
[2] DMI_TXN1 AW 20 BF14 AF36 M39 SDVO_DATA SDVO_DATA [15]
DMI1TXN FDI_RXP2 FDI_TXP2 [2] TP26 LVD_VBG SDVO_CTRLDATA
[2] DMI_TXN2 BB18 DMI2TXN FDI_RXP3 BG13 FDI_TXP3 [2]
[2] DMI_TXN3 AV18 DMI3TXN FDI_RXP4 BE12 FDI_TXP4 [2] AE48 LVD_VREFH

DMI
FDI
FDI_RXP5 BG12 FDI_TXP5 [2] AE47 LVD_VREFL DDPB_AUXN AT49
[2] DMI_TXP0 AY24 DMI0TXP FDI_RXP6 BJ10 FDI_TXP6 [2] DDPB_AUXP AT47
[2] DMI_TXP1 AY20 BH9 AT40 HDMI_HPD_CON
DMI1TXP FDI_RXP7 FDI_TXP7 [2] DDPB_HPD HDMI_HPD_CON [15]
[2] DMI_TXP2 AY18 [14] PCH_LA_CLK# PCH_LA_CLK# AK39
DMI2TXP LVDSA_CLK#

LVDS
[2] DMI_TXP3 AU18 [14] PCH_LA_CLK PCH_LA_CLK AK40 AV42 IN_D2#
DMI3TXP LVDSA_CLK DDPB_0N IN_D2 IN_D2# [15]
FDI_INT AW 16 FDI_INT [2] DDPB_0P AV40 IN_D2 [15]
PCH_LA_DATAN0 AN48 AV45 IN_D1#
[14] PCH_LA_DATAN0 LVDSA_DATA#0 DDPB_1N IN_D1# [15]
BJ24 AV12 PCH_LA_DATAN1 AM47 AV46 IN_D1
DMI_ZCOMP FDI_FSYNC0 FDI_FSYNC0 [2] [14] PCH_LA_DATAN1 LVDSA_DATA#1 DDPB_1P IN_D1 [15]

Digital Display Interface


[14] PCH_LA_DATAN2 PCH_LA_DATAN2 AK47 AU48 IN_D0#
LVDSA_DATA#2 DDPB_2N IN_D0# [15]
+1.05V R398 49.9/F_4 DMI_COMP BG25 BC10 AJ48 AU47 IN_D0
DMI_IRCOMP FDI_FSYNC1 FDI_FSYNC1 [2] LVDSA_DATA#3 DDPB_2P IN_CLK# IN_D0 [15]
DDPB_3N AV47 IN_CLK# [15]
R211 750/F_4 DMI_RBIAS BH21 AV14 [14] PCH_LA_DATAP0 PCH_LA_DATAP0 AN47 AV49 IN_CLK
DMI2RBIAS FDI_LSYNC0 FDI_LSYNC0 [2] LVDSA_DATA0 DDPB_3P IN_CLK [15]
[14] PCH_LA_DATAP1 PCH_LA_DATAP1 AM49
PCH_LA_DATAP2 LVDSA_DATA1
FDI_LSYNC1 BB10 FDI_LSYNC1 [2] [14] PCH_LA_DATAP2 AK49 LVDSA_DATA2
AJ47 LVDSA_DATA3 DDPC_CTRLCLK P46
DDPC_CTRLDATA P42

A18 DSWVREN [14] PCH_LB_CLK# PCH_LB_CLK# AF40


DSW VRMEN PCH_LB_CLK LVDSB_CLK#
[14] PCH_LB_CLK AF39 LVDSB_CLK DDPC_AUXN AP47

System Power Management


DDPC_AUXP AP49
SUS_PWR_ACK R428 0_4 SUSACK#_R C12 E22 RSMRST# [14] PCH_LB_DATAN0 PCH_LB_DATAN0 AH45 AT38
SUSACK# DPW ROK PCH_LB_DATAN1 LVDSB_DATA#0 DDPC_HPD
[14] PCH_LB_DATAN1 AH47 LVDSB_DATA#1
PCH_LB_DATAN2 AF49 AY47
C
[14] PCH_LB_DATAN2 LVDSB_DATA#2 DDPC_0N C
[2] XDP_DBRST# XDP_DBRST# K3 B9 PCIE_WAKE# AF45 AY49
SYS_RESET# W AKE# PCIE_WAKE# [17,22] LVDSB_DATA#3 DDPC_0P
DDPC_1N AY43
C328 *1U/10V_4 (+3V) [14] PCH_LB_DATAP0 PCH_LB_DATAP0 AH43 AY45
IMVP_PWRGD CLKRUN# PCH_LB_DATAP1 LVDSB_DATA0 DDPC_1P
[32] IMVP_PWRGD P12 SYS_PW ROK CLKRUN# / GPIO32 N3 CLKRUN# [19,24] [14] PCH_LB_DATAP1 AH49 LVDSB_DATA1 DDPC_2N BA47
R271 *0_4 [14] PCH_LB_DATAP2 PCH_LB_DATAP2 AF47 BA48
LVDSB_DATA2 DDPC_2P
(+3VS5) AF43 LVDSB_DATA3 DDPC_3N BB47
[24] EC_PWROK R268 0_4 EC_PWROK_R L22 G8 SUS_STAT# TP42 BB49
R259 0_4 PW ROK SUS_STAT# / GPIO61 DDPC_3P

(+3VS5)
Zď R260 *0_4 APWROK_R L10 N14 PCH_SUSCLK_L TP33 PCH_CRT_B N48 M43
[24,31] M_PWROK APW ROK SUSCLK / GPIO62 [15] PCH_CRT_B CRT_BLUE DDPD_CTRLCLK
PCH_CRT_G P49 M36
[15] PCH_CRT_G CRT_GREEN DDPD_CTRLDATA
(+3VS5) PCH_CRT_R T49
[15] PCH_CRT_R CRT_RED
PM_DRAM_PWRGD B13 D10
[2] PM_DRAM_PWRGD DRAMPW ROK SLP_S5# / GPIO63 SLP_S5 [24]
DDPD_AUXN AT45

CRT
PCH_DDCCLK T39 AT43
[15] PCH_DDCCLK CRT_DDC_CLK DDPD_AUXP
[24] RSMRST# RSMRST# C21 H4 SUSC# [24] [15] PCH_DDCDATA PCH_DDCDATA M40 BH41
RSMRST# SLP_S4# CRT_DDC_DATA DDPD_HPD
(+3VS5) DDPD_0N BB43
SUS_PWR_ACK K16 F4 R169 33_4 PCH_HSYNC_R M47 BB45
[24] SUS_PWR_ACK SUSW ARN#/SUSPW RDNACK/GPIO30 SLP_S3# SUSB# [24] [15] PCH_HSYNC CRT_HSYNC DDPD_0P
ZĂ R230 *0_4 R159 33_4 PCH_VSYNC_R M49 BF44
[15] PCH_VSYNC CRT_VSYNC DDPD_1N
DDPD_1P BE44
DNBSWON# E20 G10 SLP_A#_L Zď R228 *0_4 BF42
[24] DNBSWON# PW RBTN# SLP_A# PM_SLP_A# [24,31] DDPD_2N
R186 1K/F_4 DAC_IREF T43 BE42
DAC_IREF DDPD_2P
Zď (DSW) T42 CRT_IRTN DDPD_3N BJ42
R208 *0_4 AC_PRESENT_R H20 G16 BG42
[24] AC_PRESENT ACPRESENT / GPIO31 SLP_SUS# TP32 DDPD_3P
(+3VS5) PD Res place close to PCH CPT_PPT_Rev_0p5
PM_BATLOW# E10 AP14 PM_SYNC [2]
BATLOW # / GPIO72 PMSYNCH
PCH to Res routeing 50 ohm Impedance.
(+3VS5) Res to connector filter routeing 37.5ohm Impedance.
B PM_RI# R210 *0_4 B
FOR iAMT option A10 RI# SLP_LAN# / GPIO29 K14 Zď PM_SLP_LAN# [24,34]

EŽŶͲŝDd ŝDd R149 150/F_4 PCH_CRT_B C232 *6.8P/50V_4 PCH_CRT_B


CPT_PPT_Rev_0p5
ZĂ ^ƚƵĨĨ E R148 150/F_4 PCH_CRT_G C234 *6.8P/50V_4 PCH_CRT_G

Zď E ^ƚƵĨĨ R168 150/F_4 PCH_CRT_R C240 *6.8P/50V_4 PCH_CRT_R

PCH Pull-high/low(CLG) System PWR_OK(CLG)


+3VS5

PM_RI# R420 10K/F_4

PM_BATLOW# R246 8.2K_4

PCIE_WAKE# R447 10K/F_4

SUS_PWR_ACK R427 *10K/F_4

AC_PRESENT_R R209 10K/F_4

+3V
A A
CLKRUN# R465 8.2K_4

XDP_DBRST# R450 1K/F_4

R434 *1K/F_4

RSMRST# R387 10K/F_4


+3V_RTC R396 330K/F_4 DSWVREN Del R404
B Test
352-(&7-:
IMVP_PWRGD R270 *100K/F_4 On Die DSW VR Enable
[2,7,8,9,10,12,13,14,15,16,17,19,20,22,23,24,29,32,34] +3V
[7,10,14,15,16,22,23,34] +5V 4XDQWD&RPSXWHU,QF
[7,8,9,10,14,19,22,24,26,29,30,34] +3VS5
[2,4,7,8,10,19,24,29,32] +1.05V
EC_PWROK R269 100K/F_4 High = Enable (Default) [7,10,19] +3V_RTC Size Document Number Rev
Custom
1%
Low = Disable W,ϭͬϲ;,ŽƐƚͬŝƐƉůĂLJͿ 1A

Date: Tuesday, February 07, 2012 Sheet 6 of 34


5 4 3 2 1
5 4 3 2 1

Cougar Point/Panther Point (HDA,JTAG,SATA)


Ϭϳ
+3V [2,6,8,9,10,12,13,14,15,16,17,19,20,22,23,24,29,32,34]
+5V [10,14,15,16,22,23,34]
U16A +1.8V [4,10,30]
+1.05V [2,4,6,8,10,19,24,29,32]
+3VS5 [6,8,9,10,14,19,22,24,26,29,30,34]
R386 0_4 RTC_X1 A20 C38
[19] CLKGEN_RTC_X1 RTCX1 FW H0 / LAD0 LAD0 [19,22,24] +3VPCU [14,19,22,23,24,25,26]
FW H1 / LAD1 A38 LAD1 [19,22,24] +3V_RTC [6,10,19]

LPC
RTC_X2 C20 B37 LAD2 [19,22,24]
RTCX2 FW H2 / LAD2
FW H3 / LAD3 C37 LAD3 [19,22,24]
RTC_RST# D20 RTCRST#
FW H4 / LFRAME# D36 LFRAME# [19,22,24]
SRTC_RST# G22 SRTCRST# PCH_DRQ#0
LDRQ0# E36 TP25

RTC
R212 1M_4 SM_INTRUDER# K22 K36 PCH_DRQ#1
D
+3V_RTC INTRUDER# LDRQ1# / GPIO23 TP27 D
R467 *8.2K_4 +3V
PCH_INVRMEN (+3V) SERIRQ R249 8.2K_4
C17 V5
INTVRMEN SERIRQ
SERIRQ [19,24]
+3V
RTC Circuitry(RTC) 30mils
AM3 SATA_RXN0 +3V_RTC
SATA0RXN SATA_RXN0 [23]
ACZ_BCLK N34 AM1 SATA_RXP0 R410
HDA_BCLK SATA0RXP SATA_RXP0 [23]
AP7 SATA_TXN0 +3V_RTC_0 RTC_RST#

SATA 6G
ACZ_SYNC L34
SATA0TXN
AP5 SATA_TXP0 SATA_TXN0 [23] HDD (SATA3 6.0 Gb/s) [19] +3V_RTC_0
HDA_SYNC SATA0TXP SATA_TXP0 [23]
20K/F_4
SPKR T10 AM10
[16] SPKR SPKR SATA1RXN
AM8 C495
ACZ_RST# SATA1RXP 1U/6.3V_4
K34 HDA_RST# SATA1TXN AP11
AP10 D13 R411
SATA1TXP 20K/F_4
+3VPCU
E34 AD7 SATA_RXN2 SRTC_RST#
[16] ACZ_SDIN0 HDA_SDIN0 SATA2RXN SATA_RXN2 [23]
AD5 SATA_RXP2 +3V_RTC_0 R406 *1K/F_4 +3V_RTC_1
SATA2RXP SATA_RXP2 [23]
TP28 G34 AH5 SATA_TXN2
HDA_SDIN1 SATA2TXN SATA_TXN2 [23]

1
AH4 SATA_TXP2 B Test *BAT54C
SATA2TXP SATA_TXP2 [23]
C34 CN17 B Test C482 C496
HDA_SDIN2

IHDA
AB8 BAT_CONN 1U/6.3V_4 1U/6.3V_4
SATA3RXN
A34 AB10

2
HDA_SDIN3 SATA3RXP
SATA3TXN AF3 DG recommended that AC
ACZ_SDOUT SATA3TXP AF1 coupling capacitors should be RTC Power trace width 20mils.
[24] ACZ_SDOUT A36 HDA_SDO close to the connector (<100

SATA
Y7 RTC_RST# R213 *0_6 SRTC_RST#
SATA4RXN
(+3V) SATA4RXP Y5 mils) for optimal signal quality.
GPIO33 C36 AD3
HDA_DOCK_EN# / GPIO33 SATA4TXN
(+3VS5) SATA4TXP AD1
GPIO13 N32
C
TP29 HDA_DOCK_RST# / GPIO13
SATA5RXN Y3 HDA Bus(CLG) RTC Clock 32.768KHz C
+3VS5 R468 *10K/F_4 Y1
SATA5RXP R352 10K/F_4
SATA5TXN AB3 +5V
TP45 PCH_JTAG_TCK_R J3 AB1 Q27
JTAG_TCK SATA5TXP

2
2N7002
TP46 PCH_JTAG_TMS_R H7 Y11
JTAG_TMS SATAICOMPO
JTAG

[16] ACZ_SYNC_AUDIO R370 33_4 1 3 ACZ_SYNC


TP43 PCH_JTAG_TDI_R K5 Y10 SATA_COMP R221 37.4/F_4 +1.05V C478
JTAG_TDI SATAICOMPI RTC_X1
TP73 PCH_JTAG_TDO_R H1 JTAG_TDO

2
1
AB12 R369 1M_4 *18P/50V_4 Y5
SATA3RCOMPO
AB13 SATA3_COMP R222 49.9/F_4 C450 10P/50V_4 R397
SATA3COMPI *10M_4
C480 *32.768KHZ

3
4
PCH_SPI_CLK T3 AH1 SATA3_RBIAS R440 750/F_4 R378 33_4 ACZ_RST# RTC_X2
[24] PCH_SPI_CLK SPI_CLK SATA3RBIAS [16] ACZ_RST#_AUDIO
PCH_SPI_CS0# Y14 R379 33_4 ACZ_SDOUT *18P/50V_4
[24] PCH_SPI_CS0# SPI_CS0# [16] ACZ_SDOUT_AUDIO
SATA_LED# [22]
PCH_SPI_CS1# T1 R189 33_4 ACZ_BCLK
[24] PCH_SPI_CS1# SPI_CS1# [16] BIT_CLK_AUDIO
SPI

P3 R442 10K/F_4 +3V


SATALED# C268 10P/50V_4
PCH_SPI_SI (+3V) R235 10K/F_4
[24] PCH_SPI_SI V4 SPI_MOSI SATA0GP / GPIO21 V14

PCH_SPI_SO (+3V) BBS_BIT0 R453 *10K/F_4


[24] PCH_SPI_SO U3 SPI_MISO SATA1GP / GPIO19 P1 +3V

CPT_PPT_Rev_0p5 PCH SPI ROM(CLG) Vender Size P/N


PCH Strap Table EON 2MB AKE38ZN0Q00 (EN25QH16-104HIP)
B B
Pin Name Strap description Sampled Configuration Circuit AMIC 2MB AKE38ZN0802 (A25LQ16M-F/Q)
Different from 0 = Default (weak pull-down 20K) SPKR
Socket DFHS08FS023
SPKR No reboot mode setting PWROK 1 = Setting to No-Reboot mode R238 *1K/F_4 +3V
Calpella
0 = "top-block swap" mode R339 *1K/F_4
PCI_GNT3# [8]
GNT3# / GPIO55 Top-Block Swap Override PWROK 1 = Default (weak pull-up 20K) +3V R348 10K/F_4

INTVRMEN Integrated 1.05V VRM enable ALWAYS Should be always pull-up PCH_INVRMEN R395 330K/F_4 +3V_RTC
TP63
Flash Descriptor Security 0 = Override GPIO33 ACZ_SDOUT
TP67
HDA_DOCK_EN#/GPIO33 Only for Interposer PWROK 1 = Default (weak pull-up 20K) R383 *1K/F_4 TP71
TP66
[Need external pull-down for LPC BIOS]
GNT1# / GPIO51 Boot BIOS Selection 1 [bit-1] PWROK GNT1# GNT0# Boot Location Default weak pull-up on GNT0/1#
1 1 SPI R437 *1K/F_4 BBS_BIT0 PCH_SPI_CS1# R338 *0_4 U14
Different from 0 0 LPC PCH_SPI_CS0# R343 0_4 1 8 +3V_SPI
R344 *1K/F_4 PCH_SPI_CLK R356 0_4 PCH_SPI1_CLK_R CE# VDD
GPIO19 Calpella Boot BIOS Selection 0 [bit-0] PWROK BBS_BIT1 [8]
PCH_SPI_SI PCH_SPI1_SI_R
6 SCK
R367 0_4 5
PCH_SPI_SO R349 0_4 PCH_SPI1_SO_R SI
Should not be pull-down 2 SO HOLD# 7 R345 3.3K_4
GNT2# / GPIO53 ESI strap (Server only) PWROK (weak pull-up 20K) USE GPIO PIN
TP69 3 W P# VSS 4
Intel Anti-Theft HDD protection C445 C441
NV_ALE Only for Interposer PWROK 0 = Disable (Internal pull-down 20kohm) +1.8V R232 *1K/F_4 *22P/50V_4 SPI Flash ROM 0.1U/10V_4
NV_ALE [8]
B Test
NV_CLE DMI Termination voltage PWROK weak pull-down 20kohm +1.8V R426 2.2K_4 R425 1K/F_4
NV_CLE [9]
H_SNB_IVB# [2] sandy/Ivy bridge R331 0_4 +3V_SPI R359 3.3K_4 BIOS_WP#
+3V
HDA_SYNC On-Die PLL VR Voltage Select RSMRST 0 = Support by 1.8V (weak pull-down) R354 1K/F_4 ACZ_SYNC
A 1 = Support by 1.5V
+3VS5 A
+3VS5 R332 *0_4
0 = Override ACZ_SDOUT
HDA_SDO Flash Descriptor Security PWROK 1 = Default (weak pull-up 20K) R382 *1K/F_4 +3VS5

GPIO8 Integrated Clock Chip Enable RSMRST# Should be pull-down (weak pull-up 20K) R446 *1K/F_4
352-(&7-:
ICC_EN# [9]

Different from 0 = Disable


GPIO28 Calpella On-die PLL Voltage Regulator RSMRST# 1 = Enable (Default) R265 *1K/F_4
PLL_ODVR_EN [9] 4XDQWD&RPSXWHU,QF
0 = Default (weak pull-down 20K) PCH_SPI_SI
SPI_MOSI iTPM function Disable APWROK 1 = Enable R438 *1K/F_4 +3V Size Document Number Rev
Custom
1% W,Ϯͬϲ;,ͬZdͬ^dͬ^W/Ϳ 1A

Date: Tuesday, February 07, 2012 Sheet 7 of 34


5 4 3 2 1
5 4 3 2 1

PCI/USBOC# Pull-up(CLG)

PCI_PIRQA#
PCI_PIRQB#
R336
R375
8.2K_4
8.2K_4
+3V
Cougar Point-M/Panther Point (PCI,USB,NVRAM)
U16E
RSVD1 AY7
AV7 [22] PCIE_RXN1
Cougar Point-M/Panther Point (PCI-E,SMBUS,CLK)

BG34
U16B (+3VS5)
Ϭϴ
PCI_PIRQC# R181 8.2K_4 RSVD2 PERN1 SMBALERT#
BG26 TP1 RSVD3 AU3 [22] PCIE_RXP1 BJ34 PERP1 SMBALERT# / GPIO11 E12
PCI_PIRQD# R188 8.2K_4 C286 0.1U/10V_4 PCIE_TXN1_C
BJ26
BH25
TP2 RSVD4 BG4
t>E [22]
[22]
PCIE_TXN1
PCIE_TXP1 C293 0.1U/10V_4 PCIE_TXP1_C
AV32
AU32
PETN1
H14 SMB_PCH_CLK
TP3 PETP1 SMBCLK
BJ16 TP4 RSVD5 AT10
B Test BG16 BC8 [17] PCIE_RXN2_LAN BE34 C9 SMB_PCH_DAT
+3V TP5 RSVD6 PERN2 SMBDATA
AH38 [17] PCIE_RXP2_LAN BF34
TP6 C265 0.1U/10V_4 PCIE_TXN2_LAN_C PERP2
D MPC_PWR_CTRL# R2005 10K/F_4
AH37
AK43
TP7 RSVD7
AU2
AT4
>E [17]
[17]
PCIE_TXN2_LAN
PCIE_TXP2_LAN C259 0.1U/10V_4 PCIE_TXP2_LAN_C
BB32
AY32
PETN2
(+3VS5) D
TP8 RSVD8 PETP2

SMBUS
LCD_BK R2006 10K/F_4 AK45 AT3 A12 DRAMRST_CNTRL_PCH DRAMRST_CNTRL_PCH [2,12,13]
PCH_GPIO4 R2007 10K/F_4 TP9 RSVD9 SML0ALERT# / GPIO60
C18 AT1 [20] PCIE_RXN3_CR BG36
BT_COMBO_EN# R2008 10K/F_4 TP10 RSVD10 PERN3 SMB_ME0_CLK
N30 AY3 [20] PCIE_RXP3_CR BJ36 C8 SMB_ME0_CLK [18]
TP11 RSVD11 C253 0.1U/10V_4 PCIE_TXN3_CR_C PERP3 SML0CLK
H3
AH12
TP12 RSVD12
AT5
AV3
ĂƌĚƌĞĂĚĞƌ [20]
[20]
PCIE_TXN3_CR
PCIE_TXP3_CR C251 0.1U/10V_4 PCIE_TXP3_CR_C
AV34
AU34
PETN3
G12 SMB_ME0_DAT SMB_ME0_DAT [18]
TP13 RSVD13 PETP3 SML0DATA
AM4 AV1
TP14 RSVD14
AM5 TP15 RSVD15 BB1 [18] PCIE_RXN4 BF36 PERN4
+3VS5 Y13 BA3 BE36 (+3VS5)
TP16 RSVD16 [18] PCIE_RXP4 PERP4
RP11 C258 *0.1U/10V_4 PCIE_TXN4_C SML1ALERT#_R
10 1 USB_OC6#
K24
L24
TP17 RSVD17 BB5
BB3
ǀWƌŽ [18]
[18]
PCIE_TXN4
PCIE_TXP4 C263 *0.1U/10V_4 PCIE_TXP4_C
AY34
BB34
PETN4 SML1ALERT# / PCHHOT# / GPIO74 C13 TP36
USB_OC4# USB_OC0# TP18 RSVD18 PETP4 (+3VS5) SMB_ME1_CLK
9 2 AB46 BB7 E14
USB_OC1# USB_OC7# TP19 RSVD19 SML1CLK / GPIO58

PCI-E*
8 3 AB45 TP20 RSVD20 BE8 BG37 PERN5 (+3VS5)

RSVD
USB_OC2# 7 4 USB_OC5# BD4 BH37 M16 SMB_ME1_DAT
USB_OC3# RSVD21 PERP5 SML1DATA / GPIO75
6 5 BF6 AY36
RSVD22 PETN5
BB36 PETP5
10K_10P8R_6 NV_ALE
B21
M20
TP21 RSVD23 AV5
AV10
NV_ALE [7]
BJ38
FOR iAMT
TP22 RSVD24 PERN6
AY16 BG38
TP23 PERP6 CL_CLK_R R242 *0_4 CL_CLK

Controller
BG46 TP24 RSVD25 AT8 AU36 PETN6 CL_CLK1 M7 CL_CLK [22]
AV36 PETP6
AY5
RSVD26

Link
BA2 BG40 T11 CL_DAT_R R250 *0_4 CL_DATA CL_DATA [22]
RSVD27 PERN7 CL_DATA1
[21] USB30_RX1- BE28 TP25 USB30_RX1N BJ40 PERP7
[21] USB30_RX2- BC30 TP26 USB30_RX2N RSVD28 AT12 AY40 PETN7
BE32 USB30_RX3N BF3 BB40 P10 CL_RST#_R R253 *0_4 CL_RST# CL_RST# [22]
TP27 RSVD29 PETP7 CL_RST1#
BJ32 USB30_RX4N
TP28
[21] USB30_RX1+ BC28 USB30_RX1P BE38
TP29 PERN8
[21] USB30_RX2+ BE30 TP30 USB30_RX2P BC38 PERP8
BF32 TP31 USB30_RX3P AW38 PETN8
h^ϯ͘Ϭ BG32
TP32 USB30_RX4P USBP0N
C24 USBP0- [21] h^ϯ͘ϬKDK AY38
PETP8 (+3VS5)
[21] USB30_TX1- AV26 USB30_TX1N A24 USBP0+ [21]
TP33 USBP0P CLK_PEGA_REQ#
C [21] USB30_TX2- BB26
AU28
TP34 USB30_TX2N
USB30_TX3N
USBP1N C25
B25
USBP1-
USBP1+
[21]
[21]
h^ϯ͘ϬKDK CLK_PCIE_WLANN Y40
PEG_A_CLKRQ# / GPIO47 M10
C
TP35 USBP1P CLK_PCIE_WLANP CLKOUT_PCIE0N
AY30
TP36 USB30_TX4N USBP2N
C26 USBP2- [14] ĂŵĞƌĂ Y39
CLKOUT_PCIE0P
[21] USB30_TX1+ AU26
TP37 USB30_TX1P USBP2P
A26 USBP2+ [14] t>E PCIE_CLKREQ_WLAN# J2 CLKOUT_PEG_A_N
AB37

CLOCKS
[21] USB30_TX2+ AY26 TP38 USB30_TX2P USBP3N K28 PCIECLKRQ0# / GPIO73 CLKOUT_PEG_A_P AB38
AV28 TP39 USB30_TX3P USBP3P H28
AW30
TP40 USB30_TX4P USBP4N
E28 (+3VS5)
D28 CLK_PCIE_LANN AB49 AV22 CLK_CPU_BCLKN [2]
USBP4P CLK_PCIE_LANP CLKOUT_PCIE1N CLKOUT_DMI_N
C28 AB47 AU22 CLK_CPU_BCLKP [2]
USBP5N CLKOUT_PCIE1P CLKOUT_DMI_P
USBP5P A28
C29
>E PCIE_CLKREQ_LAN# M1
USBP6N PCIECLKRQ1# / GPIO18
USBP6P B29 CLKOUT_DP_N AM12 TP37
PCI_PIRQA# K40 N28 (+3V) AM13 TP38
PCI_PIRQB# PIRQA# USBP7N CLK_PCIE_CRN CLKOUT_DP_P
K38 M28 AA48
PIRQB# USBP7P CLKOUT_PCIE2N
PCI

PCI_PIRQC# CLK_PCIE_CRP
PCI_PIRQD#
H38
PIRQC# USBP8N
L30 USBP8- [23] &ŝŶŐĞƌWƌŝŶƚ AA47
CLKOUT_PCIE2P CLK_BUF_PCIE_3GPLL#
G38
PIRQD# USBP8P
K30 USBP8+ [23] ĂƌĚƌĞĂĚĞƌ PCIE_CLKREQ_CR# CLKIN_DMI_N
BF18
CLK_BUF_PCIE_3GPLL
BT_COMBO_EN# C46
USBP9N
G30
E30
USBP9- [16] h^Ϯ͘Ϭ V10
PCIECLKRQ2# / GPIO20 CLKIN_DMI_P
BE18
[22] BT_COMBO_EN# REQ1# / GPIO50 (+3V) USBP9P USBP9+ [16]
USB

C44
REQ2# / GPIO52 (+3V) USBP10N
C30 USBP10- [22] t>E (+3V)
E40 A30 CLK_PCIE_LAN# Y37 BJ30 CLK_BUF_BCLK_N
REQ3# / GPIO54 (+3V) USBP10P USBP10+ [22]
CLK_PCIE_LAN CLKOUT_PCIE3N CLKIN_GND1_N CLK_BUF_BCLK_P
BBS_BIT1 USBP11N L32 USBP11- [16] h^Ϯ͘Ϭ Y36 CLKOUT_PCIE3P CLKIN_GND1_P BG30
[7] BBS_BIT1 D47
E42
GNT1# / GPIO51 (+3V) USBP11P
K32
G32
USBP11+ [16] ǀWƌŽ PCIE_CLKREQ_VPRO# A8
PCI_GNT3# GNT2# / GPIO53 (+3V) USBP12N PCIECLKRQ3# / GPIO25 CLK_BUF_DREFCLK#
[7] PCI_GNT3# F46 (+3V) E32 G24
GNT3# / GPIO55 USBP12P CLKIN_DOT_96N CLK_BUF_DREFCLK
USBP13N
C32 (+3VS5) CLKIN_DOT_96P
E24
A32 Y43
MPC_PWR_CTRL# USBP13P CLKOUT_PCIE4N
G42 (+3V) Y45
LCD_BK PIRQE# / GPIO2 CLKOUT_PCIE4P CLK_BUF_DREFSSCLK#
[14] LCD_BK G40 PIRQF# / GPIO3 (+3V) CLKIN_SATA_N AK7
PCH_GPIO4 C42 C33 USB_BIAS CLK_PCIE_REQ4# L12 AK5 CLK_BUF_DREFSSCLK XTAL25_IN C440
DGPU_IDLE_INT# PIRQG# / GPIO4 (+3V) USBRBIAS# PCIECLKRQ4# / GPIO26 CLKIN_SATA_P *18P/50V_4
TP68 D44 (+3V)
PIRQH# / GPIO5

1
R384 (+3VS5)
B33 22.6/F_4 V45 K45 CLK_PCH_14M R341 Y4
PCI_PME# USBRBIAS CLKOUT_PCIE5N REFCLK14IN *1M_4 *25MHZ
TP44 K10 V46
PME# CLKOUT_PCIE5P
B B Test B

2
PCI_PLTRST# C6 A14 USB_OC0# [9] BOARD_ID0 L14 H45 CLK_PCI_FB XTAL25_OUT C439
PLTRST# (+3VS5) OC0# / GPIO59
K20 USB_OC1# PCIECLKRQ5# / GPIO44 CLKIN_PCILOOPBACK *18P/50V_4
(+3VS5) OC1# / GPIO40
B17 USB_OC2# (+3VS5) R342 *0_4
R337 *22_4 CLK_PCI_TPM_R H49
(+3VS5) OC2# / GPIO41
C16 USB_OC3# AB42 V47 XTAL25_IN R330 0_4
[19] CLK_PCI_TPM CLKOUT_PCI0 (+3VS5) OC3# / GPIO42 CLKOUT_PEG_B_N XTAL25_IN PCH_XTAL25_IN [19]
TP23 CLK_PCI_CARD_R H43 L16 USB_OC4# AB40 V49 XTAL25_OUT
CLK_PCI_FB R177 22_4 CLK_PCI_FB_R J48
CLKOUT_PCI1 (+3VS5) OC4# / GPIO43
A16 USB_OC5# CLKOUT_PEG_B_P XTAL25_OUT
R156 22_4 CLK_PCI_LPC_R K42
CLKOUT_PCI2 (+3VS5) OC5# / GPIO9
D14 USB_OC6# CLK_PEGB_REQ# E6
[22] CLK_33M_DEBUG CLKOUT_PCI3 (+3VS5) OC6# / GPIO10 LANLINK_STATUS [18] TP47 PEG_B_CLKRQ# / GPIO56
[24] CLK_33M_KBC R174 22_4 CLK_PCI_EC_R H40 C14 USB_OC7#
CLKOUT_PCI4 (+3VS5) OC7# / GPIO14
(+3VS5) Y47 XCLK_RCOMP R340 90.9/F_4
XCLK_RCOMP +1.05V
V40
C235 C244 CPT_PPT_Rev_0p5 CLKOUT_PCIE6N
EMI(near PCH) V42
CLKOUT_PCIE6P
18P/50V_4 18P/50V_4 (+3V)
[22] INT_BT_COMBO_EN# T13
PCIECLKRQ6# / GPIO45
(+3VS5) (+3V) CLK_FLEX0
V38 CLKOUT_PCIE7N CLKOUTFLEX0 / GPIO64 K43 TP19

FLEX CLOCKS
V37 (+3V)
CLKOUT_PCIE7P CLK_FLEX1
MPC Switch Control SMBus/Pull-up(CLG) CLK_REQ/Strap Pin(CLG) +3V
[9] BOARD_ID2 K12
CLKOUTFLEX1 / GPIO65
F47 TP22
+3V +3VS5 PCIECLKRQ7# / GPIO46 (+3V)
(+3VS5) H47 CLK_FLEX2 TP65
Q31 PCIE_CLKREQ_LAN# R464 10K/F_4 PCIE_CLK_XDP_N CLKOUTFLEX2 / GPIO66
Low = MPC ON AK14
CLKOUT_ITPXDP_N
MPC_PWR_CTRL# High = MPC OFF (Default) 5 R424 2.2K_4 PCIE_CLKREQ_CR# R237 10K/F_4 PCIE_CLK_XDP_P AK13 K49 CLK_FLEX3
CLKOUT_ITPXDP_P CLKOUTFLEX3 / GPIO67 TP64
DGPU_IDLE_INT# R466 10K/F_4 [2,6,7,9,10,12,13,14,15,16,17,19,20,22,23,24,29,32,34] +3V
TP34
[13,24] MBCLK2 4 3 SMB_ME1_CLK [6,7,9,10,14,19,22,24,26,29,30,34] +3VS5
+3VS5 TP35
MPC_PWR_CTRL# R353 *1K/F_4 CPT_PPT_Rev_0p5 [2,4,6,7,10,19,24,29,32] +1.05V

2 R423 2.2K_4 PCIE_CLKREQ_WLAN# R432 10K/F_4


PCIE_CLKREQ_VPRO# R429 10K/F_4
[13,24] MBDATA2 1 6 SMB_ME1_DAT CLK_PCIE_REQ4# R215 10K/F_4 PCIE Clock +3VS5 SMBus/Pull-up(CLG)
CLK_PEGB_REQ# R258 10K/F_4 R224 1K/F_4 DRAMRST_CNTRL_PCH
+3VS5 2N7002DW CLK_PEGA_REQ# Ra R256 10K/F_4 CLK_PCIE_WLANN
PLTRST#(CLG) SG : Rb ; UMA : Ra
[22] CLK_PCIE_WLANN
CLK_PCIE_WLANP R247 10K/F_4 SMBALERT#
A C327 *0.1U/10V_4 CLK_PEGA_REQ# Rb R243 *10K/F_4 t>E [22] CLK_PCIE_WLANP
[22] PCIE_CLKREQ_WLAN# PCIE_CLKREQ_WLAN# R422 2.2K_4 SMB_PCH_CLK A
+3V CLK_PEGB_REQ# R245 *10K/F_4 R421 2.2K_4 SMB_PCH_DAT
5

Q30 [17] CLK_PCIE_LANN CLK_PCIE_LANN R454 2.2K_4 SMB_ME0_CLK


R445 4.7K/F_4 CLK_BUF_BCLK_N R393 10K/F_4 CLK_PCIE_LANP R216 2.2K_4 SMB_ME0_DAT
2
4 PLTRST#
+3V 5
CLK_BUF_BCLK_P R394 10K/F_4 >E [17] CLK_PCIE_LANP
[17] PCIE_CLKREQ_LAN# PCIE_CLKREQ_LAN# R214 10K/F_4 SML1ALERT#_R
PCI_PLTRST# 1 [12,13,23] SMB_RUN_DAT 4 3 SMB_PCH_DAT
CLK_BUF_PCIE_3GPLL# R217 10K/F_4 [20] CLK_PCIE_CRN CLK_PCIE_CRN
U7 CLK_BUF_PCIE_3GPLL R220 10K/F_4
ĂƌĚƌĞĂĚĞƌ [20] CLK_PCIE_CRP CLK_PCIE_CRP
352-(&7-:
3

*TC7SH08FU R272 R444 4.7K/F_4 2 CLK_BUF_DREFCLK# R202 10K/F_4 PCIE_CLKREQ_CR#


4XDQWD&RPSXWHU,QF
+3V [20] PCIE_CLKREQ_CR#
100K/F_4 CLK_BUF_DREFCLK R206 10K/F_4
[12,13,23] SMB_RUN_CLK 1 6 SMB_PCH_CLK CLK_BUF_DREFSSCLK# R234 10K/F_4 [18] CLK_PCIE_LAN# CLK_PCIE_LAN#
R263 CLK_BUF_DREFSSCLK R233 10K/F_4 CLK_PCIE_LAN
0_4 CLK_PCH_14M R176 10K/F_4 ǀWƌŽ [18] CLK_PCIE_LAN
[18] PCIE_CLKREQ_VPRO# PCIE_CLKREQ_VPRO# Size Document Number Rev
PLTRST# 2N7002DW Custom
1%
PLTRST# [2,17,18,19,20,22,24] W,ϯͬϲ;ůŽĐŬͬW/ͬW/ͬh^Ϳ 1A
CLOCK TERMINATION for FCIM
Date: Tuesday, February 07, 2012 Sheet 8 of 34
5 4 3 2 1
5 4 3 2 1

ʹΠΦΘΒΣ͑΁ΠΚΟΥ͠΁ΒΟΥΙΖΣ͑΁ΠΚΟΥ͙͑͸΁ͺ΀͝·΄΄ΐͿʹ΅ͷ͝΃΄·͵͚

U16F
R372 *10K/F_4 +3V
Ϭϵ
S_GPIO T7 C40 GPIO68 RF_PWR_OFF# [22]
BMBUSY# / GPIO0 TACH4 / GPIO68
SIO_EXT_SMI# A42
(+3V) (+3V)
B41 BOARD_ID5
[24] SIO_EXT_SMI# TACH1 / GPIO1 TACH5 / GPIO69
SIO_EXT_SCI# H36
(+3V) (+3V) C41 DGPU_OPT_DIS#
D
[24] SIO_EXT_SCI# TACH2 / GPIO6 TACH6 / GPIO70 D
BT_OFF# (+3V) (+3V) BOARD_ID1
E38 A40
TP70 TACH3 / GPIO7 TACH7 / GPIO71 MFG-TEST GPIO Pull-up/Pull-down(CLG)
ICC_EN# (+3V)
[7] ICC_EN# C10 GPIO8 (+3V)
LAN_DIS# C4
(+3VS5) +3VS5
[18] LAN_DIS# LAN_PHY_PW R_CTRL / GPIO12 +3V
RF_OFF# G2
(+3VS5) P4 EC_A20GATE LAN_DIS# R430 10K/F_4
[22] RF_OFF# GPIO15 A20GATE EC_A20GATE [24]
MFG_MODE R452 10K/F_4
(+3VS5) PECI AU16
ODD_PRSNT#_R U2 R436 *0_4 +3V
TP72 SATA4GP / GPIO16
P5 EC_RCIN# EC_RCIN# [24]
RCIN# SIO_EXT_SCI# R178 10K/F_4
(+3V)

GPIO
DGPU_PWROK D40 AY11 SIO_EXT_SMI# R358 10K/F_4
TP18 TACH0 / GPIO17 PROCPW RGD H_PWRGOOD [2]

CPU/MISC
BT_OFF# R371 10K/F_4
BIOS_REC T5
(+3V) AY10 PCH_THRMTRIP# R229 390_4 EC_A20GATE R240 10K/F_4
SCLOCK / GPIO22 THRMTRIP# PM_THRMTRIP# [2,24]
Bios swap GPIO. EC_RCIN# R254 10K/F_4
E8
(+3V) T14 SATA5GP R439 10K/F_4
GPIO24 / MEM_LED INIT3_3V#
GPIO27 E16
(+3VS5) AY1 NV_CLE +3V
GPIO27 DF_TVS NV_CLE [7] ODD_PRSNT#_R R455 10K/F_4
PLL_ODVR_EN (DSW) S_GPIO R264 10K/F_4 DGPU_PWROK R160 10K/F_4
[7] PLL_ODVR_EN P8 GPIO28
(+3VS5) TS_VSS1 AH8
BOARD_ID3 K1 R251 *0_4
STP_PCI# / GPIO34 DGPU_PWROK R171 *10K/F_4
(+3V) TS_VSS2 AK11
BOARD_ID4 K4 GPIO27 R219 10K/F_4
GPIO35
(+3V) TS_VSS3 AH10
V8 SATA2GP / GPIO36
(+3V) TS_VSS4 AK10
FDI_OVRVLTG M5
C SATA3GP / GPIO37 C
MFG_MODE (+3V) +3VS5
N2 SLOAD / GPIO38 NC_1 P37
+3V
DGPU_PRSNT (+3V)
M3 SDATAOUT0 / GPIO39 RF_OFF# R431 1K/F_4 R252 *0_4 BIOS_REC R239 10K/F_4
TEST_SET_UP V13
(+3V) BG2
SDATAOUT1 / GPIO48 VSS_NCTF_15 Intel ME Crypto Transport Layer
SATA5GP (+3V)
V3 SATA5GP / GPIO49 VSS_NCTF_16 BG48 Security (TLS) cipher suite
BIOS RECOVERY High = Disable (Default)
SV_DET (+3V) Low = Disable (Default) Low = Enable
D6 GPIO57 VSS_NCTF_17 BH3
(+3VS5) High = Enable
VSS_NCTF_18 BH47

A4 VSS_NCTF_1 VSS_NCTF_19 BJ4

A44 VSS_NCTF_2 VSS_NCTF_20 BJ44

A45 BJ45 +3V +3VS5


VSS_NCTF_3 VSS_NCTF_21
NCTF

A46 BJ46 R236 *0_4 TEST_SET_UP R248 10K/F_4 R244 100K/F_4 SV_DET R257 *10K/F_4
VSS_NCTF_4 VSS_NCTF_22
A5 VSS_NCTF_5 VSS_NCTF_23 BJ5

A6 BJ6 SV_SET_UP TEST DETECT


VSS_NCTF_6 VSS_NCTF_24
B3 C2 High = Strong (Default) Low = Default
VSS_NCTF_7 VSS_NCTF_25
B47 VSS_NCTF_8 VSS_NCTF_26 C48

BD1 VSS_NCTF_9 VSS_NCTF_27 D1


B B
BD49 VSS_NCTF_10 VSS_NCTF_28 D49 ᶲ'*38B3:5B(1B5SXOOKLJK +3V
BE1 VSS_NCTF_11 VSS_NCTF_29 E1 9.炻
炻.㗗
㗗ᶵᶲẞˤ R241 100K/F_4 FDI_OVRVLTG R255 *1K/F_4
BE49 VSS_NCTF_12 VSS_NCTF_30 E49

BF1 VSS_NCTF_13 VSS_NCTF_31 F1

BF49 F49 FDI TERMINATION


VSS_NCTF_14 VSS_NCTF_32 Reserved only
VOLTAGE OVERRIDE
DMI TERMINATION Reserved only
CPT_PPT_Rev_0p5 VOLTAGE OVERRIDE

%2$5'B,'>@ 0RGHO1DPH BOARD_ID0 R266 10K/F_4 BOARD_ID0 R267 *10K/F_4


Chief River BOARD ID SETTING [8] BOARD_ID0 +3VS5

 4/*$ R374 *10K/F_4 BOARD_ID1 R373 10K/F_4 +3V


 7:& %2$5'B,' *3,2 02'(/%,7
 -: %2$5'B,' *3,2 02'(/%,7 [8] BOARD_ID2
BOARD_ID2 R262 10K/F_4 BOARD_ID2 R261 *10K/F_4 +3VS5

 7%' %2$5'B,' *3,2 02'(/%,7 R433 10K/F_4 BOARD_ID3 R449 *10K/F_4 +3V
 /* %2$5'B,' *3,2 02'(/%,7
 /* %2$5'B,' *3,2 1R'ROE\ 'ROE\ 
A R448 10K/F_4 BOARD_ID4 R463 *10K/F_4 A
C Test

 /*& %2$5'B,' *3,2 +0 +0  B Test


R366 10K/F_4 BOARD_ID5 R357 *10K/F_4
[2,6,7,8,10,12,13,14,15,16,17,19,20,22,23,24,29,32,34] +3V
[6,7,8,10,14,19,22,24,26,29,30,34] +3VS5
 /*& '*38B35617 *3,2 2SWLPXV 80$ 
'*38B237B',6 *3,2 2SWLPXV 'LVRQO\  R451 10K/F_4 DGPU_PRSNT R435 *10K/F_4
352-(&7-:
20110816 Define BRD_ID[3:0]
R365 10K/F_4 DGPU_OPT_DIS# R368 *10K/F_4
4XDQWD&RPSXWHU,QF
0804 Board_ID1 change to +3V Size Document Number Rev
Custom
1%
Board_ID5 change to +3V W,ϰͬϲ;'W/KͿ 1A

Date: Tuesday, February 07, 2012 Sheet 9 of 34


5 4 3 2 1
5 4 3 2 1

Cougar Point/Panther Point (POWER)

U16J POWER +1.05V +1.05V


Cougar Point/Panther Point (POWER)

U16G POWER
+VCCA_DAC_1_2
L28
+3V
ϭϬ
1.3 A (60mils) *HCB1608KF-181T15 B Test
+3VS5 AD49 N26 1mA (10mils)
VCCACLK VCCIO[29] C432 10U/6.3VS_6
AA23 VCCCORE[1] VCCADAC U48
VCCIO[30] P26 AC23 VCCCORE[2]
3mA (10mils) T16 C434 C290 C296 AD21 C443 0.1U/10V_4

CRT
VCCDSW 3_3 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 VCCCORE[3]
VCCIO[31] P28 AD23 VCCCORE[4] VSSADAC U47
D AF21 C437 0.01U/25V_4 D

VCC CORE
C308 VCCCORE[5]
V12 DCPSUSBYP VCCIO[32] T27 AF23 VCCCORE[6]
0.1U/10V_4 AG21 +3V
VCCCORE[7]
VCCIO[33] T29 AG23 VCCCORE[8] 1mA (10mils)
+3V_SUS_CLKF33 T38 AG24 AK36
VCC3_3[5] VCCCORE[9] VCCALVDS
119mA (20mils) AG26 VCCCORE[10]
T23 +3VS5 C303 C289 AG27 AK37
VCCSUS3_3[7] 10U/6.3VS_6 1U/6.3V_4 VCCCORE[11] VSSALVDS
FOR iAMT option BH23 VCCAPLLDMI2 AG29 VCCCORE[12] 60mA (10mils)
VCCSUS3_3[8] T24 AJ23 VCCCORE[13] +VCC_TX_LVDS +1.8V

LVDS
EŽŶͲŝDd ŝDd +1.05V AL29 C297 AJ26 AM37
VCCIO[14] 0.1U/10V_4 VCCCORE[14] VCCTX_LVDS[1] L31
VCCSUS3_3[9] V23 AJ27 VCCCORE[15]

USB
ZĂ ^ƚƵĨĨ E +VCCSUS1
AJ29 VCCCORE[16] VCCTX_LVDS[2] AM38
0.1uH/250mA_8
AL24 DCPSUS[3] VCCSUS3_3[10] V24 AJ31 VCCCORE[17]
Zď E ^ƚƵĨĨ AP36 C469 22U/6.3VS_8
VCCTX_LVDS[3]
VCCSUS3_3[6] P24 +3VS5
C300 AP37 C467 0.01U/25V_4
*1U/6.3V_4 VCCTX_LVDS[4]
AA19 VCCASW [1] +1.05V AN19 VCCIO[28]
B Test ZĂ T26 +1.05V C287 C468 0.01U/25V_4
VCCIO[34] 0.1U/10V_4
AA21 VCCASW [2]
R335 BJ22 +3V
+5V_PCH_VCC5REFSUS +1.05V VCCAPLLEXP
+1.05V 1 2 AA24 VCCASW [3] V5REF_SUS M26
+1.05V_VCCEPW 2.925 A (140mils) V33
VCC3_3[6]

HVCMOS
RL1206-R010 AA26 AN16

Clock and Miscellaneous


R334 VCCASW [4] +VCCA_USBSUS C299 *1U/6.3V_4 VCCIO[15]
1.01A (60mils) DCPSUS[4] AN23
+V1.05M 1 2 AA27 AN17 C272
VCCASW [5] C274 C285 VCCIO[16] 0.1U/10V_4
VCCSUS3_3[1] AN24 +3VS5 VCC3_3[7] V34
*RL1206-R010 AA29 1U/6.3V_4 1U/6.3V_4
C291 C301 C292 VCCASW [6]
Zď 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4
AN21 VCCIO[17]
AA31 VCCASW [7]
AN26 VCCIO[18]
C AC26 P34 +5V_PCH_VCC5REF C
VCCASW [8] V5REF +VCCAFDI_VRM
AN27 VCCIO[19] VCCVRM[3] AT16
AC27 VCCASW [9] 119mA (15mils) B Test
N20 AP21 +1.05V
VCCSUS3_3[2] +3VS5 VCCIO[20]

PCI/GPIO/LPC
AC29 C270 C282 C275 42mA (10mils)
C283 C281 VCCASW [10] 10U/6.3VS_6 1U/6.3V_4 1U/6.3V_4
VCCSUS3_3[3] N22 AP23 VCCIO[21] VCCDMI[1] AT20
22U/6.3VS_8 22U/6.3VS_8 AC31 C298
VCCASW [11] +1.05V

DMI
P20 1U/6.3V_4 AP24
VCCSUS3_3[4] VCCIO[22]

VCCIO
AD29 20mA (10mils) C305
VCCASW [12] 1U/6.3V_4
VCCSUS3_3[5] P22 AP26 VCCIO[23] VCCCLKDMI AB36
+5V_PCH_VCC5REF R182 10/F_4 +5V AD31 VCCASW [13]
266mA (20mils) AT24 VCCIO[24]
V5REF= 1mA D5 RB500V-40 W 21 AA16 +3V C505 C507
+3V VCCASW [14] VCC3_3[1] +3V
C269 1U/6.3V_4 *10U/6.3VS_6
1U/6.3V_4 W 23 W 16 AN33
VCCASW [15] VCC3_3[8] C323 VCCIO[25]
W 24 T34 +3V 0.1U/10V_4 AN34 AG16
VCCASW [16] VCC3_3[4] C479 VCCIO[26] VCCDFTERM[1] +1.8V
+5V_PCH_VCC5REFSUS R380 10/F_4 W 26 0.1U/10V_4 190 mA (15mils)
+5VS5 VCCASW [17] C322 BH29 AG17
VCC3_3[3] VCCDFTERM[2]

DFT / SPI
VCC5REFSUS=1mA D11 RB500V-40 +3VS5 W 29 0.1U/10V_4
C454 VCCASW [18]
B Test
0.1U/10V_4 W 31 AJ2 +VCCAFDI_VRM AJ16 C324
VCCASW [19] VCC3_3[2] +3V VCCDFTERM[3] 0.1U/10V_4
W 33 VCCASW [20] AP16 VCCVRM[2]
+1.05V AF13 70mA C276 +1.5V_CPU R2004 *0_6/S +VCCAFDI_VRM AJ17
VCCIO[5] 0.1U/10V_4 VCCDFTERM[4]
160mA (15mils)
C311 +VCCRTCEXT N16 BG6
C320 0.1U/10V_4 DCPRTC VccAFDIPLL +3V_VCCME_SPI
VCCIO[12] AH13
1U/6.3V_4 350mA +1.05V ZĂ
B +VCCAFDI_VRM R456 0_4 B
Y49 VCCVRM[4] VCCIO[13] AH14 +1.05V AP17 VCCIO[27] 20mA (10mils) +3V
160mA (20mils) V1

FDI
R2002 *0_6/S C321 VCCSPI R457 *0_4
+1.05V B Test +3VS5
AF14 30mA 1U/6.3V_4 +1.05V AU20 Zď
+1.05V_VCCA_A_DPL BD47 VCCIO[6] VCCDMI[2] C511
B Test VCCADPLLA
SATA

C436 65mA (10mils) AK1 1U/6.3V_4


1U/6.3V_4 +1.05V_VCCA_B_DPL BF47 VCCAPLLSATA CPT_PPT_Rev_0p5
VCCADPLLB
8mA (10mils)
AF11 +VCCAFDI_VRM
R2003 *0_6/S VCCVRM[1]
+1.05V AF17 VCCIO[7] B Test
+VCCDIFFCLKN AF33 VCCDIFFCLKN[1]
B Test 55mA (10mils) B Test AF34 VCCDIFFCLKN[2] VCCIO[2] AC16 +1.05V
C486 AG34 +1.05V 65mA (10mils)
1U/6.3V_4 VCCDIFFCLKN[3]
VCCIO[3] AC17
C312 L27 +1.05V_VCCA_A_DPL C431 1U/6.3V_4
+V1.05V_SSCVCC AG33 AD17 1U/6.3V_4 10uH/100MA_8 If have power noise issue then stuff it.
VCCSSC VCCIO[4] C438 *220U/2.5V_3528 +5V +VCCA_DAC_1_2

+
95mA (10mils) B Test
8mA (10mils) B Test U2001
+V1.05M C309 +VCCSST V16 G910T21U
R218 *0_6 0.1U/10V_4 DCPSST L30 +1.05V_VCCA_B_DPL C444 1U/6.3V_4 3 Vin Vout 1
1.01A (60mils) 10uH/100MA_8

GND
C442 *220U/2.5V_3528

+
T17 DCPSUS[1] VCCASW [22] T21 +1.05V_VCCEPW
C304 +V1.05M_VCCSUS V19 B Test
*1U/6.3V_4 DCPSUS[2] C2001
MISC

2
V21 +3V 20mA (10mils) 1U/6.3V_4
VCCASW [23]
CPU

BJ8 +3V_SUS_CLKF33 C435 1U/6.3V_4 B Test


+1.05V V_PROC_IO
T19 L29
VCCASW [21] R333 0_4 +3V_SUS_CLKF33_R C433 10U/6.3VS_6
V_PROC_IO=1mA
C508 C506 C502 10uH/100MA_8
A (10mils) 4.7U/6.3V_6 0.1U/10V_4 0.1U/10V_4 A
10mA (10mils)
A22 P32
RTC

VCCRTC VCCSUSHDA +3VS5


HDA

B Test
+VCCAFDI_VRM
+3V_RTC
CPT_PPT_Rev_0p5 C457 C456
VCCRTC<1mA 0.1U/10V_4 *1U/6.3V_4
352-(&7-:
[6,7,19] +3V_RTC
C483 C484 C485
(10mils) 1U/6.3V_4 0.1U/10V_4 0.1U/10V_4
[2,4,12,13,27] +1.5VSUS
C2003
1U/6.3V_4
C2004
1U/6.3V_4
C2005
1U/6.3V_4
[2,4,22] +1.5V_CPU
[2,6,7,8,9,12,13,14,15,16,17,19,20,22,23,24,29,32,34] +3V 4XDQWD&RPSXWHU,QF
[7,14,15,16,22,23,34] +5V
[4,7,30] +1.8V
[2,4,6,7,8,19,24,29,32] +1.05V Size Document Number Rev
Custom
1%
[6,7,8,9,14,19,22,24,26,29,30,34] +3VS5 W,ϱͬϲ;WŽǁĞƌͿ 1A
[16,19,21,26,27,28,29,30,31,32,33,34] +5VS5
Date: Tuesday, February 07, 2012 Sheet 10of 34
5 4 3 2 1
5 4 3 2 1

Cougar Point/Panther Point (GND)


U16I
Cougar Point/Panther Point (GND) ϭϭ
AY4 VSS[159] VSS[259] H46
AY42 K18 U16H
VSS[160] VSS[260]
AY46 VSS[161] VSS[261] K26 H5 VSS[0]
AY8 VSS[162] VSS[262] K39
B11 VSS[163] VSS[263] K46 AA17 VSS[1] VSS[80] AK38
B15 VSS[164] VSS[264] K7 AA2 VSS[2] VSS[81] AK4
D B19 L18 AA3 AK42 D
VSS[165] VSS[265] VSS[3] VSS[82]
B23 VSS[166] VSS[266] L2 AA33 VSS[4] VSS[83] AK46
B27 VSS[167] VSS[267] L20 AA34 VSS[5] VSS[84] AK8
B31 VSS[168] VSS[268] L26 AB11 VSS[6] VSS[85] AL16
B35 VSS[169] VSS[269] L28 AB14 VSS[7] VSS[86] AL17
B39 VSS[170] VSS[270] L36 AB39 VSS[8] VSS[87] AL19
B7 VSS[171] VSS[271] L48 AB4 VSS[9] VSS[88] AL2
F45 VSS[172] VSS[272] M12 AB43 VSS[10] VSS[89] AL21
BB12 VSS[173] VSS[273] P16 AB5 VSS[11] VSS[90] AL23
BB16 VSS[174] VSS[274] M18 AB7 VSS[12] VSS[91] AL26
BB20 VSS[175] VSS[275] M22 AC19 VSS[13] VSS[92] AL27
BB22 VSS[176] VSS[276] M24 AC2 VSS[14] VSS[93] AL31
BB24 VSS[177] VSS[277] M30 AC21 VSS[15] VSS[94] AL33
BB28 VSS[178] VSS[278] M32 AC24 VSS[16] VSS[95] AL34
BB30 VSS[179] VSS[279] M34 AC33 VSS[17] VSS[96] AL48
BB38 VSS[180] VSS[280] M38 AC34 VSS[18] VSS[97] AM11
BB4 VSS[181] VSS[281] M4 AC48 VSS[19] VSS[98] AM14
BB46 VSS[182] VSS[282] M42 AD10 VSS[20] VSS[99] AM36
BC14 VSS[183] VSS[283] M46 AD11 VSS[21] VSS[100] AM39
BC18 VSS[184] VSS[284] M8 AD12 VSS[22] VSS[101] AM43
BC2 VSS[185] VSS[285] N18 AD13 VSS[23] VSS[102] AM45
BC22 VSS[186] VSS[286] P30 AD19 VSS[24] VSS[103] AM46
BC26 VSS[187] VSS[287] N47 AD24 VSS[25] VSS[104] AM7
BC32 VSS[188] VSS[288] P11 AD26 VSS[26] VSS[105] AN2
BC34 VSS[189] VSS[289] P18 AD27 VSS[27] VSS[106] AN29
BC36 VSS[190] VSS[290] T33 AD33 VSS[28] VSS[107] AN3
BC40 VSS[191] VSS[291] P40 AD34 VSS[29] VSS[108] AN31
BC42 VSS[192] VSS[292] P43 AD36 VSS[30] VSS[109] AP12
BC48 VSS[193] VSS[293] P47 AD37 VSS[31] VSS[110] AP19
BD46 VSS[194] VSS[294] P7 AD38 VSS[32] VSS[111] AP28
C BD5 R2 AD39 AP30 C
VSS[195] VSS[295] VSS[33] VSS[112]
BE22 VSS[196] VSS[296] R48 AD4 VSS[34] VSS[113] AP32
BE26 VSS[197] VSS[297] T12 AD40 VSS[35] VSS[114] AP38
BE40 VSS[198] VSS[298] T31 AD42 VSS[36] VSS[115] AP4
BF10 VSS[199] VSS[299] T37 AD43 VSS[37] VSS[116] AP42
BF12 VSS[200] VSS[300] T4 AD45 VSS[38] VSS[117] AP46
BF16 VSS[201] VSS[301] W 34 AD46 VSS[39] VSS[118] AP8
BF20 VSS[202] VSS[302] T46 AD8 VSS[40] VSS[119] AR2
BF22 VSS[203] VSS[303] T47 AE2 VSS[41] VSS[120] AR48
BF24 VSS[204] VSS[304] T8 AE3 VSS[42] VSS[121] AT11
BF26 VSS[205] VSS[305] V11 AF10 VSS[43] VSS[122] AT13
BF28 VSS[206] VSS[306] V17 AF12 VSS[44] VSS[123] AT18
BD3 VSS[207] VSS[307] V26 AD14 VSS[45] VSS[124] AT22
BF30 VSS[208] VSS[308] V27 AD16 VSS[46] VSS[125] AT26
BF38 VSS[209] VSS[309] V29 AF16 VSS[47] VSS[126] AT28
BF40 VSS[210] VSS[310] V31 AF19 VSS[48] VSS[127] AT30
BF8 VSS[211] VSS[311] V36 AF24 VSS[49] VSS[128] AT32
BG17 VSS[212] VSS[312] V39 AF26 VSS[50] VSS[129] AT34
BG21 VSS[213] VSS[313] V43 AF27 VSS[51] VSS[130] AT39
BG33 VSS[214] VSS[314] V7 AF29 VSS[52] VSS[131] AT42
BG44 VSS[215] VSS[315] W 17 AF31 VSS[53] VSS[132] AT46
BG8 VSS[216] VSS[316] W 19 AF38 VSS[54] VSS[133] AT7
BH11 VSS[217] VSS[317] W2 AF4 VSS[55] VSS[134] AU24
BH15 VSS[218] VSS[318] W 27 AF42 VSS[56] VSS[135] AU30
BH17 VSS[219] VSS[319] W 48 AF46 VSS[57] VSS[136] AV16
BH19 VSS[220] VSS[320] Y12 AF5 VSS[58] VSS[137] AV20
H10 VSS[221] VSS[321] Y38 AF7 VSS[59] VSS[138] AV24
BH27 VSS[222] VSS[322] Y4 AF8 VSS[60] VSS[139] AV30
BH31 VSS[223] VSS[323] Y42 AG19 VSS[61] VSS[140] AV38
BH33 VSS[224] VSS[324] Y46 AG2 VSS[62] VSS[141] AV4
B BH35 Y8 AG31 AV43 B
VSS[225] VSS[325] VSS[63] VSS[142]
BH39 VSS[226] VSS[328] BG29 AG48 VSS[64] VSS[143] AV8
BH43 VSS[227] VSS[329] N24 AH11 VSS[65] VSS[144] AW 14
BH7 VSS[228] VSS[330] AJ3 AH3 VSS[66] VSS[145] AW 18
D3 VSS[229] VSS[331] AD47 AH36 VSS[67] VSS[146] AW 2
D12 VSS[230] VSS[333] B43 AH39 VSS[68] VSS[147] AW 22
D16 VSS[231] VSS[334] BE10 AH40 VSS[69] VSS[148] AW 26
D18 VSS[232] VSS[335] BG41 AH42 VSS[70] VSS[149] AW 28
D22 VSS[233] VSS[337] G14 AH46 VSS[71] VSS[150] AW 32
D24 VSS[234] VSS[338] H16 AH7 VSS[72] VSS[151] AW 34
D26 VSS[235] VSS[340] T36 AJ19 VSS[73] VSS[152] AW 36
D30 VSS[236] VSS[342] BG22 AJ21 VSS[74] VSS[153] AW 40
D32 VSS[237] VSS[343] BG24 AJ24 VSS[75] VSS[154] AW 48
D34 VSS[238] VSS[344] C22 AJ33 VSS[76] VSS[155] AV11
D38 VSS[239] VSS[345] AP13 AJ34 VSS[77] VSS[156] AY12
D42 VSS[240] VSS[346] M14 AK12 VSS[78] VSS[157] AY22
D8 VSS[241] VSS[347] AP3 AK3 VSS[79] VSS[158] AY28
E18 VSS[242] VSS[348] AP1
E26 BE16 CPT_PPT_Rev_0p5
VSS[243] VSS[349]
G18 VSS[244] VSS[350] BC16
G20 VSS[245] VSS[351] BG28
G26 VSS[246] VSS[352] BJ28
G28 VSS[247]
G36 VSS[248]
G48 VSS[249]
H12 VSS[250]
H18 VSS[251]
H22 VSS[252]
H24 VSS[253]
H26 VSS[254]
A H30 A
VSS[255]
H32 VSS[256]
H34 VSS[257]
F3 VSS[258]

CPT_PPT_Rev_0p5
352-(&7-:
4XDQWD&RPSXWHU,QF
Size Document Number Rev
Custom
1% W,ϲͬϲ;'ƌŽƵŶĚͿ 1A

Date: Thursday, January 12, 2012 Sheet 11of 34


5 4 3 2 1
5 4 3 2 1

[3] M_A_A[15:0] M_A_A0


M_A_A1
M_A_A2
M_A_A3
98
97
96
95
JDIM1A
A0
A1
A2
DQ0
DQ1
DQ2
5
7
15
17
M_A_DQ4
M_A_DQ5
M_A_DQ7
M_A_DQ6
M_A_DQ[63:0] [3]
2.48A +1.5VSUS

75
76
81
JDIM1B
VDD1
VDD2
VSS16
VSS17
44
48
49
ϭϮ
M_A_A4 A3 DQ3 M_A_DQ1 VDD3 VSS18
92 A4 DQ4 4 82 VDD4 VSS19 54
M_A_A5 91 6 M_A_DQ0 87 55
M_A_A6 A5 DQ5 M_A_DQ3 VDD5 VSS20
90 A6 DQ6 16 88 VDD6 VSS21 60
M_A_A7 86 18 M_A_DQ2 93 61
M_A_A8 A7 DQ7 M_A_DQ9 VDD7 VSS22
89 A8 DQ8 21 94 VDD8 VSS23 65
M_A_A9 85 23 M_A_DQ8 99 66
D M_A_A10 A9 DQ9 M_A_DQ15 VDD9 VSS24 D
107 A10/AP DQ10 33 100 VDD10 VSS25 71
M_A_A11 84 35 M_A_DQ10 105 72
M_A_A12 A11 DQ11 M_A_DQ12 VDD11 VSS26

PC2100 DDR3 SDRAM SO-DIMM


83 A12/BC# DQ12 22 106 VDD12 VSS27 127
M_A_A13 119 24 M_A_DQ13 111 128
M_A_A14 A13 DQ13 M_A_DQ14 VDD13 VSS28
80 A14 DQ14 34 112 VDD14 VSS29 133
M_A_A15 78 36 M_A_DQ11 117 134
A15 DQ15 M_A_DQ21 VDD15 VSS30

PC2100 DDR3 SDRAM SO-DIMM


DQ16 39 118 VDD16 VSS31 138
109 41 M_A_DQ16 123 139
[3] M_A_BS#0 BA0 DQ17 VDD17 VSS32
108 51 M_A_DQ19 124 144
[3] M_A_BS#1 BA1 DQ18 VDD18 VSS33
79 53 M_A_DQ18 145
[3] M_A_BS#2 BA2 DQ19 VSS34
114 40 M_A_DQ20 199 150
[3] M_A_CS#0 S0# DQ20 +3V VDDSPD VSS35
121 42 M_A_DQ17 151
[3] M_A_CS#1 S1# DQ21 M_A_DQ23 VSS36
[3] M_A_CLKP0 101 CK0 DQ22 50 77 NC1 VSS37 155
103 52 M_A_DQ22 122 156
[3] M_A_CLKN0 CK0# DQ23 NC2 VSS38
102 57 M_A_DQ25 R109 10K/F_4 125 161
[3] M_A_CLKP1 CK1 DQ24 +3V NCTEST VSS39
104 59 M_A_DQ24 162
[3] M_A_CLKN1 CK1# DQ25 VSS40
73 67 M_A_DQ30 [13] PM_EXTTS#0 PM_EXTTS#0 198 167
[3] M_A_CKE0 CKE0 DQ26 M_A_DQ26 EVENT# VSS41
[3] M_A_CKE1 74 CKE1 DQ27 69 [2,13] DDR3_DRAMRST# 30 RESET# VSS42 168
115 56 M_A_DQ28 172
[3] M_A_CAS# CAS# DQ28 VSS43
110 58 M_A_DQ29 173
[3] M_A_RAS# RAS# DQ29 M_A_DQ31 SMDDR_VREF_DQ0_M1 R36 +SMDDR_VREF_DQ0 VSS44
113 68 *0_6/S 1 178
[3] M_A_WE# W E# DQ30 VREF_DQ VSS45
R89 10K/F_4 DIMM0_SA0 197 70 M_A_DQ27 SMDDR_VREF_DQ0_M3 R33 *0_6 +SMDDR_VREF_DIMM 126 179
SA0 DQ31 [4] SMDDR_VREF_DQ0_M3 VREF_CA VSS46
R91 10K/F_4 DIMM0_SA1 201 129 M_A_DQ36 184
SMB_RUN_CLK SA1 DQ32 M_A_DQ37 VSS47
[8,13,23] SMB_RUN_CLK 202 SCL DQ33 131 VSS48 185
[8,13,23] SMB_RUN_DAT SMB_RUN_DAT 200 141 M_A_DQ34 2 189
SDA DQ34 M_A_DQ38 VSS1 VSS49
DQ35 143 3 VSS2 VSS50 190
116 130 M_A_DQ32 8 195

(204P)
[3] M_A_ODT0 ODT0 DQ36 M_A_DQ33 VSS3 VSS51
[3] M_A_ODT1 120 ODT1 DQ37 132 9 VSS4 VSS52 196
140 M_A_DQ35 13
DQ38 M_A_DQ39 VSS5
11 DM0 DQ39 142 14 VSS6
C 28 147 M_A_DQ41 19 C
DM1 DQ40 M_A_DQ45 VSS7
46 149 20
For EMI RESERVE

(204P)
DM2 DQ41 M_A_DQ47 VSS8
63 DM3 DQ42 157 25 VSS9
136 159 M_A_DQ46 26 203 +0.75V_DDR_VTT
DM4 DQ43 M_A_DQ40 +1.5VSUS VSS10 VTT1
153 DM5 DQ44 146 31 VSS11 VTT2 204
170 148 M_A_DQ44 32
DM6 DQ45 M_A_DQ42 C117 *120P/50V_4 VSS12
187 DM7 DQ46 158 37 VSS13 GND 205
160 M_A_DQ43 38 206
[3] M_A_DQSP[7:0] DQ47 VSS14 GND
M_A_DQSP0 12 163 M_A_DQ49 C55 *120P/50V_4 43
M_A_DQSP1 DQS0 DQ48 M_A_DQ48 VSS15
29 DQS1 DQ49 165
M_A_DQSP2 47 175 M_A_DQ54 C82 *120P/50V_4
M_A_DQSP3 DQS2 DQ50 M_A_DQ55 DDR3-DIMM0_H=5.2_RVS
64 DQS3 DQ51 177
M_A_DQSP4 137 164 M_A_DQ53 C47 *120P/50V_4 DDR-78279-001-RVS-204P
M_A_DQSP5 DQS4 DQ52 M_A_DQ52 DGMK4000028
154 DQS5 DQ53 166
M_A_DQSP6 171 174 M_A_DQ50 C74 *120P/50V_4 IC SOCKET DDR3 SO-DIMM(204P,H5.2,RVS)
M_A_DQSP7 DQS6 DQ54 M_A_DQ51
[3] M_A_DQSN[7:0] 188 DQS7 DQ55 176
M_A_DQSN0 10 181 M_A_DQ61 C97 *120P/50V_4
M_A_DQSN1 DQS#0 DQ56 M_A_DQ60
27 DQS#1 DQ57 183
M_A_DQSN2 45 191 M_A_DQ62 C67 *120P/50V_4
M_A_DQSN3 DQS#2 DQ58 M_A_DQ63
62 DQS#3 DQ59 193
M_A_DQSN4 135 180 M_A_DQ56
M_A_DQSN5 DQS#4 DQ60 M_A_DQ57
152 DQS#5 DQ61 182
M_A_DQSN6 169 192 M_A_DQ59 +0.75V_DDR_VTT
M_A_DQSN7 DQS#6 DQ62 M_A_DQ58
186 DQS#7 DQ63 194
C173 *120P/50V_4

DDR3-DIMM0_H=5.2_RVS C172 *120P/50V_4


DDR-78279-001-RVS-204P
DGMK4000028
IC SOCKET DDR3 SO-DIMM(204P,H5.2,RVS)
B B

VREF DQ0 M1 Solution +1.5VSUS


Place these Caps near So-Dimm0.
+1.5VSUS +0.75V_DDR_VTT
R56
C59 1U/6.3V_4 C180 1U/6.3V_4 1K/F_4

C114 1U/6.3V_4 C170 1U/6.3V_4

C116 1U/6.3V_4 C185 1U/6.3V_4 R52 *0_6 +SMDDR_VREF_DIMM R62 *0_6


[4,13,27] DDR_VTTREF +SMDDR_VREF_DIMM1 [13]
C40 1U/6.3V_4 C184 1U/6.3V_4

C93 10U/6.3VS_6 C181 10U/6.3VS_6 R58 C127


1K/F_4 470P/50V_4
C86 10U/6.3VS_6 C182 *10U/6.3VS_6 +1.5VSUS

C37 10U/6.3VS_6
+SMDDR_VREF_DIMM
C79 10U/6.3VS_6 DDR_VTTREF R39 *0_6
C128 0.1U/10V_4 R34
C44 10U/6.3VS_6 1K/F_4
C136 2.2U/6.3V_6
C56 10U/6.3VS_6 SMDDR_VREF_DQ0_M3 1 3 SMDDR_VREF_DQ0_M1

A C84 *10U/6.3VS_6 +SMDDR_VREF_DQ0 A


Q7
2

C73 10U/6.3V_8 C21 0.1U/10V_4 AO3416 R35


1K/F_4
C58 10U/6.3V_8 C20 2.2U/6.3V_6

352-(&7-:
[2,8,13] DRAMRST_CNTRL_PCH
+3V

C160 0.1U/10V_4
4XDQWD&RPSXWHU,QF
C157 2.2U/6.3V_6 [2,6,7,8,9,10,13,14,15,16,17,19,20,22,23,24,29,32,34] +3V Size Document Number Rev
[2,4,13,27] +1.5VSUS Custom
1% ^LJƐƚĞŵDĞŵŽƌLJϭͬϮ;ϱ͘Ϯ,Ϳ 1A
[13,27,34] +0.75V_DDR_VTT
Date: Tuesday, February 07, 2012 Sheet 12of 34
5 4 3 2 1
5 4 3 2 1

[3] M_B_A[15:0]
M_B_A0
M_B_A1
M_B_A2
98
97
96
JDIM2A
A0
A1
DQ0
DQ1
5
7
15
M_B_DQ5
M_B_DQ4
M_B_DQ3
M_B_DQ[63:0] [3]
+1.5VSUS

75
76
81
JDIM2B
VDD1
VDD2
VSS16
VSS17
44
48
49
ϭϯ
M_B_A3 A2 DQ2 M_B_DQ2 VDD3 VSS18
95 A3 DQ3 17 82 VDD4 VSS19 54
M_B_A4 92 4 M_B_DQ0 87 55
M_B_A5 A4 DQ4 M_B_DQ1 VDD5 VSS20
91 A5 DQ5 6 88 VDD6 VSS21 60
M_B_A6 90 16 M_B_DQ6 93 61
M_B_A7 A6 DQ6 M_B_DQ7 VDD7 VSS22
86 A7 DQ7 18 94 VDD8 VSS23 65
M_B_A8 89 21 M_B_DQ12
D M_B_A9 85
A8 DQ8
23 M_B_DQ13
2.48A 99
100
VDD9 VSS24 66
71 D
M_B_A10 A9 DQ9 M_B_DQ14 VDD10 VSS25
107 A10/AP DQ10 33 105 VDD11 VSS26 72
M_B_A11 M_B_DQ10

PC2100 DDR3 SDRAM SO-DIMM


84 A11 DQ11 35 106 VDD12 VSS27 127
M_B_A12 83 22 M_B_DQ8 111 128
M_B_A13 A12/BC# DQ12 M_B_DQ9 VDD13 VSS28
119 A13 DQ13 24 112 VDD14 VSS29 133
M_B_A14 80 34 M_B_DQ11 117 134
M_B_A15 A14 DQ14 M_B_DQ15 VDD15 VSS30
78 A15 DQ15 36 118 VDD16 VSS31 138
M_B_DQ20

PC2100 DDR3 SDRAM SO-DIMM


DQ16 39 123 VDD17 VSS32 139
109 41 M_B_DQ21 124 144
[3] M_B_BS#0 BA0 DQ17 VDD18 VSS33
108 51 M_B_DQ18 145
[3] M_B_BS#1 BA1 DQ18 VSS34
79 53 M_B_DQ22 +3V 199 150
[3] M_B_BS#2 BA2 DQ19 VDDSPD VSS35
114 40 M_B_DQ17 151
[3] M_B_CS#0 S0# DQ20 M_B_DQ16 VSS36
[3] M_B_CS#1 121 S1# DQ21 42 77 NC1 VSS37 155
101 50 M_B_DQ19 122 156
[3] M_B_CLKP0 CK0 DQ22 NC2 VSS38
103 52 M_B_DQ23 R103 *10K/F_4 125 161
[3] M_B_CLKN0 CK0# DQ23 +3V NCTEST VSS39
102 57 M_B_DQ25 162
[3] M_B_CLKP1 CK1 DQ24 VSS40
104 59 M_B_DQ29 [12] PM_EXTTS#0 PM_EXTTS#0 198 167
[3] M_B_CLKN1 CK1# DQ25 M_B_DQ27 EVENT# VSS41
[3] M_B_CKE0 73 CKE0 DQ26 67 [2,12] DDR3_DRAMRST# 30 RESET# VSS42 168
74 69 M_B_DQ26 172
[3] M_B_CKE1 CKE1 DQ27 VSS43
115 56 M_B_DQ28 173
[3] M_B_CAS# CAS# DQ28 M_B_DQ24 SMDDR_VREF_DQ1_M1 R38 +SMDDR_VREF_DQ1 VSS44
110 58 *0_6/S 1 178
[3] M_B_RAS# RAS# DQ29 VREF_DQ VSS45
113 68 M_B_DQ31 SMDDR_VREF_DQ1_M3 R37 *0_6 +SMDDR_VREF_DIMM1 126 179
[3] M_B_WE# W E# DQ30 [4] SMDDR_VREF_DQ1_M3 VREF_CA VSS46
R102 10K/F_4 DIMM1_SA0 197 70 M_B_DQ30 184
R108 10K/F_4 DIMM1_SA1 SA0 DQ31 M_B_DQ36 VSS47
+3V 201 SA1 DQ32 129 VSS48 185
[8,12,23] SMB_RUN_CLK 202 131 M_B_DQ37 2 189
SCL DQ33 M_B_DQ35 VSS1 VSS49
[8,12,23] SMB_RUN_DAT 200 SDA DQ34 141 3 VSS2 VSS50 190
143 M_B_DQ34 8 195

(204P)
DQ35 M_B_DQ33 VSS3 VSS51
[3] M_B_ODT0 116 ODT0 DQ36 130 9 VSS4 VSS52 196
[3] M_B_ODT1 120 132 M_B_DQ32 13
ODT1 DQ37 M_B_DQ39 VSS5
DQ38 140 14 VSS6
C 11 142 M_B_DQ38 19 C
DM0 DQ39 M_B_DQ44 VSS7
28 DM1 DQ40 147 20 VSS8
46 149 M_B_DQ40 25

(204P)
DM2 DQ41 M_B_DQ42 VSS9
63 DM3 DQ42 157 26 VSS10 VTT1 203 +0.75V_DDR_VTT
136 159 M_B_DQ43 31 204
DM4 DQ43 M_B_DQ45 VSS11 VTT2
153 DM5 DQ44 146 32 VSS12
170 148 M_B_DQ41 37 205
DM6 DQ45 M_B_DQ46 VSS13 GND
187 DM7 DQ46 158 38 VSS14 GND 206
160 M_B_DQ47 43
[3] M_B_DQSP[7:0] DQ47 VSS15
M_B_DQSP0 12 163 M_B_DQ49
M_B_DQSP1 DQS0 DQ48 M_B_DQ48
29 DQS1 DQ49 165
M_B_DQSP2 47 175 M_B_DQ54 DDR3-DIMM1_H=9.2_RVS
M_B_DQSP3 DQS2 DQ50 M_B_DQ55 DDR-AS0A626-UARN-7F-204P
64 DQS3 DQ51 177
M_B_DQSP4 137 164 M_B_DQ52 DGMK4000029
M_B_DQSP5 DQS4 DQ52 M_B_DQ53 IC SOCKET DDR3 SO-DIMM(204P,H9.2,RVS)
154 DQS5 DQ53 166
M_B_DQSP6 171 174 M_B_DQ50
M_B_DQSP7 DQS6 DQ54 M_B_DQ51
[3] M_B_DQSN[7:0] 188 DQS7 DQ55 176
M_B_DQSN0 10 181 M_B_DQ61
M_B_DQSN1 DQS#0 DQ56 M_B_DQ56
27 DQS#1 DQ57 183
M_B_DQSN2 45 191 M_B_DQ62
M_B_DQSN3 DQS#2 DQ58 M_B_DQ63
62 193
M_B_DQSN4 135
DQS#3 DQ59
180 M_B_DQ57 DDR3 Thermal Sensor
M_B_DQSN5 DQS#4 DQ60 M_B_DQ60
152 DQS#5 DQ61 182
M_B_DQSN6 169 192 M_B_DQ59 U10 C403 *0.01U/25V_4
M_B_DQSN7 DQS#6 DQ62 M_B_DQ58
186 DQS#7 DQ63 194
[8,24] MBCLK2 MBCLK2 8 1 +3V
SCLK VCC
DDR3-DIMM1_H=9.2_RVS [8,24] MBDATA2 MBDATA2 7 2 DDR_THERMDA
DDR-AS0A626-UARN-7F-204P SDA DXP

3
DGMK4000029 PM_EXTTS#0 6 3
B IC SOCKET DDR3 SO-DIMM(204P,H9.2,RVS) ALERT# DXN C404 Q22 B
2
PM_EXTTS#0_EC 4 5 *2200P/50V_4 *MMBT3904-7-F
OVERT# GND

1
DDR_THERMDC
+3V R294 *10K/F_4 *LM95245CIMM

VREF DQ1 M1 Solution +1.5VSUS


Place these Caps near So-Dimm1.
+1.5VSUS +0.75V_DDR_VTT +SMDDR_VREF_DIMM1 R57
1K/F_4
C112 1U/6.3V_4 C178 1U/6.3V_4 C134 0.1U/10V_4

C41 1U/6.3V_4 C179 1U/6.3V_4 C137 2.2U/6.3V_6


[4,12,27] DDR_VTTREF R61 *0_6 +SMDDR_VREF_DIMM1 +SMDDR_VREF_DIMM1 [12]
C115 1U/6.3V_4 C169 1U/6.3V_4 +1.5VSUS

C85 1U/6.3V_4 C177 1U/6.3V_4 +SMDDR_VREF_DQ1


R59 C135
C60 10U/6.3VS_6 C183 10U/6.3VS_6 C23 0.1U/10V_4 R30 1K/F_4 470P/50V_4
1K/F_4
C123 10U/6.3VS_6 C168 *10U/6.3VS_6 C24 2.2U/6.3V_6

C52 10U/6.3VS_6 DDR_VTTREF R32 *0_6 SMDDR_VREF_DQ1_M1

A C48 10U/6.3VS_6 +3V A


R31
C96 10U/6.3VS_6 C156 0.1U/10V_4 1K/F_4
SMDDR_VREF_DQ1_M3 1 3
C43 10U/6.3VS_6 C163 2.2U/6.3V_6

C111 *10U/6.3VS_6 Q6
352-(&7-:
2

AO3416
C49 10U/6.3V_8
[2,6,7,8,9,10,12,14,15,16,17,19,20,22,23,24,29,32,34] +3V 4XDQWD&RPSXWHU,QF
C72 10U/6.3V_8 [2,8,12] DRAMRST_CNTRL_PCH [2,4,12,27] +1.5VSUS Size Document Number Rev
[12,27,34] +0.75V_DDR_VTT Custom
1% ^LJƐƚĞŵDĞŵŽƌLJϮͬϮ;ϵ͘Ϯ,Ϳ 1A

Date: Tuesday, February 07, 2012 Sheet 13of 34


5 4 3 2 1
5 4 3 2 1

ϭϰ
+3V R8 2.2K_4
R9 2.2K_4
D D
+3V +LCDVCC +3VLCD_CON
U8 [6] PCH_EDIDCLK PCH_EDIDCLK
[6] PCH_EDIDDATA PCH_EDIDDATA
5 1 L23 C343 0.1U/10V_4
IN OUT TI160808U600 C346 *10U/6.3V_8
C344 1U/6.3V_4 4 2 C339 *0.01U/16V_4
IN GND

[6] PCH_DISP_ON PCH_DISP_ON 3 ON/OFF


R12 100K/F_4 CN10
G5243AT11U

G_0
+3VLCD_CON 1
C6 1000P/50V_4 2
3
+3V 4
PCH_EDIDCLK
PCH_EDIDDATA 5
6
PCH_LA_DATAN0 7
[6] PCH_LA_DATAN0 8
[6] PCH_LA_DATAP0 PCH_LA_DATAP0
9
PCH_LA_DATAN1 10 G_1
[6] PCH_LA_DATAN1 11
[6] PCH_LA_DATAP1 PCH_LA_DATAP1
12
PCH_LA_DATAN2 13
[6] PCH_LA_DATAN2 14
[6] PCH_LA_DATAP2 PCH_LA_DATAP2
15
h^ĂŵĞƌĂŽŶŶĞĐƚŽƌ [6] PCH_LA_CLK# PCH_LA_CLK#
PCH_LA_CLK
16
17
C [6] PCH_LA_CLK 18 G_2 C

PCH_LB_DATAN0 19
D/ [6] PCH_LB_DATAN0
[6] PCH_LB_DATAP0 PCH_LB_DATAP0 20
L2 FCM1608KF-301T02 DIGITAL_D1_R 21
[16] DIGITAL_D1 22
[16] DIGITAL_CLK L1 FCM1608KF-301T02 DIGITAL_CLK_R [6] PCH_LB_DATAN1 PCH_LB_DATAN1
PCH_LB_DATAP1 23
[6] PCH_LB_DATAP1 24 G_3
PCH_LB_DATAN2 25
[6] PCH_LB_DATAN2 26
[6] PCH_LB_DATAP2 PCH_LB_DATAP2
C4 C3 27
DZ 100P/50V_4 100P/50V_4 [6] PCH_LB_CLK# PCH_LB_CLK# 28
USBP2- PCH_LB_CLK 29
[8] USBP2- 2 1 [6] PCH_LB_CLK 30
3 4 USBP2+ DIGITAL_D1_R
[8] USBP2+ 31 G_4
DIGITAL_CLK_R
L22 32
+5V 33
*W CM2012-90 EMI request USBP2-
USBP2+ 34
35
R2010 0_4 PCH_DPST_PW M_R 36
[6] PCH_DPST_PW M 37
C2006 *22P/50V_4 BLON_CON
38
+VIN_BLIGHT 39
C340 *10P/50V_4 USBP2- +5V C7 0.01U/16V_4 Del C9, C15

G_5
C341 *10P/50V_4 USBP2+ C11 *4.7U/6.3V_6 40
C1 33P/50V_4 DIGITAL_D1 B Test
C2 33P/50V_4 DIGITAL_CLK
GS12401-1011-9F

B B

R7 100K/F_4

C12 22P/50V_4

[24] LID_CONTROL LID_CONTROL PN_BLON D1 RB500V-40 BLON_CON +VIN L3 TI160808U600 +VIN_BLIGHT +VIN_BLIGHT
L2001 TI160808U600
R4 *47K/F_4 +3VS5 C Test
C345 *4.7U/25V_8
R3 47K/F_4 +3VPCU C17 B Test
0.1U/50V_6 C342 0.1U/50V_6
[6] PCH_LVDS_BLON PCH_LVDS_BLON R2 1K/F_4 D2 *RB500V-40 C338 0.01U/25V_4
LID_EC# [23,24]

R1 100K/F_4 C319
3

100P/50V_4
[8] LCD_BK 2
Q1 Close to EC
A
*PDTC144EU A
EMI request
1

352-(&7-:
[2,6,7,8,9,10,12,13,15,16,17,19,20,22,23,24,29,32,34] +3V
4XDQWD&RPSXWHU,QF
[7,10,15,16,22,23,34] +5V
[19,25,26,27,29,33,34] +VIN Size Document Number Rev
Custom
1%
1A
[7,19,22,23,24,25,26] +3VPCU >ŽŶŶĞĐƚŽƌ;>s^Ϳ
Date: Tuesday, February 07, 2012 Sheet 14 of 34
5 4 3 2 1
5 4 3 2 1

CRT PORT
ϭϱ

16
6
[6] PCH_CRT_R L6 BK1608LL680 CRT_R_CON 1 11
7
D [6] PCH_CRT_G L7 BK1608LL680 CRT_G_CON 2 12 CRT_DDCDATA_CON C70 *470P/50V_4 D
8
[6] PCH_CRT_B L8 BK1608LL680 CRT_B_CON 3 13 CRT_HSYNC_CON C38 *47P/50V_6
+5VCRT 9
4 14 CRT_VSYNC_CON C36 *47P/50V_6
10
R53 R54 R55 C118 C119 C120 C91 C90 C89 5 15 CRT_DDCCLK_CON C35 *470P/50V_4
150/F_4 150/F_4 150/F_4 6.8P/50V_4 6.8P/50V_4 6.8P/50V_4 6.8P/50V_4 6.8P/50V_4 6.8P/50V_4

CRT CONN

17
CN12

40 MIL
F1 FUSE1A6V_POLY D3 U2
2 1 +5VCRT 2 1 +5V_CRT2 +5V_CRT2 1 16 CRT_VSYNC1 R44 22_4 CRT_VSYNC_CON
+5V VCC_SYNC SYNC_OUT2
14 CRT_HSYNC1 R45 22_4 CRT_HSYNC_CON
RB500V-40 SYNC_OUT1
+5V 7 VCC_DDC
C29 0.1U/10V_4 C77 0.22U/25V_6 CRT_BYP 8 BYP PCH_VSYNC +5V_CRT2
SYNC_IN2 15 PCH_VSYNC [6]
SSM14 spec is 40V 1A 2 13 PCH_HSYNC +3V
C +3V VCC_VIDEO SYNC_IN1 PCH_HSYNC [6] C

R47 R46
CRT_R_CON 3 10 PCH_DDCCLK PCH_DDCCLK [6] 2.2K_4 2.2K_4 PCH_DDCCLK R48 2.7K_4
CRT_G_CON VIDEO_1 DDC_IN1 PCH_DDCDATA PCH_DDCDATA R49 2.7K_4
4 VIDEO_2 DDC_IN2 11 PCH_DDCDATA [6]
CRT_B_CON 5 VIDEO_3 CRT_DDCCLK_CON
DDC_OUT1 9
6 12 CRT_DDCDATA_CON
GND DDC_OUT2
IP4772

+5V +3V
B Test HDMI PORT
,D/^DƵƐ/ƐŽůĂƚŝŽŶ +3V CN15
SHELL3 22
R155 R2009 DGPU_CL_HDMIP R141 560/F_4 C_TX2_HDMI+ 20
0_4 *0_4 R137 560/F_4 C_TX2_HDMI- IN_D2 C218 0.1U/10V_4 C_TX2_HDMI+ SHELL1
[6] IN_D2 1 D2+
2

+3V R119 2.2K_4 2


Q2001 2N7002 Q17 R136 560/F_4 C_TX1_HDMI+ IN_D2# C217 0.1U/10V_4 C_TX2_HDMI- D2 Shield
[6] IN_D2# 3 D2-
B [6] SDVO_CLK SDVO_CLK 1 3 HDMI_SCLK R133 560/F_4 C_TX1_HDMI- [6] IN_D1 IN_D1 C216 0.1U/10V_4 C_TX1_HDMI+ 4 B
D1+
2 5 D1 Shield
R131 560/F_4 C_TX0_HDMI+ [6] IN_D1# IN_D1# C213 0.1U/10V_4 C_TX1_HDMI- 6
R127 560/F_4 C_TX0_HDMI- IN_D0 C212 0.1U/10V_4 C_TX0_HDMI+ D1-
[6] IN_D0 7 D0+
2N7002 8 D0 Shield
2

+3V R118 2.2K_4 R329 560/F_4 C_IN_CLK [6] IN_D0# IN_D0# C210 0.1U/10V_4 C_TX0_HDMI- 9
1

Q2002 2N7002 R328 560/F_4 C_IN_CLK# IN_CLK C209 0.1U/10V_4 C_IN_CLK C_TXC_HDMI+ D0-
[6] IN_CLK 10 CK+
[6] SDVO_DATA SDVO_DATA 1 3 HDMI_SDATA 1 2 11
R154 100K/F_4 IN_CLK# C207 0.1U/10V_4 C_IN_CLK# C_TXC_HDMI- CK Shield
C Test [6] IN_CLK# 12 CK-
13 CE Remote
Del Q16 9/1 change to 680ohm +5VCRT 2 1 5V_HSMBCK R326 2.2K_4 14
C233 0.1U/10V_4 +3V D9 RB751V-40 HDMI_SCLK NC
8/31UMA/OPTIMUS-680 ohm, DISCRETE-499 ohm 15 DDC CLK
B Test 2 1 5V_HSMBDT R324 2.2K_4 HDMI_SDATA 16
D8 RB751V-40 DDC DATA
17 GND
C204 *10P/50V_4 +5VCRT 18
C205 *10P/50V_4 +5V
B Test 19 HP DET
Q24 R319 21
SHELL2

3
MMBT3904-7-F 150K/F_4 23
SHELL4
2 HDMI_DET_P 2 1 HDMI_HPD HDMI_DET_C
R113 10K/F_4
HDMI CONN_4 pin GND

1
[6] HDMI_HPD_CON HDMI_HPD_CON C200
D4
R320 220P/50V_4
D/^ŽůƵƚŝŽŶ R318
*348K/F_4 1 +3V
10K/F_4 3

2
C_TX2_HDMI+ R139 150/F_4 C_TX2_HDMI-
C_TX1_HDMI+ R135 150/F_4 C_TX1_HDMI- R114 2
C_TX0_HDMI+ R129 150/F_4 C_TX0_HDMI- 110K/F_4 BAV99W
A
C_IN_CLK R124 150/F_4 C_IN_CLK# A

C Test
R125 0_4

RP1
C_IN_CLK
C_IN_CLK#
1
4
2
3
C_TXC_HDMI+
C_TXC_HDMI-
+5VCRT C201 *0.01U/16V_4
352-(&7-:
*W CM2012-90
4XDQWD&RPSXWHU,QF
R121 0_4 for EMI request
[2,6,7,8,9,10,12,13,14,16,17,19,20,22,23,24,29,32,34] +3V Size Document Number Rev
Custom
1%
[7,10,14,16,22,23,34] +5V Zdͬ,D/ŽŶŶĞĐƚŽƌ 1A

Date: Tuesday, February 07, 2012 Sheet 15 of 34


5 4 3 2 1
A B C D E

ϭϲ
+5V L13 5V_AMP_PWR39 5V_AMP_PWR39 +5V_AVDD
HCB1608KF-181T15/1.5A_6 +5V_AVDD L16 HCB1608KF-181T15/1.5A_6 +5V
5V_AMP_PWR46 C226 0.1U/10V_4
C225 0.1U/10V_4 C254 1U/10V_4 C294 10U/6.3V_8
C220 4.7U/6.3V_6 +3V C221 1 2 4.7U/6.3V_6 AGND
C267 4.7U/6.3V_6 C284 1U/10V_4
4 C245 *0.1U/10V_4 4

AGND C260 *0.1U/10V_4


L12 5V_AMP_PWR46 C230 1U/10V_4 +5V_AVDD
+5V
HCB1608KF-181T15/1.5A_6 +3V
C224 0.1U/10V_4
C219 4.7U/6.3V_6

46

39

38

25
9
1
U4

/ŶƚĞƌŶĂů^ƉĞĂŬĞƌ

DVDD-IO
DVDD1

PVDD2

PVDD1

AVDD2

AVDD1
36 ALC269_CBP
C236 *10P/50V_4 CBP
35 ALC269_CBN CN1
ACZ_SDOUT_AUDIO CBN C228 2.2U/10V_6 R_SPK+ L18 TI160808U600 R_SPK+_R
[7] ACZ_SDOUT_AUDIO 5 SDATA-OUT 1
33 EARP_R1 R153 75/F_4 EARP_R R_SPK- L19 TI160808U600 R_SPK-_R
BIT_CLK_AUDIO HP-OUT-R EARP_L1 R157 75/F_4 EARP_L L_SPK- L20 TI160808U600 L_SPK-_R 2
[7] BIT_CLK_AUDIO 6 BIT-CLK HP-OUT-L 32 3
C238 *10P/50V_4 L_SPK+ L21 TI160808U600 L_SPK+_R
4

C332

C331

C330

C329
[7] ACZ_SDIN0 R173 22_4 HD_SDIN0 8 31 VREFOUT_AL R360 4.7K/F_4 EXT_MIC_L B Test B Test B Test INT SPEAKER CONN
SDATA-IN MIC1_VREF_L

Digital
[7] ACZ_SYNC_AUDIO ACZ_SYNC_AUDIO 10 30 VREFOUT_AR R361 4.7K/F_4 EXT_MIC_R ϲϬŽŚŵͬϯ
C252 *10P/50V_4 SYNC MIC1-VREFO-R

Analog
ƌĞƋƵĞƐƚ;ϬϲϬϯͿ
ACZ_RST#_AUDIO 11 29
[7] ACZ_RST#_AUDIO RESET# MIC2-VREFO

680P/50V_4

680P/50V_4

680P/50V_4

680P/50V_4
27 ALC269_VREF C255 2.2U/6.3V_6
VREF
L_SPK+ 40 24 C250 0.1U/10V_4 AGND
L_SPK- SPK-L+ LINE1-R
41 SPK-L- LINE1-L 23

R_SPK- 44
R_SPK+ SPK-R- EXT_MIC_R1 C262 2.2U/6.3V_6 EXT_MIC_R2 R192 1K/F_4EXT_MIC_R
45 22
3 SPK-R+
ALC269Q-VC2-GR MIC1-R
MIC1-L 21 EXT_MIC_L1
C261 2.2U/6.3V_6
EXT_MIC_L2
R191 1K/F_4
EXT_MIC_L 3

TP16 ADC_EAPD# 47 SPDIFO2/EAPD


48 SPDIFO MONO-OUT 20
Sense B 18

C229 10P/50V_4 17
MIC2-R
[14] DIGITAL_D1 2 GPIO0/DMIC-DATA MIC2-L 16
B Test
[14] DIGITAL_CLK DMIC_CLK_R 3
R152 100/F_4 GPIO1/DMIC-CLK R392 47K/F_4
LINE2-R 15 Q2003 +5V
LINE2-L 14
C227 10P/50V_4 5 SENSE_PHONE
HD_APD#_P4 4
AMP_BEEP PD# SENSE_A R377 39.2K/F_4 SENSE_A
12 13 4 3

LDO_CAP
PCBEEP Sense A R391 47K/F_4

CPVEE
DVSS2

+5V
PVSS1
PVSS2

AVSS2
AVSS1

JDREF
PGND

2 SENSE_MIC

1 6 R376 20K/F_4 SENSE_A


7
49
42
43

37
26

ALC269_CPVEE 34
19
28
ALC269Q-VC2-GR

AGND 2N7002DW
Del Q28, Q29
R350 C246 *0.047U/25V_4 CN6
[7] SPKR HDA_BEEP1 HDA_BEEP2 C447 0.1U/10V_4 AMP_BEEP C241 10U/6.3V_8 AGND
AGND R187 20K/F_4 EXT_MIC_L 1
100K/F_4 C446 100P/50V_4 C231 2.2U/10V_6 EXT_MIC_R 2
AGND 3
EARP_L
R355 10K/F_4 EARP_R 4
B Test 5
2 C249 220P/50V_4 SENSE_MIC 2
SENSE_PHONE 6
7
[21,24] USB_ENABLE# 8
R2016 0_4 USBP9-_R 9
[8] USBP9- 10
[8] USBP9+ R2017 0_4 USBP9+_R
+5V 11
R2018 0_4 USBP11-_R 12
[8] USBP11- 13
R2019 0_4 USBP11+_R
[8] USBP11+ 14
15
B Test 16
R144 17
+5VS5 18
1K/F_4
R145 DUAL USB CONN
4.7K/F_4 HD_APD#_P4
3

Q18

HP_VOLMUTE 2 R147
*4.7K/F_4
2N7002
R185 0_4
R140 0_4
1

R195 0_4
R196 0_4
R346 0_4
Q26
5 VOLMUTE#
1
VOLMUTE# [24] 1
AGND
4 3

2 ACZ_RST#_AUDIO

1 6 352-(&7-:
4XDQWD&RPSXWHU,QF
2N7002DW
[2,6,7,8,9,10,12,13,14,15,17,19,20,22,23,24,29,32,34] +3V
[7,10,14,15,22,23,34] +5V Size Document Number Rev
Custom
1%
[10,19,21,26,27,28,29,30,31,32,33,34] +5VS5 ƵĚŝŽŽĚĞĐ;ZĞĂůƚĞŬͺ>ϮϲϵͿ 1A

Date: Tuesday, February 07, 2012 Sheet 16 of 34


A B C D E
5 4 3 2 1

Atheros Lan
C203
C202
10U/6.3V_8
10U/6.3V_8
+3VLANVCC PLACE NEAR LAN IC PIN6
AVDDL
AVDDL

AVDDL
C197
C198

C190
1U/6.3V_4
0.1U/10V_4

0.1U/10V_4
ϭϳ
C196 1000P/50V_4 AVDDL C174 0.1U/10V_4 L9 L24
C195 1U/6.3V_4 AVDDL C175 0.1U/10V_4 AVDDVCO AVDDL DVDDL
C199 0.1U/10V_4 AVDDVCO C186 0.1U/10V_4 HCB1608KF-601T10 *HCB1608KF-601T10
C176 *1U/6.3V_4
C171 *4.7U/6.3V_6
D D

13
19
31
34
1

6
U12

VDD33

AVDDL
AVDDL
AVDDL
AVDDL
AVDDL_REG
+3V
[8] CLK_PCIE_LANP 33 11 MDI0+_A
REFCLKP TRXP0 MDI0-_A
[8] CLK_PCIE_LANN 32 REFCLKN TRXN0 12
[8] PCIE_RXP2_LAN C409 0.1U/10V_4 PCIE_RXP2_LAN_L 30 14 MDI1+_A
C408 0.1U/10V_4 PCIE_RXN2_LAN_L TX_P TRXP1 MDI1-_A Q25
[8] PCIE_RXN2_LAN 29 TX_N TRXN1 15

2
[8] PCIE_TXP2_LAN 35 17 MDI2+_A 2N7002
RX_P TRXP2 MDI2-_A
[8] PCIE_TXN2_LAN 36 RX_N TRXN2 18

$WKHURV
+3VLANVCC 20 MDI3+_A 1 3 CKREQ_G#
TRXP3 [8] PCIE_CLKREQ_LAN#
R321 *4.7K/F_4 21 MDI3-_A
TRXN3
[2,8,18,19,20,22,24] PLTRST# 3 2 R71 4.7K/F_4
R116 0_4 /PCIE_WAKE#_R 3 PERSTn LAN_GLINK100# R70 *4.7K/F_4
[6,22] PCIE_WAKE# 39 +3VLANVCC
+3VLANVCC R117 *4.7K/F_4 7 WAKEn LED1
38 LAN_TX# R314 4.7K/F_4 R322 *0_4
5 LED0
23 R315 *4.7K/F_4
6 LED2 TP61
R115 4.7K/F_4 7
 CKREQ_G#
+3VLANVCC 4 L25
CLKREQn LX DVDDL C414 *10U/6.3V_8
40
R317 2.37K/F_4 RBIAS 10 RBIAS AR8161-B LX *4.7uh_C_1A C417
C418
*1000P/50V_4
*0.1U/10V_4
LAN_GLINK100# LAN_GLED#

25 LAN_TX# LAN_YLED
SMCLK AVDD_CEN R323 30K/F_4
26 SMDATA ISOLATn 5 +3V

28 C193 C189
NC

AVDDH_REG
DVDDL_REG
XTLO_LAN_C 7 27
XTLO TESTMODE 1000P/50V_4 1000P/50V_4
GND1 41

AVDD33
B Test

AVDDH
C C
R325 5.6P/16V_4 XTLI_LAN_C 8

GND
GND
GND
GND
GND
GND
GND
GND
GND
[19] LAN_XTAL25_IN

PPS
XTLI
R327 *0_4 C Test
37
24

16
22
9

42
43
44
45
46
47
48
49
50
AR8161-BL3A-R

LAN_TX# R112 *5.1K/F_4


B Test
C413 1U/6.3V_4 TP62 AVDDH C194 1U/6.3V_4
C192 0.1U/10V_4
C412 0.1U/10V_4 DVDDL AVDDH C166 0.1U/10V_4

C415 XTLO_LAN_C
*33P/50V_4
2

Y3 +3VLANVCC
*25MHZ
1

C416 XTLI_LAN_C C187 C188


*33P/50V_4 1U/6.3V_4 0.1U/10V_4
[2,6,7,8,9,10,12,13,14,15,16,19,20,22,23,24,29,32,34] +3V
[6,7,8,9,10,14,19,22,24,26,29,30,34] +3VS5
[18,19,34] +3VLANVCC

B B

TRANSFORMER RJ45 Conn B Test


U11 Zď
MDI0+ 2 23 LAN_MX0+ ZĂ B Test C405 *1000P/50V_4
MDI0- TD1+ MX1+ LAN_MX0-
3 TD1- MX1- 22
MDI1+ 5 20 LAN_MX1+ LAN_GLED# R73 330/F_4 LED_LINK+ R297 *330/F_4 +3VLANVCC
MDI1- TD2+ MX2+ LAN_MX1-
6 TD2- MX2- 19
MDI2+ 8 17 LAN_MX2+ C165 *0.01U/100V_06 LAN_YLED R316 0_4 LED_ACT R110 *0_4 LAN_ACTLED# LAN_ACTLED# [18]
MDI2- TD3+ MX3+ LAN_MX2- C161 *0.01U/100V_06
9 TD3- MX3- 16
MDI3+ 11 14 LAN_MX3+ C151 *0.01U/100V_06 R111 0_4 LED_LINK R69 *0_4 LAN_LINKLED# LAN_LINKLED# [18]
MDI3- TD4+ MX4+ LAN_MX3- C150 *0.01U/100V_06
12 TD4- MX4- 13

AVDD_CEN_T 1 24 TERM1 R79 75/F_4


C162 *1000P/50V_4 AVDD_CEN_T TCT1 MCT1 TERM2 R94 75/F_4
4 TCT2 MCT2 21
C164 0.1U/10V_4 AVDD_CEN_T 7 18 TERM3 R100 75/F_4 C410
C159 *1000P/50V_4 AVDD_CEN_T TCT3 MCT3 TERM4 R107 75/F_4 C411 1000P/50V_4
10 TCT4 MCT4 15
C149 0.1U/10V_4 CN14 EMI Ver B Request
C154 *1000P/50V_4 GST5009B 10P/3KV_1808 R313 330/F_4
C158 0.1U/10V_4 B Test
+3VLANVCC 12
11
LED_GRE_P FOR iAMT option
C148 *1000P/50V_4 LED_ACT LED_GRE_N C191 1000P/50V_4
B Test EŽŶͲŝDd ŝDd
C153 0.1U/10V_4
LAN_MX3+ 8 ZĂ ^ƚƵĨĨ E
LAN_MX3- RX1- C143 1000P/50V_4
7 RX1+ GND 16
LAN_MX2-
LAN_MX1-
6 RX0- Zď E ^ƚƵĨĨ
5 TX1- GND 15
A LAN_MX1+ 4 A
LAN_MX2+ TX1+ LANGND
3 RX0+
LAN_MX0+ 2 14
LAN_MX0- TX0- GND
Zď ZĂ 1 TX0+
MDI0+_V R84 *0_4 MDI0+ R302 0_4 MDI0+_A 13
352-(&7-:
[18] MDI0+_V GND
[18] MDI0-_V MDI0-_V R87 *0_4 MDI0- R303 0_4 MDI0-_A
MDI1+_V R93 *0_4 MDI1+ R306 0_4 MDI1+_A LED_LINK+
4XDQWD&RPSXWHU,QF
[18] MDI1+_V 10 LED_YEL_P
[18] MDI1-_V MDI1-_V R97 *0_4 MDI1- R307 0_4 MDI1-_A LED_LINK 9
MDI2+_V R99 *0_4 MDI2+ R309 0_4 MDI2+_A LED_YEL_N LANGND
[18] MDI2+_V
[18] MDI2-_V MDI2-_V R101 *0_4 MDI2- R310 0_4 MDI2-_A B Test
[18] MDI3+_V MDI3+_V R104 *0_4 MDI3+ R311 0_4 MDI3+_A Size Document Number Rev

1%
MDI3-_V R106 *0_4 MDI3- R312 0_4 MDI3-_A RJ45_CONN Custom 1A
[18] MDI3-_V >EŽŶƚƌŽůůĞƌ;ƚŚĞƌŽƐͺZϴϭϲϭͲͿ
Date: Tuesday, February 07, 2012 Sheet 17 of 34
5 4 3 2 1
1 2 3 4 5 6 7 8

Intel LAN Lewisville 82579LM


ϭϴ
A A
U3

[8] PCIE_CLKREQ_VPRO# PCIE_CLKREQ_VPRO# 48 13 MDI0+_V MDI0+_V [17]


CLK_REQ_N MDI_PLUS0 MDI0-_V
[2,8,17,19,20,22,24] PLTRST# 36 PE_RST_N MDI_MINUS0 14 MDI0-_V [17]
44 17 MDI1+_V MDI1+_V [17]
[8] CLK_PCIE_LAN PE_CLKP MDI_PLUS1 MDI1-_V
45 18 MDI1-_V [17]

PCIE
[8] CLK_PCIE_LAN# PE_CLKN MDI_MINUS1

MDI
C222 *0.1U/10V_4 PCIE_RXP4_LAN_C 38 20 MDI2+_V MDI2+_V [17]
[8] PCIE_RXP4 PETp MDI_PLUS2
C223 *0.1U/10V_4 PCIE_RXN4_LAN_C 39 21 MDI2-_V MDI2-_V [17]
[8] PCIE_RXN4 PETn MDI_MINUS2
41 23 MDI3+_V MDI3+_V [17]
[8] PCIE_TXP4 PERp MDI_PLUS3 MDI3-_V
[8] PCIE_TXN4 42 PERn MDI_MINUS3 24 MDI3-_V [17]

28 6 +3VLANVCC
[8] SMB_ME0_CLK SMB_CLK

SMBUS
RSVD_NC
^Dh^ZWWƌŽƚĐŽů͗Ϭdžϴ [8] SMB_ME0_DAT 31 SMB_DATA R142 *4.7K/F_4
RSVD_VCC3P3_1 1
+3VLANVCC R138 *10K/F_4 2 R143 *4.7K/F_4
RSVD_VCC3P3_2
VDD3P3_IN 5
[9] LAN_DIS# 3 LAN_DISABLE_N
VDD3P3_OUT 4
B
R146 *10K/F_4 C215 C214 C2009, C2010 close to PHY B
15 *22U/6.3V_8 *0.1U/10V_4
LAN_LINKLED# R126 *0_4 LANLINK_STATUS# 26 VDD3P3_15 C206
[17] LAN_LINKLED# LED0 VDD3P3_19 19
[17] LAN_ACTLED# LAN_ACTLED# R128 *0_4 27 29 *1U/10V_4
LED1 VDD3P3_29

LED
R122 *0_4 25 LED2
Idc=330mA
47 +1.05V_LAN
VDD1P0_47 Shared with Used internal
VDD1P0_46 46
+3VLANVCC LAN_JTAG_TDI 32 37 +1.05V_PCH SVR SVR
TP14 JTAG_TDI VDD1P0_37
LAN_JTAG_TDO 34 C427 C421
TP15 JTAG_TDO

JTAG
R132 *10K/F_4 LAN_JTAG_TMS 33 43 *0.1U/10V_4 *0.1U/10V_4 No stuff L2000 Stuff L2000
R134 *10K/F_4 LAN_JTAG_TCK JTAG_TMS VDD1P0_43
35 JTAG_TCK
11 Stuff R2022 No stuff R2022
VDD1P0_11
Keep trace short
LAN_XTAL2 9 40
R123 *6.8P/50V_4 LAN_XTAL1 10
XTAL_OUT VDD1P0_40
22 and width
[19] VPRO_XTAL25_IN XTAL_IN VDD1P0_22
VDD1P0_16 16
B Test VDD1P0_8 8
30 +1.05V_LAN
TEST_EN L26
12 7 CTRL_1P0
RBIAS CTRL_1P0 *4.7UH,+-20%,650MA_1210
LAN_XTAL2 49 /ŶƚĞůƐƉĞĐ͗ZфϭϬϬŵ
LAN_XTAL1 R130 R120 VSS_EPAD C426 C423 C420 C425 C419 C428
Y1 *1K/F_4 *3.01K/F_4 *WG82579LM-SLHA6 ŽŚŵ͘͘͘ *0.1U/10V_4 *22U/6.3V_8 *0.1U/10V_4 *0.1U/10V_4 *0.1U/10V_4 *0.1U/10V_4
C C
1 2
1

*25MHZ
C211 C208
*33P/50V_4 *33P/50V_4
2

,сϭ͘Ϯŵŵ;DĂdžͿ

Q15

&ŽƌZ:ϰϱůŝŶŬĚĞƚĞĐƚ [8] LANLINK_STATUS 3 1 LANLINK_STATUS#

*BSS138

2
LAN_DIS#

D D

352-(&7-:
4XDQWD&RPSXWHU,QF
[2,6,7,8,9,10,12,13,14,15,16,17,19,20,22,23,24,29,32,34] +3V
[17,19,34] +3VLANVCC Size Document Number Rev

1%
B 1A
Intel Lewisville 82579LM
Date: Tuesday, February 07, 2012 Sheet 18 of 34
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

TPM (1.2)
ϭϵ
+3VS5 +3V
+3V_VDD
U19
[7,22,24] LAD0 LAD0 26 10
LAD1 LAD0 VDD
[7,22,24] LAD1 23 LAD1 VDD 19
[7,22,24] LAD2 LAD2 20 24
LAD3 LAD2 VDD C513 C493 C499 C498
17 LAD3 VSB 5
[7,22,24] LAD3 CLK_PCI_TPM
[8] CLK_PCI_TPM 21 LCLK *0.1U/10V_4 *0.1U/10V_4 *0.1U/10V_4 *0.1U/10V_4
GND 4
LFRAME# 22 11
A [7,22,24] LFRAME# LFRAME# GND A
PLTRST# 16 18
[2,8,17,18,20,22,24] PLTRST# LRESET# GND
LPCPD#_TPM 28 25
SERIRQ LPCPD# GND
[7,24] SERIRQ 27 SERIRQ
GPIO 6
+3V R461 *4.7K/F_4 9 2
TEST/BADD GPIO2
CLKRUN# 15 7 TPM_PP
[6,24] CLKRUN# CLKRUN# PP
8 +VIN +VIN +VIN
TESTI
1 NC
3 13 TPM_XIN
NC XTALI/32K IN
$GGUHVV 12 NC XTALO 14 TPM_XOUT

*SLB9635TT1.2-FW3.17 C167 C34 C22 )25(0,


%$'' 0.1U/25V_4 0.1U/25V_4 0.1U/25V_4

+,*+ (+) GHIDXOW


,сϮ͘ϱϰŵŵ
CLK_PCI_TPM TPM_XOUT R441 *10M_4 TPM_XIN

+3V_VDD R458 *0_4 +5VS5 +5VS5 +5VS5 +5VS5 +5VS5


+3V
Y6
B
R413 1 4 B
*33_4 2 3 LPCPD#_TPM R412 *4.7K/F_4
+3V
*32.768KHZ C326 C325 C509 C402 C347
R460 *4.7K/F_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4
+3V
C490 C512 C510
*10P/50V_4 *15P/50V_4 *15P/50V_4
TPM_PP R459 *0_4/S
)25(0, C Test C Test

Green CLK WhƌĂĐŬĞƚ D/E/W/WĂĚ W,Eh^ĐƌĞǁ,ŽůĚ


FOR LAN CLK option FOR TPM option H14 H13 H7 H6
ƚŚĞƌŽƐ ǀWZK dWD EŽŶͲdWD BKT1 P5 H-C236D122PT H-C236D122PT *H-C335D118P2 *H-C394D118P2
*INTEL-CPU-BKT2 *SPAD
ZĂ E ^ƚƵĨĨ Zϰϭϵ ^ƚƵĨĨ E 1 4

Zď ^ƚƵĨĨ E hϱ >ϯEϮϰϲϬϬϬ >ϯEϮϰϰϬϬϬ 2 3

1
C C

1
+3VPCU B Test
R197
ZĂ *33_4 U5
[18] VPRO_XTAL25_IN
R201 33_4 25M_A 6 15 C264 0.1U/10V_4 B Test
[17] LAN_XTAL25_IN
[8] PCH_XTAL25_IN Zď
CLKGEN_RTC_X1
5
9
25MHz_A
25MHz_B
+V3.3A
VDD 2
10
R3001
R199
0_4
330/F_4
+3VLANVCC ^LJƐƚĞŵ^ĐƌĞǁ,ŽůĚ P3 P4
[7] CLKGEN_RTC_X1 32KHz_A VBAT +3V_RTC_0 [7]
12 *SPAD *SPAD
32KHz_B C277 22U/6.3VS_8 H4 H8 H5 H11 H10 H12
+3VLANVCC
+1.05V 14 +3V_RTC *H-TC276BC315D118P2 *H-C335D335N *O-JW2-7 *H-C354D118P2 *H-C354D118P2 *H-C354D118P2
C288 0.1U/10V_4 VDD_RTC_OUT
8

1
C271 0.1U/10V_4 VDDIO_25M_A
3 VDDIO_25M_B GND 7
+3VS5 R193 0_4 11 13
VDDIO_32K_B GND C266
GND 4
GEN_XTAL25_IN 16 17 2.2U/6.3V_6
GEN_XTAL25_OUT XTAL_IN GND P1 P2
1

1
XTAL_OUT *SPAD-L *SPAD-R
SLG3NB244VTR

1
C256 H1 H2 H9 H3
D GEN_XTAL25_OUT *O-JW2-8 *O-JW2-2 *O-JW2-3 *O-JW2-4 D
2
1

15P/50V_4 B Test
Y2
25MHZ +-10PPM R2011 352-(&7-:
C257
*10M_4 25M_A C278 *10P/50V_4 4XDQWD&RPSXWHU,QF
3
4

1
GEN_XTAL25_IN B Test PCH_XTAL25_IN C273 *10P/50V_4
+3VPCU [7,14,22,23,24,25,26] Size Document Number Rev

1%
15P/50V_4 B 1A
+3V_RTC [6,7,10] TPM&Green CLK
B Test
Date: Tuesday, February 07, 2012 Sheet 19 of 34
1 2 3 4 5 6 7 8
A B C D E

RTS5229

Share Pin
ϮϬ
+3VCARD +3V
DV33_18 C481 1U/6.3V_4

C491 10U/6.3VS_6 SP1 SD_D1 R390 *0_4


SP2 SD_D0 MS_D1
4 4
C494 0.1U/10V_4 SP3 SD_CLK MS_D0
SP4 SD_CMD MS_D2

25

10

15
U17

9
SP5 SD_D3 MS_D3 MS_BS
SP6 SD_D2 MS_CLK

CARD_3V3

DV33_18
GND

3V3_IN
[8] PCIE_TXP3_CR 1 SP7 SD_WP R389 0_4
HSIP
[8] PCIE_TXN3_CR 2 HSIN
EMI solution
20 SP7
SP7 SP6_R R399 0_4 SP6
[8] CLK_PCIE_CRP 3 REFCLKP SP6 18
[8] CLK_PCIE_CRN 4 17 SP5_R R400 0_4 SP5 C473 *10P/50V_4
REFCLKN SP5 SP4_R R401 0_4 SP4
16
[8] PCIE_RXP3_CR C503
C504
.1U/10V_4
.1U/10V_4
PCIE_RXP3_CR_R 5 HSOP
RTS5229 SP4
SP3 14 SP3_R R402
R403
0_4 SP3
0_4 SP2
C475 *10P/50V_4
[8] PCIE_RXN3_CR PCIE_RXN3_CR_R 6 13 SP2_R
HSON SP2 DV12_S C487 4.7U/6.3V_6
DV12_S 11

[2,8,17,18,19,22,24] PLTRST# 23 C488 .1U/10V_4

MS_INS#
PERST#

SD_CD#
[8] PCIE_CLKREQ_CR# 24 CLKREQ#

RREF

GPIO
AV12

SP1
7

19

21
22
12
RTS5229-GR

C501 4.7U/6.3V_6 SP1_R R407 0_4 SP1


MS_INS#
C500 .1U/10V_4 AV12 SD_CD#
3 3
R414 6.2K/F_4 RREF GPIO R405 10K/F_4 +3V

CR Socket

CN7 +3VCARD
1 20 MS_D1
XD-R/B MS-DATA1 MS_BS
2 XD-RE MS-BS 21
3 22 C464 4.7U/6.3V_6
2 XD-CE 4IN1-GND2 C459 .1U/10V_4 2
4 XD-CLE SD-VCC 23
5 24 SD_CLK_R R388 0_4 SD_CLK
XD-ALE SD-CLK SD_D0
6 XD-WE SD-DAT0 25
7 XD-WP XD-D2 26
8 XD-D0 XD-D3 27
9 XD-D1 XD-D4 28
SD_D2 10 29 SD_D1
SD_D3 SD-DAT2 SD-DAT1
11 SD-DAT3 XD-D5 30
C458 .1U/10V_4 SD_CMD 12 31
SD-CMD XD-D6
13 4IN1-GND1 XD-D7 32 Please help to close to connector
+3VCARD 14 MS-VCC XD-VCC 33
MS_CLK 15 34
C477 *10P/50V_4 MS_D3 MS-SCLK XD-CD-SW SD_WP SD_CMD SD_D0 SD_D1 SD_D2 SD_D3 SD_CLK
16 MS-DATA3 SD-WP-SW 35
MS_INS# 17 36 SD_CD#
MS_D2 MS-INS SD-CD-SW
18 MS-DATA2
MS_D0 19 C461 C463 C455 C476 C460 C462
MS-DATA0 *5.6P/16V_4 *5.6P/16V_4 *5.6P/16V_4 *5.6P/16V_4 *5.6P/16V_4 *5.6P/16V_4
SHIELD1-GND 37
SHIELD2-GND 38
SHIELD3-GND 41
SHIELD4-GND 42

CONN_CARDREADER_CM3S-011
EMI Solution
Note:
1 1. R5194, R5196, R5197, R5198, R5199, R5200 close to U37 pin 1

2. C5265, C5202 close to U37 pin7


3. C1021, C1022 close to U37 pin11
4. C1089, C1090 close to U37 pin9 352-(&7-:
5. C1019 close to U37 pin15 4XDQWD&RPSXWHU,QF
6. C1026, C1027 close to CN27 pin11 Size Document Number Rev
7. C1025 close to CN27 pin4
1%
Custom 1A
[2,6,7,8,9,10,12,13,14,15,16,17,19,22,23,24,29,32,34] +3V Zd^ϱϮϮϵΘZ^K<d
Date: Tuesday, February 07, 2012 Sheet 20 of 34
A B C D E
5 4 3 2 1

USB3.0 / USB2.0 COMBO X 2 USB Charger


high active
80 mils (Iout=2A)
Ios = 48000/RILIM0
default: Auto-detect
Ϯϭ
C497 0.1U/10V_4
+5VS5 C492 4.7U/6.3V_6
+5VS5 R417 *4.7K/F_4 U18 ϮϬϬŵŝůůƐ
U15 [24] Charger_ON R418 0_4 5 1 +5VS5
D
+5VSUS_USBP0 EN/DSC IN +5VSUS_USBP1 D
2 VIN1 OUT3 8 [24] USB_CHR_C1 6 CTL1 OUT 12 +5VSUS_USBP1
3 VIN2 OUT2 7 B Test [24] USB_CHR_C2 7 CTL2 GND 14

1
USB_ENABLE# 4 6 C453 C452 C451 8 9
[16,24] USB_ENABLE# EN OUT1 [24] USB_CHR_C3 CTL3 NC
1 5 + USBP1-_C 11 17 +
GND OC C449 USBP1+_C DM_IN PADGND R408 20K/F_4 C489 C470
10 DP_IN ILIM_HI 16
C474 G547E2P81U 470P/50V_4 100U 16V/6.3*5.8 2 15 R409 *80.6K/F_4 470P/50V_4 100U 16V(+-20%,6.3*5.8)
[8] USBP1-

2
1U/6.3V_4 0.1U/10V_4 DM_OUT ILIM_LO R415 *0_4
[8] USBP1+ 3 DP_OUT ILIM_SEL 4
470P/50V_4 To Host 13
/FAULT
TPS2543
Low: Enable AC Mode B Test
R416 4.7K/F_4 +5VS5
High: Disable DC Mode
B Test

dW^ϮϱϰϯͬϰϱŽŶƚƌŽůdƌƵƚŚdĂďůĞ
d>ϭ d>Ϯ d>ϯ />/Dͺ^> ŚĂƌŐŝŶŐ ƵƌƌĞŶƚ>ŝŵŝƚ dW^Ϯϱϰϯ^ddh^
USB 3.0 B Test USB_CHR_C2 R2001 *0_4 USB_CHR_C1
Ϭ Ϭ Ϭ ϭ
DŽĚĞ
ŝƐĐŚĂƌŐĞ
^ĞƚƚŝŶŐ
E
KƵƚƉƵƚ;ĂĐƚŝǀĞůŽǁͿ
ŽĨĨ
R2012 *0_4 CN16 Ϭ Ϭ ϭ ϭ WͬĂƵƚŽ /K^ͺWtΘ WůŽĂĚƉƌĞƐĞŶƚ
USB3.0 CONN
C RP3 +5VSUS_USBP0 1 1 VBUS
/>/Dͺ,/;ϭͿ C
4 3 USBP0-_C 2
[8] USBP0- 2 D-
1 2 USBP0+_C 3 Ra Ϭ ϭ Ϭ ϭ ^W />/Dͺ,/ ŽĨĨ
[8] USBP0+ 3 D+
4 +5VSUS_USBP0 R381 *0_8 +5VSUS_USBP1
CM2-2012MCIN-900T USB30_RX1-_C 4 GND
USB30_RX1+_C
5 5 SSRX- Ϭ ϭ ϭ ϭ WͬĂƵƚŽ />/Dͺ,/ WůŽĂĚƉƌĞƐĞŶƚ
C Test R2013 *0_4 6 6 SSRX+
Rb
7 USBP1- R223 *0_4 USBP1-_C ϭ ϭ Ϭ ϭ ^W />/Dͺ,/ ŽĨĨ
USB30_TX1-_C 7 GND USBP1+ R231 *0_4 USBP1+_C
8 8
USB30_TX1+_C SSTX- Rc
RP4
9 9 SSTX+ ϭ ϭ ϭ ϭ W />/Dͺ,/ WůŽĂĚƉƌĞƐĞŶƚ

13
12
11
10
[8] USB30_RX1- 4 3 ;ϭͿ/>/Dͺ,/͗ϮϬ<;ZϰϬϴͿ͕Ϯ͘ϰ
[8] USB30_RX1+ 1 2

13
12
11
10
*WCM2012-90
USB Charger option
>'^W ^Ϭͬ^ϯ ^ϰͬ^ϱ
U18 Ra Rb Rc
RP2 DŽĚĞ DŽĚĞ DŽĚĞ DŽĚĞ
C247 0.1U/10V_4 USB30_TX1-_R 1 2
[8] USB30_TX1-
C243 0.1U/10V_4 USB30_TX1+_R stuff unstuff unstuff unstuff ĐŚĂƌŐĞŵŽĚĞ W W W
[8] USB30_TX1+ 4 3 W
*WCM2012-90 ƵƐĞƌĚĞĨŝŶĞĂŶĚ
unstuff stuff stuff stuff ^W K&&
ǁĂŬĞƵƉ

B B

USB 3.0
R2014 *0_4 CN18
USB3.0 CONN
RP6 +5VSUS_USBP1 1 1 VBUS
USBP1-_C 4 3 USBP1-_CONN 2 2 D-
USBP1+_C 1 2 USBP1+_CONN 3 3 D+
4 4
CM2-2012MCIN-900T USB30_RX2-_C GND
5 5
R2015 *0_4 USB30_RX2+_C SSRX-
C Test 6 6 SSRX+
7 7
USB30_TX2-_C GND
8 8
USB30_TX2+_C SSTX-
9 9 SSTX+
*WCM2012-90
13
12
11
10

[8] USB30_RX2- 1 2
[8] USB30_RX2+ 4 3
13
12
11
10

RP7

*WCM2012-90
C310 0.1U/10V_4 USB30_TX2-_R 1 2
[8] USB30_TX2-
A C307 0.1U/10V_4 USB30_TX2+_R 4 3 A
[8] USB30_TX2+
RP5

352-(&7-:
4XDQWD&RPSXWHU,QF
+3V [2,6,7,8,9,10,12,13,14,15,16,17,19,20,22,23,24,29,32,34] Size Document Number Rev
Custom
1%
+5VS5 [10,16,19,26,27,28,29,30,31,32,33,34] h^ϯ͘ϬŽŶŶĞĐƚŽƌ 1A

Date: Tuesday, February 07, 2012 Sheet 21 of 34


5 4 3 2 1
A B C D E

DŝŶŝĂƌĚͬt>Eͬd;KƉƚŝŽŶͿ
+1.5V_CPU +1.5V_CPU

CN11
+3V_WLAN_P
ϮϮ
C337 10U/6.3VS_6 6 52
R27 *0_6 +1.5V +3.3V
+5V 28 +1.5V +3.3V 2 LGE mini-pcie power status
C336 0.1U/10V_4 48 24
R19 *0_4INT_BT_OFF# 51 +1.5V +3.3Vaux R5 4.7K/F_4 +3V_WLAN_P
C335 0.01U/16V_4 Reserved Reserved 41 WLAN Bluetooth +3V_WLAN_P
4 [8] CL_RST# 49 Reserved Reserved 39 4
[8] CL_DATA 47 44 WLAN_LED# R6 0_4 RF_LINK# Radio-ON Radio-ON Power-ON
Reserved LED_WLAN# RF_LINK# [24]
[8] CL_CLK 45 Reserved LED_WPAN# 46
[8] CLK_33M_DEBUG 19 Reserved LED_WWAN# 42 Radio-ON Radio-OFF Power-ON
EC debug pin [24] EC_DEBUG1 R18 *0_4 PLTRST# 17 38 USBP10+ [8]
Reserved USB_D+
[8] PCIE_TXP1 33 PETp0 USB_D- 36 USBP10- [8] Radio-OFF Radio-ON Power-ON
[8] PCIE_TXN1 31 PETn0 SMB_DATA 32
[8] PCIE_RXP1 25 30 R277 10K/F_4 +3V_WLAN_P Radio-OFF Radio-OFF Power-OFF
PERp0 SMB_CLK WLANE_PLTRST#
[8] PCIE_RXN1 23 PERn0 PERST# 22
13 20 D7 2 1 RB500V-40 RF_OFF# [9]
[8] CLK_PCIE_WLANP REFCLK+ W_DISABLE#
11 16 LAD0 LAD0 [7,19,24]
[8] CLK_PCIE_WLANN REFCLK- Reserved
[8] PCIE_CLKREQ_WLAN# R20 0_4 REQ_WLAN# 7 14 LAD1 LAD1 [7,19,24]
R29 *0_4 BT_COMBO_EN#15 CLKREQ# Reserved LAD2
12
[8] BT_COMBO_EN#
3
BT_CHCLK Reserved
10 LAD3
LAD2 [7,19,24]
LAD3 [7,19,24]
&ŽƌD/^ƵŐŐĞƐƚŝŽŶ
MINICAR_PME# BT_DATA Reserved LFRAME# CLK_33M_DEBUG C19 *33P/50V_4
1 WAKE# Reserved 8 LFRAME# [7,19,24]
43 50 R23 *0_4
Reserved GND
37 Reserved GND 40
35 GND GND 34
29 GND GND 26 Avoid leakage issue
27 GND GND 18
21 GND GND 4
15 9 +3V_WLAN_P
GND GND PIN44
MLX_67910-5700

2
ŵŝƉĐŝͲϴϬϬϬϱϱĨďϬϱϮŐdžϬϬƉůͲϱϮƉͲƐŵƚ Q2
*2N7002
WLAN_LED# 1 3 RF_LINK#

3 DŝŶŝĂƌĚZĞƐĞƚ +3V
3

FOR iAMT option +3V_WLAN_P


R11 0_4 PLTRST# U1
PIN7
EŽŶͲŝDd ŝDd
5

*MC74VHC1G08DFT2G R21 *10K/F_4


+3VS5 +3V_WLAN_P
2 +3V_WLAN_P ZĂ ^ƚƵĨĨ E

2
WLANE_PLTRST# R10 *100/F_4 WLAN_RST_OUT 4 Q8
PLTRST# C18 10U/6.3VS_6 *2N7002
1 PLTRST# [2,8,17,18,19,20,24] Zď E ^ƚƵĨĨ R13 *0_8 C13 0.1U/10V_4 REQ_WLAN# 1 3 PCIE_CLKREQ_WLAN#
C16 Yϯ͕Yϰ͕Zϭϳ E ^ƚƵĨĨ C334 0.1U/10V_4
3

*0.1U/10V_4 C333 0.1U/10V_4

1 3
+3V +3V_WLAN_P Q3 +3V_WLAN_P
ME2303T1
PIN5
ZĂ R17 R22

2
R14 *0_8 4.7K/F_4 100K/F_4
^ƵƉƉŽƌƚtĂŬĞ&ƵŶĐƚŝŽŶ;ZĞƐĞƌǀĞͿ C Test
R24
*10K/F_4
C Test
+3VPCU

3
BT_COMBO_EN#1

3
R28 *10K/F_4 [9] RF_PWR_OFF# RF_PWR_OFF# R15 *0_4 2 Q4
PDTC144EU Q10
2

RF_PWR_ON R16 0_4 BT_COMBO_EN# 2 *PDTC144EU


2 [24] RF_PWR_ON 2
Q9

1
*PDTC144EU C Test Zď
B Test

1
MINICAR_PME#
[6,17] PCIE_WAKE# 3 1 FOR iAMT

+3V_WLAN_P
PIN19,51
>^ƚĂƚƵƐ ;tŚŝƚĞͿ ĂƉĂĐŝƚLJŵŽĚƵůĞŽŶŶĞĐƚŽƌ
[24] MBATLED0# R274 200_6 R26
2 10K/F_4
3 +3VPCU
[24] BATLOW# R275 100_6 LED1
1 LED 3P WHITE/AMBER
C Test INT_BT_OFF#
;ŵďĞƌͿ

3
Del CN4
;tŚŝƚĞͿ [8] INT_BT_COMBO_EN# INT_BT_COMBO_EN# 2
LED2
1 2 SATA_R_LED1 R273 200_6 +3V Q5
[7] SATA_LED#
PDTC144EU

1
C Test B Test
3P WHITE LED
;tŚŝƚĞͿ 9/4 Intel COMBO card control circuit R25 *0_4
1 LED3 1
RF_LINK# R462 *0_4 RF_LED# 1 RFON_R_LED1 R276 200_6
1.add R1001,R1002,Q1001
2 +3V 2.add net name"INT_BT_COMBO_EN#" -> "INT_BT_OFF#"
3P WHITE LED C Test
3

R443 10K/F_4 1
Q32
Q33 352-(&7-:
4XDQWD&RPSXWHU,QF
+3V_WLAN_P 3 2
PDTC144EU [6,7,8,9,10,14,19,24,26,29,30,34] +3VS5
[2,6,7,8,9,10,12,13,14,15,16,17,19,20,23,24,29,32,34] +3V
ME2303T1 [7,10,14,15,16,23,34] +5V
2

[7,14,19,23,24,25,26] +3VPCU Size Document Number Rev

1%
RF_LINK# Custom 1A
[2,4,10] +1.5V_CPU D/E/W/KEEͬ>
Date: Tuesday, February 07, 2012 Sheet 22 of 34
A B C D E
A B C D E

WŽǁĞƌŽƚƚŽŶŽŶŶĞĐƚŽƌ

C14 0.1U/10V_4
Wh&E

+5V
dŽƵĐŚWĂĚŽŶŶĞĐƚŽƌ

+3V
Ϯϯ

8
+3VPCU WŝŶϭ͗нϯsWh;>/^t/d,WtZͿ R50 4.7K/F_4 TPDATA C105 0.1U/10V_4
1 R51 4.7K/F_4 TPCLK C106 0.1U/10V_4
[24] PWR_LED# 2 WŝŶϮ͗WKtZ>
C353 10U/6.3VS_6 C108 10P/50V_4 +3V
[14,24] LID_EC# 3 WŝŶϯ͗>/^t/d,
WŝŶϰ͗'E CN14 CN5
4 4 C354 0.1U/10V_4 C109 10P/50V_4 4
5 WŝŶϱ͗'E 1 ϮϱŵŝůƐ
[24] NBSWON1# 6 WŝŶϲ͗WKtZKEη [24] FAN_PWM 2 1
[24] TPDATA TPDATA L4 BK1608LL680 TPDATA-1
3 2

7
[24] FAN1SIG [24] TPCLK TPCLK L5 BK1608LL680 TPCLK-1
4 3
C10

C8

C5
CN2
PWR BTN CONN R292 4.7K/F_4 FAN1 L10 *BK1608LL680 TP_R 4
+3V [8,12,13] SMB_RUN_DAT 5
[8,12,13] SMB_RUN_CLK L11 *BK1608LL680 TP_L
C352 1000P/50V_4 6
EMI(near CN4)
220P/50V_4

220P/50V_4

220P/50V_4

C104 C103 TOUCH PAD CONN

220P/50V_4 220P/50V_4

SW2 SW1
TP_R 3 1 TP_L 3 1
4 2 4 2
6 5 6 5

^d,ŽŶŶĞĐƚŽƌ TMG-533-S-V-TR TMG-533-S-V-TR


23
24

25
26
J1
+5V: 2 A(4 Pin)
&ŝŶŐĞƌWƌŝŶƚŽŶŶĞĐƚŽƌ
+5V
3 +3V: 2 A(4 Pin) 3
C422 *10U/6.3V_8 CN3001
22

Gnd : (5 Pin) C424 10U/6.3VS_6


1

SATA HDD C429 4.7U/6.3V_6 C3001 0.1U/10V_4


C430 0.1U/10V_4 USBP8+ C3003 *Clamp-Diode
+3V
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

1 2 6
5
[8] USBP8+ 4
[8] USBP8- 3
2
C Test +3V 1
SATA_TXP0_D C472 0.01U/16V_4 SATA_TXP0 [7] USBP8- C3004 *Clamp-Diode C3002 0.1U/10V_4
SATA_TXN0_D C471 0.01U/16V_4 1 2
+5V SATA_TXN0 [7]
Finger Print CON
SATA_RXN0_D C466 0.01U/16V_4
SATA_RXN0 [7]
SATA_RXP0_D C465 0.01U/16V_4
SATA_RXP0 [7]

DG recommended that AC coupling capacitors should be <ĞLJďŽĂƌĚŽŶŶĞĐƚŽƌ


close to the connector (<100 mils) for optimal signal quality.
MY1 C384 220P/50V_4 CN3

26
MY2 C374 220P/50V_4
+3VPCU MY4 C362 220P/50V_4 MY2
MY0 C365 220P/50V_4 MY15 25
RP8 MY14 24
2
MY2 MX4 C379 220P/50V_4 MY13 23 2
10 1
^dKŽŶŶĞĐƚŽƌ MY7
MY6
9
8
2
3
MY0
MY1
MX6
MX3
C373
C350
220P/50V_4
220P/50V_4
MY12
MY11
22
21
MY5 MY3 MX2 C381 220P/50V_4 MY10 20
7 4 19
MY4 6 5 MY9
MY5 C361 220P/50V_4 MY8 18
10P8R-8.2K MY6 C359 220P/50V_4 MY7 17
RP9 MY3 C364 220P/50V_4 MY6 16
CN13 MY11 MY7 C357 220P/50V_4 MY5 15
10 1 14
C146 0.01U/16V_4 SATA_TXP2_D 2 S1 MY15 9 2 MY8 MY4
[7] SATA_TXP2 TXP 13
C144 0.01U/16V_4 SATA_TXN2_D 3 MY14 8 3 MY9 MY8 C360 220P/50V_4 MY3
[7] SATA_TXN2 TXN 12
14 MY12 7 4 MY10 MY9 C358 220P/50V_4 MX7
C141 0.01U/16V_4 SATA_RXN2_D 14 MY13 MY10 C356 220P/50V_4 MX6 11
[7] SATA_RXN2 5 RXN 6 5 10
[7] SATA_RXP2 C140 0.01U/16V_4 SATA_RXP2_D 6 16 MY11 C355 220P/50V_4 MY2
R2931 RXP 16 9
2 1K/F_4 8 DP
10P8R-8.2K MX5
8
+5V 9 B Test MX7 C367 220P/50V_4 MX4
+5V S7 MX0 C380 220P/50V_4 MX3 7
10 +5V 6
11 P1 MX5 C351 220P/50V_4 MX2
MD MX1 C368 220P/50V_4 MY1 5
1 GND1 17 17 4
4 MY0
GND2 MY[0..15] MY12 C372 220P/50V_4 MX1 3
7 GND3 15 15 [24] MY[0..15] 2
12 MY13 C378 220P/50V_4 MX0
GND MY14 C366 220P/50V_4 1
13

27
GND P6 MX[0..7] MY15 C363 220P/50V_4 6906-25
[24] MX[0..7]
SATA ODD
B Test
1 1
+5V
WͬE͗&&Ϯϰ&ZϬϯϬ
C71 10U/6.3VS_6
C76 0.1U/10V_4
ϭϮϬŵŝůƐ C81
C98
0.1U/10V_4
0.1U/10V_4 352-(&7-:
C87 0.1U/10V_4 [2,6,7,8,9,10,12,13,14,15,16,17,19,20,22,24,29,32,34] +3V 4XDQWD&RPSXWHU,QF
[7,10,14,15,16,22,34] +5V
[7,14,19,22,24,25,26] +3VPCU
Size Document Number Rev

1%
Custom 1A
,ͬKͬ&Eͬ<zKEE
Date: Tuesday, February 07, 2012 Sheet 23 of 34
A B C D E
5 4 3 2 1

Ϯϰ
[2,6,7,8,9,10,12,13,14,15,16,17,19,20,22,23,29,32,34] +3V
[6,7,8,9,10,14,19,22,26,29,30,34] +3VS5
[7,14,19,22,23,25,26] +3VPCU
[2,4,6,7,8,10,19,29,32] +1.05V Layout Note:
+3VPCU
Place all capacitors close to IT8518E.
12 MILS
Del C316
C314 C279 C313 C295 C280 C239
+3VPCU +3V_ECACC L15 HCB1608KF-181T15 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4
+3VPCU
B Test
C242 C237
D 1U/6.3V_4 1000P/50V_4 D
Select Pin +3VPCU
R227
470K_4 +3V +3VPCU Rb Ra
Del R225, R226 IT8502_AGND IT8502_AGND R167 10K/F_4 CB/LG R166 *10K/F_4
EC_WRST +3v_STBY L17 HCB1608KF-181T15 +3VPCU
C317 0.1U/10V_4
CB/LG select
C315 C306
0.1U/10V_4 0.1U/10V_4 LG project Ra

114
121

127
B Test CB project Rb

11
26
50
92

74
3
U6

VCC
VSTBY
VSTBY
VSTBY
VSTBY
VSTBY

VBAT
AVCC

VSTBY
[7,19,22] LAD0 10 84 BATLOW
LAD0 EGCLK/WUI27/GPE3
[7,19,22] LAD1 9 LAD1 EGCS#/WUI26/GPE2 83 VRON [32]
[7,19,22] LAD2 8 LAD2 FOR iAMT option
[7,19,22] LAD3 7 LAD3 EGAD/WUI25/GPE1 82 PM_SLP_A# [6,31]
[2,8,17,18,19,20,22] PLTRST# 22 LPCRST#/WUI4/GPD2 EŽŶͲŝDd ŝDd Q19
[8] CLK_33M_KBC 13 LPCCLK KSO16/SMOSI/GPC3 56 EC_PWROK [6]
H_PROCHOT#_EC R165 100K/F_4
[7,19,22] LFRAME# 6 LFRAME# KSO17/SMISO/GPC5 57 M_PWROK [6,31] ZĂ ^ƚƵĨĨ E 5

[6] SLP_S5 17 LPC 19 SUSON [27] Zď E ^ƚƵĨĨ 4 3 H_PROCHOT#_Q R150 0_4


LPCPD#/WUI6/GPE6 L80HLAT/BAO/WUI24/GPE0 H_PROCHOT# [2,32]
20 PM_SLP_LAN# [6,34]
D6 RB500V-40 L80LLAT/WUI7/GPE7
[9] EC_A20GATE 126 GA20/GPB5
[7,19] SERIRQ 5 GPIO 107 MBATLED0 2 BATLOW
D15 RB500V-40 SERIRQ SBUSY/GPG1/ID7 H_SI R184 0_4
[9] SIO_EXT_SMI# 15 ECSMI#/GPD4 HMOSIGPH6/ID6 99 PCH_SPI_SI [7]
[9] SIO_EXT_SCI# D14 RB500V-40 23 98 H_SO R180 0_4 PCH_SPI_SO [7] ZĂ R163 0_4 PCH_SPI_CS1# [7] 1 6 BATLOW# [22]
EC_WRST ECSCI#/GPD3 HMISO/GPH5/ID5 H_CLK R179 0_4
14 97 PCH_SPI_CLK [7]
D16 RB500V-40 WRST# HSCK/GPH4/ID4 H_SCE# R164 *0_4
[9] EC_RCIN# 4 KBRST#/GPB6 HSCE#/WUI19/GPH3/ID3 96 Zď PCH_SPI_CS0# [7]
16 95 MAINON [25,27,29,30,34] 2N7002DW
C TP41 PWUREQ#/BBO/GPC7 CTX1/WUI18/GPH2/SMDAT3/ID2 C
CRX1/WUI17/GPH1/SMCLK3/ID1 94 RF_LINK# [22]
93 CLKRUN# [6,19]
CLKRUN#/WUI16/GPH0/ID0 Q21
[25] D/C# 119 5 PWR_LED
[6] RSMRST#
H_PROCHOT#_EC
123
GPC0
TMA0/GPB2 IT8518E/HX 4 3 PWR_LED# [23]
86
Charger_ON PS2DAT0/TMB1/GPF1 EC_PECI_R R205 43_4
[21] Charger_ON 85 117 EC_PECI [2]
PS2CLK0/TMB0/GPF0 SMCLK2/WUI22/GPF6/PECI MBATLED0
118 2
TPDATA SMDAT2/WUI23/GPF7 MBCLK
[23] TPDATA 90 PS2DAT2/WUI21/GPF5 PS/2 SMCLK0/GPB3 110 MBCLK [25]
[23] TPCLK TPCLK 89 111 MBDATA For Battery charge/charge 1 6 MBATLED0# [22]
PS2CLK2/WUI20/GPF4 SMDAT0/GPB4 MBDATA [25]
SM_BUS 115 MBCLK2
SMCLK1/GPC1 MBCLK2 [8,13]
116 MBDATA2 For PCH SMB/DDR Thermal IC/VGA/cap board
SMDAT1/GPC2 MBDATA2 [8,13]
CB/LG 80 2N7002DW
DAC4/DCD0#/GPJ4
104 DSR0#/GPG6
33 +3VPCU
[21] USB_CHR_C3 GINT/CTS0#/GPD5
[26,27,28,29,30] HWPG 88
PS2DAT1/RTS0#/GPF3 MBCLK R190 10K/F_4
[14] LID_CONTROL 81 DAC5/RIG0#/GPJ5 UART PWM0/GPA0 24 LAN_POWER [34]
[22] RF_PWR_ON 87 25 Num LK TP40 MBDATA R194 10K/F_4
PS2CLK1/DTR0#/GPF2 PWM1/GPA1
[7] ACZ_SDOUT 1 2 108 RXD/SIN0/GPB0 PWM2/GPA2 28 AC_PRESENT [6]
[22] EC_DEBUG1 109 29 SATA5GP_EC TP39 +3V
D12 TXD/SOUT0/GPB1 PWM3/GPA3
PWM4/GPA4
30 FAN_PWM [23] thermal shutdown circuit
RB500V-40 31 MBCLK2 R198 10K/F_4
PWM5/GPA5 SUS_PWR_ACK [6]
[16,21] USB_ENABLE# 106 32 VOLMUTE# [16] MBDATA2 R203 10K/F_4
EC_SCK GPG0 PWM6/SSCK/GPA6
105 34
FSCK PWM7/GPA7 R170
USB_CHR_C2 [21] B Test
EC_SO 103 FLASH PWM 47 EC_CT_UP *4.7K/F_4 +1.05V
EC_SI FMISO TACH0/GPD6 R204 *10K/F_4 +3VPCU
102 48 +3V
EC_CE# FMOSI TACH1/TMA1/GPD7
101
FSCE# R200 0_4 C248 220P/50V_4
TP24 100 120 FAN1SIG [23]
SSCE0#/GPG2 TMR0/WUI2/GPC4

2
B 124 B
[23] MY[0..15] TMR1/WUI3/GPC6 3VS5_ON [26]
MY0 36 R207
KSO0/PD0 SUSC# [6]
MY1 37 5VS5_ON [26] 10K/F_4 EC_WRST 3 1
KSO1/PD1 PM_THRMTRIP# [2,9]
MY2 38
MY3 KSO2/PD2 Q20 *MMBT3904-7-F
39 KSO3/PD3
MY4 40 NBSWON1#
MY5 KSO4/PD4
41 KSO5/PD5
MY6 42 125 NBSWON1# NBSWON1# [23] EŽŶͲŝDd ϰD
MY7 KSO6/PD6 PWRSW/GPE4 C302
43 18 LID_EC# [14,23]
MY8 KSO7/PD7 RI1#/WUI0/GPD0 0.1U/10V_4
44 KSO8/ACK# WAKE UP RI2#/WUI1/GPD1 21 ACIN [25] ŝDd ϴD
MY9 45 KBMX
MY10 KSO9/BUSY
46 35 SUSB# [6]
MY11 KSO10/PE WUI5/GPE5 PWR_LED
MY12
51 KSO11/ERR# RING#/PWRFAIL#/CK32KOUT/LPCRST#/GPB7 112 Platform ADC
MY13
52
KSO12/SLCT Vender Size P/N
53 KSO13 JW2 0.00 V
MY14 54 EON 4MB AKE39ZN0Q02 (EN25Q32B-104HIP)
MY15 KSO14 EC_GPI0
[23] MX[0..7] 55
KSO15 ADC0/GPI0
66 TWC 0.75 V
MX0 58 67 GFX_HWPG_EC TP21 AMIC 4MB AKE39F-0800 (A25LQ32AM-F/Q)
MX1 KSI0/STB# ADC1/GPI1
59 KSI1/AFD# ADC2/GPI2 68 SYS_I [25] SW6C 1.50 V
MX2 60 A/D D/A 69 AD_AIR [25] Socket DFHS08FS023
MX3 KSI2/INIT# ADC3/GPI3
61
KSI3/SLIN# ADC4/WUI28/GPI4
70 TEMP_MBAT [25] CB3 2.25 V
MX4 62 71
MX5 KSI4 ADC5/WUI29/GPI5 +3VPCU
63 KSI5 ADC6/WUI30/GPI6 72 TP20 CB4 3.00 V
MX6 64 73 SETVPRO +3VPCU U13
MX7 KSI6 ADC7/WUI31/GPI7 EC_CE#
65 1 8
KSI7 R175 10K/F_4 EC_GPI0 R162 *10K/F_4 EC_SCK R363 47_4 EC_SCK_R 6 CE# VDD
USB_CHR_C1 EC_SI R362 47_4 EC_SI_R SCK
76 USB_CHR_C1 [21] 5
DAC0/GPJ0 EC_SO R351 15_4 EC_SO_R SI R364
CLOCK
VCORE

128 CK32K DAC1/GPJ1 77 2 SO HOLD# 7


AVSS

2 78 VFAN TP17 10K/F_4 C448


VSS

VSS
VSS
VSS
VSS
VSS

CK32KE DAC2/GPJ2
DAC3/GPJ3 79 D10 RB500V-40
DNBSWON# [6] +3VPCU R347 10K/F_4 3 WP# VSS 4 0.1U/10V_4
A A
Select Pin +3VPCU
R385 10K/F_4 +3VS5 SPI Flash ROM
1

27
49
91
113
122

75

12

IT8518E/HX ZĚ ZĐ B Test
R161 10K/F_4 SETVPRO R151 *10K/F_4

IT8502_AGND
C318
0.1U/10V_4
VPRO Select 352-(&7-:
L14 HCB1608KF-181T15
VPRO Rc 4XDQWD&RPSXWHU,QF
Non-VPRO Rd
EE Size Document Number Rev
Custom
1% ŵďĞĚĚĞĚŽŶƚƌŽůůĞƌ;/dͺ/dϴϱϭϴͬ,yͿ 1A
IT8502_AGND
Date: Tuesday, February 07, 2012 Sheet 24 of 34
5 4 3 2 1
5 4 3 2 1

Ϯϱ
1HZ%DWWHU\3DFN
3ODFHWKLV=96FORVHWR 'R1RWDGGWHVWSRLQWRQ%$7',6B*VLJQDO 63 P$+
723'&B-$&. LGHDGLRGH
PL1
80/5A CN8

D
:$ PQ22 +VAD PQ23
PQ21
ME4411-G
+BATCHG BP07061-BA015
8 8 D
PL7 +VA QM3005N3 QM3016D +PRWSRC 1 8 BATT+ 7 7
CN9 80/5A 5 1 2 7 PL2 SMD 3 3
J1-1 6 2 4 3 3 6 80/5A SMC 4 4
1 PC4 PC3
7 3 4 5
2

1
8 .HOYLQ&RQQHFWLRQVIRUWKH 0.1U/25V_4 0.1U/25V_4 5
5
PL5 PC94 BATDIS_G B_TEMP_MBAT
&XUUHQW6HQVH5HVLVWRUV 6

1
80/5A PD13 0.1U/25V_4 PC1 6
2 10

4
3 PC90 PC84 MESMAJ20A-G 0.22U/25V_8 PR108 +VIN PR3 PR4 2 10
4 1 1 9 9
0.1U/25V_4 0.1U/25V_4 RL1206-R010 3DUDOOHOURXWLQJ 330/F_4 330/F_4

2
HS3404F PR8 1 2 PR6
ACOK_IN BATDIS_G [24] MBDATA 200K/J_4

1
*100/F_4 [24] MBCLK +3VPCU

+VH28 PR2 150K/F_4 PD14 PR5


MESMAJ20A-G 1K/F_4

1
TEMP_MBAT [24]

2
PQ11 +VAD 8681_VDDP PR109 PR110
PR25 MMDT2907A PR31 PR29 PR1 *0_2/S *0_2/S PC9 PC8
Q1

+VA 1 2 100/F_4 *68P/50V_4 *68P/50V_4 PC2 PC80


1K_6 220K_4 220K_4 3ODFHWKLV=96FORVHWR 0.01U/25V_4 0.01U/25V_4

CSIN

2
CSIP
PR11 PR12 PR38
6 5 )DU)DUDZD\9,1

3
100K/F_4 *100K/F_4 *0_4/S 8681_VDDA
3 4 +VAD ACOK_IN PC36 PD1 PD2
Q2

PDZ5.6B PDZ5.6B
+VAD
PR18 2 ACOK# PD9 3ODFHWKLVFDS

ACIN_1
1M_4 IDEA_G 1N4448WS PR28 PR33 1U/10V_4
0_4 0_4 FORVHWR(&
2 1
PQ1 PR47

3
ME2N7002D PR10 100/F_4 8681_VDDP

1
PR24
3

8681_VDDA
PR23 100K/F_4 2 ACIN_PG +VIN_CHG PL10 +VIN
1M_4 1M_4 *0_8/S

IACM
IACP
1
C C
PQ12 PC23 PC26

2
IMD2 PQ4 1U/10V_4 PC15
MMBT3904-7-F 1U/10V_4 PC102 PC100 PC101 PC97 PC104

15
2

6
*2.2U/10V_6 PD5 4.7U/25V_8 *4.7U/25V_8 1000P/50V_4 0.1U/25V_4 0.1U/25V_4
4

8
7
6
5
PR34 RB501V-40

IACM
IACP

VDDA

VDDP
*0_4/S PR22

1
MBCLK SCL 10 2_6 PC17
SCL
ACAVD

12 8681B_2 8681B_1
PR35 BST PQ24
4
PD3 *0_4/S 0.1U/50V_6 QM3002N3 LQFOXGHFKDUJHUERRVWIXQFWLRQ
[24,27,29,30,34] MAINON 2 1 MBDATA SDL 11 13 8681HDR
SDL HDR PL6 PR113 +BATCHG

3
2
1
1N4448WS EM-68AM05V06 RL1206-R010
PR50 14 8681LX 8681LR 1 2
PD6 ACIN_PG 8681_ACAV 9 LX
[34] ACIN_PG ACAV

8
7
6
5

1
8681_ACAV 2 1 100K/F_4
PR41 16 8681LDR PC18 PC12 PC22
PU1 LDR

10U/25V_8

10U/25V_8
1N4448WS 100K/F_4 PR119 1500P/50V_4 PC11
+VA +VAD_1 2.2_8 PD8 0.1U/25V_4
OZ8682 4 RB501V-40

2
PD4 PD7 PR26 PQ25 PR112 PR111
2 1 +VAD_1 2 1 +VAD_2 DCIN 1 QM3002N3 *0_2/S *0_2/S
VAC PC86

3
2
1
1N4448WS 1N4448WS 10/J_8 2200P/50V_4
PC24 PR46
PR16 1U/25V_8 0_4
75K/F_4 5 8681ICHP 8681ICSP1
ICHP
8 PC33
COMP *1U/10V_4 8681ICHM 8681ICHM1
4
[24] AD_AIR ICHM
8VLQJ.HYLQFRQQHFWLRQ

GND

IAC
PR45
B PC81 PC32 0_4 IRUOD\RXW B
0.1U/10V_4 PR49 *0.01U/50V_4

17

7
PR21 0_4
12.4K/F_4 3ODFHWKLVFDS
PR48 FORVHWR,&
Place this cap PC38 10/F_4
0.47U/10V_4 8681IAC
close to EC SYS_I [24]

PC37 PC79
0.01U/50V_4 0.01U/50V_4

ACOK_IN
PR44
+3VPCU 0_4
3ODFHWKLVFDS
ACOK#

PR9
FORVHWR(&

3
*0_4 +VAD
ACIN_PG PR7 PD10
100K/F_4 2 D/C#_S6A 1 2
D/^ƵŐŐĞƐƚŝŽŶ PQ16
PDTC144EU *1N4448WS
D/C# [24]

PR19 +PRWSRC
[24] ACIN

1
*0_4 PR13 PC41
3

1M_4 *10U/6.3V_8

2 PC19 PC16
*10U/25V_8 *10U/25V_8
3

PR15
PQ2 1M_4
ME2N7002D
1

A A
2 ACIN_PG

PQ9
ME2N7002D
1

352-(&7-:
[14,19,26,27,29,33,34] +VIN
[34] +VAD
[34] +VH28
[34] +VAD_1 4XDQWD&RPSXWHU,QF
[7,14,19,22,23,24,26] +3VPCU
Size Document Number Rev
Custom
1% 25 -- Charger (OZ8682) 1A

Date: Tuesday, February 07, 2012 Sheet 25 of 34


5 4 3 2 1
5 4 3 2 1

DC/DC +3V_ALW/+5V_ALW/+5V_ALW2 /+15V_ALW


Ϯϲ

D 3ODFHWKHVH&$3V D
FORVHWR)(7V

3ODFHWKHVH&$3V +VIN_3VS5 PL4 +VIN


*0_8/S
FORVHWR)(7V
+VIN PL3 +VIN_5VS5 +5VPCU
*0_8/S PC31 PC28 PC39 PC30 PC42
+VIN PC92 0.1U/25V_4 2200P/50V_4 4.7U/25V_8 4.7U/25V_8 0.1U/25V_4

PC96 4.7U/6.3V_6
0.1U/25V_4 PC29 PC93 PR39 7216(/ 95(*
4.7U/25V_8 4.7U/25V_8 10/J_8
+3VPCU +2VREF 9RXW N+]9RXW N+]

+VIN +5VPCU
PC99
PC95 PC91
+5V +/- 5%

4.7U/6.3V_6
0.1U/25V_4 1U/6.3V_4
Countinue current:4A PR42 PR120 PR121
PC34 PC27 *665K/F_4 *0_4 0_4
+3.3 Volt +/- 5%

16

17
Peak current:6A

5
6
7
8

8
7
6
5
2200P/50V_4 0.1U/25V_4 PR43 PU4
PQ13 *330K/F_4 Countinue current:4A
OCP minimum:7.5A

VIN

VREG3

VREG5

REF
QM3002N3 8205EN 13 4
EN TONSEL Peak current:6A
4 5V_UGATE1 21 10 3V_UGATE2 4 PQ14
PC88 UGATE1 UGATE2 PC98 QM3002N3 OCP minimum:7.5A
PR117 PR124
5V_BST1 22 9
+5VS5 PL8 BOOT1 BOOT2 PL9 +3VS5
1 2_6 2_6
2
3

3
2
1
EM-22AM05V04 0.1U/25V_4
5V_PHASE1
573 3V_PHASE2
0.1U/25V_4 EM-22AM05V04
20 11
PHASE1 PHASE2
5
6
7
8
C 5V_LGATE1 19 12 3V_LGATE2 C

8
7
6
5
PR115 LGATE1 LGATE2 PR114 PC20
PC87 *0_2/S PR14 24 PR17 *0_2/S 0.1U/10V_4

ENTRIP1

ENTRIP2

SKIPSEL
0.1U/10V_4 2.2_8 5V_FB1 VOUT1 2.2_8
2 7
1

1
FB1 OUT2
4

GND
GND
ENC
+ PGOOD 23 5 3V_FB2 4 +
PC82 PQ7 PGOOD FB2 PC83
220U/6.3V_6X4.5 PC13 AON7702A PQ10 PC14 220U/6.3V_6X4.5
2

1
2
3

18

14
25
15

2
2200P/50V_4 AON7702A 2200P/50V_4

3
2
1
PR27
5GV RQ PRKP

ENTRIP1

ENTRIP2
15.4K/F_4
PR123
5GV RQ PRKP
PR37
6.8K/F_4
0_4
PR36
*0_4/S
PR32 [24,27,28,29,30] HWPG PR116
10K/F_4 80.6K/F_4 PR118
0_4 PR40
+3VS5 +3VPCU 10K/F_4

3
PR30
10K/F_4 PR20
100K/F_4
+3VPCU 2 PC85
*0.1U/10V_4
PQ5
3

ME2N7002D

1
[24] 5VS5_ON 2

)RU86%FKDUJHIXQFWLRQ PQ6
1

PDTC144EU
PR122
B B
90.9K/F_4
3
PR51
100K/F_4
+3VPCU 2

PQ17
3

ME2N7002D
1

[24] 3VS5_ON 2

[14,19,25,27,29,33,34] +VIN
PQ18
1

[6,7,8,9,10,14,19,22,24,29,30,34] +3VS5
PDTC144EU
[10,16,19,21,27,28,29,30,31,32,33,34] +5VS5
[7,14,19,22,23,24,25] +3VPCU

A A

352-(&7-:
4XDQWD&RPSXWHU,QF
Size Document Number Rev

1%
C 1A
26 -- 3/5VS5 (RT8223P)
Date: Tuesday, February 07, 2012 Sheet 26 of 34
5 4 3 2 1
1 2 3 4 5

977$
+0.75V_DDR_VTT +VIN_DDR PL19
*0_8/S
+VIN
Ϯϳ
A A
PC181 PC180 PC189 PC183 PC193 PC187 PC179
10U/6.3V_8 10U/6.3V_8 0.1U/25V_4 4.7U/25V_8 4.7U/25V_8 2200P/50V_4 0.1U/25V_4

25
PU9
1 24 +1.5VSUS PC188

GND
VTTGND VTT *0.1U/50V_6
9686

8
7
6
5
PR105
2 VTTSNS VLDOIN 23 &RXQWLQXHFXUUHQW$
*0_4
8207BST
PR201
8207BSTR
PC199
PQ33
3HDNFXUUHQW$
+1.5VSUS 3 GND VBST 22

PR106 2_6 0.1U/25V_4


4 QM3002N3
2&3PLQLPXP$
4 21 8207DRVH
MODE DRVH +1.5VSUS
P$ PL20

3
2
1
0_4 EM-82BM05V04
[4,12,13] DDR_VTTREF 5 20 8207LX
VTTREF LL

PC77 V5FILT 6 19 8207DRVL PC190


COMP DRVL

1
0.033U/10V_4 PR212 0.1U/10V_4
B + B
D 2.2_8
7 18 G PC182
NC PGND 390U/2.5V_6X5.8ESR10
4

2
S PR202
8 17 5,/,0 ,/,0[5'6 21 X$ PQ34 PC207 *0_2/S

1
2
3
VDDQSNS CS_GND TPCA8A11-H 2200P/50V_4
PR210
9 16 8207CS
VDDQSET CS +5VS5
6.98K/F_4 PC206 5'6RQ PRKP
10 S3 V5IN 15
PR203
*0_4/S 1U/6.3V_4

[24] SUSON
8207S5 11 S5 V5FILT 14 V5FILT 3ODFHWKLVVKRUWSDG
PR211 FORVHWRRXWSXW&$3
+VIN_DDR 8207TON 12 13 DDRPG PC205 10_6
NC PGOOD 1U/6.3V_4
PR204 57/*4:
619K/F_4
HWPG [24,26,28,29,30]
C PR207 C
*0_4/S

PR198
10K/F_4

PR197
10K/F_4
PD12 [14,19,25,26,29,33,34] +VIN
D [10,16,19,21,26,28,29,30,31,32,33,34] +5VS5 D
2 1 MAINON [24,25,29,30,34] [2,4,12,13] +1.5VSUS

352-(&7-:
[12,13,34] +0.75V_DDR_VTT
RB501V-40
3ODFHWKLV)%SDUWVFORVHWR,&
PC78
0.1U/10V_4
4XDQWD&RPSXWHU,QF
PR107
100K/F_4 Size Document Number Rev
Custom
1% 27 -- DDR3 (RT8207) 1A

Date: Tuesday, February 07, 2012 Sheet 27 of 34


1 2 3 4 5
5 4 3 2 1

Ϯϴ
&38V\VWHPDJHQW
YROWDJHVOHZUDWHRIP9NjV

D
6(/ 6(/ 9&&6$ D

  9
  9
  9
  9

[24,26,27,29,30] HWPG
PR70
*0_4/S
VCCSA_VID1
VCCSA_SEL [4]
PC47 VCCSA_VID0 PR71 *0_4/S
VCCSA_SEL0 [4]

1U/6.3V_4 PR72 0_4


1.05V_VTT_PWRGD [29]
PR62
0_6 PC50
VCC_TPS51461 *0.1U/10V_4
+VCCSA Volt +/- 5%
PC44 Countinue current:4A
2.2U/6.3V_4

18

17

16

15

14

13
C PU5 Peak current:6A C
PR65
OCP minimum:7A

VID1

VID0
V5FILT
V5DRV

PGOOD

EN
0_6 PC49
PJP1 12
*POWER_JP/S VCC_TPS51461 BST PL13 +VCCSA
22 0.1U/25V_4 EM-47BM05V05
VIN
+5VS5 2 1 23 VIN SW 11
24 VIN

SW 10
PC109 PC108 PC110 PR128 PC54 PC55 PC123 PC56 PC63 PR132
10U/6.3V_8 10U/6.3V_8 0.1U/10V_4 7365*(5 2.2_6

22U/6.3V/X5R_8

22U/6.3V/X5R_8

22U/6.3V/X5R_8

22U/6.3V/X5R_8

0.1U/10V_4
*0_2/S
19 PGND SW 9
20 PGND
21 PGND
1 8 PC113
GND SW
2200P/50V_4

SW 7

COMP

MODE
SLEW

VOUT
VREF
PR135
51461REF 2 100/F_4

51461COMP 3

6
PR127
PR137
*33K/F_4 0_4
VCCUSA_SENSE [4]

B PC111 B
PR126 0.01U/16V_4
PC46 4.99K/F_4
0.22U/6.3V_4

PC105
3300P/50V_4

A A

352-(&7-:
4XDQWD&RPSXWHU,QF
Size Document Number Rev
Custom
1% 28 -- +VCCSA (TPS51462RGER) 1A

Date: Tuesday, February 07, 2012 Sheet 28 of 34


5 4 3 2 1
5 4 3 2 1

Ϯϵ
D D

+3VS5

PR60
10K/F_4

PR61 +VIN_1.05V_VTT PL12 +VIN


H_VTTVID1 [4] *0_8/S
PR64 *0_4
+5VS5
10_6

RT8240VCC

RT8240TON
PC45 PC115
1U/6.3V_4 PC106 PC51 PC52 PC112 0.1U/25V_4
2200P/50V_4 0.1U/25V_4 4.7U/25V_8 *4.7U/25V_8
+3V +1.05V_VTT +/- 5%

8
7
6
5
Countinue current:10A

11
Peak current: 12A

5
PR52 PU2
PD11 100K/F_4 3 RT8240DH 4 PQ26
OCP minimum: 14.5A

VCC

TON
PR58 UGATE
[24,26,27,28,30] HWPG 2 1 RT8240ILIM 10 PC48 QM3002N3
PR53 CS PR63
RT8240BST_1 RT8240BST
61.9K/F_4 BOOST 4
1N4448WS *0_4/S PL11 +1.05V
2_6
57%=4:

3
2
1
RT8240HWPG_S2A 9 0.1U/25V_4 EM-82BM05V04
C [28] 1.05V_VTT_PWRGD PGOOD
2 RT8240LX 600 mils C
PR54 0_4 RT8240EN PHASE
[24,25,27,30,34] MAINON 8 EN
1 RT8240DL
LGATE PR129

5
RGND
PR125 PC114

GND
PC43 13 D 2.2_8 0.1U/10V_4

FB
PAD *0_2/S

1
*0.1U/10V_4 G
4 + +

12

6
S PC116 PC117
PQ27 390U/2.5V_6X5.8ESR10 *390U/2.5V_6X5.8ESR10

1
2
3

2
RT8240RGND
TPCA8A11-H PC107

RT8240FB
2200P/50V_4

5'6RQ PRKP
9R  55 5

PR55 PR59

*100/F_4 *100/F_4

PR57
VCCP_SENSE [4]
0_4

PR56
VSSP_SENSE [4]
B
0_4 B

A A

352-(&7-:
4XDQWD&RPSXWHU,QF
Size Document Number Rev
Custom
1% 29 -- +1.05V_VTT(RT8240B) 1A

Date: Tuesday, February 07, 2012 Sheet 29 of 34


5 4 3 2 1
5 4 3 2 1

ϯϬ
D D

+1.8V +/- 5%
+3VS5
PU3 Countinue current:1.2A
3 5
VIN NC Peak current:2A
PC58
10U/6.3V_8
PC60
0.1U/10V_4
* +1.8V

C 6 C
VOUT
PR68
[24,25,27,29,34] MAINON 2 EN
10K/F_4
+5VS5 4 8 PC57 PC59 PC61
VDD GND 10U/6.3V_8 10U/6.3V_8 0.1U/10V_4

ADJ
PC53 1 9
*0.33U/6.3V_4 PC62 PGOOD GND1
1U/6.3V_4

7
1.8VADJ PR69
R1 127K/F_4
PR66
*0_4/S R2 PR67
100K/F_4
92  55 5
5.RKP
[24,26,27,28,29] HWPG

B B

A A

352-(&7-:
4XDQWD&RPSXWHU,QF
Size Document Number Rev
Custom
1% 30 -- +1.8V (G9661) 1A

Date: Tuesday, February 07, 2012 Sheet 30 of 34


5 4 3 2 1
5 4 3 2 1

ϯϭ
D +V1.05M +/- 5% D

Countinue current:3A
+5VS5 PU8 Peak current:4A
*G5173R41U
16 10 54319LX OCP minimum 4.5A
VIN PH
1 11 PL18 +V1.05M
PC171 PC168 VIN PH *EM-10AM05V06
PR191 *10U/6.3V_8 *0.1U/10V_4 2 12
*0_4 VIN PH PC176
PR192
[6,24] PM_SLP_A# 54319EN 15 13
PD15 EN BOOT PR205 PC192 PC200 PC191
*2_6
[6,24] M_PWROK 2 1 14 6 *0.1U/25V_4 *0_2/S *10U/6.3V_8 *10U/6.3V_8 *10U/6.3V_8
PC172 PWRGD VSNS
*0.01U/50V_4 *1N4448WS 54319COMP 7 3 PC198
COMP GND PR187 *0.1U/10V_4
54319RT
R1 *12.7K/F_4
8 RT/CLK GND 4

PAD
PAD
PAD
PAD
PAD
PAD
PC169 PR189 54319SS 9 5 54319VSNS
*100P/50V_4 *25.5K/F_4 SS AGND
PR190

22
21
20
19
18
17
C
*180K/F_4 PC174 C
*0.01U/50V_4 R2 PR188
PC170 *47K/F_4
*470P/50V_4

9  55 5

B B

A A

352-(&7-:
4XDQWD&RPSXWHU,QF
Size Document Number Rev

1%
B 1A
31 -- +V1.05M (G5173)
Date: Tuesday, February 07, 2012 Sheet 31 of 34
5 4 3 2 1
5 4 3 2 1
B modify 1205
PC165 PR99 PR98

ϯϮ
*1K/F_4 PC76 0_4 PC75
PC161

1
IMONA

1200P/50V_4
0.1U/10V_4

6132AGND
+5VS5 PC164 PR181 PR196 *100P/50V_4 1000P/50V_4
PR180 75K/F_4
220P/50V_4 220K_6 NTC PR101
21.5K/F_4 CSCOMPA PR100 1K/F_4 DROOPA CSREFA
*4.7K/F_4

2
PR94 PR97 PC74
0_4 PC162 10P/50V_4
10/F_4 PR186 3ODFH17&FORVH
33P/50V_4 PC72 165K/F_4
D TRBSTA#
PR91 ZLWK*7,QGXFWRU D
4.3K/F_4
8VLQJ.HYLQFRQQHFWLRQ

PR96
14K/F_4
PR95 3300P/50V_4 PR184 B modify 1205
1K/F_4 78.7K/F_6
+3V IRUOD\RXW SWN1A
SWN1A [33]

6132AGND
PR178 0_4
PR83
10K/F_4 TSENSEA
[4] VCC_AXG_SENSE
PR179 PC159 PC163 CSREFA
[4] VSS_AXG_SENSE
0_4 1000P/50V_4 1000P/50V_4

1
[6] IMVP_PWRGD CSREFA [33]
PC73 PR208 PR209
PR177 47n/10V_4

8.25K/F_4
+5VS5 100K_4 NTC
+1.05V PR150 0_4
+3V CSP1A SWN1A

CSCOMPA

6132AGND
TSENSEA

2
TRBSTA#

DROOPA

CSSUMA
CSREFA
PC160

COMPA
*0_4/S

CSP2A
CSP1A
IMONA
PR92

DIFFA
VSNA
VSPA

ILIMA
FBA
6.98K/F_4
PR90 PR82 6132AGND 0.1U/10V_4
10K/F_4 *75/F_4 PR173 3ODFH17&FORVHZLWK
2_6 PU7 PR174

61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
+5VS5 NCP6132B 25.5K/F_4 9B*7KRWVSRW
GFX_HWPG H_PROCHOT#

TRBSTA#
VSNA
VSPA
DIFFA

FBA
COMPA
IOUTA

CSCOMPA
EPAD

ILIMA
DROOPA

CSSUMA
CSREFA
CSP2A
CSP1A
TSNSA
PC158
2.2U/6.3V_6
C 6132AGND VCC 1 45 6132_PWMA 6132_PWMA [33] C
VCC PW MA
2 VDDBP BSTA 44
GFX_HWPG 3 42
PR171 *0_4/S 6132EN 4 VRDYA SW A +5VS5
[24] VRON EN HGA 43
+1.05V PR88 *0_4/S SDIO 5 41 PC156
[4] VR_SVID_DATA SDIO LGA
VR_SVID_ALERT# 6 40 BST2
[4] VR_SVID_ALERT# ALERT# BST2
PR170 *0_4/S SCLK 7 38 SW2
[4] VR_SVID_CLK SCLK SW 2 SW2 [33]
PR169
PR87
10K/F_4 VBOOT 8
95.3K/F_4 ROSC 9 VBOOT HG2 39 HG2
LG2
0.22U/25V_6
PC154
HG2 [33] 5G PR93
*0_4
6132AGND ROSC LG2 37 LG2 [33]
PC71 6132VRMP 10 36
+VIN_VCC_CORE VRMP PVCC
PR86 PR89 PR84 0.1U/10V_4
[2,24] H_PROCHOT#
H_PROCHOT# 11
VRHOT# PGND 35 +5VS5 3235G
130/F_4 *75/F_4 54.9/F_4 PR85 IMVP_PWRGD 12 34 LG1 2.2U/6.3V_6
1K/F_4 PC153 VSN 13 VRDY LG1
32 HG1
LG1 [33]
HG1 [33] CSP1A )RUGLVFUHWHRQO\
VSN HG1
0.01U/50V_4 VSP 14
VSP SW 1 33 SW1
SW1 [33] RSHUDWLRQ
SDIO DIFF 15 31 BST1

CSCOMP
DIFF BST1

TRBST#

DROOP

CSSUM

DRVEN
CSREF
COMP

TSNS
VR_SVID_ALERT#

CSP3
CSP2
CSP1
6132AGND PC151

PWM
IOUT
ILIM
0.22U/25V_6

FB
SCLK 8VLQJ.HYLQFRQQHFWLRQ
IRUOD\RXW

16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
PR168
PR162

CSCOMP
COMP
6132_PWM

TSENSE
0_4

TRBST#

IMON

DROOP

CSSUM

DRVEN
FB

CSREF
ILIM

CSP3
CSP2
CSP1
41.2K/F_4

[4] VSS_SENSE DRVEN [33]


[4] VCC_SENSE PR167 PC150
0_4 1000P/50V_4 CSREF

6132AGND
B B
PC140

PR77 PC145
11.5K/F_4 0.1U/10V_4 47n/10V_4 PR81
PC147 6.98K/F_4 SWN1
PR163 SWN2
1K/F_4 +5VS5 PR78
33P/50V_4 6.98K/F_4
CSREF [33] PR80 PC144
PC142 PR157 PC141 0_4 47n/10V_4
PR153 CSREF TSENSE
PC143 49.9/F_4 4.3K/F_4 PC146
PR160
100P/50V_4 3300P/50V_4 1000P/50V_4

1
10/F_4
680P/50V_4
6132AGND PR149 PR148
TRBST# PR155 PR154 8.25K/F_4 100K_4 NTC
1.21K/F_4 24.9K/F_4

2
PC138 CSSUM
4700P/25V_4 PC66
PR79
0.1U/10V_4

22.6K/F_4 PC137 1200P/50V_4


PR164
SWN1
3ODFHFORVHZLWK
6132AGND 140K/F_6
SWN1 [33] 9&25(KRWVSRW
PR161
A 6132AGND 6132AGND PC139 470P/50V_4 SWN2 SWN2 [33] A
PC65 PC64 140K/F_6
PR74 *1K/F_4 PR73 *0_4
PR151 PR158
*820P/50V_4 *1000P/50V_4
352-(&7-:
75K/F_4 165K/F_4
PR76
CSCOMP DROOP PR75 CSREF
0_4 *4.7K/F_4 2 1 3XWFORVHZLWK9&25( 4XDQWD&RPSXWHU,QF
PR145 3KDVH,QGXFWRU
220K_6 NTC Size Document Number Rev
Custom
1% 32 -- CPU Core1 (NCP6132)DC 1A

Date: Tuesday, February 07, 2012 Sheet 32 of 34


5 4 3 2 1
5 4 3 2 1

ϯϯ

D +VIN_VCC_CORE D
+VIN_VCC_CORE PL14 +VIN
*0_8/S
+VCC_CORE (ONLY SUPPORT 35W)

1
PC155 PC69 PC152 PC68 PC70 PC67
3ODFHWKLVUHVLVWRU PC128 PC127 PC130 PC129 PC136 PC135 + + PC131 3ODFHWKLVUHVLVWRU 4.7U/25V_8 4.7U/25V_8 4.7U/25V_8 *4.7U/25V_8 0.1U/25V_4 2200P/50V_4
4.7U/25V_8 4.7U/25V_8 4.7U/25V_8 *4.7U/25V_8 0.1U/25V_4 2200P/50V_4 PC103 PC132 0.1U/25V_4
FORVHWR026 FORVHWR026 Countinue current:33A

2
100U/25V 100U/25V

2
5

5
PR159 D PR182 D Peak current: 53A
1_6 1_6
4
G
4
G Load Line : -1.9mV/A
[32] HG1 S [32] HG2 S
PQ28 PQ31 3ODFHWKLV&$3LQ&38
TPCA8064-H PL15 +VCC_CORE TPCA8064-H PL16 +VCC_CORE
62&.(7LQVLGH
1
2
3

1
2
3
0.36UH/30A 0.36UH/30A
[32] SW1 [32] SW2

1
5

5
PR165 + + PR185 + + +
D 2.2_8 PC134 PC133 D 2.2_8 PC148 PC157 PC167
G 390U/2.5V_6X5.8ESR10 390U/2.5V_6X5.8ESR10 G 330u_2.5V_7343 390U/2.5V_6X5.8ESR10 *390U/2.5V_6X5.8ESR10

2
[32] LG1 4 [32] LG2 4
S PQ29 S PQ30
TPCA8A10-H TPCA8A10-H
1
2
3

1
2
3
PC149 PC166
2200P/50V_4 2200P/50V_4

PR146 PR152 B modify 1205 PR175 PR156


*0_2/S 10/F_4 *0_2/S 10/F_4
B modify 1205 CSREF
CSREF [32]

SWN1 [32] SWN2 [32]


PR147 PR176
*0_2/S *0_2/S

C C

+VIN_VCC_GT PL21 +VIN


*0_8/S
B B

PC178 PC202 PC201 PC177 PC185 PC184 PC195 PC196


4.7U/25V_8 4.7U/25V_8 4.7U/25V_8 *4.7U/25V_8 0.1U/25V_4 2200P/50V_4 2200P/50V_4 0.1U/25V_4
+VCC_GFX
PC194 3ODFHWKLVUHVLVWRU
Countinue current:21.5A
VGTA_BST1
FORVHWR026 Peak current: 33A
5

0.22U/25V_6 D
PU10 G
Load Line : -3.9mV/A
NCP5911 PR193 4
1_6 S PQ32
1 8 HGTA TPCA8064-H PL17 +VCC_GFX
1
2
3

BST HG
0.36UH/30A
2 7 SWGTA
[32] 6132_PWMA PWM SW
PR206
3
[32] DRVEN GND 6
5

1
EN
2.74K/F_4 PR199
4 5 D 2.2_8 + + + +
+5VS5 VCC LG
G PC186 PC203 PC175 PC173
PAD LGTA 390U/2.5V_6X5.8ESR10 *390U/2.5V_6X5.8ESR10 *390U/2.5V_6X5.8ESR10 330u_2.5V_7343
4 2

2
PC204 9 S PQ35
2.2U/6.3V_6 TPCA8A10-H
1
2
3

PC197
2200P/50V_4

PR195 PR183
B modify 1205 *0_2/S 10/F_4
CSREFA [32]
PR194
SWN1A [32]
*0_2/S

A A

352-(&7-:
4XDQWD&RPSXWHU,QF
Size Document Number Rev

1%
C 1A
33 -- CPU Core2 (NCP5911)DC
Date: Tuesday, February 07, 2012 Sheet 33 of 34
5 4 3 2 1
5 4 3 2 1

+VAD
+VH28
ϯϰ
PR130
0_4
PR138
22_6

D D
PC121 PC118
0.1U/25V_4 1U/35V_6
PC120 2 1

17 G5934VOUT
0.1U/25V_4

20 G5934VIN

19 G5934CN

18 G5934CP
ACIN_PG [25]

16 DCAP
PC119
0.47U/25V_6

PR134
PR131 *0_4/S +VAD_1

VOUT
CP

D_CAP
VIN

CN
[6,24] PM_SLP_LAN#
*0_4

PR133 1 15 G5934PG
[24] LAN_POWER ON1 PG
0_4
PR136
750K/F_4

2 14 G5934VSENSE
[24,25,27,29,30] MAINON ON2 VSENSE

+12VALW
PR140
38 PR139
6/*975
MAINON 3 13 100K/F_4
ON3 REG
*0_4/S
PC122
1U/16V_4
MAINON 4
ON4
PR142
7 G5934DISC3 +0.75V_DDR_VTT
DISC3
C *0_4/S C
+3VS5 PR141 PR144
+3VLANVCC G5934DISC1 5 6 G5934DISC2 +5V
DISC1 DISC2

DRIVER4

DRIVER3

DRIVER1

DRIVER2
*0_4/S *0_4/S

DISC4
+5VS5

GND
5
6
7
8

PC21
0.1U/10V_4 PQ8
12

11

10

21
QM3002N3

8
7
6
5
PC25

G5934DISC4
4 MAIND3.3V PQ15 0.1U/10V_4
+0.75V_DDR_VTT
$ QM3002N3

PC124 MAIND 4
1
2
3

+3V 2200P/50V_4
$ +VIN
PR102

3
2
1
PC126 +5V *22_8
2200P/50V_4
PC5 PC6

3
0.1U/10V_4 *10U/6.3V_8 PR103
PR143 1M_4
*0_4/S PC40 PC35
*10U/6.3V_8 0.1U/10V_4 MAIN_ONG 2

3
PQ19
*ME2N7002D
+3V PR104

1
2 1M_4

PQ20
ME2N7002D
B B
MAIND [4]

1
+3VS5

MAIN_ONG [2,4]
PQ3
QM3002V PC89
1
2
5
6

0.1U/10V_4

LAN_ON 3
$
PC125 +3VLANVCC
4

2200P/50V_4

PC10 PC7
*10U/6.3V_8 0.1U/10V_4 [2,6,7,8,9,10,12,13,14,15,16,17,19,20,22,23,24,29,32] +3V
[7,10,14,15,16,22,23] +5V
[14,19,25,26,27,29,33] +VIN
[25] +VH28
[25] +VAD_1
[6,7,8,9,10,14,19,22,24,26,29,30] +3VS5
[10,16,19,21,26,27,28,29,30,31,32,33] +5VS5
[17,18,19] +3VLANVCC
[12,13,27] +0.75V_DDR_VTT

A A

352-(&7-:
4XDQWD&RPSXWHU,QF
Size Document Number Rev

1%
Custom 1A
34 -- Dis-charge IC (SLG55448V)
Date: Tuesday, February 07, 2012 Sheet 34 of 34
5 4 3 2 1
www.s-manuals.com

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