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Compal La-B001p r1.0 Schematics
Compal La-B001p r1.0 Schematics
1 1
Date : 2013/12/27
Version 1.0
2
Compal Confidential 2
REV: 1.0
4 4
UMA Only.
LVDS LVDS Converter
19.5" LCD
RTD2136R
1
XDP-SFF-26Pin Memory BUS 1
eDP
N13M-GE1 USB2.0 x4 port 0 port 1 port 2 port 3
port 0 1 USB3.0 x1
PCIE x4 Intel BayTrail-D USB 3.0 USB 2.0 USB HUB USB HUB
Conn Conn GL852G GL852G
port 2 port 3 (STT) (STT)
RTS8111G WLAN SOC USB
2
MINI CARD Charger 2
Card HD
Touch Reader
USB 2.0 USB 2.0 WLAN
SATA II x2 Camera Conn
Panel Conn. Conn BT
RJ45 port 1 port 0 HD Audio
HDA Codec
ALC259
SATA ODD SATA HDD LPC BUS SPI
Conn. Conn.
EC SPI ROM HP
SPK Conn.
TPM ENE KB9012 1.8V (8MB) 2W x2
MIC
3 3
DC/DC Interface CKT. RTC CKT.
4 4
UMA/DIS ID Table 0 (D I S ) 1( U M A )
A D _P I D 1 R 29 7= 1 0K O h m ; R 29 8 o pen R 29 7 o pen ; R2 98 = 10 K O hm
UD R 33 0 = 1 0K O h m ; R 29 9 o pen R 33 0 o pen ; R2 99 10 K O hm
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
3 3
4 4
Power ON
+RTCVCC
T0
RTCRST#
D
EC_ON D
+3VALW/+5VALW
+1.0VALW
+1.8VALW
+1.2VALW
ON/OFFBTN#
EC_RSMRST# 100 ms
100 ms
PBTN_OUT# 20 ms 100 ms
PMC_SLP_S4#
SUSPWRDNACK
120 ms
SYSON
+1.35V
DDR_PWROK
C C
PMC_SLP_S3#
VR_ON 20ms
+CORE_VNN
+CORE_VCC
VGET
SUSP# 20ms
+1.0VS
0.446 ms
+1.05VS
0.606 ms
+1.35VS
0.878 ms
+1.5VS
0.973 ms
+1.8VS
1.171 ms
+3VS
1.757 ms
B
+5VS B
2.343 ms
+0.675VS
6.774 ms
50 ms
KBRST#
100 ms
PMC_CORE_PWROK
DDR_CORE_PWROK
PMC_PLTRST#
NOTE:
A
1. T1 and T2 are recommended time for all the VR rails A
unless specified otherwise. The VR ramp up time T2 and
subsequent rail delay T3 are put in place to avoid
inrush current which may be caused by multiple loads
turning on simultaneously or fast charging of VR output
decoupling.
Title = Power Sequence
Security Classification Compal Secret Data Compal Electronics, Inc.
2. Platform devices other than SOC sequencing are not Issued Date 2013/04/12 Deciphered Date 2014/04/12 Title
explicitly shown as they are not limited by the SOC THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Power Sequence
Size Document Number Rev
sequencing requirement. AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
C 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, March 25, 2014 Sheet 4 of 48
5 4 3 2 1
5 4 3 2 1
PCB
ZZZ1
LA-B001P
DAZ14000101
PCB@ Channel A Only
D
USOC1B Channel B open D
+1.35V +DDR_SOC_VREF
USOC1 USOC1 USOC1
1 2 USOC1 USOC1 USOC1
R6 1
4.7K_0402_1%
C1
1 2 .1U_0402_16V7K
R7 2
CPU CPU CPU
4.7K_0402_1% SA000078Z10 SA000079210 SA000079110 CPU CPU CPU
J1850@ J2850@ J1750@ SA00007KP20 SA00007M520 SA00007KQ20
J1900@ J2900@ J1800@
USOC1C
5
C28 1.8V 1.8V DDI1_DDCCLK G30 UMA@ 1 2 U1 @
<24> HDMI_DDCCLK DDI0_DDCCLK DIS@ R732 1 2 100K_0402_5% 1
P
B28 N30 DDI1_ENVDD DIS@ R731 100K_0402_5% NC 4ENBKL
DDI0_VDDEN 1.8V DDI1_VDDEN Y ENBKL <32>
C27 1.8V J30 DDI1_ENBKL DDI1_ENBKL 2
DDI0_BKLTEN DDI1_BKLTEN A
G
B26 1.8V M30 DDI1_PWM
DDI0_BKLTCTL DDI1_BKLTCTL NL17SZ07DFT2G_SC70-5
3
AH3 SA00004BV00
1 R9 2 DDI0_RCOMPP AK12 VSS_AH3 AH2
DDI0_RCOMP_P VSS_AH2
Follow CRB v1.15 0ohm till to GND
402_0402_1% DDI0_RCOMPN AK13
AM14 DDI0_RCOMP_N AH14 +1.8VS
AM13 RESERVED_AM14 RESERVED_AH14 AH13
AM3 RESERVED_AM13 RESERVED_AH13 AF14
VSS_AM3 RESERVED_AF14
5
Follow CRB v1.15 0ohm till to GND AM2 AF13 U2 UMA@
VSS_AM2 RESERVED_AF13 1
P
BA3 NC 4
C VGA_RED Y INVT_PWM_SOC <25> C
AY2 DDI1_PWM 2
VGA_BLUE A
G
BA1
VGA_GREEN AW1 NL17SZ07DFT2G_SC70-5
3
VGA_IREF AY3 SA00004BV00
VGA_IRTN UMA@ RP3
3.3V BD2 DDI1_ENBKL 8 1
C292 1
@EMC@ 2 .1U_0402_16V7K VGA_HSYNC BF2 DDI1_ENVDD 7 2 0504
3.3V VGA_VSYNC DDI1_PWM 6 3
C293 1
@EMC@ 2 .1U_0402_16V7K 3.3V BC1 R24 @1 2 0_0402_5% 5 4
VGA_DDCCLK BC2 R25 @1 2 0_0402_5%
3.3V VGA_DDCDATA
C294 1
@EMC@ 2 .1U_0402_16V7K 100K_0804_8P4R_5%
T2 T7
C295 1
@EMC@ 2 .1U_0402_16V7K T3 RESERVED_T2 RESERVED_T7 T9
AB3 RESERVED_T3 RESERVED_T9 AB13
AB2 RESERVED_AB3 RESERVED_AB13 AB12
Y3 RESERVED_AB2 RESERVED_AB12 Y12
Y2 RESERVED_Y3 RESERVED_Y12 Y13
W3 RESERVED_Y2 RESERVED_Y13 V10
W1 RESERVED_W3 RESERVED_V10 V9
V2 RESERVED_W1 RESERVED_V9 T12
V3 RESERVED_V2 RESERVED_T12 T10
R3 RESERVED_V3 RESERVED_T10 V14
R1 RESERVED_R3 RESERVED_V14 V13
+1.8VS AD6 RESERVED_R1 RESERVED_V13 T14
B B
AD4 RESERVED_AD6 RESERVED_T14 T13
AB9 RESERVED_AD4 RESERVED_T13 T6
RESERVED_AB9 RESERVED_T6
1
AB7 T4
@ Y4 RESERVED_AB7 RESERVED_T4 P14
R10 Y6 RESERVED_Y4 RESERVED_P14
10K_0402_5% V4 RESERVED_Y6 F34
V6 RESERVED_V4 GPIO_S0_NC_15 M32
2
AB14 K34
GPIO_NC12 B30 RESERVED_AB14 GPIO_S0_NC_19 D34
T2 GPIO_S0_NC_12 GPIO_S0_NC_20
R11 C30 F32
10K_0402_5% RESERVED_C30 GPIO_S0_NC_21 F28
GPIO_S0_NC_22 K28
2
GPIO_S0_NC_23 J34
GPIO_S0_NC_24 N32
GPIO_S0_NC_25 D32
3 OF 10 GPIO_S0_NC_26
Follow CRB v1.15
VALLEYVIEW-M_FCBGA1170
@
GPIO_S0_NC[13]:
Multiplexed with Hardware Straps Pin:MDSI_DDCDATA
A A
USOC1D
1
AK9 1 2 +1.0VS
RESERVED_AK9 AK7
RESERVED_AK7 R16 R17
C24 H_PROCHOT# <32> 10K_0402_5% 10K_0402_5%
4 OF 10 PROCHOT#
Internal PD 2K EC programing :
2
2 GPIO_S0_SC_63 GPIO_S0_SC_65 "High"for Flash BIOS
VALLEYVIEW-M_FCBGA1170 EMC@
1
B @ C17 D B
10P_0402_50V8J 2 TXE_DBG <32>
+1.8VS 1 G
S Q1
3
R18 NTS4001NT1G-SC70-3
10K_0402_5%
1 2
Pull High 10k at LED Page
2
G
1 3 SATA_LED#_SOC
<33> SOC_SATALED#
D
C260@ Q2
NTS4001NT1G-SC70-3
A A
+1.8VALW +3VS
+1.8VALW
XTAL_25M_IN
1
1
1
R19 R20
5
Y1 1M_0402_5% R724 U3 4.7K_0402_5%
25MHZ_10PF_7V25000014 2.2K_0402_5% 1.8V 1 3.3V
2
NC 4
PLT_RST_BUF# <16,26,28,32,33>
2
1 3 XTAL_25M_OUT D25 PMC_PLTRST# 2 Y
1 3 A
G
1 1 PMC_ACIN 2 1 ACIN <32>
GND GND NL17SZ07DFT2G_SC70-5
3
C18 C19 DB2J31400L_SOD323-2 SA00004BV00
10P_0402_50V8J 2 4 10P_0402_50V8J
2 2
D PLT_RST Buffer D
USOC1E
2
G
BH8 B10 EC_RSMRST# PMC_CORE_PWROK 1 2 BSS138W-7-F_SOT323-3
PMC_PLT_CLK_3 / GPIO_S0_SC_99 PMC_RSMRST# EC_RSMRST# <13,32>
BH6 B7 PMC_CORE_PWROK C23 EMC@ SB000005N00
BJ9 PMC_PLT_CLK_4 / GPIO_S0_SC_100 PMC_CORE_PWROK 3.3V plane .1U_0402_16V7K SOC_KBRST# 3 1 EC_KBRST#
C PMC_PLT_CLK_5 / GPIO_S0_SC_101 +1.0VS EC_KBRST# <32> C
D
RTC domain
C9 ILB_RTC_X1
D14 ILB_RTC_X1 A9 ILB_RTC_X2
<13> XDP_H_TCK TAP_TCK ILB_RTC_X2
1
G12 B8 ILB_RTC_EXTPAD 1 2
<13> XDP_H_TRST# TAP_TRST# ILB_RTC_EXTPAD
F14 P22 EMC@C24
EMC@ C24 R26 Q41
<13> XDP_H_TMS TAP_TMS RTC_VCC_P22
2
G
F12 +RTCVCC .1U_0402_16V7K 73.2_0402_1% BSS138W-7-F_SOT323-3
<13> XDP_H_TDI TAP_TDI
G16 SB000005N00
<13> XDP_H_TDO TAP_TDO
D18 SOC_SMI# 3 1 EC_SMI# EC_SMI# <32>
<13> XDP_H_PRDY#
2
F16 TAP_PRDY# B24 VR_SVID_ALERT#_SOC R27 1 2 20_0402_1%
D
<13> XDP_H_PREQ_BUF# TAP_PREQ# SVID_ALERT# VR_SVID_ALERT# <43>
AT34 A25 VR_SVID_DATA_SOC R28 1 2 16.9_0402_1%
RESERVED_AT34 SVID_DATA VR_SVID_DATA <43>
C25
SVID_CLK VR_SVID_CLK <43>
RP11 SOC_SPI_CS0# C23
SPI_CS0# 1 8 SOC_SPI_CS0# T9 C21 PCU_SPI_CS_0# Q42
PCU_SPI_CS_1# / GPIO_S5_21
2
G
SPI_MISO 2 7 SOC_SPI_MISO SOC_SPI_MISO B22 AU32 BSS138W-7-F_SOT323-3
SPI_CLK 3 6 SOC_SPI_CLK SOC_SPI_MOSI A21 PCU_SPI_MISO SIO_PWM_0 / GPIO_S0_SC_94 AT32 SB000005N00
SPI_MOSI 4 5 SOC_SPI_MOSI SOC_SPI_CLK C22 PCU_SPI_MOSI SIO_PWM_1 / GPIO_S0_SC_95 SOC_SCI# 3 1 EC_SCI#
PCU_SPI_CLK <7> SOC_SCI# EC_SCI# <32>
D
22_0804_8P4R_5%
B18
B16 GPIO_S5_0 K24 ILB_RTC_X1
C18 GPIO_S5_1 / PMC_WAKE_PCIE_1 GPIO_S5_22 N24 ILB_RTC_X2
GPIO_S5_2 / PMC_WAKE_PCIE_2 GPIO_S5_23 XDP_OBSDATA_A0 <13> +1.8VALW +1.8VS
<26> SOC_PCIE_WAKE# A17 M20 1 2
GPIO_S5_3 / PMC_WAKE_PCIE_3 GPIO_S5_24 XDP_OBSDATA_A1 <13>
C17 J18 R29
GPIO_S5_4 GPIO_S5_25 XDP_OBSDATA_A2 <13> +3VLP
C16 M18 10M_0402_5%
GPIO_S5_5 / PMU_SUSCLK_1 GPIO_S5_26 XDP_OBSDATA_A3 <13>
B14 K18 RP14 RP10
SOC_SMI# C15 GPIO_S5_6 / PMU_SUSCLK_2 GPIO_S5_27 K20 32.768KHZ_12.5PF_Q13FC1350000500 10K_0804_8P4R_5% 10K_0804_8P4R_5%
GPIO_S5_7 / PMU_SUSCLK_3 GPIO_S5_28 M22 Y2 1 2 1 8 SOC_KBRST# 1 8 EC_KBRST#
GPIO_S5_29 M24 2 7 SOC_SCI# 2 7 EC_SMI#
GPIO_S5_30 3 6 SOC_SMI# 3 6 EC_SCI#
1 1
C13 SJ10000EC00 4 5 4 5
A13 GPIO_S5_8 C25 C26
C19 GPIO_S5_9 AV32
GPIO_S5_10 SIO_SPI_CS# / GPIO_S0_SC_66 18P_0402_50V8J 18P_0402_50V8J
BA28 2 2
SIO_SPI_MISO / GPIO_S0_SC_67 AY28
1 R30 2 GPIO_RCOMP N26 SIO_SPI_MOSI / GPIO_S0_SC_68 AY30
49.9_0402_1% GPIO_RCOMP 5 OF 13 SIO_SPI_CLK / GPIO_S0_SC_69
+3VALW +1.35VS +1.8VALW
VALLEYVIEW-M_FCBGA1170 1.8V 3.3V
@ Q43
2
G
BSS138W-7-F_SOT323-3
R31 SB000005N00
10K_0402_5% PMC_PCIE_WAKE# 3 1 WLAN_PME#
WLAN_PME# <28>
5
U4
D
B B
3.3V 1 1.35V
2
NC 4
+BIOS_SPI +1.8VALW Y DDR_CORE_PWROK <5>
2
<13,32> PMC_CORE_PWROK A
G
SPI ROM ( 8MByte ) 1.8V
R32 1 2 0_0402_5% NL17SZ07DFT2G_SC70-5
3
+BIOS_SPI @ SA00004BV00
C27 1 2 .1U_0402_16V7K
1
U5 +RTCVCC
@ R33 1 2 3.3K_0402_5% SPI_CS0# 1 8 R34 1 2 3.3K_0402_5% C28
SPI_MISO 2 CS# VCC 7 SPI_HOLD# R36
SO HOLD# 1U_0402_6.3V6K
R35 1 2 3.3K_0402_5% SPI_WP# 3 6 SPI_CLK 20K_0402_1% 2
4 WP# SCLK 5 SPI_MOSI 1 2 RTC_TEST#
GND SI 1 2 RTC_RST#
W25Q64FVSSIQ_SO8 R37
SA00006ZV00 Reserve for EMI(Near SPI ROM) 20K_0402_1% 1 Check Intel
1
@
C29 CLRP1
1U_0402_6.3V6K SHORT PADS
2
1 2 2 1 SPI_CLK 2
C30 @EMC@ R38 @EMC@ Clear CMOS
10P_0402_50V8J 33_0402_5% RTC_RST
close to RAM door
0926 change
2
JBATT1
R39 Close To SOC <1000mil
+
1K_0402_5% +1.8VALW
47P_0402_50V8J
2 7 XDP_H_TCK
2
+RTCVCC 3 6 XDP_H_TMS
A A
4 5 XDP_H_TRST#
D1
1
BAV70W-7-F_SOT323-3 51_0804_8P4R_5%
-
1 XDP@
2
C31
.1U_0402_16V7K LOTES_AAA-BAT-054-K01
2
CONN@
USOC1F
D D
G2 M10
+1.8VALW GPIO_S5_31 RESERVED_M10 M9
RESERVED_M9
Board ID UD M3
GPIO_S5_32 RESERVED_P6
P6
2
DIS/UMA Select L1 P7
K2 GPIO_S5_33 RESERVED_P7
Ra R299 UMA@ SW needed K3 GPIO_S5_34
4.7K_0402_5% M2 GPIO_S5_35 M7
N3 GPIO_S5_36 RESERVED_M7 M12 USB3_REXT0 1 2
1
1 P12
RESERVED_P12
R330 DIS@ C425 UMA@ M4
Rb RESERVED_M4
4.7K_0402_5% .01U_0402_16V7K J3 M6
2 P3 GPIO_S5_40 RESERVED_M6
1
H3 GPIO_S5_41 D4
GPIO_S5_42 USB3_RXP0 PCH_USB3_RX0_P <30>
B12 E3
GPIO_S5_43 USB3_RXN0 PCH_USB3_RX0_N <30>
K6
USB3 Port 0
USB3_TXP0 PCH_USB3_TX0_P <30>
M16 K7
<30> USB20_P0 USB_DP0 USB3_TXN0 PCH_USB3_TX0_N <30>
USB2 Port 0 (USB3.0 P0) K16
<30> USB20_N0 USB_DN0
J14
<30> USB20_P1 USB_DP1
USB 2.0 G14
<30> USB20_N1 USB_DN1
Card reader / Hub USB20_P2 K12
(ForTouch Panel, Card <31> USB20_P2 USB_DP2
USB20_N2 J12
<31> USB20_N2 USB_DN2
reader) K10
<31> USB20_P3 USB_DP3
USB Hub H10 H8
<31> USB20_N3 USB_DN3 RESERVED_H8 H7
RESERVED_H7
1K_0402_1% 1 2 R46 ICLK_USB_TERMP D10
1K_0402_1% 1 2 R47 ICLK_USB_TERMN F10 ICLK_USB_TERMP H4
ICLK_USB_TERMN RESERVED_H4 H5 +1.8VS
RESERVED_H5
C C
USB_OC0# C20
<30> USB_OC0# USB_OC_0# / GPIO_S5_19
1
USB_OC1# B20 @
<30> USB_OC1# USB_OC_1# / GPIO_S5_20 R48
+1.8VALW 10K_0402_5%
2
R51 1 2 10K_0402_5% USB_OC1# 45.3_0402_1% C7 USB_RCOMPO GPIO_S0_SC_55 BC12 GPIO_S0_SC_56
USB_RCOMPI GPIO_S0_SC_56 A16 Swap Override
BD14 DBG_UART_TXD T10
GPIO_S0_SC_57 / PCU_UART_TXD 0 = Enable
1
BC14 @
R52 @1
@ 2 USB_PLL_MON M13 GPIO_S0_SC_58 BF14 R53 1 = Disable
0_0402_5% USB_PLL_MON GPIO_S0_SC_59 BD16 Reference EDS Page 216
GPIO_S0_SC_60 10K_0402_5%
BC16 DBG_UART_RXD T11
GPIO_S0_SC_61 / PCU_UART_RXD
2
B4
B5 USB_HSIC0_DATA BH12 SOC_SPKR
USB_HSIC0_STROBE ILB_8254_SPKR / GPIO_S0_SC_54 SOC_SPKR <15>
E2
D2 USB_HSIC1_DATA
NOTE: Ref checklist rev1.0 p.25 USB_HSIC1_STROBE BH22
USB_HSIC_RCOMP must NOT float if they are not being used. SIO_I2C0_DATA / GPIO_S0_SC_78 BG23
1 2 HSIC_RCOMP A7 SIO_I2C0_CLK / GPIO_S0_SC_79
R54 45.3_0402_1% USB_HSIC_RCOMP
BG24
SIO_I2C1_DATA / GPIO_S0_SC_80 BH24
49.9_0402_1%
49.9_0402_1%1 2 R55 LPC_RCOMP BF18 SIO_I2C1_CLK / GPIO_S0_SC_81
BH16 LPC_RCOMP / VGA_RCOMP
<32,33> LPC_AD0 ILB_LPC_AD_0 / GPIO_S0_SC_42
BJ17 BG25
<32,33> LPC_AD1 ILB_LPC_AD_1 / GPIO_S0_SC_43 SIO_I2C2_DATA / GPIO_S0_SC_82
ILB_LPC_CLK_0 : Output of 25MHz, BJ13 BJ25
<32,33> LPC_AD2 ILB_LPC_AD_2 / GPIO_S0_SC_44 SIO_I2C2_CLK / GPIO_S0_SC_83
Need Check with EC BG14
<32,33> LPC_AD3 ILB_LPC_AD_3 / GPIO_S0_SC_45
BG17
<32,33> LPC_FRAME# ILB_LPC_FRAME# / GPIO_S0_SC_46
22_0402_5% 1 2 R56 LPC_CLK_0 BG15 BG26
<32> LPC_CLK_EC ILB_LPC_CLK_0 / GPIO_S0_SC_47 SIO_I2C3_DATA / GPIO_S0_SC_84
ILB_LPC_CLK_1 is for CLK_0 feedback.(Input) 22_0402_5% 1 2 R57 LPC_CLK_1 BH14 BH26
<33> LPC_CLK_TPM ILB_LPC_CLK_1 / GPIO_S0_SC_48 SIO_I2C3_CLK / GPIO_S0_SC_85
Set to Outpot for Normal Usage LPC_CLKRUN# BG16
BG13 ILB_LPC_CLKRUN# / GPIO_S0_SC_49
<8> SOC_SERIRQ ILB_LPC_SERIRQ / GPIO_S0_SC_50 BF27
SIO_I2C4_DATA / GPIO_S0_SC_86 BG27
B SIO_I2C4_CLK / GPIO_S0_SC_87 B
+3VS
BH28 SOC_I2C0_DATA T37
PCU_SMB_DATA BG12 SIO_I2C5_DATA / GPIO_S0_SC_88 BG28 SOC_I2C0_CLK T38
PCU_SMB_DATA / GPIO_S0_SC_51 SIO_I2C5_CLK / GPIO_S0_SC_89
2
PCU_SMB_CLK BH10
R58 PCU_SMB_ALERT# BG11 PCU_SMB_CLK / GPIO_S0_SC_52
Check Intel for PU PCU_SMB_ALERT# / GPIO_S0_SC_53
8.2K_0402_5% BJ29
SIO_I2C6_DATA / GPIO_S0_SC_90 BG29
SIO_I2C6_CLK / GPIO_S0_SC_91 / SD3_WP
0705 : Reserved
1
LPC_CLKRUN#
2 1 LPC_CLK_1 BH30 GPIO_S0_SC_92 T12
C33 @EMC@ GPIO_S0_SC_092 BG30 GPIO_S0_SC_93 T13
GPIO_S0_SC_093
PDA (Platform Debug Assistant) Test Points
10P_0402_50V8J 6 OF 13
VALLEYVIEW-M_FCBGA1170
@
+3VS
2
R374
+1.8VS +1.8VS 200K_0402_5%
RP13
+3VS 5 4 PCU_SMB_CLK 1 2 C429 .1U_0402_16V7K
1
6 3 PCU_SMB_DATA
R335 2 1 7 2 PCU_SMB_ALERT#
2.2K_0402_5% 8 1
8
2 7
SMB_CK2 1 3 @ PCU_SMB_CLK VREF1 VREF2
<14> SMB_CK2
Q11 PCU_SMB_CLK 3 6 SMB_CK2
D
SCL1 SCL2
2
NTS4001NT1G-SC70-3
G
PCU_SMB_DATA 4 5 SMB_DA2
SMB_DA2 1 3 @ PCU_SMB_DATA SDA1 SDA2
GND
<14> SMB_DA2
A Q12 A
D
NTS4001NT1G-SC70-3
PCA9306DCUR_VSSOP8
1
+1.35V
15000mA +SOC_VCC USOC1G
D +DRAM_VDD_S4_CLK For EVT measurement D
AA27 AD38 +DRAM_VDD_S4_CLK R59 1 2 0_0402_5%
AA29 CORE_VCC_S0iX_AA27 DRAM_VDD_S4_AD38 AF38 @
AA30 CORE_VCC_S0iX_AA29 DRAM_VDD_S4_AF38 20mil
AC27 CORE_VCC_S0iX_AA30 A48 C34 1 2 1U_0402_6.3V6K
AC29 CORE_VCC_S0iX_AC27 DRAM_VDD_S4_A48 AK38 C35 1 2 .1U_0402_16V7K
AC30 CORE_VCC_S0iX_AC29 DRAM_VDD_S4_AK38 AM38
CORE_VCC_S0iX_AC30 DRAM_VDD_S4_AM38 AV41
AD27 DRAM_VDD_S4_AV41 AV42
AD29 CORE_VCC_S0iX_AD27 DRAM_VDD_S4_AV42 BB46
AD30 CORE_VCC_S0iX_AD29 DRAM_VDD_S4_BB46 BD49
AF27 CORE_VCC_S0iX_AD30 DRAM_VDD_S4_BD49 BD52
AF29 CORE_VCC_S0iX_AF27 DRAM_VDD_S4_BD52 BD53
AG27 CORE_VCC_S0iX_AF29 DRAM_VDD_S4_BD53 BF44
AG29 CORE_VCC_S0iX_AG27 DRAM_VDD_S4_BF44 BG51
AG30 CORE_VCC_S0iX_AG29 DRAM_VDD_S4_BG51 BJ48 C36 2 1 2.2U_0402_6.3V6M
P26 CORE_VCC_S0iX_AG30 DRAM_VDD_S4_BJ48 C51 C37 2 1 2.2U_0402_6.3V6M
P27 CORE_VCC_S0iX_P26 DRAM_VDD_S4_C51 D44 C38 2 1 2.2U_0402_6.3V6M
U27 CORE_VCC_S0iX_P27 DRAM_VDD_S4_D44 F49 C39 2 1 2.2U_0402_6.3V6M
U29 CORE_VCC_S0iX_U27 DRAM_VDD_S4_F49 F52
V27 CORE_VCC_S0iX_U29 DRAM_VDD_S4_F52 F53
V29 CORE_VCC_S0iX_V27 DRAM_VDD_S4_F53 H46
V30 CORE_VCC_S0iX_V29 DRAM_VDD_S4_H46 M41 1 2
+
Y27 CORE_VCC_S0iX_V30 DRAM_VDD_S4_M41 M42 @ C489 150U_B2_6.3V-M
C CORE_VCC_S0iX_Y27 DRAM_VDD_S4_M42 C
Y29 V38
Y30 CORE_VCC_S0iX_Y29 DRAM_VDD_S4_V38 Y38
CORE_VCC_S0iX_Y30 DRAM_VDD_S4_Y38
VALLEYVIEW-M_FCBGA1170
R62 @
100_0402_1%
2
+SOC_VNN
1 1 1 1
C528 C529 C530 C531
RF@
RF@
22P_0402_50V8J
RF@ RF@
.1U_0402_16V7K
2 2 2 2
2200P_0402_25V7K
6.8P_0402_50V8C
A A
D D
Follow CRBv1.15
USOC1H +1.05VS
202mA +1.05VS_SOC
+1.0VALW U22 AC32 +1.05VS_SOC R63 1 2 0_0402_5%
UNCORE_V1P0_G3_U22 CORE_V1P0_S3_AC32
EMC@ C305
EMC@ C306
EMC@ C307
1 1 1 UNCORE_V1P0_G3 1uF*4 V22 Y32 @ C302 1 2 1U_0402_6.3V6K
C53 1 2 1U_0402_6.3V6K C5 UNCORE_V1P0_G3_V22 CORE_V1P0_S3_Y32
C54 1 2 1U_0402_6.3V6K B6 UNCORE_V1P0_G3_C5 AA33 C303 1 2 0.1U_0402_16V4Z
C55 1 2 1U_0402_6.3V6K UNCORE_V1P0_G3_B6 CORE_V1P05_S3_AA33 AF33 EMC@
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2 2 2 C51 1 2 1U_0402_6.3V6K Y19 CORE_V1P05_S3_AF33 AG33 C56 1 2 0.47U_0402_6.3V6K
C3 USB3_V1P0_G3_Y19 CORE_V1P05_S3_AG33 AG35
C52 1 2 0.01U_0402_16V7K USB3_V1P0_G3_C3 CORE_V1P05_S3_AG35 U33 C57 1 2 1U_0402_6.3V6K
USB3_V1P0_G3 0.01uF*1 CORE_V1P05_S3_U33 U35 @ C58 1 2 1U_0402_6.3V6K CORE_V1P05_S3 1uF*3
CORE_V1P05_S3_U35 V33 C59 1 2 1U_0402_6.3V6K
5487mA CORE_V1P05_S3_V33
+1.0VS V32
SVID_V1P0_S3_V32 +1.8VALW
EMC@ C309
EMC@ C310
1 1 BJ6 720mA
AD35 VGA_V1P0_S3_BJ6
EMC@ DRAM_V1P0_S0iX 1uF*4 AF35 DRAM_V1P0_S0iX_AD35 U24
1 DRAM_V1P0_S0iX_AF35 UNCORE_V1P8_G3_U24
C296 C60 1 2 1U_0402_6.3V6K AF36 V25 C311 1 2 0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
BayTrail-D Power2
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, March 25, 2014 Sheet 11 of 48
5 4 3 2 1
5 4 3 2 1
D D
VALLEYVIEW-M_FCBGA1170
@
A A
+1.8VALW
1
XDP@
R66
200_0402_5% +3VS
2
XDP_H_PREQ_BUF#
Thermal Sensor
2
D D
@ R727
51_0402_5%
XDP_RSTBTN#
U38 @
1
+1.8VALW 1 2 1 2 @ C521 1 2 VDD_T_2V85 1 8 EC_SMB_CK2_TH @ 1 2
VDD SCLK EC_SMB_CK2 <16,28,32>
R67 @ C92 XDP@ .1U_0402_16V7K R186 0_0402_5%
1K_0402_5% .1U_0402_16V7K @ D+ 2 7 EC_SMB_DA2_TH @ 1 2
EC
D+ SDATA EC_SMB_DA2 <16,28,32>
1000P_0402_50V7K
C522
2 R187 0_0402_5%
3 6 R103 1 2 0_0402_5% EC_SMB_ALERT# <32>
D- ALERT/THERM2 @
1
@ Q55 C 4 5 1 2 +3VS
+1.8VALW SB000006A00 2 1 D- THERM GND R728 10K_0402_5%
XDP@ MMBT3904_NL_SOT23-3 B
R68 1 2 51_0402_5% XDP_H_TDO E ADM1032ARMZ-2R MSOP8
3
SA010320120 main source:SA010320120
TDO Close To XDP Conn >250 mil Place near SOC Second source:SA00003PU00
XDP-SFF-26Pin
CONN@
JDB1
XDP_H_PREQ_BUF# 1
<8> XDP_H_PREQ_BUF# 1
XDP_H_PRDY# 2
<8> XDP_H_PRDY# 2
3
XDP_OBSDATA_A0 4 3
<8> XDP_OBSDATA_A0 4
XDP_OBSDATA_A1 5
<8> XDP_OBSDATA_A1 5
6
XDP_OBSDATA_A2 7 6
<8> XDP_OBSDATA_A2 7
XDP_OBSDATA_A3 8
<8> XDP_OBSDATA_A3 8
9
EC_RSMRST# 10 9
<32,8> EC_RSMRST# 10
11
PMC_CORE_PWROK 12 11
<32,8> PMC_CORE_PWROK 12
B RTC_TEST# 13 B
<8> RTC_TEST# 13
14
15 14
16 15
+1.8VALW 16
PMC_PLTRST# 17
<8> PMC_PLTRST# 17
XDP_RSTBTN# 18
<8> XDP_RSTBTN# 18
19
XDP_H_TDO 20 19
<8> XDP_H_TDO 20
XDP_H_TRST# 21
<8> XDP_H_TRST# 21
XDP_H_TDI 22
<8> XDP_H_TDI 22
XDP_H_TMS 23
<8> XDP_H_TMS 23
24
25 24 27
XDP_H_TCK 26 25 G1 28
<8> XDP_H_TCK 26 G2
MOLEX_52435-2671_26P_P0.5
PCB Footprint = MOLEX_52435-2671_26P-T
A A
+1.35V +DDR_A_VREF_DQ
1 2
R69
4.7K_0402_1% 1
1 2
R70 C100 +DDR_A_VREF_DQ +1.35V +1.35V
4.7K_0402_1% .1U_0402_16V7K
2 JDIMM1
1 15mil 1 2 1
3 VREF_DQ VSS 4 DDR_A_D4
DDR_A_D0 5 VSS DQ4 6 DDR_A_D5
DDR_A_D1 7 DQ0 DQ5 8
9 DQ1 VSS 10 DDR_A_DQS#0
DDR_A_DM0 11 VSS DQS0# 12 DDR_A_DQS0
13 DM0 DQS0 14
DDR_A_D[0..63] DDR_A_D2 15 VSS VSS 16 DDR_A_D6
DDR_A_D[0..63] <5> DQ2 DQ6
DDR_A_D3 17 18 DDR_A_D7
DDR_A_MA[0..15] 19 DQ3 DQ7 20
DDR_A_MA[0..15] <5> VSS VSS
DDR_A_D8 21 22 DDR_A_D12
DDR_A_DM[7..0] DDR_A_D9 23 DQ8 DQ12 24 DDR_A_D13
DDR_A_DM[0..7] <5> DQ9 DQ13
25 26
DDR_A_DQS[7..0] DDR_A_DQS#1 27 VSS VSS 28 DDR_A_DM1
DDR_A_DQS[0..7] <5> DQS1# DM1
DDR_A_DQS1 29 30 DDR_A_RST#
DDR_A_DQS#[7..0] DQS1 RESET# DDR_A_RST# <5>
31 32
DDR_A_DQS#[0..7] <5> VSS VSS
DDR_A_D10 33 34 DDR_A_D14 1
DDR_A_D11 35 DQ10 DQ14 36 DDR_A_D15
37 DQ11 DQ15 38 C148
DDR_A_D16 39 VSS VSS 40 DDR_A_D20
DQ16 DQ20 .1U_0402_16V7K
DDR_A_D17 41 42 DDR_A_D21 2
43 DQ17 DQ21 44
DDR_A_DQS#2 45 VSS VSS 46 DDR_A_DM2
DDR_A_DQS2 47 DQS2# DM2 48
49 DQS2 VSS 50 DDR_A_D22
DDR_A_D18 51 VSS DQ22 52 DDR_A_D23
DDR_A_D19 53 DQ18 DQ23 54
55 DQ19 VSS 56 DDR_A_D28
DDR_A_D24 57 VSS DQ28 58 DDR_A_D29
DDR_A_D25 59 DQ24 DQ29 60
61 DQ25 VSS 62 DDR_A_DQS#3
DDR_A_DM3 63 VSS DQS3# 64 DDR_A_DQS3
65 DM3 DQS3 66
DDR_A_D26 67 VSS VSS 68 DDR_A_D30
DDR_A_D27 69 DQ26 DQ30 70 DDR_A_D31
71 DQ27 DQ31 72
VSS VSS
2 2
DDR_A_CKE0 73 74 DDR_A_CKE2
<5> DDR_A_CKE0 CKE0 CKE1 DDR_A_CKE2 <5>
75 76
77 VDD VDD 78 DDR_A_MA15
DDR_A_BS2 79 NC A15 80 DDR_A_MA14
<5> DDR_A_BS2 BA2 A14
81 82
DDR_A_MA12 83 VDD VDD 84 DDR_A_MA11
DDR_A_MA9 85 A12/BC# A11 86 DDR_A_MA7
87 A9 A7 88
DDR_A_MA8 89 VDD VDD 90 DDR_A_MA6
DDR_A_MA5 91 A8 A6 92 DDR_A_MA4
93 A5 A4 94
DDR_A_MA3 95 VDD VDD 96 DDR_A_MA2
DDR_A_MA1 97 A3 A2 98 DDR_A_MA0
99 A1 A0 100
DDR_A_CLK0 101 VDD VDD 102 DDR_A_CLK2
<5> DDR_A_CLK0 CK0 CK1 DDR_A_CLK2 <5>
DDR_A_CLK0# 103 104 DDR_A_CLK2#
<5> DDR_A_CLK0# CK0# CK1# DDR_A_CLK2# <5>
105 106
DDR_A_MA10 107 VDD VDD 108 DDR_A_BS1
A10/AP BA1 DDR_A_BS1 <5>
DDR_A_BS0 109 110 DDR_A_RAS#
<5> DDR_A_BS0 BA0 RAS# DDR_A_RAS# <5>
111 112
DDR_A_WE# 113 VDD VDD 114 DDR_A_CS0#
<5> DDR_A_WE# WE# S0# DDR_A_CS0# <5>
DDR_A_CAS# 115 116 DDR_A_ODT0
<5> DDR_A_CAS# CAS# ODT0 DDR_A_ODT0 <5>
117 118
DDR_A_MA13 119 VDD VDD 120 DDR_A_ODT2
A13 ODT1 DDR_A_ODT2 <5>
DDR_A_CS2# 121 122 15mil
<5> DDR_A_CS2# 123 S1# NC 124
125 VDD VDD 126
TEST VREF_CA +DDR_A_VREF_CA
127 128
DDR_A_D32 129 VSS VSS 130 DDR_A_D36
DDR_A_D33 131 DQ32 DQ36 132 DDR_A_D37
133 DQ33 DQ37 134
DDR_A_DQS#4 135 VSS VSS 136 DDR_A_DM4
DDR_A_DQS4 137 DQS4# DM4 138 +DDR_A_VREF_CA +1.35V
139 DQS4 VSS 140 DDR_A_D38
DDR_A_D34 141 VSS DQ38 142 DDR_A_D39 2 1
DDR_A_D35 143 DQ34 DQ39 144 R71
145 DQ35 VSS 146 DDR_A_D44 4.7K_0402_1%
3 VSS DQ44 1 3
DDR_A_D40 147 148 DDR_A_D45 2 1
DDR_A_D41 149 DQ40 DQ45 150 C111 R72
151 DQ41 VSS 152 DDR_A_DQS#5 4.7K_0402_1%
VSS DQS5# .1U_0402_16V7K
DDR_A_DM5 153 154 DDR_A_DQS5 2
155 DM5 DQS5 156
DDR_A_D42 157 VSS VSS 158 DDR_A_D46
DDR_A_D43 159 DQ42 DQ46 160 DDR_A_D47
161 DQ43 DQ47 162
DDR_A_D48 163 VSS VSS 164 DDR_A_D52
DDR_A_D49 165 DQ48 DQ52 166 DDR_A_D53
167 DQ49 DQ53 168
DDR_A_DQS#6 169 VSS VSS 170 DDR_A_DM6
DDR_A_DQS6 171 DQS6# DM6 172
173 DQS6 VSS 174 DDR_A_D54
DDR_A_D50 175 VSS DQ54 176 DDR_A_D55
DDR_A_D51 177 DQ50 DQ55 178
179 DQ51 VSS 180 DDR_A_D60
DDR_A_D56 181 VSS DQ60 182 DDR_A_D61
DDR_A_D57 183 DQ56 DQ61 184 +1.35V
185 DQ57 VSS 186 DDR_A_DQS#7
DDR_A_DM7 187 VSS DQS7# 188 DDR_A_DQS7 C93 1 2 10U_0603_6.3V6M
189 DM7 DQS7 190 C94 1 2 10U_0603_6.3V6M
DDR_A_D58 191 VSS VSS 192 DDR_A_D62 C95 1 2 10U_0603_6.3V6M
DDR_A_D59 193 DQ58 DQ62 194 DDR_A_D63 C97 1 2 10U_0603_6.3V6M
195 DQ59 DQ63 196
197 VSS VSS 198
199 SA0 EVENT# 200
+3VS VDDSPD SDA SMB_DA2 <9>
201 202
1 <Address: 00> 203 SA1 SCL 204
+0.675VS
SMB_CK2 <9>
CD1 VTT VTT C98 1 2 .1U_0402_16V7K
.1U_0402_16V7K 205 206 C99 1 2 .1U_0402_16V7K
2 207 GND1 GND2 208 C101 1 2 .1U_0402_16V7K
BOSS1 BOSS2 C102 1 2 .1U_0402_16V7K
C103 1 2 .1U_0402_16V7K +0.675VS
FOX_AS0A621-N2S6-7H C104 1 2 .1U_0402_16V7K
C105 1 2 .1U_0402_16V7K C106 1 2 10U_0603_6.3V6M
CONN@ C107 1 2 .1U_0402_16V7K
4 4
C108 1 2 1U_0402_6.3V6K
1 2 C110 1 2 1U_0402_6.3V6K
+
C109 220U_D2_2VY_R17M
DIMM_A H:4mm Reverse--> STD 0809
Beep sound
EC Beep
1 R73 2
<32> EC_BEEP#
47K_0402_5%
1
L2
add 10u X 1 pcs
1
EMC@1 EMC@1 1
FCM1608KF-800T07_0603 C258 C259 R75
+5VS_PVDD
0.1U_0402_16V4Z
0.1U_0402_16V4Z
4.7K_0402_5% C113
0.1U_0402_16V4Z
2
+5VS +HD_AVDD 0.1U_0402_16V4Z 2 2 2
2
L3 0.1U_0402_16V4Z
2 1 1 1 1 1 1 1 1
1 1 1 1 C119 C122 C135
FCM1608KF-800T07_0603 C114 C118 C120 C121 C123
10U_0805_10V4Z C115 C117
C116 @ 0.1U_0402_16V4Z 2 2 2 0.1U_0402_16V4Z 2 2 2 0.1U_0402_16V4Z
2
2 2 2 2 +1.5VS
10U_0603_6.3V6M 10U_0603_6.3V6M 10U_0603_6.3V6M
0.1U_0402_16V4Z 100P_0402_50V8J
1 1
MIC1_R 1 2
MIC1_L 1 2
U6
C126
0.1U_0402_16V4Z
C127
10U_0603_6.3V6M
6/26 Vender Suggest
C125 4.7U_0603_10V6K 2 2 +MIC1_VREFO_L +MIC1_VREFO_R
C124 4.7U_0603_10V6K MIC1_R_C 22 1
MIC1_L_C 21 MIC1_R DVDD 9 +HD_AVDD
MIC1_L DVDD_IO
17 25 +5VS_PVDD +5VS
16 MIC2_R AVDD1 38
MIC2_L AVDD2
+MIC1_VREFO_L 31 39 R76 1 2 0_0402_5%
MIC1_VREFO_L PVDD1 +3VS
6/26 Vender Suggest
2 30 46 @ 2
+MIC1_VREFO_R MIC1_VREFO_R PVDD2
29
MIC2_VREFO
EXT MIC IN
1
15 45 SPKOUT_R+
LINE2_R SPK_OUT_R+ SPKOUT_R+ <27>
NC 14 44 SPKOUT_R- @R77
@ R77
LINE2_L SPK_OUT_R- SPKOUT_R- <27>
1
EMC@ C255 0.1U_0402_16V4Z HDA_RST_AUDIO# Internal Speaker R78 R79 100K_0402_5% JMIC1 CONN@
NC 20 40 SPKOUT_L+ 4.7K_0402_5% 4.7K_0402_5% 5 8
SPKOUT_L+ <27>
2
MONO_OUT SPK_OUT_L+ 41 SPKOUT_L-
GND
SPK_OUT_L- SPKOUT_L- <27>
MONO_IN 12 1K_0402_5% MIC_DET# 4 7
2
PCBEEP R80 L4
GND
HDA_SYNC_AUDIO 10 33 HP_RIGHT MIC1_R 2 1 MIC1_R_R1 1 2 MIC1_R_R 3
<7> HDA_SYNC_AUDIO SYNC HPOUT_R 32 HP_LEFT FBM-11-160808-601-T_0603 6
HDA_RST_AUDIO# 11 HPOUT_L MIC1_L 2 1 MIC1_L_R1 1 2 MIC1_L_R 2
<7> HDA_RST_AUDIO# RESET# L5 EMC@ 1 1 EMC@ 1
10U_0603_6.3V6M 1 2 C128 5 HDA_SDOUT_AUDIO R81 FBM-11-160808-601-T_0603 C129 C130
SDATA_OUT HDA_SDOUT_AUDIO <7>
8 HDA_SDIN0_AUDIO 1 2 1K_0402_5%
SDATA_IN HDA_SDIN0 <7>
330P_0402_50V7K
330P_0402_50V7K
259JDREF 10 mil 19 33_0402_5% Need
C131 0.1U_0402_16V4Z 28 JDREF 6 HDA_BITCLK_AUDIO R82 2 2
10 mil LDO_CAP BCLK HDA_BITCLK_AUDIO <7> 600 Ohm
1
+VREF +VREF 27
1 2 34 VREF R84 C134
CPVEE 500 mA
R83 C132 CBN 35 23 10_0402_5% 10P_0402_50V8J
20K_0402_1% 2.2U_0603_10V6K 1 2 CBP 36 CBN NC 24 1 2 1 2
CBP NC
0.1U_0402_16V7K
10 mil C133 48 @EMC@ @EMC@ 1 1
2
NC
C136
2.2U_0603_10V6K <EMI> C137
INT_DMIC_DATA 2 0.1U_0402_16V7K
<23> INT_DMIC_DATA GPIO0/DMIC_DATA
INT_DMIC_CLK_R 3 26 ESD request ESD request
GPIO1/DMIC_CLK AVSS1 37 2 2
R85 20K_0402_1% AVSS2 42
MIC_DET# 2 1 SENSE_A 13 PVSS1 43
HP_DET# 1 2 18 SENSE_A PVSS2 7 INT_DMIC_CLK_R 1 2 EMC@
SENSE_B DVSS INT_DMIC_CLK <23> D4
R86 39.2K_0402_1% EMC@L44
EMC@ L44 PBY160808T-221Y-N_2P
1
D3 47 C138 @EMC@ 2
<32> EAPD_CODEC EAPD
3 EC_MUTE# 1 2 PD# 4 49 <EMI> 27P_0402_50V8J 1 3
<32> EC_MUTE# PD# Thermal Pad 3
DB2J31400L_SOD323-2 2
+VREF ALC259-VC2-CG_MQFN48_6X6 PESD5V0U2BT_SOT23-3
1
C139 C140
10 mil
1U_0402_6.3V6K
0.1U_0402_16V4Z
JHP1 CONN@
2 2 5 8
GND
HP_DET# 4 7
GND
HP_DET# PR MIC1_R_R HP_RIGHT 1 2 HP_RIGHT_R 1 2 PR 3
R89 75_0603_1% L6 FBM-11-160808-601-T_0603 6
DGND To AGND Bypass 6/26 MIC_DET# PL MIC1_L_R HP_LEFT
R90
1 2 HP_LEFT_R
75_0603_1% L7
1 2
FBM-11-160808-601-T_0603
PL 2
1
1 2 Vender Suggest
2
2
R91 0_0603_5% Need
3
1 2 @R94
@ R94 @R95
@ R95 1 1
R92 0_0603_5% D5 D6 D7 600 Ohm
1 2 EMC@ EMC@ EMC@ 20K_0402_5% 20K_0402_5% 500 mA EMC@C141
EMC@C141 C142 EMC@
@R96
@ R96 0_0603_5% <EMI> <EMI> <EMI> 330P_0402_50V7K
1
1 2 330P_0402_50V7K 2 2
1
@R93
@ R93 0_0603_5% ESD request
C143
0.1U_0402_16V7K
2
DGND AGND
1
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
HDA-ALC259/HP/MIC
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, March 25, 2014 Sheet 15 of 48
A B C D E
A B C D E
+3VSG
RP48
AC_DETECT 1 8
GPU_EVENT 2 7
U7A OVERT#_VGA 3 6
Part 1 of 5 4 5
<7> PCIE_PTX_C_DRX_P0 PCIE_PTX_C_DRX_P0 AE12 N1 GPU_VID4
1 PEX_RX0 GPIO0 GPU_VID4 <45> 1
<7> PCIE_PTX_C_DRX_N0 PCIE_PTX_C_DRX_N0 AF12 G1 GPU_VID3 100K_0804_8P4R_5%
PEX_RX0_N GPIO1 GPU_VID3 <45>
<7> PCIE_PTX_C_DRX_P1 PCIE_PTX_C_DRX_P1 AG12 C1 VGA_LCD_PWM DIS@
PEX_RX1 GPIO2 VGA_LCD_PWM <23>
<7> PCIE_PTX_C_DRX_N1 PCIE_PTX_C_DRX_N1 AG13 M2 VGA_ENVDD
PEX_RX1_N GPIO3 VGA_ENVDD <23>
AF13 M3 VGA_BKOFF# RP15
PEX_RX2 GPIO4 VGA_BKOFF# <23>
AE13 K3 GPU_VID1 SMB_DATA_GPU 1 8
PEX_RX2_N GPIO5 GPU_VID1 <45>
AE15 K2 GPU_VID2 SMB_CLK_GPU 2 7
PEX_RX3 GPIO6 GPU_VID2 <45>
AF15 J2 VGA_EDID_DATA 3 6
AG15 PEX_RX3_N GPIO7 C2 VGA_EDID_CLK 4 5
OVERT#_VGA <32>
GPIO
AG16 PEX_RX4 GPIO8 M1 GPU_EVENT
AF16 PEX_RX4_N GPIO9 D2 2.2K_8P4R_5%
AE16 PEX_RX5 GPIO10 D1 GPU_VID0 DIS@
PEX_RX5_N GPIO11 GPU_VID0 <45>
AE18 J3 AC_DETECT
AF18 PEX_RX6 GPIO12 J1 GPU_VID5 RP16
PEX_RX6_N GPIO13 GPU_VID5 <45>
AG18 K1 VGA_CRT_DATA 1 8
AG19 PEX_RX7 GPIO14 F3 1 2 VGA_CRT_CLK 2 7
PEX_RX7_N GPIO15 VGA_HDMI_HPD <24>
AF19 G3 DIS@ R97 100_0402_5% HDCP_SCL 3 6
AE19 PEX_RX8 GPIO16 G2 HDCP_SDA 4 5
AE21 PEX_RX8_N GPIO17 F1
AF21 PEX_RX9 GPIO18 F2 2.2K_8P4R_5%
AG21 PEX_RX9_N GPIO19 DIS@
AG22 PEX_RX10 AD2
AF22 PEX_RX10_N DACA_HSYNC AD1 RP17
PEX_RX11 DACA_VSYNC
DACA
AE22 1 8
AE24 PEX_RX11_N AE2 JTAG_TRST 2 7
AF24 PEX_RX12 DACA_RED AD3 TESTMODE 3 6
AG24 PEX_RX12_N DACA_BLUE AE3 PEG_CLKREQ# 4 5
AF25 PEX_RX13 DACA_GREEN
AG25 PEX_RX13_N AF1 10K_8P4R_5%
AG26 PEX_RX14 DACA_VREF AE1 DIS@
AF27 PEX_RX14_N DACA_RSET
PCI EXPRESS
AE27 PEX_RX15 U6
PEX_RX15_N DACB_HSYNC U4 RP47
DIS@ 2 1 C144 PCIE_PRX_DTX_P0
0.22U_0402_16V7K AD10 DACB_VSYNC VGA_LCD_PWM 1 8
DACB
<7> PCIE_PRX_C_DTX_P0 PEX_TX0
DIS@ 2 1 C145 PCIE_PRX_DTX_N0
0.22U_0402_16V7K AD11 T5 VGA_ENVDD 2 7
<7> PCIE_PRX_C_DTX_N0 PEX_TX0_N DACB_RED
DIS@ 2 1 C146 PCIE_PRX_DTX_P1
0.22U_0402_16V7K AD12 R4 VGA_BKOFF# 3 6
<7> PCIE_PRX_C_DTX_P1 PEX_TX1 DACB_BLUE
DIS@ 2 1 C147 PCIE_PRX_DTX_N1
0.22U_0402_16V7K AC12 T4 4 5
<7> PCIE_PRX_C_DTX_N1 PEX_TX1_N DACB_GREEN
AB11
AB12 PEX_TX2 R6 100K_0804_8P4R_5%
2 2
AD13 PEX_TX2_N DACB_VREF V6 DIS@
AD14 PEX_TX3 DACB_RSET
AD15 PEX_TX3_N
AC15 PEX_TX4
AB14 PEX_TX4_N AF3 JTAG_TCK
PEX_TX5 JTAG_TCK PAD T16 @
AB15 AG4 JTAG_TDI @
PEX_TX5_N JTAG_TDI PAD T17
AC16 AE4 JTAG_TDO
TEST
PEX_TX6 JTAG_TDO PAD T18 @
AD16 AF4 JTAG_TMS PAD @
PEX_TX6_N JTAG_TMS T19
AD17 AG3 JTAG_TRST
AD18 PEX_TX7 JTAG_TRST_N
AC18 PEX_TX7_N AD25 TESTMODE
AB18 PEX_TX8 TESTMODE
AB19 PEX_TX8_N
AB20 PEX_TX9
AD19 PEX_TX9_N R1 VGA_CRT_CLK
AD20 PEX_TX10 I2CA_SCL T3 VGA_CRT_DATA
AD21 PEX_TX10_N I2CA_SDA
AC21 PEX_TX11 R2 HDCP_SCL
AB21 PEX_TX11_N I2CB_SCL R3 HDCP_SDA
AB22 PEX_TX12 I2CB_SDA
AC22 PEX_TX12_N A2 VGA_EDID_CLK
I2C
2
CLK_PCIE_VGA# AC10
<8> CLK_PCIE_VGA# PEX_REFCLK_N
PEX_TSTCLK_OUT+ AF10 DIS@ SMB_CLK_GPU 1 6
PEX_TSTCLK_OUT EC_SMB_CK2 <13,28,32>
2 1 PEX_TSTCLK_OUT- AE10 D11 XTAL_SSIN R99 1 2 10K_0402_5%
PEX_TSTCLK_OUT_N XTAL_SSIN
5
R98 DIS@ 200_0402_1% DIS@ DIS@ Q13A
2 1 PEX_TREMP AG10 E9 XTAL_OUTBUFF R101 1 2 10K_0402_5% 2N7002KDWH_SOT363-6
R100 DIS@ 2.49K_0402_1% PEX_TERMP XTAL_OUTBUFF SMB_DATA_GPU 4 3
EC_SMB_DA2 <13,28,32>
AD9 E10 XTAL_OUT
CLK
DISR3@ N13M-GE1-S-A1_BGA533
+1.8VS
1 2
@ R737 10M_0402_5%
Y3
Crystal
Q14 4 3 XTAL_OUT
SSM3K7002BFU_SC70-3 GND OUT
2
@ XTALIN 1 2
G
IN GND
PEG_CLKREQ# 1 3 CLK_REQ_VGA#
CLK_REQ_VGA# <7>
27MHZ_10PF_X3G027000BA1H-U
D
1 1
DIS@
C451 C452
12P_0402_50V8J 12P_0402_50V8J
2 2
DIS@ DIS@
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
N13M PEG & DAC
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
C 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 4019RF
Date: Tuesday, March 25, 2014 Sheet 16 of 48
A B C D E
A
VRAM Interface
Mode D Address DATA Bus
MDA[31..0]
<21> MDA[31..0]
Address 0..31 32..63
MDA[63..32]
<22> MDA[63..32]
FBx_CMD0 CS0#_L
FBx_CMD1
FBx_CMD2 ODT_L
U7B FBx_CMD3 CKE_L
Part 2 of 5
MDA0 D22 G24 FBA_CS0#_L FBx_CMD4 A14 A14
FBA_D0 FBA_CMD0 FBA_CS0#_L <21>
MDA1 E24 F27 FBA_CMD1 PAD T20 @
MDA2 E22 FBA_D1 FBA_CMD1 F25 FBA_ODT_L
FBA_D2 FBA_CMD2 FBA_ODT_L <21> FBx_CMD5 RST RST
MDA3 D24 F26 FBA_CKE_L
FBA_D3 FBA_CMD3 FBA_CKE_L <21>
MDA4 B27 G26 FBA_MA14 FBx_CMD6 A9 A9
FBA_D4 FBA_CMD4 FBA_MA14 <21,22>
MDA5 D27 G27 FBA_RST#
FBA_D5 FBA_CMD5 FBA_RST# <21,22>
MDA6 C27 G25 FBA_MA9 FBx_CMD7 A7 A7
FBA_D6 FBA_CMD6 FBA_MA9 <21,22>
MDA7 D26 J25 FBA_MA7
FBA_D7 FBA_CMD7 FBA_MA7 <21,22>
MDA8 A21 J24 FBA_MA2 FBx_CMD8 A2 A2
FBA_D8 FBA_CMD8 FBA_MA2 <21,22>
MDA9 B21 H24 FBA_MA0
FBA_D9 FBA_CMD9 FBA_MA0 <21,22>
MDA10 C21 H22 FBA_MA4 FBx_CMD9 A0 A0
FBA_D10 FBA_CMD10 FBA_MA4 <21,22>
MDA11 C19 J26 FBA_MA1
FBA_D11 FBA_CMD11 FBA_MA1 <21,22>
MDA12 C18 G22 FBA_BA0 FBx_CMD10 A4 A4
FBA_D12 FBA_CMD12 FBA_BA0 <21,22>
MDA13 D18 G23 FBA_WE#
FBA_D13 FBA_CMD13 FBA_WE# <21,22>
MDA14 B18 J22 FBA_CMD15 PAD T36 @ FBx_CMD11 A1 A1
MDA15 C16 FBA_D14 FBA_CMD14 J27 FBA_CAS#
FBA_CAS# <21,22>
MEMORY INTERFACE
MDA16 E21 FBA_D15 FBA_CMD15 M24 FBA_CS0#_H
FBA_D16 FBA_CMD16 FBA_CS0#_H <22> FBx_CMD12 BA0 BA0
MDA17 F20 L24
MDA18 D20 FBA_D17 FBA_CMD17 J23 FBA_ODT_H
FBA_D18 FBA_CMD18 FBA_ODT_H <22> FBx_CMD13 WE# WE#
MDA19 F21 K23 FBA_CKE_H
FBA_D19 FBA_CMD19 FBA_CKE_H <22>
MDA20 D17 K22 FBA_MA13 FBx_CMD14 A15 A15
FBA_D20 FBA_CMD20 FBA_MA13 <21,22>
MDA21 F18 M23 FBA_MA8
FBA_D21 FBA_CMD21 FBA_MA8 <21,22>
MDA22 D16 K24 FBA_MA6 FBx_CMD15 CAS# CAS#
FBA_D22 FBA_CMD22 FBA_MA6 <21,22>
MDA23 E16 M27 FBA_MA11
FBA_D23 FBA_CMD23 FBA_MA11 <21,22>
MDA24 A22 N27 FBA_MA5 FBx_CMD16 CS0#_H
FBA_D24 FBA_CMD24 FBA_MA5 <21,22>
MDA25 C24 M26 FBA_MA3
FBA_D25 FBA_CMD25 FBA_MA3 <21,22>
MDA26 D21 K26 FBA_BA2 FBx_CMD17
FBA_D26 FBA_CMD26 FBA_BA2 <21,22>
MDA27 B22 K27 FBA_BA1
FBA_D27 FBA_CMD27 FBA_BA1 <21,22>
MDA28 C22 K25 FBA_MA12 FBx_CMD18 ODT_H
FBA_D28 FBA_CMD28 FBA_MA12 <21,22>
MDA29 A25 M25 FBA_MA10
FBA_D29 FBA_CMD29 FBA_MA10 <21,22>
MDA30 B25 L22 FBA_RAS# FBx_CMD19 CKE_H
FBA_D30 FBA_CMD30 FBA_RAS# <21,22>
MDA31 A26
MDA32 U24 FBA_D31 C26 DQMA0
FBA_D32 FBA_DQM0 DQMA0 <21> FBx_CMD20 A13 A13
MDA33 V24 B19 DQMA1
FBA_D33 FBA_DQM1 DQMA1 <21>
MDA34 V23 D19 DQMA2 FBx_CMD21 A8 A8
FBA_D34 FBA_DQM2 DQMA2 <21>
MDA35 T23 D23 DQMA3
FBA_D35 FBA_DQM3 DQMA3 <21>
MDA36 R24 T24 DQMA4 FBx_CMD22 A6 A6
FBA_D36 FBA_DQM4 DQMA4 <22>
MDA37 P24 AA23 DQMA5
FBA_D37 FBA_DQM5 DQMA5 <22>
1 MDA38 P22 AB27 DQMA6 FBx_CMD23 A11 A11 1
1
MDA45 W23 R22 DQSA#4
FBA_D45 FBA_DQS_RN4 DQSA#4 <22>
MDA46 W22 Y24 DQSA#5 R105 FBx_CMD27 BA1 BA1
FBA_D46 FBA_DQS_RN5 DQSA#5 <22>
MDA47 V22 AA27 DQSA#6 1.1K_0402_1%
FBA_D47 FBA_DQS_RN6 DQSA#6 <22>
MDA48 AA25 R27 DQSA#7 @ FBx_CMD28 A12 A12
FBA_D48 FBA_DQS_RN7 DQSA#7 <22>
MDA49 W27
2
MDA50 W26 FBA_D49 C25 DQSA0
FBA_D50 FBA_DQS_WP0 DQSA0 <21> FBx_CMD29 A10 A10
MDA51 W25 A19 DQSA1 +FB_VREF
FBA_D51 FBA_DQS_WP1 DQSA1 <21>
MDA52 AD27 E19 DQSA2 FBx_CMD30 RAS# RAS#
FBA_D52 FBA_DQS_WP2 DQSA2 <21>
MDA53 AB26 A24 DQSA3
FBA_D53 FBA_DQS_WP3 DQSA3 <21>
1
MDA54 AD26 T22 DQSA4 * A15 is not required for any x16 * A15 is only needed if we support
0.1U_0402_16V4Z
FBA_D54 FBA_DQS_WP4 DQSA4 <22>
@ C150
MDA55 AB25 AA24 DQSA5 R106 device, even up to 4Gb density x8 configurations, and only at 4Gb
FBA_D55 FBA_DQS_WP5 DQSA5 <22> 1
MDA56 V25 AA26 DQSA6 1.1K_0402_1%
FBA_D56 FBA_DQS_WP6 DQSA6 <22>
MDA57 R25 T27 DQSA7 @
FBA_D57 FBA_DQS_WP7 DQSA7 <22>
MDA58 V26 Place close to the first T point
2
MDA59 V27 FBA_D58 A16 +FB_VREF 2
MDA60 R26 FBA_D59 FB_VREF
MDA61 T25 FBA_D60 F24
FBA_D61 FBA_CLK0 CLKA0 <21>
MDA62 N25 F23 CLKA0# <21> Command Bit Default Pull-down
MDA63 N26 FBA_D62 FBA_CLK0_N
FBA_D63 N24 CLKA1 <22> ODTx 10k
FBA_CLK1 N23
FBA_CLK1_N CLKA1# <22> CKEx 10k
DDR3
M22 FBA_DEBUG0 1 2 +VRAM_1.5VS RST 10k
FBA_DEBUG R107 10K_0402_5%
@ CS* No Termination
N13M-GE1-S-A1_BGA533
DISR3@
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
N13M VRAM Interface
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 4019RF
Date: Tuesday, March 25, 2014 Sheet 17 of 48
A
5 4 3 2 1
NC
<23> NTXOC- IFPA_TXC_N NC
V5 J5 1 DIS@ 2
<23> NTXO0+
V4 IFPA_TXD0 PGOOD STRAP3 +3VS_DGPU SOR3_EXPOSED SOR2_EXPOSED SOR1_EXPOSED SOR0_EXPOSED
<23> NTXO0- IFPA_TXD0_N
AA5
<23> NTXO1+ IFPA_TXD1 STRAP4 +3VS_DGPU RESERVED RESERVED PCIE_MAX_SPEED DP_PLL_VDD33V
AA4
<23> NTXO1- IFPA_TXD1_N
W4
<23> NTXO2+ IFPA_TXD2
Y4 T6 MULTI_STRAP_REF0_GND 1 DIS@ 2
<23> NTXO2- IFPA_TXD2_N MULTI_STRAP_REF2_GND
AB4 W6 R114 40.2K_0402_1% Pull-up to +3VS
<23> NTXO3+ IFPA_TXD3 DBG_DATA1
AB5 Y6 SKU Device ID biit5 to bit0 Resistor Values Pull-down to Gnd
<23> NTXO3- _DGPU
DBG
IFPA_TXD3_N DBG_DATA2 AA6
DBG_DATA3 N3
DBG_DATA4 5K 1000 0000
AB3 N13M-GE1-S 0x1058 011000
<23> NTXEC+ IFPB_TXC
AB2 10K 1001 0001
<23> NTXEC- IFPB_TXC_N
W1
<23> NTXE0+ IFPB_TXD4
V1 C7 STRAP0 15K 1010 0010
<23> NTXE0- IFPB_TXD4_N STRAP0
W3
STRAP
LVDS / TMDS
<23> NTXE1+ IFPB_TXD5
W2 B9 STRAP1 20K 1011 0011
<23> NTXE1- IFPB_TXD5_N STRAP1
AA2
<23> NTXE2+ IFPB_TXD6
AA3 A9 STRAP2 25K 1100 0100
<23> NTXE2- IFPB_TXD6_N STRAP2
AB1
<23> NTXE3+ IFPB_TXD7
AA1 30K 1101 0101
<23> NTXE3- IFPB_TXD7_N
100K_0402_5% 35K 1110 0110
C VGA_HDMI_ECLK G4 N5 R115 1 DIS@ 2 C
<24> VGA_HDMI_ECLK IFPC_AUX_I2CW_SCL BUFRST_N
VGA_HDMI_EDATA G5 45K 1111 0111
<24> VGA_HDMI_EDATA IFPC_AUX_I2CW_SDA_N
P4
<24> VGA_HDMI_TX2+ IFPC_L0
N4
<24> VGA_HDMI_TX2- IFPC_L0_N
M5 D8
GENERAL
@ 1
1
10K_0402_1%
4.99K_0402_1%
4.99K_0402_1%
DIS@ F4 R116 10K_0402_5%
IFPD_L0_N
@ 1
2 DIS@ 1
@ 1
@ 1
10K_0402_1%
10K_0402_1%
45.3K_0402_1%
4.99K_0402_1%
4.99K_0402_1%
R122 2K_0402_5% E4 B10 ROM_CS# 1 DIS@ 2 +3VSG
IFPD_L1 ROM_CS_N
@
DIS@
DIS@
+3VSG 1 2 VGA_HDMI_ECLK D5
C3 IFPD_L1_N C9 ROM_SCLK
SERIAL
IFPD_L2 ROM_SCLK
R119
R120
R121
1 2 VGA_HDMI_EDATA C4
2
IFPD_L2_N
R123
R117
R118
R124
R125
R126 2K_0402_5% B3 A10 ROM_SI
2
B4 IFPD_L3 ROM_SI ROM_SI R135 R135
DIS@ IFPD_L3_N C10 ROM_SO STRAP0 ROM_SO
ROM_SO STRAP1 STRAP3 ROM_SCLK
F7 STRAP2 STRAP4
G6 IFPE_AUX_I2CY_SCL
IFPE_AUX_I2CY_SDA_N
1
D6
IFPE_L0
@ 1
X76@
10K_0402_1%
10K_0402_1%
30K_0402_1%
10K_0402_1%
@
4.99K_0402_1%
34.8K_0402_1%
DIS@
C6 AB6 R127 1 DIS@ 2 1K_0402_1% RAM RAM
IFPE_L0_N IFPAB_RSET
15K_0402_1%
15K_0402_1%
@
DIS@
A6 SD034100280 SD034150280
IFPE_L1
DIS@
A7 R5 R132 1 DIS@ 2 1K_0402_1% X76MR@ X76HR@
IFPE_L1_N IFPC_RSET
R135
R131
R136
DIS@
B6
2
IFPE_L2
R133
R128
R129
R130
R134
B7 M6
2
B E6 IFPE_L2_N IFPD_RSET R135 R135 B
U7 E7 IFPE_L3 F8
IFPE_L3_N IFPE_RSET X76@
N13M-GE1-S-A1_BGA533
DISR3@
RAM RAM
DGPU SD034100280 SD034150280
SA000056A60 X76M@ X76H@
DISR1@
X76@
GPU Frenq. Memory Size Memory Config strap0 strap1 strap2 strap3 strap4 ROM_SI ROM_SO ROM_SCLK
Reserve 1MB SPI ROM FOR VBIOS ROM 128M* 16* 4 Micron 1111 0110 1000 0010 0001 0000 0101 1000
900 MHz 1GB MT41J128M16JT-107G:K R123 R128 R118 R130 R134 R135 R120 R121
PU 45K PD 35K PU 5K PD 15K PD 10K PD 10K PD 30K PU 5K
+3VSG N13M-GE1 128M* 16* 4 Hynix 1111 0110 1000 0010 0001 0101 0101 1000
C524
@ 900 MHz 1GB H5TC2G63FFR-11C R123 R128 R118 R130 R134 R135 R120 R121
2 1 20mils PU 45K PD 35K PU 5K PD 15K PD 10K PD 15K PD 30K PU 5K
1
0.1U_0402_16V4Z
R738 @
10K_0402_5%
2
@ R739 U40 @
ROM_CS# 1 20_0402_5% ROM_CS_R 1 8
ROM_SO R740 1 2 0_0402_5%ROM_SO_R 2 CS# VCC 7 ROM_HOLD#
@ 3 DO HOLD# 6
4 WP# CLK 5 @ R741
A GND DIO ROM_SCLK_R 1 2 0_0402_5% ROM_SCLK A
MX25L1005AMC-12G SOP ROM_SI_R 1 2 0_0402_5% ROM_SI
@ R742
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
N13M LVDS&TMDS
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 4019RF
Date: Tuesday, March 25, 2014 Sheet 18 of 48
5 4 3 2 1
5 4 3 2 1
+VGA_CORE
10U_0603_6.3V6M
10U_0603_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
1U_0402_6.3V6K
4.7U_0603_6.3V6K
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
J10 B13
VDD FBVDDQ
DIS@ C151
DIS@ C152
DIS@ C153
DIS@ C154
DIS@ C155
DIS@ C156
DIS@ C157
DIS@ C158
DIS@ C159
DIS@ C160
J12 C13 1 1 1 1 1 1 1 1 1 1
J13 VDD FBVDDQ D13
L9 VDD FBVDDQ D14
M9 VDD FBVDDQ E13
M11 VDD FBVDDQ F13 2 2 2 2 2 2 2 2 2 2
M17 VDD FBVDDQ F14
N9 VDD FBVDDQ F15
N11 VDD FBVDDQ F16
N12 VDD FBVDDQ F17
N13 VDD FBVDDQ F19
N14 VDD FBVDDQ F22
N15 VDD FBVDDQ H23
N16 VDD FBVDDQ H26
N17 VDD FBVDDQ J15
N19 VDD FBVDDQ J16
P11 VDD FBVDDQ J18
P12 VDD FBVDDQ J19
P13 VDD FBVDDQ L19
P14 VDD FBVDDQ L23
P15 VDD FBVDDQ L26
P16 VDD FBVDDQ M19
P17 VDD FBVDDQ N22 Under GPU Near GPU +1.05VSG
R9 VDD FBVDDQ U22
R11 VDD FBVDDQ Y22
VDD FBVDDQ
10U_0603_6.3V6M
10U_0603_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
1U_0402_6.3V6K
1U_0402_6.3V6K
POWER
4.7U_0603_6.3V6K
R12
VDD
DIS@ C161
DIS@ C162
DIS@ C163
DIS@ C164
DIS@ C165
DIS@ C166
DIS@ C167
R13 AG6 1 1 1 1 1 1 1
R14 VDD PEX_IOVDDQ AF6
R15 VDD PEX_IOVDDQ AE6
R16 VDD PEX_IOVDDQ AD6
C +3VSG Under GPU (one per pin) 460mA (Width 20mil) R17 VDD PEX_IOVDDQ AC13 2 2 2 2 2 2 2 C
T9 VDD PEX_IOVDDQ AC7
@ R1371 20_0603_5% T11 VDD PEX_IOVDDQ AB17
VDD PEX_IOVDDQ 3.5A (Width 160mil)
1U_0402_6.3V6K
1U_0402_6.3V6K
4.7U_0603_6.3V6K
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
T17 AB16
VDD PEX_IOVDDQ +1.05VSG
DIS@ C169
DIS@ C170
DIS@ C171
DIS@ C172
DIS@ C173
DIS@ C174
0.1U_0402_16V4Z
1 U19 AB9
W9 VDD PEX_IOVDDQ AB8
VDD PEX_IOVDDQ
10U_0603_6.3V6M
10U_0603_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
1U_0402_6.3V6K
1U_0402_6.3V6K
4.7U_0603_6.3V6K
W10 AB7
2 2 2 2 2 2 VDD PEX_IOVDDQ
DIS@ C175
DIS@ C176
DIS@ C177
DIS@ C178
DIS@ C179
DIS@C180
C180
DIS@C181
C181
W12 1 1 1 1 1 1 1
2 W13 VDD AG7
VDD PEX_IOVDD
DIS@
DIS@
W18 AF7 110mA (width 10mil) PR-09
W19 VDD PEX_IOVDD AE7 +1.05VSG
VDD PEX_IOVDD AD8 2 2 2 2 2 2 2 L8 DIS@
Under GPU Near GPU
+3VSG Near GPU PEX_IOVDD AD7 +PEX_PLLVDD 2 1
PEX_IOVDD
1U_0402_6.3V6K
0.1U_0402_16V4Z
4.7U_0603_6.3V6K
A12 AC9 HCB1608KF-121T30 0603
VDD33 PEX_IOVDD
DIS@ C182
DIS@ C183
DIS@ C185
210mA (Width 20mil) B12 1 1 1
VDD33
4.7U_0603_6.3V6K
0.1U_0402_16V4Z
DIS@ C186
1 1 D12
E12 VDD33 K6 L9 +1.05VSG
F12 VDD33 VID_PLLVDD C187 1 2DIS@ 2 2 2
VDD33 L6 0.1U_0402_16V4Z
150mA (width 10mil ) HCB1608KF-181T20
1
0603
2
2 2 SP_PLLVDD
22U_0805_6.3V6M
4.7U_0603_6.3V6K
C188 1 2 DIS@ DIS@
DIS@ C189
DIS@ C190
AG9 K5 0.1U_0402_16V4Z +PLLVDD 1 1
PEX_SVDD_3V3 PLLVDD
R19 +FB_ADD
V3 FB_PLLAVDD
IFPA_IOVDD AC19 DIS@ 1 2 2 2 Place Near GPU Balls
10K_0402_5% 2 @ 1 R141 +IFPAB_IOVDD V2 FB_PLLAVDD C191 0.1U_0402_16V4Z
IFPB_IOVDD T19 Under GPU 60mA (width 10mil) +1.05VSG
DIS_UH@ 10K_0402_5% 2 1 R142 +IFPCD_IOVDD J6 FB_DLLAVDD L10 DIS@
IFPCD_IOVDD +PLLVDD 1 2
22U_0805_6.3V6M
0.1U_0402_16V4Z
10K_0402_5% 2 DIS@ 1 R143 +IFPE_IOVDD H6 AG2 R144 1 DIS@ 2 10K_0402_5% HCB1608KF-300T20 0603
IFPE_IOVDD DACA_VDD
DIS@ C192
DIS@ C193
B B
1 1
W5
10K_0402_5% 2 @ 1 R145 +IFPAB_PLLVDD AD5 DACB_VDD +VRAM_1.5VS
IFPAB_PLLVDD
DIS_UH@ 10K_0402_5% 2 1 R146 +IFPC_PLLVDD P6 B15 FB_CAL_PD_VDDQ 1 DIS@ 2 2 2
IFPC_PLLVDD FB_CAL_PD_VDDQ 40.2_0402_1% R147
10K_0402_5% 2 DIS@ 1 R148 +IFPD_PLLVDD N6 W15 VCCSENSE_VGA_R 1 2 0_0402_5%
IFPD_PLLVDD VDD_SENSE @R182
@ R182 VCCSENSE_VGA <45>
10K_0402_5% 2 DIS@ 1 R150 +IFPE_PLLVDD D7 E15
IFPE_PLLVDD VDD_SENSE VCCSENSE_VGA // VSSSENSE_VGA
N13M-GE1-S-A1_BGA533
DISR3@
+1.05VSG
110mA (width 10mil) L11 DIS@
+FB_ADD 1 2
HCB1608KF-300T20 0603
Under GPU 210mA (width 20mil ) Near GPU DIS@ L36 125mA ( width 10mil )
L41
22U_0805_6.3V6M
1U_0402_6.3V6K
FCM1608KF-301T05_0603
DIS@ C194
DIS@ C195
+3VSG 1 2 +IFPAB_IOVDD +1.05VSG 1 2 +IFPAB_PLLVDD 1 1
1U_0402_6.3V6K
1U_0402_6.3V6K
.1U_0402_16V7K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
0.1U_0402_16V4Z
0.1U_0402_16V4Z
DIS@ C454
DIS@ C455
DIS@ C248
DIS@ C249
DIS@ C459
DIS@ C460
DIS@ C461
2 2 2 2 2 2 2
Under GPU
Near GPU DIS_H@
L37 100mA (width 10mil )
FCM1608KF-301T05_0603
+3VSG 1 2 +IFPC_PLLVDD
1U_0402_6.3V6K
A A
4.7U_0603_6.3V6K
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
DIS_H@ C463
DIS_H@ C252
DIS_H@ C253
DIS_H@ C254
1 1 1 1 1
+1.05VSG 1 2 +IFPCD_IOVDD
1U_0402_6.3V6K
4.7U_0603_6.3V6K
0.1U_0402_16V4Z
0.1U_0402_16V4Z
DIS_H@ C457
DIS_H@ C458
DIS_H@ C251
DIS_H@ C250
DIS_H@
L35 1 1 1 1
FCM1608KF-221T05_2P 2 2 2 2 2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
N13M POWER
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 4019RF
Date: Tuesday, March 25, 2014 Sheet 19 of 48
5 4 3 2 1
5 4 3 2 1
U7E
B2 Part 5 of 5 U2
B5 GND GND U5
B8 GND GND U11
B11 GND GND U12
B14 GND GND U13
B17 GND GND U14
B20 GND GND U15
B23 GND GND U16
B26 GND GND U17
E2 GND GND U23
E5 GND GND U26
E8 GND GND V9
E11 GND GND V19
D E17 GND GND W11 D
E20 GND GND W14
E23 GND GND W17
E26 GND GND Y2
H2 GND GND Y5
H5 GND GND Y23
GND
J11 GND GND Y26
J14 GND GND AC2
J17 GND GND AC5
K9 GND GND AC6
K19 GND GND AC8
L2 GND GND AC11
L5 GND GND AC14
L11 GND GND AC17
L12 GND GND AC20
L13 GND GND AC23
L14 GND GND AC26
L15 GND GND AF2
L16 GND GND AF5
L17 GND GND AF8
M12 GND GND AF11
M13 GND GND AF14
M14 GND GND AF17
M15 GND GND AF20
M16 GND GND AF23
P2 GND GND AF26
P5 GND GND T16
P9 GND GND T15
P19 GND GND T14
P23 GND GND F6
P26 GND GND
T12 GND A15 R151 1 2 42.2_0402_1%
C T13 GND FB_CAL_PU_GND DIS@ C
GND B16 R152 1 2 51.1_0402_1%
FB_CAL_TERM_GND DIS@
@R153
@ R1531 2 VSSSENSE_VGA_R W16 F11 R154 1 2 40.2K_0402_1%
<45> VSSSENSE_VGA 0_0402_5% GND_SENSE MULTI_STRAP_REF0_GND DIS@
E14 F10 R155 1 2 40.2K_0402_1%
GND_SENSE MULTI_STRAP_REF1_GND DIS@
VCCSENSE_VGA // VSSSENSE_VGA
N13M-GE1-S-A1_BGA533
DISR3@
+5VALW
C536
EMC@
2 1
1
2
@
2
R723
DGPU_PWROK# 470_0603_5%
1
1
1 2 2 Q15
B <45,46> DGPU_PWROK B
G 2N7002_SOT23
@ S Q50 @
3
1
1
C525 2N7002K_SOT23-3 D
DGPU_PWR_EN# 2
0.1U_0603_25V7K G
2
3
+3VS to +3VS_VGA
+3VS +3VSG
J1
@
1 2
1 2 +VGA_CORE
2
+1.05VSG DIS@ Q16 C196
J2 @ AO3413_SOT23-3 10U_0603_6.3V6M R160
1
2 1 470_0603_5%
2 1 DIS@ 3 1 2 1
D
DIS@ JUMP_43X118 R159
1
1
C197 Q17 100K_0402_5%
0422
G
+5VALW 10U_0603_6.3V6M 8 1 2 @ Q18
2
1 7 2 DIS@ R162 R161 DIS@ SSM3K7002FU_SC70-3
2
1
6 3 DIS@ DGPU_PWR_EN# 1 2 47_0603_5% D
1
1
3 2
6
C200
C198 47_0603_5% DIS@ 1 G
2
0.1U_0402_10V6K
D
SI4634DY-T1-GE3 1N SO-8 1U_0402_6.3V6K 2 G Q19B DIS@ R166 DIS@ S
<32> DGPU_PWR_EN
4
3
10U_0603_6.3V6M 2
D
R164 DIS@ S
2N7002KDWH_SOT363-6 Q19A G 5 2 1DGPU_PWR_EN#
1
C201
0.1U_0402_10V6K
10K_0402_1% DIS@ DIS@ S
1
1
4
3
4.7K_0402_5% R165
1
A A
D
1 2 DIS@ Q20A G 5 DGPU_PWROK# 100K_0402_5% DIS@
1
C202 2
2N7002KDWH_SOT363-6 S
2
DIS@ 2N7002KDWH_SOT363-6
4
0.1U_0603_25V7K
2
6
D
DIS@
DGPU_PWROK# 2 G Q20B
S
2N7002KDWH_SOT363-6 Security Classification Compal Secret Data Compal Electronics, Inc.
1
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
N13M POWER & GND
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 4019RF
Date: Tuesday, March 25, 2014 Sheet 20 of 48
5 4 3 2 1
5 4 3 2 1
RANK 0 [31...0]
VRAM DDR3 Chips
MDA[31..0]
<17> MDA[31..0]
D D
U8 U9
+VRAM_1.5VS +VRAM_1.5VS
1
R169 C203
1.33K_0402_1% 0.01U_0402_16V7K FBA_BA0 M2 B2 FBA_BA0 M2 B2
<17,22> FBA_BA0 BA0 VDD BA0 VDD
DIS@ DIS@ FBA_BA1 N8 D9 FBA_BA1 N8 D9
2 <17,22> FBA_BA1 BA1 VDD BA1 VDD
FBA_BA2 M3 G7 FBA_BA2 M3 G7
<17,22> FBA_BA2
2
FBA_ODT_L K1 A1 FBA_ODT_L K1 A1
<17> FBA_ODT_L ODT/ODT0 VDDQ ODT/ODT0 VDDQ
1
FBA_CS0#_L L2 A8 FBA_CS0#_L L2 A8
<17> FBA_CS0#_L CS/CS0 VDDQ CS/CS0 VDDQ
R170 FBA_RAS# J3 C1 FBA_RAS# J3 C1
<17,22> FBA_RAS# RAS VDDQ RAS VDDQ
1.33K_0402_1% FBA_CAS# K3 C9 FBA_CAS# K3 C9 RAM RAM RAM RAM
<17,22> FBA_CAS# CAS VDDQ CAS VDDQ
DIS@ FBA_WE# L3 D2 FBA_WE# L3 D2 SA00006H420 SA00006H420 SA00006H420 SA00006H420
<17,22> FBA_WE# WE VDDQ WE VDDQ
310mAVDDQ E9 E9 X76H@ X76H@ X76H@ X76H@
2
+MEM_VREF_DQ0 F1 VDDQ F1
+MEM_VREF_DQ0
DQSA1 F3 VDDQ H2 DQSA0 F3
310mAVDDQ H2
<17> DQSA1 DQSL VDDQ <17> DQSA0 DQSL VDDQ
1
DQSA2 C7 H9 DQSA3 C7 H9
R171
1
C204
<17> DQSA2 DQSU VDDQ <17> DQSA3 DQSU VDDQ R1
1.33K_0402_1% 0.01U_0402_16V7K
DIS@ DIS@ DQMA1 E7 A9 DQMA0 E7 A9 U8 U9 U10 U11
2 <17> DQMA1 DML VSS <17> DQMA0 DML VSS
DQMA2 D3 B3 DQMA3 D3 B3
<17> DQMA2 <17> DQMA3
2
1
DIS@ J1 B1 DIS@ J1 B1
B R172 L1 NC/ODT1 VSSQ B9 R173 L1 NC/ODT1 VSSQ B9 B
243_0402_1% J9 NC/CS1 VSSQ D1 243_0402_1% J9 NC/CS1 VSSQ D1
L9 NC/CE1 VSSQ D8 L9 NC/CE1 VSSQ D8 RAM RAM RAM RAM
2
2
NCZQ1 VSSQ E2 NCZQ1 VSSQ E2 SA00005SM00 SA00005SM00 SA00005SM00 SA00005SM00
VSSQ E8 VSSQ E8 X76MR@ X76MR@ X76MR@ X76MR@
VSSQ F9 VSSQ F9
VSSQ G1 VSSQ G1
VSSQ G9 VSSQ G9
VSSQ VSSQ
Place close to the first T point 96-BALL 96-BALL
SDRAM DDR3 SDRAM DDR3
22U_0805_6.3V6M
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
DIS@ C205
DIS@ C206
DIS@ C207
DIS@ C208
DIS@ C209
DIS@ C210
DIS@ C211
DIS@ C212
DIS@ C213
DIS@ C214
DIS@ C215
DIS@ C216
DIS@ C217
DIS@ C218
DIS@ C219
DIS@ C220
DIS@ C221
DIS@ C222
DIS@ C223
DIS@ C224
DIS@ C225
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
VGA_N13M VRAM RANK 0L
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Rev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4019RF
Date: Tuesday, March 25, 2014 Sheet 21 of 48
5 4 3 2 1
5 4 3 2 1
RANK 0 [63...32]
VRAM DDR3 Chips
MDA[63..32]
<17> MDA[63..32]
D D
U10 U11
1
R176 C226 FBA_BA0 M2 B2 FBA_BA0 M2 B2
<17,21> FBA_BA0 BA0 VDD BA0 VDD
1.33K_0402_1% 0.01U_0402_16V7K FBA_BA1 N8 D9 FBA_BA1 N8 D9
<17,21> FBA_BA1 BA1 VDD BA1 VDD
DIS@ DIS@ FBA_BA2 M3 G7 FBA_BA2 M3 G7
2 <17,21> FBA_BA2 BA2 VDD BA2 VDD
K2 K2
2
VDD K8 VDD K8
VDD N1 VDD N1
CLKA1 J7 VDD N9 CLKA1 J7 VDD N9
C CLKA1# K7 CK VDD R1 CLKA1# K7 CK VDD R1 C
FBA_CKE_H K9 CK VDD R9 FBA_CKE_H K9 CK VDD R9
<17> FBA_CKE_H CKE/CKE0 VDD +VRAM_1.5VS CKE/CKE0 VDD +VRAM_1.5VS
+VRAM_1.5VS
FBA_ODT_H K1 A1 FBA_ODT_H K1 A1
<17> FBA_ODT_H ODT/ODT0 VDDQ ODT/ODT0 VDDQ
FBA_CS0#_H L2 A8 FBA_CS0#_H L2 A8
<17> FBA_CS0#_H CS/CS0 VDDQ CS/CS0 VDDQ
1
FBA_RAS# J3 C1 FBA_RAS# J3 C1
<17,21> FBA_RAS# RAS VDDQ RAS VDDQ
R177 FBA_CAS# K3 C9 FBA_CAS# K3 C9
<17,21> FBA_CAS# CAS VDDQ CAS VDDQ
1.33K_0402_1% FBA_WE# L3 D2 FBA_WE# L3 D2
<17,21> FBA_WE# WE VDDQ WE VDDQ
DIS@ 310mAVDDQ E9 310mAVDDQ E9
F1 F1
2
1
R178 C227
1.33K_0402_1% 0.01U_0402_16V7K DQMA4 E7 A9 DQMA5 E7 A9
<17> DQMA4 DML VSS <17> DQMA5 DML VSS
DIS@ DIS@ DQMA7 D3 B3 DQMA6 D3 B3
2 <17> DQMA7 DMU VSS <17> DQMA6 DMU VSS
E1 E1
2
VSS G8 VSS G8
DQSA#4 G3 VSS J2 DQSA#5 G3 VSS J2
<17> DQSA#4 DQSL VSS <17> DQSA#5 DQSL VSS
DQSA#7 B7 J8 DQSA#6 B7 J8
<17> DQSA#7 DQSU VSS <17> DQSA#6 DQSU VSS
M1 M1
VSS M9 VSS M9
VSS P1 VSS P1
FBA_RST# T2 VSS P9 FBA_RST# T2 VSS P9
<17,21> FBA_RST# RESET VSS RESET VSS
T1 T1
ZQ2 L8 VSS T9 ZQ3 L8 VSS T9
ZQ/ZQ0 VSS ZQ/ZQ0 VSS
1
1
DIS@
DIS@ J1 B1 R180 J1 B1
R179 L1 NC/ODT1 VSSQ B9 243_0402_1% L1 NC/ODT1 VSSQ B9
B 243_0402_1% J9 NC/CS1 VSSQ D1 J9 NC/CS1 VSSQ D1 B
L9 NC/CE1 VSSQ D8 L9 NC/CE1 VSSQ D8
2
2
NCZQ1 VSSQ E2 NCZQ1 VSSQ E2
VSSQ E8 VSSQ E8
VSSQ F9 VSSQ F9
VSSQ G1 VSSQ G1
VSSQ G9 VSSQ G9
VSSQ VSSQ
96-BALL 96-BALL
SDRAM DDR3 SDRAM DDR3
Place close to the first T point
X76M@ X76M@
DIS@
R181
160_0402_1%
+VRAM_1.5VS +VRAM_1.5VS
2
<17> CLKA1#
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
DIS@ C228
DIS@ C229
DIS@ C230
DIS@ C231
DIS@ C232
DIS@ C233
DIS@ C234
DIS@ C235
DIS@ C236
DIS@ C237
DIS@ C238
DIS@ C239
DIS@ C240
DIS@ C241
DIS@ C242
DIS@ C243
DIS@ C244
DIS@ C245
DIS@ C246
DIS@ C247
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
+VRAM_1.5VS
EMC@
EMC@
EMC@
EMC@
EMC@
A A
2 2 2 2 2
C298 C297 C299 C300 C301
22P_0402_50V8J
22P_0402_50V8J
22P_0402_50V8J
22P_0402_50V8J
22P_0402_50V8J
1 1 1 1 1
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2012/09/28 Deciphered Date 2013/09/28 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
VGA_N13M VRAM RANK 0H
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Rev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4019RF
Date: Tuesday, March 25, 2014 Sheet 22 of 48
5 4 3 2 1
A B C D E
1
+LCDVDD 23 24 C511EMC@
21 23 24 22 LCD_PWM C510 EMC@ 680P_0402_50V7K
EC_BKOFF# 19 21 22 20 680P_0402_50V7K 2
<32> EC_BKOFF#
2
+CAM_PWR EC_SMB_DA1 17 19 20 18
17 18 950mA
EC_SMB_CK1 15 16
13 15 16 14 +5V_TS +5VS
NTXO2+ 0_0402_5% 2 1 R394 DIS@TXO2+ INT_DMIC_DATA_L 11 13 14 12 TS@F3
TS@F3
<18> NTXO2+ TXO2+ <25> 11 12
NTXO2- 0_0402_5% 2 1 R393 DIS@TXO2- INT_DMIC_CLK_L 9 10 1 2
<18> NTXO2- TXO2- <25> 9 10
7 8
0_0804_8P4R_5% RP53 DIS@ USB20_HUB2_N1_R 5 7 8 6 USB20_TP_N 2A_63V_0437002.WR_1206
NTXO1+ 1 8 TXO1+ USB20_HUB2_P1_R 3 5 6 4 USB20_TP_P
<18> NTXO1+ TXO1+ <25> 3 4 1 1
NTXO1- 2 7 TXO1- 1 2
<18> NTXO1- TXO1- <25> 1 2
NTXO0+ 3 6 TXO0+ TS@ C512 C513 TS@
<18> NTXO0+ TXO0+ <25> JLVDS1
NTXO0- 4 5 TXO0- .1U_0402_16V7K 10U_0603_6.3V6M
<18> NTXO0- TXO0- <25> 2 2
CONN@
<25,32> EC_SMB_CK1 EC_SMB_CK1
<25,32> EC_SMB_DA1 EC_SMB_DA1
CMMI21T-670Y-N
3 4 USB20_TP_N
<31> USB20_HUB1_N1 3 4
2 1 USB20_TP_P
<31> USB20_HUB1_P1 2 1
TS@ L39
2 1
0_0402_5% @ R376
LVDS POWER
+LCDVDD
+5VS U37
W=80mils W=80mils
W=80mils 1 1 2 +LCDVDD
5 OUT F4
IN 4A_32V_0437004.WR
Converter 1 2
1 1
R377 1 2 0_0402_5% 4 GND C516
<25> S_BKOFF# SS
UMA@ C514 C515 .1U_0402_16V4Z
.1U_0402_16V4Z 3 2 2
2 1 EN 4.7U_0603_6.3V6K
C517 APL3512A_SOT23-5
@ 1500P_0402_50V7K
DGPU R378 1 2 0_0402_5% LCD_BKOFF# 2
<16> VGA_BKOFF# LCD_BKOFF# <32>
DIS@
1
R379
100K_0402_5% 1 2
<25> S_ENVDD
3 3
1
UMA@ R380 0_0402_5%
Converter
2
1 2 R381
Converter <16> VGA_ENVDD
DIS@ R382 0_0402_5% 100K_0402_5%
R383 1 2 0_0402_5% LCD_PWM
<25> S_INVT_PWM DGPU
2
2
UMA@ 1
R373
C518 EMC@ 100K_0402_5%
680P_0402_50V7K
2 DGPU
1
DGPU 1 2
<16> VGA_LCD_PWM
DIS@ R384 0_0402_5%
HD Camera
Part Number = SM070003Q00
SW_WCM2012F2S_4P
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
LVDS/CAM
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, March 25, 2014 Sheet 23 of 48
A B C D E
A B C D E
DIS only
HDMI_C_CLK+ 1 2 HDMI_CL_CLK+
VGA_HDMI_CLK+ DIS_H@
C260 1 2 0.1U_0402_10V7K HDMI_C_CLK+ 1 2
<18> VGA_HDMI_CLK+
VGA_HDMI_CLK- DIS_H@
C261 1 2 0.1U_0402_10V7K HDMI_C_CLK-
<18> VGA_HDMI_CLK-
HDMI_C_CLK- 4 3 HDMI_CL_CLK-
VGA_HDMI_TX0+ DIS_H@
C262 1 2 0.1U_0402_10V7K HDMI_C_TX0+ 4 3
<18> VGA_HDMI_TX0+ HDMI@ L25 CMMI21T-670Y-N
VGA_HDMI_TX0- DIS_H@
C263 1 2 0.1U_0402_10V7K HDMI_C_TX0-
<18> VGA_HDMI_TX0-
HDMI@ L26 CMMI21T-670Y-N
VGA_HDMI_TX1+ DIS_H@
C264 1 2 0.1U_0402_10V7K HDMI_C_TX1+ HDMI_C_TX0+ 4 3 HDMI_CL_TX0+
<18> VGA_HDMI_TX1+ 4 3
VGA_HDMI_TX1- DIS_H@
C265 1 2 0.1U_0402_10V7K HDMI_C_TX1-
<18> VGA_HDMI_TX1-
1 VGA_HDMI_TX2+ DIS_H@
C267 1 2 0.1U_0402_10V7K HDMI_C_TX2+ HDMI_C_TX0- 1 2 HDMI_CL_TX0- 1
<18> VGA_HDMI_TX2+ 1 2
VGA_HDMI_TX2- DIS_H@
C268 1 2 0.1U_0402_10V7K HDMI_C_TX2-
<18> VGA_HDMI_TX2-
Verify Value
HDMI_C_TX1+ 1 2 HDMI_CL_TX1+
RP29 HDMI@ 1 2
UMA only
499_0804_8P4R_1%
<6> HDMI_P2 UMA_H@C274
UMA_H@C274 2 1 .1U_0402_16V7K HDMI_C_TX2+ 4 5 HDMI_C_TX1- 4 3 HDMI_CL_TX1-
UMA_H@C273
UMA_H@C273 2 1 .1U_0402_16V7K HDMI_C_TX2- 3 6 4 3
<6> HDMI_N2 HDMI@ L34 CMMI21T-670Y-N
<6> HDMI_P0 UMA_H@C271
UMA_H@C271 2 1 .1U_0402_16V7K HDMI_C_TX0+ 2 7
<6> HDMI_N0 UMA_H@C270
UMA_H@C270 2 1 .1U_0402_16V7K HDMI_C_TX0- 1 8 HDMI@ L42 CMMI21T-670Y-N
HDMI_C_TX2+ 4 3 HDMI_CL_TX2+
HDMI_GND
UMA_H@C275
UMA_H@C275 2 1 .1U_0402_16V7K HDMI_C_CLK- 4 5 4 3
<6> HDMI_CLKN
UMA_H@C276
UMA_H@C276 2 1 .1U_0402_16V7K HDMI_C_CLK+ 3 6
<6> HDMI_CLKP
<6> HDMI_N1 UMA_H@C269
UMA_H@C269 2 1 .1U_0402_16V7K HDMI_C_TX1- 2 7 HDMI_C_TX2- 1 2 HDMI_CL_TX2-
UMA_H@C272
UMA_H@C272 2 1 .1U_0402_16V7K HDMI_C_TX1+ 1 8 D32 1 2
<6> HDMI_P1
2 EMC_H@ JHDMI1 HDMI connector
RP30 HDMI@ 1 HDMI_HPD 19
+1.8VS +3VS 499_0804_8P4R_1% 3 18 HP_DET
+HDMI_5V_OUT +HDMI_5V_OUT +5V
1
+HDMI_5V_OUT D 17
2 Q37 HDMI@ HDMI_SDATA 16 DDC/CEC_GND
+3VS SDA
@ G 2N7002E_SOT23-3 PESD5V0U2BT_SOT23-3 HDMI_SCLK 15
SCL
1
@ S EMIRSV 14
3
Reserved
2
R185 R395 @ CEC 13
2 0_0402_5% D8 EMC_H@ D10 EMC_H@ HDMI_CL_CLK- 12 CEC 20
2
200K_0402_5% CK- GND1
R184 0_0402_5% HDMI_CL_TX0- 1 10
HDMI_CL_TX0- HDMI_CL_TX1+ 1 10 HDMI_CL_TX1+ 11 21
1 2 C431 .1U_0402_16V7K EMC_H@D9
EMC_H@ D9 HDMI_CL_CLK+ 10 CK_shield GND2 22
2
U42 HDMI_CL_TX1- 6
HDMI_CL_TX2+ 5 6HDMI_CL_TX2+ HDMI_CL_CLK- 5 6 HDMI_CL_CLK- 5 D1-
EN
1
HDMI_CL_TX1+ 4 D1_shield
2 7 3 3 HDMI_CL_TX2- 3 D1+
VREF1 VREF2 2 D2-
H_CLK 3 6 HDMI_SCLK 8 8 HDMI_CL_TX2+ 1 D2_shield
SCL1 SCL2
Reserved for ESD D2+
H_DATA 4 5 HDMI_SDATA AZ1045-04F DFN2510P10E ESD AZ1045-04F DFN2510P10E ESD D33 EMC_H@
SDA1 SDA2 2EMIRSV CONN@ SUYIN_100042GR019M12RZR
GND
1 +1.8VS
3CEC
+1.8VS +3VS
1
1
+5VS +HDMI_5V_OUT
W=40mils PESD5V0U2BT_SOT23-3 R202 UMA_H@
10K_0402_5%
1
U12
2
0_0402_5% 0_0402_5% HDMI@
3 <6> HDMI_SOC_HPD# 3
R149 R183
1
UMA_H@ DIS_H@ 3 UMA_H@ D
2
2
EMC@ 1 G
DIS_H@ 1 2 IN C266 R736
2N7002K_SOT23-3
<18> VGA_HDMI_EDATA 1 .1U_0402_16V7K S
3
R102 0_0402_5% 2 .1U_0402_16V7K 100K_0402_5%
GND
1
C468 2
Q3 UMA_NH@
HDMI@ NTS4001NT1G-SC70-3 R203 HDMI@
1
2 AP2330W-7_SC59-3 100K_0402_5%
S
2
HDMI@ DIS_H@ R204
G
2 2
1
+1.8VS MMBT3904_NL_SOT23-3 C 10K_0402_5%
RP31
G
DIS_H@ Q39 2 1 2
HDMI_DDCCLK 5 4 +HDMI_5V_OUT B
UMA_H@ 1 2 H_CLK 3 1 HDMI_SCLK HDMI_DDCDATA 6 3 E
<6> HDMI_DDCCLK
3
R138 0_0402_5% HDMI_SDATA 7 2
S
<16> VGA_HDMI_HPD
HDMI_SCLK 8 1
1
HDMI@ Q4 NTS4001NT1G-SC70-3
2
2.2K_0804_8P4R_5%
R734 R735 R726 DIS_H@
100K_0402_5% 100K_0402_5% 100K_0402_5%
4 4
UMA_NH@ UMA_NH@
2
1
<18> VGA_HDMI_ECLK DIS_H@ 1 2 Security Classification Compal Secret Data Compal Electronics, Inc.
R140 0_0402_5% 2013/04/12 2014/04/12 Title
Issued Date Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
HDMI CONN.
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, March 25, 2014 Sheet 24 of 48
A B C D E
A B C D E
+3VS_DVCCTL
Power Consumption:
1
+3VS +3VS_RTD Pin 22 (PVCC) < 50 mA
0.1U_0402_16V4Z
C277
@
Pin 18 (SWR_VDD) < 200mA (layout trace > 40 mil) 2
@
1 1
1 2 U13
+3VS_DVCCTL @ R207 0_0603_5% Pin5 (DPV33) < 20mA 8
VCC A0
1
@ C281 7 2
@ T35 EESCL 6 WP A1 3
2 SCL A2
UMA@ UMA@ UMA@ UMA@ UMA@ @ T34 EESDA 5 4
C278 Pin 17 (SWR_LX) < 600mA (layout trace > 60 mil) SDA GND
1 C279 1 C280 1 1 C282 1 1U_0402_6.3V6K CAT24C64WI-GT3_SO8
1
C283 1
1
10U_0603_6.3V6M
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
Pin 15 (SWR_VCCK) < 100mA (layout trace > 60 mil) 4.7K_0402_5%
22U_0805_6.3V6M
@ Addr:A8 (1010 100x)
2 2 2 2 2 R208
Pin 43 (VCCK) < 50mA EP pop UMA@
C284
2 33P_0402_50V8J
2
Pin 11 (DPV12) < 100mA
PreMP
+3VS_AVCCTL
+1.2VS_SWR
UMA@ UMA@ UMA@
UMA@ UMA@ UMA@ UMA@
C287
0.1U_0402_16V4Z
1 1 1 1 C288
10U_0603_6.3V6M
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2 2 2
10U_0603_6.3V6M
2 2 2 2
+3VS_AVCCTL
+3VS_DVCCTL UMA@
U15
2 +3VS_RTD
TAI_HCB2012KF-221T30
RTD2136R 2
PWR
1 2 5
DP_V33 39 TXO1+
TXO1+ TXO1+ <23>
1 2 +SW_LX 17 40 TXO1-
SWR_LX TXO1- TXO1- <23> LVDS
1
2
43
VCCK 33 TXO3+ R210 UMA@ R211
TXO3+ <23>
2
1
25 TXEC+
LVDS
TXEC+ TXEC+ <23>
EDP_TXP0 7 26 TXEC- TXEC- <23> MIICSDA0 MIICSCL0
<6> EDP_TXP0 LANE0P TXEC-
2
2
R733 31 TXE0+
TXE0+ TXE0+ <23>
EDP_TXP1 9 32 TXE0- R215 R216 UMA@
100K_0402_5% <6> EDP_TXP1
EDP_TXN1 10 LANE1P TXE0- TXE0- <23> LVDS
eDP port <6> EDP_TXN1 LANE1N 4.7K_0402_5% 4.7K_0402_5%
DP
29 TXE1+ TXE1+ <23> @
1
1
AUX-CH_P TXE1-
1
EDP_AUXN 3
D <6> EDP_AUXN AUX-CH_N 27 TXE2+ TXE2+ <23>
UMA@ Q28 2 EDP_HPD 1 TXE2+ 28 TXE2-
DP_HPD TXE2- TXE2- <23>
2N7002K_SOT23-3 G
S 23 TXE3+ TXE3+ <23>
R217 1 2 0_0402_5% TXE3+ 24 TXE3-
APU <6> INVT_PWM_SOC TXE3- <23>
3
TXE3-
1
@
EC 1 2 21 +3VS_DVCCTL
<32> INVT_PWM PWMIN
UMA@ R218 @ R219 0_0603_5% 2 46 EESCL UMA@ R220 1 2 10K_0402_5%
100K_0402_5% 1 2 12 TESTMODE MIICSCL1 45 EESDA @ R222 1 2 10K_0402_5%
UMA@ R221 12K_0402_1% DP_REXT OTHERS MIICSDA1
2
SE070104Z80 20 S_ENVDD
3 PANEL_VCC S_ENVDD <23> 3
19 S_INVT_PWM
PWMOUT S_INVT_PWM <23>
S CER CAP .1U 16V Z Y5V 0402 MIICSCL0 48 44 S_BKOFF#
MODE_CFG1 BL_EN S_BKOFF# <23>
MIICSDA0 47
MODE_CFG0
Pin 47
EC_SMB_CK1 @ R223 1 2 0_0402_5% CIISCL 13 6
<23,32> EC_SMB_CK1 CIICSCL1 DP_GND
EC_SMB_DA1 @ R224 1 2 0_0402_5% CIISDA 14
<23,32> EC_SMB_DA1 CIICSDA1
GND
16
GND
To EC 0 1
49
PAD
0 X EP Mode EP pop
RTD2136R-CG_QFN48_6x6
Pin 48
1 ROM EEPROM
RTD2136R
S IC RTD2136R-CG QFN 48P DP/LVDS CTRL
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
LVDS Converter RTD2136R
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, March 25, 2014 Sheet 25 of 48
A B C D E
5 4 3 2 1
D
3 1 C496 1 2 .1U_0402_16V4Z C497 1 2 .1U_0402_16V4Z
D C498 C499 D
C500 1 2 .1U_0402_16V4Z C501 1 2 .1U_0402_16V4Z .1U_0402_16V4Z 1U_0603_16V6K
@ Q54 2 2
G
1
2
+5VALW AO3413_SOT23-3 C502 1 2 .1U_0402_16V4Z
C503
C921 (vendor recommend)
4.7U_0603_6.3V6K
2
2
@ R360
100K_0402_5%
@ R361 C494, C496, C500 close to U36 C495, C497, C501, C502, close to U36 C498, C499 close to U36
1
200K_0402_5%
1 2 Pin 11,32 ,23, respectively Pin 3,8,24,30, respectively Pin22
Remove component we don't used it 0926
1
D
1
2 @ Q51 @ C504
<32> LAN_PWR_EN
G SSM3K7002FU_SC70-3 .1U_0402_16V4Z
S
3
2 +3.3V_LAN
30
11
32
22
U36
3
8
249_0402_1% +
LAN_LED_ORG# 2 1 LAN_LED_ORG#_R 14
AVDD10
AVDD10
AVDD10
AVDD33
AVDD33
DVDD10
L4
2
26 LAN_LED_YEL# 1 6
1 2 ISOLATE# 20 LED1/GPIO 27 LAN_LED_GRN# @ CT R6
R364 1K_0402_5% ISOLATEB LED0 R365 C507 LAN_MIDI2+ 7
APU_PCIE_RST# 19 0_0402_5% TD3+ R7
<16,28,32,33,8> PLT_RST_BUF# PERSTB 0.01U_0402_16V7K
+LAN_VDDREG 2 LAN_MIDI2- 8
1
40 mils 23 TD3- R8
+3.3V_LAN VDDREG
1 1 2 31 24 60 mils LAN_MIDI3+ 9
@EMC@ R366 2.49K_0402_1% RSET REGOUT TD4+ R9
R367 C523
vendor recommend LAN_MIDI3- 10
15K_0402_5% 0.1U_0402_25V6 TD4- R10
2 LAN_X2 29
LAN_X1 28 CKXTAL2 33
CKXTAL1 GND R368
vendor recommend 510_0402_5%
20mils
B B
Yellow LAN_LED_YEL# 2 1 LAN_LED_YEL#_R 11
L1
RTL8111G-CG_QFN32_4X4
+3.3V_LAN +1.8VALW
+3.3V_LAN
+ 15
@EMC@ D21 <EMI> R397 1 2 0_0402_5% 12 GND 16
Part Number = SC300001J00 @ L2 GND
1
LAN_MIDI1- 1 10
Q52 2 1 10 9 LAN_MIDI0+ UDE_RV1-26295NU1
R369 2N7002K_SOT23-3 R390 LAN_MIDI1+ 3 2 9 8
10K_0402_5% 10K_0402_5% 4 3 8 7 LAN_MIDI0- CONN@
Crystal
GND
5 4 7 6
2
SP011212211
G
2
5 6
LAN_WAKE#_R 1 3 LAN_X1 LAN_GND
SOC_PCIE_WAKE# <8>
11
D
1 2 Y8
PCIE_WAKE# <32>
@ R370 0_0402_5% 1 2 LAN_LED_YEL#
OSC NC TCLAMP3304N.TCT_SLP2626P10-10
4 3 LAN_X2 LAN_LED_ORG# @ R371 0_0805_5%
NC OSC 2 1
1 1 @EMC@ D22 <EMI>
25MHZ_10PF_X3G025000DA1H-X Part Number = SC300001J00
2
C508 C509 LAN_MIDI3- 1 10
12P_0402_50V8J 2 1 10 9 LAN_MIDI2+
12P_0402_50V8J
2 2 LAN_MIDI3+ 3 2 9 8 EMC@ D23
+1.8VS 4 3 8 7 LAN_MIDI2- PESD5V0U2BT_SOT23-3
GND
1
11
1
A A
TCLAMP3304N.TCT_SLP2626P10-10
R372 Q53
10K_0402_5%
2
2N7002K_SOT23-3
G
2
CLKREQ_LAN# 1 3
LAN_CLKREQ# <7>
Compal Electronics, Inc.
D
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
LAN RTL8111
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, March 25, 2014 Sheet 26 of 48
5 4 3 2 1
5 4 3 2 1
D D
(change to 1000pf_0603_16V)
1 2
EMC@ L18 C320 680P_0603_50V8J
SPKOUT_L+ 1 2 EMC@ SPKOUT_R_L+
<15> SPKOUT_L+
FBMA-L11-160808301LMA20T_2P
EMC@ L19
SPKOUT_L- 1 2 SPKOUT_R_L-
<15> SPKOUT_L-
FBMA-L11-160808301LMA20T_2P 4 Ohm 2W per side JSPK1 CONN@
1 2 1
C321 680P_0603_50V8J 2 1
EMC@ 3 2
4 3
40 mils 1 2
5
6
4
G1
EMC@ L20 C322 680P_0603_50V8J G2
SPKOUT_R- 1 2 EMC@ SPKOUT_R_R- ACES_85204-04001
<15> SPKOUT_R-
FBMA-L11-160808301LMA20T_2P
EMC@ L21 SP02000CW00
SPKOUT_R+ 1 2 SPKOUT_R_R+ PVT update
<15> SPKOUT_R+
FBMA-L11-160808301LMA20T_2P
1 2
C C
2
C323 680P_0603_50V8J
PreMP update EMC@ D13 D14
<EMI> <EMI>
EMI Solution EMC@ EMC@
1
PESD5V0U2BT_SOT23-3 PESD5V0U2BT_SOT23-3
B B
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
RJ45 / Speaker conn
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, March 25, 2014 Sheet 27 of 48
5 4 3 2 1
A B C D E
@ +3VALW_MINI
J4
JUMP_43X79
2 1
2 1
1
80mil R396
@ Q44 4.7K_0402_5%
AO3413_SOT23-3 JMINI1
80mil
S
D
+3VALW 3 1 +3VALW_MINI WLAN_PME# 1 2 +3VALW_MINI +3VALW_MINI
<8> WLAN_PME#
2
2
3 1 2 4
2
5 3 4 6
+5VALW 5 6 +1.5VS_MINI
7 8
G
<7> WLAN_CLKREQ#
2
7 8
1
9 10
11 9 10 12 R347
<8> CLK_PCIE_WLAN# 11 12
2
13 14 4.7K_0402_5%
<8> CLK_PCIE_WLAN 13 14
@ R346 15 16
100K_0402_5% 17 15 16 18 @
2
@ R349 19 17 18 20 WL_OFF#_R R348 1 2
19 20 WL_OFF#_EC <32>
200K_0402_5% 21 22 PLT_RST_BUF# 0_0402_5%
PLT_RST_BUF# <16,26,32,33,8>
1
1 2 23 21 22 24
<7> PCIE_PRX_DTX_N3 23 24
1 <7> PCIE_PRX_DTX_P3 25 26
27 25 26 28 @
27 28
.1U_0402_16V4Z
D 2 33 34 @
<7> PCIE_PTX_C_DRX_P3 33 34
<32> WLAN_ON 2 @ Q45 35 36
35 36 USB20_HUB2_N4 <31>
G 37
39 37 38
38
40
USB20_HUB2_P4 <31> for WiFi BT
S 2N7002K_SOT23-3
3
41 39 40 42 +3VALW_MINI
+3VALW_MINI 41 42
43 44 WLAN_LED#
45 43 44 46
45 46
1
47 48
E51TXD_P80DATA 49 47 48 50 R350
3 <32> E51TXD_P80DATA 3
E51RXD_P80CLK 1 2 51 49 50 52
Remove component we don't used it 0926 <32> E51RXD_P80CLK
@ R351 0_0402_5% 51 52 4.7K_0402_5%
53 54
WLAN_LED# <33>
2
GND1 GND2
2
1 2 BT_OFF#_R
<32> BT_OFF# LOTES_AAA-PCI-049-P06-A
R353 1K_0402_5%
R354 CONN@
1
100K_0402_5%
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Mini PCIE(WLAN)
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, March 25, 2014 Sheet 28 of 48
A B C D E
A B C D E
8
JHDD1 JODD1
1 1
C345 1 2 0.01U_0402_16V7K SATA_PTX_C_DRX_P0 2 GND C346 1 2 0.01U_0402_16V7K SATA_PTX_C_DRX_P1 2 GND
<7> SATA_PTX_DRX_P0 A+ <7> SATA_PTX_DRX_P1 A+
C347 1 2 0.01U_0402_16V7K SATA_PTX_C_DRX_N0 3 <7> SATA_PTX_DRX_N1 C348 1 2 0.01U_0402_16V7K SATA_PTX_C_DRX_N1 3
<7> SATA_PTX_DRX_N0 A- A-
4 4
C349 1 2 0.01U_0402_16V7K SATA_PRX_C_DTX_N0 5 GND C350 1 2 0.01U_0402_16V7K SATA_PRX_C_DTX_N1 5 GND
<7> SATA_PRX_DTX_N0 B- <7> SATA_PRX_DTX_N1 B-
C351 1 2 0.01U_0402_16V7K SATA_PRX_C_DTX_P0 6 C352 1 2 0.01U_0402_16V7K SATA_PRX_C_DTX_P1 6
2 <7> SATA_PRX_DTX_P0 B+ <7> SATA_PRX_DTX_P1 B+ 2
7 7
8 GND 8 GND
Close to JHDD 9 G1 9 G1
G2 G2
FOX_LD1707V-S33L1H
Place CAP close to JODD <100mil FOX_LD1707V-S33L1H
+5VS H5 H6 H7
H_3P8 H_3P8 H_3P8
C353 1 2 10U_0805_25V6K
C354 1000P_0402_50V7K
1
+3VS 1 2
D15 EMC@
BAV70W_SOT323-3 EMC@ C526 1000P_0402_50V7K @ @ @
1 2 H1 H2 H3 H4 H8 H9 FD1 FD2
1
1
10K_0402_5% @
1
EMC@ R250 1K_0402_5% FIDUCIAL_C40M80 FIDUCIAL_C40M80
1
1 2 FAN_CPU_SPEED_R 2 1 @ @ @ @ @ @
<32> FAN_SPEED 2
<32> FAN_PWM 1 2 FAN_CPU_PWM_R 3
4 3 H10 H11 H12 H13 H14 H15 @ @
1
5 4 H_3P5 H_3P5 H_3P5 H_3P5 H_3P5 H_3P2
1 G5
6 FIDUCIAL_C40M80 FIDUCIAL_C40M80
C355 EMC@ G6
1000P_0402_50V7K ACES_85205-04001 @
1
2
CONN@
@ @ @ @ @
PVT update
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
HDD/ODD/FAN&Screw Hole
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, March 25, 2014 Sheet 29 of 48
A B C D E
A B C D E
1000P_0402_50V7K
C360
.1U_0402_16V7K
C361
L23 EMC@
PCH_USB3_RX0_P 1 2 U3RXDP0 8 1 2 2 SF000002Y00
<9> PCH_USB3_RX0_P 1 2 +USB3_VCCA
EMC@
AZ1045-04F DFN2510P10E ESD + 220U 6.3V OSCON
@EMC@
EMC@
PCH_USB3_RX0_N 4 3 U3RXDN0 C359
<9> PCH_USB3_RX0_N 4 3 ESR 17mohm@100Khz
1
47U_25V_M 1 1
CMMI21T-670Y-N 2
+USB3_VCCA R748
USB3.0 Conn. 22_0603_5%
2
3
2
L24 EMC@ JUSB1
1
4 3 USB20_P0_L 1
<9> USB20_P0 4 3 VBUS
USB20_N0_L 2 D
USB20_P0_L 3 D- USB3.0_EN# 2
1 2 USB20_N0_L EMC@ 4 D+ G
<9> USB20_N0 1 2 GND
D28 U3RXDN0 5 Q47 S
1
CMMI21T-900Y-N_4P PESD5V0U2BT_SOT23-3 U3RXDP0 6 StdA-SSRX- 10 2N7002K_SOT23-3
3
StdA-SSRX+ GND
2
7 11
U3TXDN0 8 GND-DRAIN GND 12
U3TXDP0 9 StdA-SSTX- GND 13
StdA-SSTX+ GND
EMC@
D31 SINGA_2UB1594-000111F
1
PESD5V0U2BT_SOT23-3
DC23300C700
2 2
CONN@
+USB_VCCA
2
+5VALW
3
CHG@ 1
C532
2
.1U_0402_16V4Z
0.1_14
+USB_VCCA
USB2.0 EMC@
D34 3
USB20
1
CHG@ 1 2 PESD5V0U2BT_SOT23-3
C423 .1U_0402_16V4Z U34 CHG@
1 12
IN OUT CMMI21T-670Y-N +USB_VCCA
<9> USB_OC1# USB_OC1# 2 1 13 9 USB20_N1_R 4 3 USB20_N1C_R JUSB2
0_0402_5% @ R304 FAULT# STATUS# 4 3 1
USB20_N1 2 11 USB20_N1_R 2 VBUS
<9> USB20_N1 DM_OUT DM_IN D-
USB20_P1 3 10 USB20_P1_R USB20_P1_R 1 2 USB20_P1C_R 3
<9> USB20_P1 DP_OUT DP_IN 1 2 D+
4
4 15 CHG@ R306 1 2 80.6K_0402_1% L31 EMC@ 5 SHIELD
<32> ILIM_SEL ILIM_SEL ILIM_LO GND
2
<32> USB_CHR_EN 5 16 CHG@ R308 1 2 30K_0402_1% 6
EN ILIM_HI 7 GND
6 8 GND
<32> USB_CHRMODE CTL1 GND
7 14 <EMI>
<32> USB_CHRMODE2 CTL2 GND
8 17 D18
<32> USB_CHRMODE3 CTL3 GPAD PESD5V0U2BT_SOT23-3 EMC@ SUYIN_020133MR004M21MZL
TPS2546RTER_QFN16_3X3
CONN@
1
Reserved for USB 2.0 port Charge use
place between
NCHG@ +USB_VCCA +USB_VCCA
USB20_N1 R311 1 2 0_0402_5% USB20_N1_R
JUSB2
USB20_P1 R312 1 2 0_0402_5% USB20_P1_R
NCHG@ 1
place near to U32 1
3
1
+ C427 C428
C426 0.1U_0402_25V6
47U_1206_10V6K
47U_25V_M
2
2 2
4 4
EMC@
D27
1
PESD5V0U2BT_SOT23-3
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
USB3.0 Conn & Hub
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, March 25, 2014 Sheet 30 of 48
A B C D E
5 4 3 2 1
+V33_T +3V_HUBT
R272 1 2 +3V_HUBT
@ 0_0603_5% 1 1 1 1 1
1 1
C374 C378 C379 C375 C377 C380
C376 1U_0402_6.3V6K 1U_0402_6.3V6K .1U_0402_16V7K .1U_0402_16V7K .1U_0402_16V7K
0.01U_0402_16V7K 2 2 2 2 2
4.7U_0603_6.3V6M
2 2
TS@ TS@ TS@ TS@ TS@
D TS@ TS@ U21 TS@ D
5 1 USB20_N2
AVDD DM0 USB20_N2 <9>
9 2 USB20_P2
+5VALW AVDD DP0 USB20_P2 <9>
14
21 AVDD 3 USB20_HUB1_N1
DVDD DM1 USB20_HUB1_N1 <23>
R266 1 2 27 4 USB20_HUB1_P1 Touch Panel
V5 DP1 USB20_HUB1_P1 <23> +3V_HUBT
@ 0_0603_5%
1 1 28
TS@ V33 6 USB20_HUB1_N2
1 DM2 USB20_HUB1_N2 <34>
TS@ C383 +V33_T 7 USB20_HUB1_P2 Card Reader
DP2 USB20_HUB1_P2 <34>
TS@ C381 C382 .1U_0402_16V7K TS@ 1 2 @ T30 PAD 18
TEST/SCL
1
2
.1U_0402_16V7K 2 C384 1U_0402_6.3V6K@ 26 12 DM3 @ 2 1 1K_0402_5% R314
4.7U_0603_6.3V6M T31 PAD SDA DM3
2 TS@ 13 DP3 @ 2 1 1K_0402_5% R313
2 1 17 DP3
R267 TS@ R268 10K_0402_5% RESET# 15
DM4 PAD T26 @
10K_0402_5% HUBT_XIN 10 16 PAD T27 @
2
Part Number = SJ10000C210 HUBT_XOUT 11 X1 DP4
TS@ PCB Footprint = Y_CRG3201212_4P X2 25
OVCUR1#/SMC PAD T28 @
Y6 12MHZ_18PF_7V12000001 850_HUBT_PSELF 22 24
PSELF OVCUR2#/SMD PAD T29 @
4 1 HUBT_XIN 2 R269 1 TS@ HUBT_PGANG 23 20 HUBT_OC3# 2 1 10K_0402_5% R310 TS@
PGANG OVCUR3#
2
100K_0402_5% 19
OVCUR4#
1
W/O HUB
1
C C
2
R43 R42
GL852G-OHG12_QFN28_5X5 TS@ R271 USB20_N2 TS_N@ 1 20_0402_5% USB20_N2_HUB1 TS_N@ 1 2 0_0402_5% USB20_HUB1_N2
680_0402_5% USB20_P2 1 2 USB20_P2_HUB1 TS_N@ 1 2 0_0402_5% USB20_HUB1_P2
TS_N@ R41 0_0402_5% R45
SA00003OQ10
1
+V33 +3V_HUB2
R273 1 2 1 +3V_HUB2
@ 0_0603_5% 1 1 1 1
1 1 C363
1U_0402_6.3V6K C364 C365 C366 C367
C362 C368 2
1U_0402_6.3V6K .1U_0402_16V7K .1U_0402_16V7K .1U_0402_16V7K
4.7U_0603_6.3V6M 0.01U_0402_16V7K 2 2 2 2
2 2
U19
5 1 USB20_N3
AVDD DM0 USB20_N3 <9>
9 2 USB20_P3 USB Input Port
+5VALW AVDD DP0 USB20_P3 <9>
14
21 AVDD 3 USB20_HUB2_N1
DVDD DM1 USB20_HUB2_N1 <23>
B R254 1 2 27 4 USB20_HUB2_P1 HD Camera B
V5 DP1 USB20_HUB2_P1 <23>
@ 0_0603_5%
1 1 28
V33 6 USB20_HUB2_N2 +3V_HUB2
1 DM2 USB20_HUB2_N2 <35>
C369 C370 +V33 7 USB20_HUB2_P2 USB2.0 Port
DP2 USB20_HUB2_P2 <35>
C371 .1U_0402_16V7K .1U_0402_16V7K 1 2 @ T32 PAD 18
TEST/SCL
1
HUB2_XOUT 11 X1 DP4
X2 25
OVCUR1#/SMC PAD T24 @
850_HUB2_PSELF 22 24 HUB2_OC2_R#
HUB2_OC2# 2 1 10K_0402_5% R342
2 R258 1 HUB2_PGANG 23 PSELF OVCUR2#/SMD 20
PGANG OVCUR3# HUB2_OC2_R# <35>
2
100K_0402_5% 19
OVCUR4# PAD T25 @
R260 @
0_0402_5% 29 8 RREF2
GND RREF
1
2
GL852G-OHG12_QFN28_5X5
R261
680_0402_5%
Part Number = SJ10000C210
PCB Footprint = Y_CRG3201212_4P
SA00003OQ10
1
A Y7 12MHZ_18PF_7V12000001 A
4 1 HUB2_XIN
1
C487 C488
33P_0402_50V8K 33P_0402_50V8K Security Classification Compal Secret Data Compal Electronics, Inc.
HUB2_XOUT 3 2 2013/04/12 2014/04/12 Title
Issued Date Deciphered Date
2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
USB Hub for Touch
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, March 25, 2014 Sheet 31 of 48
5 4 3 2 1
A B C D E
+3VLP_EC
+3VLP +3VLP_EC +3VLP_EC
Touch ID UMA/DIS ID
2
L27
2
PBY160808T-121Y-N 0603 DIS/UMA Select
1 2 1 2 +EC_VCCA +EC_VCCA Ra R309 TS@ UMA@
@ R339 0_0603_5% 1 100K_0402_5% Ra R298 EC needed
.1U_0402_16V7K
C386
.1U_0402_16V7K
C387
.1U_0402_16V7K
C388
.1U_0402_16V7K
C389
1000P_0402_50V7K
C390
1000P_0402_50V7K
C391
1 1 1 1 2 2 100K_0402_5%
1
C392 Touch_ID
1
.1U_0402_16V7K AD_BID1
2
JCMOS1 2 TS_N@ 1
2
2 2 2 2 1 1
@
EC_CRISIS_KSO0 1 ECAGND 1
1 2EC_CRISIS 2 1 R285 C533 DIS@
2 Rb R297
@ R747 0_0805_5% 18K_0402_5% .1U_0402_16V7K Rb C424
111
125
1 2 8.2K_0402_5% 1
(place close RAM Door)
22
33
96
67
@ .1U_0402_16V7K
1
U23
9
CVI_CH31022M107-0P 2
@
1
CONN@
EC_VDD0
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/AVCC
.1U_0402_16V7K C466
2 1 EMC@
1 21 BT_OFF# +3VLP_EC
GATEA20/GPIO00 GPIO0F BT_OFF# <28>
@ R333 1 2 0_0402_5%
2 23 BEEP#
<8> EC_KBRST#
<33,8> EC_SERIRQ 3 KBRST#/GPIO01
SERIRQ
BEEP#/GPIO10
GPIO12
26 FAN_PWM
EC_BEEP# <15>
FAN_PWM <29>
Board ID
2
4 27 AD_BID1 +3VLP_EC
+3VLP_EC <33,9> LPC_FRAME# LPC_FRAME# ACOFF/GPIO13 Analog Board ID definition,
R279 2 1 47K_0402_5% EC_RST# <33,9> LPC_AD3 5
7 LPC_AD3
PWM Output 1 2 Ra R280 Please see page 3.
<33,9> LPC_AD2 LPC_AD2
C393 2 1 .1U_0402_16V7K <33,9> LPC_AD1 8 63 Touch_ID R729 4.7K_0402_5% 100K_0402_5%
10 LPC_AD1 BATT_TEMP/AD0/GPIO38 64 AD1_KBC
<33,9> LPC_AD0 LPC & MISC AD1_KBC <33>
1
LPC_AD0 AD1/GPIO39 65 AD_BID0
ADP_I/AD2/GPIO3A ADP_ID <37>
<9> LPC_CLK_EC LPC_CLK_EC 12 AD Input 66 AD_BID0
CLK_PCI_EC AD3/GPIO3B
2
RP35 PLT_RST_BUF# 13 75 AD2_KBC +3VLP_EC
<16,26,28,33,8> PLT_RST_BUF# PCIRST#/GPIO05 AD4/GPIO42 AD2_KBC <33> 1
1 8 EC_SMB_CK1 EC_RST# 37 76
2 7 EC_SMB_DA1 20 EC_RST# IMON/AD5/GPIO43 1 2 R281 C394
<8> EC_SCI# EC_SCII#/GPIO0E Rb
2
3 6 EC_SMB_CK2 <28> WLAN_ON 38 R730 4.7K_0402_5% 33K_0402_5% .1U_0402_16V7K
4 5 EC_SMB_DA2 GPIO1D 2
+3VS @
1
68 EC_ON_3V_5V R296
DAC_BRIG/GPIO3C EC_ON_3V_5V <38>
2.2K_0804_8P4R_5% DA Output 70 100K_0402_5%
+3VLP_EC 55 EN_DFAN1/GPIO3D 71 C470 .1U_0402_16V7K
1
56 KSI0/GPIO30 IREF/GPIO3E 72 EMC@ 1 2
57 KSI1/GPIO31 CHGVADJ/GPIO3F
KSI2/GPIO32 Ra
R282 1 @ 2 10K_0402_5% EC_SMI# EC_CRISIS 58 83 EC_MUTE#
R283 1 @ 2 10K_0402_5% EC_SCI# KSI4 59 KSI3/GPIO33 EC_MUTE#/GPIO4A 84 LAN_PWR_EN EC_MUTE# <15>
KSI4/GPIO34 USB_EN#/GPIO4B LAN_PWR_EN <26>
KSI5 60 85 PCIE_WAKE#
KSI5/GPIO35 CAP_INT#/GPIO4C PCIE_WAKE# <26>
R284 1 2 10K_0402_5% EC_CRISIS KSI6 61 PS2 Interface 86 EAPD_CODEC
KSI6/GPIO36 EAPD/GPIO4D EAPD_CODEC <15> +5VS
KSI7 62 87 TP_CLK 1 2
EC_CRISIS_KSO0 39 KSI7/GPIO37 TP_CLK/GPIO4E 88 TP_DATA R744 1 24.7K_0402_5% EC_MUTE# R286 1 2 10K_0402_5% @
2 +5VS 2
KSO1 40 KSO0/GPIO20 TP_DATA/GPIO4F C402 .1U_0402_16V7KR743 4.7K_0402_5%
T41 KSO1/GPIO21
1 2 PLT_RST_BUF# KSO2 41 EMC@ 1 2
T44 KSO2/GPIO22
C395 EMC@ KSO3 42 97 VGATE VGATE <43>
0.01U_0402_16V7K 43 KSO3/GPIO23 CPU1.5V_S3_GATE/GPXIOA00 98 @
@1 2
<30> USB_CHRMODE2 KSO4/GPIO24 WOL_EN/GPXIOA01 ENBKL <6>
44 99 TXE_DBG R334 0_0402_5%
ESD request <30> ILIM_SEL
45 KSO5/GPIO25 Int. K/B ME_EN/GPXIOA02 109 VCIN0_PH
TXE_DBG <7>
<30> USB_CHRMODE3
46 KSO6/GPIO26 Matrix VCIN0_PH/GPXIOD00 R287 1 2 0_0402_5%
KSO7/GPIO27 SPI Device Interface <43> VR_HOT# H_PROCHOT# <7>
47 @
KSO8/GPIO28
1
<16> OVERT#_VGA OVERT#_VGA 1 2 48 119
@ R338 0_0402_5%49 KSO9/GPIO29 SPIDI/GPIO5B 120 D
closed to pin12 50 KSO10/GPIO2A
KSO11/GPIO2B SPI Flash ROM
SPIDO/GPIO5C
SPICLK/GPIO58
126 H_PROCHOT#_EC 2 Q32
2 1 1 2 LPC_CLK_EC 51 128 G 2N7002K_SOT23-3
C32 @EMC@ R352 10_0402_5% 52 KSO12/GPIO2C SPICS#/GPIO5A
S
10P_0402_50V8J 53 KSO13/GPIO2D
@EMC@ Latest design guide suggest change to
3
54 KSO14/GPIO2E 73 LCD_BKOFF#
KSO15/GPIO2F ENBKL/AD6/GPIO40 LCD_BKOFF# <23>
81 74 EC_1.05V_EN PAD T39 @
74LVC1G06.
82 KSO16/GPIO48 PECI_KB930/AD7/GPIO41 89 @ R307 1 2 0_0402_5%
KSO17/GPIO49 FSTCHG/GPIO50 SPOK <38,40,41>
90
BATT_CHG_LED#/GPIO52 USB_CHR_EN <30> +3VLP_EC
91
CAPS_LED#/GPIO53 USB_CHRMODE <30>
<23,25> EC_SMB_CK1 EC_SMB_CK1 @ R355 1 2 0_0402_5% 77 GPIO 92 PWR_LED PWR_ON_LED# <33>
EC_SMB_DA1 @ R357 1 2 0_0402_5% 78 EC_SMB_CK1/GPIO44 PWR_LED#/GPIO54 93 EC_1.0V_EN
Converter/ <23,25> EC_SMB_DA1 EC_SMB_DA1/GPIO45 BATT_LOW_LED#/GPIO55 PAD T42 @
<13,16,28> EC_SMB_CK2 EC_SMB_CK2 79 SM Bus 95 SYSON SYSON <39>
EC_SMB_CK2/GPIO46 SYSON/GPIO56
2
DDR3/Thermal/SOC <13,16,28> EC_SMB_DA2 EC_SMB_DA2 80 121 VR_ON VR_ON <43>
EC_SMB_DA2/GPIO47 VR_ON/GPIO57 127 EC_1.8V_EN
PM_SLP_S4#/GPIO59 PAD T43 @ 1
C467 .1U_0402_16V7K R332
EMC@ 1 2 C401 EMC@ 10K_0402_5%
<8> EC_SLP_S3# 6 100 EC_RSMRST# EC_RSMRST# <13,8> .1U_0402_16V7K R288 1 2 0_0402_5% ACIN <8>
1
14 PM_SLP_S3#/GPIO04 EC_RSMRST#/GPXIOA03 101 2 @
<8> EC_SLP_S4# PM_SLP_S5#/GPIO07 EC_LID_OUT#/GPXIOA04
<8> EC_SMI# 15 102 VCIN1_PH C465 .1U_0402_16V7K
16 EC_SMI#/GPIO08 PROCHOT_IN/GPXIOA05 103 H_PROCHOT#_EC EMC@ 1 2 EC_ACIN C396 2 1 100P_0402_50V8J
<13> EC_SMB_ALERT# GPIO0A H_PROCHOT#_EC/GPXIOA06
17 104
3
R139 1 2 0_0402_5% VGA_ON 18 GPIO0B VCOUT0_PH/GPXIOA07 105 1 2 3
<20> DGPU_PWR_EN GPIO0C GPO BKOFF#/GPXIOA08 EC_BKOFF# <23>
1
@ <28> WL_OFF#_EC WL_OFF#_EC 19 GPIO 106 PBTN_OUT# PBTN_OUT# <8> R746 0_0402_5%
25 GPIO0D PBTN_OUT#/GPXIOA09 107 USB3.0_EN# R385
<25> INVT_PWM EC_INVT_PWM/GPIO11 PCH_APWROK/GPXIOA10 USB3.0_EN# <30,35>
<29> FAN_SPEED 28 108 USB2.0_EN# PAD T40 @ 100K_0402_5%
29 FAN_SPEED1/GPIO14 SA_PGOOD/GPXIOA11
30 EC_PME#/GPIO15
<28> E51TXD_P80DATA
2
31 EC_TX/GPIO16 110 EC_ACIN
<28> E51RXD_P80CLK EC_RX/GPIO17 AC_IN/GPXIOD01
<13,8> PMC_CORE_PWROK 32 112
34 PCH_PWROK/GPIO18 EC_ON/GPXIOD02 114 ON/OFF +3VLP_EC +3VLP_EC
SUSP_LED#/GPIO19 ON/OFF/GPXIOD03 ON/OFF <33>
36 GPI LID_SW#/GPXIOD04 115
NUM_LED#/GPIO1A 116 SUSP#
SUSP#/GPXIOD05 SUSP# <36,39,40,41,42,45>
117
GPXIOD06
2
118
PECI_KB9012/GPXIOD07
AGND/AGND
EC_XCLKI 122
T22 XCLKI/GPIO5D
123 124
GND/GND
GND/GND
GND/GND
GND/GND
1
C397 VCIN0_PH VCIN1_PH
4.7U_0603_6.3V6K
KB9012QF-A4_LQFP128_14X14 2
SA00004OB30
11
24
35
94
113
69
20mil
ECAGND 1 2
L28
PBY160808T-121Y-N 0603
EC FLASH/DEBUG CONNECTOR
4 4
JECDB1
KSO3 1
KSI6 2 1
KSI7 3 2
KSI4 4 3
KSI5 5 4
6 5
6
GND
7 Security Classification Compal Secret Data Compal Electronics, Inc.
8 2013/04/12 2014/04/12 Title
GND Issued Date Deciphered Date
Pitch 1.0mm Hight 1.9mm E-T_6905-E06N-00R
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
EC ENE KB9012
CONN@ AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, March 25, 2014 Sheet 32 of 48
A B C D E
A B C D E
TOP side
For debug
@ SW1
R290 100K_0402_5%
1 2 +3VLP
TPM(Reserve)
R340 100_0402_5%
1 3 ON/OFFBTN# 1 2
ON/OFF <32> +3VS
2 4 1
6
5 SMT1-05-A_4P C398 20 mils
0.1U_0402_25V6 1 1
2 TPM@ TPM@
1 C399 C400 1
0.1U_0402_16V4Z 10U_0603_6.3V6M
2 2
For EMI request TPM@
U24
+3VS_LED +3VALW_LED
LED Brd Connector
JLED1
1
2 1
PWR_ON_LED# 3 2 PWR_ON_LED# 2 1EMC@ C404 1000P_0402_50V7K
<32> PWR_ON_LED# 3
4 SOC_SATALED# 2 1EMC@ C405 470P_0402_50V7K
<7> SOC_SATALED# 4
WLAN_LED# 1 2 5 WLAN_LED# 2 1EMC@ C406 470P_0402_50V7K
<28> WLAN_LED# C260@ R303 0_0402_5% 6 5
ON/OFFBTN# 1 2 7 6
GND Reserve for EMI.
S330@ R305 0_0402_5% 8
GND
ACES_85201-06051
CONN@
+3VS +3VS_LED
R341 1_0603_5%
1 2
3 3
1
1 1 1 C412
C407 C408 C409
2
2 2 2 0.1U_0402_25V6
EMI Request
0.1U_0402_25V6
0.1U_0402_25V6 0.1U_0402_25V6
+3VALW +3VALW_LED
R343 1_0603_5%
1 2
1 1
C410 C411
2 2
0.1U_0402_25V6
0.1U_0402_25V6
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
TP/LED/TPM
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, March 25, 2014 Sheet 33 of 48
A B C D E
5 4 3 2 1
+3VS +3VS_CR
@ C415
1 2
@ R295 0_0603_5%
4.7U_0402_6.3V6M
D
1 1 C414 1 1 C416 D
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C413
2 2 2 2
+3VS_CR +3V_CR
5
R300 U25 +3V_CR
C C
6.2K_0402_1%
CARD_3V3
3V3_IN
1 2 CR_RREF 1 22 SD_D6_MS_BS
RREF SP14 21 SD_D2_MS_D5
SP13 20 SD_D3_MS_D1
SP12
4.7U_0402_6.3V6M
USB20_HUB1_N2_L 2 19 1 1 C417
USB20_HUB1_P2_L 3 DM SP11 18 SD_CMD
DP SP10
0.1U_0402_16V4Z
16 SD_D5_MS_D0 C418
SP9 15 SD_CLK_MS_D2_R 1 2SD_CLK_MS_D2
SP8 R301 33_0402_5% 2 2
EMC@ 1
RTS5170-GR_QFN24 C419 @EMC@
14
+1.8V_CR 7 SP7 13 SD_CD# 6P_0402_50V8D
23 XD_CD# SP6 12 SD_D7_MS_D3 2 +3V_CR
17 XD_D7 SP5 11 SD_D0_MS_D7
GPIO0 SP4 10 SD_D1 40mil
Thermal pad
6P_0402_50V8D MS-SCLK
2 2 SD_CMD 6
B B
SD_D7_MS_D3 7 SD-CMD MMC-CMD
MS_INS# 8 MS-DATA3
9 MS-INS
SD_CLK_MS_D2 10 SD-VSS MMC-VSS1
11 MS-DATA2
SD_D5_MS_D0 12 SD-VDD MMC-VDD
SD_D3_MS_D1 13 MS-DATA0
1 2 SD_CLK_MS_D2 14 MS-DATA1
R358 0_0402_5% SD_D6_MS_BS 15 SD-CLK MMC-CLK
16 MS-BS
CMMI21T-670Y-N 17 MS-VSS2
SD_D0_MS_D7 18 SD-VSS MMC-VSS2
USB20_HUB1_N2 4 3 USB20_HUB1_N2_L SD_D1 19 SD-DAT0 MMC-DAT
<31> USB20_HUB1_N2 4 3 SD-DAT1
SD_CD# 20
21 SD-CD 23
USB20_HUB1_P2 1 2 USB20_HUB1_P2_L SD_WP_MS_CLK 22 SD-GND GND1 24
<31> USB20_HUB1_P2 1 2 SD-WP(SW) GND2
L43 @EMC@
T-SOL_143-2300302602_RV
1 2
R389 0_0402_5% CONN@
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
USB Cardreader
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, March 25, 2014 Sheet 34 of 48
5 4 3 2 1
5 4 3 2 1
D D
@
R315 1 2 0_0402_5%
+USB_VCCD USB20
USB2.0 Power CMMI21T-670Y-N 1
JUSB3
4 3 USB20_HUB2_N2_R VCC
<31> USB20_HUB2_N2 4 3 2
+USB_VCCD D-
+3VALW 1 2 USB20_HUB2_P2_R 3 5
<31> USB20_HUB2_P2 1 2 D+ GND1
+5VALW +USB_VCCD W=60mils L32 EMC@ 4 6
GND GND2
2
0.1U_0402_25V6
IN OUT TYCO_2041230-1
3 6
1
2
4.7U_0603_10V6K place between
4.7U_0603_10V6K APL3510BXI-TRG_MSOP8 JUSB3 & JUSB4 2 5 +USB_VCCD
2 2 Ground V BUS
C C
USB20_HUB_P3_R 3 4 USB20_HUB2_P2_R
V I/O V I/O EMC@
@ D26
USB20
1
R319 1 2 0_0402_5% PESD5V0U2BT_SOT23-3
+USB_VCCD
+USB_VCCD
JUSB4
1
CMMI21T-670Y-N 1
4 3 USB20_HUB_N3_R VCC
<31> USB20_HUB2_N3 4 3
R337 2
22_0603_5% D-
1 2 USB20_HUB_P3_R 3 5
<31> USB20_HUB2_P3
2
1 2 D+ GND1
L33 EMC@ 4 6
GND GND2
1
R320 1 2 0_0402_5%
D @
USB3.0_EN# 2 TYCO_2041230-1
G
Q46 S
2N7002K_SOT23-3 CONN@
3
(Rear)
B B
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
USB connector
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, March 25, 2014 Sheet 35 of 48
5 4 3 2 1
A B C D E
2
AO4354_SOIC-8 +1.0VS
1
3 R325 3
8 1 100K_0402_5%
EMC@ C304
EMC@ C308
C448 2 1 1 7 2 2 R326
1 1 6 3 C449 1 1 22_0603_5%
1
EMC@ EMC@ 5 4.7U_0603_6.3V6K EMC@ EMC@ SUSP
2
4.7U_0603_6.3V6K
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
2 2 2 2
1
D
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
R327 2 D
<32,39,40,41,42,45> SUSP#
470_0603_5% G Q33 SUSP 2
1
S 2N7002K_SOT23-3 G
1
R328 Q34 S
3
+1.0VS_R 10K_0402_5% 2N7002K_SOT23-3
3
1
2
2 SUSP
G
S Q35
2N7002K_SOT23-3
3
+5VALW
2 1 1.0VS_GATE 2 1
4 R329 R345 4
10K_0402_5% 0_0402_5% 1
1
C450
D .1U_0402_16V7K
SUSP 2 Security Classification Compal Secret Data Compal Electronics, Inc.
2
G
Issued Date 2013/04/12 Deciphered Date 2014/04/12 Title
Q36
2N7002K_SOT23-3
S
DC DC
3
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, March 25, 2014 Sheet 36 of 48
A B C D E
A B C D
DC_IN_S1 DC_IN_S2
B+
1 1
EMI@ PL2 AO4407AL_SO8
HCB2012KF-121T50_0805 PQ9
1 2 1 8
CONN@ 2 7
200K_0402_1%
0.22U_0603_25V7K
PJP101 EMI@ PL3 3 6
0.022U_0603_25V7K
0.1U_0603_25V7K
7 HCB2012KF-121T50_0805 5
GND 6
PC34
PR7
2.2_1206_5%
1 2
GND 5
1
EMI@ PR414
PC33
PC21
4
GROUND 4
EMI reserve
2
POWER 3
2
DETECT 2
2
POWER 1
1
EMI@ EMI@ EMI@
GROUND PC22 PC19 PC35 EMI@ PC23
LOTES_AJAK0031-P002A 1000P_0402_50V7K 100P_0402_50V8J 100P_0402_50V8J 1000P_0402_50V7K
2
2
+3VALW
1
2.2U_1206_50V7K
P2-1
EMI@ PC419
2
750_0402_1%
150K_0402_1%
PR118
PR13
2
ADP_ID <32>
2
.1U_0402_16V7K
1
PC153
2 2
2
3 3
4 4
ENTRIP1 ENTRIP2
ENLDO (V) ENM (V) LDO5 LDO3 +5VALW +3VALW
Module model information (V) (V)
PR416 PR419
Irms=2.88A @ Io=7.6A, Vin=19V, Vo=3.3V 13.3K_0402_1% 30K_0402_1%
1 2 1 2
127K_0402_1%
68K_0402_1%
113K_0402_1%
PR412 PR404 Trace width need
RT8243A_B+ 20K_0402_1% 20K_0402_1% RT8243A_B+
1 2 1 2 meet LDO5 demand
1
EMI@ PL403
HCB2012KF-121T50_0805
1 2
Irms=3.08A @ Io=7A, Vin=19V, Vo=5V
B+
+3VALWP
2200P_0402_50V7K
10U_0805_25V6K
10U_0805_25V6K
PR420
PR423
PR417
0.1U_0402_25V6
SIS412DN-T1-GE3_POWERPAK8-5
ENTRIP22
ENTRIP12
3V_FB2
5V_FB1
FB=1.98V(Min) FB=1.98V(Min)
1
1
PC425
@EMI@ PC426
@EMI@ PC428
PC430
2.006V(Typ) 2.006V(Typ)
10K_0402_1%
2.03V(Max) 2.03V(Max)
5
2
2
PR425
1
TON
FB2
ENTRIP2
ENTRIP1
FB1
PQ401
21 PQ402
2
2 4 6 PAD 4 SIS412DN-T1-GE3_POWERPAK8-5 2
<32,40,41> SPOK PR415 PGOOD 20
2.2_0603_5% BYP1 PR413 PC424
7X7X3
1 2 BST_3V_1 1 2 BST_3V 7 2.2_0603_5% 0.1U_0603_25V7K 7X7X3
Isat:6.3A BOOT2 19 BST_5V 1 2 BST_5V_1 1 2
1
2
3
3
2
1
DCR: 21m~24m Ω PC415 PU403 BOOT1 Isat:6.3A
0.1U_0603_25V7K UG_3V 8 RT8243AZQW_WQFN20_3X3
UGATE2 DCR: 21m~24m Ω
PL405 18 UG_5V
3.3UH_MLD-06CZH3R3M-N1L_6.3A_20% UGATE1 PL404
1 2 LX_3V 9 3.3UH_MLD-06CZH3R3M-N1L_6.3A_20%
+3VALWP PHASE2 17 LX_5V 1 2
PHASE1 +5VALWP
1
5
4.7_1206_5%
4.7_1206_5%
@EMI@ PR409
LG_3V 10
LGATE2
@EMI@ PR411
16 LG_5V
ENLDO
LGATE1
LDO5
LDO3
1
ENM
VIN
2
+ PC429 4 1
2
330U_6.3V_M
PC422 0.1U_0603_25V7K
Cap. ESR=17m
11
12
13
14
15
1
680P_0603_50V7K
1
2
680P_0603_50V7K
SI7716ADN-T1-GE3_POWERPAK8-5 PQ404 330U_6.3V_M
+3VLP
ENM
RT8243A_B+
@EMI@ PC414
SI7716ADN-T1-GE3_POWERPAK8-5
2
1
2
3
@EMI@ PC418
Rds(on):13.5mΩ~16.5mΩ Cap. ESR=17m
2
Rds(on):13.5mΩ~16.5mΩ
3
2
1
1
1
PC416
4.7U_0603_10V6K
2
PR421
499K_0402_1% Typ: 225mA
1 2
VL
1
150K_0402_1%
1
3 PC417 3
PR422
4.7U_0603_10V6K
2
2
5V=321KHz 3V=375KHz (Vin=12 ~ 25v)
ENLDO threshold ON: 1.2min 1.6typ 2max PR418 (By Rton= 68K ohm)
120K_0402_1%
OFF: 0.9min 0.95typ 1max <32> EC_ON_3V_5V
1 2 ENM
Delta IL=[(Vin-Vo)/L]*[(Vin/Vout)*T]=3.54A
2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
ZAA00 MB
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, March 25, 2014 Sheet 38 of 48
A B C D E
A
+0.675VSP
TDC=0.42A
1.35V_B+ I rms= 0.87A @ Io=3.4A Ipeak=0.6A ;1.2Ipeak=0.72A
EMI@ PL301
HCB1608KF-121T30_0603
B+ 1 2 PR301
0_0603_5%
1 2
10U_0805_25V6K
BST_1.35V_1 BST_1.35V
+1.35VP
2200P_0402_50V7K
1
1
68P_0402_50V8J
0.1U_0402_25V6
@RF@ PC301
@EMI@ PC302
@EMI@ PC303
PC304
UG_1.35V
SIS412DN-T1-GE3_POWERPAK8-5
+0.675VSP
0.1U_0603_25V7K
10U_0805_6.3V6M
10U_0805_6.3V6M
LX_1.35V
2
PC306
1
PC307
PC308
5
16
17
18
19
20
1
LG_1.35V PU301
2
BOOT
PHASE
UGATE
VLDOIN
VTT
21
PAD
4 15 1
LGATE VTTGND
PQ301
Pin 14 Via*2
Cap. ESR=17m 14 2
PL302 PR302 PGND VTTSNS
1
2
3
4.7UH_FDSD0630-4R7M_5.5A_20% 14.3K_0402_1%
4 1 1 2 CS_1.35V 13 3
+1.35VP PC309 CS RT8207MZQW_WQFN20_3X3 GND
3 2 1U_0603_10V6K
SI7716ADN-T1-GE3_POWERPAK8-5
@EMI@ PR303
4.7_1206_5%
1 2 12 4 VTTREF_1.35V
VDDP VTTREF
5
PR304
1
1 1 7X7X3 5.1_0603_5%
330U_6.3V_M
1 2 VDD_1.35V 11 5
220U_D2_2VY_R17M
1
+ +
PGOOD
PC431
PC310
TON
1
4 5.1_0603_5% 0.033U_0402_16V7K
FB
S5
S3
2
2
2 @ 2 PC313 1 2
@EMI@ PC311
680P_0603_50V7K 1U_0603_10V6K +5VALW
10
6
PQ302
1 PR311
10K_0402_5%
1
2
3
1 2
+1.35V
EN_0.675VSP
PR306
2
TON_1.35V
11.8K_0402_1%
EN_1.35VP
<5> DDR_PWROK FB_1.35V 1 2
+1.35VP
MOS Rds(ON) :Max=16.5m-ohm PR307
887K_0402_1%
Min=13.5m-ohm
1
1 2
1.35V_B+
PR308
15K_0402_1%
Vout = Vfb*[1+(Rt/Rb)]
1 1
@ PR309 = 0.75*[1+(12K/15K)]
2
0_0402_5%
<32> SYSON
1 2 = 1.35V
1
@ PC314
0.1U_0402_10V7K
2
+1.35VP PR310
Ipeak=3.4A ;Iocp>=10A ; Imax=2.4A 200K_0402_1%
1 2
Fsw=285K <32,36,40,41,42,45> SUSP#
@ PJ301
Delta IL=[(Vin-Vo)/L]*[(Vin/Vout)*T]=0.94A
1
JUMP_43X118
PC315 +1.35VP 2 1 +1.35V
LIR=Delta IL/Ipeak=0.276 0.1U_0402_25V6K 2 1
2
L=Vout[1-(Vout/Vin)]/LIR*Iout*Fsw=4.7uH
Cout=[L*(Iout+DeltaIL/2)^2]/[(Vout+Delta V)^2-Vout^2]
=634.18uF
@ PJ302
CINBULK=ILoad*Vout*(Vin-Vout)/(Fsw*Vin^2*VINPP)=0.38uF JUMP_43X39
1 2
+0.675VSP 1 2 +0.675VS
+1.05VSP @ PJ402
Vin = 3.3V 2
JUMP_43X79
1
+1.05VSP 2 1 +1.05VS
Iin = 4.05*1.05/0.85/3.3
= 1.52A
4*4*2
Isat:9A
+1.05V_VIN PU401 DCR: 29m Ω(Max)
@ PJ401
JUMP_43X39
1.52A 11
D TP D
1 2 10 1 PL401
+3VALW 1 2 PVIN LX 1UH_FDSD0420-H-1R0M-P3T_4.9A_20%
9 2 LX_1.05V 1 2
PVIN LX +1.05VSP
1
PC401 8 3
22U_0805_6.3VAM SVIN LX
7 4 @EMI@ PR401
I rms= 1.89A
2
NC PGOOD
15K_0402_1%
68P_0402_50V8J
4.7_1206_5%
1
6 5
1 2
FB EN
22U_0805_6.3VAM
22U_0805_6.3VAM
22U_0805_6.3VAM
1
1
PR402
PC403
@EMI@ PC402
PC420
PC404
PC405
PR403 RT8078AGQW_WDFN10_3X3 680P_0603_50V7K
2
20K_0402_1%
2
1 2 EN_1.05V
<32,36,39,41,42,45> SUSP# @
0.1U_0402_25V7K
Vout = Vfb*[1+(Rt/Rb)]
PC406
1
FB_1.05V = 0.6*[1+(15K/20K)]
2 = 1.05V
1
20K_0402_1%
PR405
+1.05VSP
Ipeak=4.05A; CL(min)>=4.4A; Fsw=1MHz
2
Delta IL=[(Vin-Vo)/L]*[(Vin/Vout)*T]=0.716A
C C
LIR=Delta IL/Ipeak=0.177
L=Vout[1-(Vout/Vin)]/LIR*Iout*Fsw=1.0uH
CINBULK=ILoad*Vout*(Vin-Vout)/(Fsw*Vin^2*VINPP)=2.66uF
@ PJ403
JUMP_43X79
+1.0VALWP 2 1 +1.0VALW
+1.0VALWP 2 1
Vin = 3.3V
Iin = 3.4*1/0.85/3.3
= 1.22A
4*4*2
Isat:9A
@ PJ406 +1.0V_VIN PU402
DCR: 29m Ω(Max)
JUMP_43X39
1.22A 11
1 2 10 TP 1 PL402
+3VALW 1 2 PVIN LX 1UH_FDSD0420-H-1R0M-P3T_4.9A_20%
9 2 LX_1V 2 1
B PVIN LX +1.0VALWP B
1
PC407 8 3
22U_0805_6.3VAM SVIN LX
7 4 @EMI@ PR406
I rms=1.56A
2
NC PGOOD
13.3K_0402_1%
68P_0402_50V8J
4.7_1206_5%
1
6 5
22U_0805_6.3VAM
22U_0805_6.3VAM
22U_0805_6.3VAM
1 2
FB EN
1
PR407
PC409
PC410
PC411
PC413
@EMI@ PC408
@ PR408 RT8078AGQW_WDFN10_3X3 680P_0603_50V7K
2
0_0402_5%
2
2
1 2 EN_1V
<32,38,41> SPOK @
Vout = Vfb*[1+(Rt/Rb)]
= 0.6*[1+(9.76K/14.7K)]
0.1U_0402_10V7K
@ PC412
1
FB_1V = 1V
2
1
20K_0402_1%
+1VALWP
PR410
LIR=Delta IL/Ipeak=0.205
L=Vout[1-(Vout/Vin)]/LIR*Iout*Fsw=1.0uH
CINBULK=ILoad*Vout*(Vin-Vout)/(Fsw*Vin^2*VINPP)=2.18uF
A A
Vout = Vfb*[1+(Rt/Rb)]
= 0.8*[1+(20K/16K)]
= 1.8V
@PJ502
@ PJ502
JUMP_43X39
1 2
+1.8VALWP
+1.8VALWP 1 2 +1.8VALW
1 Ipeak=0.365A ; 1
Iocp>=3.1A
VDD_1.8V
+5VALW
1
PC512
1U_0402_6.3V6K
RT9042:
9
@PJ501
@ PJ501 4 5
Quiescent Current (GND Current)
GND
VDD NC
JUMP_43X39 IQ(typ)=0.6mA,IQ(max)=1.2mA
1 2 1.8V_VIN 3 6
+3VALW 1 2 VIN VOUT +1.8VALWP PD =(Vin-Vout)*Iout + Vin*IQ =0.551W
20K_0402_1%
22U_0805_6.3VAM
2 7
EN ADJ θ JA= 75°C/W*0.551=41.35°C
1
0.365A
22U_0805_6.3VAM
PC502
PR514
1 8 @ PC513
@PC513
PGOOD GND
1
0.01U_0402_25V7K
PC503
2
PU503
2
RT904225GSP_SO8 ADJ_1.8V
@ PR502
@PR502
1
0_0402_5%
2 1 EN_1.8V
<32,38,40> SPOK PR503
16K_0402_1%
0.1U_0402_16V7K
2
PC515
2
@
2 2
Vout = Vfb*[1+(Rt/Rb)]
@PJ504
@ PJ504
= 0.8*[1+(14K/16K)]
JUMP_43X39 = 1.5V
VDD_1.5V +1.5VSP 1 2 +1.5VS
+5VALW 1 2
1
3 3
PC506
1U_0402_6.3V6K
+1.5VSP
Ipeak=0.072A
2
@PJ503
@ PJ503 4 5 Iocp>=3.1A
GND
JUMP_43X39 VDD NC
1 2 VIN_1.5V 3 6
+3VALW 1 2 VIN VOUT +1.5VSP
1
14K_0402_1%
22U_0805_6.3VAM
2 7
EN ADJ RT9042:
1
1
0.072A
22U_0805_6.3VAM
PC519
PR506
1
PGOOD GND
8 @PC514
@ PC514 Quiescent Current (GND Current)
1
0.01U_0402_25V7K
2
IQ(typ)=0.6mA,IQ(max)=1.2mA
PC520
2
PU502
2
RT904225GSP_SO8 ADJ_1.5V PD =(Vin-Vout)*Iout + Vin*IQ =0.133W
PR515 θ JA= 75°C/W*0.551=10.01°C
1
36K_0402_1%
1 2 EN_1.5V
<32,36,39,40,42,45> SUSP# PR511
16K_0402_1%
2
1
0.1U_0402_25V7K
PC510
2
4 4
D D
470P_0402_50V7K
GND
10U_0805_25V6K
10U_0805_25V6K
0.1U_0603_25V7K 4 6 12V_FB
BG FB
PC6
1
1
EMI@ PC432
@EMI@ PC3
PC4
PC5
RT8298ZSP_SO8
2
2
2
PR3
60.4K_0402_1%
2
1 2
1
PR4
14K_0402_1%
12V_LG PR5
1K_0402_1% VFB=0.8V
Vo=0.8(1+Rt/Rb)=0.8(1+14k/1k)=12V
2
C C
PL1 CL(min)=8A; CL(min)=10A; CL(min)=12A
4.7UH_FDSD0630-H-4R7M-P3_5.5A_20%
1 2 +12VSP
22U_1206_16V6-M
22U_1206_16V6-M
22U_1206_16V6-M
330P_0402_50V7K
7X7X3
5
1
4.7_1206_5%
@EMI@ PR305
Isat:5.5A
1
PC7
PC8
PC9
PC10
1
DCR: 40m Ω
2
@
+12VSP
2
4 Ipeak=2.5A; Fsw=600KHz
2
Delta IL=[(Vin-Vo)/L]*[(Vin/Vout)*T]=1.702A
680P_0603_50V7K
@EMI@ PC316
PQ1
SI7716ADN-T1-GE3_POWERPAK8-5 LIR=Delta IL/Ipeak=0.851
3
2
1
Rds(on):13.5mΩ~16.5mΩ L=Vout[1-(Vout/Vin)]/LIR*Iout*Fsw=4.7uH
CINBULK=ILoad*Vout*(Vin-Vout)/(Fsw*Vin^2*VINPP)=2.59uF
2
@ PJ2
JUMP_43X39
+12VSP 1 2 +12VS
1 2
B B
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR- 12VSP
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4019RF
Date: Tuesday, March 25, 2014 Sheet 42 of 48
5 4 3 2 1
5 4 3 2 1
<10> VGFX_VSNS
1
@ PC802
1000P_0402_50V7K
2
1
VCORE_GSNS
PC803
0.01UF_0402_25V7K
2
CPU_B+
PC804 PC805
120P_0402_50V8J
220P_0402_50V7K
PC806 1 2 1 2 1 2
10U_0805_25V6K
10U_0805_25V6K
6800P_0402_25V7K PR802
2200P_0402_50V7K
PC807 100_0402_1%
D D
1 2 1000P_0402_50V7K
1
2K_0402_1%
@EMI@ PC808
PC809
PC810
1 2 1 2 1 2
PR804 PR805 PQ801
PR803
1
Close GFX choke 137K_0402_1% 2.05K_0402_1%
2
PR806 PR809
21K_0402_1%
PH801 PR807 2K_0402_1% 0_0805_5%
1
PR808
10K_0402_1%_ERTJ0EG103FA 324_0402_1% UGATEG1 1 2UGATEG1-1 4
VSUMG- 1 2
14A
1 2
1
0.22uH DCR= 0.97+-5% m ohm, Idc~Isat= 25~34A
+3VALW PC812 SI7716ADN-T1-GE3_POWERPAK8-5
3
2
1
.1U_0402_16V7K 1000P_0402_50V7K PL803 +SOC_VNN
2
1
PC813
11K_0402_1%
1.91K_0402_1%
0.36UH_ETQP4LR36AHM_20A_20%
0.022U_0402_25V7K
0.1U_0402_25V7K
1 2
1
PHASEG 1 4
2.61K_0402_1%
Vcore_ISUMNG
1
1
PC815
PR811
PC814
2
5
PC816 2 3
PR810
Vcore_COMPG
BOOTG 0.1U_0603_25V7K
Vcore_RTNG
2
1
BOOTG 1 2 1 2
Vcore_FBG
2
Vcore_PG 2
2 UGATEG1 PR813
1
2.2_0603_5% PR814 @EMI@
PR812
VSUMG+ Vcore_ISUMPG PHASEG LGATEG 4 4.7_1206_5%
3.65K_0402_1% 1_0402_5%
1 2
PR815 PR816
Close GFX L/S MOS LGATEG +5VALW
2
PU801 PC817 @EMI@
33
32
31
30
29
28
27
26
25
1
2
3
PR817 PQ802 680P_0603_50V7K
VSUMG+
27.4K_0402_1%
VSUMG-
PAD
ISUMPG
ISUMNG
RTNG
FBG
COMPG
PGOODG
BOOTG
UGATEG
1 2
1U_0603_10V6K
1
PR818 SIRA06DP-T1-GE_POWERPAKSO-8-5
1
PH802 3.83K_0402_1% PR819
1
@ PR821 1 2 NTCG_1 1 2 NTCG 1 24 0_0603_5% PR820
PC818
0_0402_5% 470K +-5% ERTJ0EV474J 0402 NTCG PHASEG 1_0603_5%
1 2 Vcore_VRON 2 23
<32> VR_ON
2
VR_ON LGATEG
2
EMI@ PL802
2
1 PR843 2 VR_SVID_CLK_R 3 22 HCB1608KF-121T30_0603
<8> VR_SVID_CLK SCLK VCCP
20_0402_1% 1 2
PR844 VR_SVID_ALERT# 4 ISL95833BHRTZ-T_TQFN32_4X4 21 Vcore_VDD CPU_B+
<8> VR_SVID_ALERT# ALERT# VDD
16.9_0402_1% @ PR801 1.91K_0402_1% EMI@ PL801
1U_0603_10V6K
PC801
1 2 VR_SVID_DATA_R 5 20 1 2 HCB1608KF-121T30_0603
<8> VR_SVID_DATA SDA PWM2
1
C 1 2 B+ C
PR829 6 19 LGATE1
<32> VR_HOT# VR_HOT# LGATE1
0.1U_0402_25V6
5.49K_0402_1%
10U_0805_25V6K
10U_0805_25V6K
1
2
NTC_1 1 2 NTC 7 18 PHASE1
NTC PHASE1 +
68U_25V_M
1
1
PC822
PC823
PC819
1 2 8 17
PGOOD
Height 6 mm
PC824
470K +-5% ERTJ0EV474J 0402
BOOT1
ISUMN
ISUMP
ISEN2 UGATE1
COMP
ISEN1
27.4K_0402_1%
RTN
1
2
69.8_0402_1%
@ PC825 0_0402_5%
499_0402_1%
69.8_0402_1%
FB
2
1
47P_0402_50V8J @ PR822 @
PR823
PR824
PR825
PH803
PR826
UGATE1 @
+5VALW
2
10
11
12
13
14
15
16
5
BOOT1 PQ803
2
For VR_HOT#, already PR827 0.22uH DCR= 0.98+-5% m ohm, Idc~Isat= 25~34A
VGATE <32>
Vcore_ISUMN
0_0805_5%
Vcore_ISUMP
1.91K_0402_1% PR828
@ PC826 PL804 +SOC_VCC
Close CPU L/S MOS
3
2
1
0.1U_0402_16V7K 0.36UH_ETQP4LR36AHM_20A_20%
2
PHASE1 1 4
5
2.2_0603_5%
1
2 3
680P_0603_50V7K 4.7_1206_5%
PR830 PC827
@EMI@
PR831
Vcore_FB BOOT1 1 2 1 2
Vcore_COMP 0.1U_0603_25V7K
PC828 PR832 PR833 LGATE1 4
2
680P_0402_50V7K 2K_0402_1% 64.9K_0402_1% VSUM+
1
1 2 1 2 1 2
2.61K_0402_1%
1
1_0402_5%
1
3.65K_0402_1%
PR834
1
2
3
PR835 PR836
11K_0402_1%
@EMI@ PC829
PQ804
2K_0402_1%
PC830 PC831
0.047U_0402_25V7K
2
1
PR838
1000P_0402_50V7K 120P_0402_50V8J
0.1U_0402_25V7K
2
1
PC832
1 2 1 2 1 2
1
1
274_0402_1%
PR837 SIRA06DP-T1-GE_POWERPAKSO-8-5
PC833
PR839
100_0402_1% 1
2
PR840
PH804 VSUM+
Close CPU choke
2
B B
6800P_0402_25V7K
PR841 PC834
2
1
PC835
PR842 VSUM-
2
137K_0402_1%
VSUM-
@ PC836
.1U_0402_16V7K
330P_0402_50V7K
1
PC837
1 2
2
<10> VCORE_VSNS
1 2
PC838
0.01UF_0402_25V7K
<10> VCORE_GSNS
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
+SOC_VCC/+SOC_VNN
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 4019RF 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Sheet 43 of 48
5 4 3 2 1
5 4 3 2 1
D D
+SOC_VCC +SOC_VNN
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
1U_0402_6.3V6K
1U_0402_6.3V6K
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
1 1 1 1 1 1 1 1 1 1 1 1 1 1
PC639
PC640
PC641
PC642
PC643
PC667
PC668
PC648
PC649
PC655
PC657
PC644
PC645
PC656
2 2 2 2 2 2 2 2 2 2 2 2 2 2
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0603_6.3V6M
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
PC650
PC651
PC652
PC653
PC654
PC669
PC670
PC671
PC672
PC679
PC658
PC659
PC660
PC661
PC674
PC673
PC676
PC675
PC678
PC677
PC646
C C
2 2 2 2 2 2 2 2 2 2@ 2 2 2 2 2 2 2 2 2 2 2
1 1 1 1 1
+ PC662 + PC663 + PC664 + PC665 + PC666
ESR 10m 390U_2.5V_M 390U_2.5V_M
ESR 10m 390U_2.5V_M 390U_2.5V_M 390U_2.5V_M
2 2 2 2 2
B B
A A
+VGA_B+
PL16
HCB2012KF-121T50_0805
B+ DIS_EMI@
2 1
2
100P_0402_25V8K
220P_0402_25V8K
10U_0805_25V6K
10U_0805_25V6K
@EMI@ PC155
@EMI@ PC156
DIS@ DIS@ PR160
1
DIS@ PC159
DIS@ PC160
0_0603_5%
PR161
0.22U_0603_25V7K
2 1
1 1
+5VALW 1_0603_5%
PC162
DIS@ PC161 DIS@
D D
1U_0402_6.3V6K
2
DIS@
PR162 @ PR203
100_0402_1% 0_0402_5%
2 1 RTN_VGA ISUM+ 1 2 +5VALW
5
DIS@ PC163
VDD_VGA
VIN_VGA
1000P_0402_50V7K ISUM-
13 IMON_VGA
DIS@
1 2 1 2 BST_VGA_1 1 2 PQ27
<20> VSSSENSE_VGA
BST_VGA
1
PC166 DIS@ PR163 DIS@ PC164
330P_0402_50V7K 2.2_0603_5% 0.22U_0603_25V7K 4
<19> VCCSENSE_VGA 1 2 DIS@
29
10
11
12
14
2
9
PR164
+VGA_CORE 100_0402_1% DIS@ PC165 DIS@ PR845
ISUM+
ISUM
BOOT
AGND
RTN
VDD
VIN
IMON
2 1 330P_0402_50V7K 0_0805_5% SIR472DP-T1-GE3_POWERPAK8-5
3
2
1
1 2 DH_VGA_1 DCR=1.1 mOHM
DIS@ +VGA_CORE
VSEN_VGA 7 15 DH_VGA PL17 DIS@
VSEN UGATE 0.36UH_MMD10DZR36MS1_24A_20%
FB_VGA 6 PU13 16 LX_VGA 1 4
FB ISL62881C_QFN28_4X4 PHASE
5
COMP_VGA 5 DIS@ 17 2 3
COMP VSSP
220P_0402_25V8K
68P_0402_50V8J
DIS@ DIS_EMI@
@EMI@ PC167
@EMI@ PC168
VW_VGA 4 18 DL_VGA DIS@ PQ29 PR166
VW LGATE
1
DIS@ PR165 PQ28 4.7_1206_5% DIS@
DIS@ DIS@ 2 1 RBIAS_VGA 3 19
VCCP_VGA PR167 PR168 @
PR169 PR170 DIS@ PC170 RBIAS VCCP 4 4 3.65K_0603_1%
47K_0402_1% PR171 0_0402_5%
2
2.37K_0402_1% 226K_0402_1% 1000P_0402_50V7K 2 20
2 1 1 2 1 2 2 1 PGOOD VID0 1 2 +5VALW
2
1 21 DIS@ PR172
DPRSLPVR
CLK_EN# VID1
2
PC169 DIS_EMI@ 1 2 1 PH52
3
2
1
3
2
1
0_0603_5%
1
390P_0402_50V7K PC171
VR_ON
PC172 SIRA10DP-T1GE3_POWERPAKSO-8-5 680P_0603_50V7K 2.61K_0402_1% 10K_0402_5%_ERTJ0ER103J
VID6
VID5
VID4
VID3
VID2
DIS@
1
PC174 2.2U_0603_6.3V6K
2
56P_0402_50V8 DIS@
2 1 2 1 1 2 2 1 SIRA10DP-T1GE3_POWERPAKSO-8-5
28
27
26
25
24
23
22
C 1 2 C
PC173 PR173 DIS@ DIS@ PR174 DIS@ PR175
1000P_0402_50V7K 715_0402_1% 8.06K_0402_1%
Rds=4.1mOHM(typ) 11K_0402_1%
DIS@ DIS@ Rds=5.0mOHM(max) Layout Note:
VGA_VID1
VGA_VID0
Place near Choke 1 2
VGA_VID6
VGA_VID5
VGA_VID4
VGA_VID3
VGA_VID2
DIS@ PC249
DIS@ PC175 0.1U_0402_16V7K
0.1U_0402_16V7K 1 2
@ PR177
DPRSLPVR
0_0402_5%
VR_ON_VGA
<20,46> DGPU_PWROK
2 1 1 2
GPU_VID0 <16> OCP SET: 47A
2
+3VS 1 2 0_0402_5% 2 1@ PR178 DIS@ PC176
GPU_VID1 <16> 0.1U_0402_16V7K DIS@ @ PR181
PR176 1K_0402_1% 0_0402_5% 2 1@ PR179 PR180 100_0402_1%
GPU_VID2 <16> 1.07K_0402_1%
DIS@
0_0402_5% 2 1@ PR182 @ PR185
1
GPU_VID3 <16> 82.5_0402_1%
0_0402_5% 2 1@ PR183 1 2 1 2
GPU_VID4 <16>
2
0_0402_5% 2 1@ PR184 ISUM+ @ PC177 @ PC178
GPU_VID5 <16> 0.01U_0402_16V7K 180P 50V J NPO 0402
1
0_0402_5% 2 1@ PR186
1
@ PR190 PC181
0_0402_5% 0.1U_0402_25V6
2 1
2
Ipeak=35.3A
Imax=24.7A
B
+VGA_CORE +VGA_CORE IOCP=42.38A B
Under VGA Core Near VGA Core F=300kHZ
PC179
330U_X_2VM_R6M PC180
330U_X_2VM_R6M 1K_0402_1% PR191 DIS@ 1 2 GPU_VID0 2 1 @ PR192 1K_0402_1%
Total capacitor
1 1460u
1K_0402_1% PR193 DIS@ 1 2 GPU_VID1 2 1 @ PR194 1K_0402_1%
+
1 ESR=1.8m ohm
DIS@
4.7U_0603_6.3V6M
4.7U_0603_6.3V6M
4.7U_0603_6.3V6M
4.7U_0603_6.3V6M
4.7U_0603_6.3V6M
4.7U_0603_6.3V6M
4.7U_0603_6.3V6M
4.7U_0603_6.3V6M
GPU_VID2
ESR 6m OHM
1
1
PC182
PC183
PC184
PC185
PC186
PC187
PC188
PC189
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
+3VS Iocp(set)>=47A
Delta IL=[(Vin-Vo)/L]*[(Vin/Vout)*T]=9.625A
47U_0805_4V6
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
4.7U_0603_6.3V6M
4.7U_0603_6.3V6M
4.7U_0603_6.3V6M
4.7U_0603_6.3V6M
4.7U_0603_6.3V6M
4.7U_0603_6.3V6M
4.7U_0603_6.3V6M
1 1 1 1
1
LIR=Delta IL/Ipeak=0.273
PC197
PC198
PC199
PC200
@ PC201
1
1
PC190
PC191
PC192
PC193
PC194
PC195
PC196
L=Vout[1-(Vout/Vin)]/LIR*Iout*Fsw=0.36uH
2
2 2 2 2
Cout=[L*(Iout+DeltaIL/2)^2]/[(Vout+Delta V)^2-Vout^2]
2
DIS@
DIS@
=11849uF
@
@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
CINBULK=ILoad*Vout*(Vin-Vout)/(Fsw*Vin^2*VINPP)=3.06uF
4.7U_0603_6.3V6M
4.7U_0603_6.3V6M
4.7U_0603_6.3V6M
4.7U_0603_6.3V6M
4.7U_0603_6.3V6M
1
1
PC202
PC203
PC204
PC205
PC206
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
2
1
1
PC207
PC208
PC209
PC210
PC211
PC212
PC213
PC214
DIS@
DIS@
DIS@
DIS@
DIS@
2
2
DIS@
DIS@
DIS@
DIS@
A A
@
DIS@
@PJ408
@ PJ408
PC517
JUMP_43X79
1 2 2 1
+VRAM_1.5VSP 2 1 +VRAM_1.5VS
@PC508
@ PC508 1000P_0402_50V7K
1U_0402_6.3V6K
DIS@ DIS@
2 1 PR513 PR510
24K_0402_1% 21K_0402_1%
1 2 1 2
DIS@ DIS@
1
PC511 PR507 1
2 1 2 1 COMP_1.5VRAM
47U_0805_6.3V6M
47U_0805_6.3V6M
47U_0805_6.3V6M
@EMI@ PR312
4.7_1206_5%
GND
1
DIS@ PC504
DIS@ PC521
DIS@ PC522
@ @ 6 7
VIN BOOT
1
22U_0805_6.3VAM
PR505 PC507
10K_0402_1% .1U_0402_16V7K RT8073BDCC_DFN12_3X3
13
2
2
1
PC516
DIS@
DIS@ DIS@
PC518
PR501
2
1
BOOT_1.5VRAM 2 BOOT_1.5VRAM_1 1 2
680P_0603_50V7K
@EMI@ PC317
0_0603_5%
@PJ407
@ PJ407 0.1U_0603_25V7K
1
JUMP_43X39
1 2
+5VALW 1 2 I rms= 2.25A
2
1.94A
2 2
3 3
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR-VRAM_1.5VSP
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Rev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4019RF
Date: Tuesday, March 25, 2014 Sheet 46 of 48
A B C D
5 4 3 2 1
D D
3 2013/09/17 43 change PC829 and PC817 to 0603 size meet C38 MB design guide
8 2013/09/26 40,41 change PR403=20K, PR515=36K, PC406=0.1uF, PC510=0.1uF meet Power sequence
15 2013/11/12 38 1.PR418=120K
reduce current sink
2.P424=100K
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR-PIR
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4019RF
Date: Tuesday, March 25, 2014 Sheet 47 of 48
5 4 3 2 1
5 4 3 2 1
D 1.1V D
+SOC_VCC
12A
B+
ISL95833
1V
+SOC_VNN
14A
20V
Adapter
3.3V 1.05V
RT8078 +1.05VSP
1.52A 4.05A
3.3V
+3VALWP
6A
3.3V 1.0V
RT8078 +1.0VALWP
1.22A 3.4A
B+
B+ RT8243A 3.3V 1.8V
RT9042 +1.8VALWP
20V 0.365A 0.365A
C C
3.3V 1.5V
RT9042 +1.5VSP
0.072A 0.072A
5V 5V 1.5V
+5VALWP RT8073 +VRAM_1.5VSP
6A 1.94A 5.5A
1.35V
+1.35VP
3.4A
B+
RT8207M
0.675V
+0.675VSP
0.6A
B B
B+ 12V
RT8298 +12VSP
2.5A
B+ 1.1V
ISL62881C +VGA_CORE
35.3A
B+
Converter
A A