Setvet Code)- 83-VLSIL9246

Hall TicNet ne ttHSAo45?

Name V.Pavan venlata Ruma n

Etaminathon) B-Tethya.TRthM.BAE-ytuh ed semll té

Month adymh Junt-20

Bron lh- F-GE

Subiett tode- A30420

Dort of Btai nation,- o1 /%6h

uesthon Paptn Code, - A3olL20

Sighatwhe of stndent;-

Seia no.oflast Page. wvitten- (7

A)
S Stoatii logic the tmes letic
gal is (ombin ation of fmes and
nmos
whhe the LMoS
(an veplall the pmos nmos. wth atidsayté
ye

Prnos

6nND

(mos deSign is Simil o to the NaND, NoR 9e, so0 rtults

ame may be
dnd the (os he
input ont and ent eutAt-t is fubrtakfd to
minimize the desan Compiexity.CMOS Constvuction Canhe done by atn ginng
inputsto the dagas qut°'% of Prm0S and hmes
and ewtpt is taxen î'n
betw een the néts
, 9a lonnét tion bêtweln the Prm6s and nmos.
the Poth Supoly is qitn to te Pmos tron$istor and
gnound is (onnet ted
4o the Sowle oT he nmos. The lombination
of Ands and nmos is
bovght to qot the tmos tonsistor. pnttal tabila tion oftMol is done

On stliton Shêath these clasfied into Nweu and P-wl ke fabri(aton

( M o s static loit is the Standsd toqil to build ause in the
to
velo des?n. % (MoS logic issimple tombinatitn of Pmos and omes.

vespet tively
 0eSt9n CMOS Statitlgic)

TaMin a Pmos oand hmds tnsbtor

Connelting ot Amo5 drain and nmesdraun by heatinf tetnaliy.
iS
the Pmos transStors greund
) Soute (Voo) is qivsn to the senLe at
thansiStor.
girbn to the Seunte df the nmos

tran SiStor and outAt i's taken

4) gTnpt is givdn to the gates of both
in behween he both drains ofHe PmoSand nmos tvansis tor

2
Schtmatic diaghan of woR 9ate)
we knew hat

Y=A+6)
tsUuU PmoS. , Pata/sel nms.
Pahale PmS, sehes nmes

Pwl uP
litur

P swnn

Cirt

Schematit diagham NoR Jate.

 VoP
D

DS N laen
GrND
Stiun diagham

n NOR gate we ha tuwv-ines whith ane for greund velte in Put

and hav two Pemos and nmes mt ust"-"br in tës Cannt tion bltwgn
he
Playeh and nlan,So, that the dhusion toe Plate.-"îs used fov-the
Comt tion bêtween min luh)
VoD wo and to take the owkput vomthe gate.

ZIIITZIZA

Layout fov NOR gate

CMBS [Nuweu) Fabrication n tmes fabilatien there adé a SAPS .TheY o1e
Stepi

in CmeS Nwei Fabritaton w£ gwwn the P on the sjijon sheoth whith

i Srmal1e$t Part of the shéath wedope the kao Polysiliten on shtath.

Step2

Addin Siion dioxide (ayh on the sheath Ardnly to dope the métal on tht
Sheath sily.

step ho

CNOWadding photo tSist layh. on thé Shesth. to evenly distibute.

layenS on the Sheath

> uv ad uirla
AePL
 In SttPg uv wa is added onhe toP laye So thut all the

hotoveCst (ayon wi b removtd in theLode, betauyi afalleuinf enly

Semtpart of tayoh.

Stte4

So,Hee in this sttp the winduw tayetnS witbe rtnovdd and tHatt

9ap of Plate whee dope of oth layeh wiu hapPn

Stee s

on ad dirg he anetC layo siten diotide wt av the nwl

plale
arothel tontittor (an b ad thundtd onit

on addi othen layoh we(an neuettthe o thh tayehs on it

but theMe Wiit be onllaye% m the Cotre Sheath. whith iSuwl.

Step1
Wow appying otheh layphsie on the pe'et fayeh wi gie
he eptiis ic layen

SteP e Can 9ut thew by a.ddaný a uy -1ght winidw ia joh

We 9et the. laa

Stepdr adding métaIC layoh to the top lay#1 ef thê Sheath 9ies the hinda
MOS
Wwly Awhlhe metalkc layen is uied to tombint twith othen
tvanGstorS ina (hi metallid lae

MOS (Nwen)
Fabnt oitn S ustd ov duasin d thip size and Sething all the transis tors
im a e ahp to vedule the size of chip. thit 1Sustd in he
thipset medelint
to fabiatt he th?s-