BOYLESTAD 103pages

b.
2
SEMICONDUCTOR DIODE c. 3
d. 4
1. How many terminals does a diode have?
a. 1 9. One eV is equal to _____ J.
b. 2 a. 6.02 × 10
23
c. 3 b. 1.6 × 10
–19
d. 4 c. 6.25 × 10
18
–24
d. 1.66 × 10
2. What is the resistor value of an ideal diode
in the region of conduction? 10. Which of the following elements is most
a. 0 frequently used for doping pure Ge or Si?
b. 5 k a. Boron
c. Undefined b. Gallium
d. Infinity c. Indium
d. All of the above
3. What is the state of an ideal diode in the
region of nonconduction? 11. The diffused impurities with _____ valence
a. An open circuit electrons are called donor atoms.
b. A short circuit a. 4
c. Unpredictable b. 3
d. Undefined c. 5
d. 0
4. The diode _____.
a. is the simplest of semiconductor 12. In what state is a silicon diode if the voltage
devices drop across it is about 0.7 V?
b. has characteristics that closely a. No bias
match those of a simple switch b. Forward bias
c. is a two-terminal device c. Reverse bias
d. All of the above d. Zener region
5. The ideal diode is a(n) _____ circuit in the 13. What unit is used to represent the level of a
region of nonconduction. diode forward current IF?
a. open a. pA
b. short b. nA
c. A
6. Which of the following is an atom d. mA
composed of?
a. Electrons 14. Which of the following ratings is true?
b. Protons a. Si diodes have higher PIV and
c. Neutrons narrower temperature ranges than
d. All of the above Ge diodes.
b. Si diodes have higher PIV and
7. How many orbiting electrons does the wider temperature ranges than Ge
germanium atom have? diodes.
a. 4 c. Si diodes have lower PIV and
b. 14 narrower temperature ranges than
c. 32 Ge diodes.
d. 41 d. Si diodes have lower PIV and wider
temperature ranges than Ge
8. How many valence electrons does a silicon diodes.
atom have?
a. 1
15. It is not uncommon for a germanium diode
with an Is in the order of 1–2 A at 25°C to 23. Which capacitance dominates in the
have leakage current of 0.1 mA at a forward-bias region?
temperature of 100°C. a. Diffusion
a. True b. Transition
b. False c. Depletion
d. None of the above
16. Calculate static resistance RD of a diode
having ID = 30 mA and VD = 0.75 V. 24. At what kind of operating frequency
a. 25 diffusion or transition is a capacitor
b. 40 represented in parallel with the ideal
c. 0.04 diode?
d. 0.025 a. Low frequency
b. Moderate frequency
17. Calculate ID if RD = 30 and VD = 0.84 V. c. Mid frequency
a. 28 mA d. Very high frequency
b. 0.028 mA
c. 2.8 A 25. What is the value of the transition
d. 280 A capacitance for a silicon diode when VD =
0?
18. Refer to Figure 1.27. Calculate the dynamic a. 1 pF
resistance rd of a diode having ID = 27.5 b. 3 pF
mA. c. 5 pF
a. 0 d. 10 pF
b. 2
c. 5 26. Which of the following devices can check
d. 26 the condition of a semiconductor diode?
a. Digital display meter (DDM)
19. Determining rd to a high degree of accuracy b. Multimeter
from a characteristic curve is very accurate. c. Curve tracer
a. True d. All of the above
b. False
27. What does a high resistance reading in both
20. The _____ diode model is employed most forward- and reverse-bias directions
frequently in the analysis of electronic indicate?
systems. a. A good diode
a. ideal device b. An open diode
b. simplified c. A shorted diode
c. piecewise-linear d. A defective ohmmeter
21. Calculate the power dissipation of a diode 28. The condition of a semiconductor diode can
having ID = 40 mA. be determined quickly using a _____.
a. 28 mW a. DDM
b. 28 W b. VOM
c. 280 mW c. curve tracer
d. Undefined d. Any of the above
22. Which capacitance dominates in the 29. Determine the nominal voltage for the
reverse-bias region? Zener diode at a temperature of 120° C if
a. depletion the nominal voltage is 5.1 volts at 25° C and
b. conversion the temperature coefficient is 0.05%/° C.
c. 40 Diffusion a. 4.6 V
d. 140 None of the above b. 4.86 V
c. 5.1 V 37. The term _____ is often used when
d. 5.34 V comparing the resistance level of materials.
a. permittivity
30. Calculate the temperature coefficient in %/° b. inductivity
C of a 10-V nominal Zener diode at 25° C if c. conductivity
the nominal voltage is 10.2 V at 100° C. d. resistivity
a. 0.0238
b. 0.0251 38. In the atomic lattice the _____ and _____
c. 0.0267 form the nucleus.
d. 0.0321 a. electrons, neutrons
b. electrons, protons
31. In which of the following color(s) is (are) c. neutrons, protons
LEDs presently available? d. None of the above
a. Yellow
b. White 39. An increase in temperature of a
c. Orange semiconductor can result in a _____ in the
d. All of the above number of free electrons in the material.
a. substantial increase
32. 32.What is the maximum power rating for b. substantial decrease
LEDs? c. slight decrease
a. 150 mW d. no change
b. 500 mW
c. 1 W 40. Ge and Si have a(n) _____ coefficient in
d. 10 W forward bias.
a. positive temperature
33. In which of the following is the light b. negative temperature
intensity measured? c. absolute temperature
a. Candela d. temperature free
b. Efficacy
c. Flux 41. Any electron that has left its parent atom
d. Illumination has _____ energy state relative to any
electron in the atomic structure.
34. What is the range of the operating voltage a. the same
level for LEDs? b. a lower
a. 5–12 mV c. a higher
b. 1.7–3.3 V d. an undefined
c. 5–12 V
d. 20–25 V 42. Introducing those impurity elements that
have _____ valence electrons creates the n-
35. In general, LEDs operate at voltage levels type material.
from _____ V to _____ V. a. 0
a. 1.0, 3.0 b. 3
b. 1.7, 3.3 c. 4
c. 0.5, 4.0 d. 5
43. In n-type material the _____ is called the
36. A(n) _____ is the simplest of semiconductor majority carrier.
devices. a. electron
a. diode b. hole
b. transistor c. proton
c. operational amplifier d. neutron
d. SCR
44. The diffused impurities with _____ valence 51. The _____ the current through a diode, the
electrons are called acceptor atoms. _____ the dc resistance level.
a. 0 a. higher, lower
b. 3 b. lower, lower
c. 4 c. lower, higher
d. 5 d. higher, higher
45. The reverse-saturation current level is 52. Varying the _____ can control the location
typically measured in _____. of the Zener region.
a. pA a. forward current
b. µA b. doping levels
c. mA c. forward voltage
d. A d. dc resistance
46. The depletion width _____ in the forward 53. The test current in a Zener diode IZT is the
bias, which results in having a majority flow current defined by the _____ power level.
across the junction. a. 0.25
a. widens b. 0.5
b. remains unchanged c. 0.75
c. shrinks d. 1.00
d. widens and shrinks alternatively
54. The heavier the current in a Zener diode in
47. The forward characteristics curve of a diode reverse bias, _____ dynamic resistance
grows in _____ form. value.
a. linear a. the more the
b. exponential b. the less the
c. logarithmic c. there is substantially more
d. sinusoidal d. there is no change in the
48. The potential at which the characteristics 55. The intensity of LED is greatest at _____
curve vertical rise occurs is commonly degrees and the least at _____ degrees.
referred to as the _____. a. 0, 90
a. offset b. 45, 90
b. threshold c. 0, 45
c. firing potential d. 90, 180
d. All of the above
56. The temperature coefficient can be _____
49. The reverse saturation current Is will just for different Zener levels.
_____ in magnitude for every 10° C increase a. positive
in temperature. b. negative
a. double c. zero
b. remain the same d. All of the above
c. halve
d. triple 57. The reverse recovery time of most
commercial switching diodes is in the range
50. Diodes are connected _____ to increase the of _____.
current-carrying capacity. a. picoseconds
a. in series b. a few nanoseconds
b. in parallel c. several microseconds
c. in parallel-series d. milliseconds
58. The ac resistance of a diode is the _____ of
the characteristic curve at the Q-point of
operation.
a. reciprocal of the slope
b. slope
c. midpoint
d. average value
59. Generally the value of ac resistance is _____

the value of dc resistance at the same
operating point.
a. smaller than
b. larger than
c. the same as
d. unrelated to
60. The reverse-bias current _____ with the

increase of temperature.
a. decreases
b. increases
c. remains the same
5. Determine the voltage across the resistor.
DIODE APPLICATIONS
1. Use the information provided here to
determine the value of IDQ.
a. 0V
b. 0.09 V
c. 0.2 V
d. 0.44 V
6. Determine the value of the load resistor.
a. 0 mA
b. 4.3 mA
c. 5 mA
d. 10 mA
2. In a particular problem, which mode has the

highest level of IDQ?
a. Ideal a. RL = 5 kΩ
b. Approximate equivalent b. RL = 5.5 kΩ
c. Exact mode using characteristic c. RL = 6 kΩ
curve d. None of the above
7. Determine ID.
3. Which diode(s) has (have) a zero level
current and voltage drop in the ideal
model?
a. Si
b. Ge
c. Both Si and Ge
d. Neither Si nor Ge
4. Determine the current level if E = 15 V and a. 0 mA

R = 3 kΩ. b. 1.893 mA
c. 2.036 mA
d. 2.143 mA
8. Determine V2.
a. 0A
b. 4.76 mA
c. 5 mA
d. 5A
a. 3.201 V
b. 0V
c. 4.3 V
d. 1.371 V
9. A diode is in the "_____" state if the current

established by the applied sources is such
that its direction matches that of the arrow
in the diode symbol, and VD ≥ 0.7 V for Si a. 0 mA
and VD ≥ 0.3 V for Ge. b. 29.40 mA
a. off c. 14.70 mA
b. on d. 14.09 mA
c. neutral
d. quiescent 14. Determine ID2.
10. An open circuit can have any voltage across

its terminals, but the current is always
_____.
a. 5 A
b. 0 A
c. 1 A
d. ∞
11. A short circuit has a _____ drop across its

terminals, and the current is limited only by a. 6.061 mA
the surrounding network. b. 0.7 mA
a. 5 V c. 3.393 mA
b. 0 V d. 3.571 mA
c. 1 V
d. ∞ 15. Determine the current through each diode
if E1 = E2 = 0 V.
12. Determine ID2.
a. 29.40 mA
b. 30.30 mA
c. 14.70 mA
a. 4.65 mA
13. Determine ID1. b. 9.3 mA
c. 18.6 mA
d. 0.7 mA
16. Determine Vo if E1 = E2 = 10 V.
b. Positive logic OR gate
c. Negative logic AND gate
d. Negative logic OR gate
19. What best describes the circuit?
a. 9.3 V
b. 10 V
a. Full-wave rectifier
c. –10 V
b. Half-wave rectifier
d. 0V
c. Clipper
d. Clamper
17. What is the logic function of this circuit?
20. Determine the peak value of the current
through the load resistor.
a. Positive logic AND gate

a. 2.325 mA
b. Positive logic OR gate
b. 5 mA
c. Negative logic AND gate
c. 1.25 mA
d. Negative logic OR gate
d. 0 mA
18. What is the logic function of this circuit?
21. Determine the average value of the current
through the load resistor.
a. 2.5 mA
a. Positive logic AND gate b. 0 mA
c. 1.37 mA
d. 1.479 mA
a. 16 V, –4 V
b. 16 V, 4 V
c. –16 V, 4 V
d. –16 V, –4 V

a. Full-wave rectifier
b. Half-wave rectifier
c. Clipper
d. Clamper
23. List the categories of clippers.
a. Series
b. Parallel
c. Series and parallel a. Full-wave rectifier
d. None of the above b. Half-wave rectifier
c. Clipper
24. Determine the peak value of the output d. Clamper
waveform.
27. Determine the total discharge time for the
capacitor in a clamper having C = 0.01 µF
and R = 500 kΩ.
a. 5 ms
b. 25 ms
c. 2.5 ms
d. 50 ms
28. Calculate IL and IZ.

a. 25 V
b. 15 V
c. –25 V
d. –15 V
25. Determine the peak for both half cycles of

the output waveform.
a. 2 mA, 0 mA
b. 4 mA, 2 mA
c. 2 mA, 2 mA
d. 2 mA, 4 mA
33. What is the voltage measured from the
29. With this Zener diode in its "on state," what negative terminal of C4 to the negative
is the level of IZ for the maximum load terminal of the transformer?
resistance?
a. –10 V
a. 0 mA b. –20 V
b. Undefined c. 10 V
c. Equal to IRL d. 20 V
d. IZM
34. In a voltage-multiplier circuit, the number
30. In a voltage regulator network with fixed RL of diodes is directly proportional to the
and R, what element dictates the minimum multiplicative voltage factor.
level of source voltage? a. True
a. VZ b. False
b. IZ
c. IZM 35. Rectifiers are commonly used in battery
d. None of the above chargers.
a. True
31. Which element dictates the maximum level b. False
of source voltage?
36. The intersection of the load line with the
characteristic curve determines the _____
of the system.
a. point of operation
b. load-line analysis
c. characteristic curve
d. forward bias
37. The slope of the load line depends on the

_____.
a. VZ a. type of the diode used
b. IZM b. characteristic curve
c. IZ c. load resistor
d. None of the above d. source voltage
32. What is the peak inverse voltage across 38. The load line is defined by the _____ and a
each diode in a voltage doubler? characteristic curve is defined by the _____.
a. Vm a. quiescent point, device
b. 2Vm b. device, network
c. 0.5Vm c. network, device
d. 0.25Vm d. None of the above
39. The quiescent point (Q-point) is defined by

a(n) _____.
a. ac network d. unknown
b. dc network
c. ac and dc network 46. The absence of the Si or Ge and VD label on
d. None of the above a diode denotes _____ notation.
a. approximate model
40. The x-intercept of the load line with the b. ideal model
characteristic curve is determined by the c. exact model
_____. d. None of the above
a. load resistor
b. diode 47. The process of removing one-half the input
c. source voltage and the load signal to establish a dc level is called _____.
resistor a. rectifier
d. source voltage b. full-wave rectifier
c. half-wave rectifier
41. The source voltage must be _____ the d. filtering
voltage drop across the diode to conduct
the diode. 48. The dc voltage level of a silicon diode is
a. larger than _____ its ideal model.
b. smaller than a. smaller than
c. the same as b. larger than
d. None of the above c. the same as
42. As the load resistor increases, the slope of
the dc load line and the levels of diode 49. The PIV rating of the diodes in a full-wave
current _____. rectifier must be larger than _____ Vm.
a. increase a. 0.318
b. decrease b. 0.636
c. remain unchanged c. 2
d. are unpredictable d. 1
43. A germanium diode is approximated by 50. For the ideal diode the transition between
_____ equivalent for voltages less than 0.3 states will occur at the point on the
V. characteristic curve when VD = _____ V and
a. a short circuit ID = _____ A.
b. a series circuit a. 0.3, 0
c. a parallel circuit b. 0, 0
d. an open circuit c. 0.7, 0
d. 0.7, 0.3
44. A diode is in the _____ state if the current
established by the applied sources is such 51. A clamping network must have _____.
that its direction matches that of the arrow a. a capacitor
in the diode symbol and VD > 0.7 V. b. a diode
a. off c. a resistive element
b. reverse bias d. All of the above
c. on
d. transition 52. The ratio of the total swing of the output of
a clamper to its input total swing is _____.
45. The combination of a short circuit in series a. 1
with an open circuit always results in a(n) b. 2
_____ circuit. c. 0.5
a. open d. 0
b. short
c. neither short nor open
53. For the "off" state of a Zener diode, the 57. A Zener diode is in a _____ impedance
voltage across the diode should be _____. region in the forward bias while it has a
a. greater than VZ _____ impedance region in the reverse bias.
b. zero a. very large, low
c. less than VZ but greater than zero b. very large, very large
d. None of the above c. low, low
d. low, very large
54. Once the Zener diode is in the "on" state,
VZ is always _____ VL. 58. In a half-wave voltage doubler, the voltage
across output capacitor C2 drops across the
load during the _____ half cycle and the
capacitor is recharged up to _____ during
the _____ half cycle.
a. larger than
b. smaller than
c. the same as
d. None of the above a. negative, 2Vm, positive
b. positive, Vm, negative
55. Zener diodes are used in regulator networks c. positive, 2Vm, negative
to _____. d. negative, Vm, positive
a. generate voltage
b. consume power 59. The full-wave voltage doubler provides
c. maintain a fixed voltage across the _____ filtering action than (as) the half-
load resistor wave voltage doubler.
d. protect the load a. better
b. poorer
56. With the Zener diode in the "on" state, c. the same
increasing IL will _____ IZ and _____IR. d. None of the above
60. In this voltage multiplier, measuring from

the top of the transformer winding will
provide _____ multiples of Vm at the
output, whereas measuring the output
voltage from the bottom of the transformer
will provide _____ multiples of the peak Vm.
a. decrease, increase
b. increase, decrease
c. decrease, keep the same level of
d. increase, keep the same level of
a. odd, even
b. even, odd
c. odd, odd
d. even, even
8. Which component of the collector current
BIPOLAR JUNCTION IC is called the leakage current?
TRANSISTOR a. Majority
b. Independent
1. In what decade was the first transistor c. Minority
created? d. None of the above
a. 1930s
b. 1940s 9. For a properly biased pnp transistor, let IC =
c. 1950s 10 mA and IE = 10.2 mA. What is the level of
d. 1960s IB?
a. 0.2 A
2. How many layers of material does a b. 200 mA
transistor have? c. 200 µA
a. 1 d. 20.2 mA
b. 2
c. 3 10. Calculate minority current ICO if IC = 20.002
d. 4 mA and IC majority = 20 mA.
a. 2 µA
3. What is the ratio of the total width to that b. 0.002 µA
of the center layer for a transistor? c. 2 nA
a. 1:15 d. 2 pA
b. 1:150
c. 15:1 11. Which of the following regions is (are) part
d. 150:1 of the output characteristics of a transistor?
a. Active
4. Which of the following is (are) the b. Cutoff
terminal(s) of a transistor? c. Saturation
a. Emitter d. All of the above
b. Base
c. Collector 12. In which region are both the collector-base
d. All of the above and base-emitter junctions forward-biased?
a. Active
5. List the types of bipolar junction transistors. b. Cutoff
a. ppn, npn c. Saturation
b. pnp, npn d. All of the above
c. npp, ppn
d. nnp, pnp 13. How much is the base-to-emitter voltage of
a transistor in the "on" state?
6. Transistors are _____-terminal devices. a. 0 V
a. 2 b. 0.7 V
b. 3 c. 0.7 mV
c. 4 d. Undefined
d. 5
14. In the active region, while the collector-
7. How many carriers participate in the base junction is _____-biased, the base-
injection process of a unipolar device? emitter is _____-biased.
a. 1 a. forward, forward
b. 2 b. forward, reverse
c. 0 c. reverse, forward
d. 3 d. reverse, reverse
15. What is βdc equal to?

a. IB / IE
b. IC / I E
c. IC / I B
16. What are the ranges of the ac input and

output resistance for a common-base
configuration?
a. 10 Ω–100 Ω, 50 k Ω–1 MΩ
b. 50 kΩ –1 MΩ, 10 Ω –100 Ω
c. 10 Ω –100 kΩ, 50 Ω –1 kΩ
17. For what kind of amplifications can the a. 100

active region of the common-emitter b. 116
configuration be used? c. 50
a. Voltage d. 110
b. Current
c. Power 20. Which of the following configurations can a
d. All of the above transistor set up?
a. Common-base
18. Use this table of collector characteristics to b. Common-emitter
calculate βac at VCE = 15 V and IB = 30 µA. c. Common-collector
d. All of the above
21. Determine the value of α when β = 100.

a. 1.01
b. 101
c. 0.99
d. Cannot be solved with the
information provided
22. What is the most frequently encountered

transistor configuration?
a. Common-base
b. Common-collector
c. Common-emitter
a. 100 d. Emitter-collector
b. 106
c. 50 23. βdc for this set of collector characteristics is
d. 400 within _____ percent of βac.
19. Calculate βdc at VCE = 15 V and IB = 30 µA.
a. 2
b. 5
c. 7
d. 10
24. βdc = ________

a. IB / IE
b. IC / IE
c. IC / IB
25. What is (are) the component(s) of most

specification sheets provided by the
a. 200
manufacturer?
b. 180
a. Maximum ratings
c. 220
b. Thermal characteristics
c. Electrical characteristics
d. All of the above
32. What range of resistor values would you get
when checking a transistor for forward- and
26. What is (are) the component(s) of electrical
reverse-biased conditions by an ohmmeter?
characteristics on the specification sheets?
a. 100 Ω to a few kΩ, exceeding 100
a. On
kΩ
b. Off
b. Exceeding 100 kΩ, 100 Ω to a few
c. Small-signal characteristics
kΩ
d. All of the above
c. Exceeding 100 kΩ, exceeding 100
kΩ
27. Most specification sheets are broken down
d. 100 Ω to a few kΩ, 100 Ω to a few
into _____.
kΩ
a. maximum ratings
b. thermal characteristics
33. What does a reading of a large or small
c. electrical characteristics
resistance in forward- and reverse-biased
d. All of the above
conditions indicate when checking a
transistor using an ohmmeter?
28. An example of a pnp silicon transistor is a
a. Faulty device
2N4123.
b. Good device
a. True
c. Bad ohmmeter
b. False
29. Which of the following equipment can
34. A transistor can be checked using a(n)
check the condition of a transistor?
_____.
a. Current tracer
a. curve tracer
b. Digital display meter (DDM)
b. digital meter
c. Ohmmeter (VOM)
c. ohmmeter
d. All of the above
d. Any of the above
30. Which of the following can be obtained
35. How many individual pnp silicon transistors
from the last scale factor of a curve tracer?
can be housed in a 14-pin plastic dual-in-
a. hFE
line package?
b. αdc
a. 4
c. αac
b. 7
d. βac
c. 10
d. 14
31. Calculate βac for IC = 15 mA and VCE = 5 V.
c. mA, µA
36. All amplifiers should have at least _____ d. mA, mA
terminals with _____ terminal(s) controlling
the flow between _____ other terminal(s). 43. The base current is the _____ of the emitter
a. 2, 1, 1 and collector currents.
b. 3, 1, 2 a. sum
c. 3, 2, 1 b. difference
d. 3, 0, 3 c. product
37. The outer layers of a transistor are _____
the sandwiched layer. 44. The _____ region is the region normally
a. much smaller than employed for linear (undistorted)
b. the same as amplifiers.
c. much larger than a. active
d. None of the above b. cutoff
c. saturation
38. The doping of the sandwiched layer is d. All of the above
_____ that of the outer layers.
a. considerably less than 45. In the cutoff region the collector-base
b. the same as junction is _____-biased and the base-
c. considerably more than emitter junction is _____-biased for a
d. None of the above transistor.
a. reverse, forward
39. The lower doping level _____ the b. forward, reverse
conductivity and _____ the resistivity of the c. reverse, reverse
material. d. forward, forward
a. increases, decreases
b. increases, increases 46. In the saturation region the collector-base
c. decreases, decreases junction is _____-biased and the base-
d. decreases, increases emitter junction is _____-biased for a
transistor.
40. The term bipolar reflects the fact that a. reverse, forward
_____ and _____ participate in the injection b. forward, reverse
process into the oppositely polarized c. reverse, reverse
material. d. forward, forward
a. holes, neutrons
b. holes, electrons 47. For practical transistors the level of alpha
c. neutrons, electrons typically extends from _____ to _____ with
d. None of the above most approaching the higher end of the
range.
41. One p-n junction of a transistor is _____- a. 0.0, 1
biased and the other one is _____-biased in b. 0.90, 0.998
the active region. c. 50, 400
a. reverse, reverse d. None of the above
b. forward, forward
c. reverse, forward 48. Typical values of voltage amplification for
d. None of the above the common-base configurations vary from
_____ and the current gain is always _____
42. The magnitude of the base current is .
typically on the order of _____ as compared a. less than 1, 50 to 300
to _____ for the emitter. b. 50 to 300, larger than 1
a. µA, µA c. 50 to 300, less than 1
b. µA, mA d. larger than 1, 50 to 300
d. IE
49. If a value of beta.gif is specified for a
particular transistor configuration it will 56. When checking a transistor by ohmmeter, a
normally be used for _____ calculations. relatively _____ resistance is displayed for a
a. ac forward-biased junction and _____
b. dc resistance for a reverse-biased junction.
c. ac and dc a. low, very high
d. None of the above b. low, low
c. high, high
50. The common-collector configuration has a d. high, very low
_____ input impedance and a _____ output
impedance. 57. An OL indication on an advanced digital
a. low, high meter indicates _____ while checking a
b. high, low transistor.
c. high, high a. forward bias
d. low, low b. reverse bias
c. definitely a defective transistor
51. The active region of a transistor is bounded d. None of the above
by the _____.
a. cutoff region 58. If the positive lead of an ohmmeter is
b. saturation region connected to the base and the negative
c. power dissipation curve lead to the emitter, a low resistance reading
d. All of the above would indicate a _____ transistor and a high
resistance reading would indicate a _____
52. The "on" and "off" characteristics refer to transistor.
_____ limits while the small-signal a. npn, pnp
characteristics indicate the parameters of b. pnp, npn
importance to _____ operation. c. npn, npn
a. ac, dc d. pnp, pnp
b. dc, ac
c. ac, dc and ac 59. The leads of a transistor are typically made
d. dc and ac, dc of _____.
a. gold
53. The step function (per step) of a curve b. aluminum
tracer reveals the scale for _____. c. nickel
a. collector current IC d. All of the above
b. VCE voltage
c. base current IB 60. There is(are) _____ in the internal
d. All of the above construction of a TO-92 package.
a. gold bond wires
54. The level of _____ is determined and b. a copper frame
displayed by advanced digital meters. c. epoxy encapsulation
a. VCE d. All of the above
b. IB
c. IC
d. βdc
55. The level of _____ is determined and

displayed by advanced digital meters if
using diode-testing mode.
a. VBE
b. IC
c. IB
b. forward, reverse
DC BIASING BJTS c. reverse, reverse
d. reverse, forward
1. Which of the following currents is nearly
equal to each other? 8. For the BJT to operate in the saturation
a. IB and IC region, the base-emitter junction must be
b. IE and IC _____-biased and the base-collector
c. IB and IE junction must be _____-biased.
d. IB, IC, and IE a. forward, forward
b. forward, reverse
2. The ratio of which two currents is c. reverse, reverse
represented by β? d. reverse, forward
a. IC and IE
b. IC and IB 9. Which of the following voltages must have a
c. IE and IB negative level (value) in any npn bias
d. None of the above circuit?
a. VBE
3. At what region of operation is the base- b. VCE
emitter junction forward biased and the c. VBC
base-collector junction reverse biased? d. None of the above
a. Saturation
b. Linear or active 10. For what value of β does the transistor
c. Cutoff enter the saturation region?
4. Calculate the approximate value of the

maximum power rating for the transistor
represented by the output characteristics of
Figure 4.1?
a. 250 mW
b. 170 mW
c. 50 mW
d. 0 mW
5. The cutoff region is defined by IB _____ 0 A.

a. > a. 20
b. < b. 50
c. ≤ c. 75
d. ≥ d. 116
6. The saturation region is defined by 11. Determine the reading on the meter when
VCE _____ VCEsat. VCC = 20 V, RC = 5 kΩ, and IC = 2 mA.
a. >
b. <
c. ≤
d. ≥
7. For the BJT to operate in the active (linear)

region, the base-emitter junction must be
_____-biased and the base-collector
junction must be _____-biased.
a. forward, forward
a. 10 V
b. –10 V a. 8.78 V
c. 0.7 V b. 0V
d. 20 V c. 7.86 V
d. 18 V
12. Which of the following is assumed in the
approximate analysis of a voltage divider 16. Calculate ICsat.
circuit?
a. IB is essentially zero amperes.
b. R1 and R2 are considered to be
series elements.
c. βRE ≥ 10R2
d. All of the above
13. It is desirable to design a bias circuit that is

independent of the transistor beta.
a. True
b. False
14. Calculate the voltage across the 91 kΩ

resistor. a. 35.29 mA
b. 5.45 mA
c. 1.86 mA
d. 4.72 mA
17. Calculate VCE.
a. 18 V
b. 9.22 V
c. 3.23 V
15. Calculate the value of VCEQ. a. 4.52 V

b. –4.52 V
c. 4.48 V
d. –4.48 V
18. Calculate VCE.
a. −12.12 V
b. 16.35 V
c. −3.65 V
a. –4.52 V d. 10 V
b. 4.52 V
c. –9 V 22. Calculate Rsat if VCE = 0.3 V.
d. 9V
19. Which of the following is (are) related to an

emitter-follower configuration?
a. The input and output signals are in
phase.
b. The voltage gain is slightly less
than 1.
c. Output is drawn from the emitter
terminal.
d. All of the above
20. Determine the values of VCB and IB for this a. 49.2 Ω

circuit. b. 49.2 kΩ
c. 49.2 mΩ
d. 49.2 MΩ
23. You can select the values for the emitter

and collector resistors from the information
that is provided for this circuit.
a. 1.4 V, 59.7 µA
b. –1.4 V, 59.7 µA
c. –9.3 V, 3.58 µA
d. 9.3 V, 3.58 µA
21. Calculate ETh for this network.

a. 10, 60
a. True b. 25, 75
b. False c. 40, 90
24. In the case of this circuit, you must assume 30. Which of the following is (are) a stability
that VE = 0.1·VCC in order to calculate RC and factor?
RE. a. S(ICO)
b. S(VBE)
c. S(β)
d. All of the above
31. In a fixed-bias circuit, which one of the

stability factors overrides the other factors?
a. S(ICO)
b. S(VBE)
c. S(β)
d. Undefined
32. In a voltage-divider circuit, which one of the

a. True stability factors has the least effect on the
b. False device at very high temperature?
a. S(ICO)
25. Which of the following is (are) the b. S(VBE)
application(s) of a transistor? c. S(β)
a. Amplification of signal d. Undefined
b. Switching and control
c. Computer logic circuitry 33. Use this table to determine the change in
d. All of the above IC from 25ºC to 175ºC for RB / RE = 250 due
to the S(ICO) stability factor. Assume an
26. Calculate the storage time in a transistor emitter-bias configuration.
switching network if toff is 56 ns, tf = 14 ns,
and tr = 20 ns.
a. 70 ns
b. 42 ns
c. 36 ns
d. 34 ns
27. The total time required for the transistor to a. 140.34 nA

switch from the "off" to the "on" state is b. 140.34 µA
designated as ton and defined as the delay c. 42.53 nA
time plus the time element. d. 0.14034 nA
a. True
b. False 34. Determine the change in IC from 25ºC to
175ºC for the transistor defined in this table
28. For an "on" transistor, the voltage for fixed-bias with RB = 240 kΩ and β = 100
VBE should be in the neighborhood of 0.7 V. due to the S(VBE) stability factor.
a. True
b. False
29. For the typical transistor amplifier in the

active region, VCE is usually about _____ %
to _____ % of VCC.
a. current gain β
b. leakage current ICEO
c. both current gain β and leakage
current ICEO
41. In a fixed-bias circuit, the magnitude of IC is

controlled by and therefore is a function of
a. 145.8 µA _____.
b. 145.8 nA a. RB
c. –145.8 µA b. RC
d. –145.8 nA c. β
d. RB and β
35. Determine ICQ at a temperature of 175º C if
ICQ = 2 mA at 25º C for RB / RE = 20 due to 42. For a transistor operating in the saturation
the S(β) stability factor. region, the collector current IC is at its
a. 2.417 mA _____ and the collector-emitter voltage
b. 2.392 mA VCE is to the _____.
c. 2.25 mA a. minimum, left of the VCEsat line
d. 2.58 mA b. minimum, right of the VCEsat line
c. maximum, left of the VCEsat line
36. By definition, quiescent means _____. d. maximum, right of the VCEsat line
a. quiet
b. still 43. The dc load line is determined solely by the
c. inactive _____.
d. All of the above a. base-emitter loop
b. collector-emitter loop
37. _____ should be considered in the analysis c. base-collector loop
or design of any electronic amplifiers. d. None of the above
a. dc
b. ac 44. A change in value of _____ will create a new
c. dc and ac load line parallel to its previous one in a
d. None of the above fixed-bias circuit.
a. RB
38. For the dc analysis the network can be b. RC
isolated from the indicated ac levels by c. VCC
replacing the capacitor with _____. d. VBE
a. an open circuit equivalent
b. a short circuit equivalent 45. In a fixed-bias circuit, the slope of the dc
c. a source voltage load line is controlled by _____.
d. None of the above a. RB
b. RC
39. In a fixed-bias circuit with a fixed supply c. VCC
voltage VCC’ the selection of a _____ resistor d. IB
sets the level of _____ current for the
operating point. 46. The emitter resistor in an emitter-stabilized
a. collector, base bias circuit appears to be _____ in the base
b. base, base circuit.
c. collector, collector a. larger
d. None of the above b. smaller
c. the same
40. Changes in temperature will affect the level d. None of the above
of _____.
47. _____is the primary difference between the
exact and approximate techniques used in 54. In a transistor-switching network, the
the analysis of a voltage divider circuit. operating point switches from _____ to
a. Thevenin voltage ETh _____ regions along the load line.
b. Thevenin resistance RTh a. cutoff, active
c. Base voltage VB b. cutoff, saturation
d. RC c. active, saturation
48. The Thevenin equivalent network is used in
the analysis of the _____ circuit. 55. For the typical transistor amplifier in the
a. fixed bias active region, VCE is usually about _____ %
b. emitter-stabilized bias to _____ % of VCC’
c. voltage divider a. 0, 100
d. voltage feedback b. 25, 75
c. 45, 55
49. The saturation current of a transistor used d. None of the above
in a fixed-bias circuit is _____ its value used
in an emitter-stabilized or voltage-divider 56. In any amplifier employing a transistor, the
bias circuit for the same values of RC’ collector current IC is sensitive to _____.
a. more than a. β
b. the same as b. VBE
c. less than c. ICO
d. None of the above d. All of the above
50. In a collector feedback bias circuit, the 57. As the temperature increases, β _____,
current through the collector resistor is VBE _____, and ICO _____ in value for every
_____ and the collector current is _____. 10ºC.
a. IC’ IC a. increases, decreases, doubles
b. IB + IC’ IC b. decreases, increases, remains the
c. IB’, IC same
d. None of the above c. decreases, increases, doubles
d. increases, increases, triples
51. _____is the least stabilized circuit.
a. Fixed bias 58. A significant increase in leakage current due
b. Emitter-stabilized bias to increase in temperature creates
c. Voltage divider _____between IB curves.
d. Voltage feedback a. smaller spacing
b. larger spacing
52. _____ is less dependent on the transistor c. the same space as at lower
beta. temperature
a. Fixed bias d. None of the above
b. Emitter bias
c. Voltage divider 59. The _____the stability factor, the
d. Voltage feedback _____sensitive the network is to variations
in that parameter.
53. In a transistor-switching network, the level a. higher, more
of the resistance between the collector and b. higher, less
emitter is _____ at the saturation and is c. lower, more
_____at the cutoff. d. None of the above
a. low, low
b. low, high 60. In an emitter-bias configuration, the _____
c. high, high the resistance RE’, the _____ the stability
d. high, low factor, and the _____ stable is the system.
a. smaller, lower, less
b. larger, more, more
c. smaller, more, more
d. larger, lower, more
7. Which of the following is (are) true
BJT AC ANALYSIS regarding the input impedance for
frequencies in the midrange ≤ 100 kHz of a
1. Which of the following techniques can be BJT transistor amplifier?
used in the sinusoidal ac analysis of a. The input impedance is purely
transistor networks? resistive.
a. Small-signal b. It varies from a few ohms to mega
b. Large-signal ohms.
c. Small- or large-signal c. An ohmmeter cannot be used to
d. None of the above measure the small-signal ac input
impedance.
2. What is the limit of the efficiency defined d. All of the above
by = Po / Pi?
a. Greater than 1 8. Which of the following is (are) true
b. Less than 1 regarding the output impedance for
c. Always 1 frequencies in the midrange ≤ 100 kHz of a
d. None of the above BJT transistor amplifier?
a. The output impedance is purely
3. Which of the following define(s) the resistive.
conversion efficiency? b. It varies from a few ohms to more
a. Ac power to the load/ac input than 2 MΩ.
power c. An ohmmeter cannot be used to
b. Ac power to the load/dc power measure the small-signal ac output
supplied impedance.
c. Dc output power/ac input power d. All of the above
d. All of the above
9. What is the range of the current gain for BJT
4. Which of the following should be done to transistor amplifiers?
obtain the ac equivalent of a network? a. less than 1
a. Set all dc sources to zero b. 1 to 100
b. Replace all capacitors by a short- c. above 100
circuit equivalent. d. All of the above
c. Remove all elements bypassed by
the short-circuit equivalent. 10. The input impedance of a BJT amplifier is
d. All of the above purely _____ in nature and can vary from a
few _____ to _____.
5. The _____ model suffers from being limited a. resistive, ohms, megohms
to a particular set of operating conditions if b. capacitive, microfarads, farads
it is to be considered accurate. c. inductive, millihenrys, henrys
a. hybrid equivalent d. None of the above
b. re
c. β 11. For BJT amplifiers, the _____ gain typically
d. Thevenin ranges from a level just less than 1 to a level
that may exceed 1000.
6. The _____ model fails to account for the a. voltage
output impedance level of the device and b. current
the feedback effect from output to input. c. impedance
a. hybrid equivalent d. All of the above
b. re
c. β 12. What is the unit of the parameter ho?
d. Thevenin a. Volt
b. Ohm
c. Siemen
d. No unit
20. What does the negative sign in the voltage
13. Which of the h-parameters corresponds to gain of the common-emitter fixed-bias
re in a common-base configuration? configuration indicate?
a. hib a. The output and input voltages are
b. hfb 180º out of phase.
c. hrb b. Gain is smaller than 1.
d. hob c. Gain is larger than 1.
14. What is the range of the input impedance
of a common-base configuration? 21. For the common-emitter fixed-bias
a. A few ohms to a maximum of 50 Ω configuration, there is a _____ phase shift
b. 1 kΩ to 5 kΩ between the input and output signals.
c. 100 kΩ to 500 kΩ a. 0º
d. 1 MΩ to 2 MΩ b. 45º
c. 90º
15. What is the typical value of the current gain d. 180º
of a common-base configuration?
a. Less than 1 22. Which of the following configurations has
b. Between 1 and 50 an output impedance Zo equal to RC?
c. Between 100 and 200 a. Fixed-bias common-emitter
d. Undefined b. Common-emitter voltage-divider
with bypass capacitor
16. What is the controlling current in a c. Common-emitter voltage-divider
common-base configuration? without bypass capacitor
a. Ie d. All of the above
b. Ic
c. Ib 23. Which of the following configurations has a
d. None of the above voltage gain of –RC /re?
a. Fixed-bias common-emitter
17. What is the typical range of the output b. Common-emitter voltage-divider
impedance of a common-emitter with bypass capacitor
configuration? c. Fixed-bias common-emitter and
a. 10 Ω to 100 Ω voltage-divider with bypass
b. 1 kΩ to 5 kΩ capacitor
c. 40 kΩ to 50 kΩ d. Common-emitter voltage-divider
d. 500 kΩ to 1 MΩ without bypass capacitor
18. Under which of the following conditions is 24. Which of the following configurations has
the output impedance of the network the lowest output impedance?
approximately equal to RC for a common- a. Fixed-bias
emitter fixed-bias configuration? b. Voltage-divider
a. ro ≥ 10RC c. Emitter-follower
b. ro < 10RC d. None of the above
c. ro < ro
d. ro > ro 25. The _____ configuration is frequently used
for impedance matching.
19. Under which of the following condition(s) is a. fixed-bias
the current gain Av ≈ β? b. voltage-divider bias
a. ro ≥ 10RC c. emitter-follower
b. RB ≥ 10re d. collector feedback
c. ro ≥ 10RC and RB ≥ 10re
26. The emitter-follower configuration has a a. True
_____ impedance at the input and a _____ b. False
impedance at the output.
a. low, low 33. The smaller the level of RL, the larger the
b. low, high level of ac voltage gain.
c. high, low a. True
d. high, high b. False
27. Which of the following gains is less than 1 34. Which of the following is (are) true to
for a common-base configuration? achieve a good overall voltage gain for the
a. Ai circuit?
b. Av a. The effect of Rs and RL must be
c. Ap considered as a product.
d. None of the above b. The effect of Rs and RL must be
considered as a product and
28. Which of the following conditions must be evaluated individually.
met to allow the use of the approximate c. The effect of Rs and RL must be
approach in a voltage-divider bias evaluated individually.
configuration? d. None of the above
a. βre > 10R2
b. βRE > 10R2 35. The _____ the source resistance and/or
c. βRE < 10R2 _____ the load resistance, the less the
d. βre < 10R2 overall gain of an amplifier.
a. smaller, smaller
29. Which one of the following configurations b. smaller, larger
has the lowest input impedance? c. larger, smaller
a. Fixed-bias d. larger, larger
b. Common-base
c. Emitter-follower 36. The current gain for the Darlington
d. Voltage-divider connection is _____.
a. β1 • (β2/2)
30. For the collector dc feedback configuration, b. β1 • β2
there is a _____ phase shift between the c. β1 / β2
input and output signals. d. β1 • (β2 – 1)
a. 0º
b. 45º 37. What is the voltage gain of a feedback pair
c. 90º connection?
d. 180º a. 1
b. –1
31. Which of the following represent(s) the c. 100
advantage(s) of the system approach over d. –100
the r-model approach?
a. Thevenin's theorem can be used. 38. Which of the following is referred to as the
b. The effect of changing the load can reverse transfer voltage ratio?
be determined by a simple a. hi
equation. b. hr
c. There is no need to go back to the c. hf
ac equivalent model and analyze d. ho
the entire network.
d. All of the above 39. In an unbypassed emitter bias configuration
hie replaces _____ in the re model.
32. The loaded voltage gain of an amplifier is a. re
always more than the no-load level. b. β
c. βre 46. One junction of an operating transistor is
d. Ib _____ and the other one is _____.
a. forward-biased, forward-biased
40. The _____ of the input signal is one of the b. forward-biased, reverse-biased
first concerns in the sinusoidal ac analysis of c. reverse-biased, reverse-biased
transistor networks. d. None of the above
a. period
b. frequency 47. For a common-base configuration, the input
c. magnitude impedance is relatively _____ and the
d. None of the above output impedance quite _____.
a. high, small
41. The _____ model(s) is (are) commonly used b. small, high
in the small-signal ac analysis of transistor c. small, small
networks. d. high, high
a. re
b. hybrid equivalent 48. The output voltage and the input voltage
c. re and hybrid equivalent are _____ for the common-base
d. None of the above configuration.
a. 45º out of phase
42. The peak value of the ac input signal is b. 90º out of phase
controlled by the _____ in a transistor c. 180º out of phase
network for the frequencies in the low to d. in phase
midrange.
a. resistors 49. In a common-emitter configuration _____ is
b. applied dc voltage the controlling current while _____ is the
c. capacitors controlled current.
d. None of the above a. IC, IB
b. IC, IE
43. _____ can be applied to determine the c. IB, IC
response of the ac equivalent circuit. d. None of the above
a. Mesh analysis
b. Node analysis 50. The level of re is determined by _____.
c. Thevenin's theorem a. α
d. All of the above b. IE
c. β
44. For transistor amplifiers, the no-load d. IB
voltage gain is _____ the loaded voltage
gain. 51. The output voltage and the input voltage
a. smaller than are _____ for the common-emitter
b. greater than configuration.
c. the same as a. in phase
d. None of the above b. 45º out of phase
c. 90º out of phase
45. The input and output signals are _____ for d. 180º out of phase
the typical transistor amplifier at
frequencies that permit ignoring the effects 52. The common-emitter configuration has a
of the reactive elements. _____ level of input impedance with a
a. in phase _____ voltage and current gain.
b. 180º out of phase a. moderate, high
c. either in phase or 180º out of b. low, moderate
phase c. low, low
d. None of the above d. high, low
53. _____ refers to the forward transfer current
ratio. 60. In an emitter-follower, the output voltage is
a. hi _____ with the input voltage.
b. hr a. 45º out of phase
c. hf b. 90º out of phase
d. ho c. 180º out of phase
d. in phase
54. For the common-emitter and common-base
configurations, the magnitude of _____ and 61. An emitter-follower has _____ impedance
_____ is often not included in the model. at the input and _____ impedance at the
a. hr, ho output.
b. hi, he a. high, high
c. hi, hr b. low, high
d. he, ho c. high, low
d. low, low
55. In a fixed-bias network, the input signal Vi is
applied to the _____ of the transistor while 62. _____ is slightly affected if the condition
the output Vo is off the _____. ro ≥ 10RE is not satisfied in the analysis of an
a. base, collector emitter-follower configuration.
b. base, emitter a. Zi
c. emitter, collector b. Zo
d. None of the above c. Av
d. Ai
56. In a voltage-divider bias configuration, the
voltage-divider equation is used to 63. A common-base configuration has _____
determine the _____. impedance at the input and _____
a. ac level of Vb impedance at the output.
b. dc level of IB a. high, high
c. dc level of VB b. high, low
d. ac level of Ib c. low, low
d. low, high
57. In a voltage-divider bias configuration,
there can be a measurable difference in the 64. In a common-base configuration, the input
results for _____ if the condition ro ≥ 10RC is and output voltages are _____ and the
not satisfied. output and input currents are _____.
a. Zo a. 180º out of phase, 180º out of
b. Av phase
c. Ai b. 180º out of phase, in phase
d. All of the above c. in phase,180º out of phase
d. in phase, in phase
58. The bypass capacitor in a common-emitter
configuration _____ the voltage gain. 65. Ideally, the changes in the load resistor or
a. significantly decreases the source resistor should have _____
b. significantly increases effect on all the parameters of the two-port
c. slightly increases model.
d. slightly decreases a. a great
b. a moderate
59. In an emitter-follower, the voltage gain is c. no
a. slightly less than 1
b. slightly more than 1 66. The loaded voltage gain of an amplifier is
c. a very large value _____ the no-load level.
d. None of the above a. always more than
b. always less than c. hre
c. always the same as d. hoe
74. In a hybrid equivalent circuit, ______ is
67. The coupling capacitor places the load and determined to make it easier to find the
collector resistors in a _____ arrangement. other parameters.
a. series a. Zi
b. parallel b. Zo
c. series-parallel c. Ai
d. None of the above d. Av
68. The dc load line and ac load line both have

the same _____ .
a. x-intercept
b. y-intercept
c. slope
d. Q-point
69. The _____ the level of RL, the _____ the

level of ac voltage gain.
a. smaller, higher
b. larger, lower
c. smaller, lower
70. The _____ the source resistance, the _____

the overall gain of an amplifier.
a. larger, higher
b. larger, lower
c. lower, lower
71. The ac voltage gain of a Darlington

connection is about _____.
a. 0
b. 1
c. βD
72. The feedback pair uses a(n) _____ transistor

driving a(n) _____ transistor, the two
devices acting effectively much like one pnp
transistor.
a. pnp, npn
b. pnp, pnp
c. npn, npn
73. In an unbypassed emitter-bias configuration

_____ replaces re in the hybrid equivalent
circuit.
a. hie
b. hfe
a. Zero amperes
FIELD EFFECT TRANSISTOR b. Equal to ID
c. Depends on VDS
1. Which of the following controls the level of d. Undefined
ID?
a. VGS 9. At which of the following is the level of
b. VDS VDS equal to the pinch-off voltage?
c. IG a. When ID becomes equal to IDSS
d. VDG b. When VGS is zero volts
c. IG is zero
2. Which of the following is (are) not an FET? d. All of the above
a. n-channel
b. p-channel 10. At which of the following condition(s) is the
c. p-n channel depletion region uniform?
d. n-channel and p-channel a. No bias
b. VDS > 0 V
3. What is the range of an FET's input c. VDS = VP
impedance? d. None of the above
a. 10 Ω to 1 kΩ
b. 1 kΩ to 10 kΩ 11. Refer to the following characteristic curve.
c. 50 kΩ to 100 kΩ Calculate the resistance of the FET at VGS = –
d. 1 MΩ to several hundred MΩ 0.25 V if ro = 10 kΩ.
4. Which of the following transistor(s) has

(have) depletion and enhancement types?
a. BJT
b. JFET
c. MOSFET
5. A BJT is a _____-controlled device. The JFET

is a _____ - controlled device.
a. voltage, voltage
b. voltage, current
c. current, voltage a. 1.1378 kΩ
d. current, current b. 113.78 Ω
c. 11.378 Ω
6. The BJT is a _____ device. The FET is a d. 11.378 kΩ
_____ device.
a. bipolar, bipolar 12. What is the level of drain current ID for
b. bipolar, unipolar gate-to-source voltages VGS less than (more
c. unipolar, bipolar negative than) the pinch-off level?
d. unipolar, unipolar a. zero amperes
b. IDSS
7. Which of the following is (are) the c. Negative value
terminal(s) of a field-effect transistor (FET). d. Undefined
a. Drain
b. Gate 13. The three terminals of the JFET are the
c. Source _____, _____, and _____.
d. All of the above a. gate, collector, emitter
b. base, collector, emitter
8. What is the level of IG in an FET? c. gate, drain, source
d. gate, drain, emitter
14. The level of VGS that results in ID = 0 mA is
defined by VGS = _____.
a. VGS(off)
b. VP
c. VDS
15. The region to the left of the pinch-off locus

is referred to as the _____ region.
a. saturation
b. cutoff
a. 0.444 mA
c. ohmic
b. 1.333 mA
d. All of the above
c. 0.111 mA
d. 4.444 mA
16. Which of the following represent(s) the
cutoff region for an FET?
19. What is the ratio of ID / IDSS for VGS = 0.5 VP?
a. ID = 0 mA
a. 0.25
b. VGS = VP
b. 0.5
c. IG = 0
c. 1
d. All of the above
d. 0
17. Referring to this transfer curve. Calculate
20. The drain current will always be one-fourth
(using Shockley's equation) VGS at ID = 4mA.
of IDSS as long as the gate-to-source voltage
is _____ the pinch-off value.
a. one-fourth
b. one-half
c. three-fourths
21. Which of the following ratings appear(s) in

the specification sheet for an FET?
a. Voltages between specific
terminals
b. Current levels
c. Power dissipation
d. All of the above
22. Refer to this portion of a specification

sheet. Determine the values of reverse-
gate-source voltage and gate current if the
a. 2.54 V FET was forced to accept it.
b. –2.54 V
c. –12 V
d. Undefined
18. Referring to this transfer curve, determine

ID at VGS = 2 V.
b. –1.66 V
c. 0.66 V
d. –0.66 V
27. Refer to the following curves. Calculate ID at

VGS = 1 V.
a. 25 Vdc, –200 nAdc

b. –25 Vdc, 10 mAdc
c. –6 Vdc, –1.0 nAdc
23. Hand-held instruments are available to

measure _____ for the BJT.
a. βdc
a. 8.167 mA
b. IDSS
b. 4.167 mA
c. VP
c. 6.167 mA
d. All of the above
d. 0.616 mA
24. How many terminals can a MOSFET have?
28. It is the insulating layer of _____ in the
a. 2
MOSFET construction that accounts for the
b. 3
very desirable high input impedance of the
c. 4
device.
d. 3 or 4
a. SiO
b. GaAs
25. Which of the following applies to MOSFETs?
c. SiO2
a. No direct electrical connection
d. HCl
between the gate terminal and the
channel
29. Refer to the following figure. Calculate
b. Desirable high input impedance –2 2
VGS at ID = 8 mA for k = 0.278 × 10 A/V .
c. Uses metal for the gate, drain, and
source connections
d. All of the above
26. Referring to the following transfer curve,

determine the level of VGS when the drain
current is 20 mA.
a. 3.70 V
b. 5.36 V
c. 7.36 V
d. 2.36 V
30. The transfer curve is not defined by

Shockley's equation for the _____.
a. JFET
a. 1.66 V
11
b. depletion-type MOSFET d. 10 Ω
c. enhancement-type MOSFET
d. BJT 36. A junction field-effect transistor (JFET) is a
_____ device.
31. Which of the following applies to a safe a. current-controlled
MOSFET handling? b. voltage-controlled
a. Always pick up the transistor by c. voltage-current controlled
the casing. d. None of the above
b. Power should always be off when
network changes are made. 37. The FET is a _____ device depending solely
c. Always touch ground before on either electron (n-channel) or hole (p-
handling the device. channel) conduction.
d. All of the above a. unipolar
b. bipolar
32. What is the purpose of adding two Zener c. tripolar
diodes to the MOSFET in this figure? d. None of the above
38. One of the most important characteristics

of the FET is its _____ impedance.
a. low input
b. medium input
c. high input
39. The _____ transistor has become one of the

most important devices used in the design
and construction of integrated circuits for
digital computers.
a. To reduce the input impedance a. MOSFET
b. To protect the MOSFET for both b. BJT
polarities c. JFET
c. To increase the input impedance d. None of the above
40. In the n-channel transistor, the drain and
33. Which of the following is (are) the source are connected to the _____ channel
advantage(s) of VMOS over MOSFETs? while the gate is connected to the two
a. Reduced channel resistance layers of _____ material.
b. Higher current and power ratings a. p-type, n-type
c. Faster switching time b. p-type, p-type
d. All of the above c. n-type, p-type
d. n-type, n-type
34. Which of the following FETs has the lowest
input impedance? 41. In an FET transistor, the depletion region is
a. JFET _____ near the top of both p-type
b. MOSFET depletion-type materials.
c. MOSFET enhancement-type a. wider
d. None of the above b. narrower
c. the same as the rest of the
35. Which of the following input impedances is depletion region
not valid for a JFET? d. None of the above
10
a. 10 Ω
9
b. 10 Ω
8
c. 10 Ω
42. The pinch-off voltage continues to drop in a d. gm
_____ manner as VGS becomes more and
more negative. 49. In an FET circuit, _____ is normally the
a. linear parameter to be determined first.
b. parabolic a. VGS
c. cubic b. VDS
d. None of the above c. VDG
d. ID
43. The region to the right of the pinch-off
locus is commonly referred to as the _____ 50. The primary difference between the
region. construction of a MOSFET and an FET is the
a. constant-current _____.
b. saturation a. construction of the gate
c. linear amplification connection
d. All of the above b. low input impedance
c. threshold voltage
44. As VGS becomes _____ negative, the slope d. None of the above
of each curve in the characteristics becomes
_____ horizontal corresponding with an 51. The primary difference between the
increasing resistance level. construction of depletion-type and
a. less, more enhancement-type MOSFETs is _____.
b. more, less a. the size of the transistor
c. more, more b. the absence of the channel
d. None of the above c. the reverse bias junction
d. All of the above
45. The transfer curve can be obtained by
_____. 52. The level of _____ that results in the
a. using Shockley's equation significant increase in drain current in
b. using both Shockley's equation and enhancement-type MOSFETs is called
by output characteristics threshold voltage VT’.
c. characteristics a. VDD
d. None of the above b. VDS
c. VGS
46. The active region of an FET is bounded by d. VDG
_____.
a. ohmic region 53. In an n-channel enhancement-type MOSFET
b. cutoff region with a fixed value of VT’, the _____ the level
c. power line of VGS’, the _____ the saturation level for
d. All of the above VDS’.
a. higher, more
47. A(n) _____ can be used to check the b. higher, less
condition of an FET. c. lower, lower
a. digital display meter (DDM) d. None of the above
b. ohmmeter (VOM)
c. curve tracer 54. The enhancement-type MOSFET is in the
d. All of the above cutoff region if _____.
a. applied VGS is larger than VGS(Th)
48. In a curve tracer, the _____ reveals the b. applied VGS is less than or equal to
distance between the VGS curves for the n- VGS(Th)
channel device. c. VGS has a positive level
a. vertical sens. d. None of the above
b. horizontal sens.
c. Per step
55. The specification sheet provides _____ to
calculate the value of k for enhancement-
type MOSFETs.
a. VGS(on)
b. ID(on)
c. VGS(Th)
d. All of the above
56. _____ has high input impedance, fast

switching speeds, and lower operating
power levels.
a. CMOS
b. FET
c. BJT
57. The FET resistance in the ohmic region is

_____ at VP and _____ at the origin.
a. smallest, largest
b. largest, smallest
c. larger, smaller
d. smaller, larger
58. The silicon dioxide (SiO2) layer used in a

MOSFET is _____.
a. an insulator
b. a conductor
c. a semiconductor
59. In an n-channel depletion-type MOSFET the

region of positive gate voltages on the drain
or transfer characteristics is referred to as
the _____ region with the region between
cutoff and the saturation level of ID referred
to as the _____ region.
a. depletion, enhancement
b. enhancement, enhancement
c. enhancement, depletion
60. VMOS FETs have a _____ temperature

coefficient that will combat the possibility
of thermal runaway.
a. positive
b. negative
c. zero
6. The self-bias configuration eliminates the
FET BIASING need for two dc supplies.
a. True
1. What is the approximate current level in the b. False
gate of an FET in dc analysis?
a. 0 A 7. Which of the following is (are) true of a self-
b. 0.7 mA bias configuration compared to a fixed-bias
c. 0.3 mA configuration?
d. Undefined a. One of the dc supplies is
eliminated.
2. Which of the following current equations is b. A resistor RS is added.
true? c. VGS is a function of the output
a. IG = ID current ID.
b. IG = IS d. All of the above
c. ID = IS
d. IG = ID = IS 8. Which of the following represents the
voltage level of VGS in a self-bias
3. For the FET, the relationship between the configuration?
input and output quantities is _____ due to a. VG
the _____ term in Shockley's equation. b. VGS(off)
a. nonlinear, cubed c. VS
b. linear, proportional d. VP
c. nonlinear, squared
9. What is the new value of RD when there is 7
4. The input controlling variable for a(n) _____ V across VDS?
is a current level and a voltage level for a(n)
_____.
a. BJT, FET
b. FET, BJT
c. FET, FET
d. BJT, BJT
5. Calculate the value of VDS.
a. 3 kΩ
b. 3.3 kΩ
c. 4 kΩ
d. 5 kΩ
10. Which of the following is a false statement

regarding the dc load line when comparing
a. 0V self-bias and voltage-divider configurations?
b. 8V a. Both are linear lines.
c. 4.75 V b. Both cross the origin.
d. 16 V c. Both intersect the transfer
characteristics.
d. Both are obtained by writing d. All of the above
Kirchhoff's voltage law (KVL) at the
input side loop. 14. At what value of RS does the circuit switch
from depletion mode to enhancement
11. For what value of RD is the voltage across mode?
VDS zero?
a. 250 Ω
a. 2.400 kΩ
b. 500 Ω
b. 5.167 kΩ
c. 10 MΩ
c. 6.167 kΩ
d. 6.670 kΩ
15. For what value of R2 is VGSQ equal to 1 V?
12. Calculate the value of VDS’.
a. 0V a. 10 MΩ`
b. 0.35 V b. 100 MΩ
c. 3.8 V c. 110 MΩ
d. 33.5 V d. 220 MΩ
13. Which of the following describe(s) the 16. Depletion-type MOSFETs do not permit
difference(s) between JFETs and depletion- operating points with positive values of
type MOSFETs? VGS and levels of ID that exceed IDSS.
a. VGS can be positive or negative for a. True
the depletion-type. b. False
b. ID can exceed IDSS for the depletion-
type. 17. For what value of RS can the depletion-type
c. The depletion-type can operate in MOSFETs operate in enhancement mode?
the enhancement mode.
20. What are the voltages across RD and RS?
a. 2.4 kΩ
b. 5 kΩ
c. 6.2 kΩ
a. 0 V, 0 V
18. Determine the value of VDSQ. b. 5 V, 5 V
c. 10 V, 10 V
d. 20 V, 20 V
21. Calculate VD.
a. 3.5 V
b. 4.86 V
c. 7.14 V
d. 10 V
19. Calculate the value of VDSQ. a. 23.0 V

b. 17.0 V
c. 4.6 V
d. 12.4 V
22. Specification sheets typically provide the

value of the constant k for enhancement-
type MOSFETs.
a. True
b. False
23. Calculate VDS'.
a. 0V
b. 20 V
c. 30 V
d. 40 V
a. 2 kΩ, 2 kΩ
b. 1 kΩ, 5.3 kΩ
c. 3.2 kΩ, 400 Ω
a. 0V
d. 2.5 kΩ, 5.3 kΩ
b. 6V
c. 16 V
26. Calculate the value of RS. Assume VGSQ =
d. 11 V
−2V.
24. Calculate VCE’.
a. 0 kΩ
b. 1.68 kΩ
c. 6.81 kΩ`
d. 8.5 kΩ
a. 0V 27. Calculate the value of RD’.

b. 2V
c. 3V
d. 5.34 V
25. Given the values of VDQ and IDQ for this

circuit, determine the required values of
RD and RS.
a. 2 kΩ
b. 3 kΩ
c. 3.5 kΩ
d. 4.13 kΩ
28. In the design of linear amplifiers, it is good 32. Calculate VDSQ.
design practice to choose operating points
that do not crowd the saturation level or
cutoff regions.
a. True
b. False
29. Seldom are current levels measured since

such maneuvers require disturbing the
network structure to insert the meter.
a. True
b. False
30. Calculate the value of VDS.

a. 1.0 V
b. 1.50 V
c. 2.56 V
d. 3.58 V
33. On the universal JFET bias curve, the

vertical scale labelled _____ can, in itself, be
used to find the solution to _____
configurations.
a. m, fixed-bias
b. M, fixed-bias
c. M, voltage-bias
d. m, voltage-bias
a. –3 V 34. Through proper design, a ______ can be

b. 3V introduced that will affect the biasing level
c. –4 V of a voltage-controlled JFET resistor.
d. 4V a. photodiode
b. thermistor
31. Determine the quiescent values of ID and c. laser diode
VGS. d. Zener diode
35. For the noninverting amplifier, one of the

most important advantages associated with
using a JFET for control is the fact that it is
_____ rather than _____ control.
a. dc, ac
b. ac, dc
36. For the field-effect transistor, the

relationship between the input and the
output quantities is _____.
a. linear
b. nonlinear
a. 1.2 mA, –1.8 V c. 3rd degree
b. 1.5 mA, –1.5 V d. None of the above
c. 2.0 mA, –1.2 V
d. 3.0 mA, –0.8 V
37. The input controlling variable for an FET 44. The dc load line is drawn using the equation
transistor is a _____ level. obtained by applying Kirchhoff's voltage law
a. resistor (KVL) at _____ side loop(s) of the circuit.
b. current a. the output
c. voltage b. the input
d. All of the above c. both the input and output
38. The controlled variable on the output side
of an FET transistor is a _____ level. 45. The slope of the dc load line in a self-bias
a. current configuration is controlled by _____.
b. voltage a. VDD
c. resistor b. RD
d. None of the above c. RG
d. RS
39. For _____, Shockley's equation is applied to
relate the input and the output quantities. 46. _____ levels of RS result in _____ quiescent
a. JFETs values of ID and _____ negative values of
b. depletion-type MOSFETs VGS.
c. enhancement-type MOSFETs a. Increased, lower, less
d. JFETs and depletion-type MOSFETs b. Increased, higher, less
c. Increased, higher, more
40. The coupling capacitors are _____ for the d. Increased, less, lower
dc analysis and _____________ for the ac
analysis. 47. The slope of the dc load line in a voltage-
a. open-circuit, low impedance divider is controlled by _____.
b. short-circuit, low impedance
c. open-circuit, high impedance
41. In a fixed-bias configuration, the voltage

level of VGS is equal to _____.
a. VS
b. VG
c. VGS(off)
d. VP
42. The ratio of current ID to IDSS is equal to

_____ for a fixed-bias configuration. a. R1
a. 0 b. R2
b. 0.25 c. RS
c. 0.5 d. All of the above
d. 1
48. In a depletion-type MOSFET, the transfer
43. When plotting the transfer characteristics, characteristic rises _____ as VGS becomes
choosing VGS = 0.5VP will result in a drain more positive.
current level of _____ IDSS. a. less rapidly
a. 0 b. more rapidly
b. 0.25 c. the same
c. 0.5 d. None of the above
d. 1
49. In _____ configuration(s) a depletion-type a. Dc conditions
MOSFET can operate in enhancement b. Level of amplification
mode. c. Signal strength
a. self-bias d. All of the above
b. fixed-bias with no VGG
c. voltage-divider 55. In a JFET, the level of _____ is limited to
d. None of the above values between 0 V and –VP.
a. VSQ
50. In an enhancement-type MOSFET, the drain b. VDGQ
current is zero for levels of VGS less than the c. VDSQ
_____ level. d. VGSQ
a. VGS(Th)
b. VGS(off) 56. The level of VDS is typically between _____
c. VP % and _____ % of VDD.
d. VDD a. 0, 100
b. 10, 90
51. Specification sheets typically provide _____ c. 25, 75
for enhancement-type MOSFETs. d. None of the above
a. the threshold voltage VGS(Th)
b. a level of drain current ID(on) 57. In a universal JFET bias curve, the vertical
c. an ID(on) scale labeled m is used to find the solution
d. All of the above to the _____ configuration.
a. fixed-bias
52. In a feedback-bias configuration, the slope b. self-bias
of the dc load line is controlled by _____. c. voltage-divider
a. RG d. None of the above
b. RD
c. VDG 58. In a universal JFET bias curve, the vertical
d. None of the above scale labeled M is used for finding the
solution to the _____ configuration.
53. For R2 smaller than _____ kΩ the voltage a. fixed-bias
VD is equal to VDD = 16 V. b. self-bias
c. voltage-divider
59. In a universal JFET bias curve, the horizontal

axis is _____.
a. VDS
b. ID / IDSS
c. the normalized level VGS/|VP|
d. VGS
60. In p-channel FETs, the level of VGS is _____

while the level of VDS is _____.
a. negative, negative
b. positive, positive
a. 3.75 c. negative, positive
b. 5 d. positive, negative
c. 12.0
d. 24
54. _____ must be considered in the total

design process.
FET AMPLIFIERS
1. FET amplifiers provide ________.
a. excellent voltage gain
b. high input impedance
c. low power consumption
d. All of the above
2. A BJT is a ________-controlled device.

a. current
b. voltage
c. power
d. resistance a. 2 mS
b. 3 mS
3. An FET is a ________-controlled device. c. 4 mS
a. current d. 5 mS
b. voltage
c. power 9. Use the following equation to calculate gm
d. resistance for a JFET having IDSS = 10 mA, VP = –5 V, and
VGSQ = –2.5 V.
4. The E-MOSFET is quite popular in ________
applications.
a. digital circuitry
b. high-frequency
c. buffering
d. All of the above
a. 2 mS
5. What is the range of gm for JFETs? b. 3 mS
a. 1 µS to 10 µS c. 4 mS
b. 100 µS to 1000 µS d. 5 mS
c. 1000 µS to 5000 µS
d. 10000 µS to 100000 µS 10. Referring to the following figure, calculate
gm for VGSQ = –1.25 V.
6. For what value of ID is gm equal to 0.5 gm0?
a. 0 mA
b. 0.25 IDSS
c. 0.5 IDSS
d. IDSS
7. What is the typical value for the input

impedance Zi for JFETs?
a. 100 kΩ
b. 1 MΩ
c. 10 MΩ
d. 1000 MΩ
8. Referring to the transfer characteristics a. 2 mS

shown below, calculate gm at VGSQ = –1 V. b. 2.5 mS
c. 2.75 mS
d. 3.25 mS
11. Referring to this figure, obtain gm for ID = 6 b. one-half
mA. c. three-fourths
d. two-thirds
16. If ID = IDSS / 2, gm = ___________ gmo.

a. 1
b. 0.707
c. 0.5
d. 1.414
17. The more horizontal the characteristic

curves on the drain characteristics, the
________ the output impedance.
a. 2.83 mS a. less
b. 3.00 mS b. same
c. 3.25 mS c. greater
d. 3.46 mS
18. What is (are) the function(s) of the coupling
12. Referring to the figure below, determine capacitors C1 and C2 in an FET circuit?
the output impedance for VGS = –3 V at VDS = a. to create an open circuit for dc
5 V. analysis
b. to isolate the dc biasing
arrangement from the applied
signal and load
c. to create a short-circuit equivalent
for ac analysis
d. All of the above
19. Where do you get the level of gm and rd for

an FET transistor?
a. from the dc biasing arrangement
b. from the specification sheet
a. 100 kΩ
c. from the characteristics
b. 80 kΩ
d. All of the above
c. 25 kΩ
d. 5 kΩ
20. Referring to this figure, find Zo if yos = 20 µS.
13. Calculate gm and rd if yfs = 4 mS and yos = 15
ΩS.
a. 4 mS, 66.7 kΩ
b. 4 mS, 15 kΩ
c. 66.7 kΩ, 4 mS
14. The steeper the slope of the ID versus

VGS curve, the ________ the level of gm.
a. less
b. same
c. greater
a. 1.85 kΩ
15. When VGS = 0.5 Vp gm is ________ the
b. 1.92 kΩ
maximum value.
c. 2.05 kΩ
a. one-fourth
d. 2.15 kΩ
a. 2.92 kΩ
21. Referring to this figure, calculate Av if yos = b. 3.20 kΩ
20 µS. c. 3.25 kΩ
d. 3.75 kΩ
25. On which of the following parameters does

rd have no or little impact in a source-
follower configuration?
a. Zi
b. Zo
c. Av
d. All of the above
26. Referring to this figure, calculate Zo for

VGSQ = –3.2 V.
a. –3.48
b. –3.56
c. –3.62
d. –4.02
22. For the fixed-bias configuration, if rd < 10 •

RD, then Zo = ________.
a. RD
b. RD || rd
c. RG
d. -gm • (RD || rd)
a. 362.52 Ω
23. Which of the following is a required
b. 340.5 Ω
condition to simplify the equations for
c. 420.5 Ω
Zo and Av for the self-bias configuration?
d. 480.9 Ω
a. rd ≤ 10RD
b. rd = RD
27. Referring to this figure, calculate Zi for yos =
c. rd ≥ 10RD
20 µS. Assume VGSQ = −2.2V.
24. Referring to this figure, calculate Zo if yos =

40 µS.
a. 300.2 Ω
b. 330.4 Ω
c. 340.5 Ω
d. 350.0 Ω 31. Referring to this figure, calculate Zo if rd = 19
kΩ.
28. Which of the following is (are) related to
depletion-type MOSFETs?
a. VGSQ can be negative, zero, or
positive.
b. gm can be greater or smaller than
gm0’.
c. ID can be larger than IDSS’.
d. All of the above
29. Referring to this figure, calculate Av for yos =

58 µS.
a. 1.75 kΩ
b. 1.81 kΩ
c. 1.92 kΩ
d. 2.00 kΩ
32. Referring to this figure, calculate Av if rd = 19

kΩ.
a. –7.29
b. –7.50
c. –8.05
d. –8.55
30. Referring to this figure, calculate Zi if rd = 19

kΩ.
a. –2.85
b. –3.26
c. –2.95
d. –3.21
33. Determine the value for RD if the ac gain is

8.
a. 2.42 MΩ
b. 2.50 MΩ
c. 2.53 MΩ
d. 2.59 MΩ
37. The depletion MOSFET circuit has a _____
input impedance than a similar JFET
configuration.
a. much higher
b. much lower
c. lower
d. higher
38. The _____ is quite popular in digital circuits,

especially in CMOS circuits that require very
low power consumption.
a. JFET
a. 1.51 kΩ
b. BJT
b. 1.65 kΩ
c. D-type MOSFET
c. 1.85 kΩ
d. E-type MOSFET
d. 2.08 kΩ
39. _____ is the amplification factor in FET
34. Referring to this figure, calculate the value
transistor amplifiers.
of RD if the ac gain is 10. Assume VGSQ = ¼Vp.
a. Zi
b. gm
c. ID
d. IG
40. _____ is an undefined quantity in a JFET.

a. Ai
b. Av
c. Zi
d. Zo
41. The _____ controls the _____ of an FET.

a. ID’, VGS
a. 2.2 kΩ b. VGS’, ID
b. 2.42 kΩ c. IG’, VDS
c. 2.62 kΩ d. IG’, ID
d. 2.82 kΩ
42. Transconductance is the ratio of changes in
35. For an FET small-signal amplifier, one could _____.
go about troubleshooting a circuit by a. ID to VGS
________. b. ID to VDS
a. viewing the circuit board for poor c. VGS to IG
solder joints d. VGS to VDS
b. using a dc meter
c. applying a test ac signal 43. The transconductance gm _____ as the Q-
d. All of the above point moves from Vp to IDSS
a. decreases
36. A field-effect transistor amplifier provides b. remains the same
excellent voltage gain with the added c. increases
feature of a _____ input impedance. d. None of the above
a. low
b. medium 44. gm has its maximum value for a JFET at
c. high _____.
d. None of the above a. Vp
b. 0.5 Vp
c. 0.3 Vp 52. _____ is the only parameter that is different
d. IDSS between voltage-divider and fixed-bias
configurations.
45. The value of gm is at its maximum gm0 at a. Zi
VGS equal to _____ and zero at VGS equal to b. Av
_____. c. Zo
a. 0 V, Vp d. None of the above
b. Vp, 0 V
c. 0.5Vp, 0.3Vp 53. The input and output signals are in phase in
d. 0.3Vp , 0.5Vp a _____ configuration.
a. fixed-bias
46. The range of input impedance Zi for b. source-follower
MOSFETs is _____. c. voltage-divider
a. 1 kΩ –10 kΩ d. self-bias
b. 100 kΩ –1 MΩ
c. 10 MΩ –100 MΩ 54. A _____ configuration has a voltage gain
12 15
d. 10 Ω to 10 Ω less than 1.
a. fixed-bias
47. The range of output admittance yos for FETs b. self-bias
is _____. c. source-follower
a. 5 µS –10 µS d. voltage-divider
b. 10 µS –50 µS
c. 50 µS –100 µS 55. The input and output signals are 180º out of
d. 200 µS –500 µS phase in a _____ configuration.
a. source-follower
48. The _____ configuration has the distinct b. common-gate
disadvantage of requiring two dc voltage c. common-drain
sources. d. voltage-divider
a. self-bias
b. voltage-divider 56. The isolation between input and output
c. fixed-bias circuits in the ac equivalent circuit is lost in
d. All of the above a _____ configuration.
a. common-gate
49. _____ is the network-input impedance for a b. common-source
JFET fixed-bias configuration. c. common-drain
a. RG d. None of the above
b. RD
c. Zero 57. The _____ configuration has an input
d. None of the above impedance, which is other than RG.
a. common-source
50. _____ is a required step in order to b. common-gate
calculate Zo. c. common-drain
a. Setting IG equal to zero d. None of the above
b. Setting Vi equal to zero
c. Setting ID equal to IDSS 58. The gate-to-source voltage VGS of a(n)
d. None of the above _____ must be larger than the threshold
VGS(Th) for the transistor to conduct.
51. _____ configuration(s) has (have) Zo ≈ RD. a. JFET
a. Fixed-bias b. D-type MOSFET
b. Self-bias c. E-type MOSFET
c. Voltage-divider d. None of the above
d. All of the above
59. rd changes from one operation region to
another with _____ values typically
occurring at _____ levels of VGS (closer to
zero).
a. lower, lower
b. lower, higher
c. higher, lower
60. The _____ does not support Shockley's

equation.
a. JFET
b. D-type MOSFET
c. E-type MOSFET
input voltage for the rated output if the
BJT & JFET FREQUENCY amplifier voltage gain is 20 dB.
RESPONSE a. 1.225 mV
b. 12.25 mV
1. What is the ratio of the common logarithm c. 122.5 mV
of a number to its natural logarithm? d. 1.225 V
a. 0.435
b. 2 8. For audio systems, the reference level is
c. 2.3 generally accepted as
d. 3.2 a. 1 mW
b. 1 W
a c. 10 mW
2. logea = _____ log10
a. 2.3 d. 100 mW
b. 2.718
c. e 9. For which of the following frequency
d. 1.414 region(s) can the coupling and bypass
capacitors no longer be replaced by the
3. By what factor does an audio level change if short-circuit approximation?
the power level changes from 4 W to 4096 a. Low-frequency
W? b. Mid-frequency
a. 2 c. High-frequency
b. 4 d. All of the above
c. 6
d. 8 10. By what other name(s) are the cut-off
frequencies in a frequency response plot
4. The input power to a device is 10,000 W at called?
1000 V. The output power is 500 W, and the a. Corner frequency
output impedance is 100 Ω. Find the b. Break frequency
voltage gain in decibels. c. Half-power frequency
a. –30.01 dB d. All of the above
b. –20.0 dB
c. –13.01 dB 11. What is the ratio of the output power to the
d. –3.01 dB input power at the cut-off frequencies in a
normalized frequency response plot?
5. What magnitude voltage gain corresponds a. 0.25
to a decibel gain of 50? b. 0.50
a. 31.6238 c. 0.707
b. 316.228 d. 1
c. 3162.38
d. 31623.8 12. What is the ratio of the output voltage to
the input voltage at the cut-off frequencies
6. An amplifier rated at 30-W output is in a normalized frequency response plot?
connected to a 5-Ω speaker. Calculate the a. 0.25
input power required for full power output b. 0.50
if the power gain is 20 dB. c. 0.707
a. 3 mW d. 1
b. 30 mW
c. 300 mW 13. What is the normalized gain expressed in dB
d. 3 W for the cut-off frequencies?
a. –3 dB
7. An amplifier rated at 30-W output is b. +3 dB
connected to a 5-Ω speaker. Calculate the c. –6 dB
d. –20 dB
20. Determine the break frequency for this
14. The ________-frequency response of a circuit.
transformer-coupled system is calculated
primarily by the stray capacitance between
the turns of the primary and secondary
windings.
a. Low
b. Mid
c. High
15. The larger capacitive elements of the design

will determine the ________ cut-off
frequency.
a. Low a. 15.915 Hz
b. Mid b. 159.15 Hz
c. High c. 31.85 Hz
d. 318.5 Hz
16. The smaller capacitive elements of the
design will determine the ________ cut-off 21. Refer to Figure 9.19. Calculate θ at 0.5f1.
frequencies. a. 63.43º
a. Low b. 26.56º
b. Mid c. 45º
c. High d. Undefined
17. What is the ratio of the capacitive reactance 22. A change in frequency by a factor of
XCS to the input resistance RI of the input RC ________ is equivalent to 1 octave.
circuit of a single-stage BJT amplifier at the a. 2
low-frequency cut-off? b. 10
a. 0.25 c. 5
b. 0.50 d. 20
c. 0.75
d. 1.0 23. A change in frequency by a factor of
________ is equivalent to 1 decade.
18. In the input RC circuit of a single-stage BJT, a. 2
by how much does the base voltage lead b. 10
the input voltage for frequencies much c. 5
larger than the cut-off frequency in the low- d. 20
frequency region?
a. About 0º 24. For the low-frequency response of a BJT
b. 45º amplifier, the maximum gain is where
c. About 90º ________ .
d. None of the above a. RB = 0 Ω
b. RC = 0 Ω
19. In the input RC circuit of a single-stage BJT, c. RE = 0 Ω
by how much does the base voltage lead
the input voltage at the cut-off frequency in 25. Which of the low-frequency cutoffs
the low-frequency region? determined by CS, CC, or CE will be the
a. About 0º predominant factor in determining the low-
b. 45º frequency response for the complete
c. About 90º system?
d. None of the above a. Lowest
b. Middle
c. Highest
d. None of the above b. fβ
c. 1
26. Determine the lower cut-off frequency of d. 2
this network.
a. 15.8 Hz 33. What is the range of the capacitors Cgs and
b. 46.13 Hz Cgd?
c. 238.73 Hz a. 1 to 10 pF
d. 1575.8 Hz b. 1 to 10 nF
c. 1 to 10 F
27. Which of the following elements is (are) d. 1 to 10 F
important in determining the gain of the
system in the high-frequency region? 34. What is the range of the capacitor Cds?
a. Interelectrode capacitances a. 0.01 to 0.1 pF
b. Wiring capacitances b. 0.1 to 1 pF
c. Miller effect capacitance c. 0.1 to 1 nF
d. All of the above d. 0.1 to 1 F
28. In the ________-frequency region, the 35. Which of the following statements is true
capacitive elements of importance are the for a square-wave signal?
interelectrode (between terminals) a. It is composed of both even and
capacitances internal to the active device odd harmonics.
and the wiring capacitance between the b. It is composed only of odd
leads of the network. harmonics.
a. Low c. It is composed only of even
b. Mid harmonics.
c. High d. The harmonics waveforms are also
square waves.
29. Which of the following capacitors is (are)
included in Ci for the high-frequency region 36. Logarithms taken to the base _____ are
of a BJT or FET amplifier? referred to as common logarithms, while
a. Input wiring capacitance CWi logarithms taken to the base _____ are
b. The transition capacitance (Cbe/Cqs) referred to as natural logarithms.
c. Miller capacitance CMi a. 10, e
d. All of the above b. e, 10
c. 5, e
30. In the hybrid pi or Giacoletto model, which d. 10, 5
one of the following does rb include?
a. Base spreading resistance 37. The logarithm of a number _____ than 1 is
b. Base contact always _____.
c. Base bulk a. greater, negative
d. All of the above b. less, positive
c. less, negative
31. Which of the following configurations does d. None of the above
(do) not involve the Miller effect
capacitance? 38. The decibel (dB) is defined such that _____
a. Common-emitter decibel(s) = _____ bel(s).
b. Common-base a. 1, 10
c. Common-collector b. 10, 1
d. All of the above c. 1, 1
d. 10, 10
32. A 3-dB drop in hfe will occur at a frequency
defined by ________. 39. The resistance associated with the 1-mW
a. fα power level is _____ , chosen because it is
the characteristic impedance of audio c. 10-dB
transmission lines. d. 20-dB
a. 100
b. 250 46. A change in frequency by a factor of 10
c. 400 results in a _____ change in the ratio of the
d. 600 normalized gain.
a. 3-dB
40. The decibel gain of a cascaded system is the b. 6-dB
_____ of the decibel gains of each stage. c. 10-dB
a. sum d. 20-dB
b. difference
c. product 47. In the low-frequency region, the _____ low-
d. quotient frequency cut-off determined by CS, CC, or
CE will have the greatest impact on the
41. Voltage gains of _____ dB or higher should network.
immediately be recognized as being quite a. highest
high. b. average
a. 3 c. lowest
b. 6 d. None of the above
c. 20
d. 50 48. The _____ region produces the maximum
voltage gain in a single-stage BJT or FET
42. For the RC-coupled amplifier, the drop in amplifier.
gain at low frequencies is due to the a. low-frequency
increasing reactance of _____. b. mid-frequency
a. CC c. high-frequency
b. Cs d. None of the above
c. CE
d. All of the above 49. For any inverting amplifier, the impedance
capacitance will be _____ by a Miller effect
43. To fix the frequency boundaries of relatively capacitance sensitive to the gain of the
high gain, _____ was chosen to be the gain amplifier and the interelectrode
at the cut-off levels. capacitance.
a. 0.5Av mid a. unaffected
b. 0.707Av mid b. increased
c. Av low c. decreased
d. 0.5Av high d. None of the above
44. In the input RC circuit of a single-stage BJT 50. The Miller effect is meaningful in the _____
or FET amplifier, as the frequency _____, amplifier.
the capacitive reactance _____ and _____ a. inverting
of the input voltage appears across the b. noninverting
output terminals. c. inverting/noninverting
a. increases, decreases, more d. None of the above
b. increases, decreases, less
c. increases, increases, more 51. With a BJT amplifier in the high-frequency
d. decreases, decreases, less region, the capacitance Cbe is the _____ of
the parasitic capacitances while Cce is the
45. A change in frequency by a factor of 2 _____.
results in a _____ change in the ratio of the a. smallest, largest
normalized gain. b. largest, smallest
a. 3-dB c. smallest, medium
b. 6-dB d. None of the above
58. The bandwidth _____ in a multistage
52. At very high frequencies, the effect of C i is amplifier compared to an identical single-
to _____ the total impedance of the parallel stage amplifier.
combination of R1, R2, R3, and Ci. a. increases
a. increase b. decreases
b. maintain c. remains the same
c. decrease d. None of the above
59. The _____ in the Fourier series has the
53. If the parasitic capacitors were the only same frequency as the square wave itself.
elements to determine the high cut-off a. fundamental
frequency, the _____ frequency would be b. third harmonic
the determining factor. c. fifth harmonic
a. lowest d. seventh harmonic
b. highest
c. lowest or highest 60. The magnitude of the third harmonic is
d. None of the above _____ of the magnitude of the
fundamental.
54. The _____ configuration displays improved a. 1
high-frequency characteristics over the b. 0.5
_____ configuration. c. 0.33
a. common-collector, common- d. 0.25
emitter
b. common-emitter, common-base
c. common-emitter, common-
collector
d. common-base, common-emitter
55. The _____ of the upper cut-off frequencies

defines a _____ possible bandwidth for a
system.
a. highest, maximum
b. lowest, maximum
c. lowest, minimum
56. fα is _____ than fβ in a common-base

configuration.
a. significantly smaller
b. smaller
c. significantly greater
57. For two identical stages in cascade, the

drop-off rate in the high- and low-frequency
regions has increased to _____ per decade.
a. –3 dB
b. –6 dB
c. –20 dB
d. –40 dB
OPERATIONAL AMPLIFIERS
1. In which of the following are operational
amplifiers (op-amps) used?
a. Oscillators
b. Filters
c. Instrumentation circuits
d. All of the above
a. single-ended input
2. This circuit is an example of a _____. b. double-ended (differential) input
c. double-ended output
d. common-mode operation
5. This circuit is an example of a _____.
b. double-ended (differential) input
3. This circuit is an example of a _____. b. double-ended (differential) input
6. In which of the following operations is the

resulting output signal of the differential
amplifier near zero?
a. Single-ended
b. Double-ended
c. Common-mode
7. In the differential amplifier circuit, which of

a. single-ended input the following terminals are connected
b. double-ended (differential) input together?
c. double-ended output a. Bases
d. common-mode operation b. Collectors
c. One base to another collector
4. This circuit is an example of a _____. d. Emitters
8. Which of the following circuits is referred to

as a BiMOS circuit?
a. Bipolar and FET
b. Bipolar and MOSFET
c. Opposite-type MOSFETs
9. An IC unit made using both _____ and
_____ transistors is called a _____ circuit. 14. Calculate the overall voltage gain of the
a. bipolar, MOSFET, BiFET circuit if R1 = 100 Ω and Rf = 1 kΩ.
b. bipolar, MOSFET, BiMOS
c. TTL, MOSFET, TailFET
10. What is the level of the voltage between

the input terminals of an op-amp?
a. Virtually zero
b. 5 V
c. 18 V
d. 22 V
11. What is the level of the current through the

amplifier input(s) to ground in an op-amp?
a. Virtually zero a. –1
b. 1.7 mA b. –10
c. 2.8 mA c. 11
d. 3.3 mA d. 9
12. If Rf = R1’, the voltage gain is _____. 15. What is the voltage gain of the unity
follower?
a. 0
b. 1
c. –1
d. Infinity
16. Calculate the input voltage if R1 = 100 Ω, Rf =

1 kΩ, and Vout = 550 mV.
a. 1
b. –1
c. 10
d. very small
13. Calculate the overall voltage gain of the

circuit if R1 = 100 and Rf = 1 kΩ.
a. –50 mV
b. –5 mV
c. 550 mV
d. 50 mV
17. Calculate the output voltage if R1 = R2 = R3 =

100 Ω, Rf = 1 kΩ, and V1 = V2 = V3 = 50 mV.
a. –1
b. –10
c. 11
d. 9
a. inverting amplifier
a. –1.5 V
b. noninverting amplifier
b. 1.5 V
c. differentiator
c. 0.5 V
d. integrator
d. –0.5 V
22. This circuit is referred to as a(n) _____.
18. What is the scale multiplier (factor) of a
basic integrator?
a. R / C
b. C / R
c. –RC
d. –1 / RC
19. The summing amplifier contains an

inverting amplifier.
a. True
b. False
20. This circuit is referred to as a(n) _____.
b. noninverting amplifier
c. differentiator
d. d.integrator
23. Which of the following circuit conditions

affect(s) the output offset voltage of an op-
amp?
a. An input offset voltage, VIO
b. An input offset current, IIO
c. Both an input offset voltage,
VIO and an input offset current, IIO
b. noninverting amplifier 24. What is the level of the roll-off in most op-
c. unity follower amps?
d. integrator a. –6 dB / decade
b. –20 dB / octave
21. This circuit is referred to as a(n) _____. c. –6 dB / decade or –20 dB / octave
d. –20 dB / decade or –6 dB / octave
25. Which of the following is (are) the result of

gain reduction by a feedback?
a. The amplifier voltage gain is a
more stable and precise value.
b. The input impedance of the circuit b. The common-mode gain times the
is increased over that of the op- common input voltage.
amp alone. c. The sum of the differential gain
c. The output impedance is reduced times the difference input voltage
over that of the op-amp alone. and the common-mode gain times
d. All of the above the common input voltage.
d. The difference of the differential
26. What is the open-loop gain of an op-amp at gain times the difference input
the gain-bandwidth product of the op-amp? voltage and the common-mode
a. 200,000 gain times the common input
b. 50,000 voltage.
c. 200
d. 1 32. What is the difference voltage if the inputs
are an ideal opposite signal?
27. What is the cutoff frequency of an op-amp a. The differential gain times twice
if the unity-gain frequency is 1.5 MHz and the input signal.
the open-loop gain is 100,000? b. The differential gain times the
a. 5 Hz input signal.
b. 10 Hz c. The common-mode gain times
c. 15 Hz twice the input signal.
d. 20 Hz d. The common-mode gain times the
input signal.
28. What is the slew rate of an op-amp if the
output voltages change from 2 V to 3 V in 33. What is the difference voltage if the inputs
0.2 ms? are an ideal in-phase signal?
a. 5 V/ms a. The differential gain times twice
b. 3 V/ms the input signal.
c. 2 V/ms b. The differential gain times the
d. 1 V/ms input signal.
c. The common-mode gain times
29. For an op-amp having a slew rate SR = 5 twice the input signal.
V/ms, what is the maximum closed-loop d. The common-mode gain times the
voltage gain that can be used when the input signal.
input signal varies by 0.2 V in 10 ms?
a. 150 34. At what input voltage level does the output
b. 200 voltage level become numerically equal to
c. 250 the value of the differential gain of the
d. 300 amplifier?
a. Vi1 = –Vi2 = 0.25 V
30. Calculate the output impedance of an b. V i1 = –V i2 = 0.50 V
inverting op-amp using the 741 op-amp c. V i1 = –V i2 = 0.75 V
(ro = 75 Ω, AOL = 200 V/mV) if R1 = 100 Ω and d. V i1 = –Vi2 = 1.00 V
Rf = 1 kΩ.
a. 0.011 35. At what input voltage level does the output
b. 0.00375 voltage level become numerically equal to
c. 0.0375 the value of the common-mode gain of the
d. 0.375 amplifier?
a. Vi1 = –Vi2 = 0.25 V
31. What is the difference output voltage of any b. Vi1 = –Vi2 = 0.50 V
signals applied to the input terminals? c. Vi1 = –Vi2 = 0.75 V
a. The differential gain times the d. Vi1 = –Vi2 = 1.00 V
difference input voltage.
36. An operational amplifier is a _____ gain and d. highly, slightly
_____ bandwidth differential amplifier.
a. very low, narrow 42. In a differential amplifier circuit, if an input
b. low, wide signal is applied to either input with the
c. medium, narrow other input connected to ground, the
d. very high, wide operation is referred to as _____.
a. double-ended
37. An operational amplifier has a _____ input b. single-ended
impedance and a _____ output impedance. c. common-mode
a. high, low d. All of the above
b. high, high
c. low, low 43. If two opposite-polarity input signals are
d. low, high applied, the operation is referred to as
_____.
38. The output signal of an op-amp is _____ out a. double-ended
of phase with its input signal connected to b. single-ended
the inverting input terminal. c. common-mode
a. 0º d. All of the above
b. 90º
c. 180º 44. If the same input is applied to both inputs,
d. 270º the operation is called _____.
a. double-ended
39. In double-ended (differential) input b. single-ended
operation, _____. c. common-mode
a. an input is applied between the d. All of the above
two input terminals
b. two separate signals are applied to 45. The main feature of the differential
the input terminals amplifier is the _____ gain when opposite
c. either an input is applied between signals are applied to the inputs as
the two input terminals or two compared to the _____ gain resulting from
separate signals are applied to the common inputs.
input terminals a. very large, large
d. None of the above b. very small, large
c. very small, very large
40. An input applied to either input terminal d. very large, very small
will result in _____.
a. outputs from both output 46. An IC unit containing a differential amplifier
terminals, which have opposite built using both bipolar and FET transistors
polarities is referred to as a _____ circuit.
b. outputs from both output a. CMOS
terminals, which have the same b. BiFET
polarities c. BiMOS
c. a single output from one of the d. None of the above
output terminals
d. None of the above 47. An IC unit containing a differential amplifier
built using opposite-type MOSFET
41. In a differential connection, the signals that transistors is referred to as a _____ circuit.
are opposite at the inputs are _____ a. CMOS
amplified, and those that are common to b. BiFET
the two inputs are _____ amplified. c. BiMOS
a. slightly, slightly d. None of the above
b. slightly, highly
c. highly, highly
48. A _____ differential amplifier is particularly 55. As the frequency increases, the input
well suited for battery operation due to its impedance of an op-amp _____ and the
low power consumption. output impedance _____.
a. BiFET a. increases, increases
b. BiMOS b. increases, decreases
c. CMOS c. decreases, decreases
d. BJT d. decreases, increases
49. An ideal op-amp circuit has _____input 56. Inverting amplifier connection is more
impedance, _____ output impedance, and widely used because it has _____.
_____ voltage gain. a. higher gain
a. zero, infinite, infinite b. better frequency stability
b. infinite, zero, zero c. unit gain
c. zero, zero, infinite d. None of the above
d. infinite, zero, infinite
57. The output offset voltage is determined by
50. The _____ amplifier is the most widely used _____.
constant-gain amplifier circuit. a. the input offset voltage and input
a. inverting offset current
b. noninverting b. the closed-loop gain
c. differential c. both the input offset voltage and
d. None of the above the closed-loop gain
51. The feedback component of an integrator is
a(n) _____. 58. The ratio of the unity-gain frequency to the
a. resistor cutoff frequency is numerically equal to the
b. capacitor level of _____.
c. inductor a. CMRR
d. diode b. common-mode gain
c. closed-loop gain
52. _____ is the unit for the slew rate, SR. d. open-loop gain
a. V/ms
b. ms/V 59. When both input signals are the same, a
c. V common signal element due to the two
d. V/s inputs can be defined as the _____ of the
two signals.
53. The maximum frequency at which an op- a. difference
amp may operate depends on the _____. b. sum
a. bandwidth (BW) c. average of the sum
b. slew rate (SR) d. product
c. unity-gain bandwidth
d. All of the above 60. The common-mode rejection ratio (CMRR)
is defined by _____.
54. As the supply voltage increases, the voltage a. Ad / Ac
gain of the circuit _____ and the power b. Ac / Ad
consumption _____. c. Ad × Ac
a. increases, increases d. Ad + Ac
b. increases, decreases
c. decreases, decreases 61. Ideally, the value of the CMRR is _____.
d. decreases, increases Practically, the _____ the value of CMRR,
the better the circuit operation.
a. zero, smaller
b. infinite, larger
c. zero, larger
d. infinite, smaller
c. 6.12 mV
OP-AMP APPLICATIONS d. –6.12 mV
1. Determine the output voltage for this circuit 4. Calculate the input voltage when Vo = 11 V.
with a sinusoidal input of 2.5 mV.
a. –0.25 V
b. –0.125 V a. 1.1 V
c. 0.25 V b. –1.1 V
d. 0.125 V c. –1 V
d. 1V
2. Calculate the input voltage for this circuit if
Vo = –11 V. 5. Calculate the output voltage.
a. 3.02 V
b. 2.03 V
c. 1.78 V
a. 1.1 V d. 1.50 V
b. –1.1 V
c. –1 V 6. Calculate the output of the first-stage op-
d. 1V amp when V1 = 25 mV.
3. Calculate the output voltage.
a. –1.05 V
b. 0.075 V
c. 0.06 V
d. 4.2 V
a. –6.00 mV
b. 6.0 mV
7. Calculate the output of the second stage 11. A number of op-amp stages can be used to
op-amp if V1 = 25 mV. provide separate gains.
a. True
b. False
12. Calculate the output voltage if V1 = V2 = 0.15

V.
a. –0.075 V
b. 0.525 V
c. 0.06 V
d. 4.2 V
8. Calculate the input voltage if the final

output is 10.08 V.
a. 0V
b. 4.65 V
c. 6.45 V
d. –6.45 V
13. Calculate the output voltage if V1 = –3.3 V

and V2 = 0.8 V
a. –1.05 V
b. 0.525 V
c. 0.168 V
d. 4.2 V
9. Determine the value of Rf (assuming that all

have the same value).
a. 0V
b. –6.6 V
c. –4 V
d. 2V
14. Calculate the output voltage if V1 = 33 mV

and V2 = 02 mV.
a. 500 kΩ
b. 50 kΩ
c. 25 kΩ
d. 5 kΩ
10. When a number of stages are connected in

parallel, the overall gain is the product of
the individual stage gains.
a. True
b. False
a. 0V
b. –6.6 V d. None of the above
c. –4 V
d. 2V 18. Calculate the output voltage if V1 = 300 mV
and V2 = 700 mV.
15. Calculate the output voltage if V1 = 0 V and
V2 = 0.2 V.
a. 0V
a. 0V b. –12 V
b. –6.6 V c. 12 V
c. –4 V d. –4 V
d. 2V
19. Calculate the output voltage if V1 = V2 = 700
16. Calculate the output voltage if V1 = –0.2 V mV.
and V2 = 0 V.
a. 0V
b. –6.6 V a. 0V
c. –4 V b. –12 V
d. 2V c. 12 V
d. –8 V
17. Determine the output voltage.
20. Refer to Fig. Calculate the output voltage Vo
if V1 = –V2 = 300 mV.
a. 10(V2 – Vi)
b. –10(V2 – V1)
c. –10(V1 – V2) a. 0V
b. –12 V
c. 12 V
d. –8 V
21. Determine the output voltage when V1 =

V2 = 1 V.
a. 0V
b. –2 V
c. 1V
d. 2V
24. How many op-amps are required to

implement this equation?
a. 0V
b. –2 V
c. 1V
d. 2V
22. Determine the output voltage when V1 = –

V2 = 1 V.
a. 2
b. 3
c. 4
d. 1
25. How many op-amps are required to

a. 0V a. 2
b. –2 V b. 3
c. 1V c. 4
d. 2V d. 1
23. Determine the output voltage when V1 = – 26. How many op-amps are required to
V2 = –1 V. implement this equation?
a. 2 a. dc voltmeter
b. 3 b. display driver
c. 4 c. ac voltmeter
d. 1 d. All of the above
27. How many op-amps are required to 31. This circuit is an example of a(n)________.
Vo = V1
a. 2
b. 3
c. 4
d. 1
28. Calculate IL for this circuit.
a. dc voltmeter
b. display driver
c. instrumentation amplifier
32. Calculate the cut-off frequency of a first-

order low-pass filter for R1 = 2.5 kΩ and C1 =
0.05 μF.
a. 1.273 kHz
a. 3 mA
b. 12.73 kHz
b. 4 mA
c. 5 mA c. 127.3 kHz
d. 6 mA d. 127.30 Hz
29. Calculate the output voltage for this circuit 33. Calculate the cutoff frequencies of a
when V1 = 2.5 V and V2 = 2.25 V. bandpass filter with R1 = R2 = 5 kΩ and C1 =
C2 = 0.1 μF.
a. fOL = 318.3 Hz, fOH = 318.3 Hz
b. fOL = 636.6 Hz, fOH = 636.6 Hz
c. fOL = 318.3 Hz, fOH = 636.6 Hz
d. fOL = 636.6 Hz, fOH = 318.3
34. A filter that provides a constant output

from dc up to a cut-off frequency and
passes no signal above that frequency is
called a _____ filter.
a. low-pass
b. high-pass
c. bandpass
a. –5.25 V
b. 2.5 V
35. A difference between a passive filter and an
c. 2.25 V
active filter is that a passive filter uses
d. 5.25 V
amplifier(s), but an active filter does not.
a. True
30. An example of an instrumentation circuit is
b. False
a(n) _____.
43. The input impedance of a voltage buffer is
36. The level of the output voltage of an op- _____.
amp circuit is always _____ the level of VCC. a. very low
a. larger than b. low
b. the same as c. high
c. smaller than d. very high
44. The output impedance of a voltage buffer is
37. The input to an op-amp can be a(n) _____. _____.
a. dc source a. very low
b. ac source b. low
c. combination of ac and dc sources c. high
d. All of the above d. very high
38. When a number of stages are connected in 45. Op-amps can be used to form _____
series, the overall gain is the _____ of the circuit(s).
individual stage gains. a. voltage-controlled voltage source
a. sum b. voltage-controlled current source
b. product c. current-controlled voltage source
c. difference d. All of the above
d. average
46. _____ in a current-controlled voltage
39. _____ build a multistage connection. source circuit.
a. Only an inverting op-amp circuit a. The input current depends on the
must be used to output voltage
b. Only a noninverting op-amp circuit b. The input current depends on the
must be used to input voltage source
c. Both inverting and noninverting c. The output voltage depends on the
op-amp circuits can be used to input current.
d. Neither inverting nor noninverting d. The output current depends on the
op-amp circuits must be used to output voltage source
40. A voltage summing amplifier has _____. 47. _____ can be used as a voltage-controlled
a. several inputs and several outputs voltage source.
b. several inputs and one output a. Only an inverting op-amp circuit
c. one input and several outputs b. Only a noninverting op-amp circuit
d. one input and one output c. Neither inverting nor noninverting
op-amp circuits
41. The voltage gain of a voltage buffer is _____ d. Both inverting and noninverting
. op-amp circuits
a. 1
b. 0 48. In a current-controlled voltage source using
c. –1 the inverting op-amp circuit, the controlled
d. –5 output current is _____ with the input
voltage source.
42. The output voltage of a voltage buffer is a. in phase
_____ with the input voltage. b. 45º out of phase
a. in phase c. 90º out of phase
b. 45º out of phase d. 180º out of phase
c. 90º out of phase
d. 180º out of phase 49. Op-amp circuits are used in _____
voltmeters.
a. only dc
b. only ac b. passes frequencies from zero up to
c. both ac and dc the cutoff frequency
d. neither ac nor dc c. rejects all frequencies above the
cutoff frequency
50. In a current-controlled current source, the d. All of the above
controlled current Io depends on _____.
a. I1 57. A filter that passes signals that are above
b. R1 one ideal cutoff frequency and below a
c. R2 second cutoff frequency is called _____.
d. All of the above a. low-pass
b. high-pass
51. In a dc millivoltmeter, the amplifier c. bandpass
provides a meter with _____ input d. band reject
impedance and a scale factor dependent on
_____ value and accuracy. 58. The roll-off for a first-order high-pass filter
a. high, resistor is _____.
b. low, resistor a. –20 dB/decade
c. high, capacitor b. –6 dB/octave
d. None of the above c. either –20 dB/decade or –6
dB/octave
52. In a millivoltmeter, the diodes and the d. None of the above
capacitor are used in _____ parts of the
circuit. 59. The roll-off for a second-order high-pass
a. the dc filter is _____.
b. the ac a. either –20 dB per decade or –6 dB
c. both the dc and ac per octave
d. neither the dc nor ac b. either –40 dB per decade or –12 dB
per octave
53. In an instrumentation amplifier, the output c. either –60 dB per decade or –18 dB
voltage is based on the _____ times a scale per octave
factor. d. None of the above
a. summation of the two inputs
b. product of the two inputs 60. A bandpass filter uses _____ circuit.
c. difference between the two inputs a. a high-pass
d. None of the above b. a low-pass
c. a high-pass and a low-pass
54. A(n) _____ is not a component of a passive d. neither a low-pass nor a high-pass
filter.
a. op-amp
b. capacitor
c. inductor
d. resistor
55. An active circuit is composed of a(n) _____.

a. resistor
b. capacitor
c. op-amp
d. All of the above
56. A low-pass filter _____.

a. provides a constant output up to
the cutoff frequency
8. The main features of a large-signal amplifier
POWER AMPLIFIERS is the circuit's ______.
a. power efficiency
1. Which of the following is (are) power b. maximum power limitations
amplifiers? c. impedance matching to the output
a. Class A device
b. Class B or AB d. All of the above
c. Class C or D
d. All of the above 9. This is an example of the output swing for a
class _____ amplifier.
2. By how much does the output signal vary
for a class AB power amplifier?
a. 360º
b. 180º
c. Between 180º and 360º
d. Less than 180º
3. Which type of power amplifier is biased for

operation at less than 180º of the cycle?
a. Class A
b. Class B or AB
c. Class C
d. Class D
a. A
b. B
4. Which type of amplifier uses pulse (digital)
c. AB
signals in its operation?
d. C
a. Class A
e. D
b. Class B or AB
c. Class C
10. This is an example of the output swing for a
d. Class D
class _____ amplifier.
5. Which of the power amplifiers has the
lowest overall efficiency?
a. Class A
b. Class B or AB
c. Class C
d. Class D
6. Which of the following describe(s) a power

amplifier?
a. It can handle large power.
b. It can handle large current.
c. It does not provide much voltage a. A
gain. b. B
d. All of the above c. AB
d. C
7. _____ amplifiers primarily provide sufficient e. D
power to an output load to drive a speaker
from a few watts to tens of watts. 11. Class AB operation is _____ operation.
a. Small-signal a. similar to class A
b. Power b. similar to class B
c. None of the above c. similar to class C
c. 50%
12. Which operation class is generally used in d. 78.5%
radio or communications?
a. A 19. The maximum efficiency of a transformer-
b. B coupled class A amplifier is _____.
c. AB a. 25%
d. C b. 50%
e. D c. 78.5%
d. 63.6%
13. Categorize the power efficiency of each
class of amplifier, from worst to best. 20. What is the maximum efficiency of a class B
a. A, B, AB, D circuit?
b. A, AB, D, B a. 90%
c. A, AB, B, D b. 78.5%
c. 50%
14. What is the maximum efficiency of a class A d. 25%
circuit with a direct or series-fed load
connection? 21. How many transistors must be used in a
a. 90% class B power amplifier to obtain the output
b. 78.5% for the full cycle of the signal?
c. 50% a. 0
d. 25% b. 1
c. 2
15. What is the ratio of the secondary voltage d. 3
to the primary voltage with the turn ratio in
the winding 22. In class B operation, at what fraction of
a. N2/N1 VCC should the level of VL(p) be to achieve
b. (N1/N2)2 the maximum power dissipated by the
c. (N1/N2)1/3 output transistor?
d. N1 × N2 a. 0.5
b. 0.636
16. Calculate the effective resistance seen c. 0.707
looking into the primary of a 20:1 d. 1
transformer connected to an 8- Ω load.
a. 3.2 kΩ 23. Class B operation is provided when the dc
b. 3.0 kΩ bias leaves the transistor biased just off, the
c. 2.8 kΩ transistor turning on when the ac signal is
d. 1.8 kΩ applied.
a. True
17. What transformer turns ratio is required to b. False
match an 8-speaker load so that the
effective load resistance seen at the 24. Calculate the efficiency of a class B amplifier
primary is 12.8 k? for a supply voltage of VCC = 20 V with peak
a. 20:1 output voltage of VL(p) = 18 V. Assume RL =
b. 40:1 16 Ω.
c. 50:1 a. 78.54%
d. 60:1 b. 75%
c. 70.69%
18. Calculate the efficiency of a transformer- d. 50%
coupled class A amplifier for a supply of 15
V and an output of V(p) = 10 V. 25. Which of the following is (are) the
a. 25% disadvantage(s) of a class B
b. 33.3% complementary-symmetry circuit?
a. It needs two separate voltage 32. Which of the power amplifiers is not
sources. intended primarily for large-signal or power
b. There is crossover distortion in the amplification?
output signal. a. Class A
c. It does not provide exact switching b. Class B or AB
of one transistor off and the other c. Class C
on at the zero-voltage condition. d. Class D
d. All of the above
33. Determine what maximum dissipation will
26. Which of the push-pull amplifiers is be allowed for a 70-W silicon transistor
presently the most popular form of the (rated at 25ºC) if derating is required above
class B power amplifier? 25ºC by a derating factor of 0.6 W/ºC at a
a. Quasi-complementary case temperature of 100º.
b. Transformer-coupled a. 25 W
c. Complementary-symmetry b. 30 W
d. None of the above c. 35 W
d. 40 W
27. nMOS and pMOS transistors can be used for
class B. 34. A silicon power transistor is operated with a
a. True heat sink (θSA = 1.5ºC/W). The transistor,
b. False rated at 150 W (25ºC), has θJC = 0.5º C/W,
and the mounting insulation has θCS = 0.6
28. Calculate the harmonic distortion ºC/W. What is the maximum power that
component for an output signal having can be dissipated if the ambient
fundamental amplitude of 3 V and a second temperature is 50ºC and TJmax = 200 ºC?
harmonic amplitude of 0.25 V. a. 61.5 W
a. 3.83% b. 60.0 W
b. 38.3% c. 57.7 W
c. 83.3% d. 55.5 W
d. 8.33%
35. Which of the following transistors has been
29. Which of the following instruments displays quite popular as the driver device for class
the harmonics of a distorted signal? D amplification?
a. Digital multimeter a. BJT
b. Spectrum analyzer b. FET
c. Oscilloscope c. c.UJT
d. Wave analyzer d. MOSFET
30. Which of the following instruments allows 36. Power amplifiers primarily provide
more precise measurement of the harmonic sufficient power to an output load, typically
components of a distorted signal? from _____ to _____.
a. Digital multimeter a. a few kW, tens of kW
b. Spectrum analyzer b. 500 W, 1 kW
c. Oscilloscope c. 100 W, 500 W
d. Wave analyzer d. a few W, tens of W
31. What is the maximum temperature rating 37. The main feature(s) of a large-signal
for silicon power transistors? amplifier is (are) the _____.
a. 50º to 80º a. circuit's power efficiency
b. 100º to 110º b. maximum amount of power that
c. 150º to 200º the circuit is capable of handling
d. 250º to 300º c. impedance matching to the output
d. All of the above
45. In a class A transformer-coupled power
38. In _____ power amplifiers, the output signal amplifier, _____ winding resistance of the
varies for a full 360º of the cycle. transformer determine(s) the dc load line
a. class A for the circuit.
b. class B or AB a. the ac
c. class C b. the dc
d. class D c. both the ac and dc
d. neither the ac nor dc
39. In class B power amplifiers, the output
signal varies for _____ of the cycle. 46. The slope of the ac load line in the class A
a. 360º transformer-coupled transistor is _____.
b. 180º a. –1/RL (load resistor)
2
c. between 180º and 360º b. 1/(a RL)
2
d. less than 180º c. –1/(a RL)
d. 1/RL
40. _____ amplifiers have the highest overall
efficiency. 47. The amount of power dissipated by the
a. Class A transistor is the _____ of that drawn from
b. Class B or AB the dc supply (set by the bias point) and the
c. Class C amount delivered to the ac load.
d. Class D a. product
b. difference
41. Class D operation can achieve power c. average
efficiency of over _____.
a. 90% 48. A class A amplifier dissipates _____ power
b. 78.5% when the load is drawing maximum power
c. 50% from the circuit.
d. 25% a. the least
b. about the same
42. The beta of a power transistor is generally c. the most
a. more than 200
b. 100 to 200 49. In a class A transformer-coupled amplifier,
c. less than 100 the _____ the value of VCEmax and the _____
d. 0 the value of VCEmin, the _____ the efficiency
to (from) the theoretical limit of 50%.
43. A form of class A amplifier having maximum a. larger, smaller, farther
efficiency of _____ uses a transformer to b. larger, smaller, closer
couple the output signal to the load. c. smaller, larger, closer
a. 90% d. None of the above
b. 78.5%
c. 50% 50. In class B operation, the current drawn from
d. 25% a single power supply has the form of _____
rectified signal.
44. The reflected impedance seen from one a. a full-wave
side of the transformer to the other side is b. a half-wave
_____. c. both a full-wave and a half-wave
a. N1/N2 d. None of the above
2
b. (N1/N2)
1/3
c. (N1/N2) 51. The highest efficiency is obtained in class B
d. N1× N2 operation when the level of VL(p) is equal to
_____.
a. 0.25VCC
b. 0.50VCC
c. VCC 58. The _____ has the hottest temperature in a
d. 2VCC power transistor.
a. heat sink
52. _____ transistors can be used to build a b. case
class B amplifier. c. junction
a. npn and pnp d. None of the above
b. nMOS and pMOS
c. Both npn and pnp or nMOS and 59. A heat sink provides _____ thermal
pMOS resistance between case and air.
d. None of the above a. a high
b. a low
53. The complementary Darlington-connected c. the same
transistor for a class B amplifier provides d. None of the above
_____ output current and _____ output
resistance. 60. A _____ power amplifier is limited to use at
a. higher, higher one fixed frequency.
b. higher, lower a. class A
c. lower, lower b. class B or AB
d. lower, higher c. class C
d. class D
54. The fundamental component is typically
_____ any harmonic component.
a. larger than
b. the same as
c. smaller than
55. In Fourier technique, any periodic distorted

waveform can be represented by _____ the
fundamental and all harmonic components.
a. multiplying
b. subtracting
c. dividing
d. adding
56. Improvement in production techniques of

power transistors have _____.
a. produced higher power ratings in
small-sized packaging cases
b. increased the maximum transistor
breakdown voltage
c. provided faster-switching power
transistors
d. All of the above
57. The greater the power handled by the

power transistor, _____ the case
temperature.
a. the higher
b. the lower
c. there is no change in
c. D to A converter
LINEAR DIGITAL ICs d. ladder network
1. Which of the following is not a linear/digital 7. A 339 IC is an example of a fourteen-pin DIP
IC? that can be made to function as a _____.
a. Phase-locked loop a. comparator
b. Voltage-controlled oscillator b. 555 timer
c. Passive filter c. D to A converter
d. Comparator d. ladder network
2. Which of the following circuits is (are) 8. What is the function of a ladder network?
linear/digital ICs? a. Changing an analog signal to a
a. Comparators digital signal
b. Timers b. Changing a linear signal to a digital
c. Voltage-controlled oscillators signal
d. All of the above c. Changing a digital signal to an
analog signal
3. Which of the following is (are) the results of d. None of the above
improvements built into a comparator IC?
a. Faster switching between the two 9. What is (are) the level(s) of the input
output levels voltage to a ladder-network conversion?
b. Noise immunity a. 0
c. Outputs capable of directly driving b. Vref
a variety of loads c. 0 V or Vref
d. All of the above d. None of the above
4. How many comparators does a 339 IC 10. What is the level of the output voltage of a
contain? ladder-network conversion?
a. 4 a. The analog output voltage
b. 3 proportional to the digital input
c. 2 voltage
d. 1 b. The digital output voltage
proportional to the linear input
5. This circuit is an example of a ______. voltage
c. A fixed digital value Vref
d. A fixed analog value Vref
11. What is the voltage resolution of an 8-stage

ladder network?
a. Vref /128
b. Vref /256
c. Vref /512
d. Vref /1024
a. comparator
b. 555 timer 12. Which of the slope intervals of the
c. D to A converter integrator does the counter in the analog-
d. ladder network to-digital converter (ADC) operate?
a. Positive
6. A 311 IC is an example of an eight-pin DIP b. Negative
that can be made to function as a _____. c. Both positive and negative
a. comparator d. Neither positive nor negative
b. 555 timer
13. What is the first phase of the dual-slope b. 102.3 ms
method of conversion? c. 10.24 ms
a. Connecting the analog voltage to d. 1.024 ms
the integrator for a fixed time
b. Setting the counter to zero 19. What is the minimum number of
c. Connecting the integrator to a conversions per second of a clock rate of 1
reference voltage MHz operating a 10-stage counter in an
d. All of the above ADC?
a. 1000
14. When is the counter set to zero in the dual- b. 976
slope method of conversion? c. 769
a. Prior to the charging of the d. 697
capacitor of the integrator
b. While the capacitor is being 20. On which of the following does the
charged conversion depend in ladder-network
c. At the end of the charging of the conversion?
capacitor a. Comparator
d. During the discharging of the b. Control logic
capacitor c. Digital counter
d. Clock
15. Which of the following devices is (are) a
component of a digital-to-analog converter 21. This circuit is an example of a _____.
(DAC)?
a. Integrator
b. Comparator
c. Digital counter
d. All of the above
16. At which of the following period(s) is the

counter advanced (incremented) in dual-
slope conversion? a. comparator
a. During the charging of the b. 555 timer
capacitor of the integrator c. D to A converter
b. During the discharging of the d. ladder network
capacitor of the integrator
c. During both the charging and 22. This figure is a block diagram of a(n) _____.
discharging of the capacitor of the
integrator
17. What is (are) the input(s) to the comparator

in the ladder-network conversion of an
ADC?
a. Staircase voltage
b. Analog input voltage a. ADC
c. Both staircase and analog input b. DAC
voltage c. comparator
d. None of the above d. 555 timer
18. What is the maximum conversion time of a 23. Calculate the frequency of this circuit.
clock rate of 1 MHz operating a 10-stage
counter in an ADC?
a. 1.024 s
a. 635 Hz a. Monostable multivibrator
b. 450 Hz b. Astable multivibrator
c. 228 Hz c. Bistable multivibrator
d. 128 Hz d. Free-running multivibrator
24. The 555 timer IC is made up of a 27. Which of the following best describes the
combination of linear comparators and output of a 566 voltage-controlled
digital flip-flops. oscillator?
a. True a. Square-wave
b. False b. Triangular-wave
c. Both square- and triangular-wave
25. Which application best describes this 555 d. None of the above
timer circuit?
28. Which of the following best describes
limitations for the 566 VCO?
a. 2 kΩ ≤ R1 ≤ 20 kΩ
+ +
b. 0.75 V ≤ Vc ≤
c. fo < 1 MHz
d. All of the above
29. Determine the free-running frequency for

this circuit.
a. Monostable multivibrator
b. Astable multivibrator
c. Bistable multivibrator
d. One-shot multivibrator
26. Which application best describes this 555

timer circuit?
a. 32.5 kHz
b. 53.33 kHz
c. 533.3 kHz
d. 5.3 MHz
a. 1070 Hz
30. Determine the free-running frequency b. 1270 Hz
when R3 is set to 2.5 kΩ. c. Both 1070 Hz and 1270 Hz
36. A comparator circuit accepts input of _____

voltages and provides a _____ output that
indicates when one input is less than or
greater than the second.
a. linear, digital
b. linear, linear
c. digital, linear
37. In a comparator, the reference voltage is

connected to _____ input terminal and the
input signal is applied to _____ input
terminal.
a. 19.7 kHz
a. only the minus, only the plus
b. 32.5 kHz
b. only the plus, only the minus
c. 116.39 kHz
c. either the plus or minus, the other
d. 212.9 kHz
31. The voltage-controlled oscillator is a subset
38. In a comparator, the level of the reference
of the "test bench" function generator. voltage must be _____.
a. True
a. negative
b. False
b. positive
c. zero
32. Which of the following applications include
d. All of the above
a phase-locked loop (PLL) circuit?
a. Modems
39. The 311 voltage comparator can operate
b. Am decoders from _____.
c. Tracking filters
a. dual power supplies of 15 V
d. All of the above
b. a single +5 V supply
c. either a dual power supply of 15 V
33. How many Vcc connections does the 565 or a single +5 V supply
PLL use?
a. 0
b. 1
40. When the input to the 311 voltage
c. 2
comparator is _____ value, the output is
d. 3
_____ if the inverting input is connected to
ground.
34. The timing components for a PLL are 15 kΩ a. any negative, low
and 220 pF. Calculate the free-running
b. any positive, low
frequency.
c. any positive, high
a. 90.91 kHz
b. 136.36 kHz
c. 156.1 kHz
41. In the operation of two 311 voltage
d. 181.8 kHz
comparators as the voltage window
detector, a high output indicates that the
35. Which of the following frequencies is
input is _____.
associated with the 565 frequency-shift
a. above the higher reference voltage
keyed decoder?
b. below the lower reference voltage
c. either above the higher reference 47. In astable operation of the 555 timer, the
voltage or below the lower external capacitor, C, is charged through
reference voltage external resistor(s) _____ and is discharged
d. within the high and the low through resistor(s) _____.
reference voltages
42. In the operation of two 311 voltage

comparators as the voltage window
detector, a low output indicates that the
input is _____.
a. above the higher reference voltage
b. below the lower reference voltage
c. either above the higher reference
voltage or below the lower
reference voltage
d. within the high and the low
reference voltages
43. In a ladder-network conversion, _____

ladder stages provide _____ voltage
resolution. a. RA, RA
a. more, greater b. RB, RA
b. more, smaller c. RA and RB, RB
c. fewer, greater d. RB, RA and RB
48. In astable operation of the 555 timer, the
44. In a ladder-network conversion, the _____ lower and upper peaks of the
circuit provides a signal to stop the counter charging/discharging external capacitor are
when the staircase voltage rises above the _____ to _____.
input voltage. a. –VCC, VCC
a. control logic b. –0.5 VCC, 0.5 VCC
b. comparator c. 1/3 VCC, 1/2 VCC
c. ladder-network d. 1/3 VCC, 2/3 VCC
49. Time periods for monostable operation of
45. The conversion resolution of an 8-stage the 555 timer can range from _____ to
counter operating an 8-stage ladder _____, making this IC useful for a range of
network using a reference voltage of 5 V is applications.
_____. a. picoseconds, nanoseconds
a. 0.0195 mV b. nanoseconds, milliseconds
b. 0.195 mV c. microseconds, many seconds
c. 1.95 mV d. None of the above
d. 19.5 mV
50. A voltage-controlled oscillator (VCO) is a
46. In a 555 timer, a series connection of three circuit that provides a _____ output signal.
resistors sets the reference voltage levels to a. zero
the two comparators at _____ and b. varying
__________. c. constant
a. 2VCC / 3, VCC / 3 d. None of the above
b. VCC / 2, VCC / 4
c. VCC, VCC / 2 51. The frequency of the 566 VCO is set by
d. VCC, VCC _____.
a. an external resistor
b. an external capacitor 58. For transistor transistor logic (TTL) circuits,
c. both an external resistor and an _____ is a mark and _____ is a space.
external capacitor a. 12 V, 0 V
d. None of the above b. 0 V, 12 V
c. 0 V, 5 V
52. A phase-locked loop (PLL) is an electronic d. 5 V, 0 V
circuit that consists of _____.
a. a phase detector 59. For the RS-232C circuit, _____ is a mark and
b. a low-pass filter _____ is a space.
c. a voltage-controlled oscillator a. 12 V, –12 V
d. All of the above b. –12 V, 12 V
c. 5 V, 0 V
53. When the loop is in lock in a PLL, the input d. –5 V, 0 V
frequency is _____ the output frequency
from the VCO. 60. Which of the following require(s)
a. the same as interfacing circuitry?
b. greater than a. Keyboards
c. smaller than b. Video terminals
d. None of the above c. Printers
d. All of the above
54. In the frequency-shift keyed (FSK) signal
decoder, the RC ladder filter is used to
_____.
a. remove the difference frequency
component
b. remove the sum frequency
component
c. remove both the difference and
the sum frequency components
55. The free-running frequency of a 565 FSK

decoder is adjusted with _____.
a. external capacitors
b. an external resistor
c. an external RC network
d. an internal clock
56. An input at a frequency of 1070 Hz will

drive the decoder output voltage to _____.
a. –5 V
b. 14 V
c. –5 V and 14 V
57. In interfacing circuitry, a receiver provides

_____ input impedance to minimize loading
of the input signal.
a. high
b. medium
c. low
d. zero
100, R1 = 15 kΩ, Ro = 20 kΩ, and a feedback
FEEDBACK AND OSCILLATOR of β = –0.25.
CIRCUITS a. 3.85
b. –3.85
1. Which of the following improvements is c. –9.09
(are) a result of the negative feedback in a d. 9.09
circuit?
a. Higher input impedance 8. Determine the input impedance with
b. Better stabilized voltage gain feedback for a voltage-series feedback
c. Improved frequency response having A = –100, R1 = 15 kΩ, Ro = 20 kΩ, and
d. All of the above a feedback of β = –0.25.
a. 110 kΩ
2. Which of the following improvements is b. 290 kΩ
(are) a result of the negative feedback in a c. 390 kΩ
circuit? d. 510 kΩ
a. Lower output impedance
b. Reduced noise 9. Determine the output impedance with
c. More linear operation feedback for a voltage-series feedback
d. All of the above having A = –100, R1 = 15 kΩ, Ro = 20 kΩ, and
a feedback of β = –0.25.
3. Which of the following is (are) feedback? a. 0.2 kΩ
a. Voltage-series b. 392.16 kΩ
b. Voltage-shunt c. 1.82 kΩ
c. Current-series d. 769.23 Ω
d. All of the above
10. An amplifier with a gain of –500 and a
4. What is the ratio of the input impedance feedback of β = –0.1 has a gain change of
with series feedback to that without 15% due to temperature. Calculate the
feedback? change in gain of the feedback amplifier.
a. 1 + βA a. 0.2%
b. βA b. 0.3%
c. β c. 0.4%
d. 1 d. 0.5%
5. What is the ratio of the output impedance 11. Referring to this figure, calculate the
with series feedback to that without amplification gain with feedback for the
feedback? following circuit values: R1 = 80 kΩ, R2 = 20
a. 1 kΩ, Ro = 10 kΩ, RD = 61 kΩ, and gm = 4000
b. 1 + βA μS.
c. βA
d. A
6. The frequency distortion arising because of

varying amplifier gain with frequency is
considerably reduced in a negative-voltage
feedback amplifier circuit.
a. True
b. False
7. Determine the voltage gain with feedback

for a voltage-series feedback having A = –
a. –4.36
b. –4.25
c. –6.35
d. –20.85
12. Referring to this figure, calculate the

amplification gain where the op-amp gain
(A) is 200,000, R1 = 1.5 kΩ, and R2 = 400 Ω.
a. –20.0
b. –21.5
c. –23.5
d. –25.5

voltage gain with the feedback for the
following circuit values: RD = 4 kΩ, RS = 1 kΩ,
a. 4.25 RF = 15 kΩ, and gm = 5000 μS.
b. 4.50
c. 4.75
d. 5.00

voltage gain with feedback Avf.
a. –11.2
b. –8.57
c. –6.75
d. –3.25
16. Which of the following is (are) the

determining factor(s) of the stability of a
feedback amplifier?
a. –4.85
a. A
b. –4.20
b. Phase shift between input and
c. –4.17
output signals
d. –4.00
c. Both A and the phase shift
between input and output signals
voltage gain without feedback for the
following circuit values: RD = 4 kΩ, RS = 1 kΩ,
17. At what phase shift is the magnitude of βA
RF = 15 kΩ, and gm = 5000 μS.
at its maximum in the Nyquist plot?
a. 90º
b. 180º
c. 270º
d. 0º
18. At what phase shift is the magnitude of βA
at its minimum in the Nyquist plot?
a. 90º
b. 180º
c. 270º
d. 0º
19. The Nyquist plot combines the two Bode

plots of gain versus frequency and phase
shift versus frequency on a single plot.
a. True
b. False
20. The amplifier is unstable if the Nyquist

curve plotted encloses (encircles) the –1 a. 8.05 kΩ
point, and it is stable otherwise. b. 8.48 kΩ
a. True c. 10.8 kΩ
b. False d. 12.3 kΩ
21. Which of the following is required for 25. In the IC phase-shift oscillator, what should
oscillation? the ratio of feedback resistor Rf to R1 be?
a. βA > 1 a. Zero
b. The phase shift around the b. Greater than –29
feedback network must be 180º. c. Less than 29
c. Both βA > 1 and the phase shift d. Any value
around the feedback network must
be 180º. 26. This circuit is a _____ oscillator.
22. An input signal is needed for an oscillator to

start.
a. True
b. False
23. Only the condition βA = _____ must be

satisfied for self-sustained oscillations to
result.
a. 0 a. phase-shift
b. –1 b. Wien bridge
c. 1 c. Colpitts
d. None of the above d. Hartley
24. Given gm = 5000 µS, rd = 40 kΩ, R = 10 kΩ, 27. For a phase-shift oscillator, the gain of the
and A = 35. Determine the value of RD for amplifier stage must be greater than _____.
oscillator operation at 1 kHz. a. 19
b. 29
c. 30
d. 1
28. In the Wien bridge oscillator, which of the

following is (are) frequency-determining
components?
a. R1 and R2
b. C1 and C2 a. 1.59 pF
c. R1, R2, C1, and C2 b. 15.9 pF
d. None of the above c. 159 pF
d. 1.59 nF
29. Calculate the resonant frequency of this
oscillator. 32. This circuit is a _____ oscillator.
a. 1560.34 Hz
b. 3120.70 Hz
c. 4681.07 Hz
d. 6241.37 Hz
a. phase-shift
b. Wien bridge
30. Calculate the resonant frequency of this
c. Colpitts
Wien bridge oscillator if R1 = 25 kΩ, R2 = 40
d. Hartley
kΩ, C1 = 0.001 µF, and C2 = 0.002 µF.
33. Which of the following oscillators is (are)
tuned oscillators?
a. Colpitts
b. Hartley
c. Crystal
d. All of the above
34. This circuit is a _____ oscillator.
a. 1560.3 Hz
b. 1779.4 Hz
c. 3120.7 Hz
d. 3558.8 Hz
31. Calculate the value of C1 = C2 for the Wien

bridge oscillator to operate at a frequency
of 20 kHz. Assume R1 = R2 = 50 kΩ and R3 =
3R4 = 600 Ω?
a. phase-shift
b. Wien bridge
c. Colpitts
d. Hartley
35. What is the typical value of quality factor

for crystal oscillators?
a. 20,000
b. 1000
c. 100
d. 10 b. higher, smaller
c. smaller, smaller
36. Negative feedback results in _____. d. higher, higher
a. decreased voltage gain
b. increased voltage gain 43. What is the gain at the origin of the Nyquist
c. oscillation in the circuit plot?
d. None of the above a. Zero
b. A negative value
37. Positive feedback results in _____. c. A positive value
a. decreased voltage gain d. Undefined
b. increased voltage gain
c. oscillation in the circuit 44. In a Nyquist plot, as the frequency
d. None of the above increases, the phase shift between input
and output signals _____.
38. Series-feedback connections tend to _____ a. remains the same
the input resistance. Shunt feedback b. decreases
connections tend to _____ the input c. increases
resistance. d. None of the above
a. decrease, increase
b. increase, decrease 45. An amplifier is stable if the absolute
c. increase, increase magnitude of βA is _____.
d. decrease, decrease a. ∞
b. less than 1
39. Voltage feedback connections tend to c. greater than 1
_____ the output impedance. Current d. None of the above
feedback connections tend to _____ the
output impedance. 46. In the Barkhausen criterion, the loop gain A
a. decrease, increase is equal to _____.
b. increase, decrease a. ∞
c. increase, increase b. 200,000
d. decrease, decrease c. 0
d. 1
40. With feedback, β, the overall gain of the
circuit is reduced by a factor _____ where A 47. In practice, A is made _____ and the system
is the gain without the feedback. is started oscillating by amplifying noise
a. β voltage, which is always present.
b. Aβ a. greater than 1
c. A b. smaller than 1
d. 1 + βA c. equal to 1
41. An amplifier with negative feedback has
_____ bandwidth than (as) the amplifier 48. In the phase-shift oscillator, the gain of the
without feedback. amplifier stage must be _____.
a. the same a. 0
b. less b. less than 29
c. more c. greater than 29
d. None of the above d. ∞
42. A feedback amplifier has a _____ upper 3- 49. In the phase-shift oscillator, the operating
dB frequency and a _____ lower 3-dB frequency is determined by _____.
frequency compared to an amplifier a. resistance only
without feedback. b. capacitance only
a. smaller, higher c. LC combinations
d. RC combinations
50. In the Wien bridge oscillator with R1 = R2 = R

and C1 = C2 = C, a ratio of R3 to R4 will
provide sufficient loop gain for the circuit to
oscillate.
a. inductors, capacitor
b. capacitors, inductor
c. capacitors, resistor
d. inductors, resistor
54. Crystal oscillators are used whenever a(n)

_____ level of stability is required.
a. lower
a. 0
b. 0.5 b. average
c. 1 c. greater
d. 2
51. In the Colpitts oscillator, the frequency is 55. Since the crystal losses represented by R are
determined by _____ . small, the equivalent crystal Q (quality
factor) is _____.
a. resistance only
a. very low
b. inductance only
c. capacitance only b. low
d. both inductance and a capacitance c. medium
d. high
52. In the Colpitts oscillator, the elements
X1 and X2 are _____ and X3 is a(n) _____. 56. The series-resonant impedance of a crystal
oscillator is _____.
a. very low
b. low
c. medium
d. very high
57. The parallel-resonant impedance of a

crystal oscillator is _____.
a. very low
b. low
a. inductors, capacitor c. medium
b. capacitors, inductor d. very high
c. capacitors, resistor
d. inductors, resistor 58. At the series-resonant frequency, the
amount of positive feedback is _____.
53. In a Hartley oscillator, the elements X 1 and a. very large
X2 are _____ and X3 is a(n) _____. b. large
c. small
d. very small
59. _____ is a frequency-determining

component in a unijunction oscillator.
a. Total resistance
b. Total capacitance
c. Intrinsic stand-off ratio
d. All of the above
60. Typically, a unijunction transistor has a

stand-off ratio from _____ to _____.
a. 0.0, 0.2
b. 0.2, 0.4
c. 0.4, 0.6
d. 0.6, 0.8
7. A _____ -wave rectified signal has less
POWER SUPPLIES (VOLTAGE ripple than a _____ -wave rectified signal
REGULATORS) and is thus better to apply to a filter.
a. full, half
1. In which of the following applications is a b. half, full
pulsating dc voltage suitable?
a. Battery charger 8. If the value of full-load voltage is the same
b. Radio as the no-load voltage, the voltage
c. Stereo system regulation calculated is _____ %, which is
d. Computer the best expected.
a. 0
2. Calculate the ripple of a filter output having b. 1
a 20-V dc component and a 1.7 Vr(rms) ac c. 99
component. d. 100
a. 6%
b. 8.5% 9. In which period is the capacitor filter
c. 85% charged in a full-wave rectifier?
d. 58% a. The time during the positive cycle
b. The time during which the diodes
3. Calculate the voltage regulation of a power are not conducting
supply having VNL = 50 V and VFL = 48 V. c. The time during which the diode(s)
a. 4.17% is (are) conducting
b. 5.2% d. The time during the negative cycle
c. 6.2%
d. 7.1% 10. In which period is the capacitor filter
discharged through the load in a full-wave
4. Across which of the following components rectifier?
of a power supply does the average (dc) a. The time during the positive cycle
voltage exist? b. The time during which the diodes
a. Diodes are not conducting
b. Secondary of the transformer c. The time during which the diode(s)
c. Capacitor filter is (are) conducting
d. None of the above d. The time during the negative cycle
5. Calculate the ripple voltage of a full-wave 11. If a peak rectified voltage for the full-wave
rectifier with a 75-µF filter capacitor filter circuit is 40 V, calculate the filter dc
connected to a load drawing 40 mA. voltage if C = 75 µF and load current is 40
a. 1.20 V mA.
b. 1.28 V a. 27.9 V
c. 1.32 V b. 32.12 V
d. 1.41 V c. 37.78 V
d. 40 V
6. What is the ratio of the period of the output
voltage to the period of the input voltage in 12. Calculate the ripple of a capacitor filter for a
a full-wave rectifier? peak rectified voltage of 40 V, a capacitor
a. 0 value C = 75 µF, and a load current of 40
b. 0.5 mA.
c. 1 a. 3.2%
d. 2 b. 3.59%
c. 4.03%
d. 4.59%
13. What is the ratio of the peak ripple voltage 19. For a full-wave rectifier with ac ripple at 120
level to its rms voltage level? Hz, the impedance of a capacitor can be
a. √3 calculated using XC = _____.
b. √2 a. 0.707 ÷ C
c. √3/2 b. 1.414 ÷ C
d. √2/2 c. 1.3 ÷ C
d. 0.785 ÷ C
14. The larger the value of the capacitor, the
smaller the peak current drawn through the 20. In a simple series regulator circuit, which of
rectifying diodes. the following components is the controlling
a. True element?
b. False a. Load resistor
b. Zener diode
15. What is the purpose of an additional RC c. Transistor Q1
filter section in a power supply circuit? d. None of the above
a. Increase the dc voltage component
b. Increase the ac voltage component 21. In this improved series regulator circuit,
c. Decrease the ac voltage which of the following components is the
component sampling circuit?
16. Calculate the dc voltage across a 2-kΩ load

for an RC filter section (R = 50 Ω, C = 20 µF).
The dc voltage across the initial filter
capacitor is Vdc = 50 V.
a. 40.78 V
b. 42.78 V
c. 45.78 V
d. 48.78 V
17. The purpose of the added RC section is to a. Zener diode

pass most of the dc component while b. Load resistor
reducing as much of the ac component as c. Either of the two transistors Q1 or
possible. Q2
a. True d. Resistors R1 and R2
b. False
22. In this op-amp series regulator circuit,
18. This circuit is an example of the ac which of the following components is the
equivalent of an RC filter. comparator circuit?
a. True a. Op-amp
b. False b. Transistor Q1
c. R1 and R2 resistors
d. Zener diode d. None of the above
23. What regulated output voltage is provided 28. What is the typical dropout voltage for the
for the following circuit elements: R1 = 15 7812 fixed positive voltage regulator?
kΩ, R2 = 35 kΩ, and VZ = 11.2 V? a. 4 mV
b. 100 mV
c. 1.5 V
d. 2 V
29. How many diodes conduct in the full-wave

bridge rectifier while the capacitor is being
charged?
a. 1
b. 2
c. 3
a. 16.50 V d. 4
b. 17 V
c. 17.35 V 30. What is the range of the voltage level of the
d. 18.25 V LM317 adjusted voltage regulator?
a. 0 V to 5 V
24. Which component(s) set(s) the voltage b. 1.2 V to 37 V
across the load in a basic transistor shunt c. –5 V to –24 V
regulator? d. 5 V to 24 V
a. Zener diode
b. Transistor base-emitter voltage 31. What are the typical values of Vref and
c. Both the Zener diode and the Iadj for the LM317 adjustable voltage
transistor base-emitter voltage regulator?
d. None of the above a. V, 100 mA
b. 1.5 V, 100 mA
25. In an improved shunt regulator, which of c. 1.25 V, 100 μA
the following components sets the d. 1.25 V, 10 mA
reference voltage?
a. Transistor Q1 32. The 7812 regulator IC provides _____.
b. Zener diode a. 5 V
c. Transistor Q2 b. –5 V
d. RS c. 12 V
d. –12 V
26. For what range of load current can voltage
regulators be selected for operation? 33. The 7912 regulator IC provides _____ .
a. Hundreds of picoamperes to tens a. 5 V
of nanoamperes b. –5 V
b. Hundreds of picoamperes to tens c. 12 V
of milliamperes d. –12 V
c. Hundreds of milliamperes to tens
of amperes 34. The 7905 regulator IC provides _____.
d. None of the above a. 5 V
b. –5 V
27. For what range of fixed regulated voltages c. 12 V
do the series 78xx regulators provide d. –12 V
regulation?
a. –5 V to +24 V 35. The 7805 regulator IC provides _____.
b. +5 V to +24 V a. 5 V
c. –5 V to –24 V b. –5 V
c. 12 V
d. –12 V 43. If the value of the full-load voltage is the
same as the no-load voltage, the voltage
36. A complete power supply has a _____. regulation calculated is _____.
a. rectifier a. 0%
b. filter b. a negative percentage
c. voltage regulator c. a positive percentage
d. All of the above d. None of the above
37. The output resulting from a rectifier is a(n) 44. In a half-wave rectifier, the dc voltage level
_____. is _____ the ripple voltage level.
a. ac voltage a. smaller than
b. pure dc voltage b. the same as
c. pulsating dc voltage c. larger than
d. None of the above d. None of the above
38. The _____ the ac variation with respect to 45. In a full-wave rectifier, the dc voltage level
the dc level, the _____ the filter circuit's is _____ the ripple voltage level.
operation. a. smaller than
a. smaller, better b. the same as
b. larger, better c. larger than
c. smaller, worse d. None of the above
46. In a full-wave rectifier, if no load were
39. A dc voltmeter reads the _____ while connected across the capacitor, the output
measuring a pulsating dc voltage. voltage would ideally be a(n) _____.
a. ac component of the signal a. ac voltage
b. average of the signal b. constant dc voltage
c. peak of the pulsating signal c. pulsating dc voltage
d. None of the above d. ramp voltage
40. The filter output voltage of a power supply 47. The output of a loaded power supply is
_____ when load current is drawn from the _____ that of the unloaded.
supply. a. the same as
a. remains the same b. larger than
b. is increased c. smaller than
c. is reduced d. None of the above
48. The charging and discharging of the
41. The _____ the voltage regulation, the _____ capacitor filter take _____ of the period of
the operation of the voltage supply circuit. the input voltage.
a. smaller, better a. 0.25
b. larger, better b. 0.5
c. smaller, worse c. 0.75
d. None of the above d. 1
42. A full-wave rectified signal has _____ dc 49. The frequency of the output voltage of a
component and _____ ripple than (as) the full-wave rectifier is _____ the frequency of
half-wave rectified voltage. its input voltage.
a. a larger, more a. the same as
b. a smaller, less b. twice
c. the same, less c. one-half
d. a larger, less d. one-third
a. reference source
50. The ripple voltage Vr is a result of the b. comparator amplifier
_____. c. control device and overload
a. conduction of the diode(s) protection
b. transformer windings d. All of the above
c. charging and discharging of the
capacitor 57. IC units provide regulation of _____.
d. load resistor a. a fixed positive voltage
b. a fixed negative voltage
51. The _____ values of capacitor filter provide c. an adjustably set voltage
_____ ripple and _____ average voltage. d. All of the above
a. larger, more, higher
b. smaller, less, lower 58. The specification sheet for the 7812 fixed
c. smaller, more, higher positive voltage regulator shows that the
d. larger, less, higher output voltage could be as low as _____ or
as high as _____.
52. The _____ the diode conduction time, the a. 11.5 V, 12.5 V
_____ the amount of the charging current b. 11.2 V, 12.2 V
through the capacitor filter. c. 11 V, 13 V
a. shorter, larger d. 8 V, 15 V
b. shorter, smaller
c. longer, larger 59. The series 7900 ICs are _____.
d. None of the above a. positive voltage regulators
b. negative voltage regulators
53. In a current-limiting circuit, _____ c. both positive and negative voltage
provide(s) the limiting of the maximum load regulators
current. d. adjustable-set voltage regulators
a. the Zener diode
b. the short-circuit resistor Rsc 60. The _____ is (are) an adjustable voltage
c. the transistor Q1 regulator.
d. both the short-circuit resistor a. series 7800 ICs
Rsc and transistor Q2 b. series 7900 ICs
c. LM317
54. In a foldback configuration, limiting the d. None of the above
current reduces _____, protecting the load
from overcurrent as well as protecting the
regulator.
a. the output voltage
b. the output current
c. both the output voltage and
output current
55. A type of regulator circuit that is quite

popular for its efficient transfer of power to
the load is the _____.
a. current-limiting voltage regulator
b. switching regulator
c. foldback limiting regulator
d. op-amp series regulator
56. Regulator IC units contain the circuitry for

the _____.
d. 1 MHz
OTHER TWO TERMINAL DEVICES
8. This is an approximate equivalent circuit for
1. Which of the following is (are) diodes? the _____ diode.
a. Schottky
b. Varactor
c. Tunnel
d. All of the above
2. Which of the following metals is (are) used

in the fabrication of Schottky diodes?
a. Molybdenum a. Schottky
b. Platinum b. varicap
c. Tungsten c. tunnel
d. All of the above
9. What is the range of the varying capacitor
3. What are the typical ranges of reverse-bias CT in varactor diodes?
current levels IS for low-power and high- a. 0 pF to 5 pF
power Schottky diodes at room b. 2 pF to 100 µF
temperature? c. 2 µF to 100 µF
a. Picoamperes, nanoamperes d. 2 pF to 100 pF
b. Nanoamperes, microamperes
c. Microamperes, milliamperes 10. Which of the following areas is (are)
d. Milliamperes, amperes applications of varactor diodes?
a. FM modulators
4. What is the voltage drop across Schottky b. Automatic-frequency control
diodes? devices
a. 0 V to 0.2 V c. Adjustable bandpass filters
b. 0.7 V to 0.8 V d. All of the above
c. 0.8 V to 1.0 V
d. 1.0 V to 1.5 V 11. The tuning diode is a _____-dependent,
variable _____.
5. What metal(s) is(are) used in the a. voltage, resistor
construction of Schottky diodes? b. current, capacitor
a. Molybdenum c. voltage, capacitor
b. Platinum d. current, inductor
c. Tungsten
d. Silicon 12. This is an equivalent circuit for the _____
e. Any of the above diode.
6. For a 50-A unit, the PIV of the Schottky is

about _____ compared to 150 V for the p-n
junction variety.
a. 25
b. 50
c. 75 a. Schottky
d. 100 b. varicap
c. tunnel
7. Schottky diodes are very effective at
frequencies approaching _____. 13. The varicap diode has a transition
a. 20 GHz capacitance sensitive to the applied
b. 10 MHz reverse-bias potential that is a maximum at
c. 100 MHz
zero volts and decreases _____ with c. A few microamperes to several
increasing reverse-bias potentials. milliamperes
a. logarithmically d. A few microamperes to several
b. parabolically hundred microamperes
c. exponentially
21. What is the maximum peak voltage for
14. The majority of power diodes are tunnel diodes?
constructed using _____. a. 50 mV
a. molybdenum b. 100 mV
b. platinum c. 250 mV
c. tungsten d. 600 mV
d. silicon
22. In which region is the operating point
15. The current capability of power diodes can stable in tunnel diodes?
be increased by placing two or more in a. Negative-resistance
series. b. Positive-resistance
a. True c. Both negative- and positive-
b. False resistance
d. Neither negative- nor positive-
16. The PIV rating of power diodes can be resistance
increased by stacking the diodes in series.
a. True 23. Which of the following diodes is limited to
b. False the reverse-bias region in its region of
operation?
17. Which of the following diodes has a a. Schottky
negative-resistance region? b. Tunnel
a. Schottky c. Photodiode
b. Varactor d. Rectifier
c. Tunnel
d. Power 24. What is the response time of cadmium
sulfide (CdS) in photoconductive cells?
18. Which of the following semiconductor a. 100 ms
materials is (are) used in the manufacturing b. 50 ms
of tunnel diodes? c. 25 ms
a. Germanium d. 10 ms
b. Gallium
c. Both germanium and gallium 25. Which of the following areas is (are) an
arsenide application of infrared-emitting diodes?
d. Silicon a. Intrusion alarms
b. Shaft encoders
19. What is the ratio IP / IV for gallium arsenide? c. Paper-tape readers
a. 1:1 d. All of the above
b. 5:1
c. 10:1 26. What is the maximum temperature limit for
d. 20:1 liquid-crystal displays (LCDs)?
a. 10ºC
20. What is the limit of peak current IP in b. 30ºC
tunnel diodes? c. 60ºC
a. A few microamperes to several d. 100ºC
hundred amperes
b. A few microamperes to several 27. What is the response time of light-emitting
amperes diodes (LEDs)?
a. Less than 100 ns
b. 50 ms
c. 100 ms to 300 ms 35. What is the typical level of change in
d. 400 ms resistance per degree change in
temperature?
28. What is the response time of LCDs? a. 1% to 2%
a. Less than 100 ns b. 3% to 5%
b. 50 ms c. 7% to 10%
c. 100 ms to 300 ms d. 10% to 25%
d. 400 ms
36. Schottky diodes have _____.
29. What is the power density received from a. quick response time
the sun at sea level? b. a lower noise figure
2
a. 10 mW/cm c. both quick response time and a
2
b. 100 mW/cm lower noise figure
2
c. 500 mW/cm d. None of the above
2
d. 1 W/cm
37. Schottky diode construction results in a
30. Which of the following semiconductor _____ uniform junction region and a _____
materials is (are) used for manufacturing level of ruggedness.
solar cells? a. more, high
a. Gallium arsenide b. less, high
b. Indium arsenide c. more, low
c. Cadmium sulfide d. less, low
d. All of the above
38. In both n-type and p-type silicon materials,
31. What type of temperature coefficient do the _____ is the majority carrier in a
thermistors have? Schottky diode.
a. Positive a. hole
b. Negative b. electron
c. Either positive or negative c. proton
d. None of the above d. neutron
32. Which of the following materials is (are) 39. The barrier at the junction for a Schottky
used in the manufacturing of thermistors? diode is _____ that of the p-n junction
a. Ge device in both the forward- and reverse-
b. Si bias regions.
c. A mixture of oxides of cobalt, a. the same as
nickel, strontium, or manganese b. more than
d. All of the above c. less than
33. What is the resistance of thermistors at
room temperature (20ºC)? 40. A Schottky diode has _____ level of current
a. 5 kΩ at the same applied bias compared to that
b. 1 kΩ of the p-n junction at both the forward- and
c. 100 Ω reverse-bias regions.
d. 1 Ω a. a lower
b. a higher
34. What is the resistance of thermistors at c. the same
boiling temperature (100ºC)? d. None of the above
a. 5 kΩ
b. 1 kΩ 41. The PIV of Schottky diodes is usually _____
c. 100 Ω that of a comparable p-n junction unit.
d. 1 Ω a. 1/2
b. 1/3 48. In the negative-resistance region of tunnel
c. 1/4 diodes, as the terminal voltage increases,
d. 1/5 the diode current _____.
a. remains the same
42. Varactor diodes are _____. b. decreases
a. semiconductor devices c. increases
b. voltage-dependent d. is undefined
c. variable capacitors
d. All of the above 49. The p-n junction of a tunnel diode is doped
at a level from _____ to _____ times that of
43. In varactor diodes, as the reverse-bias a typical semiconductor diode.
potential increases, the width of the a. one, several
depletion region _____, which in turn _____ b. several, ten
the transition capacitance. c. more than ten, several hundred
a. increases, increases d. one hundred, several thousand
b. decreases, reduces
c. increases, reduces 50. The negative-resistance region of tunnel
d. decreases, increases diodes can be used in the design of _____.
a. oscillators
44. The normal range of reverse-bias voltage b. switching networks
VR for varactor diodes is limited to about c. pulse generators
_____. d. All of the above
a. 15 V
b. 20 V 51. The wavelength is usually measured in
c. 25 V _____.
d. 40 V a. angstrom units
b. micrometers
45. In the reverse-bias region of varactor c. both angstrom units and
diodes, the resistance RR in parallel with the micrometers
varying capacitor is _____ and the series d. None of the above
resistance RS is _____.
a. very large, very small 52. In photodiodes, an increase in light intensity
b. very large, very large _____ the reverse current.
c. very small, very large a. increases
d. very small, very small b. decreases
c. maintains
46. The majority of power diodes are d. None of the above
constructed using silicon because of its
higher _____ rating(s). 53. Ge has a _____ dark current and a _____
a. current level of reverse current than silicon.
b. temperature a. higher, lower
c. PIV b. higher, higher
d. All of the above c. lower, higher
d. lower, lower
47. The current capability of power diodes can
be increased by placing two or more of the 54. The response time for cadmium selenide
diodes in _____, and the PIV rating can be (CdSe) is _____.
increased by stacking the diodes in _____. a. 100 ms
a. parallel, parallel b. 50 ms
b. series, parallel c. 25 ms
c. parallel, series d. 10 ms
d. series, series
55. A decrease in illumination _____ the
resistance Rλ of a photoconductive cell.
a. decreases
b. increases
c. maintains
56. LCDs have _____ power requirement than

(as) LEDs.
a. a lower
b. a higher
c. the same
57. LCDs are characteristically _____ LEDs.

a. the same speed as
b. much slower than
c. faster than
d. much faster than
58. _____ is (are) the most widely used

material(s) for solar cells.
a. Selenium
b. Silicon
c. Both selenium and silicon
d. Cadmium sulfide
59. In general, silicon _____.

a. has a higher conversion efficiency
b. has greater stability
c. is less subject to fatigue
d. All of the above
60. Typical levels of efficiency for solar cells

range from _____ to _____.
a. 10%, 40%
b. 40%, 50%
c. 50%, 75%
d. 75%, 100%
d. 100 kΩ or more
PNPN & OTHER DEVICES
8. Which of the following transistors is an SCR
1. How many layers of semiconductor composed of?
materials does a silicon-controlled rectifier a. npn, pnp
(SCR) have? b. npn, npn
a. 2 c. pnp, pnp
b. 3 d. None of the above
c. 4
d. 5 9. Which of the transistors of an SCR are
conducting when the SCR is fired and is in
2. Which of the following devices has (have) the conduction mode?
four layers of semiconductor materials? a. npn
a. Silicon-controlled switch (SCS) b. pnp
b. Gate turn-off switch (GTO) c. Both npn and pnp
c. Light-activated silicon-controlled d. Neither npn nor pnp
rectifier (LASCR)
d. All of the above 10. What is the range of the turn-on times in
high-power SCR devices?
3. A thyristor is a _____-layer semiconductor a. 30 µs to 100 µs
material device. b. 10 µs to 25 µs
a. 2 c. 5 µs to 8 µs
b. 3 d. 1 µs to 5 µs
c. 4
d. 5 11. What is the typical range of turn-off times
for SCRs?
4. Which of the following devices is a. 5 µs to 30 µs
unquestionably of the greatest interest b. 1 µs to 5 µs
today? c. 0.1 µs to 1 µs
a. SCR d. 0.01 µs to 0.1 µs
b. GTO
c. LASCR 12. This symbol is an example of a(n) _____.
d. SCS
5. What is the frequency range of application

of SCRs?
a. About 10 kHz
b. About 50 kHz
a. SCR
c. About 250 kHz
b. SCS
d. About 1 MHz
c. GTO
d. DIAC
6. Which one of the SCR terminals fires the
SCR?
13. Which of the following parameters are
a. Anode
usually provided by the manufacturer on
b. Cathode
the specification sheet for SCRs?
c. Gate
a. Turn-on time (ton )
d. All of the above
b. Turn-off time (toff )
c. Junction and case temperatures
7. What is the typical value of the reverse
(tj and tc )
resistance of SCRs?
d. All of the above
a. 1 Ω to 10 Ω
b. 100 Ω to 1 kΩ
14. How many terminals does a silicon-
c. 1 k Ω to 50 kΩ
controlled switch (SCS) device have?
a. 2 21. Which of the following devices has the
b. 3 smallest turn-off time?
c. 4 a. SCR
d. 5 b. GTO
c. SCS
15. What is the typical value of the triggering d. LASCR
anode gate for SCS devices?
a. 1.5 mA 22. Which of the following devices has nearly
b. 150 A the same turn-on time as turn-off time?
c. 15 A a. SCR
d. 1 A b. GTO
c. SCS
16. Which of the following is (are) the d. LASCR
advantages of the SCS over a corresponding
SCR? 23. This symbol is an example of a(n) _____.
a. Reduced turn-off time a. SCR
b. Increased control and triggering b. SCS
sensitivity c. GTO
c. More predictable firing situation d. diac
d. All of the above
24. What is the maximum current (rms) rating
17. Which of the following areas is (are) for commercially available LASCRs today?
applications of an SCS? a. 3 A
a. Counters b. 15 A
b. Pulse generators c. 20 A
c. Voltage sensors d. 25 A
d. All of the above
25. How many terminals does a Shockley diode
18. This symbol is an example of a(n)_____. have?
a. 5
b. 4
c. 3
d. 2
26. This symbol is an example of a(n) _____.
a. SCR
b. SCS
c. GTO
d. DIAC
19. For an SCS, a _____ pulse at the anode gate

turns the device on, while a _____ pulse will a. SCR
turn it off. b. SCS
a. negative, positive c. GTO
b. positive, negative d. DIAC
20. An advantage of the SCR over the SCS is the 27. Which of the following devices does not
reduced turn-off time. have a cathode terminal?
a. True a. SCR
b. False b. SCS
c. Triac
d. Shockley diode 33. How many terminals does a programmable
unijunction transistor (PUT) have?
28. Today, the SCR is more widely used than a. 4
the TRIAC. b. 3
a. True c. 2
b. False d. 1
29. Which of the following devices has a 34. Determine RB1 for a silicon PUT if it is
negative-resistance region in its determined that h = 0.84, VP = 11.2 V, and
characteristics curve? RB2 = 5 kΩ.
a. SCR a. 12.65 kΩ
b. SCS b. 16.25 kΩ
c. Unijunction transistor c. 20.00 kΩ
d. Phototransistor d. 26.25 kΩ
30. What is the range of the variable resistor in 35. The two-layer semiconductor diode has led
the equivalent circuit of a unijunction to _____layer devices.
transistor? a. three-
a. 50 Ω to 5 kΩ b. four-
b. 6 kΩ to 10 kΩ c. five-
c. 5 Ω to 50 Ω d. All of the above
d. 1 Ω to 5 Ω
36. The four-layer devices with a control
31. This is an example of a high-isolation _____ mechanism are commonly referred to as
gate. _____.
a. thyristors
b. transistors
c. diodes
37. _____ are areas of application for SCRs.

a. Relay controls
b. Time-delay circuits
c. Motor controls
d. All of the above
38. SCRs have been designed to control powers

as high as _____, with individual ratings as
high as _____ at _____.
a. 1800 MW, 10 A, 2000 V
a. OR
b. 1800 MW, 2000 A, 10 V
b. NOT
c. 10 MW, 2000 A, 1800 V
c. AND
d. 2000 MW, 10 A, 1800 V
d. NAND
39. The _____ are the terminals of SCRs.
32. The ISO-LIT Q1 16-pin Litronix opto-isolator
a. anode and cathode
DIP contains _____ opto-isolators.
b. anode, gate, and cathode
a. 4
c. base, anode, and cathode
b. 8
d. gate and anode
c. 12
d. 6
40. In the conduction region, the dynamic
resistance of the SCR is typically _____ to
_____.
a. 0.01 Ω, 0.1 Ω
b. 1 Ω, 10 Ω 47. The anode gate connection can be used to
c. 50 Ω, 100 Ω turn the SCS device _____.
d. 500 Ω, 10 kΩ a. on
b. off
41. The SCRs have typical turn-on times of c. neither on nor off
_____ in the regeneration action. d. either on or off
a. 0.1 μs to 1 μs
b. 0.1 ms to 1 ms 48. To turn on an SCS device, a _____ pulse
c. 3 ms to 5 ms must be applied to the anode gate terminal;
d. 5 ms to 9 ms to turn off the device, a _____ pulse is
required.
42. The method(s) for turning off an SCR is (are) a. positive, positive
categorized as _____. b. negative, positive
a. current interruption c. positive, negative
b. forced commutation d. negative, negative
c. both current interruption and
forced commutation 49. In general, the triggering (turn-on) anode
d. None of the above gate current is _____ the required cathode
gate current.
43. At –65ºC the minimum current that will a. larger than
trigger the series of an SCR is _____, while b. the same as
at +150ºC only _____ is required. c. smaller than
a. 20 mA, 100 mA d. None of the above
b. 50 mA, 75 mA
c. 75 mA, 50 mA 50. A(n) _____ can be triggered in either
d. 100 mA, 20 mA direction.
a. SCR
44. In a half-wave variable-resistance phase b. Shockley diode
control operation, the control cannot be c. diac
extended past a ______ phase d. SCS
displacement.
a. 45º 51. _____ is (are) the element(s) of a
b. 90º unijunction transistor's equivalent circuit.
c. 135º a. One fixed resistor
d. 180º b. A variable resistor
c. A diode
45. The _____ are the terminals of an SCS. d. All of the above
a. anode, anode gate, cathode gate,
and cathode 52. The current induced by photoelectric
b. anode, cathode, cathode gate, and effects is the _____ current of the
gate transistor.
c. anode, anode gate, cathode, and a. collector
gate b. base
d. anode, cathode, and gate c. emitter
46. The _____ the anode gate current, the
_____ the required anode-to-cathode 53. _____ in light intensity corresponds with
voltage to turn the SCS device on. _____ in collector current.
a. higher, higher a. An increase, an increase
b. lower, lower b. An increase, a decrease
c. higher, lower c. A decrease, an increase
d. None of the above d. None of the above
54. _____ is(are) example(s) of applications of
phototransistors.
a. Punch-card readers
b. Lighting control (for example, on
highways)
c. Level indication
d. All of the above
55. An opto-isolator contains _____.

a. an infrared LED
b. a photodetector
c. both an infrared LED and a
photodetector
56. The switching time of an opto-isolator

_____ with increased current, while for
many devices it is exactly the reverse.
a. increases
b. decreases
c. remains the same
57. In a programmable unijunction transistor

(PUT), the _____ can be controlled through
a couple of resistors and the supply voltage.
a. interbase resistance RBB
b. intrinsic stand-off ratio
c. emitter firing potential VP
d. All of the above
58. The peak and valley currents of the PUT are

typically _____ those of a similarly rated
UJT.
a. lower than
b. the same as
c. higher than
59. The minimum operating voltage of the UJT

is typically _____ that of a similarly rated
PUT.
a. lower than
b. the same as
c. higher than

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b.

59. Generally the value of ac resistance is _____

60. The reverse-bias current _____ with the

6. Determine the value of the load resistor.

2. In a particular problem, which mode has the

4. Determine the current level if E = 15 V and a. 0 mA

9. A diode is in the "_____" state if the current

10. An open circuit can have any voltage across

11. A short circuit has a _____ drop across its

19. What best describes the circuit?

a. Positive logic AND gate

22. What best describes the circuit?

26. What best describes the circuit?

23. List the categories of clippers.

28. Calculate IL and IZ.

25. Determine the peak for both half cycles of

37. The slope of the load line depends on the

39. The quiescent point (Q-point) is defined by

60. In this voltage multiplier, measuring from

15. What is βdc equal to?

16. What are the ranges of the ac input and

17. For what kind of amplifications can the a. 100

21. Determine the value of α when β = 100.

22. What is the most frequently encountered

24. βdc = ________

25. What is (are) the component(s) of most

55. The level of _____ is determined and

4. Calculate the approximate value of the

5. The cutoff region is defined by IB _____ 0 A.

7. For the BJT to operate in the active (linear)

13. It is desirable to design a bias circuit that is

14. Calculate the voltage across the 91 kΩ

17. Calculate VCE.

15. Calculate the value of VCEQ. a. 4.52 V

18. Calculate VCE.

19. Which of the following is (are) related to an

20. Determine the values of VCB and IB for this a. 49.2 Ω

23. You can select the values for the emitter

21. Calculate ETh for this network.

31. In a fixed-bias circuit, which one of the

32. In a voltage-divider circuit, which one of the

27. The total time required for the transistor to a. 140.34 nA

29. For the typical transistor amplifier in the

41. In a fixed-bias circuit, the magnitude of IC is

68. The dc load line and ac load line both have

69. The _____ the level of RL, the _____ the

70. The _____ the source resistance, the _____

71. The ac voltage gain of a Darlington

72. The feedback pair uses a(n) _____ transistor

73. In an unbypassed emitter-bias configuration

4. Which of the following transistor(s) has

5. A BJT is a _____-controlled device. The JFET

15. The region to the left of the pinch-off locus

21. Which of the following ratings appear(s) in

22. Refer to this portion of a specification

18. Referring to this transfer curve, determine

27. Refer to the following curves. Calculate ID at

a. 25 Vdc, –200 nAdc

23. Hand-held instruments are available to

26. Referring to the following transfer curve,

30. The transfer curve is not defined by

38. One of the most important characteristics

39. The _____ transistor has become one of the

56. _____ has high input impedance, fast

69. The _ the level of RL, the _ the

70. The _ the source resistance, the _

41. The _ controls the _ of an FET.