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Computer & Network Technology

Machine Instruction - Exercises

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Exercise - 1
Consider the following high level language instruction:

c=a+b
▪ This is an assignment statement in a high level language
▪ a, b, and c are variables ( named memory cells )
▪ This requires contents of a and b to be added
▪ Then the result to be assigned ( stored ) memory location c.
▪ Let’s write the machine instructions for 4 different types of CPUs
based in ISA architecture

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Exercise – 1 (for Accumulator based CPU)

Important to Note
Load a Load a into accumulator
▪ CPU has only a single
Add b Add b into accumulator
general purpose register
Store c Store accumulator in c called the accumulator

▪ Most instructions are single


operand instructions

▪ Other operand is implied as


the accumulator

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Exercise – 1 (for Stack based CPU)
Important to Note
Load a a is pushed into stack
▪ General Purpose registers
Load b b is also pushed into stack
are implemented as a stack
Pop top 2 cells, add, push ▪ Load is Push operation,
Add result back to stack
Store is Pop operation.
Store c Pop stack and store in c ▪ Arithmetic operations are
zero operand instructions.
(As all operands implied to
be on the stack)

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Exercise – 1 (for Register-Memory based CPU)

Important to Note
Load r1, a Load a into register r1

Add r1 and b and ▪ CPU has number of General


Add r2, r1, b store on register r2 purpose registers

Store r2, c Store r2 on location c ▪ Arithmetic instructions can


refer to memory operands

▪ Arithmetic instructions are 3


operand instructions

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Exercise – 1 (for Register-Register based CPU)

Important to Note
Load r1, a Load a into register r1
▪ CPU has Larger General
Load r2, b Load b into register r2
purpose register set
Add r1 and r2 and
Add r3, r1, r2 store on register r3
▪ Arithmetic instructions can
refer to register operands
Store r3, c Store r3 on location c only

▪ Memory access is limited to


Load / Store instructions

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Exercise - 2
Consider the following high level language code:

sum = 0
For i = 1 to 10
sum = sum + A[i]

▪ Assuming the array A is a 10 element 4 byte integer array located at


address 1000
▪ This uses a for loop to iterate and add all elements of A into sum
▪ Finally sum to be stored at location 2000

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Exercise – 3 (for Register-Register based CPU)
MOV R1, #0 ; accumulate the sum in R1, initially 0

MOV R2, #0 ; R2 is the offset(index) initially 0

MOV R3, #10 ; R3 is used for loop control, initialized to 10

Loop : LD R4, 1000(R2) ; Load the current element of array A to R4

ADD R1, R1, R4 ; Add the R4(current element) to R1(sum)

ADDI R2, R2, #4 ; Increment offset by 4

SUBI R3, R3, #1 ; Decrement 1 from loop control

BNZ R3, Loop ; Branch to Loop if R3 is not 0

ST 2000, R1 ; Store R1(sum) at memory location 2000

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Exercise - 3
Consider the following scenario:

▪ We have two one-dimensional arrays of 1024 words each, A and B.


▪ Assume that each word is 4 bytes.
▪ We wish to compute A(i) MUL B(i) for all the pairs.
▪ And then sum these 1024 products to get inner product.
▪ Finally this inner product must be stored in location 4000.

Inner Product = εA[i]xB[i]

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Exercise – 3 (for Register-Memory based CPU)
MOV R1, #0 ; accumulate the inner product in R1, initially 0

MOV R2, #0 ; R2 is the offset(index) initially 0

MOV R3, #4096 ; R3 is set to the highest offset value for arrays

Loop : LD R4, A(R2) ; Load the current element of array A to R4

MUL R4, B(R2) ; Multiply R4 by the current element of array B

ADD R1, R4 ; Add current product into R1(inner product)

ADDI R2, #4 ; Increment index by 4

BNEQ R2, R3, Loop ; Branch to Loop if R2 <> R3

ST 4000, R1 ; Store R1(inner product) at memory location 4000

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Lesson Summary

▪ Exercise 1 for Accumulator based CPU


▪ Exercise 1 for Stack based CPU
▪ Exercise 1 for Register-Memory CPU
▪ Exercise 1 for Register-Register CPU
▪ Exercise 2 – Finding Array Sum
▪ Exercise 3 – Finding Inner Product of 2 arrays

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