Acer Acer Aspire 3 A315 Compal LA-G021P r1.B

A B C D E
1 1
Compal Confidential
2
DH5AV_JV_0V Schematics Document 2
AMD Raven Ridge Platform
AMD R17M-P1-50/R18M-M2-60/R18M-G1-90
3
LA-G021P REV:1.B 3
2017-12-25
4 4
Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2017/12/25 Deciphered Date 2019/12/25 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
COVER PAGE
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 1.B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. DH5AV_JV_0V_LA-G021P
Shared with ACER Date: Thursday, January 11, 2018 Sheet 1 of 48
A B C D E
A B C D E
Compal Confidential
Model Name : DH5AV_JV_0V
(Channel A) page 13 (Channel B) page 14
1
260pin DDRIV SO-DIMM 260pin DDRIV SO-DIMM 1
Memory BUS(DDR4)
GPU
GDDR5 x4pcs 128-bits
S4 Package PEG x8
1.2V DDRIV
2400Mhz
R535 : R18M-M2-60
RX540 : R17M-P1-50
RX565 : R18M-G1-90
AMD USB2.0
page 15~23
Port 0 Port 1 Port 2 Port 3 Port 4 Port 5
Display Port RAVEN RIDGE Camera

page 24
Port 1 Port 0 Type-A (CHG) Type-C
USB2.0 page 33
Conn. Conn.
eDP Conn. HDMI Conn. S/B
page 24 page 25 2.0 Conn.
page 33 page 34 WLAN/BT USB2.0 Hub
Port 4
Combopage 27 page 33
2 2
USB3.1
Port 0 Port 2,3
Port 4
AMD FP5 APU
BGA 1140-balls Port 3 Port 2 Port 1
PCIE
Finger Touch S/B
Print Screen 2.0 Conn.
Port 0, 1, 2, 3 Port 4 Port 5 page 6~12
page 31 page 24 page 33
SSD page 28 LAN+CR WLAN/BT
HD Audio(AZ)
NGFF Conn. RTL8411 NGFF Conn.
page 26 page 27
USB2.0
SPI SATA III
Port 3
Transformer Card Reader
LPC I2C Audio
RJ45page 26 Conn. page 26
ALC255/256
page 29
3 3
page 10
ENE Port 1 G-Sensor
BIOS (8M) KBC9022 (Reserve)
page 28 page 24 page 33
page 30
page 31
Port 0 Port 1
PS2 Port 3
Int. DMIC Int. Speaker UAJ
PTP HDD SSD page 28 on Camera Conn. page 29 on Sub/B
Discrete TPM page 31 Conn. page 28 NGFF Conn.
page 31
Int.KBD
Fan Control
page 32
RTC CKT.
page 11
Power On/Off CKT.

page 32
4 4
DC/DC Interface CKT.

page 35 Sub Board
LS-G021 USB2.0/B
Power Circuit DC/DC page 33
page 36-47 Security Classification Compal Secret Data Compal Electronics, Inc.
LS-E911 Hall Sensor/B BLOCK DIAGRAMS

VRAM Config Table page 31
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
Custom 1.B
page 23 DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Date: Monday, December 25, 2017 Sheet 2 of 48
A B C D E
A B C D E
Voltage Rails BOARD ID Table Board ID / SKU ID Table for AD channel

ZZZ @
Board ID PCB Revision
Power Plane Description S0 S3 S5
0 EVT
+19V_VIN Adapter power supply (19V) ON ON ON
ON ON ON
1 DH5JV DA8001E9010
+19VB AC or battery power rail for power circuit. PCB 28Z LA-G021P REV1 MB 2
2 DH5AV ZZZ PCB@
+APU_CORE Core voltage for APU ON OFF OFF
+APU_CORE_NB ON OFF OFF

3 DH50V
Voltage for On-die VGA of APU
+0.8VALW 0.8V always on power rail ON ON OFF DAZ28Z00100
1 PCB DH5JV LA-G021P LS-G021P/E911P 1
+0.8VS 0.8V switched power rail ON OFF OFF
ZZZ PCB1A@
+1.8VALW 1.8V always on power rail ON ON OFF
+1.8VS 1.8V switched power rail ON OFF OFF
+2.5V 2.5V power rail for APU and DDR ON ON OFF DAZ28Z00101
PCB DH5JV LA-G021P LS-G021P/E911P 1A
+1.2V 1.2V power rail for APU and DDR ON ON OFF ZZZ PCB1B@
+0.6VS 0.6V switched power rail for DDR terminator ON OFF OFF
+3VALW 3.3V always on power rail ON ON OFF

DAZ28Z00102
+3VS 3.3V switched power rail ON OFF OFF PCB DH5JV LA-G021P LS-G021P/E911P 1B
+5VALW 5V always on power rail ON ON AC:ON
DC:OFF
+5VS 5V switched power rail ON OFF OFF
+RTC_APU RTC power ON ON ON

+3V_LAN 3.3V LAN IC power ON ON OFF
+TP_VCC 3.3V Touch Pad power ON ON OFF BOM Structure Table

+3VSDGPU VGA power ON OFF OFF BOM Structure BTO Item
+1.8VSDGPU VGA power ON OFF OFF @ Unpop
+0.8VSDGPU VGA power ON OFF OFF EMC@/@EMC@ EMI/ESD Pop/Unpop
+VDDCI VGA power ON OFF OFF 45@ HDMI Royalty
+VGA_CORE VGA power ON OFF OFF CONN@ Mechanical Connector
2 2
+FP_VCC 3.3V Finger Print power ON ON OFF JP@ Jump

RS@ R-Short
TP@ Test Point
TPM@ TPM Circuits
APU SMBus/I2C Address Table PCIE@/T1PCIE@ PCIE SSD/Type-1 APU PCIE SSD
Address [7:0] POWER SEQUENCE
Master Device Address[7:1] SATA@ SATA SSD
Write Read
GS@ G-Sensor Circuits G-A +RTCBATT
I2C Port 0 LDO@/SWR@ RTL8411 LDO-Mode/Switching-Mode EC_ON

(+1.8VS) PAR@/TI@ SATA Redriver PARADE/TI solution +5VALW
3V_EN
I2C Port 1 G-Sensor 0001 1000b 0011 0000b 0011 0001b +3VALW
(+1.8VS) (Reserver) 18h 30h 31h CHG@/NCHG@ USB Charger/Non-Charger G-B
255@ Audio Codec AL255 Design 0.9_1.8VALW_PWREN
256@/256EMC@ Audio Codec AL256 Design +1.8VALW/+0.9VALW

I2C Port 2
(+3VS) UMA@ UMA Config
R3/R5/R7APU@ APU PN Refer p.6 SYSON
0101 0000b 1010 0000b 1010 0001b G-C
15W@/25W@/35W@ APU Watt Config +1.2V/+2.5V
JDIMM1 50h A0h A1h
SBMus Port 0 SUSP#
(+3VS) T1@/T2@ APU Type Config
3
EJ@/EA@/VX@ EJ/EA/VX Project Config +5VS/+3VS/+1.8VS/+0.6VS 3
0101 0001b 1010 0010b 1010 0011b
JDIMM2 51h A2h A3h 0.9VS_PWR_EN#
DIS@/T1DIS@ VGA Circuits/Type1-APU VGA Circuits
GPU and VRAM Config Refer p.23 +0.9VS
PTP 0010 1100b 0101 1000b 0101 1001b
(Synaptics) 58h 59h R535@ R18M-M2-60 GPU
I2C Port 3 2Ch VR_ON
(+3VALW) RX540@ R17M-P1-50 GPU
+APU_CORE
PTP 0001 1111b 0011 1110b 0011 1111b RX565@ R18M-G1-90 GPU G-D
+APU_CORE_SOC
(ELAN) 15h 3Eh 3Fh LEXA@ LEXA Series VGA
VRAM7G@/VRAM6G@ VRAM7G and VRAM6G
SMBus Port 1
(+3VALW) HUB@/NHUB@ USB20 HUB/Non-HUB
FP@/FPEMC@ Finger Print
VGA POWER SEQUENCE
DMIC2@/DMIC4@ 2 or 4 DMIC Design
EC SMBus Address Table HDT@ HDT Circuits PE_GPIO1/VGA_ON
TYPEC@ TYPEC Circuits +3VSDGPU

0000 1011b 0001 0110b 0001 0111b
Smart Battery 0Bh 16h 17h +1.8VSDGPU
SMBus Port 1 TYPECEMC@ TYPEC EMC Circuits
(+3VALW) NTYPEC@ No TYPEC Circuits +0.8VSDGPU
Charger IC 0000 1001b 0001 0010b 0001 0011b VGA_ON_B
(BQ24735) 09h 12h 13h
+VDDCI
+VGA_CORE
4
APU Temp. 0100 1100b 1001 1000b 1001 1001b 4
(TSI) 4Ch 98h 99h DGPU_PWROK
+1.35VSDGPU
SMBus Port 2 0100 0001b 1000 0010b 1000 0011b PE_GPIO0
(+3VS) GPU Temp. 41h 82h 83h
1100 0000b 1000 0000b 1000 0001b Security Classification Compal Secret Data Compal Electronics, Inc.
CC-Logic C0h 80h 81h 2017/12/25 2019/12/25 Title
Issued Date Deciphered Date
NOTES LIST
Custom 1.B
A B C D E
5 4 3 2 1
PJP101
AC-IN
APU Power Rail
18020mA +APU_CORE 70000mA +APU_CORE
+19V_VIN VDDCR_VDD @0.65-TBD
+19VB 5243mA
PU301 PU801
+APU_CORE_SOC 13000mA +APU_CORE_SOC VDDCR_SOC @0.72-TBD
Group C, S0 domain
+17.4V_BATT
D D
PJP201 250mA +3VS

DC-IN VDD_33 @0.25A
2000mA +1.8VS
VDD_18 @2.0A
Group B, S0 domain
4000mA +0.9VS 4000mA +0.9VS
U4 VDDP @4.0A
+1.2V 9500mA 6000mA +1.2V
638mA VDDIO_MEM_S3 @6.0A
PU501
+0.6VS 1200mA 250mA +3VALW
VDD_33_S5 @0.25A
2026mA +1.8VALW To VGA 1013mA 500mA +1.8VALW
PU602 VDD_18_S5 @0.5A
3713mA
+1.8VS 200mA +1.8VS Group B, S3 domain
U3 VDDIO_AUDIO @0.2A
5000mA 2200mA
237mA +0.9VALW 1000mA +0.9VALW
PU601 VDDP_S5 @1.0A
+RTC_APU_R 0.045mA +RTC_APU_R

JRTC1 U102 VDDBT_RTC_G @0.045mA Group A, S5 domain
DDR4 SO-DIMM/MEM-DOWN
304mA +2.5V 400mA +2.5V
C PU502 +2.5V C
3500mA +1.2V
+1.2V
1200mA +0.6VS
+0.6VS
125mA
SATA Redriver
3500mA +3VS_SSD_NGFF
RM9
SSD
2311mA
PU401 13347mA +3VALW UL1 1400mA +3V_LAN
RL2 LAN RTL8411

+3VLP
R463
200mA +TP_VCC
U13 Touch Pad
KB9022
1500mA +3VS_WLAN
R212
WLAN R18M-M2-60
U2606
R17M-P1-50
53.7mA +3V_HUB
R269 USB HUB R18M-G1-90
1500mA +LCDVDD
U8
Panel Logic
50mA +3VS_TPM
10mA To VGA RW2
GPU Power Rail (R18M-G1-90)
1mA +3VALW_TPM TPM
RW1
B B
U45 +19VB 60000mA +VGA_CORE

7335mA +3VS 200mA +3VS_CAM Camera PU1401 VDDC @60A
R110
3579mA
U2
3869mA 14700mA +5VALW 7100mA +5VS 500mA +5VS_BL PR1501
PU401 U1 KB Light PR1502
250mA +3VALW_CC 8000mA +VDDCI
RS127 VDDCI @8A
Type C
3000mA +USB3_VCCC EJ179F
US12
PR1503
U25 2000mA +USB3_VCCA
USB3.0
US10 (Charger) +19VB 4000mA +0.8VSDGPU
PU1405 VDD_08 @4A
2500mA
JIO2 169mA
USB/B
2000mA +5VS_HDD
RO3 +3VALW 10mA +3VSDGPU
HDD VDD_GPIO33 @0.01A
To VGA
+VGA_CORE 3579mA 2000mA +VCC_FAN1 10mA UV8
+VDDCI/VDD_08169mA RF1/RF7 +VCC_FAN2
+1.35VSDGPU 474mA FAN1/FAN2 +1.8VALW 1013mA +1.8VSDGPU VDD_18 @1A
1500mA +VDDA TSVDD @0.013A
JPA1 1013mA
Audio 2000mA
+19VB 6000mA +1.35VSDGPU VMEMIO @2A
1000mA +5VS_DISP PU1001
U73
HDMI Logic 474mA
A A
100mA +FP_VCC 4000mA
UK6 +1.35VSDGPU
Finger Print VRAM x4pcs
100mA +TS_PWR
R3986
Touch Screen
1500mA +INVPWR_B+
L11
Panel BackLight
POWER MAP
Custom 1.B
5 4 3 2 1
5 4 3 2 1
Raven Ridge Platform Power Sequence
AC-IN G3 --> S0 S0 --> S3 S3 --> S0

S0 --> S5
+3VLP +3VLP
ACIN 41.37ms ACIN
EC_ON 41.37ms EC_ON
D
+5VALW 3.3ms, Tr = 339us +5VALW D
218.1ms
ON/OFFBTN# 1.905us ON/OFFBTN#
3V_EN 99ms 8.856s 3V_EN
+3VALW 880us, Tr = 349us 21ms, Tf = 14.21ms +3VALW
0.9_1.8VALW_PWREN 99ms 9.13s 0.9_1.8VALW_PWREN

+1.8VALW 2.32ms, Tr = 409us Tf = 2.175ms +1.8VALW
+0.9VALW 820us, Tr = 153us Tf = 7.438ms +0.9VALW
202ms
101ms
PBTN_OUT# 4.601ms 9.12s PBTN_OUT#
EC_RSMRST# 117ms 9.12s EC_RSMRST#
SLP_S5# 100us 1.3ms SLP_S5#
SLP_S3# 98.84us 1.31ms SLP_S3#
SYSON 120.6ms 60.05ms SYSON
+1.2V 720us, Tr = 68us 360us, Tf = 152us +1.2V
+2.5V 1.44ms, Tr = 601us 4.54ms, Tf = 1.996ms +2.5V
SUSP# 20.16ms 60.28ms 14.72ms 57.42ms SUSP#
C
+5VS 620us, Tr = 289us 11ms. Tf = 7.276ms 620us, Tr = 270us 11ms, Tf = 7.574ms +5VS C
+3VS 580us, Tr = 303us 7.2ms, Tf = 4.062ms 620us, Tr = 293us 6.6ms, Tf = 3.982ms +3VS
+1.8VS 280us, Tr = 86us 7.2ms, Tf = 3.825ms 320us, Tr = 90us 5.8ms, Tf = 3.407ms +1.8VS
+0.6VS 200us, Tr = 9us 4.8ms, Tf = 2.1ms 200us, Tr = 9us 626us, Tf = 97us +0.6VS
KBRST# 20.08ms 60.24ms 20.2ms 57.36ms KBRST#
0.9VS_PWR_EN# 20.28ms 60.32ms 18.9ms 57.44ms 0.9VS_PWR_EN#
+0.9VS 400us, Tr = 55us 2.3ms, Tf = 748us 400us, Tr = 50us 1.946ms, Tf = 612us +0.9VS
VR_ON 20.22ms 86.74ms 20.2ms 80.02ms VR_ON
+APU_CORE 2.393ms, Tr = 145us 303us, Tf = 143us 2.293ms, Tr = 143us 303us, Tf = 133us +APU_CORE
+APU_CORE_SOC 2.333ms, Tr = 160us 303us, Tf = 120us 2.293ms, Tr = 158us 303us, Tf = 141us +APU_CORE_NB
VGATE 2.432ms 2.44ms VGATE

SYS_PWRGD_EC 39.45ms 29.63ms 39.49ms 29.63ms SYS_PWRGD_EC
APU_PWROK 17.83ms 3.629ms 17.88ms 3.623ms APU_PWROK
LPC_RST# 13.21ms 94.99us 13.24ms 93.02us LPC_RST#
APU_PCIE_RST# 15.4ms 431.6ms 15.35ms 4.56s APU_PCIE_RST#
APU_RST# 24.39ms 431.6ms 24.53ms 4.56s APU_RST#
B B
VGA Sequence VGA Sequence

PE_GPIO1 1.103s 11.6ms 295ms 12.98ms PE_GPIO1
+3VSDGPU 1.013ms, Tr = 472us 266us, Tf = 152us 953us, Tr = 437us 306us, Tf = 159us +3VSDGPU
+1.8VSDGPU 2.693ms, Tr = 210us 12.99ms, Tf = 1.904ms 2.693ms, Tr = 196us 12.91ms, Tf = 1.86ms +1.8VSDGPU
(R18M-M2-60)+0.8VSDGPU 5.895ms, Tr = 146us 32.6ms, Tf = 1.524ms 5.695ms, Tr = 151us 32.6ms, Tf = 1.424ms +0.8VSDGPU (R18M-M2-60)
VGA_ON_B 5.041ms 4.985ms VGA_ON_B
(R18M-G1-90)+VDDCI 6.273ms, Tr = 31us 2.253ms, Tf = 992us 6.273ms, Tr = 30us 2.253ms, Tf = 1.097ms +VDDCI (R18M-G1-90)
+VGA_CORE 6.273ms, Tr = 33us 2.253ms, Tf = 1.17ms 6.723ms, Tr = 30us 2.253ms, Tf = 1.175ms +VGA_CORE
DGPU_PWROK 6.2ms 6.254ms DGPU_PWROK
+1.35VSDGPU 733us, Tr = 153us 6.026, Tf = 2.176ms 733us, Tr = 145us 6.026ms, Tf = 2.563ms +1.35VSDGPU
PE_GPIO0 PE_GPIO0
PLT_RST_VGA# 164.3ms 117.3ms PLT_RST_VGA#
A A

POWER SEQUENCE
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Document Number Rev
Custom 1.B
5 4 3 2 1
5 4 3 2 1
Main Func = CPU
UC1B
PCIE
D D
PEG_ARX_GTX_P0 P8 P_GFX_RXP0 P_GFX_TXP0 N1 PEG_ATX_GRX_P0

<15> PEG_ARX_GTX_P0 PEG_ARX_GTX_N0 PEG_ATX_GRX_N0 PEG_ATX_GRX_P0 <15>
P9 P_GFX_RXN0 P_GFX_TXN0 N3
<15> PEG_ARX_GTX_N0 PEG_ATX_GRX_N0 <15>
PEG_ARX_GTX_P1 N6 P_GFX_RXP1 P_GFX_TXP1 M2 PEG_ATX_GRX_P1
N7 P_GFX_RXN1 P_GFX_TXN1 M4
PEG PEG_ARX_GTX_P2 M8 P_GFX_RXP2 P_GFX_TXP2 L2 PEG_ATX_GRX_P2 PEG
M9 P_GFX_RXN2 P_GFX_TXN2 L4
PEG_ARX_GTX_P3 L6 P_GFX_RXP3 P_GFX_TXP3 L1 PEG_ATX_GRX_P3
L7 P_GFX_RXN3 P_GFX_TXN3 L3
PEG_ARX_GTX_P4 K11 P_GFX_RXP4 P_GFX_TXP4 K2 PEG_ATX_GRX_P4
J11 P_GFX_RXN4 P_GFX_TXN4 K4
PEG_ARX_GTX_P5 H6 P_GFX_RXP5 P_GFX_TXP5 J2 PEG_ATX_GRX_P5
H7 P_GFX_RXN5 P_GFX_TXN5 J4
PEG_ARX_GTX_P6 G6 P_GFX_RXP6 P_GFX_TXP6 H1 PEG_ATX_GRX_P6
F7 P_GFX_RXN6 P_GFX_TXN6 H3
PEG_ARX_GTX_P7 G8 P_GFX_RXP7 P_GFX_TXP7 H2 PEG_ATX_GRX_P7
F8 P_GFX_RXN7 P_GFX_TXN7 H4
PCIE_ARX_DTX_P0 N10 P_GPP_RXP0 P_GPP_TXP0 N2 PCIE_ATX_DRX_P0 PCIE@ CC1204 1 2 0.22U_0402_16V7K

<28> PCIE_ARX_DTX_P0 PCIE_ARX_DTX_N0 PCIE_ATX_DRX_N0 PCIE_ATX_C_DRX_P0 <28>
C N9 P_GPP_RXN0 P_GPP_TXN0 P3 PCIE@ CC1203 1 2 0.22U_0402_16V7K C
<28> PCIE_ARX_DTX_N0 PCIE_ATX_C_DRX_N0 <28>
PCIE_ARX_DTX_P1 L10 P_GPP_RXP1 P_GPP_TXP1 P4 PCIE_ATX_DRX_P1 PCIE@ CC1206 1 2 0.22U_0402_16V7K
L9 P_GPP_RXN1 P_GPP_TXN1 P2 PCIE@ CC1205 1 2 0.22U_0402_16V7K
SSD PCIE_ARX_DTX_P2 L12 P_GPP_RXP2 P_GPP_TXP2 R3 PCIE_ATX_DRX_P2 T1PCIE@ CC1212 1 2 0.22U_0402_16V7K SSD
M11 P_GPP_RXN2 P_GPP_TXN2 R1 T1PCIE@ CC1211 1 2 0.22U_0402_16V7K
PCIE_ARX_DTX_P3 P12 P_GPP_RXP3 P_GPP_TXP3 T4 PCIE_ATX_DRX_P3 T1PCIE@ CC1214 1 2 0.22U_0402_16V7K
P11 P_GPP_RXN3 P_GPP_TXN3 T2 T1PCIE@ CC1213 1 2 0.22U_0402_16V7K
PCIE_ARX_DTX_P4 V6 P_GPP_RXP4 P_GPP_TXP4 W2 PCIE_ATX_DRX_P4 CC1 1 2 .1U_0402_16V7K

LAN+CR V7 P_GPP_RXN4 P_GPP_TXN4 W4 CC2 1 2 .1U_0402_16V7K LAN+CR
PCIE_ARX_DTX_P5 T8 P_GPP_RXP5 P_GPP_TXP5 W3 PCIE_ATX_DRX_P5 CC3 1 2 .1U_0402_16V7K
WLAN T9 P_GPP_RXN5 P_GPP_TXN5 V2 CC4 1 2 .1U_0402_16V7K WLAN
SATA_ARX_DTX_P0 R6 P_GPP_RXP6/SATA_RXP0 P_GPP_TXP6/SATA_TXP0 V1 SATA_ATX_DRX_P0
<28> SATA_ARX_DTX_P0 SATA_ARX_DTX_N0 SATA_ATX_DRX_N0 SATA_ATX_DRX_P0 <28>
HDD R7 P_GPP_RXN6/SATA_RXN0 P_GPP_TXN6/SATA_TXN0 V3 HDD
<28> SATA_ARX_DTX_N0 SATA_ATX_DRX_N0 <28>
SATA_ARX_DTX_P1 R9 P_GPP_RXP7/SATA_RXP1 P_GPP_TXP7/SATA_TXP1 U2 SATA_ATX_DRX_P1
<28> SATA_ARX_DTX_P1 SATA_ARX_DTX_N1 SATA_ATX_DRX_N1 SATA_ATX_DRX_P1 <28>
SSD R10 P_GPP_RXN7/SATA_RXN1 P_GPP_TXN7/SATA_TXN1 U4 SSD
<28> SATA_ARX_DTX_N1 SATA_ATX_DRX_N1 <28>
FP5 REV 0.90

PART 2 OF 13
B FP5_BGA_1140P B
@
APU PN Table
APU Platform R3 PN R3 PN R3 PN R3 PN
UC1 R3APUDC@ UC1 R3APUQC@ UC1 R5APU@ UC1 R7APU@
Raven
S IC RAVEN3 YM2200C4T2OFB 2G BGA ABO! S IC RAVEN3 YM2300C4T4MFB 2G BGA ABO! S IC RAVEN5 YM2500C4T4MFB 2G BGA ABO! S IC RAVEN7 YM2700C4T4MFB 2.2G BGA ABO!
SA0000BBJ30 SA0000BIT20 SA0000A8R30 SA0000ASA20
A A

FP5_(1/7)_PEG/PCIE/SATA
Custom 1.B
Date: Tuesday, December 26, 2017 Sheet 6 of 48
5 4 3 2 1
5 4 3 2 1
Main Func = CPU

UC1A UC1I
MEMORY A
<13> DDR_A_MA[13..0]
MEMORY B
DDR_A_MA0 DDR_A_DQ[63..0] <13> <14> DDR_B_MA[13..0]
AF25 MA_ADD0
DDR_A_MA1 AE23 J21 DDR_A_DQ0 DDR_B_MA0 AG30 DDR_B_DQ[63..0] <14>
MA_ADD1 MA_DATA0 MB_ADD0
DDR_A_MA2 AD27 H21 DDR_A_DQ1 DDR_B_MA1 AC32 B21 DDR_B_DQ0
MA_ADD2 MA_DATA1 MB_ADD1 MB_DATA0
DDR_A_MA3 AE21 MA_ADD3 MA_DATA2 F23 DDR_A_DQ2 DDR_B_MA2 AC30 MB_ADD2 MB_DATA1 D21 DDR_B_DQ1
DDR_A_MA4 AC24 H23 DDR_A_DQ3 DDR_B_MA3 AB29 B23 DDR_B_DQ2
DDR_A_MA5 AC26 G20 DDR_A_DQ4 DDR_B_MA4 AB31 D23 DDR_B_DQ3
DDR_A_MA6 AD21 F20 DDR_A_DQ5 DDR_B_MA5 AA30 A20 DDR_B_DQ4
DDR_A_MA7 AC27 J22 DDR_A_DQ6 DDR_B_MA6 AA29 C20 DDR_B_DQ5
D MA_ADD7 MA_DATA6 MB_ADD6 MB_DATA5 D
DDR_A_MA8 AD22 MA_ADD8 MA_DATA7 J23 DDR_A_DQ7 DDR_B_MA7 Y30 MB_ADD7 MB_DATA6 A22 DDR_B_DQ6
DDR_A_MA9 AC21 DDR_B_MA8 AA31 C22 DDR_B_DQ7
MA_ADD9 MB_ADD8 MB_DATA7
DDR_A_MA10 AF22 G25 DDR_A_DQ8 DDR_B_MA9 W29
MA_ADD10 MA_DATA8 MB_ADD9
DDR_A_MA11 AA24 F26 DDR_A_DQ9 DDR_B_MA10 AH29 D24 DDR_B_DQ8
DDR_A_MA12 AC23 L24 DDR_A_DQ10 DDR_B_MA11 Y32 A25 DDR_B_DQ9
DDR_A_MA13 AJ25 MA_ADD13_BANK2 MA_DATA11 L26 DDR_A_DQ11 DDR_B_MA12 W31 MB_ADD12 MB_DATA10 D27 DDR_B_DQ10
DDR_A_MA14_WE# AG27 L23 DDR_A_DQ12 DDR_B_MA13 AL30 C27 DDR_B_DQ11
MA_WE_L_ADD14 MA_DATA12 MB_ADD13_BANK2 MB_DATA11
<13> DDR_A_MA14_WE# DDR_A_MA15_CAS# AG23 F25 DDR_A_DQ13 DDR_B_MA14_WE# AK30 C23 DDR_B_DQ12
MA_CAS_L_ADD15 MA_DATA13 MB_WE_L_ADD14 MB_DATA12
<13> DDR_A_MA15_CAS# DDR_A_MA16_RAS# AG26 K25 DDR_A_DQ14 <14> DDR_B_MA14_WE# DDR_B_MA15_CAS# AK32 B24 DDR_B_DQ13
MA_RAS_L_ADD16 MA_DATA14 MB_CAS_L_ADD15 MB_DATA13
<13> DDR_A_MA16_RAS# DDR_A_DQ15 <14> DDR_B_MA15_CAS# DDR_B_MA16_RAS# DDR_B_DQ14
MA_DATA15 K27 AJ30 MB_RAS_L_ADD16 MB_DATA14 C26
<14> DDR_B_MA16_RAS# B27 DDR_B_DQ15
MB_DATA15
DDR_A_BA0 AF21 M25 DDR_A_DQ16
MA_BANK0 MA_DATA16
<13> DDR_A_BA0 DDR_A_BA1 DDR_A_DQ17 DDR_B_BA0 DDR_B_DQ16
AF27 MA_BANK1 MA_DATA17 M27 AH31 MB_BANK0 MB_DATA16 C30
<13> DDR_A_BA1 DDR_A_DQ18 <14> DDR_B_BA0 DDR_B_BA1 DDR_B_DQ17
MA_DATA18 P27 AG32 MB_BANK1 MB_DATA17 E29
DDR_A_BG0 DDR_A_DQ19 <14> DDR_B_BA1 DDR_B_DQ18
AA21 MA_BG0 MA_DATA19 R24 MB_DATA18 H29
<13> DDR_A_BG0 DDR_A_BG1 AA27 L27 DDR_A_DQ20 DDR_B_BG0 V31 H31 DDR_B_DQ19
MA_BG1 MA_DATA20 MB_BG0 MB_DATA19
<13> DDR_A_BG1 M24 DDR_A_DQ21 <14> DDR_B_BG0 DDR_B_BG1 V29 A28 DDR_B_DQ20
MA_DATA21 MB_BG1 MB_DATA20
DDR_A_ACT# DDR_A_DQ22 <14> DDR_B_BG1 DDR_B_DQ21
AA22 MA_ACT_L MA_DATA22 P24 MB_DATA21 D28
<13> DDR_A_ACT# DDR_A_DQ23 DDR_B_ACT# DDR_B_DQ22
MA_DATA23 P25 V30 MB_ACT_L MB_DATA22 F31
<13> DDR_A_DM[7..0] DDR_A_DM0 <14> DDR_B_ACT# DDR_B_DQ23
F21 MA_DM0 MB_DATA23 G30
DDR_A_DM1 G27 M22 DDR_A_DQ24 <14> DDR_B_DM[7..0] DDR_B_DM0 C21
MA_DM1 MA_DATA24 MB_DM0
DDR_A_DM2 N24 N21 DDR_A_DQ25 DDR_B_DM1 C25 J29 DDR_B_DQ24
MA_DM2 MA_DATA25 MB_DM1 MB_DATA24
DDR_A_DM3 N23 T22 DDR_A_DQ26 DDR_B_DM2 E32 J31 DDR_B_DQ25
DDR_A_DM4 AL24 V21 DDR_A_DQ27 DDR_B_DM3 K30 L29 DDR_B_DQ26
DDR_A_DM5 AN27 L21 DDR_A_DQ28 DDR_B_DM4 AP30 L31 DDR_B_DQ27
DDR_A_DM6 AW25 M20 DDR_A_DQ29 DDR_B_DM5 AW31 H30 DDR_B_DQ28
DDR_A_DM7 AT21 R23 DDR_A_DQ30 DDR_B_DM6 BB26 H32 DDR_B_DQ29
T27 T21 DDR_A_DQ31 DDR_B_DM7 BD22 L30 DDR_B_DQ30
RSVD_36 MA_DATA31 MB_DM7 MB_DATA30
N32 L32 DDR_B_DQ31
RSVD_21 MB_DATA31
DDR_A_DQS0 F22 AL27 DDR_A_DQ32
MA_DQS_H0 MA_DATA32
<13> DDR_A_DQS0 DDR_A_DQS0# DDR_A_DQ33 DDR_B_DQS0 DDR_B_DQ32
G22 MA_DQS_L0 MA_DATA33 AL25 D22 MB_DQS_H0 MB_DATA32 AP29
<13> DDR_A_DQS0# DDR_A_DQS1 DDR_A_DQ34 <14> DDR_B_DQS0 DDR_B_DQS0# DDR_B_DQ33
H27 MA_DQS_H1 MA_DATA34 AP26 B22 MB_DQS_L0 MB_DATA33 AP32
<13> DDR_A_DQS1 DDR_A_DQS1# DDR_A_DQ35 <14> DDR_B_DQS0# DDR_B_DQS1 DDR_B_DQ34
H26 MA_DQS_L1 MA_DATA35 AR27 D25 MB_DQS_H1 MB_DATA34 AT29
N27 MA_DQS_H2 MA_DATA36 AK26 B25 MB_DQS_L1 MB_DATA35 AU32
N26 MA_DQS_L2 MA_DATA37 AK24 F29 MB_DQS_H2 MB_DATA36 AN30
C <13> DDR_A_DQS2# DDR_A_DQS3 DDR_A_DQ38 <14> DDR_B_DQS2 DDR_B_DQS2# DDR_B_DQ37 C
R21 MA_DQS_H3 MA_DATA38 AM24 F30 MB_DQS_L2 MB_DATA37 AP31
P21 MA_DQS_L3 MA_DATA39 AP27 K31 MB_DQS_H3 MB_DATA38 AR30
<13> DDR_A_DQS3# DDR_A_DQS4 <14> DDR_B_DQS3 DDR_B_DQS3# DDR_B_DQ39
AM26 MA_DQS_H4 K29 MB_DQS_L3 MB_DATA39 AT31
<13> DDR_A_DQS4 DDR_A_DQS4# DDR_A_DQ40 <14> DDR_B_DQS3# DDR_B_DQS4
AM27 MA_DQS_L4 MA_DATA40 AM23 AR29 MB_DQS_H4
AN24 MA_DQS_H5 MA_DATA41 AM21 AR31 MB_DQS_L4 MB_DATA40 AU29
<13> DDR_A_DQS5 DDR_A_DQS5# AN25 AR25 DDR_A_DQ42 <14> DDR_B_DQS4# DDR_B_DQS5 AW30 AV30 DDR_B_DQ41
MA_DQS_L5 MA_DATA42 MB_DQS_H5 MB_DATA41
AU23 MA_DQS_H6 MA_DATA43 AU27 AW29 MB_DQS_L5 MB_DATA42 BB30
AT23 MA_DQS_L6 MA_DATA44 AL22 BC25 MB_DQS_H6 MB_DATA43 BA28
<13> DDR_A_DQS6# DDR_A_DQS7 AV20 AL21 DDR_A_DQ45 <14> DDR_B_DQS6 DDR_B_DQS6# BA25 AU30 DDR_B_DQ44
MA_DQS_H7 MA_DATA45 MB_DQS_L6 MB_DATA44
AW20 MA_DQS_L7 MA_DATA46 AP24 BC22 MB_DQS_H7 MB_DATA45 AU31
<13> DDR_A_DQS7# DDR_A_DQ47 <14> DDR_B_DQS7 DDR_B_DQS7# DDR_B_DQ46
V24 RSVD_41 MA_DATA47 AP23 BA22 MB_DQS_L7 MB_DATA46 AY32
<14> DDR_B_DQS7# DDR_B_DQ47
V23 RSVD_40 N31 RSVD_20 MB_DATA47 AY29
AW26 DDR_A_DQ48 N29
MA_DATA48 RSVD_18
DDR_A_CLK0 AD25 AV25 DDR_A_DQ49 BA27 DDR_B_DQ48
MA_CLK_H0 MA_DATA49 MB_DATA48
<13> DDR_A_CLK0 DDR_A_CLK0# DDR_A_DQ50 DDR_B_CLK0 DDR_B_DQ49
AD24 MA_CLK_L0 MA_DATA50 AV22 AC31 MB_CLK_H0 MB_DATA49 BC27
<13> DDR_A_CLK0# DDR_A_CLK1 DDR_A_DQ51 <14> DDR_B_CLK0 DDR_B_CLK0# DDR_B_DQ50
AE26 MA_CLK_H1 MA_DATA51 AW22 AD30 MB_CLK_L0 MB_DATA50 BA24
<13> DDR_A_CLK1 DDR_A_CLK1# AE27 AU26 DDR_A_DQ52 <14> DDR_B_CLK0# DDR_B_CLK1 AD29 BC24 DDR_B_DQ51
MA_CLK_L1 MA_DATA52 MB_CLK_H1 MB_DATA51
<13> DDR_A_CLK1# AV27 DDR_A_DQ53 <14> DDR_B_CLK1 DDR_B_CLK1# AD31 BD28 DDR_B_DQ52
MA_DATA53 MB_CLK_L1 MB_DATA52
DDR_A_DQ54 <14> DDR_B_CLK1# DDR_B_DQ53
MA_DATA54 AW23 AE30 MB_CLK_H2 MB_DATA53 BB27
MA_DATA55 AT22 DDR_A_DQ55 AE32 MB_CLK_L2 MB_DATA54 BB25 DDR_B_DQ54
AF29 BD25 DDR_B_DQ55
MB_CLK_H3 MB_DATA55
AW21 DDR_A_DQ56 AF31
MA_DATA56 MB_CLK_L3
DDR_A_CS0# AG21 AU21 DDR_A_DQ57 BC23 DDR_B_DQ56
MA_CS_L0 MA_DATA57 MB_DATA56
<13> DDR_A_CS0# DDR_A_CS1# DDR_A_DQ58 DDR_B_CS0# DDR_B_DQ57
AJ27 MA_CS_L1 MA_DATA58 AP21 AJ31 MB0_CS_L0 MB_DATA57 BB22
<13> DDR_A_CS1# DDR_A_DQ59 <14> DDR_B_CS0# DDR_B_CS1# DDR_B_DQ58
MA_DATA59 AN20 AM31 MB0_CS_L1 MB_DATA58 BC21
DDR_A_DQ60 <14> DDR_B_CS1# DDR_B_DQ59
MA_DATA60 AR22 AJ29 MB1_CS_L0 MB_DATA59 BD20
AN22 DDR_A_DQ61 AM29 BB23 DDR_B_DQ60
MA_DATA61 MB1_CS_L1 MB_DATA60
AT20 DDR_A_DQ62 BA23 DDR_B_DQ61
MA_DATA62 MB_DATA61
AR20 DDR_A_DQ63 BB21 DDR_B_DQ62
MA_DATA63 MB_DATA62
DDR_A_CKE0 Y23 BA21 DDR_B_DQ63
MA_CKE0 MB_DATA63
<13> DDR_A_CKE0 DDR_A_CKE1 DDR_B_CKE0
Y26 MA_CKE1 RSVD_34 T24 U29 MB0_CKE0
<13> DDR_A_CKE1 <14> DDR_B_CKE0 DDR_B_CKE1
RSVD_35 T25 T30 MB0_CKE1 RSVD_17 M31
<14> DDR_B_CKE1
RSVD_51 W25 V32 MB1_CKE0 RSVD_19 N30
RSVD_52 W27 U31 MB1_CKE1 RSVD_26 P31
DDR_A_ODT0 AG24 R26 R32
MA_ODT0 RSVD_27 RSVD_29
B
<13> DDR_A_ODT0 DDR_A_ODT1 AJ22 R27 DDR_B_ODT0 AL31 M30 B
MA_ODT1 RSVD_28 MB0_ODT0 RSVD_16
<13> DDR_A_ODT1 <14> DDR_B_ODT0 DDR_B_ODT1
RSVD_43 V27 AM32 MB0_ODT1 RSVD_15 M29
<14> DDR_B_ODT1
RSVD_42 V26 AL29 MB1_ODT0 RSVD_25 P30
AM30 MB1_ODT1 RSVD_24 P29
DDR_A_ALERT# AA25 MA_ALERT_L
<13> DDR_A_ALERT# AF24 DDR_A_PAR DDR_B_ALERT# W30
MA_PAROUT MB_ALERT_L
DDR_A_EVENT# DDR_A_PAR <13> <14> DDR_B_ALERT# DDR_B_PAR
AE24 MA_EVENT_L MB_PAROUT AG31
<13> DDR_A_EVENT# DDR_A_RST# DDR_B_EVENT# DDR_B_PAR <14>
Y24 MA_RESET_L AG29 MB_EVENT_L
<13> DDR_A_RST# <14> DDR_B_EVENT# DDR_B_RST#
FP5 REV 0.90 T31 MB_RESET_L
<14> DDR_B_RST#
PART 1 OF 13 FP5 REV 0.90
@ PART 9 OF 13
FP5_BGA_1140P @
FP5_BGA_1140P
EVENT# pull high

+1.2V
RC1 1 2 1K_0402_5% DDR_B_EVENT#
+1.2V
RC2 1 2 1K_0402_5% DDR_A_EVENT#

A A

FP5_(2/7)_DDR4
Custom 1.B
5 4 3 2 1
A B C D E
Main Func = CPU

DISP
+1.8VALW
EC/THERM
5
UC1C UC66
1
P
+3VS NC 4 ENBKL
DISPLAY/SVI2/JTAG/TEST
APU_DP0_P0 ENBKL_R ENBKL_R Y ENBKL <30>
RPC25 C8 DP0_TXP0 DP_BLON G15 2
<25> APU_DP0_P0 A
G
8 1 APU_SID APU_DP0_N0 A8 IO18 F15 ENVDD_R
DP0_TXN0 DP_DIGON
APU_ALERT# <25> APU_DP0_N0 INVTPWM_R
7 2 DP_VARY_BL L14 NL17SZ07DFT2G_SC70-5
3
6 3 APU_SIC APU_DP0_P1 D8 SA00004BV00
DP0_TXP1
APU_PROCHOT# <25> APU_DP0_P1 APU_DP0_N1
1
5 4 B8 DP0_TXN1 DP0_AUXP D9 APU_DP0_CTRL_CLK 1
<25> APU_DP0_N1 B9 APU_DP0_CTRL_DATA APU_DP0_CTRL_CLK <25>
HDMI APU_DP0_P2
DP0_AUXN
APU_DP0_HPD APU_DP0_CTRL_DATA <25> HDMI
1K_0804_8P4R_5% B6 DP0_TXP2 DP0_HPD C10
<25> APU_DP0_P2 APU_DP0_N2 APU_DP0_HPD <25> +1.8VALW
Reserve for debug C7 DP0_TXN2
<25> APU_DP0_N2 G11 EDP_AUXP
DP1_AUXP
+3VS APU_DP0_P3 EDP_AUXN EDP_AUXP <24>
C6 DP0_TXP3 DP1_AUXN F11 EDP
<25> APU_DP0_P3 EDP_AUXN <24>
5
APU_DP0_N3 D6 G13 EDP_HPD
<25> APU_DP0_N3 DP0_TXN3 DP3: DP1_HPD
EDP_HPD <24> 1
UC64
P
RC16 1 @ 2 1K_0402_5% EC_SMB_CK2
<24> EDP_TXP0
EDP_TXP0 E6 DP1_TXP0
DP2: DP2_AUXP J12 NC 4 ENVDD
ENVDD <24>
RC17 1 2 1K_0402_5% EC_SMB_DA2 EDP_TXN0 D5 H12 ENVDD_R 2 Y
@
<24> EDP_TXN0 DP1_TXN0 DP1: eDP DP2_AUXN
A
G
DP2_HPD K13
+3VS EDP_TXP1 E1 DP1_TXP1
DP0: HDMI NL17SZ07DFT2G_SC70-5
<24> EDP_TXP1
3
EDP_TXN1 C1 J10 @ SA00004BV00
DP1_TXN1 DP3_AUXP
<24> EDP_TXN1
DP3_AUXN H10
EDP EDP_TXP2 F3 K8
DP1_TXP2 DP3_HPD
<24> EDP_TXP2 EDP_TXN2 ENVDD_R
E4 DP1_TXN2 RC690 1 RS@ 2 0_0402_5% ENVDD
<24> EDP_TXN2 K15 DP_STEREOSYNC
DP_STEREOSYNC
5
EDP_TXP3 F4
G
DP1_TXP3
<24> EDP_TXP3 EDP_TXN3
QC1B F2 DP1_TXN3 RSVD_4 F14
<24> EDP_TXN3 +1.8VALW
2N7002KDW_SOT363-6 RSVD_3 F12
SB00000EO00
EC_SMB_CK2 3 4 APU_SIC F10
RSVD_2
S
<16,30,34> EC_SMB_CK2
5
UC65
D
TYPEC@ 1
P
NC
2
4 INVTPWM
G
INVTPWM_R Y INVTPWM <24>

QC1A 2
A
G
2N7002KDW_SOT363-6
SB00000EO00 NL17SZ07DFT2G_SC70-5
3
EC_SMB_DA2 6 1 APU_SID SA00004BV00
S
<16,30,34> EC_SMB_DA2
D
TYPEC@ AP14 APU_TEST4 TP@

TEST4 T4949
AN14 APU_TEST5 TP@
TEST5 T4948 +3VS
RC616 1NTYPEC@ 2 0_0402_5% TEST6 F13
RC617 1NTYPEC@ 2 0_0402_5% ENBKL RC3 1 2 4.7K_0402_5%
G18 APU_TEST14
TEST14
2 H19 APU_TEST15 ENVDD RC4 1 @ 2 4.7K_0402_5% 2
TEST15
F18 APU_TEST16
TEST16
F19 APU_TEST17 INVTPWM RC5 1 2 4.7K_0402_5%
TEST17
+3VS
W24 APU_TEST31 TP@
TEST31 T4942
RC664 1 2 1K_0402_5% THERMTRIP#
AR11 APU_TEST41 TP@
TEST41 T4941 ENBKL_R RC6130 1 2 100K_0402_5%
APU_TDI AU2 TDI TEST470 AJ21 APU_TEST470 TP@
APU_PROCHOT# APU_TDO APU_TEST471 TP@ T4940 ENVDD_R
AU4 TDO TEST471 AK21 T4939 RC6131 1 2 100K_0402_5%
APU_RST# APU_TCK AU1 TCK
APU_PWROK APU_TMS AU3 IO18S5 INVTPWM_R RC6132 1 @ 2 100K_0402_5%
TMS
APU_TRST# AV3
1 1 1 APU_DBREQ#
TRST_L
@EMC@ EMC@ EMC@ AW3 DBREQ_L
CC1202 CC5 CC6 +0.9VS
.1U_0402_16V7K 33P_0402_50V8J 33P_0402_50V8J
2 2 2 RC80 1 2 300_0402_5% APU_RST# AW4 V4 SMU_ZVDDP RC1682 1 2 196_0402_1%
+1.8VS RESET_L SMU_ZVDD
RC81 1 2 300_0402_5% APU_PWROK AW2 IO18 +3VALW
+1.8VS PWROK
<42> APU_PWROK APU_SIC H14 SIC CORETYPE AW11 CORETYPE RC1681 1 @ 2 1K_0402_5%
APU_SID J14
Close to APU APU_ALERT#
SID
J15 ALERT_L
THERMTRIP# AP16 THERMTRIP_L IO33 VDDP_SENSE AN11 APU_VDDP_SEN_H
<30> THERMTRIP# APU_PROCHOT# APU_CORESOC_SEN_H APU_VDDP_SEN_H <41>
L19 PROCHOT_L VDDCR_SOC_SENSE J19
<30,38,42> APU_PROCHOT# APU_CORESOC_SEN_H <42>
VDDCR_SENSE K18 APU_CORE_SEN_H
APU_CORE_SEN_H <42> Leakage prevent from power side
SVID <42> APU_SVC
RC669 1
RC670 1
2 0_0402_5% APU_SVC_R
2 0_0402_5% APU_SVD_R
F16
H16
SVC0
SVD0 IO18 VSS_SENSE_A J18 APU_VSS_SEN_L
<42> APU_SVD APU_SVT_R APU_VSS_SEN_L <42>
J16 SVT0 FP5 REV 0.90 VSS_SENSE_B AM11 APU_VDDP_SEN_L
+1.8VS <42> APU_SVT_R PART 3 OF 13
APU_VDDP_SEN_L <41>
@ FP5_BGA_1140P
@ RPC65
8 1 APU_SVT_R
3 7 2 APU_SVC 3
6 3 APU_SVD
5 4
1K_0804_8P4R_5%
HDT+ TESTPOINT
+1.8VS
+1.8VALW DP_STEREOSYNC RC155 1 2 1K_0402_5%

+1.8VALW
JHDT1 @ RPH1 RC154 1 @ 2 1K_0402_5%
1 2 APU_TCK_R RH27 1 HDT@ 2 0_0402_5% APU_TCK APU_TCK 1 8
1 2 APU_TMS 2 7
3 4 APU_TMS_R RH28 1 HDT@ 2 0_0402_5% APU_TMS APU_TDI 3 6
3 4 APU_DBREQ# 4 5
5 6 APU_TDI_R RH29 1 HDT@ 2 0_0402_5% APU_TDI
5 6 1K_0804_8P4R_5% +1.8VS
7 8 APU_TDO_R RH30 1 HDT@ 2 0_0402_5% APU_TDO
7 8
APU_TRST# RH21 1 2 33_0402_5% APU_TRST#_R 9 10 APU_PWROK_R RH31 1 HDT@ 2 0_0402_5% APU_PWROK APU_TRST# RH26 1 2 1K_0402_5% @ RPC30
9 10 APU_TEST14 8 1
RPH3 HDT_P11 11 12 APU_RST#_R RH32 1 HDT@ 2 0_0402_5% APU_RST# APU_TEST15 7 2
2 11 12 APU_TEST16
CH2 1 8 6 3
0.01U_0402_16V7K 2 7 HDT_P13 13 14 APU_TEST17 5 4
3 6 13 14
1 4 5 HDT_P15 15 16 APU_DBREQ#_R RH33 1 2 33_0402_5% APU_DBREQ# 10K_0804_8P4R_5%
15 16
4 4
10K_0804_8P4R_5% 17 18
17 18
19 20 Follow C5V08
19 20
SAMTE_ASP-136446-07-B

(3/7)_DISP/MISC/HDT
Custom 1.B
A B C D E
A B C D E
Main Func = CPU
UC1D
ACPI/AUDIO/I2C/GPIO/MISC
+1.8VALW
CC7 1 2 150P_0402_50V8J
@ CC100 1 2 150P_0402_50V8J EGPIO41/SFI_S5_EGPIO41 AW12
AU12 I2C_0_SCL RC6139 1 @ 2 2.2K_0402_5%
AGPIO39/SFI_S5_AGPIO39
APU_PCIE_RST#_C RC29 1 2 33_0402_5% APU_PCIE_RST#_R BD5 I2C_0_SDA RC6140 1 @ 2 2.2K_0402_5%
PCIE_RST0_L/EGPIO26
1 APU_PCIE1_RST#_C RC704 1 @ 2 33_0402_5% APU_PCIE1_RST#_R BB6 SW PU/PD SW PU/PD AR13 I2C_0_SCL 1
PCIE_RST1_L/EGPIO27 I2C0_SCL/SFI0_I2C_SCL/EGPIO151
EC_RSMRST# AT16 SW PU/PD1.8V_S5 AT13 I2C_0_SDA
RSMRST_L I2C0_SDA/SFI0_I2C_SDA/EGPIO152
<30> EC_RSMRST# +3VS
PBTN_OUT# AR15 SW PU/PD AN8 I2C_1_SCL
PWR_BTN_L/AGPIO0 I2C1_SCL/SFI1_I2C_SCL/EGPIO149
<30> PBTN_OUT# SYS_PWRGD_EC I2C_1_SDA I2C_1_SCL <28> SMB_0_SCL
AV6 PWR_GOOD SW PU/PD1.8V_S5 I2C1_SDA/SFI1_I2C_SDA/EGPIO150 AN9 G-SENSOR RC6157 1 2 2.2K_0402_5%
<30> SYS_PWRGD_EC SYS_RST# I2C_1_SDA <28> SMB_0_SDA
AP10 SYS_RESET_L/AGPIO1 RC6156 1 2 2.2K_0402_5%
APU_PCIE_WAKE# AV11 SW PU/PD BC20 SMB_0_SCL
WAKE_L/AGPIO2 I2C2_SCL/EGPIO113/SCL0
SMB_0_SDA SMB_0_SCL <13,14>
SW PU/PD 3.3V I2C2_SDA/EGPIO114/SDA0 BA20 DDR4
SLP_S3# SMB_0_SDA <13,14> +3VALW
AV13 SLP_S3_L
<30> SLP_S3# SLP_S5# I2C_3_SCL
AT14 SLP_S5_L SW PU/PD I2C3_SCL/AGPIO19/SCL1 AM9
<30,38> SLP_S5# I2C_3_SDA I2C_3_SCL <31> I2C_3_SCL
3.3V_S5 I2C3_SDA/AGPIO20/SDA1 AM10 Touch Pad RC6159 1 2 2.2K_0402_5%
I2C_3_SDA <31> I2C_3_SDA
AGPIO10 AR8 S0A3_GPIO/AGPIO10 RC6158 1 2 2.2K_0402_5%
PSA_I2C_SCL L16 AGPIO8 RC6167 2 @ 1 10K_0402_5%
AGPIO23 AT10 AC_PRES/AGPIO23 PSA_I2C_SDA M16
AGPIO12 AN6 LLB_L/AGPIO12 SW PU/PD
+3VS
AGPIO3 AT15 AGPIO3
AW8 AW10 AGPIO4
ACPI EGPIO42 AGPIO4/SATAE_IFDET
AGPIO5/DEVSLP0 AP9 AGPIO5

DEVSLP1 RC663 2 @ 1 10K_0402_5%
AGPIO6/DEVSLP1 AU10 DEVSLP1

+3VALW DEVSLP1 <28>
SATA_ACT_L/AGPIO130 AV15
AGPIO9 AU7 AGPIO9

RC6133 1 @ 2 10K_0402_5% APU_PCIE_WAKE# SW PU/PD3.3VALW input AU6 AGPIO40
AGPIO40
3.3VS input AGPIO69 AW13
3.3VS input AW15 G_INT#_APU
AGPIO86
HDA_BIT_CLK G_INT#_APU <28>
AR2 AZ_BITCLK/TDM_BCLK_MIC
HDA_SDIN0 AP7 AZ_SDIN0/CODEC_GPI
<29> HDA_SDIN0 HDA_SDIN1 AP1 AZ_SDIN1/SW_DATA1B/TDM_BCLK_PLAYBACK INTRUDER_ALERT AU14
Reserve for MBDG/CRB HDA_SDIN2 AP4 3.3VS Output AU16 APU_SPKR
AZ_SDIN2/SW_DATA2/TDM_DATA_PLAYBACK SPKR/AGPIO91
HDA_RST# APU_SPKR <29>
CRB use S0-rail AP3 AZ_RST_L/SW_DATA1A/SW_DATA3/TDM_DATA_MIC BLINK/AGPIO11 AV8 AGPIO11
+1.8VALW CC1210 HDA_SYNC AR4 AZ_SYNC/TDM_FRM_MIC
10U_0603_6.3V6M HDA_SDOUT AR3 3.3VS input AW16
AZ_SDOUT/TDM_FRM_PLAYBACK GENINT1_L/AGPIO89
+3VALW +3VS 1 2 3.3VS input BD15 TP_I2C_INT#_APU
GENINT2_L/AGPIO90
TP_I2C_INT#_APU <31>
@ AT2 SW_MCLK/TDM_BCLK_BT
AT4 SW_DATA0/TDM_DOUT_BT
1
AGPIO7 AR6 AGPIO7/FCH_ACP_I2S_SDIN_BT 3.3VS input FANIN0/AGPIO84 AR18

RC6165 RC28 RC54 AGPIO8 AP6 AGPIO8/FCH_ACP_I2S_LRCLK_BT 3.3VS input FANOUT0/AGPIO85 AT18
<28> AGPIO8
@ 10K_0402_1% 10K_0402_1% 22K_0402_1% FP5 REV 0.90
PART 4 OF 13
2
2 2
@ FP5_BGA_1140P
SYS_PWRGD_EC EC_RSMRST#
2 1
CC8
0.22U_0402_16V7K CC16
1U_0201_6.3V6M
1 2
AGPIO40 AGPIO9 AGPIO12 AGPIO23
H DIS Type1 DMIC x4 RSV
L UMA Type2 DMIC x2 RSV
APU_PCIE_RST#_C RC700 1 RS@ 2 0_0402_5% APU_PCIE_RST#_U

APU_PCIE1_RST#_C RC701 1 @ 2 0_0402_5%
+3VALW
APU_PCIE_RST#_U RC30 1 RS@ 2 0_0402_5% APU_PCIE_RST#
1
DIS@ T1@ DMIC4@ @
RC693 RC6147 RC6135 RC6175
10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5%
+3VALW CC14
2
0.1U_0201_10V6K
1 2 AGPIO40
@ AGPIO9
AGPIO12
5
AGPIO23
APU_PCIE_RST#_U 1
P
IN1 4 APU_PCIE_RST#
O APU_PCIE_RST# <15,26,27,28>
1
2
IN2
G
UMA@ T2@ DMIC2@ @

UC4 SA00000OH00 RC692 RC6148 RC6136 RC6174
3
2
@ MC74VHC1G08DFT2G_SC70-5 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5%

3 RC6160 3
2
10K_0402_5% @
GPIO Table
1
AGPIO10 AGPIO11
AGPIO5 AGPIO7 AGPIO3 AGPIO4 L L R535
L L 15W L L EJ L H RX540
HDA Strap Pin 25W EA RX550

L H L H H L
APU_SPI_CLK_R SYS_RST# H L 35W H L VX H H RX565
EMC@
RPC4
33_0804_8P4R_5% USE 48MHZ CRYSTAL NORMAL RESET MODE
1 8 HDA_RST# H CLOCK (Default)
<29> HDA_RST#_R HDA_BIT_CLK (Default)
2 7
<29> HDA_BIT_CLK_R HDA_SYNC
3 6
<29> HDA_SYNC_R HDA_SDOUT +3VALW +3VALW +3VALW
4 5 USE 100MHZ PCIE SHORT RESET MODE
<29> HDA_SDOUT_R L CLOCK AS
REFERENCE CLOCK
RC6172 RX540@
RPC5 10K_0402_5%
1
1K_0804_8P4R_5%
8 1 35W@ 25W@ VX@ EA@ RX565@ RX565@
7 2 RC6145 RC6137 RC6170 RC6168 RC6134 RX540@ RC619 RC6172
6 3 +1.8VS +1.8VALW +3VALW 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5%
5 4
2
AGPIO5 AGPIO3 AGPIO10
1
AGPIO7 AGPIO4 AGPIO11

RC622 RC47 RC951 RC6146 25W@ RC6171 EA@
4 10K_0402_5% @ 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5% RC619 RX550@ 4
1
1
10K_0402_5%
RC695 1 2 10K_0402_5% HDA_SDIN1 15W@ 15W@ EJ@ EJ@ R535@ R535@
2
RC696 1 2 10K_0402_5% HDA_SDIN2 RC6146 RC6138 RC6171 RC6169 RC6134 RC6173

RC703 1 @ 2 10K_0402_5% HDA_SDIN0 RC6138 35W@ 10K_0402_5% 10K_0402_5% RC6169 VX@ 10K_0402_5% 10K_0402_5% RC6173 RX550@ 10K_0402_5% 10K_0402_5%
APU_SPI_CLK_R 10K_0402_5% 10K_0402_5% 10K_0402_5%
<10> APU_SPI_CLK_R
2
2
SYS_RST#
1
RC1703 RC929
2K_0402_5% @ 2K_0402_5% @
2
FP5_(4/7)_GPIO/HDA/STRAP
Custom 1.B
A B C D E
A B C D E
Main Func = CPU
UC1E
CLK/LPC/EMMC/SD/SPI/eSPI/UART
+3VS CLKREQ_PCIE#0 AV18 CLK_REQ0_L/SATA_IS0_L/SATA_ZP0_L/AGPIO92

<28> CLKREQ_PCIE#0
AN19 CLK_REQ1_L/AGPIO115
AP19 CLK_REQ2_L/AGPIO116
AT19 CLK_REQ3_L/SATA_IS1_L/SATA_ZP1_L/EGPIO131 RC602
RC1695 1 2 10K_0402_5% CLKREQ_PCIE#0 CLKREQ_PCIE#4 AU19 33_0402_5%
CLK_REQ4_L/OSCIN/EGPIO132
CLKREQ_PCIE#5 <26> CLKREQ_PCIE#4 CLKREQ_PCIE#5 LPC_RST_A#
RC6149 1 2 10K_0402_5% AW18 CLK_REQ5_L/EGPIO120 SW PU/PD 1 2
CLKREQ_PCIE#4 <27> CLKREQ_PCIE#5 CLKREQ_PEG#6 LPC_RST# <30,31>
RC1696 1 2 10K_0402_5% AW19 CLK_REQ6_L/EGPIO121
1 CLKREQ_PEG#6 <16> CLKREQ_PEG#6 1
RC1697 1 2 10K_0402_5% 1
EGPIO70/SD_CLK BD13
SW PU/PD LPC_PD_L/SD_CMD/AGPIO21 BB14 LPCPD# TP@ T103 CC615
CLK_PCIE_P0 AK1 BB12 LPC_AD0
<28> CLK_PCIE_P0 GPP_CLK0P LAD0/SD_DATA0/EGPIO104
LPC_AD0 <31> 150P_0402_50V8J
CLK_PCIE_N0 AK3 M.2 WLAN/BT BC11 LPC_AD1 2
SSD <28> CLK_PCIE_N0 GPP_CLK0N LAD1/SD_DATA1/EGPIO105
LPC_AD1 <31>
BB15 LPC_AD2
LAD2/SD_DATA2/EGPIO106
LPC_AD3 LPC_AD2 <31>
AM2 GPP_CLK1P LAD3/SD_DATA3/EGPIO107 BC15
LPC_CLK0 LPC_AD3 <31> +3VALW
AM4 GPP_CLK1N GBE LAN SW PU/PD LPCCLK0/EGPIO74 BA15 RC449 1 2 22_0402_5%
LPC_CLK0_EC <30>
BC13 CLKRUN#
48MHz CRYSTAL AM1
AM3
GPP_CLK2P
GPP_CLK2N M.2 WWAN
SW PU/PD
LPC_CLKRUN_L/AGPIO88
LPCCLK1/EGPIO75
SERIRQ/AGPIO87
BB13
BC12
LPC_CLK1
SERIRQ
RC6163 1 TPM@ 2 22_0402_5% CLKRUN# <31>
LPC_CLK1_TPM <31>
LPC_FRAME# SERIRQ <30,31> EC_SCI#
SW PU/PD LFRAME_L/EGPIO109 BA12 RC6154 2 1 10K_0402_5%
LPC_FRAME# <30,31>
AL2 GPP_CLK3P
AL4 M.2 WLAN BD11 LPC_RST_A#
GPP_CLK3N LPC_RST_L/SD_WP_L/AGPIO32
48M_X2 BA11 +3VS
AGPIO68/SD_CD
CLK_PCIE_P4 AN2 SW PU/PD LPC_PME_L/SD_PWR_CTRL/AGPIO22 BA13 EC_SCI#
48M_X1 <26> CLK_PCIE_P4 CLK_PCIE_N4
GPP_CLK4P EC_SCI# <30>
1 RC939 2 LAN AN4 GPP_CLK4N PCIE X4 DT SLOT
<26> CLK_PCIE_N4
1M_0402_5%
CLK_PCIE_P5 AN3 GPP_CLK5P
<27> CLK_PCIE_P5 CLK_PCIE_N5
WLAN AP2 GPP_CLK5N M.2 PCIE SSD SPI_ROM_REQ/EGPIO67 BC8
<27> CLK_PCIE_N5 PE_GPIO1
2 1 SPI_ROM_GNT/AGPIO76 BB8 RC6166 2 @ 1 10K_0402_5%
2 1 CLK_PEG_P6 AJ2 GPP_CLK6P
<15> CLK_PEG_P6 CLK_PEG_N6
DGPU AJ4 GPP_CLK6N EVAL GFX SLOT ESPI_RESET_L/KBRST_L/AGPIO129 BB11 KBRST# KBRST# <30>
<15> CLK_PEG_N6
ESPI_ALERT_L/LDRQ0_L/EGPIO108 BC6
AJ3 48M_OSC RC74 10_0402_5%
YC2 BB7 APU_SPI_CLK 1 EMC@ 2
SPI_CLK/ESPI_CLK
APU_SPI_MISO APU_SPI_CLK_R <9>
48MHZ_8PF_X3S048000D81H-W BA9
SJ10000AF00 48M_X1 BB3 X48M_X1
SPI_DI/ESPI_DATA
SPI_DO
SPI_WP_L/ESPI_DAT2
BB10
BA10
APU_SPI_MOSI
APU_SPI_WP#
8MB SPI ROM
BC10 APU_SPI_HOLD#
SPI_HOLD_L/ESPI_DAT3
3 4 BC9 APU_SPI_CS#1 +SPI_VCC
SPI_CS1_L/EGPIO118
3 4 48M_X2 BA5 SW PU/PD BA8
1 1 X48M_X2 SPI_CS2_L/ESPI_CS_L/AGPIO30
SPI_CS3_L/AGPIO31 BA6
C796 C797 BD8 APU_SPI_TPMCS# APU_SPI_MISO RC1706 1 @ 2 10K_0402_5%
SPI_TPM_CS_L/AGPIO29
3.9P_0402_50V8C 3.9P_0402_50V8C
2 2 AF8 APU_SPI_WP# RC640 1 2 10K_0402_5%
RSVD_76
AF9 BA16 UART_0_ARXD_DTXD
RSVD_77 UART0_RXD/EGPIO136
UART_0_ATXD_DRXD UART_0_ARXD_DTXD <27> APU_SPI_HOLD# RC642
UART0_TXD/EGPIO138 BB18 1 2 10K_0402_5%
UART_0_ATXD_DRXD <27>
UART0_RTS_L/UART2_RXD/EGPIO137 BC17
BA18 APU_SPI_CS#1 RC639 1 2 10K_0402_5%
UART0_CTS_L/UART2_TXD/EGPIO135
T115 TP@ RTCCLK AW14 RTCCLK UART0_INTR/AGPIO139 BD18
2 APU_SPI_TPMCS# 2
RC646 1 @ 2 10K_0402_5%
32.768KHz CRYSTAL 32K_X1 AY1 X32K_X1 EGPIO141/UART1_RXD
EGPIO143/UART1_TXD
BC18
BA17
PE_GPIO1
DGPU_PWROK PE_GPIO1 <35>
DGPU_PWROK <44,45>
EGPIO142/UART1_RTS_L/UART3_RXD BC16
BB19 PE_GPIO0
EGPIO140/UART1_CTS_L/UART3_TXD
32K_X2 PE_GPIO0 <15>
AY4 X32K_X2 AGPIO144/UART1_INTR BB16
32K_X1 +1.8VALW +SPI_VCC
FP5 REV 0.90
1
PART 5 OF 13 RC1672
SJ100001K00 YC3 +1.8VS 0_0603_5%
32.768KHZ_12.5PF_CM31532768DZFT FP5_BGA_1140P
1 RS@ 2
2
2 1 32K_X2 @ RC1700
RC914 0_0603_5%
20M_0402_5% 1 @ 2
1 1
CC686 CC682
18P_0402_50V8J 18P_0402_50V8J
2 2 UC7
APU_SPI_CS#1 1 8 +SPI_VCC
APU_SPI_MISO 2 CS# VCC 7 APU_SPI_HOLD#
APU_SPI_WP# 3 DO(IO1) HOLD#(IO3) 6 APU_SPI_CLK_R
4 WP#(IO2) CLK 5 APU_SPI_MOSI
GND DI(IO0)
2
W25Q64FWSSIQ_SOIC_8P @
SA00006ZV10 CC635
USB Function 1
0.1U_0201_10V6K
@EMC@
APU_SPI_CLK_R 1 @EMC@2 1 2
RC680 CC636
10_0402_5% 10P_0402_50V8J
+1.8VALW
RC94 1 2 4.7K_0402_5% APU_USBC_SCL

UC1J
3 3
RC95 1 2 4.7K_0402_5% APU_USBC_SDA
USB
USB20_P0 AE7 AD2 USB3_ATX_DRX_P0

USB_0_DP0 USBC0_A2/USB_0_TXP0/DP3_TXP2
<33> USB20_P0 USB20_N0 USB3_ATX_DRX_N0 USB3_ATX_DRX_P0 <33>
Type-A MB CHG AE6 USB_0_DM0 USBC0_A3/USB_0_TXN0/DP3_TXN2 AD4
<33> USB20_N0 Port 0 USB3_ATX_DRX_N0 <33>
USB20_P1 USB3_ARX_DTX_P0 Type-A MB CHG
AG10 USB_0_DP1 USBC0_B11/USB_0_RXP0/DP3_TXP3 AC2 USB3_ARX_DTX_P0 <33>
<33> USB20_P1 USB20_N1 USB3_ARX_DTX_N0
Type-A SUB AG9 USB_0_DM1 USBC0_B10/USB_0_RXN0/DP3_TXN3 AC4 USB3_ARX_DTX_N0 <33>
<33> USB20_N1 Controller 0
USB20_P2 AF12 AF4
USB_0_DP2 USBC0_B2/DP3_TXP1
<34> USB20_P2 USB20_N2
Type-C MB AF11 USB_0_DM2 USBC0_B3/DP3_TXN1 AF2
<34> USB20_N2
USB20_P3 AE10 AE3
USB_0_DP3 USBC0_A11/DP3_TXP0
<27> USB20_P3 USB20_N3
WLAN/BT AE9 USB_0_DM3 USBC0_A10/DP3_TXN0 AE1
<27> USB20_N3
USB20_P4 AJ12 AG3
USB_1_DP0 USB_0_TXP1
<24> USB20_P4 USB20_N4
CAMERA AJ11 USB_1_DM0 Port 1 USB_0_TXN1 AG1
<24> USB20_N4 Controller 1
USB20_P5 AD9 AJ9
USB_1_DP1 USB_0_RXP1
<33> USB20_P5 USB20_N5
USB Hub AD8 USB_1_DM1 USB_0_RXN1 AJ8
<33> USB20_N5
AG4 USB3_ATX_DRX_P2
USB_0_TXP2
USB3_ATX_DRX_N2 USB3_ATX_DRX_P2 <34>
Port 2 USB_0_TXN2 AG2
USB3_ATX_DRX_N2 <34>
USB3_ARX_DTX_P2 Type-C MB
USB_0_RXP2 AG7
APU_USBC_SCL USB3_ARX_DTX_N2 USB3_ARX_DTX_P2 <34>
AM6 USBC_I2C_SCL USB_0_RXN2 AG6
USB3_ARX_DTX_N2 <34>
APU_USBC_SDA AM7 AA2 USB3_ATX_DRX_P3
USBC_I2C_SDA USBC1_A2/USB_0_TXP3/DP2_TXP2
USB3_ATX_DRX_N3 USB3_ATX_DRX_P3 <34>
Port 3 USBC1_A3/USB_0_TXN3/DP2_TXN2 AA4
USB3_ATX_DRX_N3 <34>
+3VALW USB3_ARX_DTX_P3 Type-C MB
USBC1_B11/USB_0_RXP3/DP2_TXP3 Y1
USB3_ARX_DTX_N3 USB3_ARX_DTX_P3 <34>
USBC1_B10/USB_0_RXN3/DP2_TXN3 Y3 USB3_ARX_DTX_N3 <34>
RC905 1 @ 2 100K_0402_5% USB_OC0# AC1
USBC1_B2/DP2_TXP1
USBC1_B3/DP2_TXN1 AC3
RC61621 @ 2 100K_0402_5% USB_OC2# USB_OC0# AK10 USB_OC0_L/AGPIO16
<33> USB_OC0#
AK9 USB_OC1_L/AGPIO17 USBC1_A11/DP2_TXP0 AB2
USB_OC2# AL9 AB4
USB_OC2_L/AGPIO18 USBC1_A10/DP2_TXN0
<34> USB_OC2#
AL8 USB_OC3_L/AGPIO24
AW7 AGPIO14/USB_OC4_L USB_1_TXP0 AH4
AT12 AGPIO13/USB_OC5_L SW PU/PD Port 4 USB_1_TXN0 AH2
4 4
USB_1_RXP0 AK7
USB_1_RXN0 AK6
FP5 REV 0.90
PART 10 OF 13
FP5_BGA_1140P
@

FP5_(5/7)_CLK/USB/SPI/LPC
Custom 1.B
A B C D E
A B C D E
Main Func = CPU

UC1F
TDC: 10A POWER TDC: 53A

EDC: 13A M15 VDDCR_SOC_1 VDDCR_1 G7 EDC: 70A
+APU_CORE_SOC +APU_CORE
M18 VDDCR_SOC_2 VDDCR_2 G10
M19 VDDCR_SOC_3 VDDCR_3 G12
SCL/MBDG: N16 VDDCR_SOC_4 VDDCR_4 G14
7*22uF (BU) N18 VDDCR_SOC_5 VDDCR_5 H8
1*1uF (BU) N20 H11
1*180pF (BU) VDDCR_SOC_6 VDDCR_6
P17 VDDCR_SOC_7 VDDCR_7 H15
1
P19 VDDCR_SOC_8 VDDCR_8 K7 1
R18 VDDCR_SOC_9 VDDCR_9 K12
R20 VDDCR_SOC_10 VDDCR_10 K14
T19 VDDCR_SOC_11 VDDCR_11 L8
U18 VDDCR_SOC_12 VDDCR_12 M7
U20 M10 SCL/MBDG:
+APU_CORE_SOC Cap V19
VDDCR_SOC_13
VDDCR_SOC_14
VDDCR_13
VDDCR_14 N14 16*22uF (BU)
1*180pF (BU)
place at Power Side W18
W20
VDDCR_SOC_15
VDDCR_SOC_16
VDDCR_15
VDDCR_16
P7
P10
Y19 VDDCR_SOC_17 VDDCR_17 P13
VDDCR_18 P15
+1.2V TDC: 6A T32 VDDIO_MEM_S3_1 VDDCR_19 R8
V28 VDDIO_MEM_S3_2 VDDCR_20 R14
W28 VDDIO_MEM_S3_3 VDDCR_21 R16
W32 T7
Y22
VDDIO_MEM_S3_4
VDDIO_MEM_S3_5
VDDCR_22
VDDCR_23 T10 +APU_CORE Cap place at Power Side
Y25 VDDIO_MEM_S3_6 VDDCR_24 T13
Y28 VDDIO_MEM_S3_7 VDDCR_25 T15
AA20 VDDIO_MEM_S3_8 VDDCR_26 T17
AA23 VDDIO_MEM_S3_9 VDDCR_27 U14
SCL/MBDG: AA26 VDDIO_MEM_S3_10 VDDCR_28 U16
9*22uF (BU) AA28 VDDIO_MEM_S3_11 VDDCR_29 V13
+1.2V +1.2V 2*1uF (BU) AA32 V15
VDDIO_MEM_S3_12 VDDCR_30
4*0.22uF
1*180pF (BU) AC20 VDDIO_MEM_S3_13 VDDCR_31 V17
2*180pF AC22 VDDIO_MEM_S3_14 VDDCR_32 W7
AC25 VDDIO_MEM_S3_15 VDDCR_33 W10
CC1008 22U_0603_6.3V6M
CC1057 22U_0603_6.3V6M
CC1058 22U_0603_6.3V6M
CC1059 22U_0603_6.3V6M
CC1060 22U_0603_6.3V6M
CC1061 22U_0603_6.3V6M
CC1062 22U_0603_6.3V6M
CC1063 22U_0603_6.3V6M
CC1163 22U_0603_6.3V6M
CC1165 1U_0201_6.3V6M
CC1164 1U_0201_6.3V6M
CC1093 180P_0402_50V8J
CC1082 0.22U_0402_16V7K
CC1081 0.22U_0402_16V7K
CC1079 0.22U_0402_16V7K
CC1078 0.22U_0402_16V7K
CC1167 180P_0402_50V8J
CC1166 180P_0402_50V8J
AC28 VDDIO_MEM_S3_16 VDDCR_34 W14
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 AD23 VDDIO_MEM_S3_17 VDDCR_35 W16
AD26 VDDIO_MEM_S3_18 VDDCR_36 Y8
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 AE20 VDDIO_MEM_S3_21 VDDCR_39 Y17
AE22 VDDIO_MEM_S3_22 VDDCR_40 AA7
AF23 VDDIO_MEM_S3_25 VDDCR_43 AA16
2 AF26 AA18 2
AF28 VDDIO_MEM_S3_27 VDDCR_45 AB13
AF32 VDDIO_MEM_S3_28 VDDCR_46 AB15
AG20 VDDIO_MEM_S3_29 VDDCR_47 AB17
AG22 VDDIO_MEM_S3_30 VDDCR_48 AB19
AG25 AC14
All BU(on bottom side under SOC) ACROSS VDDIO AND VSS SPLIT AG28
VDDIO_MEM_S3_31
VDDIO_MEM_S3_32
VDDCR_49
VDDCR_50 AC16
AJ20 VDDIO_MEM_S3_33 VDDCR_51 AC18
AJ23 VDDIO_MEM_S3_34 VDDCR_52 AD7
AJ26 VDDIO_MEM_S3_35 VDDCR_53 AD10
SCL/MBDG: SCL/MBDG: AJ28 VDDIO_MEM_S3_36 VDDCR_54 AD13
1 *22uF (BO) 1 *22uF (BO) AJ32 VDDIO_MEM_S3_37 VDDCR_55 AD15
+1.8VS +VDDIO_AUDIO 1*1uF (BU) +3VS +3VS_APU 2*1uF (BO+BU) AK28 AD17
RC1677 RC1676 AL28 VDDIO_MEM_S3_39 VDDCR_57 AD19
0_0402_5% 0_0402_5% AL32 VDDIO_MEM_S3_40 VDDCR_58 AE8
1 RS@ 2 1 RS@ 2 TDC :0.2A VDDCR_59 AE14
+VDDIO_AUDIO AP12 VDDCR_60 AE16
VDDIO_AUDIO
CC1207
CC1192
CC1137
CC1208
CC1209
VDDCR_61 AE18
1 1 1 1 1 TDC :0.25A AL18 VDD_33_1 VDDCR_62 AF7
+3VS_APU
AM17 VDD_33_2 VDDCR_63 AF10
VDDCR_64 AF13
22U_0603_6.3V6M
1U_0201_6.3V6M
22U_0603_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
+1.8VS TDC :2A AL20 VDD_18_1 VDDCR_65 AF15

2 2 2 2 2 AM19 VDD_18_2 VDDCR_66 AF17
VDDCR_67 AF19
+1.8VALW
TDC :0.5A AL19 VDD_18_S5_1 VDDCR_68 AG14
AM18 VDD_18_S5_2 VDDCR_69 AG16
VDDCR_70 AG18
TDC :0.25A AL17 VDD_33_S5_1 VDDCR_71 AH13
+3VALW
AM16 VDD_33_S5_2 VDDCR_72 AH15
AH17
BO BU BO BO BU TDC :1A AL14 VDDP_S5_1
VDDCR_73
VDDCR_74 AH19
+0.9VALW
AL15 VDDP_S5_2 VDDCR_75 AJ7
AM14 VDDP_S5_3 VDDCR_76 AJ10
VDDCR_77 AJ14
+0.9VS
TDC :4A AL13 VDDP_1 VDDCR_78 AJ16
3 SCL/MBDG: SCL/MBDG: SCL/MBDG: AM12 VDDP_2 VDDCR_79 AJ18 3
+1.8VS 1 *22uF (BO) +1.8VALW 1 *22uF (BO) +3VALW 1 *22uF (BO) AM13 VDDP_3 VDDCR_80 AK13
2*1uF (BO+BU) 2*1uF (BO+BU) 2*1uF (BO+BU) AN12 AK15
VDDP_4 VDDCR_81
AN13 VDDP_5 VDDCR_82 AK17
TDC :4.5uA VDDCR_83 AK19
+RTC_APU_R +RTCBATT
CC1189 22U_0603_6.3V6M
CC1190 1U_0201_6.3V6M
CC1191 1U_0201_6.3V6M
CC1186 22U_0603_6.3V6M
CC1187 1U_0201_6.3V6M
CC1188 1U_0201_6.3V6M
CC1183 22U_0603_6.3V6M
CC1184 1U_0201_6.3V6M
CC1185 1U_0201_6.3V6M
AT11 VDDBT_RTC_G
1 1 1 1 1 1 1 1 1
FP5 REV 0.90
PART 6 OF 13 JRTC1
FP5_BGA_1140P 1
2 2 2 2 2 2 2 2 2 2 1
@ 2
3
4 GND
GND
RTC OF APU ACES_50271-0020N-001

CONN@
BO BO BU BO BO BU BO BO BU
SP02000RO00
+RTC_APU_R +RTC_APU +RTCVCC +RTCBATT
Vo=1.5V
RC6161
close to UC1 RC6164 UC8 SA000066U00 DC1 1K_0402_5% +CHGRTC
SCL/MBDG: SCL/MBDG: W=20mils 1K_0402_5% AP2138N-1.5TRG1_SOT23-3 3 1 2
+0.9VS 2 *22uF (BO) +0.9VALW 1 *22uF (BO) 1 2 3
8*1uF (BOx4+BUx4) 3*1uF (BOx1+BUx2) Vout 1 1
1*180pF (BU) Vin
2
GND
1
1 1 1 2
CC1168
CC1169
CC1170
CC1171
CC1172
CC1177
CC1176
CC1173
CC1174
CC1175
CC1178
CC1179
CC1180
CC1181
CC1182
1
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 CC166 CC923 CLRP1 @ CC119 CC120
0.22U_0402_16V7K 1U_0201_6.3V6M 0_0603_5% 0.1U_0201_10V6K 680P_0402_50V7K CHN202UPT_SC70-3
2 2 2
2
2
22U_0603_6.3V6M
22U_0603_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
180P_0402_50V8J
22U_0603_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
4 4
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
Need OPEN
for Clear CMOS
BO BOx4 BUx4 BU BO BO BU
(6/7)_PWR
Custom 1.B
A B C D E
5 4 3 2 1
Main Func = CPU UC1G

UC1H UC1K
GND
N12 VSS_316 VSS_62 K32 GND
A3 VSS_1 VSS_63 L5 V8 VSS_124 VSS_186 AG8 GND/RSVD
A5 VSS_2 VSS_64 L13 V11 VSS_125 VSS_187 AG11 AR5 VSS_248 VSS_310 BD16
D A19 VSS_8 VSS_70 M1 V22 VSS_131 VSS_193 AH14 AR21 VSS_254 D
A21 VSS_9 VSS_71 M5 V25 VSS_132 VSS_194 AH16 AR26 VSS_255
A23 VSS_10 VSS_72 M12 W1 VSS_133 VSS_195 AH18 AR28 VSS_256
A26 VSS_11 VSS_73 M21 W5 VSS_134 VSS_196 AH20 AR32 VSS_257
A30 VSS_12 VSS_74 M23 W13 VSS_135 VSS_197 AJ1 AU5 VSS_258
C3 VSS_13 VSS_75 M26 W15 VSS_136 VSS_198 AJ5 AU8 VSS_259
C32 VSS_14 VSS_76 M28 W17 VSS_137 VSS_199 AJ13 AU11 VSS_260
D16 VSS_15 VSS_77 M32 W19 VSS_138 VSS_200 AJ15 AU13 VSS_261
D18 VSS_16 VSS_78 N4 W23 VSS_139 VSS_201 AJ17 AU15 VSS_262
D20 VSS_17 VSS_79 N5 W26 VSS_140 VSS_202 AJ19 AU18 VSS_263
E7 VSS_18 VSS_80 N8 Y5 VSS_141 VSS_203 AK5 AU20 VSS_264
E8 VSS_19 VSS_81 N11 Y11 VSS_142 VSS_204 AK8 AU22 VSS_265
E10 VSS_20 VSS_82 N13 Y12 VSS_143 VSS_205 AK11 AU25 VSS_266 RSVD_1 B20
E11 VSS_21 VSS_83 N15 Y14 VSS_144 VSS_206 AK12 AU28 VSS_267 RSVD_5 G3
E12 VSS_22 VSS_84 N17 Y16 VSS_145 VSS_207 AK14 AV1 VSS_268 RSVD_7 J20
E13 VSS_23 VSS_85 N19 Y18 VSS_146 VSS_208 AK16 AV5 VSS_269 RSVD_8 K3
E14 VSS_24 VSS_86 N22 Y20 VSS_147 VSS_209 AK18 AV7 VSS_270 RSVD_9 K6
E15 VSS_25 VSS_87 N25 AA1 VSS_148 VSS_210 AK20 AV10 VSS_271 RSVD_10 K20
E16 VSS_26 VSS_88 N28 AA5 VSS_149 VSS_211 AK22 AV12 VSS_272 RSVD_11 M3
E18 VSS_27 VSS_89 P1 AA13 VSS_150 VSS_212 AK25 AV14 VSS_273 RSVD_12 M6
E19 VSS_28 VSS_90 P5 AA15 VSS_151 VSS_213 AL1 AV16 VSS_274 RSVD_13 M13
E20 VSS_29 VSS_91 P14 AA17 VSS_152 VSS_214 AL5 AV19 VSS_275 RSVD_22 P6
E21 VSS_30 VSS_92 P16 AA19 VSS_153 VSS_215 AL7 AV21 VSS_276 RSVD_23 P22
E22 VSS_31 VSS_93 P18 AB14 VSS_154 VSS_216 AL10 AV23 VSS_277 RSVD_30 T3
E26 VSS_34 VSS_96 P26 AB20 VSS_157 VSS_219 AL23 AV32 VSS_280 RSVD_44 W6
E27 VSS_35 VSS_97 P28 AC5 VSS_158 VSS_220 AL26 AW5 VSS_281 RSVD_49 W21
F5 VSS_36 VSS_98 P32 AC8 VSS_159 VSS_221 AM5 AW28 VSS_282 RSVD_50 W22
C F28 VSS_37 VSS_99 R5 AC11 VSS_160 VSS_222 AM8 AY6 VSS_283 RSVD_57 Y21 C
G1 VSS_38 VSS_100 R11 AC12 VSS_161 VSS_223 AM15 AY7 VSS_284 RSVD_58 Y27
G5 VSS_39 VSS_101 R12 AC13 VSS_162 VSS_224 AM20 AY8 VSS_285 RSVD_59 AA3
G16 VSS_40 VSS_102 R13 AC15 VSS_163 VSS_225 AM22 AY10 VSS_286 RSVD_60 AA6
G19 VSS_41 VSS_103 R15 AC17 VSS_164 VSS_226 AM25 AY11 VSS_287 RSVD_69 AC29
G21 VSS_42 VSS_104 R17 AC19 VSS_165 VSS_227 AM28 AY12 VSS_288 RSVD_70 AD3
G23 VSS_43 VSS_105 R19 AD1 VSS_166 VSS_228 AN1 AY13 VSS_289 RSVD_71 AD6
G26 VSS_44 VSS_106 R22 AD5 VSS_167 VSS_229 AN5 AY14 VSS_290 RSVD_74 AF3
H5 VSS_47 VSS_109 R30 AD18 VSS_170 VSS_232 AN15 AY18 VSS_293 RSVD_79 AJ6
H13 VSS_48 VSS_110 T1 AD20 VSS_171 VSS_233 AN18 AY19 VSS_294 RSVD_80 AJ24
H18 VSS_49 VSS_111 T5 AE5 VSS_172 VSS_234 AN21 AY20 VSS_295 RSVD_81 AK23
H20 VSS_50 VSS_112 T14 AE11 VSS_173 VSS_235 AN23 AY21 VSS_296 RSVD_82 AK27
H22 VSS_51 VSS_113 T16 AE12 VSS_174 VSS_236 AN26 AY22 VSS_297 RSVD_83 AL3
H25 VSS_52 VSS_114 T18 AE13 VSS_175 VSS_237 AN28 AY23 VSS_298 RSVD_87 AN29
H28 VSS_53 VSS_115 T20 AE15 VSS_176 VSS_238 AN32 AY25 VSS_299 RSVD_88 AN31
K1 VSS_54 VSS_116 T23 AE17 VSS_177 VSS_239 AP5 AY26 VSS_300
K5 VSS_55 VSS_117 T26 AE19 VSS_178 VSS_240 AP8 AY27 VSS_301
K16 VSS_56 VSS_118 T28 AF1 VSS_179 VSS_241 AP13 BB1 VSS_302
K19 VSS_57 VSS_119 U13 AF5 VSS_180 VSS_242 AP15 BB20 VSS_303
K21 VSS_58 VSS_120 U15 AF14 VSS_181 VSS_243 AP18 BB32 VSS_304 RSVD_14 M14
K22 VSS_59 VSS_121 U17 AF16 VSS_182 VSS_244 AP20 BD3 VSS_305 RSVD_84 AL6
K26 VSS_60 VSS_122 U19 AF18 VSS_183 VSS_245 AP25 BD7 VSS_306 RSVD_85 AL11
K28 VSS_61 VSS_123 V5 AF20 VSS_184 VSS_246 AP28 BD10 VSS_307 RSVD_86 AN16
FP5 REV 0.90 AG5 VSS_185 VSS_247 AR1 BD12 VSS_308
PART 7 OF 13 FP5 REV 0.90 BD14 VSS_309
PART 8 OF 13 FP5 REV 0.90
FP5_BGA_1140P
PART 11 OF 13
B @ FP5_BGA_1140P B
@ FP5_BGA_1140P
@
UC1M UC1L
CAMERAS RSVD
T11 RSVD_32 RSVD_62 AA9
A18 CAM0_CSI2_CLOCKP CAM0_CLK B15 RSVD_61 AA8
C18 CAM0_CSI2_CLOCKN AC7 RSVD_66 RSVD_65 AC6
CAM0_I2C_SCL D15
A15 CAM0_CSI2_DATAP0 CAM0_I2C_SDA C14
C15 CAM0_CSI2_DATAN0 Y9 RSVD_55
CAM0_SHUTDOWN B13 Y10 RSVD_56 RSVD_72 AD11
B16 CAM0_CSI2_DATAP1
C16 CAM0_CSI2_DATAN1 W11 RSVD_47 RSVD_67 AC9
W12 RSVD_48 RSVD_63 AA11
C19 CAM0_CSI2_DATAP2
B18 CAM0_CSI2_DATAN2 V9 RSVD_38 RSVD_33 T12
V10 RSVD_39 RSVD_73 AD12
B17 CAM0_CSI2_DATAP3
D17 CAM0_CSI2_DATAN3 RSVD_53 Y6
RSVD_54 Y7
D12 CAM1_CSI2_CLOCKP CAM1_CLK B10
B12 CAM1_CSI2_CLOCKN AA12 RSVD_64 RSVD_45 W8
CAM1_I2C_SCL A11 AC10 RSVD_68 RSVD_46 W9
C13 CAM1_CSI2_DATAP0 CAM1_I2C_SDA C11
A13 CAM1_CSI2_DATAN0
A A
CAM1_SHUTDOWN D11 FP5 REV 0.90
B11 CAM1_CSI2_DATAP1 PART 12 OF 13
C12 CAM1_CSI2_DATAN1 CAM_PRIV_LED D13 FP5_BGA_1140P
CAM_IR_ILLU D10
J13 FP5 REV 0.90
@
RSVD_6
PART 13 OF 13
FP5_BGA_1140P Issued Date 2017/12/25 Deciphered Date 2019/12/25 Title
@
FP5_(7/7)_GND/RSVD/CSI
Custom 1.B
5 4 3 2 1
A B C D E
Reverse Type-4H
2-3A to 1 DIMMs/channel
JDIMM1A
DDR_A_CLK0 REVERSE DDR_A_DQ0 DDR_A_DQ[7..0] <7>
137 8
<7> DDR_A_CLK0 DDR_A_CLK0# CK0(T) DQ0 DDR_A_DQ1
139 7
<7> DDR_A_CLK0# DDR_A_CLK1 138 CK0#(C) DQ1 20 DDR_A_DQ2 +1.2V +1.2V
<7> DDR_A_CLK1 DDR_A_CLK1# CK1(T) DQ2 DDR_A_DQ3
140 21 JDIMM1B
1
Address : A0 <7>
<7>
DDR_A_CLK1#
DDR_A_CKE0
DDR_A_CKE0
DDR_A_CKE1
109
110
CK1#(C)
CKE0
DQ3
DQ4
DQ5
4
3
16
DDR_A_DQ4
DDR_A_DQ5
DDR_A_DQ6
Follow CRB design
111
112
REVERSE
VDD1 VDD11
141
142
1
<7> DDR_A_CKE1 CKE1 DQ6 17 DDR_A_DQ7 117 VDD2 VDD12 147
+3VS DDR_A_CS0# 149 DQ7 13 DDR_A_DQS0 +1.2V 118 VDD3 VDD13 148
<7> DDR_A_CS0# DDR_A_CS1# 157 S0# DQS0(T) 11 DDR_A_DQS0# DDR_A_DQS0 <7> 123 VDD4 VDD14 153
<7> DDR_A_CS1# S1# DQS0#(C) DDR_A_DQS0# <7> VDD5 VDD15
162 124 154
S2#/C0 DDR_A_DQ[15..8] <7> VDD6 VDD16
2
165 28 DDR_A_DQ8 129 159
S3#/C1 DQ8 VDD7 VDD17
1
29 DDR_A_DQ9 RD3 130 160

DDR_A_ODT0 DQ9 DDR_A_DQ10 +3VS VDD8 VDD18 +0.6VS
0_0402_5%
RD5
0_0402_5%
RD6
0_0402_5%
RD7
155 41 1K_0402_1% 135 163

<7> DDR_A_ODT0 DDR_A_ODT1 161 ODT0 DQ10 42 DDR_A_DQ11 +VREFA_CA 136 VDD9 VDD19
<7> DDR_A_ODT1 ODT1 DQ11 DDR_A_DQ12 VDD10 +2.5V
24
1
@ @ @ DDR_A_BG0 115 DQ12 25 DDR_A_DQ13 255 258
<7> DDR_A_BG0
2
DDR_A_BG1 113 BG0 DQ13 38 DDR_A_DQ14 VDDSPD VTT

<7> DDR_A_BG1 DDR_A_BA0 150 BG1 DQ14 37 DDR_A_DQ15 15mil 164 257
DDR_A_SA2 <7> DDR_A_BA0 DDR_A_BA1 BA0 DQ15 DDR_A_DQS1 VREFCA VPP1
145 34 259
DDR_A_SA1 <7> DDR_A_BA1 BA1 DQS1(T) DDR_A_DQS1# DDR_A_DQS1 <7> VPP2
CD20 4.7U_0402_6.3V6M
CD22 0.1U_0201_10V6K
CD21 0.1U_0201_10V6K
CD19 1000P_0402_50V7K
32
DDR_A_SA0 <7> DDR_A_MA[13..0] DDR_A_MA0 DQS1#(C) DDR_A_DQS1# <7>
CD31 1U_0201_6.3V6M
144 1 99
A0 DDR_A_DQ[23..16] <7> VSS VSS
2
DDR_A_MA1 133 50 DDR_A_DQ16 2 102
A1 DQ16 1 2 2 1 VSS VSS
1
DDR_A_MA2 132 49 DDR_A_DQ17 RD4 5 103

DDR_A_MA3 A2 DQ17 DDR_A_DQ18 VSS VSS 1
RS@
0_0402_5%
RD8
RS@
0_0402_5%
RD9
RS@
0_0402_5%
RD10
131 62 1K_0402_1% 6 106

DDR_A_MA4 128 A3 DQ18 63 DDR_A_DQ19 9 VSS VSS 107
DDR_A_MA5 126 A4 DQ19 46 DDR_A_DQ20 2 1 1 2 10 VSS VSS 167
1
DDR_A_MA6 127 A5 DQ20 45 DDR_A_DQ21 14 VSS VSS 168 2
2

CD1 @EMC@ DDR_A_MA8 125 A7 DQ22 59 DDR_A_DQ23 18 VSS VSS 172
.1U_0402_16V7K DDR_A_MA9 121 A8 DQ23 55 DDR_A_DQS2 19 VSS VSS 175
DDR_A_RST# DDR_A_MA10 A9 DQS2(T) DDR_A_DQS2# DDR_A_DQS2 <7> VSS VSS
2 1 146 53 22 176
DDR_A_MA11 A10_AP DQS2#(C) DDR_A_DQS2# <7> VSS VSS
120 23 180
DDR_A_MA12 A11 DDR_A_DQ24 DDR_A_DQ[31..24] <7> VSS VSS
119 70 26 181 CRB use 1uF x1
DDR_A_MA14_WE# 151 A13 DQ25 83 DDR_A_DQ26 30 VSS VSS 185
Note:
<7>
<7>
DDR_A_MA14_WE#
DDR_A_MA15_CAS#
DDR_A_MA15_CAS#
DDR_A_MA16_RAS#
156 A14_WE#
A15_CAS#
DQ26
DQ27
84 DDR_A_DQ27
DDR_A_DQ28
Place near to SO-DIMM connector. 31 VSS
VSS
VSS
VSS
188
Layout Note: 152 66 35 189
Check voltage tolerance of <7> DDR_A_MA16_RAS# A16_RAS# DQ28 67 DDR_A_DQ29 36 VSS VSS 192
Place near JDIMM1 VREF_DQ at the DIMM socket DDR_A_ACT# 114 DQ29 79 DDR_A_DQ30 39 VSS VSS 193
<7> DDR_A_ACT# ACT# DQ30 DDR_A_DQ31 VSS VSS
80 40 196
2 DDR4 support Even Parity check in DRAMs. DDR_A_PAR 143 DQ31 76 DDR_A_DQS3 43 VSS VSS 197 2
<7> DDR_A_PAR DDR_A_ALERT# PARITY DQS3(T) DDR_A_DQS3# DDR_A_DQS3 <7> VSS VSS
116 74 44 201
<7> DDR_A_ALERT# DDR_A_EVENT# ALERT# DQS3#(C) DDR_A_DQS3# <7> VSS VSS
CRB use 0.1uF x12 (6 pop,6 unpop),180pF x1,100uF x2 134 47 202
<7> DDR_A_EVENT# DDR_A_RST# EVENT# DDR_A_DQ32 DDR_A_DQ[39..32] <7> VSS VSS
108 174 48 205
+1.2V <7> DDR_A_RST# RESET# DQ32 DDR_A_DQ33 VSS VSS
173 51 206
DQ33 187 DDR_A_DQ34 52 VSS VSS 209
SMB_0_SDA 254 DQ34 186 DDR_A_DQ35 56 VSS VSS 210
<9,14> SMB_0_SDA SMB_0_SCL SDA DQ35 DDR_A_DQ36 VSS VSS
253 170 57 213
<9,14> SMB_0_SCL SCL DQ36 DDR_A_DQ37 VSS VSS
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
169 60 214
DDR_A_SA2 166 DQ37 183 DDR_A_DQ38 61 VSS VSS 217
1 1 1 1 1 1 DDR_A_SA1 SA2 DQ38 DDR_A_DQ39 VSS VSS
CD2
CD3
CD4
CD5
CD6
CD7
260 182 64 218

DDR_A_SA0 256 SA1 DQ39 179 DDR_A_DQS4 65 VSS VSS 222
SA0 DQS4(T) 177 DDR_A_DQS4# DDR_A_DQS4 <7> 68 VSS VSS 223
2 2 2 2 2 2 DQS4#(C) DDR_A_DQS4# <7> VSS VSS
69 226
DDR_A_DQ40 DDR_A_DQ[47..40] <7> VSS VSS
92 195 72 227
91 CB0_NC DQ40 194 DDR_A_DQ41 73 VSS VSS 230
+1.2V 104 CB6_NC DQ46 204 DDR_A_DQ47 86 VSS VSS 243
97 CB7_NC DQ47 200 DDR_A_DQS5 89 VSS VSS 244
Follow MA51 95 DQS8(T) DQS5(T) 198 DDR_A_DQS5# DDR_A_DQS5 <7>
90 VSS VSS 247
DQS8#(C) DQS5#(C) DDR_A_DQS5# <7> VSS VSS
93 248
DDR_A_DQ48 DDR_A_DQ[55..48] <7> VSS VSS
1 216 94 251
<7> DDR_A_DM[7..0] DDR_A_DM0 DQ48 DDR_A_DQ49 VSS VSS
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
@ 12 215 98 252
+ CD18 DDR_A_DM1 33 DM0#/DBI0# DQ49 228 DDR_A_DQ50 VSS VSS
1 1 1 1 1 1 DDR_A_DM2 DM1#/DBI1# DQ50 DDR_A_DQ51
CD10
CD11
CD12
CD13
CD14
CD15
330U_D2_2V_Y 54 229 262 261

DDR_A_DM3 75 DM2#/DBI2# DQ51 211 DDR_A_DQ52 GND GND
2 DDR_A_DM4 178 DM3#/DBI3# DQ52 212 DDR_A_DQ53
2 2 2 2 2 2 SGA00009S00 DDR_A_DM5 199 DM4#/DBI4# DQ53 224 DDR_A_DQ54 LOTES_ADDR0206-P001A
330U 2V H1.9 DDR_A_DM6 220 DM5#/DBI5# DQ54 225 DDR_A_DQ55
CONN@
9mohm POLY DDR_A_DM7 241 DM6#/DBI6# DQ55 221 DDR_A_DQS6
DM7#/DBI7# DQS6(T) DDR_A_DQS6# DDR_A_DQS6 <7>
96 219
3 DM8#/DBI8# DQS6#(C) DDR_A_DQS6# <7> 3
DDR_A_DQ56 DDR_A_DQ[63..56] <7>

237
+1.2V DQ56 236 DDR_A_DQ57
DQ57 249 DDR_A_DQ58
DQ58 250 DDR_A_DQ59
DQ59 232 DDR_A_DQ60
DQ60 233 DDR_A_DQ61
DQ61 DDR_A_DQ62
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
180P_0402_50V8J
2 2 2 2 2 245
DQ62 DDR_A_DQ63
CD61
CD62
CD63
CD64
CD65
246
DQ63 242 DDR_A_DQS7
DQS7(T) DDR_A_DQS7# DDR_A_DQS7 <7>
240
1 1 1 1 1 DQS7#(C) DDR_A_DQS7# <7>
LOTES_ADDR0206-P001A
CONN@ Layout Note:
Place near JDIMM1.258
CRB use 4.7uF x1,0.1uF x1
+0.6VS
Layout Note: Layout Note:
Place near JDIMM1.257,259 Place near JDIMM1.255
10U_0603_6.3V6M
10U_0603_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1 1 1 1
CD27
CD28
CD29
CD30
CRB use 0.1uF x2,180pF x1 CRB use 1uF x1
+2.5V +3VS 2 2 2 2
4 4
10U_0603_6.3V6M
10U_0603_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1 1 1 1
CD23
CD24
CD25
CD26
2 2 2 2

DDR4_SO-DIMM
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.B
A B C D E
A B C D E
Reverse Type-8H
2-3A to 1 DIMMs/channel
JDIMM2A
DDR_B_CLK0 RESERVE DDR_B_DQ0 DDR_B_DQ[7..0] <7>
137 8
<7> DDR_B_CLK0 DDR_B_CLK0# CK0(T) DQ0 DDR_B_DQ1
139 7
<7> DDR_B_CLK0# DDR_B_CLK1 138 CK0#(C) DQ1 20 DDR_B_DQ2 +1.2V +1.2V
<7> DDR_B_CLK1 DDR_B_CLK1# CK1(T) DQ2 DDR_B_DQ3
140 21 JDIMM2B
1
Address : A2 <7>
<7>
DDR_B_CLK1#
DDR_B_CKE0
DDR_B_CKE0
DDR_B_CKE1
109
110
CK1#(C)
CKE0
DQ3
DQ4
DQ5
4
3
16
DDR_B_DQ4
DDR_B_DQ5
DDR_B_DQ6
Follow CRB design
111
112
RESERVE
VDD1 VDD11
141
142
1
<7> DDR_B_CKE1 CKE1 DQ6 17 DDR_B_DQ7 117 VDD2 VDD12 147
+3VS DDR_B_CS0# 149 DQ7 13 DDR_B_DQS0 +1.2V 118 VDD3 VDD13 148
<7> DDR_B_CS0# DDR_B_CS1# 157 S0# DQS0(T) 11 DDR_B_DQS0# DDR_B_DQS0 <7> 123 VDD4 VDD14 153
<7> DDR_B_CS1# S1# DQS0#(C) DDR_B_DQS0# <7> VDD5 VDD15
162 124 154
S2#/C0 DDR_B_DQ[15..8] <7> VDD6 VDD16
2
165 28 DDR_B_DQ8 129 159
S3#/C1 DQ8 VDD7 VDD17
1
DDR_B_DQ9
10K_0402_5%
RD244
29 RD243 130 160

DDR_B_ODT0 DQ9 DDR_B_DQ10 +3VS VDD8 VDD18 +0.6VS
0_0402_5%
RD247
0_0402_5%
RD248
155 41 1K_0402_1% 135 163

<7> DDR_B_ODT0 DDR_B_ODT1 161 ODT0 DQ10 42 DDR_B_DQ11 +VREFB_CA 136 VDD9 VDD19
<7> DDR_B_ODT1 ODT1 DQ11 DDR_B_DQ12 VDD10 +2.5V
24
1
@ @ DDR_B_BG0 115 DQ12 25 DDR_B_DQ13 255 258
<7> DDR_B_BG0
2
DDR_B_BG1 113 BG0 DQ13 38 DDR_B_DQ14 VDDSPD VTT

<7> DDR_B_BG1 DDR_B_BA0 150 BG1 DQ14 37 DDR_B_DQ15 15mil 164 257
DDR_B_SA2 <7> DDR_B_BA0 DDR_B_BA1 BA0 DQ15 DDR_B_DQS1 VREFCA VPP1
145 34 259
DDR_B_SA1 <7> DDR_B_BA1 BA1 DQS1(T) DDR_B_DQS1# DDR_B_DQS1 <7> VPP2
CD84 4.7U_0402_6.3V6M
CD76 0.1U_0201_10V6K
CD80 0.1U_0201_10V6K
CD87 1000P_0402_50V7K
32
DDR_B_SA0 <7> DDR_B_MA[13..0] DDR_B_MA0 DQS1#(C) DDR_B_DQS1# <7>
CD89 1U_0201_6.3V6M
144 1 99
A0 DDR_B_DQ[23..16] <7> VSS VSS
2
DDR_B_MA1 133 50 DDR_B_DQ16 2 102
A1 DQ16 1 2 2 1 VSS VSS
1
DDR_B_MA2 132 49 DDR_B_DQ17 RD251 5 103

DDR_B_MA3 A2 DQ17 DDR_B_DQ18 VSS VSS 1
RS@
0_0402_5%
RD252
RS@
0_0402_5%
RD246
0_0402_5%
RD249
131 62 1K_0402_1% 6 106

CD73 @EMC@ DDR_B_MA4 128 A3 DQ18 63 DDR_B_DQ19 9 VSS VSS 107
.1U_0402_16V7K DDR_B_MA5 126 A4 DQ19 46 DDR_B_DQ20 2 1 1 2 10 VSS VSS 167
1
@ 2 1 DDR_B_RST# DDR_B_MA6 127 A5 DQ20 45 DDR_B_DQ21 14 VSS VSS 168 2
2
DDR_B_MA7 122 A6 DQ21 58 DDR_B_DQ22 15 VSS VSS 171

DDR_B_MA9 121 A8 DQ23 55 DDR_B_DQS2 19 VSS VSS 175
DDR_B_MA10 A9 DQS2(T) DDR_B_DQS2# DDR_B_DQS2 <7> VSS VSS
146 53 22 176
DDR_B_MA11 A10_AP DQS2#(C) DDR_B_DQS2# <7> VSS VSS
120 23 180
DDR_B_MA12 A11 DDR_B_DQ24 DDR_B_DQ[31..24] <7> VSS VSS
119 70 26 181 CRB use 1uF x1
DDR_B_MA14_WE# 151 A13 DQ25 83 DDR_B_DQ26 30 VSS VSS 185
Note:
<7>
<7>
DDR_B_MA14_WE#
DDR_B_MA15_CAS#
DDR_B_MA15_CAS#
DDR_B_MA16_RAS#
156 A14_WE#
A15_CAS#
DQ26
DQ27
84 DDR_B_DQ27
DDR_B_DQ28
Place near to SO-DIMM connector. 31 VSS
VSS
VSS
VSS
188
Layout Note: 152 66 35 189
Check voltage tolerance of <7> DDR_B_MA16_RAS# A16_RAS# DQ28 67 DDR_B_DQ29 36 VSS VSS 192
Place near JDIMM2 VREF_DQ at the DIMM socket DDR_B_ACT# 114 DQ29 79 DDR_B_DQ30 39 VSS VSS 193
<7> DDR_B_ACT# ACT# DQ30 DDR_B_DQ31 VSS VSS
80 40 196
2 DDR_B_PAR 143 DQ31 76 DDR_B_DQS3 43 VSS VSS 197 2
<7> DDR_B_PAR DDR_B_ALERT# PARITY DQS3(T) DDR_B_DQS3# DDR_B_DQS3 <7> VSS VSS
116 74 44 201
<7> DDR_B_ALERT# DDR_B_EVENT# ALERT# DQS3#(C) DDR_B_DQS3# <7> VSS VSS
CRB use 0.1uF x12 (6 pop,6 unpop),180pF x1,100uF x2 134 47 202
<7> DDR_B_EVENT# DDR_B_RST# EVENT# DDR_B_DQ32 DDR_B_DQ[39..32] <7> VSS VSS
108 174 48 205
+1.2V <7> DDR_B_RST# RESET# DQ32 DDR_B_DQ33 VSS VSS
173 51 206
DQ33 187 DDR_B_DQ34 52 VSS VSS 209
SMB_0_SDA 254 DQ34 186 DDR_B_DQ35 56 VSS VSS 210
<9,13> SMB_0_SDA SMB_0_SCL SDA DQ35 DDR_B_DQ36 VSS VSS
253 170 57 213
<9,13> SMB_0_SCL SCL DQ36 DDR_B_DQ37 VSS VSS
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
169 60 214
DDR_B_SA2 166 DQ37 183 DDR_B_DQ38 61 VSS VSS 217
1 1 1 1 1 1 DDR_B_SA1 SA2 DQ38 DDR_B_DQ39 VSS VSS
CD86
CD67
CD78
CD93
CD71
CD81
260 182 64 218

DDR_B_SA0 256 SA1 DQ39 179 DDR_B_DQS4 65 VSS VSS 222
SA0 DQS4(T) 177 DDR_B_DQS4# DDR_B_DQS4 <7> 68 VSS VSS 223
2 2 2 2 2 2 DQS4#(C) DDR_B_DQS4# <7> VSS VSS
69 226
DDR_B_DQ40 DDR_B_DQ[47..40] <7> VSS VSS
92 195 72 227
91 CB0_NC DQ40 194 DDR_B_DQ41 73 VSS VSS 230
+1.2V 104 CB6_NC DQ46 204 DDR_B_DQ47 86 VSS VSS 243
97 CB7_NC DQ47 200 DDR_B_DQS5 89 VSS VSS 244
DQS8(T) DQS5(T) DDR_B_DQS5# DDR_B_DQS5 <7> VSS VSS
95 198 90 247
DQS8#(C) DQS5#(C) DDR_B_DQS5# <7> VSS VSS
93 248
DDR_B_DQ48 DDR_B_DQ[55..48] <7> VSS VSS
216 94 251
<7> DDR_B_DM[7..0] DDR_B_DM0 DQ48 DDR_B_DQ49 VSS VSS
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
12 215 98 252
DDR_B_DM1 33 DM0#/DBI0# DQ49 228 DDR_B_DQ50 VSS VSS
1 1 1 1 1 1 DDR_B_DM2 DM1#/DBI1# DQ50 DDR_B_DQ51
CD82
CD90
CD96
CD77
CD68
CD88
54 229 262 261

DDR_B_DM3 75 DM2#/DBI2# DQ51 211 DDR_B_DQ52 GND GND
DDR_B_DM4 178 DM3#/DBI3# DQ52 212 DDR_B_DQ53
2 2 2 2 2 2 DDR_B_DM5 199 DM4#/DBI4# DQ53 224 DDR_B_DQ54 LOTES_ADDR0070-P009A
DDR_B_DM6 220 DM5#/DBI5# DQ54 225 DDR_B_DQ55
DDR_B_DM7 DM6#/DBI6# DQ55 DDR_B_DQS6 CONN@
241 221
DM7#/DBI7# DQS6(T) DDR_B_DQS6# DDR_B_DQS6 <7>
96 219
3 DM8#/DBI8# DQS6#(C) DDR_B_DQS6# <7> 3
DDR_B_DQ56 DDR_B_DQ[63..56] <7>

237
+1.2V DQ56 236 DDR_B_DQ57
DQ57 249 DDR_B_DQ58
DQ58 250 DDR_B_DQ59
DQ59 232 DDR_B_DQ60
DQ60 233 DDR_B_DQ61
DQ61 DDR_B_DQ62
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
180P_0402_50V8J
2 2 2 2 2 245
DQ62 DDR_B_DQ63
CD91
CD94
CD97
CD66
CD85
246
DQ63 242 DDR_B_DQS7
DQS7(T) DDR_B_DQS7# DDR_B_DQS7 <7>
240
1 1 1 1 1 DQS7#(C) DDR_B_DQS7# <7>
LOTES_ADDR0070-P009A
CONN@ Layout Note:
Place near JDIMM2.258
CRB use 4.7uF x1,0.1uF x1
+0.6VS
Layout Note: Layout Note:
Place near JDIMM2.257,259 Place near JDIMM2.255
10U_0603_6.3V6M
10U_0603_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1 1 1 1
CD70
CD74
CD92
CD72
CRB use 0.1uF x2,180pF x1 CRB use 1uF x1
+2.5V +3VS 2 2 2 2
4 4
10U_0603_6.3V6M
10U_0603_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1 1 1 1
CD79
CD83
CD75
CD95
2 2 2 2

DDR4_SO-DIMM
A B C D E
5 4 3 2 1
D D
UV1B @
symbol2
PEG_ATX_GRX_P0 DIS@ 1 2 CV312 0.22U_0402_16V7K PEG_ATX_C_GRX_P0 AT41 AV35 PEG_ARX_C_GTX_P0 DIS@ 1 2 CV1 0.22U_0402_16V7K PEG_ARX_GTX_P0
<6> PEG_ATX_GRX_P0 PEG_ATX_GRX_N0 PEG_ATX_C_GRX_N0 AT40 PCIE_RX0P PCIE_TX0P PEG_ARX_C_GTX_N0 PEG_ARX_GTX_N0 PEG_ARX_GTX_P0 <6>
DIS@ 1 2 CV306 0.22U_0402_16V7K AU35 DIS@ 1 2 CV2 0.22U_0402_16V7K
<6> PEG_ATX_GRX_N0 PCIE_RX0N PCIE_TX0N PEG_ARX_GTX_N0 <6>
PEG_ATX_GRX_P1 DIS@ 1 2 CV308 0.22U_0402_16V7K PEG_ATX_C_GRX_P1 AR41 AU38 PEG_ARX_C_GTX_P1 DIS@ 1 2 CV3 0.22U_0402_16V7K PEG_ARX_GTX_P1
<6> PEG_ATX_GRX_P1 PEG_ATX_GRX_N1 PEG_ATX_C_GRX_N1 AR40 PCIE_RX1P PCIE_TX1P PEG_ARX_C_GTX_N1 PEG_ARX_GTX_N1 PEG_ARX_GTX_P1 <6>
DIS@ 1 2 CV305 0.22U_0402_16V7K AU39 DIS@ 1 2 CV4 0.22U_0402_16V7K
PEG_ATX_GRX_P2 DIS@ 1 2 CV307 0.22U_0402_16V7K PEG_ATX_C_GRX_P2 AP41 AR37 PEG_ARX_C_GTX_P2 DIS@ 1 2 CV5 0.22U_0402_16V7K PEG_ARX_GTX_P2
<6> PEG_ATX_GRX_P2 PEG_ATX_GRX_N2 PEG_ATX_C_GRX_N2 AP40 PCIE_RX2P PCIE_TX2P PEG_ARX_C_GTX_N2 PEG_ARX_GTX_N2 PEG_ARX_GTX_P2 <6>
DIS@ 1 2 CV309 0.22U_0402_16V7K AR38 DIS@ 1 2 CV6 0.22U_0402_16V7K
PEG_ATX_GRX_P3 DIS@ 1 2 CV313 0.22U_0402_16V7K PEG_ATX_C_GRX_P3 AM41 AN37 PEG_ARX_C_GTX_P3 DIS@ 1 2 CV7 0.22U_0402_16V7K PEG_ARX_GTX_P3
<6> PEG_ATX_GRX_P3 PEG_ATX_GRX_N3 PEG_ATX_C_GRX_N3 AM40 PCIE_RX3P PCIE_TX3P PEG_ARX_C_GTX_N3 PEG_ARX_GTX_N3 PEG_ARX_GTX_P3 <6>
DIS@ 1 2 CV304 0.22U_0402_16V7K AN38 DIS@ 1 2 CV8 0.22U_0402_16V7K
PEG_ATX_GRX_P4 T1DIS@ 1 2 CV2710 0.22U_0402_16V7K PEG_ATX_C_GRX_P4 AL41 AL37 PEG_ARX_C_GTX_P4 T1DIS@ 1 2 CV2715 0.22U_0402_16V7K PEG_ARX_GTX_P4
<6> PEG_ATX_GRX_P4 PEG_ATX_GRX_N4 PEG_ATX_C_GRX_N4 AL40 PCIE_RX4P PCIE_TX4P PEG_ARX_C_GTX_N4 T1DIS@ 1 PEG_ARX_GTX_N4 PEG_ARX_GTX_P4 <6>
T1DIS@ 1 2 CV2707 0.22U_0402_16V7K AL38 2 CV2708 0.22U_0402_16V7K
PEG_ATX_GRX_P5 T1DIS@ 1 2 CV2711 0.22U_0402_16V7K PEG_ATX_C_GRX_P5 AK41 AJ37 PEG_ARX_C_GTX_P5 T1DIS@ 1 2 CV2713 0.22U_0402_16V7K PEG_ARX_GTX_P5
<6> PEG_ATX_GRX_P5 PEG_ATX_GRX_N5 PEG_ATX_C_GRX_N5 AK40 PCIE_RX5P PCIE_TX5P PEG_ARX_C_GTX_N5 T1DIS@ 1 PEG_ARX_GTX_N5 PEG_ARX_GTX_P5 <6>
T1DIS@ 1 2 CV2709 0.22U_0402_16V7K AJ38 2 CV2703 0.22U_0402_16V7K
PEG_ATX_GRX_P6 T1DIS@ 1 2 CV2717 0.22U_0402_16V7K PEG_ATX_C_GRX_P6 AJ41 AG37 PEG_ARX_C_GTX_P6 T1DIS@ 1 2 CV2705 0.22U_0402_16V7K PEG_ARX_GTX_P6
<6> PEG_ATX_GRX_P6 PEG_ATX_GRX_N6 PEG_ATX_C_GRX_N6 AJ40 PCIE_RX6P PCIE_TX6P PEG_ARX_C_GTX_N6 T1DIS@ 1 PEG_ARX_GTX_N6 PEG_ARX_GTX_P6 <6>
T1DIS@ 1 2 CV2714 0.22U_0402_16V7K AG38 2 CV2712 0.22U_0402_16V7K
PEG_ATX_GRX_P7 T1DIS@ 1 2 CV2704 0.22U_0402_16V7K PEG_ATX_C_GRX_P7 AH41 AE37 PEG_ARX_C_GTX_P7 T1DIS@ 1 2 CV2716 0.22U_0402_16V7K PEG_ARX_GTX_P7
<6> PEG_ATX_GRX_P7 PEG_ATX_GRX_N7 PEG_ATX_C_GRX_N7 AH40 PCIE_RX7P PCIE_TX7P PEG_ARX_C_GTX_N7 T1DIS@ 1 PEG_ARX_GTX_N7 PEG_ARX_GTX_P7 <6>
T1DIS@ 1 2 CV2706 0.22U_0402_16V7K AE38 2 CV2702 0.22U_0402_16V7K
C CLK_PEG_P6 AV33 AV41 PLT_RST_VGA# C

<10> CLK_PEG_P6 CLK_PEG_N6 PCIE_REFCLKP PERSTB
<10> CLK_PEG_N6 AU33
PCIE_REFCLKN AC41 PX_EN1TP@
PX_EN T218
For BACO mode(AMD PowerXpress) use, NC if not use
RV371 DIS@
200_0402_1%
AU41 1 2
PCIE_ZVSS
REV 0.91
2160896088A1R16M_FCBGA769P-NH
+3VSDGPU
B B
UV2 SA00000OH00
MC74VHC1G08DFT2G_SC70-5
5
DIS@
1
P
<9,26,27,28> APU_PCIE_RST# IN1 PLT_RST_VGA#
4
2 O
<10> PE_GPIO0 IN2
G
1
3
1
RV4
RV370 100K_0402_5%
2.2K_0402_5% DIS@
DIS@
2
2
A A

R18M-M260/G190_(1/9)_PCIE
Custom 1.B
5 4 3 2 1
5 4 3 2 1
R17M-G1-50/70
Function Support Pin R18M-M2-60 R17M-P1-50/70
R18M-G1-90
+3VSDGPU
SCL use 47k, CRB use 4.7k AC/DC Mode GPIO5 Yes Yes
AMD Confirm List_1027 use PU-47k H:AC L:DC
+3VSDGPU
Thermal VR_HOT# GPIO6 No Yes
1
10mA UV1E @ (Fan tachometer)
RV507 RV508 AM31 symbol5 W40 GPIO_0
VDD_33 GPIO_0
5
47K_0402_5% 47K_0402_5% 1 AA40 Peak Current Control GPIO21 No Yes
G
DIS@ DIS@ DIS@ GPIO_1 AA35 GPIO_2 +3VSDGPU
CV26 GPIO_2
2
1U_0201_6.3V6M
3 4 VGA_SMB_DA3 2 AA34 VGA_AC_BATT RV409 1 DIS@ 2 5.1K_0402_1% DV1 DIS@
S
<8,30,34> EC_SMB_DA2 GPIO_5_REG_HOT_AC_BATT GPIO_6_TACH#
U35 RV1652 1 DIS@ 2 5.1K_0402_1% RB751V-40_SOD323-2
D
QV1B GPIO_6_TACH 2 1
GPU_ACIN <30>
2
2N7002KDW_SOT363-6 AP25 GPIO_8 RV1644 1 @ 2 33_0402_5% GPIO_8_ROMSO
G
D SB00000EO00 DIS@ GPIO_8_ROMSO AM25 GPIO_9 RV1645 1 @ 2 33_0402_5% GPIO_9_ROMSI D
GPIO_9_ROMSI AM27 GPIO_10 RV1646 1 @ 2 33_0402_5% GPIO_10_ROMSCK
GPIO_10_ROMSCK W41 GPIO_11 RV1649 DV2 DIS@
6 1 VGA_SMB_CK3 GPIO_11 Y40 GPIO_12 0_0402_5% RB751V-40_SOD323-2
S
<8,30,34> EC_SMB_CK2 GPIO_12 GPIO_13 VGA_AC_BATT
Y41 2 R535@ 1 2 1
D
GPIO_13 GPU_PROCHOT# <45>
QV1A AU21 1TP@
GPIO_14_HPD2 GPIO_15 T237
2N7002KDW_SOT363-6 AA41
SB00000EO00 DIS@ GPIO_15 U34
GPIO_16_8P_DETECT R37 RV1651
Vgs=1.0-2.5V GPIO_17_THERMAL_INT AV25 1TP@ +3VSDGPU 0_0402_5%
GPIO_18_HPD3 GPIO_19_CTF T239 GPIO_21_PCC#
R38 2 @ 1
GPIO_19_CTF GPIO_20 APU_PROCHOT#_D <38>
AB40
AC35 GPIO_20 AB41 GPIO_21_PCC# RV91 1 DIS@ 2 5.1K_0402_1%
AC34 SCL GPIO_21 AP27 GPIO_22 RV1647 1 @ 2 33_0402_5% GPIO_22_ROMCSb
SDA GPIO_22_ROMCSB W37 GPIO_29 RV1650 DV4 DIS@
VGA_SMB_CK3 AW40 GPIO_29 W38 0_0402_5% RB751V-40_SOD323-2
VGA_SMB_DA3 AW41 SMBCLK GPIO_30 BA38 PLL_ANALOG_IN 1TP@ GPIO_6_TACH# 2 LEXA@ 1 2 1
SMBDAT GENERICA PS_1 T231 GPU_THERMAL# <30>
AV29
GENERICB AU31 PS_2
GENERICC AV31 PS_3
GENERICD AU25 1TP@
GPU_SVC GENERICE_HPD4 T241
RV155 1 DIS@ 2 0_0402_5% AU17 AV23 1TP@
<45> GPU_SVC GPU_SVD GPIO_SVC GENERICF_HPD5 PS_0 T240
RV156 1 DIS@ 2 0_0402_5% AV17 AM29
+1.8VSDGPU +1.8VSDGPU <45> GPU_SVD GPU_SVT RV157 1 DIS@ 2 0_0402_5% AR17 GPIO_SVD GENERICG
<45> GPU_SVT GPIO_SVT AV21 1TP@
HPD1 T234
AN34
AP31 DDCVGACLK
DDCVGADATA
SCL PU-1k
10K_0402_5%
10K_0402_5%
10K_0402_5%
1 DIS@ 2
2 LEXA@ 1
2 DIS@ 1
CRB PU-10k/PD-1uF
1K_0402_5%
1K_0402_5%
56109_Compatible List:
RV84
RV87
RV410
RV412
RV413
R535 PD, and Lexa PU. RV153

@
0_0402_5%
AV40 CLKREQ_PEG#6_R 2 @ 1
TEST_PG CLKREQB CLKREQ_PEG#6 <10>
AY13 AU40 WAKEB
1
GPU_SVC TEST_PG_BACO BA13 TEST_PG WAKEB RV368

GPU_SVD TEST_PG TEST_PG_BACO 10K_0402_5%
GPU_SVT TEST_PG_BACO 2 @ 1
1U_0201_6.3V6M
AC40
1U_0201_6.3V6M
1 DIGON
2 R535@ 1
@
10K_0402_5%
10K_0402_5%
10K_0402_5%
1K_0402_5%
1
2
1 DIS@ 2
+3VSDGPU +3VSDGPU
@
AC37
CV314
RV1653
K41 BL_ENABLE AC38

RV89
RV88
RV411
CV315
2 RSVD#K41 BL_PWM_DIM
@
56109_Compatible List: R34

C 2 R535 don't care, and Lexa PU. RSVD#R34 C
W34 HSYNC UV56 @
HSYNC W35 VSYNC GPIO_22_ROMCSb 1 8
1
VSYNC GPIO_8_ROMSO 2 CS# VCC 7

3 DO(IO1) HOLD#(IO3) 6 GPIO_10_ROMSCK
WP#(IO2) CLK GPIO_9_ROMSI 1
AG34 4 5 @
SWAPLOCKA AE34 GND DI(IO0) CV2721
SWAPLOCKB AR29 GD25Q40CTIGR_SOIC_8P 0.1U_0201_10V6K
GENLK_CLK AP29 2
GENLK_VSYNC SA0000AE400
S IC FL 4M GD25Q40CTIGR SOP 8P SPI
REV 0.91 Follow CRB material
Boot-VID Code
2160896088A1R16M_FCBGA769P-NH
Voltage
SVC SVD Selected (V)
0 0 1.1
+3VSDGPU +1.8VSDGPU +3VSDGPU
0 1 1.0
1 0 0.9
1
1 1 0.8 RV502 RV152 RV162
@ 10K_0201_5% @ 10K_0201_5% 4.7K_0402_5%
@
2
GPIO_19_CTF WAKEB
VDD_33 SCL can leave nc
LEXA Strap
1
DIS@ RV430
RV151 4.7K_0402_5%
10K_0201_5% @
2
+3VSDGPU GPIO_2 can't use on R535
R535 Strap B
5.1K_0201_1%
5.1K_0201_1%
5.1K_0201_1%
5.1K_0201_1%
5.1K_0201_1%
5.1K_0201_1%
5.1K_0201_1%
5.1K_0201_1%
5.1K_0201_1%
5.1K_0201_1%
5.1K_0201_1%
5.1K_0201_1%
5.1K_0201_1%
1
2 LEXA@ 1
2 LEXA@ 1
2 LEXA@ 1
2 LEXA@ 1
1
@
@
RV416
RV414
RV418
RV420
RV422
RV424
RV426
RV429
RV432
RV434
RV436
RV438
RV440
2
GPIO_0 TX_HALF_SWING[0:disable,1:enable]
GPIO_2 BIF_GEN3_EN_A[0:disable,1:enable]
Resistor Divider Lookup Lable +1.8VSDGPU +1.8VSDGPU +1.8VSDGPU +1.8VSDGPU
GPIO_11 ROM_CONFIG_[0]/MemoryAperture
PS_0[3:1]=001 PS_1[3:1]=001 PS_2[3:1]=000 PS_3[3:1]=000
0402 1% resistors are equired
PS_0[5:4]=11 PS_1[5:4]=11 PS_2[5:4]=11 PS_3[5:4]=11
1
GPIO_15 Reserved [PD for default]
R_pu (ohm) R_pd (ohm) Bitd [3:1] R535@ R535@ @ @
GPIO_20 TX_DEEMPH_EN[0:disable,1:enable] RV8 RV11 RV28 RV15
GPIO_29 BIF_VGA_DIS[0:VGA,1:Headless] 8.45K_0402_1% 8.45K_0402_1% 8.45K_0402_1% 8.45K_0402_1%
Special Usage[1] GPUdefault
NC 4.75k 000
HSYNC
2
VSYNC Special Usage[0] GPUdefault PS_0 PS_1 PS_2 PS_3
GPIO_8 BIF_CLK_PM_EN[0:disable,1:enable]
8.45k 2k 001
1
GPIO_9 Reserved [PD for production]
4.53k 2k 010
0.082U_0402_16V
0.68U_0402_10V
GPIO_22 1 1 1 1
BIOS_ROM_EN[0:disable,1:enable] @ R535@ @ R535@ R535@ @
6.98k 4.99k 011 CV29 RV9 CV28 RV12 CV11 RV13 CV15 RV16
0.68U_0402_10V 2K_0402_1% 0.68U_0402_10V 2K_0402_1% @ 4.75K_0402_1% @ 4.75K_0402_1%
5.1K_0201_1%
5.1K_0201_1%
5.1K_0201_1%
5.1K_0201_1%
5.1K_0201_1%
5.1K_0201_1%
5.1K_0201_1%
5.1K_0201_1%
5.1K_0201_1%
5.1K_0201_1%
5.1K_0201_1%
5.1K_0201_1%
5.1K_0201_1%
2 LEXA@ 1
2 LEXA@ 1
2 LEXA@ 1
2 LEXA@ 1
2 LEXA@ 1
2 LEXA@ 1
2 2 2 2
4.53k 4.99k 100
2
@
@
RV417
RV415
RV419
RV421
RV423
RV425
RV427
RV428
RV431
RV433
RV435
RV437
RV439
3.24k 5.62k 101

3.4k 10k 110
2
Polaris Memory ID at page 17

4.75k NC 111
Strap Name : Strap Name : Strap Name : Strap Name :
PS_0[1] ROM_CONFIG[0] PS_1[1] STRAP_BIF_GEN3_EN_A PS_2[1] N/A PS_3[1] BOARD_CONFIG[0] (Memory ID)
Capacitor Divider Lookup Lable
PS_0[2] ROM_CONFIG[1] PS_1[2] TRAP_BIF_CLK_PM_EN PS_2[2] N/A PS_3[2] BOARD_CONFIG[1] (Memory ID)
Cap (nF) Bitd [5:4] PS_0[3] ROM_CONFIG[2] PS_1[3] N/A PS_2[3] STRAP_BIOS_ROM_EN PS_3[3] BOARD_CONFIG[2] (Memory ID)
PS_0[4] N/A PS_1[4] STRAP_TX_CFG_DRV_FULL_SWING PS_2[4] STRAP_BIF_VGA_DIS PS_3[4] AUD_PORT_CONN_PINSTRAP[1]
A
680nF 00 A
PS_0[5] AUD_PORT_CONN_PINSTRAP[0] PS_1[5] STRAP_TX_DEEMPH_EN PS_2[5] N/A PS_3[5] AUD_PORT_CONN_PINSTRAP[2]
82nF 01
10nF 10
NC 11

R18M-M260/G190_(2/9)_MSIC-1
Custom 1.B
5 4 3 2 1
5 4 3 2 1
+3VSDGPU
+1.8VSDGPU
@
JTAG_TDI_GPU 8 1
JTAG_TDO_GPU 7 2
JTAG_TMS_GPU 6 3
10K_0201_5%
10K_0201_5%
1 DIS@ 2
1 DIS@ 2
JTAG_TCK_GPU 5 4
RV468
RV467
RPV34
UV1A @ 10K_0804_8P4R_5%
RV101 33_0201_5% symbol1
1 DIS@ 2 AA38 AF41 JTAG_TDO_GPU +3VSDGPU
1 DIS@ 2 AA37 BP_0 JTAG_TDO AD40 JTAG_TDI_GPU
RV100 33_0201_5% BP_1 JTAG_TDI AD41 JTAG_TMS_GPU
JTAG_TMS AE41 JTAG_TCK_GPU JTAG_TRSTB_GPU RV369 2 DIS@ 1 10K_0201_5%
JTAG_TCK RV1630 2 @ 1 10K_0201_5%
D JTAG_TESTEN_GPU D
RV469 1 DIS@ 2 B2 AE40
10K_0402_5% TEST6 TESTEN AF40 JTAG_TRSTB_GPU
JTAG_TRSTB
+3VSDGPU
REV 0.91
2160896088A1R16M_FCBGA769P-NH JTAG_TESTEN_GPU RV470 2 @ 1 5.1K_0201_1%

RV471 2 DIS@ 1 1K_0201_5%
Polaris Memory ID
BOARD_CONFIG[2:0] R_pu (ohm) R_pd (ohm) Bitd [3:1]
000:SAM 256Mx32 NC 4.75k 000
001:HYN 256Mx32 8.45k 2k 001 UV1F @
010:SAM 128Mx32 4.53k 2k 010 symbol6 BA39 XTALIN XTALOUT RV503 2 R535@ 1 0_0402_5% XTALOUT_R +1.8VSDGPU
011:HYX 128Mx32 6.98k 4.99k 011 XTALIN
100:MIC 256Mx32 4.53k 4.99k 100 RV20 DIS@
1M_0402_5%
XTALIN RV504 2 R535@ 1 0_0402_5% XTALIN_R SI_SS_SEL RV154 1 DIS@ 2 5.1K_0402_1%
RV16 PV4G_S@ YV1 DIS@

SJ10000UI00 RV505 1 @ 2 5.1K_0402_1%
27MHZ_10PF_XRCGB27M000F2P18R0
ESR:40ohm (Max)
3 1
AY39 XTALOUT 3 1
XTALOUT 1 NC NC
DIS@ 1
S RES 1/16W 4.75K +-1% 0402 CV450 DIS@
10P_0402_50V8J 4 2 CV451
SD034475180 2 10P_0402_50V8J
RV15 PV4G_H@ RV16 PV4G_H@ AV15 1TP@ 2
C PLLCHARZ_L T229 C
AU15 1TP@
PLLCHARZ_H T230
+1.8VSDGPU
REV 0.91 AY38
ANALOGIO LEXA@
S RES 1/16W 8.45K +-1% 0402 S RES 1/16W 2K +-1% 0402 UV4
1
XTALOUT_R 3 2 XTALIN_R LV7 LEXA@
SD000000680 SD034200180 XOUT XIN/CLKIN
2160896088A1R16M_FCBGA769P-NH RV83 BLM15BD121SN1D_0402
RV15 PV2G_S@ RV16 PV2G_S@ @ 16.2K_0402_1% RV506 1 1 2
0_0402_5% VDD
XTALIN_100M
0.1U_0201_10V6K
CV2723
10U_0603_6.3V6M
2 LEXA@ 1 4 1 1
2
SSCLK1/REFCLK/FSEL/SSONb/OE
CV449 LEXA@
DNI
5 SI_SS_SEL
SSCLK2/OE/SSONb/PD 2 @ 2
S RES 1/16W 4.53K +-1% 0402 S RES 1/16W 2K +-1% 0402
SD034453180 SD034200180 6
Close to RV504 for Reduce redundancy trace VSS
RV15 PV2G_H@ RV16 PV2G_H@
SI51214-A1FAGMR_TDFN6_1P2X1P4
SA0000A4K00
S IC SI51214-A1FAGMR TDFN 6P CLK GEN
S RES 1/16W 6.98K +-1% 0402 S RES 1/16W 4.99K +-1% 0402
SD000002680 SD034499180
RV15 PV4G_M@ RV16 PV4G_M@
LEXA Memory ID
RV464 V4G_S@ RV464 V4G_S7G@ RV462 V4G_S@ RV462 V4G_S7G@ RV460 V4G_S@ RV460 V4G_S7G@
S RES 1/16W 4.53K +-1% 0402 S RES 1/16W 4.99K +-1% 0402
SD034453180 SD034499180
B B
+1.8VSDGPU
S RES 1/20W 5.1K +-1% 0201 S RES 1/20W 5.1K +-1% 0201 S RES 1/20W 5.1K +-1% 0201
SD000008900 SD000008900 SD000008900
AUD_PORT_CONN[2:0] RV464 V4G_H@ RV464 V4G_H7G@ RV462 V4G_H@ RV462 V4G_H7G@ RV459 V4G_H@ RV459 V4G_H7G@
UV1K @ 111: No usable endpoints
symbol11 110: One usable endpoint
5.1K_0201_1%
5.1K_0201_1%
5.1K_0201_1%
5.1K_0201_1%
5.1K_0201_1%
5.1K_0201_1%
5.1K_0201_1%
5.1K_0201_1%
2 LEXA@ 1
2 LEXA@ 1
2 LEXA@ 1
2 LEXA@ 1
1
L40 DBGDATA_0 101: Two usable endpoints
DBGDATA_0 DBGDATA_1 100: Three usable endpoints
L41 011: Four usable endpoints
DBGDATA_1 DBGDATA_2
@
@
M40
RV456
RV453
RV457
RV459
RV461
RV463
RV465
RV442 010: Five usable endpoints

DBGDATA_2 M41 DBGDATA_3
DBGDATA_3 DBGDATA_4
001: Six usable endpoints S RES 1/20W 5.1K +-1% 0201 S RES 1/20W 5.1K +-1% 0201 S RES 1/20W 5.1K +-1% 0201
N40 000: All endpoints are usable SD000008900 SD000008900 SD000008900
2
2
DBGDATA_4 N41 DBGDATA_5
DBGDATA_5 P40 DBGDATA_6 DBGDATA_0 AUD_PORT_CONN[0] BOARD_CONFIG[2:0] RV464 V2G_S@ RV461 V2G_S@ RV460 V2G_S@
DBGDATA_6 P41 DBGDATA_7 DBGDATA_1 AUD_PORT_CONN[1] 000:SAM 256Mx32 (6Gb/7Gb)
DBGDATA_7 R40 DBGDATA_8 1TP@ DBGDATA_2 AUD_PORT_CONN[2] 001:HYN 256Mx32 (6Gb/7Gb)
DBGDATA_8 DBGDATA_9 1TP@ T221 DBGDATA_3 010:SAM 128Mx32
R41 BOARD_CONFIG[0]
DBGDATA_9 DBGDATA_101TP@ T222 DBGDATA_4 011:HYX 128Mx32
T40 BOARD_CONFIG[1] 100:MIC 256Mx32 (6Gb/7Gb)
DBGDATA_10 DBGDATA_111TP@ T223 DBGDATA_5
T41 BOARD_CONFIG[2] 101:
DBGDATA_11 DBGDATA_121TP@ T224 DBGDATA_6
U40 SMBUS_ADDR[0] 110: S RES 1/20W 5.1K +-1% 0201 S RES 1/20W 5.1K +-1% 0201 S RES 1/20W 5.1K +-1% 0201
DBGDATA_12 DBGDATA_131TP@ T225 DBGDATA_7 111:
U41 SMBUS_ADDR[1] SD000008900 SD000008900 SD000008900
DBGDATA_13 DBGDATA_141TP@ T226
V40
DBGDATA_14 DBGDATA_151TP@ T227 DBGDATA_[7:6]
V41 RV464 V2G_H@ RV461 V2G_H@ RV459 V2G_H@
5.1K_0201_1%
5.1K_0201_1%
5.1K_0201_1%
5.1K_0201_1%
5.1K_0201_1%
5.1K_0201_1%
5.1K_0201_1%
5.1K_0201_1%
DBGDATA_15 T228
1
2 LEXA@ 1
00: 0× 40
01: 0× 41
REV 0.91 10: 0× 42
@
@
RV455
RV454
RV458
RV460
RV462
RV464
RV466
RV441
11: 0× 43
2160896088A1R16M_FCBGA769P-NH
2
SD000008900 SD000008900 SD000008900
RV463 V4G_M@ RV463 V4G_M7G@ RV462 V4G_M@ RV462 V4G_M7G@ RV460 V4G_M@ RV460 V4G_M7G@
A A
SD000008900 SD000008900 SD000008900

R18M-M260/G190_(3/9)_MSIC-2
Custom 1.B
5 4 3 2 1
5 4 3 2 1
UV1C @ UV1D @
<21> MA0_D[0..31] MA1_D[0..31] <21> <22> MB0_D[0..31] MB1_D[0..31] <22>
symbol3 symbol4
MA0_D0 L34 B27 MA1_D0 MB0_D0 C2 AH1 MB1_D0
MA0_D1 L37 DQA0_0 DQA1_0 A27 MA1_D1 MB0_D1 C1 DQB0_0 DQB1_0 AH2 MB1_D1
MA0_D2 L38 DQA0_1 DQA1_1 B26 MA1_D2 MB0_D2 D2 DQB0_1 DQB1_1 AJ2 MB1_D2
MA0_D3 J35 DQA0_2 DQA1_2 A26 MA1_D3 MB0_D3 D1 DQB0_2 DQB1_2 AK1 MB1_D3
MA0_D4 G37 DQA0_3 DQA1_3 A24 MA1_D4 MB0_D4 F1 DQB0_3 DQB1_3 AL2 MB1_D4
MA0_D5 E38 DQA0_4 DQA1_4 B23 MA1_D5 MB0_D5 G2 DQB0_4 DQB1_4 AM1 MB1_D5
MA0_D6 E35 DQA0_5 DQA1_5 A23 MA1_D6 MB0_D6 G1 DQB0_5 DQB1_5 AM2 MB1_D6
D MA0_D7 DQA0_6 DQA1_6 MA1_D7 MB0_D7 DQB0_6 DQB1_6 MB1_D7 D
D35 B22 H2 AN2
MA0_D8 H41 DQA0_7 DQA1_7 B20 MA1_D8 MB0_D8 K2 DQB0_7 DQB1_7 AR1 MB1_D8
MA0_D9 H40 DQA0_8 DQA1_8 A20 MA1_D9 MB0_D9 K1 DQB0_8 DQB1_8 AR2 MB1_D9
MA0_D10 G41 DQA0_9 DQA1_9 B19 MA1_D10 MB0_D10 L2 DQB0_9 DQB1_9 AT1 MB1_D10
MA0_D11 G40 DQA0_10 DQA1_10 A19 MA1_D11 MB0_D11 L1 DQB0_10 DQB1_10 AT2 MB1_D11
MA0_D12 E40 DQA0_11 DQA1_11 B17 MA1_D12 MB0_D12 N2 DQB0_11 DQB1_11 AV2 MB1_D12
MA0_D13 D41 DQA0_12 DQA1_12 A16 MA1_D13 MB0_D13 P2 DQB0_12 DQB1_12 AW1 MB1_D13
MA0_D14 D40 DQA0_13 DQA1_13 B16 MA1_D14 MB0_D14 P1 DQB0_13 DQB1_13 AW2 MB1_D14
MA0_D15 C41 DQA0_14 DQA1_14 A15 MA1_D15 MB0_D15 R2 DQB0_14 DQB1_14 AY3 MB1_D15
MA0_D16 C40 DQA0_15 DQA1_15 B15 MA1_D16 MB0_D16 R1 DQB0_15 DQB1_15 BA3 MB1_D16
MA0_D17 B39 DQA0_16 DQA1_16 A14 MA1_D17 MB0_D17 T2 DQB0_16 DQB1_16 AY4 MB1_D17
MA0_D18 A39 DQA0_17 DQA1_17 B14 MA1_D18 MB0_D18 T1 DQB0_17 DQB1_17 BA4 MB1_D18
MA0_D19 B38 DQA0_18 DQA1_18 B13 MA1_D19 MB0_D19 U2 DQB0_18 DQB1_18 AY5 MB1_D19
MA0_D20 B36 DQA0_19 DQA1_19 A11 MA1_D20 MB0_D20 W1 DQB0_19 DQB1_19 BA7 MB1_D20
MA0_D21 A36 DQA0_20 DQA1_20 B11 MA1_D21 MB0_D21 W2 DQB0_20 DQB1_20 AY7 MB1_D21
MA0_D22 B35 DQA0_21 DQA1_21 A10 MA1_D22 MB0_D22 Y1 DQB0_21 DQB1_21 AY8 MB1_D22
MA0_D23 A35 DQA0_22 DQA1_22 B10 MA1_D23 MB0_D23 Y2 DQB0_22 DQB1_22 BA8 MB1_D23
MA0_D24 B33 DQA0_23 DQA1_23 B8 MA1_D24 MB0_D24 AB2 DQB0_23 DQB1_23 AR4 MB1_D24
MA0_D25 B32 DQA0_24 DQA1_24 A7 MA1_D25 MB0_D25 AC1 DQB0_24 DQB1_24 AR5 MB1_D25
MA0_D26 A32 DQA0_25 DQA1_25 B7 MA1_D26 MB0_D26 AC2 DQB0_25 DQB1_25 AU4 MB1_D26
MA0_D27 B31 DQA0_26 DQA1_26 A6 MA1_D27 MB0_D27 AD1 DQB0_26 DQB1_26 AU7 MB1_D27
MA0_D28 A30 DQA0_27 DQA1_27 A4 MA1_D28 MB0_D28 AF1 DQB0_27 DQB1_27 AN8 MB1_D28
MA0_D29 B29 DQA0_28 DQA1_28 B4 MA1_D29 MB0_D29 AF2 DQB0_28 DQB1_28 AV11 MB1_D29
MA0_D30 B28 DQA0_29 DQA1_29 A3 MA1_D30 MB0_D30 AG1 DQB0_29 DQB1_29 AU11 MB1_D30
MA0_D31 A28 DQA0_30 DQA1_30 B3 MA1_D31 MB0_D31 AG2 DQB0_30 DQB1_30 AP11 MB1_D31
DQA0_31 DQA1_31 DQB0_31 DQB1_31
<21> MA0_A[0..8] MA1_A[0..8] <21> <22> MB0_A[0..8] MB1_A[0..8] <22>
MA0_A0 G25 E15 MA1_A0 MB0_A0 R5 AE7 MB1_A0
MA0_A1 H25 MAA0_0 MAA1_0 H15 MA1_A1 MB0_A1 R8 MAB0_0 MAB1_0 AE8 MB1_A1
MA0_A2 E27 MAA0_1 MAA1_1 G13 MA1_A2 MB0_A2 N7 MAB0_1 MAB1_1 AG5 MB1_A2
MA0_A3 D27 MAA0_2 MAA1_2 D13 MA1_A3 MB0_A3 N4 MAB0_2 MAB1_2 AG4 MB1_A3
MA0_A4 D29 MAA0_3 MAA1_3 H11 MA1_A4 MB0_A4 L8 MAB0_3 MAB1_3 AJ4 MB1_A4
MA0_A5 H27 MAA0_4 MAA1_4 H13 MA1_A5 MB0_A5 N8 MAB0_4 MAB1_4 AG8 MB1_A5
MA0_A6 H23 MAA0_5 MAA1_5 H17 MA1_A6 MB0_A6 U8 MAB0_5 MAB1_5 AC8 MB1_A6
MA0_A7 E23 MAA0_6 MAA1_6 G17 MA1_A7 MB0_A7 U7 MAB0_6 MAB1_6 AC5 MB1_A7
C MA0_A8 D25 MAA0_7 MAA1_7 D15 MA1_A8 MB0_A8 R4 MAB0_7 MAB1_7 AE4 MB1_A8 C
H29 MAA0_8 MAA1_8 E11 L5 MAB0_8 MAB1_8 AJ8
MAA0_9 MAA1_9 MAB0_9 MAB1_9
MA0_WCK01 D33 A22 MA1_WCK01 MB0_WCK01 H1 AP1 MB1_WCK01

<21> MA0_WCK01 MA0_WCK01# WCKA0_0 WCKA1_0 MA1_WCK01# MA1_WCK01 <21> <22> MB0_WCK01 MB0_WCK01# WCKB0_0 WCKB1_0 MB1_WCK01# MB1_WCK01 <22>
E33 B21 J2 AP2
<21> MA0_WCK01# WCKA0B_0 WCKA1B_0 MA1_WCK01# <21> <22> MB0_WCK01# WCKB0B_0 WCKB1B_0 MB1_WCK01# <22>
MA0_WCK23 A34 A8 MA1_WCK23 MB0_WCK23 AB1 AN4 MB1_WCK23

<21> MA0_WCK23 MA0_WCK23# WCKA0_1 WCKA1_1 MA1_WCK23# MA1_WCK23 <21> <22> MB0_WCK23 MB0_WCK23# WCKB0_1 WCKB1_1 MB1_WCK23# MB1_WCK23 <22>
B34 B9 AA2 AN5
<21> MA0_WCK23# WCKA0B_1 WCKA1B_1 MA1_WCK23# <21> <22> MB0_WCK23# WCKB0B_1 WCKB1B_1 MB1_WCK23# <22>
MA0_EDC0 G38 B24 MA1_EDC0 MB0_EDC0 F2 AL1 MB1_EDC0

<21> MA0_EDC0 MA0_EDC1 EDCA0_0 EDCA1_0 MA1_EDC1 MA1_EDC0 <21> <22> MB0_EDC0 MB0_EDC1 EDCB0_0 EDCB1_0 MB1_EDC1 MB1_EDC0 <22>
F41 A18 M2 AU2
B37 B12 V1 BA6
A31 B6 AD2 AV7
<21> MA0_EDC3 EDCA0_3 EDCA1_3 MA1_EDC3 <21> <22> MB0_EDC3 EDCB0_3 EDCB1_3 MB1_EDC3 <22>
MA0_DBI#0 J38 B25 MA1_DBI#0 MB0_DBI#0 E2 AK2 MB1_DBI#0

<21> MA0_DBI#0 MA0_DBI#1 DDBIA0_0 DDBIA1_0 MA1_DBI#1 MA1_DBI#0 <21> <22> MB0_DBI#0 MB0_DBI#1 DDBIB0_0 DDBIB1_0 MB1_DBI#1 MB1_DBI#0 <22>
F40 B18 M1 AV1
A38 A12 V2 AY6
B30 B5 AE2 AV9
<21> MA0_DBI#3 DDBIA0_3 DDBIA1_3 MA1_DBI#3 <21> <22> MB0_DBI#3 DDBIB0_3 DDBIB1_3 MB1_DBI#3 <22>
MA0_ADBI H21 H19 MA1_ADBI MB0_ADBI W8 AA8 MB1_ADBI

<21> MA0_ADBI ADBIA0 ADBIA1 MA1_ADBI <21> <22> MB0_ADBI ADBIB0 ADBIB1 MB1_ADBI <22>
MA0_CS# H31 E7 MA1_CS# MB0_CS# G5 AL8 MB1_CS#

<21> MA0_CS# CSA0B_0 CSA1B_0 MA1_CS# <21> <22> MB0_CS# CSB0B_0 CSB1B_0 MB1_CS# <22>
MA0_CAS# D23 D17 MA1_CAS# MB0_CAS# U4 AC4 MB1_CAS#

<21> MA0_CAS# MA0_RAS# CASA0B CASA1B MA1_RAS# MA1_CAS# <21> <22> MB0_CAS# MB0_RAS# CASB0B CASB1B MB1_RAS# MB1_CAS# <22>
D21 D19 W4 AA4
<21> MA0_RAS# MA0_WE# RASA0B RASA1B MA1_WE# MA1_RAS# <21> <22> MB0_RAS# MB0_WE# RASB0B RASB1B MB1_WE# MB1_RAS# <22>
B G29 D11 L4 AJ7 B
<21> MA0_WE# WEA0B WEA1B MA1_WE# <21> <22> MB0_WE# WEB0B WEB1B MB1_WE# <22>
MA0_CKE G21 E19 MA1_CKE MB0_CKE W5 AA7 MB1_CKE

<21> MA0_CKE CKEA0 CKEA1 MA1_CKE <21> <22> MB0_CKE CKEB0 CKEB1 MB1_CKE <22>
MA0_CLK E31 D7 MA1_CLK MB0_CLK G4 AL5 MB1_CLK
<21> MA0_CLK MA0_CLK# CLKA0 CLKA1 MA1_CLK# MA1_CLK <21> <22> MB0_CLK MB0_CLK# CLKB0 CLKB1 MB1_CLK# MB1_CLK <22>
D31 D9 J4 AL4
<21> MA0_CLK# CLKA0B CLKA1B MA1_CLK# <21> <22> MB0_CLK# CLKB0B CLKB1B MB1_CLK# <22>
RV39 1 DIS@ 2 120_0402_1% K15 K17 MA_VREFD RV1633 1 LEXA@ 2 120_0402_1% R10 U10 MB_VREFD
MEM_CALRA MVREFDA MEM_CALRB MVREFDB
MA_VRAMRST#_G L32 MB_VRAMRST#_G AM11

DRAM_RSTA REV 0.91 DRAM_RSTB
REV 0.91
2160896088A1R16M_FCBGA769P-NH 2160896088A1R16M_FCBGA769P-NH
+1.35VSDGPU
+1.35VSDGPU
1
RV36 RV37 RV1641 RV1642
1
49.9_0402_1% 10_0402_1% DIS@ 49.9_0402_1% 10_0402_1%
1 DIS@ 2 2 DIS@ 1 MA_VRAMRST#_G RV32 1 LEXA@ 2 2 LEXA@ 1 MB_VRAMRST#_G DIS@
<21> MA_VRAMRST# <22> MB_VRAMRST#
40.2_0402_1% RV1635
40.2_0402_1%
2
1
1
1 1 1 1
2
DIS@ DIS@ @ MA_VREFD LEXA@ LEXA@ @
CV96 RV38 CV97 CV2720 RV1643 CV2719 MB_VREFD
120P_0402_50V8J 5.1K_0402_1% 68P_0402_50V8J 120P_0402_50V8J 5.1K_0402_1% 68P_0402_50V8J
1
2 2 DIS@ 2 2
1 DIS@
2
1
RV35 CV486 DIS@ 1 DIS@
100_0402_1% 1U_0201_6.3V6M RV1634 CV487
100_0402_1% 1U_0201_6.3V6M
2
2
A
2 A
2
Place close to GPU (within 25mm) Place close to GPU (within 25mm)
and place componment within (5mm) close to each other and place componment within (5mm) close to each other

R18M-M260/G190_(4/9)_MEM
Custom 1.B
5 4 3 2 1
5 4 3 2 1
UV1G @ UV1H @
D symbol7 symbol8 D
AY32 AY22
TX2P_DPB0P TX2P_DPD0P
BA32 BA22
TX2M_DPB0N TX2M_DPD0N
AY31 AY21
BA31 BA21
AY30 AY20
BA30 BA20
AY28 AY19
TXCBP_DPB3P TXCDP_DPD3P
BA28 BA19
TXCBM_DPB3N TXCDM_DPD3N
AY11
AUX1P
BA11
AUX1N
AM21 AY10
DDCAUX3P DDC1CLK
AP21 1TP@ BA10
DDCAUX3N T238 DDC1DATA
C C
UV1O @
symbol15
AY18
TX2P_DPE0P AY36 AY27
BA18 TX5P_DPA0P TX5P_DPC0P
TX2M_DPE0N BA36 BA27
AY16 TX5M_DPA0N TX5M_DPC0N
TXCEP_DPE3P AY33 AY24
BA14 TXCAP_DPA3P TXCCP_DPC3P
TXCEM_DPE3N BA33 BA24
TXCAM_DPA3N TXCCM_DPC3N
AP19 1TP@
AUX2P T236
AM19 1TP@
AUX2N T232
BA12
B AUX_ZVSS B
2
AU27 1TP@ DIS@

DDCAUX5P T243
RV372 AR23 AV19 1TP@
DDCAUX4P DDC2CLK T235
AV27 1TP@ 150_0402_1%
DDCAUX5N T242
REV 0.91
AP23 AU19 1TP@
T233
1
DDCAUX4N REV 0.91 DDC2DATA

REV 0.91
2160896088A1R16M_FCBGA769P-NH 2160896088A1R16M_FCBGA769P-NH 2160896088A1R16M_FCBGA769P-NH
Data Book:need
config even if not
use display function
A A

R18M-M260/G19_(5/9)_DISPLAY
Custom 1.B
5 4 3 2 1
5 4 3 2 1
+VGA_CORE R17M-P1-50(25W):30A R17M-P1-50(25W):8A SCL:22u x2, 1u x4 +VDDCI

R18M-M2-60:25A R18M-M2-60:Merge-VDDC
SCL:22u x8, 1u x7 R18M-G1-90:60A UV1I @ R18M-G1-90:12A UV1L @
N13 symbol9 L13 symbol12
N15 VDDC#0 VDDCI#0 L17 A2 J39
N21 VDDC#1 VDDCI#1 L21 A5 VSS#0 VSS#58 J40
CV62
CV323
CV324
CV325
CV326
CV327
CV328
CV329
CV330
CV317
CV318
CV319
CV320
CV321
CV322
CV334
CV333
CV332
CV331
CV336
CV335
N23 VDDC#2 VDDCI#2 L25 A9 VSS#1 VSS#59 J41
1 1 1 1 1 1 1 1 1 1 1
2
2
N29 VDDC#3 VDDCI#3 L29 A13 VSS#2 VSS#60 K21
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
N31 VDDC#4 VDDCI#4 N11 A17 VSS#3 VSS#61 K25
DIS@
DIS@
R13 VDDC#5 VDDCI#5 U11 A21 VSS#4 VSS#62 K29
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
1
1
2 2 2 2 2 2 2 R15 VDDC#6 VDDCI#6 AA11 2 2 2 2 A25 VSS#5 VSS#63 K40
D R21 VDDC#7 VDDCI#7 AE11 A29 VSS#6 VSS#64 L3 D
R23 VDDC#8 VDDCI#8 A33 VSS#7 VSS#65 L7
R29 VDDC#9 A37 VSS#8 VSS#66 L11
R31 VDDC#10 A40 VSS#9 VSS#67 L15
U13 VDDC#11 B1 VSS#10 VSS#68 L19
U15 VDDC#12 B40 VSS#11 VSS#69 L23
U21 VDDC#13 B41 VSS#12 VSS#70 L27
U23 VDDC#14 C5 VSS#13 VSS#71 L31
W13 VDDC#17 C11 VSS#16 VSS#74 N1
W23 VDDC#20 C17 VSS#19 VSS#77 N17
W29 VDDC#21 C19 VSS#20 VSS#78 N19
W31 VDDC#22 C21 VSS#21 VSS#79 N25
AA13 VDDC#23 C23 VSS#22 VSS#80 N27
AA29 VDDC#27 C31 VSS#26 VSS#84 R3
AA31 VDDC#28 C33 VSS#27 VSS#85 R7
AC13 VDDC#29 C35 VSS#28 VSS#86 R11
AC23 VDDC#32 E1 VSS#31 VSS#89 R25
AE13 VDDC#35 E9 VSS#34 VSS#92 R35
AE15 VDDC#36 E13 VSS#35 VSS#93 R39
AE21 VDDC#37 E17 VSS#36 VSS#94 U1
AG13 VDDC#41 E39 VSS#40 VSS#98 U19
AG15 VDDC#42 E41 VSS#41 VSS#99 U25
AG21 VDDC#43 G3 VSS#42 VSS#100 U27
AJ13 VDDC#47 G19 VSS#46 VSS#104 W3
C VDDC#49 VSS#48 VSS#106 C
AJ17 G27 W11
AJ25 VDDC#53 J1 VSS#52 VSS#110 W27
AJ27 VDDC#54 J3 VSS#53 VSS#111 W39
AJ29 VDDC#55 J5 VSS#54 VSS#112 AA1
AJ31 VDDC#56 J34 VSS#55 VSS#113 AA3
AL13 VDDC#57 J37 VSS#56 VSS#114
AL15 VDDC#58 VSS#57
AL17 VDDC#59 REV 0.91
AL19 VDDC#60
AL21 VDDC#61 2160896088A1R16M_FCBGA769P-NH
AL23 VDDC#62
AL25 VDDC#63 C3
AL27 VDDC#64 FB_VMEMIO AV13 GPU_VDDCI_SEN
VDDC#65 FB_VDDCI GPU_VDDC_SEN GPU_VDDCI_SEN <45>
AL29 AR13
VDDC#66 FB_VDDC GPU_VSS_SEN_L GPU_VDDC_SEN <45> UV1M @
AL31 AU13
VDDC#67 FB_VSS GPU_VSS_SEN_L <45>
REV 0.91 symbol13
AA5 AN40
2160896088A1R16M_FCBGA769P-NH AA10 VSS#115 VSS#171 AN41
AA17 VSS#116 VSS#172 AP13
AA19 VSS#117 VSS#173 AP17
AA25 VSS#118 VSS#174 AR3
AC3 VSS#122 VSS#178 AR21
0.24uH,<0.15mohm AC7 VSS#123 VSS#179 AR25
+1.35VSDGPU CRB no use, reserve first +1.8VSDGPU AC11 VSS#124 VSS#180 AR27
R17M-P1-50(25W):2A(1.35V) AC17 VSS#125 VSS#181 AR31
UV1N @ RV1632 AC19 VSS#126 VSS#182 AR35
R18M-M2-60:2A(1.35V) VSS#127 VSS#183
SCL:22u x2, 1u x10 R18M-G1-90:2A(1.5V) symbol14 1A SCL:1u x3 0_0805_5% AC25 AR39
K11 AM15 1 RS@ 2 AC27 VSS#128 VSS#184 AU1
K13 VMEMIO#0 VDD_18#0 AP15 AC39 VSS#129 VSS#185 AU3
K19 VMEMIO#1 VDD_18#1 AR15 AE1 VSS#130 VSS#186 AU9
CV347
CV348
CV337
CV338
CV339
CV340
CV341
CV342
CV343
CV344
CV345
CV346
CV349
CV350
CV351
K23 VMEMIO#2 VDD_18#2 AE3 VSS#131 VSS#187 AU23
1 1 1 1 1 1 1 1 1 1 VMEMIO#3 1 1 1 VSS#132 VSS#188
2
K27 AE5 AU29

DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
K31 VMEMIO#4 AE10 VSS#133 VSS#189 AW3
L10 VMEMIO#5 AE17 VSS#134 VSS#190 AW5
22U_0603_6.3V6M
22U_0603_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1
2 2 2 2 2 2 2 2 2 2 N10 VMEMIO#6 2 2 2 AE19 VSS#135 VSS#191 AW7

W10 VMEMIO#7 R17M-P1-50(25W):Merge-VDDCI +0.8VSDGPU AE25 VSS#136 VSS#192 AW9
B B
AC10 VMEMIO#8 AE27 VSS#137 VSS#193 AW11
VMEMIO#9
R18M-M2-60:2A VSS#138 VSS#194
AG10 R18M-G1-90:Merge-VDDCI SCL:1u x7 AE32 AW13
VMEMIO#10 AC32 AE35 VSS#139 VSS#195 AW15
VDD_08#0 AG32 AE39 VSS#140 VSS#196 AW17
VDD_08#1 AG35 AG3 VSS#141 VSS#197 AW19
CV352
CV353
CV354
CV355
CV356
CV357
CV358
VDD_08#2 AJ32 AG7 VSS#142 VSS#198 AW21
VDD_08#3 1 1 1 1 1 1 1 VSS#143 VSS#199
AJ34 AG11 AW23
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
VDD_08#4 AL34 AG17 VSS#144 VSS#200 AW25
VDD_08#5 AG19 VSS#145 VSS#201 AW27
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
W32 2 2 2 2 2 2 1U_0201_6.3V6M 2 AG25 VSS#146 VSS#202 AW29

VDD_08 AG27 VSS#147 VSS#203 AW31
AG39 VSS#148 VSS#204 AW33
AM23 AG40 VSS#149 VSS#205 AW35
VSS AM17 AG41 VSS#150 VSS#206 AW37
VSS AJ1 VSS#151 VSS#207 AW39
REV 0.91
AJ3 VSS#152 VSS#208 AY1
2160896088A1R16M_FCBGA769P-NH AJ10 VSS#154 VSS#210 AY9
AL3 VSS#158 VSS#214 AY29
AL32 VSS#162 VSS#218 BA2
AN1 VSS#165 VSS#221 BA17
+1.8VSDGPU AN7 VSS#167 VSS#223 BA29
CV316 DIS@ UV1J @ VSS#170 VSS#226
1U_0201_6.3V6M 13mA symbol10
1 2 AM13 N35 REV 0.91
TSVDD DPLUS
DG:Thermal Die Temperature 2160896088A1R16M_FCBGA769P-NH
J8
TEMPIN0 N34
SCL:No need to implement. DMINUS
A J7 A
TEMPINRETURN
U38 GPIO_28_FDO Fan Drive Out option
N38 GPIO_28_FDO
TS_A
2
REV 0.91 RV21

10K_0201_5%
2160896088A1R16M_FCBGA769P-NH R535@
1

R18M-M260/G19_(6/9)_PWR/GND
Custom 1.B
5 4 3 2 1
5 4 3 2 1
MA0_D[0..31]
<18> MA0_D[0..31]
<18> MA0_A[0..8]
MA0_A[0..8]
A0 Channel A1 Channel
MA1_D[0..31]
<18> MA1_D[0..31]
MA1_A[0..8]
<18> MA1_A[0..8]
UV1001 @ MF=0 UV1002 @ MF=1
MF=0 MF=1 MF=1 MF=0 MF=0 MF=1 MF=1 MF=0
A4 MA0_D6 A4 MA1_D7
MA0_EDC0 C2 DQ24 DQ0 A2 MA0_D7 MA1_EDC0 C2 DQ24 DQ0 A2 MA1_D5
<18> MA0_EDC0 MA0_EDC1 EDC0 EDC3 DQ25 DQ1 MA0_D5 <18> MA1_EDC0 MA1_EDC1 EDC0 EDC3 DQ25 DQ1 MA1_D6
C13 B4 C13 B4
<18> MA0_EDC1 MA0_EDC2 EDC1 EDC2 DQ26 DQ2 MA0_D4 <18> MA1_EDC1 MA1_EDC3 EDC1 EDC2 DQ26 DQ2 MA1_D4
R13 B2 R13 B2
+1.35VSDGPU <18> MA0_EDC2 MA0_EDC3 EDC2 EDC1 DQ27 DQ3 MA0_D2 +1.35VSDGPU <18> MA1_EDC3 MA1_EDC2 EDC2 EDC1 DQ27 DQ3 MA1_D3
R2 E4 Byte 0 R2 E4 Byte 0
<18> MA0_EDC3 EDC3 EDC0 DQ28 DQ4 MA0_D0 <18> MA1_EDC2 EDC3 EDC0 DQ28 DQ4 MA1_D2
E2 E2
DQ29 DQ5 F4 MA0_D1 DQ29 DQ5 F4 MA1_D0
D RV79 MA0_DBI#0 D2 DQ30 DQ6 F2 MA0_D3 RV1637 MA1_DBI#0 D2 DQ30 DQ6 F2 MA1_D1 D
<18> MA0_DBI#0 MA0_DBI#1 DBI0# DBI3# DQ31 DQ7 MA0_D10 <18> MA1_DBI#0 MA1_DBI#1 DBI0# DBI3# DQ31 DQ7 MA1_D8
60.4_0402_1% D13 A11 60.4_0402_1% D13 A11
MA0_CLK <18> MA0_DBI#1 MA0_DBI#2 DBI1# DBI2# DQ16 DQ8 MA0_D9 MA1_CLK <18> MA1_DBI#1 MA1_DBI#3 DBI1# DBI2# DQ16 DQ8 MA1_D10
1 DIS@ 2 P13 A13 1 DIS@ 2 P13 A13
<18> MA0_DBI#2 MA0_DBI#3 DBI2# DBI1# DQ17 DQ9 MA0_D11 <18> MA1_DBI#3 MA1_DBI#2 DBI2# DBI1# DQ17 DQ9 MA1_D9
P2 B11 P2 B11
<18> MA0_DBI#3 DBI3# DBI0# DQ18 DQ10 MA0_D8 <18> MA1_DBI#2 DBI3# DBI0# DQ18 DQ10 MA1_D11
RV80 B13 RV1636 B13
60.4_0402_1% MA0_CLK J12 DQ19 DQ11 E11 MA0_D15 Byte 1 60.4_0402_1% MA1_CLK J12 DQ19 DQ11 E11 MA1_D12 Byte 1
MA0_CLK# <18> MA0_CLK MA0_CLK# CK DQ20 DQ12 MA0_D12 MA1_CLK# <18> MA1_CLK MA1_CLK# CK DQ20 DQ12 MA1_D13
1 DIS@ 2 J11 E13 1 DIS@ 2 J11 E13
<18> MA0_CLK# MA0_CKE CK# DQ21 DQ13 MA0_D14 <18> MA1_CLK# MA1_CKE CK# DQ21 DQ13 MA1_D15
J3 F11 J3 F11
<18> MA0_CKE CKE# DQ22 DQ14 MA0_D13 <18> MA1_CKE CKE# DQ22 DQ14 MA1_D14
F13 F13
DQ23 DQ15 U11 MA0_D23 DQ23 DQ15 U11 MA1_D31
MA0_A2 H11 DQ8 DQ16 U13 MA0_D21 MA1_A4 H11 DQ8 DQ16 U13 MA1_D30
MA0_A5 K10 BA0/A2 BA2/A4 DQ9 DQ17 T11 MA0_D22 MA1_A3 K10 BA0/A2 BA2/A4 DQ9 DQ17 T11 MA1_D28
MA0_A4 K11 BA1/A5 BA3/A3 DQ10 DQ18 T13 MA0_D20 MA1_A2 K11 BA1/A5 BA3/A3 DQ10 DQ18 T13 MA1_D29
MA0_A3 H10 BA2/A4 BA0/A2 DQ11 DQ19 N11 MA0_D19 Byte 2 MA1_A5 H10 BA2/A4 BA0/A2 DQ11 DQ19 N11 MA1_D25 Byte 3
BA3/A3 BA1/A5 DQ12 DQ20 N13 MA0_D18 BA3/A3 BA1/A5 DQ12 DQ20 N13 MA1_D26
DQ13 DQ21 M11 MA0_D16 DQ13 DQ21 M11 MA1_D24
MA0_A7 K4 DQ14 DQ22 M13 MA0_D17 MA1_A0 K4 DQ14 DQ22 M13 MA1_D27
MA0_A1 H5 A8/A7 A10/A0 DQ15 DQ23 U4 MA0_D24 MA1_A6 H5 A8/A7 A10/A0 DQ15 DQ23 U4 MA1_D16
MA0_A0 H4 A9/A1 A11/A6 DQ0 DQ24 U2 MA0_D26 MA1_A7 H4 A9/A1 A11/A6 DQ0 DQ24 U2 MA1_D17
MA0_A6 K5 A10/A0 A8/A7 DQ1 DQ25 T4 MA0_D25 MA1_A1 K5 A10/A0 A8/A7 DQ1 DQ25 T4 MA1_D19
MA0_A8 J5 A11/A6 A9/A1 DQ2 DQ26 T2 MA0_D27 MA1_A8 J5 A11/A6 A9/A1 DQ2 DQ26 T2 MA1_D18
A12/RFU/NC DQ3 DQ27 N4 MA0_D28 Byte 3 A12/RFU/NC DQ3 DQ27 N4 MA1_D21 Byte 2
A5 DQ4 DQ28 N2 MA0_D29 A5 DQ4 DQ28 N2 MA1_D22
U5 VPP/NC DQ5 DQ29 M4 MA0_D31 +1.35VSDGPU U5 VPP/NC DQ5 DQ29 M4 MA1_D20
VPP/NC DQ6 DQ30 M2 MA0_D30 VPP/NC DQ6 DQ30 M2 MA1_D23
DQ7 DQ31 DQ7 DQ31
RV134 2 DIS@ 1 1K_0402_1% J1 +1.35VSDGPU RV131 2 DIS@ 1 1K_0402_1% J1 +1.35VSDGPU
RV474 2 DIS@ 1 1K_0402_1% J10 MF RV475 2 DIS@ 1 1K_0402_1% J10 MF
RV123 1 DIS@ 2 120_0402_1% J13 SEN B1 RV132 1 DIS@ 2 120_0402_1% J13 SEN B1
ZQ VDDQ D1 ZQ VDDQ D1
VDDQ F1 VDDQ F1
MA0_ADBI J4 VDDQ M1 MA1_ADBI J4 VDDQ M1
<18> MA0_ADBI MA0_RAS# ABI# VDDQ <18> MA1_ADBI MA1_CAS# ABI# VDDQ
G3 P1 G3 P1
<18> MA0_RAS# MA0_CS# RAS# CAS# VDDQ <18> MA1_CAS# MA1_WE# RAS# CAS# VDDQ
G12 T1 G12 T1
<18> MA0_CS# MA0_CAS# CS# WE# VDDQ <18> MA1_WE# MA1_RAS# CS# WE# VDDQ
L3 G2 L3 G2
<18> MA0_CAS# MA0_WE# CAS# RAS# VDDQ <18> MA1_RAS# MA1_CS# CAS# RAS# VDDQ
L12 L2 L12 L2
<18> MA0_WE# WE# CS# VDDQ <18> MA1_CS# WE# CS# VDDQ
B3 B3
VDDQ D3 VDDQ D3
VDDQ F3 VDDQ F3
MA0_WCK01# D5 VDDQ H3 MA1_WCK01# D5 VDDQ H3
<18> MA0_WCK01# MA0_WCK01 WCK01# WCK23# VDDQ <18> MA1_WCK01# MA1_WCK01 WCK01# WCK23# VDDQ
Can NC For GDDR5 Spec. D4 K3 Can NC For GDDR5 Spec. D4 K3
<18> MA0_WCK01 WCK01 WCK23 VDDQ <18> MA1_WCK01 WCK01 WCK23 VDDQ
M3 M3
C MA0_WCK23# VDDQ MA1_WCK23# VDDQ C
P5 P3 P5 P3
<18> MA0_WCK23# MA0_WCK23 WCK23# WCK01# VDDQ <18> MA1_WCK23# MA1_WCK23 WCK23# WCK01# VDDQ
+1.35VSDGPU P4 T3 +1.35VSDGPU P4 T3
<18> MA0_WCK23 WCK23 WCK01 VDDQ <18> MA1_WCK23 WCK23 WCK01 VDDQ
E5 E5
VDDQ N5 VDDQ N5
RV52 1 DIS@ 2 2.37K_0402_1% VREFD1_A0 VREFD1_A0 A10 VDDQ E10 RV486 1 DIS@ 2 2.37K_0402_1% VREFD1_A1 VREFD1_A1 A10 VDDQ E10
RV53 1 DIS@ 2 5.49K_0402_1% VREFD2_A0 U10 VREFD VDDQ N10 RV487 1 DIS@ 2 5.49K_0402_1% VREFD2_A1 U10 VREFD VDDQ N10
VREFC_A0 J14 VREFD VDDQ B12 VREFC_A1 J14 VREFD VDDQ B12
DIS@ VREFC VDDQ D12 DIS@ VREFC VDDQ D12
CV394 1 2 1U_0201_6.3V6M VDDQ F12 CV407 1 2 1U_0201_6.3V6M VDDQ F12
VDDQ H12 VDDQ H12
MA_VRAMRST# J2 VDDQ K12 MA_VRAMRST# J2 VDDQ K12
<18> MA_VRAMRST# RESET# VDDQ RESET# VDDQ
M12 M12
VDDQ P12 VDDQ P12
+1.35VSDGPU VDDQ T12 +1.35VSDGPU VDDQ T12
VDDQ G13 VDDQ G13
H1 VDDQ L13 H1 VDDQ L13
RV478 1 DIS@ 2 2.37K_0402_1% VREFD2_A0 K1 VSS VDDQ B14 RV482 1 DIS@ 2 2.37K_0402_1% VREFD2_A1 K1 VSS VDDQ B14
RV479 1 DIS@ 2 5.49K_0402_1% B5 VSS VDDQ D14 RV483 1 DIS@ 2 5.49K_0402_1% B5 VSS VDDQ D14
G5 VSS VDDQ F14 G5 VSS VDDQ F14
DIS@ L5 VSS VDDQ M14 DIS@ L5 VSS VDDQ M14
CV403 1 2 1U_0201_6.3V6M T5 VSS VDDQ P14 CV405 1 2 1U_0201_6.3V6M T5 VSS VDDQ P14
B10 VSS VDDQ T14 B10 VSS VDDQ T14
D10 VSS VDDQ D10 VSS VDDQ
G10 VSS G10 VSS
L10 VSS A1 L10 VSS A1
P10 VSS VSSQ C1 P10 VSS VSSQ C1
+1.35VSDGPU T10 VSS VSSQ E1 +1.35VSDGPU T10 VSS VSSQ E1
H14 VSS VSSQ N1 H14 VSS VSSQ N1
K14 VSS VSSQ R1 K14 VSS VSSQ R1
RV480 1 DIS@ 2 2.37K_0402_1% VREFC_A0 +1.35VSDGPU VSS VSSQ U1 RV484 1 DIS@ 2 2.37K_0402_1% VREFC_A1 +1.35VSDGPU VSS VSSQ U1
RV481 1 DIS@ 2 5.49K_0402_1% VSSQ H2 RV485 1 DIS@ 2 5.49K_0402_1% VSSQ H2
G1 VSSQ K2 G1 VSSQ K2
DIS@ L1 VDD VSSQ A3 DIS@ L1 VDD VSSQ A3
CV404 1 2 1U_0201_6.3V6M G4 VDD VSSQ C3 CV406 1 2 1U_0201_6.3V6M G4 VDD VSSQ C3
L4 VDD VSSQ E3 L4 VDD VSSQ E3
C5 VDD VSSQ N3 C5 VDD VSSQ N3
R5 VDD VSSQ R3 R5 VDD VSSQ R3
C10 VDD VSSQ U3 C10 VDD VSSQ U3
R10 VDD VSSQ C4 R10 VDD VSSQ C4
D11 VDD VSSQ R4 D11 VDD VSSQ R4
G11 VDD VSSQ F5 G11 VDD VSSQ F5
L11 VDD VSSQ M5 L11 VDD VSSQ M5
B B
P11 VDD VSSQ F10 P11 VDD VSSQ F10
G14 VDD VSSQ M10 G14 VDD VSSQ M10
L14 VDD VSSQ C11 L14 VDD VSSQ C11
VDD VSSQ R11 VDD VSSQ R11
VSSQ A12 VSSQ A12
VSSQ C12 VSSQ C12
VSSQ E12 VSSQ E12
VSSQ N12 VSSQ N12
VSSQ R12 VSSQ R12
170-BALL VSSQ U12 170-BALL VSSQ U12
VSSQ H13 VSSQ H13
SGRAM GDDR5 VSSQ K13 SGRAM GDDR5 VSSQ K13
VSSQ A14 VSSQ A14
VSSQ C14 VSSQ C14
VSSQ E14 VSSQ E14
VSSQ N14 VSSQ N14
VSSQ R14 VSSQ R14
VSSQ U14 VSSQ U14
VSSQ VSSQ
H5GC4H24AJR-R0C_BGA170 H5GC4H24AJR-R0C_BGA170
Decoupling Caps for single-sided Decoupling Caps for Clamshell

1x 10uF /per DRAM 1x 10uF /per Clamshell DRAM
8x 0.1uF /per DRAM
+1.35VSDGPU +1.35VSDGPU +1.35VSDGPU
CV238
CV242
CV243
CV247
CV248
CV392
CV396
CV397
CV398
CV414
CV415
CV416
CV417
CV418
CV419
CV420
CV421
CV155
CV157
CV158
CV198
CV210
CV211
CV213
CV230
CV233
CV235
CV465
CV460
CV461
CV462
CV463
CV464
CV466
CV467
CV468
CV452
CV453
CV454
CV455
CV456
CV457
CV458
CV459
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
A A
10U_0603_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
10U_0603_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
R18M-M260/G190_(7/9)_CH A
Custom 1.B
5 4 3 2 1
5 4 3 2 1
MB0_D[0..31]
<18> MB0_D[0..31]
<18> MB0_A[0..8]
MB0_A[0..8]
B0 Channel B1 Channel
MB1_D[0..31]
<18> MB1_D[0..31]
MB1_A[0..8]
<18> MB1_A[0..8]
UV1003 @ MF=0 UV1004 @ MF=1
MF=0 MF=1 MF=1 MF=0 MF=0 MF=1 MF=1 MF=0
A4 MB0_D15 A4 MB1_D7
MB0_EDC1 C2 DQ24 DQ0 A2 MB0_D14 MB1_EDC0 C2 DQ24 DQ0 A2 MB1_D5
<18> MB0_EDC1 MB0_EDC0 EDC0 EDC3 DQ25 DQ1 MB0_D12 <18> MB1_EDC0 MB1_EDC1 EDC0 EDC3 DQ25 DQ1 MB1_D6
C13 B4 C13 B4
<18> MB0_EDC0 MB0_EDC2 EDC1 EDC2 DQ26 DQ2 MB0_D13 <18> MB1_EDC1 MB1_EDC2 EDC1 EDC2 DQ26 DQ2 MB1_D4
R13 B2 R13 B2
+1.35VSDGPU <18> MB0_EDC2 MB0_EDC3 EDC2 EDC1 DQ27 DQ3 MB0_D10 +1.35VSDGPU <18> MB1_EDC2 MB1_EDC3 EDC2 EDC1 DQ27 DQ3 MB1_D3
R2 E4 Byte 1 R2 E4 Byte 0
<18> MB0_EDC3 EDC3 EDC0 DQ28 DQ4 MB0_D9 <18> MB1_EDC3 EDC3 EDC0 DQ28 DQ4 MB1_D2
E2 E2
DQ29 DQ5 F4 MB0_D11 DQ29 DQ5 F4 MB1_D0
D RV473 MB0_DBI#1 D2 DQ30 DQ6 F2 MB0_D8 RV1638 MB1_DBI#0 D2 DQ30 DQ6 F2 MB1_D1 D
<18> MB0_DBI#1 MB0_DBI#0 DBI0# DBI3# DQ31 DQ7 MB0_D0 <18> MB1_DBI#0 MB1_DBI#1 DBI0# DBI3# DQ31 DQ7 MB1_D8
60.4_0402_1% D13 A11 60.4_0402_1% D13 A11
MB0_CLK <18> MB0_DBI#0 MB0_DBI#2 DBI1# DBI2# DQ16 DQ8 MB0_D1 MB1_CLK <18> MB1_DBI#1 MB1_DBI#2 DBI1# DBI2# DQ16 DQ8 MB1_D10
1 LEXA@ 2 P13 A13 1 LEXA@ 2 P13 A13
<18> MB0_DBI#2 MB0_DBI#3 DBI2# DBI1# DQ17 DQ9 MB0_D3 <18> MB1_DBI#2 MB1_DBI#3 DBI2# DBI1# DQ17 DQ9 MB1_D9
P2 B11 P2 B11
<18> MB0_DBI#3 DBI3# DBI0# DQ18 DQ10 MB0_D2 <18> MB1_DBI#3 DBI3# DBI0# DQ18 DQ10 MB1_D11
RV472 B13 RV1639 B13
60.4_0402_1% MB0_CLK J12 DQ19 DQ11 E11 MB0_D6 Byte 0 60.4_0402_1% MB1_CLK J12 DQ19 DQ11 E11 MB1_D12 Byte 1
MB0_CLK# <18> MB0_CLK MB0_CLK# CK DQ20 DQ12 MB0_D5 MB1_CLK# <18> MB1_CLK MB1_CLK# CK DQ20 DQ12 MB1_D13
1 LEXA@ 2 J11 E13 1 LEXA@ 2 J11 E13
<18> MB0_CLK# MB0_CKE CK# DQ21 DQ13 MB0_D7 <18> MB1_CLK# MB1_CKE CK# DQ21 DQ13 MB1_D15
J3 F11 J3 F11
<18> MB0_CKE CKE# DQ22 DQ14 MB0_D4 <18> MB1_CKE CKE# DQ22 DQ14 MB1_D14
F13 F13
DQ23 DQ15 U11 MB0_D23 DQ23 DQ15 U11 MB1_D20
MB0_A2 H11 DQ8 DQ16 U13 MB0_D21 MB1_A4 H11 DQ8 DQ16 U13 MB1_D22
MB0_A5 K10 BA0/A2 BA2/A4 DQ9 DQ17 T11 MB0_D22 MB1_A3 K10 BA0/A2 BA2/A4 DQ9 DQ17 T11 MB1_D21
MB0_A4 K11 BA1/A5 BA3/A3 DQ10 DQ18 T13 MB0_D20 MB1_A2 K11 BA1/A5 BA3/A3 DQ10 DQ18 T13 MB1_D23
MB0_A3 H10 BA2/A4 BA0/A2 DQ11 DQ19 N11 MB0_D19 Byte 2 MB1_A5 H10 BA2/A4 BA0/A2 DQ11 DQ19 N11 MB1_D16 Byte 2
BA3/A3 BA1/A5 DQ12 DQ20 N13 MB0_D18 BA3/A3 BA1/A5 DQ12 DQ20 N13 MB1_D19
DQ13 DQ21 M11 MB0_D16 DQ13 DQ21 M11 MB1_D17
MB0_A7 K4 DQ14 DQ22 M13 MB0_D17 MB1_A0 K4 DQ14 DQ22 M13 MB1_D18
MB0_A1 H5 A8/A7 A10/A0 DQ15 DQ23 U4 MB0_D24 MB1_A6 H5 A8/A7 A10/A0 DQ15 DQ23 U4 MB1_D25
MB0_A0 H4 A9/A1 A11/A6 DQ0 DQ24 U2 MB0_D26 MB1_A7 H4 A9/A1 A11/A6 DQ0 DQ24 U2 MB1_D24
MB0_A6 K5 A10/A0 A8/A7 DQ1 DQ25 T4 MB0_D25 MB1_A1 K5 A10/A0 A8/A7 DQ1 DQ25 T4 MB1_D26
MB0_A8 J5 A11/A6 A9/A1 DQ2 DQ26 T2 MB0_D27 MB1_A8 J5 A11/A6 A9/A1 DQ2 DQ26 T2 MB1_D27
A12/RFU/NC DQ3 DQ27 N4 MB0_D28 Byte 3 A12/RFU/NC DQ3 DQ27 N4 MB1_D29 Byte 3
A5 DQ4 DQ28 N2 MB0_D29 A5 DQ4 DQ28 N2 MB1_D31
U5 VPP/NC DQ5 DQ29 M4 MB0_D31 +1.35VSDGPU U5 VPP/NC DQ5 DQ29 M4 MB1_D30
VPP/NC DQ6 DQ30 M2 MB0_D30 VPP/NC DQ6 DQ30 M2 MB1_D28
DQ7 DQ31 DQ7 DQ31
RV116 2 LEXA@ 1 1K_0402_1% J1 +1.35VSDGPU RV117 2 LEXA@ 1 1K_0402_1% J1 +1.35VSDGPU
RV476 2 LEXA@ 1 1K_0402_1% J10 MF RV477 2 LEXA@ 1 1K_0402_1% J10 MF
RV120 1 LEXA@ 2 120_0402_1% J13 SEN B1 RV121 1 LEXA@ 2 120_0402_1% J13 SEN B1
ZQ VDDQ D1 ZQ VDDQ D1
VDDQ F1 VDDQ F1
MB0_ADBI J4 VDDQ M1 MB1_ADBI J4 VDDQ M1
<18> MB0_ADBI MB0_RAS# ABI# VDDQ <18> MB1_ADBI MB1_CAS# ABI# VDDQ
G3 P1 G3 P1
<18> MB0_RAS# MB0_CS# RAS# CAS# VDDQ <18> MB1_CAS# MB1_WE# RAS# CAS# VDDQ
G12 T1 G12 T1
<18> MB0_CS# MB0_CAS# CS# WE# VDDQ <18> MB1_WE# MB1_RAS# CS# WE# VDDQ
L3 G2 L3 G2
<18> MB0_CAS# MB0_WE# CAS# RAS# VDDQ <18> MB1_RAS# MB1_CS# CAS# RAS# VDDQ
L12 L2 L12 L2
<18> MB0_WE# WE# CS# VDDQ <18> MB1_CS# WE# CS# VDDQ
B3 B3
VDDQ D3 VDDQ D3
VDDQ F3 VDDQ F3
MB0_WCK01# D5 VDDQ H3 MB1_WCK01# D5 VDDQ H3
<18> MB0_WCK01# MB0_WCK01 WCK01# WCK23# VDDQ <18> MB1_WCK01# MB1_WCK01 WCK01# WCK23# VDDQ
Can NC For GDDR5 Spec. D4 K3 Can NC For GDDR5 Spec. D4 K3
<18> MB0_WCK01 WCK01 WCK23 VDDQ <18> MB1_WCK01 WCK01 WCK23 VDDQ
M3 M3
C MB0_WCK23# VDDQ MB1_WCK23# VDDQ C
P5 P3 P5 P3
<18> MB0_WCK23# MB0_WCK23 WCK23# WCK01# VDDQ <18> MB1_WCK23# MB1_WCK23 WCK23# WCK01# VDDQ
+1.35VSDGPU P4 T3 +1.35VSDGPU P4 T3
<18> MB0_WCK23 WCK23 WCK01 VDDQ <18> MB1_WCK23 WCK23 WCK01 VDDQ
E5 E5
VDDQ N5 VDDQ N5
RV498 1 LEXA@ 2 2.37K_0402_1% VREFD1_B0 VREFD1_B0 A10 VDDQ E10 RV492 1 LEXA@ 2 2.37K_0402_1% VREFD1_B1 VREFD1_B1 A10 VDDQ E10
RV499 1 LEXA@ 2 5.49K_0402_1% VREFD2_B0 U10 VREFD VDDQ N10 RV493 1 LEXA@ 2 5.49K_0402_1% VREFD2_B1 U10 VREFD VDDQ N10
VREFC_B0 J14 VREFD VDDQ B12 VREFC_B1 J14 VREFD VDDQ B12
LEXA@ VREFC VDDQ D12 LEXA@ VREFC VDDQ D12
CV413 1 2 1U_0201_6.3V6M VDDQ F12 CV410 1 2 1U_0201_6.3V6M VDDQ F12
VDDQ H12 VDDQ H12
MB_VRAMRST# J2 VDDQ K12 MB_VRAMRST# J2 VDDQ K12
<18> MB_VRAMRST# RESET# VDDQ RESET# VDDQ
M12 M12
VDDQ P12 VDDQ P12
+1.35VSDGPU VDDQ T12 +1.35VSDGPU VDDQ T12
VDDQ G13 VDDQ G13
H1 VDDQ L13 H1 VDDQ L13
RV494 1 LEXA@ 2 2.37K_0402_1% VREFD2_B0 K1 VSS VDDQ B14 RV488 1 LEXA@ 2 2.37K_0402_1% VREFD2_B1 K1 VSS VDDQ B14
RV495 1 LEXA@ 2 5.49K_0402_1% B5 VSS VDDQ D14 RV489 1 LEXA@ 2 5.49K_0402_1% B5 VSS VDDQ D14
G5 VSS VDDQ F14 G5 VSS VDDQ F14
LEXA@ L5 VSS VDDQ M14 LEXA@ L5 VSS VDDQ M14
CV411 1 2 1U_0201_6.3V6M T5 VSS VDDQ P14 CV408 1 2 1U_0201_6.3V6M T5 VSS VDDQ P14
B10 VSS VDDQ T14 B10 VSS VDDQ T14
D10 VSS VDDQ D10 VSS VDDQ
G10 VSS G10 VSS
L10 VSS A1 L10 VSS A1
P10 VSS VSSQ C1 P10 VSS VSSQ C1
+1.35VSDGPU T10 VSS VSSQ E1 +1.35VSDGPU T10 VSS VSSQ E1
H14 VSS VSSQ N1 H14 VSS VSSQ N1
K14 VSS VSSQ R1 K14 VSS VSSQ R1
RV496 1 LEXA@ 2 2.37K_0402_1% VREFC_B0 +1.35VSDGPU VSS VSSQ U1 RV490 1 LEXA@ 2 2.37K_0402_1% VREFC_B1 +1.35VSDGPU VSS VSSQ U1
RV497 1 LEXA@ 2 5.49K_0402_1% VSSQ H2 RV491 1 LEXA@ 2 5.49K_0402_1% VSSQ H2
G1 VSSQ K2 G1 VSSQ K2
LEXA@ L1 VDD VSSQ A3 LEXA@ L1 VDD VSSQ A3
CV412 1 2 1U_0201_6.3V6M G4 VDD VSSQ C3 CV409 1 2 1U_0201_6.3V6M G4 VDD VSSQ C3
L4 VDD VSSQ E3 L4 VDD VSSQ E3
C5 VDD VSSQ N3 C5 VDD VSSQ N3
R5 VDD VSSQ R3 R5 VDD VSSQ R3
C10 VDD VSSQ U3 C10 VDD VSSQ U3
R10 VDD VSSQ C4 R10 VDD VSSQ C4
D11 VDD VSSQ R4 D11 VDD VSSQ R4
G11 VDD VSSQ F5 G11 VDD VSSQ F5
L11 VDD VSSQ M5 L11 VDD VSSQ M5
B B
P11 VDD VSSQ F10 P11 VDD VSSQ F10
G14 VDD VSSQ M10 G14 VDD VSSQ M10
L14 VDD VSSQ C11 L14 VDD VSSQ C11
VDD VSSQ R11 VDD VSSQ R11
VSSQ A12 VSSQ A12
VSSQ C12 VSSQ C12
VSSQ E12 VSSQ E12
VSSQ N12 VSSQ N12
VSSQ R12 VSSQ R12
170-BALL VSSQ U12 170-BALL VSSQ U12
VSSQ H13 VSSQ H13
SGRAM GDDR5 VSSQ K13 SGRAM GDDR5 VSSQ K13
VSSQ A14 VSSQ A14
VSSQ C14 VSSQ C14
VSSQ E14 VSSQ E14
VSSQ N14 VSSQ N14
VSSQ R14 VSSQ R14
VSSQ U14 VSSQ U14
VSSQ VSSQ
H5GC4H24AJR-R0C_BGA170 H5GC4H24AJR-R0C_BGA170
Decoupling Caps for single-sided Decoupling Caps for Clamshell

8x 0.1uF /per DRAM
+1.35VSDGPU +1.35VSDGPU For Layout Antenna Effect +1.35VSDGPU For Layout Antenna Effect
CV445
CV440
CV441
CV442
CV443
CV444
CV446
CV447
CV448
CV432
CV433
CV434
CV435
CV436
CV437
CV438
CV439
CV422
CV423
CV424
CV425
CV426
CV427
CV428
CV429
CV430
CV431
CV481
CV482
CV480
CV485
CV477
CV483
CV484
CV479
CV478
CV469
CV470
CV471
CV472
CV473
CV474
CV475
CV476
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
A A
10U_0603_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
10U_0603_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
LEXA@
LEXA@
LEXA@
LEXA@
LEXA@
LEXA@
LEXA@
LEXA@
LEXA@
LEXA@
LEXA@
LEXA@
LEXA@
LEXA@
LEXA@
LEXA@
LEXA@
LEXA@
LEXA@
LEXA@
LEXA@
LEXA@
LEXA@
LEXA@
LEXA@
LEXA@
LEXA@
LEXA@
LEXA@
LEXA@
LEXA@
LEXA@
LEXA@
LEXA@
LEXA@
LEXA@
LEXA@
LEXA@
LEXA@
LEXA@
LEXA@
LEXA@
DIS@
DIS@
R18M-M260/G190_(8/9)_CH B
Custom 1.B
5 4 3 2 1
5 4 3 2 1
PCIE_RST_L APU_PCIE_RST#
APU AND PLT_RST_VGA# PERSTB
EGPIO140 PE_GPIO0 GATE GPU
EGPIO141 PE_GPIO1
EGPIO143
D AND D
GATE
+3VALW +3VSDGPU
VGA_ON
DL SW 1
R18M-M2-60 R18M-G1-90
Power Up Power Up Delay 3ms
Ready within Ready within
20m s 20m s +1.8VALW +1.8VSDGPU
2
VGA_ON VGA_ON +19VB +0.8VSDGPU
+3VSDGPU +3VSDGPU Delay 5ms
SWR 3
Delay 3ms
+1.8VSDGPU +1.8VSDGPU Delay 3ms
Delay 5ms +19VB +VGA_CORE
+0.8VSDGPU Delay +3VSDGPU 7ms +3VSDGPU
VGA_ON_B PWM 4
AND VGA_ON_B DGPU_PWROK
VGA_ON GATE Delay +3VSDGPU 7ms
VGA_ON_B Delay +3VSDGPU 7ms +VDDCI
(0.8VSDGPU merge VDDCI)
+VGA_CORE Driver
+VDDCI
+VGA_CORE
(VDDCI merge VDDC)
DGPU_PWROK
DGPU_PWROK
+1.35VSDGPU (1.5V) +19VB +1.35VSDGPU
C
+1.35VSDGPU (1.35V) LD O 5 C
DGPU_PWROK
For AMD R17M-P1-50/R18M-M2-60/R18M-G1-90 VRAM AMD GPU PN
Memory ID/Vendor/Size Memory PN R3(ABO!) A0 Memory PN R3(ABO!) A1 Memory PN R3(ABO!) B0 Memory PN R3(ABO!) B1 R17M-P1-50 PN R3(ROH)
UV1 RX540@
000 (5Gb) UV1001 V4G_S@ UV1001 PV4G_S@ UV1002 V4G_S@ UV1002 PV4G_S@ UV1003 V4G_S@ UV1004 V4G_S@
SAMSUNG(6Gb)
256M x32 S IC 216-0905018 A1 R17M-P1-50 ABO!
S IC D5 256M32 K4G80325FB-HC03 FBGA ABO! S IC D5 256M32 K4G80325FB-HC03 FBGA ABO! S IC D5 256M32 K4G80325FB-HC03 FBGA ABO! S IC D5 256M32 K4G80325FB-HC03 FBGA ABO! SA0000ALV20
SA000094R30 SA000094R30 SA000094R30 SA000094R30
001 (5Gb) UV1001 V4G_H@ UV1001 PV4G_H@ UV1002 V4G_H@ UV1002 PV4G_H@ UV1003 V4G_H@ UV1004 V4G_H@ R18M-M2-60 PN R1(ROH)
HYNIX (6Gb) UV1 R535@
256M x32
S IC D5 256M32 H5GC8H24MJR-T2C BGA ABO! S IC D5 256M32 H5GC8H24MJR-T2C BGA ABO! S IC D5 256M32 H5GC8H24MJR-T2C BGA ABO! S IC D5 256M32 H5GC8H24MJR-T2C BGA ABO!
SA00009ZG20 SA00009ZG20 SA00009ZG20 SA00009ZG20
S IC 216-0915006 A0 R18M-M2-60 FCBGA 769P GPU 0FA
SA0000BFE00
UV1001 V2G_S@ UV1001 PV2G_S@ UV1002 V2G_S@ UV1002 PV2G_S@ UV1003 V2G_S@ UV1004 V2G_S@
010 (5Gb)
SAMSUNG R18M-G1-90 PN R1(ROH)
128M x32 UV1 RX565@
S IC D5 128M32 K4G41325FE-HC28 FBGA ABO! S IC D5 128M32 K4G41325FE-HC28 FBGA ABO! S IC D5 128M32 K4G41325FE-HC28 FBGA ABO! S IC D5 128M32 K4G41325FE-HC28 FBGA ABO!
SA00009TT30 SA00009TT30 SA00009TT30 SA00009TT30
B B
UV1001 V2G_H@ UV1001 PV2G_H@ UV1002 V2G_H@ UV1002 PV2G_H@ UV1003 V2G_H@ UV1004 V2G_H@
011 (5Gb) S IC 215-0908004 A1 R18M-G1-90 FCBGA 769P GPU 0FA
SA0000BFF00
HYNIX
128M x32
S IC D5 128M322.5G H5GC4H24AJR-T2C ABO! S IC D5 128M322.5G H5GC4H24AJR-T2C ABO! S IC D5 128M322.5G H5GC4H24AJR-T2C ABO! S IC D5 128M322.5G H5GC4H24AJR-T2C ABO!
SA000085V70 SA000085V70 SA000085V70 SA000085V70
100 (5Gb) UV1001 V4G_M@ UV1001 PV4G_M@ UV1002 V4G_M@ UV1002 PV4G_M@ UV1003 V4G_M@ UV1004 V4G_M@
MICRON (6Gb)
256M x32
S IC D5 256M32 MT51J256M32HF-60A ABO! S IC D5 256M32 MT51J256M32HF-60A ABO! S IC D5 256M32 MT51J256M32HF-60A ABO! S IC D5 256M32 MT51J256M32HF-60A ABO!
SA000096K30 SA000096K30 SA000096K30 SA000096K30
For AMD R18M-G1-90 VRAM Table (7Gb)

Memory ID/Vendor/Size Memory PN R3(ABO!) A0 Memory PN R3(ABO!) A1 Memory PN R3(ABO!) B0 Memory PN R3(ABO!) B1
UV1001 V4G_S7G@ UV1002 V4G_S7G@ UV1003 V4G_S7G@ UV1004 V4G_S7G@

000
SAMSUNG(7Gb)
256M x32
S IC D5 256M32 K4G80325FB-HC28 FBGA ABO! S IC D5 256M32 K4G80325FB-HC28 FBGA ABO! S IC D5 256M32 K4G80325FB-HC28 FBGA ABO! S IC D5 256M32 K4G80325FB-HC28 FBGA ABO!
SA000092D00 SA000092D00 SA000092D00 SA000092D00
UV1001 V4G_H7G@ UV1002 V4G_H7G@ UV1003 V4G_H7G@ UV1004 V4G_H7G@

A 001 A
HYNIX (7Gb)
256M x32
S IC D5 256M32 H5GC8H24MJR-R0C BGA ABO! S IC D5 256M32 H5GC8H24MJR-R0C BGA ABO! S IC D5 256M32 H5GC8H24MJR-R0C BGA ABO! S IC D5 256M32 H5GC8H24MJR-R0C BGA ABO!
SA00009U110 SA00009U110 SA00009U110 SA00009U110
UV1001 V4G_M7G@ UV1002 V4G_M7G@ UV1003 V4G_M7G@ UV1004 V4G_M7G@
100
MICRON (7Gb) Security Classification Compal Secret Data Compal Electronics, Inc.
2017/12/25 2019/12/25 Title
256M x32 S IC D5 256M32 MT51J256M32HF-70A ABO! S IC D5 256M32 MT51J256M32HF-70A ABO! S IC D5 256M32 MT51J256M32HF-70A ABO! S IC D5 256M32 MT51J256M32HF-70A ABO!
R18M-M260/G190_(9/9)_NOTE
SA00009TV10 SA00009TV10 SA00009TV10 SA00009TV10 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.B
5 4 3 2 1
5 4 3 2 1
LCD POWER CIRCUIT

+3VS +LCDVDD Place closed to JEDP1 LED PANEL Conn.
U8 W=60mils
1U_0201_6.3V6M +LCDVDD
C2656
5 1 W=60mils JEDP1
IN OUT 1
1 +INVPW R_B+ 1
2 1 1 2
GND 3 2
4 3 C368 4 3
2 EN OC 1 4
0.1U_0201_10V6K 5
SY6288C20AAC_SOT23-5 C367 2 2@ C419 INVTPW M 6 5
<8> INVTPW M 6
SA000079400 4.7U_0402_6.3V6M 0.1U_0201_10V6K BKOFF# 7
2@ <30> BKOFF# EDP_HPD 7
D 8 D
<8> ENVDD EDP_HPD <8> EDP_HPD 8
Vih=1.5 R364 1 2 100K_0402_5% +LCDVDD 9
10 9
INVTPW M R393 1 @ 2 100K_0402_5% 11 10
12 11
@EMC@ 13 12
+INVPW R_B+ C549 1 2 220P_0402_50V7K EDP_AUXN_C 14 13
@EMC@ EDP_AUXP_C 15 14
BKOFF# C528 1 2 220P_0402_50V7K 16 15
EDP_TXP0_C 17 16
W=60mils R280 1 @ 2 10K_0402_5% EDP_TXN0_C 18 17
19 18
EDP_TXP1_C 20 19
L11 EDP_TXN1_C 21 20
HCB2012KF-221T30_0805 22 21
W=60mils 1 2 EDP_TXP2_C 23 22
+19VB_CPU EDP_TXN2_C 23
1 1 24
24
68P_0402_50V8J
C365 @EMC@
1000P_0402_50V7K
C364 @EMC@
25
EDP_TXP3_C 26 25
SM01000EJ00 3000ma 26
EDP_TXN3_C 27
220ohm@100mhz 2 2 +3VALW +3VS +3VS_CAM 27
DCR 0.04 28
HUB_USB20_P2 29 28
<33> HUB_USB20_P2 HUB_USB20_N2 29
30
<33> HUB_USB20_N2 30
R110 1 RS@ 2 0_0603_5% 31
32 31
Touch Screen +TS_PW R 32
W=20mils 33
TS_EN 34 33
<30> TS_EN 34
U45 @ +3VS_CAM 35
USB20_N4_R 35
1U_0201_6.3V6M
C102
5 1 36 41
C IN OUT USB20_P4_R 37 36 G1 42 C
1 37 G2
0.1U_0201_10V6K
C375
1U_0201_6.3V6M
C2735
2 1 1 For Camera 38 43
@ GND DMIC_CLK_R 39 38 G3 44
<29> DMIC_CLK_R DMIC_DATA 39 G4
4 3 @ 40 45
2 EN OC <29> DMIC_DATA 40 G5
SY6288C20AAC_SOT23-5 2 2 ACES_50398-04041-001
SA000079400 CONN@
<8> EDP_TXP0
C371 1
C372 1
2
2
.1U_0402_16V7K
.1U_0402_16V7K
EDP_TXP0_C
EDP_TXN0_C
Vih=1.5 SP010013I00
<8> EDP_TXN0 <30> CAM_EN
C373 1 2 .1U_0402_16V7K EDP_TXP1_C
<8> EDP_TXP1
3
C374 1 2 .1U_0402_16V7K EDP_TXN1_C
<8> EDP_TXN1 EDP_TXP2_C
C2695 1 2 .1U_0402_16V7K
<8>
<8>
EDP_TXP2
EDP_TXN2
C2696 1 2 .1U_0402_16V7K EDP_TXN2_C
EDP_TXP3_C
Place closed to JEDP1
C2698 1 2 .1U_0402_16V7K
<8> EDP_TXP3 EDP_TXN3_C
C2697 1 2 .1U_0402_16V7K D2015
<8> EDP_TXN3
@EMC@
YSLC05CH_SOT23-3
SCA00000U10
1
<8> EDP_AUXP C370 1 2 .1U_0402_16V7K EDP_AUXP_C
EDP_AUXN_C
Touch Screen
<8> EDP_AUXN C369 1 2 .1U_0402_16V7K
+5VS +3VS +TS_PW R
R3987 1 @ 2 0_0603_5%
R3986 1 @ 2 0_0603_5%
B B
L2511
4 3 USB20_P4_R
<10> USB20_P4
1 2 USB20_N4_R
<10> USB20_N4
DLM0NSN900HY2D_4P
EMC@
SM070005U00
A A

EDP/CAMERA/DMIC
Custom 1.B
5 4 3 2 1
5 4 3 2 1
+3VS +1.2V_HDMI +5VS_DISP

8 1 U74 W=40mils ZZZ
VIN VOUT
1
7 2 +5VS 3
NC ADJ R4012 OUT
6 3 4.99K_0402_1% 1 1
10U_0603_6.3V6M
+5VALW VDD PGOOD IN
1
5 4 2 C543 HDMI_ROYALTY
2
EN GND 9 GND 0.1U_0201_10V6K ROYALTY HDMI W/LOGO+HDCP
C2738
PGND 2
RO0000003HM
10U_0603_6.3V6M
1
U1302 2 AP2330W-7_SC59-3 45@
1 1
1U_0201_6.3V6M
RT9041E-15GQW_WDFN8_2X2 R4013 SA00004ZA00
10K_0402_1%
C2736
C2737
SA00006K300
2 2
D D
2
+3VS
HDMI_RT_CLKN R756 1 RS@ 2 0_0402_5% HDMI_L_CLKN For HDMI DDC Capacitance Leakage issue
Improve Intra-pair Skew on CLK+/-
+1.2V_HDMI
0.1U_0201_10V6K
0.01U_0402_16V7K
0.01U_0402_16V7K
L2512
1 1 1 @ SM070003V00
2 1 2
D2016 @EMC@
C2746
C2749 HDMI_RT_HPD 6 3
C2744
C2745
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
+5VS_DISP
0.01U_0402_16V7K
0.01U_0402_16V7K
1 1 1 1 1 0.01U_0402_16V7K 1
2 2 2 3 4 @ 3.3P_0402_50V8
I/O4 I/O2
1
U2615
C2739
C2740
C2748
6 1 HCM1012GH900BP_4P 5 2
C2741
C2742
C2743
2 2 2 2 2 2 30 VDD12 VDD33 24 HDMI_RT_CLKP R765 1 RS@ 2 0_0402_5% HDMI_L_CLKP VDD GND

11 VDD12 VDD33
43 VDDA12
46 VDDRX12 23 HDMI_RT_TX_P2 HDMI_CTRL_CLK 4 1 HDMI_CTRL_DAT
15 VDDRX12 OUT_D2p 22 HDMI_RT_TX_N2 HDMI_RT_TX_N0 R769 1 RS@ 2 0_0402_5% HDMI_L_TX_N0 I/O3 I/O1
18 VDDTX12 OUT_D2n AZC099-04S.R7G_SOT23-6
37 VDDTX12 20 HDMI_RT_TX_P1
POWERSWITCH OUT_D1p HDMI_RT_TX_N1 L2513 SC300001G00
19 @ SM070003V00
OUT_D1n
2
C505 1 2 .1U_0402_16V7K HDMI_TX_P2 38 2 1
<8> APU_DP0_P0 HDMI_TX_N2 IN_D2p HDMI_RT_TX_P0
C506 1 2 .1U_0402_16V7K 39 17 R4020
<8> APU_DP0_N0 IN_D2n OUT_D0p HDMI_RT_TX_N0
16 @ 150_0402_1%
C507 1 2 .1U_0402_16V7K HDMI_TX_P1 41 OUT_D0n 3 4
<8> APU_DP0_P1 HDMI_TX_N1 IN_D1p HDMI_RT_CLKP D2017
C508 1 2 .1U_0402_16V7K 42 14 @EMC@
<8> APU_DP0_N1
1
IN_D1n OUT_CLKp 13 HDMI_RT_CLKN HDMI_L_CLKN 1 1 HDMI_L_CLKN
10 9
C509 1 2 .1U_0402_16V7K HDMI_TX_P0 44 OUT_CLKn HCM1012GH900BP_4P
<8> APU_DP0_P2 HDMI_TX_N0 IN_D0p APU_DP0_CTRL_DATA HDMI_RT_TX_P0 HDMI_L_TX_P0 HDMI_L_CLKP HDMI_L_CLKP
C510 1 2 .1U_0402_16V7K 45 33 R779 1 RS@ 2 0_0402_5% 2 2 9 8
<8> APU_DP0_N2 IN_D0n SDA_SRC/AUXN APU_DP0_CTRL_CLK APU_DP0_CTRL_DATA <8>
34
HDMI_CLKP SCL_SRC/AUXP HDMI_CTRL_DAT APU_DP0_CTRL_CLK <8> HDMI_L_TX_N0 HDMI_L_TX_N0
C511 1 2 .1U_0402_16V7K 47 8 4 4 7 7
<8> APU_DP0_P3 HDMI_CLKN IN_CLKp SDA_SNK HDMI_CTRL_CLK
C512 1 2 .1U_0402_16V7K 48 7
<8> APU_DP0_N3 IN_CLKn SCL_SNK HDMI_L_TX_P0 HDMI_L_TX_P0
5 5 6 6
R4018 0_0402_5% HDMI_RT_TX_N1 R781 1 RS@ 2 0_0402_5% HDMI_L_TX_N1
C HDMI_DCIN_EN 3 40 HDMI_HPD 2 RS@ 1 3 3 C
HDMI_EQ DCIN_ENB HPD_SRC HDMI_RT_HPD APU_DP0_HPD <8>
5 21
HDMI_I2C_ADDR EQ HPD_SNK L2514
31 @ SM070003V00 8
I2C_ADDR
2
+3VS 2 1
10 R4021 L05ESDL5V0NA-4 SLP2510P8
25 RSV1 32 HDMI_ID @
NC HDMI_ID 150_0402_1% SC300003Z00
2
26 9 3 4
R4004 RSV2 HDMI_CEC 12
R4006 should be placed close to REXT pin.
1
CEC_EN D2018 @EMC@
10K_0402_5% HCM1012GH900BP_4P
1 2 4.99K_0402_1% 36 29 HDMI_L_TX_N1 1 1 HDMI_L_TX_N1
R4006 T4958 10 9
4 REXT CSCL 28 T4959 HDMI_RT_TX_P1 R782 1 RS@ 2 0_0402_5% HDMI_L_TX_P1
1
RESET# RESET# 35 PDB CSDA HDMI_L_TX_P1 2 2 8 HDMI_L_TX_P1

9
Enhance Vswing HDMI_PRE 27 RESETB
2 PRE 49 HDMI_L_TX_N2 4 4 7 HDMI_L_TX_N2
1 7
C2747 TESTMODEB EPAD
1U_0201_6.3V6M HDMI_RT_TX_N2 R783 1 RS@ 2 0_0402_5% HDMI_L_TX_N2 HDMI_L_TX_P2 5 5 6 6 HDMI_L_TX_P2
2 PS8409AQFN48GTR2-A0_QFN48_6X6 3 3
SA0000AC320 L2515
@ SM070003V00
2
S IC PS8409AQFN48GTR2-A2 QFN48P REPEATER 2 1 8
R4022
@ 150_0402_1% L05ESDL5V0NA-4 SLP2510P8
3 4
SC300003Z00
1
HDMI_DCIN_EN HDMI_PRE
HCM1012GH900BP_4P
DC coupling enable; Internal pull up, 3.3V I/O. Output pre-emphasis setting;Internal pull-up 3.3V I/O
1
HDMI_RT_TX_P2 R794 1 RS@ 2 0_0402_5% HDMI_L_TX_P2

@ L: DC coupling input L: Pre-emphasis =2.5dB
R4005 H: Default,AC coupling input @ R4007 H: Default, No Pre-emphasis
4.7K_0402_5% 4.7K_0402_5% HDMI connector
JHDMI1
2
HDMI_RT_HPD 19
+5VS_DISP +3VS 18 HP_DET
+5VS_DISP +5V
17
B HDMI_CTRL_DAT 16 DDC/CEC_GND B
HDMI_CTRL_CLK 15 SDA
+3VS 14 SCL
13 Reserved
HDMI_L_CLKN 12 CEC
CK-
1
+3VS 11
CK_shield
1
@ HDMI_L_CLKP 10
R4009 R4014 R4015 R4016 R4017 HDMI_L_TX_N0 9 CK+
D0-
1
4.7K_0402_5% Receiver equalization setting(Internal 150K PD) 2K_0402_5% 2K_0402_5% 47K_0402_5% @ 47K_0402_5% @ 8
@
HDMI_ID enable ; Internal pull down;3.3V I/O HDMI_L_TX_P0 7 D0_shield
(*) L: programmable EQ for channel loss up to 5.3dB L: Default, HDMI ID enable
2
HDMI_EQ R4008 HDMI_L_TX_N1 6 D0+
2
( ) H: programmable EQ for channel loss up to 10dB 4.7K_0402_5% H: HDMI ID disable 5 D1-
D1_shield
1
HDMI_CTRL_DAT APU_DP0_CTRL_DATA HDMI_L_TX_P1 4 20

( ) M: programmable EQ for channel loss up to 14dB
2
@ HDMI_ID HDMI_L_TX_N2 3 D1+ GND 21

R4010 2 D2- GND 22
4.7K_0402_5% HDMI_CTRL_CLK APU_DP0_CTRL_CLK HDMI_L_TX_P2 1 D2_shield GND 23
D2+ GND
2
CCM_C100042GR019M298ZL
CONN@
DC232003500
+3VS
1
@
I2C Slave Address select i on; I nt er nal pull do wn; 3. 3V I / O
R4011 L: Default, Slave address 0x10-0x2F.
4.7K_0402_5% H: Alternat i ve sal ve addr ess 0x90- 0x9F, 0x D0- 0x DF.
2
HDMI_I2C_ADDR
A A

HDMI REDRIVER (PS8409)
Custom 1.B
Date: Thursday, January 11, 2018 Sheet 25 of 48
5 4 3 2 1
5 4 3 2 1
LDO mode
W=60mil RL1 2 RS@ 1 0_0603_5% W=60mil
LAN-RTL8411B +LAN_VDD +3V_LAN
W=60mil
LL1 SWR@
300mA 1.4A
IDC=1200mA
+REGOUT 1 2
2.2UH_HPC252012NF-2R2M_20%
4.7U_0402_6.3V6M
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
1U_0201_6.3V6M
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
+3VALW +3V_LAN
0.1U_0201_10V6K
CL1
CL28 SWR@
1 Using for Switch mode 2 1 1 1 1 1 1 1 1 1 1 1 1
CL2
CL3
CL4
CL5
CL6
CL7
CL8
CL9
4.7U_0402_6.3V6M
CL10
CL11
CL12
CL13
RL2 The trace length from
SWR@
0_0805_5% Lx to PIN48 (REGOUT)
2 1 2 2 2 2 2 2 2 2 2 2 2 2
LDO@
1 @ 2 and from C to Lx must
D 60mil
UL1 SA000079400
60mil
< 200mils.
D
5 1
IN OUT Using for Switch mode
Place near Pin 3,8,33,46 Place near Pin 20 Place near Pin 11,32,48
2 11/27: P/N change to SH00000RT00
GND The trace length
4 3 ( S COIL 2.2UH +-20% from C to
EN OC HPC252012NF-2R2M 1.3A)
2 PIN34,35(VDDREG)
SY6288C20AAC_SOT23-5 must < 200mils.
CL14
1U_0201_6.3V6M LAN_PWR_EN
1 LAN_PWR_EN <30>
UL2
reserve EC_PME# pull high 100K to +3VALW_EC
From EC Power Manahement/Isolation
ISOLATEB 31
High active. RL3 2 RS@ 1 0_0402_5% LAN_PME# 39 ISOLATEBPIN
<30> LAN_WAKE# LANWAKEB
EN threshold voltage min:1.2V Card Reader
RL8 1 2 10K_0402_5% 15 SD_D0 RL9 1 @ 2 0_0402_5% SD_D0_R
typ:1.6V max:2.0V +3V_LAN SD_D0/MS_D1 SD_D1 SD_D1_R
Current limit threshold 1.5~2.8A PCI-Express 14 RL4 1 @ 2 0_0402_5%
CLK_PCIE_P4 23 SD_D1 16 SD_CLK RL10 1 2 10_0402_5% SD_CLK_R
<10> CLK_PCIE_P4 CLK_PCIE_N4 REFCLK_P SD_CLK/MS_D0 SD_CMD SD_CMD_R
+3V_LAN Rising time must >0.5ms and <100ms 24 17 RL5 1 @ 2 0_0402_5%
<10> CLK_PCIE_N4 REFCLK_N SD_CMD/MS_D2 SD_D3 SD_D3_R
18 RL6 1 @ 2 0_0402_5% 2
APU_PCIE_RST# 30 SD_D3/MS_D3 19 SD_D2 RL7 1 @ 2 0_0402_5% SD_D2_R
<9,15,27,28> APU_PCIE_RST# CLKREQ_PCIE#4 PERSTBPIN SD_D2/MS_CLK SD_WP
29 28 CL16
PU at PCH side <10> CLKREQ_PCIE#4 CLKREQBPIN SD_WP/MS_BS
5P_0402_50V8C
CL17 1 2 .1U_0402_16V7K PCIE_ARX_C_DTX_P4 25 1
<6> PCIE_ARX_DTX_P4 PCIE_ARX_C_DTX_N4 HSOP @EMC@
CL15,CL17 close to UL2 CL15 1 2 .1U_0402_16V7K 26
<6> PCIE_ARX_DTX_N4 HSON SD_CD#
<6> PCIE_ATX_C_DRX_P4
21 42 close to pin17
22 HSIP SD_CD# 43
<6> PCIE_ATX_C_DRX_N4 HSIN MS_CD#
Transceiver Interface
LAN_MIDI0+ 1
LAN_MIDI0- 2 MDIP0
LAN_MIDI1+ MDIN0
C +3V_LAN LAN_MIDI1-
LAN_MIDI2+
4
5 MDIP1
MDIN1 AVDD33
48 +3V_LAN
Protect cotact Card contact
C
6 11
+3V_LAN LAN_MIDI2- 7 MDIP2 AVDD33 12
SWR mode 1400mA
RL11 1 SWR@ 2 0_0402_5% LAN_MIDI3+ 9 MDIN2 DVDD33 32
MDIP3 DVDD33 Write protect Write Enable
1
LAN_MIDI3- 10
MDIN3
RL12 RL13 1 RS@ 2 0_0402_5% ENSWREG
RL14
(Lock) (Unlock)
10K_0402_5%
LDO mode 1K_0402_5% XTLI 44 33
@
GPO XTLO_R 1 2 XTLO 45 CKXTAL1 Clock DVDD10 3
+LAN_VDD Card Uninsert Open Open Open
2
CKXTAL2 AVDD10 8 300mA

AVDD10 Card insert Close Open Close
Regulator and Reference
+REGOUT 36 20
35 REG_OUT EVDD10
+3VS +3V_LAN VDDREG
YL1 ENSWREG 34 800mA
46 ENSWREG_H 13
SJ10000UP00 +LAN_VDD AVDD10 Card_3V3 +CARD_3V3
1
25MHZ_10PF_XRCGB25M000F2P34R0 LAN_RST
RL15 2 RL16 1 47
XTLI 1 3 XTLO_R 1K_0402_5% 2.49K_0402_1% RSET 27 +VDD33_18
1 3 TP@ T4950 DV33/18
NC NC
0.1U_0201_10V6K
4.7U_0402_6.3V6M
CL21
1 1 41
2
ISOLATEB RL17 1 @ 2GPO 38 LED0

2 4 <30> LAN_GPO LED1/GPO 1 1 1
CL20
15P_0402_50V8J 15P_0402_50V8J 0_0402_5% 37 LEDs CL22
LED3
2
CL18 CL19 40 0.1U_0201_10V6K

2 2 RL18 TP@ T4951 LED_CR 49
for disable PHY TP@ T4952 E_Pad 2 2 2
15K_0402_5%
reserve 0 ohm
1
Place near Pin 27
RTL8411B-CGT_QFN48_6X6
B LAN Connector B
TL1 JRJ45
LAN_TERMAL1
WP is Normal Open Card Reader Connector
24 MCT1 12 +CARD_3V3
LAN_MIDI0+ 2 TCT1 MCT1 23 RJ45_MIDI0+ RJ45_MIDI3- 8 GND
LAN_MIDI0- TD1+ MX1+ RJ45_MIDI0- PR4- JSD1
3 22 11
TD1- MX1- RJ45_MIDI3+ 7 GND SD_WP# 2 @ 1 SD_WP
4 21 MCT2 PR4+ RL22 0_0402_5% 6
LAN_MIDI1+ 5 TCT2 MCT2 20 RJ45_MIDI1+ RJ45_MIDI1- 6 SD_CMD_R 3 VDD
LAN_MIDI1- TD2+ MX2+ RJ45_MIDI1- PR2- SD_CLK_R CMD
4.7U_0402_6.3V6M
CL23
0.1U_0201_10V6K
CL24
6 19 7
TD2- MX2- RJ45_MIDI2- 5 5 CLK
PR3- 1 1 VSS1
7 18 MCT3 8
LAN_MIDI2+ 8 TCT3 MCT3 17 RJ45_MIDI2+ RJ45_MIDI2+ 4 VSS2
LAN_MIDI2- 9 TD3+ MX3+ 16 RJ45_MIDI2- PR3+ +3V_LAN +3VS SD_D0_R 9
TD3- MX3- RJ45_MIDI1+
IC side 2 2 SD_D1_R DAT0
3 10
PR2+ DAT1
1
10 15 MCT4 CL25 SD_D2_R 1
LAN_MIDI3+ 11 TCT4 MCT4 14 RJ45_MIDI3+ RJ45_MIDI0- 2
40mil 10P_0402_50V8J
40mil RL21 RL20 SD_WP SD_D3_R 2 DAT2
LAN_MIDI3- 12 TD4+ MX4+ 13 RJ45_MIDI3- PR1- 10 LANGND 2 1 RJ45_GND 100K_0402_5% 100K_0402_5%@ CD/DAT3
TD4- MX4- RJ45_MIDI0+ 1 GND 12
MESC5V02BD03_SOT23-3
PR1+ GND
1
1 9 Close to Card Reader CONN 13
2
GND GND
3
D QL1 SD_WP# 11
W/P
4
3
2
1
CL26 GST5009-E SD_WP# 2 2N7002K_SOT23-3 SD_CD# 4

.1U_0402_16V7K SP050006B10 RPL1 SINGA_2RJ1660-000111F @ G SB00000PU00 CD
2 75_0804_8P4R_1% CONN@ JPL1 S TAITW_PSDATQ09GLBS1NN4H1
Place close to TCT pin DC234009H00 JUMP_43X118 Connector side CONN@
3
EMC@
DVT:02/17 SP011611110
5
6
7
8
DL1
LANGND
RJ45_GND Vgs=1.0-2.0V RL19
1
SD_CLK_R 1 @EMC@2 0_0402_5% 1 2

CL27 @EMC@
10P_0402_50V8J
Close to JREAD1 for EMI
A A

LAN RTL8411-CG
Custom 1.B
5 4 3 2 1
A B C D E
Wireless LAN
+1.8VS
R4027 1 HUB@ 2 0_0402_5%

<33> HUB_USB20_P4
R4028 1 HUB@ 2 0_0402_5%
<33> HUB_USB20_N4
5
60mil
G
+3VS +3VS_W LAN R4029 1 NHUB@ 2 0_0402_5% USB20_P3_R UART_0_ATXD_DRXD 4 3 UART_0_ATXD_R_DRXD
<10> USB20_P3 USB20_N3_R <10> UART_0_ATXD_DRXD
R4030 1 NHUB@ 2 0_0402_5%
D
<10> USB20_N3
2
1 2 SB000016K00 @ Q101A
R212 PJT138KA_SOT363-6
G
1 1 1 1 1
0_0805_5% C458 @ UART_0_ARXD_DTXD 1 6 UART_0_ARXD_R_DTXD
<10> UART_0_ARXD_DTXD
D
C459 C460
4.7U_0402_6.3V6M 0.1U_0201_10V6K 0.1U_0201_10V6K SB000016K00 @ Q101B
2 2 2 PJT138KA_SOT363-6
+1.8VS
KEY E +3VS_W LAN UART_0_ATXD_DRXD

UART_0_ARXD_DTXD
R101
R102
1
1
@
@
2
2
1K_0402_5%
1K_0402_5%
+3VS
+3VS_W LAN JNGFF1 UART_0_ATXD_R_DRXD R103 1 @ 2 1K_0402_5%

+3VALW @ 1 2 UART_0_ARXD_R_DTXD R104 1 @ 2 1K_0402_5%
U2606 USB20_P3_R 3 GND_1 3.3VAUX_2 4
W=60mils USB20_N3_R USB_D+ 3.3VAUX_4
1U_0201_6.3V6M
C2664
5 1 5 6
IN OUT 7 USB_D- LED1# 8
1 GND_7 PCM_CLK
2 9 10
@ GND 11 SDIO_CLK PCM_SYNC 12
4 3 13 SDIO_CMD PCM_OUT 14
2 EN OC 15 SDIO_DAT0 PCM_IN 16
SY6288C20AAC_SOT23-5 17 SDIO_DAT1 LED2# 18
19 SDIO_DAT2 GND_18 20
SA000079400 SDIO_DAT3 UART_WAKE UART_0_ARXD_R_DTXD
21 22
Vih=1.5 23 SDIO_WAKE UART_TX
<30> W LAN_ON SDIO_RST
24 UART_0_ATXD_R_DRXD
25 UART_RX 26
27 GND_33 UART_RTS 28
<6> PCIE_ATX_C_DRX_P5 PET_RX_P0 UART_CTS E51TXD_P80DATA_R
29 30 R873 2 RS@ 1 0_0402_5%
2 NGFF WL+BT (KEY E) <6> PCIE_ATX_C_DRX_N5
31
33
PET_RX_N0
GND_39
CLink_RST
CLink_DATA
32
34
E51RXD_P80CLK_R R3955 2 RS@ 1 0_0402_5%
EC_TX <30>
EC_RX <30>
2
<6> PCIE_ARX_DTX_P5 PER_TX_P0 CLink_CLK

35 36 2 1
<6> PCIE_ARX_DTX_N5 PER_TX_N0 COEX3
37 38 R874 100K_0402_5%
39 GND_45 COEX2 40
<10> CLK_PCIE_P5 REFCLK_P0 COEX1
41 42 T4947 TP@
<10> CLK_PCIE_N5 REFCLK_N0 SUSCLK(32KHz) W L_RST#_R
43 44 R440 1 RS@ 2 0_0402_5%
GND_51 PERST0# BT_ON APU_PCIE_RST# <9,15,26,28>
45 46
<10> CLKREQ_PCIE#5 CLKREQ0# W_DISABLE2# W L_OFF# BT_ON <30>
47 48
<30> W LAN_W AKE# PEWAKE0# W_DISABLE1# W L_OFF# <30>
49 50
51 GND_57 I2C_DAT 52
R3807 53 RSVD/PCIE_RX_P1 I2C_CLK 54
2 1 10K_0402_5% 55 RSVD/PCIE_RX_N1 I2C_IRQ 56
+3VS_W LAN GND_63 RSVD_64
57 58
59 RSVD/PCIE_TX_P1 RSVD_66 60
61 RSVD/PCIE_TX_N1 RSVD_68 62
63 GND_69 RSVD_70 64
65 RSVD_71 3.3VAUX_72 66
67 RSVD_73 3.3VAUX_74
GND_75 68
69 GND1
GND2
BELLW _80152-3221
CONN@
SP070013E00
3 3
4 4

M.2 KEY-E (WLAN)
Custom 1.B
A B C D E
A B C D E F G H
SATA Re-Driver and cable HDD Conn.

G-Sensor (reserved) +3VS
+1.8VALW +3VALW +3VS
1
RZ10 RZ9 RZ4 RZ1 GS@ +3VS +3VS
2.2K_0402_5% 2.2K_0402_5% 2.2K_0402_5% 10K_0402_5%
1 GS@ 2 I2C_1_SCL 1 GS@ 2 I2C_1_SCL_L 1 GS@ 2 I2C_1_SCL_G UZ1 GS@
1 CZ1 1 2 10U_0603_6.3V6M
2
Vdd_IO
GS@ 1
RZ11 RZ8 RZ5 8 GS@
2.2K_0402_5% 2.2K_0402_5% 2.2K_0402_5% I2C_1_SCL_G 4 CS 14 CZ2 1 2 0.1U_0201_10V6K RZ3
1 1 GS@ 2 I2C_1_SDA 1 GS@ 2 I2C_1_SDA_L 1 GS@ 2 I2C_1_SDA_G I2C_1_SDA_G 6 SCLSPC Vdd 10K_0402_5% 1
RZ2 1 @ 2 10K_0402_5% 7 SDA/SDI/SDO
+3VS SDO/SA0 G_INT#
RZ6 1 GS@ 2 10K_0402_5% 11 RZ7
2
+1.8VALW +3VS 16 INT1 9 G_INT2 0_0402_5%
15 ADC1 INT2 G_INT# 1 GS@ 2
ADC2 G_INT#_APU <9>
13 10 INT1/2 all High Active
ADC3 RES
2
NC
2
2
3 5
NC GND 12
G
G
1 6 I2C_1_SCL_L 6 1 I2C_1_SCL_G GND

<9> I2C_1_SCL
S
S
LIS3DHTR_LGA16_3X3
5
5
QZ1B GS@ SB000016K00 QZ3B GS@ SB000016K00 GS@
PJT138KA_SOT363-6 PJT138KA_SOT363-6
G
G
I2C_1_SDA_L I2C_1_SDA_G SA00004VF00

4 3 3 4 LIS3DH
<9> I2C_1_SDA
S
S
SA0 ->0, Address is 0011 000 (0x30h)

QZ1A GS@ SB000016K00 QZ3A GS@ SB000016K00 SA0 ->1, Address is 0011 001 (0x32h)
PJT138KA_SOT363-6 PJT138KA_SOT363-6
Vgs=0.8-1.1V Vgs=0.8-1.1V
B_EQ1
A_EQ2
A_EQ1
JHDD1,JHDD2Co-Lay
DEW
+3VS
CO14
2 1
0.01U_0402_16V7K UO2 JHDD2
20
19
18
17
16
PS8527CTQFN20GTR2A_TQFN20_4X4 +5VS_HDD 1
+3VS SA00007JU10 2 1
VDD2
B_EQ1
A_EQ2
A_EQ1
DEW
PAR@ 3 2
RO10 1 @ 2 4.7K_0402_5% A_DE 100mils 4 3
SATA_ATX_C_RD_DRX_P0 SATA_ATX_RD_DRX_P0 +3VS 4
RO15 1 @ 2 4.7K_0402_5%
<6> SATA_ATX_DRX_P0 CO16 2 1 0.01U_0402_16V7K 1 15 5 JHDD1
SATA_ATX_C_RD_DRX_N0 A_INP A_OUTP SATA_ATX_RD_DRX_N0 5
10U_0603_6.3V6M
CO12
0.1U_0201_10V6K
CO13
<6> SATA_ATX_DRX_N0 CO17 2 1 0.01U_0402_16V7K 2 14 1 6 14
A_INN A_OUTN 6 GND
1
RO13 1 @ 2 4.7K_0402_5% A_EQ1 3 13 B_EQ2 7 13
RO18 1 PAR@ 2 4.7K_0402_5% CO18 2 1 0.01U_0402_16V7K SATA_ARX_C_RD_DTX_N0 4 GND1 B_EQ2 12 SATA_ARX_RD_DTX_N0 8 7 GND
<6> SATA_ARX_DTX_N0 CO19 2 1 0.01U_0402_16V7K SATA_ARX_C_RD_DTX_P0 5 B_OUTN B_INN 11 SATA_ARX_RD_DTX_P0 RO3 1 RS@ 2 0_0805_5% +5VS_HDD 9 8 +5VS_HDD 12
+5VS
2
RO14 1 @ 2 4.7K_0402_5% A_EQ2 <6> SATA_ARX_DTX_P0 21 B_OUTP B_INP 2 @ 10 9 11 12
GND2 10 11
VDD1
REXT
B_DE
A_DE
RO19 1 @ 2 4.7K_0402_5% Check INT pin 11 10
G_INT2 RO4 1 @ 2 0_0402_5% JHDD_P9 12 11 JHDD_P9 9 10
EN
RO11 1 @ 2 4.7K_0402_5% B_DE JHDD_P8 13 12 JHDD_P8 8 9
2 13 8 2
RO16 1 @ 2 4.7K_0402_5% 14 7
6
7
8
9
10
SATA_ARX_RD_DTX_P0 CO4 2 1 0.01U_0402_16V7K SATA_ARX_C_DTX_P0 15 14 SATA_ARX_C_DTX_P0 6 7
RO12 1 @ 2 4.7K_0402_5% B_EQ1 SATA_ARX_RD_DTX_N0 CO3 2 1 0.01U_0402_16V7K SATA_ARX_C_DTX_N0 16 15 SATA_ARX_C_DTX_N0 5 6
+3VS 16 5
RO17 1 PAR@ 2 4.7K_0402_5% RO6 2 1 1 17 4
+3VS 4.99K_0402_1% SATA_ATX_RD_DRX_N0 CO2 2 1 0.01U_0402_16V7K SATA_ATX_C_DRX_N0 18 17 SATA_ATX_C_DRX_N0 3 4
B_DE
A_DE
RO20 1 @ 2 4.7K_0402_5% B_EQ2 CO15 SATA_ATX_RD_DRX_P0 CO1 2 1 0.01U_0402_16V7K SATA_ATX_C_DRX_P0 19 18 SATA_ATX_C_DRX_P0 2 3
RO21 1 PAR@ 2 4.7K_0402_5% RO5 1 @ 2 0.1U_0201_10V6K 20 19 1 2
4.7K_0402_5% 2 close to CONN. 21 20 1
RO22 1 TI@ 2 4.7K_0402_5% DEW 22 G1 ACES_51625-01201-001
23 G2 CONN@
24 G3
UO2 USE 8527 re-driver G4 SP010028W00
SA00007JU10 ACES_50406-02071-001
CONN@
SP010016L00
SN75LVCP601RTJR_A.4_TQFN20_4X4
TI@
SA00003ZX00
SATA NGFF SSD Conn.
+3VS_SSD_NGFF
+3VS +3VS_SSD_NGFF
JSSD1 RM9
3 1 2 0_1206_5% 3
3 GND 3P3VAUX 4 1 RS@ 2
PCIE_ARX_DTX_N3 RM26 1 T1PCIE@2 0_0402_5% PCIE_ARX_R_DTX_N3 5 GND 3P3VAUX 6
<6> PCIE_ARX_DTX_N3 PCIE_ARX_DTX_P3 PCIE_ARX_R_DTX_P3 PERn3 DTx3 NC
RM25 1 T1PCIE@2 0_0402_5% 7 8 LON/SAM:Pin10=Device_Active_Signal
22U_0603_6.3V6M
0.1U_0201_10V6K
<6> PCIE_ARX_DTX_P3 PERp3 NC SSD_LED# 1 1 1
9 10 TP@ T245
PCIE_ATX_C_DRX_N3 GND DAS/DSS# + CM16 PCIE@
CM14
CM13
11 12
<6> PCIE_ATX_C_DRX_N3 PCIE_ATX_C_DRX_P3 PETn3 DRx3 3P3VAUX
13 14 150U_B2_6.3VM_R35M
<6> PCIE_ATX_C_DRX_P3 PETp3 3P3VAUX 2 2
15 16 SGA00009M00
PCIE_ARX_DTX_N2 RM24 1 T1PCIE@2 0_0402_5% PCIE_ARX_R_DTX_N2 17 GND 3P3VAUX 18 2
<6> PCIE_ARX_DTX_N2 PCIE_ARX_DTX_P2 PCIE_ARX_R_DTX_P2 PERn2 DTx2 3P3VAUX
RM23 1 T1PCIE@2 0_0402_5% 19 20
<6> PCIE_ARX_DTX_P2 PERp2 NC
21 22
PCIE_ATX_C_DRX_N2 23 GND NC 24
<6> PCIE_ATX_C_DRX_N2 PCIE_ATX_C_DRX_P2 PETn2 DRx2 NC
25 26
<6> PCIE_ATX_C_DRX_P2 PETp2 NC
PCIE SSD 27 28
PCIE_ARX_DTX_N1 29 GND NC 30
<6> PCIE_ARX_DTX_N1 PCIE_ARX_DTX_P1 PERn1 DTx1 NC
31 32
<6> PCIE_ARX_DTX_P1 PERp1 NC
33 34 LON:If system didn't support DEVSLP, set Device Sleep Signal high and
PCIE_ATX_C_DRX_N1 35 GND NC 36 keep (from power on), device will ignore.
<6> PCIE_ATX_C_DRX_N1 PCIE_ATX_C_DRX_P1 PETn1 DRx1 NC DEVSLP1_R
37 38 RM21 1 @ 2 0_0402_5%
<6> PCIE_ATX_C_DRX_P1 PETp1 DEVSLP DEVSLP1 <9>
39 40
PCIE_ARX_DTX_N0 RM11 1 PCIE@ 2 0_0402_5% PCIE_ARX_R_DTX_N0 41 GND NC 42 RM20 1 RS@ 2 0_0402_5%
<6> PCIE_ARX_DTX_N0 PCIE_ARX_DTX_P0 PCIE_ARX_R_DTX_P0 PERn0/SATA-B+ NC
RM12 1 PCIE@ 2 0_0402_5% 43 DTx0 44
<6> PCIE_ARX_DTX_P0 PERp0/SATA-B- NC
45 46 EMC@ CM15 1 2 100P_0402_50V8J
PCIE_ATX_C_DRX_N0 47 GND NC 48
<6> PCIE_ATX_C_DRX_N0 PCIE_ATX_C_DRX_P0 PETn0/SATA-A-DRx0 NC SSD_PCIE_RST#
49 50 RM18 1 @ 2 0_0402_5%
<6> PCIE_ATX_C_DRX_P0 PETp0/SATA-A+ PERST# CLKREQ_PCIE#0_R APU_PCIE_RST# <9,15,26,27>
51 52 RM5 1 @ 2 0_0402_5%
GND CLKREQ# CLKREQ_PCIE#0 <10>
SATA@ 53 54
SATA_ARX_DTX_P1 CM7 1 2 0.01U_0402_16V7K 55 REFCLKN PEWake# 56
<6> SATA_ARX_DTX_P1 SATA_ARX_DTX_N1 REFCLKP NC
CM8 1 2 0.01U_0402_16V7K 57 58
<6> SATA_ARX_DTX_N1 GND NC
SATA SSD SATA@ SATA@
SATA_ATX_DRX_N1 CM9 1 2 0.01U_0402_16V7K
<6> SATA_ATX_DRX_N1 SATA_ATX_DRX_P1 CM10 1 2 0.01U_0402_16V7K
<6> SATA_ATX_DRX_P1
SATA@
LON/SAM:Pin61=GND 59 Pin67 Pin68 60 SUSCLK_SSD TP@
NC T246
CLK_PCIE_N0 61 Pin69 Pin70SUSCLK(32kHz) 62
<10> CLK_PCIE_N0 CLK_PCIE_P0 PEDET(NC-PCIE/GND-SATA) 3P3VAUX
63 Pin71 Pin72 64
<10> CLK_PCIE_P0 GND 3P3VAUX
65 Pin73 Pin74 66
RM22 1 @ 2 0_0402_5% SSD_DET# 67 GND Pin75 3P3VAUX
<9> AGPIO8 GND 68
GND1 69
GND2
BELLW_80159-3221
4 CONN@ 4
SSD_DET# Function
SP070018L00
1 PCIE SSD Device
0 SATA SSD Device

HDD/SSD
Custom 1.B
A B C D E F G H
A B C D E
HD Audio Codec +PVDD_HDA +5VS

40mil
(output = 300 mA)
JPA1 40mil
+VDDA
+3VS_DVDD
SM01000EJ00 3000mA 220ohm@100mhz DCR 0.04 1 2

40mil 1 2
1
1
1
.1U_0402_16V7K
CA4
LA1 2 1 JUMP_43X79 4.75V 256@
+VDDA
10U_0603_6.3V6M
0.1U_0201_10V6K
HCB2012KF-221T30_0805 2 2 @ RA41 256@
2
10U_0603_6.3V6M
CA1
0.1U_0201_10V6K
CA2
CA34
CA3
3.3K_0402_5% RA50
2 3.3K_0402_5%
2
@ @EMC@
GND & GNDA moat
2
1 1 +AVDD1_HDA MONO_IN
GND
GND GND
1 1
Place near Pin41 Place near Pin46 RESETB
for ALC256 co-lay

20mil
CA5 1 2 10U_0603_6.3V6M RA1 1 @ 2
GND +VDDA
1
1
0.1U_0201_10V6K
CA8
10U_0603_6.3V6M
CA9
Pin9 need to matching with SOC HDA CA6 2 1 0.1U_0201_10V6K 0_0603_5%
interface. +1.8VS_DVDDIO
+1.8VS RA2 2 @ 1 0_0402_5% Place near Pin9 @
2
2
+3VS_DVDD GND & GNDA moat DMIC3/4 Conn. (support on 256)
20mil GNDA +3VS
+3VS RA5 2 @ 1 0_0402_5% Place near Pin26
10U_0603_6.3V6M
0.1U_0201_10V6K
1 1 JDMIC1
+1.8VS_VDDA +3VS
CA10
CA11
RA6 2 @ 1 DA4 1
+1.8VS DMIC_CLK34 DMIC_DATA34 1
1 6 3 2
I/O4 I/O2 2
1
DMIC_CLK 1 256@ 2 DMIC_CLK34
0.1U_0201_10V6K
CA12
CA13
10U_0603_6.3V6M
0_0402_5% 3
2 2 RA46 0_0402_5% 4 3
5 4
2
2 @ 5 2 6 G5
VDD GND G6
Place near Pin1 GND GNDA
ACES_50273-0040N-001
GND
41
46
26
40
SP02000TI00
9
UA1 4 1 DMIC_DATA34 GND
Place near Pin40 I/O3 I/O1
DVDD
DVDD-IO
PVDD1
PVDD2
AVDD1
AVDD2
AZC099-04S.R7G_SOT23-6
256EMC@
CA32 @EMC@
10P_0402_50V8J LINE1-L 22 SC300001G00
1 2 DMIC_CLK LINE1-R 21 LINE1-L(PORT-C-L) 43 SPKL-
LINE1-R(PORT-C-R) SPK-OUT-L- 42 SPKL+
24 SPK-OUT-L+
2 23 LINE2-L(PORT-E-L) 45 SPKR+ 2
GND
LINE2-R(PORT-E-R) SPK-OUT-R+ 44 SPKR- Int. Speaker Conn.
40mil RING2 17
MIC2-L(PORT-F-L) /RING2
SPK-OUT-R- 40mil SPK_R+
JSPK1
SLEEVE 18 SPKR+ EMC@1 LA2 2 PBY160808T-121Y-N_2P 1
MIC2-R(PORT-F-R) /SLEEVE 32 HP_LEFT SPKR- EMC@1 LA3 2 PBY160808T-121Y-N_2P SPK_R- 2 1
Combo MIC HPOUT-L(PORT-I-L) HP_RIGHT SPK_L+ 2
+MICBIAS +MICBIAS 31 33 SPKL+ EMC@1 LA4 2 PBY160808T-121Y-N_2P 3
Idea is close to IC 30 LINE1-VREFO-L HPOUT-R(PORT-I-R) SPKL- EMC@1 LA5 2 PBY160808T-121Y-N_2P SPK_L- 4 3
LINE1-VREFO-R 10 HDA_SYNC_R 5 4
DMIC_DATA SYNC HDA_BIT_CLK_R HDA_SYNC_R <9> G1
2 6 EMI request for solve EMI noise, SM01000OW00. 6
<24> DMIC_DATA DMIC_CLK GPIO0/DMIC-DATA BCLK HDA_BIT_CLK_R <9> G2
1 2 3 1 @EMC@2 1 2 GND
<24> DMIC_CLK_R GPIO1/DMIC-CLK
3
LA6 EMC@ BLM15PX221SN1D_2P RA10 0_0402_5% CA15 22P_0402_50V8J ACES_50278-00401-001
@EMC@ GND CONN@
EC_MUTE# 47 5 HDA_SDOUT_R @EMC@ @EMC@
<30> EC_MUTE# HDA_RST#_R 1 255@ 2 RESETB 11 PDB SDATA-OUT 8 HDA_SDIN0_R RA33 1 2 33_0402_5%
HDA_SDOUT_R
HDA_SDIN0
<9>
<9> DA1 DA2 SP02000RR00
<9> HDA_RST#_R RESETB SDATA-IN
RA42 0_0402_5% TVNST52302AB0_SOT523-3 TVNST52302AB0_SOT523-3
48 RA51 1 256@ 2 0_0402_5% DMIC_DATA34
1
MONO_IN 12 SPDIF-OUT/GPIO2
10mil Close codec1
PCBEEP 16 CA33 1 2 .1U_0402_16V7K BEEP#_R
HP_PLUG# RA13 2 200K_0402_1% SENSE_A 13 MONO-OUT 256@ GND GND
<33> HP_PLUG# SENSE A
+3VS RA14 2 1 100K_0402_1% 14
SENSE B 29
1 MIC2-VREFO +MIC2_VREFO
37
CA19 35 CBP 7 CA18 2 1 10U_0603_6.3V6M
CBN LDO3-CAP GND
2.2U_0402_6.3V6M 39 CA20 2 1 10U_0603_6.3V6M
2 LDO2-CAP 27 CA21 2 1 10U_0603_6.3V6M
10U_0603_6.3V6M 2 1 CA35 3V_1.8V_PVDD 36 LDO1-CAP RA15 1 2 100K_0402_5% GNDA
GND CPVDD
CODEC_VREF 10mil Headphone Out
28
3V_5V_STB 20 VREF +MIC2_VREFO
CPVREF 1 1
0.1U_0201_10V6K
CA23
2.2U_0402_6.3V6M
CA24
15
10U_0603_6.3V6M 2 1 CA22 19 JDREF 34 CPVEE
Pin20 GNDA MIC-CAP CPVEE
ALC255/256/233 : Power for combo jack depop 1 @ 2 2
circuit at system shutdown mode RA44 2 @ 1 0_0402_5% 4
DVSS
1
49 25 CA26
3 Thermal PAD AVSS1 38 2.2U_0402_6.3V6M RA19 RA20 3
AVSS2 2 2.2K_0402_5%
Pin4 ALC255-CG_MQFN48_6X6
2.2K_0402_5%
ALC255/256/233 : DC DET (For Japen customer only) GND Place near pin28
255@ SA000082700
2
GND
SLEEVE SLEEVE <33>
GNDA RING2 RING2 <33>
GNDA
RA21 CA27 255@

22K_0402_5% .1U_0402_16V7K HP_LEFT RA24 1 @ 2 0_0603_5% HPOUT_L_1
DOS mode 2 1 BEEP#_R 1 2 MONO_IN Pin15 HPOUT_L_1 <33>
<30> EC_BEEP# ALC255/256/233 : Jack Detect for SPDIF-OUT and SPK-OUT port HP_RIGHT RA27 1 @ 2 0_0603_5% HPOUT_R_1
HPOUT_R_1 <33>
2
RA22 1 10/20 vendor review change to 0.1uF.

100P_0402_50V8J
CA28 @EMC@
OS mode 22K_0402_5% LINE1-L CA29 1 2 4.7U_0402_6.3V6M

GND & GNDA moat
4.7K_0402_5%
RA23
2 1
<9> APU_SPKR LINE1-R CA30 1 2 4.7U_0402_6.3V6M
2 JPA2 JPA3
1
JUMP_43X39 JUMP_43X39 +MICBIAS DA5

1 2 1 2 2 2 RA29 1
@ 1 2 @ 1 2 4.7K_0402_5%
1
GND JPA4 JPA5
JUMP_43X39 JUMP_43X39 3 2 RA32 1
1 2 1 2 4.7K_0402_5%
@ 1 2 @ 1 2 BAT54A_SOT23-3
CA31 @EMC@ JPA6 JUMP_43X39 SCSBAT54100

.1U_0402_16V7K 1 2
+3VS_DVDD 1 2 @ 1 2
1 255@ 2 3V_1.8V_PVDD
RA36 0_0402_5% JPA7 JUMP_43X39
+1.8VS RA25 1 @EMC@2 0_0402_5% 1 2
4 1 256@ 2 @ 1 2
4
RA37 0_0402_5%
+3VALW
3V_5V_STB GND GNDA GND GNDA
1 255@ 2
RA43 0_0402_5%
+5VALW
1 256@ 2
RA35 0_0402_5%
for ALC256 co-lay GND & GNDA moat Issued Date 2017/12/25 2019/12/25 Title
Deciphered Date
HDA CODEC (ALC255/256)
Custom 1.B
A B C D E
5 4 3 2 1
+EC_VCC
1
Board ID / Rb R1562
+3VLP
JP2 @
+EC_VCC L44
FBM-11-160808-601-T_0603
+EC_VCCA
DH5JV 1
R1564 EJ@
12K_0402_1%
Ra 100K_0402_5%
2
1 2 1 2 SD034120280
1 2 AD_BID
0.1U_0201_10V6K
C1255
0.1U_0201_10V6K
C1256
0.1U_0201_10V6K
C1257
0.1U_0201_10V6K
C1258
1000P_0402_50V7K
C1261
1000P_0402_50V7K
C1259
JUMP_43X39 2 R1564 EA@
1
2 2 2 2 1 1 C1262 DH5AV 2 15K_0402_1% 2
0.1U_0201_10V6K SD034150280 R1564 C1269
D
@ @ 1 R1564 VX@
Rb @ 20K_0402_1% 0.1U_0201_10V6K
@
D
1 1 1 1 2 2 DH50V 3 20K_0402_1% 1
2
ECAGND SD034200280
111
125
22
33
96
67
9
VCC_LPC
VCC
VCC
VCC
VCC
AVCC
VCC0
1 21 LAN_PWR_EN +RTC_APU_R
KBRST#_R GATEA20/GPIO00 EC_VCCST_PG/GPIO0F EC_BEEP# LAN_PWR_EN <26>
1 RS@ 2 2 23
<10> KBRST# KBRST#/GPIO01 BEEP#/GPIO10 FAN_PWM1 EC_BEEP# <29>
SERIRQ 3 26
SERIRQ EC_FAN_PWM/GPIO12 FAN_PWM1 <32>
1
R3973 <10,31> SERIRQ LPC_FRAME# 4 27 FAN_PWM2
<10,31> LPC_FRAME# LPC_AD3_R LPC_FRAME# PWM Output AC_OFF/GPIO13 FAN_PWM2 <32>
0_0402_5% 5 D Q91
<31> LPC_AD3_R LPC_AD2_R LPC_AD3 EC_RTCRST
7 2 2N7002K_SOT23-3
<31> LPC_AD2_R LPC_AD1_R LPC_AD2 BATT_TEMP
8 63 G SB00000PU00
<31> LPC_AD1_R LPC_AD1 VCIN1_BATT_TEMP/AD0/GPIO38 BATT_TEMP <37,38>
1
LPC_AD0_R 10 64 VCIN1_BATT_DROP
<31> LPC_AD0_R LPC_AD0LPC & MISC VCIN1_BATT_DROP/AD1/GPIO39 ADP_I VCIN1_BATT_DROP <37> S
65 R1563 Vgs=1.0-2.0V
ADP_I <37,38>
3
LPC_CLK0_EC 12 ADP_I/AD2/GPIO3A 66 AD_BID 10K_0402_5%
LPC_CLK0_EC <10> LPC_CLK0_EC LPC_RST# CLK_PCI_EC AD Input AD_BID/AD3/GPIO3B
1 2 1 2 13 75
C1263 @EMC@ R1560 @EMC@ <10,31> LPC_RST# EC_RST# 37 PCIRST#/GPIO05 AD4/GPIO42 76 LAN_WAKE#
<32> EC_RST# LAN_WAKE# <26>
2
22P_0402_50V8J 10_0402_1% EC_SCI# 20 EC_RST# AD5/GPIO43
<10> EC_SCI# WLAN_ON EC_SCI#/GPIO0E
38
<27> WLAN_ON CLKRUN#/GPIO1D
1 2 EC_RST# 68 TS_EN Reserve TS_EN
DA0/GPIO3C GPU_THERMAL# TS_EN <24> +3VS
C819 1000P_0402_50V7K DA Output EN_DFAN1/DA1/GPIO3D 70
<31> KSI[0..7] TP_SENOFF# GPU_THERMAL# <16>
EMC@ KSI0 55 71 New Add for GPU Thermal
KSI0/GPIO30 DA2/GPIO3E KBL_EN TP_SENOFF# <31> EC_MUTE#
KSI1 56 72 R1565 1 @ 2 10K_0402_5%
KSI1/GPIO31 DA3/GPIO3F KBL_EN <31> TP_I2C_INT#
KSI2 57 R116 1 @ 2 1K_0402_5%
1 @ 2 LPC_RST# KSI3 58 KSI2/GPIO32 83 TYPEC_1P5A
KSI3/GPIO33 EC_MUTE#/PSCLK1/GPIO4A TYPEC_3A TYPEC_1P5A <34>
R207 100K_0402_5% KSI4 59 84 New Add for PW I Limit
KSI4/GPIO34 USB_EN#/PSDAT1/GPIO4B EC_MUTE# TYPEC_3A <34>
1 2 @EMC@ KSI5 60 85 +EC_VCC
KSI5/GPIO35 PSCLK2/GPIO4C USB_EN EC_MUTE# <29>
C1279 100P_0402_50V8J KSI6 61 PS2 Interface 86
KSI6/GPIO36 PSDAT2/GPIO4D TP_CLK USB_EN <33> EC_SMB_DA1
KSI7 62 87 R1577 1 2 2.2K_0402_5%
C <31> KSO[0..17] KSI7/GPIO37 TP_CLK/GPIO4E TP_DATA TP_CLK <31> EC_SMB_CK1 C
KSO0 39 88 PS2 R1574 1 2 2.2K_0402_5%
KSO0/GPIO20 TP_DATA/GPIO4F TP_DATA <31> LID_SW#
KSO1 40 R344 1 2 47K_0402_5%
KSO2 41 KSO1/GPIO21
KSO3 42 KSO2/GPIO22 97 CHG_CTL1 Change for New Charger IC
KSO3/GPIO23 ENKBL/GPXIOA00 GPU_ACIN CHG_CTL1 <33>
KSO4 43 98
KSO4/GPIO24 WOL_EN/GPXIOA01 0.9VS_PWR_EN# GPU_ACIN <16>
KSO5 44 99
KSO6 45 KSO5/GPIO25 Int. K/B ME_EN/GPXIOA02 109 9022_PH1 0.9VS_PWR_EN# <35>
KSO7 46 KSO6/GPIO26 Matrix VCIN0_PH1/GPXIOD00 9022_PH1 <37>
KSO8 47 KSO7/GPIO27 BATT_TEMP 1 2
KSO8/GPIO28 SPI Device Interface EC_RTCRST
KSO9 48 119 C1265 100P_0402_50V8J
KSO10 49 KSO9/GPIO29 MISO/GPIO5B 120 BT_ON ACIN 1 2
KSO10/GPIO2A MOSI/GPIO5C USB_HUB_RESET# BT_ON <27>
KSO11 50 SPI Flash ROM SPICLK/GPIO58 126 Reserve for HUB RST# C1266 100P_0402_50V8J
KSO11/GPIO2B FP_PWR_EN USB_HUB_RESET# <33>
KSO12 51 128
KSO12/GPIO2C SPICS#/GPIO5A FP_PWR_EN <31> EC_RSMRST#
KSO13 52 Reserve for FP R3907 1 @ 2 47K_0402_5%
KSO14 53 KSO13/GPIO2D SYSON R1675 1 @ 2 100K_0402_5%
KSO15 54 KSO14/GPIO2E 73 CHG_EN Change for New Charger IC 3V_EN R940 1 2 1M_0402_5%
KSO15/GPIO2F EC_CIR_RX/AD6/GPIO40 CHG_EN <33>
KSO16 81 74 VGATE VGATE <42>
KSO17 82 KSO16/GPIO48 SYS_PWROK/AD7/GPIO41 89 BATT_4S
KSO17/GPIO49 GPIO50 90 BATT_BLUE_LED# BATT_4S <38>
BATT_CHG_LED#/GPIO52 CAPS_LED# BATT_BLUE_LED# <33>
91
EC_SMB_CK1 CAPS_LED#/GPIO53 PWR_LED# CAPS_LED# <31>
77 GPIO 92
<37,38> EC_SMB_CK1 EC_SMB_DA1 EC_SMB_CLK1/GPIO44 PWR_LED#/GPIO54 BATT_AMB_LED# PWR_LED# <33>
78 93
<37,38> EC_SMB_DA1 EC_SMB_CK2 EC_SMB_DAT1/GPIO45 BATT_LOW_LED#/GPIO55 BATT_AMB_LED# <33>
79 95 SYSON
<8,16,34> EC_SMB_CK2 EC_SMB_DA2 EC_SMB_CLK2/GPIO46 SYSON/GPIO56 VR_ON SYSON <40>
80 121
<8,16,34> EC_SMB_DA2 EC_SMB_DAT2/GPIO47 VR_ON/GPIO57 0.9_1.8VALW_PWREN VR_ON <41,42> EC_THERM
127 1 RS@ 2 APU_PROCHOT# <8,38,42>
DPWROK_EC/GPIO59 0.9_1.8VALW_PWREN <41>
SM Bus
R1690
SLP_S3# 6 100 EC_RSMRST# 0_0402_5%
<9> SLP_S3# TP_I2C_INT# PM_SLP_S3#/GPIO04 EC_RSMRST#/GPXIOA03 CHG_ILMSEL EC_RSMRST# <9>
14 101 Change for New Charger IC
<31> TP_I2C_INT# CHG_CTL3 GPIO07 GPXIOA04 9022_VCIN CHG_ILMSEL <33>
Change for New Charger IC 15 102 9022_VCIN <37>
<33> CHG_CTL3 TP_3V_EN GPIO08 VCIN1_ADP_PROCHOT/GPXIOA05 EC_THERM
16 103
<31> TP_3V_EN WL_OFF# GPIO0A VCOUT1_PROCHOT#/GPXIOA06
17 104 MAINPWON
<27> WL_OFF# WLAN_WAKE# GPIO0B VCOUT0_MAIN_PWR_ON/GPXIOA07 MAINPWON <32,37,39>
18 105 BKOFF#
<27> WLAN_WAKE# CAM_EN 19 GPIO0C BKOFF#/GPXIOA08 106 LAN_GPO BKOFF# <24>
<24> CAM_EN AC_PRESENT/GPIO0D GPIO GPO GPXIOA09 3V_EN_R_EC LAN_GPO <26>
SPOK 25 107
B <39> SPOK FAN_SPEED1 28 PWM2/GPIO11 PCH_PWR_EN/GPXIOA10 108 THERMTRIP# B
<32> FAN_SPEED1 FAN_SPEED2 FAN_SPEED1/GPIO14 PWR_VCCST_PG/GPXIOA11 THERMTRIP# <8>
29
<32> FAN_SPEED2 EC_TX 30 FANFB1/GPIO15 MAINPWON 1 2 3V_EN
<27> EC_TX EC_RX EC_TX/GPIO16 3V_EN <39>
31 110 ACIN
<27> EC_RX SYS_PWRGD_EC 32 EC_RX/GPIO17 VCIN1_AC_IN/GPXIOD01 EC_ON ACIN <38>
SYS_PWRGD_EC is OD-Pin <9> SYS_PWRGD_EC 112 D2012 @
PWR_SUSP_LED# 34 PCH_PWROK/GPIO18 EC_ON/GPXIOD02 114 ON/OFFBTN# EC_ON <39> RB751V-40_SOD323-2
<33> PWR_SUSP_LED# NUM_LED# SUSP_LED#/GPIO19 ON/OFF#/GPXIOD03 LID_SW# ON/OFFBTN# <31>
36 GPI 115
<31> NUM_LED# NUM_LED#/GPIO1A LID_SW#/GPXIOD04 LID_SW# <31> 3V_EN_R_EC
116 SUSP# R3926 1 2 1K_0402_5%
SUSP#/GPXIOD05 SUSP# <35,38,40>
117 ENBKL
GPXIOD06 EC_TYPEC_EN# ENBKL <8>
118 Add for Type-C PW
PBTN_OUT# PECI/GPXIOD07 EC_TYPEC_EN# <34>
122
<9> PBTN_OUT# SLP_S5# 123 PBTN_OUT#/GPIO5D 124
<9,38> SLP_S5# PM_SLP_S4#/GPIO5E V18R/VCC_IO2 +EC_VCC
AGND
GND
GND
GND
GND
GND
11
24
35
94
113
69
U44 SPOK 1 2 EC_RSMRST#

KB9022QD_LQFP128_14X14 L43
FBM-11-160808-601-T_0603 D2013 @
2 1 RB751V-40_SOD323-2
1 2 SYS_PWRGD_EC
ECAGND
20mil
D2014 @
RB751V-40_SOD323-2
A A

EC ENE-KB9022
Custom 1.B
5 4 3 2 1
ON/OFF BTN TP/B Conn.
+TP_VCC +3VS
RP20
+TP_VCC +3VALW +TP_VCC I2C_3_SDA_R 1 8
20mil 0.1A U13 SA000079400 I2C_3_SCL_R 2 7
SY6288C20AAC_SOT23-5 TP_I2C_INT#_APU 3 6
4.7U_0402_6.3V6M
R534 5 1 4 5
100K_0402_5% 1 @ 2 IN OUT
+3VS 1
1U_0201_6.3V6M
C2563
2 1 R463 0_0402_5% 2 2.2K_0804_8P4R_5%
+3VLP GND
C2562
2
C663 4 3 +TP_VCC
ON/OFFBTN# JTP1 0.1U_0201_10V6K EN OC 2
<30> ON/OFFBTN# TP_I2C_INT#
1 1 2 2 1
1 2 TP_CLK @ 1 Vih=1.5 R633
2 3 TP_DATA 10K_0402_5%
3 4
4 I2C_3_SDA_R TP_3V_EN <30>
5
4 3 5
6
6
7
I2C_3_SCL_R
TP_I2C_INT#
TP_I2C_INT# <30> To EC
Test Only SWK1 @ 7 8 TP_SENOFF# TP_I2C_INT# 1 2
BOT NTC013-AA1J-A160T_4P 8
GND
9
TP_SENOFF# <30> TP_I2C_INT#_APU <9> To APU
2 1 SN10000CV00 10 D22
GND RB751V-40_SOD323-2
ACES_51524-00801-001
CONN@
+TP_VCC
SP01001A910 +TP_VCC
Vgs=1.0-2.5V
5
G
1
1
Q2509B
R2507 R2509 2N7002KDW_SOT363-6
4.7K_0402_5% 4.7K_0402_5% SB00000EO00
I2C_3_SCL_R 4 3
S
I2C_3_SCL <9>
D
2
2
G
TP_CLK
TP_DATA TP_CLK <30>
Q2509A To APU
2N7002KDW_SOT363-6
TP_DATA <30> I2C_3_SDA_R 1 6 SB00000EO00
S
I2C_3_SDA <9>
D
Lid Switch (Hall Effect Switch) R2622
R2623
1
1
@
@
2 0_0402_5%
2 0_0402_5%
+3VLP
JHS1
1 KSI[0..7]
1 KSI[0..7] <30>
KB BackLight KB Conn.
LID_SW# 2
<30> LID_SW# 2
3 KSO[0..17]
3 KSO[0..17] <30>
4
4
5
6 GND
GND JKB1
ACES_51524-0040N-001 <30> CAPS_LED# R3982 1 2 1K_0402_5% 1
+5VS JKB2 1
CONN@ JBL1 R3983 1 @ 2 0_0402_5% 2
U1 1 30 R3984 1 @ 2 0_0402_5% 3 2
SP010022M00 5 1 +5VS_BL 2 1 29 GND2
<30>
+5VS
NUM_LED# R3985 1 2 1K_0402_5% 4 3
IN OUT 3 2 28 GND1 5 4
2 4 3 ON/OFFBTN# 27 28 ON/OFFBTN# 6 5
GND 4 KSO0 26 27 KSO0 7 6
4 3 5 KSO1 25 26 KSO1 8 7
<30> KBL_EN EN OC GND 25 8
6 KSO2 24 KSO2 9
SY6288C20AAC_SOT23-5 GND KSO3 23 24 KSO3 10 9
SA000079400 ACES_51524-0040N-001 KSO4 22 23 KSO4 11 10
CONN@ KSO5 21 22 KSO5 12 11
1 21 12
Vih=1.5 KSO6 20 KSO6 13
SP010022M00 20 13
TPM 2
C3
0.1U_0201_10V6K
KSO7
KSO8
KSO9
KSO10
19
18
17
16
19
18
17
KSO7
KSO8
KSO9
KSO10
14
15
16
17
14
15
16
KSO11 15 16 KSO11 18 17
+3VALW RW1 +3VALW_TPM +3VS RW2 +3VS_TPM KSO12 14 15 KSO12 19 18
0_0603_5% 0_0603_5% JBL2 KSO13 13 14 KSO13 20 19
1 RS@ 2 1 RS@ 2 1 KSO14 12 13 KSO14 21 20
+5VS_BL 2 1 KSO15 11 12 KSO15 22 21
2 11 22
10U_0603_6.3V6M
0.1U_0201_10V6K
CW2
10U_0603_6.3V6M
0.1U_0201_10V6K
CW4
0.1U_0201_10V6K
CW5
0.1U_0201_10V6K
CW6
1 1 1 1 1 1 3 KSO16 10 KSO16 23
3 10 23
CW1
CW3
4 KSO17 9 KSO17 24
4 KSI0 8 9 KSI0 25 24
5 KSI1 7 8 KSI1 26 25
2 TPM@ 2 TPM@
near pin5 2 TPM@ 2 2
TPM@ 2
TPM@ TPM@ 6 GND KSI2 6 7 KSI2 27 26 33
GND KSI3 5 6 KSI3 28 27 GND 34
ACES_51524-0040N-001 KSI4 4 5 KSI4 29 28 GND
CONN@ KSI5 3 4 KSI5 30 29
KSI6 2 3 KSI6 31 30
near pin10, 19, 24
SP010022M00 KSI7 1 2 KSI7 32 31
1 32
BADD SELECTION ACES_85201-2805
RW5 1 2 0_0402_5% CONN@ ACES_50596-03201-P01
<10> LPC_AD0 LPC_AD0_R <30>
RW6 1 2 0_0402_5% CONN@
* 1 AEh(write), AFh(read) <10> LPC_AD1
RW7 1 2 0_0402_5%
LPC_AD1_R <30> SP01000GO00
<10> LPC_AD2
RW8 1 2 0_0402_5%
LPC_AD2_R <30> SP010017J00
<10> LPC_AD3 LPC_AD3_R <30>
29
UW1 TPM@
VSB
1 +3VALW_TPM
Finger Print <33> HUB_USB20_N3
HUB_USB20_N3 RK18 1 RS@ 2 0_0402_5% HUB_USB20_N3_L
30 XOR_OUT/SDA/GPIO0 8
+3VS_TPM
Power Souce Check <33> HUB_USB20_P3
HUB_USB20_P3 RK19 1 RS@ 2 0_0402_5% HUB_USB20_P3_L +FP_VCC
SCL/GPIO1 VDD1
10K_0402_5%1 @ 2 RW3 TPM_BADD
3
6 GPX/GPIO2 VDD2
14
22
EGIS ETU801 +FP_VCC=5V
GPIO3/BADD VDD3
LPC_AD0_R 24 2
ELAN SA464K-2200 +FP_VCC=3.3V JFP1
LPC_AD1_R 21 LAD0/MISO NC1 7 8
LPC_AD2_R 18 LAD1/MOSI NC2 10 +FP_VCC HUB_USB20_P3_L 7 8 10
LPC_AD3_R 15 LAD2/SPI_IRQ# NC3 11 HUB_USB20_N3_L 6 7 G2 9
LAD3 NC4 25 RK16 1 FP@ 2 0_0603_5% UK6 DK2 @EMC@ 5 6 G1
NC5 +3VALW HUB_USB20_N3_L 5
19 26 +5VALW RK17 1 @ 2 0_0603_5% 5 1 6 3 4
<10> LPC_CLK1_TPM LCLK/SCLK NC6 IN OUT I/O4 I/O2 4
20 31 1 3
<10,30> LPC_FRAME# LFRAME#/SCS# NC7 3
17 2 FP@ 2
<10,30> LPC_RST# LRESET#/SPI_RST#/SRESET# GND 2
27 9 CK12 1
<10,30> SERIRQ 13 SERIRQ GND1 16 4 3 5 2 1
<10> CLKRUN# CLKRUN#/GPIO4/SINT# GND2 EN OC 4.7U_0402_6.3V6M +FP_VCC VDD GND
28 23 2 ACES_51522-00801-001
LPCPD# GND3 2
32 FP@ SY6288C20AAC_SOT23-5 CONN@
4 GND4 33 CK11 FP@
5 PP PGND 12 4 1 HUB_USB20_P3_L SP01001AE00
1U_0201_6.3V6M SA000079400
TEST Reserved 1 I/O3 I/O1
FP_PWR_EN <30>
CLKRUN PH 10K to +3VS at APU side NPCT650ABCYX _QFN32_5X5 AZC099-04S.R7G_SOT23-6
SC300001G00
SA00008ELE0 S IC NPCT650ABCYX QFN 32P TPM2.0 FW 1.3.2.8
LPC_CLK1_TPM RW4 1 2 33_0402_5% CW7 1 2 22P_0402_50V8J
KB/TP/TPM/LID
Custom 1.B
@EMC@ @EMC@ DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5 4 3 2 1
FAN Conn
80mil +5VS Screw Hole
RF1 1 RS@ 2 0_0603_5% +VCC_FAN1
+3VS PCB Fiducial Mark
RF7 1 RS@ 2 0_0603_5% +VCC_FAN2 H4 H34 H36 H37 H10 H39 H33
D 1 2 H_3P0 H_3P0 H_3P0 H_3P0 H_6P0 H_6P4 H_2P5 D
1
FD1 FD2
@EMC@ CF2 CF1 RF2
1000P_0402_50V7K 4.7U_0402_6.3V6M 10K_0402_5%
1
2 1 @ @
40mil
1
JFAN1
2
+VCC_FAN1 1 FIDUCIAL_C40M80 FIDUCIAL_C40M80
FAN_SPEED1 2 1 @ @ @ @ @ @ @
<30> FAN_SPEED1 FAN_PWM1 2
3 FD3 FD4
<30> FAN_PWM1 3 CPU Hole
4 GPU Hole NGFF Stand-Off
5 4
6 G1 H13 H14 H15 H26 H27 H38 H29 H30 H5 H6 H31 H32 @ @
1
1
CF3 G2 H_3P8 H_3P8 H_3P8 H_3P8 H_3P8 H_3P8 H_3P2 H_3P2 H_4P0 H_4P0 H_4P0 H_4P0
1000P_0402_50V7K ACES_50278-00401-001 FIDUCIAL_C40M80 FIDUCIAL_C40M80
@EMC@ CONN@
2
SP02000RR00
1
@ @ @ @ @ @ @ @ @ @ @ @
+3VS
H23 H35 H25
1
H_2P7X2P0N H_2P7X2P0N H_2P0N
RF5
10K_0402_5%
40mil @ @ @
1
JFAN2
2 +VCC_FAN2 1
FAN_SPEED2 2 1
<30> FAN_SPEED2 FAN_PWM2 2
3
<30> FAN_PWM2 3
4
5 4
1 G1
CF10 6
C
1000P_0402_50V7K G2 C
@EMC@ ACES_50278-00401-001
2 CONN@
SP02000RR00
Reset Circuit +3VLP
R3925 1 @ 2 0_0402_5%
MAINPWON <30,37,39>
2
R349 R3924 1 RS@ 2 0_0402_5%
EC_RST# <30>
100K_0402_5%
6
D
BI_GATE# 2 Q2519A
G
BI_GATE PH to +RTCVCC at PWR side 2N7002KDW_SOT363-6
SB00000EO00
3
D 1 S
1
BI_GATE 5
<37> BI_GATE G C347
0.1U_0201_10V6K
S 2
4
Q2519B
2N7002KDW_SOT363-6
SB00000EO00
Vgs=1.0-2.5V
B B
Reset But t on BI SW
Reset But t on @
3 SWG1 1
SWG2
BI_GATE 1 2 BI_GATE BI_S <37>
4 2
ATE-2-V-TR_4P
3 4
H : 3.8mm
NTC013-AA1J-A160T SPST_4P
SN10000CV00 Release : Bat t er y Off
Push : Bat t er y ON
A A

FAN/BATT RESET_DEGUB SW
Custom 1.B
5 4 3 2 1
5 4 3 2 1
USB3.0 (Port 0) For ESD request

D15 EMC@
+USB3_VCCA
USB3_ATX_L_DRX_P0 1 1 USB3_ATX_L_DRX_P0
10 9
USB3_ATX_L_DRX_N0 USB3_ATX_L_DRX_N0 1 1
2 2 9 8
C482 1 2 0.22U_0402_16V7K USB3_ATX_C_DRX_N0 R3968 1 RS@ 2 0_0402_5% USB3_ATX_L_DRX_N0 CS25 + C487
<10> USB3_ATX_DRX_N0 USB3_ARX_L_DTX_P0 USB3_ARX_L_DTX_P0
4 4 7 7 150U_B2_6.3VM_R35M .1U_0402_16V7K
C484 1 2 0.22U_0402_16V7K USB3_ATX_C_DRX_P0 R3967 1 RS@ 2 0_0402_5% USB3_ATX_L_DRX_P0 SGA00009M00 2
<10> USB3_ATX_DRX_P0 SW_USB20_P0 USB20_P0_R USB3_ARX_L_DTX_N0 USB3_ARX_L_DTX_N0 2 EMC@
2 1 5 5 6 6
3 3
USB3.0 Conn.
SW_USB20_N0 3 4 USB20_N0_R JUSB1
C2754 1 2 0.33U_0402_10V6K USB3_ARX_C_DTX_N0 R3966 1 RS@ 2 0_0402_5% USB3_ARX_L_DTX_N0 8 1
<10> USB3_ARX_DTX_N0 USB20_N0_R VBUS
DLM0NSN900HY2D_4P 2
C2755 1 2 0.33U_0402_10V6K USB3_ARX_C_DTX_P0 R3965 1 RS@ 2 0_0402_5% USB3_ARX_L_DTX_P0 L2508 EMC@ L05ESDL5V0NA-4 SLP2510P8 USB20_P0_R 3 D-
D <10> USB3_ARX_DTX_P0 D+ D
SM070005U00 SC300003Z00 4
USB3_ARX_L_DTX_N0 5 GND
USB3_ARX_L_DTX_P0 6 SSRX- 10
7 SSRX+ GND 11
D2010 EMC@ USB3_ATX_L_DRX_N0 8 GND GND 12
6 3 USB20_P0_R USB3_ATX_L_DRX_P0 9 SSTX- GND 13
I/O4 I/O2 SSTX+ GND
+USB3_VCCA ACON_TARB5-9V1391
CONN@
Non-Charger Co-lay 5
VDD GND
2
DC23300NH00
4 1 USB20_N0_R
+5VALW +USB3_VCCA I/O3 I/O1
80mils 2A AZC099-04S.R7G_SOT23-6
C483 NCHG@ SC300001G00
1U_0201_6.3V6M U25 NCHG@
1 2 5 1
IN OUT
2
GND
USB_EN 4 3 R454 1 @ 2 0_0402_5%
<30> USB_EN EN OC USB_OC0# <10>
SY6288C20AAC_SOT23-5 1
SA000079400
C612
Vih=1.5 0.1U_0201_10V6K For Test Debug Only
2@
+5VALW
1 @ 2 CHG_CTL3
RS150 10K_0402_5% +5VALW
USB20_N0 RS96 1 NCHG@ 2 0_0402_5% SW_USB20_N0 0904 vendor recommend
USB20_P0 RS97 1 NCHG@ 2 0_0402_5% SW_USB20_P0
CHG_EN 2 @ 1 CHG_CTL1 RS147 1 RS@ 2 0_1206_5%
RS151 10K_0402_5%
0904 reserve VIN & VOUT 1206 for
QFN current measure
22U_0603_6.3V6M
0.1U_0201_10V6K
1 1
CS9
CS7
@ +USB3_VCCA
CHG@
C 2 2 C
US10 CHG@
+5VALW_CHG 1 12 +USB3VCCA_CHG RS10 1 RS@ 2 0_1206_5%
VIN VOUT
USB20_N0 2
+5VALW <10> USB20_N0 USB20_P0 DM_OUT
3
<10> USB20_P0 DP_OUT SW_USB20_P0
10
USB Host Charger Truth Table USB_OC0# RS11 2 @ 1 0_0402_5%
CHG_ILMSEL
13
4
FAULT#
DP_IN
DM_IN
11 SW_USB20_N0
CHG_EN CTL1 CTL2 CTL3 ILIM_SEL MODE Current Limit Note 1 <30> CHG_ILMSEL ILIM_SEL
Setting CHG_EN
CS8 5 15
<30> CHG_EN EN ILIM_L
0.1U_0201_10V6K 16
0 0 1 0 1 SDP1-OFF ILIM_H Port power off
RS14 1 CHG@ 2 10K_0402_5% CHG_CTL2 @ 2 ILIM_HI 0831 Reserve ILIM_L R as vendor recommend
1
CHG_CTL1 6
1 0 1 0 1 SDP1 ILIM_H Data Lines Connected <30> CHG_CTL1 CHG_CTL2 CTL1
22.1K_0402_1%
39K_0402_1%
7 9
CHG_CTL3 CTL2 NC 14
RS12
RS13
1 0 1 1 1 DCP ILIM_H Data Lines Disconnected 8
CHG_ILMSEL <30> CHG_CTL3 CTL3 GND 17
Au t o RS15 1 @ 2 10K_0402_5%
Thermal Pad CHG@ @
2
1 1 1 1 1 CDP ILIM_H Data Lines Connected SLGC55544CVTR_TQFN16_3X3
SA000097E10
0911 Rerserve PU, vendor suggest to EC control

if future need support SDP2 ILM R vaule
Ios(mA)=50250/R(Kohm)
ILIM_Hi=2273mA
ILIM_L=1288mA
B
USB HUB B
+3VALW +3V_HUB +3V_HUB HUB_USB20_P1 1 2 HUB_USB20_P1_L

R4023 1 NHUB@ 2 0_0402_5% USB20_P5_R R4025 1 NHUB@ 2 0_0402_5%
<10> USB20_P5
R269 R4024 1 NHUB@ 2 0_0402_5% USB20_N5_R R4026 1 NHUB@ 2 0_0402_5%
<10> USB20_N5 HUB_USB20_N1 HUB_USB20_N1_L
0_0402_5% HUB@ 4 3
1 HUB@ 2 1 2
C288 0.1U_0201_10V6K C279 close to U73 pin5 DLM0NSN900HY2D_4P
10U_0603_6.3V6M
C294
0.1U_0201_10V6K
C293
1 1 HUB@ L2516 EMC@

1 2 C280 close to U73 pin9 SM070005U00
C289 0.1U_0201_10V6K C283 close to U73 pin14 2 1 USB20_N1_R
<10> USB20_N1
2 2
HUB@ C284 close to U73 pin21
HUB@
HUB@
1 2
C291 0.1U_0201_10V6K 3 4 USB20_P1_R
<10> USB20_P1
HUB@
JIO2
1 2 DLM0NSN900HY2D_4P
C290 0.1U_0201_10V6K L2517 EMC@ HPOUT_L_1 1
<29> HPOUT_L_1 HPOUT_R_1 1
SM070005U00 2
<29> HPOUT_R_1 2
<29> SLEEVE SLEEVE 3
RING2 4 3
<29> RING2 HP_PLUG# 4
<29> HP_PLUG# 5
+3V_HUB +3V_HUB 6 5
GNDA 6
7
8 7
U73 8
1
USB20_N1_R 9
+3V_HUB HUB@ 5 1 USB20_N5 USB20_P1_R 10 9
R1053 9 AVDD DM0 2 USB20_P5 11 10
1 HUB@ 2 PSELF L:Bus-Powered 0_0402_5% 14 AVDD DP0 HUB_USB20_N1_L 12 11
R266 100K_0402_5% H:Slef-Powered +3V_HUB 21 AVDD 3 HUB_USB20_N1 HUB_USB20_P1_L 13 12
2
1 HUB@ 2 OVCUR1# 27 DVDD DM1 4 HUB_USB20_P1 14 13

R273 10K_0402_5% Float:Non-Removable 28 V5 DP1 SUB/B Type-A BATT_AMB_LED# 15 14
<30> BATT_AMB_LED#
1
High:Removable V33 6 HUB_USB20_N2 BATT_BLUE_LED# 16 15

DM2 HUB_USB20_P2 HUB_USB20_N2 <24> <30> BATT_BLUE_LED# PWR_SUSP_LED# 16
HUB@ 7 17
R272 18 DP2 HUB_USB20_P2 <24> Touch Screen <30> PWR_SUSP_LED# PWR_LED# 18 17
TEST/SCL HUB_USB20_N3 <30> PWR_LED# 18
R976 10K_0402_5% 26 12 19
SDA DM3 HUB_USB20_P3 HUB_USB20_N3 <31> USB_EN 19
1 HUB@ 2 PGANG L:Individual Mode 0_0402_5% 13 20
HUB_USB20_P3 <31> Finger Print
2
R271 100K_0402_5% H:Gand Mode 1 @ 2 HUB_RESET# 17 DP3 21 20

<30> USB_HUB_RESET# RESET# HUB_USB20_N4 21
2 15 22
HUB_XIN DM4 HUB_USB20_P4 HUB_USB20_N4 <27> 22
HUB@ 10 16 23
C292 HUB_XOUT 11 X1 DP4 HUB_USB20_P4 <27> WLAN/BT 24 23
A 1U_0201_6.3V6M X2 25 OVCUR1# 25 24 A
1 PSELF 22 OVCUR1#/SMC 24
100mils 2.5A 26 25
PSELF OVCUR2#/SMD +5VALW 26
PGANG 23 20 27
PGANG OVCUR3# GNDA GND
19 28
OVCUR4# GND
29 8 RREF 2 HUB@ 1 ACES_51522-02601-001
Y11 GND RREF R267 680_0402_1% CONN@
HUB_XIN 1 4
C296
1
GL850G-OHY50_QFN28_5X5
SP01001AO00
1
C295 33P_0402_50V8J RREF can just the driving.
HUB@
33P_0402_50V8J HUB@
HUB@ 2 3 2 HUB_XOUT
2 SA000066320, S IC GL850G-OHY50 QFN 28P USB2.0 HUB
12MHZ_18PF_7V12000001 Security Classification Compal Secret Data Compal Electronics, Inc.
HUB@ SJ10000C210 2017/12/25 2019/12/25 Title
USB30/USB HUB/LED
Custom 1.B
5 4 3 2 1
5 4 3 2 1
For ESD request
USB3.0 Type-C TYPEC_CC2
DS1
1 1
TYPECEMC@
10 9
TYPEC_CC2
TBTA_SBU2 2 2 9 8 TBTA_SBU2
CS1 1 2 0.22U_0402_16V7K USB3_ATX_C_DRX_P2 RS1 1 RS@ 2 0_0402_5% USB3_ATX_R_DRX_P2
<10> USB3_ATX_DRX_P2 TYPEC_CC1 TYPEC_CC1
TYPEC@ 4 4 7 7
CS2 1 2 0.22U_0402_16V7K USB3_ATX_C_DRX_N2 RS2 1 RS@ 2 0_0402_5% USB3_ATX_R_DRX_N2
<10> USB3_ATX_DRX_N2 TBTA_SBU1 TBTA_SBU1
TYPEC@ 5 5 6 6
3 3
CS109 1 2 0.33U_0402_10V6K USB3_ARX_C_DTX_P2 RS3 1 RS@ 2 0_0402_5% USB3_ARX_R_DTX_P2
<10> USB3_ARX_DTX_P2 8
TYPEC@
CS110 1 2 0.33U_0402_10V6K USB3_ARX_C_DTX_N2 RS4 1 RS@ 2 0_0402_5% USB3_ARX_R_DTX_N2
<10> USB3_ARX_DTX_N2
TYPEC@ L05ESDL5V0NA-4 SLP2510P8
SC300003Z00
D USB3_ATX_R_DRX_P2
DS2 TYPECEMC@
USB3_ATX_R_DRX_P2
D
1 1 10 9
USB20_P2 2 1 USB20_P2_R
<10> USB20_P2 USB3_ATX_R_DRX_N2 USB3_ATX_R_DRX_N2
USB3.0 Type-C <10> USB20_N2

USB20_N2 3 4 USB20_N2_R USB20_P2_R
2 2
4 4
9
7
8
7 USB20_P2_R
DLM0NSN900HY2D_4P USB20_N2_R 5 5 6 6 USB20_N2_R

LS7 TYPECEMC@
CS3 1 2 0.22U_0402_16V7K USB3_ATX_C_DRX_P3 RS5 1 RS@ 2 0_0402_5% USB3_ATX_R_DRX_P3 SM070005U00 3 3
<10> USB3_ATX_DRX_P3
TYPEC@
CS4 1 2 0.22U_0402_16V7K USB3_ATX_C_DRX_N3 RS6 1 RS@ 2 0_0402_5% USB3_ATX_R_DRX_N3 8
<10> USB3_ATX_DRX_N3
TYPEC@
L05ESDL5V0NA-4 SLP2510P8
SC300003Z00
CS111 1 2 0.33U_0402_10V6K USB3_ARX_C_DTX_P3 RS8 1 RS@ 2 0_0402_5% USB3_ARX_R_DTX_P3
<10> USB3_ARX_DTX_P3 DS3
TYPEC@ TYPECEMC@
CS112 1 2 0.33U_0402_10V6K USB3_ARX_C_DTX_N3 1 RS@ 2 0_0402_5% USB3_ARX_R_DTX_N3 1 1
<10> USB3_ARX_DTX_N3
RS7 10 9
TYPEC@
2 2 9 8
USB3_ARX_R_DTX_N3 4 4 7 7 USB3_ARX_R_DTX_N3
USB3_ARX_R_DTX_P3 5 5 6 USB3_ARX_R_DTX_P3
6
3 3
SC300003Z00
DS4 TYPECEMC@
USB3_ARX_R_DTX_P2 1 1 USB3_ARX_R_DTX_P2
10 9
USB3_ARX_R_DTX_N2 2 2 9 8 USB3_ARX_R_DTX_N2
USB3_ATX_R_DRX_N3 4 4 7 7 USB3_ATX_R_DRX_N3
USB3_ATX_R_DRX_P3 5 5 6 6 USB3_ATX_R_DRX_P3
C 3 3 C
8
+5VALW +5VALW_VCONN
US11 SC300003Z00
6 1 20 mils
IN OUT
+3VALW
RS156 2 TYPEC@1 100K_0402_5%
RS155 1 TYPEC@2 1K_0402_5%

5
4
SET GND
2
3
1 TYPEC@
CS97
0.1U_0201_10V6K
5V@3A
EN(/EN) FLAG
2 RSET
1
@ G527ATP1U_TSOT23-6
CS124 TYPEC@
1
2.2U_0402_6.3V6M SA00006Y700 CS108 TYPEC@ +5VALW +USB3_VCCC
2 150U_B2_6.3VM_R35M TYPEC@ TYPEC@ TYPEC@
2 1 RS146 RS145 RS144
120mils 3A 6.2K_0402_5% 8.2K_0402_5% 4.3K_0402_5%
+
CS104 TYPEC@
2
0.1U_0201_10V6K US12 TYPEC@
2 1 6 1
0.2A OCP for VCONN! IN OUT
6
D
TYPEC@ 2
TYPEC_3A <30>
RSET 5 2 QS1A G
SET GND 2N7002KDW_SOT363-6
+5VALW S
SB00000EO00 From EC Current Limit
1
VBUS_P_CTRL 4 3 RS120 2 @ 1 0_0402_5%
EN FLAG USB_OC2# <10>
3
+3VALW +3VALW_CC +1.8V_LDO D
SY6861B1ABC_TSOT23-6 1 TYPEC@ 5
TYPEC_1P5A <30>
1
RS127 @ CS107 QS1B G

SA0000BDN00
0_0603_5% RS112 0.1U_0201_10V6K 2N7002KDW_SOT363-6
1 RS@ 2 Close to Pin9 Close to Pin8 100K_0402_5% VEN=1.0V @ SB00000EO00 S
4
2
1
1
1 TYPEC@ @
2
TYPEC@ CS122 D QS6

CS116 1U_0201_6.3V6M 2 2N7002K_SOT23-3
2 <30> EC_TYPEC_EN# Vgs=1.0-2.5V
2.2U_0402_6.3V6M G SB00000PU00
2 S
G518 MOS Current Limit
3
B GPP_B1 GPP_B4 RSET(kΩ ) MODE limit point B

L L 6.2 0.9A 1.09A
L H 3.53 1.5A 1.92A
+3VALW_CC +5VALW_VCONN
H L 2.54 2A 2.67A
US1 +USB3_VCCC
+3VALW_CC
*H H 1.94 3A 3.5A
TYPEC@
1 10 +1.8V_LDO
GPIO2(INT#) VCONN
1
1
2 9 TYPEC@ +USB3_VCCC +USB3_VCCC

TYPEC@ TYPEC@ CUR_DR VDD33 RS137
RS135 RS136 8 39K_0402_1%
10K_0402_5% 10K_0402_5% TYPEC_SMB_DA2 3 VDD18
2
TYPEC_SMB_CK2 4 SI0(SDA)
2
SI1(SCL) 11 TYPEC_CC1 VBUS_MON CC1_VCONN/CC2_VCONN 20mils JTYPEC1

CUR_MODE0 VBUS_MON 7 CC1 12 TYPEC_CC2 A1 B12
CUR_MODE1 CUR_MODE0 14 VBUS_DC CC2 GND GND
CUR_MODE0
1
CUR_MODE1 15 TYPEC@ USB3_ATX_R_DRX_P2 A2 B11 USB3_ARX_R_DTX_P2

CUR_MODE1 1 SSTXP1 SSRXP1
1
16 CS121 TYPEC@ USB3_ATX_R_DRX_N2 A3 B10 USB3_ARX_R_DTX_N2

RS134 RS133 CC_EN 5 0.01U_0402_16V7K RS138 CS11 2 1 0.1U_0402_25V6 SSTXN1 SSRXN1
10K_0402_5% @ 10K_0402_5% @ CC_SEL 13 VBUS_P_CTRL 3K_0402_1% TYPEC@ A4 B9 CS12 1 2 0.1U_0402_25V6
TYPC_CONN_DET 2 VBUS VBUS TYPEC@
2
3
TYPEC_CC1 TBTA_SBU2
0.1U_0402_25V6
CS13 @
10U_0603_25V6M
CS123 TYPEC@
22U_0805_25V6M
CS105 @
22U_0805_25V6M
CS106 @
6 17 1 1 1 A5 B8
2
GND EPAD CC1 SBU2

1
1
TYPEC@ USB20_P2_R A6 B7 USB20_N2_R
EJ179F_QFN16_4X4 RS154 USB20_N2_R A7 DP1 DN2 B6 USB20_P2_R
2
10K_0402_5% 2 2 2 DN1 DP2
SA0000BAT00 TBTA_SBU1 TYPEC_CC2
A8 B5
2
S IC EJ179F QFN 16P USB SW SBU1 CC2

DS5 CS14 2 1 0.1U_0402_25V6 A9 B4 CS15 1 2 0.1U_0402_25V6
MESC5V02BD03_SOT23-3 TYPEC@ VBUS VBUS TYPEC@
1
TYPECEMC@ USB3_ARX_R_DTX_N3 A10 B3 USB3_ATX_R_DRX_N3
+3VS USB3_ARX_R_DTX_P3 A11 SSRXN2 SSTXN2 B2 USB3_ATX_R_DRX_P3
Initial Current mode selection SSRXP2 SSTXP2
CUR_MODE0 CUR_MODE1 MODE A12 B1
GND GND
L Vgs=1.0-2.5V
H Default Current +3VALW_CC 1 5
A GND GND
A
5
L H Medium current 2 6
G
@ 3 GND GND 7
QS4B SB00000EO00 RS131 4 GND GND 8
H H High current GND GND
2N7002KDW_SOT363-6 4.7K_0402_5%
EC_SMB_CK2 4 3 TYPEC_SMB_CK2 TYPEC_SMB_CK2 2 TYPEC@1 LOTES_AUSB0181-P001A
S
<8,16,30> EC_SMB_CK2
D
DC021702230
2
G
@ CONN@
QS4A SB00000EO00 RS130
2N7002KDW_SOT363-6 4.7K_0402_5%
EC_SMB_DA2 1 6 TYPEC_SMB_DA2 TYPEC_SMB_DA2 2 TYPEC@1
S
<8,16,30> EC_SMB_DA2
D

RS148 2 TYPEC@1 0_0402_5%
TYPE-C CONN
RS149 2 TYPEC@1 0_0402_5% AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
5 4 3 2 1
A B C D E
VIN 5V and 3.3V (VBIAS=5V),IMAX(per channel)=6A,Rds=18mohm RV406

+3VS 0_0402_5%
U2
J7 JP@ 2 @ 1
1 14 +3VS_LS
+3VALW VIN1 VOUT1 +3VALW
1 2 2 13 1
C12 @ VIN1 VOUT1 JUMP_43X118
1 RS@ 2 3VS_ON 1U_0201_6.3V6M 3 12 1 2 C13 UV5 SA00000OH00
<30,38,40> SUSP# ON1 CT1
C10 0.1U_0201_10V6K MC74VHC1G08DFT2G_SC70-5
5
R1667 4 11 560P_0402_50V7K 2 DIS@
+5VALW VBIAS GND
1 0_0402_5% RV807 1 1
P
1 RS@ 2 5VS_ON 5 10 1 2 0_0402_5% IN1 4 VGA_ON
ON2 CT2 +5VS O VGA_ON <45>
C9 1 RS@ 2 2 1
<10> PE_GPIO1 IN2
G
R1668 +5VALW 6 9 330P_0402_50V7K J8 JP@ DIS@
VIN2 VOUT2
2
0_0402_5% 1 2 7 8 +5VS_LS CV2698
1
3
C11 @ VIN2 VOUT2 @ @ 0.1U_0201_10V6K
1 2
1U_0201_6.3V6M 15 JUMP_43X118 RV913 CV626
GPAD C14 100K_0402_5% 0.22U_0402_16V7K
2
0.1U_0201_10V6K
1
EM5209VF_DFN14_3X2 2
SA00007PM00
+3VALW
UV6 SA00000OH00
MC74VHC1G08DFT2G_SC70-5
5
VIN 1.8V and 1.5V (VBIAS=5V),IMAX(per channel)=6A,Rds=18mohm DIS@
RV833 VGA_ON 1
P
+1.8VS 33K_0402_5% IN1 4 VGA_ON_B
U3 O VGA_ON_B <45>
J9 JP@ +3VSDGPU 1 DIS@ 2 2
IN2
G
1 14 +1.8VS_LS
+1.8VALW VIN1 VOUT1 1 2
R1669 1 2 2 13 1 @
3
0_0402_5% C24 @ VIN1 VOUT1 JUMP_43X79 DIS@ CV2701 CV2722
SUSP# 1 RS@ 2 1.8VS_ON 1U_0201_6.3V6M 3 12 1 2 C26 0.22U_0402_16V7K Vih 2.1V 1U_0201_6.3V6M
ON1 CT1 C21 2 1
2
0.1U_0201_10V6K Delay 7ms
+5VALW 4 11 330P_0402_50V7K
VBIAS GND
5 10
ON2 CT2
2 6 9 2
7 VIN2 VOUT2 8
VIN2 VOUT2
15
GPAD
EM5209VF_DFN14_3X2
SA00007PM00
SB00000ZN00
S TR AO4354 1N SOIC-8
+0.9VALW U4 +0.9VS
AO4354 1N SOIC8
8 1 160mils(4.0A)
1 7 2
4.7U_0402_6.3V6M
C939
1U_0201_6.3V6M
C46
C940 6 3 1 1
4.7U_0402_6.3V6M 5
2
+3VALW TO +3VSDGPU
4
3 2 @2 3
+5VALW
+1.8VALW TO +1.8VSDGPU
1 2 0.9VS_GATE
R1674 1 2 IMAX(per channel)=6A,Rds=18mohm
4.7K_0402_5% @ +3VSDGPU
20mil(10mA)
1
C16 CV2724
D UV8
0.1U_0201_10V6K 0.22U_0402_16V7K J2504 JP@
2 2 1 1 14 +3VSDGPU_LS 1 2
<30> 0.9VS_PW R_EN# +3VALW VIN1 VOUT1 1 2
G @1 2 2 13 2
VIN1 VOUT1
S Q84 CV260 1U_0201_6.3V6M JUMP_43X39
2N7002K_SOT23-3 VGA_ON RV1648 1 RS@ 2 0_0402_5% 3 12 DIS@ 1 2 CV2725 DIS@
3
SB00000PU00 ON1 CT1 1000P_0402_50V7K CV621 0.1U_0201_10V6K

4 11 1
+5VALW VBIAS GND
Vgs=1.0-2.0V
RV1629 1 DIS@ 2 33K_0402_5% 5 10 DIS@ 1 2
ON2 CT2 1000P_0402_50V7K CV622 +1.8VSDGPU
+1.8VALW 6 9 J2503 JP@
@1 2 7 VIN2 VOUT2 8 +1.8VSDGPU_LS 1 2
1 VIN2 VOUT2 1 2
DIS@ CV2699 1U_0201_6.3V6M 2
CV625 15 JUMP_43X39
GPAD
0.22U_0402_16V7K Vih 1.2V CV31 DIS@
2
Delay 3ms EM5209VF_DFN14_3X2 40mil(1.013A) 1
0.1U_0201_10V6K
DIS@
SA00007PM00
4 4

DC INTERFACE
Custom 1.B
A B C D E
A B C D
1 +19V_ADPIN +19V_VIN 1
EMI@ PL101
NA_2P
@ +19V_ADPIN 1 2
ACES_50299-00601-001
2
1 EMI@ PL102
1 2 PR102 NA_2P PR103
2 3 1 2
3 4.7_1206_5% 4.7_1206_5%
1
4
7 4 5 PC101 EMI@ EMI@ PC102
1
1
8 G7 5 6 100P_0402_50V8J 1000P_0402_50V7K
2
G8 6
2
2
PJP101
EMI@ PC103 EMI@ PC104
0.1U_0603_25V7K 0.1U_0603_25V7K
1
1
2 2
3 3
@ PR101
0_0603_5%
1 2
+3VLP +CHGRTC
4 4

DCIN
Custom 1.B
A B C D
A B C D
PR201 100_0402_1%
1 2
EC_SMB_DA1
PR202 100_0402_1%
1 2
EC_SMB_CK1
+3VLP
PR203
200K_0402_1%
@ 1 2
PJP201 +3VLP
1
1
1
2 1 2
1
2 3 EC_SMB_DA1-1 BATT_TEMP @ PC202
1
1
4 EC_SMB_CK1-1 PR204 1K_0402_1% 0.1U_0603_25V7K
2
4 5 BATT_TS
5
1
6 BATT_B/I @ PR205 @ PR206
6 7 @ PR207 10K_0402_1% 10K_0402_1%
7 8
<45,47> 100K_0402_1%
2
8 9 +RTCVCC
GND 10 @ PU201
2
GND 1 8
VCC TMSNS1
1
CVILU_CI9908M2HR0-NH 2 7 2 1
PR208 GND RHYST1
1
100K_0402_5% MAINPWON 3 6 @ PR209
D PQ201 MAINPWON OT1 TMSNS2 47K_0402_1%
2
2 4 5 @ PH201
BI_GATE G OT2 RHYST2 100K_0402_1%_NCP15WF104F03RC
S LBSS139LT1G_SOT23-3 G718TM1U_SOT23-8
2
EMI@ PL201
3
+17.4V_BATT+ NA_2P
1 2
EMI@ PL202
NA_2P
1 2 BI_S
+17.4V_BATT
1
1
1
EMI@ PC201 EMI@ PC203 PR212
1000P_0402_50V7K 1000P_0402_50V7K 0_0402_5%
2
For KB9022 For KB9012

Active Recovery Active Recovery
2
2 2
OTP sense 20mΩ
VCIN0_PH(V) 92C, 1V 56C, 2.V SR 45W 58.5W, 0.61V 58.5W, 0.61V
PH202(ohm) 7.3092K 26.11K BR 65W 84.5W, 0.61V 84.5W, 0.61V
PH202 under CPU botten side :

CPU thermal protection at 96 degree C ( shutdown )
Recovery at 56 degree C +EC_VCCA
ADP_I
2013/10/02
Add for ENE9022 Battery Voltage drop detection.
3
Connect to ENE9022 pin64 AD1. 3
1
135W@ PR211 45W@ PR211
PR210 20K_0402_1% 10_0402_1%
65W@ PR211
Reserve for 2-cell design 16.9K_0402_1%
4.53K_0402_1%
2
9022_PH1
+19VB_5V
9022_VCIN
1
PH202
1
100K_0402_1%_B25/50 4250K
PR213
750K_0402_1% B value:4250K± 1%
2
PR214
2
0_0402_5%
1 2 VCIN1_BATT_DROP @
T1
1
@
T2 PR215
1
10K_0402_1%
2
1
PC204 PR216
0_0402_5%
PR217
0.1U_0402_25V6 150K_0402_1%
2
1
2
4 4
ECAGND

BATTERY CONN / OTP
Custom 1.B
A B C D
5 4 3 2 1
Module model information

ISL95520_Hybrid_Boost_V2.mdd
Protection for reverse input
Vgs = 20V
Vds = 60V max Power loss 0.22W for 90W;0.12W for 65W system;0.05W for 45W
Id = 250mA CSR rating: 1W
VCSIP-VCSIN spec < 81mV
1
D
2 PQ301 45W@ PQ311 135W@ PQ311 +19VB
G L2N7002WT1G_SC70-3 AON7506_DFN33-8-5 AON7380_DFN3X3-8-5
S
3
D D
1 2 1 2
PR301 PR302
1M_0402_1% 3M_0402_5%
EMI@ PL303
PQ310 +19V_P1 65W@ PQ311 FBMA-L11-201209-800LMA50T
EMB04N03H_EDFN5X6-8-5 AON7506_DFN33-8-5 PR303 1 2
Need check the SOA for inrush 1 1 +19V_P2 0.005_1206_1% EMI@ PL302 +19VB_CHG
2 2 FBMA-L11-201209-800LMA50T
5 3 3 5 1 4 1 2
+19V_VIN
EMI@
PC305 @EMI@
2 3 Isat: 10A
10U_0805_25V6K
10U_0805_25V6K
2200P_0402_25V7K
DCR: 14mohm
1
0.1U_0402_25V7K
CSIP_CHG_R
CSIN_CHG_R
1
PC302
PC303
PC304
@ PC322 @ PJ301
2
1 2 1 2
2
1 2
1000P_0402_25V JUMP_43X118
@ PR304
0_0402_5%
1
1
Co-lay jump and ISN choke. 45W@ PQ312 135W@ PQ312
2_0402_5%
AON7506_DFN33-8-5 AON7380_DFN3X3-8-5
PR305
1
PR306
2
2
499K_0402_1%
PC306
0.1U_0402_25V6
2
1 2 65W@ PQ312
4.02K_0402_1%
4.02K_0402_1%
AON7506_DFN33-8-5
1
1
2
5 3
Range:2V~3.5V PR309
4
0.22U_0603_25V7K
100_0402_1%
PR307
PR308
20*49.9/(392+49.9)=2.55V
1 2 +17.4V_BATT
0x3CH <BIT9> PSYS current gain
66.5K_0402_1%
CMSRC_CHG
1
Rs1 = 10mΩ and Rs2 = 5mΩ o r Rs 1 = 10m Ω a nd R s2 = 10m

Ω
1
2200P_0402_50V7K
PR310
PC301
BIT0 = 1.14uA/W ASGATE_CHG
1
1 2
BIT1 = 0.285uA/W
PC307
=========================================================
2
@ PC308
Rs1 = 20mΩ and Rs2 = 10mΩ o r Rs 1 = 20m Ω a nd R s2 = 20
m
2
OPCN_CHG 2
Ω 0.1U_0402_25V7K
BGATE_CHG
BIT0 = 2.28uA/W
OPCP_CHG
VBAT_CHG
CSIN_CHG
CSIP_CHG
BIT1 = 0.57uA/W
1 VDD_CHG
C PQ305 C
AON7506_DFN33-8-5
support Turbo boost : 2200P Support max charge 3.5A
32
31
30
29
28
27
26
25
100K_0402_1%
no support Turbo boost : 0.1u PU301 Choke 4.7uH SH00000YC00 Power loss: 0.245W
PR311
(Common Part)
CSIN
CMSRC
OPCN
CSIP
ASGATE
QPCP
BGATE
VBAT
@ PR312 PC309 4 CSR rating: 1W
0_0603_5% 0.47U_0603_16V7K (Size:6.6 x 7.3 x 3 mm) VCSPP-VCSON spec < 81mV
ACIN_CHG 1 24 BST_CHG 1 2 BST_CHG_R1 2 (DCR:28m~33m)
2
ACIN BOOT
Ipsys = KPSYS  x 
( VAD P x IAD P + VBA T T
x IBA ) UG_CHG
PR315
R_Psys = 1.2V / Ipsys 2 23 PL301 0.01_1206_1%
ACIN
3
2
1
ACOK UGATE
KPSYS = 1.14uA/W LX_CHG
4.7UH_PCMB063T-4R7MS_8A_20% +17.4V_BATT
2 +17.4V_BATT_CHG
1
adapter wattage = 45W @ PR314 1 2 0_0402_5% 3 22 1 1 4

158K_0402_1%
EC_SMB_DA1 SDA PHASE

PR313
Battery wattage = 40Wh @ PR316 1 2 0_0402_5% 4 ISL88739AHRZ-T_QFN32_4X4 21 LG_CHG 2 3
4.7_1206_5%
Ipsys = 1.14 x (45+40) = 96.9uA EC_SMB_CK1 SCL LGATE
1
PQ306
EMI@ PR320
VDDP_CHG
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
R_Psys = 1.2V / 96.9uA = 12.3K-ohm.
5
@ PR317 1 2 0_0402_5% 5 20
2
===================================== APU_PROCHOT# PROCHOT# VDDP

2 1K_0402_1% AMON_ISL95520 VDD_CHG
1
AON7506_DFN33-8-5
adapter wattage = 65W PR318 1 6 19 1 2
PC310
PC311
PC312
Battery wattage = 40Wh ADP_I AMON VDD
2
Ipsys = 1.14 x (65+40) = 119.7uA PR321 1 2 1K_0402_1% 7 18 PR319 4.7_0402_5%
2
BMON DCIN
1
R_Psys = 1.2V / 96.9uA = 10K-ohm. 4
BATGONE
Close to EC. 8 17 PC313 PC314
680P_0402_50V7K
NC NTC 1U_0402_10V6K 1U_0402_10V6K
**Design Notes**
EMI@ PC315
CCLIM
ACLIM
2
COMP
PROG
1
AGND
CSON
CSOP
PR323
FSET
@ PR322
For 45W/65W /90W system, 2S/3S/4S battery

0_0402_5%
1
1
100K_0402_1%
Maximum Charging current 3.5A
3
2
1
1
PC316 PC317
2
Maximum Battery discharge power 55W 0.1U_0402_25V6 0.1U_0402_25V6 PR324
33
10
11
12
13
14
15
16
#Register Setting 10_1206_5%
2
1 2
1. 0X3DH bit10 set 0 (default 1) to enable turbo boost function
2
2
Close to EC.
2. Disable turbo when AC only
2
VF = 0.38V
FSET_CHG
1U_0603_25V6
#Circuit Design 3 PR326
PC318
+19V_VIN
1
1. ACLIM and CCLIM are devider voltage control. 1 0_0603_5%
1
PR325 2 1 2
2. Use 7X7 choke and 3X3 H/L side MOSFET +17.4V_BATT
VDD_CHG 10K_0402_1%
Charge current 3A VDD=5V PD301 @ PR327
Power loss : 1.79W (H/S=0.227W,L/S=1.2738W,Choke=0.297W) S SCH DIO BAS40CW SOT-323 0_0603_5%
2
Power density : 0.61 (23X16) 1 2

CCLIM_CHG BA
#Protect function
200K_0402_1%
200K_0402_1%
ACLIM_CHG
1
1. ACOVP : VCC voltage > 24V PR330

2. SMBus timeout : 0X3DH bit15 set 0 (default 0) to enable 175s(default). 2_0402_5%
PR328
PR329
PROG_CHG CSOP_CHG 1 2 CSOP_CHG_R

3. ACOC : OX3CH bit4 set1 release adapter limit function (default:Enable).
4. CHGOCP : based on charge current setting COMP_CHG PC319
2
3
5. BATOVP : 4.6V/Cell 0.1U_0402_25V6
@ PR331
6. BATLOWV : No. PR333=0 ohm, Fs=500KHZ ~ +/- 15% @ PQ309
1
7. TSHUT : 150C 76.8K_0402_1% @ PR334 LMUN5113T1G_SOT323-3

100_0402_1%
2
B B
1 2 0_0402_5% 2
PR332
CSON_CHG 1 2 CSON_CHG_R
1
@ PQ316 OCCP setting
2
1
D
Battery current limimed by CCLIm ~ 3.89A.
1
ACIN 2
4 cell@ PR335
Adapter current limimed by ACLIm ~ 4.33A.

0_0402_5%
232K_0402_1%
100K_0402_1%
150K_0402_1%
1
G SLP_S5#
PR333
(PR779 and PQ741 are for change ACLIm when AC in)

1
BATT_TEMP 2
135W@ PR336
PR337
S
3
560P_0402_50V7K
0.015U_0402_25V7K
(Rs1 = 10mΩ and Rs2 = 5mΩ o r Rs 1 = 20m Ω a nd R s2 = 10mΩ)

. L2N7002WT1G_SC70-3 BATGONE(BATT_TEMP)
1
CC_LIM = VccLIM / 64 x Rs2 logic high: above 2.4V

PC321
2
@ PQ313
PC320
============================================================= logic low: under 0.8V
BA
(Rs1 = 10mΩ and Rs2 = 10mΩ o r Rs 1 = 20m Ω a nd R s2 = 20mΩ). LTC015EUBFS8TL_UMT3F
2
3
CC_LIM = VccLIM / 32 x Rs2 65W@ PR336 @
============================================================= 80.6K_0402_1%
AC_LIM = Vac_LIM / 32 x Rs1 BA
+3VS
Hybrid boost power mode

45W@ PR336 Cell = 4s
57.6K_0402_1%
ICClimit : 7.73A
Delta I : 1.44A
1C charge current :6.48A
For 4S per cell 4.35V battery

1
ACIN_CHG @ PR343 @ PR342

10K_0402_1% 10K_0402_1%
2
2
1
PR339
2M_0402_1% APU_PROCHOT#_D
2 2
@ PQ315A
6
@ PR341 D 2N7002KDW_SOT363-6
0_0402_5% 2
G
1
S
1
@ PQ314
1
APU_PROCHOT# 2 RUM001L02_VMT3
A PQ307 A
PR340 LTC015EUBFS8TL_UMT3F
100K_0402_1%
1 2 2
BATT_4S
3
3
1
D
2 PQ308
SUSP# G L2N7002WT1G_SC70-3
S @ PQ315B
3
D 2N7002KDW_SOT363-6
ACIN 5
G
S
4
Issued Date 2017/12/25 2019/12/25 Title

Deciphered Date
PWR_CHARGER
Size Document Number Re v
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5 4 3 2 1
A B C D E
+3VLP
PC401
1U_0402_10V6K
1 2
1
Output capacitor ESR need follow 1
@ PC402 @ PC403
100P_0402_50V8J 100P_0402_50V8J
below equation to make sure feed back
1 2 1 2 loop stability
ESR=20mV*L*fsw/2V
PR402 PR401
13.7K_0402_1% 30.9K_0402_1%
1 2 1 2
VFB=2V VFB=2V
PR403 PR404
20K_0402_1% 20K_0402_1% +19VB_5V
1 2 1 2 +19VB @ PJ401
JUMP_43X79
1 2
1 2
PR405 PR406
105K_0402_1% 140K_0402_1%
@ PJ402 1 2 1 2
2200P_0402_50V7K
10U_0805_25V6K
10U_0805_25V6K
0.1U_0402_25V6
+19VB JUMP_43X79
1
1 2 +19VB_3V
EMI@ PC404
@EMI@ PC405
PC406
PC422
1 2
CS2_3V
CS1_5V
+3VLP
FB_3V
FB_5V
POK need pull high, it
2
2200P_0402_50V7K
10U_0805_25V6K
10U_0805_25V6K
0.1U_0402_25V6
will pull high on VS

transfer circuit
1
1
EMI@ PC407
@EMI@ PC408
PC409
PC421
PU401
21
5
1
RT6575DGQW(2)_WQFN20_3X3
2
PR407
CS2
FB2
LDO3
FB1
CS1
GND
100K_0402_1%
2 2
1
6 20 5V_EN
3V_EN EN2 EN1
7 19
SPOK PGOOD VCLK PQ401
4
4
EMB09A03VP_EDFN3X3-8-10
LX_3V 8 18 LX_5V
D1
D1
D1
G1
G1
D1
D1
D1
PL402 PC410 PR408 PHASE2 PHASE1 PR409 PC411 PL401
3.3UH_6.3A_20%_7X7X3_M 0.1U_0402_25V6 2.2_0603_5% 2.2_0603_5% 0.1U_0402_25V6 3.3UH_VMPI1004AR-3R3M-Z01_11A_20%
2 1 LX_3V 10 9 1 2BST_3V_R
1 2BST_3V 9 17 BST_5V 1 2BST_5V_R 1 2 9 10 LX_5V 1 2 +5VALWP
+3VALWP D1 D2/S1 BOOT2 BOOT1 D2/S1 D1
@EMI@ PR410
UG_3V 10 16 UG_5V
4.7_1206_5%
4.7_1206_5%
G2
G2
S2
S2
S2
S2
S2
S2
UGATE2 UGATE1
@EMI@ PR411
LGATE2
LGATE1
PQ402
220U_6.3V_ESR18M_6.3X4.5
5
5
LDO5
BYP1
EMB09A03VP_EDFN3X3-8-10
220U_6.3V_ESR18M_6.3X4.5
VIN
1 1
2
2
+ +
PC413
PC414
11
VIN_3/5V 12
13
14
15
PC416
PC417
680P_0402_50V7K
680P_0402_50V7K
1
1
2 LG_3V LG_5V 2
PR412
+5VALWP
@EMI@
@EMI@
2.2_1206_1%
2
2
+19VB 1 2
+5VLP
1U_0603_25V6K
1
1
@ PC418
PC419
1U_0402_10V6K
2
3 3
PR413
2.2K_0402_5% @ PJ403
1 2 +3VALWP 1 2 +3VALW
EC_ON 3V Dual Mos AON7934 5V Dual Mos AON7934 1 2
JUMP_43X118
H/S (Q1) Rds(on) :typ:12.4mOhm, max:15.8mOhm H/S (Q1) Rds(on) :typ:12.4mOhm, max:15.8mOhm
@
PR414
0_0402_5% Idsm(TA=25)=13A, Idsm(TA=70)=7.8A Idsm(TA=25)=13A, Idsm(TA=70)=7.8A @ PJ404
1 2 +5VALWP 1 2 +5VALW
MAINPWON L/S (Q2) Rds(on) :typ:9.1mOhm, max:11.6mOhm L/S (Q2) Rds(on) :typ:9.1mOhm, max:11.6mOhm
1 2
JUMP_43X118
5V_EN Idsm(TA=25)=15A(Typ), Idsm(TA=70)=9A(Typ) Idsm(TA=25)=15A(Typ), Idsm(TA=70)=9A(Typ)
1M_0402_1%
Choke: 7x7x3 Choke: 10x10x3

4.7U_0402_6.3V6M
1
Rdc= 18mohm(Typ), 22mohm(Max) Rdc= 14.5mohm(Typ), 16mohm(Max)

1
PR415
PC420
Switching Frequency: 355kHz Switching Frequency: 300kHz

2
Ipeak=9.4A Ipeak=12A
2
Iocp~11.3A Iocp~15A
OVP: 113% OVP: 113%
1. Vout1=2V*(1+30.9k/20k)=5.09V; Vout2=2V*(1+13.7k/20k)= 3.37V

2. 5V current limit = (140K*10uA/8/11.6mohm)= 15A
3. 3.3V current limit = (105K*10uA/8/11.6mohm) =11.3A
4 4

+3VALW/+5VALW
Custom 1.B
A B C D E
5 4 3 2 1
0.6Volt +/- 5%
TDC 0.7A
@ PJ504
D 1 2 +19VB_1.5V PR501 Peak Current 1A D
+19VB 1 2 2.2_0603_5%
BST_1.5V_R BST_1.5V
2200P_0402_50V7K
10U_0805_25V6K
10U_0805_25V6K
JUMP_43X79 1 2
+1.2VP
0.1U_0402_25V6
0.1U_0402_25V6
1
1
EMI@ PC525
@EMI@ PC501
EMI@ PC502
PC503
PC504
UG_1.5V +0.6VSP
0.1U_0603_25V7K
2
2
LX_1.5V
10U_0603_6.3V6M
10U_0603_6.3V6M
5
1
PC505
AON7408L_DFN8-5
PC506
PC507
16
17
18
19
20
2
PU501
2
BOOT
VTT
PHASE
UGATE
VLDOIN
4 21
PAD
PQ501
LG_1.5V 15 1
LGATE VTTGND
1
2
3
14 2
PL503 PR502 PGND VTTSNS
1UH_6.6A_20%_5X5X3_M 24.9K_0402_1%
1 2 1 2 CS_1.5V 13 3
+1.2VP PC508 CS RT8207PGQW_WQFN20_3X3 GND
1
1U_0402_10V6K
VTTREF_1.5V
AON7506_DFN3X3-8-5
1 2 12 4
VDDP VTTREF
5
@EMI@ PR503 PR504
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
4.7_1206_5% 5.1_0603_5%
1
1 2 VDD_1.5V 11 5
+5VALW +1.2VP
1 2
VDD VDDQ
1
PC511
PC512
PC513
PC514
PC515
PC516
PGOOD
PC510 2 1 PC509
TON
2
PQ502
C @EMI@ PC517 4 1U_0402_10V6K 0.033U_0402_16V7K C
FB
S5
S3
2
2
680P_0402_50V7K 2 1 @ PD501
2
RB751V-40_SOD323-2
10
6
PR505
2.2_0603_5%
1
2
3
EN_0.75VSP
FB_1.5V
TON_1.5V
1
EN_1.5V
PR506
6.19K_0402_1%
+5VALW PR507 1 2 +1.2VP
470K_0402_1%
+19VB_1.5V 1 2
H/S AON7408 Rds(on) :typ:27mOhm, max:34mOhm
1
Mode Level +0.6VSP VTTREF_1.2V Idsm(TA=25)=7.5A, Idsm(TA=70)=5.5A
S5 L off off
@
PR509 PR508 0.75*(1+6.19/10)=1.21
S3 L off on L/S AON7506 Rds(on) :typ:13mOhm, max:15.8mOhm 0_0402_5% 10K_0402_1%
S0 H on on Idsm(TA=25)=12A, Idsm(TA=70)=10.5A SYSON
1 2
2
Note: S3 - sleep ; S5 - power off
1
Choke: 5x5x3 @ PC518
Rdc=13mohm(Typ), 14mohm(Max) 0.1U_0402_10V7K
2
Switching Frequency: 530kHz
@
Ipeak=9.5A PR510
0_0402_5%
Iocp~11.4A 1 2 @ PJ501
OVP: 110%~120% SUSP# 1 2
+1.2VP 1 2 +1.2V
1
JUMP_43X118
@ PC519
+5VALW 0.1U_0402_10V7K
2
B B
+3VALW
Due to buyer command. @ PJ502
1 2
PC508,PC510 need change to SE00000QL10. +0.6VSP 1 2 +0.6VS
@ PJ505 Because 0603 change to 0402, PVT need change footprint. JUMP_43X39
1
1 2 VIN_2.5V PC524
1 2
1
JUMP_43X39 1U_0402_6.3V6K
2
PC521
2
4.7U_0402_6.3V6M @ PJ503
1 2
+2.5VP 1 2 +2.5V
JUMP_43X39
PU502 G9661MF11U_SO8
@
PR515 4 5
0_0402_5% 3 VDD NC 6
SYSON 1 2 EN_2.5V 2 VIN VOUT 7 +2.5VP
GND
EN ADJ 8
22U_0603_6.3V6M
0.01U_0402_25V7K
1
PGOOD GND
1
0.1U_0402_16V7K
PC522
PR512
9
1
1
PC520
PC523
PR511
21.5K_0402_1%
Rup
2
1M_0402_5%
2
2
2
@ FB_2.5V
1
PR513
10K_0402_1%
Rdown
2
A A
Vout=0.8V* (1+(21.5/10)) = 2.52V 0.8%

+1.5VP/+0.75VSP
Custom 1.B
5 4 3 2 1
5 4 3 2 1
D D
@ PJ601
+0.9VALWP 1 2
1 2 +0.9VALW
JUMP_43X118
EN pin don't floating

If have pull down resistor at HW side, pls delete PR2
LDO_VDDP +19VB @ PJ604 PU601

1 2 +19VB_VDDP 2 9 @ PR603 PC602 @EMI@ PR602 @EMI@ PC603
1 2 IN PG 0_0603_5% 0.1U_0603_25V7K 4.7_1206_5% 680P_0402_50V7K
1
3 1 BST_VDDP 1 2 1 2 1 2SNB_VDDP 1 2
0.1U_0402_25V6
0.1U_0402_25V6
10U_0805_25V6K
10U_0805_25V6K
2200P_0402_50V7K
JUMP_43X79 IN BS
1
EMI@ PC623
@EMI@ PC604
@ PR604 4 6
EMI@ PC601
IN LX
0_0402_5%
2
5 19 PL602
PC605
PC622
2
ILMT_VDDP IN LX 1UH_6.6A_20%_5X5X3_M
LX_VDDP
7
GND LX
20 1 2
+0.9VALWP
1
8 14 FB_VDDP
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
@ PR605 GND FB
330P_0402_50V7K
1
@ PR601 18 17 LDO_VDDP
0_0402_5% GND VCC
1
0_0402_5%
PC606
PC607
PC608
PC609
PC610
PC611
2
1
0.9_1.8VALW_PWREN 1 2 11 10 PC612 PR610
PC613
2
EN NC 2.2U_0402_6.3V6M 10_0402_1%
ILMT_VDDP 13 12
2
ILMT NC
2
1
15 16
PR607
1
@ PC614 +3VALW BYP NC
1M_0402_1% 0.22U_0402_10V6K 21 PR606
PAD
1
13.7K_0402_1% 1 2
2
PC615 SY8288RAC_QFN20_3X3 1 2 VR_ON

2
1U_0402_6.3V6K @ PR623
2
0_0402_5%
C FB = 0.6V
(R1) C
1 2 1 3
APU_VDDP_SEN_H
1
@ PR622
PR609 0_0402_5% @ PQ601
(R2) 24.3K_0402_1% LSK3541G1ET2L_VMT3
2
1 2
APU_VDDP_SEN_L
@ PR621
0_0402_5%
VFB=0.6V
Vout=0.6V*(1+R1/R2)=0.9V
@
PR611
0_0402_5%
1 2
0.9_1.8VALW_PWREN
FB=0.6V
0.1U_0402_16V7K
1
1
PR612
Note:Iload(max)=3.5A 1M_0402_5%
PC616
Note:Iload(max)=2.5A
2
PU602 @
9
1 PGND 8
FB SGND
B B
2 7 PL603
@ PJ602 PG EN 1UH_2.8A_30%_4X4X2_F
+3VALW 1 2IN_1.8VALW 3 6 LX_1.8VALW 1 2
1 2 IN LX +1.8VALWP
4 5
68P_0402_50V8J
JUMP_43X79 PGND NC
1
@ PJ603
@EMI@ PR613
4.7_0603_5%
+1.8VALWP
1
1 2
PC618
22U_0603_6.3V6M
22U_0603_6.3V6M
1 2 +1.8VALW
1
SY8003ADFC_DFN8_2X2 PR614
PC617 20K_0402_1%
Rup
PC619
PC620
2
22U_0603_6.3V6M JUMP_43X79
2
FB_1.8VALW
1
680P_0402_50V7K
FB=0.6V
@EMI@ PC621
1
Note:Iload(max)=3A PR615
Rdown
10K_0402_1%
2
Note:
When design Vin=5V, please stuff snubber Vout=0.6V* (1+Rup/Rdown)
to prevent Vin damage
A A

+0.95VALW/+1.8VALW
C 1.B
5 4 3 2 1
5 4 3 2 1
Module model information

RT8880C_CZ35W_V2A.mdd for IC portion
APU_VSS_SEN_L APU_CORE_SEN_H RT8880C_CZ35W_V2B.mdd for SW portion +19VB_CPU

+5VS +5VS +19VB_CPU
PR817 EMI@ PL801
ISEN3N_CPU
ISEN3P_CPU
1
0_0603_5% NA_2P
UG2_CPU 1 2 UG2_CPU_R 1 2
PR801 PR802 PC802 +19VB
10_0402_5% 10_0402_5% 0.01U_0402_50V7K CORE SW= 430KHz
2
1 2 1 2 EMI@ PL802
+APU_CORE
10U_0805_25V6K
10U_0805_25V6K
0.1U_0402_25V6
33U_25V_NC_6.3X4.5
33U_25V_NC_6.3X4.5
NA_2P
@EMI@ PC821
@EMI@ PC822
1 1
2200P_0402_50V7K
1 2
1
+ +
15W_CPU@ PR844
35W_CPU@ PR843
35W_CPU@ PR845
15W_CPU@ PR846
PC819
PC818
PC820
PC834
15W_CPU@ PR806
88.7K_0402_1%
2
2
80.6K_0402_1%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
2
2 2
PR807
D D
2
LL CORE(Rdroop)=2.079m
1 2
G1
D1
1
1
PR820 PC824
@ PC801 2.2_0603_5% 0.22U_0603_25V7K
BST2_CPU1 2 BST2_CPU_R1 2 7
330P_0402_50V7K PQ802
PR805 35W_CPU@ PR806 D2/S1 AON6962_DFN5X6D-8-7
10K_0402_1% 34.8K_0402_1% PL804
1 2 1 2 2 1 0.22UH_24A_20%_ 7X7X4_M
G2
S2
S2
S2
+5VS LX2_CPU 1 4
15W_CPU@ PR848 +APU_CORE APU_core
3
ISEN2P_CPU_R2 3
PC807 PC808 0_0402_5%
@EMI@ PR824
4.7_1206_5%
PWM3_CPU
270P_0402_50V7K 68P_0402_50V8J 2 1 TDC 35A (15W & 25W), 53A (35W)
1
1 2 1 2 PR826
35W_CPU@ PR847
LG2_CPU
2.7K_0402_1%
EDC 45A (15W & 25W), 70A (35W)
0_0402_5% 1 2 1 2 OCP current 63A (15W & 25W), 98A (35W)
PC825 Load line -2.1mV/A
680P_0402_50V7K
1 2
SNB_APU
0.1U_0402_25V6 FSW=430kHz
@EMI@ PC826
ISEN3N_CPU_IC
ISEN3P_CPU_IC
PWM3_CPU_IC
TONSET_CPU
ISEN1N_CPU
ISEN2N_CPU
DCR 0.98mohm +/-5%
ISEN1P_CPU
ISEN2P_CPU
COMP_CPU
BST2_CPU
UG2_CPU
TYP MAX
FB_CPU
2
H/S Rds(on) :11.7mohm , 14mohm
L/S Rds(on) :2.7mohm , 3.3mohm
PU801
Iocp_spikea = (3.19375 - 0.64)* PR755/ (2*DCR*Rimona)
13
12
11
10
1
RT3663BCGQW_WQFN52_6X6
ISEN2N_CPU_R
ISEN2P_CPU
TONSET
PWM3
BOOT2
UGATE2
Iocp_TDCA has relation between ocp_spikea and Δ VSET1
VSEN
ISEN3N
ISEN1N
ISEN2N
COMP
FB
ISEN3P
ISEN1P
ISEN2P
+5VALW
53 PR811
Δ VSET1 = +5VS*( PR788//PR784 ) GND 2.2_0402_5% PR830
14 52 LX2_CPU PVCC_CPU 1 2 1.1K_0402_1%
RGND PHASE2 ISEN2N_CPU 1 2
IMON_CPU 15 51 LG2_CPU
0.1U_0402_25V6
IMON LGATE2 VCC_CPU 1 2
PC832
VREF_CPU 16 PVCC_CPU
1
+1.8VS 50
V064/SET3 PVCC PR812
2.2U_0603_10V6K
2.2U_0603_10V6K
IMONA_CPU17 LG1_CPU
1
PC813 49 10_0603_5% @
PC814
PC815
2
1U_0402_6.3V6K IMONA LGATE1
SVD_CPU and SVC_CPURC filter put CPU side. 1 2 18 48 LX1_CPU
SVT_CPU RC filter put controller side.
2
VDDIO PHASE1
19 47 UG1_CPU
15W_CPU@
APU_PWROK PWROK UGATE1
PR816
APU_SVC 20 46 BST1_CPU
16.5K_0402_1% APU_SVC
C SVC BOOT1 C
APU_SVD LG1_NB +19VB_CPU
@
PR815 21 45 PR838
APU_SVD SVD LGATEA1
0_0402_5% 0_0603_5% 35W_CPU@
1 2 APU_SVT 22 44 LX1_NB UG1_CPU 1 2 UG1_CPU_R
APU_SVT_R PR853
SVT PHASEA1 0_0603_5% +19VB_CPU
23 43 UG1_NB UG3_CPU 1 2 UG3_CPU_R
10U_0805_25V6K
10U_0805_25V6K
0.1U_0402_25V6
15W_CPU@ OFS UGATEA1
@EMI@ PC809
@EMI@ PC810
2200P_0402_50V7K
BST1_NB
2
PR821 35W_CPU@ 24 42 35W_CPU@ 35W_CPU@
35W_CPU@ PC847
35W_CPU@ PC848
10U_0805_25V6K
10U_0805_25V6K
0.1U_0402_25V6
2200P_0402_50V7K
OFSA BOOTA1
1
8.66K_0402_1% PR816 PR818 PR860 PC846
PC839
PC840
@EMI@ PC816
@EMI@ PC817
SET1_CPU 25 41
7.87K_0402_1% 25.5K_0402_1% +5VS PR819 2.2_0603_5% 0.22U_0603_25V7K
SET1 PWMA2 2 BST3_CPU_R 1
1
100K_0402_1% 1 2
2
SET2_CPU 26 +19VB_CPU
2
40 1 2
BST3_CPU
1
SET2 TONSETA
PGOODA
ISENA2N
ISENA1N
ISENA2P
ISENA1P
G1
D1
2
PGOOD
COMPA
35W_CPU@ PR839 PC841 PL805 35W_CPU@ 35W_CPU@ PQ805
VSENA
OCP_L
2
IBIAS
PR821 PR822 2.2_0603_5% 0.22U_0603_25V7K 0.22UH_24A_20%_ 7X7X4_M PU802 AON6962_DFN5X6D-8-7

VCC
FBA
BST1_CPU1 2 BST1_CPU_R
1 2 7 1 4
EN
15W_CPU@ 12.1K_0402_1% 5.9K_0402_1% PQ804
G1
D1
D2/S1 +APU_CORE
PR825 1 2 1 2 AON6962_DFN5X6D-8-7 4 3 35W_CPU@ PL806
ISEN1P_CPU_R BOOT UGATE
100K_0402_1%_B25/50 4250K
17.8K_0402_1% 2 3 0.22UH_24A_20%_ 7X7X4_M
@EMI@ PR840
4.7_1206_5%
27
28
1 IBIAS_CPU 29
COMPA_CPU 30
31
32
33
34
35
36
37
38
39
PWM3_CPU LX3_CPU
100K_0402_1%_B25/50 4250K
Confirm HW side the pull high resistor 5 2 7 1 4
G2
S2
S2
S2
LX1_CPU
1
1
PR841 PWM PHASE D2/S1
@EMI@ PR855
VGATE ISEN3P_CPU_R +APU_CORE
VCC_CPU
ISENA1N_CPU
ISENA1P_CPU
35W_CPU@ PR823 2.7K_0402_1% 1 6 2 3
PH801
PH802
4.7_1206_5%
6
3
FBA_CPU
PR825 20.5K_0402_1% 1 2 1 2 EN PGND 35W_CPU@
G2
S2
S2
S2
LG3_CPU
1
PR859 14.3K_0402_1% 8 7 PR856
APU_PROCHOT# +5VS VCC LGATE
43K_0402_1% 1 2 PC842 9 2.7K_0402_1%
680P_0402_50V7K
+3VS
2
1 2
3
VCC_CPU 1 2 VREF_CPU LG1_CPU SNB_APU2 GND 1 2 1 2
0.1U_0402_25V6
PC843
Pull high at HW side
2
PR828 35W_CPU@ RT9610CGQW_WDFN8_2X2
100K_0402_1%
48.7K_0402_1%
2
1 +5VS 100K_0402_5% PC845 35W_CPU@
680P_0402_50V7K
1 2
SNB_APU3
0.47U_0402_6.3V6K
0.47U_0402_6.3V6K
VR_ON 1U_0603_10V6K PC850

PR858
PR827
PC849
2
1
1
PC852 0.1U_0402_25V6
@EMI@
PC827
PC828
2
0.022U_0402_25V7K EN: high > 2V, Low < 0.8V
Can't be floating.
1
2
@ @
@EMI@
0.1U_0402_25V6
1
ISEN1N_CPU_R
1
PC829 PC830 @ PR829
PC831
270P_0402_50V7K ISEN1P_CPU
68P_0402_50V8J 10K_0402_5%
PC852靠
IC Pin16 1 2 1 2
ISEN3N_CPU_R
2
@
2
ISEN3P_CPU
Iocp_spike = (3.19375 - 0.64)* PR709/ (DCR*Rimon) PR842
PR831 PR832 1.1K_0402_1%
ISEN1N_CPU 1 2
97.6K_0402_1% 10K_0402_1%
Iocp_TDC has relation between ocp_spike and Δ VSET1 1 2 1 2 35W_CPU@ PR857
@ PC833 1.1K_0402_1%
0.1U_0402_25V6
ISEN3N_CPU
1
330P_0402_50V7K 1 2
PC844
Δ VSET1 = +5VS*( PR788//PR784 ) 1 2
B B
0.1U_0402_25V6
2
1
@
@35W_CPU@ PC851
2
LL_SOC(Rdroop)=3.992m
APU_VSS_SEN_L
+19VB_CPU
PR803
0_0603_5%
UG1_NB 1 2UG1_NB_R
10U_0805_25V6K
10U_0805_25V6K
1
1
PR833
PC803
PC804
10_0402_5%
1 2
SET1_CPU
+APU_CORE_SOC
2
1
2
PR834 PR835
8.2K_0402_1% 124K_0402_1% PC838
G1
D1
1 2 1 2 0.01U_0402_50V7K PR804 PC805 PQ801 PL803 +APU_CORE_SOC
2
2.2_0603_5% 0.22U_0603_25V7K AON6962_DFN5X6D-8-7 0.22UH_24A_20%_ 7X7X4_M

BST1_NB 2 BST1_NB1_R
PR836 PR837 VCC_CPU
1 1 2 7
D2/S1
1 4
+APU_CORE_SOC TDC 10A (15W & 25W &35W)
470_0402_1% 33K_0402_1%
APU_CORESOC_SEN_H
1 2 1 2 ISENA1P_CPU_R 2 3 EDC 13A (15W & 25W &35W)
1
PR809 OCP current 18.2A (15W & 25W &35W)
G2
PC811 @EMI@ PR808

S2
S2
S2
680P_0402_50V7K 4.7_1206_5%
LX1_NB
2.7K_0402_1%
Load line -4mV/A
SET2_CPU
1 2 1 2
3
PC806
FSW=400kHz
DCR 0.98mohm +/-5%
2
0.1U_0402_25V6
LG1_NB SNB_APU_NB
TYP MAX
1
2
@EMI@
ISENA1N_CPU-1
ISENA1P_CPU
ISENA1N_CPU 1 2
A A
PR810
0.1U_0402_25V6
1
845_0402_1%
PC812
2
@

RT8880CGQW
5 4 3 2 1
A
B
C
D
2
1
+
PC9095
330U_D2_2V_Y PC9048 PC9029 PC9001
22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
2
1
+
2 1 2 1 2 1 2 1 2 1
PC9096
near CPU
330U_D2_2V_Y PC9081 PC9056 PC9052 PC9030 PC9002
180P_0402_50V8J 0.22U_0402_16V7K 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
2
1
+
2 1 2 1 2 1 2 1
+APU_CORE
PC9097
5
5
+APU_CORE
330U_D2_2V_Y PC9057 PC9046 PC9031 PC9003

0.22U_0402_16V7K 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
2
1
+
2 1 2 1 2 1 2 1
PC9098
330U_D2_2V_Y PC9058 PC9050 PC9032 PC9004
0.22U_0402_16V7K 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
2
1
+
2 1 2 1 2 1 2 1
CPU
@
PC9094
330U_D2_2V_Y PC9059 PC9051 PC9033 PC9005
0.22U_0402_16V7K 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
2 1 2 1 2 1 2 1
PC9060 PC9047 PC9034 PC9006
back
0.22U_0402_16V7K 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
2 1 2 1 2 1 2 1
PC9061 PC9049 PC9035 PC9007

0.22U_0402_16V7K 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
2 1 2 1 2 1 2 1
side
PC9062 PC9036 PC9008
330u is common part SGA00009S00

0.22U_0402_16V7K 22U_0603_6.3V6M 22U_0603_6.3V6M
2 1 2 1 2 1
+APU_CORE
PC9063 PC9037 PC9009
180pF*1
22uF*27
330uF*5
0.22uF*8
0.22U_0402_16V7K 22U_0603_6.3V6M 22U_0603_6.3V6M
2 1 2 1
APU_CORE
PC9038 PC9010
22U_0603_6.3V6M 22U_0603_6.3V6M
2 1 2 1
4
4
Issued Date
Security Classification
3
3
2017/12/25
2
1
+
PC9099 PC9039 PC9011

330U_D2_2V_Y 22U_0603_6.3V6M 22U_0603_6.3V6M
2 1 2 1
2
1
+
2 1 2 1
PC9100 PC9040 PC9012
near CPU
330U_D2_2V_Y PC9082 PC9064 22U_0603_6.3V6M 22U_0603_6.3V6M

180P_0402_50V8J 0.22U_0402_16V7K 2 1 2 1
2 1
PC9041 PC9013
PC9065 22U_0603_6.3V6M 22U_0603_6.3V6M
0.22U_0402_16V7K 2 1 2 1
2 1
PC9042 PC9014
Compal Secret Data

+APU_CORE_SOC
PC9066 22U_0603_6.3V6M 22U_0603_6.3V6M
Deciphered Date
0.22U_0402_16V7K 2 1 2 1
2 1
PC9043 PC9015
PC9067 22U_0603_6.3V6M 22U_0603_6.3V6M
180pF*1
22uF*18
330uF*2
2 1 2 1
0.22uF*8
0.22U_0402_16V7K
2 1
PC9044 PC9016
PC9068 22U_0603_6.3V6M 22U_0603_6.3V6M
0.22U_0402_16V7K 2 1 2 1
2
2
2 1
PC9045 PC9017
2019/12/25
PC9069 22U_0603_6.3V6M 22U_0603_6.3V6M

APU_CORE_SOC
0.22U_0402_16V7K 2 1 2 1
2 1
PC9053 PC9018
PC9070 22U_0603_6.3V6M 22U_0603_6.3V6M
2 1 2 1
330u is common part SGA00009S00
0.22U_0402_16V7K
2 1
PC9019
PC9071 22U_0603_6.3V6M
0.22U_0402_16V7K 2 1
PC9020
Title
Date:
+APU_CORE_SOC
22U_0603_6.3V6M
2 1
Custom
Size Document Number
Monday, December 25, 2017

1
1
Sheet
43
DH5AV_JV_0V_LA-G021P
+APU_CORE Cap
Compal Electronics, Inc.
of
48
Rev
1.B
A
B
C
D
5 4 3 2 1
EN pin don't floating Module model information

If have pull down resistor at HW side, pls delete PR2
SY8208D_V1.mdd
D D
VGA@
+19VB @ PJ1001 PU1001
1 2 +19VB_1.35V 2 9 @VGA@ PR1001 VGA@ PC1003 VGA_EMI@ PR1002 VGA_EMI@ PC1004
1 2 IN PG 0_0603_5% 0.1U_0603_25V7K 4.7_1206_5% 680P_0402_50V7K
VGA_EMI@ PC1017
@VGA_EMI@ PC1005
3 1 BST_1.35V 1 2 1 2 1 2SNUB_1.35V 1 2
VGA_EMI@ PC1001
2200P_0402_50V7K
JUMP_43X79 IN BS
1
VGA@ PC1006
VGA@ PC1002
10U_0805_25V6K
10U_0805_25V6K
0.1U_0402_25V6
0.1U_0402_25V6
4 6
IN LX
chock 7*7*1.8
2
5 19 VGA@ PL1002
IN LX 0.68UH_PCMB061H-R68MS_9A_20%
LX_1.35V
7
GND LX
20
FB_1.35V
1 2
+1.35VSDGPUP
8 14
330P_0402_50V7K
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
GND FB
VGA@ PC1014
VGA@ PC1007
VGA@ PC1008
VGA@ PC1009
VGA@ PC1010
VGA@ PC1011
VGA@ PC1012
1
1
@VGA@ PR1004 18 17 LDO_3V_1.35
0_0402_5% GND VCC 60W_VGA@ PR1006
(R1)
LDO_3V_1.35
1
1 2 1.35V_EN 11 10 VGA@ PC1013 15.4K_0402_1% 25W_40W_50W_VGA@
2
EN NC
1
DGPU_PWROK 2.2U_0402_6.3V6M PR1006
C ILMT_1.35V 13 12 12.7K_0402_1% C
2
ILMT NC
1
2
1
15 16
+3VALW
2
BYP NC
1
@VGA@ PR1003 VGA@ PR1007 @VGA@
0_0402_5% 1M_0402_1% PC1015 21
PAD
1
0.22U_0402_16V7K
2
2
ILMT_1.35V VGA@ PC1016 SY8288RAC_QFN20_3X3
2
1U_0402_6.3V6K
2
1
FB = 0.6V
@VGA@ PR1005 @ PJ1002
0_0402_5% +1.35VSDGPUP 1 2 +1.35VSDGPU
1 2
2
1
JUMP_43X118
VGA@ PR1009
10K_0402_1%
(R2)
2
VFB=0.6V
B B
Vout=0.6V*(1+R1/R2)=1.362V
A A

+GFX_CORE
Custom 1.B
5 4 3 2 1
5 4 3 2 1
GPU_B+ GPU_B+
VGA@ PC1401 VGA@ PR1405 @ PJ1401
330P_0402_50V7K 2K_0402_1% 1 2
1 2 +19VB
2 1 2 1
GPU_VDDCI_SEN JUMP_43X79
2200P_0402_50V7K
VGA@ PR1407 VGA@ PR1408 VGA@ PC1409 @ PR1409
GPU_UGATE1
@EMI@ PC1432
VGA_EMI@ PC1433
10U_0805_25V6K
0.1U_0402_25V6
1K_0402_1% 37.4K_0402_1% 390P_0402_50V7K 32.4K_0402_1%
GPU_UGATE2
10U_0805_25V6K
1
1
2 1 2 1 2 1 2 1
VGA_EMI@ PC1420
VGA@ PC1435
VGA@ PC1431
2200P_0402_50V7K
0.1U_0402_25V6K
@EMI@ PC1419
10U_0805_25V6K
10U_0805_25V6K
VGA@ PC1417
VGA@ PC1418
2
1
1
VGA@ PR1401 @VGA@ PR1410 VGA@ PC1410 VGA@ PC1411
10_0402_1% 0_0402_5% 1000P_0402_50V7K 220P_0402_50V8J
2 1 1 2 2 1 2 1 2 1
+VDDCI
2
60W_VGA@ PL1403 60W_VGA@ PL1404
2
@ PC1412 VGA@ PR1411 0.22UH_MMD-06DZER22MEM2L__32A_20% 0.22UH_MMD-06DZER22MEM2L__32A_20%
G1
D1
VSUMP_NB
1000P_0402_50V7K 301_0402_1% VGA@ PR1444 VGA@ PC1441
G1
D1
1
VGA@ PR1425 VGA@ PC1425 2.2_0603_5% 0.22U_0603_25V7K VGA@ PQ1403

2 1 GPU_BOOT1 1 2 1 2 7
2.2_0603_5% 0.22U_0603_25V7K AON6962_DFN5X6D-8-7
VGA@ PR1412
(DCR:0.98± 5 %
)
2.61K_0402_1%
GPU_BOOT2 D2/S1
10K +-5% 0402 B25/50 4250K
1 2 1 2 7 VGA@ PQ1402
D D2/S1 AON6962_DFN5X6D-8-7 25W_40W_50W_VGA@
D
.047U_0402_16V7K
0.022U_0402_25V7K
2
PL1404
G2
VGA@ PR1413
VGA@ PC1413
VGA@ PC1414
S2
S2
S2
(DCR:0.98± 5 %
)
2
GPU_PHASE1
2
2
0.22UH_24A_20%_ 7X7X4_M
G2
S2
S2
S2
11K_0402_1%
25W_40W_50W_VGA@ 1 4
3
+VGA_CORE
1
PL1403
VGA@
PH1401
3
0.22UH_24A_20%_ 7X7X4_M VGA@ PR1438 2 3
1
FCCM_NB GPU_PHASE2 1 4
VGA@ PR1414 10K_0402_1%
GPU_ISEN11
+VGA_CORE GPU_LGATE1
1
1.4K_0402_1% @EMI@ PR1437 2
VSUMN_NB 2 1 2 3
VGA@ PR1420 4.7_1206_5%
1 2
1
10K_0402_1% VGA@ PR1442
GPU_ISEN21
1
@ PR1416 @ PC1423 25W_40W_50W_60W_VGA@ VGA@ PR1415 @EMI@ PR1419 2 3.65K_0603_1%
41.2K_0402_1% GPU_LGATE2 1 2
VGA@ PC1422 100_0402_1% 220P_0402_50V7K PR1417 10K_0402_1% 4.7_1206_5% VSUM+
1 2
2 1 2 1 2 1 GPU_LGATE3
0.1U_0603_25V7K VGA@ PR1423
2
3.65K_0603_1% @EMI@ PC1442 VGA@ PR1445
2
GPU_PHASE3 1 2
M260_VGA@ VSUM+ 680P_0402_50V7K 1_0402_1%
1 2
PR1466 0_0402_5% VSUM- 1 2
2
1 2 GPU_UGATE3
+5VALW Due to buyer command. @EMI@ PC1426 VGA@PR1426
After rev1.1 must change to 133k 680P_0402_50V7K 1_0402_1%
PC1428,PC1429 need change to SE00000QL10. VSUM- 1 2
2
Because 0603 change to 0402, PVT need change footprint.
48
47
46
45
44
43
42
41
40
39
38
37
2
PU1401
2
VGA@ PR1418
ISEN1_NB
ISUMP_NB
ISUMN_NB
VSEN_NB
FB_NB
COMP_NB
PGOOD_NB
FCCM_NB
PWM2_NB
LGATEX
PHASEX
UGATEX
133K_0402_1% VGA@ PC1424
1000P_0402_25V6K
1
1 36 GPU_BOOT3 GPU_B+
VGA@ PR1421 VGA@ PR1422 +5VALW @VGA@ PR1424
1
27.4K_0402_1% 12.7K_0402_1% ISEN2_NB BOOTX 0_0603_5%

2 1 2 1 2 35 2 1 GPU_B1+
NTC_NB VIN @ PJ1402
3 34 GPU_BOOT2 1 2
VGA@ PH1402 +19VB
IMON_NB BOOT2 1 2
1
470K_0402_5%_TSM0B474J4702RE
2200P_0402_50V7K
GPU_UGATE2
40W_50W_60W_VGA_EMI@
2 1 4 33 VGA@ PC1427 JUMP_43X79
@EMI@ PC1405
GPU_SVC SVC UGATE2
40W_50W_60W_VGA@
40W_50W_60W_VGA@
0.22U_0603_25V7K
10U_0805_25V6K
10U_0805_25V6K
0.1U_0402_25V6
2
5 32 GPU_PHASE2
GPU_UGATE3
GPU_PROCHOT#
1
VR_HOT_L PHASE2
PC1403
PC1404
PC1406
GPU_LGATE2
2
6 31 @VGA@ PR1428
GPU_SVD SVD LGATE2
S IC ISL6277AHRZ-T QFN 48P 0_0603_5%
2
VGA@ PR1427 7 30 2 1
+1.8VSDGPU VDDIO VDDP +5VALW
100K_0402_1%
8 29 2 1
GPU_SVT
1
@VGA@ PR1431 SVT VDD VGA@ PR1430

+3VS GPU_PWM3
10_0402_5%2 9 28
VGA_ON_B ENABLE
ENABLE PWM_Y
1_0603_5% 60W_VGA@ PL1405
0.22UH_MMD-06DZER22MEM2L__32A_20%
VGA_CORE
VGA@ PC1428
VGA@ PC1429
1U_0402_10V6K
1U_0402_10V6K
DGPU_PWROK 10 GPU_LGATE1
TDC 30A (25W), 47A (40W), 55A (50W), 60A (60W)
2
VGA@ PR1433 27
133K_0402_1% PWROK LGATE1 40W_50W_60W_VGA@ 40W_50W_60W_VGA@
EDC 45A (25W), 80A (40W), 105A (50W), 140A (60W)
G1
D1
1 2 11 26 GPU_PHASE1
PR1404 PC1407 40W_50W_60W_VGA@
2
IMON PHASE1
After rev1.1 must change to 133k GPU_UGATE1 GPU_BOOT3
2.2_0603_5% 0.22U_0603_25V7K PQ1401 OCP current 63A (25W), 120A (40W), 147A (50W), 200A (60W)
VGA@ PC1434 2 1 12 25 1 2 1 2 7 AON6962_DFN5X6D-8-7
NTC UGATE1 D2/S1 Load line -0.6mV/A
PGOOD
1000P_0402_25V6K VGA@ PR1434
BOOT1
(DCR:0.98± 5 %
)
ISUMN
ISUMP
COMP
ISEN3
ISEN2
ISEN1
VSEN
1 2 12.7K_0402_1% FSW=400kHz
RTN
FB2
40W_50W_VGA@
G2
FB
TP
C
S2
S2
S2
C
VGA@ PR1435 25W_VGA@PR1465
GPU_PHASE3
PL1405 DCR 0.98mohm +/-5%
0_0402_5%
27.4K_0402_1% 0.22UH_24A_20%_ 7X7X4_M TYP MAX
13
14
15
16
17
18
19
20
21
22
23
24
49
3
2 1 1 2 1 4
+5VALW
40W_50W_60W_VGA@ VGA@ PR1436 40W_50W_60W_VGA@ +VGA_CORE H/S Rds(on) :11.7mohm , 14mohm
GPU_ISEN3
GPU_ISEN2
GPU_ISEN1
VGA@ PH1403 PC1436 100K_0402_1% PR1460 2 3

1
470K_0402_5%_TSM0B474J4702RE 0.22U_0402_6.3V6K 1 2 @EMI@ PR1402 10K_0402_1%
GPU_BOOT1 +3VS GPU_LGATE3 GPU_ISEN3
2 1 2 1 4.7_1206_5% 1 2
40W_50W_60W_VGA@
VGA@ PC1437 DGPU_PWROK PR1461
0.22U_0402_6.3V6K 3.65K_0603_1%
1 2
2 1 VSUM+ 1 2
@EMI@ PC1408 40W_50W_60W_VGA@
VGA@ PC1438 680P_0402_50V7K PR1462
0.22U_0402_6.3V6K 1_0402_1%
2
2 1 VSUM- 1 2
VSUM+
1
VGA@ PC1439 VGA@ PR1440 VGA@ PC1440 @ PR1441

VGA@ PR1439
2.61K_0402_1%
10K +-5% 0402 B25/50 4250K
1000P_0402_25V6K 301_0402_1% 180P_0402_50V8J 32.4K_0402_1%

2 1 2 1 2 1 2 1
PC1443
330P_0402_50V7K
0.047U_0402_25V7K
VGA@ PR1443
VGA@ PC1446
2
25W_VGA@ GPU_VDDCI
11K_0402_1%
1 2
25W_VGA@ PR1446 VGA@ PR1447 VGA@ PC1445 @ PJ1403

VGA@ PH1404
PC1444 1K_0402_1% 137K_0402_1% 390P_0402_50V7K 1 2

1 2 +19VB
0.15U_0603_25V7K 2 1 2 1 2 1
VGA@
1
25W_40W_50W_60W_VGA@
25W_40W_50W_60W_VGA@
25W_VGA@ JUMP_43X79
25W_40W_50W_60W_VGA_EMI@
1
PR1448 +VDDCI
2200P_0402_50V7K
665_0402_1% VGA@ PR1449 VGA@ PC1447
10U_0805_25V6K
10U_0805_25V6K
0.1U_0402_25V6
2
VSUM- 2 1 2K_0402_1% 680P_0402_50V7K TDC 8A (25W & 40W & 50W & 60W)
1
2 1 2 1
@EMI@
PC1463
PC1462
PC1461
PC1460
EDC 12A (25W & 40W & 50W & 60W)
1
@ PR1450 @ PC1449 OCP current 18A (25W &50W)
2
VGA@ PC1448 100_0402_1%820P_0402_50V7K VGA@ PR1451
0.1U_0603_25V7K 2 1 2 1 10_0402_1% FSW=400kHz
2
+5VS
@VGA@ PR1452
2 1
+VGA_CORE DCR 0.98mohm +/-5%
0_0402_5% TYP MAX
5
1 2 GPU_VDDC_SEN 25W_40W_50W_60W_VGA@
PQ1404
1
25W_40W_50W_60W_VGA@ AON6380_DFN5X6-8-5
2
40W_50W_60W_VGA@ 40W_VGA@ 40W_VGA@ @VGA@ PR1453 PC1465 25W_40W_50W_60W_VGA@
0.01UF_0402_25V7K
PC1444 PR1448 PR1446 0_0402_5% 1U_0402_10V6K PC1466
2
1 2 GPU_VSS_SEN_L UGATE_NB1 4
0.22U_0603_25V7K 732_0402_1% 1.24K_0402_1% 0.22U_0603_16V7K
1 1
VGA@ PC1450
VGA@ PR1454
1
10_0402_1% 25W_40W_50W_60W_VGA@
2 1 25W_40W_50W_60W_VGA@ PR1464
3
2
1
PU1402 2.2_0603_5%
(DCR:7.3± 5 %
)
2
B
6 1 UGATE_NB1 B
chock 7*7*1.8
2
50W_VGA@ 50W_VGA@ VCC UGATE 25W_40W_50W_60W_VGA@
FCCM_NB 7 2 BOOT_NB1
PR1448 PR1446 PL1402
825_0402_1% 1.43K_0402_1% FCCM BOOT 0.47UH_PCMB061H-R47MS_11A_20%
GPU_PWM3 3 8 PHASE_NB1 1 4
4
PWM PHASE
5 LGATE_NB1 2 3
+VDDCI
9 GND LGATE
TP
1
25W_40W_50W_60W_VGA@
ISL6208BCRZ-T_QFN8_2X2 PQ1405 25W_40W_50W_60W_VGA@
60W_VGA@ 60W_VGA@ AON6314_N_DFN56-8-5 @EMI@ PR1463 PR1403
PR1448 PR1446 4.7_1206_5% 3.65K_0603_1%
VSUMP_NB 1 2
1.13K_0402_1% 1.87K_0402_1%
1 2
4 25W_40W_50W_60W_VGA@
@EMI@ PC1467 PR1406
680P_0402_50V7K 1_0402_1%
VSUMN_NB 1 2
2
3
2
1
M260_VGA@
+19VB @ PJ1406
+19VB_0.8VSDGPUP
PU1406 @M260_VGA@ M260_VGA@ @M260_VGA_EMI@ @M260_VGA_EMI@
1 2 2 9 PR1471 PC1477 PR1478 PC1481
1 2 IN PG 0_0603_5% 0.1U_0603_25V7K 4.7_1206_5% 680P_0402_50V7K
M260_VGA_EMI@
@M260_VGA_EMI@
3 1 0.8VSDGPUP_BST_VDDP
1 2 1 2 1 2 0.8VSDGPUP_SNB_VDDP 1 2
M260_VGA_EMI@
0.1U_0402_25V6
2200P_0402_50V7K
0.1U_0402_25V6
10U_0805_25V6K
10U_0805_25V6K
IN BS
1
JUMP_43X79
M260_VGA@
M260_VGA@
4 6
PC1471
PC1472
PC1479
PC1486
PC1485
0.8VSDGPUP_LDO_VDDP IN LX M260_VGA@
2
5 19 PL1406
IN LX 1UH_6.6A_20%_5X5X3_M
0.8VSDGPUP_LX_VDDP
1
@M260_VGA@
7
GND LX
20
0.8VSDGPUP_FB_VDDP
1 2
+0.8VSDGPUP
PR1474 8 14
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
M260_VGA@ GND FB
0_0402_5%
330P_0402_50V7K
0.8VSDGPUP_LDO_VDDP
1
1
PR1473 18 17
(R1)
2
0.8VSDGPUP_ILMT_VDDP 40.2K_0402_1% GND VCC M260_VGA@

M260_VGA@ PC1484
M260_VGA@ PC1475
M260_VGA@ PC1474
M260_VGA@ PC1473
M260_VGA@ PC1483
M260_VGA@ PC1482
M260_VGA@ PC1470
1
1 2 11 10 PC1478 M260_VGA@
2
2
1
VGA_ON EN NC 2.2U_0402_6.3V6M PR1476

0.8VSDGPUP_ILMT_VDDP 13 12
@M260_VGA@ 5.9K_0402_1%
2
PR1477 ILMT NC
1
0_0402_5% M260_VGA@ 15 16
+3VALW
2
BYP NC
1
PR1472 M260_VGA@
2
1M_0402_1% PC1476 21
PAD
1
0.47U_0402_6.3V6K
2
A M260_VGA@ SY8284RAC_QFN20_3X3 A
2
PC1480
2
1U_0402_6.3V6K FB = 0.6V
1
M260_VGA@ @ PJ1407
PR1475 +0.8VSDGPUP 1 2
1 2 +0.8VSDGPU
10K_0402_1%
JUMP_43X118
(R2)
2
+0.8VSDGPUP
TDC 2A (R535_25W) 4A (R560_60W) Security Classification Compal Secret Data Compal Electronics, Inc.
Vout=0.6V* (1+Rup/Rdown) Issued Date 2017/12/25 Deciphered Date 2019/12/25 Title
=0.954V R535 25W THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
RT8880CGQW
Size Document Number Rev
=0.906V R560 60W AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
5 4 3 2 1
A
D
+VGA_CORE
+VGA_CORE
@VGA@ PC1523 VGA@ PC1517 VGA@ PC1507
22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
2 1 2 1 2 1
VGA@ PC1540
220U_D2 SX_2VY_R9M @VGA@ PC1525 VGA@ PC1518 VGA@ PC1508
22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
2 1 2 1 2 1
1
+
5
5
60W_VGA@ PC1539 @VGA@ PC1524 VGA@ PC1519 VGA@ PC1509
330U_D1_2VY_R9M 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
2 1 2 1 2 1
1
+
@VGA@ PC1522 VGA@ PC1520 VGA@ PC1510
VGA@ PC1501 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
220U_D2 SX_2VY_R9M 2 1 2 1 2 1
VGA@ PC1521 VGA@ PC1511
1
+
22U_0603_6.3V6M 22U_0603_6.3V6M
VGA@ PC1502 2 1 2 1
220U_D2 SX_2VY_R9M
VGA@ PC1543 VGA@ PC1512
2.2U_0402_6.3V6M 22U_0603_6.3V6M
1
+
2 1 2 1
VGA@ PC1504
220U_D2 SX_2VY_R9M VGA@ PC1544 VGA@ PC1513
2.2U_0402_6.3V6M 22U_0603_6.3V6M
2 1 2 1
2
1
+
Non 60W_VGA@
PC1505 VGA@ PC1514
220U_D2 SX_2VY_R9M 22U_0603_6.3V6M
2 1
2
1
+
VGA@ PC1515
330U_D1_2VY_R9M
60W_VGA@ PC1505
22U_0603_6.3V6M
2 1
VGA@ PC1516
22U_0603_6.3V6M
4
4
2 1
+VDDCI
+VGA_CORE
SOLDER_PREFORMS_0402
P150_P170_G190_VGA@
M260_VGA@
M260_VGA@
1
1
PR1503
1
1
3
3
2
PR1502
PR1501
2
2
+0.8VSDGPU
+VDDCI
+VDDCI
2
25W_40W_50W_60W_VGA@ PC1545
330U_D1_2VY_R9M
2
1
+
Date:
Size
Title
B
@25W_40W_50W_60W_VGA@ PC1546
22U_0603_6.3V6M
DH5AV_JV_0V_LA-G021P
Document Number
<Title>
2 1
Monday, December 25, 2017
@25W_40W_50W_60W_VGA@ PC1547
22U_0603_6.3V6M
2 1
Sheet
1
1
46
of
48
Rev
1.B
D
5 4 3 2 1
Version Page 1 of 1
change list for PWR
Item (P.I.R.
Fixed Issue List) Reason for change Rev. PG# Modify List Date Phase
39, 41,
42, 44, Change PC315, PC603, PC811, PC826, PC843, PC849, PC1408, PC1426, PC1467, PC1004, PC1442, PC1481 from
01 Design Update Down Size for EMI Cap 1.0 680P_50V_K_X7R_0603 (SE025681K80) to 680P_50V_K_X7R_0402 (SE074681K80). 2017/10/20 B
45
02 Design Update Down Size for VGA Cap 1.0 45 Change PC1443 from 0.047U_0603_25V7M (SE042473M80) to 0.047U_0402_25V7K (SE00000MJ00) 2017/10/20 B
D D
Change PQ310 from AON6366E (SB00001D800) to EMB04N03H (SB00001C500)

03 Design Update Solution Change 1.0 38 Change 135W Adapter PQ311, PQ312 from AON7506 (SB000010A00) to AON7380 SB00001GM00) 2017/10/20 B
Delete the PC323 10U_0805_25V (SE00000QK00)
Change PC101 from 100P_50V_J_NPO_0603 (SE024101J80) to 100P_50V_J_NPO_0402 (SE071101J80).

04 Design Update Down Size for EMI Cap 1.0 36 Change PC102 from 1000P_50V_K_X7R_0603 (SE025102K80) to 1000P_50V_K_X7R_0402 (SE074102K80). 2017/10/20 B
38, 39, Change PR304, PR314, PR316, PR317, PR322, PR334, PR509, PR510, PR515, PR414, PR611, PR815 (0402)
05 Design Update change to r-short 1.0 40, 41, AND PR327, PR312 (0603) 0ohm to r-short 2017/11/1 B
42
change HW sequence Change PC1476 from 0.22U_0402_10V6K (SE095224K00) to 0.47U_0402_6.3V6K (SE124474K80) 2017/11/1 B
06 Design Update disable VDDCI 1.0 45 Add PR1466 for disable VDDCI when ues R535 GPU
Change PR809 from 2.49K_0402_1% (SD034249180) to 2.7K_0402_1% (SD034270180)

Change PR826, PR841, PR856 from 2.26K_0603_1% (SD014226180) to 2.7K_0402_1% (SD034270180)
tune CPU transient and Change PR806 from 53.6K_0402_1% (SD034536280) to 80.6K_0402_1% (SD034806280) 15W CPU
07 Design Update load line 1.0 42 Change PC807, PC830 from 330P_0402_50V8J (SE000006I80) to 270P_0402_50V7K (SE074271K80) 2017/11/6 B
Change PR859 from 18.2K_0402_1%(SD034182280) to 43K_0402_1% (SD034430280)
Change PR858 from 30.9K_0402_1% (SD034309280) to 48.7K_0402_1% (SD034487280)
Change PC828 to un pop
C
08 Design Update Down Size for EMI Cap 1.0 37 Change PC201, PC203 from 1000P_50V_K_X7R_0603 (SE025102K80) to 1000P_50V_K_X7R_0402 (SE074102K80) 2017/11/14 B C
Change PC507, PC506 from 10U_0805_6.3V6K (SE093106K80) to 10U_0603_6.3V6M (SE000005T80) 2017/11/14 B

09 Design Update Down Size for Cap 1.0 40, 39 Change PC416, PC417 from 680P_0603_50V8J(SE024681J80) to 680P_0402_50V7K (SE074681K80)
10 Design Update Cap shortage 1.0 38, 45 Change PC313, PC314, PC1428, PC1429 from 1U_0402_16V6K (SE00000OU00) to 1U_0402_10V6K (SE00000QL10) 2017/11/14 B
Change PC1015, PC1476, PC9056, PC9057, PC9058, PC9059, PC9060, PC9061, PC9062, PC9063, PC9064,
11 Design Update Cap shortage 1.0 44, 46 PC9065, PC9066, PC9067, PC9068, PC9069, PC9070, PC9071 from 0.22U_0402_10V6K (SE095224K00) to 2017/11/14 B
0.22U_0402_16V7K (SE00000R700)
Delete PC1538 330U_D1_2VY_R9M (SGA00009S00)

Reserved 22U_0603_6.3V6M*4 (SE00000M000) 2017/11/14 B
12 Design Update 紅紅紅紅 1.0 46
Change PC1505 from 220U_D2 SX_2VY_R9M (SGA20221D40) to 330U_D1_2VY_R9M (SGA00009S00) for 60W VGA
2017/11/14 B
13 Design Update change to common part 1.0 42 Change PC820, PC834 from 33U_25V_NC_6.3X4.5 (SF000007700) to 33U_25V_NC_6.3X4.5 (SF000007200)
14 Design Update For sourcer request 1.0 42 Change PC820, PC834 from 33U_25V_NC_6.3X4.5 (SF000007200) to 33U_25V_NC_6.3X4.5 (SF000007700) 2017/11/23 B
15 Design Update tune VDDP in AMD spec 1.0 41 Change PR609 from 26.7K_0402_1% (SD034267280) to 24.3K_0402_1% (SD00000AT80) 2017/11/23 B
B PQ601 unpop B
PR326 0_0603_5% pop

16 Design Update use SW solution in PQ309 LMUN5113T1G_SOT323-3 un pop 2017/11/23 B
standby mode 1.0 38, 43 PQ313 LTC015EUBFS8TL_UMT3F un pop
PC9094 330U_D2_2V_Y un pop
pop PR212 0_0402_5% (SD028000080) 2017/11/23 B

pop PC204 0.1U 25V K X5R (SE00000G880)
斷 swi t c h desi g n pop PR213 750K +-1% 0402 (SD00000AL80)
17 Design Update reserve 1.0 37 pop PR214 0 +-5% 0402 (SD028000080)
two cell low batt protect pop PR216 150K +-1% 0402 (SD034150380)
pop PR212 0 +-5% 0402 (SD028000080)
change PQ307 and

PQ313 source for 1.0 38 2017/11/23 B
18 Design Update change PQ307 & PQ313 form LTC015EUBFS8TL (SB00000RM00) to LMUN5236T1G (SB000011K00)
source request
adaject BATGONE
19 Design Update Threshold 1.0 37 change PR203 from 6.49K_0402_1% (SD034649180) to 200K_0402_1% (SD034200380) 2017/11/23 B
20 Design Update adaject bootst ability 1.0 38 change PC309 from 0.22U_0603_25V7K (SE000005Z80)to 0.47U_0603_16V7K (SE026474K80) 2017/11/23 B
21 Design Update for EMI request 1.0 38 add PL302/PL303 FBMA-L11-201209-800LMA50T (SM01000U600) 2017/12/22 B
A A
change PR306 392K_0402_1% (SD034392380) to 499K_0402_1% (SD034499380) 2017/12/22 B

22 Design Update for ACIN point 1.0 38 change PR310 49.9K_0402_1% (SD034499280) to 66.5K_0402_1% (SD034665280)

PWR_PIR1
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Re v
Custom 1.B
5 4 3 2 1
5 4 3 2 1
Version Change List ( P. I. R. List ) Page 1
Item Page# Date Request Owner Issue Description Solution Description Rev.
1 07/31 1. Initial 0.1
2 09/30 EVT Final 0.1

D D
3 11/02 1. UW1 change PN(SA00008ELE0) 1.0
2. US11,U74 change PN(SA00004ZA00)
3. L43,L44 change PN(SM01000K500)
4. US10 Pin2,3 swap Pin 10,11 (USB Charger modify)
5. RC6155 change location to CLRP1
6. RM23,RM24,RM25,RM26 add 0-ohm with T1PCIE@
7. All 1uF_0402 capacitor change to 1uF_0201 (SE00000UC00)
8. CS123 change PN(SE00000X200)
9. CC16 change to 1uF (SE00000UC00)
10.RO18 change to pop with PAR@
11.JDMIC1 change to 4pin connector (SP02000TI00)
12.R1562 pop, R1564 change to 20k (SD034200280)
13.R3_APU change PN(SA0000BBJ20)
14.US12 update value and part description
15.Q101,R101,R102,R103,R104 add with @ for UART0 debug
16.L2508,L2511,LS7 change to small size (SM070005U00)
17.PCB change PN(DAZ28Z00100)
18.SKU_ID change to AGPIO23, AGPIO40 will left N.C.
19.RC30,RC700,RC690,RC1676,RC1677,RC1672,RL1,RL13,RM20,RS10,RS127,
C RS147,RV807,RV1648,RV1632,R110,R4018 change to R-short C
20.UV4 change PN(SA0000A4K00)
4 11/07 1. CV450,CV451 change to 10pF 1.0

2. C796,C797 change to 3.9pF
3. Combine power 11/06
4. R756,R765,R769,R779,R781,R782,R783,R794 change to R-short
5. L2516,L2517 add with EMC@
R4031,R4032 remove
6. RS150,RS151 add with @ for debug
5 11/15 1. CC120 change to 0402_50V7K (SE074681K80) 1.0

2. Combine power
6 11/20 1. Board ID set by project 1.0

2. VRAM table add MICRON VRAM
3. Memory strap pin add MICRON config PV4G_M@
4. EVT@ change to @
5. R3APU@ seperate to R3APUDC@ and R3APUQC@
B 6. CS11,CS12,CS14,CS15 change to 0.1uF_0402_25V (SE00000G880) B
7. TPM@,FP@,GS@,HDT@ remove from BOM
PVT Final
7 12/18 1. C796,C797 change PN to SE07139AC80 (S CER CAP 3.9P 50V C NPO 0402) 1.B
2. RW5,RW6,RW7,RW8 change to pop
3. RC6175,RC6174 change to @, RC693 change to DIS@, RC692 change to UMA@
4. VRAM config V4G_S7G@,V4G_H7G@,V4G_M7G@ add into table and strap-pin
5. RC6175 change to @, RC6174 change to @
6. US11 change to Power Switch (SA00006Y700, S IC G527ATP1U TSOT-23 6P PW SW)
7. RS154,RS155,RS156 add with TYPEC@; CS124 add with @
8. SWG1 change to @
9. QS4 change to @; RS148,RS149 change to TYPEC@
10.QC1 change to TYPEC@; RC616,RC617 change to NTYPEC@
11.RS112,QS6 change to @
12.Q2509,RC6158,RC6159 change to pop; R2622,R2623 change to @
8 12/22 1. RO19 remove from BOM.

2. DAZ28Z00102 add into NOTE LIST 1.B
A A
9 12/22 1. PCB Location change to ZZZ1/ZZZ2/ZZZ3 1.B

2. D2016,D2017,D2018 change to EMC@
HW PIR
Custom 1.B
5 4 3 2 1
5 4 3 2 1
Version Change List ( P. I. R. List ) Page 2
Item Page# Date Request Owner Issue Description Solution Description Rev.
10 12/25 1. PCB change location to ZZZ, and config to PCB1A@,PCB1B@ 1.B
2. BOM Loader without HUB@
3. APU PN update to R3 PN
D 4. Update Schematic to 1B D
C C
B B
A A

HW PIR
Custom 1.B
5 4 3 2 1

Acer Acer Aspire 3 A315 Compal LA-G021P r1.B

Uploaded by

Document Information

Copyright

Available Formats

Share this document

Share or Embed Document

Sharing Options

Did you find this document useful?

Is this content inappropriate?

Copyright:

Available Formats

Acer Acer Aspire 3 A315 Compal LA-G021P r1.B

Uploaded by

Copyright:

Available Formats

A B C D E

AMD Raven Ridge Platform

Security Classification Compal Secret Data Compal Electronics, Inc.

(Channel A) page 13 (Channel B) page 14

Display Port RAVEN RIDGE Camera

Power On/Off CKT.

DC/DC Interface CKT.

LS-E911 Hall Sensor/B BLOCK DIAGRAMS

Voltage Rails BOARD ID Table Board ID / SKU ID Table for AD channel

+APU_CORE_NB ON OFF OFF

+1.8VS 1.8V switched power rail ON OFF OFF

+3VALW 3.3V always on power rail ON ON OFF

+RTC_APU RTC power ON ON ON

+TP_VCC 3.3V Touch Pad power ON ON OFF BOM Structure Table

+FP_VCC 3.3V Finger Print power ON ON OFF JP@ Jump

I2C Port 0 LDO@/SWR@ RTL8411 LDO-Mode/Switching-Mode EC_ON

256@/256EMC@ Audio Codec AL256 Design +1.8VALW/+0.9VALW

TYPEC@ TYPEC Circuits +3VSDGPU

PJP201 250mA +3VS

+RTC_APU_R 0.045mA +RTC_APU_R

RL2 LAN RTL8411

U45 +19VB 60000mA +VGA_CORE

Raven Ridge Platform Power Sequence

AC-IN G3 --> S0 S0 --> S3 S3 --> S0

0.9_1.8VALW_PWREN 99ms 9.13s 0.9_1.8VALW_PWREN

VGATE 2.432ms 2.44ms VGATE

VGA Sequence VGA Sequence

Security Classification Compal Secret Data Compal Electronics, Inc.

Main Func = CPU

PEG_ARX_GTX_P0 P8 P_GFX_RXP0 P_GFX_TXP0 N1 PEG_ATX_GRX_P0

PCIE_ARX_DTX_P0 N10 P_GPP_RXP0 P_GPP_TXP0 N2 PCIE_ATX_DRX_P0 PCIE@ CC1204 1 2 0.22U_0402_16V7K

PCIE_ARX_DTX_P4 V6 P_GPP_RXP4 P_GPP_TXP4 W2 PCIE_ATX_DRX_P4 CC1 1 2 .1U_0402_16V7K

FP5 REV 0.90

UC1 R3APUDC@ UC1 R3APUQC@ UC1 R5APU@ UC1 R7APU@

Security Classification Compal Secret Data Compal Electronics, Inc.

Main Func = CPU

EVENT# pull high

RC1 1 2 1K_0402_5% DDR_B_EVENT#

RC2 1 2 1K_0402_5% DDR_A_EVENT#

Security Classification Compal Secret Data Compal Electronics, Inc.

Main Func = CPU

INVTPWM_R Y INVTPWM <24>

TYPEC@ AP14 APU_TEST4 TP@

+1.8VALW DP_STEREOSYNC RC155 1 2 1K_0402_5%

Security Classification Compal Secret Data Compal Electronics, Inc.

Main Func = CPU

AGPIO5/DEVSLP0 AP9 AGPIO5

AGPIO6/DEVSLP1 AU10 DEVSLP1

AGPIO9 AU7 AGPIO9

AGPIO7 AR6 AGPIO7/FCH_ACP_I2S_SDIN_BT 3.3VS input FANIN0/AGPIO84 AR18

H DIS Type1 DMIC x4 RSV

L UMA Type2 DMIC x2 RSV

APU_PCIE_RST#_C RC700 1 RS@ 2 0_0402_5% APU_PCIE_RST#_U

APU_PCIE_RST#_U RC30 1 RS@ 2 0_0402_5% APU_PCIE_RST#

UMA@ T2@ DMIC2@ @

@ MC74VHC1G08DFT2G_SC70-5 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5%

AGPIO5 AGPIO7 AGPIO3 AGPIO4 L L R535

HDA Strap Pin 25W EA RX550

AGPIO7 AGPIO4 AGPIO11

RC696 1 2 10K_0402_5% HDA_SDIN2 RC6146 RC6138 RC6171 RC6169 RC6134 RC6173

Issued Date 2017/12/25 Deciphered Date 2019/12/25 Title

Main Func = CPU

+3VS CLKREQ_PCIE#0 AV18 CLK_REQ0_L/SATA_IS0_L/SATA_ZP0_L/AGPIO92

RC94 1 2 4.7K_0402_5% APU_USBC_SCL