Mobile AMD S1G2 CPU with ATI RS780M and SB700 schematics

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1 1
Compal confidential 2
Schematics Document
Mobile AMD S1G2 CPU with ATI
3
RS780M(NB) & SB700(SB) core logic 3
2007-12-03
REV:0.2
4 4
Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2007/08/02 Deciphered Date 2008/08/02 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Cover Sheet
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-4111P 0.2
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MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Monday, December 03, 2007 Sheet 1 of 48
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Compal Confidential
Consumer AMD 14" UMA - Ripley (JBL20)

Accelerometer Thermal Sensor
72QFN
1
ST LIS302DLTR ADM1032ARMZ AMD S1G2 CPU DDR2-SO-DIMM X2 1
Page 30 Page 6
DDR2 800MHz 1.8V BANK 0, 1, 2, 3 Page 8, 9 Clock Generator
Dual Channel SLG8SP626VTR
Fan conn
638-PIN uFCPGA 638 Page 15
Page 4
Page 4, 5, 6, 7
Side-Port DDR2 SDRAM
Hyper Transport Link 256Mbits(16Mbx16)Page 12
16X16
USB conn x2 daughter board

Page 31
LVDS Panel ATI RS780M
Interface Page 17 DDR2 400MHz BT Conn
Page 31 daughter board
CRT
Page 16 Page 10, 11, 12, 13, 14
2 Mini-Card WWAN 2
Page 26
14" Only
USB2.0 X12
HDMI A-Link Express II
Page 18
4X PCI-E
USB conn x1
Page 31
PCI-E BUS*5 Azalia (HDA I/F)

USB WebCam
SATA Master-1 daughter board
ATI SB700 SATA Master-2
Page 17
SATA Slave
CardReader Realtek Mini-Card*2 Express Card FingerPrinter AES1610
JMicron 8102E(10/100M) WLAN & WWAN
SATA Slave
USBx1 daughter board
Page 26 Page 19, 20, 21, 22, 23 page 35
JMB385-LGEZ0A
Page 27 Page 25 Page 26
MDC V1.5 daughter board
Page 34
RJ45/11 CONN LPC BUS Audio CKT

3
CardReader Socket Page 25 AMP & Audio Jack
3
Codec_IDT9271B7
Page 27 Page 28 TPA6017A2 Page 29
KBC SATA HDD Connector

ENE KB926 Page 24
Page 33
Docking CONN. LED SATA ODD Connector

Page 24
*RJ-45(LED*2) P41 Touch Pad CONN. Int.KBD

Page 34 Page 33
*RJ-11(Pass Through) Multi-Bay HDD/ODD Option Connector
*CRT Page 24
*COMPOSITE Video Out
RTC CKT. 14" UMA PA Only
*S-VIDEO OUT Page 19
Consumer IR SPI SPI ROM e-SATA Connector
*SPDIF SST25VF080B
Page 34 Page 32 Page 31
*Headphone/Line Out L/R Power OK CKT.
*Stereo Mic L/R P35
4 *Volume Control 4
*Consumer IR
*USB x1 Power On/Off CKT.
*DC JACK P35
DC/DC Interface CKT. THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Block Diagram
Page 35 Page 36 DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-4111P 0.2
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Date: Friday, November 30, 2007 Sheet 2 of 48
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O MEANS ON X MEANS OFF Symbol Note :

Voltage Rails
1 1
: means Digital Ground
+5VS
+3VS : means Analog Ground
+1.5VS
power Layout Notes
plane +0.9V L
+VCCP Please see VGA@ as no install. No support RX780M.
+5VALW +1.8V +CPU_CORE
+B
12/03 update
+3VALW +VGA_CORE
+2.5VS
: Question Area Mark.(Wait check)
State +1.8VS
+1.2VS "*" as default BOM setting
+0.9VGA PA@ : means install when Ripley PA.
PR@ : means install when Ripley PR.
2 RM@ : means install when Rachman. 2
*RP@ : means install when Ripley.

S0 SIDE@ : means install when SidePort support.
O O O O
*DOCK@ : means install when DOCK support.
S1
O O O O *CY@ : means install when Function Board-Cypress.
ENE@ : means install when Function Board-ENE.
S3
O O O X @ : means just reserve , no build
DEBUG@ : means just reserve for debug.
S5 S4/AC
O O X X 45@ : Install when 45 level Assy.
D3E@ : means install when JMircon D3E support
S5 S4/ Battery only
O X X X
S5 S4/AC & Battery
don't exist X X X X SMBUS Control Table
THERMAL
SERIAL SENSOR
SOURCE INVERTER BATT EEPROM CPU & SODIMM CLK CHIP MINI CARD LCD HDMI G-Sensor
ADM1032 I / II Slot 2
3 3
SMB_EC_CK1
I2C / SMBUS ADDRESSING KB926 X V V X X X X X X X
SMB_EC_DA1
SMB_EC_CK2
DEVICE HEX ADDRESS SMB_EC_DA2
KB926 X X X V X X X X X X
DDR SO-DIMM 0 A0 10100000 I2C_CLK
DDR SO-DIMM 1 A4 10100100 I2C_DATA
RS780M
X X X X X X X V X X
CLOCK GENERATOR (EXT.) D2 11010010 DDC_CLK0
DDC_DATA0
RS780M X X X X X X X X V X
DDC_CLK1
EC SM Bus1 address EC SM Bus2 address DDC_DATA1
RS780M X X X X X X X X X X
SCL0
Device HEX Address Device HEX Address
SDA0
SB700 X X X X V V X X X X
Smart Battery 16H 0001 011X b CPU 98H 1001 100X b SCL1
24C16 A0H 1010 000X b ADI1032-2 CPU 9AH 1001 101X b SDA1
SB700 X X X X X X V X X X
SCL2
SDA2
SB700 X X X X X X X X X V
4 4
SCL3
SDA3
SB700 X X X X X X X X X X
Notes List
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1 1
+1.2V_HT
VLDT CAP.
250 mil
1 1 1 1 1 1
C1 C2 C3 C4 C5 C6
H_CADIP[0..15] H_CADOP[0..15] 4.7U_0805_10V4Z 4.7U_0805_10V4Z 0.22U_0603_16V4Z 0.22U_0603_16V4Z 180P_0402_50V8J 180P_0402_50V8J
<10> H_CADIP[0..15] H_CADOP[0..15] <10>
H_CADIN[0..15] H_CADON[0..15] 2 2 2 2 2 2
<10> H_CADIN[0..15] H_CADON[0..15] <10>
Near CPU Socket

+1.2V_HT
JCPUA
VLDT=500mA D1 VLDT_A0 HT LINK VLDT_B0 AE2 +VLDT_B 1 2

D2 AE3 C7 4.7U_0805_10V4Z
VLDT_A1 VLDT_B1 If VLDT is connected only on one side, one
D3 VLDT_A2 VLDT_B2 AE4
D4 AE5 4.7uF cap should be added to the island
VLDT_A3 VLDT_B3 side.
H_CADIP0 E3 AD1 H_CADOP0
H_CADIN0 L0_CADIN_H0 L0_CADOUT_H0 H_CADON0
E2 L0_CADIN_L0 L0_CADOUT_L0 AC1
H_CADIP1 E1 AC2 H_CADOP1
F1 L0_CADIN_L1 L0_CADOUT_L1 AC3
H_CADIP2 G3 AB1 H_CADOP2
G2 L0_CADIN_L2 L0_CADOUT_L2 AA1
2 H_CADIP3 H_CADOP3 2
G1 L0_CADIN_H3 L0_CADOUT_H3 AA2
H_CADIN3 H1 AA3 H_CADON3
H_CADIP4 L0_CADIN_L3 L0_CADOUT_L3 H_CADOP4
J1 L0_CADIN_H4 L0_CADOUT_H4 W2
H_CADIN4 K1 W3 H_CADON4
L3 L0_CADIN_H5 L0_CADOUT_H5 V1
H_CADIN5 L2 U1 H_CADON5
L1 L0_CADIN_H6 L0_CADOUT_H6 U2
H_CADIN6 M1 U3 H_CADON6
N3 L0_CADIN_H7 L0_CADOUT_H7 T1
H_CADIN7 N2 R1 H_CADON7
E5 L0_CADIN_H8 L0_CADOUT_H8 AD4
H_CADIN8 F5 AD3 H_CADON8
F3 L0_CADIN_H9 L0_CADOUT_H9 AD5
H_CADIN9 F4 AC5 H_CADON9
G5 L0_CADIN_H10 L0_CADOUT_H10 AB4
H_CADIN10 H5 AB3 H_CADON10
H3 L0_CADIN_H11 L0_CADOUT_H11 AB5
H_CADIN11 H4 AA5 H_CADON11
K3 L0_CADIN_H12 L0_CADOUT_H12 Y5
H_CADIN12 K4 W5 H_CADON12
L5 L0_CADIN_H13 L0_CADOUT_H13 V4
H_CADIN13 M5 V3 H_CADON13
M3 L0_CADIN_H14 L0_CADOUT_H14 V5
H_CADIN14 M4 U5 H_CADON14
N5 L0_CADIN_H15 L0_CADOUT_H15 T4
H_CADIN15 H_CADON15 +5VS
P5 L0_CADIN_L15 L0_CADOUT_L15 T3
11/14 update
J3 Y1
<10>
<10>
H_CLKIP0
H_CLKIN0 J2
J5
L0_CLKIN_H0
L0_CLKIN_L0
L0_CLKOUT_H0
L0_CLKOUT_L0 W1
Y4
H_CLKOP0
H_CLKON0
<10>
<10> PWM Fan Control circuit JP2
<10> H_CLKIP1 L0_CLKIN_H1 L0_CLKOUT_H1 H_CLKOP1 <10>
1
<10> H_CLKIN1 K5 L0_CLKIN_L1 L0_CLKOUT_L1 Y3 H_CLKON1 <10> 1 1 1 1
C8 C9 2
3 D1 0.1U_0402_16V4Z 2 3
<10> H_CTLIP0 N1 L0_CTLIN_H0 L0_CTLOUT_H0 R2 H_CTLOP0 <10>
P1 R3 CH751H-40PT_SOD323-2 4.7U_0805_10V4Z 3
<10> H_CTLIN0 L0_CTLIN_L0 L0_CTLOUT_L0 H_CTLON0 <10> 2 2 GND
<10> H_CTLIP1 P3 T5 H_CTLOP1 <10> 4
2
L0_CTLIN_H1 L0_CTLOUT_H1 GND
<10> H_CTLIN1 P4 L0_CTLIN_L1 L0_CTLOUT_L1 R5 H_CTLON1 <10>
ACES_88231-02001
+VCC_FAN CONN@
FOX_PZ6382A-284S-41F_GRIFFIN
CONN@
1
2
5
6
1
Athlon 64 S1
Processor Socket D Q1 @ D2
Change PCB Footprint from
9/20 SP07000DM00/SP07000EQ00 G ACES_85204-02001_2P to
3 RLZ5.1B_LL34
<33> FAN_PWM S SI3456BDV-T1-E3_TSOP6
ACES_88231-02001_2P
2
4
4 4

AMD CPU S1G2 HT I/F
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Processor DDR2 Memory Interface

PLACE CLOSE TO PROCESSOR
1 WITHIN 1.5 INCH JCPUC 1
<9> DDR_B_D[63..0]
MEM:DATA
DDR_A_D[63..0] <8>
DDR_A_CLK0 DDR_B_D0 C11 G12 DDR_A_D0
DDR_B_D1 MB_DATA0 MA_DATA0 DDR_A_D1
1 A11 MB_DATA1 MA_DATA1 F12
DDR_B_D2 A14 H14 DDR_A_D2
C10 DDR_B_D3 MB_DATA2 MA_DATA2 DDR_A_D3
B14 MB_DATA3 MA_DATA3 G14
1.5P_0402_50V9C DDR_B_D4 G11 H11 DDR_A_D4
DDR_A_CLK#0 2 DDR_B_D5 MB_DATA4 MA_DATA4 DDR_A_D5
E11 MB_DATA5 MA_DATA5 H12
DDR_B_D6 D12 C13 DDR_A_D6
DDR_A_CLK1 DDR_B_D7 MB_DATA6 MA_DATA6 DDR_A_D7
A13 MB_DATA7 MA_DATA7 E13
1 DDR_B_D8 A15 H15 DDR_A_D8
A16 MB_DATA9 MA_DATA9 E15
C11 DDR_B_D10 A19 E17 DDR_A_D10
1.5P_0402_50V9C DDR_B_D11 MB_DATA10 MA_DATA10 DDR_A_D11
A20 MB_DATA11 MA_DATA11 H17
DDR_A_CLK#1 2 DDR_B_D12 DDR_A_D12
C14 MB_DATA12 MA_DATA12 E14
+1.8V DDR_B_D13 DDR_A_D13
09/13 update DDR_B_D14
D14 MB_DATA13 MA_DATA13 F14
DDR_A_D14
C18 MB_DATA14 MA_DATA14 C17
DDR_B_CLK0 DDR_B_D15 D18 G17 DDR_A_D15
MB_DATA15 MA_DATA15
2
1 DDR_B_D16 D20 G18 DDR_A_D16
R1 DDR_B_D17 MB_DATA16 MA_DATA16 DDR_A_D17
A21 MB_DATA17 MA_DATA17 C19
C14 DDR_B_D18 D24 D22 DDR_A_D18
1.5P_0402_50V9C 1K_0402_1% DDR_B_D19 MB_DATA18 MA_DATA18 DDR_A_D19
DDR_B_CLK#0 2 DDR_B_D20 DDR_A_D20
B20 E18
1
+MCH_REF DDR_B_D21 MB_DATA20 MA_DATA20 DDR_A_D21
C20 MB_DATA21 MA_DATA21 F18
DDR_B_CLK1 DDR_B_D22 B24 B22 DDR_A_D22
MB_DATA22 MA_DATA22
2
1 1 1 DDR_B_D23 C24 C23 DDR_A_D23
R2 C12 C13 DDR_B_D24 MB_DATA23 MA_DATA23 DDR_A_D24
E23 MB_DATA24 MA_DATA24 F20
C15 DDR_B_D25 E24 F22 DDR_A_D25
1.5P_0402_50V9C 1K_0402_1% DDR_B_D26 MB_DATA25 MA_DATA25 DDR_A_D26
G25 MB_DATA26 MA_DATA26 H24
DDR_B_CLK#1 2 2 2 DDR_B_D27 DDR_A_D27
G26 J19
1
1000P_0402_25V8J DDR_B_D28 MB_DATA27 MA_DATA27 DDR_A_D28
0.1U_0402_16V4Z DDR_B_D29 D26 E22 DDR_A_D29
2 DDR_B_D30 MB_DATA29 MA_DATA29 DDR_A_D30 2
G23 MB_DATA30 MA_DATA30 H20
+0.9V +0.9V DDR_B_D31 G24 H22 DDR_A_D31
JCPUB DDR_B_D32 MB_DATA31 MA_DATA31 DDR_A_D32
AA24 MB_DATA32 MA_DATA32 Y24
DDR_B_D33 AA23 AB24 DDR_A_D33
D10 VTT1 W10 AD24 AB22
Place them close to CPU within 1" C10 MEM:CMD/CTRL/CLK VTT5 AC10 DDR_B_D35 AE24
MB_DATA34 MA_DATA34
AA21 DDR_A_D35
VTT2 VTT6 DDR_B_D36 MB_DATA35 MA_DATA35 DDR_A_D36
B10 VTT3 VTT7 AB10 AA26 MB_DATA36 MA_DATA36 W22
AD10 AA10 DDR_B_D37 AA25 W21 DDR_A_D37
R4 39.2_0402_1% VTT4 VTT8 DDR_B_D38 MB_DATA37 MA_DATA37 DDR_A_D38
VTT9 A10 AD26 MB_DATA38 MA_DATA38 Y22
1 2 AF10 DDR_B_D39 AE25 AA22 DDR_A_D39
MEMZP VTT_SENSE DDR_B_D40 MB_DATA39 MA_DATA39 DDR_A_D40
+1.8V 1 2 AE10 MEMZN VTT_SENSE Y10 PAD T1 AC22 MB_DATA40 MA_DATA40 Y20
R3 39.2_0402_1% DDR_B_D41 AD22 AA20 DDR_A_D41
+MCH_REF DDR_B_D42 MB_DATA41 MA_DATA41 DDR_A_D42
T2 PAD H16 RSVD_M1 MEMVREF W17 09/13 update DDR_B_D43
AE20 MB_DATA42 MA_DATA42 AA18
DDR_A_D43
AF20 MB_DATA43 MA_DATA43 AB18
DDR_A_ODT0 T19 B18 DDR_B_D44 AF24 AB21 DDR_A_D44
<8> DDR_A_ODT0 MA0_ODT0 RSVD_M2 PAD T3 MB_DATA44 MA_DATA44
DDR_A_ODT1 V22 DDR_B_D45 AF23 AD21 DDR_A_D45
<8> DDR_A_ODT1 MA0_ODT1 MB_DATA45 MA_DATA45
U21 W26 DDR_B_ODT0 DDR_B_D46 AC20 AD19 DDR_A_D46
MA1_ODT0 MB0_ODT0 DDR_B_ODT0 <9> MB_DATA46 MA_DATA46
V19 W23 DDR_B_ODT1 DDR_B_D47 AD20 Y18 DDR_A_D47
MA1_ODT1 MB0_ODT1 DDR_B_ODT1 <9> MB_DATA47 MA_DATA47
Y26 DDR_B_D48 AD18 AD17 DDR_A_D48
DDR_CS0_DIMMA# MB1_ODT0 DDR_B_D49 MB_DATA48 MA_DATA48 DDR_A_D49
<8> DDR_CS0_DIMMA# T20 MA0_CS_L0 AE18 MB_DATA49 MA_DATA49 W16
DDR_CS1_DIMMA# U19 V26 DDR_CS0_DIMMB# DDR_B_D50 AC14 W14 DDR_A_D50
<8> DDR_CS1_DIMMA# MA0_CS_L1 MB0_CS_L0 DDR_CS0_DIMMB# <9> MB_DATA50 MA_DATA50
U20 W25 DDR_CS1_DIMMB# DDR_B_D51 AD14 Y14 DDR_A_D51
MA1_CS_L0 MB0_CS_L1 DDR_CS1_DIMMB# <9> MB_DATA51 MA_DATA51
V20 U22 DDR_B_D52 AF19 Y17 DDR_A_D52
MA1_CS_L1 MB1_CS_L0 DDR_B_D53 MB_DATA52 MA_DATA52 DDR_A_D53
AC18 MB_DATA53 MA_DATA53 AB17
DDR_CKE0_DIMMA J22 J25 DDR_CKE0_DIMMB DDR_B_D54 AF16 AB15 DDR_A_D54
<8> DDR_CKE0_DIMMA MA_CKE0 MB_CKE0 DDR_CKE0_DIMMB <9> MB_DATA54 MA_DATA54
DDR_CKE1_DIMMA J20 H26 DDR_CKE1_DIMMB DDR_B_D55 AF15 AD15 DDR_A_D55
<8> DDR_CKE1_DIMMA MA_CKE1 MB_CKE1 DDR_CKE1_DIMMB <9> MB_DATA55 MA_DATA55
DDR_B_D56 AF13 AB13 DDR_A_D56
N19 MA_CLK_H5 MB_CLK_H5 P22 AC12 MB_DATA57 MA_DATA57 AD13
N20 R22 DDR_B_D58 AB11 Y12 DDR_A_D58
DDR_A_CLK0 MA_CLK_L5 MB_CLK_L5 DDR_B_CLK0 DDR_B_D59 MB_DATA58 MA_DATA58 DDR_A_D59
<8> DDR_A_CLK0 E16 MA_CLK_H1 MB_CLK_H1 A17 DDR_B_CLK0 <9> Y11 MB_DATA59 MA_DATA59 W11
DDR_A_CLK#0 F16 A18 DDR_B_CLK#0 DDR_B_D60 AE14 AB14 DDR_A_D60
<8> DDR_A_CLK#0 MA_CLK_L1 MB_CLK_L1 DDR_B_CLK#0 <9> MB_DATA60 MA_DATA60
DDR_A_CLK1 Y16 AF18 DDR_B_CLK1 DDR_B_D61 AF14 AA14 DDR_A_D61
3 <8> DDR_A_CLK1 MA_CLK_H7 MB_CLK_H7 DDR_B_CLK1 <9> MB_DATA61 MA_DATA61 3
DDR_A_CLK#1 AA16 AF17 DDR_B_CLK#1 DDR_B_D62 AF11 AB12 DDR_A_D62
<8> DDR_A_CLK#1 MA_CLK_L7 MB_CLK_L7 DDR_B_CLK#1 <9> MB_DATA62 MA_DATA62
P19 R26 DDR_B_D63 AD11 AA12 DDR_A_D63
MA_CLK_H4 MB_CLK_H4 MB_DATA63 MA_DATA63
P20 MA_CLK_L4 MB_CLK_L4 R25 <9> DDR_B_DM[7..0] DDR_A_DM[7..0] <8>
DDR_B_DM0 A12 E12 DDR_A_DM0
<8> DDR_A_MA[15..0] DDR_B_MA[15..0] <9> MB_DM0 MA_DM0
DDR_A_MA0 N21 P24 DDR_B_MA0 DDR_B_DM1 B16 C15 DDR_A_DM1
DDR_A_MA1 MA_ADD0 MB_ADD0 DDR_B_MA1 DDR_B_DM2 MB_DM1 MA_DM1 DDR_A_DM2
M20 MA_ADD1 MB_ADD1 N24 A22 MB_DM2 MA_DM2 E19
DDR_A_MA2 N22 P26 DDR_B_MA2 DDR_B_DM3 E25 F24 DDR_A_DM3
M19 MA_ADD3 MB_ADD3 N23 AB26 MB_DM4 MA_DM4 AC24
DDR_A_MA4 M22 N26 DDR_B_MA4 DDR_B_DM5 AE22 Y19 DDR_A_DM5
L20 MA_ADD5 MB_ADD5 L23 AC16 MB_DM6 MA_DM6 AB16
DDR_A_MA6 M24 N25 DDR_B_MA6 DDR_B_DM7 AD12 Y13 DDR_A_DM7
DDR_A_MA7 MA_ADD6 MB_ADD6 DDR_B_MA7 MB_DM7 MA_DM7
L21 MA_ADD7 MB_ADD7 L24
DDR_A_MA8 L19 M26 DDR_B_MA8 DDR_B_DQS0 C12 G13 DDR_A_DQS0
MA_ADD8 MB_ADD8 <9> DDR_B_DQS0 MB_DQS_H0 MA_DQS_H0 DDR_A_DQS0 <8>
DDR_A_MA9 K22 K26 DDR_B_MA9 DDR_B_DQS#0 B12 H13 DDR_A_DQS#0
MA_ADD9 MB_ADD9 <9> DDR_B_DQS#0 MB_DQS_L0 MA_DQS_L0 DDR_A_DQS#0 <8>
DDR_A_MA10 R21 T26 DDR_B_MA10 DDR_B_DQS1 D16 G16 DDR_A_DQS1
DDR_A_MA11 L22 L26 DDR_B_MA11 DDR_B_DQS#1 C16 G15 DDR_A_DQS#1
DDR_A_MA12 K20 L25 DDR_B_MA12 DDR_B_DQS2 A24 C22 DDR_A_DQS2
DDR_A_MA13 V24 W24 DDR_B_MA13 DDR_B_DQS#2 A23 C21 DDR_A_DQS#2
DDR_A_MA14 K24 J23 DDR_B_MA14 DDR_B_DQS3 F26 G22 DDR_A_DQS3
DDR_A_MA15 K19 J24 DDR_B_MA15 DDR_B_DQS#3 E26 G21 DDR_A_DQS#3
DDR_B_DQS4 AC25 AD23 DDR_A_DQS4
<9> DDR_B_DQS4 MB_DQS_H4 MA_DQS_H4 DDR_A_DQS4 <8>
DDR_A_BS#0 R20 R24 DDR_B_BS#0 DDR_B_DQS#4 AC26 AC23 DDR_A_DQS#4
<8> DDR_A_BS#0 MA_BANK0 MB_BANK0 DDR_B_BS#0 <9> <9> DDR_B_DQS#4 MB_DQS_L4 MA_DQS_L4 DDR_A_DQS#4 <8>
DDR_A_BS#1 R23 U26 DDR_B_BS#1 DDR_B_DQS5 AF21 AB19 DDR_A_DQS5
<8> DDR_A_BS#1 MA_BANK1 MB_BANK1 DDR_B_BS#1 <9> <9> DDR_B_DQS5 MB_DQS_H5 MA_DQS_H5 DDR_A_DQS5 <8>
DDR_A_BS#2 J21 J26 DDR_B_BS#2 DDR_B_DQS#5 AF22 AB20 DDR_A_DQS#5
<8> DDR_A_BS#2 MA_BANK2 MB_BANK2 DDR_B_BS#2 <9> <9> DDR_B_DQS#5 MB_DQS_L5 MA_DQS_L5 DDR_A_DQS#5 <8>
DDR_B_DQS6 AE16 Y15 DDR_A_DQS6
<9> DDR_B_DQS6 MB_DQS_H6 MA_DQS_H6 DDR_A_DQS6 <8>
DDR_A_RAS# R19 U25 DDR_B_RAS# DDR_B_DQS#6 AD16 W15 DDR_A_DQS#6
<8> DDR_A_RAS# MA_RAS_L MB_RAS_L DDR_B_RAS# <9> <9> DDR_B_DQS#6 MB_DQS_L6 MA_DQS_L6 DDR_A_DQS#6 <8>
DDR_A_CAS# T22 U24 DDR_B_CAS# DDR_B_DQS7 AF12 W12 DDR_A_DQS7
<8> DDR_A_CAS# MA_CAS_L MB_CAS_L DDR_B_CAS# <9> <9> DDR_B_DQS7 MB_DQS_H7 MA_DQS_H7 DDR_A_DQS7 <8>
DDR_A_WE# T24 U23 DDR_B_WE# DDR_B_DQS#7 AE12 W13 DDR_A_DQS#7
<8> DDR_A_WE# MA_WE_L MB_WE_L DDR_B_WE# <9> <9> DDR_B_DQS#7 MB_DQS_L7 MA_DQS_L7 DDR_A_DQS#7 <8>
FOX_PZ6382A-284S-41F_GRIFFIN FOX_PZ6382A-284S-41F_GRIFFIN
Athlon 64 S1 Athlon 64 S1
4 Processor Processor Socket 4
Socket CONN@
CONN@

AMD CPU S1G2 DDRII I/F
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+2.5VS 1
L1
2
+2.5VDDA
FBM_L11_201209_300L_0805
VDDA=300mA
3300P_0402_50V7K +1.8V
R10
1 2
10K_0402_5% @ R6 0_0402_5%
11/13 update
1
1 1 1 1 2 1 2 ENTRIP2 <37,39>
C16 + R5 300_0402_5%
2
B
100U_D2_10VM 4.7U_0805_10V4Z C17 C18 C19 1 2 H_THERMTRIP#_EC <33>
0.22U_0603_16V4Z Q3 R16 0_0402_5%
2 2 2 2
E
CPU_THERMTRIP#_R 3 1 1 2 H_THERMTRIP# <20>
C
MMBT3904_NL_SOT23-3 R7 0_0402_5%
JCPUD
+1.8V 2 1
F8 M11 R11 @ 10K_0402_5%
1 VDDA1 KEY1 1
Place close to CPU wihtin 1.5" F9 VDDA2 KEY2 W18 1 2
2
B
R9 300_0402_5% @ MMBT3904_NL_SOT23-3
1 2 3900P_0402_50V7K CPU_CLKIN_SC_P A9 A6 CPU_SVC Q2
<15> CLK_CPU_BCLK CLKIN_H SVC CPU_SVC <43>
E
C20 CPU_CLKIN_SC_N A8 A4 CPU_SVD CPU_PROCHOT#_1 .8 3 1
CLKIN_L SVD CPU_SVD <43> H_PROCHOT# <19>
C
1 2
LDT_RST# B7 11/22 update R59 0_0402_5%
R8 H_PWRGD_CPU RESET_L
0718 Silego -- 216 ohm A7 PWROK
169_0402_1% LDT_STOP# F10 AF6 CPU_THERMTRIP#_R
CPU_LDT_REQ# LDTSTOP_L THERMTRIP_L CPU_PROCHOT#_1.8 R17 +1.8V
C6 AC7
2
LDTREQ_L PROCHOT_L CPU_MEMHOT#_1.8V
<15> CLK_CPU_BCLK# 1 2 MEMHOT_L AA8 2 1 +1.8V
C21 3900P_0402_50V7K CPU_SIC AF4 R22 1K_0402_5%
CPU_SID SIC @ 300_0402_5% CPU_SVC
Address:100_1100 AF5 SID 1 2
AE6 W7 THERMDC_CPU 09/11 update CPU_SVD 1 2
ALERT_L THERMDC THERMDA_CPU R23 1K_0402_5%
THERMDA W8
R13 1 2 44.2_0402_1% CPU_HTREF0 R6
R14 HT_REF0
+1.2V_HT 1 2 44.2_0402_1% CPU_HTREF1 P6 HT_REF1 0718 AMD --> 1K ohm
CPU_VDD0_FB_H
09/19 update
F6 W9
<43>
<43>
CPU_VDD0_FB_H
CPU_VDD0_FB_L CPU_VDD0_FB_L E6
VDD0_FB_H VDDIO_FB_H
Y9
PAD
PAD
T42
T43
+1.8V sense no support
VDD0_FB_L VDDIO_FB_L +CPU_CORE_NB
<43> CPU_VDD1_FB_H CPU_VDD1_FB_H Y6 H6 VDD_NB_FB_H
VDD1_FB_H VDDNB_FB_H VDD_NB_FB_H <43>
<43> CPU_VDD1_FB_L CPU_VDD1_FB_L AB6 G6 VDD_NB_FB_L R484 10_0402_5%
VDD1_FB_L VDDNB_FB_L VDD_NB_FB_L <43>
VDD_NB_FB_H 1 2
CPU_ DBRDY G10 VDD_NB_FB_L 1 2
CPU_TMS DBRDY CPU_DBREQ# R485 10_0402_5%
AA9 TMS DBREQ_L E10
CPU_TCK AC9
CPU_TRST# TCK CPU_TDO
AD9 TRST_L TDO AE9 Close to CPU
CPU_TDI AF9 TDI
+1.8VS T4 PAD CPU_TEST23_TSTUPD AD7 J7 CPU_TEST28_H_PLLCHRZ_P route as differential
+CPU_CORE_0 TEST23 TEST28_H PAD T5
H8 CPU_TEST28_L_PLLCHRZ_N as short as possible
TEST28_L PAD T6
R487 10_0402_5% CPU_TEST19_PLLTEST0 H10 testpoint under package
TEST18
2
2 2
1 2CPU_VDD0_FB_H CPU_TEST18_PLLTEST1 G9 TEST19 TEST17 D7 CPU_TEST17_BP3
PAD T7
R15 1 2CPU_VDD0_FB_L E7 CPU_TEST16_BP2
TEST16 PAD T8
300_0402_5% R486 10_0402_5% T9 PAD CPU_TEST25_H_BYPASSCLK_H E9 F7 CPU_TEST15_BP1
TEST25_H TEST15 PAD T10
T11 PAD CPU_TEST25_L_BYPASSCLK_L E8 C7 CPU_TEST14_BP0
TEST25_L TEST14 PAD T12
Close to CPU
1
LDT_RST# CPU_TEST21_SCANEN AB8 C3

<19> LDT_RST# TEST21 TEST7
CPU_TEST20_SCANCLK2 AF7 K8
+CPU_CORE_1 CPU_TEST24_SCANCLK1 TEST20 TEST10
1 AE7 TEST24
C22 R489 10_0402_5% CPU_TEST22_SCANSHIFTEN AE8 C4
0.01U_0402_25V4Z TEST22 TEST8
1 2CPU_VDD1_FB_H CPU_TEST12_SCANSHIFTENB AC8 TEST12
@ 1 2CPU_VDD1_FB_L CPU_TEST27_SINGLECHAIN AF8 TEST27
2 CPU_TEST29_H_FBCLKOUT_P
TEST29_H C9 PAD T13
R488 10_0402_5% 1 R25 2 0_0402_5% C2 C8 CPU_TEST29_L_FBCLKOUT_N
TEST9 TEST29_L PAD T14
AA6 TEST6
A3 RSVD1 RSVD10 H18
+1.8VS
09/13 update A5 RSVD2 RSVD9 H19
B3 RSVD3 RSVD8 AA7
1 2 B5 RSVD4 RSVD7 D5
2
C1 RSVD5 RSVD6 C5
R21 C939 0.1U_0402_16V4Z
300_0402_5% R175
R814 FOX_PZ6382A-284S-41F_GRIFFIN
+3VS 2 1 2 1 CONN@
1
<19> H_PWRGD_CPU H_PWRGD_CPU 2.09V for Gate

20K_0402_5% 34.8K_0402_1%~N
1
C23
2
G
11/30 update 0.1U_0402_16V7K

2
CPU_SID 3 1 SMB_EC_DA2
3 SMB_EC_DA2 <33> 3
R18
S
+1.8V 2 1 Q127
390_0402_5% FDV301N_NL_SOT23-3
+1.8VS R19
+1.8V 2 1
2
G
390_0402_5% FDV301N_NL_SOT23-3
2
R36 CPU_SIC Q129 3 1 SMB_EC_CK2 SMB_EC_CK2 <33> +1.8V

S
300_0402_5%
EC is PU to 5VALW
1
LDT_STOP# FDV301N, the Vgs is:

<11,19> LDT_STOP# +1.8V CPU_TEST27_SINGLECHAIN R24 1 2 @ 300_0402_5%
min = 0.65V
1
C25 Typ = 0.85V 09/11 update
HDT Connector
@ 220_0402_5% R37
@ 220_0402_5% R38
@ 220_0402_5% R39
@ 220_0402_5% R40
@ 220_0402_5% R41
0.01U_0402_25V4Z Max = 1.5V CPU_TEST21_SCANEN R26 1 2 @ 300_0402_5%
@ +3VS CPU_TEST20_SCANCLK2 R27 2 1 @ 300_0402_5%
1
1
2 CPU_TEST24_SCANCLK1 R28 @ 300_0402_5%
2 1
CPU_TEST22_SCANSHIFTEN R29 2 1 @ 300_0402_5%
JP3 CPU_TEST12_SCANSHIFTENB R31 2 1 @ 300_0402_5%
0.1U_0402_16V4Z
1 CPU_TEST15_BP1 R32 2 1 @ 300_0402_5%

1 2 CPU_TEST14_BP0 R33 @ 300_0402_5%
0718 AMD , need check with AMD 2 1
2
C26 3 4 CPU_TEST19_PLLTEST0 R34 @ 300_0402_5%

5 6 2 1
CPU_DBREQ# CPU_TEST18_PLLTEST1 R35 2 1 @ 300_0402_5%
+1.8VS 2 CPU_DBRDY 7 8
U2 CPU_TCK
9 10
SMB_EC_CK2 CPU_TMS 11 12 +3VS
1 VDD SCLK 8 13 14
2
CPU_TDI
R30 THERMDA_CPU 2 SMB_EC_DA2 CPU_TRST# 15 16
D+ SDATA 7 17 18
5
300_0402_5% C27 CPU_TDO U1
THERMDC_CPU 3 19 20 LDT_RST#
1 2 6 2
P
2200P_0402_50V7K D- ALERT# 21 22 HDT_RST# B
4
1
4 CPU_LDT_REQ# 23 24 Y 4
CPU_LDT_REQ# <11,19> 4 THERM# GND 5 26 A 1 SB_PWRGD <20,33,43>
G
2200p change to NOTE: HDT TERMINATION IS REQUIRED
1 1000p for ADT7421 @ NC7SZ08P5X_NL_SC70-5
FOR REV. Ax SILICON ONLY.
3
C24 ADM1032ARMZ-2REEL_MSOP8 @ SAMTEC_ASP-68200-07
0.01U_0402_25V4Z 9/20 SP020016900
@ Address:100_1101
2

AMD CPU S1G2 CTRL
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VDD(+CPU_CORE) decoupling. L 18A/720mil/36vias
+CPU_CORE_0 JCPUE
L 18A/720mil/36vias
+CPU_CORE_1
AA4
AA11
JCPUF
VSS1 VSS66 J6
J8
VSS2 VSS67
AA13 VSS3 VSS68 J10
G4 VDD0_1 VDD1_1 P8 AA15 VSS4 VSS69 J12
H2 VDD0_2 VDD1_2 P10 AA17 VSS5 VSS70 J14
+CPU_CORE_0 +CPU_CORE_1 J9 R4 AA19 J16
VDD0_3 VDD1_3 VSS6 VSS71
J11 VDD0_4 VDD1_4 R7 AB2 VSS7 VSS72 J18
J13 VDD0_5 VDD1_5 R9 AB7 VSS8 VSS73 K2
J15 VDD0_6 VDD1_6 R11 AB9 VSS9 VSS74 K7
1 1 1 1 K6 VDD0_7 VDD1_7 T2 AB23 VSS10 VSS75 K9
K10 VDD0_8 VDD1_8 T6 AB25 VSS11 VSS76 K11
+ C30 + C28 + C31 + C29 K12 T8 AC11 K13
1 330U_X_2VM_R6M 330U_X_2VM_R6M 330U_X_2VM_R6M 330U_X_2VM_R6M VDD0_9 VDD1_9 VSS12 VSS77 1
K14 VDD0_10 VDD1_10 T10 AC13 VSS13 VSS78 K15
L4 VDD0_11 VDD1_11 T12 AC15 VSS14 VSS79 K17
2 2 2 2
L7 VDD0_12 VDD1_12 T14 AC17 VSS15 VSS80 L6
L9 VDD0_13 VDD1_13 U7 AC19 VSS16 VSS81 L8
L11 U9 AC21 L10
Near CPU Socket L13
VDD0_14
VDD0_15
VDD1_14
VDD1_15 U11 AD6
VSS17
VSS18
VSS82
VSS83 L12
L15 VDD0_16 VDD1_16 U13 AD8 VSS19 VSS84 L14
M2 VDD0_17 VDD1_17 U15 AD25 VSS20 VSS85 L16
M6 VDD0_18 VDD1_18 V6 AE11 VSS21 VSS86 L18
M8 VDD0_19 VDD1_19 V8 AE13 VSS22 VSS87 M7
+CPU_CORE_0 M10 V10 AE15 M9
+CPU_CORE_1 VDD0_20 VDD1_20 VSS23 VSS88
L ?A/?mil/?vias N7 VDD0_21 VDD1_21 V12 AE17 VSS24 VSS89 AC6
N9 VDD0_22 VDD1_22 V14 AE19 VSS25 VSS90 M17
+CPU_CORE_NB N11 W4 AE21 N4
VDD0_23 VDD1_23 VSS26 VSS91
1 1 1 1 VDD1_24 Y2 AE23 VSS27 VSS92 N8
C32 C33 C34 C35 1 1 1 1 K16 AC4 B4 N10
22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M C36 C37 C38 C39 VDDNB_1 VDD1_25 +1.8V VSS28 VSS93
M16 VDDNB_2 VDD1_26 AD2 B6 VSS29 VSS94 N16
22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M P16 B8 N18
2 2 2 2 VDDNB_3 VSS30 VSS95
T16 VDDNB_4 VDDIO27 Y25 B9 VSS31 VSS96 P2
2 2 2 2 +1.8V V16 VDDNB_5 VDDIO26 V25 B11 VSS32 VSS97 P7
VDDIO25 V23 B13 VSS33 VSS98 P9
+CPU_CORE_0 H25 V21 B15 P11
+CPU_CORE_1 VDDIO1 VDDIO24 VSS34 VSS99
J17 VDDIO2 VDDIO23 V18 B17 VSS35 VSS100 P17
K18 VDDIO3 VDDIO22 U17 B19 VSS36 VSS101 R8
L ?A/?mil/?vias K21 VDDIO4 VDDIO21 T25 B21 VSS37 VSS102 R10
1 1 1 1 1 1 K23 VDDIO5 VDDIO20 T23 B23 VSS38 VSS103 R16
C40 C41 C42 C43 C44 C45 K25 T21 B25 R18
0.22U_0603_16V4Z 0.01U_0402_25V4Z 180P_0402_50V8J 0.22U_0603_16V4Z 0.01U_0402_25V4Z 180P_0402_50V8J VDDIO6 VDDIO19 VSS39 VSS104
L17 VDDIO7 VDDIO18 T18 D6 VSS40 VSS105 T7
M18 VDDIO8 VDDIO17 R17 D8 VSS41 VSS106 T9
2 2 2 2 2 2
M21 VDDIO9 VDDIO16 P25 D9 VSS42 VSS107 T11
M23 P23 D11 T13
Under CPU Socket M25
VDDIO10
VDDIO11
VDDIO15
VDDIO14 P21 D13
VSS43
VSS44
VSS108
VSS109 T15
2 2
N17 VDDIO12 VDDIO13 P18 D15 VSS45 VSS110 T17
D17 VSS46 VSS111 U4
D19 VSS47 VSS112 U6
FOX_PZ6382A-284S-41F_GRIFFIN D21 U8
Athlon 64 S1 VSS48 VSS113
D23 VSS49 VSS114 U10
Processor Socket D25 U12
CONN@ VSS50 VSS115
E4 VSS51 VSS116 U14
F2 VSS52 VSS117 U16
F11 VSS53 VSS118 U18
F13 VSS54 VSS119 V2
F15 V7
+CPU_CORE_NB decoupling. F17
F19
VSS55
VSS56
VSS57
VSS120
VSS121
VSS122
V9
V11
F21 V13
VDDIO decoupling. +CPU_CORE_NB
F23
F25
VSS58
VSS59
VSS60
VSS123
VSS124
VSS125
V15
V17
H7 VSS61 VSS126 W6
H9 VSS62 VSS127 Y21
1 1 1 H21 VSS63 VSS128 Y23
+1.8V C52 C53 C54 H23 N6
22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M VSS64 VSS129
J4 VSS65
2 2 2 FOX_PZ6382A-284S-41F_GRIFFIN
1 1 1 1 1 1 Athlon 64 S1
C46 C47 C48 C49 C50 C51 Processor Socket
22U_0805_6.3V6M 22U_0805_6.3V6M CONN@
0.22U_0603_16V4Z 0.22U_0603_16V4Z 180P_0402_50V8J 180P_0402_50V8J
2 2 2 2 2 2
+0.9V
3 Under CPU Socket Near Power Supply 3
VTT decoupling. 1
C: Change to NBO CAP
+ C59
220U_Y_4VM
2
Between CPU Socket and DIMM
+1.8V
+0.9V
1 1 1 1
C55 C56 C57 C58
0.22U_0603_16V4Z 0.22U_0603_16V4Z 0.22U_0603_16V4Z 0.22U_0603_16V4Z
2 2 2 2 1 1 1 1 1 1 1 1
C66 C67 C68 C69 C70 C71 C72 C73
4.7U_0805_10V4Z 4.7U_0805_10V4Z 0.22U_0603_16V4Z 0.22U_0603_16V4Z 1000P_0402_25V8J 1000P_0402_25V8J 180P_0402_50V8J 180P_0402_50V8J
180PF Qt'y follow the distance between 2 2 2 2 2 2 2 2

+1.8V +1.8V CPU socket and DIMM0. <2.5inch>
1 1 1 1 1 1
Near CPU Socket Right side.
C60 C61 C62 C63 C64 C65 +0.9V
0.01U_0402_25V4Z 0.01U_0402_25V4Z 180P_0402_50V8J 180P_0402_50V8J 180P_0402_50V8J 180P_0402_50V8J
2 2 2 2 2 2
A: Add C165 and C176 1 1 1 1 1 1 1 1
to follow AMD Layout C79 C80 C81 C82 C83 C84 C85 C86
4.7U_0805_10V4Z 4.7U_0805_10V4Z 0.22U_0603_16V4Z 0.22U_0603_16V4Z 1000P_0402_25V8J 1000P_0402_25V8J 180P_0402_50V8J 180P_0402_50V8J
+1.8V
review recommand for
EMI 2 2 2 2 2 2 2 2
4 4
1
C: Change to NBO CAP
1 1 1 1
+ C78 Near CPU Socket Left side.
C74 C75 C76 C77 220U_Y_4VM
4.7U_0805_10V4Z 4.7U_0805_10V4Z 4.7U_0805_10V4Z 4.7U_0805_10V4Z
2 2 2 2 2 @

AMD CPU S1G2 PWR & GND
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+V_DDR_MCH_REF
+1.8V JP4 +1.8V +0.9V +1.8V

1 2 RP1
VREF VSS DDR_A_D4 DDR_A_D[0..63] DDR_A_MA14
3 VSS DQ4 4 DDR_A_D[0..63] <5> 8 1 1 2
DDR_A_D0 5 6 DDR_A_D5 DDR_A_MA11 7 2 C87 0.1U_0402_16V4Z
DDR_A_D1 DQ0 DQ5 DDR_A_DM[0..7] DDR_A_MA7
7 DQ1 VSS 8 DDR_A_DM[0..7] <5> 6 3 1 2
9 10 DDR_A_DM0 DDR_A_MA6 5 4 C88 0.1U_0402_16V4Z
DDR_A_DQS#0 VSS DM0 DDR_A_DQS[0..7]
11 DQS0# VSS 12 DDR_A_DQS[0..7] <5>
1 DDR_A_DQS0 DDR_A_D6 47_0804_8P4R_5% 1
13 DQS0 DQ6 14
15 16 DDR_A_D7 DDR_A_MA[0..15] RP2
VSS DQ7 DDR_A_MA[0..15] <5>
DDR_A_D2 17 18 DDR_CKE0_DIMMA 8 1 1 2
DDR_A_D3 DQ2 VSS DDR_A_D12 DDR_A_DQS#[0..7] DDR_A_BS#2 C90 0.1U_0402_16V4Z
19 DQ3 DQ12 20 DDR_A_DQS#[0..7] <5> 7 2
21 22 DDR_A_D13 DDR_CKE1_DIMMA 6 3 1 2
DDR_A_D8 VSS DQ13 DDR_A_MA15 C89 0.1U_0402_16V4Z
23 DQ8 VSS 24 5 4
DDR_A_D9 25 26 DDR_A_DM1
DQ9 DM1 47_0804_8P4R_5%
27 VSS VSS 28
DDR_A_DQS#1 29 30 RP3
DQS1# CK0 DDR_A_CLK0 <5>
DDR_A_DQS1 31 32 DDR_A_MA4 8 1 1 2
DQS1 CK0# DDR_A_CLK#0 <5>
33 34 DDR_A_MA2 7 2 C91 0.1U_0402_16V4Z
DDR_A_D10 VSS VSS DDR_A_D14 DDR_A_BS#1
35 DQ10 DQ14 36 6 3 1 2
DDR_A_D11 37 38 DDR_A_D15 +1.8V DDR_A_MA0 5 4 C92 0.1U_0402_16V4Z
DQ11 DQ15
39 VSS VSS 40
47_0804_8P4R_5%
2
RP4
41 42 R43 DDR_A_MA5 8 1 1 2
DDR_A_D16 VSS VSS DDR_A_D20 1K_0402_1% DDR_A_MA8 C93 0.1U_0402_16V4Z
43 DQ16 DQ20 44 7 2
DDR_A_D17 45 46 DDR_A_D21 DDR_A_MA9 6 3 1 2
DQ17 DQ21 DDR_A_MA12 C94 0.1U_0402_16V4Z
47 48 5 4
1
DDR_A_DQS#2 VSS VSS +V_DDR_MCH_REF
49 DQS2# NC 50 +V_DDR_MCH_REF <9>
DDR_A_DQS2 51 52 DDR_A_DM2 47_0804_8P4R_5%
DQS2 DM2 RP5
53 VSS VSS 54 1 1
2
DDR_A_D18 55 56 DDR_A_D22 C95 C96 DDR_A_BS#0 8 1 1 2
DDR_A_D19 DQ18 DQ22 DDR_A_D23 R44 DDR_A_MA10 C98 0.1U_0402_16V4Z
57 DQ19 DQ23 58 7 2
59 60 1K_0402_1% DDR_A_MA1 6 3 1 2
DDR_A_D24 VSS VSS DDR_A_D28 2 2 DDR_A_MA3 C97 0.1U_0402_16V4Z
61 DQ24 DQ28 62 5 4
DDR_A_D25 63 64 DDR_A_D29 1000P_0402_25V8J
1
DQ25 DQ29 47_0804_8P4R_5%
65 VSS VSS 66
DDR_A_DM3 67 68 DDR_A_DQS#3 0.1U_0402_16V4Z RP6
DM3 DQS3# DDR_A_DQS3 DDR_A_ODT1
69 NC DQS3 70 09/13 update DDR_CS1_DIMMA#
8 1
C100
1 2
0.1U_0402_16V4Z
71 VSS VSS 72 7 2
2 DDR_A_D26 DDR_A_D30 DDR_A_WE# 2
73 DQ26 DQ30 74 6 3 1 2
DDR_A_D27 75 76 DDR_A_D31 DDR_A_CAS# 5 4 C99 0.1U_0402_16V4Z
DQ27 DQ31
77 VSS VSS 78
DDR_CKE0_DIMMA 79 80 DDR_CKE1_DIMMA 47_0804_8P4R_5%
<5> DDR_CKE0_DIMMA CKE0 NC/CKE1 DDR_CKE1_DIMMA <5>
81 82 RP7
VDD VDD DDR_A_MA15 DDR_CS0_DIMMA#
83 NC NC/A15 84 8 1 1 2
DDR_A_BS#2 85 86 DDR_A_MA14 DDR_A_RAS# 7 2 C102 0.1U_0402_16V4Z
<5> DDR_A_BS#2 BA2 NC/A14
87 88 DDR_A_MA13 6 3 1 2
DDR_A_MA12 VDD VDD DDR_A_MA11 DDR_A_ODT0 C101 0.1U_0402_16V4Z
89 A12 A11 90 5 4
DDR_A_MA9 91 92 DDR_A_MA7
DDR_A_MA8 A9 A7 DDR_A_MA6 47_0804_8P4R_5%
93 A8 A6 94
95 VDD VDD 96 Cross between +1.8V and +0.9V power plan
DDR_A_MA3 A5 A4 DDR_A_MA2
99 A3 A2 100
A1 A0
103 VDD VDD 104
DDR_A_MA10 105 106 DDR_A_BS#1
A10/AP BA1 DDR_A_BS#1 <5>
DDR_A_BS#0 107 108 DDR_A_RAS#
<5> DDR_A_BS#0 BA0 RAS# DDR_A_RAS# <5>
DDR_A_WE# 109 110 DDR_CS0_DIMMA#
<5> DDR_A_WE# WE# S0# DDR_CS0_DIMMA# <5>
111 VDD VDD 112
DDR_A_CAS# 113 114 DDR_A_ODT0
<5> DDR_A_CAS# CAS# ODT0 DDR_A_ODT0 <5>
DDR_CS1_DIMMA# 115 116 DDR_A_MA13
<5> DDR_CS1_DIMMA# NC/S1# NC/A13
117 VDD VDD 118
DDR_A_ODT1 119 120
<5> DDR_A_ODT1 NC/ODT1 NC
121 VSS VSS 122
DDR_A_D32 123 124 DDR_A_D36
DDR_A_D33 DQ32 DQ36 DDR_A_D37
125 DQ33 DQ37 126
127 VSS VSS 128
DDR_A_DQS#4 129 130 DDR_A_DM4
DDR_A_DQS4 DQS4# DM4
131 DQS4 VSS 132
133 134 DDR_A_D38
DDR_A_D34 VSS DQ38 DDR_A_D39
135 DQ34 DQ39 136
3 DDR_A_D35 3
137 DQ35 VSS 138
139 140 DDR_A_D44
DDR_A_D40 VSS DQ44 DDR_A_D45
141 DQ40 DQ45 142
DDR_A_D41 143 144
DQ41 VSS DDR_A_DQS#5
145 VSS DQS5# 146
DDR_A_DM5 147 148 DDR_A_DQS5
DM5 DQS5
149 VSS VSS 150
DDR_A_D42 151 152 DDR_A_D46
153 DQ43 DQ47 154
155 VSS VSS 156
DDR_A_D48 157 158 DDR_A_D52
159 DQ49 DQ53 160
161 VSS VSS 162
163 NC,TEST CK1 164 DDR_A_CLK1 <5>
165 VSS CK1# 166 DDR_A_CLK#1 <5>
DDR_A_DQS#6 167 168
DDR_A_DQS6 DQS6# VSS DDR_A_DM6
169 DQS6 DM6 170
171 VSS VSS 172
DDR_A_D50 173 174 DDR_A_D54
175 DQ51 DQ55 176
177 VSS VSS 178
DDR_A_D56 179 180 DDR_A_D60
181 DQ57 DQ61 182
183 VSS VSS 184
DDR_A_DM7 185 186 DDR_A_DQS#7
DM7 DQS7# DDR_A_DQS7
187 VSS DQS7 188
DDR_A_D58 189 190
DDR_A_D59 DQ58 VSS DDR_A_D62
191 DQ59 DQ62 192
193 194 DDR_A_D63
VSS DQ63
<9,15,20,30> SMB_CK_DAT0 195 SDA VSS 196
<9,15,20,30> SMB_CK_CLK0 197 SCL SA0 198
+3VS 199 VDDSPD SA1 200
4 4
1
C103 FOX_AS0A426-N8RN-7F
0.1U_0402_16V4Z CONN@
2 9/20 SP07000BZ00/SP07000EU00
DDR2 SOCKET H9.2 (REV)

DDRII SO-DIMM 0
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A B C D E
A B C D E
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+1.8V +1.8V +0.9V +1.8V
JP5 RP8
1 2 DDR_B_D[0..63] DDR_B_MA6 8 1 2 1
<8> +V_DDR_MCH_REF VREF VSS DDR_B_D[0..63] <5>
3 4 DDR_B_D4 DDR_B_MA2 7 2 C105 0.1U_0402_16V4Z
DDR_B_D0 VSS DQ4 DDR_B_D5 DDR_B_DM[0..7] DDR_B_MA0
5 DQ0 DQ5 6 DDR_B_DM[0..7] <5> 6 3 1 2
DDR_B_D1 7 8 DDR_CS0_DIMMB# 5 4 C106 0.1U_0402_16V4Z
DQ1 VSS DDR_B_DM0 DDR_B_DQS[0..7]
1 9 VSS DM0 10 DDR_B_DQS[0..7] <5>
C104 DDR_B_DQS#0 11 12 47_0804_8P4R_5%
DDR_B_DQS0 DQS0# VSS DDR_B_D6 DDR_B_MA[0..15]
13 DQS0 DQ6 14 DDR_B_MA[0..15] <5>
15 16 DDR_B_D7 RP9
1 2 DDR_B_D2 VSS DQ7 DDR_B_DQS#[0..7] DDR_B_MA14 1
17 DQ2 VSS 18 DDR_B_DQS#[0..7] <5> 8 1 2 1
1000P_0402_25V8J DDR_B_D3 19 20 DDR_B_D12 DDR_B_MA11 7 2 C108 0.1U_0402_16V4Z
DQ3 DQ12 DDR_B_D9 DDR_B_MA7
21 VSS DQ13 22 6 3 1 2
DDR_B_D8 23 24 DDR_B_MA4 5 4 C107 0.1U_0402_16V4Z
DDR_B_D13 DQ8 VSS DDR_B_DM1
25 DQ9 DM1 26
27 28 47_0804_8P4R_5%
DDR_B_DQS#1 VSS VSS
29 DQS1# CK0 30 DDR_B_CLK0 <5>
DDR_B_DQS1 31 32 RP10
DQS1 CK0# DDR_B_CLK#0 <5>
33 34 DDR_B_BS#2 8 1 2 1
DDR_B_D10 VSS VSS DDR_B_D14 DDR_CKE0_DIMMB C109 0.1U_0402_16V4Z
35 DQ10 DQ14 36 7 2
DDR_B_D11 37 38 DDR_B_D15 DDR_B_MA15 6 3 1 2
DQ11 DQ15 DDR_CKE1_DIMMB C110 0.1U_0402_16V4Z
39 VSS VSS 40 5 4
47_0804_8P4R_5%
41 VSS VSS 42
DDR_B_D21 43 44 DDR_B_D20 RP11
DDR_B_D17 DQ16 DQ20 DDR_B_D16 DDR_B_MA5
45 DQ17 DQ21 46 8 1 2 1
47 48 DDR_B_MA8 7 2 C111 0.1U_0402_16V4Z
DDR_B_DQS#2 VSS VSS DDR_B_MA9
49 DQS2# NC 50 6 3 1 2
DDR_B_DQS2 51 52 DDR_B_DM2 DDR_B_MA12 5 4 C112 0.1U_0402_16V4Z
DQS2 DM2
53 VSS VSS 54
DDR_B_D18 55 56 DDR_B_D22 47_0804_8P4R_5%
DDR_B_D19 DQ18 DQ22 DDR_B_D23
57 DQ19 DQ23 58
59 60 RP12
DDR_B_D24 VSS VSS DDR_B_D28 DDR_B_MA10
61 DQ24 DQ28 62 8 1 2 1
DDR_B_D25 63 64 DDR_B_D29 DDR_B_BS#0 7 2 C114 0.1U_0402_16V4Z
DQ25 DQ29 DDR_B_MA1
65 VSS VSS 66 6 3 1 2
DDR_B_DM3 67 68 DDR_B_DQS#3 DDR_B_MA3 5 4 C113 0.1U_0402_16V4Z
DM3 DQS3# DDR_B_DQS3
69 NC DQS3 70
71 72 47_0804_8P4R_5%
DDR_B_D26 VSS VSS DDR_B_D30
73 DQ26 DQ30 74
DDR_B_D27 75 76 DDR_B_D31 RP13
2 DQ27 DQ31 DDR_B_ODT1 2
77 VSS VSS 78 8 1 2 1
DDR_CKE0_DIMMB 79 80 DDR_CKE1_DIMMB DDR_CS1_DIMMB# 7 2 C116 0.1U_0402_16V4Z
<5> DDR_CKE0_DIMMB CKE0 NC/CKE1 DDR_CKE1_DIMMB <5>
81 82 DDR_B_CAS# 6 3 1 2
VDD VDD DDR_B_MA15 DDR_B_WE# C115 0.1U_0402_16V4Z
83 NC NC/A15 84 5 4
DDR_B_BS#2 85 86 DDR_B_MA14
<5> DDR_B_BS#2 BA2 NC/A14
87 88 47_0804_8P4R_5%
DDR_B_MA12 VDD VDD DDR_B_MA11
89 A12 A11 90
DDR_B_MA9 91 92 DDR_B_MA7 RP14
DDR_B_MA8 A9 A7 DDR_B_MA6 DDR_B_RAS#
93 A8 A6 94 8 1 2 1
95 96 DDR_B_BS#1 7 2 C118 0.1U_0402_16V4Z
DDR_B_MA5 VDD VDD DDR_B_MA4 DDR_B_ODT0
97 A5 A4 98 6 3 1 2
DDR_B_MA3 99 100 DDR_B_MA2 DDR_B_MA13 5 4 C117 0.1U_0402_16V4Z
DDR_B_MA1 A3 A2 DDR_B_MA0
101 A1 A0 102
103 104 47_0804_8P4R_5%
DDR_B_MA10 VDD VDD DDR_B_BS#1
105 A10/AP BA1 106 DDR_B_BS#1 <5> Cross between +1.8V and +0.9V power plan
DDR_B_BS#0 107 108 DDR_B_RAS#
<5> DDR_B_BS#0 BA0 RAS# DDR_B_RAS# <5>
DDR_B_WE# 109 110 DDR_CS0_DIMMB#
<5> DDR_B_WE# WE# S0# DDR_CS0_DIMMB# <5>
111 VDD VDD 112
DDR_B_CAS# 113 114 DDR_B_ODT0
<5> DDR_B_CAS# CAS# ODT0 DDR_B_ODT0 <5>
DDR_CS1_DIMMB# 115 116 DDR_B_MA13
<5> DDR_CS1_DIMMB# NC/S1# NC/A13
117 VDD VDD 118
DDR_B_ODT1 119 120
<5> DDR_B_ODT1 NC/ODT1 NC
121 VSS VSS 122
DDR_B_D32 123 124 DDR_B_D36
125 DQ33 DQ37 126
127 VSS VSS 128
DDR_B_DQS#4 129 130 DDR_B_DM4
DDR_B_DQS4 DQS4# DM4
131 DQS4 VSS 132
DDR_B_D38
09/26 update
133 VSS DQ38 134
DDR_B_D34 135 136 DDR_B_D39 DDR_B_D21 swap with DDR_B_D16
DDR_B_D35 DQ34 DQ39
137 DQ35 VSS 138
139 140 DDR_B_D44 DDR_B_D13 swap with DDR_B_D9
3 DDR_B_D40 VSS DQ44 DDR_B_D45 3
141 DQ40 DQ45 142
DDR_B_D41 143 144
DQ41 VSS DDR_B_DQS#5
145 VSS DQS5# 146
DDR_B_DM5 147 148 DDR_B_DQS5
DM5 DQS5
149 VSS VSS 150
DDR_B_D42 151 152 DDR_B_D46
153 DQ43 DQ47 154
155 VSS VSS 156
DDR_B_D48 157 158 DDR_B_D52
159 DQ49 DQ53 160
161 VSS VSS 162
163 NC,TEST CK1 164 DDR_B_CLK1 <5>
165 VSS CK1# 166 DDR_B_CLK#1 <5>
DDR_B_DQS#6 167 168
DDR_B_DQS6 DQS6# VSS DDR_B_DM6
169 DQS6 DM6 170
171 VSS VSS 172
DDR_B_D50 173 174 DDR_B_D54
175 DQ51 DQ55 176
177 VSS VSS 178
DDR_B_D56 179 180 DDR_B_D60
181 DQ57 DQ61 182
183 VSS VSS 184
DDR_B_DM7 185 186 DDR_B_DQS#7
DM7 DQS7# DDR_B_DQS7
187 VSS DQS7 188
DDR_B_D58 189 190
DDR_B_D59 DQ58 VSS DDR_B_D62
191 DQ59 DQ62 192
193 194 DDR_B_D63
VSS DQ63
<8,15,20,30> SMB_CK_DAT0 195 SDA VSS 196
<8,15,20,30> SMB_CK_CLK0 197 SCL SAO 198 +3VS
+3VS 199 VDDSPD SA1 200
1 201 GND GND 202
4 C119 TYCO_292527-4 4
0.1U_0402_16V4Z CONN@
2
9/20 SP07000ET00/SP07000GN00

DDRII SO-DIMM 1
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A B C D E
A B C D E
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D4 GFX_RX0P GFX_TX0P A5 TMDS_B_DATA2 <18>
C4 GFX_RX0N PART 2 OF 6 GFX_TX0N B5 TMDS_B_DATA2# <18>
A3 GFX_RX1P GFX_TX1P A4 TMDS_B_DATA1 <18>
B3 GFX_RX1N GFX_TX1N B4 TMDS_B_DATA1# <18>
C2 GFX_RX2P GFX_TX2P C3 TMDS_B_DATA0 <18>
C1 GFX_RX2N GFX_TX2N B2 TMDS_B_DATA0# <18>
E5 GFX_RX3P GFX_TX3P D1 TMDS_B_CLK <18>
F5 GFX_RX3N GFX_TX3N D2 TMDS_B_CLK# <18>
G5 GFX_RX4P GFX_TX4P E2
G6 GFX_RX4N GFX_TX4N E1
1 1
H5 GFX_RX5P GFX_TX5P F4
H6 GFX_RX5N GFX_TX5N F3
J6 GFX_RX6P GFX_TX6P F1
J5 GFX_RX6N GFX_TX6N F2
J7 GFX_RX7P GFX_TX7P H4
J8 GFX_RX7N GFX_TX7N H3
L5 GFX_RX8P GFX_TX8P H1
L6 GFX_RX8N GFX_TX8N H2
M8 GFX_RX9P GFX_TX9P J2
L8 GFX_RX9N GFX_TX9N J1
P7 K4
PCIE I/F GFX

GFX_RX10P GFX_TX10P
M7 GFX_RX10N GFX_TX10N K3
P5 GFX_RX11P GFX_TX11P K1
M5 GFX_RX11N GFX_TX11N K2
R8 GFX_RX12P GFX_TX12P M4
P8 GFX_RX12N GFX_TX12N M3
R6 GFX_RX13P GFX_TX13P M1
R5 GFX_RX13N GFX_TX13N M2
P4 GFX_RX14P GFX_TX14P N2
P3 GFX_RX14N GFX_TX14N N1
T4 GFX_RX15P GFX_TX15P P1
T3 GFX_RX15N GFX_TX15N P2
AE3 AC1 PCIE_ITX_PRX_P0 C152 1 2 0.1U_0402_16V7K New Card

<26> PCIE_PTX_C_IRX_P0 GPP_RX0P GPP_TX0P PCIE_ITX_C_PRX_P0 <26>
AD4 AC2 PCIE_ITX_PRX_N0 C153 1 2 0.1U_0402_16V7K
<26> PCIE_PTX_C_IRX_N0 GPP_RX0N GPP_TX0N PCIE_ITX_C_PRX_N0 <26>
AE2 AB4 PCIE_ITX_PRX_P1 C154 1 2 0.1U_0402_16V7K CardReader
AD3 AB3 PCIE_ITX_PRX_N1 C155 1 2 0.1U_0402_16V7K
AD1 AA2 PCIE_ITX_PRX_P2 C156 1 2 0.1U_0402_16V7K
AD2 PCIE I/F GPP GPP_TX2N AA1 PCIE_ITX_PRX_N2 C157 1 2 0.1U_0402_16V7K WLAN
<26> PCIE_PTX_C_IRX_N2 GPP_RX2N PCIE_ITX_C_PRX_N2 <26>
V5 Y1 PCIE_ITX_PRX_P3 C158 1 2 0.1U_0402_16V7K
W6 Y2 PCIE_ITX_PRX_N3 C159 1 2 0.1U_0402_16V7K LAN10/100
U5 GPP_RX4P GPP_TX4P Y4
2
U6 Y3 H_CADOP[0..15] H_CADIP[0..15] 2
GPP_RX4N GPP_TX4N <4> H_CADOP[0..15] H_CADIP[0..15] <4>
U8 V1 PCIE_ITX_PRX_P5 C160 1 2 0.1U_0402_16V7K
<26> PCIE_PTX_C_IRX_P5 GPP_RX5P GPP_TX5P PCIE_ITX_C_PRX_P5 <26> H_CADON[0..15] H_CADIN[0..15]
U7 V2 PCIE_ITX_PRX_N5 C161 1 2 0.1U_0402_16V7K TV Tuner<4>
<26> PCIE_PTX_C_IRX_N5 GPP_RX5N GPP_TX5N PCIE_ITX_C_PRX_N5 <26> H_CADON[0..15] H_CADIN[0..15] <4>
<19> SB_RX0P AA8 AD7 SB_TX0P_C C162 1 2 0.1U_0402_16V7K
SB_RX0P SB_TX0P SB_TX0P <19>
<19> SB_RX0N Y8 AE7 SB_TX0N_C C163 1 2 0.1U_0402_16V7K
SB_RX0N SB_TX0N SB_TX0N <19>
<19> SB_RX1P AA7 AE6 SB_TX1P_C C164 1 2 0.1U_0402_16V7K
SB_RX1P SB_TX1P SB_TX1P <19>
<19> SB_RX1N Y7 AD6 SB_TX1N_C C165 1 2 0.1U_0402_16V7K U3A
SB_RX1N SB_TX1N SB_TX1N <19>
<19> SB_RX2P AA5 PCIE I/F SB AB6 SB_TX2P_C C166 1 2 0.1U_0402_16V7K H_CADOP0 Y25 D24 H_CADIP0
SB_RX2P SB_TX2P SB_TX2P <19> HT_RXCAD0P HT_TXCAD0P
<19> SB_RX2N AA6 AC6 SB_TX2N_C C168 1 2 0.1U_0402_16V7K H_CADON0 Y24 PART 1 OF 6 D25 H_CADIN0
SB_RX2N SB_TX2N SB_TX2N <19> HT_RXCAD0N HT_TXCAD0N
<19> SB_RX3P W5 AD5 SB_TX3P_C C169 1 2 0.1U_0402_16V7K H_CADOP1 V22 E24 H_CADIP1
SB_RX3P SB_TX3P SB_TX3P <19> HT_RXCAD1P HT_TXCAD1P
<19> SB_RX3N Y5 AE5 SB_TX3N_C C167 1 2 0.1U_0402_16V7K H_CADON1 V23 E25 H_CADIN1
SB_RX3N SB_TX3N SB_TX3N <19> HT_RXCAD1N HT_TXCAD1N
H_CADOP2 V25 F24 H_CADIP2
R55 1.27K_0402_1% H_CADON2 HT_RXCAD2P HT_TXCAD2P H_CADIN2
PCE_CALRP(PCE_BCALRP) AC8 1 2 V24 HT_RXCAD2N HT_TXCAD2N F25
AB8 R56 1 2 2K_0402_1% +1.1VS H_CADOP3 U24 F23 H_CADIP3
PCE_CALRN(PCE_BCALRN) H_CADON3 HT_RXCAD3P HT_TXCAD3P H_CADIN3
U25 HT_RXCAD3N HT_TXCAD3N F22
RS780M_FCBGA528 H_CADOP4 T25 H23 H_CADIP4
H_CADON4 HT_RXCAD4P HT_TXCAD4P H_CADIN4
T24 HT_RXCAD4N HT_TXCAD4N H22
RS780M Display Port Support (muxed on GFX) H_CADOP5 P22 J25 H_CADIP5
P23 J24
HYPER TRANSPORT CPU I/F

H_CADOP6 HT_RXCAD5N HT_TXCAD5N H_CADIP6
P25 HT_RXCAD6P HT_TXCAD6P K24
GFX_TX0,TX1,TX2 and TX3 H_CADON6 P24 K25 H_CADIN6
DP0 H_CADOP7 HT_RXCAD6N HT_TXCAD6N H_CADIP7
N24 HT_RXCAD7P HT_TXCAD7P K23
AUX0 and HPD0 H_CADON7 N25 K22 H_CADIN7
HT_RXCAD7N HT_TXCAD7N
H_CADOP8 AC24 F21 H_CADIP8
GFX_TX4,TX5,TX6 and TX7 H_CADON8 HT_RXCAD8P HT_TXCAD8P H_CADIN8
AC25 HT_RXCAD8N HT_TXCAD8N G21
DP1 H_CADOP9 AB25 G20 H_CADIP9
AUX1 and HPD1 H_CADON9 HT_RXCAD9P HT_TXCAD9P H_CADIN9
AB24 HT_RXCAD9N HT_TXCAD9N H21
H_CADOP10 AA24 J20 H_CADIP10
AA25 HT_RXCAD10N HT_TXCAD10N J21
9/20 SA00001ZG00(A11) S IC 216-0674001-00/RS780M FCBGA528P 0FH H_CADOP11 Y22 J18 H_CADIP11
3 H_CADON11 HT_RXCAD11P HT_TXCAD11P H_CADIN11 3
Y23 HT_RXCAD11N HT_TXCAD11N K17
H_CADOP12 W21 L19 H_CADIP12
W20 HT_RXCAD12N HT_TXCAD12N J19
H_CADOP13 V21 M19 H_CADIP13
V20 HT_RXCAD13N HT_TXCAD13N L18
H_CADOP14 U20 M21 H_CADIP14
U21 HT_RXCAD14N HT_TXCAD14N P21
H_CADOP15 U19 P18 H_CADIP15
U18 HT_RXCAD15N HT_TXCAD15N M18
<4> H_CLKOP0 T22 HT_RXCLK0P HT_TXCLK0P H24 H_CLKIP0 <4>

<4> H_CLKON0 T23 HT_RXCLK0N HT_TXCLK0N H25 H_CLKIN0 <4>
<4> H_CLKOP1 AB23 HT_RXCLK1P HT_TXCLK1P L21 H_CLKIP1 <4>
<4> H_CLKON1 AA22 HT_RXCLK1N HT_TXCLK1N L20 H_CLKIN1 <4>
H_CTLOP0 M22 M24 H_CTLIP0
<4> H_CTLOP0 HT_RXCTL0P HT_TXCTL0P H_CTLIP0 <4>
H_CTLON0 M23 M25 H_CTLIN0
<4> H_CTLON0 HT_RXCTL0N HT_TXCTL0N H_CTLIN0 <4>
H_CTLOP1 R21 P19 H_CTLIP1
<4> H_CTLOP1 HT_RXCTL1P HT_TXCTL1P H_CTLIP1 <4>
H_CTLON1 R20 R18 H_CTLIN1
<4> H_CTLON1 HT_RXCTL1N HT_TXCTL1N H_CTLIN1 <4>
1 R57 2 301_0402_1% C23 HT_RXCALP HT_TXCALP B24 1 R58 2 301_0402_1%
A24 HT_RXCALN HT_TXCALN B25
0718 Place within 1" RS780M_FCBGA528 0718 Place within 1"

layout 1:2 layout 1:2
NEED CHECK R68 & R69 WITH AMD

4 4

RS780-HT/PCIE
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A B C D E
A B C D E
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1 1
+3VS
L2 AVDD=100mA
1 2 +AVDD1
+1.8VS
BLM18PG121SN1D_0603 1
L4
11/13 update +AVDD2 C170
+1.8VS 0_0603_5% 2.2U_0603_6.3V4Z
R67 1 2
L6
1 2 NB_LDTSTOP# 1 2 +AVDDQ C172
<6,19> LDT_STOP#
BLM18PG121SN1D_0603 2.2U_0603_6.3V4Z U3C
0_0402_5% 2
1 F12 AVDD1(NC) TXOUT_L0P(NC) A22 LVDS_A0+ <17>
E12 AVDD2(NC) PART 3 OF 6 TXOUT_L0N(NC) B22 LVDS_A0- <17>
C175 F14 AVDDDI(NC) A21 LVDS_A1+ <17>
2.2U_0603_6.3V4Z TXOUT_L1P(NC)
R68 G15 AVSSDI(NC) TXOUT_L1N(NC) B21 LVDS_A1- <17>
2
H15 AVDDQ(NC) TXOUT_L2P(NC) B20 LVDS_A2+ <17>
1 2 NB_ALLOW_LDTSTOP H14 AVSSQ(NC) A20 LVDS_A2- <17>
<6,19> CPU_LDT_REQ# TXOUT_L2N(DBG_GPIO0)
TXOUT_L3P(NC) A19
0_0402_5% T46 PAD TV_CRMA E17 B19
T47 PAD TV_LUMA C_Pr(DFT_GPIO5) TXOUT_L3N(DBG_GPIO2)
F17
CRT/TVOUT
T48 PAD TV_COMPS Y(DFT_GPIO2)
F15 COMP_Pb(DFT_GPIO4) TXOUT_U0P(NC) B18 LVDS_B0+ <17>
11/05 update RED TXOUT_U0N(NC) A18 LVDS_B0- <17>
<16> RED G18 RED(DFT_GPIO0) TXOUT_U1P(PCIE_RESET_GPIO3) A17 LVDS_B1+ <17>
1 2 RED G17 B17 LVDS_B1- <17>
R62 150_0402_1% GREEN REDb(NC) TXOUT_U1N(PCIE_RESET_GPIO2)
<16> GREEN E18 GREEN(DFT_GPIO1) TXOUT_U2P(NC) D20 LVDS_B2+ <17>
1 2 GREEN F18 D21 LVDS_B2- <17>
R63 150_0402_1% BLUE GREENb(NC) TXOUT_U2N(NC)
<16> BLUE E19 BLUE(DFT_GPIO3) TXOUT_U3P(PCIE_RESET_GPIO5) D18
1 2 BLUE F19 D19
R64 150_0402_1% BLUEb(NC) TXOUT_U3N(NC)
2 +1.1VS L9 CRT_HSYNC A11 B16 2
<14,16> CRT_HSYNC DAC_HSYNC(PWM_GPIO4) TXCLK_LP(DBG_GPIO1) LVDS_ACLK+ <17>
1 2 CRT_VSYNC B11 A16 LVDS_ACLK- <17>
<14,16> CRT_VSYNC DAC_VSYNC(PWM_GPIO6) TXCLK_LN(DBG_GPIO3)
BLM18PG121SN1D_0603 1 F8 D16 LVDS_BCLK+ <17>
+1.8VS <16> UMA_CRT_CLK DAC_SCL(PCE_RCALRN) TXCLK_UP(PCIE_RESET_GPIO4)
L7 C178 E8 D17 LVDS_BCLK- <17>
<16> UMA_CRT_DAT DAC_SDA(PCE_TCALRN) TXCLK_UN(PCIE_RESET_GPIO1)
1 2
BLM18PG121SN1D_0603 1 2.2U_0603_6.3V4Z R65 1 2 715_0402_1% G14 L3
+1.8VS L10 C176 2 DAC_RSET(PWM_GPIO1) +VDDLTP18
VDDLTP18(NC) A13 1 2 +1.8VS
1 2 +NB_PLLVDD A12 B13 1 BLM18PG121SN1D_0603
BLM18PG121SN1D_0603 2.2U_0603_6.3V4Z +NB_HTPVDD PLLVDD(NC) VSSLTP18(NC)
1 D14 PLLVDD18(NC)
+1.8VS L11 C179 2 +VDDLT18 C171
B12 A15
LVTM
PLLVSS(NC) VDDLT18_1(NC) 2.2U_0603_6.3V4Z
1 2 B15
PLL PWR
BLM18PG121SN1D_0603 2.2U_0603_6.3V4Z +VDDA18HTPLL VDDLT18_2(NC) 2 L5
1 H17 VDDA18HTPLL VDDLT33_1(NC) A14
2
VDDLT33_2(NC) B14 1 2 +1.8VS
C180 +VDDA18PCIEPLL D7 1 1 BLM18PG121SN1D_0603
2.2U_0603_6.3V4Z VDDA18PCIEPLL1
E7 VDDA18PCIEPLL2 VSSLT1(VSS) C14
2 R66 0_0402_5% C173 C174
VSSLT2(VSS) D15
<14,19,25,26,27,32,33> PLT_RST# 1 2 NB_RESET# D8 SYSRESETb VSSLT3(VSS) C16 0.1U_0402_16V4Z 4.7U_0805_10V4Z
NB_PW RGD 2 2
<20> NB_PWRGD A10 POWERGOOD VSSLT4(VSS) C18
NB_LDTSTOP# C10 C20 0.08A/10mil/1vias
+1.8VS 1 2 NB_ALLOW_LDTSTOP C12
LDTSTOPb VSSLT5(VSS)
E20 L
PM
R371 10K_0402_5% ALLOW_LDTSTOP VSSLT6(VSS)
L Install when SB700 A12 use 11/13 update VSSLT7(VSS) C22
<15> CLK_NBHT C25 HT_REFCLKP
<15> CLK_NBHT# C24 HT_REFCLKN
<15> NB_OSC_14.318M E11
CLOCKs
REFCLK_P/OSCIN(OSCIN)
F11 REFCLK_N(PWM_GPIO3) LVDS_DIGON(PCE_TCALRP) E9 1 2 UMA_ENVDD <17>
F7 R69 1 20_0402_5% ENBKL <33>
LVDS_BLON(PCE_RCALRP) R70 0_0402_5%
+1.1VS 1 2 1 2 <15> NBGFX_CLK T2 GFX_REFCLKP LVDS_ENA_BL(PWM_GPIO2) G12
R71 R72
4.7K_0402_5% 4.7K_0402_5%
<15> NBGFX_CLK# T1 GFX_REFCLKN PA_RS780A4
U1 GPP_REFCLKP placement close to NB ball
U2 GPP_REFCLKN
3 3
V4
<15>
<15>
CLK_SBLINK_BCLK
CLK_SBLINK_BCLK# V3
GPPSB_REFCLKP(SB_REFCLKP)
GPPSB_REFCLKN(SB_REFCLKN)
flash issue check IALAA
<17> LCD_DDC_CLK B9 I2C_CLK
<17> LCD_DDC_DAT A9
B8
I2C_DATA MIS. TMDS_HPD(NC) D9
D10
HPD <18>
<18> HDMIDAT_UMA DDC_DATA0/AUX0N(NC) HPD(NC)
<18> HDMICLK_UMA A8 DDC_CLK0/AUX0P(NC) SUS_STAT_R# <14> Strap pin
<14> RS780_DFT_GPIO_0 B7 DDC_CLK1/AUX1P(NC) SUS_STAT#(PWM_GPIO5) D12 1 2 SUS_STAT# <20>
Strap pin A7 R77 0_0402_5%
DDC_DATA1/AUX1N(NC)
THERMALDIODE_P AE8 NB_THERMAL_DA PAD T49
+3VS 2 1 B10 STRP_DATA THERMALDIODE_N AD8 NB_THERMAL_DC PAD T50 NB temp to SB
R88 10K_0402_5%
G11 RSVD TESTMODE D13 1 2
R80
C8 1.8K_0402_5%
<14> AUX_CAL AUX_CAL(NC)
Strap pin
RS780M_FCBGA528
4 4

RS780 VEDIO/CLK GEN
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A B C D E
A B C D E
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U61 U3D
MEM_BA0 L2 B9 MEM_DQ15 PAR 4 OF 6
MEM_BA1 BA0 DQ15 MEM_DQ11 MEM_A0 MEM_DQ0
L3 BA1 DQ14 B1 AB12 MEM_A0(NC) MEM_DQ0/DVO_VSYNC(NC) AA18
D9 MEM_DQ13 MEM_A1 AE16 AA20 MEM_DQ1
MEM_A12 DQ13 MEM_DQ12 MEM_A2 MEM_A1(NC) MEM_DQ1/DVO_HSYNC(NC) MEM_DQ2
R2 A12 DQ12 D1 V11 MEM_A2(NC) MEM_DQ2/DVO_DE(NC) AA19
MEM_A11 P7 D3 MEM_DQ8 MEM_A3 AE15 Y19 MEM_DQ3
MEM_A10 A11 DQ11 MEM_DQ10 MEM_A4 MEM_A3(NC) MEM_DQ3/DVO_D0(NC) MEM_DQ4
M2 A10/AP DQ10 D7 AA12 MEM_A4(NC) MEM_DQ4(NC) V17
1 MEM_A9 MEM_DQ9 MEM_A5 MEM_DQ5 1
P3 A9 DQ9 C2 AB16 MEM_A5(NC) MEM_DQ5/DVO_D1(NC) AA17
MEM_A8 P8 C8 MEM_DQ14 MEM_A6 AB14 AA15 MEM_DQ6
P2 A7 DQ7 F9 AD14 MEM_A7(NC) MEM_DQ7/DVO_D4(NC) Y15
MEM_A6 N7 F1 MEM_DQ7 MEM_A8 AD13 AC20 MEM_DQ8
N3 A5 DQ5 H9 AD15 MEM_A9(NC) MEM_DQ9/DVO_D5(NC) AD19
SBD_MEM/DVO_I/F
MEM_A4 N8 H1 MEM_DQ6 MEM_A10 AC16 AE22 MEM_DQ10
N2 A3 DQ3 H3 AE13 MEM_A11(NC) MEM_DQ11/DVO_D7(NC) AC18
MEM_A2 M7 H7 MEM_DQ0 MEM_A12 AC14 AB20 MEM_DQ12
MEM_A1 A2 DQ2 MEM_DQ4 MEM_A12(NC) MEM_DQ12(NC) MEM_DQ13
M3 A1 DQ1 G2 Y14 MEM_A13(NC) MEM_DQ13/DVO_D9(NC) AD22
MEM_A0 M8 G8 MEM_DQ2 AC22 MEM_DQ14
A0 DQ0 MEM_BA0 MEM_DQ14/DVO_D10(NC) MEM_DQ15
AD16 MEM_BA0(NC) MEM_DQ15/DVO_D11(NC) AD21
1
MEM_BA1 AE17
R91 MEM_CLKN MEM_BA2 MEM_BA1(NC) MEM_DQS_P0
K8 CK VDDQ A9 +1.8V_MEM_VDDQ AD17 MEM_BA2(NC) MEM_DQS0P/DVO_IDCKP(NC) Y17
MEM_CLKP J8 C1 W18 MEM_DQS_N0 MEM_COMP_P and MEM_COMP_N trace
100_0402_1% CK VDDQ MEM_RAS# MEM_DQS0N/DVO_IDCKN(NC) MEM_DQS_P1
C3 W12 AD20
SIDE@ MEM_CKE K2
VDDQ
C7 MEM_CAS# Y12
MEM_RASb(NC) MEM_DQS1P(NC)
AE21 MEM_DQS_N1 width >=10mils and 10mils spacing from
2
CKE VDDQ MEM_CASb(NC) MEM_DQS1N(NC)

VDDQ C9 MEM_WE# AD18 MEM_WEb(NC)
other Signals in X,Y,Z directions
E9 MEM_CS# AB13 W17 MEM_DM0
VDDQ MEM_CKE MEM_CSb(NC) MEM_DM0(NC) MEM_DM1 +1.8VS
VDDQ G1 AB18 MEM_CKE(NC) MEM_DM1/DVO_D8(NC) AE19
MEM_CS# L8 G3 MEM_ODT V14 L12
CS VDDQ MEM_ODT(NC) L13 +1.8V_IOPLLVDD
VDDQ G7 IOPLLVDD18(NC) AE23 1 2
MEM_WE# K3 G9 MEM_CLKP V15 AE24 +NB_IOPLLVDD 1 2 +1.1VS BLM18PG121SN1D_0603
WE VDDQ MEM_CLKN MEM_CKP(NC) IOPLLVDD(NC) BLM18PG121SN1D_0603
W14 MEM_CKN(NC) 1 1
MEM_RAS# K7 A1 AD23 1
RAS VDD MEM_COMP_P IOPLLVSS(NC) C181 C183
VDD E1 2 1 AE12 MEM_COMPP(NC)
MEM_CAS# L7 J9 R92 SIDE@40.2_0402_1% AD12 AE18 +MEM_VREF1 2.2U_0603_6.3V4Z C182 2.2U_0603_6.3V4Z
CAS VDD MEM_COMP_N MEM_COMPN(NC) MEM_VREF(NC) 2 0.1U_0402_16V4Z 2
VDD M9 +1.8V_MEM_VDDQ 2 1
MEM_DM0 R93 SIDE@40.2_0402_1% RS780M_FCBGA528 SIDE@ 2 SIDE@ SIDE@
F3 LDM VDD R1
MEM_DM1 B3 L96
UDM +VDDL
VDDL J1 1 2 +1.8V_MEM_VDDQ
J7 SIDE@0_0603_5% 09/19 update
MEM_ODT VSSDL
K9 ODT 1
2 C184 2
MEM_DQS_P0 F7 SIDE@1U_0603_10V6K
MEM_DQS_N0 LDQS 2
E8 LDQS VSSQ A7 Layout Note: 50 mil for VSSDL
VSSQ B2
VSSQ B8
VSSQ D2
MEM_DQS_P1 B7 D8
MEM_DQS_N1 UDQS VSSQ
A8 UDQS VSSQ E7
VSSQ F2
+MEM_VREF VSSQ F8 09/19 update

J2 VREF VSSQ H2
VSSQ H8 Del SI3456 and MEM related Pull-high.
A2 NC
E2 NC VSS A3
MEM_BA2 L1 E3
NC VSS
R3 NC VSS J3
R7 NC VSS N1
R8 NC VSS P9
HY5PS561621AFP-25_FBGA84
SIDE@
9/20 SA000012G20 S IC D2 32M16 HY5PS121621CFP-25 FBGA 84P
3 3
Side Port disable,VREF need
connect to +1.8VS for DDR2
+1.8V_MEM_VDDQ +1.8V_MEM_VDDQ
10/8 update
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
2
1K_0402_1%
1K_0402_1%
1 1
+1.8V_MEM_VDDQ
10/8 update +1.8VS
C195
C196
SIDE@ SIDE@ SIDE@ SIDE@

R96
R97
L15
2 2
1 2
1
1U_0402_6.3V4Z
1U_0402_6.3V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
22U_0805_6.3V6M
SIDE@ 0_0805_5%
+MEM_VREF +MEM_VREF1
2 2 1 1 1 220 ohm @ 100MHz,2A
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C608
C607
C201
C202
SIDE@ SIDE@ SIDE@ SIDE@ C203

1 1 SIDE@
2
1 1 2 2 2
1K_0402_1%
1K_0402_1%
C199
C200
SIDE@ SIDE@ SIDE@

SIDE@
2 2
R98
R99
1
4 4

RS780 Side-Port DDR2 SDRAM
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A B C D E
A B C D E
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U3F
1 1
A25 VSSAHT1 VSSAPCIE1 A2
D23 VSSAHT2 PART 6/6 VSSAPCIE2 B1
E22 VSSAHT3 VSSAPCIE3 D3
G22 VSSAHT4 VSSAPCIE4 D5
L 0.6A/50mil/4vias G24 VSSAHT5 VSSAPCIE5 E4
G25 VSSAHT6 VSSAPCIE6 G1
L16 2A H19 G2
+VDDHT VSSAHT7 VSSAPCIE7
+1.1VS 2 1 J22 VSSAHT8 VSSAPCIE8 G4
0.1U_0402_16V4Z 0.1U_0402_16V4Z L17 H7
FBMA-L11-201209-221LMA30T_0805 VSSAHT9 VSSAPCIE9
1 C206 1 1 C2081 1 L22 VSSAHT10 VSSAPCIE10 J4
C210 0.7A/60mil/4vias L17 L24 R7
C209 L 1 2 +1.1VS L25
VSSAHT11
VSSAHT12
VSSAPCIE11
VSSAPCIE12 L1
4.7U_0805_10V4Z C207 0.1U_0402_16V4Z VDDA_12=2.5A FBMA-L11-201209-221LMA30T_0805 M20 L2
2 2 2 2 2 U3E VSSAHT13 VSSAPCIE13
N22 VSSAHT14 VSSAPCIE14 L4
0.1U_0402_16V4Z J17 A6 +VDDA11PCIE P20 L7
VDDHT_1 VDDPCIE_1 C211 10U_0805_10V4Z VSSAHT15 VSSAPCIE15
K16 VDDHT_2 PART 5/6 VDDPCIE_2 B6 R19 VSSAHT16 VSSAPCIE16 M6
L18 L 0.45A/40mil/3vias L16 VDDHT_3 VDDPCIE_3 C6

C212 10U_0805_10V4Z
R22 VSSAHT17 VSSAPCIE17 N4
M16 VDDHT_4 VDDPCIE_4 D6 R24 VSSAHT18 VSSAPCIE18 P6
2 1 2A +VDDHTRX P16 E6 R25 R1
0.1U_0402_16V4Z 0.1U_0402_16V4Z VDDHT_5 VDDPCIE_5 C220 1U_0402_6.3V4Z VSSAHT19 VSSAPCIE19
R16 VDDHT_6 VDDPCIE_6 F6 1 2 H20 VSSAHT20 VSSAPCIE20 R2
FBMA-L11-201209-221LMA30T_0805 1 1 1 C217 1 1 T16 G7 C219 1 2 1U_0402_6.3V4Z U22 R4
C214 C218 VDDHT_7 VDDPCIE_7 C222 1U_0402_6.3V4Z VSSAHT21 VSSAPCIE21
VDDPCIE_8 H8 1 2 V19 VSSAHT22 VSSAPCIE22 V7
C215 H18 J9 C221 1 2 1U_0402_6.3V4Z W22 U4
GROUND
4.7U_0805_10V4Z C216 0.1U_0402_16V4Z VDDHTRX_1 VDDPCIE_9 C224 0.1U_0402_16V4Z VSSAHT23 VSSAPCIE23
G19 VDDHTRX_2 VDDPCIE_10 K9 2 1 W24 VSSAHT24 VSSAPCIE24 V8
2 2 2 2 2 C223 0.1U_0402_16V4Z
F20 VDDHTRX_3 VDDPCIE_11 M9 2 1 W25 VSSAHT25 VSSAPCIE25 V6
0.1U_0402_16V4Z E21 L9 Y21 W1
VDDHTRX_4 VDDPCIE_12 VSSAHT26 VSSAPCIE26
D22 VDDHTRX_5 VDDPCIE_13 P9 AD25 VSSAHT27 VSSAPCIE27 W2
B23 VDDHTRX_6 VDDPCIE_14 R9 VSSAPCIE28 W4
L19 L 0.5A/50mil/4vias A23 VDDHTRX_7 VDDPCIE_15 T9 L12 VSS11 VSSAPCIE29 W7

VDDPCIE_16 V9 M14 VSS12 VSSAPCIE30 W8
+1.2V_HT 2 1 2A +VDDHTTX AE25 U9 N13 Y6
FBMA-L11-201209-221LMA30T_0805 VDDHTTX_1 VDDPCIE_17 VSS13 VSSAPCIE31
AD24 VDDHTTX_2 P12 VSS14 VSSAPCIE32 AA4
2 L20 1 2
1 1 1 1 1 AC23 VDDHTTX_3 VDDC_1 K12 +1.1VS 2 +NB_VDDC P15 VSS15 VSSAPCIE33 AB5
11/20 update L95 AB22 J14 FBMA-L11-201209-221LMA30T_0805 R11 AB1
C225 C226 C227 C228 C229 VDDHTTX_4 VDDC_2 L21 1 VSS16 VSSAPCIE34
+1.35VS 2 1 AA21 VDDHTTX_5 VDDC_3 U16 2 R14 VSS17 VSSAPCIE35 AB7
@ FBMA-L11-201209-221LMA30T_0805 Y20 J11 FBMA-L11-201209-221LMA30T_0805 T12 AC3
2 2 2 2 2 VDDHTTX_6 VDDC_4 VSS18 VSSAPCIE36
W19 VDDHTTX_7 VDDC_5 K15 U14 VSS19 VSSAPCIE37 AC4
7A/280mil/16vias VDD_CORE=5A
POWER
V18 M12 U11 AE1
U17
VDDHTTX_8
VDDHTTX_9
VDDC_6
VDDC_7 L14 L U15
VSS20
VSS21
VSSAPCIE38
VSSAPCIE39 AE4
4.7U_0805_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z T17 L11 330U_D2E_2.5VM_R15 V12 AB2
0.1U_0402_16V4Z 0.1U_0402_16V4Z VDDHTTX_10 VDDC_8 VSS22 VSSAPCIE40
R17 VDDHTTX_11 VDDC_9 M13 W11 VSS23
P17 VDDHTTX_12 VDDC_10 M15 W15 VSS24
L 0.25A/30mil/2vias M17 VDDHTTX_13 VDDC_11 N12 AC12 VSS25 VSS1 AE14
C247
C240
C241
C242
C243
C230
C231
C244
C232
C233
C245
L22 2A N14 1 AA14 D11
+VDDA18PCIE VDDC_12 C234 VSS26 VSS2
+1.8VS 2 1 J10 VDDA18PCIE_1 VDDC_13 P11 1 1 1 1 1 1 1 1 1 1 1 Y18 VSS27 VSS3 G8
P10 P13 + AB11 E14
FBMA-L11-201209-221LMA30T_0805 VDDA18PCIE_2 VDDC_14 VSS28 VSS4
1 1 1 1 1 1 K10 VDDA18PCIE_3 VDDC_15 P14 AB15 VSS29 VSS5 E15
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
10U_0805_10V4Z
10U_0805_10V4Z
M10 VDDA18PCIE_4 VDDC_16 R12 AB17 VSS30 VSS6 J15
C235 C246 C236 C237 C238 C239 2 2 2 2 2 2 2 2 2 2 2 2
L10 VDDA18PCIE_5 VDDC_17 R15 AB19 VSS31 VSS7 J12
4.7U_0805_10V4Z W9 T11 AE20 K14
2 2 2 2 2 2 VDDA18PCIE_6 VDDC_18 VSS32 VSS8
H9 VDDA18PCIE_7 VDDC_19 T15 AB21 VSS33 VSS9 M11
T10 VDDA18PCIE_8 VDDC_20 U12 K11 VSS34 VSS10 L15
R10 VDDA18PCIE_9 VDDC_21 T14
4.7U_0805_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z Y9 J16 RS780M_FCBGA528
0.1U_0402_16V4Z 0.1U_0402_16V4Z VDDA18PCIE_10 VDDC_22
AA9 VDDA18PCIE_11
AB9 VDDA18PCIE_12 VDD_MEM1(NC) AE10
+1.8VS
AD9 VDDA18PCIE_13 VDD_MEM2(NC) AA11 10/04 update
AE9 VDDA18PCIE_14 VDD_MEM3(NC) Y11
U10 VDDA18PCIE_15 VDD_MEM4(NC) AD10
AB10 SIDE@0_0603_5% C249 2 1 SIDE@4.7U_0805_10V4Z
VDD_MEM5(NC) +1.8V_VDD_MEM 1 C248 SIDE@0.1U_0402_16V4Z
+1.8VS F9 VDD18_1 VDD_MEM6(NC) AC10 2 2 1
G9 R1054 C597 2 1 SIDE@0.1U_0402_16V4Z
VDD18_2
1 2 +1.8V_VDD_SP AE11 H11 0.15A/30mil/2vias C598 2 1 SIDE@0.1U_0402_16V4Z
3
+1.8VS
R1051 0_0603_5% AD11
VDD18_MEM1(NC)
VDD18_MEM2(NC)
VDD33_1(NC)
VDD33_2(NC) H12 L C599 2 1 SIDE@0.1U_0402_16V4Z
3
11/13 update RS780M_FCBGA528
1 1
C251 +3VS
1U_0402_6.3V4Z C252
1U_0402_6.3V4Z 1 2
2 2 0.1U_0402_16V4Z C250
1 2
0.1U_0402_16V4Z C253
+1.8VS L Just for RS780M A11 version boot issue

U64
1 VIN VCNTL 6 +3VS
1 2 GND NC 5
C1064
1
3 VREF NC 7 1
@ 10U_0805_10V4Z C1065
2 R1015 4 VOUT NC 8
1K_0402_1% @ 1U_0603_10V6K
2
9
2
TP
@ G2992F1U_SO8
@ +VREF1.35V
+1.35VS
1
Q163 R1016
@ 2N7002_SOT23-3 2 1
1
4 D @ 3K_0402_5% C1067 4
<36> VLDT_EN# 1 2 2
2
R1017 @ 0_0402_5% G C1066 @ 10U_0805_10V4Z

1 2
10/8 update 2 S
3
C1068
@ 0.1U_0402_16V7K @ 0.1U_0402_16V7K
1
11/20 update RS780 PWR/GND
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A B C D E
A B C D E
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1 1
DFT_GPIO5:STRAP_DEBUG_BUS_GPIO_ENABLEb
RS780 DFT_GPIO5 mux at CRT_VSYNC pull low to 3K
<11,16> CRT_VSYNC 2 1 +3VS Enables the Test Debug Bus using GPIO.
R101 1K_0402_5%
1 : Disable (RS780) Enable (RX780)
2 1
R102 @ 1K_0402_5% 0 : Enable (RS780) Disable (RX780)
11/28 update PIN: RX780:NB_TV_C; RS740: RS740_DFT_GPIO5; RS780: VSYNC#
11/28 update
2 2
DFT_GPIO1: LOAD_EEPROM_STRAPS
<11> AUX_CAL 1 2
@ R104 150_0402_1% Selects Loading of STRAPS from EPROM
D4 @ CH751H-40PT_SOD323-2
1 : Bypass the loading of EEPROM straps and use Hardware Default Values
RS780 DFT_GPIO1 <11> 2 1 0 : I2C Master can load strap values from EEPROM if connected, or use
SUS_STAT_R# PLT_RST# <11,19,25,26,27,32,33>
default values if not connected
RS740/RX780: DFT_GPIO1 RS780:SUS_STAT
RX780 DFT_GPIO1 mux at GREEN(Ball E18) and change pull low form 150 to 3K.
3 3
DFT_GPIO0: STRAP_DEBUG_BUS_PCIE_ENABLEb
<11> RS780_DFT_GPIO_0 2 1
@ R105 1K_0402_5% RX780: Enables the Test Debug Bus using PCIE bus
1 : Disable ( Can still be enabled using nbcfg register access )
0 : Enable
RS780 use HSYNC to enable SIDE PORT (internal pull high)
RS740/RS780: Enables Side port memory ( RS780 use HSYNC#)
1. Disable (RS740/RS780)
<11,16> CRT_HSYNC 2 1
R107 SIDE@3K_0402_5% 0 : Enable (RS740/RS780)
10/09 update
4 4

RS780 STRAPS
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A B C D E
A B C D E
WWW.AliSaler.Com +3VS
R167
+3VS_CLK
+1.2V_HT +VDDCLK_IO
1 2
R168 0_0805_5% 1 1 1 1 1 1 1 1
1 2 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z C445 C446 C447 C448 C449 C450 @ C451
0_0805_5% C444
1 1 1 1 1 1
10U_0805_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 1U_0402_6.3V4Z
C452 C453 C454 C455 C456 C457 2 2 2 2 2 2 2 2
10U_0805_10V4Z
2 2 2 2 2 2
0.1U_0402_16V4Z 0.1U_0402_16V4Z 1 1 1 1
C458 C459 C460 C461
1 1
0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
2 2 2 2
EMI Caps for single end clock.
CLK_48M_USB
R170 1 2 33_0402_5% OSC_14M_NB NB_OSC_14.318M

CLK_48M_USB <20>
1
1 2 RX780 1.8V 75R/100R CLK_14M_SIO C1074
R379 200_0402_1% NB_OSC_14.318M <11>
1
+3VS_CLK
CLK_XTAL_OUT 1 2 RS780 1.1V 200R/100R @ 5P_0402_50V8C
R380 100_0402_1% 2
1
CLK_XTAL_IN R220 33_0402_5% C1076
2
1 2 CLK_14M_SIO <32>
@ 5P_0402_50V8C
Y2 CLK_NBHT <11>
NB_OSC_14.318M_R
+3VS_CLK
+3VS_CLK
2
CLK_NBHT# <11> NB
CLK_48M_USB_R
2 1
CLK_XTAL_OUT
1 2 +3VS_CLK @ 5P_0402_50V8C
CLK_CPU_BCLK <6>
CLK_XTAL_IN
14.31818MHZ_20P_6X1430004201 R174 8.2K_0402_5% C1075
SEL_SATA
2
27M_SEL
1 1
2 C464 C465 CLK_CPU_BCLK_R R186 2
1 2
R946 0_0402_1% @ 261_0402_1% CPU
22P_0402_50V8J 22P_0402_50V8J CLK_CPU_BCLK#_R 1 2 10/03 update
2 2 R945 0_0402_1%
09/29 update
1
09/21 update CLK_CPU_BCLK# <6>
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
Routing the trace at least 10mil U10
GND
XTAL_IN
REF_1/SEL_SATA
VSS_48
48MHz_0
48MHz_1
VDD_48
PD#
CPU_K8_0
XTAL_OUT
REF_2/SEL_27
HTT_0/66M_0
HTT_0#/66M_1
CPU_K8_0#
VSS_REF
REF_0/SEL_HTT66
VDD_REF
VDD_HTT
VSS_HTT
<8,9,20,30> SMB_CK_CLK0 1 SCL VDD_CPU 54 +3VS_CLK
<8,9,20,30> SMB_CK_DAT0 2 SDA VDD_CPU_I/O 53 +VDDCLK_IO
+3VS_CLK 3 VDD_DOT VSS_CPU 52
4 51 CLKREQ_NCARD#
SRC_7#/27M CLKREQ_1# CLKREQ_MCARD2# CLKREQ_NCARD# <26>
5 SRC_7/27M_SS CLKREQ_2# 50
CLKREQ_MCARD2# <26>
6 VSS_DOT VDD_A 49 +3VS_CLK
7 SRC_5# VSS_A 48
8 SRC_5 VSS_SATA 47
PA_RS7X0A1 <11> CLK_SBLINK_BCLK# 9 SRC_4# SRC_6/SATA 46 CLK_SBSRC_BCLK <19> PA_RS7X0A1
SB LINK <11> CLK_SBLINK_BCLK 10 SRC_4 SRC_6#/SATA# 45 CLK_SBSRC_BCLK# <19>SB SRC
11 VSS_SRC VDD_SATA 44 +3VS_CLK
+VDDCLK_IO 12 43 CLKREQ_MCARD1#
VDD_SRC_IO CLKREQ_3# CLKREQ_MCARD1# <26>
13 42 CLKREQ4
<26> CLK_PCIE_MCARD1# SRC_3# CLKREQ_4#
MiniCard_1 <26> CLK_PCIE_MCARD1 14 SRC_3 SB_SRC_SLOW# 41 1 2 +3VS_CLK
15 40 R372 10K_0402_5% For ICS need to pull high.
<26> CLK_PCIE_MCARD2# SRC_2# SB_SRC_0
MiniCard_2 <26> CLK_PCIE_MCARD2 16 SRC_2 SB_SRC_0# 39 For SLG is NC
+3VS_CLK 17 VDD_SRC VDD_SB_SRC 38 +3VS_CLK
+VDDCLK_IO 18 VDD_SRC_IO VDD_SB_SRC_IO 37 +VDDCLK_IO
VDD_ATIG_IO
VSS_SB_SRC
ATIGCLK_2#
ATIGCLK_1#
ATIGCLK_0#
CLKREQ_0#
SB_SRC_1#
ATIGCLK_2
ATIGCLK_1
ATIGCLK_0
SB_SRC_1
VDD_ATIG
VSS_ATIG
3 3
VSS_SRC
SRC_1#
SRC_0#
SRC_1
SRC_0
SLG8SP626VTR_QFN72_10x10
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
CLKREQ_NCARD# 1 2 +3VS_CLK
+3VS_CLK 9/20 SA00001Z300 S IC SLG8SP626VTR QFN 72P CLK GEN R324 8.2K_0402_5%
9/20 SA000025B00 S IC RTM880N-795-GRT QFN 72P CLK GEN CLKREQ_MCARD2# 1 2
R325 8.2K_0402_5%
CLKREQ_MCARD1# 1 2
2
R326 8.2K_0402_5%
+VDDCLK_IO
+3VS_CLK
@ R179 CLKREQ_LAN# 1 2
8.2K_0402_5% R1039 8.2K_0402_5%
CLKREQ4 1 2
R1045 @ 8.2K_0402_5%
NBGFX_CLK <11>
1
+3VS_CLK
SEL_SATA
NBGFX_CLK# <11> NB GFX 11/28 update
CLK_PCIE_MCARD0 <27>
CLK_PCIE_MCARD0# <27> Card Reader
2
CLKREQ_LAN#
CLKREQ_LAN# <25>
R181 R180
CLK_PCIE_LAN <25>
8.2K_0402_5% 8.2K_0402_5% GLAN NB CLOCK INPUT TABLE
CLK_PCIE_LAN# <25>
NB CLOCKS RX780 RS780
CLK_PCIE_NCARD <26>
1
27M_SEL New Card

CLK_PCIE_NCARD# <26>
HT_REFCLKP
100M DIFF 100M DIFF
HT_REFCLKN 100M DIFF 100M DIFF
1 configure as SATA output 1 * configure as 27M and 27M_SS output REFCLK_P

4 SEL_SATA 27M_SEL 14M SE (1.8V) 14M SE (1.1V) 4
*
0 configure as normal SRC(SRC_6) output 0 configure as SRC_7 output REFCLK_N NC vref
* default * default
GFX_REFCLK 100M DIFF 100M DIFF(IN/OUT)*
Use voltage divider resistor R379 & R380 to pull low
NB_OSC_14.318M
1 configure as single-ended 66MHz output Security Classification Compal Secret Data Compal Electronics, Inc.
0* configure as differential 100MHz output
* default
Clock generator
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A B C D E
A B C D E
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1
CRT CONNECTOR 1
+5VS +R_CRT_VCC +CRT_VCC

D36 F2
2 1 1 2
1
@ D35 @ D37 @ D34 1
RB491D_SOT23 1A_6VDC_MINISMDC110
C475
0.1U_0402_16V4Z
+3VS 2
DAN217_SC59 DAN217_SC59DAN217_SC59
3
JCRT
11/14 update
6 RGND
L47 11
RED RED_L ID0
<11> RED 1 2 1 Red
BLM15AG121SN1D_0402 7
L48 D_DDCDATA GGND
12 SDA
<11> GREEN GREEN 1 2 GREEN_L 2 Update PCB
BLM15AG121SN1D_0402 Green
8 BGND
L49 HSYNC 13 Footprint SUYIN_070546FR015S263ZR_15P-T
BLUE BLUE_L Hsync
<11> BLUE 1 2 3 Blue : Change back
BLM15AG121SN1D_0402 +CRT_VCC 9 +5V JCRT.5<->JCRT.15 ;
6P_0402_50V8K
6P_0402_50V8K
6P_0402_50V8K
22P_0402_50V8J
22P_0402_50V8J
22P_0402_50V8J
VSYNC 14 Vsync
150_0402_1%
150_0402_1%
150_0402_1%
1 1 1 4 res JCRT.14<->JCRT.4 ;
1
1 1 1 10 SGND
R214 R211 R217 C471 C859 C469 C858 C476 C472 D_DDCCLK 15 SCL
JCRT.13<->JCRT.3 ;
5 GND JCRT.12<->JCRT.2 ;
2 2 2 2 2
2 2 2 JCRT.11<->JCRT.1
16
2
GND
17 GND
CONN@ SUYIN_070546FR015S263ZR
RED_L <35>
GREEN_L <35>
+3VS BLUE_L <35>
+CRT_VCC
+CRT_VCC
D_VSYNC <35>
1
1 2 D_HSYNC <35>
R237 R238 C473
5
1
4.7K_0402_5% 4.7K_0402_5% R100 R218 0.1U_0402_16V4Z
P
OE#
2
6.8K_0402_5% 6.8K_0402_5% 2 4 D_HSYNC R240 1 2 0_0603_5% HSYNC

<11,14> CRT_HSYNC
2
A Y
G
<11> UMA_CRT_DAT 1 6 D_DDCDATA U14
D_DDCDATA <35>
Q10A SN74AHCT1G125GW_SOT353-5
3
2N7002DW-7-F_SOT363-6
5
<11> UMA_CRT_CLK 4 3 D_DDCCLK 1 2 11/07 update

D_DDCCLK <35>
5
1
Q10B @ C477
2N7002DW-7-F_SOT363-6 1 1 0.1U_0402_16V4Z
P
OE#
2 A 4 D_ VSYNC R241 1 2 0_0603_5% VSYNC
<11,14> CRT_VSYNC Y
@ C857 @ C856
10P_0402_50V8J
10P_0402_50V8J
3 U13 3
470P_0402_50V8J 2 2 470P_0402_50V8J SN74AHCT1G125GW_SOT353-5 1 1
3
@ C474 @ C470
2 2
4 4

CRT Connector
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A B C D E
A B C D E
WWW.AliSaler.Com
WebCam+Digital Mic Reserve +5VALW +USB_CAM USB_VCCA is +3.9V, R892:100K;
R891:215KKohm
1
11/13 update U54
G916 Vref=1.25V when U54 install
1
JP7 PJP4
1 USB20P5 1 7 PAD-OPEN 2x2m 1 5 R891 G916-390T1UF 1
USB20N5 1 G1 VIN VOUT
2 2
3 2 @ 215K_0402_1% C718 install when U54 is
+USB_CAM
DMICCLK 4
3 GND
2 L
2
DMICDAT 4 C719 RT9193-39GB
L Close to JP7 @ C1072
2 5 5 3 EN BP 4
6 6 G2 8 2
1
C720 RT9193-39GB_SOT23-5 1 10U_0805_10V4Z
10U_0805_10V4Z ACES_88231-06001 C718 R892 1
1
1 10U_0805_10V4Z
CONN@
1 R1013 0.1U_0402_16V4Z @ 100K_0402_1%
L Place R1027~R1030 2 L Close to JLVDS
2
close to JLVDS 0_0402_5%
D22
R1027 @ 0_0402_5%
2
USB20_P5 1 2 USB20P5 @ R1014 +USB_CAM 4 2 USB20_P5
USB20_N51 VIN IO1
D52 2 USB20N5 1 2 CAM_SHDN# <21>
R1028 @ 0_0402_5% 0_0402_5% USB20_N5 3 1
USB20P5 IO2 GND
+USB_CAM 4 VIN IO1 2
@ PRTR5V0U2X_SOT143-4
USB20N5 3 1 R1029 @ 0_0402_5%
IO2 GND DMIC_DAT1 2 DMICDAT
09/26 update @ PRTR5V0U2X_SOT143-4 DMIC_CLK1 2 DMICCLK
R1030 @ 0_0402_5%
11/09 update
+LCDVDD +5VALW
2
2 2
R225 R224 +3VS
470_0805_5% 1M_0402_5%
80mil
6 2
3
S
SI2301BDS-T1-E3_SOT23-3
G
Q45A 2
2N7002DW-7-F_SOT363-6 R222 Q43
2 1 2
100K_0402_5% D
2 11/07 update
1
3
C863 80mil
+LCDVDD
1000P_0402_50V7K
+LCDVDD INVPWR_B+ 1
<11> UMA_ENVDD 5
Q45B 1
2
2N7002DW-7-F_SOT363-6
4
B+ R276 C487 C491
680P_0402_50V7K L44 2.2K_0402_5% 4.7U_0805_10V4Z 0.1U_0402_16V4Z
C479 2
1 2
FBMA-L11-201209-221LMA30T_0805
1
1
1
C480
680P_0402_50V7K
LVDS CONN
2
2 JLVDS
1 2 LVDS_A2- LVDS_A2- <11>
LVDS_A2- C1056 1 2
1 2 @ 10P_0402_50V8J LVDS_A2+ 3 3 4 4 LVDS_A2+ LVDS_A2+ <11>
5 6 LVDS_A1- LVDS_A1- <11>
LVDS_A1- C1057 5 6
1 2 @ 10P_0402_50V8J LVDS_A1+ 7 7 8 8 LVDS_A1+ LVDS_A1+ <11>
3 LVDS_A0- 3
9 9 10 10 LVDS_A0- <11>
LVDS_A0- C1058 1 2 @ 10P_0402_50V8J LVDS_A0+ 11 12 LVDS_A0+ LVDS_A0+ <11>
USB20_P5 11 12 LVDS_ACLK-
<20> USB20_P5 13 13 14 14 LVDS_ACLK- <11>
LVDS_ACLK- C1059 1 2 @ 10P_0402_50V8J LVDS_ACLK+ <20> USB20_N5 USB20_N5 15 16 LVDS_ACLK+ LVDS_ACLK+ <11>
15 16
17 17 18 18
LVDS_B2- C1060 1 2 @ 10P_0402_50V8J LVDS_B2+ 19 20
19 20
LVDS_B1- C1061 +3VS
21 21 22 22 11/07 update +5VS
1 2 @ 10P_0402_50V8J LVDS_B1+ <11> LVDS_BCLK+ LVDS_BCLK+ 23 23 24 24 DMIC_DAT DMIC_DAT <28>
<11> LVDS_BCLK- LVDS_BCLK- 25 26 DMIC_CLK DMIC_CLK <28> R491
LVDS_B0- C1062 25 26
1 2 @ 10P_0402_50V8J LVDS_B0+ 27 27 28 28 1 2 200_0805_5%
<11> LVDS_B0+ LVDS_B0+ 29 30 INV_PWM INV_PWM <33>
29 30
1
LVDS_BCLK- C1063 1 2 @ 10P_0402_50V8J LVDS_BCLK+ C481 <11> LVDS_B0- LVDS_B0- 31 32 BKOFF# BKOFF# <33>
LVDS_B1+ 31 32 DAC_BRIG
<11> LVDS_B1+ 33 33 34 34 DAC_BRIG <33>
<11> LVDS_B1- LVDS_B1- 35 36 +USB_CAM
2
680P_0402_50V7K LVDS_B2+ 35 36 LCD_DDC_CLK +3VS

09/19 update <11> LVDS_B2+
LVDS_B2-
37 37 38 38
LCD_DDC_DAT
LCD_DDC_CLK <11> 10/08 update
<11> LVDS_B2- 39 39 40 40 LCD_DDC_DAT <11>
680P_0402_50V7K
680P_0402_50V7K
41 42 BKOFF# 1 2
GND GND @ 4.7K_0402_5% R483
1 1
680P_0402_50V7K
680P_0402_50V7K
ACES_88242-4001
C482
C483
CONN@ LCD_DDC_CLK 1 2
C866
C867
4.7K_0402_5% R274
9/20 SP02000EA00/SP02000BW00 2 2
2
2
@ @ LCD_DDC_DAT 1 2
@ @ 4.7K_0402_5% R275
4 4

LCD CONN. / WebCam
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A B C D E
A B C D E
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+3VS +HDMI_5V_OUT
2
R176 R209
4.7K_0402_5% 4.7K_0402_5%
1 R210 R236 1
2
+HDMI_5V_OUT 6.8K_0402_5% 6.8K_0402_5%
1
HDMI_HPD 1 6 HDMI_SDATA
C851 <11> HDMIDAT_UMA Q134A
2
2 1 +3VS 2N7002DW-7-F_SOT363-6
2
R615 2
5
1
5
0.1U_0402_16V4Z 2.2K_0402_5% C850
1 R628
P
OE#
2 4 100K_0402_5% 0.1U_0402_16V4Z 4 3 HDMI_SCLK
A Y HPD <11> 1 <11> HDMICLK_UMA Q134B
1
G
U39 2N7002DW-7-F_SOT363-6
SN74AHCT1G125GW_SOT353-5 C:Chg. PN to SB770020010.
2 2
11/13 update
MP:Update D10 to meet HDMI.
HDMI_CLK+ 1 2 HDMI_R_CK+
R112 0_0402_5% D10
+5VS 2 1 +HDMI_5V_OUT
L85
1 2 RB491D_SOT23
1 2
1
4 3 C468
4 3
C507 1 2 0.1U_0402_16V7K HDMI_CLK- @ WCM-2012-900T_4P 0.1U_0402_16V4Z
<10> TMDS_B_CLK# 2
C508 1 2 0.1U_0402_16V7K HDMI_CLK+ HDMI_CLK- 1 2 HDMI_R_CK-
<10> TMDS_B_CLK
R113 0_0402_5%
C655 1 2 0.1U_0402_16V7K HDMI_TX0-

<10> TMDS_B_DATA0#
C675 1 2 0.1U_0402_16V7K HDMI_TX0+
<10> TMDS_B_DATA0
HDMI_TX0+ 1 2 HDMI_R_D0+
R115 0_0402_5%
C804 1 2 0.1U_0402_16V7K HDMI_TX1-
<10> TMDS_B_DATA1#
C827 1 2 0.1U_0402_16V7K HDMI_TX1+ L86
<10> TMDS_B_DATA1
C852 1
1 1 2 2
HDMI Connector
<10> TMDS_B_DATA2# 2 0.1U_0402_16V7K HDMI_TX2-
C853 1 2 0.1U_0402_16V7K HDMI_TX2+ 4 3 +HDMI_5V_OUT
<10> TMDS_B_DATA2 4 3 JHDMI
@ WCM-2012-900T_4P 18 +5V
HDMI_TX0- 1 2 HDMI_R_D0- HDMI_SDATA 16 SDA 13
3 HDMI_CLK- HDMI_TX0- HDMI_TX1- HDMI_TX2- R116 0_0402_5% HDMI_SCLK CEC 3
15 SCL Reserved 14
HDMI_CLK+ HDMI_TX0+ HDMI_TX1+ HDMI_TX2+ HDMI_HPD 19 HP_DET
GND 2
HDMI_R_CK- 12 5
CK- GND
2
1
2
2
HDMI_TX1+ HDMI_R_D1+ HDMI_R_CK+

R315 R307 R172 R304 UMA use 750 ohm R117
1 2
0_0402_5% HDMI_R_D0-
10
9
CK+ GND 8
11
D0- GND
2
2
2
2
750_0402_1% 750_0402_1%
R173 R297
750_0402_1% 750_0402_1%
R139 R141
VGA use 499 ohm L87
HDMI_R_D0+
HDMI_R_D1-
7 D0+ GND 20
6 D1- GND 21
750_0402_1% 750_0402_1% 750_0402_1% 750_0402_1% 1 2 HDMI_R_D1+ 4 22
1
2
1
1
Just change P/N to SD034750080 1 2 HDMI_R_D2- D1+ GND

3 D2- GND 23
HDMI_R_D2+ 1 17
1
1
1
1
+5VS +5VS +5VS +5VS D2+ DDC/CEC_GND

4 4 3 3
6
@ WCM-2012-900T_4P CONN@ SUYIN_100042MR019S153ZL

HDMI_TX1- 1 2 HDMI_R_D1-
R118 0_0402_5% 11/14 update
2 5 2 5
Q136A Q136B Q162A Q162B

1
11/13 update 2N7002DW-7-F_SOT363-6 2N7002DW-7-F_SOT363-6 2N7002DW-7-F_SOT363-6 HDMI_TX2+ 1 2 HDMI_R_D2+

2N7002DW-7-F_SOT363-6 R119 0_0402_5%
L88
1 1 2 2
4 4 3 3
@ WCM-2012-900T_4P
HDMI_TX2- 1 2 HDMI_R_D2-
R120 0_0402_5%
4 4
L Change PCB Footprint from SW_WCM2012F2S_4P to KING_WCM-2012-900T_4P

HDMI
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A B C D E
A B C D E
+3VALW
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C506
2 1 Check AMD need pull low or not
5
@ 0.1U_0402_16V4Z U16
PCICLK2 <23>
2 1 2 NB_RST#_R U15A
P
B
Y 4PLT_RST# PLT_RST# <11,14,25,26,27,32,33>
R300 @ 8.2K_0402_5%
SB700
NB_RST#_R 1 NB_RST#_R N2 P4 11/09 update
A A_RST# PCICLK0
G
@ NC7SZ08P5X_NL_SC70-5 Part 1 of 5 P3 R303 1 2 @ 22_0402_5%CLK_PCI_SIO2 CLK_PCI_SIO2 <32>
PCI CLKS
C492 0.1U_0402_16V7K SB_RX0P_C PCICLK1
<10> SB_RX0P 1 2 V23 P1
3
SB_RX0N_C PCIE_TX0P PCICLK2 CLK_PCI_SIO_R
<10> SB_RX0N
C493 1 2 0.1U_0402_16V7K V22 PCIE_TX0N PCICLK3 P2 R301 1 2 @ 22_0402_5%CLK_PCI_SIO CLK_PCI_SIO <23,32>
C494 1 2 0.1U_0402_16V7K SB_RX1P_C V24 T4
<10> SB_RX1P PCIE_TX1P PCICLK4 PCI_CLK4 <23>
C495 1 2 0.1U_0402_16V7K SB_RX1N_C V25 T3
<10> SB_RX1N PCIE_TX1N PCICLK5/GPIO41 PCI_CLK5 <23>
2 1 C496 1 2 0.1U_0402_16V7K SB_RX2P_C U25
<10> SB_RX2P PCIE_TX2P
R312 33_0402_5% C497 1 2 0.1U_0402_16V7K SB_RX2N_C U24
1 <10> SB_RX2N PCIE_TX2N 1
11/30 update C498 1 2 0.1U_0402_16V7K SB_RX3P_C T23
<10> SB_RX3P PCIE_TX3P
C499 1 2 0.1U_0402_16V7K SB_RX3N_C T22 N1
<10> SB_RX3N PCIE_TX3N PCIRST#
PCI EXPRESS INTERFACE

<10> SB_TX0P U22 PCIE_RX0P
<10> SB_TX0N U21 PCIE_RX0N AD0 U2
<10> SB_TX1P U19 PCIE_RX1P AD1 P7
<10> SB_TX1N V19 PCIE_RX1N AD2 V4
<10> SB_TX2P R20 PCIE_RX2P AD3 T1
<10> SB_TX2N R21 PCIE_RX2N AD4 V3
<10> SB_TX3P R18 PCIE_RX3P AD5 U1
<10> SB_TX3N R17 PCIE_RX3N AD6 V1
AD7 V2
R305 2 1 562_0402_1% T25 T2
R306 PCIE_CALRP AD8
+PCIE_VDDR 2 1 2.05K_0402_1% T24 PCIE_CALRN AD9 W1
L53 T9
+SB_PCIEVDD AD10
+1.2V_HT 1 2 P24 PCIE_PVDD AD11 R6
BLM18PG121SN1D_0603 1 1 R7
AD12
P25 PCIE_PVSS AD13 R5
C504 C505 U8
10U_0805_10V4Z 1U_0402_6.3V4Z AD14
AD15 U5
2 2
AD16 Y7
AD17 W8
AD18 V9
Close to SB AD19 Y8
AD20 AA8
AD21 Y4
AD22 Y3
Y2 PCI_AD23 PCI_AD23 <23>
AD23 PCI_AD24
AD24 AA2 PCI_AD24 <23>
AB4 PCI_AD25 PCI_AD25 <23>
AD25 PCI_AD26
<15> CLK_SBSRC_BCLK N25 PCIE_RCLKP/NB_LNK_CLKP AD26 AA1 PCI_AD26 <23>
N24 AB3 PCI_AD27 PCI_AD27 <23>
2 <15> CLK_SBSRC_BCLK# PCIE_RCLKN/NB_LNK_CLKN AD27 2
AB2 PCI_AD28 PCI_AD28 <23>
AD28
K23 NB_DISP_CLKP AD29 AC1
K22 NB_DISP_CLKN AD30 AC2
AD31 AD1
PCI INTERFACE
M24 NB_HT_CLKP CBE0# W2
M25 NB_HT_CLKN CBE1# U7
CBE2# AA7
P17 CPU_HT_CLKP CBE3# Y1
M18 CPU_HT_CLKN FRAME# AA6
DEVSEL# W5
M23 SLT_GFX_CLKP IRDY# AA5
M22 SLT_GFX_CLKN TRDY# Y5
PAR U6
J19 GPP_CLK0P STOP# W6
J18 GPP_CLK0N PERR# W4
SERR# V7 PCI_SERR# <33>
L20 GPP_CLK1P REQ0# AC3
L19 GPP_CLK1N REQ1# AD4
@ R314 20M_0402_5% AB7
REQ2#
1 2 M19 GPP_CLK2P REQ3#/GPIO70 AE6
M20 AB6 PAD T15
GPP_CLK2N REQ4#/GPIO71
CLOCK GENERATOR
C643 GNT0# AD2
N22 GPP_CLK3P GNT1# AE4
1 2 SB_32KHI P22 AD5
GPP_CLK3N GNT2#
GNT3#/GPIO72 AC6
18P_0402_50V8J Y3 11/29 update L18 AE5 PAD T16 LPCCLK1 R308 1 2 22_0402_5% CLK_PCI_SIO
25M_48M_66M_OSC GNT4#/GPIO73
1
4 3 AD6 PAD T17 11/22 update

R389 OSC NC CLKRUN#
11/23 update L Need use new P/N with 10PPM LOCK# V5
1 OSC NC 2 J21 25M_X1
20M_0402_5% AD3
32.768KHZ_12.5PF_Q13MC14610050_10PPM INTE#/GPIO33
C652 AC4
2
INTF#/GPIO34
INTG#/GPIO35 AE2
3 SB_32KHO 3
1 2 J20 25M_X2 INTH#/GPIO36 AE3 PCI_PIRQH# R967 2 1 0_0402_5% ACCEL_INT <30>
18P_0402_50V8J 22_0402_5% 09/29 update
LPCCLK0 G22 CLK_PCI_EC_R R302 1 2 CLK_PCI_EC CLK_PCI_EC <23,33>
Close to SB LPCCLK1 E22 LPCCLK1 LPCCLK1 <23>
SB_32KHI A3 H24 LPC_AD0 <32,33> STRAP PIN
X1 LAD0
LAD1 H23 LPC_AD1 <32,33> EC & Debug
09/11 update LAD2 J25 LPC_AD2 <32,33>
RTC XTAL
J24 LPC_AD3 <32,33>

L PC
LAD3
+1.8VS 2 1 CPU_LDT_REQ# SB_32KHO B3 X2 LFRAME# H25 LPC_FRAME# <32,33> ZZZ
R318 @ 10K_0402_5% H22 PAD T18
LDRQ0#
LDRQ1#/GNT5#/GPIO68 AB8 LPC_DRQ# <32> 11/13 update
BMREQ#/REQ5#/GPIO65 AD7
+3VS 2 1 H_PROCHOT# V15 SIRQ <32,33>
R319 10K_0402_5% SERIRQ
CPU_LDT_REQ# F23 PCB-MB
<6,11> CPU_LDT_REQ# ALLOW_LDTSTP
H_PROCHOT#
<6> H_PROCHOT#
H_PWRGD
F24 PROCHOT# RTCCLK C3 RTC_CLK STRAP PIN
<23>
H_PWRGD F22 LDT_PG INTRUDER_ALERT# C2 09/29 update
CPU
G25 B2 +3VL
<6,11> LDT_STOP# LDT_STP# VBAT +SB_VBAT +SB_VBAT +RTCVCC_R
11/13 update G24 +RTCVCC
<6> LDT_RST# LDT_RST# +RTCBATT
RTC
R311 R316 R317 D42

<6> H_PWRGD_CPU 1 2 H_PWRGD 120_0402_5% 120_0402_5% 2
1 2 1 2 1 R876 JBATT1
0_0402_5% 218S7EALA11FG_BGA528_SB700 1 1 3 1 2 W=20mils 1
W=20mils 1
W=20mils 2 2
2
9/20 SA00001S510 S IC 218S7EALA11FG SB700 BGA 528P SB 0FH C509 C510 DAN202U_SC70 1K_0402_5% 3
J1 GND
4
2
2 2 @ JUMP_43X39 GND
1U_0402_6.3V4Z CONN@ ACES_85205-02001
1
+RTCBATT_R
0.1U_0402_16V4Z 09/29 update 9/20 SP020008T00
1
4 4

SB700-PCIE/PCI/ACPI/LPC/RTC
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A B C D E
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<11> NB_PWRGD
R1052 2 1 NBPWRGD
0_0402_5%
R1053 2 1
@ 100_0402_5%
For SB700 A11 divider to U15D
1.8V for RS & RX780 11/13 update
SB700 Part 4 of 5
E1 PCI_PME#/GEVENT4#
E2 RI#/EXTEVNT0# USBCLK/14M_25M_48M_OSC C8 CLK_48M_USB <15>
1 demo circuit LID use RI# 1
H7 SLP_S2/GPM9#
F5 G8 USB_RCOMP 1 2
+3VS <33> SLP_S3# SLP_S3# USB_RCOMP
G1 11.8K_0402_1% R323
ACPI / WAKE UP EVENTS

<33> SLP_S5#
USB MISC
SLP_S5#
<33> PWRBTN_OUT# H2 PWR_BTN#
1 2 SUS_STAT# H1
<6,33,43> SB_PWRGD PWR_GOOD
R388 4.7K_0402_5% SUS_STAT# K3
<11> SUS_STAT# SUS_STAT#
SB_TEST2 H5 E6
SB_TEST1 TEST2 USB_FSD13P
+3VALW SB_TEST0
H4 TEST1 USB_FSD13N E7 09/04 update
H3
USB 1.1
TEST0
SB_TEST2
<33> GATEA20 Y15 GA20IN/GEVENT0# USB_FSD12P F7 Touch Screen (delete)
1 2 <33> KB_RST# W15 KBRST#/GEVENT1# USB_FSD12N E8
R320 @ 2.2K_0402_5% K4
<33> EC_SCI# LPC_PME#/GEVENT3#
1 2 SB_TEST1 K24 H11 USB20_P11
<33> EC_SMI# LPC_SMI#/EXTEVNT1# USB_HSD11P USB20_P11 <26>
R321 @ 2.2K_0402_5% 11/13 update PAD T19 F1 J10 USB20_N11 USB-11 New Card
S3_STATE/GEVENT5# USB_HSD11N USB20_N11 <26>
1 2 SB_TEST0 J2
R322 @ 2.2K_0402_5% PCIE_WAKE# SYS_RESET#/GPM7# USB20_P10
10/08 update H6 WAKE#/GEVENT8# USB_HSD10P E11
USB20_N10
USB20_P10 <26>
F2
H_THERMTRIP# J6 BLINK/GPM6# USB_HSD10N F11 USB20_N10 <26> USB-10 MiniCard(TV)
+3VS <6> H_THERMTRIP# SMBALERT#/THRMTRIP#/GEVENT2#
NBPWRGD W14 A11
NB_PWRGD USB_HSD9P
R328 SMB_CK_CLK0 EC_RSMRST# USB_HSD9N B11 USB-9 Card Reader (delete)
1 2 2.2K_0402_5% <33> EC_RSMRST# D3 RSMRST#
C10 USB20_P8
USB_HSD8P USB20_P8 <26>
2
R329 1 2 2.2K_0402_5% SMB_CK_DAT0 SB700 has internal PD D10 USB20_N8 USB-8 MiniCard(WWAN)
USB_HSD8N USB20_N8 <26>
R327
2.2K_0402_5% AE18 G11 USB20_P7
SATA_IS0#/GPIO10 USB_HSD7P USB20_P7 <31>
AD18 H12 USB20_N7 USB-7 Fingerprint
+3VALW CLK_REQ3#/SATA_IS1#/GPIO6 USB_HSD7N USB20_N7 <31>
AA19
1
SMARTVOLT1/SATA_IS2#/GPIO4 USB20_P6
W17 CLK_REQ0#/SATA_IS3#/GPIO0 USB_HSD6P E12 USB20_P6 <31>
R331 1 2 2.2K_0402_5% SMB_CK_CLK1 V17 E14 USB20_N6 USB-6 Bluetooth
CLK_REQ1#/SATA_IS4#/FANOUT3/GPIO39 USB_HSD6N USB20_N6 <31>
W20 CLK_REQ2#/SATA_IS5#/FANIN3/GPIO40
R332 2 2.2K_0402_5% SMB_CK_DAT1 USB20_P5
USB 2.0
1 <28> SB_SPKR W21 SPKR/GPIO2 USB_HSD5P C12 USB20_P5 <17>
<8,9,15,30> SMB_CK_CLK0 SMB_CK_CLK0 AA18 D12 USB20_N5 USB-5 USB Camera
2 SCL0/GPOC0# USB_HSD5N USB20_N5 <17> 2
<8,9,15,30> SMB_CK_DAT0 SMB_CK_DAT0 W18
SMB_CK_CLK1 SDA0/GPOC1#
<26> SMB_CK_CLK1 K1 SCL1/GPOC2# USB_HSD4P B12
SMB_CK_DAT1 K2 A12 USB-4 Left side
+3VALW <26> SMB_CK_DAT1 SDA1/GPOC3# USB_HSD4N
AA20 DDC1_SCL/GPIO9
GPIO
+3VS Y18 G12 USB20_P3
R83 DDC1_SDA/GPIO8 USB_HSD3P USB20_P3 <35>
C1 G14 USB20_N3 USB-3 Dock
LLB#/GPIO66 USB_HSD3N USB20_N3 <35>
2
1 2 SB_GPIO5 Y19
R540 @ 10K_0402_5% SMARTVOLT2/SHUTDOWN#/GPIO5 USB20_P2
G5 DDR3_RST#/GEVENT7# USB_HSD2P H14 USB20_P2 <31>
10K_0402_5% 11/16 update H15 USB20_N2 USB-2 Left Side
USB_HSD2N USB20_N2 <31>
A13 USB20_P1
USB20_P1 <31>
1
USB_HSD1P USB20_N1
PCIE_WAKE# USB_HSD1N B13 USB20_N1 <31> USB-1 Right side
<25> LAN_PCIE_WAKE# 2 1
R993 0_0402_5% B14 USB20_P0
USB_HSD0P USB20_P0 <31>
2 1 11/13 update B9 A14 USB20_N0 USB-0 Right side (S/W Debug Port)
<26> MINI_PCIE_WAKE# USB_OC6#/IR_TX1/GEVENT6# USB_HSD0N USB20_N0 <31>
R994 @ 0_0402_5% B8 USB_OC5#/IR_TX0/GPM5#
USB OC
11/13 update R82 0_0402_5%
A8 USB_OC4#/IR_RX0/GPM4# IMC_GPIO8 A18
<33> EC_LID_OUT# A9 USB_OC3#/IR_RX1/GPM3# IMC_GPIO9 B18
<26> EXP_CPPE# EXP_CPPE# 1 2 E5 F21
CR_CPPE# USB_OC2#/GPM2# IMC_PWM0/IMC_GPIO10
<27> CR_CPPE# 1 2 F8 USB_OC1#/GPM1# SCL2/IMC_GPIO11 D21
R333 33_0402_5% 1 2 R81 D3E@ 0_0402_5% E4 F19
<28> HDA_BITCLK_CODEC USB_OC0#/GPM0# SDA2/IMC_GPIO12
R334 33_0402_5% 1 2 HDA_BITCLK E20
<34> HDA_BITCLK_MDC SCL3_LV/IMC_GPIO13
R335 33_0402_5% 1 2 M1 E21
<34> HDA_SDOUT_MDC AZ_BITCLK SDA3_LV/IMC_GPIO14
R336 33_0402_5% 1 2 HDA_SDOUT M2 E19
<28> HDA_SDOUT_CODEC AZ_SDOUT IMC_PWM1/IMC_GPIO15
HDA_SDIN0
<28> HDA_SDIN0
HDA_SDIN1
J7 AZ_SDIN0/GPIO42 IMC_PWM2/IMC_GPO16 D19 GPIO16 <23>STRAP PIN
<34> HDA_SDIN1 J8 AZ_SDIN1/GPIO43 IMC_PWM3/IMC_GPO17 E18 GPIO17 <23>STRAP PIN
HD AUDIO
L8 AZ_SDIN2/GPIO44
M3 AZ_SDIN3/GPIO46 IMC_GPIO18 G20
R337 33_0402_5% 1 2 HDA_SYNC L6 G21
<34> HDA_SYNC_MDC AZ_SYNC IMC_GPIO19
R338 33_0402_5% 1 2 M4 D25
<28> HDA_SYNC_CODEC AZ_RST# IMC_GPIO20
L5 D24
INTEGRATED uC
R339 33_0402_5% HDARST# AZ_DOCK_RST#/GPM8# IMC_GPIO21
<28> HDA_RST#_CODEC 1 2 IMC_GPIO22 C25
3 R340 33_0402_5% 3
<34> HDA_RST#_MDC 1 2 IMC_GPIO23 C24
PAD T41 IMC_GPIO24 B25
IMC_GPIO25 C23
<23,33> HDARST#
STRAP PIN IMC_GPIO26 B24
B23
IMC_GPIO27
IMC_GPIO28 A23
IMC_GPIO29 C22
IMC_GPIO30 A22
IMC_GPIO31 B22
IMC_GPIO32 B21
IMC_GPIO33 A21
H19 IMC_GPIO0 IMC_GPIO34 D20
H20 C20
INTEGRATED uC
IMC_GPIO1 IMC_GPIO35
H21 SPI_CS2#/IMC_GPIO2 IMC_GPIO36 A20
F25 IDE_RST#/F_RST#/IMC_GPO3 IMC_GPIO37 B20
IMC_GPIO38 B19
D22 IMC_GPIO4 IMC_GPIO39 A19
E24 IMC_GPIO5 IMC_GPIO40 D18
E25 IMC_GPIO6 IMC_GPIO41 C18
D23 IMC_GPIO7
218S7EALA11FG_BGA528_SB700
4 4

SB700 USB/AC97
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10P_0402_50V8J 2 1 C516 SATA_X1
1
Y4 Change the PCB Footprint from
R341
L Y_KDS_1BX25000CK1A_2P to
25MHz_20pF_6X25000017 10M_0402_5%
Y_6X25000017_2P
2
10P_0402_50V8J 2 1 C517 SATA_X2
1
10/09 update 1
U15B
C512 1 2 0.01U_0402_25V7K SATA_STX_DRX_P0 AD9

SB700 AA24
<24> SATA_TXP0 SATA_TX0P IDE_IORDY
<24> SATA_TXN0 C513 1 2 0.01U_0402_25V7K SATA_STX_DRX_N0 AE9 Part 2 of 5 AA25
SATA_TX0N IDE_IRQ
IDE_A0 Y22
<24> SATA_RXN0_C AB10 SATA_RX0N IDE_A1 AB23
<24> SATA_RXP0_C AC10 SATA_RX0P IDE_A2 Y23
IDE_DACK# AB24 Local Frame Buffer Strapping List
<24> SATA_TXP1 C514 1 2 0.01U_0402_25V7K SATA_STX_DRX_P1 AE10 AD25 Copy from Becks.
C515 SATA_TX1P IDE_DRQ
<24> SATA_TXN1 1 2 0.01U_0402_25V7K SATA_STX_DRX_N1 AD10 SATA_TX1N IDE_IOR# AC25
IDE_IOW# AC24
<24> SATA_RXN1_C AD11
AE11
SATA_RX1N IDE_CS1# Y25
Y24
LFB_ID2 LFB_ID1 LFB_ID0
<24> SATA_RXP1_C SATA_RX1P IDE_CS3#
<31> SATA_TXP2 C520 1 2 0.01U_0402_25V7K SATA_STX_DRX_P2 AB12 AD24
C521 SATA_STX_DRX_N2 SATA_TX2P IDE_D0/GPIO15
2 0.01U_0402_25V7K Hynix
1 AC12 AD23
0 0 0
ATA 66/100/133
<31> SATA_TXN2 SATA_TX2N IDE_D1/GPIO16
IDE_D2/GPIO17 AE22
11/05 update <31> SATA_RXN2_C AE12 SATA_RX2N IDE_D3/GPIO18 AC22
<31> SATA_RXP2_C AD12 SATA_RX2P IDE_D4/GPIO19 AD21
C518 1 2 0.01U_0402_25V7K SATA_STX_DRX_P3 AD13

IDE_D5/GPIO20 AE20
AB20
Qimonda 0 0 1
<24> SATA_TXP3 SATA_TX3P IDE_D6/GPIO21
<24> SATA_TXN3 C519 1 2 0.01U_0402_25V7K SATA_STX_DRX_N3 AE13 AD19
SATA_TX3N IDE_D7/GPIO22
SERIAL ATA
IDE_D8/GPIO23 AE19
<24> SATA_RXN3_C AB14
AC14
SATA_RX3N IDE_D9/GPIO24 AC20
AD20
Samsung 0 1 0
<24> SATA_RXP3_C SATA_RX3P IDE_D10/GPIO25
11/06 update IDE_D11/GPIO26 AE21
AE14 SATA_TX4P IDE_D12/GPIO27 AB22
AD14 SATA_TX4N IDE_D13/GPIO28 AD22
AE23
AD15
IDE_D14/GPIO29
AC23
LFB_ID0 to LFB_ID2 got internal PU 10K to S5.
2 SATA_RX4N IDE_D15/GPIO30 2
AE15 SATA_RX4P LFB_ID2 R344 1 2 1K_0402_5%
AB16 R1032
SATA_TX5P LFB_ID1 R367 1
AC16 SATA_TX5N +3VALW 1 2 2 1K_0402_5%
G6 @ 10K_0402_5%
SPI_DI/GPIO12 LFB_ID0 R345 1
AE16 SATA_RX5N SPI_DO/GPIO11 D2 +3VALW 1 2 2 1K_0402_5%
AD16 D1 @ 10K_0402_5%
SATA_RX5P SPI_CLK/GPIO47 R1033
F4
SPI ROM
SATA_CAL SPI_HOLD#/GPIO31
2 1 V12 SATA_CAL SPI_CS1#/GPIO32 F3
R342 1K_0402_1%
SATA_X1 Y12 U15
R343 10K_0402_5% SATA_X1 LAN_RST#/GPIO13
11/05 update SATA_X2 ROM_RST#/GPIO14 J1
+3VS 1 2 AA12 SATA_X2 11/13 update
FANOUT0/GPIO3 M8
<34> SATA_LED# W11 SATA_ACT#/GPIO67 FANOUT1/GPIO48 M5 CR_WAKE# <27>
+1.2V_HT M7
L54 FANOUT2/GPIO49
2 1 +PLLVDD_SATA AA11 P5 11/13 update
BLM18PG121SN1D_0603 PLLVDD_SATA FANIN0/GPIO50
FANIN1/GPIO51 P8 HDD_HALTLED# <34>
SATA PWR
2 2 W12 XTLVDD_SATA FANIN2/GPIO52 R8 SB_INT_FLASH_SEL <32>
C522 C523 C6 THERMAL_DC R1062 1 2 0_0402_5% 11/05 update
1U_0402_6.3V4Z TEMP_COMM
1U_0402_6.3V4Z TEMPIN0/GPIO61 B6 WLOFF# <26>
1 1
TEMPIN1/GPIO62 A6 BT_COMBO_EN# <26>
TEMPIN2/GPIO63 A5 WWOFF# <26>
HW MONITOR
TEMPIN3/TALERT#/GPIO64 B5 EC_THERM# <33>
+3VS
L55 VIN0/GPIO53 A4 AC_IN_D <33> 11/13 update
VIN1/GPIO54 B4 BT_OFF <31>
2 1 +XTLVDD_SATA C4
VIN2/GPIO55 CAM_SHDN# <17>
BLM18PG121SN1D_0603 2 D4
VIN3/GPIO56 LFB_ID0
VIN4/GPIO57 D5
3 C524 LFB_ID1 3
VIN5/GPIO58 D6
1U_0402_6.3V4Z A7 LFB_ID2
1 VIN6/GPIO59
VIN7/GPIO60 B7
+3VALW
L56
F6 +SB_AVDD 2 1
AVDD BLM18PG121SN1D_0603
1 1
AVSS G7
C526
2.2U_0603_6.3V4Z
2 2
C525
0.1U_0402_16V4Z
4 4

SB700 SATA/IDE/SPI
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11/20 update
U15C L 0.6A/50mil/4vias U15E

1 2 +1.2VALW
0.45A/40mil/3vias ? R592 @ 0_0805_5%
L SB700 +1.2V_SB_CORE
+3VS L9
M9
VDDQ_1
Part 3 of 5
VDD_1 L15
M12
1
R593
2
0_0805_5%
+1.2V_HT SB700 A2
VDDQ_2 VDD_2 VSS_1
+
2 1 T15 VDDQ_3 VDD_3 M14 1 2 VSS_2 A25
1 C528 22U_A_4VM 22U_A_4VM C529 1
CORE S0
U9 VDDQ_4 VDD_4 N13 VSS_3 B1
C531 1 2 1U_0402_6.3V4Z U16 P12 1U_0402_6.3V4Z 2 1 C532 D7
C530 1U_0402_6.3V4Z VDDQ_5 VDD_5 1U_0402_6.3V4Z C534 VSS_4
1 2 U17 P14 2 1 T10 F20
PCI/GPIO I/O
C533 1U_0402_6.3V4Z VDDQ_6 VDD_6 1U_0402_6.3V4Z C538 AVSS_SATA_1 VSS_5
1 2 V8 VDDQ_7 VDD_7 R11 2 1 U10 AVSS_SATA_2 VSS_6 G19
C549 1 2 1U_0402_6.3V4Z W7 R15 1U_0402_6.3V4Z 2 1 C537 U11 H8
C535 1U_0402_6.3V4Z VDDQ_8 VDD_8 0.1U_0402_16V4Z C527 AVSS_SATA_3 VSS_7
1 2 Y6 VDDQ_9 VDD_9 T16 2 1 U12 AVSS_SATA_4 VSS_8 K9
C539 1 2 1U_0402_6.3V4Z AA4 0.1U_0402_16V4Z 2 1 C540 V11 K11
C541 0.1U_0402_16V4Z VDDQ_10 AVSS_SATA_5 VSS_9
1 2 AB5 VDDQ_11 V14 AVSS_SATA_6 VSS_10 K16
C542 1 2 0.1U_0402_16V4Z AB21 W9 L4
VDDQ_12 AVSS_SATA_7 VSS_11
Y9 AVSS_SATA_8 VSS_12 L7
L 0.45A/30mil/3vias Y11 AVSS_SATA_9 VSS_13 L10
11/20 update @ 0_0603_5% L 0.3A/30mil/2vias L60
+3VS R12 1 2 +3.3V_SB_IDE Y20 L21 +1.2V_CKVDD 2 1 +1.2V_HT AA9 L14
VDD33_18_1 CKVDD_1.2V_1 BLM18PG121SN1D_0603 AVSS_SATA_12 VSS_16
AA21 VDD33_18_2 CKVDD_1.2V_2 L22 AB9 AVSS_SATA_13 VSS_17 L16
CLKGEN I/O
IDE/FLSH I/O
2 1 AA22 VDD33_18_3 CKVDD_1.2V_3 L24 AB11 AVSS_SATA_14 VSS_18 M6
C543 @ 22U_A_4VM AE25 L25 C546 1 2 1U_0402_6.3V4Z AB13 M10
C544 VDD33_18_4 CKVDD_1.2V_4 AVSS_SATA_15 VSS_19
1 2 @ 1U_0402_6.3V4Z C545 1 2 1U_0402_6.3V4Z AB15 AVSS_SATA_16 VSS_20 M11
C547 1 2 @ 1U_0402_6.3V4Z C548 2 1 0.1U_0402_16V4Z AB17 M13
C536 AVSS_SATA_17 VSS_21
1 2 @ 1U_0402_6.3V4Z C551 2 1 0.1U_0402_16V4Z AC8 AVSS_SATA_18 VSS_22 M15
C550 1 2 10U_0805_10V4Z AD8 N4
AVSS_SATA_19 VSS_23
AE8 AVSS_SATA_20 VSS_24 N12
VSS_25 N14
+PCIE_VDDR P6
L61 POWER VSS_26
VSS_27 P9
+1.2V_HT 2 1 VSS_28 P10
FBMA-L11-201209-221LMA30T_0805 A15 P11
AVSS_USB_1 VSS_29
L 0.8A/50mil/4vias P18 PCIE_VDDR_1 +3VALW
B15 AVSS_USB_2 VSS_30 P13
+
C552
2 1
22U_A_4VM
P19 PCIE_VDDR_2 L 0.1A/30mil/2vias ? C14 AVSS_USB_3 VSS_31 P15
P20 PCIE_VDDR_3 D8 AVSS_USB_4 VSS_32 R1
C553 2 1U_0402_6.3V4Z +S5_3V
A-LINK I/O
1 P21 PCIE_VDDR_4 S5_3.3V_1 A17 1 2 D9 AVSS_USB_5 VSS_33 R2
C555 1 2 1U_0402_6.3V4Z R22 A24 R564 0_0805_5% D11 R4
2 C554 PCIE_VDDR_5 S5_3.3V_2 AVSS_USB_6 VSS_34 2
2 1U_0402_6.3V4Z
+
1 R24 PCIE_VDDR_6 S5_3.3V_3 B17 1 2 D13 AVSS_USB_7 VSS_35 R9
GROUND
C558 1 2 1U_0402_6.3V4Z R25 J4 22U_A_4VM C556 D14 R10
PCIE_VDDR_7 S5_3.3V_4 AVSS_USB_8 VSS_36
3.3V_S5 I/O
C557 1 2 0.1U_0402_16V4Z J5 1U_0402_6.3V4Z 2 1 C559 D15 R12
C560 S5_3.3V_5 AVSS_USB_9 VSS_37
1 2 0.1U_0402_16V4Z S5_3.3V_6 L1 1U_0402_6.3V4Z 2 1 C561 E15 AVSS_USB_10 VSS_38 R14
L2 1U_0402_6.3V4Z 2 1 C562 F12 T11
+1.2V_SATA S5_3.3V_7 0.1U_0402_16V4Z C563 AVSS_USB_11 VSS_39
2 1 F14 AVSS_USB_12 VSS_40 T12
L63 0.1U_0402_16V4Z 2 1 C564 G9 T14
0.1U_0402_16V4Z C565 AVSS_USB_13 VSS_41
+1.2V_HT 2 1 AA14 AVDD_SATA_1 2 1 H9 AVSS_USB_14 VSS_42 U4
FBMA-L11-201209-221LMA30T_0805 AB18 +1.2VALW H17 U14
AVDD_SATA_4 AVSS_USB_15 VSS_43
L <1.25A/50mil/4vias AA15 AVDD_SATA_2 J9 AVSS_USB_16 VSS_44 V6
+
+S5_1.2V L64 0_0603_5%
CORE S5
2 1 AA17 AVDD_SATA_3 S5_1.2V_1 G2 J11 AVSS_USB_17 VSS_45 Y21
SATA I/O
C566 22U_A_4VM AC18 G4 J12 AB1
C567 AVDD_SATA_5 S5_1.2V_2 +1.2VALW AVSS_USB_18 VSS_46
1 2 1U_0805_16V7K AD17 AVDD_SATA_6
1U_0402_6.3V4Z 2 1 C569 J14 AVSS_USB_19 VSS_47 AB19
C568 1 2 1U_0805_16V7K AE17 0.1U_0402_16V4Z 2 1 C570 J15 AB25
C571 AVDD_SATA_7 AVSS_USB_20 VSS_48
1 2 0.1U_0402_16V4Z +1.2_USB L65 0_0603_5% K10 AVSS_USB_21 VSS_49 AE1
C572 1 2 0.1U_0402_16V4Z A10 K12 AE24
USB_PHY_1.2V_1 AVSS_USB_22 VSS_50
+
USB_PHY_1.2V_2 B10 1 2 K14 AVSS_USB_23
22U_A_4VM C573 K15
1U_0402_6.3V4Z 2 C574 AVSS_USB_24
1 PCIE_CK_VSS_9 P23
C567,C568 change to 1U_0402 when SI-2 1U_0402_6.3V4Z 2 1 C575 R16
L +AVDD_USB
PCIE_CK_VSS_10
PCIE_CK_VSS_11 R19
PCIE_CK_VSS_12 T17
<1.25A/50mil/4vias? L66 U18
L +3VALW 2 1 A16 AVDDTX_0 V5_VREF AE7 +V5_VREF 1K_0402_5% 2 1 R346 +5VS H18 PCIE_CK_VSS_1
PCIE_CK_VSS_13
PCIE_CK_VSS_14 U20
FBMA-L11-201209-221LMA30T_0805 B16 2 2 D14 J17 V18
AVDDTX_1 +AVDDCK_3.3V PCIE_CK_VSS_2 PCIE_CK_VSS_15
C16 AVDDTX_2 AVDDCK_3.3V J16 1 2 +3VS J22 PCIE_CK_VSS_3 PCIE_CK_VSS_16 V20
C576 1 2 10U_0805_10V4Z D16 C578 C579 K25 V21
AVDDTX_3 PCIE_CK_VSS_4 PCIE_CK_VSS_17
PLL
C577 1 2 10U_0805_10V4Z D17 K17 +AVDDCK_1.2V0.1U_0402_16V4Z 1U_0603_10V4Z CH751H-40PT_SOD323-2 M16 W19

C580 1U_0402_6.3V4Z AVDDTX_4 AVDDCK_1.2V 1 1 PCIE_CK_VSS_5 PCIE_CK_VSS_18
1 2 E17 M17 W22
USB I/O
C581 1U_0402_6.3V4Z AVDDTX_5 +AVDDC PCIE_CK_VSS_6 PCIE_CK_VSS_19

1 2 F15 AVDDRX_0 AVDDC E9 M21 PCIE_CK_VSS_7 PCIE_CK_VSS_20 W24
C583 1 2 0.1U_0402_16V4Z F17 P16 W25
C582 0.1U_0402_16V4Z AVDDRX_1 L67 PCIE_CK_VSS_8 PCIE_CK_VSS_21
1 2 F18 AVDDRX_2
3 C584 0.1U_0402_16V4Z 3
1 2 G15 AVDDRX_3 2 1 +3VALW F9 AVSSC AVSSCK L17
G17 BLM18PG121SN1D_0603 Part 5 of 5
AVDDRX_4
G18 AVDDRX_5 2.2U_0603_6.3V4Z 2 1 C585 218S7EALA11FG_BGA528_SB700
0.1U_0402_16V4Z 2 1 C586
L68
+AVDDCK_1.2V 2 1 +1.2V_HT
BLM18PG121SN1D_0603
2.2U_0603_6.3V4Z 2 1 C587
0.1U_0402_16V4Z 2 1 C588
L69
+AVDDCK_3.3V 2 1 +3VS
BLM18PG121SN1D_0603
2.2U_0603_6.3V4Z 2 1 C589
0.1U_0402_16V4Z 2 1 C590
4 4

SB700 PWR/GND
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A B C D E
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REQUIRED STRAPS NOTE: SB700 HAS INTERNAL 15K PULL UP RESISTOR FOR RTC_CLK
PCI_CLK2 PCI_CLK3 PCI_CLK4 PCI_CLK5 AZ_RST_CD# LPC_CLK1 RTC_CLK LPC_CLK0 GP17 GP16
PULL BOOTFAIL USE RESERVED RESERVED ENABLE PCI CLKGEN INTERNAL EC Internal pull up
1 HIGH TIMER DEBUG MEM BOOT ENABLED RTC ENABLED 1
H,H = Reserved
ENABLED STRAPS
DE FAULT
H,L = SPI ROM
EXT. RTC
PULL BOOTFAIL IGNORE DISABLE PCI CLKGEN (PD on X1, EC
LOW TIMER DEBUG MEM BOOT DISABLED apply DISABLED L,H = LPC ROM (Default)
DISABLED STRAPS 32KHz to DE FAULT L,L = FWH ROM
DE FAULT DE FAULT DE FAULT DE FAULT RTC_CLK)
+3VS +3VS +3VS +3VS +3VALW +3VALW +3VALW +3VALW +3VALW +3VALW
1
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
R356
R347
R348
R349
R350
R351
R352
R353
R354
R355
2.2K_0402_5%
2
11/30 update
@
@ @ @ @ @ @ @
<19> PCICLK2
<19,32> CLK_PCI_SIO
<19> PCI_CLK4
<19> PCI_CLK5
09/29 update <19,33> CLK_PCI_EC
<19> LPCCLK1
2
<19> RTC_CLK 2
<20,33> HDARST#
<20> GPIO17
<20> GPIO16
1
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
2.2K_0402_5%
2.2K_0402_5%
2.2K_0402_5%
R363
R365
R366
R357
R358
R359
R360
R361
R362
R364
2
2
@ @ @ @
DEBUG STRAPS
SB700 HAS 15K INTERNAL PU FOR PCI_AD[28:23]
PCI_AD28 PCI_AD27 PCI_AD26 PCI_AD25 PCI_AD24 PCI_AD23
USE USE PCI USE ACPI USE IDE USE DEFAULT RESERVED
3
PULL LONG PLL BCLK PLL PCIE STRAPS 3
HIGH RESET
DE FAULT DE FAULT DE FAULT DE FAULT DE FAULT
PULL USE BYPASS BYPASS BYPASS IDE USE EEPROM

LOW SHORT PCI PLL ACPI PLL PCIE STRAPS
RESET BCLK
<19> PCI_AD28
<19> PCI_AD27
<19> PCI_AD26
<19> PCI_AD25
<19> PCI_AD24
<19> PCI_AD23
1
1
2.2K_0402_5%
2.2K_0402_5%
2.2K_0402_5%
2.2K_0402_5%
2.2K_0402_5%
2.2K_0402_5%
R373
R374
R375
R376
R377
R378
2
2
@ @ @ @ @ @
4 4

SB700 STRAPS
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A B C D E
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HDD Connector
+5VS JP9 11/14 update
GND 1
10U_0805_10V4Z
0.1U_0402_16V4Z
2 SATA_TXP0 SATA_TXP0 <21>
A+ SATA_TXN0
1 1 1 1 A- 3 SATA_TXN0 <21>
C593
C595
4 0.01U_0402_16V7K
1 GND SATA_RXN0 1
C594 C591
B- 5 2 1 C592 SATA_RXN0_C SATA_RXN0_C <21>
6 SATA_RXP0 2 1 C596 SATA_RXP0_C SATA_RXP0_C <21>
2 2 2 2 B+ 0.01U_0402_16V7K
GND 7
0.1U_0402_16V4Z 0.1U_0402_16V4Z
Near CONN side.
V33 8 +3VS_HDD1
Pleace near HD CONN (JP23) V33 9
V33 10
GND 11
+3VS +3VS_HDD1 12
@R1009 GND
GND 13
1 2 V5 14
10U_0805_10V4Z
0.1U_0402_16V4Z
0_0805_5% 15 +5VS
V5
1 1 1 1 V5 16
C1032
C1035
GND 17
@ C1033 @ C1034 18
Reserved
GND 19
@ 2 2 2 2 @
V12 20
0.1U_0402_16V4Z 0.1U_0402_16V4Z 21
V12
V12 22
Pleace near HD CONN (JP23)

CONN@ SUYIN_127072FR022G523_RV
Multi-Bay Connector-option
2 2
+5VS
Max 3A
10U_0805_10V4Z
0.1U_0402_16V4Z
1 1 1 1
C601
C604
C602 C603
2 2 2 2 +3VS_HDD2 +5VS JP10
0.1U_0402_16V4Z 0.1U_0402_16V4Z 16 1
VCC5 GND SATA_TXP1
15 VCC5 TX+ 2 SATA_TXP1 <21>
14 3 SATA_TXN1 SATA_TXN1 <21>
VCC5 TX- 0.01U_0402_16V7K
Pleace near HD CONN (JP23) 13 VCC3 GND 4
12 5 SATA_RXN1 2 1 C605SATA_RXN1_C SATA_RXN1_C <21>
VCC3 RX- SATA_RXP1
11 VCC3 RX+ 6 2 1 C606 SATA_RXP1_C SATA_RXP1_C <21>
+3VS +3VS_HDD2 10 7 0.01U_0402_16V7K
@R1010 GND GND
9 8
1 2
GND GND Near CONN side.
10U_0805_10V4Z
0.1U_0402_16V4Z
0_0805_5% 18 17
GND GND
1 1 1 1
C1036
C1039
CONN@ TYCO_2023087
@ C1037 @ C1038
@ 2 2 2 2 @
0.1U_0402_16V4Z 0.1U_0402_16V4Z
11/14 update
3
Pleace near HD CONN (JP23) 3
CD-ROM Connector
JP11
+5VS
GND 1
Placea caps. near ODD CONN. 2 SATA_TXP3 SATA_TXP3 <21>
A+ SATA_TXN3
A- 3 SATA_TXN3 <21>
4 0.01U_0402_16V7K
GND SATA_RXN3
B- 5 2 1 C612 SATA_RXN3_C SATA_RXN3_C <21>
6 SATA_RXP3 2 1 C611 SATA_RXP3_C SATA_RXP3_C <21>
B+ 0.01U_0402_16V7K
GND 7
0.1U_0402_16V4Z
1U_0603_10V4Z
10U_0805_10V4Z
R970 0_0402_5%
1 1 1 1
Near CONN side.
C613
DP 8 1 2
C614
C615
C616 9
10U_0805_10V4Z V5
V5 10 +5VS
2 2 2 2
MD 11
GND 12
GND 13
CONN@ SUYIN_127382FR013G509ZR
11/14 update
4 4

HDD/CDROM
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A B C D E
PJP605
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+3VALW
1
PAD-OPEN 4x4m
2
+3V_LAN
R1055 3.6K_0402_5% 40 mils
D
3 1 +3V_LAN
2
U17 2
LAN_DO R1056
G
4 5 2
2
LAN_DI DO GND C1078 C1077 Q144
3 DI NC 6 100K_0402_5%
LAN_SK_LAN_LINK# 2 7 SI2301BDS-T1-E3_SOT23-3
LAN_CS SK NC 1
1 8 +3V_LAN
1
CS VCC 1
0.1U_0402_16V4Z <33> LAN_POWER_OFF 1 2
AT93C46-10SI-2.7_SO8 R1057 10K_0402_5% 0.1U_0402_16V4Z
1 1
2 1
R1058 10K_0402_5%
+LAN_VDD12
Close to Pin1,37,29
Place Close to Chip U20
Close to Pin10,13,30,36 +3V_LAN
<10> PCIE_PTX_C_IRX_P3 C485 2 1 0.1U_0402_16V7K PCIE_PTX_IRX_P3 20 33 LAN_DO

HSOP LED3/EEDO LAN_DI
LED2/EEDI/AUX 34 2 2 2 2
<10> PCIE_PTX_C_IRX_N3 C488 2 1 0.1U_0402_16V7K PCIE_PTX_IRX_N3 21 HSON LED1/EESK 35 LAN_SK_LAN_LINK# C628 C629 C630 C631 2 2 2
32 LAN_CS C620 C621 C622
EECS 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
<10> PCIE_ITX_C_PRX_P3 15 HSIP LAN_ACTIVITY# 1 1 1 1 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
LED0 38
1 1 1
<10> PCIE_ITX_C_PRX_N3 16 HSIN
RTL8102EL 2 LAN_MDI0+
MDIP0 LAN_MDI0-
<15> CLK_PCIE_LAN 17 REFCLK_P MDIN0 3
<15> CLK_PCIE_LAN# 18 5 LAN_MDI1+
REFCLK_M MDIP1 LAN_MDI1-
MDIN1 6
<15> CLKREQ_LAN# 25 CLKREQB NC 8
NC 9
+3VS <11,14,19,26,27,32,33> PLT_RST# 27 PERSTB NC 11 Close to Pin48
NC 12 Close to Pin45
R1059 1 2 2.49K_0402_1% 46 4
RSET NC
1
R1060 26 48 VCTRL12 VCTRL12 0.1U_0402_16V4Z +LAN_VDD12

<20> LAN_PCIE_WAKE# LANWAKEB VCTRL12A
1K_0402_1% ISOLATEB 28 ISOLATEB
VDDTX 19 +EVDD12 1 2
LAN_X1 41 30 +LAN_VDD12 C1080
2
ISOLATEB LAN_X2 CKXTAL1 DVDD12 C1079

42 CKXTAL2 DVDD12 36 2 1
DVDD12 13
2 2 1 C632 C633 2
DVDD12 10
@ 10U_0805_10V4Z 0.1U_0402_16V4Z @ 10U_0805_10V4Z
R1061 1 2
NC 39
15K_0402_5%
23 NC NC 44
24 NC VCTRL12D 45 +LAN_VDD12
7 GND VDD33 29 +3V_LAN
14 GND VDD33 37 Close to Pin19
31 GND
47 1 +EVDD12
GND AVDD33
NC 40
22 GNDTX NC 43
RTL8102EL-GR_LQFP48_7X7 2 2
11/13 update C1082
C1081
10/09 update Change the PCB Footprint from 1U_0402_6.3V4Z 0.1U_0402_16V4Z
1 1
Y5
L Y_KDS_1BX25000CK1A_2P to
LAN_X1 2 1 LAN_X2
Y_6X25000017_2P
25MHz_20pF_6X25000017
1 1
C653 C654
27P_0402_50V8J
2 27P_0402_50V8J 2
3 LAN Conn. 3
U19
11/09 update JRJ45
10/29 update
+3V_LAN 13 Yellow LED+
LAN_MDI0+ 1 16 RJ45_MIDI0+ RJ45_MIDI0+ <35>
LAN_MDI0- RD+ RX+ RJ45_MIDI0- LAN_ACTIVITY# R391
2 RD- RX- 15 RJ45_MIDI0- <35> 2 1 300_0402_5% 14 Yellow LED-
C648 1 2 0.01U_0402_16V7K LAN_CT0 3 14 RJ45_CT0 75_0402_1% 1 16
CT CT C1083 1 SHLD1
4 NC NC 13 2 0.01U_0603_100V7-M RJ45_CT0_C 1 R394 2 8 PR4-
5 NC NC 12 C1084 1 2 0.01U_0603_100V7-M RJ45_CT1_C 1 2 RJ45_GND C656
DETECT PIN1 9
C647 1 2 0.01U_0402_16V7K LAN_CT1 6 11 RJ45_CT1 R396 @68P_0402_50V8K 7
LAN_MDI1+ CT CT RJ45_MIDI1+ 75_0402_1% 2 PR4+
7 TD+ TX+ 10 RJ45_MIDI1+ <35> 1
LAN_MDI1- 8 9 RJ45_MIDI1- RJ45_MIDI1- <35> C658 RJ45_MIDI1- 6
TD- TX- PR2-
1000P_1206_2KV7K 5
LEF8423A-R 2 PR3-
4 PR3+
RJ45_MIDI1+ 3 PR2+
RJ45_MIDI0- 2 PR1-
11/05 update RJ45_MIDI0+ DETCET PIN2 10
2 1 PR1+
@C657
11/09 update SHLD1 15
+3V_LAN 11 Green LED+
68P_0402_50V8K
LAN_SK_LAN_LINK#1 R395 2 1 300_0402_5% 12 Green LED-
FOX_JM36113-P1122-7F
CONN@ LANGND
1 1
C661 C662
4 0.1U_0402_16V4Z 4.7U_0805_10V4Z 4
2 2
9/20 DC234001G00

RTL8111C/8102E 10/100/1000 LAN
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A B C D E
Mini Card Slot 1---WLAN

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+3VS Max 1A +3VS_WLAN +1.5VS Max 0.5A +1.5VS_WLAN +3VALW_WLAN
+3VALW
+3VS_WLAN
@ R1043 0_0603_5% Mini Card Slot 2---TV tuner / WWAN / Robson
2 R407 1 1 R406 2 1 2 +3VALW +3VS +1.5VS
0_0805_5% 0_0805_5% R1042 0_0603_5% +3VS_MINI +3VALW_WWAN +3VS_MINI +1.5VS_MINI
1 1 1 1 1 1 1 2 R971 0_0603_5% Max 2.7A Max 0.5A
C665 C666 C668 C669 C670 C667 2 1 1 L78 2 0.01U_0402_16V7K 4.7U_0805_10V4Z 2@ L79 1 4.7U_0805_10V4Z
@ R972 0_0603_5% 0_1206_5% 0_0805_5%
0.1U_0402_16V4Z 4.7U_0805_10V4Z 0.01U_0402_16V7K 4.7U_0805_10V4Z 0.1U_0402_16V4Z 2 1 1 1 1 1 1 1
2 2 2 2 2 2 C785 C786 C787 @ C781 @ C782 @ C783
1 1
C671 @ C784
0.1U_0402_16V4Z 0.1U_0402_16V7K
0.1U_0402_16V4Z 2 2 2 2 2 2
1 JP14 2 2 1
MINI_PCIE_WAKE# 1 2 +3VS_WLAN 0.1U_0402_16V4Z 0.01U_0402_16V7K 0.1U_0402_16V4Z
CH_DATA 1 2
<31> CH_DATA 3 3 4 4
<31> CH_CLK CH_CLK 5 6 +1.5VS_WLAN JP13
5 6
<15> CLKREQ_MCARD2# 7 7 8 8 <20> MINI_PCIE_WAKE# 1 1 2 2 +3VS_MINI
9 9 10 10 3 3 4 4
<15> CLK_PCIE_MCARD2# 11 11 12 12 5 5 6 6 +1.5VS_MINI
<15> CLK_PCIE_MCARD2 13 14 <15> CLKREQ_MCARD1# 7 8 UIM_PWR
13 14 7 8 UIM_DATA
15 15 16 16 9 9 10 10
<15> CLK_PCIE_MCARD1# 11 12 UIM_CLK
11 12 UIM_RST
R52 <15> CLK_PCIE_MCARD1 13 13 14 14
17 18 15 16 UIM_VPP
17 18 WL_OFF# 15 16
19 19 20 20 1 2 WLOFF# <21>
21 22 PLT_RST# 0_0402_5%
21 22 R53
<10> PCIE_PTX_C_IRX_N2 23 23 24 24 +3VALW_WLAN 17 17 18 18
<10> PCIE_PTX_C_IRX_P2 25 26 19 20 WW_OFF# 1 2
25 26 19 20 WWOFF# <21>
27 28 Max 0.3A 21 22 PLT_RST# 0_0402_5%
27 28 SMB_CK_CLK1 21 22
29 29 30 30 <10> PCIE_PTX_C_IRX_N5 23 23 24 24 +3VALW_WWAN
<10> PCIE_ITX_C_PRX_N2 31 32 SMB_CK_DAT1 <10> PCIE_PTX_C_IRX_P5 25 26
31 32 25 26 Max 0.3A
<10> PCIE_ITX_C_PRX_P2 33 33 34 34 27 27 28 28
35 36 29 30 SMB_CK_CLK1
35 36 USB20_N8 <20> 29 30
37 38 <10> PCIE_ITX_C_PRX_N5 31 32 SMB_CK_DAT1
37 38 USB20_P8 <20> 31 32
39 39 40 40 <10> PCIE_ITX_C_PRX_P5 33 33 34 34
+3VS_WLAN R47 1 2 0_0603_5% 41 42 35 36
41 42 35 36 USB20_N10 <20>
43 44 WL_LED# WL_LED# <34> 37 38
43 44 37 38 USB20_P10 <20>
11/09 update 45 45 46 46
R401 1
39 39 40 40
47 47 48 48 +3VS_MINI 2 0_0603_5% 41 41 42 42 WW_LED# WW_LED# <34>
49 49 50 50 11/09 update 1 43 43 44 44
<21> BT_COMBO_EN# 1 R49 2 CH_CLK 51 51 52 52 45 45 46 46
@C738 47 48
0_0402_5% 39P_0402_50V8J 47 48
G1
G2
G3
G3
49 49 50 50
1
2
51 51 52 52
2 R48 CONN@ 2
53
54
55
56
FOX_AS0B226-S99N-7F
G1
G2
G3
G3
4.7K_0402_5%
9/20 SP01000HS00/SP01000LX00 CONN@
2
53
54
55
56
09/29 update FOX_AS0B226-S99N-7F
9/20 STANDOFF (H=7.5 mm) ES000000D00
9/20 SP01000HS00/SP01000LX00
New Card
9/20 STANDOFF (H=7.5 mm) ES000000D00
11/09 update
Express Card Power Switch
+1.5VS +3VS_MINI
C681 U21
2 1 0.1U_0402_16V4Z 12 1.5Vin 1.5Vout 11 +1.5VS_PEC JP6
14 1.5Vin 1.5Vout 13 1 1
+3VS Max 0.65A UIM_PWR 2
C679 UIM_DATA 2
3 3
2 1 0.1U_0402_16V4Z 2 3.3Vin 3.3Vout 3 +3VS_PEC UIM_CLK 4 4
4 5 UIM_RST 5 9/20 SP02000IQ00
3.3Vin 3.3Vout 5
2 1 0.1U_0402_16V4Z Max 1.3A UIM_VPP 6 6 G1 8
Max 0.275A
+3VALW C680 17 15 +3V_PEC 7 9
AUX_IN AUX_OUT 7 G2
PLT_RST#
11/22 update
<11,14,19,25,27,32,33> PLT_RST# 1 R54 2 6 SYSRST# OC# 19 ACES_88266-07001
0_0402_5% CONN@
<33,34,36,40> SYSON 20 8 PERST#
SHDN# PERST#
<28,33,36,38,41> SUSP# 1 STBY# NC 16
10 CPPE# GND 7 R1037

3 EXP_CPPE# UIM_DATA UIM_PWR 0.1U_0402_16V4Z 3
<20> EXP_CPPE# 9 CPUSB# 1 2
THERMAL_PAD 21
18 @ 10K_0402_5% 1 1
RCLKEN C1070 C1071
R5538D001-TR-F_QFN20_4X4~D
4.7U_0805_10V4Z
2 2
USE TI TPS2231MRGPR
Near to Express Card slot. 9/20 SP02000B000 +3VS_PEC
JEXP 4.7U_0805_10V4Z
1 GND 1 1
<20> USB20_N11 2 USB_D-
<20> USB20_P11 3 C677 C678
EXP_CPPE# USB_D+
4 CPUSB# 2 2
5 RSV
6 0.1U_0402_16V4Z
SMB_CK_CLK1 RSV
<20> SMB_CK_CLK1 7 SMB_CLK
<20> SMB_CK_DAT1 SMB_CK_DAT1 8 SMB_DATA +1.5VS_PEC
+1.5VS_PEC 9 +1.5V
10 +1.5V
MINI_PCIE_WAKE# 11 4.7U_0805_10V4Z
WAKE#
+3V_PEC 12 +3.3VAUX 1 1
PERST# 13 PERST# C683 C682
+3VS_PEC 14 +3.3V
15 +3.3V
CLKREQ_NCARD# 2 2
<15> CLKREQ_NCARD# 16 CLKREQ#
EXP_CPPE# 17 CPPE# 0.1U_0402_16V4Z
<15> CLK_PCIE_NCARD# 18 REFCLK-
<15> CLK_PCIE_NCARD 19 REFCLK+
4 4
20 GND
<10> PCIE_PTX_C_IRX_N0 21 PERn0
<10> PCIE_PTX_C_IRX_P0 22 PERp0
23 +3V_PEC
GND
<10> PCIE_ITX_C_PRX_N0 24 PETn0
<10> PCIE_ITX_C_PRX_P0 25 4.7U_0805_10V4Z
PETp0
26 GND
1 1
27 GND C684 C685
28 GND Issued Date 2007/08/02 Deciphered Date 2008/08/02 Title
CONN@ SANTA_130801-5_LT 2 2
WLAN/TV tuner/Express Card
09/13 Update 0.1U_0402_16V4Z AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
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A B C D E
WWW.AliSaler.Com +VCC_OUT +VCC_4IN1 Card Reader Connector

JREAD
+VCC_4IN1
3 21 R45 10K_0402_5% +3VS_CR

+VCC_4IN1 XD-VCC SD-VCC +VCC_4IN1
+3VS U22 XDWP#_SDWP# 2
40mil XD_SD_MS_D0 32
MS-VCC 28 1
R121 4.7K_0402_5%
XD_SD_MS_D1 XD-D0 SDCLK XD_RB# XDCD0#_SDCD#2
3 IN OUT 1 10 XD-D1 7 IN 1 CONN SD_CLK 20 2 1 1
4 5 XD_SD_MS_D2 9 14 XD_SD_MS_D0 R106 10K_0402_5%
EN OUT XD_SD_MS_D3 XD-D2 SD-DAT0 XD_SD_MS_D1 R111 4.7K_0402_5%
1 8 XD-D3 SD-DAT1 12
1
C895 2 1 XD_SD_D4 7 30 XD_SD_MS_D2 XDCD1#_MSCD# 2 1
GND XD_SD_D5 XD-D4 SD-DAT2 XD_SD_MS_D3
6 XD-D5 SD-DAT3 29
@ 0.1U_0402_16V4Z @ G5250C2T1U_SOT23-5 XD_SD_D6 5 27 XD_SD_D4
2 @ C896 XD_SD_D7 XD-D6 SD-DAT4 XD_SD_D5 D40
4 XD-D7 SD-DAT5 23
1 2 XD_SD_D6 1
18 2
2
1U_0603_10V4Z @ R123 SDCMD_MSBS_XDWE# 34 SD-DAT6 XD_SD_D7 XD_CD#
XD-WE SD-DAT7 16 1
XDWP#_SDWP# 33 25 SDCMD_MSBS_XDWE# 3 1
XD_ALE XD-WP SD-CMD XDCD0#_SDCD#
35 XD-ALE SD-CD-SW 1
150K_0402_5% XD_CD# 40 DAN202U_SC70 C696
XD_RB# XD-CD XDWP#_SDWP# 270P_0402_50V7K
11/06 update reserved power circuit 39 XD-R/B SD-WP-SW 2
2
XD_RE# 38
XDCE# XD-RE
37 XD-CE
XD_CLE 36 26 MSCLK
XD-CLE MS-SCLK XD_SD_MS_D0
MS-DATA0 17
11 15 XD_SD_MS_D1
Use 0805 type and over 20 mils 31
7IN1 GND MS-DATA1
19 XD_SD_MS_D2
7IN1 GND MS-DATA2 XD_SD_MS_D3
trace width on both side MS-DATA3 24
XDCD1#_MSCD#
Strap pin for JMicro
MS-INS 22
13 SDCMD_MSBS_XDWE# +3VS_CR
+VCC_OUT +VCC_4IN1 MS-BS
11/06 update 41 7IN1 GND XD_CLE
42 7IN1 GND 2 1
10K_0402_5% R405
1 R383 2 CONN@ TAITW_R015-B10-LM 11/06 update 2 1 XD_ALE
0_0805_5% 10K_0402_5% R122
1 1
SDCLK MSCLK XDCE# 2 1 XD_RE#
C689 C694 200K_0402_5% R86
2
10U_0805_10V4Z 0.1U_0402_16V4Z
2 2
@ R413 @ R412 @ R411
100_0402_5% 100_0402_5% 100_0402_5%
1
2 2 2 place near pin 5 and
pin 10. +1.8VS
@ C902 @ C901 @ C900
100P_0402_25V8K 100P_0402_25V8K 100P_0402_25V8K +1.8VS_OUT
2 1 1 1 2
11/13 update +3VS 20mil 0.1U_0402_16V4Z 1000P_0402_50V7K 2 R1020 1
1 1 1 1 0_0603_5%
L Place R413,C902 close to JREAD.20; R412,C901

1
C892 C688 C687 C893

R124 close to JREAD.26; R411,C900 close to JREAD.37
2 2 2 2
10K_0402_5%
11/06 update 10U_0805_10V4Z 0.1U_0402_16V4Z
2 2
G
2 1
Q54 0.1U_0402_16V4Z C695
1 3 CPPE#
<20> CR_CPPE# Power Circuit +3VS_CR +3VS
D
D3 Normal 30mA Deepest 3mA

2N7002_SOT23-3 U23 2 R1021 1
1 1 0_0603_5%
D3E@ 0_0402_5% 3 5 Ripple 100mV
<15> CLK_PCIE_MCARD0# APCLKN APVDD
<21> CR_WAKE# 1 2 XDCD0#_SDCD# <15> CLK_PCIE_MCARD0 4 58mA 10 C691 C692
R369 APCLKP APV18 Ripple 100mV
TAV33 30
1mA 2 2
<10> PCIE_ITX_C_PRX_N1 9 APRXN
8 19 Ripple 250mV 0.1U_0402_16V4Z 0.1U_0402_16V4Z
<10> PCIE_ITX_C_PRX_P1 APRXP 45mA DV33 20
C693 1 0.1U_0402_16V7K PCIE_PTX_IRX_N1 DV33
<10> PCIE_PTX_C_IRX_N1 2 11 APTXN DV33 44
C697 1 2 0.1U_0402_16V7K PCIE_PTX_IRX_P1 12 18 Ripple 250mV
<10> PCIE_PTX_C_IRX_P1 APTXP +1.8VS_OUT
25mA DV18 37 1 1
DV18
2 R114 1 APREXT 7 APREXT
10K_0402_1% 12mil 48 XD_SD_MS_D0 C686 C690
MDIO0 XD_SD_MS_D1 0.1U_0402_16V4Z 0.1U_0402_16V4Z
MDIO1 47
2 2
+3VS_CR 2 R409 1 38 PCIES_EN MDIO2 46 XD_SD_MS_D2
10K_0402_5% 39 45 XD_SD_MS_D3
+5VS_LED PCIES JMB385 MDIO3
MDIO4 43 SDCMD_MSBS_XDWE#
3 SDCLK_MSCLK_XDCE# R457 2 3
MDIO5 42 1 22_0402_5% SDCLK
41 XDWP#_SDWP# R456 2 1 22_0402_5% MSCLK
MDIO6
1
40 XD_CLE R455 2 1 22_0402_5% XDCE#

R370 MDIO7 XD_SD_D4
MDIO8 29
1 28 XD_SD_D5 Place R455~R457 close to U23.42
470_0402_5% <11,14,19,25,26,32,33> PLT_RST#
2
XRSTN
XTEST
MDIO9
MDIO10 27 XD_SD_D6
XD_SD_D7
L
26 11/06 update
2
MDIO11 XD_RE#
CPPE# MDIO12 25
XD_RB#
11/07 update
13 SEEDAT MDIO13 23
2
PAD T45 14 22 XD_ALE

D5 SEECLK MDIO14
HT-F196BP5_WHITE NC 34
XDCD1#_MSCD# 15 35
XDCD0#_SDCD# CR1_CD1N NC
16 CR1_CD0N NC 36
11/10 update
1
L At least 20mils APGND 6

+VCC_OUT 17 CR1_PCTLN
use for PWR_EN# GND 24
1
D Q53
GND 31
2 CR_LED 21 32
G CR1_LEDN GND
S 2N7002_SOT23-3
8mA sink current GND 33
3
R454 JMB385-LGEZ0A_LQFP48_7X7
4.7K_0402_5%
White LED: VF=3V, IF = 10mA, Res = 200 ohm
2
11/06 update
4 4

PCI-E I/F Card Reader-JM385
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A B C D E
A B C D E
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CODEC POWER
R885 R978 R979 +5VALW +VDDA_CODEC
W=40Mil U32 (4.75V(4.56~4.94V))
+3VS 1 2 0.1U_0402_16V4Z 1 2 1 2
BLM18BD601SN1D_0603 BLM18BD601SN1D_0603 0_0603_5%
1 1 1 1 1
1
C728
2
0.1U_0402_16V4Z
1 IN
5
300mA
C734 C733 C1046 C730 C731 OUT
2 GND 1
C729
0.1U_0402_16V4Z 1U_0603_10V4Z <26,33,36,38,41> SUSP# 3 4
2 2 2 2 2 SHDN BYP 2.2U_0805_16V4Z
G9191-475T1U_SOT23-5 1 2
1U_0603_10V4Z 0.1U_0402_16V4Z C732
1 1
0.1U_0402_16V4Z
2
U27
+3VDD_CODEC 9 47 EAPD_CODEC EAPD_CODEC <33>

DVDD_CORE* EAPD/ SPDIF OUT 0 or 1 / GPIO 0
1 DVDD_CORE VOL_UP/DMIC_0/GPIO 1 2 DMIC_DAT <17>
VOL_DN/DMIC_1/GPIO 2 4
+VDDA_CODEC_R 25 AVDD1*
GPIO 3 30
38 AVDD2**
VREFOUT-E / GPIO 4 31
+3VS_HDA 3 DVDD_IO GPIO 5 43
32 MONO_OUT GPIO 6 44
45 SPDIF_OUT SPDIF_OUT <35>

HDA_BITCLK_CODEC HDA_BITCLK_CODEC SPDIF OUT1 / GPIO 7
<20> HDA_BITCLK_CODEC 6 BITCLK
48 PAD T21
SPDIF OUT0
1
@ <20> HDA_SDOUT_CODEC HDA_SDOUT_CODEC 5 11/26 update

R525 SDO
47_0402_5% <20> HDA_SDIN0 R522 1 2 33_0402_5% 8 SDI_CODEC VREFOUT_B
VREFOUT-B 28 VREFOUT_B <29>
2 HDA_SYNC_CODEC 2
<20> HDA_SYNC_CODEC 10
2
SYNC +VDDA_CODEC_R
1 VREFOUT-C 29
<20> HDA_RST#_CODEC HDA_RST#_CODEC 11
@C745 RESET# R548 5.1K_0402_1%
1 2
33P_0402_50V8K <17> DMIC_CLK R569 1 2 20K_0402_1% EXTMIC_DET# <29>
2 22_0402_5% SENSE R571 39.2K_0402_1%
11/28 update R563 1 SENSE_A 13 1 2 JACK_DET# <29,35>
<33> EC_BEEP 2 @ 47K_0402_5% R230 1 2 46 DMIC_CLK
R570 1 2 10K_0402_1% INTMIC_DET# <29>
C951 1 2 0.1U_0402_16V4Z
<20> SB_SPKR R524 1 2 47K_0402_5% 2 1 33 41 HP_OUTR
HP_OUTR <29>
C913 1U_0603_10V4Z CAP2 PORTA_R
HP Jack & Dock
R523 1 2 10K_0402_5% 1 2 MONO_INR 12 PCBEEP 39 HP_OUTL
PORTA_L HP_OUTL <29>
0.1U_0402_16V4Z
C956 1 2 0.1U_0402_16V4Z C955
22 MIC_EXTR 1 2 MIC_EXT_R <29>
PORTB_R C981 1U_0603_10V6K
R982 1
40 NC / OTP MIC_EXTL
Jack MIC
+VDDA_CODEC_R 2 5.1K_0402_1% PORTB_L 21 1 2 C983 0.022U_0603_25V7K MIC_EXT_L <29>
<35> SENSE_B# R910 1 2 39.2K_0402_1% SENSEB# 34 C982 1U_0603_10V6K 1 2 MIC_IN_R <29>
SENSE_B / NC
1
1
C979 37 24 MIC_INR
NC PORTC_R @ R911
0.1U_0402_16V4Z 18 23 MIC_INL 0_0603_5% Internal MIC
2 NC PORTC_L
19 C984 0.022U_0603_25V7K
2
NC LINE_OUT_R
PORTD_R 36 LINE_OUT_R <29> 1 2 MIC_IN_L <29>
20 NC
35 LINE_OUT_L LINE_OUT_L <29> Internal SPKR. 11/18 update
PORTD_L
10U_0805_10V4Z
C744 1 2 VC_REFA 27 15 DOCK_MICR 1 2 DOCK_MIC_R <35>
VREFFILT PORTE_R C985 1U_0603_10V6K
DOCK_MICL
DOCK MIC
26 AVSS1* PORTE_L 14 1 2 DOCK_MIC_L <35>
C986 1U_0603_10V6K
3 3
42 AVSS2**
PORTF_R 17
7 DVSS**
PORTF_L 16
92HD71B7X5NLGXA1X8_QFN48_7X7
@ C746
1 2
0.1U_0402_16V4Z
@ C747
1 2
0.1U_0402_16V4Z
@ C748
SENSE A SENSE B 1 2
0.1U_0402_16V4Z
Port Resistor Port Resistor @ C749

1 2
0.1U_0402_16V4Z Use an 80mil to
4
A 39.2K E 39.2K @ R1006 connection or place 4
1 2 a 1206 resistor under
0_0402_5%
CODEC with double
B 20K F 20K @R195
1 2
vias.
0_0805_5%
C 10K G 10K R198 Security Classification Compal Secret Data Compal Electronics, Inc.
1 2 GNDA <29,35> Issued Date 2007/08/02 Deciphered Date 2008/08/02 Title
0_1206_5%
Audio Codec-IDT9271B7
D 5.11K H 5.11K AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
GND GNDA DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-4111P 0.2
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A B C D E
A B C D E
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0.1U_0402_16V4Z
R594
+5VS
SPEAKER
1
0_1206_5%
2
JP20
11/14 update
1 1 1
GAIN0 GAIN1 Av(inv) SPKL+ 1
C766 C767 C1051 SPKL- 1
2 2
10U_0805_10V4Z SPKR+ 3
SPKR- 3
2 2 2
0 0 6dB 4 4
+5VS 5
1 1 1 1 GND1
0.1U_0402_16V4Z 0 1 10dB 6
C760 C761 C762 C763 GND2
15.6dB
CONN@ E&T_3806-F04N-02R
1 2 2 2 2 1
1 0 15.6dB
100P_0402_50V8J
16
15
6
1
U28 11/18 update 100P_0402_50V8J
1 1 21.6dB 100P_0402_50V8J 100P_0402_50V8J
VDD
PVDD1
PVDD2
R1000 R1001
11/18 update @ 100K_0402_5% 100K_0402_5% Change JP20 PCB Footprint
2
C1049 1 2 0.022U_0603_25V7K 7 2 from ACES_88231-04001_4P
RIN+ GAIN0
1 2 to E-T_3806-F04N-02R_4P
C1052 47P_0402_50V8J 3
R1002 GAIN1
1
2 1 C1050 1 2 0.022U_0603_25V7K 17
<28> LINE_OUT_R RIN- SPKR+
1 2 ROUT+ 18
0_0402_5% C1053 47P_0402_50V8J R1003 R1004
@ 100K_0402_5%
14 SPKR-
2
C1040 ROUT-
1 2 0.022U_0603_25V7K 9 LIN+
1 2 100K_0402_5%
C1054 47P_0402_50V8J 4 SPKL+
R1005 LOUT+ +VDDA_CODEC
2 1 C1041 1 2 0.022U_0603_25V7K 5 R906 C743
<28> LINE_OUT_L LIN- SPKL- 0_0402_5% 1U_0603_10V4Z
1 2 LOUT- 8
0_0402_5% C1055 47P_0402_50V8J 2 1 1 2
+VDDA_CODEC INTMIC IN
1
1
1
R904 R905 R951
12 4.7K_0402_5% 4.7K_0402_5% 100K_0402_5%
NC
2
THERMAL PAD
10 Keep 10 mil width JP42
2
EC_MUTE# BYPASS
<33> EC_MUTE# 19 SHUTDOWN 1 1
1 <28> MIC_IN_L 2 2
C1044 <28> MIC_IN_R 3 3
GND1
GND2
GND3
GND4
2 2
4.7U_0805_10V4Z
11/18 update 4 4
+3VS 2 1
2 R955 10K_0402_5% 5 GND1
<33> ANA_MIC_DET 6
20
13
11
1
21
GND2
1
TPA6017A2_TSSOP20 D ACES_88231-04001
Q151 2 CONN@
<28> INTMIC_DET# G
1
D 2N7002_SOT23-3 S
3
Q160 2
G
2N7002_SOT23-3 S 9/20 SP02000H700/SP02000H900
3
R909 Close to CODEC U27
<28> VREFOUT_B 2 1 C742 1 2
0_0402_5%
1U_0603_10V4Z
1
R907 R908
4.7K_0402_5% 4.7K_0402_5%
Audio/B & CIR
2
<28> MIC_EXT_R MIC_EXT_R

JP43
<28> MIC_EXT_L MIC_EXT_L EXTMIC IN MIC_EXT_R 1 1
MIC_EXT_L 2 2
3 3
HP_OUT_R 4
HP_OUT_L 4
5 5
3 Close to CODEC U27 3
6 6
EXTMIC_DET# 7
B+ <28> EXTMIC_DET# 7
<28,35> JACK_DET# HP_DET# 8 8
9 9
10 10
CIR_ IN 11
<33,35> CIR_IN 11
1
+3VALW +3VALW 12
+5VL 12
1
D R975 13 13
2 330K_0402_5% 14 14
2
G
R973 R974 S Q161 CONN@ ACES_87213-1400G
3
10K_0402_5% 10K_0402_5% 2N7002_SOT23-3

09/13 update
3
1
6 1
10/30 update 9/20 SP02000H800

2N7002DW-7-F_SOT363-6
5
Q145B
HP_DET# 2N7002DW-7-F_SOT363-6
2
4
Q145A
11/05 update 11/19 update
1
Q147A
R968
2N7002DW-7-F_SOT363-6 C775 150U_Y_6.3VM
DOCK_LOUT_R 2 DOCK_LOUT_CR_R 1 DOCK_LOUT_C_R
+
<28> HP_OUTR 6 1 1 2 DOCK_LOUT_C_R <35>

47_0603_1%
5
Q147B
2N7002DW-7-F_SOT363-6 C776 150U_Y_6.3VM
R969 HP OUT For Docking
DOCK_LOUT_L 2 DOCK_LOUT_CR_L DOCK_LOUT_C_L
+
<28> HP_OUTL 3 4 1 1 2 DOCK_LOUT_C_L <35>

47_0603_1%
C773 150U_Y_6.3VM
HP_OUT_R
+
1 2
4 C774 150U_Y_6.3VM 4
HP_OUT_L HP OUT For M/B
+
1 2

AMP & Audio Jack
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A B C D E
A B C D E
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1 1
ACCELEROMETER
+3VS +3VS_ACL +3VS_ACL_IO

D44 R959 0_0603_5%
2 1 1 2
CH751H-40PT_SOD323-2
1 1
C1030 C1031
10U_0805_6.3V6M
2 2
2 0.1U_0402_16V4Z 2
SMB_CK_CLK0
SMB_CK_CLK0 <8,9,15,20>
14
U63
VDDIO absolute man
0011101b
SCL / SPC
rating is VDD+0.1
+3VS_ACL_IO 1 13 SMB_CK_DAT0
Vdd_IO SDA / SDI / SDO SMB_CK_DAT0 <8,9,15,20>
R997 2 12 R998
0_0402_5% GND SDO 0_0402_5%
1 2 3 Reserved Reserved 11 1 2
4 GND GND 10
5 GND INT 2 9 HDD_HALTLED <34>
+3VS_ACL 6 Vdd INT 1 8 ACCEL_INT <19>
3 3
CS
LIS302DLTR_LGA14_3x5
7
2 1
R999 10K_0402_5%
L Must be placed in the center of the system.
4 4

Accelerometer
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A B C D E
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Left side USB CONNECTOR Left side ESATA5/USB2 combination Connector Right side USB 0&1 Board Conn
L Change PCB Footprint from SW_WCM2012F2S_4P to KING_WCM-2012-900T_4P
Max 0.5A
10/09 update 11/14 update JP47
D11 +USB_VCCA
Max 2.5A +5VALW 1
+5VALW +USB_VCCA USB20_P2_R L51 JESAT 1
+USB_VCCA 4 VIN IO1 2 2 2
4 4 3 1 USB 3
<20> USB20_N2 3 VBUS 3
U40 USB20_N2_R 3 1 USB20_N2_R 2 USB_EN# 4
1 IO2 GND D- <33> USB_EN# 4 1
1 8 W=100mils USB20_P2_R 3 5
GND OUT @ PRTR5V0U2X_SOT143-4 D+ <20> USB20_N0 5
2 IN OUT 7 <20> USB20_P2 1 1 2 2 4 GND <20> USB20_P0 6 6
1000P_0402_50V7K
150U_D_6.3VM
0.1U_0402_16V4Z
3 IN OUT 6 1 D12 7 7
1 4 5 1 1 WCM-2012-900T_4P 5 8
EN# OC# GND <20> USB20_N1 8
C789
C790
C791
C788 + 4 2 SATA_TXP2 SATA_TXP2 6 9
+USB_VCCA VIN IO1 <21> SATA_TXP2 A+ <20> USB20_P1 9
TPS2061IDGN_MSOP8~N <21> SATA_TXN2 SATA_TXN2 7 ESATA 10
4.7U_0805_10V4Z SATA_TXN2 A- 10
3 IO2 GND 1 8 GND
2 2 2 2
<21> SATA_RXN2_C C792 2 1 0.01U_0402_16V7KSATA_RXN2 9 B-
@ PRTR5V0U2X_SOT143-4 <21> SATA_RXP2_C C793 2 1 0.01U_0402_16V7KSATA_RXP2 10 B+
11 GND 11 GND1
12 GND2
USB_EN# 12 GND ACES_87213-1000G
13 GND
14 9/20 SP02000DX00
GND
15 GND CONN@
CONN@ TYCO_1759576-1
Update Symbol TYCO_1759576-1_11P-T
2 2
Finger printer BT Connector

R622
11/14 update JP32
1 2 1 1 +3VAUX_BT
@ 0_0603_5% 20070209 Add for FPR 2
+3VALW Q31 @ SI2301BDS-T1-E3_SOT23-3 +3VS 2 USB20_P6
3 3 USB20_P6 <20>
R581 4 USB20_N6
4 USB20_N6 <20>
S
+3VS_FB
D
3 1 1 2 5 5 BT_LED <34>
1 0_0603_5% 6 @ R517 1 2 1K_0402_5%
C832 6 @ R518 1 1K_0402_5% CH_DATA <26>
7 7 2 CH_CLK <26>
0.1U_0402_16V4Z
G
8
2
USB_EN# 8
2 GND1 9 0612 no install
JP39 10
GND2 D16
1 1
USB20_N7 2 ACES_88231-08001 +3VAUX_BT 4 2 USB20_P6
<20> USB20_N7 2 VIN IO1
USB20_P7 3 CONN@
<20> USB20_P7 3
4 9/20 SP02000HC00/SP02000HB00 USB20_N6 3 1
4 IO2 GND
5 5
6 @ PRTR5V0U2X_SOT143-4
D21 6
7 GND
+3VS_FB 4 2 USB20_P7 8 +3VALW +3VAUX_BT
VIN IO1 GND Q24 SI2301BDS-T1-E3_SOT23-3
USB20_N7 3 1 ACES_85201-06051
IO2 GND 0.1U_0402_16V4Z
S
CONN@
D
3 1
@ PRTR5V0U2X_SOT143-4 9/20 SP01000B000
G
1 1 1 1
2
3 C798 R519 C799 C800 C801 3
1U_0603_10V4Z 100K_0402_5%
2 2 2 2
2
0.01U_0402_16V7K 4.7U_0805_10V4Z
11/20 update R520
<21> BT_OFF 1 2 1 2
10K_0402_5% C802 0.1U_0402_16V4Z
Check BT power consumption < 1A
4 4

USB, BT, eSATA,FPR
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A B C D E
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SPI Flash (8Mb*1) 1 20mils CONN@

C484 U29 &U29
+3VL +3VAL 8 4
0.1U_0402_16V4Z VCC VSS
1 2
@ R995 0_0402_5% 2
3 W
+3VALW
1 2 7 HOLD
1
R996 0_0402_5% 1 45@ SST25VF080B-50-4C-S2AF_SO8
1 C803 SPI_CS# INT_SPI_CS# 9/20 SA000012E00/SA00000XT00 1
R521
11/28 update <33> SPI_CS# 1
R221
2
0_0402_5%
1 S
0.1U_0402_16V4Z 100K_0402_5% 1 2 SPI_CLK_R 6
2 <33> SPI_CLK C
U31 R227 0_0402_5%
2
8 VCC A0 1 <33> EC_SO_SPI_SI 2 1 EC_SO_SPI_SI_R 5 D Q 2 EC_SI_SPI_SO_R 2 1 EC_SI_SPI_SO <33>
7 2 R229 0_0402_5% R223 0_0402_5%
WP A1 WIESON G6179 8P SPI
<33,34,37> SMB_EC_CK1 6 SCL A2 3
<33,34,37> SMB_EC_DA1 5 SDA GND 4
9/20 SP07000F500
AT24C16AN-10SI-2.7_SO8 Need add back R221 if no ext BIOS design U30 install.
L
1
+3VALW
R526
12/03 update
C489
100K_0402_5%
2 1
2
@ 0.1U_0402_16V4Z
R226
5
U30 @ 100K_0402_5%
R228
2 INT_FLASH_EN# 1 2
G Vcc
INT_SPI_CS# B
1 2 4 Y
1 SPI_CS#
@ 22_0402_5% A
@ NC7SZ32P5X_NL_SC70-5
3
2 2
JP12
SPI_CS# 1 2 +3VALW
EC_SI_SPI_SO_R 1 2 INT_FLASH_EN#
3 3 4 4
5 6 SPI_CLK_R
<21> SB_INT_FLASH_SEL 5 6
7 8 EC_SO_SPI_SI_R
7 8
@ E&T_2941-G08N-00E~D
C:Chg. PN to LTC00000200
11/13 update
LPC Debug Port LPC Debug Port

3 +3VS 3
JP41
H31 1
+3VALW 1
2 2
3 3
6 5 LPC_DRQ# 4
LPC_DRQ# <19> 4
5 CLK_14M_SIO
5 CLK_14M_SIO
6 6 CLK_14M_SIO <15>
SIRQ 7 4 PLT_RST# 7 LPC_AD0
<19,33> SIRQ PLT_RST# <11,14,19,25,26,27,33> 7
1
8 LPC_AD1
8 LPC_AD2 @ R310
9 9
LPC_AD3 8 3 LPC_AD2 10 LPC_AD3 100_0402_5%
<19,33> LPC_AD3 LPC_AD2 <19,33> 10
11 LPC_FRAME#
11 LPC_DRQ#
12
2
LPC_AD1 LPC_AD0 12 PLT_RST#
<19,33> LPC_AD1 9 2 LPC_AD0 <19,33> 13 13 1
14 R137 1 2 @ 0_0402_5%
14 CLK_PCI_SIO2 @ C502
15 15 CLK_PCI_SIO2 <19>
LPC_FRAME# 10 1 CLK_PCI_SIO 16 SIRQ 100P_0402_25V8K
<19,33> LPC_FRAME# CLK_PCI_SIO <19,23> 16 2
17 17 11/09 update
18 18
2
19 19
@ DEBUG_PAD @ R232 20
9/20 ?????? 22_0402_5% 20
@ ACES_85201-2005
1
2 9/20 DC233105000
@ C486
22P_0402_50V8J
1
4 4

BIOS ROM/Debug Tool
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+3VL_EC
Keyboard Connector
KSO15
KSO10
1
2
JP33
1
KSO15
KSO10
For EMI
@ C213
@ C609
1
1
2
2
100P_0402_25V8K
100P_0402_25V8K
0.1U_0402_16V4Z 0.1U_0402_16V4Z 1000P_0402_50V7K KSO11 2 KSO11 @ C754 100P_0402_25V8K
3 3 1 2
1 1 1 1 1 KSO14 4 KSO14 @ C756 1 2 100P_0402_25V8K
KSO13 4 KSO13 @ C757 100P_0402_25V8K
5 5 1 2
C805 C806 C807 C808 C809 +3VL +3VL_EC +EC_AVCC KSO12 6 KSO12 @ C758 1 2 100P_0402_25V8K
KSO3 6 KSO3 @ C759 100P_0402_25V8K
7 7 1 2
2 2 2 2 2 R527 KSO6 KSO6 @ C764 100P_0402_25V8K
8 8 1 2
0.1U_0402_16V4Z 1000P_0402_50V7K 1 2 KSO8 9 KSO8 @ C768 1 2 100P_0402_25V8K
0_0805_5% KSO7 9 KSO7 @ C769 100P_0402_25V8K
10 10 1 2
KSO4 11 KSO4 @ C822 1 2 100P_0402_25V8K
KSO2 11 KSO2 @ C823 100P_0402_25V8K
12 12 1 2
111
125
1 KSI0 KSI0 @ C824 100P_0402_25V8K 1
22
33
96
67
13 13 1 2
9
U33 KSO1 14 KSO1 @ C825 1 2 100P_0402_25V8K
KSO5 14 KSO5 @ C826 100P_0402_25V8K
15 1 2
VCC
VCC
VCC
VCC
VCC
VCC
AVCC
KSI3 15 KSI3 @ C875 100P_0402_25V8K
16 16 1 2
KSI2 17 KSI2 @ C876 1 2 100P_0402_25V8K
KSO0 17 KSO0 @ C877 100P_0402_25V8K
18 18 1 2
GATEA20 1 21 INV_PWM KSI5 19 KSI5 @ C878 1 2 100P_0402_25V8K
<20> GATEA20 GA20/GPIO00 INVT_PWM/PWM1/GPIO0F INV_PWM <17> 19
KB_RST# 2 23 FAN_PWM KSI4 20 KSI4 @ C884 1 2 100P_0402_25V8K
<20> KB_RST# KBRST#/GPIO01 BEEP#/PWM2/GPIO10 FAN_PWM <4> 20
SIRQ EC_BEEP KSO9 KSO9 @ C885 100P_0402_25V8K
<19,32> SIRQ 3 SERIRQ# FANPWM1/GPIO12 26 EC_BEEP <28> 11/13 update 21 21 1 2
LPC_LFRAME# 4 27 ACOFF KSI6 22 KSI6 @ C886 1 2 100P_0402_25V8K
<19,32> LPC_FRAME# LFRAME# ACOFF/FANPWM2/GPIO13 ACOFF <38> 22
C810 R530 <19,32> LPC_AD3 LPC_AD3 5 0.01U_0402_16V7K KSI7 23 KSI7 @ C887 1 2 100P_0402_25V8K
LPC_AD2 LAD3 C812 ECAGND KSI1 23 KSI1 @ C888 100P_0402_25V8K
1 2 1 2 <19,32> LPC_AD2 7 LAD2 PWM Output 1 2 24 24 1 2
@ 33_0402_5% <19,32> LPC_AD1 LPC_AD1 8 63 BATT_TEMP BATT_TEMP <37>
@ 15P_0402_50V8J LPC_AD0 LAD1 BATT_TEMP/AD0/GPIO38 BATT_OVP
<19,32> LPC_AD0 10 LAD0 LPC & MISC BATT_OVP/AD1/GPIO39 64 BATT_OVP <37>
ADP_I/AD2/GPIO3A 65 ADP_I <38>
CLK_PCI_EC 12 AD Input 66 ADP_ID <37> 25
<19,23> CLK_PCI_EC PCICLK AD3/GPIO3B GND1
PLT_RST# 13 75 TP_BTN# TP_BTN# <34> 26
<11,14,19,25,26,27,32> PLT_RST# PCIRST#/GPIO05 AD4/GPIO42 GND2
+3VL_EC R533 1 2 ECRST# 37 76 ANA_MIC_DET <29>
47K_0402_5% EC_SCI# ECRST# SELIO2#/AD5/GPIO43 ACES_85201-24051
<20> EC_SCI# 20 SCI#/GPIO0E
<20,23> HDARST# 38 CLKRUN#/GPIO1D CONN@
DAC_BRIG/DA0/GPIO3C 68 DAC_BRIG <17>
C811 2 1 70 VCTRL <38> 9/20 SP01000FF00/SP01000G300
0.1U_0402_16V4Z EN_DFAN1/DA1/GPIO3D IR EF +5VS_LED
DA Output IREF/DA2/GPIO3E 71 IREF <38>
KSI0 55 72
KSI1 56
KSI0/GPIO30 DA3/GPIO3F AC_SET <38> KB Back Light Conn
KSI1/GPIO31
1
KSI2 57
KSI3 KSI2/GPIO32 R516
KSI4
58 KSI3/GPIO33 PSCLK1/GPIO4A 83 EC_MUTE# <29> 11/13 update
10/08 update KSI5
59 KSI4/GPIO34 PSDAT1/GPIO4B 84 USB_EN# <31>
150_0603_1%
60 KSI5/GPIO35 PSCLK2/GPIO4C 85 I2C_INT <34>
+3VALW KSI6 61 PS2 Interface 86 JP48
MUTE_LED <35>
2
KSI7 KSI6/GPIO36 PSDAT2/GPIO4D TP_CLK
62 KSI7/GPIO37 TP_CLK/PSCLK3/GPIO4E 87 TP_CLK <34> 1 1
KSO0 39 88 TP_DATA TP_DATA <34> 2
KSO0/GPIO20 TP_DATA/PSDAT3/GPIO4F 2
1
2 KSO1 2
R538 KSO2
40 KSO1/GPIO21 11/13 update 5 G1 3 3
41 KSO2/GPIO22 6 G2 4 4
10K_0402_5% KSO3 42 97 T20 PAD select SPI ROM or LPC ROM
KSO4 KSO3/GPIO23 SDICS#/GPXOA00 ACES_85201-04051
43 KSO4/GPIO24 SDICLK/GPXOA01 98 DOCK_VOL_UP# <35>
KSO5 44 KSO5/GPIO25 Int. K/B 99 DOCK_VOL_DWN# <35> CONN@
2
KSO6 SDIDO/GPXOA02
45 KSO6/GPIO26 Matrix SDIDI/GPXID0 109 VGATE <43>
LID_SW# KSO7 46 SPI Device Interface 1 2 9/20 SP01000KC00/SP010009O10
KSO8 KSO7/GPIO27 R1044 100K_0402_5%
11/22 update KSO9
47 KSO8/GPIO28 +3VS
48 KSO9/GPIO29 SPIDI/RD# 119 EC_SI_SPI_SO <32>
+3VL KSO10 49 120
KSO10/GPIO2A SPIDO/WR# EC_SO_SPI_SI <32>
KSO11 50 SPI Flash ROM SPICLK/GPIO58 126 SPI_CLK <32> DOCK@ R589
4.7K_0402_5% KSO12 KSO11/GPIO2B +5VL 10K_0402_5%
51 KSO12/GPIO2C SPICS# 128 SPI_CS# <32>
R528 2 1 SMB_EC_DA1 KSO13 52 DOCK_VOL_UP# 2 1
4.7K_0402_5% KSO14 KSO13/GPIO2D R46
53 KSO14/GPIO2E 1 2 10K_0402_5%
+3VS R529 1 SMB_EC_CK1 KSO15 CIR_ IN DOCK_VOL_DWN# 2
2
4.7K_0402_5% KSO16
54 KSO15/GPIO2F CIR_RX/GPIO40 73 CIR_IN <29,35> 11/11 update DOCK@ R590
1
81 KSO16/GPIO48 CIR_RLC_TX/GPIO41 74
R531 2 1 SMB_EC_DA2 KSO17 82 89 FSTCHG 10K_0402_5%
KSO17/GPIO49 FSTCHG/SELIO#/GPIO50 FSTCHG <38>
4.7K_0402_5% 90
BATT_CHGI_LED#/GPIO52 STD_ADP <38>
R532 2 1 SMB_EC_CK2 CAPS_LED#/GPIO53 91 CAPS_LED# <34>
10K_0402_5% <32,34,37> SMB_EC_CK1 SMB_EC_CK1 77 GPIO BATT_LOW_LED#/GPIO54 92 BAT_LED#
SCL1/GPIO44 BAT_LED# <34>
R513 1 2 WL_BLUE_BTN <32,34,37> SMB_EC_DA1 SMB_EC_DA1 78 SDA1/GPIO45 SUSP_LED#/GPIO55 93 ON/OFFBTN_LED#
ON/OFFBTN_LED# <34> 2 1
11/20 update <6> SMB_EC_CK2 SMB_EC_CK2 79 SM Bus 95 SYSON R541 10K_0402_5%
SMB_EC_DA2 SCL2/GPIO46 SYSON/GPIO56 VR_ON SYSON <26,34,36,40> R534 +5V_TP
<6> SMB_EC_DA2 80 SDA2/GPIO47 VR_ON/XCLK32K/GPIO57 121 VR_ON <43>
11/11 update 127 AC_IN_D 2 1 10K_0402_5%
+3VL AC_IN/GPIO59 AC_IN <38,39>
D54 TP_CLK 1 2
AC_IN_D <21>
CH751H-40PT_SOD323-2 11/13 update R535
R514 1 2 ESB_CLK <20> SLP_S3# SLP_S3# 6 100 EC_RSMRST# 2 1 +3VALW 10K_0402_5%
10K_0402_5% SLP_S5# PM_SLP_S3#/GPIO04 EC_RSMRST#/GPXO03 EC_RSMRST# <20> R1040 TP_DATA
<20> SLP_S5# 14 PM_SLP_S5#/GPIO07 EC_LID_OUT#/GPXO04 101 EC_LID_OUT# <20> 1 2
R515 1 2 ESB_DAT <20> EC_SMI# EC_SMI# 15 EC_SMI#/GPIO08 EC_ON/GPXO05 102 EC_ON <36,39>
100K_0402_5%
10K_0402_5% <34> LID_SW# LID_SW# 16 103 WL_BLUE_LED# <34> 1 2
+3VL_EC ESB_CLK LID_SW#/GPIO0A EC_SWI#/GPXO06 SB_PWRGD C1073
<34> ESB_CLK 17 SUSP#/GPIO0B ICH_PWROK/GPXO06 104 SB_PWRGD <6,20,43>
<34> ESB_DAT ESB_DAT 18 GPO 105 BKOFF# 100P_0402_50V8J
3 WL_BLUE_BTN PBTN_OUT#/GPIO0C BKOFF#/GPXO08 BKOFF# <17> 3
<34> WL_BLUE_BTN 19 EC_PME#/GPIO0D GPIO WL_OFF#/GPXO09 106
2
<6> H_THERMTRIP#_EC H_THERMTRIP#_EC 25 107 TP_LED# TP_LED# <34>

R543 EC_THERM#/GPIO11 GPXO10 SUSP# SYSON
4.7K_0402_5%
<35> CONA# 28 FAN_SPEED1/FANFB1/GPIO14 GPXO11 108
L TP_LED#=L, T/P disable
<36> VLDT_EN 29 FANFB2/GPIO15
E51_TXD 30 TP_LED#=float (GPO), T/P enable
EC_TX/GPIO16
1
E51_RXD 31 110
1
ON/OFF# EC_RX/GPIO17 PM_SLP_S4#/GPXID1 R536 R539

<34> ON/OFF# 32 ON_OFF/GPIO18 ENBKL/GPXID2 112 ENBKL <11>
<36> DIM_LED 34 114 EAPD_CODEC <28> 100K_0402_5% 100K_0402_5%
PWR_LED#/GPIO19 GPXID3
<35> DOCK_SLP_BTN# 1 2 <34> NUM_LED# 36 NUMLED#/GPIO1A GPI GPXID4 115 EC_THERM# <21>
R542 0_0402_5% 116 SUSP#
R547
2
C813 GPXID5 PWRBTN_OUT# SUSP# <26,28,36,38,41>
GPXID6 117 PWRBTN_OUT# <20>
15P_0402_50V8J 118 NMI_DBG# 1 2
GPXID7 PCI_SERR# <19>
1 2 C RY2 122 XCLK1 0_0402_5%
123 XCLK0 V18R 124 2 1
C814 4.7U_0805_10V4Z 11/13 update
1
AGND
Y7
GND
GND
GND
GND
GND
11/07 update 3 4 @
NC OUT R545 Need 4.7uf for 926 C version +3VS
2 1 20M_0402_5% KB926QFC0_LQFP128_14X14 11/13 update R1050
11
24
35
94
113
69
NC IN TP_BTN# 1 2
2
32.768KHZ_12.5PF_Q13MC30610003 10K_0402_5%
1 2 C RY1
+3VL_EC
2nd source : SJ100004N00 same as IAL80 C815
L
ECAGND
15P_0402_50V8J
1
+EC_AVCC L80
0_0603_5%
11/13 update R544
L81
2
LAN_POWER_OFF 1 2 E51_RXD 1 2 1 2
4 <25> LAN_POWER_OFF 4
C816 0.1U_0402_16V4Z 0_0603_5%
0_0402_5%
EC DEBUG port
@ 11/16 update
JP34
1 1 +5VL
2 E51_RXD
2 E51_TXD
3
3
4 4
ACES_85205-0400
EC KB926/KB conn
9/20 SP020007200 AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
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for debug only ON/OFF Button Connector TP ON/OFF 10/08 update
+3VALW M/B TO TP/B Max 0.5A
+5V_TP
TP_DATA
TP_CLK
2
1
1
+5VALW_LED
BTN @ C819 @ D31
11/22 update JP1 R1038 0.1U_0402_16V4Z PSOT24C_SOT23-3
SW1 @ 10K_0402_5% 2
1 3 1
1
ON/OFF# 1 SMT1-05-A_4P JP37
<33> ON/OFF# 2
2
ON/OFF# ON/OFFBTN_LED# 3 2 TP_BTN#
2 4 <33> ON/OFFBTN_LED# 3 G1 5 3 1 TP_BTN# <33> 1 1
4 6 2 TP_CLK TP_CLK <33>
SW2 4 G2 2 TP_DATA
4 2 5 3 TP_DATA <33>
6
5
1 SMT1-05_4P ACES_85201-04051 G1 3 1
6 G2 4 4
CONN@
5
6
ACES_85201-04051
CONN@ 1 1
9/20
SP01000KC00/SP01E000900
9/20 SP01000J100 @ C820 @ C821
MDC 1.5 Conn. 9/20 STANDOFF (H= 5.0 mm) ES000000800 Max 0.5A 100P_0402_50V8J 2 2 100P_0402_50V8J
+5VALW R235 0_0603_5% +5V_TP

11/01 update 1 2
S
JP25
D
3 1
1 1 2 2 +3VS 11/20 update
1
<20> HDA_SDOUT_MDC 3 4 Q85
3 4 R645 SI2301BDS-T1-E3_SOT23-3
G
5 6 +3VS
2
5 6 +3VL+5VALW_LED
<20> HDA_SYNC_MDC 7 7 8 8
<20> HDA_SDIN1 1 R495 2HDA_SDIN1_MDC 9 9 10 10 10K_0402_5% R557
33_0402_5% 11 12 10/08 update @ 4.7K_0402_5%
<20> HDA_RST#_MDC HDA_BITCLK_MDC <20>
SWITCH BOARD.
2
11 12
1
+3VS R554 R555
GND
GND
GND
GND
GND
GND
1
1
1
R496 D R556 RP@0_0603_5% RM@ 0_0603_5%
ACES_88020-12101 @ 10_0402_5% 2 Q34
13 <26,33,36,40> SYSON
14
15
16
17
18
2
1 1 1 CONN@ G 2N7002_SOT23-3 @ 4.7K_0402_5%
S 11/20 update
2
2
C780 1 <33> WL_BLUE_BTN R1034 1 2 RM@ 0_0402_5%
C778 C779 @4.7U_0805_10V4Z C777 WL_BLUE_LED# R1035 1 2 RM@ 0_0402_5%
2 2 2 +5VS_LED JP36
Change JP25 PCB Footprint @ 10P_0402_50V8J 11/28 update 11/13 update 1
1000P_0402_50V7K 2 R1046 1 1
<32,33,37> SMB_EC_CK1 2 CY@ 0_0402_5% 2 2
2 0.1U_0402_16V4Z from ACES_88018-124G_12P <32,33,37> SMB_EC_DA1 R1047 1 2 CY@ 0_0402_5% ON/OFFBTN_LED# 3 2
R1048 1 3
to ACES_88020-12101_12P <33> ESB_CLK 2 ENE@ 0_0402_5% 4 4
<33> ESB_DAT R1049 1 2 ENE@ 0_0402_5% 5 5
<33> I2C_INT 6 6
+5VALW_LED 1 R1036 2 7 7
@ 150_0402_5% <33> NUM_LED# 8
ON/OFF# 8
11/13 update 9 9
10 10
1
11 GND
12
HDD/G-Sensor LED +5VS_LED +3VS
TouchPAD ON/OFF LED R558 GND
10K_0402_5% ACES_85201-1005N
+5VS_LED CONN@
2
9/20 SP01000H400
1
+5VS
1
R987 R988
R983 R984
200_0402_5% 390_0402_5% 200_0402_5% 390_0402_5%
Reed switch BOARD.
1
R20 D18 need correct pin D18 need correct pin

L L
2 2
4 2
+5VS
3
10K_0402_5% connection after netin connection after netin

Q7B D18 10/08 update D17 11/10 update 11/14 update
2
1
WHITE
WHITE
YELLOW
YELLOW
5 HT-297UY5/BP5_YELLOW-WHITE R985 HT-297UY5/BP5_YELLOW-WHITE +3VALW
JP40
6
@ 10K_0402_5% 1
4
3
Q7A 1
1 R42 2 HDD_HALTLED# <21>
T/P Enable (TP_LED#=X)-> White <33> LID_SW# 2 4
2
0_0402_5% 2 GND
T/P Disable (TP_LED#=L)-> Amber 3 3 GND 5
1
2N7002DW-7-F_SOT363-6 D 1
D
<21> SATA_LED# 2
Q156 2 2 TP_LED# TP_LED# <33>
3 HDD_HALTLED <30> 3
2N7002DW-7-F_SOT363-6 G G CONN@ ACES_88231-03041
1
@ 2N7002_SOT23-3S Q153 S
3
2N7002_SOT23-3 Change JP40 PCB Footprint from

11/14 update ACES_85204-03001_3P to ACES_88231-03041_3P
Battery Charge LED 11/10 update WLAN and BT LED inform pin to KBC
+5VALW_LED
WHITE +3VS +3VS
D6 R989 11/28 update
<33> BAT_LED# 1 2 1 R550 2 1 2 R1041
200_0402_5% 10K_0402_5% 2 1 +3VS
3
HT-F196BP5_WHITE 47K @ 10K_0402_5%
3
WL_BLUE_LED#
CAPS LOCK LED <33> WL_BLUE_LED#
Q158B
WL/WW_LED
10K 2 1 2 WL_LED# <26>
5 R1007 0_0402_5%
6
+5VS_LED
WHITE
2N7002DW-7-F_SOT363-6 1 2 WW_LED# <26>
4
D7 Q158A Q168 R1008 0_0402_5%
1 2 1 R552 2 2 DTA114YKAT146_SOT23-3
1
<33> CAPS_LED# 200_0402_5% 2N7002DW-7-F_SOT363-6
HT-F196BP5_WHITE 1 BT_LED <31>
POWER LED
1
1
+5VALW_LED R1025 R1024
4
WHITE 4
D8 100K_0402_5% 100K_0402_5% 09/29 update
ON/OFFBTN_LED# 1 2 1 R549 2
2
2
200_0402_5%
HT-F196BP5_WHITE
White LED: VF=3V, IF = 10mA, Res = 200 ohm

Amber LED: VF=1.8V, IF = 8mA, Res = 390 ohm Security Classification Compal Secret Data Compal Electronics, Inc.
TP,MDC,ON/OFF,S/W,LED,Reed
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+DOCKVIN
JDOCK
<16> RED_L 38 CRT_Red Digital gnd 39

TV_LUMA_L
11/05 update
1 <16> GREEN_L 40 CRT_Green TV Luma 37 PAD T51
DOCK@ 34 35 TV_CRMA_L
<16> BLUE_L CRT_Blue TV chroma PAD T52
C831 D_DDCDATA 36 33 TV_COMPS_L
1000P_0402_50V7K <16> D_DDCDATA DDC_DATA TV composite PAD T53
D_DDCCLK 30 31
1 2 <16> D_DDCCLK DDC_Clock TV ground 1
D_HSYNC 32 29 CIR_ IN CIR_IN <29,33>
<16> D_HSYNC Hsync CIR input
D_ VSYNC 26 27 DOCK_PWR_ON
<16> D_VSYNC Vsync PWR_ON
USB20_N3 28 25 MUTELED 1 2 MUTE_LED <33>
<20> USB20_N3 USB- Mute_LED
USB20_P3 22 23 DOCK_SLP_BTN# DOCK@ R591 1K_0402_5% DOCK_SLP_BTN# <33>
<20> USB20_P3 USB+ Sleep Botton
24 21 JACK_DET# JACK_DET# <28,29>
Digital gnd Jack Detect R_VOL_UP# DOCK@ R567 1 DOCK_VOL_UP#
09/19 update 18 MDI3- VOL_up 19 2 200_0402_5% DOCK_VOL_UP# <33>
20 17 R_VOL_DWN# DOCK@ R568 1 2 200_0402_5% DOCK_VOL_DWN# DOCK_VOL_DWN# <33>
MDI3+ VOL_down SPDIFO_L
14 MD2I- SPDIF 15
AUDIO_OGND
DOCK_PWR_ON Spec RJ45_MIDI1-
16
10
MDI2+ Audio Output gnd 13
11 DOCK_LOUT_C_R
<25> RJ45_MIDI1- MDI1- Right headphone DOCK_LOUT_C_R <29>
0V = Notebook S4/S5, Dock off <25> RJ45_MIDI1+
RJ45_MIDI1+
RJ45_MIDI0-
12 MDI1+ Left headphone 9 DOCK_LOUT_C_L
DOCK_MIC_R_C
DOCK_LOUT_C_L <29>
<25> RJ45_MIDI0- 6 MDI0- Mic_Right 7
2.5V = Notebook S3, Dock on <25> RJ45_MIDI0+
RJ45_MIDI0+ 8 MDI0+ Mic_Left 5 DOCK_MIC_L_C
+V_BATTERY 2 3 AUDIO_IGND
4V = Notebook S0, Dock on PJP5 4
Battery out
Battery out
Mic gnd
Dock_present 1 DOCK_PRESENT
1 2 41 +DOCKVIN
B+ GND
GND 42
DOCK@ DOCK@ D43 45 43
PAD-OPEN 2x2m GND GND
+5VS 1 2 2 46 GND GND 44
R586 1K_0402_5% 1 DOCK_PWR_ON
+3VALW 1 2 3
R585 1K_0402_5% CONN@ FOX_QL1122L-H212AR-7F
DOCK@ DAN202U_SC70 11/14 update
2
Update symbol finish and swap back

1
D R588
<36,42> SYSON# 2 10K_0402_5% L JDOCK Pin38/40 , 34/36 , 30/32, 26/28,
G
S
DOCK@ 22/24, 10/12, 6/8 Add pin 45/46 to GND
3
Q36
2
2N7002_SOT23-3
L R976/Q149/R646 be option with R992/C945 2
DOCK@
R_VOL_UP# R_VOL_DWN# +1.5VS
SPDIF
1 1
2
DOCK@ DOCK@
C843 C844 R976 R646
1000P_0402_50V7K 1000P_0402_50V7K 1 2
+3VL_EC 2 2 @ 33_0402_5% @ 0_0402_5%
1 1
2
C DOCK@ C945 R647

R565 DOCK_LOUT_C_R DOCK_LOUT_C_L Q149 2 1 2 1 2 SPDIF_OUT <28>
10K_0402_5% @ MMBT3904_NL_SOT23-3 B DOCK@ 220_0402_5%
1
1 1 E DOCK@ 1 0.1U_0402_16V7K
DOCK@
3
R992 C944 R573
1
C942 C943 SPDIFO_L 1 2

CONA# <33>
DOCK@ 0_0603_5% DOCK@ 110_0402_5%
2 2 2
2
1
D DOCK@ 220P_0402_50V7K DOCK@ 220P_0402_50V7K 220P_0402_50V7K

DOCK_PRESENT 1 2 2 Q33
G 2N7002_SOT23-3 09/29 update
R572 1K_0402_5% S DOCK@
3
1
DOCK@
R566
47K_0402_5% Change PCB Footprint from L_FBM-11-160808_2P to TAI-T_FCM1608KF-601T02_2P
DOCK@ L
MIC_Dock Need 600 Ohm 500 mA
2
DOCK@ L94
DOCK@ R942 10K_0402_5% FCM1608KF-601T02_2P
<28> DOCK_MIC_R 2 1 DOCK_MIC_R_R 1 2 DOCK_MIC_R_C
3 H32 H33 H34 H35 H36 DOCK@ R943 10K_0402_5% 3
@ H_2P8 @ H_2P8 @ H_2P8 @ H_2P8 @ H_2P8 <28> DOCK_MIC_L 2 1 DOCK_MIC_L_R 1 2 DOCK_MIC_L_C
FCM1608KF-601T02_2P
1
DOCK@ L93 1 1
1
DOCK@ R980
1
DOCK@ R944 1.21K_0402_1% 10/09 updateDOCK@ C921

1.21K_0402_1% DOCK@ C922
H37 H39 H40 H41 220P_0402_50V7K 2 2 220P_0402_50V7K
2
@ H_2P8 @ H_2P8 @ H_2P8 @ H_2P8
2
+3VS
1
H42 H43 H44 H46
2
@ H_2P8 @ H_4P2 @ H_4P2 @ H_4P2
DOCK@ SENSE_B# <28>
R915
2
R914 10K_0402_5%
1
1
DOCK@ D
1
10K_0402_5% 2 Q100
H47 H48 G
1
@ H_3P3 @ H_3P3 D
S DOCK@ 2N7002_SOT23-3
3
DOCK@ Q16 2
DOCK@ MMBT3904_NL_SOT23-3 G
1
R912 C S
1
3
DOCK_MIC_L_C 1 2 2 DOCK@ Close to CODEC U27
10K_0402_5% B Q18
2
H52 H53 H54 2 E 2N7002_SOT23-3
3
@ H_1P5N @ H_3P3X0P6N @ H_3P3X0P6N
R913 C978
4 DOCK@ 47K_0402_5% 1 4
1
1
DOCK@ 1U_0603_10V6K
H55 H51
@ H_5P6N @ H_6P0X5P0N

1
11/09 update Issued Date 2007/08/02 Deciphered Date 2008/08/02 Title
DOCK CONN
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A B C D E
A B C D E
WWW.AliSaler.Com DIM LED +5VALW_LED
Q32 SI2301BDS-T1-E3_SOT23-3
PJP7
D
1 2 3 1
+5VALW TO +5VS +3VALW TO +3VS +3VALW TO +3V +5VALW
PAD-OPEN 2x2m 1
1
+3VALW +3VS +3VALW +3V C836
G
2
+5VALW +5VS R587 0.1U_0402_16V4Z
4.7U_0805_10V4Z
10/8 update
1 R50 2 10K_0402_5%
@ 0_0603_5% 2
1 1 1 1
1 1 Q14 C839 C838 4.7U_0805_10V4Z Q137 C1023 C1024 4.7U_0805_10V4Z
2
1 Q35 C833 C835 1
8 D S 1 8 D S 1
8 1 7 2 7 D 2 DIM_LED#
D S D S 2 2 S 2 2
7 D S 2 6 D S 3 6 D S 3
2 2
6 D S 3 5 D G 4 5 D G 4
1
1U_0402_6.3V4Z 1U_0402_6.3V4Z D
5 D G 4
1U_0402_6.3V4Z SI4800BDY_SO8 RUNON 2 R152 1 B+ SI4800BDY_SO8 RUNON_S4 2 R956 1 B+ <33> DIM_LED DIM_LED 2 Q51
0.01U_0402_25V7K
0.01U_0402_25V7K
4.7U_0805_10V4Z
4.7U_0805_10V4Z
SI4800BDY_SO8 1 1 330K_0402_5% 1 1 330K_0402_5% G 2N7002_SOT23-3
4.7U_0805_10V4Z
1 S
3
1
1
C840 D C1025 D Q138
C864 RUNON C834 Q17
2 SUSP C1026 2 SYSON# +5VS_LED
2 2 2N7002_SOT23-3
G 2 2 G
2 S S 2N7002_SOT23-3 Q166 SI2301BDS-T1-E3_SOT23-3
PJP8
D
+5VS 1 2 3 1
PAD-OPEN 2x2m 1
C1069
G
2
0.1U_0402_16V4Z
DIM_LED# 2
11/06 update
+1.8V TO +1.8VS +1.2VALW TO +1.2V_HT +1.2VALW TO +1.2V
+1.8V +1.8VS
+1.2VALW +1.2V_HT +1.2VALW +1.2V
10/8 update
1 R51 2
Q4 1 2 Q11 1 1 @ 0_0603_5% 1 1
IRF8113PBF_SO8 C848 IRF8113PBF_SO8 C846 C862 4.7U_0805_10V4Z IRF8113PBF_SO8 C1027 C1028 4.7U_0805_10V4Z
8 1 C841 8 1 8 1
7 2 10U_0805_10V4Z 7 2 7 2
2 2 1 2 2 2 2 2
6 3 6 3 6 3
5 5 5
1U_0402_6.3V4Z 1U_0402_6.3V4Z 1U_0402_6.3V4Z
4.7U_0805_10V4Z
1 2 R233 1 B+ Q139
4
4
0.01U_0402_25V7K
4.7U_0805_10V4Z
4.7U_0805_10V4Z
1 1 330K_0402_5% 1 09/13 update
C842
1
C847 D C1029 RUNON_S4
2 1.8VS_ENABLE R138 2 C837 Q12 VLDT_EN#
1 B+ 2
330K_0402_5% 2 2 2N7002_SOT23-3
G 2
1
S +1.2V +3V +5VL
3
1
D
C849 2 SUSP
1
2 G
0.01U_0402_25V7K S Q13 R957 R958 R598
3
2N7002_SOT23-3 470_0805_5% 470_0805_5%

100K_0402_5%
09/29 update
2
Q140 Q141
2N7002_SOT23-3 2N7002_SOT23-3
1
D D EC_ON#
SYSON# 2 SYSON# 2
08/23 new add G G
1
D
S S
3
Reserve until SI-1 stage after SB 2 Q44
<33,39> EC_ON
G 2N7002_SOT23-3
USB PHY power saving report S
Discharge circuit
3
+5VS +1.8VS +1.2V_HT +1.8V +1.2VALW
09/29 update (Wait EC Code fix)

2
2
3 3
R239 R279 R280 R284
470_0805_5% 470_0805_5% 470_0805_5% 470_0805_5% R368
@ 470_0805_5%
1
1
1
1
D D D D D
SUSP 2 Q46 SUSP 2 Q48 VLDT_EN#2 Q37 SYSON# 2 Q41 EC_ON# 2 Q42
G G G G G 09/13 update (Del +V_DDR_MCH_REFP)
S 2N7002_SOT23-3 S 2N7002_SOT23-3 S 2N7002_SOT23-3 S 2N7002_SOT23-3 S @ 2N7002_SOT23-3
3
Change to +3VL(same as EC)

+5VL +5VL +5VL
to avoid leakage
1
+3VS +0.9V +1.5VS +1.1VS
R595 R596 R597
2
100K_0402_5% 100K_0402_5% 100K_0402_5%

R288 R292 R293 R294
2
470_0805_5% 470_0805_5% 470_0805_5% 470_0805_5% SYSON# SUSP
<35,42> SYSON# SUSP <42>
<13> VLDT_EN# VLDT_EN#

1
1
1
1
D D D D Q38 D D Q39 D
SUSP 2 Q47 SYSON# 2 Q49 SUSP 2 Q50 SUSP 2 Q52 SYSON 2 2 VLDT_EN 2 Q40
4 <26,33,34,40> SYSON SUSP# <26,28,33,38,41> <33> VLDT_EN 4
G G G G G G G 2N7002_SOT23-3
S 2N7002_SOT23-3 S 2N7002_SOT23-3 S 2N7002_SOT23-3 S 2N7002_SOT23-3 2N7002_SOT23-3 S S 2N7002_SOT23-3 S
3
3
09/13 update
DC/DC Circuits
FM1 FM2 FM3 CF1 CF2 CF3 AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
1 1 1 1 1 1 DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-4111P 0.2
WWW.AliSaler.Com
A B C D E
A B C D E
WWW.AliSaler.Com
BATT1
45@ CR2032 RTC BATTERY
1 +3VALW 1
PQ3
3
TP0610K-T1-E3_SOT23-3
BATT
499K_0402_1% 340K_0402_1%
2 AC_LED <38>
PR1 1
+5VALW
ADP_ID <33>
0.01U_0402_25V7K
2 1
2
PC12
1
PC1
1
PR4 1
PR8 PD4 @1000P_0402_50V7K
100_0402_5% PR2
2
10K_0402_5%
VIN +DOCKVIN
2
1
2
ACES_88334-057N RLZ3.6B_LL34
8
ADP_SIGNAL 1 2 PR5
5 PR3 3 10K_0402_5%
P
5 10K_0402_5% +
4 4 0 1 2 1 BATT_OVP <33>
3 PL1 PL2 2
3 -
G
105K_0402_1%
2 SMB3025500YA_2P SMB3025500YA_2P
2
PR6 1
0.01U_0402_25V7K
1 ADPIN 1 2 2 1
4
1
1
PU1A
PJP1
PC6
LM358ADT_SO8
100P_0402_50V8J
2
1000P_0402_50V7K
2
2
100P_0402_50V8J
PD1
1
1
PC5
2 2
PC4
PC3
2
2
PC2
1000P_0402_50V7K
PJSOT24C_SOT23-3
1
PH1 under CPU botten side :

CPU thermal protection at 90 +-3 degree C
PL3
VMB HCB2012KF-121T50_0805
Recovery at 47 +-3 degree C
1 2 BATT
PJP2
8 8
7 7
6 EC_SMD PD2 1 2
6 EC_SMC @SM05_SOT23 PL4
5 5
4 3 HCB2012KF-121T50_0805
4
1
1
3 3 1
2 2 2
1 PC8 PC9
2
2
1 1000P_0402_50V7K 0.01U_0402_50V4Z
GND 9
GND 10
3
PR7
SUYIN_200275MR008GXOLZR +5VS 47K_0402_1%
3 3
CPU 1 2
1
1
PD3
1
PR14 @SM24.TC_SOT23-3
1
PR13 100_0402_5%
100_0402_5% PH1
2
2
+3VL SMB_EC_DA1 10KB_0603_1%_TH11-3H103FT

SMB_EC_DA1 <32,33,34>
ENTRIP1 <39>
2
1 2 PR10
8
SMB_EC_CK1 SMB_EC_CK1 <32,33,34> 15K_0402_1%
PR9
1
D
1 2 5
P
10K_0402_5% +
BAT_ID <38> 7 2 PQ1
0 G SSM3K7002FU_SC70-3
1 2 6 -
G
+5VALW PR11 PU1B S
3
PR16 1 150K_0402_1% LM358ADT_SO8
4
1
1
6.49K_0402_1% +3VL
1
PC10 PR12
1 2
2.55K_0402_1% PR15
0.22U_0603_10V7K
2
1
150K_0402_1% PC11
2
2
1000P_0402_50V7K ENTRIP2 <6,39>
2
PR17
1K_0402_5%
1
D
BATT_TEMP <33>
2
2 PQ2
G SSM3K7002FU_SC70-3
S
3
4 4

DC Connector/CPU_OTP
WWW.AliSaler.Com
A B C D E
A B C D
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P4 B+
BATT
VIN P2
PQ102
AM4835EP-T1-PF_SO8
PQ101 PQ103 1 8
1
PR102 PL101 2 7 1
AM4835EP-T1-PF_SO8 AM4835EP-T1-PF_SO8 0.012_2512_1% HCB2012KF-121T50_0805 3 6
8 1 1 8 1 2 1 2 CHG_B+ 5
7 2 2 7 PR103
6 3 3 6 47K_0402_5%
4
4.7U_0805_25V6-K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
5 5 PC102 1 2
PR101 1U_0603_6.3V6M VIN
1
47P_0402_50V8J
47K_0402_5% PR104 ACDET 1 2
1
0.1U_0603_25V7K
PC103
PC104
PC105
1 2 0_0402_5%
<33> AC_SET 1 2 ACSET
2
1
3
DTA144EUA_SC70-3 PR105
PC101
1
PQ104
0.22U_0603_16V7K
10K_0402_5%
PC108
2
2
1
PC109
200K_0402_5%
2 PC107 A COFF#
2
1
@0.1U_0603_25V7K
PC106
PR106
@0.01U_0402_16V7K
1
CHG_B+ <37> AC_LED PR139
2
PR107 CH GEN# +3VLP 100K_0402_5%
2
47K_0402_1% PR108 1 2
1 2 2 10_1206_5%
1
1
D
1 2 2 ACOFF <33>
PA CIN 2
ACP
LPREF
ACSET
ACDET
LPMD
ACN
CHGEN
PQ105 29 G
TP
1
5
6
7
8
D DTC115EUA_SC70-3 PR110 PC110 S PQ114
3
3
2 0_0402_5% 1U_0805_25V6K SSM3K7002FU_SC70-3
3
G PR109 <26,28,33,36,41> SUSP# 1 2 8 28 1 2 PQ106
150K_0402_5% IADSLP PVCC PC111 DTC115EUA_SC70-3
S
3
PQ107 0.1U_0402_10V7K PQ108
2
SSM3K7002FU_SC70-3 9 27 BST_CHG 1 2 4 AO4466_SO8
AGND BTST
PC112 BQ24740VREF PU101
1 2 10 VREF
BQ24740RHDR_QFN28_5X5
HIDRV 26 DH_CHG
PL102 PR112
BATT
3
2
1
PR111 1U_0603_6.3V6M +3VL 10U_LF919AS-100M-P3_4.5A_20% 0.015_1206_1%
1
3K_0402_1% D LX_CHG
11 VDAC PH 25 1 2 1 2
PA CIN 1 2 2 PQ109
1
G SSM3K7002FU_SC70-3 PD102
5
6
7
8
S PR113 VA DJ 12 24 RE GN 2 1
3
143K_0402_1% VADJ REGN
4.7U_0805_25V6-K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
2 A COFF# 1 2 PR114 RLS4148_LL34-2 2
@0_0402_5% 13 23 DL _CHG
2
EXTPWR LODRV
1
PD101 <33> VCTRL 1 2 PQ110
PC113
PC114
PC115
PC116
RLS4148_LL34-2 4 AO4466_SO8
1
14 22
2
ISYNSET PGND
1
DPMDET
1
PC117 PR115
IADAPT
1 2
SRSET
CELLS
1
1U_0603_10V6K 100K_0402_1% PC119
SRN
SRP
2
3
2
1
BAT
PR116
2
39K_0402_5% 1U_0603_10V6K PC118
2
0.1U_0402_10V7K
15
16
17
18
19
20
21
PR117
100K_0402_5% BQ24740VREF
IADAPT
PR118
Charge Detector 1 2
1
10K_0402_5%
1 2 @47K_0402_5%
<33> ADP_I
1
D PR119
100P_0402_50V8J
0.22U_0603_10V7K
1
1
PQ111 2 BAT_ID <37>
2
PC120
PC121
SSM3K7002FU_SC70-3 G
S
BATT
2
0.1U_0603_25V7K
@0.1U_0603_25V7K
PR120
2 1 IREF <33>
PC122
PC124
133K_0402_1%
1
PC123
1
0.1U_0402_10V7K PR122
2
PR121 681K_0402_1%
200K_0402_1% 1 2
2
PR123
2
1M_0402_5%
3
1 2 3
P2 PR124
BQ24740VREF VIN 1K_0402_5%
VIN
1 2
1
+3VL AC_IN <33,39>
1
PR125
47_1206_5% PR126
1
10K_0402_5%
100K_0402_1% PR127
VIN PR130 10K_0402_1%
2
8
+3VL
10K_0402_1%
PR128
2.15K_0402_1% PU102B
2
1 2 5
P
+
1
PR129
7
2
O
1
PACIN
100K_0402_5%
PR131 6 -
G
133K_0402_1% PC125 CH GEN#
2
1
PR132
0.1U_0603_25V7K PC126 LM393DG_SO8

PR133
2
1
0.047U_0402_16V7K 10K_0603_0.1%
2
PR134
2
2
1
D PD103
3 10K_0402_5%
P
2
+ PQ112 RLZ4.3B_LL34
O 1 2
1
2 G SSM3K7002FU_SC70-3
2
-
G
PU102A S
PR135
3
LM393DG_SO8 FSTCHG#
4
10K_0603_0.1% PR136
49.9K_0402_1%
2
D
1 2 P2
1.24VREF <33> FSTCHG 2 PQ113
G SSM3K7002FU_SC70-3
S
3
STD_ADP <33>
PU103
4 REF CATHODE 3 1.24VREF

1 2 ACDET
1
PC127 2
PR137 NC
22P_0402_50V8J
1
100K_0402_1%
4
20K_0402_1% 5 1
4
2
ANODE NC
PR138
APL1431LBBC-TR_SOT23-5
2

Charger
WWW.AliSaler.Com
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-3941P 0.1
A B C D
A B C D E
WWW.AliSaler.Com
2VREF_51125
1
1 1
PC302
0.22U_0603_10V7K
2
PR301 PR302
13.7K_0402_1% 30.9K_0402_1%
1 2 1 2
PR303 PR304
B+ B++
20K_0402_1% 20K_0402_1%
B++
PL301 1 2 1 2
HCB2012KF-121T50_0805
1 2 +3VLP
ENTRIP2
ENTRIP1
@0.1U_0402_25V4K
PR305 PR306
2200P_0402_50V7K
2200P_0402_50V7K
4.7U_0805_25V6-K
@0.1U_0402_25V4K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
174K_0402_1% 133K_0402_1%
1
1
PC316
1 2 1 2
1
PC301
PC303
PC317
PC304
PC305
PC313
PQ301
2
2
6
5
6
7
8
1 D1 1G 8
1
2 7 PC306
ENTRIP2
VFB2
TONSEL
VFB1
ENTRIP1
VREF
D1 1S/2D 10U_0805_6.3V6M PQ302
3 G2 1S/2D 6 25 P PAD AO4466_SO8
UG1_3V
4 5
2
S2 1S/2D
SP8K10S-FD5_SO8 7 VO2 VO1 24 4

2 2
8 23 PR308 PC308
PR307 VREG3 PGOOD 0_0402_5% 0.1U_0402_10V7K
PR309 1 2 1 2 BST_3V 9 22 BST_5V 1 2 1 2 PR310
3
2
1
0_0402_5% 0_0402_5% VBST2 VBST1 0_0402_5%
PL302 1 2 PC307 UG_3V 10 21 UG_5V 1 2 PL303
4.7UH_SIQB74B-4R7PF_4A_20% 0.1U_0402_10V7K DRVH2 DRVH1 4.7UH_PCMC063T-4R7MN_5.5A_20%
2 1 LX_3V 11 20 LX_5V 1 2 +5VALWP
+3VALWP LL2 LL1
5
6
7
8
LG_3V 12 19 LG_5V
DRVL2 DRVL1
1
1
SKIPSEL
1
1
VREG5
VCLK
PR315 +3VL PR316 1 PC319
GND
EN0
VIN
PC309 + @4.7_1206_5% @4.7_1206_5% @22U_0805_6.3V6M
2
220U_6.3VM_R15 4 + PC310
1 2
1 2
PU301 150U_D_6.3VM
13
14
15
16
17
18
1
2 TPS51125RGER_QFN24_4X4 PR317
PC314 100K_0402_5% PC315 2
1
@680P_0603_50V8J @680P_0603_50V8J
2
3
2
1
2
VL PQ304
PR311 FDS6690AS_NL_SO8
2
620K_0402_5%
3/5V_OK <41>
1
PC311
10U_0805_10V6K
2
1
B++
PC312
<37> ENTRIP1 <6,37> ENTRIP2
2
3 0.1U_0603_25V7K 3
2VREF_51125
1
D D
PQ305 2 2 PQ306
SSM3K7002FU_SC70-3 G G SSM3K7002FU_SC70-3
S S +3VLP +3VL
3
PJP301
PJP302
2 1
+5VALWP 1 2 +5VALW (4.5A,180mils ,Via NO.= 9)
PR313 PAD-OPEN 2x2m
100K_0402_5%
PAD-OPEN 4x4m
1 2 VL PJP303
+3VALWP 1 2 +3VALW (3A,120mils ,Via NO.= 6) VL +5VL

PQ308 PQ307
1
SSM3K7002FU_SC70-3 D D SSM3K7002FU_SC70-3 PJP304

PAD-OPEN 4x4m
1 2 2 2 2 1
<33,38> AC_IN PR318 G G EC_ON <33,36>
330K_0402_1% S S PAD-OPEN 2x2m
3
3
1
PC318
0.022U_0603_25V7K PR314
2
100K_0402_5%
2
4 4

3.3VALWP/5VALWP
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A B C D E
A B C D
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1 1
PR401
0_0402_5%
1 2 PL401
<26,33,34,36> SYSON
1
HCB1608KF-121T30_0603
PC401 1.8V_B+ 1 2 B+
@0.1U_0402_25V4K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
2200P_0402_50V7K
@1000P_0402_50V7K
2
5
6
7
8
1
+5VALW
PC414
PC403
PC404
PC405
PC406
1+5VALW
BST_1.8V
1 2 BST1_1.8V 1 2 @680P_0402_50V7K
2
2 2
PR402 PC402
0_0402_5% 0.1U_0402_10V7K 4
PR403
15
14
1
316_0402_1% PU401
PR404
EN_PSV
TP
VBST
255K_0402_1% PQ401
PR410
2
3
2
1
1 2 2 13 DH_1.8V 1 2 DH_1.8V_1 AO4466_SO8 PL402
TON DRVH 2.2UH_PCMC063T-2R2MN_8A_20%
PR405 0_0402_5%
+1.8VP 2 1 3 12 LX_1.8V 1 2 +1.8VP
VOUT LL
220U_D2_4VY_R25M
0_0402_5%
1
4 V5FILT TRIP 11 1 2
5
6
7
8
PR406 PR407
1
5 10 +5VALW 15.4K_0402_1% @4.7_1206_5%
VFB V5DRV
PC408
+
1
1
PC409 6 9 PC415
2 2
PGOOD DRVL
PGND
1U_0603_10V6K GND 4.7U_0805_10V6K
2
4
2
2
PC412
+1.8VP TPS51117RGYR_QFN14_3.5x3.5 @680P_0603_50V7K
PR408
7
1
1 2 DL_1.8V
14.3K_0603_0.1% PQ402
3
2
1
FDS6690AS_NL_SO8
1 2
PC413
@10P_0402_50V8J
1
3 3
PR409
10K_0603_0.1%
2
PJP401
+1.8VP 1 2 +1.8V (7A,280mils ,Via NO.= 14)

PAD-OPEN 4x4m
4 4

1.8VP
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-3941P 0.1
A B
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C
Date: Friday, November 30, 2007
D
Sheet 40 of 48
A B C D E
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1 1
PR518
0_0402_5%
+1.1VS 1 2 PR501 PR502 PR503 PR504
B+++ 11.5K_0402_1% 24.9K_0402_1% 18.7K_0402_1% 11.5K_0402_1%
+1.1VSP 1 2 1 2 1 2 2 1 2 1 +1.2VALWP
PR517
10_0402_5%
B+++
2
PR505 B+++ B+
0_0402_5% PL502
2200P_0402_50V7K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
@0.1U_0402_25V4K HCB2012KF-121T50_0805
2 1
1
1
1
+1.1VSP
PC517
PC501
PC502
PC518
2
VCCP_POK
2200P_0402_50V7K
@0.1U_0402_25V4K
4.7U_0805_25V6-K
8
7
6
5
5
6
7
8
PC503 PU501
1
PC516
PC504
PC505
2 @0.022U_0603_25V7K PQ502 2
GND
VO2
VFB2
TONSEL
VFB1
VO1
25 AO4466_SO8
2
PQ501 P PAD
2
AO4466_SO8 4 7 24 4
PGOOD2 PGOOD1
PC507
PC506 PR506 8 23 PR507
EN2 EN1 0.1U_0402_10V7K
0.1U_0402_10V7K 0_0402_5% 0_0402_5%
+1.1VSP 2 1 2 1 BST_1.1V 9 22 BST_1.2V 2 1 1 2
1
2
3
3
2
1
VBST2 VBST1
+1.2VALWP
PL501 UG1_1.1V 2 1 UG_1.1V 10 21 UG_1.2V 2 1 UG1_1.2V PL503
2.2UH_PCMC063T-2R2MN_8A_20% 0_0402_5% PR508 DR VH2 DR VH1 PR509 3.3UH_SIQB74B-3R3PF_5.9A_20%
+1.1VSP 2 1 LX_1.1V 11 20 LX_1.2V 0_0402_5% 1 2 +1.2VALWP
LL2 LL1
1
LG_1.1V 12 19 LG_1.2V
DR VL2 DR VL1
8
7
6
5
1
PR515
5
6
7
8
4.7U_0805_6.3V6K
4.7U_0805_6.3V6K
220U_D2_4VY_R25M
@4.7_1206_5% PR516
PGND2
PGND1
1 1
V5FILT
TRIP2
TRIP1
220U_D2_4VY_R25M
@4.7_1206_5%
V5IN
1
2
+ +
1 2
PC508
PC509
PC510
PC511
1 2
PC519 4 TPS51124RGER_QFN24_4x4
2
13
14
15
16
17
18
1
2 @680P_0603_50V8J 2
4
PC520
2
PQ504 @680P_0603_50V8J
2
1
PQ503 AO4466_SO8
1
2
3
FDS6690AS_NL_SO8 PR511 PR512
3
2
1
19.1K_0402_1% PR510 33K_0402_5%
1 2 17.8K_0402_1% 1 2
3/5V_OK <39>
2
PR513
0_0402_5%
3 3
2 1
<26,28,33,36,38> SUSP#
1
PC512
1 2 +5VALW 0.1U_0402_16V7K
2
PR514
3.3_0402_5%
1
PC513 PC514 PC515

@0.1U_0402_10V7K 1U_0603_10V6K 4.7U_0805_10V6K
2
(4A,160mils ,Via NO.=8)

(6A,240mils ,Via NO.=12)
PJP501 PJP502
+1.1VSP 1 2 +1.1VS +1.2VALWP 1 2 +1.2VALW
PAD-OPEN 4x4m PAD-OPEN 4x4m
PJP503
4 4
+1.1VSP 1 2 +1.1VS
PAD-OPEN 4x4m

1.1VSP/1.2VALWP
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A B C D E
A B C D E
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1 1
+1.8V
+1.8V
PU601
1 6 PU603
VIN VCNTL +5VALW
@10U_0805_10V4Z
1 VIN VCNTL 6 +5VALW
@10U_0805_10V4Z
2 GND NC 5
1
PC602
2 GND NC 5
PC609
PC601 3 7
VREF NC
1
10U_0805_10V4Z PC613 3 7
2
2
VREF NC
1
PR601 PC603
4 8 10U_0805_10V4Z
2
1K_0402_1% VOUT NC 1U_0603_16V6K PR606 PC612
4 8
2
1K_0402_1% VOUT NC 1U_0603_16V6K
9
2
TP
9
2
G2992F1U_SO8 TP
G2992F1U_SO8
1 2 VREF1.5V
<35,36> SYSON#
0.1U_0402_16V7K
PR602 +0.9VP
1
0.1U_0402_16V7K
0_0402_5%
+1.5VSP
1
PQ601
SSM3K7002FU_SC70-3 PR603 PQ602
1
1
2 D SSM3K7002FU_SC70-3 2
1K_0402_1% PR607
1
PC605 D
<36> SUSP 1 2 2 5.1K_0402_1%
2
PC604
G 10U_0805_6.3V6M 1 2 2 PC614
PR604 <36> SUSP
PC611
@0_0402_5% S PR608 G 10U_0805_6.3V6M
3
2
1
0_0402_5% S
3
1
PC606
2
@0.1U_0402_16V7K PC610
2
@0.1U_0402_16V7K
(500mA,40mils ,Via NO.= 1)

PU602
APL5508-25DC-TRL_SOT89-3 +2.5VSP
PJP601
+3VS
+0.9VP 1 2 +0.9V (2A,80mils ,Via NO.= 4) 2 IN OUT 3
4.7U_0805_6.3V6K
3 3
1U_0603_6.3V6M
PAD-OPEN 3x3m
1
GND
PC607
PC608
PR605
1 @150_1206_5%
2
PJP603
+1.5VSP 1 2 +1.5VS (1A,40mils ,Via NO.= 2)

PAD-OPEN 3x3m
PJP602
+2.5VSP 1 2 +2.5VS (500mA,40mils ,Via NO.= 1)
PAD-OPEN 3x3m
4 4

0.9VSP/2.5VSP/1.5VSP
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A B C D E
A B C D E
PL201
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4.7UH_SIQB74B-4R7PF_4A_20%
PQ201 PQ202
1
AO4466_SO8
10U_0805_6.3V6M
AO4466_SO8
1
+ PC202 1 8 1 8 CPU_B+
PC201
<6> VDD_NB_FB_H 220U_D2_4VY_R25M 2 7 2 7
3 6 3 6
2
2
2200P_0402_50V7K
470P_0402_50V7K
PC238
PC203
5 5
1
<6> VDD_NB_FB_L PC204
4
4.7U_0805_25V6-K
2
2
1 PR203 1
1
0_0402_5%
0_0402_5%
0_0402_5%
PR206
PR209
UGATE NB1
PHASE NB
PR204
LGATE NB
22K_0402_1%
2
1 2
1 2
PC205 PR205
1000P_0402_50V7K 2_0402_5%
+5VS 1 2
1
B+
CPU_B+
1
44.2K_0402_1% 1200P_0402_50V7K
PC207 PL202
33P_0402_50V8K
0.1U_0402_16V7K PC206 SMB3025500YA_2P
11.3K_0402_1%
0.1U_0603_16V7K
BOOT_NB1 2
1
PC209
PC208
2 1
+5VS
1000P_0402_50V7K
PR207
1
1000P_0402_50V7K
PR208 1
2200P_0402_50V7K
@47U_25V_M
2_0402_5%
1
330P_0402_50V7K
3300P_0402_50V7K
3300P_0402_50V7K
1800P_0402_50V7K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
PC211
1 2 +
CPU_B+
1
PC214
PC215
PC210
1
PC243
PC239
PC234
PC235
PC212
PC213
PC248
PC249
PC250
2.2U_0603_6.3V6K
2
1
1
2
2
PR210
PC216 PR211
2
5
6
7
8
0.1U_0603_25V7K 1_0603_5%
2
1 2 PQ203
D
D
D
D
SI4684DY-T1-E3_SO8
+5VS
2
1 2
+3VS
PHASE NB
UGATE NB
2 PR212 2
LGATE NB
VSEN_NB
G
S
S
S
RTN_NB
0_0402_5%
1 2
BOOT_NB
4
3
2
1
PR213
@0_0402_5% 2.2_0603_5% 0.22U_0603_10V7K UGATE0_1
1 2 PR214 PC217 0.36UH_PCMC104T-R36MN1R17_30A_20%
1
10K_0402_1%
48
47
46
45
44
43
42
41
40
39
38
37
1 2 1 2 2 1 +CPU_CORE_0
PR215 PU201
5
6
7
8
5
6
7
8
1
14K_0402_1%
PR216
4.7_1206_5%
@10K_0402_5% PL203
FB_NB
COMP_NB
FSET_NB
VSEN_NB
VIN
VCC
RTN_NB
OCSET_NB
PGND_NB
LGATE_NB
PHASE_NB
UGATE_NB
PR220
PR221
1 2
BOOT0
0_0603_5%
2
1 36 PR219
OFS/VFIXEN BOOT_NB
470P_0603_50V8J
PR217
1 2
2
2 35 4 4 6.65K_0603_1%
<33> VGATE PGOOD BOOT0
PC218
PQ204 1 2
3 34 UGATE0 AO4456_SO8
<6,20,33> SB_PWRGD PR218 PWROK UGATE0 PQ205 PC219 1 2
2
1 2 SVD 4 33 PHASE0 AO4456_SO8 0.1U_0603_25V7K
3
2
1
3
2
1
<6> CPU_SVD 0_0402_5% SVD PHASE0 ISP 0
PR2221 2 SVC 5 32
<6> CPU_SVC 0_0402_5% SVC PGND0
6 31 LGATE0 CPU_B+
<33> VR_ON PR223 PR224 ENABLE LGATE0
5
6
7
8
2200P_0402_50V7K
@0.1U_0402_25V4K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
1 2 1 2 7 30 PQ206
RBIAS PVCC
1
SI4684DY-T1-E3_SO8
D
D
D
D
1
PC240
PC237
PC236
PC220
PC221
21K_0402_1% 95.3K_0402_1% 8 29 LGATE1
OCSET LGATE1
PC222
2
2
PR225 PC223 9 28
2
VDIFF0 PGND1
G
S
S
S
1 2 1 2 ISL6265IRZ-T_QFN48_6X6
10 27 PHASE1
4
3
2
1
255_0402_1% 4700P_0402_25V7K FB0 PHASE1 PR226
PR227 11 26 UGATE1 1 2 UGATE1_1
3 COMP0 UGATE1 0_0603_5% 3
1 2
12 25 BOOT1 1 2 1 2 2 1 +CPU_CORE_1
1K_0402_1% VW0 BOOT1 PR228 PL204
COMP1
VDIFF1
VSEN0
VSEN1
5
6
7
8
5
6
7
8
1
RTN0
RTN1
2.2_0603_5% PC224 0.36UH_PCMC104T-R36MN1R17_30A_20%

ISN0
ISN1
ISP0
VW1
ISP1
1
FB1
14K_0402_1%
0.22U_0603_10V7K PR229
TP
PR231
PR230 PC225 4.7_1206_5%
1 2 1 2
13
14
15
16
17
18
19
20
21
22
23
24
49
1 2
54.9K_0402_1% 1200P_0402_50V7K PR232 4 4
2
VSEN0
+CPU_CORE_0
PR233
VSEN1
1 2 1 2
RTN0
RTN1
ISP 0
PC227 PC226 6.65K_0603_1%

180P_0402_50V8J 6.81K_0402_1% +CPU_CORE_1 PQ207 PQ208 470P_0603_50V8J 1 2
2
3
2
1
3
2
1
ISP 1 AO4456_SO8 AO4456_SO8 PC229
@1000P_0402_50V7K
1 2 PC230 0.1U_0603_25V7K 1 2
PC228 1000P_0402_50V7K
1000P_0402_50V7K 2 1
PC231
PC241 180P_0402_50V8J ISP 1
PC244
1 2 1000P_0402_50V7K
@1000P_0402_50V7K
<6> CPU_VDD0_FB_H PR235 2 1 2 1

1
0_0402_5% PR236 PR238

1
6.81K_0402_1% 54.9K_0402_1%
2 1 2 1
2
2
PC232 PJP201
PC245
1 2 1200P_0402_50V7K 1 2 +CPU_CORE_1
<6> CPU_VDD0_FB_L +CPU_CORE_0
PR237 PR240
1
@1000P_0402_50V7K
0_0402_5% 1K_0402_1% PAD-OPEN 4x4m

2 1
2
4 PR243 PJP202 4
255_0402_1% 1 2 +CPU_CORE_1
+CPU_CORE_0
@1000P_0402_50V7K
PC242 2 1 2 1
PC246
1 2 1000P_0402_50V7K PAD-OPEN 4x4m

<6> CPU_VDD1_FB_L PR239 4700P_0402_25V7K
1
0_0402_5% PC233
1

2
PC247
2
1 2 Issued Date 2007/08/02 Deciphered Date 2008/08/02 Title

1
<6> CPU_VDD1_FB_H PR241

0_0402_5%
CPU_CORE
2
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Version Change List ( P. I. R. List ) for Power Circuit

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Item Page# Title Date Request Issue Description Solution Description Rev.
Owner
1 1
DC Connector PL3 change the value from SMB3025500YA_2P to HCB2012KF-121T50_0805
1 37 /CPU_OTP 9/29 Compal for Layout and add PL4 the same of the value.
PC508 and PC511 change the value from 220U_6.3VM_R15 to

2 41 1.1VSP/1.2VALWP 9/29 Compal HW request 220U_D24VY_R25M
3 41 1.1VSP/1.2VALWP 9/29 Compal HW request Add PJP503
4 43 CPU_CORE 9/29 Compal HW request PC202 change the value from 220U_6.3VM_R15 to 220U_D24VY_R25M
Add PC241、PC242、PC243, and the value are 1000P_0402_50V7K.

TI FAE suggested that after he review Reserve PC244、PC245、PC246、PC247, and the value are
5 43 CPU_CORE 9/29 Compal the layout. 1000P_0402_50V7K.
2 2
TI FAE suggested that after he review
6 43 CPU_CORE 9/29 Compal the layout. Add PJP201、PJP202
7 38 Charger 9/29 Compal the footprint is wrong Change the footprint of PR102
DC Connector
8 37 /CPU_OTP 10/08 Compal for Layout These two choke are parallel ,it's not series.
9 38 Charger 10/08 Compal the footprint is wrong Change the footprint of PR102
10 40 1.8VP 10/08 Compal PWR request Delete PC410 and PC411
11 41 1.1VSP/1.2VALWP 10/08 Compal PWR request Add PR517、PR518

3 3
DC Connector
12 37 /CPU_OTP 11/01 Compal PWR request Add PD4、PC12
13 37 3.3VALWP/5VALWP 11/01 Compal for Layout change PQ301, Cencel PQ303
14 43 CPU_CORE 11/02 Compal EMI request Add PC248, PC249, PC250
15 37 3.3VALWP/5VALWP 11/12 Compal for Layout Change PC310, add PC319
4 4

Power Changed-List History-1
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Version Change List ( P. I. R. List ) for HW Circuit

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Request
Item Page# Title Date Owner Issue Description Solution Description Rev.
1 25 LAN 10/29 HW Change LAN Chip U20 from Marvell 88E8042 to Update the LAN Design page and support circuit 0 .2
1 1
Realtek RTL8102EL
2 25 LAN 10/29 HPQ Add POE(Power Over Ethernet) design Update the LAN Design page and support circuit 0 .2
3 16 CRT 10/29 HW CRT can not display Change the CRT Conn. signals connection first. 0 .2
Wait correct symbol for fix
4 29 Audio 10/30 HW Speaker no sound Add R973(10K_0402) to +3VALW on HP_DET# 0 .2
5 4 FAN 11/01 HW FAN Conn. not correct part Change JP2 PCB Footprint from ACES_85204-02001_2P to 0 .2
ACES_88231-02001_2P
6 29 Speaker 11/01 HW Speaker Conn. not correct part Change JP20 PCB Footprint from ACES_85204-04001_4P to 0 .2
ACES_88231-04001_4P
7 34 MDC 11/01 HW MDC Conn. not correct part Change JP20 PCB Footprint from ACES_88018-124G_12P to 0 .2
ACES_88020-12101_12P
2
8 11,35 TV_OUT 11/05 HW TV-OUT Function no support Del R59,R60,R61,R115,R116,R117 and TV-OUT related design. 0 .2 2
9 11,21 NB/SB Thermal 11/05 HW NB Thermal Function no support (locate too far) Cancel NB_THERMAL_DA/DC connection between NB and 0 .2
SB,del C500
10 21,31 SB SATA 11/05 HW SB SATA Port 5 change to Port 2 for ATI Common Change SB SATA port 5 to port 2 0 .2
Design
11 21 SB SATA 11/05 HW SB SATA_ACT# Pull High become +3VS Change R343.1 power rail from +5VS to +3VS. Install R343. 0 .2
12 21 SB GPIO 11/05 HW Change SB GPIO refer to JBK00 for common 1. Connect U15.C6 to GND by 0_0402. 0 .2
2. Change WLOFF# from GPIO50 to GPIO61.
3. Change BT_COMBO_EN# from GPIO51 to GPIO62.
4. Change WWOFF# from GPIO52 to GPIO63.
13 31 SB SATA 11/05 HW Vertical L51 1<-->4 , 2<-->3 for layout routing Vertical L51 1<-->4 , 2<-->3 for layout routing 0 .2
14 29 Audio HP OUT 11/05 HW Add 150UF Caps for each DOCK_LOUT_R/L Add 150UF Caps for each DOCK_LOUT_R/L 0 .2
3 3
15 25 LAN Transfermor11/05 HW Correct U19 LAN Transfermor pin definition Correct U19 LAN Transfermor pin definition 0 .2
16 21,24 SB SATA 11/06 HW SB SATA Port 4 change to Port 3 for ATI Open Issue Change SB SATA port 4 to port 3 0 .2
17 36 DIM LED 11/06 HW Reduce DIM LED unnecessary design Del R1026 and Q167, add Net "DIM_LED#" for connect. 0 .2
Change location from PJP604 to PJP8.
18 27 CardReader 11/06 HW Change CardReader Socket for M/E new part and Change JREAD to TAITW_R015-B10-LM. 0 .2
Chip for JMicron new version Reserve R413,C902 close to JREAD.20;
R412,C901 close to JREAD.26; R411,C900 close to JREAD.37.
Change R457 close to U23.42
Add R455,R456 close to U23.42
Del Q169,R1051.
Change net CR_LED# become CR_LED connect U23.21 and Q53.2
Add R454 pull down to GND
4 Change R405,R122 from 200K to 10K pull-high 4
Remove C895,U22

HW Changed-List History-1
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Request
19 16 CRT 11/07 HW Normalize CRT design for common Change L83,L84 (10_0402) become R241,R240 (0_0603) 0 .2
1 1
20 17 LCD 11/07 HW Normalize LCD design for common Change R491 from 200_0402 to 200_0805 0 .2
21 18 LCD 11/07 CIC CIC feedback RMA concern for common Change Q43 from AOS3413 to SI2301 0 .2
22 33 KBC 11/07 HW Normalize KB926 Crystal part for common Change Y7 from 9H03200413 small to 1TJS125DJ4A420P normal. 0 .2
23 17 WebCam 11/09 HW Change U54 WebCam power design and related Change U54 from G916-390T1UF to RT9193-39GB. 0 .2
Remove R891,R892 if no use G916-390T1UF.
Add C718 close to U54.4 for RT9193-39GB.
Remove R1027~R1030 for JP7 no install.
Change JP7 from 8pin to 6pin
24 18 HDMI 11/09 HW Reduce HDMI Design Remove R490(100K_0402) 0 .2
25 19,32 SB-CLK-Debug 11/09 HW Debug Card no function issue Del R1031,add R303 close to R301 and U15.P2 0 .2
Connect for CLK_PCI_SIO2 to JP41.15
2
26 25 LAN 11/09 HW RJ45 LED Power correct back Change JRJ45.13, JRJ45.11 from +3V_LAN_LED to +3V_LAN 0 .2 2
27 18 HDMI 11/09 HW Reduce HDMI Design Remove R490(100K_0402) 0 .2

28 6 CPU 11/09 HW Add H_THERMTRIP# one more way Add R16 close to Q3.1 for H_THERMTRIP# 0 .2
29 33 KBC 11/09 HW Update KBC Pin Definition for common Add H_THERMTRIP# to U33.25 0 .2
30 35 Holes 11/09 ME Update for M/E Drawing Del H49 H50 H38 H45 for M/E drawing change 0 .2
31 26 Mini-Card 11/09 HW Reduce Mini-Card design, change SIM Card design Replace D17 and D47 become R52 and R53 0 .2
Del R400 and R46, Change JP6 pin definition for common
32 33 KBC 11/09 HW Reserve 0_0603 for KB Back Light Add R516 (0_0603) between JP48.1/4 and +5VS_LED 0 .2
33 27 CardReader 11/10 HW Correct CardReader LED part Change D5 from SC500004E00(AQUA_WHITE) to 0 .2
SC500004W00(WHITE)
34 34 LED Function 11/10 HW Correct LED function for common Change LED from D50,D30,D27 SC500004E00 0 .2
(AQUA_WHITE) to D6,D7,D8 SC500004W00(WHITE)
3 Change LED from D45,D46 SC500004B00 3
(AQUA_WHITE/AMBER) to D17,D18 SC500005M00

(YELLOW/WHITE); Add Q7,R20 and R42 close to D18
35 21 SB-GPIO 11/10 HW Add one more way for GSENSOR LED# inform pin Add HDD_HALTLED# connect from U15.P8 0 .2
36 33 KBC-GPIO 11/11 HW Add CIR_IN PH to +5VL Add R46 10K_0402 PH to +5VL close to U33 0 .2
Add ESB_CLK/DAT PH to +3VL Add R514,R515 10K_0402 PH to +3VL close to U33
37 6,31 CPU,FPR 11/13 HW Reduce S3 power consumption Change R15.2,R21.2,R36.2,R30.2 connection from 0 .2
+1.8V to +1.8VS; Remove R622, install R581
38 11 NB 11/13 HW Reduce the level shift design for Chip A12. Del Q6,R87; Q5,R84 and replace by 0ohm (add R67,R68) 0 .2
connect directly. Install R371 (10K ohm)
39 17 WebCam 11/13 HW Update the WebCam+Digital Mic reserver conn. Change JP7 from SP02000HC00(8pin)-->SP02000IL00(6pin) 0 .2
40 6,33 CPU,KBC 11/13 HW Update THERMTRIP# design to EC Change R16.2 connection from THERMTRIP# to 0 .2
4 THERMTRIP#_EC for separate 4
41 18 HDMI 11/13 HW Remove EMI solution become reserve for verify Add R112,R113,R115~R120 close to each L85~L88 for co-lay 0 .2

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4 2 19.32 SB,BIOS 11/13 HW Reduce SB related design for Chip A12 and others Del Q155,R986, and add R311 close to U15. 0 .2
Del R1011 become T18, Cancel R1012 and connect to H31
1 1
and JP41 directly

43 21,32 SB,BIOS 11/13 HW BIOS Debug Tool reserve Add SB_INT_FLASH_SEL and related 0 .2
(JP12,U30,R228,R226,C489 close to U29)
44 25 LAN 11/13 HW Update LAN Chip Symbol link to CIS server Update LAN Chip U20 Symbol link to CIS server 0 .2
45 13 NB 11/13 HW Add 0ohm_0603 to separate VDD18_MEM Add R1051(0_0603) between +1.8VS & +1.8V_VDD_SP 0 .2
46 18 HDMI 11/13 HW Reduce HDMI related design for common Del R490 (100K_0402) 0 .2
47 20 SB 11/13 HW Reduce SB related design for common and A12 chip Remove R994 (0_0402) 0 .2
Change U15.F1 connection become test point
Remove R1053, change R1052 become 0_0402
48 20,21, SB,Cardreader 11/13 HW Reserve Cardreader D3E function (CR_WAKE# & Add R81 close to U15;Q54,R124 close to U23 for connect U15.F8 0 .2
27 CR_CPPE#) to U23.13 ;Add R369 close to U23 for connect U15.M5 to U23.16
2 2
49 21,33 SB,KBC 11/13 HW Reduce SB related design for common Del D51 and R1034, Change the net AC_IN become AC_IN_D 0 .2
50 28,33 Codec,KBC 11/13 HPQ EC_BEEP function for KBC add Add R563 close to C955; Add R544 close to U33.31 0 .2
51 33 KBC 11/13 HW Reduce S5 Power Consumption Change R1040.1 connection from +3VL_EC to +3VALW 0 .2
Del R546 PH to +3VL_EC, Del D26 replace by add R547 close to
U33 for short
52 33 KBC 11/13 HW Reduce KBC Design for common and Ver:C0 Chip Del R537 become Test Point, change R516 become 150_0603 0 .2
Change from SA00001J530 to SA00001J540 Remove R1044, change R1040 from 10K to 100K
Change R528.2 , R529.2 connection from +5VALW to +5VL
Install C814 (4.7U_0805)
53 34 Switch Design 11/13 HW Update CSD function board design for common Change JP36.1 connection become +3VL;Change R1046.1 0 .2
and R1047.1 connection become SMB_EC_CK1/DA1
Change JP36.7 connection from GND to +5VALW_LED by
54 34 LED 11/14 HW Correct T/P On/Off LED design define Change Q153 from 2N7002DW to 2N7002 0 .2
3
Correct G-Sensor LED design define Change R988.1 connection from +5VS_LED to +3VS 3
55 29 Audio-Dock 11/14 HPQ For GS mark requirement Add R968,R969 close to C775/C776. 0 .2
56 29 Holes 11/14 ME Update Holes to meet M/E Drawing Add back H52 become H_1P5N; Del CF4 0 .2
57 4,24 Multi-Bay 11/14 ME Update Symbol to meet M/E Drawing Update JP2,JP9,JP10,JP11,JP20,JP40,JHDMI,JESAT,JCRT, 0 .2
JDOCK Symbol
58 33 Holes 11/14 ME Update Holes to meet M/E Drawing Add back H52 become H_1P5N; Del CF4 0 .2
59 20 SB 11/16 ATI Reserve to fix the OTS325055 Issue Reserve R83 PH to +3VS 0 .2
60 33 KBC 11/16 EC Change design for EC team debug Change JP34.1 from +5VALW to +5VL 0 .2
61 35 DOCK 11/16 EMC Connect DOCK guide pin to GND Add JDOCK.45/46 to GND 0 .2
62 33 K/B 11/16 HW Fix KB matrix issue Del KSI6 and KSO9 out of page net connect 0 .2
63 28,29 HPQ Make some Audio related design change Change C983,C984 from 1UF to 0.022UF. Change C1049,C1050,C1040,C1041 0 .2
AUDIO 11/18 from 0.47UF to 0.022UF. Change R1002,R1005 from 20K to 0 ohm. Change
4 4
C1044 from 10UF to 4.7UF. Remove R1000,R1004; Install R1001,R1003.
64 29 AUDIO 11/19 HPQ Make some Audio related design change Change R968,R969 from 40.2_0402 to 47_0603 0 .2
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65 13 NB 11/20 ATI Design Change for NB A12 Version chip Remove U64,C1064,C1065,C1066,C1067,R1015,R1016,Q163,R1017. 0 .2
1 Install L19, remove L95 1
66 22 SB 11/20 ATI Design Change for SB A12 Version chip Install R593, remove R592 0 .2
67 22 SB 11/20 HW Reduce SB Power Design-No IDE support Remove R12,C543,C544,C547,C536 0 .2
68 33,34 Function Board 11/20 HW Reserve for Rachman UMA selective Reserve R555 for +5VALW_LED, add R554 for +3VL close to JP36.1 0 .2
Reserve R1034 close to JP36.4,R1035 close JP36.5,Remove R1036
Add R513 PH to +3VS close to U33.19
69 23 SB 11/20 HW Make the SB Strap Seeting for common Install R356 (10K_0402) 0 .2
70 31 BlueTooth 11/20 HW Update BT design for common Change R520 from 47K_0402 to 10K_0402 0 .2
71 34 Power On Switch 11/22 HW Cancel one reserved power on switch Del SW3 0 .2
72 33 KBC 11/22 HW Modify SMB_EC_DA1/CK1 PH for common Change R528,R529 pin 2 connection from +5VL to +3VL 0 .2
73 6 CPU 11/22 HW Link PROCHOT# between CPU and NB Add R59 close to Q2 0 .2
74 19 SB 11/22 HW Reserve LPCCLK1 for debug card function Add R308 22_0402 for U15.E22 close to R362.1, remove R301 0 .2
2
75 26 Express Card 11/22 HW To avoid New Card Switch leakage issue Add R54(0_0402) close to U21.6 0 .2 2
76 28 Audio Codec 11/22 HW Reserve SPDIF OUT1 test point for verify Add T21 close to U27.45 0 .2
77 10~13 NB, 11/23 HW BOM correct for SI-1 SMT build Update U3(SA00001ZG00-->SA00001ZG20);U10(SA00001Z300--> 0 .2
SA00001Z310);U15(SA00001S510-->SA00001S560)
78 19 SB 11/23 HW Change Crystal Res. size for layout space Change R389 from 0603 to 0402 0 .2
79 22 SB 11/26 HW Reduce SB SATA Power Caps (Confirm with ATI FAE) Change C567,C568 from 10U_0805 to 1U_0805 0 .2
80 28 Codec 11/26 HW SPDIF0 --> 1 design change to follow Vader Change U27.48/45 pin connection 0 .2
81 34 T/P 11/28 HW Change T/P Power for reduce S4/S5 power consumption Remove R235; Add Q85, R645, Q34 0 .2
82 14 HDMI 11/28 ATI Fix HDMI no function issue Remove R102; Add R101 0 .2
83 15 CLK Gen. 11/28 HW Change design for new version CLK Gen. Remove R1045 0 .2
84 28 Codec 11/28 HW Change EC_BEEP function become reserve Remove R563 0 .2
3
8 5 20,27 SB,CardReader 11/28 HW Disconnect D3E support for A version to avoid risk Remove R81,R369 0 .2 3
86 32 BIOS 11/28 HW Use Ext. BIOS as default Remove R221 0 .2

87 34 LED 11/28 HW Cancel WLAN/WWAN ext pull high Remove R1041 0 .2
88 19 SB 11/30 HW Fix PA M/E Interfere issue for SI-1 change Y3 from SJ100001U00 to SJ100006600 with 10PPM 0 .2
8 9 06,19, SB ATI ATI recommend for update Change R312 from 0_0402 to 33_0402; Change R356 from 10K_0402 0 .2
11/30 to 2.2K_0402; Install C23 as 0.1UF_0402
23
90 33 KBC 11/30 HW Change 32.768KHz Main Source Vendor become EPSON Change Y7 from SJ100001V00 to SJ132P7K220 0 .2
91 32 BIOS 12/03 HW Cancel Ext. BIOS reflash design because of +3VL erroe Add R221; Remove U30,R226,R228,C489 0 .2
92 34 LED 12/03 HW Cancel G-Sensor INT2 LED function Remove Q156 0 .2
4 4

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Mobile AMD S1G2 CPU with ATI RS780M and SB700 schematics

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Mobile AMD S1G2 CPU with ATI RS780M and SB700 schematics

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Security Classification Compal Secret Data Compal Electronics, Inc.

Consumer AMD 14" UMA - Ripley (JBL20)

USB conn x2 daughter board

PCI-E BUS*5 Azalia (HDA I/F)

RJ45/11 CONN LPC BUS Audio CKT

KBC SATA HDD Connector

Docking CONN. LED SATA ODD Connector

*RJ-45(LED*2) P41 Touch Pad CONN. Int.KBD

O MEANS ON X MEANS OFF Symbol Note :

: means Digital Ground

*RP@ : means install when Ripley.

Near CPU Socket

VLDT=500mA D1 VLDT_A0 HT LINK VLDT_B0 AE2 +VLDT_B 1 2

Security Classification Compal Secret Data Compal Electronics, Inc.

Processor DDR2 Memory Interface

Security Classification Compal Secret Data Compal Electronics, Inc.

WWW.AliSaler.Com A:Need to re-Link "SGN00000200"

LDT_RST# CPU_TEST21_SCANEN AB8 C3

<19> H_PWRGD_CPU H_PWRGD_CPU 2.09V for Gate

11/30 update 0.1U_0402_16V7K

R36 CPU_SIC Q129 3 1 SMB_EC_CK2 SMB_EC_CK2 <33> +1.8V

LDT_STOP# FDV301N, the Vgs is:

1 CPU_TEST15_BP1 R32 2 1 @ 300_0402_5%

C26 3 4 CPU_TEST19_PLLTEST0 R34 @ 300_0402_5%

Security Classification Compal Secret Data Compal Electronics, Inc.

180PF Qt'y follow the distance between 2 2 2 2 2 2 2 2

Security Classification Compal Secret Data Compal Electronics, Inc.

+1.8V JP4 +1.8V +0.9V +1.8V

Security Classification Compal Secret Data Compal Electronics, Inc.

Security Classification Compal Secret Data Compal Electronics, Inc.

PCIE I/F GFX

AE3 AC1 PCIE_ITX_PRX_P0 C152 1 2 0.1U_0402_16V7K New Card

HYPER TRANSPORT CPU I/F

<4> H_CLKOP0 T22 HT_RXCLK0P HT_TXCLK0P H24 H_CLKIP0 <4>

0718 Place within 1" RS780M_FCBGA528 0718 Place within 1"

NEED CHECK R68 & R69 WITH AMD

Security Classification Compal Secret Data Compal Electronics, Inc.

<15> NB_OSC_14.318M E11

Security Classification Compal Secret Data Compal Electronics, Inc.

CKE VDDQ MEM_CASb(NC) MEM_DQS1N(NC)

+MEM_VREF VSSQ F8 09/19 update

9/20 SA000012G20 S IC D2 32M16 HY5PS121621CFP-25 FBGA 84P

SIDE@ SIDE@ SIDE@ SIDE@

SIDE@ SIDE@ SIDE@ SIDE@ C203

SIDE@ SIDE@ SIDE@

Security Classification Compal Secret Data Compal Electronics, Inc.

L18 L 0.45A/40mil/3vias L16 VDDHT_3 VDDPCIE_3 C6

L19 L 0.5A/50mil/4vias A23 VDDHTRX_7 VDDPCIE_15 T9 L12 VSS11 VSSAPCIE29 W7

+1.8VS L Just for RS780M A11 version boot issue

R1017 @ 0_0402_5% G C1066 @ 10U_0805_10V4Z

Security Classification Compal Secret Data Compal Electronics, Inc.

EMI Caps for single end clock.

R170 1 2 33_0402_5% OSC_14M_NB NB_OSC_14.318M

27M_SEL New Card

1 configure as SATA output 1 * configure as 27M and 27M_SS output REFCLK_P

Use voltage divider resistor R379 & R380 to pull low

+5VS +R_CRT_VCC +CRT_VCC

+3VS BLUE_L <35>

6.8K_0402_5% 6.8K_0402_5% 2 4 D_HSYNC R240 1 2 0_0603_5% HSYNC

<11> UMA_CRT_CLK 4 3 D_DDCCLK 1 2 11/07 update

Security Classification Compal Secret Data Compal Electronics, Inc.

680P_0402_50V7K LVDS_B2+ 35 36 LCD_DDC_CLK +3VS

RJ-45(LED2) P41 Touch Pad CONN. Int.KBD