HP ENVY M6 Compal - La-8712p - r0.3 - Schematics

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1 1
Compal Confidential
2
Huayra DIS (QCL51) Schematics Document 2
AMD Comal Platform
AMD Trinity APU / Hudson FCH / ATI Thames XT M2

Muxless/UMA / PX 5.0
3 3
2012-01-04
LA-8712P REV: 0.3
4 4
Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2011/07/08 Deciphered Date 2015/07/08 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATICS, MB A8712
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B A
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4019I5
Date: Tuesday, January 10, 2012 Sheet 1 of 57
A B C D E
A B C D E
Compal Confidential
Model Name : QCL51 AMD 64M x16
128M x 16
Board Name : LA-8712P VRAM DDR3page
1
19, 20 1
Thermal Sensor
DDR3 AMD Comal
ATI Thames XT M2 GFX x 16 Gen2
ADM1032
page 14
uFCBGA-962 AMD FS1R2 APU Memory BUS(DDR3/DDR3L)
DP2 204pin DDRIII-SO-DIMM X2
Page 13~18 APU HDMI Dual Channel
(UMA / Muxless) Trinity BANK 0, 1, 2, 3 Page 11,12
1.5V DDRIII 1333/1600MHz
DP0
uPGA-722 Package
HDMI Conn.
page 23 1 CH
DP1 Page 6~10
LVDS
LVDS Conn. 1 CH Translator DP x 4 Daughter board
P_GPP x 3 (DP1 TXP/N 0~4) UMI
2
page 22 ANX3112 GEN1 2
page 21 ML for FCH VGA USB20 USB30 CMOS USB30
Sub/B*1 Sub*1 Camera M/B*2
CRT Conn. USB Charger Repeater
page 24 page 40 page 40 page 22 page 41
Port 0 USB 3.0 Port 2 Port 5

USB 3.0 Port 0,1
GPP1 GPP0
FCH USB 2.0 Port 12
USB 2.0 Port 10,11
USB
Hudson-M3
USB 2.0 Port 8 MINI Card 1 Card Reader/Gbe Lan Port 7
(Wireless LAN with BT) Realtek RTL8411 uFCBGA-656
page 32 page 31 SATA
Page 25~29 FP
Gen3 6Gb/s Gen2 3Gb/s page 39
port 0 port 1
SD slot Transformer / RJ45 LPC BUS
page 31 page 31
SATA HDD SATA ODD
3 HD Audio 3
page 30 page 30
ENE Daughter board
LED KBC932
page 37
HDA Codec SPK
page 39 IDT 92HD91 page 33
page 36
RTC CKT. Touch Pad Int.KBD

page 39 page 38
page 25 Daughter board HP Amp Sub Woofer
Daughter board page 35 Amp page 34 BIOS ROM
Power On/Off CKT. Power/B with LED
page 38
page 38 SYS BIOS (4M)
page 26
FAN/LED Combo Sub Woofer
Fan Control page 39 jack page 36 page 34
4
page 30 EC BIOS (256K) 4
page 38
DC/DC
Interface CKT.page 42 Security Classification Compal Secret Data Compal Electronics, Inc.
Power Circuit THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
B
Document Number Rev
A
page 44~56 DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 4019I5
A B C D E
5 4 3 2 1
CLOCK DISTRIBUTION DISPLAY OUTPUT

B_SODIMM
A_SODIMM
D D
AMD
ATI VGA
DDRB_CLK1P/N
DDRB_CLK0P/N
DDRA_CLK1P/N
DDRA_CLK0P/N
1066~1866MHz
1066~1866MHz
Chelsea Pro LVDS CONN
APU_TXOUT[0:2]+/-
CLK_PEG_VGAP/N APU_TXOUT_CLK+/-
100MHz APU_LVDS_CLK/DATA
APU_DISP_CLKP/N
C AMD 100MHz AMD LVDS_OUT C
RTD2132
CPU FS1 SOCKET
FCH DP_IN
APU_CLKP/N Hudson-M2/M3
100MHz Internal CLK GEN
DP0_AUX GPP_CLK
100MHz
LVDS Transtator 32.768KHz 25MHz

X5 X1
C
DP0_TXP/N0
DP0_AUXP/N
B
GPP2 GPP3 DP0 DPE DPF B
WLAN PCIE_GFX[0:15] C
Mini PCI Socket

GbE LAN/ APU VGA
Card reader PCIE_GFX[0:15]
DP1 DP2 DAC1 DPA
25MHz
YL1
FCH
CRT CONN HDMI CONN

A A

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 4019I5 A
5 4 3 2 1
A B C D E
ZZZ1 ZZZ2
Voltage Rails
SIGNAL
Power Plane Description S1 S3 S5 STATE SLP_S1# SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock DIS@ UMA@
PCB PCB
Part Number = DA80000SH00 Part Number = DA60000T500
VIN Adapter power supply (19V) N/A N/A N/A Full ON HIGH HIGH HIGH HIGH ON ON ON ON PCB 0OH LA-8712P REV0 M/B PCB 0OH LA-8712P REV0 M/B
B+ AC or battery power rail for power circuit. N/A N/A N/A

S1(Power On Suspend) LOW HIGH HIGH HIGH ON ON ON LOW
+APU_CORE Core voltage for CPU ON OFF OFF
ZZZ3
1
+APU_CORE_NB Voltage for On-die VGA of APU ON OFF OFF S3 (Suspend to RAM) LOW LOW HIGH HIGH ON ON OFF OFF 1
+VGA_CORE 0.95-1.2V switched power rail ON OFF OFF

S4 (Suspend to Disk) LOW LOW LOW HIGH ON OFF OFF OFF
+VDDCI 0.95-1.2V switched power rail ON OFF OFF DIS@
X7638732L01
+0.75VS 0.75V switched power rail for DDR terminator ON ON OFF S5 (Soft OFF) LOW LOW LOW LOW ON OFF OFF OFF Part Number = X7638732L01
+0.935VGS 0.935V switched power rail for VGA ON OFF OFF

+1.1ALW 1.1V switched power rail for FCH ON ON ON* Board ID / SKU ID Table for AD channel
+1.1VS 1.1V switched power rail for FCH ON OFF OFF Vcc 3.3V +/- 5%
+1.2VS 1.2V switched power rail for APU ON OFF OFF Ra/Rb 100K +/- 5% BOARD ID Table
+1.5V 1.5V power rail for CPU VDDIO and DDR ON ON OFF Board ID Ra / Rb V AD_BID min V AD_BID typ V AD_BID max Board ID PCB Revision
+1.5V_PCIE 1.5V switched power rail ON OFF OFF 0 0 0 V 0 V 0 V 0 DB
+1.8VGS 1.8V switched power rail ON OFF OFF 1 8.2K +/- 5% 0.216 V 0.250 V 0.289 V 1 SI
+2.5VS 2.5V for CPU_VDDA ON OFF OFF 2 18K +/- 5% 0.436 V 0.503 V 0.538 V
+3VALW 3.3V always on power rail ON ON ON* 3 33K +/- 5% 0.712 V 0.819 V 0.875 V
+LAN_VDD_3V3 3.3V power rail for LAN ON ON ON 4 56K +/- 5% 1.036 V 1.185 V 1.264 V
+3VS 3.3V switched power rail ON OFF OFF 5 100K +/- 5% 1.453 V 1.650 V 1.759 V
+5VALW 5V always on power rail ON ON ON* 6 200K +/- 5% 1.935 V 2.200 V 2.341 V
2
+5VS 5V switched power rail ON OFF OFF 7 NC 2.500 V 3.300 V 3.300 V 2
+VSB VSB always on power rail ON ON ON*

+RTCVCC RTC power ON ON ON
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
BOM Option Table BOM Config
BOM
Structure Description DIS PX@ DIS@ Tha@
PX@ PX function UMA UMA@
DIS@
UMA@
Tha@
x = 1 is read cmd, x= 0 is writee cmd.
External PCI Devices

Device IDSEL# REQ#/GNT# Interrupts
3 3
EC SM Bus1 address EC SM Bus2 address

Device Address HEX Device Address HEX
Smart Battery 0001 011X b 16H ADI ADM1032 (GPU) 1001 101X b 9AH
SB-TSI (APU) 1001 100X b 98H
LVDS TR 1010 100X b A8H
VGA Internal Thermal 1000 001X b 82H
FCH (S0) FCH (S0~S5)

4 SM Bus 0 address SM Bus 1 address 4
Device Address HEX Device Address HEX

DDR DIMM1 1010 000X b A0 Touch pad
DDR DIMM2 1010 001X b A2

Amplifier
B A
4019I5
A B C D E
5 4 3 2 1
AMD APU FS1R2

BATTERY BATT+ PU101 PU2000 +APU_CORE
12.6V CHARGER ISL6277HRTZ-T 0.7~1.475V VDD CORE 60A
+APU_CORE
BQ24738ARGRR 0.7~1.475V VDDNB 44A
+APU_CORE_NB +2.5VS +APU_CORE_NB
+2.5VS VDDA 0.5A
+2.5VS
+1.5V VDDIO 3.2A
PU501 +1.5V +1.5V
D AC ADAPTOR VIN RT8207MZQW +1.2VS VDDR 8.5A D
19V 90W +0.75VS PU702 +1.2VS
APL5508
RAM DDRIII SODIMMX2
PU701 +1.2VS +1.5V VDD_MEM 4A
+1.5V
RT8237EZQW
B+ +0.75VS VTT_MEM 0.5A
+0.75VS
VGA ATI
+VGA_CORE Chelsea Pro
PU900
+VGA_CORE 0.85~1.1V VDDC 28A
ADP3211MNR2G
+VDDCI
PU1000 0.9~1.0V VDDCI 4.6A
+VDDCI
SY8033BDBC
+0.935VGS DPLL_VDDC: 125 mA
PU935 SPV10: 100 mA
+0.935VGS +0.935VGS
SY8809DFC PCIE_VDDC: 1100 mA
DP[A:E]_VDD10: 880 mA
+1.5V_PCIE +1.5VGS VRAM 512/1GB/2GB
PU1501 UV19
+1.5VGS +1.5VGS VDDR1: 1200 mA 64M / 128Mx16 * 4 / 8
SY8036DBC AO4430L
PU801 +1.1VALW
SY8809DFC +1.5VGS 2.4 A
PLL_PVDD: 75 mA
TSVDD: 5 mA
C C
AVDD: 70 mA
VDD1DI: 45 mA
PU301 +3VALW VDD_CT: 17mA
RT8205LZQW U40 PU401 PCIE_VDDR: 440 mA
+5VALW SI4800 SY8033BDBC +1.8VGS +1.8VGS
+1.8VGS DP[A:F]_VDD18: 990 mA
SPV18: 50mA
MPV18: 150mA
+3VS
+INVPWR_B+
+3VS QV16
AP2301GN +3VSG
U38 +3VSG +3VGS VDDR3: 60 mA
SI4800 JUMP @
LCD panel +5VS FCH AMD Hudson M3

15.6"
VDDPL_11_DAC: 7 mA
VDDAN_11_ML: 226 mA
B+ 300mA U39 VDDCR_11: 1007 mA
AO4430L +1.1VS +1.1VS
+3.3 350mA +1.1VS VDDAN_11_CLK: 340 mA
VDDAN_11_PCIE: 1088 mA
VDDAN_11_SATA: 1337 mA
VDDAN_11_USB_S: 140 mA
+5VS VDDCR_11_USB_S: 42 mA
FAN Control VDDAN_11_SSUSB_S: 282 mA
B APL5607 +1.1VALW +1.1VALW VDDCR_11_SSUSB_S: 424 mA B
VDDCR_11_S: 187 mA
VDDPL_11_SYS: 70 mA
+5VS 500mA VDDCR_11_GBE_S:63mA
RM13
U54 +5VALW VDDIO_33_PCIGP: 102 mA

AP2301MPG VDDPL_33_SYS: 47 mA
+USB3_VCCA
VDDPL_33_DAC: 20 mA
+3VS VDDPL_33_ML: 12 mA
+3VS VDDAN_33_DAC: 30 mA
+3VS VDDPL_33_PCIE: 11 mA
USB3.0 X2 U61
+1.5VS_WLAN
VDDPL_33_SATA: 12 mA
+USB_BS TPS2540RTER VDDPL_33_USB_S: 14 mA
+5V
Dual+1 VDDPL_33_SSUSB_S: 11 mA
2.5A USB3.0 X1 +3VALW VDDIO_AZ_S: 26 mA
USB2.0 X1 +3VALW VDDAN_33_USB_S: 470 mA
+3VALW VDDIO_33_S: 59 mA
+5V VDDXL_33_S: 5 mA
Dual+1 VDDAN_33_HWM_S: 12 mA
SATA Audio Codec EC LAN /Card reader Mini Card VDDIO_GEB_S: 145mA
2.5A HDD*1 IDT 92HD91 ENE KB932 RTL8411 WLAN VDDIO_33_GBE_S: 2mA
ODD*1
+5V 3A +5V 45mA +3.3VALW 30mA +3.3VALW 201mA +1.5VS 500mA
+3.3VS 3mA +3.3VS 1A GND VDDIO_33_GBE_S
+3.3VS 25mA +3.3VALW 330mA VDDCR_11_GBE_S
VDDIO_GBE_S
RTC
A
Bettary RTC BAT VDDBT_RTC_G A
Security Classification Compal Secret Data

5 4 3 2 1
A B C D E
13 PCIE_GTX_C_FRX_P[0..15] PCIE_FTX_C_GRX_P[0..15] 13
13 PCIE_GTX_C_FRX_N[0..15] PCIE_FTX_C_GRX_N[0..15] 13
JCPU1A
1
PCI EXPRESS 1
PCIE_GTX_C_FRX_P0 AB8 AB2 PCIE_FTX_GRX_P0 C917 PX@ 1 2 .1U_0402_16V7K PCIE_FTX_C_GRX_P0
PCIE_GTX_C_FRX_N0 P_GFX_RXP0 P_GFX_TXP0 PCIE_FTX_GRX_N0 C918 PX@ .1U_0402_16V7K PCIE_FTX_C_GRX_N0
AB7 P_GFX_RXN0 P_GFX_TXN0 AB1 1 2
PCIE_GTX_C_FRX_P1 AA9 AA3 PCIE_FTX_GRX_P1 C919 PX@ 1 2 .1U_0402_16V7K PCIE_FTX_C_GRX_P1
AA8 P_GFX_RXN1 P_GFX_TXN1 AA2 1 2
PCIE_GTX_C_FRX_P2 AA5 Y5 PCIE_FTX_GRX_P2 C921 PX@ 1 2 .1U_0402_16V7K PCIE_FTX_C_GRX_P2
AA6 P_GFX_RXN2 P_GFX_TXN2 Y4 1 2
PCIE_GTX_C_FRX_P3 Y8 Y2 PCIE_FTX_GRX_P3 C923 PX@ 1 2 .1U_0402_16V7K PCIE_FTX_C_GRX_P3
Y7 P_GFX_RXN3 P_GFX_TXN3 Y1 1 2
PCIE_GTX_C_FRX_P4 W9 W3 PCIE_FTX_GRX_P4 C925 PX@ 1 2 .1U_0402_16V7K PCIE_FTX_C_GRX_P4
W8 P_GFX_RXN4 P_GFX_TXN4 W2 1 2
PCIE_GTX_C_FRX_P5 W5 V5 PCIE_FTX_GRX_P5 C927 PX@ 1 2 .1U_0402_16V7K PCIE_FTX_C_GRX_P5
GRAPHICS
W6 P_GFX_RXN5 P_GFX_TXN5 V4 1 2
PCIE_GTX_C_FRX_P6 V8 V2 PCIE_FTX_GRX_P6 C929 PX@ 1 2 .1U_0402_16V7K PCIE_FTX_C_GRX_P6
P_GFX_RXP6 P_GFX_TXP6
GPU PCIE_GTX_C_FRX_N6
PCIE_GTX_C_FRX_P7
V7 P_GFX_RXN6 P_GFX_TXN6 V1 PCIE_FTX_GRX_N6
PCIE_FTX_GRX_P7
C930
C931
PX@
PX@
1 2 .1U_0402_16V7K
.1U_0402_16V7K
PCIE_FTX_C_GRX_N6
PCIE_FTX_C_GRX_P7
U9 P_GFX_RXP7 P_GFX_TXP7 U3 1 2
PCIE_GTX_C_FRX_N7
PCIE_GTX_C_FRX_P8
U8 P_GFX_RXN7 P_GFX_TXN7 U2 PCIE_FTX_GRX_N7
PCIE_FTX_GRX_P8
C932
C933
PX@
PX@
1 2 .1U_0402_16V7K
.1U_0402_16V7K
PCIE_FTX_C_GRX_N7
PCIE_FTX_C_GRX_P8
GPU
U5 P_GFX_RXP8 P_GFX_TXP8 T5 1 2
PCIE_GTX_C_FRX_N8 U6 T4 PCIE_FTX_GRX_N8 C934 PX@ 1 2 .1U_0402_16V7K PCIE_FTX_C_GRX_N8
PCIE_GTX_C_FRX_P9 P_GFX_RXN8 P_GFX_TXN8 PCIE_FTX_GRX_P9 C936 PX@ .1U_0402_16V7K PCIE_FTX_C_GRX_P9
T8 P_GFX_RXP9 P_GFX_TXP9 T2 1 2
PCIE_GTX_C_FRX_N9 T7 T1 PCIE_FTX_GRX_N9 C937 PX@ 1 2 .1U_0402_16V7K PCIE_FTX_C_GRX_N9
R9 P_GFX_RXP10 P_GFX_TXP10 R3 1 2
PCIE_GTX_C_FRX_N10 R8 R2 PCIE_FTX_GRX_N10 C939 PX@ 1 2 .1U_0402_16V7K PCIE_FTX_C_GRX_N10
R5 P_GFX_RXP11 P_GFX_TXP11 P5 1 2
PCIE_GTX_C_FRX_N11 R6 P4 PCIE_FTX_GRX_N11 C941 PX@ 1 2 .1U_0402_16V7K PCIE_FTX_C_GRX_N11
2 P_GFX_RXN11 P_GFX_TXN11 2
PCIE_GTX_C_FRX_P12 P8 P2 PCIE_FTX_GRX_P12 C942 PX@ 1 2 .1U_0402_16V7K PCIE_FTX_C_GRX_P12
P7 P_GFX_RXN12 P_GFX_TXN12 P1 1 2
PCIE_GTX_C_FRX_P13 N9 N3 PCIE_FTX_GRX_P13 C944 PX@ 1 2 .1U_0402_16V7K PCIE_FTX_C_GRX_P13
N8 P_GFX_RXN13 P_GFX_TXN13 N2 1 2
PCIE_GTX_C_FRX_P14 N5 M5 PCIE_FTX_GRX_P14 C946 PX@ 1 2 .1U_0402_16V7K PCIE_FTX_C_GRX_P14
N6 P_GFX_RXN14 P_GFX_TXN14 M4 1 2
PCIE_GTX_C_FRX_P15 M8 M2 PCIE_FTX_GRX_P15 C948 PX@ 1 2 .1U_0402_16V7K PCIE_FTX_C_GRX_P15
M7 P_GFX_RXN15 P_GFX_TXN15 M1 1 2
AE5 AD5 PCIE_FTX_DRX_P0 C950 1 2 .1U_0402_16V7K

31 PCIE_DTX_C_FRX_P0 P_GPP_RXP0 P_GPP_TXP0 PCIE_FTX_C_DRX_P0 31
GLAN/Card reader 31 PCIE_DTX_C_FRX_N0 AE6 P_GPP_RXN0 P_GPP_TXN0 AD4 PCIE_FTX_DRX_N0
PCIE_FTX_DRX_P1
C951
C952
1 2 .1U_0402_16V7K
.1U_0402_16V7K
PCIE_FTX_C_DRX_N0 31 GLAN/Card reader
32 PCIE_DTX_C_FRX_P1 AD8 P_GPP_RXP1 P_GPP_TXP1 AD2 1 2 PCIE_FTX_C_DRX_P1 32
WLAN PCIE_FTX_DRX_N1 C953 .1U_0402_16V7K WLAN
GPP
32 PCIE_DTX_C_FRX_N1 AD7 P_GPP_RXN1 P_GPP_TXN1 AD1 1 2 PCIE_FTX_C_DRX_N1 32
AC9 P_GPP_RXP2 P_GPP_TXP2 AC3
AC8 P_GPP_RXN2 P_GPP_TXN2 AC2
AC5 P_GPP_RXP3 P_GPP_TXP3 AB5
AC6 P_GPP_RXN3 P_GPP_TXN3 AB4
AG8 AG2 UMI_FTX_MRX_P0 C956 1 2 .1U_0402_16V7K

25 UMI_MTX_C_FRX_P0 P_UMI_RXP0 P_UMI_TXP0 UMI_FTX_C_MRX_P0 25
AG9 AG3 UMI_FTX_MRX_N0 C957 1 2 .1U_0402_16V7K
25 UMI_MTX_C_FRX_N0 P_UMI_RXN0 P_UMI_TXN0 UMI_FTX_C_MRX_N0 25
AG6 AF4 UMI_FTX_MRX_P1 C958 1 2 .1U_0402_16V7K
UMI 25 UMI_MTX_C_FRX_N1 AG5 P_UMI_RXN1 P_UMI_TXN1 AF5 UMI_FTX_MRX_N1 C959 1 2 .1U_0402_16V7K
UMI_FTX_C_MRX_N1 25
25 UMI_MTX_C_FRX_P2 AF7 P_UMI_RXP2 P_UMI_TXP2 AF1 UMI_FTX_MRX_P2 C960 1 2 .1U_0402_16V7K
UMI_FTX_C_MRX_P2 25 UMI
UMI
3 AF8 AF2 UMI_FTX_MRX_N2 C961 1 2 .1U_0402_16V7K 3
AE8 AE2 UMI_FTX_MRX_P3 C962 1 2 .1U_0402_16V7K
AE9 AE3 UMI_FTX_MRX_N3 C963 1 2 .1U_0402_16V7K
+1.2VS 1 2 P_ZVDDP AG11 AH11 P_ZVSS 1 2

R539 196_0402_1% P_ZVDDP P_ZVSS R540 196_0402_1%
LOTES_ACA-ZIF-109-P12-A_FS1R2
L P_ZVDDP W/S=8/12 mil, <3000mil CONN@

L P_ZVSS W/S=8/12 mil, <3000mil
4 4

B A
4019I5
A B C D E
A B C D E
1 1
JCPU1C
JCPU1B MEMORY CHANNEL B
12 DDRB_SMA[15..0] DDRB_SDQ[63..0] 12
MEMORY CHANNEL A DDRB_SMA0 T27 A14 DDRB_SDQ0
11 DDRA_SMA[15..0] DDRA_SDQ[63..0] 11 MB_ADD0 MB_DATA0
DDRA_SMA0 U20 E13 DDRA_SDQ0 DDRB_SMA1 P24 B14 DDRB_SDQ1
DDRA_SMA1 MA_ADD0 MA_DATA0 DDRA_SDQ1 DDRB_SMA2 MB_ADD1 MB_DATA1 DDRB_SDQ2
R20 MA_ADD1 MA_DATA1 J13 P25 MB_ADD2 MB_DATA2 D16
DDRA_SMA2 R21 H15 DDRA_SDQ2 DDRB_SMA3 N27 E16 DDRB_SDQ3
P22 MA_ADD3 MA_DATA3 J15 N26 MB_ADD4 MB_DATA4 B13
DDRA_SMA4 P21 H13 DDRA_SDQ4 DDRB_SMA5 M28 C13 DDRB_SDQ5
N24 MA_ADD5 MA_DATA5 F13 M27 MB_ADD6 MB_DATA6 B16
DDRA_SMA6 N23 F15 DDRA_SDQ6 DDRB_SMA7 M24 A16 DDRB_SDQ7
DDRA_SMA7 MA_ADD6 MA_DATA6 DDRA_SDQ7 DDRB_SMA8 MB_ADD7 MB_DATA7
N20 MA_ADD7 MA_DATA7 E15 M25 MB_ADD8
DDRA_SMA8 N21 DDRB_SMA9 L26 C17 DDRB_SDQ8
DDRA_SMA9 MA_ADD8 DDRA_SDQ8 DDRB_SMA10 MB_ADD9 MB_DATA8 DDRB_SDQ9
M21 MA_ADD9 MA_DATA8 H17 U26 MB_ADD10 MB_DATA9 B18
DDRA_SMA10 U23 F17 DDRA_SDQ9 DDRB_SMA11 L27 B20 DDRB_SDQ10
M22 MA_ADD11 MA_DATA10 E19 K27 MB_ADD12 MB_DATA11 A20
DDRA_SMA12 L24 J19 DDRA_SDQ11 DDRB_SMA13 W26 E17 DDRB_SDQ12
AA25 MA_ADD13 MA_DATA12 G16 K25 MB_ADD14 MB_DATA13 B17
DDRA_SMA14 L21 H16 DDRA_SDQ13 DDRB_SMA15 K24 B19 DDRB_SDQ14
DDRA_SMA15 MA_ADD14 MA_DATA13 DDRA_SDQ14 MB_ADD15 MB_DATA14 DDRB_SDQ15
L20 MA_ADD15 MA_DATA14 H19 MB_DATA15 C19
F19 DDRA_SDQ15 DDRB_SBS0# U27
MA_DATA15 12 DDRB_SBS0# MB_BANK0
DDRA_SBS0# U24 DDRB_SBS1# T28 C21 DDRB_SDQ16
11 DDRA_SBS0# MA_BANK0 12 DDRB_SBS1# MB_BANK1 MB_DATA16
DDRA_SBS1# U21 H20 DDRA_SDQ16 DDRB_SBS2# K28 B22 DDRB_SDQ17
11 DDRA_SBS1# MA_BANK1 MA_DATA16 12 DDRB_SBS2# MB_BANK2 MB_DATA17
DDRA_SBS2# L23 F21 DDRA_SDQ17 C23 DDRB_SDQ18
11 DDRA_SBS2# MA_BANK2 MA_DATA17 12 DDRB_SDM[7..0] MB_DATA18
J23 DDRA_SDQ18 DDRB_SDM0 D14 A24 DDRB_SDQ19
11 DDRA_SDM[7..0] MA_DATA18 MB_DM0 MB_DATA19
DDRA_SDM0 E14 H23 DDRA_SDQ19 DDRB_SDM1 A18 D20 DDRB_SDQ20
DDRA_SDM1 MA_DM0 MA_DATA19 DDRA_SDQ20 DDRB_SDM2 MB_DM1 MB_DATA20 DDRB_SDQ21
J17 MA_DM1 MA_DATA20 G20 A22 MB_DM2 MB_DATA21 B21
DDRA_SDM2 E21 E20 DDRA_SDQ21 DDRB_SDM3 C25 E23 DDRB_SDQ22
DDRA_SDM3 MA_DM2 MA_DATA21 DDRA_SDQ22 DDRB_SDM4 MB_DM3 MB_DATA22 DDRB_SDQ23
F25 MA_DM3 MA_DATA22 G22 AF25 MB_DM4 MB_DATA23 B23
DDRA_SDM4 AD27 H22 DDRA_SDQ23 DDRB_SDM5 AG22
DDRA_SDM5 MA_DM4 MA_DATA23 DDRB_SDM6 MB_DM5 DDRB_SDQ24
AC23 MA_DM5 AH18 MB_DM6 MB_DATA24 E24
2 DDRA_SDM6 DDRA_SDQ24 DDRB_SDM7 DDRB_SDQ25 2
AD19 MA_DM6 MA_DATA24 G24 AD14 MB_DM7 MB_DATA25 B25
DDRA_SDM7 AC15 E25 DDRA_SDQ25 B27 DDRB_SDQ26
MA_DM7 MA_DATA25 DDRA_SDQ26 DDRB_SDQS0 MB_DATA26 DDRB_SDQ27
MA_DATA26 G27 12 DDRB_SDQS0 C15 MB_DQS_H0 MB_DATA27 D28
DDRA_SDQS0 G14 G26 DDRA_SDQ27 DDRB_SDQS0# B15 B24 DDRB_SDQ28
11 DDRA_SDQS0 MA_DQS_H0 MA_DATA27 12 DDRB_SDQS0# MB_DQS_L0 MB_DATA28
DDRA_SDQS0# H14 F23 DDRA_SDQ28 DDRB_SDQS1 E18 D24 DDRB_SDQ29
11 DDRA_SDQS0# MA_DQS_L0 MA_DATA28 12 DDRB_SDQS1 MB_DQS_H1 MB_DATA29
DDRA_SDQS1 G18 H24 DDRA_SDQ29 DDRB_SDQS1# D18 D26 DDRB_SDQ30
DDRA_SDQS1# H18 E28 DDRA_SDQ30 DDRB_SDQS2 E22 C27 DDRB_SDQ31
DDRA_SDQS2 J21 F27 DDRA_SDQ31 DDRB_SDQS2# D22
11 DDRA_SDQS2 MA_DQS_H2 MA_DATA31 12 DDRB_SDQS2# MB_DQS_L2
DDRA_SDQS2# H21 DDRB_SDQS3 B26 AG26 DDRB_SDQ32
11 DDRA_SDQS2# MA_DQS_L2 12 DDRB_SDQS3 MB_DQS_H3 MB_DATA32
DDRA_SDQS3 E27 AB28 DDRA_SDQ32 DDRB_SDQS3# A26 AH26 DDRB_SDQ33
DDRA_SDQS3# E26 AC27 DDRA_SDQ33 DDRB_SDQS4 AG24 AF23 DDRB_SDQ34
DDRA_SDQS4 AE26 AD25 DDRA_SDQ34 DDRB_SDQS4# AG25 AG23 DDRB_SDQ35
DDRA_SDQS4# AD26 AA24 DDRA_SDQ35 DDRB_SDQS5 AG21 AG27 DDRB_SDQ36
DDRA_SDQS5 AB22 AE28 DDRA_SDQ36 DDRB_SDQS5# AF21 AF27 DDRB_SDQ37
DDRA_SDQS5# AA22 AD28 DDRA_SDQ37 DDRB_SDQS6 AG17 AH24 DDRB_SDQ38
DDRA_SDQS6 AB18 AB26 DDRA_SDQ38 DDRB_SDQS6# AG18 AE24 DDRB_SDQ39
DDRA_SDQS6# AA18 AC25 DDRA_SDQ39 DDRB_SDQS7 AH14
11 DDRA_SDQS6# MA_DQS_L6 MA_DATA39 12 DDRB_SDQS7 MB_DQS_H7
DDRA_SDQS7 AA14 DDRB_SDQS7# AG14 AE22 DDRB_SDQ40
11 DDRA_SDQS7 MA_DQS_H7 12 DDRB_SDQS7# MB_DQS_L7 MB_DATA40
DDRA_SDQS7# AA15 Y23 DDRA_SDQ40 AH22 DDRB_SDQ41
11 DDRA_SDQS7# MA_DQS_L7 MA_DATA40 MB_DATA41
AA23 DDRA_SDQ41 DDRB_CLK0 R26 AE20 DDRB_SDQ42
MA_DATA41 12 DDRB_CLK0 MB_CLK_H0 MB_DATA42
DDRA_CLK0 T21 Y21 DDRA_SDQ42 DDRB_CLK0# R27 AH20 DDRB_SDQ43
11 DDRA_CLK0 MA_CLK_H0 MA_DATA42 12 DDRB_CLK0# MB_CLK_L0 MB_DATA43
DDRA_CLK0# T22 AA20 DDRA_SDQ43 DDRB_CLK1 P27 AD23 DDRB_SDQ44
11 DDRA_CLK0# MA_CLK_L0 MA_DATA43 12 DDRB_CLK1 MB_CLK_H1 MB_DATA44
DDRA_CLK1 R23 AB24 DDRA_SDQ44 DDRB_CLK1# P28 AD22 DDRB_SDQ45
11 DDRA_CLK1 MA_CLK_H1 MA_DATA44 12 DDRB_CLK1# MB_CLK_L1 MB_DATA45
DDRA_CLK1# R24 AD24 DDRA_SDQ45 AD21 DDRB_SDQ46
11 DDRA_CLK1# MA_CLK_L1 MA_DATA45 MB_DATA46
AA21 DDRA_SDQ46 DDRB_CKE0 J26 AD20 DDRB_SDQ47
MA_DATA46 12 DDRB_CKE0 MB_CKE0 MB_DATA47
DDRA_CKE0 H28 AC21 DDRA_SDQ47 DDRB_CKE1 J27
11 DDRA_CKE0 MA_CKE0 MA_DATA47 12 DDRB_CKE1 MB_CKE1
DDRA_CKE1 H27 AF19 DDRB_SDQ48
11 DDRA_CKE1 MA_CKE1 MB_DATA48
AA19 DDRA_SDQ48 DDRB_ODT0 W27 AE18 DDRB_SDQ49
MA_DATA48 12 DDRB_ODT0 MB_ODT0 MB_DATA49
DDRA_ODT0 Y25 AC19 DDRA_SDQ49 DDRB_ODT1 Y28 AE16 DDRB_SDQ50
11 DDRA_ODT0 MA_ODT0 MA_DATA49 12 DDRB_ODT1 MB_ODT1 MB_DATA50
DDRA_ODT1 AA27 AC17 DDRA_SDQ50 AH16 DDRB_SDQ51
11 DDRA_ODT1 MA_ODT1 MA_DATA50 MB_DATA51
AA17 DDRA_SDQ51 DDRB_SCS0# V25 AG20 DDRB_SDQ52
MA_DATA51 12 DDRB_SCS0# MB_CS_L0 MB_DATA52
DDRA_SCS0# V22 AB20 DDRA_SDQ52 DDRB_SCS1# Y27 AG19 DDRB_SDQ53
3 11 DDRA_SCS0# MA_CS_L0 MA_DATA52 12 DDRB_SCS1# MB_CS_L1 MB_DATA53 3
DDRA_SCS1# AA26 Y19 DDRA_SDQ53 AF17 DDRB_SDQ54
11 DDRA_SCS1# MA_CS_L1 MA_DATA53 MB_DATA54
AD18 DDRA_SDQ54 DDRB_SRAS# V24 AD16 DDRB_SDQ55
MA_DATA54 12 DDRB_SRAS# MB_RAS_L MB_DATA55
DDRA_SRAS# V21 AD17 DDRA_SDQ55 DDRB_SCAS# V27
11 DDRA_SRAS# MA_RAS_L MA_DATA55 12 DDRB_SCAS# MB_CAS_L
DDRA_SCAS# W24 DDRB_SWE# V28 AG15 DDRB_SDQ56
11 DDRA_SCAS# MA_CAS_L 12 DDRB_SWE# MB_WE_L MB_DATA56
DDRA_SWE# W23 AA16 DDRA_SDQ56 AD15 DDRB_SDQ57
11 DDRA_SWE# MA_WE_L MA_DATA56 MB_DATA57
Y15 DDRA_SDQ57 MEM_MB_RST# J25 AG13 DDRB_SDQ58
MA_DATA57 12 MEM_MB_RST# MB_RESET_L MB_DATA58
MEM_MA_RST# H25 AA13 DDRA_SDQ58 MEM_MB_EVENT# T25 AD13 DDRB_SDQ59
11 MEM_MA_RST# MA_RESET_L MA_DATA58 12 MEM_MB_EVENT# MB_EVENT_L MB_DATA59
MEM_MA_EVENT# T24 AC13 DDRA_SDQ59 AG16 DDRB_SDQ60
11 MEM_MA_EVENT# MA_EVENT_L MA_DATA59 MB_DATA60
Y17 DDRA_SDQ60 AF15 DDRB_SDQ61
MA_DATA60 DDRA_SDQ61 MB_DATA61 DDRB_SDQ62
+MEM_VREF W20 M_VREF MA_DATA61 AB16 MB_DATA62 AE14
AB14 DDRA_SDQ62 AF13 DDRB_SDQ63
MA_DATA62 MB_DATA63
+1.5V 1 2 M_ZVDDIO W21 M_ZVDDIO MA_DATA63 Y13 DDRA_SDQ63
R541 39.2_0402_1%
L M_ZVDDIO W/S=8/12 mil, <1000mil CONN@
CONN@
0.75V reference voltage
+1.5V
2
L +MEM_VREF 15mil
EVENT# pull high R542
1K_0402_1% Close to JCPU1
+1.5V
1
+MEM_VREF
2
1 2
R544 1 2 1K_0402_5% MEM_MA_EVENT# R543 C964
1K_0402_1% C965
4 R545 1 4
2 1K_0402_5% MEM_MB_EVENT# 1000P_0402_50V7K .1U_0402_16V7K
2 1
1

A B C D E
A B C D E
L Close to APU (JCPU1) Place near APU

JCPU1D
ANALOG/DISPLAY/MISC DP0_AUXP 2 1
21 DP0_TXP0_C
C971 1
C973 1
2 .1U_0402_16V7K DP0_TXP0 L3 DP0_TXP0 DP0_AUXP D1 DP0_AUXP C972 1 2 .1U_0402_16V7K DP0_AUXP_C 21 To LVDS Translator R554 1.8K_0402_5%
21 DP0_TXN0_C 2 .1U_0402_16V7K DP0_TXN0 L2 DP0_TXN0 DP0_AUXN D2 DP0_AUXN C974 1 2 .1U_0402_16V7K DP0_AUXN_C 21
DP0_AUXN 2 1
DISPLAY PORT
To LVDS R555 1.8K_0402_5%
Translator K5 DP0_TXP1 DP1_AUXP E1 ML_VGA_AUXP
ML_VGA_AUXN
C975 1
C976 1
2 .1U_0402_16V7K ML_VGA_AUXP_C 26 To FCH ML_VGA_AUXP 2 1
K4 DP0_TXN1 DP1_AUXN E2 2 .1U_0402_16V7K ML_VGA_AUXN_C 26
R547 1.8K_0402_5%
ML_VGA_AUXN 2 1
K2 D5 APU_HDMI_CLK R556 1.8K_0402_5%
DP0_TXP2 DP2_AUXP APU_HDMI_CLK 23
K1 DP0_TXN2 DP2_AUXN D6 APU_HDMI_DATA
APU_HDMI_DATA 23 To HDMI
J3 E5
0
DP0_TXP3 DP3_AUXP
J2 DP0_TXN3 DP3_AUXN E6
1 1
DISPLAY PORT
C977 1 2 .1U_0402_16V7K DP1_TXP0 H5 F5
26 ML_VGA_TXP0 DP1_TXP0 DP4_AUXP
DISPLAY PORT 1
C968 1 2 .1U_0402_16V7K DP1_TXN0 H4 F6
26 ML_VGA_TXN0 DP1_TXN0 DP4_AUXN
C969 1 2 .1U_0402_16V7K DP1_TXP1 H2 G5
+1.5V 26 ML_VGA_TXP1 DP1_TXP1 DP5_AUXP
To FCH 26 ML_VGA_TXN1
C970 1 2 .1U_0402_16V7K DP1_TXN1 H1 DP1_TXN1 DP5_AUXN G6
MISC.
VGA ML 26 ML_VGA_TXP2
C978 1 2 .1U_0402_16V7K DP1_TXP2 G3 DP1_TXP2 DP0_HPD D3 DP0_HPD
DP0_HPD 10 LVDS/eDP
R579 1 2 1K_0402_5% APU_SIC C979 1 2 .1U_0402_16V7K DP1_TXN2 G2 E3 DP1_HPD CRT
26 ML_VGA_TXN2 DP1_TXN2 DP1_HPD DP1_HPD 10
D7 DP2_HPD HDMI
DP2_HPD DP2_HPD 23
R581 1 2 1K_0402_5% APU_SID C980 1 2 .1U_0402_16V7K DP1_TXP3 F2 E7
26 ML_VGA_TXP3 DP1_TXP3 DP3_HPD
C981 1 2 .1U_0402_16V7K DP1_TXN3 F1 F7
26 ML_VGA_TXN3 DP1_TXN3 DP4_HPD
R791 1 2 1K_0402_5% ALERT_L G7
DP5_HPD
L9
DISPLAY PORT 2
23 APU_HDMI_TXD2+ DP2_TXP0
L8 C6 DP_ENBKL VDDIO level
23 APU_HDMI_TXD2- DP2_TXN0 DP_BLON DP_ENBKL 10
DP_DIGON B6 Need Level shift
R604 2 1 1K_0402_5% ALLOW_STOP L5 A6 DP_INT_PWM
23 APU_HDMI_TXD1+ DP2_TXP1 DP_VARY_BL DP_INT_PWM 10
R577 2
To HDMI 23 APU_HDMI_TXD1- L6 DP2_TXN1
1 1K_0402_5% DP_AUX_ZVSS C1 DP_AUX_ZVSS R569 1 2 150_0402_1%
@
23 APU_HDMI_TXD0+ K8 DP2_TXP2 L DP_AUX_ZVSS W/S=8/12 mil, <3000mil
Allow_STOP leakage issue 23 APU_HDMI_TXD0- K7 DP2_TXN2 TEST6 AD12
TEST28_H L10 T16
23 APU_HDMI_TXC+ J6 DP2_TXP3 TEST28_L M10 T15
+1.5V_PCIE +1.5V J5 P19
23 APU_HDMI_TXC- DP2_TXN3 TEST30_H
TEST30_L R19
APU_CLKP AE11 T19
25 APU_CLKP CLKIN_H TEST32_H
1 @ 2 100MHz APU_CLKN AD11 N19
25 APU_CLKN CLKIN_L TEST32_L
CLK
R613 0_0402_5%
1 2 100MHz APU_DISP_CLKP AB11 P18 T6
25 APU_DISP_CLKP DISP_CLKIN_H TEST4
R616 0_0402_5% NSS APU_DISP_CLKN AA11 R18 T7
25 APU_DISP_CLKN DISP_CLKIN_L TEST5
R578 2 1 300_0402_5% APU_RST# M18 T8
TEST9
TEST10 N18 T9
2 R580 2 1 300_0402_5% APU_PWRGD APU_SVC B3 F11 2
54 APU_SVC SVC TEST14 T10
TEST
SVI 2.0 APU_SVD A3 G11
SER.
54 APU_SVD SVD TEST15 T11
R575 1 @ 2 1K_0402_5% APU_SVC (0 ohm APU_SVT C3 H11 T12
54 APU_SVT SVT TEST16
at Power Side) TEST17 J11 T13
R576 1 @ 2 1K_0402_5% APU_SVD SB-TSI (S5 Domain) APU_SIC AG12
APU_SID SIC APU_TEST18 R582 1K_0402_5%
AH12 SID TEST18 F12 1 2
R92 1 @ 2 1K_0402_5% APU_SVT G12 APU_TEST19 R583 1 2 1K_0402_5%
APU_RST# R598 1 TEST19
25 APU_RST# 2 0_0402_5% APU_RST#_APU AF10 RESET_L TEST20 J12 APU_TEST20 R584 1 2 1K_0402_5%
For ESD request close APU side APU_PWRGD R615 1 2 0_0402_5% APU_PWRGD_APU AB12 H12 APU_TEST24 R574 1 2 1K_0402_5%
25,54 APU_PWRGD PWROK TEST24
ALLOW_STOP
CTRL
25 ALLOW_STOP AC12 DMAACTIVE_L
TEST35 change to PU for
R623 1 @ 2 0_0402_5% APU_PROCHOT# AC10 AA12 TEST35 R558 1 2 300_0402_5% +1.5V HDMI can not output
45 H_PROCHOT# PROCHOT_L TEST35
APU_THERMTRIP# AE12 R559 1 @ 2 300_0402_5%
APU_RST# APU_CLKP ALERT_L THERMTRIP_L TEST25_H R557 510_0402_1% 20110126
2 1 AF12 ALERT_L TEST25_H AE10 1 2
C40 33P_0402_50V8J C4702
2 122P_0402_50V8J APU_CLKN AD10 TEST25_L R548 1 2 510_0402_1% +1.2VS
APU_PWRGD C4703 22P_0402_50V8J APU_TDI TEST25_L
H10 TDI
C38 33P_0402_50V8J 2 1 APU_DISP_CLKP T18 APU_TDO J10 K22 M_TEST R564 1 @ 2 39.2_0402_1% +1.5V
APU_PROCHOT# C4704 TDO TEST31
2 1 2 122P_0402_50V8J APU_DISP_CLKN APU_TCK F10 TCK
R567 1 2 39.2_0402_1%
JTAG
C36 22P_0402_50V8J C4705 22P_0402_50V8J Internal PU when no use HDT APU_TMS G10 11/14 Change net name
APU_THERMTRIP# APU_TRST# TMS
2 1 F9 TRST_L
C35 22P_0402_50V8J 11/15 RF T17 APU_DBRDY G9
APU_DBREQ# DBRDY FS1R2 R571 1 +1.5V
H9 DBREQ_L FS1R2 W10 2 10K_0402_5% +3VALW Close to Header
54 APU_VDD_RUN_FB_L B4 VSS_SENSE R592 1 2 1K_0402_5% APU_TDI
SENSE
T22 C5 VDDP_SENSE RSVD1 Y10
RSVD
APU_VDDNB_SEN A4 AA10
54 APU_VDDNB_SEN VDDNB_SENSE RSVD2
T21 A5 Y12 R593 1 2 1K_0402_5% APU_TCK
APU_VDD_SEN VDDIO_SENSE RSVD3
54 APU_VDD_SEN C4 VDD_SENSE RSVD4 K21
T23 B5 R594 1 2 1K_0402_5% APU_TMS
VDDR_SENSE
Route as differential with APU_VDD_RUN_FB_L LOTES_ACA-ZIF-109-P12-A_FS1R2 R595 1 2 1K_0402_5% APU_TRST#
CONN@
R596 1 2 1K_0402_5% APU_DBREQ#
3 3
10/27 300 ohm??
CPU TSI interface level shift Asserted as an input to +1.5V +3VS

HDT Debug conn
force processor into
BSH111, the Vgs is: HTC-active state
min = 0.4V
1
Max = 1.3V
2
C935 1 2 0.1U_0402_16V4Z R587 R588

R586 10K_0402_5% 10K_0402_5%
1K_0402_5%
+3VS 1 R535 2 1 R536 2 When APU High -> MOS OFF (Vgs < 0.4V )
2 2
2
APU Low -> MOS ON (Vgs > 1.3V)
1
31.6K_0402_1% 30K_0402_1%
B
R591 Q11
APU_PROCHOT#
E
1 2 1 3 EC_THERM# 25,37,45,54
C
Vg = 1.607 V
2
G
Q9 0_0402_5% MMBT3904_SOT23-3
+1.5V
APU_SID 3 1 EC_SMB_DA2
EC_SMB_DA2 14,21,35,37
11/10 del debug connector
S
THERMTRIP shutdown Indicates to the FCH that a thermal trip

BSH111_SOT23-3 temperature: 115 degree has occurred. Its assertion will cause the FCH
1
to transition the system to S5 immediately

2
2
G
Q10 R610 R609

2 2
1K_0402_5% 10K_0402_5%
B
APU_SIC 3 1 EC_SMB_CK2
EC_SMB_CK2 14,21,35,37
1
Q12
S
BSH111_SOT23-3 APU_THERMTRIP# 3 1 1 2 H_THERMTRIP# 27

C
4 R611 0_0402_5% 4
MMBT3904_SOT23-3 1 2 MAINPWON 45,46
R612 @ 0_0402_5%

Custom A
4019I5
A B C D E
A B C D E
Power Name Consumption

VDD
+CPU_CORE 60A +CPU_CORE Decoupling
VDDNB JCPU1F
+CPU_CORE_NB 37A 330uF x 4 @ x1 J20
L4
VSS_1 VSS_73 A19
A21
22uF x 10 VSS_2 VSS_74
VDDIO R7 VSS_3 VSS_75 A23
+1.5V 3.2A 0.22uF x2 W18
A15
VSS_4 VSS_76 A25
A7
0.01uF x3 VSS_5 VSS_77
VDDP / VDDR AB17 VSS_6 VSS_78 AA4
+1.2VS 5A / 3.5A 180pF x2 @ x1 AC22
AE21
VSS_7 VSS_79 AA7
AB13
VSS_8 VSS_80
VDDA AF24 VSS_9 VSS_81 AB15
0.75A
1 1
+2.5VS AH23 VSS_10 VSS_82 AB19
AH25 VSS_11 VSS_83 AB21
B7 VSS_12 VSS_84 AB23
C14 VSS_13 VSS_85 AB25
+CPU_CORE_NB Decoupling C16 VSS_14 VSS_86 AB27
C2 VSS_15 VSS_87 AB9
C20 VSS_16 VSS_88 AC14
330uF x2 C22 VSS_17 VSS_89 AC16
C24 VSS_18 VSS_90 AC18
22uF x2 @ x2 C26 AC20
+APU_CORE JCPU1E +APU_CORE VSS_19 VSS_91
10uF x1 C28 VSS_20 VSS_92 AC24
D13 VSS_21 VSS_93 AC26
F8 VDD_1 VDD_32 R11 0.22uF x2 D15 VSS_22 VSS_94 AC28
H6 VDD_2 VDD_33 T10 180pF x3 D17 VSS_23 VSS_95 AC4
J1 VDD_3 VDD_34 H8 D19 VSS_24 VSS_96 AC7
J14 VDD_4 VDD_35 G1 Decoupling between CPU and DIMMs D23 VSS_25 VSS_97 AD9
P6 VDD_5 VDD_36 U11 across VDDIO and VSS split D25 VSS_26 VSS_98 AE13
P10 VDD_6 VDD_37 W11 D27 VSS_27 VSS_99 AE15
J16 VDD_7 VDD_38 W13 E4 VSS_28 VSS_100 AE17
J18 VDD_8 VDD_39 W15 +1.5V +1.5V E9 VSS_29 VSS_101 M9
J9 VDD_9 VDD_40 W17 +1.5V / VDDIO Decoupling F14 VSS_30 VSS_102 N10
C1012
C1013
C56
C55
C14
C15
C16
C17
C1018
C1019
C1020
C1021
C1022
C1023
C1024
C1025
C5
C1027
C1028
C1029
C1030
K19 VDD_10 VDD_41 W19 1 F16 VSS_31 VSS_103 N4
K3 VDD_11 VDD_42 AB3 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 F18 VSS_32 VSS_104 N7
+
K17 VDD_12 VDD_43 AD3 330uF x1 F20 VSS_33 VSS_105 R10
M3 VDD_13 VDD_44 AD6 F22 VSS_34 VSS_106 R4
22uF x4
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
0.22U_0402_10V4Z
0.22U_0402_10V4Z
0.22U_0402_10V4Z
0.22U_0402_10V4Z
0.22U_0402_10V4Z
0.22U_0402_10V4Z
180P_0402_50V8J
180P_0402_50V8J
330U_D2_2V_Y
0.22U_0402_10V4Z
0.22U_0402_10V4Z
180P_0402_50V8J
180P_0402_50V8J
K6 VDD_14 VDD_45 AE1 F26 VSS_35 VSS_107 T11
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
V10 VDD_15 VDD_46 L1 4.7uF x4 F28 VSS_36 VSS_108 T9
V18 Y6 G13 U10
GND
VDD_16 VDD_47 0.22uF x6 VSS_37 VSS_109
V3 VDD_17 VDD_48 M6 G15 VSS_38 VSS_110 U18
F3 VDD_18 VDD_49 N11 180pF x1 @x1 G17 VSS_39 VSS_111 U4
L18 VDD_19 VDD_50 N1 G19 VSS_40 VSS_112 U7
V6 VDD_20 VDD_51 T3 G21 VSS_41 VSS_113 V11
2 2
W1 VDD_21 VDD_52 T6 G23 VSS_42 VSS_114 AE19
T18 VDD_22 VDD_53 U19 G25 VSS_43 VSS_115 AE23
Y14 VDD_23 VDD_54 U1 G4 VSS_44 VSS_116 AE25
AA1 VDD_24 VDD_55 Y16 +1.2VS J22 VSS_45 VSS_117 AE27
AB6 VDD_25 VDD_56 Y18 VDDR Decoupling J24 VSS_46 VSS_118 AE4
C54
C53
C52
C1052
C1053
C1048
C1044
C1045
AC1 VDD_26 VDD_57 Y3 J4 VSS_47 VSS_119 AE7
R1 D4 1 1 1 1 1 1 1 1 Close JCPU1.AG10,AH8,AH9,AH10 J7 AF14
VDD_27 VDD_58 VSS_48 VSS_120
P3 VDD_28 VDD_59 F4 K11 VSS_49 VSS_121 AF16
K10 VDD_29 VDD_60 AF6 K14 VSS_50 VSS_122 AF18
10uF x3
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
0.22U_0402_10V4Z
0.22U_0402_10V4Z
1000P_0402_50V7K
180P_0402_50V8J
180P_0402_50V8J
H3 VDD_30 VDD_61 AF3 K9 VSS_51 VSS_123 AF20
2 2 2 2 2 2 2 2
M19 VDD_31 VDD_62 L11 0.22uF x2 AC11 VSS_52 VSS_124 AF22
L19 VSS_53 VSS_125 AF26
1000pF x1 L7 VSS_54 VSS_126 AF28
+APU_CORE_NB C8 VDDNB_1 VDDNB_13 C11 +APU_CORE_NB 180pF x2 M11 VSS_55 VSS_127 AF9
D10 VDDNB_2 VDDNB_14 C12 AF11 VSS_56 VSS_128 AG4
B8 VDDNB_3 VDDNB_15 D9 V19 VSS_57 VSS_129 AG7
POWER
B12 VDDNB_4 VDDNB_16 D8 V9 VSS_58 VSS_130 AH13

C9 VDDNB_5 VDDNB_17 D12 W16 VSS_59 VSS_131 AH15
A9 VDDNB_6 VDDNB_18 D11 W4 VSS_60 VSS_132 AH17
A10 B11 @ +1.2VS W7 AH19
VDDNB_7 VDDNB_19 +1.2VS VSS_61 VSS_133
A8 VDDNB_8 VDDNB_20 A12 VDDP Decoupling Y11 VSS_62 VSS_134 AH21
C51
C8
C7
C6
C1036
C1037
C50
C1034
C1035
C1038
A11 VDDNB_9 VDDNB_21 B10 Y20 VSS_63 VSS_135 P9
E10 E12 1 1 1 1 1 1 1 1 1 Close JCPU1.AH3~7 1 Y22 C18
VDDNB_10 VDDNB_22 VSS_64 VSS_136
E11 VDDNB_11 VDDNB_23 B9 Y9 VSS_65 VSS_137 D21
C10 + A17 W14
VDDNB_12 22uF x1 VSS_66 VSS_138
22U_0805_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
0.22U_0402_10V4Z
0.22U_0402_10V4Z
1000P_0402_50V7K
180P_0402_50V8J
180P_0402_50V8J
K13 VDDNB_CAP A13 P11
VDDNB_CAP_1 2 2 2 2 2 2 2 2 2 VSS_67 VSS_139
220U_6.3V_M
VDDNB_CAP_2 K12 10uF x3 K16 VSS_68 VSS_140 C7
2
C1002
C1003
C1026
F24 VSS_69 VSS_141 E8

1 1 1 0.22uF x2 G8 VSS_70 VSS_142 K18
1000pF @x1 H7 VSS_71 VSS_143 W12
+1.5V H26 VDDIO_1 VDDIO_19 T23 J8 VSS_72
180pF x2
22U_0805_6.3V6M
22U_0805_6.3V6M
180P_0402_50V8J
K20 VDDIO_2 VDDIO_20 T26

3 2 2 2 LOTES_ACA-ZIF-109-P12-A_FS1R2 3
J28 VDDIO_3 VDDIO_21 U22
K23 U25 220uF x1 CONN@
VDDIO_4 VDDIO_22
K26 VDDIO_5 VDDIO_23 U28
L22 Y26 FBMA-L11-201209-221LMA30T_0805
VDDIO_6 VDDIO_24 L1
L25 VDDIO_7 VDDIO_25 T20
L28 VDDIO_8 VDDIO_26 R28 +2.5VS 2 1 +APU_VDDA
M20 VDDIO_9 VDDIO_27 R25
C18
C1041
C1040
C1043
M23 VDDIO_10 VDDIO_28 R22

M26 VDDIO_11 VDDIO_29 V20 1 1 1 1 VDDA Decoupling
N22 V23 Northbridge Power Pins
VDDIO_12 VDDIO_30
N25 VDDIO_13 VDDIO_31 V26 for Remote Decoupling
Power Sequence of APU
47U_0805_4V6
0.22U_0402_10V4Z
3300P_0402_50V7-K
180P_0402_50V8J
N28 VDDIO_14 VDDIO_32 W22

2 2 2 2 47uF x1
P20 VDDIO_15 VDDIO_33 W25
0.22uF x1
P23
P26
VDDIO_16 VDDIO_34 W28
Y24
+1.5V
VDDIO_17 VDDIO_35 3300pF x1
AA28 VDDIO_18 VDDIO_36 G28 +1.5V
180pF x1
VDDIO: 3200mA +2.5VS Group A
+1.2VS AH6 VDDP_1 VDDR_1 AG10 +1.2VS
AH5 VDDP_2 VDDR_2 AH8
VDDP: 5000mA AH4 VDDP_3 VDDR_3 AH9 VDDR: 3500mA
AH3
AH7
VDDP_4 VDDR_4 AH10
+1.5VS
VDDP_5
+APU_VDDA AB10 VDDA

VDDA: 750mA +CPU_CORE
CONN@
Group B
+CPU_CORE_NB
4 4
Decoupling Caps.
+1.2VS
Pop / @ 330uF 220uF 47uF 22uF 10uF 4.7uF 0.22uF 0.01uF 3300pF 1nF 180pF
Pumori 2.0 0 19/11 7 5 17 3 1 1/1 13/3 Security Classification Compal Secret Data Compal Electronics, Inc.
Comal 7/2 1 1 19/11 7 4 17 3 1 1/1 14/2 SCHEMATICS, MB A8712
P5WS5 7/2 1 1 13 3 8 19 3 1 4 16 DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
4019I5 A

A B C D E
5 4 3 2 1
Panel ENBKL
H
P
D
+3VS
1
2
R614
D 4.7K_0402_5% D
Translator and eDP HPD DP0_HPD R617 D16 @
DP0_HPD 8
2
From Translator or Conn. 100K_0402_5% 2 1 APU_PCIE_RST# 13,21,25,31,32
1
LVDS_HPD R86 D RB751V-40_SOD323-2
21 LVDS_HPD 1 2 0_0402_5%
2
G Q14
MMBT3904_SOT23-3
S 2N7002K_SOT23-3
1
Q15 C
3
8 DP_ENBKL 1 2 2
R619 2.2K_0402_5% B
2
E
3
R620
100K_0402_5%
1
DP_ENBKL R624 1 @ 2 0_0402_5% ENBKL ENBKL 21,37
C
CRT HPD
From FCH
DP1_HPD 8
eDP Panel ENVDD C
FCH_CRT_HPD
26 FCH_CRT_HPD
R88 1 2 0_0402_5%
B B
+3VS
Panel PWM
1
1
R636
4.7K_0402_5%
R635
2
47K_0402_5%
APU_INVT_PWM 21
1
D
2
G Q20
R637 S 2N7002K_SOT23-3
1
2.2K_0402_5% C
3
1 2 2 Q21
8 DP_INT_PWM B
E
3
1
MMBT3904_SOT23-3
R638
4.7K_0402_5%
2
A A

5 4 3 2 1
A B C D E
+VREF_DQA +1.5V +1.5V
L +VREF_DQ 15mil JDIMM1

1 VREF_DQ VSS1 2
3 4 DDRA_SDQ4 DDRA_SDQ[0..63]
DDRA_SDQ0 VSS2 DQ4 DDRA_SDQ5 DDRA_SDQ[0..63] 7
5 DQ0 DQ5 6
DDRA_SDQ1 7 8 DDRA_SDM[0..7]
DQ1 VSS3 DDRA_SDM[0..7] 7
9 10 DDRA_SDQS0#
VSS4 DQS#0 DDRA_SDQS0# 7 DDRA_SMA[0..15]
DDRA_SDM0 11 12 DDRA_SDQS0 DDRA_SMA[0..15] 7
DM0 DQS0 DDRA_SDQS0 7
13 VSS5 VSS6 14
DDRA_SDQ2 15 16 DDRA_SDQ6
DDRA_SDQ3 DQ2 DQ6 DDRA_SDQ7
17 DQ3 DQ7 18
19 VSS7 VSS8 20
1 DDRA_SDQ8 DDRA_SDQ12 1
21 DQ8 DQ12 22
DQ9 DQ13
25 VSS9 VSS10 26
DDRA_SDQS1# 27 28 DDRA_SDM1
7 DDRA_SDQS1# DQS#1 DM1
DDRA_SDQS1 29 30 MEM_MA_RST# Place near DIMM1
7 DDRA_SDQS1 DQS1 RESET# MEM_MA_RST# 7
31 VSS11 VSS12 32
DDRA_SDQ11 DQ10 DQ14 DDRA_SDQ15 +1.5V
35 DQ11 DQ15 36
37 VSS13 VSS14 38
DDRA_SDQ16 39 40 DDRA_SDQ20 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
41 DQ17 DQ21 42 2 2 2 2 2 2 2 2 2 2
43 VSS15 VSS16 44
DDRA_SDQS2# 45 46 DDRA_SDM2 C1067 C1068 C1069 C1070 C1071 C1072 C1073 C1074 C1075 C1076
DDRA_SDQS2 47 48
7 DDRA_SDQS2 DQS2 VSS17 1 1 1 1 1 1 1 1 1 1
49 50 DDRA_SDQ22
DDRA_SDQ18 VSS18 DQ22 DDRA_SDQ23 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
51 DQ18 DQ23 52
DDRA_SDQ19 53 54
DQ19 VSS19 DDRA_SDQ28
55 VSS20 DQ28 56
DDRA_SDQ25 DQ24 DQ29
59 DQ25 VSS21 60
61 62 DDRA_SDQS3#
VSS22 DQS#3 DDRA_SDQS3# 7
DDRA_SDM3 63 64 DDRA_SDQS3 +0.75VS +1.5V
65 VSS23 VSS24 66
DDRA_SDQ26 67 68 DDRA_SDQ30 0.1U_0402_16V4Z 1 2
DDRA_SDQ27 DQ26 DQ30 DDRA_SDQ31 C1106 0.1U_0402_16V4Z
69 DQ27 DQ31 70 2 2 1
71 VSS25 VSS26 72
C1077 C1078 C1079
1 1 2
DDRA_CKE0 73 74 DDRA_CKE1 0.1U_0402_16V4Z 4.7U_0603_6.3V6K
7 DDRA_CKE0 CKE0 CKE1 DDRA_CKE1 7
75 VDD1 VDD2 76
77 78 DDRA_SMA15
2 DDRA_SBS2# NC1 A15 DDRA_SMA14 2
7 DDRA_SBS2# 79 BA2 A14 80
81 VDD3 VDD4 82
DDRA_SMA12 83 84 DDRA_SMA11
DDRA_SMA9 A12/BC# A11 DDRA_SMA7
85 A9 A7 86
87 VDD5 VDD6 88
DDRA_SMA8 89 90 DDRA_SMA6
DDRA_SMA5 A8 A6 DDRA_SMA4
91 A5 A4 92
93 VDD7 VDD8 94
DDRA_SMA3 95 96 DDRA_SMA2 +VREF_CA +1.5V
DDRA_SMA1 A3 A2 DDRA_SMA0 +VREF_DQA +1.5V
97 A1 A0 98
99 VDD9 VDD10 100
2
7 DDRA_CLK0
DDRA_CLK0 101 CK0 CK1 102 DDRA_CLK1
DDRA_CLK1 7 L +VREF_CA 15mil
2
DDRA_CLK0# 103 104 DDRA_CLK1# R640
7 DDRA_CLK0# CK0# CK1# DDRA_CLK1# 7
DDRA_SMA10
105 VDD11 VDD12 106
DDRA_SBS1# L +VREF_DQ 15mil R639
1K_0402_1%
1K_0402_1%
107 A10/AP BA1 108 DDRA_SBS1# 7
7 DDRA_SBS0#
DDRA_SBS0# 109 110 DDRA_SRAS#
DDRA_SRAS# 7 15mil
1
BA0 RAS# +VREF_CA
111 112
1
DDRA_SWE# VDD13 VDD14 DDRA_SCS0# +VREF_DQA
7 DDRA_SWE# 113 WE# S0# 114 DDRA_SCS0# 7
1000P_0402_50V7K
0.1U_0402_16V4Z
DDRA_SCAS# 115 116 DDRA_ODT0
7 DDRA_SCAS# CAS# ODT0 DDRA_ODT0 7
1000P_0402_50V7K
4.7U_0603_6.3V6K
0.1U_0402_16V4Z
117 VDD15 VDD16 118
4.7U_0603_6.3V6K
DDRA_SMA13 119 120 DDRA_ODT1 1 1 1
A13 ODT1 DDRA_ODT1 7
2
DDRA_SCS1# 121 122 1 1 1 @ C1064 C1065
7 DDRA_SCS1# S1# NC2
C1063
123 124 @ R642
VDD17 VDD18
C1060
125 126 +VREF_CA R641 1K_0402_1%
NCTEST VREF_CA 1K_0402_1% 2 2 2
127 VSS27 VSS28 128
2 2 2
L +VREF_CA 15mil
1
131 132 1
1
DQ33 DQ37 C1066
133 VSS29 VSS30 134
DDRA_SDQS4# 135 136 DDRA_SDM4 C1061 C1062
DDRA_SDQS4 137 138 1000P_0402_50V7K
7 DDRA_SDQS4 DQS4 VSS31 2
139 140 DDRA_SDQ38
DDRA_SDQ34 VSS32 DQ38 DDRA_SDQ39
141 DQ34 DQ39 142
3 DDRA_SDQ35 3
143 DQ35 VSS33 144
145 146 DDRA_SDQ44
147 DQ40 DQ45 148
DDRA_SDQ41 149 150
DQ41 VSS35 DDRA_SDQS5#
151 VSS36 DQS#5 152 DDRA_SDQS5# 7
DDRA_SDM5 153 154 DDRA_SDQS5
155 VSS37 VSS38 156
159 DQ43 DQ47 160
161 VSS39 VSS40 162
165 DQ49 DQ53 166
167 VSS41 VSS42 168
DDRA_SDQS6# 169 170 DDRA_SDM6
DDRA_SDQS6 171 172
7 DDRA_SDQS6 DQS6 VSS43
173 174 DDRA_SDQ54
175 DQ50 DQ55 176
DDRA_SDQ51 177 178
DQ51 VSS45 DDRA_SDQ60
179 VSS46 DQ60 180
DDRA_SDQ57 DQ56 DQ61
183 DQ57 VSS47 184
185 186 DDRA_SDQS7#
VSS48 DQS#7 DDRA_SDQS7# 7
DDRA_SDM7 187 188 DDRA_SDQS7
189 VSS49 VSS50 190
193 DQ59 DQ63 194
R643 10K_0402_5% 195 196
VSS51 VSS52 MEM_MA_EVENT#
1 2 197 SA0 EVENT# 198 MEM_MA_EVENT# 7
+3VS 199 200
+3VS VDDSPD SDA FCH_SDATA0 12,27,32
201 SA1 SCL 202 FCH_SCLK0 12,27,32
203 VTT1 VTT2 204 +0.75VS
1
4 R645 4
1 1 205 G1 G2 206
C1080 C1081 10K_0402_5% LCN_DAN06-K4406-0102

2.2U_0603_6.3V4Z 0.1U_0402_16V4Z
2
2 2

DIMM_A REV H:4mm 2011/07/08 2015/07/08
Issued Date Title
Deciphered Date
<Address: 00> AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
Rev
A
4019I5
A B C D E
A B C D E
+VREF_DQB +1.5V +1.5V
JDIMM2
L +VREF_DQ 15mil 1 VREF_DQ VSS1 2

DDRB_SDQ4 DDRB_SDQ[0..63]
3 VSS2 DQ4 4 DDRB_SDQ[0..63] 7
DDRB_SDQ0 5 6 DDRB_SDQ5
DDRB_SDQ1 DQ0 DQ5 DDRB_SDM[0..7]
7 DQ1 VSS3 8 DDRB_SDM[0..7] 7
9 10 DDRB_SDQS0#
VSS4 DQS#0 DDRB_SDQS0# 7 DDRB_SMA[0..15]
DDRB_SDM0 11 12 DDRB_SDQS0 DDRB_SMA[0..15] 7
DM0 DQS0 DDRB_SDQS0 7
13 VSS5 VSS6 14
DDRB_SDQ3 DQ2 DQ6 DDRB_SDQ7
17 DQ3 DQ7 18
19 VSS7 VSS8 20
1 DDRB_SDQ8 DDRB_SDQ12 1
21 DQ8 DQ12 22
DQ9 DQ13
25 VSS9 VSS10 26
DDRB_SDQS1# 27 28 DDRB_SDM1
7 DDRB_SDQS1# DQS#1 DM1
DDRB_SDQS1 29 30 MEM_MB_RST#
7 DDRB_SDQS1 DQS1 RESET# MEM_MB_RST# 7
31 VSS11 VSS12 32
35 DQ11 DQ15 36
37 VSS13 VSS14 38
41 DQ17 DQ21 42
DDRB_SDQS2#
43 VSS15 VSS16 44
DDRB_SDM2
Place near DIMM2
7 DDRB_SDQS2# 45 DQS#2 DM2 46
DDRB_SDQS2 47 48
7 DDRB_SDQS2 DQS2 VSS17
49 50 DDRB_SDQ22 +1.5V
DDRB_SDQ18 VSS18 DQ22 DDRB_SDQ23
51 DQ18 DQ23 52
DDRB_SDQ19 53 54 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
DQ19 VSS19 DDRB_SDQ28
55 VSS20 DQ28 56 2 2 2 2 2 2 2 2 2 2
DDRB_SDQ25 DQ24 DQ29 C1089 C1090 C1091 C1092 C1093 C1094 C1095 C1096 C1097 C1098
59 DQ25 VSS21 60
61 62 DDRB_SDQS3#
VSS22 DQS#3 DDRB_SDQS3# 7 1 1 1 1 1 1 1 1 1 1
DDRB_SDM3 63 64 DDRB_SDQS3
65 66 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
DDRB_SDQ26 VSS23 VSS24 DDRB_SDQ30
67 DQ26 DQ30 68
DQ27 DQ31
71 VSS25 VSS26 72
+0.75VS +1.5V +1.5V

DDRB_CKE0 73 74 DDRB_CKE1
7 DDRB_CKE0 CKE0 CKE1 DDRB_CKE1 7
75 76 0.1U_0402_16V4Z 1 2 1
VDD1 VDD2 DDRB_SMA15 C1107 0.1U_0402_16V4Z
77 NC1 A15 78 2 2 1
2 DDRB_SBS2# 79 80 DDRB_SMA14 + @ 2
7 DDRB_SBS2# BA2 A14
81 82 C1099 C1100 C1101 C9
DDRB_SMA12 VDD3 VDD4 DDRB_SMA11 330U_D2_2V_Y
83 A12/BC# A11 84
DDRB_SMA9 DDRB_SMA7 1 1 2 2
85 A9 A7 86
87 88 0.1U_0402_16V4Z 4.7U_0603_6.3V6K Change To D2 Type 20110905
DDRB_SMA8 VDD5 VDD6 DDRB_SMA6
89 A8 A6 90
DDRB_SMA5 91 92 DDRB_SMA4
A5 A4
93 VDD7 VDD8 94
DDRB_SMA3 95 96 DDRB_SMA2
DDRB_SMA1 A3 A2 DDRB_SMA0
97 A1 A0 98
99 VDD9 VDD10 100
DDRB_CLK0 101 102 DDRB_CLK1
7 DDRB_CLK0 CK0 CK1 DDRB_CLK1 7
DDRB_CLK0# 103 104 DDRB_CLK1#
7 DDRB_CLK0# CK0# CK1# DDRB_CLK1# 7
105 VDD11 VDD12 106
DDRB_SMA10 107 108 DDRB_SBS1#
A10/AP BA1 DDRB_SBS1# 7
DDRB_SBS0# 109 110 DDRB_SRAS#
7 DDRB_SBS0# BA0 RAS# DDRB_SRAS# 7 +1.5V +1.5V
111 VDD13 VDD14 112
DDRB_SWE# 113 114 DDRB_SCS0#
7 DDRB_SWE# WE# S0# DDRB_SCS0# 7
DDRB_SCAS# 115 116 DDRB_ODT0
7 DDRB_SCAS# CAS# ODT0 DDRB_ODT0 7
2
DDRB_SMA13
117 VDD15 VDD16 118
DDRB_ODT1 R649 L +VREF_CA 15mil R647
119 A13 ODT1 120 DDRB_ODT1 7 +VREF_DQB +VREF_CB
7 DDRB_SCS1#
DDRB_SCS1# 121 S1# NC2 122
L +VREF_DQ 15mil 1K_0402_1% 1K_0402_1%
123 VDD17 VDD18 124 15mil
125 126 +VREF_CB
L +VREF_CA 15mil
1
NCTEST VREF_CA +VREF_DQB +VREF_CB
127 VSS27 VSS28 128
DQ32 DQ36
1000P_0402_50V7K
1000P_0402_50V7K
DDRB_SDQ33 131 132 DDRB_SDQ37 1
DQ33 DQ37
4.7U_0603_6.3V6K
0.1U_0402_16V4Z
4.7U_0603_6.3V6K
0.1U_0402_16V4Z
133 134 C1088
DDRB_SDQS4# VSS29 VSS30 DDRB_SDM4 1000P_0402_50V7K
7 DDRB_SDQS4# 135 DQS#4 DM4 136 1 1 1 1 1 1
2
DDRB_SDQS4 137 138 C1083 C1084 C1086 C1087
7 DDRB_SDQS4 DQS4 VSS31 2
C1082
C1085
139 140 DDRB_SDQ38 R650 R644
DDRB_SDQ34 VSS32 DQ38 DDRB_SDQ39 1K_0402_1% 1K_0402_1%
141 DQ34 DQ39 142
3 DDRB_SDQ35 2 2 2 2 2 2 3
143 DQ35 VSS33 144
145 146 DDRB_SDQ44
1
147 DQ40 DQ45 148
DDRB_SDQ41 149 150
DQ41 VSS35 DDRB_SDQS5#
151 VSS36 DQS#5 152 DDRB_SDQS5# 7
155 VSS37 VSS38 156
159 DQ43 DQ47 160
161 VSS39 VSS40 162
165 DQ49 DQ53 166
167 VSS41 VSS42 168
DDRB_SDQS6# 169 170 DDRB_SDM6
7 DDRB_SDQS6# DQS#6 DM6
DDRB_SDQS6 171 172
7 DDRB_SDQS6 DQS6 VSS43
173 174 DDRB_SDQ54
175 DQ50 DQ55 176
DDRB_SDQ51 177 178
DQ51 VSS45 DDRB_SDQ60
179 VSS46 DQ60 180
DDRB_SDQ57 DQ56 DQ61
183 DQ57 VSS47 184
185 186 DDRB_SDQS7#
VSS48 DQS#7 DDRB_SDQS7# 7
189 VSS49 VSS50 190
193 DQ59 DQ63 194
R646 10K_0402_5% 195 196
VSS51 VSS52 MEM_MB_EVENT#
1 2 197 SA0 EVENT# 198 MEM_MB_EVENT# 7
+3VS 199 VDDSPD SDA 200 FCH_SDATA0 11,27,32
201 SA1 SCL 202 FCH_SCLK0 11,27,32
203 VTT1 VTT2 204 +0.75VS
1
4 R648 4
205 G1 G2 206
10K_0402_5% LCN_DAN06-K4406-0102
2

DIMM_B REV H:8mm 2011/07/08 2015/07/08
Issued Date Title
Deciphered Date
<Address: 01> AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
Rev
A
4019I5
A B C D E
5 4 3 2 1
LVDS Interface
UVG1G
PCIE_FTX_C_GRX_P[15..0] PCIE_GTX_C_FRX_P[0..15] PART 7 0F 9

6 PCIE_FTX_C_GRX_P[15..0] PCIE_GTX_C_FRX_P[0..15] 6
PCIE_FTX_C_GRX_N[15..0] PCIE_GTX_C_FRX_N[0..15] VARY_BL AK27
6 PCIE_FTX_C_GRX_N[15..0] PCIE_GTX_C_FRX_N[0..15] 6
LVDS CONTROL DIGON AJ27
UVG1A
PART 1 0F 9
D
TXCLK_UP_DPF3P AK35 D
TXCLK_UN_DPF3N AL36
PCIE_FTX_C_GRX_P0 AA38 PCIE_RX0P PCIE_TX0P Y33 PCIE_GTX_FRX_P0 .1U_0402_16V7K 2 1 CV1 PX@ PCIE_GTX_C_FRX_P0 TXOUT_U0P_DPF2P AJ38
PCIE_FTX_C_GRX_N0 Y37 PCIE_RX0N PCIE_TX0N Y32 PCIE_GTX_FRX_N0 .1U_0402_16V7K 2 1 CV2 PX@ PCIE_GTX_C_FRX_N0 TXOUT_U0N_DPF2N AK37
TXOUT_U1P_DPF1P AH35
PCIE_FTX_C_GRX_P1 Y35 PCIE_RX1P PCIE_TX1P W33 PCIE_GTX_FRX_P1 .1U_0402_16V7K 2 1 CV3 PX@ PCIE_GTX_C_FRX_P1 TXOUT_U1N_DPF1N AJ36
PCIE_FTX_C_GRX_N1 W36 PCIE_RX1N PCIE_TX1N W32 PCIE_GTX_FRX_N1 .1U_0402_16V7K 2 1 CV4 PX@ PCIE_GTX_C_FRX_N1
TXOUT_U2P_DPF0P AG38
TXOUT_U2N_DPF0N AH37
PCIE_FTX_C_GRX_P2 W38 PCIE_RX2P PCIE_TX2P U33 PCIE_GTX_FRX_P2 .1U_0402_16V7K 2 1 CV5 PX@ PCIE_GTX_C_FRX_P2
PCIE_FTX_C_GRX_N2 V37 PCIE_RX2N PCIE_TX2N U32 PCIE_GTX_FRX_N2 .1U_0402_16V7K 2 1 CV6 PX@ PCIE_GTX_C_FRX_N2 TXOUT_U3P AF35
TXOUT_U3N AG36
LVTMDP
PCIE_FTX_C_GRX_P3 V35 PCIE_RX3P PCIE_TX3P U30 PCIE_GTX_FRX_P3 .1U_0402_16V7K 2 1 CV7 PX@ PCIE_GTX_C_FRX_P3
PCIE_FTX_C_GRX_N3 U36 PCIE_RX3N PCIE_TX3N U29 PCIE_GTX_FRX_N3 .1U_0402_16V7K 2 1 CV8 PX@ PCIE_GTX_C_FRX_N3
TXCLK_LP_DPE3P AP34
PCIE_FTX_C_GRX_P4 U38 PCIE_RX4P PCIE_TX4P T33 PCIE_GTX_FRX_P4 .1U_0402_16V7K 2 1 CV9 PX@ PCIE_GTX_C_FRX_P4 TXCLK_LN_DPE3N AR34
PCIE_FTX_C_GRX_N4 T37 PCIE_RX4N PCIE_TX4N T32 PCIE_GTX_FRX_N4 .1U_0402_16V7K 2 1 CV10 PX@ PCIE_GTX_C_FRX_N4
TXOUT_L0P_DPE2P AW37
TXOUT_L0N_DPE2N AU35
PCIE_FTX_C_GRX_P5 T35 PCIE_RX5P PCIE_TX5P T30 PCIE_GTX_FRX_P5 .1U_0402_16V7K 2 1 CV11 PX@ PCIE_GTX_C_FRX_P5
PCIE_FTX_C_GRX_N5 R36 PCIE_RX5N PCIE_TX5N T29 PCIE_GTX_FRX_N5 .1U_0402_16V7K 2 1 CV12 PX@ PCIE_GTX_C_FRX_N5 TXOUT_L1P_DPE1P AR37
TXOUT_L1N_DPE1N AU39
PCIE_FTX_C_GRX_P6 R38 PCIE_RX6P PCIE_TX6P P33 PCIE_GTX_FRX_P6 .1U_0402_16V7K 2 1 CV13 PX@ PCIE_GTX_C_FRX_P6 TXOUT_L2P_DPE0P AP35
PCIE_FTX_C_GRX_N6 P37 PCIE_RX6N PCIE_TX6N P32 PCIE_GTX_FRX_N6 .1U_0402_16V7K 2 1 CV14 PX@ PCIE_GTX_C_FRX_N6 TXOUT_L2N_DPE0N AR35
TXOUT_L3P AN36
PCIE_FTX_C_GRX_P7 P35 PCIE_RX7P PCIE_TX7P P30 PCIE_GTX_FRX_P7 .1U_0402_16V7K 2 1 CV15 PX@ PCIE_GTX_C_FRX_P7 TXOUT_L3N AP37
PCIE_FTX_C_GRX_N7 N36 PCIE_RX7N PCIE_TX7N P29 PCIE_GTX_FRX_N7 .1U_0402_16V7K 2 1 CV16 PX@ PCIE_GTX_C_FRX_N7
+1.8VGS
PCIE_FTX_C_GRX_P8 N38 PCIE_RX8P PCIE_TX8P N33 PCIE_GTX_FRX_P8 .1U_0402_16V7K 2 1 CV17 PX@ PCIE_GTX_C_FRX_P8
PCIE_FTX_C_GRX_N8 M37 PCIE_RX8N PCIE_TX8N N32 PCIE_GTX_FRX_N8 .1U_0402_16V7K 2 1 CV18 PX@ PCIE_GTX_C_FRX_N8 PX@ RV143 75mA +DPLL_PVDD
PX@ 2160834000A10CHELSE_FCBGA962
1 2
C C
CV40
CV41
CV42
PCIE_FTX_C_GRX_P9 N30 PCIE_GTX_FRX_P9 PCIE_GTX_C_FRX_P9
10U_0603_6.3V6M
.1U_0402_16V7K 1 CV19 PX@ 0_0402_5%
1U_0402_6.3V6K
0.1U_0402_16V7K
M35 PCIE_RX9P PCIE_TX9P 2
PCIE_FTX_C_GRX_N9 L36 PCIE_RX9N PCIE_TX9N N29 PCIE_GTX_FRX_N9 .1U_0402_16V7K 2 1 CV20 PX@ PCIE_GTX_C_FRX_N9 1 1 1
PCI EXPRESS INTERFACE
PCIE_FTX_C_GRX_P10 L38 PCIE_RX10P PCIE_TX10P L33 PCIE_GTX_FRX_P10 .1U_0402_16V7K 2 1 CV21 PX@ PCIE_GTX_C_FRX_P10
2 2 2
PX@
PX@
PX@
PCIE_FTX_C_GRX_N10 K37 PCIE_RX10N PCIE_TX10N L32 PCIE_GTX_FRX_N10 .1U_0402_16V7K 2 1 CV22 PX@ PCIE_GTX_C_FRX_N10
UVG1I
PCIE_FTX_C_GRX_P11 K35 PCIE_RX11P PCIE_TX11P L30 PCIE_GTX_FRX_P11 .1U_0402_16V7K 2 1 CV23 PX@ PCIE_GTX_C_FRX_P11
PCIE_FTX_C_GRX_N11 J36 PCIE_RX11N PCIE_TX11N L29 PCIE_GTX_FRX_N11 .1U_0402_16V7K 2 1 CV24 PX@ PCIE_GTX_C_FRX_N11
PART 9 0F 9
PCIE_FTX_C_GRX_P12 J38 PCIE_RX12P PCIE_TX12P K33 PCIE_GTX_FRX_P12 .1U_0402_16V7K 2 1 CV25 PX@ PCIE_GTX_C_FRX_P12
PCIE_FTX_C_GRX_N12 H37 PCIE_RX12N PCIE_TX12N K32 PCIE_GTX_FRX_N12 .1U_0402_16V7K 2 1 CV26 PX@ PCIE_GTX_C_FRX_N12
12/05 0.935V for Chelsea, and 1.0V for Thames +DPLL_PVDD AM32 DPLL_PVDD XTALIN AV33 XTALIN
PCIE_FTX_C_GRX_P13 H35 PCIE_RX13P PCIE_TX13P J33 PCIE_GTX_FRX_P13 .1U_0402_16V7K 2 1 CV27 PX@ PCIE_GTX_C_FRX_P13
PCIE_FTX_C_GRX_N13 G36 PCIE_RX13N PCIE_TX13N J32 PCIE_GTX_FRX_N13 .1U_0402_16V7K 2 1 CV28 PX@ PCIE_GTX_C_FRX_N13 BOM control from Power circuit. +DPLL_VDDC AN31 DPLL_VDDC
PCIE_FTX_C_GRX_P14 G38 PCIE_RX14P PCIE_TX14P K30 PCIE_GTX_FRX_P14 .1U_0402_16V7K 2 1 CV29 PX@ PCIE_GTX_C_FRX_P14 +0.935VGS AN32 DPLL_PVSS
PCIE_FTX_C_GRX_N14 F37 PCIE_RX14N PCIE_TX14N K29 PCIE_GTX_FRX_N14 .1U_0402_16V7K 2 1 CV30 PX@ PCIE_GTX_C_FRX_N14 PX@RV144
PX@ RV144 125mA +DPLL_VDDC XTALOUT
1 2 XTALOUT AU34
CV43
CV44
CV45
PCIE_FTX_C_GRX_P15 H33 PCIE_GTX_FRX_P15 .1U_0402_16V7K PCIE_GTX_C_FRX_P15
10U_0603_6.3V6M
1 CV31 PX@ 0_0402_5%
1U_0402_6.3V6K
0.1U_0402_16V7K
F35 PCIE_RX15P PCIE_TX15P 2
PCIE_FTX_C_GRX_N15 E37 PCIE_RX15N PCIE_TX15N H32 PCIE_GTX_FRX_N15 .1U_0402_16V7K 2 1 CV32 PX@ PCIE_GTX_C_FRX_N15 1 1 1
+MPV18 H7 MPLL_PVDD <SI>RV146 and RV147 @-->SMT
H8 MPLL_PVDD
RV146
2 2 2
PX@
PX@
PX@
CLOCK XO_IN AW34 2 1
AB35 PCIE_REFCLKP 0_0402_5%
25 CLK_PEG_VGA
AA36 PCIE_REFCLKN Che@ +SPV18 AM10 SPLL_PVDD
25 CLK_PEG_VGA#
PLLS/XTAL
1.69K_0402_1% 1 2 RV29 For Chelsea only
+0.935VGS
CALIBRATION +1.8VGS RV147
PCIE_CALR_TX Y30 1.27K_0402_1% 1 Tha@ 2 RV3 For Chelsea non staff LV9 PX@ +SPV10 AN9 SPLL_VDDC XO_IN2 AW35 2 1
PX@ 1 2 +MPV18 0_0402_5%
B B
RV4 2 1 AH16 TEST_PG PCIE_CALR_RX Y29 2K_0402_1% 1 Tha@ 2 RV5 +0.935VGS MCK1608471YZF 0603
1K_0402_5%
CV149
CV150
CV151
10U_0603_6.3V6M
1U_0402_6.3V6K
0.1U_0402_16V7K
AN10 SPLL_PVSS
GPU_RST# AA30 PERSTB RV5 Che@ 1 1 1
12/05 0.935V for Chelsea, and 1.0V for Thames
1
PX@ PX@ 1K_1% BOM control from Power circuit. @ RV141 0_0402_5% CLKTESTA AK10
2160834000A10CHELSE_FCBGA962 2 2 2
PX@
PX@
PX@
RV6 +DPLL_PVDD 2 1AF30 NC_XTAL_PVDD CLKTESTB AL10
100K_0402_5% 2 1AF31 NC_XTAL_PVSS
11/29 Add option for Chelsea and Thames @ RV148 0_0402_5%
2
+1.8VGS
LV10PX@
1 2 +SPV18 PX@ 2160834000A10CHELSE_FCBGA962
BLM15BD121SN1D_0402
CV152
CV153
CV154
10U_0603_6.3V6M
RV1 @ 1 0_0402_5%
1U_0402_6.3V6K
0.1U_0402_16V7K
2
1 1 1
1M_0402_5%
1
+3VGS XTALOUT RV28 PX@ XTALIN @ @
CV170 CV171
2 2 2
PX@
PX@
PX@
27MHZ_16PF_7V27000011 YV2 PX@ 0.1U_0402_16V7K 0.1U_0402_16V7K
2
5
UV1 3 1
3 1
2
P
25,27 PX_GPU_RST# B
1
GPU_RST# GND GND
Y 4
1 12/05 0.935V for Chelsea, and 1.0V for Thames @ @
10,21,25,31,32 APU_PCIE_RST# A
G
PX@ CV49 4 2 CV50 PX@ RV69 RV70

PX@ BOM control from Power circuit. 18P_0402_50V8J 18P_0402_50V8J 51.1_0402_1% 51.1_0402_1%
3
MC74VHC1G08DFT2G SC70 5P
2
+0.935VGS
LV11 PX@
1 2 +SPV10
MCK1608471YZF 0603 <SI>YV2 change to standard part 3.2*2.5
route 50ohms single-ended/100ohms diff
CV166
CV168
CV169
10U_0603_6.3V6M
1U_0402_6.3V6K
0.1U_0402_16V7K
A and keep short A

1 1 1 Debug only, for clock observation, if not needed, DNI
5mil 5mil
2 2 2
PX@
PX@
PX@

C A
4019I5
5 4 3 2 1
5 4 3 2 1
CONFIGURATION STRAPS RECOMMENDED SETTINGS
UVG1B ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE 0= DO NOT INSTALL RESISTOR
1 = INSTALL 10K RESISTOR
PART 2 0F 9 GPIOS ARE USED, THEY MUST NOT CONFLICT DURING RESET X = DESIGN DEPENDANT
NA = NOT APPLICABLE
T53 GENLK_CLK AD29

MUTI GFX
GENLK_CLK TXCAP_DPA3P AU24 STRAPS PCIE1.0:RV9 SMT-->@
T54 GENLK_VSYNC AC29 GENLK_VSYNC TXCAM_DPA3N AV23 +3VGS RECOMMENDED
PCIE2.0:RV9 SMT-->PX@ STRAPS PIN DESCRIPTION OF DEFAULT SETTINGS <all internal PD> SETTINGS
TX0P_DPA2P AT25
AJ21 SWAPLOCKA TX0M_DPA2N AR24 10K_0402_5% 1 @ 2 RV7 GPU_GPIO0 0: 50% swing
DPA
AK21 SWAPLOCKB 10K_0402_5% 1 PX@ 2 RV8 GPU_GPIO1 TX_PWRS_ENB GPIO0 PCIE TRANSMITTER Power Saving Enable 1: Full swing X
TX1P_DPA1P AU26 10K_0402_5% 1 PX@ 2 RV9 GPU_GPIO2
TX1M_DPA1N AV25 R1.0 0: disable
TX_DEEMPH_EN GPIO1 PCIE TRANSMITTER DE-EMPHASIS 1: enable X
AR8 DVPCNTL_MVP_0 TX2P_DPA0P AT27 100K_0402_5% 1 @ 2 RV10 GPU_GPIO5
AU8 DVPCNTL_MVP_1 TX2M_DPA0N AR26 10K_0402_5% 1 @ 2 RV31 GPIO21_BBEN 0: 2.5GT/s
D 1: 5GT/s D
AP8 DVPCNTL_0 10K_0402_5% 1 @ 2 RV32 GPIO22_ROMCSB RSVD GPIO2 Advertises PCIE speed when compliance test 0
AW8 DVPCNTL_1 TXCBP_DPB3P AR30 10K_0402_5% 1 @ 2 RV11 GPU_GPIO8
AR3 DVPCNTL_2 TXCBM_DPB3N AT29 10K_0402_5% 1 @ 2 RV12 GPU_GPIO9
AR1 DVPCLK RSVD GPIO8 0
AU1 DVPDATA_0 TX3P_DPB2P AV31 10K_0402_5% 1 PX@ 2 RV13GPU_GPIO11
16 VRAM_ID0
10K_0402_5% @ RV15GPU_VID1 Internal use only.This Pad has an internal PD and Must be 0V at reset.
VRAM ID 16
16
VRAM_ID1
VRAM_ID2
AU3
AW3
DVPDATA_1
DVPDATA_2
DPB
TX3M_DPB2N AU30
10K_0402_5%
1
1 @
2
2 RV16GPU_GPIO13 RSVD H2SYNC The pad may be left unconnected. 0
AP6 DVPDATA_3 TX4P_DPB1P AR32
AW5 DVPDATA_4 TX4M_DPB1N AT31 +3VGS
AU5 DVPDATA_5 RSVD GPIO21 0
AR6 DVPDATA_6 TX5P_DPB0P AT33 10K_0402_5% 1 @ 2 RV18 GPIO24_TRSTB
AW6 DVPDATA_7 TX5M_DPB0N AU32 10K_0402_5% 1 @ 2 RV19 GPIO25_TDI 0: disable
AU6 DVPDATA_8 10K_0402_5% 1 @ 2 RV20 GPIO27_TMS BIOS_ROM_EN GPIO_22_ROMCSB ENABLE EXTERNAL BIOS ROM 1: enable X
AT7 DVPDATA_9 TXCCP_DPC3P AU14
AV7 DVPDATA_10 TXCCM_DPC3N AV13 10K_0402_5% 1 @ 2 RV21 GPIO26_TCK
AN7 DVPDATA_11 ROMIDCFG(2:0) GPIO[13:11] SERIAL ROM TYPE OR MEMORY APERTURE SIZE SELECT XXX
AV9 DVPDATA_12 TX0P_DPC2P AT15
AT9 DVPDATA_13 TX0M_DPC2N AR14 GPIO13,12,11(config 2,1,0): internal PD.
AR10 DVPDATA_14 a)If BIOS_ROM_EN=1,the config[2:0] defines the ROM type. Memory apertures
DPC config[3:0]
AW10 DVPDATA_15 TX1P_DPC1P AU16 b)If BIOS_ROM_EN=0,the config[2:0] defines the primary aperture size.
AU10 DVPDATA_16 TX1M_DPC1N AV15 128MB 000
AP10 DVPDATA_17 256MB 001
AV11 DVPDATA_18 TX2P_DPC0P AT17 64MB 010
AT11 DVPDATA_19 TX2M_DPC0N AR16
AR12 DVPDATA_20 VIP_DEVICE_STRAP_ENA V2SYNC IGNORE VIP DEVICE STRAPS 0
AW12 DVPDATA_21 TXCDP_DPD3P AU20
AU12 DVPDATA_22 TXCDM_DPD3N AT19
AP12 DVPDATA_23 BIF_VGA DIS GPIO9 VGA ENABLED 0
TX3P_DPD2P AT21
TX3M_DPD2N AR20
RSVD GENERICC 0
DPD
VGA_SMB_CK2 AJ23 SMBCLK TX4P_DPD1P AU22
SMBus
VGA_SMB_DA2 AH23 SMBDATA TX4M_DPD1N AV21 AUD[1] AUD[0]
AUD[1] HSYNC 0 0 No audio function
TX5P_DPD0P AT23 0 1 Audio for DisplayPort and HDMI if dongle is detected 11
TX5M_DPD0N AR22 1 0 Audio for DisplayPort only
AK26 SCL AUD[0] VSYNC 1 1 Audio for both DisplayPort and HDMI
I2C
C T66 AJ26 SDA C
T67
R AD39 T61 AMD RESERVED CONFIGURATION STRAPS
GPU_GPIO0
GENERAL PURPOSE I/O AVSSN#1 AD37 ALLOW FOR PULLUP PADS FOR THESE STRAPS BUT DO NOT INSTALL
AH20 GPIO_0
GPU_GPIO1 AH18 GPIO_1 G AE36 T62 RESISTOR. IF THESE GPIOS ARE USED, THEY MUST KEEP "LOW" AND
GPU_GPIO2 AN16 GPIO_2 AVSSN#2 AD35 NOT CONFLICT DURING RESET
RB751V_SOD323 B AF37 T63
37,42,47 ACIN
DV1 @ 1 2GPU_GPIO5 AH17 GPIO_5_AC_BATT AVSSN#3 AE38 GPIO21 H2SYNC GENERICC GPIO2 GPIO8
VDDCI_VID AJ17 GPIO_6
53 VDDCI_VID DAC1
AK17 GPIO_7_BLON HSYNC AC36 T64
1 2 GPU_GPIO8 AJ13 GPIO_8_ROMSO VSYNC AC38 T65
RV132 @ 10K_0402_5% GPU_GPIO9 AH15 GPIO_9_ROMSI Transmitter Power Saving Enable
AJ16 GPIO_10_ROMSCK
+1.8VGS TX_PWRS_ENB GPIO0 0: 50% Tx output swing for mobile mode
GPU_GPIO11 AK16 GPIO_11 RSET AB34 RV14 1 PX@ 2 499_0402_1% 1: full Tx output swing (Default setting for Desktop)
GPU_VID1 AL16 GPIO_12
56 GPU_VID1
GPU_GPIO13 AM16 GPIO_13 AVDD AD34 +AVDD (1.8V@65mA AVDD) 1 2 PCI Express Transmitter De-emphasis Enable
AM14 GPIO_14_HPD2 AVSSQ AE34 LV1 PX@ TX_DEEMPH_EN GPIO1 0: Tx de-emphasis diabled for mobile mode
1: Tx de-emphasis enabled (Defailt setting for desktop)
CV33
CV34
CV35
GPU_VID3
10U_0603_6.3V6M
BLM15BD121SN1D_0402
0.1U_0402_16V7K
1U_0402_6.3V6K
56 GPU_VID3 AM13 GPIO_15_PWRCNTL_0
GPU_VID2 AK14 GPIO_16 VDD1DI AC33 +VDD1DI (1.8V@100mA VDD1DI) 1 +1.8VGS 2 1 1 1
56 GPU_VID2
Base on AMD Check list AG30 GPIO_17_THERMAL_INT VSS1DI AC34 LV2 PX@
CV36
CV37
CV38
@ RV17 T60 10K_0402_5% BLM15BD121SN1D_0402
10U_0603_6.3V6M
0.1U_0402_16V7K
1U_0402_6.3V6K
GPIO_23_CLKREQB should be reserve AN14 GPIO_18_HPD3
1 2 GPIO_19_CTF AM17 GPIO_19_CTF 1 1 1 2 2 2
Internal VGA Thermal Sensor
PX@
PX@
PX@
GPU_VID4 AL13 GPIO_20_PWRCNTL_1 NC#1 V13 +3VGS
+3VGS 56 GPU_VID4
GPIO21_BBEN AJ14 GPIO_21 NC#2 U13
GPIO22_ROMCSB AK13 GPIO_22_ROMCSB NC#3 AC31
2 2 2
PX@
PX@
PX@
PEG_CLKREQ# AN13 CLKREQB NC#4 AD30
1
NC#5 AC32 +3VGS
2
NC#6 AD32
@ RV131 AG32 GPIO_29 NC#7 AF32 PX@RV22
PX@ RV22 PX@RV23
PX@RV23
10K_0402_5% AG33 GPIO_30 NC#8 AA29 12/5 Reserve for MLPS 100K_0402_5% 100K_0402_5%
NC#9 AG21 Tha@ +VDDCI
2
2
AJ19 GENERICA RV42 1 20_0402_5%
1
PEG_CLKREQ# AK19 GENERICB <SI> add RV42 -->0 ohm +VDDC_CT +VDDC_CT
AJ20 GENERICC VGA_SMB_CK2 1 6 EC_SMB_CK2 21,35,37,8
AK20 GENERICD Tha@ RV142
5
QV1A PX@
0.082U_16V_0402 0.082U_16V_0402
0.082U_16V_0402 0.082U_16V_0402
AJ24 GENERICE_HPD4 NC_TSVSSQ AF33 1 2
1
B B
8.45K_0402_1%
8.45K_0402_1%
AH26 GENERICF_HPD5 0_0402_5% 1 1 DMN66D0LDW-7_SOT363-6
@ RV152
@CV51
@ RV154
@CV53
AH24 GENERICG_HPD6 VGA_SMB_DA2 4 3 EC_SMB_DA2 21,35,37,8
Tha@ RV140
PS_0 AM34 PS_0 2 1 QV1B PX@
0_0402_5% 2 2 DMN66D0LDW-7_SOT363-6
2
AC30 CEC_1 For Chelsea non staff PS_0 PS_1
1
AK24 HPD1 PS_1 AD31 PS_1
MLPS
2K_0402_1%
2K_0402_1%
1 1
@CV52
@CV54
@ RV153
@ RV155
+1.8VGS @ 1 RV24 2 0_0402_5%
PX@
2 RV25 1 499_0402_1% +VREFG_GPU AH13 VREFG PS_2 AG31 PS_2
2
PX@ 2 2 @ 1 RV27 2 0_0402_5%
2 RV26 1 249_0402_1%
BACO
2 1 AL21 PX_EN PS_3 AD33 PS_3
CV39 0.1U_0402_16V7K
PX@
+3VGS 12/5 Reserve for MLPS
DEBUG DDC/AUX
RV149 1 2 5.11K_0402_5%
@
DDC1CLK
DDC1DATA
AM26
AN26
Use Internal Thermal Sensor <SI> BOM thermal IC and part SMT-->@
+VDDC_CT +VDDC_CT
RV66 1 2
PX@ 5.11K_0402_1%
TESTEN AD28 TESTEN
AUX1P AM27
External VGA Thermal Sensor: Need stuff
<SI>BOM RV66 1K-->5.11K AUX1N AL27
.01U_0402_16V7K .01U_0402_16V7K
.68U_6.3V_0402
1
1
0_0402_5%
0_0402_5%
GPIO24_TRSTB AM23 JTAG_TRSTB DDC2CLK AM19 1 1
RV156
@CV55
RV158
CV110
GPIO25_TDI AN23 JTAG_TDI DDC2DATA AL19
GPIO26_TCK AK23 JTAG_TCK
GPIO27_TMS AL24 JTAG_TMS AUX2P AN20
T52 GPIO28_TDO @ 2 @ @ 2 @ +3VGS
AM24 JTAG_TDO AUX2N AM20
2
PS_2 PS_3 UV13

DDCCLK_AUX3P AL30 2 1 1 8 VGA_SMB_CK2
VDD SCLK
1
CV271 0.1U_0402_16V4Z
.68U_6.3V_0402
DDCDATA_AUX3N AM30
THERM_D+ VGA_SMB_DA2
4.75K_0402_1%
4.75K_0402_1%
12/05 Add PD for GPIO_28 THERMAL 1 1 2 D+ SDATA 7

RV157
CV109
RV159
CV111
DDCCLK_AUX4P AL29 CV272

Thames PH THERM_D+ AF29 DPLUS DDCDATA_AUX4N AM29 1 2 @ 3 6 2 1
+3VGS D- ALERT# +3VGS
@
A Chelsea PD THERM_D- AG29 DMINUS THERM_D- @ RV134 2.2K_0402_5% A

2
@ 2 @ @ 2 2200P_0402_50V7K
DDCCLK_AUX5P AN21 4 THERM# GND 5
PX@ Tha@ RV30 DDCDATA_AUX5N AM21 +3VGS 2 1
LV5 1 2 GPIO_28_FDO AK32 GPIO_28_FDO
+1.8VGS 1 2 +TSVDD 10K_0402_5% DDCCLK_AUX6P AK30 @ RV133 2.2K_0402_5% ADM1032ARMZ-2REEL_MSOP8

10U_0603_6.3V6M
BLM15BD121SN1D_0402 Che@ RV33 @

1U_0402_6.3V6K
0.1U_0402_16V4Z
AL31 TS_A DDCDATA_AUX6N AK29

CV46
CV47
CV48
1 1 1 1 2
10K_0402_5% DDCVGACLK AJ30 T69
AJ32 TSVDD DDCVGADATA AJ31 T70
2 2 2
(1.8V@20mA TSVDD) AJ33 TSVSS

PX@
PX@
PX@
PX@ 2011/06/30 2013/06/30 Title

2160834000A10CHELSE_FCBGA962 Issued Date Deciphered Date
C A
4019I5
5 4 3 2 1
5 4 3 2 1
D D
GPU_Reset
PWREN
+3VALW
+3.3VS TO +3.3VGS +3VS +3VGS
1
J2 @
PX@ 2 1 10U_0603_6.3V6M 1U_0603_10V6K
RV35
1
100K_0402_5% 2MM 1 1
CV56 CV57 RV34 PX@
2
PX@ PX@ 470_0603_5%
PXS_PWREN#_R
2 2
3 1
2
+5VALW
QV16 PX@
3
AP2301GN-HF_SOT23-3
2
1
D PX@ PX@
PXS_PWREN 1 RV145 2 0_0402_5% PXS_PWREN_R 2 QV8 RV36 RV37 PX@
25,27,37,48,52,53,56 PXS_PWREN
PX@ G 2N7002K_SOT23-3 QV7B 5
S PX@ 20K_0402_5% 20K_0402_5%
3
DMN66D0LDW-7_SOT363-6
4
3
PXS_PWREN=FCH GPIO192=PE_GPIO1 1 PX@
CV58
PX@ 0.1U_0603_25V7K
PXS_PWREN_R 5 QV2B
2
DMN66D0LDW-7_SOT363-6 0_0402_5%
PXS_PWREN#_R 1 2
4
@ RV38
C C
Add +1.5VGS DC DC
+1.5V_PCIE TO +1.5VGS
+1.5V_PCIE +1.5VGS
J9 @
2 1
2MM
UV19 PX@
10U_0603_6.3V6M AO4430L_SO8
8 1 10U_0603_6.3V6M
1 7 2 1 1
1
CV59 6 3 CV60 CV61 PX@
PX@ 5 PX@ 1U_0603_10V6K RV39 PX@
470_0603_5%
2 2 2
4
B B
2
+VSB
6
RV40 PX@ PX@
20K_0402_5% QV7A 2
RV41 DMN66D0LDW-7_SOT363-6
1
1 PX@ 2
2
200K_0402_1% 1
6
RV43
0_0402_5% CV62 PX@
PX@ @ 0.1U_0603_25V7K
PXS_PWREN#_R QV2A 2
2
1
PXS_PWREN#_R 1 RV44 @2 0_0402_5%
1
12/01 change PXS_PWREN_R to PXS_PWREN#_R
A A

C A
4019I5
5 4 3 2 1
5 4 3 2 1
UVG1D
UVG1C
PART 4 0F 9
PART 3 0F 9 MDA[0..63] MDB[0..63]
19 MDA[0..63] 20 MDB[0..63] MDB0 GDDR5/DDR3
MAB0
GDDR5/DDR3 C5 DQB0_0 MAB0_0/MAB_0 P8
MDA0 C37 DQA0_0 MAA0_0/MAA_0 G24 MAA0 MDB1 C3 DQB0_1 MAB0_1/MAB_1 T9 MAB1
MDA1 C35 DQA0_1 MAA0_1/MAA_1 J23 MAA1 MAA[12..0] MAB[12..0] MDB2 E3 DQB0_2 MAB0_2/MAB_2 P9 MAB2
MAA[12..0] 19 MAB[12..0] 20
MDA2 A35 DQA0_2 MAA0_2/MAA_2 H24 MAA2 MDB3 E1 DQB0_3 MAB0_3/MAB_3 N7 MAB3
MDA3 E34 DQA0_3 MAA0_3/MAA_3 J24 MAA3 A_BA[2..0] B_BA[2..0] MDB4 F1 DQB0_4 MAB0_4/MAB_4 N8 MAB4
A_BA[2..0] 19 B_BA[2..0] 20
MDA4 G32 DQA0_4 MAA0_4/MAA_4 H26 MAA4 MDB5 F3 DQB0_5 MAB0_5/MAB_5 N9 MAB5
MDA5 D33 DQA0_5 MAA0_5/MAA_5 J26 MAA5 MDB6 F5 DQB0_6 MAB0_6/MAB_6 U9 MAB6
MDA6 F32 DQA0_6 MAA0_6/MAA_6 H21 MAA6 MDB7 G4 DQB0_7 MAB0_7/MAB_7 U8 MAB7
MDA7 E32 DQA0_7 MAA0_7/MAA_7 G21 MAA7 MDB8 H5 DQB0_8 MAB1_0/MAB_8 Y9 MAB8
MDA8 D31 H19 MAA8 MDB9 H6 W9 MAB9
MEMORY INTERFACE A
DQA0_8 MAA1_0/MAA_8 DQB0_9 MAB1_1/MAB_9
MDA9 F30 DQA0_9 MAA1_1/MAA_9 H20 MAA9 MDB10 J4 DQB0_10 MAB1_2/MAB_10 AC8 MAB10
MDA10 C30 DQA0_10 MAA1_2/MAA_10 L13 MAA10 +1.8VGS MDB11 K6 DQB0_11 MAB1_3/MAB_11 AC9 MAB11
MDA11 A30 DQA0_11 MAA1_3/MAA_11 G16 MAA11 MDB12 K5 DQB0_12 MAB1_4/MAB_12 AA7 MAB12
D D
MDA12 F28 DQA0_12 MAA1_4/MAA_12 J16 MAA12 RV56 1 X76@ 2 10K_0402_5% VRAM_ID0 MDB13 L4 DQB0_13 MAB1_5/BA2 AA8 B_BA2
VRAM_ID0 14
MDA13 C28 DQA0_13 MAA1_5/MAA_BA2 H16 A_BA2 RV59 1 X76@ 2 10K_0402_5% MDB14 M6 DQB0_14 MAB1_6/BA0 Y8 B_BA0
MDA14 A28 DQA0_14 MAA1_6/MAA_BA0 J17 A_BA0 RV57 1 X76@ 2 10K_0402_5% VRAM_ID1 MDB15 M1 DQB0_15 MAB1_7/BA1 AA9 B_BA1
VRAM_ID1 14
MDA15 E28 DQA0_15 MAA1_7/MAA_BA1 H17 A_BA1 RV58 1 X76@ 2 10K_0402_5% MDB16 M3 DQB0_16
DQMB#[7..0] 20
MEMORY INTERFACE B
MDA16 D27 DQA0_16 RV60 1 X76@ 2 10K_0402_5% VRAM_ID2 MDB17 M5 DQB0_17 WCKB0_0/DQMB_0 H3 DQMB#0
DQMA#[7..0] 19 VRAM_ID2 14
MDA17 F26 DQA0_17 WCKA0_0/DQMA_0 A32 DQMA#0 RV61 1 X76@ 2 10K_0402_5% MDB18 N4 DQB0_18 WCKB0B_0/DQMB_1 H1 DQMB#1
MDA18 C26 DQA0_18 WCKA0B_0/DQMA_1 C32 DQMA#1 MDB19 P6 DQB0_19 WCKB0_1/DQMB_2 T3 DQMB#2
MDA19 A26 DQA0_19 WCKA0_1/DQMA_2 D23 DQMA#2 MDB20 P5 DQB0_20 WCKB0B_1/DQMB_3 T5 DQMB#3
MDA20 F24 DQA0_20 WCKA0B_1/DQMA_3 E22 DQMA#3 MDB21 R4 DQB0_21 WCKB1_0/DQMB_4 AE4 DQMB#4
MDA21 C24 DQA0_21 WCKA1_0/DQMA_4 C14 DQMA#4 MDB22 T6 DQB0_22 WCKB1B_0/DQMB_5 AF5 DQMB#5
MDA22 A24 DQA0_22 WCKA1B_0/DQMA_5 A14 DQMA#5 MDB23 T1 DQB0_23 WCKB1_1/DQMB_6 AK6 DQMB#6
MDA23 E24 DQA0_23 WCKA1_1/DQMA_6 E10 DQMA#6 MDB24 U4 DQB0_24 WCKB1B_1/DQMB_7 AK5 DQMB#7
MDA24 C22 DQA0_24 WCKA1B_1/DQMA_7 D9 DQMA#7 MDB25 V6 DQB0_25
QSB[7..0] 20
MDA25 A22 DQA0_25 MDB26 V1 DQB0_26 EDCB0_0/QSB_0 F6 QSB0
QSA[7..0] 19
MDA26 F22 DQA0_26 EDCA0_0/QSA_0 C34 QSA0 MDB27 V3 DQB0_27 EDCB0_1/QSB_1 K3 QSB1
MDA27
MDA28
D21 DQA0_27 EDCA0_1/QSA_1 D29 QSA1
QSA2
Vendor VRAM_ID0 VRAM_ID1 VRAM_ID2 MDB28
MDB29
Y6 DQB0_28 EDCB0_2/QSB_2 P3 QSB2
QSB3
A20 DQA0_28 EDCA0_2/QSA_2 D25 Y1 DQB0_29 EDCB0_3/QSB_3 V5
MDA29 F20 DQA0_29 EDCA0_3/QSA_3 E20 QSA3 MDB30 Y3 DQB0_30 EDCB1_0/QSB_4 AB5 QSB4
MDA30 D19 DQA0_30 EDCA1_0/QSA_4 E16 QSA4 128M16 (2G) K4W2G1646C-HC11 MDB31 Y5 DQB0_31 EDCB1_1/QSB_5 AH1 QSB5
MDA31
MDA32
E18 DQA0_31 EDCA1_1/QSA_5 E12 QSA5
QSA6
Samsung 2GB RV56 RV58 RV60 MDB32
MDB33
AA4 DQB1_0 EDCB1_2/QSB_6 AJ9 QSB6
QSB7
C18 DQA1_0 EDCA1_2/QSA_6 J10 AB6 DQB1_1 EDCB1_3/QSB_7 AM5
MDA33 A18 DQA1_1 EDCA1_3/QSA_7 D7 QSA7
QSA#[7..0] 19
PN:SA000047Q00 1 0 1 MDB34 AB1 DQB1_2
QSB#[7..0] 20
MDA34 F18 DQA1_2 128M16 (2G) H5TQ2G63DFR-11C MDB35 AB3 DQB1_3 DDBIB0_0/QSB_0B G7 QSB#0
MDA35
MDA36
D17 DQA1_3 DDBIA0_0/QSA_0B A34 QSA#0
QSA#1
Hynix 2GB RV59 RV58 RV60 MDB36
MDB37
AD6 DQB1_4 DDBIB0_1/QSB_1B K1 QSB#1
QSB#2
A16 DQA1_4 DDBIA0_1/QSA_1B E30 AD1 DQB1_5 DDBIB0_2/QSB_2B P1
MDA37 F16 DQA1_5 DDBIA0_2/QSA_2B E26 QSA#2 PN:SA00003YO70 0 0 1 MDB38 AD3 DQB1_6 DDBIB0_3/QSB_3B W4 QSB#3
MDA38 D15 DQA1_6 DDBIA0_3/QSA_3B C20 QSA#3 64M16 (1G) K4W1G1646G-BC11 MDB39 AD5 DQB1_7 DDBIB1_0/QSB_4B AC4 QSB#4
MDA39
MDA40
E14 DQA1_7 DDBIA1_0/QSA_4B C16 QSA#4
QSA#5
Samsung 1GB RV56 RV57 RV61 MDB40
MDB41
AF1 DQB1_8 DDBIB1_1/QSB_5B AH3 QSB#5
QSB#6
F14 DQA1_8 DDBIA1_1/QSA_5B C12 AF3 DQB1_9 DDBIB1_2/QSB_6B AJ8
MDA41 D13 DQA1_9 DDBIA1_2/QSA_6B J11 QSA#6 PN:SA00004GS00 1 1 0 MDB42 AF6 DQB1_10 DDBIB1_3/QSB_7B AM3 QSB#7
MDA42 F12 DQA1_10 DDBIA1_3/QSA_7B F8 QSA#7 64M16 (1G) H5TQ1G63DFR-11C MDB43 AG4 DQB1_11
MDA43
MDA44
A12 DQA1_11 Hynix 1GB RV59 RV57 RV61 MDB44 AH5 DQB1_12 ADBIB0/ODTB0 T7 ODTB0
ODTB0 20
D11 DQA1_12 ADBIA0/ODTA0 J21 ODTA0 MDB45 AH6 DQB1_13 ADBIB1/ODTB1 W7 ODTB1
MDA45 F10 DQA1_13 ADBIA1/ODTA1 G19 ODTA1
ODTA0
ODTA1
19
19
PN:SA000041S20 0 1 0 MDB46 AJ4 DQB1_14
ODTB1 20
MDA46 A10 DQA1_14 MDB47 AK3 DQB1_15 CLKB0 L9 CLKB0
CLKB0 20
MDA47 C10 DQA1_15 CLKA0 H27 CLKA0 MDB48 AF8 DQB1_16 CLKB0B L8 CLKB0#
CLKA0 19 CLKB0# 20
MDA48 G13 DQA1_16 CLKA0B G27 CLKA0# MDB49 AF9 DQB1_17
CLKA0# 19
C MDA49 H13 DQA1_17 MDB50 AG8 DQB1_18 CLKB1 AD8 CLKB1 C
CLKB1 20
MDA50 J13 DQA1_18 CLKA1 J14 CLKA1 MDB51 AG7 DQB1_19 CLKB1B AD7 CLKB1#
CLKA1 19 CLKB1# 20
MDA51 H11 DQA1_19 CLKA1B H14 CLKA1# MDB52 AK9 DQB1_20
CLKA1# 19
MDA52 G10 DQA1_20 MDB53 AL7 DQB1_21 RASB0B T10 RASB0# RASB0# 20
MDA53 G8 DQA1_21 RASA0B K23 RASA0# MDB54 AM8 DQB1_22 RASB1B Y10 RASB1#
RASA0# 19 RASB1# 20
MDA54 K9 DQA1_22 RASA1B K19 RASA1# MDB55 AM7 DQB1_23
RASA1# 19
MDA55 K10 DQA1_23 MDB56 AK1 DQB1_24 CASB0B W10 CASB0# CASB0# 20
MDA56 G9 DQA1_24 CASA0B K20 CASA0# MDB57 AL4 DQB1_25 CASB1B AA10 CASB1#
CASA0# 19 CASB1# 20
MDA57 A8 DQA1_25 CASA1B K17 CASA1# MDB58 AM6 DQB1_26
CASA1# 19
MDA58 C8 DQA1_26 MDB59 AM1 DQB1_27 CSB0B_0 P10 CSB0#_0 CSB0#_0 20
MDA59 E8 DQA1_27 CSA0B_0 K24 CSA0#_0 MDB60 AN4 DQB1_28 CSB0B_1 L10
CSA0#_0 19
MDA60 A6 DQA1_28 CSA0B_1 K27 MDB61 AP3 DQB1_29
MDA61 C6 DQA1_29 MDB62 AP1 DQB1_30 CSB1B_0 AD10 CSB1#_0 CSB1#_0 20
MDA62 E6 DQA1_30 CSA1B_0 M13 CSA1#_0 MDB63 AP5 DQB1_31 CSB1B_1 AC10
CSA1#_0 19
MDA63 A5 DQA1_31 CSA1B_1 K16
CKEB0 U10 CKEB0 CKEB0 20
+VDD_MEM15_REFDA L18 MVREFDA CKEA0 K21 CKEA0 +VDD_MEM15_REFDB Y12 MVREFDB CKEB1 AA11 CKEB1
+1.5VGS CKEA0 19 CKEB1 20
+VDD_MEM15_REFSA L20 MVREFSA CKEA1 J20 CKEA1 +VDD_MEM15_REFSB AA12 MVREFSB
CKEA1 19
WEB0B N10 WEB0# WEB0# 20
RV62 1 Tha@ 2 240_0402_1% L27 NC_MEM_CALRN0 WEA0B K26 WEA0# WEA0# 19 WEB1B AB11 WEB1# WEB1# 20
RV63 1 @ 2 240_0402_1% N12 NC_MEM_CALRN1 WEA1B L15 WEA1# WEA1# 19
RV64 1 Tha@ 2 240_0402_1% AG12 NC_MEM_CALRN2
MAB0_8/MAB_13 T8 MAB13
MAB13 20
RV65 1 @ 2 240_0402_1% M12 NC_MEM_CALRP1 MAA0_8/MAA_13 H23 MAA13 MAA13 19 MAB1_8/MAB_14 W8
RV67 1 Tha@ 2 240_0402_1% M27 MEM_CALRP0 MAA1_8/MAA_14 J19 MAB0_9/MAB_15 U12
RV68 1 Tha@ 2 240_0402_1% AH12 MEM_CALRP2 MAA0_9/MAA_15 M21 MAB1_9/RSVD V12
MAA1_9/RSVD M20
For Chelsea DRAM_RST AH11 DRAM_RST#_R
RV60,RV61,RV62,RV63 non staff
RV65,RV66 from 240ohm
change to 120ohm
RV68 Che@ RV67 Che@ For Thames: PX@ 2160834000A10CHELSE_FCBGA962
RV63,RV64 non stuff
120 ohm 120 ohm RV62,RV64,RV67,RV68=240ohm
B B
This basic topology should be used for DRAM_RST for DDR3/GDDR5.These

Capacitors and Resistor values are an example only. The Series R and
|| Cap values will depend on the DRAM load and will have to be
calculated for different Memory ,DRAM Load and board to pass Reset
Signal Spec.
Place all these components very close to GPU (Within
25mm) and keep all component close to each Other (within
5mm) except Rser2
+1.5VGS
1
+1.5VGS +1.5VGS RV71

4.7K_0402_5% +1.5VGS +1.5VGS
@
1
1
RV72 RV73
40.2_0402_1% 40.2_0402_1% RV74 RV75
PX@ PX@ 40.2_0402_1% 40.2_0402_1%
1 RV76 2 1 RV77 2 DRAM_RST#_R PX@ PX@
2
19,20 DRAM_RST# 51.1_0402_1% 10_0402_5%
2
+VDD_MEM15_REFDA +VDD_MEM15_REFSA PX@ PX@
+VDD_MEM15_REFDB +VDD_MEM15_REFSB
2
1
CV172 CV173 PX@ PX@
1
RV78 0.1U_0402_16V7K RV79 0.1U_0402_16V7K CV174 RV80 CV175 CV176
100_0402_1% PX@ 100_0402_1% PX@ 120P_0402_50V9 4.99K_0402_1% RV81 0.1U_0402_16V7K RV82 0.1U_0402_16V7K
2
PX@ PX@ 100_0402_1% PX@ 100_0402_1% PX@

1
2
PX@
2
PX@
2
A A

C A
4019I5
5 4 3 2 1
5 4 3 2 1
Tha@ (1.8V@504mA PCIE_VDDR) +1.8VGS

UVG1E
+1.5VGS RV2 0_0805_5% PX@ LV6
PART 5 0F 9 1 2 +PCIE_VDDR 2 1
For DDR3/GDDR5, MVDDQ = 1.5V MBK1608121YZF_0603 12/05 0.935V for Chelsea, and 1.0V for Thames
CV88
CV81
CV91
CV92
10U_0603_6.3V6M
1U_0402_6.3V6K
0.1U_0402_16V7K
0.1U_0402_16V7K
MEM I/O
AC7 VDDR1 NC_PCIE_VDDR AA31 1 1 1 1
BOM control from Power circuit.
D D
AD11 VDDR1 NC_PCIE_VDDR AA32
CV87
CV82
CV93
CV94
CV95
CV83
CV96
CV84
CV85
CV97
CV86
CV98
CV99
CV100
CV101
CV102
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
220U_B2_2.5VM_R35
1 AF7 VDDR1 NC_PCIE_VDDR AA33
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 AG10 VDDR1 NC_PCIE_VDDR AA34

2 2 2 2 12/5 Connected to PCIE_VDDC for Chelsea, and VDDC for Thames
PX@
PX@
PX@
PX@
+ AJ7 VDDR1 NC_PCIE_VDDR W30
PX@ AK8 VDDR1 NC_PCIE_VDDR Y31
AL9 VDDR1 NC_BIF_VDDC V28 +0.935VGS +VGA_CORE
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
G11 VDDR1 NC_BIF_VDDC W29
G14 VDDR1 PCIE_PVDD AB37 +0.935VGS
1
G17 (1.0V@1920mA PCIE_VDDC)
PCIE
VDDR1
G20 VDDR1 PCIE_VDDC G30 RV150 RV151
G23 VDDR1 PCIE_VDDC G31 0_0402_5% 0_0805_5% <SI>RV151 0402-->0805
CV89
CV90
CV103
CV104
CV105
CV106
CV107
CV108
10U_0603_6.3V6M
0.1U_0402_16V7K
0.1U_0402_16V7K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
G26 VDDR1 PCIE_VDDC H29 Che@ Tha@
G29 VDDR1 PCIE_VDDC H30 1 1 1 1 1 1 1 1
2
H10 VDDR1 PCIE_VDDC J29
J7 VDDR1 PCIE_VDDC J30
J9 VDDR1 PCIE_VDDC L28
2 2 2 2 2 2 2 2
Change power rail same as PCIE_VDDC
PX@
PX@
PX@
PX@
PX@
PX@
PX@
@
CV147
CV148
CV155
10U_0603_6.3V6M
1U_0402_6.3V6K
1U_0402_6.3V6K
VDDR1 CRB Design K11
K13
VDDR1 PCIE_VDDC M28
N28
VDDR1 PCIE_VDDC 1 1 1
0.1u 6 6 K8 VDDR1 PCIE_VDDC R28 Must be connected to PCIE_VDDC (0.935 V) on
L12 VDDR1 PCIE_VDDC T28
1u 10 5 L16 VDDR1 PCIE_VDDC U28 "Heathrow"/"Chelsea" for both BACO and non-BACO designs
2 2 2
PX@
PX@
PX@
10u 6 5 L21 VDDR1
L23 VDDR1 For Chelsea, Delete 2*1U
L26 VDDR1
BACO
BIF_VDDC N27
L7 VDDR1 BIF_VDDC T27
+VGA_CORE
VDD_CT CRB Design M11 VDDR1
0.1u 1 1
N11
P7
VDDR1
VDDR1 VDDC AA15
PCIE_VDDR CRB Design
CORE
1u 3 3 R11 VDDR1 VDDC AA17 0.1u 2 2
U11 VDDR1 VDDC AA20
10u 1 1 U7 VDDR1 VDDC AA22 1u 1 1
Y11 VDDR1 VDDC AA24 10u 1 1
+1.8VGS +VDDC_CT Y7 VDDR1 VDDC AA27
VDDC AB16
PX@ LV7 (1.8V@110mA VDD_CT) VDDC AB18
VDDR3 CRB Design 1 2
BLM15BD121SN1D_0402
VDDC
VDDC
AB21
AB23
1u 3 3
CV122
CV123
CV124
CV125
CV126
10U_0603_6.3V6M
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
0.1U_0402_16V7K
C LEVEL VDDC AB26 C
1 1 1 1 1 TRANSLATION VDDC AB28
10u 1 1 AF26 VDD_CT VDDC AC17 PCIE_VDDC CRB Design
+3VGS AF27 VDD_CT VDDC AC20
2 2 2 2 2
AG26 VDD_CT VDDC AC22 1u 7 5 (1@)
PX@
PX@
PX@
PX@
PX@ AG27 VDD_CT VDDC AC24

VDDR4 CRB Design VDDC AC27 10u 1 1
CV139
CV140
CV141
CV142
10U_0603_6.3V6M
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
VDDC AD18
0.1u 1 1 1 1 1 1 I/O VDDC AD21
AF23 VDDR3 VDDC AD23
1u 1 1 AF24 VDDR3 VDDC AD26
AG23 VDDR3 VDDC AF17
2 2 2 2
PX@
PX@
PX@
PX@
AG24 VDDR3 VDDC AF20 VDDC CRB Design

MPV18 CRB Design +1.8VGS
VDDC AF22
1u 30 25
0.1u 2 1 AD12
DVP
VDDR4
VDDC
VDDC
AG16
AG18
11/29 +VGA_CORE short with +VDDCI
PX@ LV8 AF11 VDDR4 10u 10 1
1u 2 1 1 2 +VDDR4 AF12 VDDR4 VDDC AH22 22u 0 1
BLM15BD121SN1D_0402 AF13 AH27 +VGA_CORE +VDDCI
10u 1 1 VDDR4 VDDC
CV143
CV144
CV145
10U_0603_6.3V6M
1U_0402_6.3V6K
0.1U_0402_16V7K
VDDC AH28
1 1 1 VDDC M26 J10 @
AF15 VDDR4 VDDC N24 2 1
SPV18 CRB Design AG11
AG13
VDDR4
VDDR4
VDDC
VDDC
R18
R21 2MM
2 2 2
PX@
PX@
PX@
0.1u 1 1 AG15 VDDR4 VDDC R23

VDDC R26
1u 1 1 VDDC T17
10u 1 1 VDDC T20
VDDC T22
VDDC T24
VDDC U16
SPV10 CRB Design VDDC
VDDC
U18
U21
0.1u 1 1 VDDC U23
VDDC U26
1u 1 1 VDDC V17
10u 1 1 VDDC V20
B
VDDC V22 B
VDDC V24
VDDC V27
VDDC Y16
VDDC Y18
VDDC Y21
VDDC Y23
VDDC Y26
VDDC Y28
(GDDR3/DDR3 1.12V@4A VDDCI) +VDDCI
VDDCI AA13 (GDDR5 1.12V@16A VDDCI) VDDCI CRB Design
VDDCI AB13
VDDCI AC12 1u 10 9
VDDCI AC15
VDDCI AD13 10u 3 2
VDDCI AD16 22u 0 1
VDDCI M15
VDDCI M16
VOLTAGE
VDDCI M18
SENESE
VDDCI M23
N13
ISOLATED
VDDCI
CORE I/O
56 VCC_GPU_SENSE AF28 FB_VDDC VDDCI N15

VDDCI N17
VDDCI N20
53 VDDCI_SEN AG28 FB_VDDCI VDDCI N22
VDDCI R12
VDDCI R13
56 VSS_GPU_SENSE AH29 FB_GND VDDCI R16
VDDCI T12
VDDCI T15
VCC_GPU_SENSE & VSS_GPU_SENSE VDDCI V15
VDDCI Y13
needs to be routed as differential pair
VDDCI and VDDC should have seperate regulators with a merge option on PCB
A
For Madison, Park, Capilano, Robson, Seymour and Whistler, VDDCI and VDDC can share one common regulator A

C A
4019I5
5 4 3 2 1
5 4 3 2 1
UVG1F
PART 6 0F 9
AB39 PCIE_VSS GND A3

E39 PCIE_VSS GND A37
F34 PCIE_VSS GND AA16
F39 PCIE_VSS GND AA18
G33 PCIE_VSS GND AA2
G34 PCIE_VSS GND AA21
H31 PCIE_VSS GND AA23
D
H34 PCIE_VSS GND AA26 D
H39 PCIE_VSS GND AA28
J31 PCIE_VSS GND AA6
J34 PCIE_VSS GND AB12
K31 PCIE_VSS GND AB15
L31 PCIE_VSS GND AB22
L34 PCIE_VSS GND AB24
M34 PCIE_VSS GND AB27
12/05 0.935V for Chelsea, and 1.0V for Thames M39 PCIE_VSS GND AC11
N31 PCIE_VSS GND AC13
UVG1H BOM control from Power circuit. N34 PCIE_VSS GND AC16
PART 8 0F 9
P31 PCIE_VSS GND AC18
+0.935VGS P34 PCIE_VSS GND AC2
DP_VDDR DP_VDDC
P39 PCIE_VSS GND AC21
R34 PCIE_VSS GND AC23
+DP_VDDC
10U_0603_6.3V6M
1 RV48
0.1U_0402_16V7K
1U_0402_6.3V6K
DP_VDDC AP31 2 T31 PCIE_VSS GND AC26
PX@ CV69
PX@ CV70
PX@ CV71
+1.8VGS DP_VDDC AP32 T34 PCIE_VSS GND AC28
DP_VDDC AN33 1 1 1 0_0603_5% T39 PCIE_VSS GND AC6
DP_VDDC AP33 PX@ U31 PCIE_VSS GND AD15
1 RV47 2 +DP_VDDR18 AN24 DP_VDDR U34 PCIE_VSS GND AD17
AP24 DP_VDDR DP_VDDC AP13 V34 PCIE_VSS GND AD20
2 2 2
CV66
CV67
CV68
PX@ CV75
PX@ CV76
PX@ CV77
10U_0603_6.3V6M
10U_0603_6.3V6M
0_0603_5%
1U_0402_6.3V6K
1U_0402_6.3V6K
0.1U_0402_16V7K
0.1U_0402_16V7K
AP25 DP_VDDR DP_VDDC AT13 V39 PCIE_VSS GND AD22
PX@ 1 1 1 1 1 1 AP26 DP_VDDR DP_VDDC AP14 W31 PCIE_VSS GND AD24
AU28 DP_VDDR DP_VDDC AP15 W34 PCIE_VSS GND AD27
PX@ PX@ PX@ AV29 DP_VDDR Y34 PCIE_VSS GND AD9
DP_VDDC AL33 Y39 PCIE_VSS GND AE2
2 2 2 2 2 2 DP_VDDC AM33 GND AE6
PX@ CV74
PX@ CV73
PX@ CV72
10U_0603_6.3V6M
1U_0402_6.3V6K
0.1U_0402_16V7K
AP20 DP_VDDR DP_VDDC AK33 GND AF10
AP21 DP_VDDR DP_VDDC AK34 1 1 1 GND AF16
AP22 DP_VDDR GND AF18
AP23 DP_VDDR GND GND AF21
AU18 DP_VDDR GND AG17
2 2 2
AV19 DP_VDDR
DP GND
F15 GND GND AG2
F17 GND GND AG20
DP_VSSR AN27 F19 GND GND AG22
AH34 DP_VDDR DP_VSSR AP27 F21 GND GND AG6
C 1 1 1 AJ34 DP_VDDR DP_VSSR AP28 F23 GND GND AG9 C
PX@ CV65
PX@ CV64
PX@ CV63
10U_0603_6.3V6M
1U_0402_6.3V6K
0.1U_0402_16V7K
AF34 DP_VDDR DP_VSSR AW24 F25 GND GND AH21

AG34 DP_VDDR DP_VSSR AW26 F27 GND GND AJ10
PX@ CV80
PX@ CV79
PX@ CV78
10U_0603_6.3V6M
0.1U_0402_16V7K
1U_0402_6.3V6K
AM37 DP_VDDR DP_VSSR AN29 F29 GND GND AJ11
2 2 2
AL38 DP_VDDR DP_VSSR AP29 1 1 1 F31 GND GND AJ2
DP_VSSR AP30 F33 GND GND AJ28
DP_VSSR AW30 F7 GND GND AJ6
DP_VSSR AW32 F9 GND GND AK11
2 2 2
DP_VSSR AN17 G2 GND GND AK31
DP_VSSR AP16 G6 GND GND AK7
DP_VSSR AP17 H9 GND GND AL11
DP_VSSR AW14 J2 GND GND AL14
DP_VSSR AW16 J27 GND GND AL17
DP_VSSR AN19 J6 GND GND AL2
DP_VSSR AP18 J8 GND GND AL20
DP_VSSR AP19 K14 GND
CALIBRATION
DP_VSSR AW20 K7 GND GND AL23
DP_VSSR AW22 L11 GND GND AL26
DP_VSSR AN34 L17 GND GND AL32
PX@RV51
PX@RV51 DP_VSSR AP39 L2 GND GND AL6
2 1 AW28 DPAB_CALR DP_VSSR AR39 L22 GND GND AL8
150_0402_1% DP_VSSR AU37 L24 GND GND AM11
DP_VSSR AF39 L6 GND GND AM31
PX@RV50
PX@RV50 DP_VSSR AH39 M17 GND GND AM9
2 1 AW18 DPCD_CALR DP_VSSR AK39 M22 GND GND AN11
150_0402_1% DP_VSSR AL34 M24 GND GND AN2
DP_VSSR AV27 N16 GND GND AN30
PX@RV55
PX@RV55 DP_VSSR AR28 N18 GND GND AN6
2 1 AM39 DPEF_CALR DP_VSSR AV17 N2 GND GND AN8
150_0402_1% DP_VSSR AR18 N21 GND GND AP11
DP_VSSR AN38 N23 GND GND AP7
DP_VSSR AM35 N26 GND GND AP9
N6 GND GND AR5
R15 GND GND B11
R17 GND GND B13
R2 GND GND B15
R20 GND GND B17
B
R22 GND GND B19 B
R24 GND GND B21
PX@ 2160834000A10CHELSE_FCBGA962 R27 GND GND B23
R6 GND GND B25
T11 GND GND B27
T13 GND GND B29
T16 GND GND B31
T18 GND GND B33
T21 GND GND B7
T23 GND GND B9
T26 GND GND C1
U15 GND GND C39
U17 GND GND E35
U2 GND GND E5
U20 GND GND F11
U22 GND GND F13
U24 GND
U27 GND
U6 GND
V11 GND
V16 GND
V18 GND
V21 GND
V23 GND
V26 GND
W2 GND
W6 GND
Y15 GND
Y17 GND
Y20 GND
Y22 GND VSS_MECH A39 MECH#1
Y24 GND VSS_MECH AW1 MECH#2 T55 PAD
Y27 GND VSS_MECH AW39 MECH#3 T56 PAD
T57 PAD
A A

C A
4019I5
5 4 3 2 1
5 4 3 2 1
MDA[0..63]
16 MDA[0..63]
UV5 X76@ UV6 X76@ UV7 X76@ UV8 X76@

MAA[13..0]
16 MAA[13..0]
VREFC_A1 M8 E3 MDA5 MDA10 VREFC_A2 M8 E3 MDA13 MDA5 VREFC_A3 M8 E3 MDA54 VREFC_A4 M8 E3 MDA42 MDA40
VREFD_Q1 VREFCA DQL0 MDA1 MDA14 VREFD_Q2 VREFCA DQL0 MDA14 MDA0 VREFD_Q3 VREFCA DQL0 MDA53 VREFD_Q4 VREFCA DQL0 MDA44
H1 VREFDQ DQL1 F7 H1 VREFDQ DQL1 F7 H1 VREFDQ DQL1 F7 H1 VREFDQ DQL1 F7
F2 MDA6 MDA9 F2 MDA9 MDA6 F2 MDA55 F2 MDA47 MDA45
MAA0 DQL2 MDA3 MDA11 MAA0 DQL2 MDA11 MDA1 MAA0 DQL2 MDA50 MAA0 DQL2 MDA40 MDA42
N3 A0 DQL3 F8 N3 A0 DQL3 F8 N3 A0 DQL3 F8 N3 A0 DQL3 F8
MAA1 P7 H3 MDA4 MDA15 MAA1 P7 H3 MDA15 MDA4 MAA1 P7 H3 MDA49 MAA1 P7 H3 MDA46
MAA2 A1 DQL4 MDA0 MDA12 MAA2 A1 DQL4 MDA12 MDA2 MAA2 A1 DQL4 MDA48 MAA2 A1 DQL4 MDA41
P3 A2 DQL5 H8 P3 A2 DQL5 H8 P3 A2 DQL5 H8 P3 A2 DQL5 H8
DQMA#[7..0] MAA3 N2 G2 MDA7 MDA8 MAA3 N2 G2 MDA8 MDA7 MAA3 N2 G2 MDA52 MAA3 N2 G2 MDA45 MDA47
16 DQMA#[7..0] A3 DQL6 A3 DQL6 A3 DQL6 A3 DQL6
MAA4 P8 H7 MDA2 MDA13 MAA4 P8 H7 MDA10 MDA3 MAA4 P8 H7 MDA51 MAA4 P8 H7 MDA43
MAA5 A4 DQL7 MAA5 A4 DQL7 MAA5 A4 DQL7 MAA5 A4 DQL7
P2 A5 P2 A5 P2 A5 P2 A5
MAA6 R8 MAA6 R8 MAA6 R8 MAA6 R8
D
MAA7 A6 MDA25 MDA20 MAA7 A6 MDA20 MDA25 MAA7 A6 MDA63 MAA7 A6 MDA32 D
R2 A7 DQU0 D7 R2 A7 DQU0 D7 R2 A7 DQU0 D7 R2 A7 DQU0 D7
MAA8 T8 C3 MDA31 MDA19 MAA8 T8 C3 MDA19 MDA31 MAA8 T8 C3 MDA59 MAA8 T8 C3 MDA36
QSA[7..0] MAA9 A8 DQU1 MDA27 MDA23 MAA9 A8 DQU1 MDA23 MDA27 MAA9 A8 DQU1 MDA62 MAA9 A8 DQU1 MDA33
16 QSA[7..0] R3 A9 DQU2 C8 R3 A9 DQU2 C8 R3 A9 DQU2 C8 R3 A9 DQU2 C8
MAA10 L7 C2 MDA28 MDA18 MAA10 L7 C2 MDA18 MDA28 MAA10 L7 C2 MDA56 MAA10 L7 C2 MDA39
MAA11 A10/AP DQU3 MDA26 MDA22 MAA11 A10/AP DQU3 MDA22 MDA26 MAA11 A10/AP DQU3 MDA60 MAA11 A10/AP DQU3 MDA35
R7 A11 DQU4 A7 R7 A11 DQU4 A7 R7 A11 DQU4 A7 R7 A11 DQU4 A7
MAA12 N7 A2 MDA30 MDA16 MAA12 N7 A2 MDA16 MDA30 MAA12 N7 A2 MDA57 MDA58 MAA12 N7 A2 MDA38
MAA13 A12 DQU5 MDA24 MDA21 MAA13 A12 DQU5 MDA21 MDA24 MAA13 A12 DQU5 MDA61 MAA13 A12 DQU5 MDA34
T3 A13 DQU6 B8 T3 A13 DQU6 B8 T3 A13 DQU6 B8 T3 A13 DQU6 B8
T7 A3 MDA29 MDA17 T7 A3 MDA17 MDA29 T7 A3 MDA58 MDA57 T7 A3 MDA37
A14 DQU7 A14 DQU7 A14 DQU7 A14 DQU7
M7 A15/BA3 M7 A15/BA3 M7 A15/BA3 M7 A15/BA3
QSA#[7..0] +1.5VGS +1.5VGS +1.5VGS +1.5VGS
16 QSA#[7..0]
M2 B2 A_BA0 M2 B2 A_BA0 M2 B2 A_BA0 M2 B2
16 A_BA0 BA0 VDD BA0 VDD BA0 VDD BA0 VDD
N8 D9 A_BA1 N8 D9 A_BA1 N8 D9 A_BA1 N8 D9
M3 G7 A_BA2 M3 G7 A_BA2 M3 G7 A_BA2 M3 G7
VDD K2 VDD K2 VDD K2 VDD K2
VDD N1 VDD N1 VDD N1 VDD N1
J7 N9 CLKA0 J7 N9 J7 N9 CLKA1 J7 N9
16 CLKA0 CK VDD CK VDD 16 CLKA1 CK VDD CK VDD
K7 R1 CLKA0# K7 R1 K7 R1 CLKA1# K7 R1
16 CLKA0# CK VDD CK VDD 16 CLKA1# CK VDD CK VDD
K9 R9 CKEA0 K9 R9 K9 R9 CKEA1 K9 R9
16 CKEA0 CKE/CKE0 VDD +1.5VGS CKE/CKE0 VDD +1.5VGS 16 CKEA1 CKE/CKE0 VDD +1.5VGS CKE/CKE0 VDD +1.5VGS
K1 A1 ODTA0 K1 A1 K1 A1 ODTA1 K1 A1
16 ODTA0 ODT/ODT0 VDDQ ODT/ODT0 VDDQ 16 ODTA1 ODT/ODT0 VDDQ ODT/ODT0 VDDQ
L2 A8 CSA0#_0 L2 A8 L2 A8 CSA1#_0 L2 A8
16 CSA0#_0 CS/CS0 VDDQ CS/CS0 VDDQ 16 CSA1#_0 CS/CS0 VDDQ CS/CS0 VDDQ
J3 C1 RASA0# J3 C1 J3 C1 RASA1# J3 C1
16 RASA0# RAS VDDQ RAS VDDQ 16 RASA1# RAS VDDQ RAS VDDQ
K3 C9 CASA0# K3 C9 K3 C9 CASA1# K3 C9
16 CASA0# CAS VDDQ CAS VDDQ 16 CASA1# CAS VDDQ CAS VDDQ
L3 D2 WEA0# L3 D2 L3 D2 WEA1# L3 D2
16 WEA0# WE VDDQ WE VDDQ 16 WEA1# WE VDDQ WE VDDQ
VDDQ E9 VDDQ E9 VDDQ E9 VDDQ E9
VDDQ F1 VDDQ F1 VDDQ F1 VDDQ F1
QSA1 QSA0 F3 H2 QSA0 QSA1 F3 H2 QSA6 F3 H2 QSA5 F3 H2
QSA2 QSA3 DQSL VDDQ QSA3 QSA2 DQSL VDDQ QSA7 DQSL VDDQ QSA4 DQSL VDDQ
C7 DQSU VDDQ H9 C7 DQSU VDDQ H9 C7 DQSU VDDQ H9 C7 DQSU VDDQ H9
DQMA#1 DQMA#0 E7 A9 DQMA#0 DQMA#1 E7 A9 DQMA#6 E7 A9 DQMA#5 E7 A9

DQMA#2 DQMA#3 DML VSS DQMA#3 DQMA#2 DML VSS DQMA#7 DML VSS DQMA#4 DML VSS
D3 DMU VSS B3 D3 DMU VSS B3 D3 DMU VSS B3 D3 DMU VSS B3
VSS E1 VSS E1 VSS E1 VSS E1
VSS G8 VSS G8 VSS G8 VSS G8
C QSA#1 QSA#0 G3 J2 QSA#0 QSA#1 G3 J2 QSA#6 G3 J2 QSA#5 G3 J2 C
QSA#2 QSA#3 DQSL VSS QSA#3 QSA#2 DQSL VSS QSA#7 DQSL VSS QSA#4 DQSL VSS
B7 DQSU VSS J8 B7 DQSU VSS J8 B7 DQSU VSS J8 B7 DQSU VSS J8
VSS M1 VSS M1 VSS M1 VSS M1
VSS P1 VSS P1 VSS P1 VSS P1
T2 P9 DRAM_RST# T2 P9 DRAM_RST# T2 P9 DRAM_RST# T2 P9
16,20 DRAM_RST# RESET VSS RESET VSS RESET VSS RESET VSS
VSS T1 VSS T1 VSS T1 VSS T1
L8 ZQ/ZQ0 VSS T9 L8 ZQ/ZQ0 VSS T9 L8 ZQ/ZQ0 VSS T9 L8 ZQ/ZQ0 VSS T9
1
1
J1 NC/ODT1 VSSQ B1 J1 NC/ODT1 VSSQ B1 J1 NC/ODT1 VSSQ B1 J1 NC/ODT1 VSSQ B1
RV83 L1 B9 RV84 L1 B9 RV85 L1 B9 RV86 L1 B9
NC/CS1 VSSQ NC/CS1 VSSQ NC/CS1 VSSQ NC/CS1 VSSQ
240_0402_1% J9 NC/CE1 VSSQ D1 240_0402_1% J9 NC/CE1 VSSQ D1 240_0402_1% J9 NC/CE1 VSSQ D1 240_0402_1% J9 NC/CE1 VSSQ D1
PX@ L9 D8 PX@ L9 D8 PX@ L9 D8 PX@ L9 D8
NCZQ1 VSSQ NCZQ1 VSSQ NCZQ1 VSSQ NCZQ1 VSSQ
E2 E2 E2 E2
2
2
VSSQ VSSQ VSSQ VSSQ
VSSQ E8 VSSQ E8 VSSQ E8 VSSQ E8
VSSQ F9 VSSQ F9 VSSQ F9 VSSQ F9
VSSQ G1 VSSQ G1 VSSQ G1 VSSQ G1
96-BALL 96-BALL 96-BALL 96-BALL

SDRAM DDR3 SDRAM DDR3 SDRAM DDR3 SDRAM DDR3
H5TQ2G63BFR-11C_FBGA96 H5TQ2G63BFR-11C_FBGA96 H5TQ2G63BFR-11C_FBGA96 H5TQ2G63BFR-11C_FBGA96
CLKA0 1 2
PX@RV87
PX@RV87 40.2_0402_1%
CLKA0# 1 2
PX@RV88
PX@RV88 40.2_0402_1%
1
CV177
0.01U_0402_16V7K +1.5VGS +1.5VGS
PX@ +1.5VGS +1.5VGS +1.5VGS +1.5VGS +1.5VGS +1.5VGS
2
1
RV89 RV90 RV91 RV92 RV93 RV94 RV95 RV96
4.99K_0402_1% 4.99K_0402_1% 4.99K_0402_1% 4.99K_0402_1% 4.99K_0402_1% 4.99K_0402_1% 4.99K_0402_1% 4.99K_0402_1%
B B
PX@ PX@ PX@ PX@ PX@ PX@ PX@ PX@
2
2
CLKA1 1 2
PX@RV97
PX@RV97 40.2_0402_1% VREFD_Q1 VREFC_A1 VREFC_A2 VREFD_Q2 VREFC_A3 VREFD_Q3 VREFC_A4 VREFD_Q4
1
1
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
CV180
CV181
CV182
CV178
CV183
CV184
CV185
1
1
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
CV186
CLKA1# 1 2 RV99 RV100 RV102 RV103 RV104 RV105 RV106 RV101
PX@RV98
PX@RV98 40.2_0402_1% 4.99K_0402_1% 4.99K_0402_1% 4.99K_0402_1% 4.99K_0402_1% 4.99K_0402_1% 4.99K_0402_1% 4.99K_0402_1% 4.99K_0402_1%
1
CV179 PX@ PX@ PX@ PX@ PX@ PX@ PX@ PX@ PX@ PX@ PX@ PX@ PX@
2
2
0.01U_0402_16V7K PX@ PX@ PX@
2
2
PX@
2
+1.5VGS
+1.5VGS
+1.5VGS +1.5VGS
CV187
CV188
CV189
CV190
CV191
CV192
CV193
CV194
CV195
CV196
CV197
CV198
CV199
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
CV200
CV201
CV202
CV203
CV204
CV205
CV206
CV207
CV208
CV209
CV210
CV211
CV212
CV213
CV214
CV215
CV216
CV217
CV218
CV219
CV220
CV221
CV222
CV223
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1 1 1 1 1 1 1 1 1 1 1 1 1
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
2 2 2 2 2 2 2 2 2 2 2 2 2
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
A A

C A
4019I5
5 4 3 2 1
5 4 3 2 1
UV9 X76@ UV10 X76@ UV11 X76@ UV12 X76@
VREFC_A1_B M8 E3 MDB19 VREFC_A2_B M8 E3 MDB4 VREFC_A3_B M8 E3 MDB55 MDB33 VREFC_A4_B M8 E3 MDB33 MDB55
VREFD_Q1_B H1 VREFCA DQL0 MDB21 VREFD_Q2_B VREFCA DQL0 MDB3 VREFD_Q3_B VREFCA DQL0 MDB50 MDB38 VREFD_Q4_B VREFCA DQL0 MDB38 MDB50
VREFDQ DQL1 F7 H1 VREFDQ DQL1 F7 H1 VREFDQ DQL1 F7 H1 VREFDQ DQL1 F7
F2 MDB16 MDB17 F2 MDB5 F2 MDB54 MDB39 F2 MDB39 MDB54
MDB[0..63] MAB0 DQL2 MDB18 MAB0 DQL2 MDB0 MAB0 DQL2 MDB51 MDB36 MAB0 DQL2 MDB36 MDB51
16 MDB[0..63] N3 A0 DQL3 F8 N3 A0 DQL3 F8 N3 A0 DQL3 F8 N3 A0 DQL3 F8
MAB1 P7 H3 MDB20 MAB1 P7 H3 MDB6 MAB1 P7 H3 MDB53 MDB35 MAB1 P7 H3 MDB35 MDB53
MAB2 A1 DQL4 MDB22 MAB2 A1 DQL4 MDB1 MAB2 A1 DQL4 MDB48 MDB34 MAB2 A1 DQL4 MDB34 MDB48
MAB3 N2 G2 MDB17 MDB16 MAB3 N2 G2 MDB7 MAB3 N2 G2 MDB52 MDB37 MAB3 N2 G2 MDB37 MDB52
MAB4 A3 DQL6 MDB23 MAB4 A3 DQL6 MDB2 MAB4 A3 DQL6 MDB49 MDB32 MAB4 A3 DQL6 MDB32 MDB49
MAB5 P2 MAB5 P2 MAB5 P2 MAB5 P2
MAB[13..0] MAB6 A5 MAB6 A5 MAB6 A5 MAB6 A5
16 MAB[13..0] R8 A6 R8 A6 R8 A6 R8 A6
MAB7 R2 D7 MDB15 MAB7 R2 D7 MDB26 MAB7 R2 D7 MDB40 MDB62 MAB7 R2 D7 MDB62 MDB40
D
MAB8 A7 DQU0 MDB11 MAB8 A7 DQU0 MDB27 MAB8 A7 DQU0 MDB47 MDB58 MAB8 A7 DQU0 MDB58 MDB47 D
T8 A8 DQU1 C3 T8 A8 DQU1 C3 T8 A8 DQU1 C3 T8 A8 DQU1 C3
MAB9 R3 C8 MDB14 MAB9 R3 C8 MDB24 MDB28 MAB9 R3 C8 MDB42 MDB63 MAB9 R3 C8 MDB63 MDB42
MAB10 A9 DQU2 MDB10 MAB10 A9 DQU2 MDB31 MAB10 A9 DQU2 MDB46 MDB56 MAB10 A9 DQU2 MDB56 MDB46
L7 A10/AP DQU3 C2 L7 A10/AP DQU3 C2 L7 A10/AP DQU3 C2 L7 A10/AP DQU3 C2
MAB11 R7 A7 MDB12 MAB11 R7 A7 MDB28 MDB24 MAB11 R7 A7 MDB43 MDB61 MAB11 R7 A7 MDB61 MDB43
MAB12 A11 DQU4 MDB9 MAB12 A11 DQU4 MDB29 MAB12 A11 DQU4 MDB45 MDB57 MAB12 A11 DQU4 MDB57 MDB45
N7 A12 DQU5 A2 N7 A12 DQU5 A2 N7 A12 DQU5 A2 N7 A12 DQU5 A2
DQMB#[7..0] MAB13 T3 B8 MDB13 MAB13 T3 B8 MDB25 MAB13 T3 B8 MDB41 MDB60 MAB13 T3 B8 MDB60 MDB41
16 DQMB#[7..0] A13 DQU6 A13 DQU6 A13 DQU6 A13 DQU6
T7 A3 MDB8 T7 A3 MDB30 T7 A3 MDB44 MDB59 T7 A3 MDB59 MDB44
A14 DQU7 A14 DQU7 A14 DQU7 A14 DQU7
M7 A15/BA3 M7 A15/BA3 M7 A15/BA3 M7 A15/BA3
+1.5VGS +1.5VGS +1.5VGS +1.5VGS
M2 B2 B_BA0 M2 B2 B_BA0 M2 B2 B_BA0 M2 B2

QSB[7..0] 16 B_BA0 BA0 VDD BA0 VDD BA0 VDD BA0 VDD
N8 D9 B_BA1 N8 D9 B_BA1 N8 D9 B_BA1 N8 D9
16 QSB[7..0] 16 B_BA1 BA1 VDD BA1 VDD BA1 VDD BA1 VDD
M3 G7 B_BA2 M3 G7 B_BA2 M3 G7 B_BA2 M3 G7
16 B_BA2 BA2 VDD BA2 VDD BA2 VDD BA2 VDD
VDD N1 VDD N1 VDD N1 VDD N1
J7 N9 CLKB0 J7 N9 J7 N9 CLKB1 J7 N9
16 CLKB0 CK VDD CK VDD 16 CLKB1 CK VDD CK VDD
K7 R1 CLKB0# K7 R1 K7 R1 CLKB1# K7 R1
QSB#[7..0] 16 CLKB0# CK VDD CK VDD 16 CLKB1# CK VDD CK VDD
K9 R9 CKEB0 K9 R9 K9 R9 CKEB1 K9 R9
16 QSB#[7..0] 16 CKEB0 CKE/CKE0 VDD +1.5VGS CKE/CKE0 VDD +1.5VGS 16 CKEB1 CKE/CKE0 VDD +1.5VGS CKE/CKE0 VDD +1.5VGS
K1 A1 ODTB0 K1 A1 K1 A1 ODTB1 K1 A1
16 ODTB0 ODT/ODT0 VDDQ ODT/ODT0 VDDQ 16 ODTB1 ODT/ODT0 VDDQ ODT/ODT0 VDDQ
L2 A8 CSB0#_0 L2 A8 L2 A8 CSB1#_0 L2 A8
16 CSB0#_0 CS/CS0 VDDQ CS/CS0 VDDQ 16 CSB1#_0 CS/CS0 VDDQ CS/CS0 VDDQ
J3 C1 RASB0# J3 C1 J3 C1 RASB1# J3 C1
16 RASB0# RAS VDDQ RAS VDDQ 16 RASB1# RAS VDDQ RAS VDDQ
K3 C9 CASB0# K3 C9 K3 C9 CASB1# K3 C9
16 CASB0# CAS VDDQ CAS VDDQ 16 CASB1# CAS VDDQ CAS VDDQ
L3 D2 WEB0# L3 D2 L3 D2 WEB1# L3 D2
16 WEB0# WE VDDQ WE VDDQ 16 WEB1# WE VDDQ WE VDDQ
VDDQ E9 VDDQ E9 VDDQ E9 VDDQ E9
VDDQ F1 VDDQ F1 VDDQ F1 VDDQ F1
QSB2 F3 H2 QSB0 F3 H2 QSB4 QSB6 F3 H2 QSB6 QSB4 F3 H2
QSB1 DQSL VDDQ QSB3 DQSL VDDQ QSB7 QSB5 DQSL VDDQ QSB5 QSB7 DQSL VDDQ
C7 DQSU VDDQ H9 C7 DQSU VDDQ H9 C7 DQSU VDDQ H9 C7 DQSU VDDQ H9
DQMB#2 E7 A9 DQMB#0 E7 A9 DQMB#5 DQMB#6 E7 A9 DQMB#6 DQMB#4 E7 A9

DQMB#1 DML VSS DQMB#3 DML VSS DQMB#7 DQMB#5 DML VSS DQMB#5 DQMB#7 DML VSS
D3 DMU VSS B3 D3 DMU VSS B3 D3 DMU VSS B3 D3 DMU VSS B3
VSS E1 VSS E1 VSS E1 VSS E1
VSS G8 VSS G8 VSS G8 VSS G8
QSB#2 G3 J2 QSB#0 G3 J2 QSB#4 QSB#6 G3 J2 QSB#6 QSB#4 G3 J2
QSB#1 DQSL VSS QSB#3 DQSL VSS QSB#7 QSB#5 DQSL VSS QSB#5 QSB#7 DQSL VSS
C B7 DQSU VSS J8 B7 DQSU VSS J8 B7 DQSU VSS J8 B7 DQSU VSS J8 C
CLKB0 1 2 M1 M1 M1 M1
PX@RV107
PX@RV107 40.2_0402_1% VSS VSS VSS VSS
VSS P1 VSS P1 VSS P1 VSS P1
T2 P9 DRAM_RST# T2 P9 DRAM_RST# T2 P9 DRAM_RST# T2 P9
16,19 DRAM_RST# RESET VSS RESET VSS RESET VSS RESET VSS
CLKB0# 1 2 T1 T1 T1 T1
PX@RV108
PX@RV108 40.2_0402_1% VSS VSS VSS VSS
L8 ZQ/ZQ0 VSS T9 L8 ZQ/ZQ0 VSS T9 L8 ZQ/ZQ0 VSS T9 L8 ZQ/ZQ0 VSS T9
1
CV224
1
1
0.01U_0402_16V7K J1 B1 J1 B1 J1 B1 J1 B1
PX@ RV109 NC/ODT1 VSSQ RV110 NC/ODT1 VSSQ RV111 NC/ODT1 VSSQ RV112 NC/ODT1 VSSQ
L1 B9 L1 B9 L1 B9 L1 B9
2
NC/CS1 VSSQ NC/CS1 VSSQ NC/CS1 VSSQ NC/CS1 VSSQ

240_0402_1% J9 NC/CE1 VSSQ D1 240_0402_1% J9 NC/CE1 VSSQ D1 240_0402_1% J9 NC/CE1 VSSQ D1 240_0402_1% J9 NC/CE1 VSSQ D1
PX@ L9 D8 PX@ L9 D8 PX@ L9 D8 PX@ L9 D8
NCZQ1 VSSQ NCZQ1 VSSQ NCZQ1 VSSQ NCZQ1 VSSQ
E2 E2 E2 E2
2
2
VSSQ VSSQ VSSQ VSSQ
VSSQ E8 VSSQ E8 VSSQ E8 VSSQ E8
VSSQ F9 VSSQ F9 VSSQ F9 VSSQ F9
CLKB1 1 2
PX@RV113
PX@RV113 40.2_0402_1% 96-BALL 96-BALL 96-BALL 96-BALL
SDRAM DDR3 SDRAM DDR3 SDRAM DDR3 SDRAM DDR3
H5TQ2G63BFR-11C_FBGA96 H5TQ2G63BFR-11C_FBGA96 H5TQ2G63BFR-11C_FBGA96 H5TQ2G63BFR-11C_FBGA96
CLKB1# 1 2
PX@RV114
PX@RV114 40.2_0402_1%
1
CV225
0.01U_0402_16V7K
PX@
2
+1.5VGS +1.5VGS +1.5VGS +1.5VGS +1.5VGS +1.5VGS +1.5VGS +1.5VGS

B B
1
1
RV115 RV116 RV117 RV118 RV119 RV120 RV121 RV122
4.99K_0402_1% 4.99K_0402_1% 4.99K_0402_1% 4.99K_0402_1% 4.99K_0402_1% 4.99K_0402_1% 4.99K_0402_1% 4.99K_0402_1%
PX@ PX@ PX@ PX@ PX@ PX@ PX@ PX@
2
2
VREFD_Q1_B VREFC_A1_B VREFC_A2_B VREFD_Q2_B VREFC_A3_B VREFD_Q3_B VREFC_A4_B VREFD_Q4_B
CV226
CV227
CV229
CV230
CV231
CV232
CV233
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
1
1
CV228
0.1U_0402_16V7K
1 1 1 1 1 1 1
1
1 RV124 RV125 RV126 RV128 RV127 RV129 RV130

RV123 4.99K_0402_1% 4.99K_0402_1% 4.99K_0402_1% 4.99K_0402_1% 4.99K_0402_1% 4.99K_0402_1% 4.99K_0402_1%
4.99K_0402_1% PX@ PX@ PX@ PX@ PX@ PX@ PX@
2 2 2 2 2 2 2
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
2
2
2
PX@
2
+1.5VGS
+1.5VGS
+1.5VGS +1.5VGS
CV234
CV235
CV236
CV237
CV238
CV239
CV240
CV241
CV242
CV243
CV244
CV245
CV246
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
CV247
CV248
CV249
CV250
CV251
CV252
CV253
CV254
CV255
CV256
CV257
CV258
CV259
CV260
CV261
CV262
CV263
CV264
CV265
CV266
CV267
CV268
CV269
CV270
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1 1 1 1 1 1 1 1 1 1 1 1 1
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
2 2 2 2 2 2 2 2 2 2 2 2 2
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
A A

C A
4019I5
5 4 3 2 1
5 4 3 2 1
UT1
+3VS
+AVDD12 1 AVDD12
ANX3112
APU_LVDS_DAT 1 2 10 APU_TXOUT0- APU_TXOUT0- 22
RT5 4.7K_0402_5% LVDS_L0_N APU_TXOUT0+
+AVDD33 4 AVDD25 LVDS_L0_P 11 APU_TXOUT0+ 22
APU_LVDS_CLK 1 2 16
RT6 4.7K_0402_5% AVDD25 APU_TXOUT1-
19 AVDD25 LVDS_L1_N 12 APU_TXOUT1- 22
35 13 APU_TXOUT1+ APU_TXOUT1+ 22
D AVDD25 LVDS_L1_P D
+1.2VS +DVDD12
20mil +DVDD12 5 DVDD12 LVDS_L2_N 14 APU_TXOUT2-
APU_TXOUT2+
APU_TXOUT2- 22
25 DVDD12 LVDS_L2_P 15 APU_TXOUT2+ 22
LT1 2 1
FBMA-L11-201209-221LMA30T_0805 6 2 1 1:test mode
TEST_EN 10K_0402_5% RT21
+DVDD33 8 DVDD25 0:normal mode
0.1U_0402_16V4Z
CT20
0.1U_0402_16V4Z
CT19
0.1U_0402_16V4Z
CT1
0.1U_0402_16V4Z
CT2
.01U_0402_16V7K
CT3
.01U_0402_16V7K
CT4
2.2U_0603_6.3V4Z
CT5
22 DVDD25
1 1 1 1 2 2 1 17 APU_TXOUT_CLK- APU_TXOUT_CLK- 22
LVDS_CLKL_N APU_TXOUT_CLK+
LVDS_CLKL_P 18 APU_TXOUT_CLK+ 22
DP0_TXP0_C 2
2 2 2 2 1 1 2 8 DP0_TXP0_C DPRX_LN0_P
DP0_TXN0_C 3 1 2
8 DP0_TXN0_C DPRX_LN0_N CT6 100P_0402_50V8J
36 R_BIAS 2 1
R_BIAS RT22 12K_0402_1%
22 TL_ENVDD 9 DIGON
21 TL_BKOFF#
BL_EN
10,13,25,31,32 APU_PCIE_RST# 7 RESET_L
30 CSCL
+1.2VS +AVDD12 CFG_SCL
20mil 22 APU_LVDS_CLK APU_LVDS_CLK
APU_LVDS_DAT
28 DDC_CLK CSDA
22 APU_LVDS_DAT 29 DDC_DATA CFG_SDA 31
LT2 2 1
FBMA-L11-201209-221LMA30T_0805
C C
10 LVDS_HPD 32 23 T31
DPRX_HPD PROG_SCL
0.1U_0402_16V4Z
CT22
0.1U_0402_16V4Z
CT21
0.1U_0402_16V4Z
CT7
0.1U_0402_16V4Z
CT8
.01U_0402_16V7K
CT9
.01U_0402_16V7K
CT10
2.2U_0603_6.3V4Z
CT11
1 2
1 1 1 1 2 2 1 RT17 100K_0402_5% 24 T33
DP0_AUXN_C PROG_SDA
8 DP0_AUXN_C 33 DPRX_AUX_N
DP0_AUXP_C 34
8 DP0_AUXP_C DPRX_AUX_P
2 2 2 2 1 1 2
22 TL_INVT_PWM 1 RT18 2 26 VARY_BL AVSS 20
0_0402_5%
10 APU_INVT_PWM 1 RT19 2 27 CPU_VARY_BL
0_0402_5%
Epad 37
12/01 Swap DP0_AUXP_C/DP0_AUXN_C for vender guidline ANX3112_QFN36_6X6

+3VS +DVDD33
20mil +3VS
LT3 2 1
FBMA-L11-201209-221LMA30T_0805 DP0_AUXP_C @
RT23 1M_0402_5%
0.1U_0402_16V4Z
CT12
2.2U_0603_6.3V4Z
CT13
DP0_AUXN_C @
1 1 RT24 1M_0402_5%
B B
2 2 Place via on each trace bus and let resistor very close the via +3VS
2
QT1A
RT14 @
1 2 CSDA 1 6 EC_SMB_DA2
ENBKL 10,37 EC_SMB_DA2 14,35,37,8
0_0402_5%
RT15 DMN66D0LDW-7_SOT363-6
5
+3VS TL_BKOFF# 1 @ 2 QT1B
+AVDD33 DISPOFF# 22
LT4 2
20mil 0_0402_5%
CSCL
@
EC_SMB_CK2
1 4 3 EC_SMB_CK2 14,35,37,8
FBMA-L11-201209-221LMA30T_0805 RT20
BKOFF# 1 2 DMN66D0LDW-7_SOT363-6
37 BKOFF#
0_0402_5%
0.1U_0402_16V4Z
CT23
0.1U_0402_16V4Z
CT14
0.1U_0402_16V4Z
CT15
.01U_0402_16V7K
CT16
.01U_0402_16V7K
CT17
2.2U_0603_6.3V4Z
CT18
1 1 1 2 2 1
2 2 2 1 1 2
A A

B A
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 4019I5
5 4 3 2 1
5 4 3 2 1
+LCDVDD
Panel +LCDVDD Control 12/26 modified. +3VS
1
R707 +3VALW 60mils
100_0402_1% 1
C1153
1
4.7U_0603_6.3V6K
6 2
R708
10K_0402_5% 2
B+
12/26 modified.
3
Q28A +INVPWR_B+
2
DMN66D0LDW-7_SOT363-6 2 2 1 2 Q29 C1155
D
R709 200K_0402_1% AP2301GN-HF_SOT23-3 40mils L36 40mils 680P_0402_50V7K D
1 1 2 2 1
3
+LCDVDD FBMA-L11-201209-221LMA30T_0805
Q28B
C1152 60mils 2 1
1
.047U_0402_16V7K
2
4.7U_0603_6.3V6K
R712 1 2 0_0402_5% 5 C1156
21 TL_ENVDD
1 1 68P_0402_50V8J
C1149
C1154
4
0.1U_0402_16V4Z
R713
100K_0402_5% 2 2
1
DISPOFF# 1 2
C1163 220P_0402_50V7K
INVT_PWM 1 2
C1164 220P_0402_50V7K
C C
LVDS Connector
JLVDS1
+LCDVDD 1 1
2 2
3 3
4 4
21 APU_LVDS_CLK 5 5
21 APU_LVDS_DAT 6 6
21 APU_TXOUT0+ 7 7
Panel PWM Control 21 APU_TXOUT0- 8
9
8
9
EC_INVT_PWM 1 @ 2 INVT_PWM 10
37 EC_INVT_PWM 21 APU_TXOUT1+ 10
R716 0_0402_5% <Translator LVDS Output> 21 APU_TXOUT1- 11 11
2
12 12
R719 13
21 APU_TXOUT2+ 13
100K_0402_5% 14
21 APU_TXOUT2- 14
15 15
TL_INVT_PWM 1 2 16
21 TL_INVT_PWM 21 APU_TXOUT_CLK+
1
R721 0_0402_5% 16
21 APU_TXOUT_CLK- 17 17
18 18
USB20_N5_R 19
USB20_P5_R 19
20 20
DISPOFF# 21
21 DISPOFF# 21
INVT_PWM 22 22
+INVPWR_B+ 23 23
24 24
B 25 B
R972 0_0402_5% 25
1 2 26 26
+3VS 27 27
1 2 USB20_N5_R 28
27 USB20_N5 1 2 28
D_MIC_CLK 29
L90 @ OCE2012120YZF_4P 33 D_MIC_CLK D_MIC_DATA 29
33 D_MIC_DATA 30 30
4 4 3 USB20_P5_R
27 USB20_P5 3
31 GND
R975 1 2 0_0402_5% 32 GND
3
33 GND
D1 34
3
SCA00001L00 GND
35 GND
1
STARC_111H30-000000-G4-R
USB20_P5_R PESD5V0U2BT CONN@
1
USB20_N5_R
2
D6
no updated.
2
SCA00001L00
@
11/10 follow QCL50
1
PESD5V0U2BT
1
A A

Rev
Custom A
4019I5
5 4 3 2 1
5 4 3 2 1
+3VS +3VS +HDMI_5V_OUT

JHDMI1
HDMI_HPD 19 HP_DET
+HDMI_5V_OUT 18 +5V
2
4.7K_0402_5%
4.7K_0402_5%
17 DDC/CEC_GND
HDMI_SDATA 16
R748 HDMI_SCLK SDA
15 SCL
1
2K_0402_1%
2K_0402_1%
0_0402_5% 14 Reserved
R745
R746
R749
R750
13
1
HDMI_R_CK- CEC
12 CK-
D D
11 CK_shield
HDMI_R_CK+ 10
2
HDMI_R_D0- CK+
9 D0-
2
8 D0_shield
HDMI_R_D0+ 7
HDMI_SCLK HDMI_R_D1- D0+
1 6 6 D1-
8 APU_HDMI_CLK
5 D1_shield
HDMI_R_D1+ 4 23
Q32A D1+ GND
5
Q32B HDMI_R_D2- 3 22
2N7002KDW_SOT363-6 2N7002KDW_SOT363-6 D2- GND
2 D2_shield GND 21
4 3 HDMI_SDATA HDMI_R_D2+ 1 20
8 APU_HDMI_DATA D2+ GND
TYCO_2041343-1~D
CONN@
+3VS +5VS
4.7K_0402_5%
2
1 R74
R73 12/7 Swap signlas for routing smoothly
1K_0402_5%
C C
2
HDMI_C_CLK- R756 1 2 0_0402_5% HDMI_R_CK-
6
8 DP2_HPD 2 1 C4706 @
R771 0_0402_5% 1 2 33P_0402_50V8J
L38 1 2
For APU_HDMI_HPD 5 2 HDMI_HPD WCM2012F2S-900T04_0805
Q96B Q96A @ 4 4 3
3
2
DMN66D0LDW-7_SOT363-6 DMN66D0LDW-7_SOT363-6
1
HDMI_C_CLK+ 1 2 HDMI_R_CK+
R75 R765 0_0402_5% C4707 @
100K_0402_5% 33P_0402_50V8J
HDMI_C_TX0- R769 1 2 0_0402_5% HDMI_R_D0-
1
C4708 @
1 1 2 33P_0402_50V8J
L39 2
WCM2012F2S-900T04_0805
@ 4 4 3
3
HDMI_C_TX0+ 1 2 HDMI_R_D0+
R779 0_0402_5% C4709 @
33P_0402_50V8J
HDMI_C_TX1- R781 1 2 0_0402_5% HDMI_R_D1-
B C4710 @ B
L Close to HDMI conn L40

1 1 2 2 33P_0402_50V8J
WCM2012F2S-900T04_0805
@ 4 4 3
3
C1166 2 1 .1U_0402_16V7K HDMI_C_TX2- R784 1 2 604_0402_1% HDMI_C_TX1+ 1 2 HDMI_R_D1+
8 APU_HDMI_TXD2-
1
C1167 2 1 .1U_0402_16V7K HDMI_C_TX2+ R786 1 2 604_0402_1% Q35 R782 0_0402_5% C4711 @
8 APU_HDMI_TXD2+ D
2N7002K_SOT23-3 33P_0402_50V8J
C1168 2 1 .1U_0402_16V7K HDMI_C_TX1- R788 1 2 604_0402_1% +HDMI_5V_OUT 2 HDMI_C_TX2- R783 1 2 0_0402_5% HDMI_R_D2-
8 APU_HDMI_TXD1-
C1169 2 1 .1U_0402_16V7K HDMI_C_TX1+ R790 1 2 604_0402_1% G C4712 @
8 APU_HDMI_TXD1+
1
From APU C1170 2 1 .1U_0402_16V7K HDMI_C_TX0- R792 1 2 604_0402_1% R801
S
L41
1 1 2 2 33P_0402_50V8J
8 APU_HDMI_TXD0-
3
C1171 2 1 .1U_0402_16V7K HDMI_C_TX0+ R795 1 2 604_0402_1% WCM2012F2S-900T04_0805
8 APU_HDMI_TXD0+
100K_0402_5% @ 4 4 3
C1172 2 3
8 APU_HDMI_TXC- 1 .1U_0402_16V7K HDMI_C_CLK- R797 1 2 604_0402_1%
2
C1173 2 1 .1U_0402_16V7K HDMI_C_CLK+ R799 1 2 604_0402_1% HDMI_C_TX2+ 1 2 HDMI_R_D2+
8 APU_HDMI_TXC+
R794 0_0402_5% C4713 @
33P_0402_50V8J
A A

B A
4019I5
5 4 3 2 1
A B C D E
2
+CRT_VCC
W=40mils
@ @
Combine with HDMI
D20 D21
C
R
T
C
o
n
n
e
c
t
o
r
PJDLC05C_SOT23-3 PJDLC05C_SOT23-3
T19
1
1 1
FCH_CRT_R L42 1 2 CRT_R_2 JCRT1

26 FCH_CRT_R
FCM2012CF-800T06_2P 6
11
FCH_CRT_G L43 1 2 CRT_G_2 1
26 FCH_CRT_G
FCM2012CF-800T06_2P 7
12
FCH_CRT_B L44 1 2 CRT_B_2 2
26 FCH_CRT_B
FCM2012CF-800T06_2P 8
10P_0402_50V8J
10P_0402_50V8J
10P_0402_50V8J
10P_0402_50V8J
10P_0402_50V8J
10P_0402_50V8J
13
1
150_0402_1%
150_0402_1%
150_0402_1%
1 1 1 1 1 1 3
C1175
C1176
C1177
C1178
C1179
C1180
9
R805
R806
R807
14 G 16
4 G 17
2 2 2 2 2 2
10
2
2
15
1 5
C1181
C-H_13-12201503CP
100P_0402_50V8J CONN@
+CRT_VCC 2 T20
12/27 change to 10 ohm.
R808 CRT_HSYNC_2
11/20 update footprint
2 1 2 2
1 2 2 1 L45 10_0402_5% FCH_CRT_DDC_SDA
C1182 0.1U_0402_16V4Z
10K_0402_5% 1 2 CRT_VSYNC_2 1
5
U23 L46 10_0402_5% 1 1

74AHCT1G125GW_SOT353-5
P
OE#
FCH_CRT_HSYNC 2 CRT_HSYNC_1 C1183 C1184 FCH_CRT_DDC_SCL

26 FCH_CRT_HSYNC A Y 4 10P_0402_50V8J 10P_0402_50V8J C1185 2
G
@ 2 2 @ 68P_0402_50V8J 1
3
C1186
+CRT_VCC 68P_0402_50V8J
12/27 @ 2
C1187 1 2 0.1U_0402_16V4Z
5
1
P
OE#
FCH_CRT_VSYNC 2 4 CRT_VSYNC_1
26 FCH_CRT_VSYNC A Y
G
U24
74AHCT1G125GW_SOT353-5
3
3 3
+CRT_VCC
W=40mils 12/05 Change D22 to standard part

+5VS 1 2
1
F1
1.1A_6V_SMD1812P110TF R812 R813
4.7K_0402_5% 4.7K_0402_5%
3
2
2
NC
D22 D63
2
BAT1000-7-F_SOT23-3~D RB751V_SOD323 FCH_CRT_DDC_SDA
26 FCH_CRT_DDC_SDA
1
1
+CRT_VCC +HDMI_5V_OUT FCH_CRT_DDC_SCL

26 FCH_CRT_DDC_SCL
+CRT_VCC
W=40mils
1 1
C1165
C1174 0.1U_0402_16V4Z
0.1U_0402_16V4Z
2 2
4 4

B A
4019I5
A B C D E
A B C D E
U25A
C1188 1 2 150P_0402_50V8J
HUDSON-2
PCI Host Bus Reset (To EC) APU_PCIE_RST#_C AE2 AF3 +3VALW
R825 1 PCIE_RST# PCICLK0
2 33_0402_5% For PCIE device reset on FS1 C1193
PCI CLKS
37 PLT_RST# AD5 A_RST# PCICLK1/GPO36 AF1 PCI_CLK1 28
AF5 @ 1 2
C1189 1 .1U_0402_16V7K UMI_MTX_FRX_P0 PCICLK2/GPO37 (GFX,GLAN,WLAN,LVDS Travis)
6 UMI_MTX_C_FRX_P0 2 AE30 UMI_TX0P PCICLK3/GPO38 AG2 PCI_CLK3 28
C1190 1 2 .1U_0402_16V7K UMI_MTX_FRX_N0 AE32 AF6 0.1U_0402_16V4Z
6 UMI_MTX_C_FRX_N0 UMI_TX0N PCICLK4/14M_OSC/GPO39 PCI_CLK4 28
5
C1191 1 2 .1U_0402_16V7K UMI_MTX_FRX_P1 AD33
6 UMI_MTX_C_FRX_P1 UMI_TX1P
C1192 1 2 .1U_0402_16V7K UMI_MTX_FRX_N1 AD31 AB5 2 NC7SZ08P5X_NL_SC70-5
P
6 UMI_MTX_C_FRX_N1 UMI_TX1N PCIRST# B
C1196 1 2 .1U_0402_16V7K UMI_MTX_FRX_P2 AD28 APU_PCIE_RST#_C R829 1 2 33_0402_5% 4
6 UMI_MTX_C_FRX_P2 UMI_TX2P Y APU_PCIE_RST# 10,13,21,31,32
C1197 1 2 .1U_0402_16V7K UMI_MTX_FRX_N2 AD29 @ 1
6 UMI_MTX_C_FRX_N2 UMI_TX2N A
G
C1198 1 2 .1U_0402_16V7K UMI_MTX_FRX_P3 AC30 AJ3 1 U26
6 UMI_MTX_C_FRX_P3 UMI_TX3P AD0/GPIO0
C1194 1 2 .1U_0402_16V7K UMI_MTX_FRX_N3 AC32 AL5 C1195 R826 @
6 UMI_MTX_C_FRX_N3
3
UMI_TX3N AD1/GPIO1 150P_0402_50V8J @ 8.2K_0402_5%
AD2/GPIO2 AG4
1 UMI_FTX_C_MRX_P0 @ 1
6 UMI_FTX_C_MRX_P0 AB33 UMI_RX0P AD3/GPIO3 AL6
UMI_FTX_C_MRX_N0 2
AB31 AH3
PCI EXPRESS INTERFACES

6 UMI_FTX_C_MRX_N0
1
UMI_FTX_C_MRX_P1 UMI_RX0N AD4/GPIO4
6 UMI_FTX_C_MRX_P1 AB28 UMI_RX1P AD5/GPIO5 AJ5
UMI_FTX_C_MRX_N1 AB29 AL1
6 UMI_FTX_C_MRX_N1 UMI_RX1N AD6/GPIO6
UMI_FTX_C_MRX_P2 Y33 AN5
6 UMI_FTX_C_MRX_P2 UMI_RX2P AD7/GPIO7
UMI_FTX_C_MRX_N2 Y31 AN6
UMI_FTX_C_MRX_P3 Y28 AJ1 R860 1 2 0_0402_5%
6 UMI_FTX_C_MRX_P3 UMI_RX3P AD9/GPIO9
UMI_FTX_C_MRX_N3 Y29 AL8
R827 1 AD11/GPIO11 AL3 <SI> Reserved.
2 590_0402_1% PCIE_CALRP AF29 PCIE_CALRP AD12/GPIO12 AM7
R828 1 2 2K_0402_1% PCIE_CALRN AF31 AJ6 +3VALW
+PCIE_VDDR_FCH PCIE_CALRN AD13/GPIO13
AD14/GPIO14 AK7
L PCIE_CALRP R=50ohm, 4mil,<1000mil V33 GPP_TX0P AD15/GPIO15 AN8
V31 AG9
PCIE_CALRN R=50ohm, 4mil,<1000mi GPP_TX0N AD16/GPIO16
2.2K_0402_5%
2.2K_0402_5%
W30 GPP_TX1P AD17/GPIO17 AM11
1
W32 GPP_TX1N AD18/GPIO18 AJ10
AB26 AL12 DIS@ DIS@
GPP_TX2P AD19/GPIO19
R45
R43
AB27 GPP_TX2N AD20/GPIO20 AK11
AA24 GPP_TX3P AD21/GPIO21 AN12
AA23 AG12
2
GPP_TX3N AD22/GPIO22 FCH_GPIO189
AD23/GPIO23 AE12 PCI_AD23 28
AA27 AC12 FCH_GPIO190
GPP_RX0P AD24/GPIO24 PCI_AD24 28
AA26 GPP_RX0N AD25/GPIO25 AE13 PCI_AD25 28
W27
PCI INTERFACE
GPP_RX1P AD26/GPIO26 AF13 PCI_AD26 28
V27 GPP_RX1N AD27/GPIO27 AH13 PCI_AD27 28
V26 AH14 VGA_PWRGD_R Change to GPIO51
GPP_RX2P AD28/GPIO28 T26
1
100K_0402_5%
100K_0402_5%
W26 GPP_RX2N AD29/GPIO29 AD15
FCH_GPIO189
HDDHALT_LED# 40 12/19 Change GPIO pin. UMA@ UMA@
W24 GPP_RX3P AD30/GPIO30 AC15
W23 GPP_RX3N AD31/GPIO31 AE16 FCH_GPIO190 12/19 Change GPIO pin.
CBE0# AN3
R46
R44
AJ8 Project SKU ID
2
CBE1#
CBE2# AN10
2
+1.1VS_CKVDD R833 1 2 2K_0402_1% CLK_CALRN F27 AD12 GPIO189 (use VGA) L(NO) H(YES) DIS is High 2
CLK_CALRN CBE3#
AG10 R44 R43
FRAME# GPIO190 (use PX) L(NO) H(YES)
DEVSEL# AK9 DIS is High
AL10 CRCLK_REQ# 1 2 +3VS R46 R45
IRDY# R835 8.2K_0402_5%
G30 PCIE_RCLKP TRDY# AF10
SS For "EXT" CLK mode, input to PCIE, G28 PCIE_RCLKN PAR AE10
APU_DISP_CLKP STOP# AH1 Del USB3.0_CLKREQ# PH.

8 APU_DISP_CLKP R26 DISP_CLKP PERR# AM9
APU DISP APU_DISP_CLKN T26 AH8 LPC_CLK0_EC 1 2 1 2
8 APU_DISP_CLKN DISP_CLKN SERR# GPIO0 37
AG15 R58 @ 10_0402_5% C44 @ 10P_0402_50V8J
REQ0#
NSS H33
H31
DISP2_CLKP REQ1#/GPIO40 AG13
AF15 For EMI Requirement Close to U25
DISP2_CLKN REQ2#/CLK_REQ8#/GPIO41 CRCLK_REQ#
REQ3#/CLK_REQ5#/GPIO42 AM17
APU_CLKP T24 AD16
8 APU_CLKP APU_CLKP GNT0#
APU APU_CLKN T23 AD13 R854 1 @ 2 0_0402_5%
8 APU_CLKN APU_CLKN GNT1#/GPO44 PX_GPU_RST# 13,27
AD21 R873 1 @ 2 0_0402_5%
GNT2#/SD_LED/GPO45 PXS_PWREN 15,27,37,48,52,53,56 +RTCBATT
CLK_PEG_VGA J30 AK17 T24
13 CLK_PEG_VGA SLT_GFX_CLKP GNT3#/CLK_REQ7#/GPIO46
VGA CLK_PEG_VGA# K29 AD19
13 CLK_PEG_VGA# SLT_GFX_CLKN CLKRUN#
LOCK# AH9
+3VS 20mils
2
PX@C4714
PX@C4714
1 H27 GPP_CLK0P 12/19 add PH to +3VS.
2 122P_0402_50V8J H28 GPP_CLK0N INTE#/GPIO32 AF18 JRTC1
PX@C4715
PX@C4715 22P_0402_50V8J
INTF#/GPIO33 AE18
R1044
2 1
10K_0402_5%
12/01 change to INTH for BIOS request 1 1
J27 GPP_CLK1P INTG#/GPIO34 AC16 2 2
K26 AD18 ACCEL_INT# 3
GPP_CLK1N INTH#/GPIO35 ACCEL_INT# 38 G1
2 1 4 G2
CLK_PCIE_MINI1 F33 R1045 @ 10K_0402_5%
CLOCK GENERATOR
32 CLK_PCIE_MINI1 GPP_CLK2P
Wireless LAN CLK_PCIE_MINI1# F31 ACES_50273-0020N-001
32 CLK_PCIE_MINI1# GPP_CLK2N LPC_CLK0_EC
SS CLK_PCIE_LAN E33
LPCCLK0 B25 LPC_CLK0_EC 28,32,37
APU_PG/APU_RST#/LDT_STP# : OD pin
CONN@
31 CLK_PCIE_LAN GPP_CLK3P
Ethernet LAN CLK_PCIE_LAN# E31 D25 LPC_CLK1 DMA_ACTIVE# : IN/OD, 0.8V threshold
31 CLK_PCIE_LAN# GPP_CLK3N LPCCLK1 LPC_CLK1 28
D27 LPC_AD0 PROCHOT# : IN, 0.8V threshold
LAD0 LPC_AD0 32,37
M23 C28 LPC_AD1 LDT_STP : No use, NC
3 GPP_CLK4P LAD1 LPC_AD1 32,37 3
M24 A26 LPC_AD2 LPC_AD2 32,37 DMA active. The FCH drives the DMA_ACTIVE# to
GPP_CLK4N LAD2 LPC_AD3
LPC
LAD3 A29 LPC_AD3 32,37 APU to notify DMA activity. This will cause the APU
M27 A31 LPC_FRAME#
GPP_CLK5P LFRAME# LPC_FRAME# 32,37 to reestablish the UMI link quicker.
M26 GPP_CLK5N LDRQ0# B27
LDRQ1#/CLK_REQ6#/GPIO49 AE27
SERIRQ
Del USB3.0_CLKREQ#
N25 GPP_CLK6P SERIRQ/GPIO48 AE19 SERIRQ 37
N26 GPP_CLK6N APU_PWRGD
R23 C41 33P_0402_50V8J
GPP_CLK7P ALLOW_STOP APU_RST#
R24 GPP_CLK7N DMA_ACTIVE# G25 ALLOW_STOP 8
E28 EC_THERM_R# 1 @ 2 C42 33P_0402_50V8J
PROCHOT# EC_THERM# 37,45,54,8
N27 E26 APU_PWRGD R853 0_0402_5% for ESD Close FCH Side
GPP_CLK8P APU_PG APU_PWRGD 54,8
APU
R27 GPP_CLK8N LDT_STP# G26

F26 APU_RST#
APU_RST# APU_RST# 8
+RTCBATT
L 25M_X1 and 25M_X1_R=50ohm, 4mil J26 14M_25M_48M_OSC
1
H7
25M_X2=50ohm, 4mil S5_CORE_EN
F1 RTC_CLK_R 1 2 RTC_CLK 28,37
R857
RTCCLK R855 22_0402_5%
INTRUDER_ALERT# F3 1K_0402_5%
1
C1200
2 25M_X1_R 1
R856
2
0_0402_5%
25M_X1 C31 25M_X1 VDDBT_RTC_G E6 RTCVCC_R RTC_CLK_R=50ohm, 4mil
S5 PLUS
L RTC_CLK=50ohm, 4mil
2
1
27P_0402_50V8J G2 32K_X1
32K_X1
X1
R858
25M_X2
W>=15mils
1M_0402_5% C33 25M_X2
W>=15mils +RTCVCC D23
2
32K_X2 G4 32K_X2 W>=15mils 2

1 2 1 2 1
C1201 25MHZ_20PF_7A25000012 R859 510_0402_5% 3 +3VLP
0.1U_0402_16V4Z
27P_0402_50V8J 1 1
2
HUDSON-M2_FCBGA656 C1202 C1203 1 BAV70W_SOT323-3
0.1U_0402_16V4Z 1U_0402_6.3V6K J1 C1204
2
2 2 J1 for Clear CMOS @ JUMP_43X39
4
Under RAM door 2 L D23 close to U25 (FCH) 4
1
1 2 32K_X1
C1205
1
C1205,C1206 15P_0402_50V8J X5
1
Change for G3 4 OSC NC 3

L 32K_X1=50ohm, 4mil,<1500mil
RTC timing issue R861 1 2 32K_X2=50ohm, 4mil,<1500mil
20M_0402_5% OSC NC
<improve amplitude> 32.768KHZ_12.5PF_Q13MC14610002 Security Classification Compal Secret Data Compal Electronics, Inc.
2
SJ100006600 2011/07/08 2015/07/08 Title

32K_X2
Issued Date Deciphered Date
C1206
1 2
15P_0402_50V8J Close to HUDSON-M2 AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
A B C D E
A B C D E
U25B
&UH1
+3VALW 4MB SPI ROM
30 SATA_STX_DRX_P0
SATA_STX_DRX_P0 AK19 SATA_TX0P
HUDSON-2
SD_CLK/SCLK_2/GPIO73 AL14
& Non-share ROM.
SATA_STX_DRX_N0 AM19 AN14 2 1
30 SATA_STX_DRX_N0 SATA_TX0N SD_CMD/SLOAD_2/GPIO74
HDD1 SATA_DTX_SRX_N0 SD_CD/GPIO75 AJ12 680P_0402_50V7K C4716
30 SATA_DTX_SRX_N0 AL20 SATA_RX0N SD_WP/GPIO76 AH12 2 1
SD CARD
SATA_DTX_SRX_P0 AN20 AK13 W25Q32BVSSIG SOIC 8P 0.1U_0402_16V4Z C466 UH1 CONN@
30 SATA_DTX_SRX_P0 SATA_RX0P SD_DATA0/SDATI_2/GPIO77
SD_DATA1/SDATO_2/GPIO78 AM13 8 VCC VSS 4
SATA_STX_DRX_P1 AN22 AH15
30 SATA_STX_DRX_P1 SATA_TX1P SD_DATA2/GPIO79
SATA_STX_DRX_N1 AL22 AJ14 1 2 FCH_SPI_WP# 3
30 SATA_STX_DRX_N1 SATA_TX1N SD_DATA3/GPIO80 W
ODD SATA_DTX_SRX_N1
R934 10K_0402_5%
30 SATA_DTX_SRX_N1 AH20 SATA_RX1N GBE_COL AC4 2 1 FCH_SPI_HOLD# 7 HOLD
SATA_DTX_SRX_P1 AJ20 AD3 R935 10K_0402_5%
1 30 SATA_DTX_SRX_P1 SATA_RX1P GBE_CRS 1
AD9 1 2 FCH_SPI_CS1# 1
GBE_MDCK R627 10K_0402_5% S
AJ22 SATA_TX2P GBE_MDIO W10
AH22 AB8 FCH_SPI_CLK 6
SATA_TX2N GBE_RXCLK Check CS# PU R 1kor10k and pop/nopop C
GBE_RXD3 AH7
AM23 AF7 SCL v1.20 : If an SPI ROM is shared between FCH_SPI_MOSI 5 2 FCH_SPI_MISO
SATA_RX2N GBE_RXD2 D Q
AK23 SATA_RX2P GBE_RXD1 AE7 the FCH and the Embedded Controller
AD7 a 10-K pull-up resistor to +3.3V_S5 is installed. MX25L3206EM2I-12G_SO8
GBE_RXD0
AH24 SATA_TX3P GBE_RXCTL/RXDV AG8
AJ24 AD1 GBE_COL / GBE_CRS / GBE_MDIO
SATA_TX3N GBE_RXERR
AB7 GBE_RXERR / Left unconnected. @R38
@ R38 @C24
@ C24
GBE LAN
GBE_TXCLK FCH_SPI_CLK
AN24 SATA_RX3N GBE_TXD3 AF9 FCH SCL V1.20 19-35 1 2 1 2
AL24 AG6 10_0402_5%
SATA_RX3P GBE_TXD2 10P_0402_50V8J
GBE_TXD1 AE8
AL26 AD8 Add for EMI 201011291330
SATA_TX4P GBE_TXD0
AN26 SATA_TX4N GBE_TXCTL/TXEN AB9
SERIAL ATA
GBE_PHY_PD AC2
AJ26 SATA_RX4N GBE_PHY_RST# AA7
AH26 W9 GBE_PHY_INTR
SATA_RX4P GBE_PHY_INTR
AN29 SATA_TX5P
AL28 V6 FCH_SPI_MISO
SATA_TX5N SPI_DI/GPIO164 FCH_SPI_MOSI
SPI_DO/GPIO163 V5
SPI ROM
AK27 V3 FCH_SPI_CLK_R R35 1 2 0_0402_5% FCH_SPI_CLK
SATA_RX5N SPI_CLK/GPIO162 FCH_SPI_CS1# GBE_PHY_INTR
AM27 SATA_RX5P SPI_CS1#/GPIO165 T6
V1 FCH_SPI_WP# Pulled-up to +3.3V_S5 with a 10-KΩ 5% resistor.
ROM_RST#/SPI_WP#/GPIO161 +3VALW
AL29 NC6 FCH SCL v1.20 #19-85
AN31 NC7
L30 FCH_CRT_R GBE_PHY_INTR 1 2
VGA_RED FCH_CRT_R 24
AL31 R896 1 2 150_0402_1% R892 10K_0402_5%
NC8
AL33 NC9
L32 FCH_CRT_G Removed RGMII/MII support and updated termination
VGA_GREEN FCH_CRT_G 24
AH33 R897 1 2 150_0402_1% requirements for GBE_COL, GBE_CRS, GBE_RXERR
2 NC10 2
AH31 NC11 and GBE_MDIO when RGMII/MII interface is not used.
M29 FCH_CRT_B FCH DGv1.20 / SCL v1.20
VGA_BLUE FCH_CRT_B 24
AJ33 R898 1 2 150_0402_1%
VGA DAC
NC12
L SATA_CALRP=35ohm,<1000mil AJ31 NC13 FCH_CRT_HSYNC
M28
SATA_CALRN=35ohm,<1000mi VGA_HSYNC/GPO68
N30 FCH_CRT_VSYNC
FCH_CRT_HSYNC
FCH_CRT_VSYNC
24
24
VGA_VSYNC/GPO69
M33 FCH_CRT_DDC_SDA
VGA_DDC_SDA/GPO70 FCH_CRT_DDC_SDA 24
1K_0402_1% 2 1 R899 SATA_CALRP AF28 N32 FCH_CRT_DDC_SCL
SATA_CALRP VGA_DDC_SCL/GPO71 FCH_CRT_DDC_SCL 24
+AVDD_SATA 931_0402_1%2 1 R900 SATA_CALRN AF27 SATA_CALRN

VGA_DAC_RSET K31 1 2
FCH Schematics Check List V1.20 R901 715_0402_1%
SATA_LED# AD22
40 SATA_LED# SATA_ACT#/GPIO67
V28 ML_VGA_AUXP_C
AUX_VGA_CH_P ML_VGA_AUXP_C 8
+3VS R902 1 2 10K_0402_5% V29 ML_VGA_AUXN_C
AUX_VGA_CH_N ML_VGA_AUXN_C 8
VGA MAINLINK
AF21 SATA_X1
AUXCAL U28 AUXCAL1
R903
2
100_0402_1%
+VDDAN_11_ML
L AUXCAL <1000mil
T31 ML_VGA_TXP0
ML_VGA_L0P ML_VGA_TXP0 8
T33 ML_VGA_TXN0
ML_VGA_L0N ML_VGA_TXN0 8
AG21 T29 ML_VGA_TXP1
SATA_X2 ML_VGA_L1P ML_VGA_TXP1 8
T28 ML_VGA_TXN1
R32 ML_VGA_TXP2
R30 ML_VGA_TXN2
+3VS 2 1 BT_ON# P29 ML_VGA_TXP3
R30 10K_0402_5% P28 ML_VGA_TXN3
FCH_CRT_HPD 2 1 +FCH_VDDAN_33_DAC_R
ML_VGA_HPD/GPIO229 C29 FCH_CRT_HPD FCH_CRT_HPD 10
10K_0402_5% R904
3 3
AH16 FANOUT0/GPIO52 VIN0/GPIO175 N2 1 2
AM15 R5 10K_0402_5%
BT_ON# FANOUT1/GPIO53 HW MONITOR
32 BT_ON# AJ16 FANOUT2/GPIO54 VIN1/GPIO176 M3 1 2
R6 10K_0402_5%
AK15 FANIN0/GPIO56 VIN2/SDATI_1/GPIO177 L2 1 2
WL_OFF# AN16 R7 10K_0402_5%
32 WL_OFF# FANIN1/GPIO57
AL16 FANIN2/GPIO58 VIN3/SDATO_1/GPIO178 N4 1 2
R8 10K_0402_5%
+3VALW P1 1 2
ODD_PWR VIN4/SLOAD_1/GPIO179 R9 10K_0402_5%
30 ODD_PWR K6 TEMPIN0/GPIO171
VIN5/SCLK_1/GPIO180 P3 1 2
R10 10K_0402_5%
1 2 K5 TEMPIN1/GPIO172 VIN6/GBE_STAT3/GPIO181 M1 1 2
R14 10K_0402_5% R11 @ 10K_0402_5% Enabled integrated pull-down/up and left unconnected.
2
VIN7/GBE_LED3/GPIO182 M5 1 2
R29 1 2 K3 R12 10K_0402_5%
R15 10K_0402_5% TEMPIN2/GPIO173
10K_0402_5%
NC1 AG16
1 2 M6 AH10
1
R16 10K_0402_5% TEMPIN3/TALERT#/GPIO174 NC2

NC3 A28
ODD_PWR G27
NC4
NC5 L4
2
R17
10K_0402_5% HUDSON-M2_FCBGA656
1
4 4

A B C D E
A B C D E
U25D
FCH_PCIE_RST# IS FOR PCIE T59

HUDSON-2
USB MISC
AB6 G8
DEVICES ON Hudson-M2/M3 37 EC_LID_OUT#
EC_LID_OUT# R2
PCIE_RST2#/PCI_PME#/GEVENT4# USBCLK/14M_25M_48M_OSC
RI#/GEVENT22# USB_RCOMP R863 1
W7 SPI_CS3#/GBE_STAT1/GEVENT21# USB_RCOMP B9 2 11.8K_0402_1%
SLP_S3# T3
37 SLP_S3# SLP_S3#
SLP_S5# W2 H1
37 SLP_S5# SLP_S5# USB_FSD1P/GPIO186
PBTN_OUT# J4 H3 Hudson-M2/M3
37 PBTN_OUT# PWR_BTN# USB_FSD1N
FCH_PWRGD N7 OHCI CTL
37 FCH_PWRGD PWR_GOOD
USB 1.1
H6 DEV 20, Fn 5
ACPI / WAKE UP EVENTS

TEST0 USB_FSD0P/GPIO185
T9 TEST0 USB_FSD0N H5 <Disable CTL>
TEST1 T10
TEST2 TEST1/TMS
V9 TEST2 USB_HSD13P H10
1 USB_HSD13N G10 1
EC_GA20 AE22
37 EC_GA20 GA20IN/GEVENT0#
K10 USB20_P12 Hudson-M2 Hudson-M3
USB_HSD12P USB20_P12 40
37 EC_KBRST#
EC_KBRST# AG19 KBRST#/GEVENT1# USB_HSD12N J12 USB20_N12
USB20_N12 40 USB 2.0 port(Right-1) EHCI CTL xHCI CTL
EC_SCI# R9 DEV 22, Fn 2 DEV 16, Fn 1
37 EC_SCI# LPC_PME#/GEVENT3#
THERMTRIP: EC_SMI# C26 G12 USB20_P11 <Disable CTL of M2> xHCI CTL
37 EC_SMI# LPC_SMI#/GEVENT23# USB_HSD11P USB20_P11 41
Need level shift from +3VALW to +1.5V T5 LPC_PD#/GEVENT5# USB_HSD11N F12 USB20_N11
USB20_N11 41 USB 2.0 port(Left-2) DEV 16, Fn 0
SYS_RESET# U4
Note: Ensure FCH internal pull-up resistor FCH_PCIE_WAKE# K1 SYS_RESET#/GEVENT19#
K12 USB20_P10
31,32 FCH_PCIE_WAKE# WAKE#/GEVENT8# USB_HSD10P USB20_P10 41
to +3.3V S5 is disabled to prevent leakage V7 IR_RX1/GEVENT20# USB_HSD10N K13 USB20_N10
USB20_N10 41 USB 2.0 port(Left-1)
when APU is powered down. H_THERMTRIP# R10
8 H_THERMTRIP# THRMTRIP#/SMBALERT#/GEVENT2#
WD_PWRGD AF19 B11
WD_PWRGD USB_HSD9P
USB_HSD9N D11 Hudson-M2/M3
EC_RSMRST# U2 EHCI CTL
37 EC_RSMRST# RSMRST#
E10 USB20_P8 DEV 19, Fn 2
USB_HSD8P USB20_P8 32
SM bus 0-->S0 PWR domain AG24 CLK_REQ4#/SATA_IS0#/GPIO64 USB_HSD8N F10 USB20_N8
USB20_N8 32 Mini1-WLAN
LAN_CLKREQ# AE24
SM bus 1-->S5 PWR domain 31 LAN_CLKREQ# CLK_REQ3#/SATA_IS1#/GPIO63 USB20_P7
AE26 SMARTVOLT1/SATA_IS2#/GPIO50 USB_HSD7P C10 USB20_P7 39
AF22 A10 USB20_N7 FP
USB 2.0
CLK_REQ0#/SATA_IS3#/GPIO60 USB_HSD7N USB20_N7 39
FCH GEVENT (S5 domain) AH17 SATA_IS4#/FANOUT3/GPIO55
with isolation circuit to avoid leakage
FCH_SPKR
AG18 SATA_IS5#/FANIN3/GPIO59 USB_HSD6P H9 12/01 change port 1 to port 7
33 FCH_SPKR AF24 SPKR/GPIO66 USB_HSD6N G9
FCH_SCLK0
GPIO
11,12,32 FCH_SCLK0 AD26 SCL0/GPIO43
+3VS +3VS FCH_SDATA0 AD25 A8 USB20_P5
11,12,32 FCH_SDATA0 SDA0/GPIO47 USB_HSD5P USB20_P5 22
39 FCH_SCLK1
FCH_SCLK1 T7 SCL1/GPIO227 USB_HSD5N C8 USB20_N5
USB20_N5 22 Camera
FCH_SDATA1 R7
39 FCH_SDATA1 SDA1/GPIO228
2
MINI1_CLKREQ# AG25 F8
32 MINI1_CLKREQ# CLK_REQ2#/FANIN4/GPIO62 USB_HSD4P
R954 AG22 E8 Hudson-M2/M3
CLK_REQ1#/FANOUT4/GPIO61 USB_HSD4N
2
10K_0402_5% J2 EHCI CTL

IR_LED#/LLB#/GPIO184
G
VGA_PWRGD_R AG26 C6 DEV 18, Fn 2

SMARTVOLT2/SHUTDOWN#/GPIO51 USB_HSD3P
V8 A6 <Support Wakeup>
1
DDR3_RST#/GEVENT7#/VGA_PD USB_HSD3N
30 ODD_DA# 3 1ODD_DA#_1 W8 GBE_LED0/GPIO183
S
Y6 SPI_HOLD#/GBE_LED1/GEVENT9# USB_HSD2P C5
Q84 V10 A5
2N7002K_SOT23-3 GBE_LED2/GEVENT10# USB_HSD2N
AA8 GBE_STAT0/GEVENT11#
AF25 CLK_REQG#/GPIO65/OSCIN/IDLEEXIT# USB_HSD1P C1
USB_HSD1N C3
+3VS +3VS
2 SMIB M7 E1 USB20_P0 2
BLINK/USB_OC7#/GEVENT18# USB_HSD0P USB20_P0 40
C4717 1 2 ODD_DA#_1 R8 USB_OC6#/IR_TX1/GEVENT6# USB_HSD0N E3 USB20_N0
USB20_N0 40 USB 2.0 port(Right-2)
2
.1U_0402_16V7K
USB OC
T1 USB_OC5#/IR_TX0/GEVENT17#
R955
30 ODD_PLUG#
R78 1 2 0_0402_5% P6 USB_OC4#/IR_RX0/GEVENT16# USBSS_CALRP C16 USBSS_CALRP R864 1 2 1K_0402_1%
L USBSS_CALRP=35ohm,<1000mil
2
10K_0402_5% T32 F5 A16 USBSS_CALRN R865 1 2 1K_0402_1%

USB_OC3#/AC_PRES/TDO/GEVENT15# USBSS_CALRN +FCH_VDD_11_SSUSB_S
USBSS_CALRN=35ohm,<1000mi
G
@ CARD_DET_FCH P5
USB_OC1# USB_OC2#/TCK/GEVENT14#
40 USB_OC1# J7 A14
1
USB_OC1#/TDI/GEVENT13# USB_SS_TX3P
Del Card det 3 1CARD_DET_FCH 41 USB_OC0#
USB_OC0# T8 USB_OC0#/SPI_TPM_CS#/TRST#/GEVENT12# USB_SS_TX3N C14
S
Hudson-M3
Q85 @ C12 xHCI CTL
2N7002K_SOT23-3 USB_SS_RX3P
USB_SS_RX3N A12 DEV 16, Fn 1
xHCI CTL
R866 1 2 33_0402_5% HDA_BITCLK AB3 D15 USB30_MTX_DRX_P2 DEV 16, Fn 0
33 HDA_BITCLK_AUDIO AZ_BITCLK USB_SS_TX2P USB30_MTX_DRX_P2 40
R867 1 2 33_0402_5% HDA_SDOUT AB1 B15 USB30_MTX_DRX_N2
33 HDA_SDOUT_AUDIO AZ_SDOUT USB_SS_TX2N USB30_MTX_DRX_N2 40
HDA_SDIN0 USB 3.0 port(Right-1)
HD AUDIO
33 HDA_SDIN0 AA2 AZ_SDIN0/GPIO167
33ohm termination HDA_SDIN1 Y5 E14 USB30RXP2
USB 3.0
AZ_SDIN1/GPIO168 USB_SS_RX2P USB30RXP2 40
resistor at CODEC side HDA_SDIN2 Y3 F14 USB30RXN2
AZ_SDIN2/GPIO169 USB_SS_RX2N USB30RXN2 40
HDA_SDIN3 Y1
R868 1 HDA_SYNC AZ_SDIN3/GPIO170 USB30_MTX_DRX_P1
33 HDA_SYNC_AUDIO 2 33_0402_5% AD6 AZ_SYNC USB_SS_TX1P F15 USB30_MTX_DRX_P1 41
+3VALW R869 1 2 33_0402_5% HDA_RST# AE4 G15 USB30_MTX_DRX_N1
33 HDA_RST_AUDIO# AZ_RST# USB_SS_TX1N USB30_MTX_DRX_N1 41
USB30RXP1
USB 3.0 port(Left-2)
USB_SS_RX1P H13 USB30RXP1 41
Change GPIO fellow Pumori G13 USB30RXN1
USB_SS_RX1N USB30RXN1 41
1 2 USB_OC0# K19 J16 USB30_MTX_DRX_P0
PS2_DAT/SDA4/GPIO187 USB_SS_TX0P USB30_MTX_DRX_P0 41
R104 100K_0402_5% 12/19 Change GPIO pin. 49 DDR3L_EN J19 PS2_CLK/CEC/SCL4/GPIO188 USB_SS_TX0N H16 USB30_MTX_DRX_N0
USB30_MTX_DRX_N0 41
USB_OC1# SLP_S3#
J21 SPI_CS2#/GBE_STAT2/GPIO166 USB30RXP0
USB 3.0 port(Left-1)
1 2 1 @ 2 USB_SS_RX0P J15 USB30RXP0 41
R54 100K_0402_5% D45 RB751V-40_SOD323-2 K15 USB30RXN0
USB_SS_RX0N USB30RXN0 41
1 2 H_THERMTRIP# 1 @ 2
R871 10K_0402_5% D44 RB751V-40_SOD323-2 D21
FCH_SCLK1 PS2KB_DAT/GPIO189 R870 10K_0402_5%
1 2 C20 PS2KB_CLK/GPIO190 SCL2/GPIO193 H19 1 2
R874 2.2K_0402_5% 2 PX@ 1 D23 G19 R872 1 2 10K_0402_5%
13,25 PX_GPU_RST# PS2M_DAT/GPIO191 EMBEDDED CTRL SDA2/GPIO194
1 2 FCH_SDATA1 0_0402_5% 2 PX@ 1 R842 C22 G22 R90 1 2 10K_0402_5%
15,25,37,48,52,53,56 PXS_PWREN PS2M_CLK/GPIO192 SCL3_LV/GPIO195
R876 2.2K_0402_5% 0_0402_5% R843 G21 R91 1 2 10K_0402_5%
@ EC_LID_OUT# SDA3_LV/GPIO196
1 2 EC_PWM0/EC_TIMER0/GPIO197 E22
R877 100K_0402_5% H22
EC_PWM1/EC_TIMER1/GPIO198
2
1 2 FCH_PCIE_WAKE# F21 J22 EC_PWM2

3 KSO_0/GPIO209 EC_PWM2/EC_TIMER2/WOL_EN/GPIO199 EC_PWM2 28 3
R878 10K_0402_5% R31 E20 H21
@ SYS_RESET# KSO_1/GPIO210 EC_PWM3/EC_TIMER3/GPIO200
1 2 10K_0402_5% F20 KSO_2/GPIO211
R18 10K_0402_5% @ A22 K21
@ SMIB KSO_3/GPIO212 KSI_0/GPIO201
1 2 E18 K22 For PCIE device reset on FS1
1
R37 10K_0402_5% KSO_4/GPIO213 KSI_1/GPIO202

A20 KSO_5/GPIO214 KSI_2/GPIO203 F22 (GFX,GLAN,WLAN,LVDS Travis)
1
R942
2
8.2K_0402_5%
LAN_CLKREQ# 12/26 Reserved. J18 KSO_6/GPIO215 KSI_3/GPIO204 F24
H18 KSO_7/GPIO216 KSI_4/GPIO205 E24
G18 KSO_8/GPIO217 KSI_5/GPIO206 B23
B21 KSO_9/GPIO218 KSI_6/GPIO207 C24
For FCH internal debug use K18 KSO_10/GPIO219 KSI_7/GPIO208 F18
D19 KSO_11/GPIO220
1 @ 2 TEST0 A18
R887 2.2K_0402_5% KSO_12/GPIO221
C18 KSO_13/GPIO222
1 @ 2 TEST1 B19
R889 2.2K_0402_5% KSO_14/GPIO223
B17 KSO_15/GPIO224
1 @ 2 TEST2 A24
R890 2.2K_0402_5% KSO_16/GPIO225
D17 KSO_17/GPIO226
+3VS HUDSON-M2_FCBGA656
1 2 FCH_SCLK0
R880 2.2K_0402_5%
1 2 FCH_SDATA0 +3VALW
R881 2.2K_0402_5% @ C1199
1 2 MINI1_CLKREQ# 1 2
R882 8.2K_0402_5%
0.1U_0402_16V4Z
5
@ U27
1 2 WD_PWRGD 2
P
R862 10K_0402_5% VGA_PWRGD B @ VGA_PWRGD_R

56 VGA_PWRGD Y 4 1 2
1 2 LAN_CLKREQ# 1 R830 0_0402_5%
A
G
R940 @ 8.2K_0402_5%
NC7SZ08P5X_NL_SC70-5
3
1 2 EC_RSMRST# 1 2
R884 2.2K_0402_5% R831 @ 100K_0402_5%
1 @ 2 HDA_BITCLK
4 R885 10K_0402_5% 1 2 4
1 @ 2 HDA_SDIN0 R832 0_0402_5%
R886 10K_0402_5%
1 @ 2 HDA_SDIN1
R888 10K_0402_5%
1 @ 2 HDA_SDIN2
R891 10K_0402_5%
1 @ 2 HDA_SDIN3
R893 10K_0402_5%
2 1 HDA_SDOUT
C4718 22P_0402_50V8J
2 1 HDA_BITCLK Security Classification Compal Secret Data Compal Electronics, Inc.
C4719 22P_0402_50V8J 2011/07/08 2015/07/08 Title
Issued Date Deciphered Date
C A
4019I5
A B C D E
A B C D E
Change to SPI
STRAP PINS
PCI_CLK1 PCI_CLK3 PCI_CLK4 LPC_CLK0 LPC_CLK1 EC_PWM2 RTC_CLK
1
PULL ALLOW USE NON_FUSION EC CLKGEN LPC ROM S5 PLUS 1
HIGH PCIE GEN2 DEBUG CLOCK MODE ENABLED ENABLED MODE

STRAPS DISABLED
DEFAULT DEFAULT DEFAULT
PULL FORCE IGNORE FUSION EC CLKGEN SPI ROM S5 PLUS

LOW PCIE GEN1 DEBUG CLOCK DISABLED DISABLE DEFAULT
MODE
STRAP MODE ENABLED +3VS
DEFAULT DEFAULT DEFAULT
L47 30mil
1 2
FBMA-L11-201209-221LMA30T_0805
220 ohm
+FCH_VDDAN_33_DAC_R
+3VS +3VS +3VS +3VALW +3VALW +3VALW +3VALW
R905
R906 10K_0402_5%
R907 10K_0402_5%
R908 10K_0402_5%
R909 10K_0402_5%
R910 10K_0402_5%
R911 10K_0402_5%
2.2U_0603_6.3V4Z
0.1U_0402_16V4Z
1
C1209
C1210
1 1
10K_0402_5%
@ @ @ Remove VGA_PD
2
2
2 2
25 PCI_CLK1
@
2 25 PCI_CLK3 2
25 PCI_CLK4
25,32,37 LPC_CLK0_EC
25 LPC_CLK1
+1.1VS
27 EC_PWM2
25,37 RTC_CLK
1 2
R915 10K_0402_5%
R917 10K_0402_5%
R918 10K_0402_5%
R919 10K_0402_5%
R920 10K_0402_5%
R921 2.2K_0402_5%
R922 2.2K_0402_5%
R912 0_0402_5%
1
1
+FCH_VDDAN_11_MLDAC
@ @ @ 30mil
2
2
DEBUG STRAPS Remove VGA_PD
FCH HAS 15K INTERNAL PU FOR PCI_AD[27:23]
3 3
PCI_AD27 PCI_AD25 PCI_AD24 PCI_AD23
USE PCI Normal REFCLK termination USE DEFAULT DISABLE PCI

No PLL PCIE STRAPS MEM BOOT
external R
DEFAULT DEFAULT DEFAULT DEFAULT
PULL BYPASS Inverted REFCLK termination USE EEPROM ENABLE PCI

LOW PCI PLL PCIE STRAPS MEM BOOT
25 PCI_AD27
25 PCI_AD26
25 PCI_AD25
25 PCI_AD24
25 PCI_AD23
R926 2.2K_0402_5%
R927 2.2K_0402_5%
R928 2.2K_0402_5%
R929 2.2K_0402_5%
R930 2.2K_0402_5%
4 4
1
@ @ @ @ @
2

A B C D E
A B C D E
+VCC_FCH_R +1.1VS
U25C 1007mA
131mA 10mils 1 2
1U_0402_6.3V6K
1U_0402_6.3V6K
.1U_0402_16V7K
.1U_0402_16V7K
2.2U_0603_6.3V4Z
22U_0805_6.3V6M
HUDSON-2
50mils R937 0_0805_5%
C1213
C1214
C1215
C1216
C1217
C1219
+3VS 1 2 +VDDIO_33_PCIGP AB17 T14
+3VS VDDIO_33_PCIGP_1 VDDCR_11_1
22U_0805_6.3V6M
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
R20 0_0603_5% AB18 T17 1 1 1 1 1 1
VDDIO_33_PCIGP_2 VDDCR_11_2
C1218
C1228
C1220
C1221
L3 U25E
PCI/GPIO I/O
AE9 VDDIO_33_PCIGP_3 VDDCR_11_3 T20
1 2 +VDDPL_3.3V 1 1 1 1 AD10 U16
VDDIO_33_PCIGP_4 VDDCR_11_4
2.2U_0603_6.3V4Z
MBK1608221YZF_2P HUDSON-2
.1U_0402_16V7K
AG7 VDDIO_33_PCIGP_5 VDDCR_11_5 U18
2 2 2 2 2 2
CORE S0
C1222
C1229
220 ohm AC13 VDDIO_33_PCIGP_6 VDDCR_11_6 V14 A3 VSS VSS T25
1 1
1 1 AB12 VDDIO_33_PCIGP_7 VDDCR_11_7 V17 A33 VSS VSS T27
2 2 2 2
AB13 VDDIO_33_PCIGP_8 VDDCR_11_8 V20 B7 VSS VSS U6
AB14 VDDIO_33_PCIGP_9 VDDCR_11_9 Y17 B13 VSS VSS U14
AB16 +1.1VS_CKVDD +1.1VS D9 U17
2 2 VDDIO_33_PCIGP_10 VSS VSS
47mA 10mils 20mils 340mA D13 VSS VSS U20
+VDDPL_3.3V H24 H26 +1.1VS_CKVDD 1 2 E5 U21
VDDPL_33_SYS VDDAN_11_CLK_1 VSS VSS
1U_0402_6.3V6K
1U_0402_6.3V6K
.1U_0402_16V7K
.1U_0402_16V7K
2.2U_0603_6.3V4Z
20mA 10mils VDDAN_11_CLK_2 J25 R25 0_0603_5% E12 VSS VSS U30
+FCH_VDDAN_33_DAC_R
C1223
C1224
C1225
C1226
C1230
+VDDPL_33_DAC
CLKGEN I/O
+FCH_VDDPL_33_MLDAC 2 1 V22 VDDPL_33_DAC VDDAN_11_CLK_3 K24 E16 VSS VSS U32
20mA R22 0_0402_5% 10mils VDDAN_11_CLK_4 L22 1 1 1 1 1 E29 VSS VSS V11
1 2 +FCH_VDDPL_33_MLDAC 2 +VDDPL_33_ML
1 U22 VDDPL_33_ML VDDAN_11_CLK_5 M22 F7 VSS VSS V16
R19 0_0603_5% 200mA R23 0_0402_5% 10mils VDDAN_11_CLK_6 N21 F9 VSS VSS V18
+3VS
2.2U_0603_6.3V4Z
+FCH_VDDAN_33_DAC_R
.1U_0402_16V7K
T22 VDDAN_33_DAC VDDAN_11_CLK_7 N22 F11 VSS VSS W4
2 2 2 2 2
C1227
C1231
@ L4 VDDPL_33_SSUSB_S 20mA 10mils VDDAN_11_CLK_8 P22 F13 VSS VSS W6

1 2 1 1 +FCH_VDDPL_33_SSUSB_S
L18 F16 W25
For Hudson3 USB3.0 only VDDPL_33_SSUSB_S VSS VSS
MBK1608221YZF_2P 17mA 10mils F17 VSS VSS W28
For Hudson2, connect to GND +PCIE_VDDR_FCH +1.1VS
220 ohm +FCH_VDDPL_33_USB_S D7 VDDPL_33_USB_S 50mils F19 VSS VSS Y14
2 2
43mA 10mils VDDAN_11_PCIE_1 AB24 1088mA F23 VSS VSS Y16
+VDDPL_33_PCIE AH29 Y21 +PCIE_VDDR_FCH 1 2 F25 Y18
VDDPL_33_PCIE VDDAN_11_PCIE_2 VSS VSS
PCI EXPRESS
1U_0402_6.3V6K
1U_0402_6.3V6K
.1U_0402_16V7K
.1U_0402_16V7K
2.2U_0603_6.3V4Z
93mA 10mils VDDAN_11_PCIE_3 AE25 R938 0_0805_5% F29 VSS VSS AA6
C1233
C1234
C1235
C1236
C1237
LDO_CAP: Internally generated 1.8V +VDDPL_33_SATA AG28 VDDPL_33_SATA VDDAN_11_PCIE_4 AD24 G6 VSS VSS AA12
supply for the RGB outputs VDDAN_11_PCIE_5 AB23 1 1 1 1 1 G16 VSS VSS AA13
For A11: Cap = 1nF @ AA22 G32 AA14
+3VALW VDDAN_11_PCIE_6 VSS VSS
For A12, Cap = DNI 1 2 M31 LDO_CAP VDDAN_11_PCIE_7 AF26 H12 VSS VSS AA16
L6 +FCH_VDDAN_11_MLDAC C1232 2.2U_0603_6.3V4Z AG27 H15 AA17
VDDAN_11_PCIE_8 2 2 2 2 2 VSS VSS
2 +FCH_VDDPL_33_SSUSB_S L24 7mA 10mils
GROUND
1 H29 VSS VSS AA25
2.2U_0603_6.3V4Z
.1U_0402_16V7K
MBK1608221YZF_2P 1 2 1 2 +VDDPL_11_DAC V21 J6 AA28

VDDPL_11_DAC +1.1VS VSS VSS
C1238
C1239
MBK1608221YZF_2P R24 0_0402_5%

+VDDAN_11_ML 60mils J9 VSS VSS AA30
220 ohm 1 1 220 ohm/2A 226mA VDDAN_11_SATA_1 AA21 1337mA+AVDD_SATA J10 VSS VSS AA32
1 2 20mils VDDAN_11_SATA_4 Y20 +AVDD_SATA 1 2 J13 VSS VSS AB25
.1U_0402_16V7K
.1U_0402_16V7K
1U_0402_6.3V6K
1U_0402_6.3V6K
.1U_0402_16V7K
.1U_0402_16V7K
22U_0805_6.3V6M
R1148 0_0603_5% Y22 AB21 R941 0_0805_5% J28 AC6
VDDAN_11_ML_1 VDDAN_11_SATA_2 VSS VSS
MAIN LINK
C1240
4.7U_0603_6.3V6K
C1241
C1242
C1243
C1244
C1245
C1246
C1247
SERIAL ATA
V23 VDDAN_11_ML_2 VDDAN_11_SATA_3 AB22 J32 VSS VSS AC18
2 2
1 1 1 V24 VDDAN_11_ML_3 VDDAN_11_SATA_5 AC22 1 1 1 1 1 K7 VSS VSS AC28
2 2
V25 VDDAN_11_ML_4 VDDAN_11_SATA_6 AC21 K16 VSS VSS AD27
VDDAN_11_SATA_7 AA20 K27 VSS VSS AE6
VDDAN_11_SATA_8 AA18 K28 VSS VSS AE15
+VDDAN_33_USB 2 2 2 2 2 2 2 2
VDDAN_11_SATA_9 AB20 L6 VSS VSS AE21
L7 AC19 L12 AE28
VDDAN_11_SATA_10 +3VALW VSS VSS
1 2+FCH_VDDPL_33_USB_S AB10 VDDIO_33_GBE_S L13 VSS VSS AF8
2.2U_0603_6.3V4Z
.1U_0402_16V7K
MBK1608221YZF_2P 10mils 59mA L15 VSS VSS AF12

C1248
C1249
220 ohm AB11 N18 +VDDIO_33_S 1 2 L16 AF16

VDDCR_11_GBE_S_1 VDDIO_33_S_1 VSS VSS
GBE LAN
.1U_0402_16V7K
.1U_0402_16V7K
2.2U_0603_6.3V4Z
1 1 AA11 L19 R26 0_0402_5% L21 AF33
VDDCR_11_GBE_S_2 VDDIO_33_S_2 VSS VSS
C1250
C1251
C1252
VDDIO_33_S_3 M18 M13 VSS VSS AG30
3.3V_S5 I/O
1 2 AA9 VDDIO_GBE_S_1 VDDIO_33_S_4 V12 1 1 1 M16 VSS VSS AG32
R945 0_0402_5% AA10 V13 M21 AH5
2 2 +3VALW VDDIO_GBE_S_2 VDDIO_33_S_5 VSS VSS
VDDIO_33_S_6 Y12 M25 VSS VSS AH11
L54 658mA 30mils VDDIO_33_S_7 Y13
2 2 2
N6 VSS VSS AH18
1 2 +VDDAN_33_USB G7 W11 N11 AH19
VDDAN_33_USB_S_1 VDDIO_33_S_8 VSS VSS
1U_0402_6.3V6K
1U_0402_6.3V6K
10U_0603_6.3V6M
10U_0603_6.3V6M
.1U_0402_16V7K
FBMA-L11-201209-221LMA30T_0805 H8 N13 AH21
+3VS VDDAN_33_USB_S_2 +3VALW VSS VSS
C1253
C1254
C1255
C1256
C1257
220 ohm/3A J8 VDDAN_33_USB_S_3 N23 VSS VSS AH23
L15 1 1 1 1 1 K8 VDDAN_33_USB_S_4 10mils 5mA L28 N24 VSS VSS AH25
1 2 +VDDPL_33_PCIE K9 G24 +VDDXL_3.3V 1 2 P12 AH27
VDDAN_33_USB_S_5 VDDXL_33_S VSS VSS
2.2U_0603_6.3V4Z
.1U_0402_16V7K
.1U_0402_16V7K
2.2U_0603_6.3V4Z
MBK1608221YZF_2P M9 MBK1608221YZF_2P P18 AJ18
VDDAN_33_USB_S_6 VSS VSS
C1258
C1259
C1260
C1261
220 ohm 2 2 2 2 2
M10 VDDAN_33_USB_S_7 P20 VSS VSS AJ28
1 1 N9 VDDAN_33_USB_S_8 1 1 P21 VSS VSS AJ29
N10 VDDAN_33_USB_S_9 P31 VSS VSS AK21
M12 VDDAN_33_USB_S_10 P33 VSS VSS AK25
N12 VDDAN_33_USB_S_11 R4 VSS VSS AL18
2 2 2 2
M11 VDDAN_33_USB_S_12 R11 VSS VSS AM21
+1.1VALW R25 AM25
+1.1VALW VSS VSS
L57 140mA 10mils R28 AN1
USB
VSS VSS
1 2 +VDDAN_11_USB_S U12 VDDAN_11_USB_S_1 10mils 187mA T11 VSS VSS AN18
2.2U_0603_6.3V4Z
.1U_0402_16V7K
MBK1608221YZF_2P U13 N20 +VDDCR_1.1V 1 2 T16 AN28

+3VS VDDAN_11_USB_S_2 VDDCR_11_S_1 VSS VSS
C1262
C1263
1U_0402_6.3V6K
1U_0402_6.3V6K
220 ohm M20 R1145 0_0603_5% T18 AN33
VDDCR_11_S_2 VSS VSS
C1264
C1265
L22 1 1
3 +VDDPL_33_SATA 3
1 2 1 1 SYSON 37,42,49 N8 VSSAN_HWM VSSPL_DAC T21
2.2U_0603_6.3V4Z
.1U_0402_16V7K
MBK1608221YZF_2P L28
VSSAN_DAC
C1266
C1267
220 ohm K25 VSSXL VSSANQ_DAC K33
2
2 2
G
1 1 @ N28
2 2 Q13 VSSIO_DAC
H25 VSSPL_SYS
3 1 AO3416L_SOT23-3 EFUSE R6
+1.1VALW
D
2 2 +1.1VALW
L59 197mA 10mils
1 2 +VDDCR_1.1V_USB T12 VDDCR_11_USB_S_1 10mils 70mA L29
2.2U_0603_6.3V4Z
.1U_0402_16V7K
.1U_0402_16V7K
MBK1608221YZF_2P T13 J24 +VDDPL_1.1V 1 2 HUDSON-M2_FCBGA656

VDDCR_11_USB_S_2 VDDPL_11_SYS_S
C1268
C1269
C1270
2.2U_0603_6.3V4Z
220 ohm MBK1608221YZF_2P
.1U_0402_16V7K
+1.1VS
C1271
C1272
1 1 1 Connected to VSS through a dedicated via.
1 1 L31
1 @ 2
MBK1608221YZF_2P
2 2 2
2 2
220 ohm
+3VALW
+FCH_VDD_11_SSUSB_S 12mA
20mils 10mils
282mA P16 VDDAN_11_SSUSB_S_1 VDDAN_33_HWM_S M8 +VDDAN_33_HWM 1 2
2.2U_0603_6.3V4Z
+VDDAN_SSUSB R27 0_0402_5% AMD reply:
.1U_0402_16V7K
1 2 M14 VDDAN_11_SSUSB_S_2
1U_0402_6.3V6K
.1U_0402_16V7K
.1U_0402_16V7K
C1472
C1473
R1149 0_0603_5% N14 VDDAN_33_HWM_S: Please connect
VDDAN_11_SSUSB_S_3
C1273
C1274
C1275
For FCH M2 - BOM option 40mils P13 1 1 it to +3.3V_S5 directly if HWM is not used.
VDDAN_11_SSUSB_S_4
+FCH_VDD_11_SSUSB_S
VDDAN_11_SSUSB_S / VDDAN_11_SSUSB_S 1 1 1 P14 VDDAN_11_SSUSB_S_5

Connected to VSS.
USB SS
2 2
2 2 2 30mils
N16 VDDCR_11_SSUSB_S_1
N17 +3VS
VDDCR_11_SSUSB_S_2
P17 VDDCR_11_SSUSB_S_3 10mils 26mA
M17 AA4 +VDDIO_AZ 1 2
4 VDDCR_11_SSUSB_S_4 VDDIO_AZ_S R28 0_0402_5% VDDIO_AZ_S should be tied to 4
POWER 1 2 +3.3/1.5V_S5 rail if Wake on Ring
424mA C1276 2.2U_0603_6.3V4Z is supported
+1.1VALW 2 1 1 2 +VDDCR_11_SSUSB HUDSON-M2_FCBGA656 1 2
10U_0603_6.3V6M
1U_0402_6.3V6K
.1U_0402_16V7K
.1U_0402_16V7K
L61 R1150 0_0603_5% C1277 .1U_0402_16V7K

C1278
C1279
C1280
C1281
FBMA-L11-201209-221LMA30T_0805
42 ohm/4A 1 1 1 1
2 2 2 2 Issued Date 2011/07/08 Deciphered Date 2015/07/08 Title
A B C D E
A B C D E F G H
SATA HDD1 Conn.
JHDD1 CONN@
1 1
+5VS_HDD1
100mils 2 2
3 3
1 1
4 4
26 SATA_STX_DRX_P0 C1283 1 2 .01U_0402_16V7K SATA_STX_C_DRX_P0 5
C1285 1 SATA_STX_C_DRX_N0 5
26 SATA_STX_DRX_N0 2 .01U_0402_16V7K 6 6
7 7
C1287 1 2 .01U_0402_16V7K SATA_DTX_C_SRX_N0 8
26 SATA_DTX_SRX_N0 8
C1289 1 2 .01U_0402_16V7K SATA_DTX_C_SRX_P0 9
26 SATA_DTX_SRX_P0 9
10 10
11 GND
100mils 12 GND
2 1 +5VS_HDD1
+5VS
R953 0_0805_5% ACES_50463-0104A-001
10U_0603_6.3V6M 0.1U_0402_16V4Z
C1292
1
C1293
1
C1294
1
C1295
1 Change footprint to Starconn (PAD is bigger)
12.29
2 2 2 2
1U_0402_6.3V6K 1000P_0402_50V7K
2 ODD conn 2
JODD1
+5VS @ +5VS_ODD +5VS_ODD 1 1
100mils R793
0_0805_5%
100mils 26 SATA_STX_DRX_P1 C1301 1
C1300 1
2 .01U_0402_16V7K SATA_STX_C_DRX_P1 2 2
26 SATA_STX_DRX_N1 2 .01U_0402_16V7K SATA_STX_C_DRX_N1 3 3
2
2 1 4 4
C1302 1 2 .01U_0402_16V7K SATA_DTX_C_SRX_N1 5
26 SATA_DTX_SRX_N1 5
+5VS +VSB R1129 C1303 1 2 .01U_0402_16V7K SATA_DTX_C_SRX_P1 6
26 SATA_DTX_SRX_P1 6
D
6 470_0603_5% 7
S
R79 7
1 5 4 27 ODD_PLUG# 1 2 0_0402_5% 8
1
8
1
2 +5VS_ODD 9
C812 9
1 10 10
1
R21 R789 1U_0402_6.3V6K Q86 100mils 11 13
G
10K_0402_5% 470K_0402_5% 2 SI3456BDV-T1-E3_TSOP6 D R80 11 GND

27 ODD_DA# 1 2 0_0402_5% 12 14
3
ODD_EN# 12 GND
2
2
G
ODD_EN# ODD_EN S ACES_85201-1205N
CONN@
3
6
Q91A 1 Q75 10U_0805_10V4Z 0.1U_0402_16V4Z

DMN66D0LDW-7_SOT363-6 R785 C811 2N7002K_SOT23-3
Q91B 1.5M_0402_5% .1U_0603_25V7K 1 1 1 1
2 5 DMN66D0LDW-7_SOT363-6 C1304 C1305 C1306 C1307
26 ODD_PWR 2
1
1
2 2 2 2
1U_0402_6.3V6K 1000P_0402_50V7K
S
c
r
e
w
H
o
l
e
3 3
+5VS
FAN
C1404 10U_0805_10V4Z
1 2
H1 H2 H3 H4 H5 H6 H7 H12 H15 H14 H13

H_2P8 H_2P8 H_2P8 H_2P8 H_2P8 H_2P8 H_2P8 H_4P6 H_4P6 H_4P6 H_4P6
U35 HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA
1 EN GND 8
2 VIN GND 7
+VCC_FAN1 3 6 @ @ @ @ @ @ @ @ @ @ @
1
1
VOUT GND
37 EN_DFAN1 1 2 4 VSET GND 5
R1065 0_0402_5% 1
@ APL5607KI-TRG_SO8
C1405
0.1U_0402_16V4Z
2 H16 H17 H18
H8 H9 H10 H11 H19 H20 H_4P0 H_4P0 H_4P0
H_2P8 H_2P8 H_2P8 H_2P8 H_3P3 H_3P3
HOLEA HOLEA HOLEA
C1406 HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA
10U_0805_10V4Z
1 2 @ @ @
1
@ @ @ @ @ @
1
1
+3VS C1407
1000P_0402_50V7K
1 2 H21 H22 H23
1
H_2P1N H_1P1N H_1P1N
FAN1 Conn
R1066 FD1 FD3 FD2 FD4
4 10K_0402_5% HOLEA HOLEA HOLEA 4
40mil JFAN1 @ @ @ @
2
+VCC_FAN1 1 @ @ @
1
1 FIDUCIAL_C40M80 FIDUCIAL_C40M80 FIDUCIAL_C40M80 FIDUCIAL_C40M80
37 FAN_SPEED1 2 2 GND 4
3 3 GND 5
1
C1408
1000P_0402_50V7K ACES_88231-03041 Security Classification Compal Secret Data Compal Electronics, Inc.
CONN@ 2011/07/08 2015/07/08 Title
2 Issued Date Deciphered Date
B A
<SI>Update JFAN1
4019I5
A B C D E F G H
5 4 3 2 1
W=60mils RL3
@
0_1206_5%
W=60mils
Modify by Project
+3VALW 1 2
QL1 +LAN_VDD_3V3 JP15

1.5A These caps close to U1: Pin 11,12,39,58,63,64 SD_D2_R
SD_D3_R
1 D2
1 3 1 2
D
CL1 AO3413L_SOT23-3 SD_CMD_R D3
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
3 CMD
10U_0603_6.3V6M
1U_0402_6.3V6K 1 1 1 1 1 1 1 4
G
VSS
+CR_VDD_3V3 5
2
2 CL2 CL3 CL4 CL5 CL6 CL7 CL8 SD_CLK_R VDD
6 CLK
+VSB
2 2 2 2 2 2 2
7 VSS
SD_D0_R 8 D0
2
SD_D1_R 9
RL4 Note: +CR_VDD_3V3 SD_WP D1
10 WP
470K_0402_5% 1.The rise time of +LAN_VDD_3V3 must >1ms and <100ms for the internal LDO. SD_CD# 11 CD
0.1U_0402_10V7K
4.7U_0603_6.3V6K
CL38
CL37
1 1
1
D D
EN_WOL
1.5M_0402_5%
1
2
D
QL2 RL5 2 2
37 WOL_EN 2 1
G SSM3K7002FU_SC70-3 CL9 12
0.1U_0603_25V7K GND1
S 13
3
GND2
1
2
T-SOL_156-2000302604

CL37, CL38 close to CR socket
Need to check RL6,RL7,RL8 Option

+CR_VDD_3V3
Close to Chip RL11 0_0402_5%
+LAN_VDD_3V3 RL6 1 @ 2 10K_0402_5% SD_D0 1 2 SD_D0_R
UL1 RL12 0_0402_5%
1
37 EC_PME# RL7 1 2 0_0402_5% Power Manahement/Isolation SD_D1 1 2 SD_D1_R
ISOLATEB 38 RL31 RL13 0_0402_5%
RL8 @ 2 0_0402_5% LANWAKEB ISOLATEB 100K_0402_5% SD_D2 SD_D2_R
27,32 FCH_PCIE_WAKE# 1 40 LANWAKEB 1 2
Card Reader
SD_D0/MS_D7/xD_D5 19 SD_D0
SD_D1 SD_D3
RL14 0_0402_5%
SD_D3_R
EMI-ESD
18 1 2
2
PCI-Express SD_D1/MS_CLK/xD_D6 SD_D2 RL15 0_0402_5% LAN_ACTIVITY# CL13 1
SD_D2/xD_D7 23 2 470P_0402_50V8J
1
CLK_PCIE_LAN 27 22 SD_D3 SD_WP_R SD_CMD 1 2 SD_CMD_R
25 CLK_PCIE_LAN REFCLK_P SD_D3/MS_D2/xD_D2
CLK_PCIE_LAN# 28 17 RL32 RL16 0_0402_5%
25 CLK_PCIE_LAN# REFCLK_N SD_D4/xD_WE#
16 100K_0402_5% SD_CLK 1 21 SD_CLK_R
SD_D5/xD_CE#
3
37 15 LINK_100_1000# CL14 1 2 470P_0402_50V8J
10,13,21,25,32 APU_PCIE_RST# PERSTB SD_D6/MS_INS#/xD_RE#
Change net name from PLT_RST# to APU_PCIE_RST# LAN_CLKREQ#_R 36 14 CL10 @
2
CLKREQB SD_D7/xD_RDY SD_CLK QL3B
SD_CLK/MS_D3/xD_D4 20 5P_0402_50V8C
CL11 1 2 0.1U_0402_16V7K PCIE_DTX_FRX_P0 30 21 SD_CMD 2N7002KDWH_SOT363-6 5 SD_WP 2
6 PCIE_DTX_C_FRX_P0 HSOP SD_CMD/MS_D6/xD_D3 DL2
CL12 1 2 0.1U_0402_16V7K PCIE_DTX_FRX_N0 31 35 SD_WP_R @
6 PCIE_DTX_C_FRX_N0 HSON SD_WP/MS_D1/xD_WP#
PCIE_FTX_C_DRX_P0 25 54 SD_CD#_R LAN_ACTIVITY# 2
6 PCIE_FTX_C_DRX_P0
4
PCIE_FTX_C_DRX_N0 HSIP SD_CD#/MS_D5/xD_ALE +LAN_VDD_3V3 2
6 PCIE_FTX_C_DRX_N0 26 HSIN MS_BS/xD_CLE 34 1 1
55 LINK_100_1000# 3
EEPROM(TWSI) MS_D4/xD_D0 3
MS_D0/xD_D1 56
TL1 44 57 PESD5V0U2BT
SDA XD_CD#
1
TL2 42
SCL/LED_CR Follow QCL50 @ RL33
C C
GPO Pin 100K_0402_5%
+LAN_VDD_3V3 PN : SA00005B400
Transceiver Interface GPO 50
Modify by Project
LAN_MDIP0 1 12
2
MDIP0 DVDD33
1
1
LAN_MDIN0 2 39 +LAN_VDD_3V3
@ RL10 LAN_MDIP1 MDIN0 DVDD33 SD_CD#_R RL30
4 MDIP1 +LAN_VDD_3V3
Close to Chip 10K_0402_5% LAN_MDIN1
LAN_MDIP2
5 MDIN1 AVDD33 11 100K_0402_5% Amber
6 MDIP2 AVDD33 58
6
LAN_MDIN2 7 63 LEDL2
2
2
LAN_MDIP3 MDIN2 AVDD33 LAN_LED0 RL1 1 LAN_ACTIVITY# 1
RL9 9 MDIP3 AVDD33 64 2 2
LAN_MDIN3 10 QL3A 510_0402_5%
LAN_CLKREQ# 2 LAN_CLKREQ#_R MDIN3 +LAN_VDD_1V0 2N7002KDWH_SOT363-6 SD_CD# HT-110UD_1204
1 DVDD10 41 2
27 LAN_CLKREQ# 52
XTLI DVDD10
59
1
0_0402_5% XTLO CKXTAL1 Clock
60 CKXTAL2 AVDD10 3
AVDD10 8
+LAN_VDD_3V3
Regulator and Reference AVDD10 61
+CR_VDD_3V3
White LEDL1
+LAN_SROUT1.0V 48 29 +LAN_EVDD10 Close to Chip
REGOUT EVDD10
0.1U_0402_10V7K
CL15
ENSWREG 45 ENSWREG_H VDD33/18 for SD UHS Mode Power LAN_LED1 2 RL2 1 LINK_100_1000# 1
510_0402_5%
2
Card_3V3 13 1
+LAN_VDDREG 46 +VDD33_18
VDDREG +VDD33_18 LTW-110DC5-C_WHITE
47 33
3
VDDREG VDD33/18
0.1U_0402_10V7K
CL16
CL17
0.1U_0402_10V7K
CL18
CL19
RL18 53
VDD33/18 2
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
1 2 62 RSET 1 1 1 1
GND 24
2.49K_0402_1% 32
LAN_LED0 GND @ @ JLAN1
51 LED0 GND9(Exposed Pad) 65
LAN_LED1 LEDs 2 2 2 2
49 LED1
+3VS 1 2 ISOLATEB 43
RL19 1K_0402_5% LED3
RJ45_TX3- 8
CL16,CL17 Close to Pin33 CL18,CL19 close to Pin53 MX4-
RTL8411-CG_QFN64_9X9
2
RJ45_TX3+ 7
RL20 MX4+
15K_0402_5% RJ45_RX1- 6
+LAN_VDD_1V0 RX2-
RL25 RJ45_TX2- 5
1
+LAN_EVDD10 +LAN_VDD_1V0 MX3-

1 2
RJ45_TX2+ 4
B
0_0603_5% MX3+ B
1U_0402_6.3V6K
0.1U_0402_16V7K
GND4 12
RJ45_RX1+
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
1 1 3 RX2+
27P_0402_50V8J CL20 1 1 1 1 1 11
XTLI RJ45_TX0- GND3
1 2 2 RL21 1 CL22 CL23 2 TX1-
CL24 CL25 CL26 CL27 CL28 10
GND2
2
0_0402_5% 2 2 RJ45_TX0+ 1
YL1 2 2 2 2 2 TX1+
GND1 9
25MHZ_12PF_X5H025000FC1H-H
CL21 Close to Pin29
1
1 2 XTLO Place each cap. close Pin 3, 8 , 41 , 52 ,61 SANTA_130460-5 CONN@
27P_0402_50V8J <SI> Update footprint.

RL22 0_0402_5%
Switching Regulator Circuit
+LAN_VDD_3V3 2 1 ENSWREG SHI0000AA00 +LAN_VDD_1V0
LL1 W=60mils
RL23 0_0402_5% +LAN_SROUT1.0V 1 2 TS1
2 1 2.2UH +-5% NLC252018T-2R2J-N LAN_MDIP0 1 24 RJ45_TX0+
@ DELTA_1008HC-472EJFS-A_2P TD1+ TX1+
1 2
LAN_MDIN0 2 23 RJ45_TX0-
3.3V : Enable Switching Regulator CL29 CL30 TD1- TX1-
(Default,For Power Efficiency) 4.7U_0603_6.3V6K 0.1U_0402_16V7K +V_DAC 3 22 RL26 1 2 75_0402_5%
0V : Enable LDO Regulator 2 1 TDCT1 TXCT1 RL27 75_0402_5%
1 2
+V_DAC 4 21 RL28 1 2 75_0402_5%
TDCT2 TXCT2 RL29 75_0402_5%
1 2
LAN_MDIP1 5 20 RJ45_RX1+
+LAN_VDD_3V3 TD2+ TX2+
The trace length from LL1 to Pin 48 (REGOUT) and CL31 1 2 LAN_MDIN1 6 19 RJ45_RX1- 2
RL24 2 +LAN_VDDREG from CL29, CL30 to Lx must be within 200 mils. TD2- TX2- CL32
1
0.01U_0402_16V7K LAN_MDIP2 7 18 RJ45_TX2+ SE167100J80
0_0603_5% TD3+ TX3+ 10P_1808_3KV
0.1U_0402_16V7K
4.7U_0603_6.3V6K
1 1 1
CL35 CL36 CL39 1 TD3- TX3-
2 1 1
+V_DAC 9 16 CL33 CL34
Close to Pin46,47 2 2 0.1U_0402_16V7K TDCT3 TXCT3
1
+V_DAC 10 15 0.1U_0402_16V4Z 4.7U_0603_6.3V6K
TDCT4 TXCT4 DL1 LL2 2 2
3
A LAN_MDIP3 11 14 RJ45_TX3+ SCA00001L00 A
TD4+ TX4+ @
1
TD4- TX4- PESD5V0U2BT 100UH_SSC0301101MCF_0.18A_20%
2
350UH_NA0069RLF
SP050006Y00

A
4019I5
5 4 3 2 1
A B C D E
Mini Card Power Rating

Power Primary Power (mA) Auxiliary Power (mA)
Peak Normal Normal
WLAN
+1.5VS_WLAN +3VS 1000 750
+3V_AOAC +3V_AOAC
+3V 330 250 250 (wake enable)
1 JMINI1 CONN@
+1.5VS 500 375 5 (Not wake enable) 1
FCH_PCIE_WAKE# RM1 1 2 0_0402_5% 1 2
27,31 FCH_PCIE_WAKE# 1 2
3 3 4 4
BT_ON RM14 1 2 0_0402_5% BT_ON_L 5 6
5 6 LPC_FRAME#
27 MINI1_CLKREQ# 7 7 8 8 LPC_FRAME# 25,37
9 10 LPC_AD3
9 10 LPC_AD3 25,37
11 12 LPC_AD2
25 CLK_PCIE_MINI1# 11 12 LPC_AD2 25,37
13 14 LPC_AD1
25 CLK_PCIE_MINI1 13 14 LPC_AD1 25,37
15 16 LPC_AD0
15 16 LPC_AD0 25,37
APU_PCIE_RST# 17 18
17 18 RM2
25,28,37 LPC_CLK0_EC 19 19 20 20 1 2 0_0402_5% WL_OFF#
WL_OFF# 26
21 22 APU_PCIE_RST#
21 22 APU_PCIE_RST# 10,13,21,25,31
23 24 RM3 1 2 0_0603_5% +3V_AOAC
6 PCIE_DTX_C_FRX_N1 23 24
6 PCIE_DTX_C_FRX_P1 25 25 26 26
27 27 28 28
29 30 MINI1_SMBCLK RM4 1 @ 2 0_0402_5% FCH_SCLK0
29 30 FCH_SCLK0 11,12,27
6 PCIE_FTX_C_DRX_N1 31 32 MINI1_SMBDAT RM5 1 @ 2 0_0402_5% FCH_SDATA0
31 32 FCH_SDATA0 11,12,27
6 PCIE_FTX_C_DRX_P1 33 33 34 34
35 36 USB20_N8
35 36 USB20_N8 27
37 38 USB20_P8
37 38 USB20_P8 27
39 39 40 40
2 41 41 42 42 2
43 44 MINI1_LED#
43 44 MINI1_LED# 37
RM6 45 46
0_0402_5% 45 46
47 47 48 48
1
E51TXD_P80DATA 1 2 E51TXD_P80DATA2_R 49 50
37 E51TXD_P80DATA 49 50
37 E51RXD_P80CLK 1 2 E51RXD_P80CLK_R 51 51 52 52 RM8
53 54 4.7K_0402_5%
0_0402_5% G1 G2
1
RM7
(9~16mA)
2
BELLW_80003-2021
RM9
+3V_AOAC
100K_0402_5%
2
RM10
1K_0402_5%
BT_ON 2 1 E51RXD_P80CLK_R
1
D
26 BT_ON# 2
G QM1
S 2N7002K_SOT23-3
3
3 3
+3VS +3V_AOAC
RM12 +1.5V_PCIE +1.5VS_WLAN
0_1206_5% 60mil RM13 0_0603_5%
2 1
1 2
1 1 1 1 1
CM2 CM3 CM4 CM5 CM6
0.1U_0402_16V4Z 0.1U_0402_16V4Z
4.7U_0603_6.3V6K 0.1U_0402_16V4Z 4.7U_0603_6.3V6K
2 2 2 2 2
4 4

B A
4019I5
A B C D E
5 4 3 2 1
Notes:
Keep PVDD supply and speaker traces routed on the DGND plane.
Keep away from AGND and other analog signals
+VDDA_CODEC
DVDD_IO L PLACE CLOSE TO UA5 PIN 13
+3VS
RA2
L Place AVDD ,PVDD,and DVDD cap close to Codec (UA5) RA1 2 1 0_0805_5%
2 1 +3VS_DVDD +5VS
RA3 +3VS +AVDD_CODEC RA9 1 2 2.49K_0402_1% +AVDD_CODEC
D BLM18BD601SN1D_0603 RA5 2 1 RA6 2 1 D
0_0603_5% 0_0805_5% 0_0805_5% RA7
1 2 1 2 20K_0402_1% HP_JD_R
CA8,CA10 near UA5 PIN45
0.1U_0402_25V6
@
L
0.1U_0402_25V6
1U_0402_6.3V6K
1U_0402_6.3V6K
0.1U_0402_25V6 2 1 1 1 If Sense_A total length is greater than
CA9,CA21 near UA5 PIN39
CA4
1 1 PVDD
6 inches, chagne C12 to 0.1uF
CA3
CA6
CA7
CA2 CA5
10U_0603_6.3V UA5
1 2 2 2
10U_0603_6.3V6M
10U_0603_6.3V6M
0.1U_0402_25V6
0.1U_0402_25V6
SENSE_A CA1 1 2 1000P_0402_50V7K
2 2
1 DVDD_CORE AVDD1 27 1 1 1 1
CA8
CA9
AVDD2 38
CA10
CA21
3 45 SENSE_B RA10 1 2 10K_0402_1% +AVDD_CODEC
DVDD_IO PVDD1 2 2 2 2
PVDD2 39
9 13 SENSE_A CA11 1 2 1000P_0402_50V7K If Sense_B is un-used, then pull high

DVDD SENSE_A
1/3 EMI add SENSE_B 14 SENSE_B
Sense_B to AVDD by 10Kohm resistor
@
C4720 RA140 1 2 28 MIC1_L CA52 1 2 1U_0603_25V6
HP0_PORTA_L
33P_0402_50V8J 10_0402_1%
HP0_PORTA_R 29 MIC1_R 36 External MIC
VREFOUT_A 23 +MIC1_VREFO_L +MIC1_VREFO_L
L PLACE CLOSE TO UA5 PIN 14
27 HDA_BITCLK_AUDIO HDA_BITCLK_AUDIO 6 HDA_BITCLK HP_OUT_L
Combo jack
HP1_PORTB_L 31 HP_OUT_L 35
27 HDA_SDOUT_AUDIO HDA_SDOUT_AUDIO 5 HDA_SDO HP1_PORTB_R 32 HP_OUT_R
HP_OUT_R 35 Headphone
HDA_SYNC_AUDIO 10 19 +MIC1_VREFO_L
27 HDA_SYNC_AUDIO HDA_SYNC PORTC_L
PORTC_R 20
27 HDA_SDIN0 HDA_SDIN0 2 1 SDIN_CODEC 8 24
33_0402_5% RA11 HDA_SDI VREFOUT_C/GPIO4
1U_0402_6.3V6K
27 HDA_RST_AUDIO# HDA_RST_AUDIO# 11 15
HDA_RST# PORTE_L
PORTE_R 16 1
C 1 2 EAPD_L C
37 EAPD
CA53
DH6 CH751H-40PT_SOD323-2 17
PORTF_L
34 EAPD_A 1 2 PORTF_R 18
DH7 CH751H-40PT_SOD323-2 2
47 EAPD
100_0402_5% RA13 LA19 FBMA-L10-160808-301LMT_2P 40 SPKL+
SPK_PORTD_+L SPKL+ 36
22 D_MIC_CLK D_MIC_CLK 2 1D_MIC_CLK_L 1 2 D_MIC_CLK_L_C 2 41 SPKL-
DMIC_CLK/GPIO1 SPK_PORTD_-L SPKL- 36
22 D_MIC_DATA D_MIC_DATA 1
LA20
2 D_MIC_DATA_C 4
FBMA-L10-160808-301LMT_2P DMIC0/GPIO2 SPKR+
SPK 12/5 Audio jack change to normal open, so remove MOS
SPK_PORTD_+R 44 SPKR+ 36
48 43 SPKR-
SPDIFOUT0/GPIO3 SPK_PORTD_-R SPKR- 36
MUTE_LED_L 46 RA44
DMIC1/GPIO0/SPDIFOUT1 MUTE_LED 38
25 2 1 HP_JD_R
MONO_OUT SUB_OUT 34 36 HP_JD
0_0402_5%
36 12 MONO_INR 2 1 MONO_IN
CAP+ PCBEEP
1
2 CA96 0.1U_0402_25V6
R368
CA12 21 270_0402_1%
2.2U_0603_16V6K VREFFILT
CAP2 22
+3VS_DVDD +3VS_DVDD 1
35 34
2
CAP- V-
Place C208 close to Codec VREG(+2.5V) 37
2.2U_0603_16V6K
2.2U_0603_16V6K
10U_0603_6.3V6M
7 DVSS
1
1U_0402_6.3V6K
CA13 2 CA14 2 1 1
1
42 26 D
PVSS AVSS1
CA15
RA14 RA17 30 MUTE_LED_L 2
AVSS2
CA16
4.7K_0402_5% 10K_0402_5% 49 33 G QA1
PAD AVSS3 1 1 2 2 2N7002K_SOT23-3
S
92HD91B2X5NLGXYAX8_QFN48_7X7
2
3
2
10K_0402_5%
B HDA_RST_AUDIO# EAPD_L L C209,C210,CA87,CA89 close to Codec (UA5) RA18 B
Del AOAC
1
SPKR+
SPKR-
1 1 SPKL+
+AVDD_CODEC SPKL-
CA17 CA18
0.01U_0402_16V7K 0.1U_0402_25V6
L Close to Audio Codec (UA5)
1
2 2
2200P_0402_50V7K
2200P_0402_50V7K
2200P_0402_50V7K
2200P_0402_50V7K
Need confirmed. RA55
10K_0402_5%
1 1 1 1
CA44
CA45
CA46
CA47
RA56
2
CA97 2 2 2 2
37 BEEP# BEEP# 1 2 1 2 MONO_IN
+VDDA_CODEC
0.1U_0402_25V6 100K_0402_5%
1
CA102 @1 2 0.1U_0402_25V6 +5VS UA2
1
3.3_0402_5%
3.3_0402_5%
3.3_0402_5%
3.3_0402_5%
RA37
RA41
RA42
RA43
D
W=40Mil VOUT 5
CA101 @1 2 0.1U_0402_25V6 1 VIN
1
27 FCH_SPKR FCH_SPKR 2 1
CA98 @1 2 0.1U_0402_25V6 G QA2 RA54 4
2
BYPASS
0.1U_0402_25V6
S 2N7002K_SOT23-3 CA99 1 2 3 1
CA93 @1 EN
2 0.1U_0402_25V6 10K_0402_5% 0.01U_0402_16V7K RA16 1
3
CA20
2 2 CA103
2
CA92 @1 10K_0402_5% GND

2 0.1U_0402_25V6 680P_0402_50V7K
TPS793475DBVR CA19 2
12/7 Change to single package 1 1 2
10U_0805_10V6K
RA53 1 1
2 0_0805_5% CA104 CA100
680P_0402_50V7K 0.1U_0402_25V6
A 2 2 A
GND
GNDA
L RA53 need under or near UA5 Security Classification Compal Secret Data Compal Electronics, Inc.
Custom A
LA-8551P
5 4 3 2 1
5 4 3 2 1
+5VS +5V_SUBAMP
RA12
BLM18BD601SN1D_0603
1 2
D UA3 D
CA29 1 2 2 1 A1 C3 LA1 1 2 FBM-11-160808-601-T_0603

IN+ OUT+ SUBWOOFER+ 40
0.033U_0603_16V7 RA139 47K_0402_5%
RA15
1 2 SUB_OUT_LPF CA27 1 2 2 1 C1
33 SUB_OUT 0.033U_0603_16V7 RA138 47K_0402_5% IN- LA2
OUT- A3 1 2 FBM-11-160808-601-T_0603 SUBWOOFER- 40
4.7K_0402_1%
1 B2 PVDD
CA22 B3
PGND
1000P_0402_50V7K B1 VDD
2
1
33 EAPD_A C2 EN GND A2 CA30 CA31
12/05 add LPF for HP request 680P_0603_50V7K 680P_0603_50V7K
2
TPA2011D1YFFR_DSBGA9
0.1U_0402_16V4Z
1U_0402_6.3V4Z
2 1
CA87
CA81
C C
1 2
12/05 add 1u/0.1uF for HP request
B B
A A

B A
LA-8551P
5 4 3 2 1
5 4 3 2 1
Headphone amplifier
HP_5V
D HP_5V D
10K_0402_1%
+5VS
RA38
LA14 1 2
12/05 Add LPF for HP requirement
12/05 Connect HP AMP SMBus to EC FBM-11-160808-601-T_0603
CA57 1U_0402_6.3V6K UA6

1 RA20 2 HP_OUT_R_LPF 1 2 1 2 5 12
33 HP_OUT_R RIGHTINM VDD_12
0_0402_5% LA18 0_0603_5% 4 RIGHTINP RA40 30_0603_1%
CA64 1U_0402_6.3V6K 11 HP_R_1 1 2 HP_R 36
HPRIGHT
33 HP_OUT_L 1 RA21 2 HP_OUT_L_LPF 1 2 1 2 1 LEFTINM HPLEFT 14 HP_L_1 1 2 HP_L 36
1000P_0402_50V7K
1000P_0402_50V7K
0_0402_5% LA12 0_0603_5% 2 LEFTINP RA39 30_0603_1%
1 1
CA24
CA23
GND_3 3
2 2 6 SD# GND_9 9
1 2 PCH_SMB_DA1_AMP
7 10
2 @ 2 14,21,37,8 EC_SMB_DA2 SDA GND_10
@ CA65 CA66 RA19 @ 0_0402_5% 13
GND_13
1U_0402_6.3V6K
GND_19 19
1 1
1U_0402_6.3V6K
1 2 PCH_SMB_CK1_AMP
8
14,21,37,8 EC_SMB_CK2 SCL
RA8 @ 0_0402_5% 20 15
VDD_20 CPVSS_15
CPVSS_16 16
<SI> BOM update :RA20,RA21 4.7K-->0 18 CPP CPN 17
C CA24,CA23 SMT-->@ 21 C
GND
CA54
CA94
CA95
0.1U_0402_25V6
1U_0402_6.3V6K
HPA00929RTJR QFN 20P
2.2U_0402_6.3V6M
0.1U_0402_25V6
1U_0402_6.3V6K
1 1 1 2 1
CA90 CA80
2 2 2 1 2
CA79 1U_0402_6.3V6K
1 2
12/05 Reserve leavel shift Connect to EC

+3VS HP_5V
2
B B
RH280 RH311
2.2K_0402_5% 2.2K_0402_5%
2N7002DWH_SOT363-6
1
EC_SMB_CK2 1 6 PCH_SMB_CK1_AMP
QH5A
5
EC_SMB_DA2 4 3 PCH_SMB_DA1_AMP
2N7002DWH_SOT363-6
QH5B
A A

Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom A
5 4 3 2 1
A B C D E
SPK conn
JSPKR1
SPKR+ 1
33 SPKR+ 1
SPKR- 2
33 SPKR- 2
1 1
3 GND1
4 GND2
ACES_50281-0020N-001
CONN@
JSPKL1
SPKL+ 1
33 SPKL+ 1
SPKL- 2
33 SPKL- 2
2
3 GND1
4 GND2
@ DA1 DA2 @
ACES_50281-0020N-001
PJDLC05_SOT23-3 PJDLC05_SOT23-3 CONN@
SCA00001A00
AZ5125-02S.R7G_SOT23-3
AZ5125-02S.R7G_SOT23-3
1
1
SCA00001A00
1
DA4 DA5
2 2
12/5 Change HP jack to normal open type
3
JA1
RA35
EXT_MIC_L2 4
+MIC1_VREFO_L
3
2.2K_0402_5% HPL 1
LA3
33 MIC1_R 2 1 EXT_MIC_L2
HPR 2
BK1608HS601-T_2P HP_JD R3 HP_JD_1
33 HP_JD 1 2 5
0_0402_5%
1 DA3
2 6
CA59 1
220P_0402_50V7K 3 SINGA_2SJ2352-000131F
2
PJDLC05C_SOT23-3 CONN@
3 3
AGND
HP_R LA5 1 2 BLM15AG121SN1D_L0402_2P HPR

35 HP_R
HP_L LA4 1 2 BLM15AG121SN1D_L0402_2P HPL

35 HP_L
1 1
CA55 CA56
0.01U_0402_16V7K 0.01U_0402_16V7K
2 2
4 4

Custom A
4019I5
A B C D E
5 4 3 2 1
+3VALW_EC Analog Project ID definition Analog Board ID definition

+3VALW +3VALW +3VALW
L65
1 2 C1345 C1346 C1347 C1348 C1349 C1350 1 2 +EC_VCCA
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1000P_0402_50V7K
1000P_0402_50V7K
R4776 0_0805_5% 1 1 1 1 2 2 BLM18AG601SN1D_2P
680P_0402_50V7K
1 1 DIS@ R1025 R1024
C1351 Ra Ra
C4721 0.1U_0402_16V4Z 100K_0402_5% 100K_0402_5%
2 2 2 2 1 1
1
2 2 AD_PID0 AD_BID0
ECAGND
1
1 1
D R1035 C1364 R1026 C1356 D
Rb Rb
111
125
33K_0402_5% 0.1U_0402_16V4Z 18K_0402_1% 0.1U_0402_16V4Z
22
33
96
67
9
U31 2 2
2
VCC
VCC
VCC
VCC
VCC
VCC
AVCC
EC_GA20 1 21 AC_LED#
27 EC_GA20 GA20/GPIO00 INVT_PWM/PWM1/GPIO0F AC_LED# 44
EC_KBRST# 2 23 BEEP#
27 EC_KBRST# KBRST#/GPIO01 BEEP#/PWM2/GPIO10 BEEP# 33
SERIRQ 3 26
25 SERIRQ LPC_FRAME# SERIRQ# FANPWM1/GPIO12 ACOFF T28
25,32 LPC_FRAME# 4 LFRAME# ACOFF/FANPWM2/GPIO13 27
C1352 R1014 LPC_AD3 5
25,32 LPC_AD3 LAD3
22P_0402_50V8J 22_0402_5% LPC_AD2 7 PWM Output .01U_0402_16V7K 1 2 C1284 ECAGND
25,32 LPC_AD2 LAD2
2 1 2 1 LPC_AD1 8 63 BATT_TEMP
25,32 LPC_AD1 LAD1 BATT_TEMP/AD0/GPIO38 BATT_TEMP 45
LPC_AD0
25,32 LPC_AD0 10 LAD0 LPC & MISC BATT_OVP/AD1/GPIO39 64
ADP_I USB_ON#
ADP_I/AD2/GPIO3A 65 ADP_I 45,47 2 1 +5VALW
LPC_CLK0_EC 12 AD Input 66 AD_BID0 10K_0402_5% R1038
25,28,32 LPC_CLK0_EC PCICLK AD3/GPIO3B
PLT_RST# 13 75 AD_PID0
25 PLT_RST# PCIRST#/GPIO05 AD4/GPIO42
+3VALW 2 1 EC_RST# 37 76 ADP_ID
ECRST# SELIO2#/AD5/GPIO43 ADP_ID 44
R1011 47K_0402_5% EC_SCI# 20
27 EC_SCI# SCI#/GPIO0E
2 1 NMI_DBG# 38 2 1 +3VALW
C1353 0.1U_0402_16V4Z CLKRUN#/GPIO1D DH8 CH751H-40PT_SOD323-2
DAC_BRIG/DA0/GPIO3C 68
@ 2 1 PLT_RST# 12/29 ESD 70 EN_DFAN1
EN_DFAN1/DA1/GPIO3D EN_DFAN1 30
C1354 0.1U_0402_16V4Z DA Output 71 KBL_OFF# KBL_OFF# 39
KSI0 IREF/DA2/GPIO3E
55 KSI0/GPIO30 DA3/GPIO3F 72
KSO[0..17] KSI1 56 @1 2 EC_SMB_CK1 2 1
KSO[0..17] 38 KSI1/GPIO31 +3VALW
KSI2 57 C1361 10P_0402_50V8J 2.2K_0402_5% R1027
KSI[0..7] KSI3 KSI2/GPIO32 TP_ON_OFF @1 EC_SMB_DA1
KSI[0..7] 38 58 KSI3/GPIO33 PSCLK1/GPIO4A 83 TP_ON_OFF 39 2 2 1
C KSI4 59 84 USB_ON# C1362 10P_0402_50V8J 2.2K_0402_5% R1028 C
KSI4/GPIO34 PSDAT1/GPIO4B USB_ON# 41
KSI5 60 85 ILIM_SEL
KSI5/GPIO35 PSCLK2/GPIO4C ILIM_SEL 40
KSI6 61 PS2 Interface 86 EAPD KSO1 2 @ 1
KSI6/GPIO36 PSDAT2/GPIO4D EAPD 33
KSI7 62 87 TP_CLK 47K_0402_5% R1029
+3VALW KSI7/GPIO37 TP_CLK/PSCLK3/GPIO4E TP_CLK 39
KSO0 39 88 TP_DATA KSO2 2 @ 1
KSO0/GPIO20 TP_DATA/PSDAT3/GPIO4F TP_DATA 39
KSO1 40 47K_0402_5% R1030
KSO2 KSO1/GPIO21 LID_SW#
41 KSO2/GPIO22 1 2
1
R714 KSO3 42 97 VGATE VGATE 54 100K_0402_5% R1031

10K_0402_5% KSO4 KSO3/GPIO23 SDICS#/GPXOA00 WOL_EN EC_PME#
43 KSO4/GPIO24 SDICLK/GPXOA01 98 WOL_EN 31 2 1
KSO5 VLDT_EN 10K_0402_5% R1032
For PCI SERR KSO6
44 KSO5/GPIO25 Int. K/B SDIDO/GPXOA02 99 VLDT_EN 42,51
ENBKL
45 KSO6/GPIO26 Matrix SDIDI/GPXID0 109 1 2
D14 KSO7 46 SPI Device Interface 100K_0402_5% R1034
2
NMI_DBG# KSO7/GPIO27
1 2 GPIO0 GPIO0 25
KSO8 47 KSO8/GPIO28
KSO9 48 119 EC_SI_SPI_SO
KSO9/GPIO29 SPIDI/RD# EC_SI_SPI_SO 38
CH751H-40PT_SOD323-2 KSO10 49 120 EC_SO_SPI_SI 2 1 +3VALW
KSO10/GPIO2A SPIDO/WR# EC_SO_SPI_SI 38
KSO11 50 SPI Flash ROM 126 EC_SPICLK_L 2.2K_0402_5% R1020
KSO12 KSO11/GPIO2B SPICLK/GPIO58 EC_SPICS#/FSEL# EC_SMB_CK2 @
51 KSO12/GPIO2C SPICS# 128 EC_SPICS#/FSEL# 38 2 1 +3VS
KSO13 52 2.2K_0402_5% R1021
KSO14 KSO13/GPIO2D EC_SMB_DA2 @
53 KSO14/GPIO2E 2 1
KSO15 54 73 ENBKL 2.2K_0402_5% R1022
KSO16 KSO15/GPIO2F CIR_RX/GPIO40 ENBKL 10,21
81 KSO16/GPIO48 CIR_RLC_TX/GPIO41 74 2 1 +3VALW
KSO17 82 89 2.2K_0402_5% R1023
KSO17/GPIO49 FSTCHG/SELIO#/GPIO50 BAT_CHG_LED
BATT_CHGI_LED#/GPIO52 90 BAT_CHG_LED 44
91 CAP_LOCK#
CAPS_LED#/GPIO53 CAP_LOCK# 38
EC_SMB_CK1 77 GPIO 92 TP_CLK 2 1 +3VALW
38,45,47 EC_SMB_CK1 SCL1/GPIO44 BATT_LOW_LED#/GPIO54
EC_SMB_DA1 78 93 PWR_LED# PWR_LED# 38,40 4.7K_0402_5% R1018
38,45,47 EC_SMB_DA1 SDA1/GPIO45 SUSP_LED#/GPIO55
EC_SMB_CK2 79 SM Bus 95 SYSON TP_DATA 2 1
14,21,35,8 EC_SMB_CK2 SCL2/GPIO46 SYSON/GPIO56 SYSON 29,42,49
EC_SMB_DA2 80 121 VR_ON 4.7K_0402_5% R1019
14,21,35,8 EC_SMB_DA2 SDA2/GPIO47 VR_ON/XCLK32K/GPIO57 VR_ON 54
AC_IN/GPIO59 127
B B
SLP_S3# 6 100 EC_RSMRST# VR_ON 2 1

27 SLP_S3# PM_SLP_S3#/GPIO04 EC_RSMRST#/GPXO03 EC_RSMRST# 27
SLP_S5# 14 101 EC_LID_OUT# 100K_0402_5% R1012
27 SLP_S5# PM_SLP_S5#/GPIO07 EC_LID_OUT#/GPXO04 EC_LID_OUT# 27
EC_SMI# 15 102
27 EC_SMI# EC_SMI#/GPIO08 EC_ON/GPXO05
40 USB_CTL1
USB_CTL1 16 LID_SW#/GPIO0A EC_SWI#/GPXO06 103 EC_THERM#
EC_THERM# 25,45,54,8 Del 9012_PH2
MINI1_LED# 17 104 GPXO07 1 R64 2
32 MINI1_LED# SUSP#/GPIO0B ICH_PWROK/GPXO06 FCH_PWRGD 27
USB_CTL2 18 GPO 105 BKOFF# 0_0402_5% Delay SUSP# 10ms
40 USB_CTL2 PBTN_OUT#/GPIO0C BKOFF#/GPXO08 BKOFF# 21
USB_CTL3 19 GPIO 106 PBTN_OUT# BATT_TEMP 2 1
40 USB_CTL3 EC_PME#/GPIO0D WL_OFF#/GPXO09 PBTN_OUT# 27
EC_INVT_PWM 25 107 USB_CHARGE_EN 100P_0402_50V8J C1366
22 EC_INVT_PWM EC_THERM#/GPIO11 GPXO10 USB_CHARGE_EN 40
FAN_SPEED1 28 108 ACIN 2 1
30 FAN_SPEED1 EC_PME# FAN_SPEED1/FANFB1/GPIO14 GPXO11 100P_0402_50V8J C1363
31 EC_PME# 29 FANFB2/GPIO15
E51TXD_P80DATA 30
32 E51TXD_P80DATA EC_TX/GPIO16
E51RXD_P80CLK 31 110 ACIN
32 E51RXD_P80CLK EC_RX/GPIO17 PM_SLP_S4#/GPXID1 ACIN 14,42,47
32 112 EC_ON Reserve for EMI, close to EC
WLAN_OFF_LED# ON_OFF/GPIO18 ENBKL/GPXID2 ON/OFF EC_ON 38,46
38 WLAN_OFF_LED# 34 PWR_LED#/GPIO19 GPXID3 114 ON/OFF 38
WLAN_ON_LED# 36 GPI 115 LID_SW#
38 WLAN_ON_LED# NUMLED#/GPIO1A GPXID4 LID_SW# 38 EC_SPICLK 38
116 SUSP#
GPXID5 SUSP# 42,49,52
117 EC_SPICLK_L 1 2 1 2
T27 GPXID6 PXS_PWREN R1033 C1357
GPXID7 118 PXS_PWREN 15,25,27,48,52,53,56
EC_CRY1 122 10_0402_5% 10P_0402_50V8J
XCLK1
25,28 RTC_CLK 1 2 EC_CRY2 123 XCLK0 V18R 124 01/02 add signal to EC.
R02 modify Remove X2 20110915 R1036 0_0402_5% 1
1
AGND
2 C1359
GND
GND
GND
GND
GND
R1037 @ C1358
100K_0402_5% 22P_0402_50V8J 4.7U_0603_6.3V6K
2 PXS_PWREN 1 2
11
24
35
94
113
69
1 KB932QF-A0_LQFP128_14X14 20mil R1039 UMA@

2
Part Number = SA000055I00 10_0402_5%

A A
ECAGND 2 1 01/03 UMA still keep it.
L66
BLM18AG601SN1D_2P

B A
4019I5
5 4 3 2 1
+3VALW
EC BIOS ROM
Power Button
2
R1040
100K_0402_5%
1
+3VALW 1 2 C1370 1 2 0.1U_0402_16V4Z
R1049 0_0603_5%
D26
2 +SPI_VCC C1374 22P_0402_50V8J
ON/OFF 37
ON/OFFBTN# 1 2 1 2 1
3 U42 R1055 10_0402_5%
51ON# 44
EC_SPICS#/FSEL# 1 8
37 EC_SPICS#/FSEL# CE# VDD
BAV70W_SOT323-3 R1050 1 2 4.7K_0402_5% EC_SPI_WP# 3 6 EC_SPICLK_R R1051 1 2 0_0402_5%
WP# SCK EC_SPICLK 37
+3VALW R1052 1 2 4.7K_0402_5% EC_SPI_HOLD#7 5 EC_SO_SPI_SI_R R1053 1 2 0_0402_5%
HOLD# SI EC_SO_SPI_SI 37
2 4 2 EC_SI_SPI_SO_R R1054 1 2 0_0402_5%
VSS SO EC_SI_SPI_SO 37
@
C1365 MX25L2006EM1I-12G SOP 8P
1000P_0402_50V7K
1
1
KB conn
D
EC_ON 2
37,46 EC_ON
G Q44
S 2N7002K_SOT23-3 37 KSI[0..7]
KSI7
3
2
KSI6
KSI5
R1043 KSI4
10K_0402_5% KSI3
KSI2
<SI>Update JKB1 pin define
1
KSI1
KSI0 JKB1
+5VS 1 1
37 KSO[0..17] R372 1 2 360_0402_5% 2
37 CAP_LOCK# 2
+3VS 3 3
KSO17 4
33 MUTE_LED 4
KSO16 WLAN_AMBER 5 5
POWER/B
KSO15 WLAN_WHIT 6
KSO14 KSO17 6
7 7
KSO13 KSO16 8
+3VALW +5VALW KSO12 KSO15 8
9 9
JPWR1 KSO11 KSO10 10
KSO10 KSO11 10
1 1 11 11
2 KSO9 KSO14 12
LID_SW# 2 KSO8 KSO13 12
37 LID_SW# 3 3 13 13
37,40 PWR_LED# PWR_LED# 4 KSO7 KSO12 14
ON/OFFBTN# 4 KSO6 KSO3 14
5 5 G1 7 15 15
6 8 KSO5 KSO6 16
6 G2 KSO4 KSO8 16
17 17
ACES_51524-0060N-001 KSO3 KSO7 18
KSO2 KSO4 18
CONN@ 19 19
KSO1 KSO2 20
KSO0 KSI0 20
21 21
KSO1 22
KSO5 22
23 23
KSI3 24
KSI2 24
25 25
KSO0 26
KSI5 26
27 27 GND 33
KSI4 28 34
28 GND
ACCELEROMETER
KSO9 29
KSI6 29
30 30
KSI7 31
KSI1 31
32 32
+3VALW
ACES_51503-03241-001
CONN@
U60
+3VALW
1 Vdd_IO INT2 9 Membrane
11
37,45,47 EC_SMB_CK1
EC_SMB_CK1 4
INT1
14
ACCEL_INT# 25 Down contact
EC_SMB_DA1 SCL/SPC VDD
37,45,47 EC_SMB_DA1 6 SDA/SDI/SDO
7 SDO/SA0 GND 5 1 1
+3VALW
R166
2 1
10K_0402_5%
8 CS GND 12 C218
C219 KSO15 C1380 1 100P_0402_50V8J
Conn footprint
10 2
RES
13 0.1U_0402_16V7K 10U_0603_6.3V6M Down contact
RES
1
2 2 KSO14 C1383 1 100P_0402_50V8J

2 NC RES 15 2
R167 3 16
NC RES KSO13 C1384 1 100P_0402_50V8J
0_0402_5% 2
HP3DC2
KSO12 C1386 1 2 100P_0402_50V8J
The KB pin define must opposite
2
1
KSI0 C1388 1 2 100P_0402_50V8J

R168
0_0402_5% KSO11 C1390 1 2 100P_0402_50V8J
@ KSO10 C1392 1 2 100P_0402_50V8J KSO16 C1378 1 2 100P_0402_50V8J

2
KSI1 C1394 1 2 100P_0402_50V8J KSO17 C1379 1 2 100P_0402_50V8J
KSO7 C1381 1 2 100P_0402_50V8J

KSI2 C1396 1 2 100P_0402_50V8J
+3VALW +5VALW KSO6 C1382 1 2 100P_0402_50V8J
KSO9 C1398 1 2 100P_0402_50V8J
On (WLAN_ON_LED#=L) White KSI3 C1400 1
KSO5 C1385 1 2 100P_0402_50V8J
2 100P_0402_50V8J
Off (WLAN_ON_LED#=H) Amber KSO4 C1387 1 2 100P_0402_50V8J
KSO8 C1402 1 2 100P_0402_50V8J
1
Amber White KSO3 C1389 1 100P_0402_50V8J KSO0 C1397 1 100P_0402_50V8J

2 2
R367 R371
360_0402_5% 360_0402_5% KSI4 C1391 1 2 100P_0402_50V8J KSI5 C1399 1 2 100P_0402_50V8J
2
WLAN_AMBER WLAN_WHIT KSO2 C1393 1 2 100P_0402_50V8J KSI6 C1401 1 2 100P_0402_50V8J

2N7002KDW_SOT363-6
2N7002KDW_SOT363-6
6
KSO1 C1395 1 2 100P_0402_50V8J KSI7 C1403 1 2 100P_0402_50V8J

Q48A
Q48B
37 WLAN_OFF_LED# 2 5 WLAN_ON_LED# 37
1
B A
4019I5
5 4 3 2 1
TP Conn
12/06 Change FPR pin define
Finger printer
AZ5125-02S.R7G_SOT23-3
1
+3VALW +3VS
D7 1
C954
C220
1 2 0.1U_0402_16V4Z
D 2 D
ACES_51524-0060N-001
3
0.1U_0402_16V7K 0_0402_5% 6
R1334 USB20_P7_R 6 G2 8
27 USB20_P7 2 1 5 5 G1 7
JTP1 R1335 2 1 USB20_N7_R 4
27 USB20_N7 4
1 0_0402_5% 3
TP_CLK 1 3
37 TP_CLK 2 2 2 2
3
TP_DATA 3 1
37 TP_DATA 3 1
FCH_SCLK1_R 4 D64
3
FCH_SDATA1_R 4 SCA00001L00 JFP1 CONN@
1 1 5 5 G1 7
6 6 G2 8
1
C116 C117
100P_0402_50V8J ACES_51524-0060N-001 PESD5V0U2BT
1
2 2 100P_0402_50V8J
CONN@
+5VS
R190 @ 2 1 0_0402_5% FCH_SCLK1_R

27 FCH_SCLK1
27 FCH_SDATA1
R210 @ 2 1 0_0402_5% FCH_SDATA1_R
For multi-touch function
C Keyboard backlight Conn C
+5VS +5VALW
1
R4742
100K_0402_5%
+5VS_KBL
<SI>Update JP14 pin define R369
3
S Q153
2
2 2 1
G
ACES_50578-0040N-001_4P-T D 1K_0402_5%
1
6 G2 4 4
1
0.047U_0402_16V7K
5 G1 3 3 AO3413L_SOT23-3
D
2 2 1
1 1 2
KBL_OFF# 37
C4689
Q49 G
CONN@ JP14
2
2N7002K_SOT23-3 S KBL_OFF#=H, Power ON
KBL_OFF#=L,Power off
3
12/06 Change keyboard back light conn

B B
Membrane
Up contact
2N7002K_SOT23-3
Conn footprint Q46
Up contact Amber
T/P On/Off LED
R4745 1 2 360_0402_5%
S
+3VS 2 1 1 3
LED7
LTST-C191KFKT-5A 0603 ORANGE
G
The JP14 pin define must opposite
2
TP_ON_OFF
TP_ON_OFF 37
EC pin
A A

Rev
Custom A
4019I5
5 4 3 2 1
5 4 3 2 1
USB Charger
+5VALW +USB_BS
W=80mils
150U_B2_6.3VM_R35M
680P_0402_50V7K
10U_0805_10V4Z
1000P_0402_50V7K
1U_0402_6.3V6K
1U_0402_6.3V6K
1
0.1U_0402_16V4Z
680P_0402_50V7K
1 1 1 1 1
C4690
C4692
C4693
+
1 1
C4691
C4694
C4695
C4723
C4722
2 2 2 2 2 2
2 2
U61
1 IN OUT 12
@
R4749 1 2 0_0402_5% 13 9 PAD @ T68
27 USB_OC1# FAULT# NC
D USB20_N0 2 11 USB20_N0_C D
27 USB20_N0 DM_OUT DM_IN
<FCH> 27 USB20_P0
USB20_P0 3 DP_OUT DP_IN 10 USB20_P0_C <CONN>
37 ILIM_SEL R4750 1 2 0_0402_5% 4 15 @ 2 1
ILIM_SEL ILIM1 R4751 2
37 USB_CHARGE_EN 5 EN ILIM0 16 1 19.1K_0402_1%
R4766 19.1K_0402_1%
37 USB_CTL1 1 2 USB_CTL1_R 6 CTL1
37 USB_CTL2 R4758 1 2 0_0402_5% USB_CTL2_R 7 CTL2 GND 14
37 USB_CTL3 R4757 1 2 0_0402_5% USB_CTL3_R 8 CTL3 GPAD 17
R4756 0_0402_5%
TPS2543RTER QFN 16P
+3VS +3VALW +3VS
10K_0402_5%
2
2
2
R4767
@
@ R4762
10K_0402_5%
@ R4763
10K_0402_5%
State S0 S3, S4, S5
CDP DCP
1
Mode
1
USB_CTL1_R USB_CTL2_R
CTL1 CTL2 CTL3 ILIM_
1
ILIM_
R4764 R4765 CTL1 CTL2 CTL3 SEL
SEL
100K_0402_5% 100K_0402_5% Control pin
1 1 1 1 0 0 1 1
2
USB3.0 Repeater
+3VALW +3VALW
C C
0.01U_0402_16V7K
0.1U_0402_16V4Z
2 1
C4700
C4701
1 2
U63 USB20_N0_C
6 16 USB20_P0_C
VDD VDD
USB3_RX2_N 1 15 USB30RXN2_C C4726 1 2 0.1U_0402_16V7K USB30RXN2
INn OUTn USB30RXN2 27
3
USB3_RX2_P 2 14 USB30RXP2_C C4727 1 2 0.1U_0402_16V7K USB30RXP2 +USB_BS
INp OUTp USB30RXP2 27
D62
3
4 NC NC 12
+3VS +3VS +3VS SCA00001L00 JIO1
1
EQ0 19 17 EQ1 2 1
EQ0 EQ1 2 1
2
DE 18 11 EQ_INC PESD5V0U2BT 4 3
34 SUBWOOFER-
1
DE EQ_INC# R4769 R4768 R4771 4 3
34 SUBWOOFER+ 6 6 5 5
R4772 1 2 10 20 4.99K_0402_1%~D 4.99K_0402_1%~D 4.99K_0402_1%~D 8 7
4.99K_0402_1%~D REXT PD# @ 8 7
I2C_EN 5 25 HDDHALT_LED#
10 10 9 9
3 7 12 11
1
GND NC 26 SATA_LED# 12 11
13 GND NC 8 37,38 PWR_LED# 14 14 13 13 +5VALW
21 9 EQ0 EQ1 EQ_INC DE USB20_P0_C 16 15 +5VS
GND NC USB20_N0_C 16 15
18 18 17 17 +3VS
USB20_P12 20 19
27 USB20_P12 20 19
2
PS8711BTQFN20GTR-A0_TQFN20_3X3 USB20_N12 22 21
27 USB20_N12 22 21
R4775 USB3_RX2_N 24 23
USB3_RX2_P 24 23
4.99K_0402_1%~D 26 26 25 25
27 USB30_MTX_DRX_N2 28 28 27 27
27 USB30_MTX_DRX_P2 30 29
1
30 29
Place near FCH 32 GND2 GND1 31
34 GND4 GND3 33
PANAS_AXK8L30124B
CONN@
B B
A A

Custom A
4019I5
5 4 3 2 1
5 4 3 2 1
For ESD request +USB3_VCCA

R1224 1 @ 2 0_0402_5%
USB30TXN0 4 3 USB30TXN0_L D43 @

4 3 USB30TXP0_L 1 1 109 USB30TXP0_L
OCE2012120YZF_4P
1
USB30TXP0 L88 1 2 USB30TXP0_L USB30TXN0_L 2 2 98 USB30TXN0_L
1 2 1
C1572 +
R1225 1 @ 2 0_0402_5% USB30RXP0_L 4 4 77 USB30RXP0_L C1571
C39 1 2 .1U_0402_16V7K USB30TXP0 150U_B2_6.3VM_R45M 470P_0402_50V7K
27 USB30_MTX_DRX_P0 2 2
C37 1 2 .1U_0402_16V7K USB30TXN0 R1226 1 @ 2 0_0402_5% USB30RXN0_L 5 5 66 USB30RXN0_L
D 27 USB30_MTX_DRX_N0 D
USB30RXP0 USB30RXN0 4 3 USB30RXN0_L 3 3
27 USB30RXP0 4 3
USB30RXN0
27 USB30RXN0 OCE2012120YZF_4P 8
USB30RXP0 L89 1 2 USB30RXP0_L
1 2 JUSB1
C4687 1 2 .1U_0402_16V7K USB30TXP1 R1228 1 @ 2 0_0402_5% AZ1045-04F_DFN2510P10E-10-9 USB30TXP0_L 9
27 USB30_MTX_DRX_P1 SSTX+
C4688 1 2 .1U_0402_16V7K USB30TXN1 1
27 USB30_MTX_DRX_N1 VBUS
USB20P10_L USB30TXN0_L 8
USB30RXP1 R971 @ 0_0402_5% USB20N10_L SSTX-
27 USB30RXP1 1 2 2 D-
USB30RXN1 USB20N10_L 7
27 USB30RXN1 GND
USB20_P10 1 2 USB20P10_L USB20P10_L 3 10
1 2 USB30RXP0_L D+ GND
6 SSRX+ GND 11
3
USB20_P10 L64 OCE2012120YZF_4P 4 12
27 USB20_P10 GND GND
USB20_N10 USB20_N10 4 3 USB20N10_L D4 USB30RXN0_L 5 13
3
27 USB20_N10 4 3 SSRX- GND
USB20_P11 R974 1 @ 2 0_0402_5% OCTEK_USB-09EAEB
27 USB20_P11
1
USB20_N11 CONN@
27 USB20_N11
PESD5V0U2BT
1
SCA00001L00
R4722 @ 0_0402_5%
1 2
C D60 C
USB30TXN1 4 3 USB30TXN1_L @
4 3 +USB3_VCCA
USB30TXP1_L 1 1 109 USB30TXP1_L
OCE2012120YZF_4P
USB30TXP1 L91 1 2 USB30TXP1_L USB30TXN1_L 2 2 98 USB30TXN1_L
1 2
470P_0402_50V7K
C4644
R4723 1 @ 2 0_0402_5% USB30RXP1_L 4 4 77 USB30RXP1_L
1
R4724 1 @ 2 0_0402_5% USB30RXN1_L 5 5 66 USB30RXN1_L
USB30RXN1 4 3 USB30RXN1_L 3 3
4 3 2
OCE2012120YZF_4P 8
USB30RXP1 L92 1 2 USB30RXP1_L
1 2
R4725 1 @ 2 0_0402_5% AZ1045-04F_DFN2510P10E-10-9
USB20P11_L
R4726 1 @ 2 0_0402_5%
USB20N11_L JUSB4
USB20_P11 1 2 USB20P11_L USB30TXP1_L 9
1 2 SSTX+
3
1 VBUS
L93 OCE2012120YZF_4P D61 USB30TXN1_L 8
3
USB20_N11 USB20N11_L USB20N11_L SSTX-
4 4 3 3 2 D-
B 7 GND B
1
R4727 1 @ 2 0_0402_5% USB20P11_L 3 10
PESD5V0U2BT USB30RXP1_L D+ GND
6 11
1
SCA00001L00 SSRX+ GND
4 GND GND 12
USB30RXN1_L 5 13
SSRX- GND
OCTEK_USB-09EAEB
+5VALW CONN@
+USB3_VCCA
C22
10U_0805_10V4Z
80mils Low active 80mils 11/05 update footprint
1 2
U54
1 GND VOUT 8
2 7 R60
VIN VOUT
3 VIN VOUT 6
4 5 1 @ 2 USB_OC0# 27
37 USB_ON# EN FLG 0_0402_5%
G547I2P81U_MSOP8
Part Number = SA00003TV00
A A

B A
4019I5
5 4 3 2 1
+
5
V
A
L
W
T
O
+
5
V
S
(
5
A
)
+
1
.
1
V
A
L
W
T
O
+
1
.
1
V
S
(
1
.
1
A
)
A B C D E
+5VALW +5VALW
+5VALW +5VS
2
U38 +1.1VALW +1.1VS
SI4800BDY-T1-GE3_SO8 U39 R1097 R1098
8 1 AO4430L_SO8 100K_0402_5% 100K_0402_5%
7 2 8 1
2
10U_0805_10V4Z
10U_0805_10V4Z
10U_0805_10V4Z
C1446
1U_0402_6.3V6K
C1444
10U_0603_6.3V6M
C1447
1U_0402_6.3V6K
C1449
6 3 7 2
1
2
10U_0603_6.3V6M
C1448
1 1 5 1 1 6 3 1 1 VLDT_EN#
1
C1443
R1099 @ 1 5 SYSON#
1
C1445
470_0603_5% R1100 R1101
3
1K_0402_5% 470_0603_5% D Q52B
3 1
4
2 2 2 2 2 2 DMN66D0LDW-7_SOT363-6
1 37,51 VLDT_EN 2 1
3 1
2 G Q51
1
S 2N7002K_SOT23-3 5
29,37,49 SYSON
1
5 SUSP R1102
4
+VSB 1 2 5VS_GATE 5 VLDT_EN# 10K_0402_5% R1104
R1103 100K_0402_5% Q53B +VSB 1 2 1.1VS_GATE 100K_0402_5%
2
1 R1105 Q54B
4
6
6
47K_0402_5% DMN66D0LDW-7_SOT363-6
2
+5VALW
300K_0402_5%
R1106
C1450 1
1
.1U_0603_25V7K
SUSP Q53A 2 VLDT_EN# C1451
2 2
2
Q54A .1U_0603_25V7K
DMN66D0LDW-7_SOT363-6 DMN66D0LDW-7_SOT363-6 2 R1108
1
1
100K_0402_5%
1 2
+
3
V
A
L
W
T
O
+
3
V
S
(
3
.
3
A
)
1
D SUSP
14,37,47 ACIN ACIN 2 +3VS For Power noise
6
G Q57 20110127 Q52A
+3VALW +3VS S 2N7002K_SOT23-3 2 1 DMN66D0LDW-7_SOT363-6
U40 C19 680P_0402_50V7K
3
SI4800BDY-T1-GE3_SO8 Q57 change to SB000008J10 2 1 37,49,52 SUSP# 2
8 1 20101228 C27 680P_0402_50V7K
1
7 2 2 1
1
2
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
1U_0402_6.3V6K
6 3 1 1 C28 680P_0402_50V7K
C1455
1 1 5 2 1 R1109
C1452
2 R1110 C31 680P_0402_50V7K 10K_0402_5% 2

C1453
C1454
470_0603_5%
4
2
2 2
3 1
2 2
+VSB 2 1 3VS_GATE 5 SUSP

R1112 200K_0402_5%
6
Q60B
4
1
SUSP 2 Q60A C1456
.1U_0603_25V7K
DMN66D0LDW-7_SOT363-6 2
1
+1.5V +2.5VS +0.75VS +1.2VS
3 3
2
R1135 R1136 R1137 R1128

470_0603_5% 470_0603_5% 470_0603_5% 470_0603_5%
1 1
1 1
1 1
1 1
D D D D
2 SYSON# 2 SUSP 2 SUSP 2 VLDT_EN#
G G G G
S Q78 S Q79 S Q80 S Q74
2N7002K_SOT23-3 2N7002K_SOT23-3 2N7002K_SOT23-3 2N7002K_SOT23-3
3
4 4

Custom A
4019I5
A B C D E
5 4 3 2 1
Boot Enter S3 S3 Resume Shut Down

ACIN
AC Plug
+5VALW
+3VALW
SPOK
(+3VALW/+5VALW PWRGD) SPOK enable +1.1VALW
D D
+1.1VALW
EC_RSMRST#
(FCH to EC)
ON/OFF
PBTN_OUT#
(EC to FCH)
SLP_S5#
SLP_S3#
(FCH to EC)
125.6mS 165mS
SYSON
620uS
+1.5V
52.6mS 116.8mS 50.43mS 52.57mS
SUSP#
3.79mS
+5VS
5.95mS
+3VS LDO to +2.5VS
5.07mS
C
+2.5VS C
4.88mS
+1.5V_PCIE
(+1.5VS)
+0.75VS
83.4mS 84.2mS 85mS 84mS
VR_ON
8.62mS
+CPU_CORE
+CPU_CORE_NB
VGATE
31mS
VLDT_EN 31.6mS
1.08mS
+1.2VS
+1.1VS
13mS
PXS_PWREN
(FCH:PE_GPIO1)
1.57mS
+3VSG
1.57mS
+VGA_CORE
(+VDDC)
B B
1.57mS
+VDDCI
Within
20mS
3.57mS
+0.935VSG
7.82mS
+1.5VSG
10.58mS
+1.8VSG
62.83mS 94.17mS 63.63mS 94.37mS
FCH_PWRGD
(EC to FCH)
108.4mS 22.43mS 98.77mS 22.3mS
APU_PWRGD
(FCH to APU)
3.4mS 2.6mS
PLT_RST#
(FCH to devices)
APU_PCIE_RST#
(FCH to PCIe device)
2.2mS 1.8mS
APU_RST#
(FCH to APU)
A A

Custom A
4019I5
5 4 3 2 1
5 4 3 2 1
ADP_ID 37
PC14
1
D D
1
PD6 @1000P_0402_50V7K
PR7
10K_0402_5%
2
2
2
RLZ3.6B_LL34
2
PR6 VIN
10K_0402_5% ADPIN PL1
HCB2012KF-121T50_0805
1 2
1
@PJP1
2 2 1 1
4 4 3 3 1 2
100P_0402_50V8J
1000P_0402_50V7K
100P_0402_50V8J
PL2
1
6 6 5 5 HCB2012KF-121T50_0805
1
PR1 @
PC1
PC3
PC4
Charge_LED 8 7 ACIN_LED PC2 1K_0402_5%
8 7 1000P_0402_50V7K
2
ACES_59012-0080N-002
2
3
3
PD4 PD1 +3VALW +3VLP
1
C PJSOT24CW_SOT323 PJSOT24CW_SOT323 C
PR32 0_0402_5%
1
PR31 0_0402_5%
2
2
ESD diode : SCA00001G00
1
@
3
+3VLP +3VALW
2
37 AC_LED#
@ @
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
1
1
VIN 37.1
TP0610K-T1-GE3 1P SOT23-3
PR26
PR27
PR28
PR29
PQ5
2
@ PR3 PD2 @
2
68_1206_5% LL4148_LL34-2
1 2
1
5
PR25
2K_0402_5% 1 AC_LED#
P
ACIN_LED 1 B
2 4 O
1
2 BAT_CHG_LED
A
G
B PR2 @ B
68_1206_5% VS PU2
3
PQ1 74LVC1G02GW_SOT353-5
PD3 TP0610K-T1-GE3 1P SOT23-3
2
LL4148_LL34-2
BATT+ 2 1 3 1
0.22U_0603_25V7K
100K_0402_5%
1
PC6@
PR4
PC5
5
0.1U_0603_25V7K
2 AC_LED#
P
2
PR5 Charge_LED A
4
2
22K_0402_1% Y
B 1
G
1 2 BAT_CHG_LED 37
38 51ON#
PU3
3
74LVC1G86GW_SOT353-5
A A

5 4 3 2 1
5 4 3 2 1
D
For KB930 ‐‐> Keep PU1 circuit D
BATT++ PL3
HCB2012KF-121T50_0805 BATT+ (Vth = 0.825V)
1 2
PL4
HCB2012KF-121T50_0805
1 2 BATT+
1
PC9
1000P_0402_50V7K PC7
2
0.01U_0402_25V7K
2
PJPB1 battery connector PH1 under CPU botten side :
PD7
CPU thermal protection at 90 +‐3 degree C
3
1 Recovery at 56 +‐3 degree C
@ PJP2 2
SUYIN_200275MR008G15QZR
L30ESD24VC3-2 Rset = 3 * Rtmh
1
1
2 2
3
Rhyst = (Rset* Rtml) / (3*Rtml ‐ Rset)
3
4
4
5 5 Rtmh at 90C = 7.8K, Rtml at 56C = 26.1K
6
6 Rset = 3 * 7.8K = 23.4K ==> 23.7K
2
C C
7 7
8
8
GND 9 PD5 Rhyst = (23.4K * 26.1K) / (3 * 26.1K ‐ 23.4K) = 11.12K ==> 11.3K
10 L30ESD24VC3-2
GND PRA2
1 2 EC_SMB_DA1 37,38,47
1
FBMA-10-100505-301T
PR24 +3VLP
100_0402_5%
1
PRA3
1 2 EC_SMB_CK1 37,38,47 PR12
1
FBMA-10-100505-301T
PR30 PC10 23.7K_0402_1%
100_0402_5% .1U_0402_16V7K
2
PR9
2
6.49K_0402_1%
2 1
+3VALW PR13
1
PU1 11.3K_0402_1%
1 8
1
VCC TMSNS1
1
PH1
PR23 2 7 100K_0402_1%_NCP15WF104F03RC
GND RHYST1
2
1K_0402_1% MAINPWON
46,8 MAINPWON 3 OT1 TMSNS2 6
2
+3VS 4 5 2 1 2 1
OT2 RHYST2 ADP_I 37,47
BATT_TEMP 37 PR14 PR15
G718TM1U_SOT23-8
1.2K_0402_1%
2
3.57K_0402_1%
1
PR16 PR17
B 100K_0402_1% 10K_0402_1% B
PQ2
TP0610K-T1-GE3 1P SOT23-3
1
8 H_PROCHOT#
2
B+ 3 1 +VSB
1
D
0.22U_1206_25V7K
100K_0402_1%
2 1 2 EC_THERM# 25,37,54,8
1
@ G
PR18 @
1
1
PR19
S SSM3K7002FU_SC70-3 0_0402_5%
Active point = 114W
PC11
3
+5VALW PC12 @ PQ3
0.1U_0603_25V7K
Recovery point = 88W
2
2
2
2
2
PR21
PR20 22K_0402_1%
100K_0402_1% 1 2
PR22
1
0_0402_5% D
1 2 2 PQ4
46,50 SPOK
G SSM3K7002FU_SC70-3
S
3
1
PC13 @
.1U_0402_16V7K
2
A A

5 4 3 2 1
A B C D E
2VREF_8205
1U_0603_16V6K
1
PC302
2
1 1
VL
PR301 PR302
13.7K_0402_1% 30.9K_0402_1%
1 2 1 2
PR303 PR304
20K_0402_1% 20K_0402_1% B++
1 2 1 2
B+ B++ For RF request
For RF request
+3VLP
ENTRIP2
ENTRIP1
PL301
2200P_0402_50V7K
10U_0805_25V6K
10U_0805_25V6K
68P_0402_50V8J
FB_3V
FB_5V
PR306
0.1U_0402_25V6
HCB2012KF-121T50_0805 PR305
1 2 113K_0402_1% 57.6K_0402_1%
1
PC303
PC304
PC322
1 2 1 2
2200P_0402_50V7K
10U_0805_25V6K
68P_0402_50V8J
PC305
PC306
0.1U_0402_25V6
10U_0805_6.3V6M
2
1
1
PC301
PC307
PC308
PC321
PU301
5
PC309
ENTRIP2
FB2
TONSEL
FB1
ENTRIP1
REF
5
PQ302
2
PQ301 25 AON7518
2
AON7408L_DFN8-5 P PAD
45,50 SPOK
7 VO2 VO1 24 4
4
2 PC311 2
8 VREG3 PGOOD 23
PC310 PR307 PR308 0.22U_0603_16V7K
1 2BST1_3V 1 2BST_3V 9 22 BST_5V 1 2BST1_5V1 2
3
2
1
1
2.2_0402_5% BOOT2 BOOT1 2.2_0402_5%
2
PL302 3 0.22U_0603_16V7K UG_3V 10 UGATE2 UGATE1 21 UG_5V PL352
4.7UH_ETQP3W4R7WFN_5.5A_20% 1UH_VMPI0703AR-1R0M-Z01_11A_20%
+3VALWP 2 1 LX_3V 11 PHASE2 PHASE1 20 LX_5V 2 1

+5VALWP
1
5
4.7_1206_5%
LG_3V 12 19 LG_5V
LGATE2 LGATE1
5
4.7_1206_5%
PR309
SKIPSEL
PQ303 PD302 PR311
150U_UD_6.3VM_R15M
PR310
1
VREG5
RLZ5.1B_LL34 499K_0402_1% 1
GND
B+
VIN
+ PC312 RT8205LZQW(2) WQFN 24P PWM
NC
EN
1 2 1 2
2
1SNUB_3V
PC313
150U_B2_6.3VM_R35M 4
1SNUB_5V 2
4 PR312 @
Ipeak=5A
MDU1512RH_POWERDFN56-8-5
13
14
15
16
17
18
2
680P_0603_50V7K
0_0402_5%
2
PQ304
MAINPWON 1 2
680P_0603_50V7K
Imax=3.5A
PC314
3
2
1
1U_0603_10V6K
AON7406
200K_0402_1%
1
2
3
1
F=500K
PC316
2
PC315
B++ VL
PR313
0.1U_0603_25V7K
Rtrip=113K, OCP=6.92A
2
2
PC318
Total Capacitor 150uF,
1
PC317
4.7U_0805_10V6K
2
Ipeak=10A
ENTRIP1
ENTRIP2
2VREF_8205 Imax=7.5A
3
F=400K 3
6
PJP303
PQ305A PQ305B
2 2 1 1
Rtrip=57.6K, OCP=16.39A
SSM6N7002FU-2N_SOT363-6 2 N_3_5V_001 5 SSM6N7002FU-2N_SOT363-6 @ JUMP_43X118
PJP304
Total Capacitor 150uF,
1
+5VALWP 2 2 1 1
+5VALW ( UMA 10A,400mils ,Via NO.= 20 )
@ JUMP_43X118
1 2
VL
@PR315
@ PR315 PR314
0_0402_5% 100K_0402_5%
1 2
37,38 EC_ON
PJP301
PR316
0_0402_5%
+3VALWP 2 2
@ JUMP_43X118
1 1
+3VALW ( 5A,200mils ,Via NO.= 10 )
MAINPWON 1 2
45,8 MAINPWON
1
PD301 PR317
LL4148_LL34-2 1M_0402_1% PQ306
2 1 1 2 2 LTC015EUBFS8TL NPN UMT3F
VIN
4.7U_0603_6.3V6K
402K_0402_1%
1
PC319
4 4
PR318
PR319
316K_0402_1%
2
2 1
2
VS

For KB930 ‐‐> Keep PD301, PR317, PR319 MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A B C D E
A B C D
for reverse input protection
1
PQ101 D
2
G
2N7002KW_SOT323-3
S
3
1 1
1 2 1 2
PR101 PR102
1M_0402_5% 3M_0402_5%
B+
VIN PQ102 P1 PQ103
P2
PR103 PL101
TPCA8057-H_PPAK56-8-5 MDV1526 PQ104
0.01_1206_1%
1.2UH +-30% 1231AS-H-1R2N=P3 2.9A MDV1526
1 1 1 4 1 2 1
2200P_0402_50V7K
10U_0805_25V6K
10U_0805_25V6K
68P_0402_50V8J
2200P_0402_50V7K
2 2 2
10U_0805_25V6K
0.1U_0402_25V6
10U_0805_25V6K
5 3 3 5 2 3 5 3
0.1U_0402_25V6
1
@
PC105
PC218
VIN
PC108
PC106
0.01U_0402_50V7K
@
1
1
0_0402_5%
PC107
@
1
PC103
PC104
PC102
0_0402_5%
4
4
1
PR104
PC101
PC110
2
PR105
2 PC109
0.1U_0402_25V6
2
1 2 @
2
3
2
PD101
0.1U_0603_25V7K
0.1U_0603_25V7K
BAS40CW_SOT323-3 BQ24725_BATDRV 1 2
1
PC111
PC112
PR106
4.12K_0603_1%
PC113 0.047U_0402_25V7K
1
4.12K_0603_1%
4.12K_0603_1%
2
1
1 2
PR108
PR107
5
10_1206_1%
1
PQ105
PR109
1
2.2_0603_5%
AON7408L_DFN8-5
2
PR110
2 2
BQ24725_ACP
BQ24725_ACN
PR111
1
DH_CHG 1 2 4
BQ24725_BST
PD102 BATT+
BQ24725_LX
0_0402_5%
2
1 2 RB751V-40_SOD323-2
DH_CHG
PL102
2011/03/18 PC114 PC115 4.7UH_ETQP3W4R7WFN_5.5A_20% PR112
3
2
1
0.01_1206_1%
delete VIN voltage 1U_0603_25V6K 1 2
BQ24725_LX 1 2 CHG 1 4
1U_0603_25V6K
detecting circuit
4.7_1206_5%
5
1
20
19
18
17
16
2 3
PR113
PU101
1 CSOP1
1 CSON1
AON7406L_DFN8-5
BTST
VCC
PHASE
HIDRV
REGN
2200P_0402_50V7K
10U_0805_25V6K
10U_0805_25V6K
0.01U_0402_50V7K
68P_0402_50V8J
0.1U_0402_25V6
21
0.1U_0402_25V6
PAD
PQ106
PC118
PC119
2
1
PC121
PC116
PC117
PC127
PC122
1 15 DL_CHG 4
ACN LODRV
680P_0603_50V7K
2
PC120
2 ACP GND 14
3
2
1
2
BQ24738ARGRR QFN 20P CHARGER
BQ24725_CMSRC 3 13 SRP 2 PR114 1 CSOP1
CMSRC SRP
1
0_0603_5%
BQ24725_ACDRV 4 12 SRN 2 PR115 1 CSON1
2
@ PR116
@PR116 ACDRV SRN
0_0603_5%
10K_0402_1% PC123
BQ24725_BATDRV 0.1U_0603_25V7K
1 2 5 11
+3VALW PR117 ACOK ACDET BATDRV
10K_0402_1%
IOUT
SDA
ILIM
SCL
1 2
3
+3VLP +3VALW 3
6
10
14,37,42 ACIN 1 2
PR118
0_0402_5% 1 2
PR119
0_0402_5%
0.01U_0402_25V7K
100K_0402_1%
316K_0402_1%
1
PR120
PC124
0_0402_5%
2
VIN
2
330K_0402_1%
2
PR123
1
PR124
1
PR122
2
0_0402_5%
2
0.047U_0402_16V
51K_0402_1%
EC_SMB_CK1 37,38,45
1
1
PC125
PR126
2
1
PR125
EC_SMB_DA1 37,38,45
2
PC126
2 1 ADP_I 37,45
Vin Dectector 100P_0402_50V8J
4 4
Min. Typ Max.

H-->L 17.33V
L-->H 16.98V
ILIM and external DPM Security Classification Compal Secret Data Compal Electronics, Inc.
4.36A Issued Date 2011/10/03 Deciphered Date 2014/12/31 Title
Size
Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-8712P A
A B C D
5 4 3 2 1
D D
1.8VGSP
Peak Current 1.4A
OCP current 3A
PL402
PL401
4
HCB1608KF-121T30_0603 PU401 1UH_NRS4018T1R0NDGJ_3.2A_30%
LX_1.8V
+5VALW 1 2 10 2 1 2
+1.8VGSP
PG
PVIN LX
22P_0402_50V8J
9 PVIN LX 3
1
680P_0603_50V7K 4.7_1206_5%
1
1
PC404
PC403 8 SVIN
PR403
22U_0805_6.3V6M PR401
6 20K_0402_1%
2
2
FB
22U_0805_6.3V6M
22U_0805_6.3V6M
C EN_1.8V C
5
1 2
2
EN
1
NC
NC
TP
PC401
PC402
FB=0.6Volt
SY8033BDBC_DFN10_3X3
PC406
11
2
2
PR404
15,25,27,37,52,53,56 PXS_PWREN 1 2
1
0.1U_0402_10V7K
0_0402_5%
47K_0402_5%
PC405
FB_1.8V
1
PR4045
@
2
1
@
PR402
10K_0402_1%
2
B @ PJP401 B
+1.8VGSP 2 1 +1.8VGS
2 1
JUMP_43X39
(4A,240mils ,Via NO.= 8)
A A

Issued Date 2011/07/29 Deciphered Date Title
5 4 3 2 1
5 4 3 2 1
0.75Volt +/- 5%
TDC 0.525A
Peak Current 0.75A
PL502
HCB1608KF-121T30_0603 OCP Current 0.9A
D B+ 1 2 1.5V_B+ D
PR504
BST_1.5V 1 2 BOOT_1.5V +1.5V
2.2_0402_5%
2200P_0402_50V7K
68P_0402_50V8J
10U_0805_25V6K
0.1U_0402_25V6
4.7U_0805_25V6-K
PR511
DH_1.5V_1 1 2 DH_1.5V +0.75VSP
1
PC516
0.22U_0402_10V6K
0_0402_5%
PC504
PC505
PC502
PC503
PC506
10U_0805_6.3V6K
10U_0805_6.3V6K
10U_0805_6.3V6K
SW_1.5V
1
PC507
PC508
PC517
1
5
DL_1.5V
16
17
18
19
20
PQ501 PU501
2
AON7408L_DFN8-5 @
PHASE
UGATE
BOOT
VTT
VLDOIN
PAD 21
4 15 LGATE VTTGND 1
PR505 14 2
PL501 9.53K_0402_1% PGND VTTSNS
1
2
3
1UH_VMPI0703AR-1R0M-Z01_11A_20% 1 2CS_1.5V
2 1 13 3
+1.5VP PC509 CS RT8207MZQW_WQFN20_3X3 GND
5
1U_0603_10V6K
1 2 12 4 VTTREF_1.5V
PR507 VDDP VTTREF
330U_D2_2.5VY_R15M
5.1_0603_5%
C Ipeak=7.5A +
1
1 2 VDD_1.5V 11 VDD VDDQ 5 +1.5VP C
PC501
PGOOD
PR506 4
Imax=5.25A
1
4.7_1206_5%
TON
+5VALW
SNUB_+1.5VP
PQ502 PC511
FB
S5
S3
2
1
2
F=300K MDV1526 0.033U_0402_16V7K
2
PC510
1
2
3
10
6
1U_0603_10V6K
+5VALW
2
PR501
1
680P_0603_50V7K
10K_0402_1%
+1.5VP
PC512
FB_1.5V 2 1
TON_1.5V
PC518
2
@
1 2
Mode Level +0.75VSP VTTREF_1.5V .1U_0402_16V7K

PR503
S5 L off off 887K_0402_1%
S3 L off on PR508 1.5V_B+ 1 2
S0 H on on 0_0402_5%
1
1 2 EN_1.5V PC513
29,37,42 SYSON .1U_0402_16V7K
Note: S3 - sleep ; S5 - power off
2
10K_0402_1%
41.2K_0402_5%
EN_0.75VSP
2
PR502
PR407
1 @ PC514
0.1U_0402_10V7K
B B
2
1
+3VS
10K_0402_1%
@
2
PR510
PR409
0_0402_5%
2 1
37,42,52 SUSP# PR406
1
D 5.1K_0402_1%
1
2 1 2 DDR3L_EN 27
G
.1U_0402_16V7K
1
2
PJP501 S
PC411
1 2 +1.5V (7A,280mils ,Via NO.= 14) @ PC515 PR408
+1.5VP
0.1U_0402_10V7K PQ401 10K_0402_5%
2
JUMP_43X118
2
SSM3K7002FU_SC70-3
1
@ PJP503
+0.75VSP 2 2 1 1 +0.75VS (2A,80mils ,Via NO.= 4)
JUMP_43X39
A A

Title
Compal Electronics, Inc.
Issued Date 2011/07/29 Deciphered Date 2012/07/29
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-8712P A
5 4 3 2 1
5 4 3 2 1
D D
1.1valwp
Peak Current 4A
PC802 current limited 6A
1
SY8809DFC_DFN8_2X2
22U_0805_6.3V6M 4 5 PL802
GND GND 0.47UH_FDVE0630-H-R47M=P3_17.7A_20%
PL801
2
3 6 LX_+1.1V 1 2
+5VALW HCB1608KF-121T30_0603 LX LX +1.1VALWP
1 2 1.1V_IN 2 7
IN PG
4.7_0805_5%
1 8 FB_+1.1V
EN FB
PR802
PU801
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
2
1
PC803
PC804
PC805
PR801
2
1 2EN_1.1V
SNUB_+1.1V
45,46 SPOK
@
0.1U_0402_10V7K
0_0402_5%
100K_0402_1%
PC807
C C
PR804
1
PR803
2 1
@
2
2 8.45K_0402_1%
680P_0603_50V7K
PC809
PC808
2
1
2 1
PR805
22P_0402_50V8J
+1.1VALWP
10K_0402_1%
2
@ PJP504
+1.1VALWP 2 2 1 1 +1.1VALW
JUMP_43X39 (4A,240mils ,Via NO.= 8)
B B
A A

5 4 3 2 1
5 4 3 2 1
PL701
HCB1608KF-121T30_0603
+1.2VSP_B+ 2 1
B+
2200P_0402_50V7K
68P_0402_50V8J
10U_0805_25V6K
0.1U_0402_25V6
1
1
PC703
PC705
PC702
PC704
2
2
5
D PQ701 D
AON7408L_DFN8-5
PR702
PC706
2.2_0603_5% 4
1 2 1 2
PU701 0.1U_0603_25V7K
1 10 BST_+1.2VSP PR711
3
2
1
PGOOD BOOT 0_0402_5%
PR703
1 2 TRIP_+1.2VSP 2 CS UGATE 9 UG_+1.2VSP 1 2 PL702
88.7K_0402_1% 1UH_VMPI0703AR-1R0M-Z01_11A_20%
PR701 EN_+1.2VSP 3 8 SW_+1.2VSP 1 2
37,42 VLDT_EN
0_0402_5% EN PHASE
+1.2VSP
1 2 FB_+1.2VSP 4 7 +1.2VSP_5V
FB VCC
+5VALW
2
47K_0402_1%
0.1U_0402_16V7K
RF_+1.2VSP 5 6 LG_+1.2VSP
RF LGATE
1
1
PR710
PQ702 1
1
@ PC701
330U_D2_2.5VY_R15M
TP 11
MDV1526
+
PC708
PC707 PR704
2
1
RT8237EZQW(2)_WDFN10_3X3 1U_0603_6.3V6M 4.7_1206_5%
1
2
@ PR705 2
4
470K_0402_1% Ipeak=8.5A
1
PC709
Imax=5.95A
2
1000P_0603_50V7K
3
2
1
2
F=290K
C @ @ C
PC710 PR706
2 1 2 1
PJP701 +1.2VS
PR707 1000P_0402_50V7K 1.2K_0402_1% +1.2VSP 2 2 1 1
7.15K_0402_1% @ JUMP_43X118
2 1
(8.5A,340mils ,Via NO.=17)
+1.2VSP
Iocp=13A
2
PR708
10K_0402_1%
1
B B
PU702
APL5508-25DC-TRL_SOT89-3
+3VS PJP702
2 IN OUT 3 +2.5VSP
+2.5VSP 2 1 +2.5VS
2 1
1
GND @ JUMP_43X39
4.7U_0805_6.3V6K
1
1
PC712
@ PR709 (0.75A,40mils ,Via NO.=22)
PC711 1 10K_1206_5%
1U_0603_10V6K
2
2
A A

5 4 3 2 1
A B C D
1
1.5VPCIEP 1
Peak Current 6A
OCP current 6A
PL1500
PL1501
4
HCB1608KF-121T30_0603 PU1501 0.47UH_FDVE0630-H-R47M=P3_17.7A_20%
VIN_1.5V_PCIE LX_1.5V_PCIEP
+5VALW 1 2 10 2 1 2
PG
PVIN LX +1.5V_PCIEP
22P_0402_50V8J
9 PVIN LX 3
22U_0805_6.3V6M
22U_0805_6.3V6M
4.7_0805_5%
1
22U_0805_6.3V6M
PC1500
PC1501 8 PR1505
SVIN
1
PR1501
22U_0805_6.3V6M 15K_0402_1%
PC1503
PC1505
PC1506
6 FB_1.5V_PCIEP
2
2
EN_1.5V_PCIEP FB
5 EN
2
SS
TP
LX
S IC SY8036LDBC DFN 10P PWM
FB=0.6Volt
11
1
680P_0603_50V7K
PR1502
37,42,49 SUSP#
PC1502
1 2 PR1503
10K_0402_1%
2
1
0.1U_0402_10V7K
0_0402_5%
47K_0402_5%
PC1504
2
1
PR1504
@
@ PJ1502
2
@
+1.5V_PCIEP 1 2 +1.5V_PCIE
2
JUMP_43X118 2
(6A,240mils ,Via NO.= 12)
1V GSP
Peak Current 4.2A
1
PC9355
22U_0805_6.3V6M current limited 6A
2
PL935
PU935 PL936
4
HCB1608KF-121T30_0603 0.47UH_FDVE0630-H-R47M=P3_17.7A_20%
VIN_0.935VGSP LX_0.935VGSP
+5VALW 1 2 10 2 1 2
PG
PVIN LX +0.935VGSP
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
9 PVIN LX 3
1
1
1
3 3
PC9352
PC9351
PC9357
8 PR9353 PR9354
SVIN PC9353
4.7_0805_5% 13.3K_0402_1%
2
6 FB_0.935VGSP 22P_0402_50V8J
2
EN_0.935VGSP FB
5 EN
2
1
PR9335 FB=0.6Volt
SS
TP
LX
1 2 S IC SY8036LDBC DFN 10P PWM

15,25,27,37,48,53,56 PXS_PWREN
11
1
1
1
680P_0603_50V7K
0.1U_0402_10V7K
0_0402_5%
47K_0402_5%
PC9356
PC9354
PR9352
1
PR9351
20K_0402_1%
2
@
2
2
@
@
PJ9352
+0.935VGSP 1 2 +0.935VGS
JUMP_43X118
(4.2A,460mils ,Via NO.= 8.4)
4 4

Size
Document Number Rev
A
A B C D
A B C D
1
+VDDCI 1
TDC 2.2A
@ PL1001 OCP current 3A

@ PL1000
4
HCB1608KF-121T30_0603 @ PU1000
@PU1000 1UH_NRS4018T1R0NDGJ_3.2A_30%
LX_VDDCIP
+5VALW 1 2 10 PVIN 2 1 2
PG
LX +VDDCIP
22P_0402_50V8J
9 PVIN LX 3
22U_0805_6.3V6M
4.7_0805_5%
1
22U_0805_6.3V6M
PC1000
@PC1001
@ PC1001 8 @ PR1006
SVIN
1
PR1001
22U_0805_6.3V6M 10_0402_5%
PC1003
PC1005
6 FB_VDDCIP
2
EN_VDDCIP FB
5
2
EN @ @
NC
NC
TP
SY8033BDBC_DFN10_3X3 1 2
FB=0.6Volt @ @
11
1
@PR1003
@ PR1003
680P_0603_50V7K
@ PR1002
@PR1002 4.99K_0402_1%
15,25,27,37,48,52,56 PXS_PWREN
PC1002
1 2 @
PR1004
2
1
0.1U_0402_10V7K
0_0402_5% 2 1 VDDCI_SEN 17
47K_0402_5%
PC1004
1
PR1005
@
0_0402_5%
@
2
@ +3VS
1
2 2
1
PR1007@
1
29.4K_0402_1% PR1008@
10K_0402_5%
2
@PR1000
@ PR1000
10K_0402_1% PR1009@
2
1
D 10K_0402_5%
2
2 2 1
G VDDCI_VID 14
1
S
1
PQ1000 @
2N7002W-T/R7_SOT323-3 @ PC1006 PR1010 @
4700P_0402_25V7K 100K_0402_5%
2
VDDCI_VID
High 1V
Low 0.9V
3 3
@ PJ1001
+VDDCIP 2 2 1 1 +VDDCI
JUMP_43X39
(2.2A,100mils ,Via NO.= 5)
4 4

Size
Document Number Rev
A
A B C D
5 4 3 2 1
PC2011 PR2001
330P_0402_50V7K 2K_0402_1%
2 1 2 1
8 APU_VDDNB_SEN PC2012
PR2002 PR2003 @ PR2004
MDU1516URH_POWERDFN56-8-5
2.8K_0402_1% 137K_0402_1%390P_0402_50V7K 32.4K_0402_1%
2 1 2 1 2 1 2 1
PL2002
CPU_B+
PR2005 PR2006 PC2013 PR2007 PC2014 HCB2012KF-121T50_0805
10_0402_5% 0_0402_5% 1000P_0402_50V7K 301_0402_1% 100P_0402_50V8J 1 2 B+
D D
2200P_0402_50V7K
10U_0805_25V6K
10U_0805_25V6K
2 1 2 1 2 1 2 1 2 1 PL2005
+APU_CORE_NB
100U_25V_M
100U_25V_M
68P_0402_50V8J
1 1 HCB2012KF-121T50_0805
0.1U_0402_25V6
5
PC2019 1 2
0.1U_0402_25V6
0.1U_0402_25V6
1
PQ2001
PC2017
PC2018
PC2020
PC2057
PC2015
PC2058
VSUMP_NB 1000P_0402_50V7K + +
1
2.61K_0402_1%
PC2061
PC2062
PC2016
10K_0402_5%_ERTJ0ER103J
1
2 1
2
2 2
PR2008
2
0.047U_0402_16V7-K
0.1U_0402_25V6
@ UGATE_NB1 4
2
11K_0402_1%
2
PR2009
12
PH2001
PC2021
PC2022
@ @
PL2001
1
3
2
1
0.36UH_VMPI1004AR-R36M-Z03_30A_20%
1
PR2010
634_0402_1% PHASE_NB1 1 4
+APU_CORE_NB
2
VSUMN_NB 2 1 FCCM_NB
1
PC2025 2 3
5
1
1
@ PC2024
0_0603_5%
PR2011
@ PR2012 PR2013 0.22U_0603_25V7K
PC2023 100_0402_1% 220P_0402_50V7K BOOT_NB1 1 2 2 1 PR2014 PR2015
PQ2007
0.1U_0603_50V7K 2 1 2 1 LGATE_NB1 2.2_0603_5% 4.7_1206_5% 3.65K_0402_1%
2
PR2061 VSUMP_NB 2 1
PQ2002
2 1 PHASE_NB1
1 2
10K_0402_1% @ LGATE_NB1 4 4 PR2018
UGATE_NB1 PC2026 1_0402_1%
After rev1.1 must change to 133k VSUMN_NB 2
680P_0603_50V7K 1
APU_CORE_NB
TDC 25A
2
48
47
46
45
44
43
42
41
40
39
38
37
3
2
1
3
2
1
2
PU2000 Peak Current 33A

2
PR2016
ISUMP_NB
FB_NB
PGOOD_NB
FCCM_NB
ISEN1_NB
ISUMN_NB
VSEN_NB
COMP_NB
PWM2_NB
LGATEX
PHASEX
UGATEX
133K_0402_1% PC2027 PR2019 OCP current 40A
1000P_0402_25V6K 10_0402_5% CPU_B+
Load line -4mV/A
1
+5VS 2 1 1 36 BOOT_NB1
1
PR2017 27.4K_0402_1% ISEN2_NB BOOTX PR2020

2 1 2 35 2 1
FSW=300kHz
NTC_NB VIN
PH2000 BOOT2 0_0603_5%
DCR 1.1mohm +/-5%
3 IMON_NB BOOT2 34
1
470K_0402_5%_TSM0B474J4702RE PR20000_0402_5% TYP MAX
C 2 1 25,37,45,8 EC_THERM# 2 1 SVC 4 33 UGATE2 PC2028 C
8 APU_SVC
PR20210_0402_5% SVC UGATE2
0.22U_0603_25V7K CPU_B+ H/S Rds(on) :11.7mohm , 14.5mohm
2
2 1 5 32 PHASE2
VR_HOT_L PHASE2 L/S Rds(on) :2.6mohm , 3.2mohm
1
PR20230_0402_5%
+5VALW
2200P_0402_50V7K
10U_0805_25V6K
10U_0805_25V6K
PR2022 2 1 SVD 6 31 LGATE2
8 APU_SVD SVD LGATE2
10.5K_0402_1% PR20240_0402_5% ISL6277HRTZ-T_TQFN48_6X6
68P_0402_50V8J
+1.5VP 2 1 VDDIO 7 30
0.1U_0402_25V6
PR20250_0402_5% VDDIO VDDP PR2026
2
1
PC2029
PC2031
PC2030
PC2032
PC2059
8 APU_SVT 2 1 SVT 8 SVT VDD 29 2 1
5
1U_0603_16V6K
PR20280_0402_5% 1_0603_5%
37 VR_ON 2 1 ENABLE 9 28
2
ENABLE PWM_Y
PQ2003
1U_0603_16V6K
After rev1.1 must change to 133k PR20270_0402_5%
PC2034
PR2029
25,8 APU_PWRGD 2 1 PWROK 10 PWROK LGATE1 27 LGATE1
PC2033
133K_0402_1%
2
1 2 11 26 PHASE1 UGATE1 4
IMON PHASE1
PC2035 12 25 UGATE1
1000P_0402_25V6K NTC UGATE1
PGOOD
BOOT1
ISUMN
ISUMP
COMP
ISEN3
ISEN2
ISEN1
+3VS
VSEN
1 2 PL2003
RTN
3
2
1
FB2
+5VS
FB
TP
PHASE1 1 4
PR203027.4K_0402_1% PR2032 0.36UH_FDUM0640J-H-R36M-P3_22A_20% +APU_CORE
13
14
15
16
17
18
19
20
21
22
23
24
49
1
2 1 0_0402_5% PC2036 ISEN1 2 PR2031 1 2 3 1 2 ISEN2
5
2 1 ISEN3 0.22U_0603_25V7K 10K_0402_1%
0.1U_0402_25V6
0.1U_0402_25V6
1
PH2002 PR2033 BOOT1 1 2 2 1 PR2037 PR2034
1
PC2065
PC2066
470K_0402_5%_TSM0B474J4702RE 2 1 ISEN2 BOOT1 100K_0402_5% 2.2_0603_5% 4.7_1206_5% PR2038 10K_0402_1%
PQ2004
2 1 PR2036 PR2035 3.65K_0402_1%
2
10_0402_5% ISEN1 VSUM+ 2 1
2
1
0.22U_0402_10V6K
0.22U_0402_10V6K
@ LGATE1 4
1 2
1
PR2062 VGATE 37 PC2039 @

1
PR2039 10K_0402_1% 680P_0603_50V7K PR2040

PC2040 1_0402_1%
10.5K_0402_1%
@ 10P_0402_25V8K VSUM- 2 1
APU_core @
2
3
2
1
2
PC2037
PC2038
2 1 TDC 36A
2
VSUM-
CPU_B+ Peak Current 50A
B
VSUM+ OCP current 60A B
2200P_0402_50V7K
10U_0805_25V6K
10U_0805_25V6K
2.61K_0402_1%
PC2041 PR2042 PC2042 PR2043

Load line -2.1mV/A
10K_0402_5%_ERTJ0ER103J
1
1000P_0402_50V7K301_0402_1% 100P_0402_50V8J 32.4K_0402_1%
5
330P_0402_50V7K
68P_0402_50V8J
PR2041
0.022U_0402_16V7K
0.22U_0402_10V6K
2 1 2 1 2 1 2@ 1 FSW=300kHz
0.1U_0402_25V6
2
1
PQ2005
PC2046
PC2047
PC2048
PC2049
PC2060
DCR 1.1mohm +/-5%
2
2
11K_0402_1%
PR2045 PR2046 PC2050

12
TYP MAX
PR2044
PC2043
PC2044
PC2045
2.26K_0402_1% 137K_0402_1% 390P_0402_50V7K

PH2003
2
2 1 2 1 2 1 UGATE2 4
H/S Rds(on) :11.7mohm , 14.5mohm
1
1
1
@ PR2048
768_0402_1% PR2047 PC2051 L/S Rds(on) :2.6mohm , 3.2mohm
2
VSUM- 2 1 2K_0402_1% 680P_0402_50V7K
3
2
1
2 1 2 1 PL2004
PC2052
1
PR2050 820P_0402_50V7K PHASE2 1 4

PC2054 100_0402_1% PR2049 0.36UH_FDUM0640J-H-R36M-P3_22A_20% +APU_CORE
0.1U_0603_50V7K 2 1 2 1 10_0402_5% PC2053 ISEN2 2 PR2051 1 2 3 1 2 ISEN1
2
1
2 1 0.22U_0603_25V7K 10K_0402_1%
+APU_CORE
0.1U_0402_25V6
0.1U_0402_25V6
@ @ PR2055 BOOT2 1 2 2 1 PR2054 PR2052
1
PC2063
PC2064
0_0402_5% 2.2_0603_5% 4.7_1206_5% PR2056 10K_0402_1%
APU_VDD_SEN 8
PQ2006
2 1 PR2053 3.65K_0402_1%
VSUM+ 2 1
1 2
2
LGATE2 4 @ @
PR2057 PC2055
0_0402_5% 680P_0603_50V7K PR2058
0.01U_0402_25V7K
2 1 1_0402_1%
2
PR2059 VSUM- 2 1
3
2
1
10_0402_5% APU_VDD_RUN_FB_L 8
2
2 1
PC2056
1
A A

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom A
5 4 3 2 1
A
B
C
D
PC273 PC257 PC247
0.22U_0402_16V7K 22U_0805_6.3V6M 22U_0805_6.3V6M
2 1 2 1 2 1
2
1
+
PC268 PC274
330U_D2_2V_Y 0.22U_0402_16V7K
2 1
+APU_CORE
+APU_CORE
5
5
PC277 PC258 PC248

0.01U_0402_50V7K 22U_0805_6.3V6M 22U_0805_6.3V6M
2 1 2 1 2 1
2
1
+
+APU_CORE
PC278
PC269 0.01U_0402_50V7K
330U_D2_2V_Y 2 1
PC279
Local
0.01U_0402_50V7K PC261 PC249
2 1 22U_0805_6.3V6M 22U_0805_6.3V6M
2 1 2 1
2
1
+
PC270
330U_D2_2V_Y
PC280 @ PC264 PC262 PC250

180P_0402_50V8J 22U_0805_6.3VAM 22U_0805_6.3V6M 22U_0805_6.3V6M
2 1 2 1 2 1 2 1
PC285
180P_0402_50V8J
2
1
+
2 1
PC271
330U_D2_2V_Y
@
PC281 PC265 PC259 PC251

180P_0402_50V8J 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M
2 1 2 1 2 1 2 1
4
4
PC970 PC944 PC965 PC932

1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K 10U_0603_6.3V6M
2 1 2 1 2 1 2 1
PC955 PC945 PC966 PC931

1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K 10U_0603_6.3V6M
2 1 2 1 2 1 2 1
PC275 PC252
+VGA_CORE
PC971 PC946 PC964 PC923 0.22U_0402_16V7K 22U_0805_6.3V6M

1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K 10U_0603_6.3V6M 2 1 2 1
2 1 2 1 2 1 2 1
PC276
PC957 PC947 PC937 PC924 0.22U_0402_16V7K
1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K 10U_0603_6.3V6M 2 1
2 1 2 1 2 1 2 1 PC254
Issued Date
+VGA_CORE
22U_0805_6.3V6M
PC282 2 1
PC958 PC948 PC938 PC925 180P_0402_50V8J
Security Classification
1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K 10U_0603_6.3V6M 2 1 PC255
+VDDC
+APU_CORE_NB
2 1 2 1 2 1 2 1 22U_0805_6.3V6M
2 1
PC283
3
3
PC959 PC949 PC969 PC926 180P_0402_50V8J PC256

1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K 10U_0603_6.3V6M 2 1 10U_0805_6.3V6K
2 1 2 1 2 1 2 1 2 1
@
PC284 PC260
PC960 PC950 PC940 PC928 180P_0402_50V8J 22U_0805_6.3V6M
1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K 10U_0603_6.3V6M 2 1 2 1
2011/07/29
2 1 2 1 2 1 2 1
PC961 PC951 PC941 PC927

1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K 10U_0603_6.3V6M
2 1 2 1 2 1 2 1
+APU_CORE_NB
PC962 PC952 PC942 PC929

1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K 10U_0603_6.3V6M
2 1 2 1 2 1 2 1
PC963 PC953 PC943 PC933

1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K 10U_0603_6.3V6M
2
1
+
2 1 2 1 2 1 2 1
PC266
Compal Secret Data
Deciphered Date
capacitors under processor on bottom side of board
330U_D2_2V_Y
PC921 PC934
2
1
+
10U_0603_6.3V6M 1U_0402_6.3V6K
2 1 2 1 PC267
330U_D2_2V_Y
2
2
+APU_CORE_NB
PC922 PC939
10U_0603_6.3V6M 1U_0402_6.3V6K
2 1 2 1
PC930 PC935
10U_0603_6.3V6M 1U_0402_6.3V6K
Local
2 1 2 1
PC954
1U_0402_6.3V6K
2 1
A3
Size
Title
Date:
PC968
1U_0402_6.3V6K
2 1
PC956
1U_0402_6.3V6K
2 1
+VDDCI
Document Number
PC936
1U_0402_6.3V6K
2 1
Tuesday, January 10, 2012
PC967
LA-8712P
1U_0402_6.3V6K
2 1
1
1
Sheet
PC972
1U_0402_6.3V6K
2 1
55
PC973
+VDDCI
of
1U_0402_6.3V6K
2 1
Compal Electronics, Inc.
+VDDCI
57
Rev
A
A
B
C
D
A B C D E F G H
@
1 1
1K_0402_1% PR909 1 2 GPU_VID1 2 1 PR901 1K_0402_1%
GPU_VID3
14
14
14
14
GPU_VID1
GPU_VID2
GPU_VID3
GPU_VID4
PXS_PWREN
1K_0402_1% PR910 GPU_VID2 1@ PR903 1K_0402_1%
15,25,27,37,48,52,53
1 2 2
+3VS
1K_0402_1% PR911 1 2 GPU_VID3 2 1@ PR904 1K_0402_1%
1K_0402_1% PR912 @ 1 2 GPU_VID4 2 1 PR907 1K_0402_1% +3VS
2
0_0402_5%
PR941
1
PR942
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
47K_0402_1%
1
+5VS
VID3
2
+VGA_B+
PR933
0.1U_0402_16V7K
2
VID1
0_0402_5%
80.6K_0402_1%
PL901
2
PC904
PR913
HCB2012KF-121T50_0805
1
D
PR914
@ PR915
PR916
@ PR917
PR918
PR919
PR920
1 2 B+
2 @ PR936 PL903
1
@ 10_0603_1%
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
G HCB2012KF-121T50_0805
220P_0402_25V8K
68P_0402_50V8J
0.1U_0402_25V6
S 1 2
1
1
PC901
PC902
PQ6
1
PC917
PC918
PC919
PC920
PC903
@ PR940 SSM3K7002FU_SC70-3
32 VGA_EN
100K_0402_1%
VID1
VID2
VID3
VID4
+3VS
2
1
VGA_VCC
2
5
PU900 PC916
1
1U_0603_10V6K
31
30
29
28
27
26
25
2
PR908
PQ901
1K_0402_1%
VID0
VID1
VID2
VID3
VID4
VID5
VID6
EN
24 PC909 4
2
VCC PR905 0.22U_0603_25V7K
27 VGA_PWRGD 1 PWRGD
PC908
BST 23 VGA_BOOST 1 2VGA_BOOST-1 1 2
1
1000P_0402_50V7K @ PR938 2 2.2_0603_5%

66.5K_0402_1% IMON VGA_DRVH PR937 PL902
22 2 1
3
2
1
PR923 DRVH 0.36UH_PCMC104T-R36MN1R105_30A_20%
2 1 2 3 0_0603_5% 2
2
0_0402_5% CLKEN# VGA_SW

21 1 2
17 VSS_GPU_SENSE 2 1 4
SW +VGA_CORE
FBRTN PR939
4.7_1206_5%
ADP3211AMNR2G_QFN32_5X5 20 2 1 +5VS
PVCC
1
1 2 VGA_FB 5 0_0603_5%
FB
PQ902
PR906
VGA_DRVL
Ipeak=59A
330U_D2_2V_Y
330U_D2_2V_Y
330U_D2_2V_Y
330U_D2_2V_Y
DRVL 19 2 1 1 1 1 1
1
PQ903
PC907 PC905 VGA_COMP 6
COMP + + + + Imax=45.7A
PC996
PC997
PC998
PC999
PR924 1500P_0402_50V7K 10P_0402_25V8K 18 PC915
0_0402_5% VGA_VCC 7 PGND 2.2U_0603_10V6K 4 4
F=300kHZ
2
2
GPU
17 VCC_GPU_SENSE 2 1 1 2 1 2VGA_COMP-1
1 2 AGND 17
VGA_ILIM 8 2 2 2 2
680P_0603_50V8J
Total capacitor
CSCOMP
ILIM
1
PR921 PC906 PR922 33
CSREF
AGND
RAMP
LLINE
1320u
CSFB
PC910
1K_0402_1% 1000P_0402_50V8J 39.2K_0402_1%
IREF
RPM
3
2
1
3
2
1
RT
2
ESR=2.25m ohm
10
11
12
13
14
15
16
2
PR925
9.53K_0402_1%
VGA_IREF
VGA_RAMP
VGA_CSFB
VGA_CSCOMP
VGA_RT
VGA_RPM
VGA_CSCOMP 1
2
237K_0402_1%
301K_0402_1%
PR929 422K_0402_1%
PR926
PR927
PR928
80.6K_0402_1%
1
1
1
VID1
GPIO15 (GPU_VID3)
1
PR934 GPIO20 (GPU_VID4) GPU_VID4
2
Connect to input caps PC913 PC914 220K_0402_1%
2
1000P_0402_50V7K 560P_0402_50V7K VID3
2
PR930 2 1
1K_0402_1% 反向
3 3
+VGA_B+ 2 1 VGA_RAMP-1 PR935
80.6K_0603_1%
GPIO20 GPIO15
(GPU_VID4) (GPU_VID3) VID4 VID3 VID1
1
PC911 PC912 0 0 0 1 0 1V
1000P_0402_50V7K 1000P_0402_50V7K
2
0 1 0 1 1 X
1 2 1 0 1 0 0 0.9V
PR931 PR932 LL
1
0_0402_5%
PR932
@ PR931
0_0402_5% 1 1 1 0 1 0.875
@ 0 X
2
0 @ V
VGA_CSCOMP
4 4

A B C D E F G H
NO DATE PAGE MODIFICATION LIST PURPOSE
-------------------------------------------------------------------------------------------------------------
DB-2(12/2) P52-PWR-+1.5VPCIE/0.935V Change PU935 SY8809 to SY8036 For co-lay cost down
DB-2(12/2) P56-PWR_VGA_CORE Add PQ6,PR941,PR942,PR940 For co-lay Thames and Chelsea
DB-2(12/2) P44-PWR-DCIN / Vin Detector Change to PJP1 pine define DC-IN jack buy and sale define does not change
DB-2(12/8) P45-PWR-BATTERY CONN Pin 7 power source change +3VLP to +3VALW EC command
DB-2(12/8) P52-PWR-+1.5VPCIE/0.935V PC11506 loaction change to PC1156 CIC SMT command
DB-2(12/12) P52-PWR-+1.5VPCIE/1V Change PR9352 11.3K to 13.3K (0.935V to 1V) HW comand
DB-2(12/12) P53-PWR-+VDDCIP Reserver the VDDCI component For thames GPU
DB-2(12/12) P56-PWR_VGA_CORE Add PR940,PR942,PQ6 ,reserve PR915 and PR917 For thames GPU
DB-2(12/13) P50-PWR-1.1VALWP Add PR803 =10K SY8809 enbale pin issue
SI(12/30) P54-PWR-CPU_CORE/CPU_CORE_NB PC2057 change 33u 6.3*4.5 ME height limited
SI(12/30) P54-PWR-CPU_CORE/CPU_CORE_NB Add PC2061,PC2062,PC2063,PC2064,PC2065&PC2066, EMI command

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 4019I5 A
www.s-manuals.com

HP ENVY M6 Compal - La-8712p - r0.3 - Schematics

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A B C D E

AMD Comal Platform

AMD Trinity APU / Hudson FCH / ATI Thames XT M2

Security Classification Compal Secret Data Compal Electronics, Inc.

Port 0 USB 3.0 Port 2 Port 5

ENE Daughter board

RTC CKT. Touch Pad Int.KBD

CLOCK DISTRIBUTION DISPLAY OUTPUT

Chelsea Pro LVDS CONN

C AMD 100MHz AMD LVDS_OUT C

LVDS Transtator 32.768KHz 25MHz

Mini PCI Socket

CRT CONN HDMI CONN

Security Classification Compal Secret Data Compal Electronics, Inc.

B+ AC or battery power rail for power circuit. N/A N/A N/A

+VGA_CORE 0.95-1.2V switched power rail ON OFF OFF

+0.935VGS 0.935V switched power rail for VGA ON OFF OFF

+VSB VSB always on power rail ON ON ON*

PX@ PX function UMA UMA@

External PCI Devices

EC SM Bus1 address EC SM Bus2 address

FCH (S0) FCH (S0~S5)

Device Address HEX Device Address HEX

DDR DIMM2 1010 001X b A2

AMD APU FS1R2

LCD panel +5VS FCH AMD Hudson M3

U54 +5VALW VDDIO_33_PCIGP: 102 mA

Security Classification Compal Secret Data

AE5 AD5 PCIE_FTX_DRX_P0 C950 1 2 .1U_0402_16V7K

AG8 AG2 UMI_FTX_MRX_P0 C956 1 2 .1U_0402_16V7K

+1.2VS 1 2 P_ZVDDP AG11 AH11 P_ZVSS 1 2

L P_ZVDDP W/S=8/12 mil, <3000mil CONN@

Security Classification Compal Secret Data Compal Electronics, Inc.

L M_ZVDDIO W/S=8/12 mil, <1000mil CONN@

Security Classification Compal Secret Data Compal Electronics, Inc.

L Close to APU (JCPU1) Place near APU

54 APU_VDD_RUN_FB_L B4 VSS_SENSE R592 1 2 1K_0402_5% APU_TDI

CPU TSI interface level shift Asserted as an input to +1.5V +3VS

C935 1 2 0.1U_0402_16V4Z R587 R588

THERMTRIP shutdown Indicates to the FCH that a thermal trip

to transition the system to S5 immediately

Q10 R610 R609

BSH111_SOT23-3 APU_THERMTRIP# 3 1 1 2 H_THERMTRIP# 27

Security Classification Compal Secret Data Compal Electronics, Inc.

Power Name Consumption

B12 VDDNB_4 VDDNB_16 D8 V9 VSS_58 VSS_130 AH13

F24 VSS_69 VSS_141 E8

K20 VDDIO_2 VDDIO_20 T26

M23 VDDIO_10 VDDIO_28 R22

N28 VDDIO_14 VDDIO_32 W22

+APU_VDDA AB10 VDDA

Date: Tuesday, January 10, 2012 Sheet 9 of 57

Security Classification Compal Secret Data

+VREF_DQA +1.5V +1.5V

L +VREF_DQ 15mil JDIMM1

C1080 C1081 10K_0402_5% LCN_DAN06-K4406-0102

Security Classification Compal Secret Data Compal Electronics, Inc.

+VREF_DQB +1.5V +1.5V

L +VREF_DQ 15mil 1 VREF_DQ VSS1 2

+0.75VS +1.5V +1.5V

Security Classification Compal Secret Data Compal Electronics, Inc.

PCIE_FTX_C_GRX_P[15..0] PCIE_GTX_C_FRX_P[0..15] PART 7 0F 9

PX@ CV49 4 2 CV50 PX@ RV69 RV70