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ELE324A Embedded System Design

Practice

Lab Session 1

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Lab Session 1: LED and switch interface
Exercise 1: Toggle onboard LED(R or B or G).Observe the waveforms in debug mode
Exercise 2: Interface SW1 and control LED(R or B or G).Observe the waveforms in debug mode

Exercise 3:Write a program for performing the following operations: ( control on board LED using on board Switch)
Switch (PF4) Sw1 Switch (PF0) Sw2 LEDs

1 1 R (0X02)
0 1 G (0X08)
1 0 B (0X04)
0 0 W (0X0E)

Exercise 4: To control external LED using on board Switch

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1.GPIO module

 The GPIO namely, General-Purpose Input Output module


gives the access of outside world to the processor and vice
versa. Be it sensors or actuators or switches are connected to
the processor through this module.

 In TIVA TM4C123GH6PM Launch Pad there are 43


programmable input/output pins divided into 6 ports.

 The Port F is special as it has an onboard LED connected and


two onboard switches connected in negative logic.

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TM4C123GH6PM

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Lab 1: LED and switch interface

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SWITCH INTERFACES

When a normally open (NO) switch with infinite


resistance is closed, its resistance is about 0.1 ohms
 Used with a pull-up resistor to +3.3V or a pull-down
resistor to ground .

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Number System
8421
0000
0001
0010

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Logic Gate

~ NOT gate Operation


& AND gate Operation
| OR gate Operation
^ Ex OR gate Operation

| OR gate Operation (Selective high only particular


bit One)
&=~ (Selective Low only particular bit Zero)

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Exercise 1: Toggle onboard LED(R or B or
G).Observe the waveforms in debug mode

1.Header File
2.Port declaration
3.Delay
4.Main Program

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1.Header File

#include "tm4c123gh6pm.h"
#include <stdint.h>

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2.Port Initialization and Configuration

 The GPIO module needs to be configured prior to the


usage. In embedded-C we generally use a
initialization function to configured the port we are
going to use. These simple steps make sure that all
the ports are configured and initialized.

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2.Port declaration

void PortF_Init(void){ volatile unsigned long delay;


SYSCTL_RCGC2_R = 0x00000020; // 1) activate clock for Port F
delay = SYSCTL_RCGC2_R; // allow time for clock to start
GPIO_PORTF_LOCK_R = 0x4C4F434B; // 2) unlock GPIO Port F
GPIO_PORTF_CR_R = 0x1F; // allow changes to PF4-0
// only PF0 and PF3 needs to be unlocked, other bits can't be locked
GPIO_PORTF_AMSEL_R = 0x00; // 3) disable analog on PF
GPIO_PORTF_PCTL_R = 0x00000000; // 4) PCTL GPIO on PF4-0
GPIO_PORTF_DIR_R = 0x0E; // 5) PF4,PF0 in, PF3-1 out
GPIO_PORTF_AFSEL_R = 0x00; // 6) disable alt funct on PF7-0
GPIO_PORTF_PUR_R = 0x11; // enable pull-up on PF0 and PF4

GPIO_PORTF_DEN_R = 0x1F; // 7) enable digital I/O on PF4-0


}

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3.Delay and 4.Main program

• unsigned long Led;


• void Delay(void){unsigned long volatile time;
3.Delay
• time =145448; // 0.1sec (ON pulse)
• while(time){ time--;
• }
• }
• int main(void){
• PortF_Init(); // make PF1 out (PF1 built-in LED) 4.Main Program
• while(1){
• GPIO_PORTF_DATA_R = 0x02; //Red LED PortF 1
• Delay();
• }
• }
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1. Port Initialization
SYSCTL_RCGC2_R = 0x00000020; // 1) activate clock for Port F

delay = SYSCTL_RCGC2_R; // allow time for clock to start

GPIO_PORTF_LOCK_R = 0x4C4F434B; // 2) unlock GPIO Port F

GPIO_PORTF_CR_R = 0x1F; // allow changes to PF4-0

GPIO_PORTF_AMSEL_R = 0x00; // 3) disable analog on PF

GPIO_PORTF_PCTL_R = 0x00000000; // 4) PCTL GPIO on PF4-0

GPIO_PORTF_DIR_R = 0x0E; // 5) PF4,PF0 in, PF3-1 out

GPIO_PORTF_AFSEL_R = 0x00; // 6) disable alt funct on PF7-0


00010001
GPIO_PORTF_PUR_R = 0x11; // enable pull-up on PF0 and PF4
00011111
GPIO_PORTF_DEN_R = 0x1F; // 7) enable digital I/O on PF4-0

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2.1 Run Mode Clock Gating Control Register 2 (RCGC2)

This register controls the clock gating logic in normal


Run mode. Each bit controls a clock enable for a
given interface, function, or module. If set, the
module receives a clock and functions. Otherwise,
the module is unclocked and disabled.
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Bit-Position Function
0 Clock for 0
PORT A
1 Clock for 0
PORT B
2 Clock for 0
PORT C
3 Clock for 0
PORT D
4 Clock for 0
PORT E
5 Clock for 1
PORT F

0010 0000
SYSCTL_RCGC2_R = 0x00000020; // 1) activate clock for Port F

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2.2 GPIO Lock (GPIOLOCK)

The GPIOLOCK register enables write access to


the GPIOCR register 0x4C4F434B to the GPIOLOCK
register unlocks the GPIOCR register.
Writing any other value to the GPIOLOCK
register re-enables the locked state. Reading the
GPIOLOCK register returns the lock status rather than
the 32-bit value that was previously written.

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2.3 GPIO Direction (GPIODIR) register
• The GPIO Direction (GPIODIR) register (is used to configure
each individual pin as an input or output. When the data
direction bit is cleared, the GPIO is configured as an input, and
the corresponding data register bit captures and stores the value
on the GPIO port.

0000 1110

GPIO_PORTF_DIR_R = 0x0E; // 5) PF4,PF0 in, PF3-1 out


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2.4 GPIO Analog Mode Select (GPIOAMSEL):
• This register is only valid for ports and pins that can be used as ADC AINx inputs.
• If any pin is to be used as an ADC input, the appropriate bit in GPIOAMSEL must
be set to disable the analog isolation circuit.
• The GPIOAMSEL register controls isolation circuits to the analog side of a unified
I/O pad. Because the GPIOs may be driven by a 5-V source and affect analog
operation, analog circuitry requires isolation from the pins when they are not used in
their analog function

GPIO_PORTF_AMSEL_R = 0x00; // 3) disable analog on PF

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GPIO Port Control (GPIOPCTL)

Clear bits in the PCTL to select regular digital function


The GPIOPCTL register is used
in conjunction with the
GPIOAFSEL register and
selects the specific peripheral
signal for each GPIO pin when
using the alternate function
mode.

GPIO_PORTF_PCTL_R = 0x00000000; // 4) PCTL GPIO on PF4-0

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GPIO Alternate Function Select (GPIOAFSEL)

Clear bits in the alternate function register (AFSEL)


The GPIOAFSEL register is the mode
control select register. If a bit is clear, the
pin is used as a
GPIO and is controlled by the GPIO
registers. Setting a bit in this register
configures the
corresponding GPIO line to be controlled
by an associated peripheral.

ESD Lab Session 1

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GPIO Digital Enable (GPIODEN)
The GPIODEN register is the digital enable register
Enable the digital port (DEN)

GPIO_PORTF_DEN_R = 0x1F; // 7) enable digital I/O on PF4-0

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3.Delay and 4.Main program

• unsigned long Led;


• void Delay(void){unsigned long volatile time;
3.Delay
• time =145448; // 0.1sec
• while(time){ time--;
• }
• }
• int main(void){
• PortF_Init(); // make PF1 out (PF1 built-in LED) 4.Main Program
• while(1){
• GPIO_PORTF_DATA_R ^= 0x02; //Red LED PortF 1
• Delay();
• }
• }
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Program in Keil

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Output
GPIO_PORTF_DATA_R ^= 0x02;

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Output GPIO_PORTF_DATA_R ^= 0x04;

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Exercise 2: Interface SW1 and control LED(R or B or
G).Observe the waveforms in debug mode

1.Header File
2.Port declaration
3.Main Program

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Header File

#include "tm4c123gh6pm.h"
#include <stdint.h>
unsigned long Switch;

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Port declaration
void PortF_Init(void){ volatile unsigned long delay;
SYSCTL_RCGC2_R |= 0x00000020; // 1) activate clock for Port F
delay = SYSCTL_RCGC2_R; // allow time for clock to start
GPIO_PORTF_LOCK_R = 0x4C4F434B; // 2) unlock GPIO Port F
GPIO_PORTF_CR_R = 0x1F; // allow changes to PF4-0
// only PF0 and PF3 needs to be unlocked, other bits can't be locked
GPIO_PORTF_AMSEL_R = 0x00; // 3) disable analog on PF
GPIO_PORTF_PCTL_R = 0x00000000; // 4) PCTL GPIO on PF4-0
GPIO_PORTF_DIR_R = 0x0E; // 5) PF4,PF0 in, PF3-1 out
GPIO_PORTF_AFSEL_R = 0x00; // 6) disable alt funct on PF7-0
GPIO_PORTF_PUR_R = 0x11; // enable pull-up on PF0 and PF4

GPIO_PORTF_DEN_R = 0x1F; // 7) enable digital I/O on PF4-0


}

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Program
int main(void)
{
PortF_Init();
while(1)
{
Switch=GPIO_PORTF_DATA_R&0x11;
if(Switch==0x01)
GPIO_PORTF_DATA_R = 0x02;
else
GPIO_PORTF_DATA_R = 0x00;
}
}
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Program in Keil

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OUTPUT

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OUTPUT

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Exercise 3:On board Switch and on board LED

Switch (PF4) Sw1 Switch (PF0) Sw2 LEDs

1 1 R (0X02)
0 1 G (0X08)
1 0 B (0X04)
0 0 W (0X0E)

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Header File

• #include "tm4c123gh6pm.h"
• #include <stdint.h>
• unsigned long Switch;

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Port declaration

• void PortF_Init(void){ volatile unsigned long delay;


• SYSCTL_RCGC2_R |= 0x00000020; // 1) activate clock for Port F
• delay = SYSCTL_RCGC2_R; // allow time for clock to start
• GPIO_PORTF_LOCK_R = 0x4C4F434B; // 2) unlock GPIO Port F
• GPIO_PORTF_CR_R = 0x1F; // allow changes to PF4-0
• // only PF0 and PF3 needs to be unlocked, other bits can't be locked
• GPIO_PORTF_AMSEL_R = 0x00; // 3) disable analog on PF
• GPIO_PORTF_PCTL_R = 0x00000000; // 4) PCTL GPIO on PF4-0
• GPIO_PORTF_DIR_R = 0x0E; // 5) PF4,PF0 in, PF3-1 out
• GPIO_PORTF_AFSEL_R = 0x00; // 6) disable alt funct on PF7-0
• GPIO_PORTF_PUR_R = 0x11; // enable pull-up on PF0 and PF4
• GPIO_PORTF_DEN_R = 0x1F; // 7) enable digital I/O on PF4-0
• }
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Program
int main(void)
{
PortF_Init();
while(1)
{

Switch=GPIO_PORTF_DATA_R&0x11;

if(Switch==0x11)
GPIO_PORTF_DATA_R = 0x02;

else if (Switch==0x01)
GPIO_PORTF_DATA_R = 0x08;

else if (Switch==0x10)
GPIO_PORTF_DATA_R = 0x04;

else if (Switch==0x00)
GPIO_PORTF_DATA_R = 0x0E;

else
GPIO_PORTF_DATA_R = 0x00;

}
}
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1 1 --Red

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1 0 --Blue

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01 --Green

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00--White

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Exercise 4:To control external LED using on board Switch

• PORTF Switch (PF4 and PF0) Onboard


• PORTD LEDs (PD0 and PD3) External

Switch (PF4) Sw1 Switch (PF0) Sw2 LED

1 1 NO (0X00)
0 1 Port D3 (0X08)

1 0 Port D0 (0X01)
0 0 Port D3 and D0
(0X09)

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Header

• #include "tm4c123gh6pm.h"
• #include <stdint.h>
• unsigned long SW;

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Port F Initialization
• void PortF_Init(void){ volatile unsigned long delay;
• SYSCTL_RCGC2_R |= 0x00000020; // 1) activate clock for Port F
• delay = SYSCTL_RCGC2_R; // allow time for clock to start
• GPIO_PORTF_LOCK_R = 0x4C4F434B; // 2) unlock GPIO Port F
• GPIO_PORTF_CR_R = 0x1F; // allow changes to PF4-0
• // only PF0 needs to be unlocked, other bits can't be locked
• GPIO_PORTF_AMSEL_R = 0x00; // 3) disable analog on PF
• GPIO_PORTF_PCTL_R = 0x00000000; // 4) PCTL GPIO on PF4-0
• GPIO_PORTF_DIR_R = 0x0E; // 5) PF4,PF0 in, PF3-1 out
• GPIO_PORTF_AFSEL_R = 0x00; // 6) disable alt funct on PF7-0
• GPIO_PORTF_PUR_R = 0x11; // enable pull-up on PF0 and PF4

• GPIO_PORTF_DEN_R = 0x1F; // 7) enable digital I/O on PF4-0
• }
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Port D Initialization

• void PortD_Init(void){ volatile unsigned long delay;


• SYSCTL_RCGC2_R |= 0x00000008; // 1) activate clock for Port D
• delay = SYSCTL_RCGC2_R; // allow time for clock to start
• GPIO_PORTD_AMSEL_R &= ~(0x09); // 3) disable analog on PD0 and PD3
• GPIO_PORTD_PCTL_R &= ~(0x09); // 4) PCTL GPIO on PD0 and PD3
• GPIO_PORTD_DIR_R |= 0x09; // 5) enable PD0 and PD3 as output
• GPIO_PORTD_AFSEL_R&= ~(0x09); // 6) disable alt funct on PD0 and PD3

• GPIO_PORTD_DEN_R |= 0x09; // 7) enable digital I/O on PD0 and PD3
• }

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Another way of Port D Initialization

• void PortD_Init(void){ volatile unsigned long delay;


• SYSCTL_RCGC2_R |= 0x00000008; // 1) activate clock for Port D
• delay = SYSCTL_RCGC2_R; // allow time for clock to start

• GPIO_PORTD_AMSEL_R = 0x00; // 3) disable analog on PD
• GPIO_PORTD_PCTL_R &= 0x00000000; // 4) PCTL GPIO on PD0 and PD3
• GPIO_PORTD_DIR_R |= 0x09; // 5) enable PD0 and PD3 as output
• GPIO_PORTD_AFSEL_R= 0x00; // 6) disable alt funct on PD0 and PD3


• GPIO_PORTD_DEN_R |= 0x09; // 7) enable digital I/O on PD0 and PD3
• }

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Program
• int main(void)
• {
• PortF_Init();
• PortD_Init();
• while(1)
• {

• SW =GPIO_PORTF_DATA_R&0x11;
• if(SW==0x11)

• GPIO_PORTD_DATA_R = 0x00;
• else if (SW==0x01)
• GPIO_PORTD_DATA_R = 0x08;
• else if (SW==0x10)
• GPIO_PORTD_DATA_R = 0x01;
• else if (SW==0x00)
• GPIO_PORTD_DATA_R = 0x09;
• else
• GPIO_PORTD_DATA_R = 0x00;

• }
• }

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• ~ NOT gate Operation
• & AND gate Operation
• | OR gate Operation
• ^ Ex OR gate Operation

• | OR gate Operation (Selective high only particular bit


One)
• &=~ (Selective Low only particular bit Zero)

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Thank you

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