Synthesis and Electrical Characterization of

Graphene Nanoplatelets
A. Maffucci1,2, F. Micciulla1,2, A. Cataldo2,3, G. Miano4, and S. Bellucci2

Abstract − This paper proposes a realization of an easy to typically Ni, Cu, Ru, Ir, TiC, TaC, are in use. The
manufacture graphene device with a low-cost and solvent-free process occurs at temperatures 850-1000°C.
procedure. It is obtained by depositing few layer graphene in a
gap between to electrodes in a microstrip-like circuit. The Afterwards, the graphene gets transferred to desired
device is characterized in DC at room temperature, and the substrates, by suitable techniques [6]. A variant of the
results show a satisfactory stability of its electrical resistance, CVD deposition technique, is described in [7], where
thus demonstrating the reliability of the fabrication process the few-layer graphene was synthesized in the
and the reproducibility of the proposed device.
absence of any metallic catalyst by microwave
plasma enhanced CVD with gas mixtures of methane
1 INTRODUCTION and hydrogen. The deposit consists of nanostructures
that are several micrometers wide, highly crystalline
In the last years Graphene has been proposed as an stacks of four to six atomic layers of graphene,
alternative material in nanoelectronics, to overcome aligned vertically to the substrate surface. Then a
the problems experienced at nanoscale by comparative study of the electric field emission
conventional materials like copper. The increasing of behaviour of vertically aligned few-layer graphene
frequencies and reduction of the dimensions impose and carbon nanotubes was evaluated in a parallel
tight requirements, hardly fulfilled by conventional plate type setup in [8].
materials. Low-dimensional carbon nanomaterials In this paper we design and realize a graphene
like those based on Graphene allotropes have device as a candidate to provide all the above
attracted much attention for their wide applicability features. The used graphene is in the form of the so-
in Very-Large-Scale-Integration (VLSI) technology, called Graphene Nanoplatelets (GNPs). Section 2 is
due to their outstanding electrical, thermal and devoted to the description of such graphene and the
mechanical properties. A carbon-based VLSI fabrication procedure proposed here, by own
technology is not a pure theoretical wish, since in the technique, cheaper and faster than others. The
last few years the rapid progress in graphene electronic device consists in a microstrip-like circuit
fabrication made possible the first examples of real- where the GNPs are used to contact two copper
world applications, opening the era of so-called electrodes, as shown in Section 3. The results of the
carbon electronics [1,2]. electrical characterization in DC are shown in
Many works have been devoted either to modeling Section 4. Perspective work and possible applications
and characterization of the electrical transport along are also discussed in the concluding section.
graphene interconnects, highlighting many
advantages in using such carbon interconnects, like
the possibility to have ballistic transport, the 2 FEW LAYER GRAPHENE PREPARATION
excellent stability of the electrical performance with
In this work, GNPs were obtained in laboratory by
temperature variations, the poor sensitivity of the
microwave irradiation. Expandable Graphite (EG)
high-frequency skin–effect [3,4]. However, these
Asbury® was used as carbon source. This kind of
properties are likely to depend on the quality of the
expandable graphite is intercalated with chemical
Graphene, imitatively connected to the stability of the
substances, normally sulfates and nitrates, inserted
characteristic of the graphene patch. For instance, the
between the graphene planes of the graphite.
performance may dramatically drop due to
The graphite was put in home microwave oven,
fabrication issues and uncertainties, e.g., in presence
with a power of 800W, inside a ceramic melting pot.
of defects and external impurities in the potential
About ten seconds of irradiation are enough to
polycrystalline nature of the graphene. Of course, a
produce expansion of EG and formation of worm-like
good quality production means a rapid increase of the
particles: the process of expansion was carried out by
costs, which may easily become incompatible with
thermal shock due to microwave irradiation that
the typical costs associated to the mass production
warms EG and vaporize molecules present inside EG
electronics.
planes. Furthermore thermal shock was also caused
The Chemical Vapour Deposition (CVD), proposed
by sparks that occur during the process: vaporized
for Carbon Nanotubes seems to be the most promising
molecules change dielectric constant of atmosphere
technique to produce graphene on industrial scale. In
and electric arc occurs. GNPs particles were obtained
the CVD process the driving parameters are: catalyst,
with mild sonication in ultrasonic bath for ten
precursor, flow rate, temperature, pressure, and
minutes. Particles were characterized by a large area
deposition time [5]. In the CVD on metal catalyst,
________________________________________________________________________________________
1
Dept. DIEI, University of Cassino and Southern Lazio, Via G. di Biasio 43, 03043, Cassino, Italy, e-mail: maffucci@unicas.it
2
INFN, National Institute of Nuclear Physics, via E. Fermi 40, 00044 Frascati, Italy
3
STEBICEF, University of Palermo, Viale delle Scienze 17, Parco d'Orleans II, 90128, Palermo, Italy
4
Dept. DIETI, University of Naples “Federico II”, via Claudio 21, 80125, Naples, Italy

978-1-4799-7806-9/15/$31.00 ©2015 IEEE 301

(from 2 to 10µm), and a thickness ranging from 4 to
9nm (i.e., 4-11 layers). The fabricated samples are
shown in the scanning electron microscope (SEM)
and transmission electron microscope (TEM) images,
reported in Figs.1 and 2, respectively.
The fabrication method used by the INFN NEXT
nanotechnology group is a variant of the customary
thermal expansion obtained in a standard oven, where
treatments of such a kind are usually carried out at
about 1000°C temperature.
Figure 1: SEM micrograph of a GNP sample obtained
with 800W irradiation power. The transparency of the
flakes is illustrative of their low number of layers.
Figure 2: TEM micrograph of a GNP sample
obtained with 800W irradiation power. The presence
of overlapping GNPs randomly distributed is shown,
yielding a typical flake size of 2-10 μm.
302
The procedure proposed here, based upon the use
of a normal household microwave, has an attractive
potential for its industrial implementation and yields
several advantages with respect to the customary
heating in a conventional oven. In fact it is [9-12]:
- fast, cheap and green (just about 10 sec of
irradiation are needed, much smaller than the time
needed in a standard oven, so reducing costs,
energy wasting and CO2 emission);
- safe (the operator does not need introducing the
intercalated, expandable graphite in a high
temperature environment, as for conventional
ovens);
- eco-friendly (as it is solvent-free).
3 MICROSTRIP CIRCUIT DESIGN AND
CONTACT FABRICATION
The device considered in this paper is a micro-strip
like circuit made by two electrodes of non-uniform
width, separated by a narrow gap. The design
schematic is reported in Fig.3, and the geometrical
parameters like the gap length L and width W are
reported in Table 1. Two different devices have been
fabricated, which differ from the gap lengths, which
are L=0.15mm for device #1, and L=0.10 mm for
device #2. The trace copper lied into FR4 dielectric
of relative permittivity of 4.6. The gap was created
by removing the copper via selective etching. Figure
4 shows the realized gap for device #2.
After the gap was realized, the Graphene contact
was realized by transferring the GNPs into the gap.
The GNPs were first sonicated for about 30 minutes
in isopropyl alcohol. Then they were manually
aspirated with an insulin syringe and dropped down
Figure 3: Schematics of the microstrip-like circuit
proposed here (device #2). Optional SMA connectors
may be mounted at the device terminals for future AC
characterization.
 and a standard deviation of 1.25 kΩ. The value for
the copper sample is 0.71 kΩ. For device #2, the
values of the resistance range from 0.79 to 2.10 kΩ,
with an average value of 1.39 kΩ and a standard
deviation of 0.52 kΩ. In this case, the copper sample
gives 0.66 kΩ.
The results of each set of samples highlight a good
stability of the electrical parameter of the device, thus
demonstrating the reliability of the fabrication
process and the reproducibility of the proposed
device. Furthermore, the comparison with the copper
realizations demonstrate the competitiveness of the
graphene devices, being the performances absolutely
comparable.

DEVICE n.1
5

Figure 4: Detail of the gap for device #2, after 4.5 standard deviation
selective etching.
4

3.5
Electrical resistance [kΩ])

Parameter Value 3

Device size 50 x 50 mm 2.5 average value

Gap length L 0.10 or 0.15 mm
Gap width W 0.15 mm 2

Minimum trace width 0.15 mm 1.5

Maximum trace width 5.00 mm
1
Trace thickness 0.18 mm
0.5
Table 1: Geometrical parameters of the considered Cu sample

devices. Devices 1 and 2 differ from the gap length of 0

0 1 2 3 4 5 6 7
0.15 or 0.10 mm, respectively. samples

on the microstrip gap. The contact was created thanks DEVICE n.2
2.5
to an electrical field produced in the gap as a result of
standard deviation
a DC voltage of 50 V applied to the device terminals
(by a power supply CAEN). 2
For each device, five different samples were
realized, to have a statistics on the fabrication quality
Electrical resistance [kΩ])

of the contact. A sixth sample of each device was 1.5

average value
realized where the gap was short-circuited, namely an
all-copper trace.
1

4 ELECTRICAL CHARACTERIZATION:
RESULTS AND DISCUSSION 0.5
Cu sample
A DC electrical characterization of all the realized
devices were performed by means of a Digital 0
0 1 2 3 4 5 6 7
Multimeter Agilent 34460A. The DC resistance were samples
measured with a voltage of the order of mV (currents
of the order of μA).
Figure 5: Measured values of the electrical resistance
The results are given in Figure 5, for the two for 5 different realizations of the devices 1 and 2,
devices.
compared with the value obtained for an all copper
The values of the resistance for device #1 range from
device with same dimensions (sample #6).
1.18 to 4.29 kΩ, with an average value of 2.27 kΩ

303
 Finally, the obtained values are really close to
theoretical predictions for a few-layer ideal graphene
contact, for which a sheet resistance at low voltage,
of the order of mΩ-1 per square is measured [5]. This
provides theoretical value of R of the order of kΩ.
5 CONCLUSIONS AND PERSPECTIVE
WORK
This paper has presented a new technique to realize
graphene devices, whose features make it attractive for
the mass production of stable and reproducible
devices. The low variance of the obtained resistance
values and the comparable size of the resistance with
respect to the conventional copper device is
encouraging for real applications.
Future work will be devoted to exploring the
sensitivity of the obtained device features to variation
of geometrical parameters, like width and length of the
gap, for design optimize. Also, in view of the potential
applications of such devices, a performance analysis
will be carried out as a function of the temperature,
aiming at feasibility of the proposed solution for a
wide temperature range application.
Acknowledgments
This work was carried out in close collaboration
with ASD, Advanced Systems Development s.r.l.,
Italy, both for the preparation of microstrips and for
the electrical characterization. We thank Alfonso
Forgione, Donato Carriero, Michele Sanseviero and
Leonardo Pace from ASD for their fruitful
suggestions and fundamental technical support.
The work was partially supported by
GRAPHENE— Graphene-Based Revolutions in ICT
and Beyond, project n.604391 FP7-ICT-2013-FET-F.
The work was partially supported by E.U.-P.O.R.
Region Lazio FSE 2007/2013 ob.2 (PET 2008/2010,
Frosinone Province).
References
[1] R. Van Noorden, R. Moving towards a graphene
world, Nature, 442, 228-229, 2006.
[2] X. Chen, D. Akinwande, K.-J. Lee, G.F. Close,
S. Yasuda, B.C. Paul, S. Fujita, J. Kong, and H.-
S. Philip Wong, “Fully Integrated Graphene and
Carbon Nanotube Interconnects for Gigahertz
High-Speed CMOS Electronics,” IEEE Trans.
on Electr. Devices, 57, 3137-3143, 2010.
304
[3] A. Maffucci and G. Miano, “Transmission Line
Model of Graphene Nanoribbon Interconnects,”
Nanoscience and Nanotechnology Letters, 5,
1207-1216, 2013.
[4] T. Yu, E.-K. Lee, B. Briggs, B. Nagabhirava,
and B. Yu, “Bilayer Graphene/Copper Hybrid
On-Chip Interconnect: A Reliability Study,”
IEEE Trans. Nanotechnol. 10, 710–714, 2011.
[5] K. Yan, L. Fu, H. Peng, and Z. Liu, “Designed
CVD Growth of Graphene via Process
Engineering,” Acc. Chem. Res., 46, 2263–2274,
2013.
[6] H. Cao et al, “Electronic transport in chemical
vapor deposited graphene synthesized on Cu:
Quantum Hall effect and weak localization,”
Applied Physics Letters, Vol. 96, 122106, 2010.
[7] S Bellucci, A Malesevic, “Physics of Carbon
Nanostructures, in Physical Properties of
Ceramic and Carbon Nanoscale Structures,”
Lecture Notes in Nanoscale Science and
Technology 11, Springer: Berlin Heidelberg,
2011.
[8] S. Bellucci, A. Malesevic, F. Micciulla, I.
Sacco, R. Kemps, A. Vanhulsel, C. Van
Haesendonck, “Comparative Field Emission
from Vertically Aligned Few-Layer Graphene
and Carbon Nanotubes,” Nanoscience and
Nanotechnology Letters, Vol. 3, pp. 907-912,
2011.
[9] S Bellucci, M Bozzi, A Cataldo, R Moro, D
Mencarelli, L Pierantoni, “Graphene as a
tunable resistor”, 2014 International
Semiconductor Conference (CAS) Pages 17-20,
IEEE Editor.
[10] L. Pierantoni, D. Mencarelli, M. Bozzi,
R. Moro, S. Moscato, L. Perregrini, F.
Micciulla, A. Cataldo, S. Bellucci, “Theoretical
and Experimental Characterization of a
Broadband Microwave Attenuator Based on
Few Layer Graphene Flakes”, accepted for
publication on IEEE Trans. on Microwave
Theory and Techniques (2015)
[11] L. Pierantoni, M. Bozzi, R. Moro, D.
Mencarelli, S. Bellucci, "On the Use of
Electrostatically Doped Graphene: Analysis of
Microwave Attenuators," IEEE International
Conference on Numerical Electromagnetic
Modeling and Optimization (NEMO2014),
Pavia, Italy, May 14-16, 2014.
[12] L. Pierantoni, D. Mencarelli, M. Bozzi, R.
Moro, and S. Bellucci, "Graphene-Based
Electronically Tunable Microstrip Attenuator,"
Nanomaterials and Nanotechnology, Vol. 4, No.
18, 2014.