Contents

Bipolar junction transistor

Modes of operation
Transistor as a switch
Transistor as an amplifier
Biasing circuits
Bipolar junction transistor
Invented in 1948 by Bardeen, Shockley and Brattain.
Consist of two pn junctions connected back-to-back to
form npn or pnp structure
This forms a three terminal device – the terminals are
base, emitter and collector
Current is due to two types of carrier- electrons and
holes, hence the name bipolar
The three regions are different in geometry and doping
concentration (highest for emitter, lowest for base)
Base layer is narrow and has low conductivity
Current components in a pnp transistor
Cross section of npn transistor
Modes of operation
Forward-Active
B-E junction is forward biased
B-C junction is reverse biased
Saturation
B-E and B-C junctions are forward biased
Cut-Off
B-E and B-C junctions are reverse biased
Inverse-Active (or Reverse-Active)
B-E junction is reverse biased
B-C junction is forward biased
Forward-active operation
B-E junction is forward-biased, so electrons from the
emitter are injected into the base, creating excess
minority carrier concentration in the base
The electrons can now flow in either of two directions
– to the external base lead or across the B-C junction
A small percentage of injected electrons recombine
with holes before flowing out the base lead – this is
called recombination current, which is small because
the base has low density of holes (majority carrier)
Most of the electrons diffuse into the collector and
flow to the external collector lead
The collector current is controlled by the B-E voltage and
nearly independent of C-B voltage when the B-C junction
is reverse-biased
The base current is formed by two components - holes
movement (iB1) and recombination current (iB2). They are
also a function of the B-E voltage.
For pnp:
Current relationships

I E = I B + IC

I C = αI E α = common-base current gain

(ranges from 0.95 – 0.99)

I C = βI B β = common-emitter current
gain
(ranges from 20-500; increases
β
α= with temperature)
1+ β
Circuit symbols
Take note the current and voltage drop
Common-emitter (CE) circuit
Current-voltage characteristics:
Consider npn circuit:
VBB source forward biases the B-E junction and
controls the base current
C-E voltage can be varied by changing VCC
For a given IB, IC vs VCE is plotted
When VCE < VBE(on), B-C junction becomes forward
biased and collector current drops quickly to zero
For a given value of VBE, if VCE increases, C-B
junction becomes more reverse biased, thus depletion
region width increases and neutral base width
decreases. Thus collector current increases.
 DC analysis of CE circuit
Using npn:

Transistor equivalent circuit

using piecewise linear model
Assume B-E junction is forward biased, so VBE =
VBE(on) (turn-on voltage). (*if VBE less than the turn-on
voltage, transistor is cut off, IB = 0)
Collector current is represented as dependent current
source (function of base current)
VBB − VBE ( on )
IB =
RB
I C = βI B
VCC = I C RC + VCE
Here we assume transistor is in forward active mode
i.e. VCE > VBE(on)
Power dissipation: PT = I BVBE ( on ) + I CVCE ≈ I CVCE
Using pnp:

VBB − VEB ( on )
IB =
RB
I C = βI B
VCC = I C RC + VEC
 VBB VBE
Input load line is given by: IB = −
RB RB
CE load line:
VCC VCE
IC = −
RC RC
The load line is useful to visualize the bias point of the
transistor
The quiescent point or Q-point is given by the intersection
of the load-line and IC-VCE curve corresponding to the
appropriate base current
If VBB < VBE(on), IB = IC = 0, transistor is in cut-off mode, all
currents are zero (except for negligible leakage currents),
VCE ≈VCC
As VBB increases and larger than VBE(on), IB increases and the
Q-point moves up the load line.
At some point, IC can no longer increase; VCE = VCE(sat) ≈ 0.
Transistor is in saturation mode. B-C junction is forward
biased, and the relationship between collector and base
currents is no longer linear.
BJT DC analysis technique
1. Assume that the transistor is biased in forward active
mode
a. VBE = VBE(on), IB > 0, & IC = βIB
2. Analyze ‘linear’ circuit.
3. Evaluate the resulting state of transistor.
a. If VCE > VCE(sat), assumption is correct
b. If IB < 0, transistor likely in cutoff
c. If VCE < 0, transistor likely in saturation
4. If initial assumption is incorrect, make new
assumption and return to Step 2.
Voltage transfer characteristics

Plot of output voltage versus input voltage

Helps visualize operation of circuit or the state of
transistor, whether cut-off, forward-active or saturated.
Example:
Assume npn transistor parameters of VBE(on) = 0.7 V, β = 120,
VCE(sat) = 0.2 V.

Common-emitter circuit
For VI ≤ 0.7 V, Qn is cut-off, so IB = IC = 0. Output voltage
VO = VCC = 5 V
For VI > 0.7 V, Qn is turned on, and is initially biased in
forward active mode.
VI − 0.7
I C = βI B = β
RB
VI − 0.7
VO = 5 − I C RC = 5 − β RC
RB
When VO = 0.2 V, Qn is saturated. From above, VI = 1.9 V.
So for VI > 1.9 V, transistor is saturated
Example:
Assume pnp transistor parameters of VEB(on) = 0.7 V, β =
80, VEC(sat) = 0.2 V.

Common-emitter circuit
For 4.3 V ≤ VI ≤ 5 V, Qp is cut-off, so IB = IC = 0. Output
voltage VO = 0 V
For VI < 4.3 V, Qp is turned on, and is initially biased in
forward active mode.
(5 − 0.7) − VI
I C = βI B = β
RB
(5 − 0.7) − VI
VO = I C RC = β RC
RB
When VO = 4.8 V, Qp is saturated. From above, VI = 2.8 V.
So for VI ≤ 2.8 V, transistor is saturated
Example:
Assume npn transistor parameters of VBE(on) = 0.7 V, β = 75.

Common-emitter circuit with emitter resistor

KVL : VBB = I B RB + VBE ( on ) + I E RE
Assume forward active : I E = (1 + β ) I B
VBB − VBE ( on )
6 − 0.7
Solve : I B = = = 75.1 µA
RB + (1 + β ) RE 25 + 76(0.6)
I C = βI B = 75(75.1µ ) = 5.63 mA
I E = (1 + β ) I B = 76(75.1µ ) = 5.71 mA
VCE = VCC − I C RC − I E RE
= 12 − 5.63(0.4) − 5.71(0.6) = 6.32 V
load line equation :
1+ β
VCE = VCC − I C RC + RE
β
76
= 12 − I C 0.4 + 0.6 = 12 − I C (1.01)
75
Example: Assume npn transistor parameters of
VBE(on) = 0.65 V, β = 100
 KVL : 0 = VBE ( on ) + I E RE + VCC
− VCC − VBE ( on ) − (−5) − 0.65
IE = = = 4.35 mA
RE 1
I B = I E /(1 + β ) = 4.35 / 101 = 43.1 µA
I C = I E β /(1 + β ) = 4.35(100 / 101) = 4.31 mA
VCE = VCC − I C RC − I E RE − VEE
= 5 − 4.31(0.5) − 4.35(1) − (−5) = 3.5 V
load line equation :
1+ β
VCE = (VCC − VEE ) − I C RC + RE
β
101
= (5 − (−5)) − I C 0.5 + 1 = 10 − I C (1.51)
100
Example:
Assume transistor parameters of VBE(on) = 0.7 V, β = 120

Common-base circuit
 I EQ
KVL : VCC = I EQ RE + VEB ( on ) + RB
1+ β
Solving : R E = 8.52 kΩ
I CQ = I EQ β /(1 + β ) = 0.5(120 / 121) = 0.496 mA
VCC = I EQ RE + VECQ + I CQ RC + VEE
5 = (0.5)(8.52) + 4 + 0.496( RC ) + (−5)
RC = 3.51 kΩ
 Transistor as a switch
Transistor is switched between cutoff and saturation.
If vI < VBE(on), then iB = iC = 0, so transistor is cutoff,
so vO=VCC
If vI = VCC, and RB/RC < β transistor is saturated.

vI − VBE ( on ) RC
iB ≅
RB
VCC − VCE ( sat )
iC = I C ( sat ) =
RC
vO = VCE ( sat )
Transistor as an amplifier
Amplifier’s function is to increase the amplitude of a
signal, ideally without changing the shape of the
waveform
Let’s consider a voltage amplifier:
VBB represents a dc voltage to bias the transistor in forward-
active mode, i.e. to set the Q-point of the transistor in
forward-active region at an appropriate value. (we will look
at detail about biasing later )
Vi represents a time-varying input signal
Change in input voltage produces a change in the output
voltage
If the magnitude of the slope of the transfer characteristic is
larger than 1, then the signal will be amplified (amplitude
of output signal > amplitude of input signal)
Amplification factor = output magnitude/input magnitude
Example: Transistor has the parameters β =120 and
VBE(on) = 0.7 V. Assume the Q-point is biased at the
centre of the forward active region. Find the
amplification factor and maximum peak input voltage
without clipping of the output waveform.
We obtain the transfer characteristics as in the previous
example.
For 0.7 ≤ vI ≤ 1.9 V, transistor is in forward-active region and its
output voltage is given by vo = 7.8 – 4vI
Assuming Q-point is at the centre of the forward-active region,
when vI = 1.3V, vO = 2.6 V
From vo = 7.8 – 4vI
∆v
Av = O = −4
∆vI
The amplifier has a gain of 4. The negative sign indicates that
the polarity of the waveform is inverted
If input voltage > 1.9 V or < 0.7 V, output voltage waveform
will be clipped. So, maximum peak input voltage without
clipping of the output waveform is 0.6 V (approximately).
∆vI (max) = 1.9 − 0.7 = 1.2 V
∆vO (max) = 5 − 0.2 = 4(1.2) = 4.8 V
If the transistor is biased by setting the Q-point as
shown below, the signal is only amplified during the
negative cycle of the input. During the positive cycle
of the input, the output remains at almost 0 V.
Transistor biasing
Biasing sets up the Q-point of the transistor and is
important for proper operation of amplifier
Several types of biasing:
Single base resistor biasing
Voltage divider biasing
Collector feedback biasing
Single base resistor biasing

Equivalent dc circuit
Uses a single base resistor to establish quiescent base current
Coupling capacitor CC acts as open circuit to dc, to isolate
the signal source from the dc base current.
IBQ, ICQ and VCEQ indicates quiescent values.
VCC − VBE
I BQ =
RB
VCC − VCEQ
I CQ =
RC
∴VCEQ = VCC − I CQ RC = VCC − βI BQ RC
VCE depends on β, which changes with temperature. If
increase, IC increase, reducing VCE, thus affecting Q-point.
Also, value of β for a transistor is usually in a wide range or
specified the minimum value only. Bias stability is not good.
Example: Let VCC = 12V. For the transistor, VBE(on) = 0.7 V,
and β is between 50-150. Determine the resistor values
for ICQ = 1 mA and VCEQ = 6 V. Take β = 100.
VCC − VCEQ
RC =
I CQ
= (12 − 6) / 1 = 6 mA
VCC − VBE ( on )
RB =
I BQ
VCC − VBE ( on )
=
I CQ / β
12 − 0.7
= = 1.13 MΩ
10µ
Load line is given by: VCEQ = VCC − I CQ RC

Different values of will give different Q-point.

Voltage divider biasing

Equivalent dc circuit
If IB << I2, RIN(base) can be ignored when finding the
Thevenin equivalent. This is true for RIN(base) >> R2

RIN ( base ) = ( β + 1) RE
Thevenin equivalent circuit of B-E circuit:

Condition: RIN(base) >> R2

 R2
VTH = VCC
R1 + R2
R1 R2
RTH =
R1 + R2
VTH = I BQ RTH + VBE ( on ) + I EQ RE
= I BQ RTH + VBE ( on ) + (1 + β ) I BQ RE
VTH − VBE ( on )
I BQ =
RTH + (1 + β ) RE
VTH − VBE ( on )
I CQ = βI BQ = β
RTH + (1 + β ) RE
VCEQ = VCC − I CQ RC − I EQ RE
Example:
Let R1 = 56 kΩ, R2 = 12.2 kΩ, RC = 2 kΩ, RE = 400 Ω,
VCC = 10 V, VBE(on) = 0.7 V and β = 100. Find
quiescent point values.
R1 R2 56(12.2)
RTH = = = 10 kΩ
R1 + R2 56 + 12.2
R2 12.2
VTH = VCC = (10) = 1.79 V
R1 + R2 56 + 12.2
VTH − VBE ( on ) 1.79 − 0.7
I BQ = = = 21.6 µA
RTH + (1 + β ) RE 10 + 101(0.4)
I CQ = βI BQ = 100(21.6µ ) = 2.16 mA
I EQ = ( β + 1) I BQ = 101(21.6µ ) = 2.18 mA
VCEQ = VCC − I CQ RC − I EQ RE = 10 − (2.16)(2) − (2.18)(0.4) = 4.81 V
For different values of β:

Q-point is more stable because of the emitter resistor.

Since RTH << (1 + β ) RE
β (VTH − VBE ( on ) ) VTH − VBE ( on )
∴ I CQ ≅ ≅ since β >> 1
(1 + β ) RE RE
General rule for bias stability :
RTH ≅ 0.1(1 + β ) RE
The emitter resistor also stabilizes the Q-point with
respect to temperature.
Transistor current increases with temperature. This
causes junction temperature to increase (because of
power losses), which causes current to increase, further
increasing junction temperature. This leads to thermal
runaway which destroys the transistor.
With emitter resistor, when current increases, the
voltage drop across RE increases, which reduces B-E
junction voltage, hence stabilizing transistor current.
Example of biasing with dual-supply:
Transistor Q-points are to be: VECQ = 7 V, ICQ ≅ 5 mA and VRE
≅ 1 V. Assume transistor parameters β = 80 and VEB(on) = 0.7
V.

Equivalent dc circuit
RE = VRE / I CQ = 1 / 0.5 = 2 kΩ
R1 R2
RTH = = 0.1(1 + β ) RE = (0.1)(81)(2) = 16.2 kΩ
R1 + R2
R2 16.2 291.6
VTH = (VCC − VEE ) + VEE = (9 + 9) − 9 = −9
R1 + R2 R1 R1
VCC = I EQ RE + VEB ( on ) + I BQ RTH + VTH
= (1 + β ) I BQ RE + VEB ( on ) + I BQ RTH + VTH
291.6
9 = 81(0.00625)(2) + 0.7 + (0.00625)(16.2) + −9
R1
∴ R1 = 18 kΩ and R2 = 162 kΩ
VCC = I EQ RE + VECQ + I CQ RC + VEE
= (1 + β ) I BQ RE + VECQ + I CQ RC + VEE
9 = (0.506)(2) + 7 + (0.5) RC − 9
∴ RC ≅ 20 kΩ
Collector feedback biasing
VCEQ = VCC − ( I CQ + I BQ ) RC ≅ VCC − I CQ RC
VCC − I CQ RC − VBE ( on )
I BQ =
RB
I CQ VCC − I CQ RC − VBE ( on )
=
β RB
VCC − VBE ( on )
I CQ =
RC + ( RB / β )
If ( RB / β ) << RC
then the collector current is fairly independent of β
Early voltage &
finite output resistance
The I-V curves have a slope due to “Early effect”.
The extrapolated curves meet at a point vCE = -VA, known
as the Early voltage
For a given value of vBE, if vCE increases, the reverse-bias
voltage of the C-B junction increases. Width of the B-C
space-charge region also increases. This reduces neutral
base width. This increases diffusion current through the
base. Collector current increases.
Slopes of the curves indicate that the output resistance rO
looking into the collector is finite.
VA
rO ≅
IC