‫ﺟﺎﻣﻌﺔ ﺣﻠﺐ‬

‫ﻛﻠﻴﺔ ﺍﳍﻨﺪﺳﺔ ﺍﻟﻜﻬﺮﺑﺎﺋﻴﺔ ﻭﺍﻹﻟﻜﱰﻭﻧﻴﺔ‬

‫ﻗﺴﻢ ﻫﻨﺪﺳﺔ ﺍﻟﺘﺤﻜﻢ ﻭﺍﻷﲤﺘﺔ‬

‫ﺑﻨﺎﺀ ﻧﻈﺎﻡ ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼﺏ ﺍﳌﺮﺣﻠﺔ ﺍﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎﻝ ﺑﺮﳎﺔ ‪FPGA‬‬

‫)ﺍﳌﺼﻔﻮﻓﺎﺕ ﺍﳌﻨﻄﻘﻴﺔ ﺍﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ( ﺑﺎﺳﺘﺨﺪﺍﻡ ﻟﻐﺎﺕ ﺍﳉﻴﻞ ﺍﻟﻘﺎﺩﻡ‬

‫ﲝﺚ ﺃﻋﺪ ﻟﻨﻴﻞ ﺩﺭﺟﺔ ﺍﳌﺎﺟﺴﺘﲑ ﰲ ﻫﻨﺪﺳﺔ ﺍﻟﺘﺤﻜﻢ ﻭﺍﻷﲤﺘﺔ‬

‫ﺑﻜﻠﻴﺔ ﺍﳍﻨﺪﺳﺔ ﺍﻟﻜﻬﺮﺑﺎﺋﻴﺔ ﻭﺍﻹﻟﻜﱰﻭﻧﻴﺔ ﰲ ﺟﺎﻣﻌﺔ ﺣﻠﺐ‬

‫ﺇﻋﺪﺍﺩ ﺍﳌﻬﻨﺪﺱ‬

‫ﻭﻟﻴـ ـ ـﺪ ﺑﻠﻴـ ـ ـﺪ‬

‫ﺇﺷﺮﺍﻑ‬

‫ﺩ‪ .‬ﻣﺼﻄﻔﻰ ﺍﳊﺎﺝ ﺩﻳﺒﻮ‬ ‫ﺩ‪ .‬ﻋﻤﺎﺩ ﺍﻟﺮﻭﺡ‬

‫ﻣﺪﺭﺱ ﰲ ﻗﺴﻢ ﻫﻨﺪﺳﺔ ﺍﻟﺘﺤﻜﻢ ﻭﺍﻷﲤﺘﺔ‬ ‫ﻣﺪﺭﺱ ﰲ ﻗﺴﻢ ﻫﻨﺪﺳﺔ ﺍﻟﺘﺤﻜﻢ ﻭﺍﻷﲤﺘﺔ‬

‫ﻛﻠﻴﺔ ﺍﳍﻨﺪﺳﺔ ﺍﻟﻜﻬﺮﺑﺎﺋﻴﺔ ﻭﺍﻹﻟﻜﱰﻭﻧﻴﺔ‬ ‫ﻛﻠﻴﺔ ﺍﳍﻨﺪﺳﺔ ﺍﻟﻜﻬﺮﺑﺎﺋﻴﺔ ﻭﺍﻹﻟﻜﱰﻭﻧﻴﺔ‬

‫‪ 2011‬ﻡ‬

‫‪ 1432‬ﻫـ‬
University of Aleppo
Faculty of Electrical & Electronic Engineering
Automatic Control & Automation Department

Innovating A Complete Embedded System FPGA

(Field Programmable Gate Array) Educational
Paradigm for Teaching Undergraduates Next
Generation Programming Languages

Thesis Submitted for Master Degree

In Automatic Control & Automation Engineering

Prepared By:
Eng. Walid Balid

Supervised By:

Dr. Imad Alroh Dr. Mostafa AlhajDibo

Department of Automatic Control & Automation
Faculty of Electrical & Electronic Engineering
University of Aleppo

‫ ﻡ‬2011

‫ ﻫـ‬1432
 5
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 ‫‪@ıaáÄÄÄÄÄÄÄÄÄÄÄÄÄÁ�a‬‬
‫‪DEDICATION‬‬

‫ﲤﺮ ﺷﱴ اﳊﻮادث ﺑﺎﻹﻧﺴﺎن ﻓﻴﻨﺴﺎﻫﺎ وﻻ ﺗﱰك ﰲ ﻧﻔﺴﻪ أﺛﺮاً ﻳﺬﻛﺮ‪ ،‬ﻋﻠﻰ أن ﻟﺒﻌﺾ ﻫﺬﻩ اﳊﻮادث أﺛﺮاً ﻻ ﳝﺤﻰ‪ ،‬إذ ﲤﺮ اﻷﻳﺎم واﻟﺸﻬﻮر واﻟﺴﻨﻮن‬
‫واﻟﺪﻫﻮر وذاك اﻷﺛﺮ ٍ‬
‫ﺑﺎق ﰲ ﻧﻔﺴﻪ ﻳﺆﺛﺮ ﻓﻴﻪ أﻋﻤﻖ اﻷﺛﺮ وأﺷﺪﻩ‪.‬‬

‫ذﱄ ﰲ ﳏﺒﺘﻚ‪ ،‬راﺟﻴﺎً ﻣﻨﻚ اﻟﻘﺒﻮل‪ ،‬وﺗﻌﻄﻴﻒ ﻗﻠﺐ ﺳﻴﺪﻧﺎ اﻟﺮﺳﻮل ‪.ε‬‬ ‫أﻗﻒ ﺑﻌﺠ ٍﺰ واﻓﺘﻘﺎ ٍر واﻧﻄﺮ ٍاح ﻋﻠﻰ ﺑﺎﺑﻚ‪ ،‬ﻣﻮﻻي‪ ،‬اﻟﺬي ﻳﻄﺮﻗﻪ ّ‬
‫ﻓﺄﻧﺎرت ﻗﻨﺪﻳﻞ ﳏﺒﺘﻪ ﻓﻴﻚ ﻟﻚ‪...‬‬
‫ْ‬ ‫وﺻﻒ ﻟﺸﻜﺮك‪ ...‬ﺳﺒﺤﺎﻧﻚ‪ ،‬ﺳﺒﻘﺖ ﳏﺒﺘﻚ ﻟِﻌُﺒَـْﻴ ِﺪ َك‬ ‫ٍ‬ ‫ﻛﻞ ﻟﺴﺎ ُن اﻟﻘﻠﺐ ﻋﺠﺰاً ﻋﻦ ﺑﻌﺾ‬ ‫ﺳﺒﺤﺎﻧﻚ‪ ،‬ﱠ‬
‫رﺟﺎﺋﻲ‪ ،‬أن ﺗﻘﺒﻞ ﻣﺎ ﻫﻮ ﻣﻨﻚ إﻟﻴﻚ‪ ،‬وﻣﺎ أﻇﻬﺮﺗﻪ ﻣﻦ ﲝﺮ ﺟﻮدك وﻓﻀﻠﻚ ﻣﻨﱠﺔً ﻋﻠﻰ ﻋﺒﺪك‪.‬‬
‫رﰊ‬
‫ﻣﻮﻻي ّ‬

‫إﱃ إﻧﺴﺎن ﻋﲔ اﻟﻮﺟﻮد وأﺻﻞ ﻛﻞ ﻣﻮﺟﻮد‪ ...‬إﱃ ﻣﻦ ﻫﻮاﻩ أﺣﺐ إﱄ ﻣﻦ أﻫﻠﻲ وﻧﻔﺴﻲ وﻛﻠّﻲ ﺑﺄﲨﻌﻲ‪.‬‬
‫ﺣﱯ رﺳﻮﱄ‬
‫ّ‬
‫ﻣﻘﻠﺘﺎي وﻣﻬﺠﺘﺎي‪ ...‬ﴰﺴﻲ وﺑﺪري‪ ...‬ﻳﺎ ﻣﻦ ﺑﻢ ﺗﻘﺮ ﻋﻴﲏ‪ ...‬وﲟﺎء رﻋﺎﻳﺘﻬﻢ أﻳﻨﻊ ﲦﺮي‪ ...‬ﻳﺎ ﻣﻦ ﻧﺼﺒﻮا إﱃ اﻟﺘﻌﺐ ﺟﺴﺮاً‪ ...‬وﺧﺎﺿﻮا‬
‫ﲟﺮﻛﺐ اﻟﺒﺬل ﲝﺮاً‪ ...‬وﻫﺠﺮوا ﻣﻦ أﺟﻠﻲ اﻟﺮﻗﺎد ﻳﻮﻣﺎً ﻓﺪﻫﺮاً‪ ...‬ﺑﺎﳊﻨﺎن ﲪﻠﻮﱐ‪ ...‬وﺑﺎﳊﺐ ﺳﺤﺮوﱐ‪ ...‬وﺑﺎﻟﻌﻄﻒ ﻏﻤﺮوﱐ‪ ...‬داووا ﺑﱰﻳﺎق‬
‫ودﻫﻢ ﺳﻘﻤﻲ‪ ...‬وأﺳﻌﻔﻮا ﺑﺒﻠﺴﻢ ﺣﻨ ﱢﻮﻫﻢ ﺟﺮاﺣﻲ‪ ...‬ﰲ ﻣﻄﻠﻊ ﻓﺠﺮ ﻛﻞ ﻳﻮم أدﻋﻮا رﰊ‪ ...‬أن ﳛﻔﻈﻬﻢ ﱄ وﻳﺪﳝﻬﻢ ذﺧﺮي‪.‬‬
‫أﰊ و ّأﻣﻲ‬

‫إﱃ اﻟﻮرود اﻟﱵ ﺟﻌﻠﺖ ﻣﻦ ﻗﻔﺎري روﺿﺎً ﻣﺰﻫﺮاً‪ ...‬إﱃ اﻟﻌﺼﺎﻓﲑ اﻟﱵ ﺑﺪﻟﺖ وﺣﺸﱵ أﻧﺴﺎً ﺧﺎﻟﺼﺎً‪...‬‬
‫إﺧﻮﰐ‬

‫إﱃ اﻟﱵ أﳍﺒﺖ ﻧﻔﺴﻲ وأﻛﺴﺒﺘﻬﺎ ﺷﺎﻋﺮﻳﺔً ﻋﺬﺑﺔً ﻓﻔﺎﺿﺖ ﺑﺄﻋﺬب اﻟﻜﻼم وأﺑﺪﻋﺖ ﰲ ﺻﻨﻮف اﻟﻐﺰل وﺿﺮوب اﻟﻨﺜﺮ ﻣﺎ ﻗﺪر ﳍﺎ أن ﺗﺒﺪع‪ ...‬إﱃ‬
‫ﻣﻦ ﺻﲑت ﻣﻦ رﻣﺎل ﻓﻘﺪي ﻛﻮﻛﺒﺎً درﻳﺎً ﻻﻣﻌﺎً‪ ...‬إﱃ ﻣﻦ ﻋﺮﻓﺘﲏ إﱃ رﺣﻴﻖ ﺗﻠﻚ اﻟﻜﺄس اﻟﻌﺬرﻳﺔ اﻟﺒﻴﻀﺎء‪ ...‬إﱃ ﻣﻦ ﻗﺼﻘﺼﺖ ﺟﻨﺎﺣﺎي‬
‫وأﻋﺎرﺗﲏ دو�ﺎ ﺟﻨﺎﺣﲔ ﻣﺘﻜﺴﺮﻳﻦ ﳛﺘﺠﺰاﱐ أﺑﺪ اﻟﺪﻫﺮ ﰲ ﻣﻌﻤﻮرة ذﻛﺮاﻫﺎ‪.‬‬
‫ِرﺋْ ُﻢ ﻗﻠﱯ‬

‫ﱃ ﻣﻦ ﻻﻗﺘﻬﺎ روﺣﻲ ﰲ ﻣﻌﺮاﺟﻬﺎ وﻗﺖ ﺻﻔﺎﺋﻬﺎ ﻗﺒﻞ أن ﺗﺮاﻫﺎ ﻋﻴﲏ أو ﳚﺘﻤﻊ ﻬﺑﺎ ﻧﺎﺳﻮﰐ‪ ،‬ﻓﻼزﻣﺘﻬﺎ وأﺣﺒﺘﻬﺎ وﺳﻜﻨﺖ إﻟﻴﻬﺎ‪ ...‬ﻋﻠﲏ ﻳﻮﻣﺎً أن‬
‫أراﻫﺎ ﰲ ﻋﺎﱂ اﻷﺟﺴﺎد ﻓﺄﻋﺮﻓﻬﺎ وﺗﻌﺮﻓﲏ‪ ...‬إن ﲨﺎل ﺗﻠﻚ اﻟﺮوح آﺳﺮ ﺑﺴﻄﻮة ﺳﺤﺮﻩ‪ ،‬ﺟﺎرح ﺑﻌﺬوﺑﺘﻪ‪ ،‬ﳚﻌﻠﲏ أرى ﰲ ﻛﻞ ﺷﻲء ﻣﻌﻨﺎً آﺧﺮ‬
‫ﳛﺎر ﻓﻴﻪ ﻟﱯ‪ ،‬وﻳﺴﻜﺮ ﻣﻦ ﻣﻌﺎﻧﻴﻪ ﻗﻠﱯ‪.‬‬
‫ﻋﻨﻘﺎء ﻣﻐﺮب‬

‫إﱃ ﻣﺮﱘ اﻟﻄﻬﺮ واﻟﻨﻘﺎء واﻟﺼﻔﺎء واﻻﺻﻄﻔﺎء‪ ...‬إﱃ ﻣﻦ ُﲰﱢﻴﺖ ﻣﻦ ﻗﺒﻞ ﻛﻮﱐ وﲰﻴﺘﻬﺎ ﻣﻦ ﻗﺒﻞ ﻛﻮ�ﺎ ﻣﺮﳝﺎ‪ ...‬إﱃ ﻣﻦ أﻧﺘﻈﺮﻫﺎ ﻟﺘﻜﻮن ﺑﻨﺖ‬
‫اﻟﻌﻨﻘﺎء ﻔﺎرغ اﻟﺼﱪ وﻗﺪ ﻧﺬرﻬﺗﺎ ﷲ أﺑﺪ اﻟﺪﻫﺮ‪.‬‬
‫اﺑﻨﱵ ﻣﺮﱘ‬
 ‫◊‹‡‪@ãÄÄÄÄÄÄÄÄÄÄÿí@ÚÄÄÄÄÄÄÄÄÄ‬‬
‫‪ACKNOWLEDGEMENT‬‬

‫أﻗﻒ ﻋﻠﻰ ﻣﻨﱪ روﺣﻲ‪ ،‬وأﻧﺎدي ﻣﻦ ﳏﺮاب ﻗﻠﱯ‪ ،‬وأدﻋﻮ رﰊ ﻟﻴﺠﺰي ﻋﲏ ﺧﲑ اﳉﺰاء‪ ،‬ﻛﻞ ﻣﻦ ﻋﻠﻤﲏ ﺣﺮﻓﺎً‪ ،‬أو أﻋﺎﻧﲏ ﻃَﺮﻓﺎً‪ ،‬أو ﻗ ّﺪر ﱄ‬

‫ﻇﺮﻓﺎً‪...‬‬

‫ﺗﻀﻴﻖ ﻋﻨﻪ اﻟﻘﺮاﻃﻴﺲ‬ ‫ِ‬

‫اﻟﻔﻀﻞ ُ‬ ‫ٍ‬
‫ﺣﺪب وﺻﻮب‪ ،‬ﻓﻮﺟﺪت أن ذﻛﺮ أﻫﻞ‬ ‫اﻷﻓﻀﺎل اﻟﱵ ﻏﻤﺮﺗﲏ ﻣﻦ ُﻛ ﱢﻞ‬ ‫أﻧﻈﺮ‬ ‫ِ‬
‫َ‬ ‫اﻟﻔﻀﻞ ُ‬ ‫ﻟﻘﺪ ﺳﺮﺣﺖ ﰲ ﻋﺎﱂ‬

‫ﻛﻞ اﺳ ٍﻢ ﻻح ﱄ ﰲ ذاك اﻟﻮﻗﺖ‪ ،‬ﻓﺈن ﺗﺎﻩ اﻟﻌﻘﻞ ﻋﻦ ذي ٍ‬

‫ﻓﻀﻞ ﻓﺎﻟﻘﻠﺐ ﻻ ﻳﺘﻮﻩ‪.‬‬ ‫ﱡ‬
‫واﻟﺪواوﻳﻦ‪ ،‬ﻓﻐﺪوت أﺧﻂ ﻋﻠﻰ ﻟﻮﺣﻲ ﻫﺬا ّ‬

‫أﺗﻘﺪم ﺑﺪاﻳﺔً ﲞﺎﻟﺺ اﻟﺸﻜﺮ واﻻﻣﺘﻨﺎن واﻟﻌﺮﻓﺎن ﻷﺳﺎﺗﺬﰐ اﻷﻓﺎﺿﻞ أﻋﻀﺎء اﳍﻴﺌﺔ اﻟﺘﺪرﻳﺴﻴﺔ ﰲ ﻗﺴﻢ اﻟﺘﺤﻜﻢ واﻷﲤﺘﺔ اﻟﺬﻳﻦ ﺟﻌﻠﻮا ﻣﻦ ﺧﻬﺗﻢ‬

‫وﻋﻠﻤﻬﻢ ﻳﻨﺎﺑﻴﻊ ﻣﻌﺮﻓﺔ ﻟﻨﺎ‪ ،‬وأﺧﺺ ﺑﺎﻟﺸﻜﺮ‪:‬‬

‫أﺳﺘﺎذي اﻟﻔﺎﺿﻞ اﻟﺪﻛﺘﻮر اﳌﻬﻨﺪس ﻋﻤﺎد اﻟﺮوح اﻟﺬي ﺗﻔﻀﻞ ﻣﺸﻜﻮراً ﺑﺎﻹﺷﺮاف ﻋﻠﻰ ﻫﺬا اﻟﺒﺤﺚ وﻛﺎن ﻣﺆﻧﺴﺎً ﻟﻨﺎ وﻣﻌﻴﻨﺎً وﺳﺎر ﻣﻌﻨﺎ ﰲ ﻫﺬا‬

‫اﻟﺒﺤﺚ ﺣﱴ ﺑﻠﻐﻨﺎ اﻟﺴﺪرة‪.‬‬

‫ﻛﻤﺎ أﺗﻮﺟﻪ ﺑﺎﻟﺸﻜﺮ إﱃ‪:‬‬

‫اﻷﺳﺘﺎذ اﻟﺪﻛﺘﻮر اﳌﻬﻨﺪس ﻋﺒﺪ اﻟﺮﲪﻦ ﺣﺴﲔ‪...‬‬

‫اﻟﺪﻛﺘﻮر اﳌﻬﻨﺪس ﻣﺼﻄﻔﻰ اﳊﺎج دﻳﺒﻮ‪...‬‬

‫اﻟﺪﻛﺘﻮر اﳌﻬﻨﺪس أﻧﺲ ﻓﺘﻮح‪...‬‬

‫اﻟﺪﻛﺘﻮر اﳌﻬﻨﺪس ﺻﻼح ﻧﺎدر‪...‬‬

‫وﻛﻴﻒ ﱄ أن أﻧﺴﻰ أﺧﻮة ﱄ أﺣﺒﻬﻢ وأﺷﻜﺮ ﻓﻀﻠﻬﻢ‪ ...‬ﻗﺪ ﺗﻌﻠﻤﺖ ﰲ ﻣﺪرﺳﺘﻬﻢ أﲜﺪﻳﺎت اﻟﻌﻠﻮم‪ ،‬ﻓﺴﻄﻌﺖ ﰲ ﲰﺎﺋﻲ اﻟﻨﺠﻮم‪...‬‬

‫ﻣﻦ ﻣﻨﻬﻢ أﺳﺘﻤﺪ ﻋﺰﳝﱵ‪ ،‬وﻣﻦ ﳘﻤﻬﻢ ﺗﺴﺘﻘﻲ ﳘﱠﱵ‪...‬‬

‫ﻋﻞ ﺻﻤﱵ أن ﻳﻨﻄﻖ ﲝ ﱢﻖ ﺷﻜﺮﻫﻢ‪...‬‬ ‫ﻛﻞ ٍ‬

‫ﻓﻀﻞ وﻋ ﱠﻢ‪ ،‬وأﺧﺎف أن أﺷﻜﺮﻫﻢ ﻓﻼ أؤدي ﺣ ﱠﻖ ﺷﻜﺮﻫﻢ‪ ،‬ﻟﺬا أﺻﻤﺖ ﱠ‬ ‫ﻗﺪ ﺳﺒﻖ اﻟﻔﻀﻞ ﻣﻨﻬﻢ ﱠ‬

‫أﺧﻮﰐ وأﺳﺎﺗﺬﰐ ﰲ ﺷﺮﻛﺔ اﻷواﺋﻞ ﻟﻠﻬﻨﺪﺳﺔ اﻹﻟﻜﱰوﻧﻴﺔ‪ :‬اﳌﻬﻨﺪس ﻳﺎﺳﺮ ﻋﺜﻤﺎن – اﳌﻬﻨﺪس ﺻﺎﱀ ﺣﺎج إﲰﺎﻋﻴﻞ‪...‬‬

‫‪...‬ﺟﺰاﻛﻢ اﷲ ﲨﻴﻌﺎً ﻋﲏ ﻛﻞ ﺧﲑ‪...‬‬

 ‫‪@ÚÄÄÄÄÄÄÄÄÄÄyÎã†˛a@ÛÄÄÄÄÄ€g@›ÄÄÄÄÄÄÄÄÄÄÇáfl‬‬

‫‪INTRODUCTION TO THE THESIS‬‬

‫ﺗﻤﻬﻴﺪ )‪:(Preface‬‬

‫ﻳﺘﺴﻢ اﻟﻘﺮن اﻟﻮاﺣﺪ واﻟﻌﺸﺮون ﺑﺘﺴﺎرع ﰲ وﺗﲑة اﻟﺘﻄﻮر اﻟﺘﻜﻨﻮﻟﻮﺟﻲ‪ ،‬ﺣﻴﺚ ﻳﺸﻬﺪ اﻟﻌﺎﱂ اﻟﻴﻮم ﺗﻔﺠﺮاً ﻣﻌﺮﻓﻴﺎً وﺗﻄﻮراً ﻋﺎﺻﻔﺎً ﰲ ﳎﺎﻻت اﻟﻌﻠﻮم‬
‫اﻟﺘﻜﻨﻮﻟﻮﺟﻴﺔ واﻟﺘﻘﻨﻴﺔ‪ ،‬إﱃ ﺣﺪ ﺟﻌﻠﺖ اﻟﺒﻌﺾ ﻳﻄﻠﻘﻮن ﻋﻠﻴﻪ ﻋﺼﺮ اﻟﺜﻮرة اﻟﻌﻠﻤﻴﺔ اﻟﺘﻜﻨﻮﻟﻮﺟﻴﺔ‪ ،‬إذ أﻧﻪ ﻓﺎق ﻛﻞ ﺗﺼﻮراﺗﻨﺎ ﰲ أﺑﻌﺎدﻩ وﺗﺄﺛﲑﻩ‪،‬‬
‫وﺑﺎت ﻣﻦ اﻟﺼﻌﺐ ﺟﺪاً ﻣﻮاﻛﺒﺔ اﻟﺘﻄﻮرات اﳌﺘﻼﺣﻘﺔ ﰲ ﻋﺎﱂ اﻟﺘﻜﻨﻮﻟﻮﺟﻴﺎ اﳌﺘﻄﻮرة وﺗﻘﻨﻴﺎت اﳌﻌﻠﻮﻣﺎت واﻻﺗﺼﺎﻻت‪ ،‬إذ أﺻﺒﺢ اﳌﺪى اﻟﺰﻣﲏ‬
‫اﻟﻔﺎﺻﻞ ﺑﲔ اﻻﺑﺘﻜﺎرات واﻻﺧﱰاﻋﺎت‪ ،‬ﺑﻌﻀﻬﺎ اﻟﺒﻌﺾ‪ ،‬وﻄﺒﻴﻘﺎﻬﺗﺎ اﻟﻌﻤﻠﻴﺔ‪ ،‬ﻳﺴﺒﻖ ﺑﺰوغ ﻓﺠﺮ ﻳﻮﻣﻨﺎ ﻫﺬا‪.‬‬

‫ﺣﱴ أواﺧﺮ اﻟﺜﻤﺎﻧﻴﻨﻴﺎت ﻣﻦ اﻟﻘﺮن اﻟﻌﺸﺮﻳﻦ ﻛﺎﻧﺖ اﳌﺸﻜﻠﺔ اﻟﺮﺋﻴﺴﻴﺔ اﻟﱵ ﺗﻌﱰض ﺗﻄﻮر اﻟﺒﺤﺚ اﻟﻌﻠﻤﻲ‪ ،‬ﻫﻲ اﻟﺘﻐﻠﺐ ﻋﻠﻰ ﻧﻘﺺ اﻟﺒﻴﺎﻧﺎت‬
‫واﻠﻮﻣﺎت اﳌﺘﺼﻠﺔ ﺑﺎﺠﻤﻟﺎل اﳌﻌﲏ‪ .‬ﻣﻊ ﺗﻄﻮر ﺗﻜﻨﻮﻟﻮﺟﻴﺎ اﳌﻌﻠﻮﻣﺎت واﻻﺗﺼﺎﻻت ﰲ أواﺧﺮ اﻟﺘﺴﻌﻴﻨﻴﺎت‪ ،‬واﻧﺘﺸﺎر ﺷﺒﻜﺔ اﻹﻧﱰﻧﺖ اﻟﱵ ﺟﻌﻠﺖ‬
‫اﻟﻌﺎﱂ ﻳﺒﺪو ﻛﺄﻧﻪ ﻗﺮﻳﺔٌ ﺻﻐﲑة‪ ،‬ﱂ ﺗﻌﺪ اﳌﺸﻜﻠﺔ ﻣﺮﺗﺒﻄﺔ ﺑﺎﳊﺼﻮل ﻋﻠﻰ اﻟﺒﻴﺎﻧﺎت أو اﳌﻌﻠﻮﻣﺎت ﻧﻔﺴﻬﺎ‪ ،‬وإﳕﺎ أﺻﺒﺤﺖ ﻣﺮﺗﺒﻄﺔ ﰲ اﻟﻄﺮق‬
‫واﻻﺳﱰاﺗﻴﺠﻴﺎت اﳌﺜﻠﻰ ﻻﻧﺘﻘﺎء اﳌﻌﻠﻮﻣﺎت اﳌﺘﺪﻓﻘﺔ وﺗﻮﻇﻴﻔﻬﺎ ﰲ ﺧﺪﻣﺔ اﻟﺒﺤﺚ واﻟﺘﻄﻮﻳﺮ اﻟﻌﻠﻤﻲ‪ ،‬ﺣﻴﺚ أﺻﺒﺤﺖ ﻋﻤﻠﻴﺔ اﻻﺳﺘﻔﺎدة ﻣﻦ‬
‫اﳌﻌﻠﻮﻣﺎت أﻫﻢ وأﺻﻌﺐ ﻣﻦ اﳊﺼﻮل ﻋﻠﻰ اﳌﻌﻠﻮﻣﺎت ﻧﻔﺴﻬﺎ‪.‬‬

‫ﺑﻌﺒﺎرة أﺧﺮى ﳝﻜﻨﻨﺎ اﻟﻘﻮل‪ :‬إن ﻋﻤﻠﻴﺔ ﺑﻨﺎء ﻗﺎﻋﺪة اﳌﻌﺮﻓﺔ ﻏﺪت ﻛﺜﺮ أﳘﻴﺔ وﺿﺮورة ﻣﻦ اﻗﺘﻨﺎء ﻗﻮاﻋﺪ اﻟﺒﻴﺎﻧﺎت واﳌﻌﻠﻮﻣﺎت ذاﻬﺗﺎ‪ ،‬ﻓﻠﻢ ﺗﻌﺪ‬
‫اﳌﻬﺎرات اﻟﻔﺮدﻳﺔ ﻣﺮﻛﺰ اﻻﻫﺘﻤﺎم ﰲ ﺑﻨﺎء اﻟﻘﻮة اﻟﺒﺸﺮﻳﺔ‪ ،‬وإﳕﺎ اﻧﺼﺐ اﻻﻫﺘﻤﺎم ﻋﻠﻰ اﻟﻘﺪرة ﰲ إﻧﺘﺎج اﳌﻌﺮﻓﺔ اﳌﺮﺗﺒﻄﺔ ﺑﺎﻻﺑﺘﻜﺎر واﻹﺑﺪاع‪.‬‬

‫ﻋﺎل‪ ،‬وﺳﻌ ٍﺮ ﻣﻨﺨﻔﺾ‪ ،‬وﺣﺠ ٍﻢ ٍ‬

‫ووزن أﻗﻞ‪،‬‬ ‫إن اﳍﺪف اﻷﺳﺎﺳﻲ ﻟﻠﺒﺤﺚ واﻟﺘﻄﻮﻳﺮ اﻟﻌﻠﻤﻲ ﻳﺘﻤﺤﻮر ﺣﻮل ﺗﻮﻓﲑ ﺣﻠﻮل ﺗﻜﻨﻮﻟﻮﺟﻴﺔ ذات أداء ٍ‬
‫وأﻛﺜﺮ ﺗﻘﺪﻣﺎً وذﻛﺎءً ﻦ ﺳﺎﺑﻘﺎﻬﺗﺎ؛ وﻋﻠﻴﻪ ﻓﺈن اﳌﻌﺮﻓﺔ واﳌﻌﻠﻮﻣﺎت اﻟﻼزﻣﺔ ﻟﺘﻮﻓﲑ ﻫﺬﻩ اﳊﻠﻮل‪ ،‬ﺳﺘﻜﻮن أﻛﺜﺮ ﻛﺜﺎﻓﺔً وﺗﻌﻘﻴﺪاً‪ ،‬وﺳﻮف ﺗﺘﻄﻠﺐ‬
‫ﺗﻘﺪﻣﺎً ﻣﻌﺮﻓﻴﺎً ﻣﺘﺰاﻳﺪاً ﰲ اﻟﻘﺪرات اﻟﺒﺸﺮﻳﺔ ﻣﻦ ﻋﻠﻤﺎء وﺑﺎﺣﺜﲔ وﻣﻄﻮرﻳﻦ وﺗﻘﻨﻴﲔ‪ .‬إن ﻫﺬا اﻟﺘﻮﺟﻪ أدى ﺑﺪورﻩ إﱃ ﺑﺰوغ ﺛﻮرة ﰲ ﳎﺎﻻت اﻟﺒﺤﺚ‬
‫اﻟﻌﻠﻤﻲ‪ ،‬ﺣﻴﺚ ﺗﻄﻮرت أدواﺗﻪ‪ ،‬وﺗﻮﺳﻌﺖ داﺋﺮﺗﻪ‪ ،‬وﻛﺎن ﻟﻪ أﺛﺮ ﺗﻨﻤﻮي ﺣﻲ ﻋﻠﻰ اﳌﺆﺳﺴﺎت اﻟﺘﻌﻠﻴﻤﻴﺔ اﻟﱰﺑﻮﻳﺔ اﻟﱵ ﻏﺪت ﻧﻮاة اﻟﺒﺤﺚ اﻟﻌﻠﻤﻲ‬
‫اﺠﻤﻟﺘﻤﻌﺎت اﳌﺘﻄﻮرة‪.‬‬

‫ﻣﺆﺧﺮاً‪ ،‬ﺗﺘﺠﻪ اﻟﺪول اﻟﺼﻨﺎﻋﻴﺔ اﳌﺘﻘﺪﻣﺔ إﱃ ﺗﻄﺒﻴﻖ ﻧﻈﺮﻳﺔ اﻟﺘﻘﺪم اﻟﺘﻜﻨﻮﻟﻮﺟﻲ اﻟﺘﻨﻤﻮي‪ ،‬وذﻟﻚ ﻣﻦ ﺧﻼل ﲣﺼﻴﺺ اﻟﻨﺴﺒﺔ اﻷﻛﱪ ﻣﻦ اﻹﻧﻔﺎق‬
‫ﻋﻠﻰ اﻟﺒﺤﺚ واﻟﺘﻄﻮﻳﺮ‪ ،‬ﻻﺳﻴﻤﺎ ﰲ اﻟﺘﺨﺼﺼﺎت اﻟﻌﻠﻤﻴﺔ واﳍﻨﺪﺳﻴﺔ‪ ،‬ﻟﺘﺄﺳﺲ ﺑﺬﻟﻚ ﳉﻴﻞ ﻣﺘﺠﺪد اﳌﻌﺮﻓﺔ واﻹﻣﻜﺎﻧﺎت واﳌﻮاﻫﺐ‪ ،‬ﻗﺎد ٍر ﻋﻠﻰ‬
‫ﲪﻞ أﻋﺒﺎء ﻣﺘﻄﻠﺒﺎت اﻟﺜﻮرة اﻟﺘﻜﻨﻮﻟﻮﺟﻴﺔ‪.‬‬

‫وأﻣﺎ ﻋﻦ ﻤﻟﺘﻤﻊ اﻟﻌﺮﰊ ورﻏﻢ اﻹﻣﻜﺎﻧﻴﺎت اﳌﺎﻟﻴﺔ اﳌﺘﺎﺣﺔ‪ ،‬ﻓﻠﻴﺲ ﻫﻨﺎك دوﻟﺔ ﻋﺮﺑﻴﺔ واﺣﺪة ﺗﻘﻊ ﺿﻤﻦ اﻟﺪول اﻷرﺑﻌﲔ اﻷول ﰲ اﻟﻌﺎﱂ ﺣﺴﺐ‬
‫ﻟﻘﺎﺋﻤﺔ اﻟﱵ ﻧﺸﺮﻬﺗﺎ ﻣﺆﺳﺴﺔ )‪ (Battelle‬ﻟﻌﺎم ‪ .[1]2008‬وﺣﺴﺐ ﺗﻘﺮﻳﺮ اﳌﻌﺮﻓﺔ اﻟﻌﺮﰊ ﻟﻠﻌﺎم ‪ ،[2]2009‬ﺑﺮﻋﺎﻳﺔ ﺑﺮﻧﺎﻣﺞ اﻷﻣﻢ اﳌﺘﺤﺪة اﻹﳕﺎﺋﻲ‬
‫واﳌﻜﺘﺐ اﻹﻗﻠﻴﻤﻲ ﻟﻠﺪول اﻟﻌﺮﺑﻴﺔ‪ ،‬ﻓﺈﻧﻪ أُورد ﰲ ﻣﻮﺟﺰ "راﻫﻦ اﳌﻌﺮﻓﺔ ﰲ اﳌﻨﻄﻘﺔ اﻟﻌﺮﺑﻴﺔ" ﻣﺎ ﻳﻠﻲ‪" :‬ﻳﺘﻌﺬر ﲢﻘﻴﻖ اﻟﻄﻤﻮح ﻹﻗﺎﻣﺔ اﻗﺘﺼﺎد وﳎﺘﻤﻊ‬
‫اﳌﻌﺮﻓﺔ‪ ،‬ﺑﺴﺒﺐ وﺟﻮد اﻟﺘﻘﺼﲑ اﻟﻜﻤﻲ ﰲ ﻧﺸﺮ اﻟﺘﻌﻠﻴﻢ‪ ،‬ﻛﻤﺎ أﻧﻨﺎ ﺷﺒﻪ ﻏﺎﺋﺒﲔ ﻋﻦ ﺳﺎﺣﺔ اﻟﻨﺸﺮ اﻟﻌﻠﻤﻲ اﻟﻌﺎﳌﻲ ﺑﻨﺴﺒﺔ ﺣﻀﻮر ‪ 1.1%‬ﻣﻦ اﻟﻨﺸﺮ‬
 ‫ﻗﺎﺋﻤﺔ اﶈﺘﻮﻳﺎت | ‪Table of Contents‬‬

‫اﻟﻌﺎﳌﻲ ﺣﺴﺐ ﻧﺸﺮة أﻛﺎدﳝﻴﺔ اﻟﻌﺎﱂ اﻟﺜﺎﻟﺚ ﻟﻠﻌﻠﻮم ‪ ،TWAS‬وإن ﻋﺎﺋﺪات اﻹﻧﻔﺎق ﰲ اﻟﻮﻃﻦ اﻟﻌﺮﰊ ﻋﻠﻰ اﻟﺒﺤﺚ اﻟﻌﻠﻤﻲ ﻫﻲ اﻷدﱏ ﻋﺎﳌﻴﺎً‪،‬‬
‫وإن ﻣﺆﺳﺴﺎت اﻟﺒﺤﺚ واﻟﺘﻄﻮﻳﺮ ﺿﻌﻴﻔﺔ اﻻرﺗﺒﺎط ﺑﺎﻟﺪورة اﻹﻧﺘﺎﺟﻴﺔ‪ ،‬وإن اﳌﺮدود اﻟﺘﻨﻤﻮي ﻟﻠﺒﺤﺚ اﻟﻌﻠﻤﻲ اﻟﻌﺮﰊ ﺿﻌﻴﻒ ﺟﺪاً‪ ،‬ﺣﻴﺚ أن‬
‫ﻧﺎﺗﺞ ﺑﺮاءات اﻻﺧﱰاع ﰲ اﻟﻔﱰة ﺑﲔ ‪ 2002-2006‬ﳓﻮ ‪ 32‬ﺑﺮاءة اﺧﱰاع ﺳﻨﻮﻳﺎً و‪ 5000‬ورﻗﺔ ﻋﻠﻤﻴﺔ ﲝﺜﻴﺔ ﻣﻨﺸﻮرة ﻓﻘﻂ‪ ،‬وﻟﻌﻞ اﻟﻨﻘﻄﺔ‬
‫اﻷﺿﻌﻒ ﰲ اﻷداء اﳌﻌﺮﰲ اﻟﻌﺮﰊ‪ ،‬ﺗﺘﻌﻠﻖ ﺑﺘﻮﻓﲑ اﻟﺒﻴﺌﺎت اﳌﻼﺋﻤﺔ ﻟﺒﻨﺎء ﳎﺘﻤﻊ اﳌﻌﺮﻓﺔ‪ "...‬اﻧﺘﻬﻰ‪.‬‬

‫ﺗﺸﲑ اﻟﺪراﺳﺎت إﱃ أﻧﻪ ﻣﻦ أﻫﻢ اﳌﺸﻜﻼت اﳌﺮﺗﺒﻄﺔ ﺑﺎﻟﻮاﻗﻊ اﳊﺎﱄ اﻟﻌﺮﰊ ﻣﺎﻳﻠﻲ‪:‬‬
‫• ﻋﺪم ﻣﻼﺋﻤﺔ اﳌﺴﺘﻮى اﳌﻌﺮﰲ ﳋﺮﳚﻲ اﻟﺘﻌﻠﻴﻢ اﻟﻌﺎﱄ ﳌﺘﻄﻠﺒﺎت اﻟﺘﻄﻮر اﻻﻗﺘﺼﺎدي واﻟﺘﻜﻨﻮﻟﻮﺟﻲ ﻋﻠﻰ اﻟﺮﻏﻢ ﻣﻦ اﻟﻔﻴﻀﺎن اﻟﻌﺪدي‬
‫ﻟﻠﺨﺮﳚﲔ؛ وﺗﺮﺗﺒﻂ ﻫﺬﻩ اﻟﻈﺎﻫﺮة ﺑﻘﺼﻮر ﻣﻨﺎﻫﺞ اﻟﺘﻌﻠﻴﻢ ووﺳﺎﺋﻠﻪ وﻃﺮاﺋﻘﻪ وﻣﻮاردﻩ‪.‬‬
‫• ﻏﻴﺎب اﻟﻌﻼﻗﺔ ﺑﲔ ﻣﺆﺳﺴﺎت اﻟﺒﺤﺚ واﻟﺘﻄﻮﻳﺮ )اﻟﺼﻨﺎﻋﺔ( واﳌﻨﻈﻮﻣﺔ اﻟﺘﻌﻠﻴﻤﻴﺔ )اﳉﺎﻣﻌﺔ(‪.‬‬

‫إن ﻫﺬﻩ اﳌﺸﻜﻼت ﺗﻈﻬﺮ ﺟﻠﻴﺎً ﰲ واﻗﻊ ﺳﻮق اﻟﻌﻤﻞ اﻟﻌﺮﰊ ﻣﻦ ﺧﻼل ﻏﻴﺎب اﻟﻜﻮادر اﳍﻨﺪﺳﻴﺔ اﳌﺆﻫﻠﺔ ﳌﻮاﻛﺒﺔ اﻟﺘﻄﻮرات اﳌﺘﻼﺣﻘﺔ‪ ،‬واﻟﺘﻌﺎﻣﻞ‬
‫ﻣﻌﻬﺎ ﺑﻜﻔﺎءة وﻣﺮوﻧﺔ‪ ،‬وﻳﺘﻢ اﻟﺘﻌﻮﻳﺾ ﻋﻦ ﻫﺬا اﻟﻨﻘﺺ ﺑﺎﺳﺘﻘﺪام اﻟﻜﻮادر اﻷﺟﻨﺒﻴﺔ‪ ،‬واﺳﺘﲑاد اﻟﺘﻄﺒﻴﻘﺎت اﻟﺘﻜﻨﻮﻟﻮﺟﻴﺔ‪ ،‬وﺻﺮف اﳌﺒﺎﻟﻎ اﻟﻄﺎﺋﻠﺔ‬
‫ﱵ ﳝﻜﻦ أن ﺗﻮﻇﻒ ﻟﺒﻨﺎء ﺑﻨﻴﺔ ﲢﺘﻴﺔ ﻣﺴﺘﻘﺒﻠﻴﺔ ﺠﻤﻟﺘﻤﻊ ﻫﻨﺪﺳﻲ ﻣﻌﺮﰲ‪.‬‬

‫وﻣﻦ ﻫﻨﺎ ﳚﺐ إﻋﺎدة اﻟﻨﻈﺮ ﰲ ﲨﻴﻊ اﳌﺸﺮوﻋﺎت اﻟﻘﺎﺋﻤﺔ ﻟﺘﻄﻮﻳﺮ اﻟﺘﻌﻠﻴﻢ ﲟﺨﺘﻠﻒ أﺷﻜﺎﻟﻪ؛ ﳌﻮاﻛﺒﺔ اﳌﻌﺎﻳﲑ اﻟﻌﺎﳌﻴﺔ ﰲ ﳎﺎل ﺟﻮدة اﻟﺘﻌﻠﻴﻢ‪،‬‬
‫واﻻﻧﻄﻼق ﻣﻦ ﻣﻔﻬﻮم ﺟﺪﻳﺪ ﻟﻠﺘﻌﻠﻴﻢ واﻟﺘﺪرﻳﺐ‪ ،‬ﻳﻮاﻛﺐ اﻟﺘﻄﻮر اﳌﻌﺮﰲ اﻟﻌﺎﳌﻲ‪ ،‬وﻫﻲ ﻣﻦ أﻫﻢ اﻟﺘﺤﺪﻳﺎت اﻟﱵ ﺗﻮاﺟﻪ اﻟﺘﻄﻮر اﳌﻌﺮﰲ اﻟﻌﺮﰊ‪،‬‬
‫وﳑﺎ ﻻ ﺷﻚ ﻓﻴﻪ‪ ،‬أن ﺟﻮﻫﺮ اﻟﺼﺮاع اﻟﻌﺎﳌﻲ اﻟﻴﻮم‪ ،‬ﻫﻮ ﺳﺒﺎق ﰲ ﺗﻄﻮﻳﺮ اﻟﺘﻌﻠﻴﻢ‪ ،‬وأن ﺣﻘﻴﻘﺔ اﻟﺘﻨﺎﻓﺲ اﻟﺬي ﳚﺮى ﰲ اﻟﻌﺎﱂ اﻟﻴﻮم‪ ،‬ﻫﻮ ﺗﻨﺎﻓﺲ‬
‫ﻋﻠﻰ اﳌﻌﺮﻓﺔ‪ ،‬وﺑﺸﻜﻞ ﺧﺎص اﳌﻌﺮﻓﺔ اﻟﺘﻜﻨﻮﻟﻮﺟﻴﺔ واﻟﺘﻘﺪم اﻟﻌﻤﻠﻲ‪.‬‬

‫إن ﻣﻦ أﻫﻢ وأﴰﻞ اﻟﻔﺮوع اﳌﻌﺮﻓﻴﺔ اﻟﺘﻜﻨﻮﻟﻮﺟﻴﺔ اﳍﻨﺪﺳﻴﺔ اﻟﱵ ﺗﺘﺴﺎ اﺠﻤﻟﺘﻤﻌﺎت اﳌﺘﻘﺪﻣﺔ وﳐﺎﺑﺮ اﻷﲝﺎث ﰲ اﳉﺎﻣﻌﺎت إﱃ ﺗﻄﻮﻳﺮﻫﺎ‪ ،‬وﺗﺸﻐﻞ‬
‫ﻴﺎﺗﻨﺎ اﻟﻴﻮﻣﻴﺔ ﺑﺘﻄﺒﻴﻘﺎﻬﺗﺎ اﳌﺘﻌﺪدة دون أن ﻧﺪرك ذﻟﻚ‪ ،‬ﻫﻲ ﻣﺎ ﻳﻄﻠﻖ ﻋﻠﻴﻪ ﺑـ ‪.Embedded Systems‬‬

‫ﰲ اﳊﻘﻴﻘﺔ ﺗﺘﻌﺪد اﻟﱰﲨﺎت اﻟﻌﺮﺑﻴﺔ ﳌﺼﻄﻠﺢ اﻟـ)‪ ،Embedded Systems (ESs‬ﻓﻴﻄﻠﻖ ﻋﻠﻴﻬﺎ‪ " :‬اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ"‪ " ،‬واﻷﻧﻈﻤﺔ اﳌﻀﻤﻨﺔ"‪،‬‬
‫"واﻷﻧﻈﻤﺔ اﳌﻄﻤﻮرة"‪ ،‬إﱃ ﻣﺎ ﻫﻨﺎﻟﻚ ﻣﻦ ﺗﺮﲨﺎت أﺧﺮى‪ ،‬ﻏﲑ أ�ﺎ ﲨﻴﻌﺎً ﻻ ﺗﻘﺎرب اﳌﻌﲎ اﳊﻘﻴﻘﻲ‪ ،‬وﻛﻴﻒ ﻻ؟! وﻻ ﻳﻮﺟﺪ إﱃ اﻵن ﺗﻌﺮﻳﻒ‬
‫ﻣﻌﺘﻤﺪ ﺑﺎﻟﻠﻐﺔ اﻹﻧﻜﻠﻴﺰﻳﺔ ﻟﻠـ‪ ،ESs‬إذ أ�ﺎ ﺗﻌﺮف وﻓﻘﺎً ﻟﻠﺘﻄﺒﻴﻖ اﻟﺬي ﺗﺸﻐﻠﻪ‪ ،‬وﻫﻨﺎك آﻻف اﻟﺘﻄﺒﻴﻘﺎت اﻟﱵ ﻗﺒﻠﻬﺎ اﻟﻨﺎﺑﺾ ﻫﻮ ﻧﻈﺎم ﻣﺪﻣﺞ‪.‬‬

‫اﻻﻧﻄﻼﻗﺔ اﻷوﱃ ﻧﻈﺮﻳﺎً ﻛﺎﻧﺖ ﻣﻊ ﻇﻬﻮر أول ﺣﺎﺳﺐ ﻣﺼﻐﺮ )‪ (12 bit PDP-8 Minicomputer‬ﰲ ﻋﺎم ‪ ،[3]1965‬ﺣﻴﺚ أﻃﻠﻖ ﻋﻠﻴﻪ‬
‫ﻣﺼﻄﻠﺢ اﻟـ‪ ،Embedded Computer‬وﺗﻼﻩ ﻇﻬﻮر أول ﻣﻌﺎﰿ ﻣﺼﻐﺮ )‪ (Intel.4004, 4-bit‬ﰲ ﻋﺎم ‪ ،1971‬إﻻ أن اﳌﻔﻬﻮم ﻛﺎن‬
‫ﺑﻌﻴﺪاً ﺟﺪاً ﻋﻦ اﳌﻀﻤﻮن اﻟﺬي ﳛﻤﻠﻪ اﳌﺼﻄﻠﺢ‪ ،‬ﺣﱴ ﻋﺎم ‪ 1977‬وﻇﻬﻮر أول ﻣﺘﺤﻜﻢ ﻣﺼﻐﺮ )‪ ،(Intel.8048‬وﻋﺎم ‪ 1979‬وﻇﻬﻮر أول‬
‫ﻣﻌﺎﰿ إﺷﺎرة رﻗﻤﻴﺔ )‪ ،(Bell Labs' DSP-1‬ﰒ ﻛﺎﻧﺖ اﻟﺜﻮرة اﻷوﱃ ﻟﻈﻬﻮر ﻣﺼﻔﻮﻓﺎت اﻟﺒﻮاﺑﺎت اﳊﻘﻠﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ )‪ (FPGAs‬ﰲ ﻋﺎم‬
‫‪ ،1984‬واﻟﱵ ﻫﻲ ﳏﻮرﻧﺎ اﻷﺳﺎﺳﻲ ﰲ ﻫﺬﻩ اﻟﺪراﺳﺔ‪ .‬ﰲ ﻋﺎم ‪ 1988‬ﻇﻬﺮ ﻣﺼﻄﻠﺢ ‪ ESs‬اﻟﻌﺪد اﻷول ﺠﻤﻟﻠﺔ " ‪Embedded Systems‬‬

‫‪.[4]"Programming‬‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪II‬‬
‫‪I‬‬ ‫اﶈﺘﻮى | ‪Index‬‬

‫ﺳﺎﺑﻘﺎً‪ ،‬ﻛﺎن اﺳﺘﺨﺪام اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ )‪ (ES's‬ﻣﻘﺘﺼﺮاً ﻋﻠﻰ اﻟﺘﻄﺒﻴﻘﺎت اﻟﻌﺴﻜﺮﻳﺔ وأﲝﺎث اﻟﻔﻀﺎء‪ ،‬واﻟﻴﻮم ﺗﺴﺘﺨﺪم ﻫﺬﻩ اﻷﻧﻈﻤﺔ ﰲ ﲨﻴﻊ‬
‫اﳌﻴﺎدﻳﻦ اﳍﻨﺪﺳﻴﺔ‪ ،‬ﻣﺜﻞ‪ :‬اﻷﺟﻬﺰة اﻟﻜﻬﺮﺑﺎﺋﻴﺔ واﻹﻟﻜﱰوﻧﻴﺔ اﳌﻨﺰﻟﻴﺔ‪ ،‬أﺟﻬﺰة اﻻﺗﺼﺎﻻت‪ ،‬اﻷﲤﺘﺔ اﻟﺼﻨﺎﻋﻴﺔ‪ ،‬ﺻﻨﺎﻋﺔ اﻟﺴﻴﺎرات‪ ،‬أﻧﻈﻤﺔ اﻟﺘﺤﻜﻢ‬
‫اﻟﺮﻗﻤﻲ‪ ،‬اﻟﺮوﺑﻮﺗﺎت‪ ،‬اﻟﺘﻄﺒﻴﻘﺎت اﻟﻌﺴﻜﺮﻳﺔ وأﲝﺎث اﻟﻔﻀﺎء‪ ،‬واﻟﻌﺪﻳﺪ ﳑﺎ ﻻ ﻳﻨﺘﻬﻲ ذﻛﺮﻩ ﻣﻦ اﻟﺘﻄﺒﻴﻘﺎت‪ ،‬إذ أ�ﺎ ﻏﺪت ﻧﻮا ًة ﻟـ‪ 99.99%‬ﻣﻦ‬
‫اﻟﺘﻄﺒﻴﻘﺎت واﻷﺟﻬﺰة اﻹﻟﻜﱰوﻧﻴﺔ‪ ،‬وﻫﺬا ﻣﺎ ﳚﻌﻠﻬﺎ ﳏﻮراً أﺳﺎﺳﻴﺎً ﻟﻠﺒﺤﺚ واﻟﺘﻄﻮﻳﺮ‪.‬‬

‫ﻣﺆﺧﺮاً‪ ،‬ﺗﻌﺘﱪ دراﺳﺔ ﺗﺼﻤﻴﻢ اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ )‪ (ES's‬ﻣﻦ أﻫﻢ اﳌﻘﺮرات اﻟﺪراﺳﻴﺔ ﰲ اﻟﻜﻠﻴﺎت اﳍﻨﺪﺳﻴﺔ ﻋﺎﳌﻴﺎً‪ ،‬ﺣﻴﺚ ﺗﻌﻄﻰ اﻻﻫﺘﻤﺎم اﻷﻛﱪ‬
‫ﰲ ﻣﺮاﺣﻞ ﻣﺒﻜﺮة‪ ،‬وﻳُﺆ ﱠﺳﺲ ﳍﺎ ﻣﻦ اﻟﺴﻨﺔ اﻟﺪراﺳﻴﺔ اﻷوﱃ‪ ،‬وذﻟﻚ ﻣﻦ ﺧﻼل ﻋﺪة ﻣﻘﺮرات ﺿﺮورﻳﺔ ‪ -‬ﺳﻨﺄﰐ ﻋﻠﻰ ذﻛﺮﻫﺎ ﰲ دراﺳﺘﻨﺎ ﻫﺬﻩ –‬
‫وﺗﻮﻇﻒ ﻣﻌﻈﻢ اﻷﲝﺎث اﳉﺎﻣﻌﻴﺔ ﰲ ﺗﻄﻮﻳﺮ اﻟﺼﻨﺎﻋﺔ وإﳚﺎد اﳊﻠﻮل اﻟﺘﻜﻨﻮﻟﻮﺟﻴﺔ‪.‬‬

‫إﺿﺎﻓﺔً إﱃ أن ﻋﻤﻠﻴﺔ رﺑﻂ اﳌﺆﺳﺴﺎت اﻟﺘﻌﻠﻴﻤﻴﺔ )اﳉﺎﻣﻌﺎت واﳌﻌﺎﻫﺪ( ﺑﺎﳌﺆﺳﺴﺎت واﻟﺸﺮﻛﺎت اﻟﺼﻨﺎﻋﻴﺔ ﺗﺸﻜﻞ دوراً ﻫﺎﻣﺎً ﰲ ﺗﻄﻮﻳﺮ اﻟﺘﻜﻨﻮﻟﻮﺟﻴﺎ‬
‫اﳌﺴﺘﻘﺒﻠﻴﺔ‪ ،‬ﻓﻬﻲ أﻳﻀﺎً ﺑﺎﻟﺪرﺟﺔ اﻷوﱃ ﺗﺴﺎﻫﻢ ﰲ ﺗﻌﺰﻳﺰ ِﺧﱪات اﻟﻄﻼب‪ ،‬وﺑﻨﺎء ﻣﻌﺮﻓﺔ ﻣﺘﺠﺪدة ﻣﻦ ﺧﻼل رﺑﻂ اﳌﻔﻬﻮم اﻟﺘﺠﺮﻳﺪي‬
‫)‪ (Conceptual Understanding‬ﻟﻠﻔﻜﺮة اﻟﻨﻈﺮﻳﺔ ﺑﺎﻟﺘﻄﺒﻴﻖ اﻟﻌﻤﻠﻲ اﻟﻮاﻗﻌﻲ‪.‬‬

‫إن ﻋﻤﻠﻴﺔ اﻟﺮﺑﻂ اﳌﺬﻛﻮرة ﺗﺘﻢ ﻣﻦ ﺧﻼل اﳌﺨﺘﱪات اﳉﺎﻣﻌﻴﺔ؛ ﻟﺬﻟﻚ ﺗﻌﺘﱪ اﳌﺨﺘﱪات اﳉﺎﻣﻌﻴﺔ أﻫﻢ ﻋﻨﺎﺻﺮ وأدوات اﻟﺒﺤﺚ واﻟﺘﻄﻮﻳﺮ‪ ،‬وﳜﺼﺺ‬
‫ﻮﱃ أﳘﻴﺔ ﺑﺎﻟﻐﺔ ﰲ اﻟﻌﻤﻠﻴﺔ اﻟﺘﻌﻠﻴﻤﻴﺔ‪ ،‬وﻣﺎ ذاك إﻻ ﻷ�ﺎ ﺗﺸﻜﻞ ﻋﻨﺼﺮاً أﺳﺎﺳﻴﺎً ﰲ إﺛﺮاء‬
‫ﳍﺎ اﳉﺎﻧﺐ اﻷﻛﱪ ﻣﻦ اﻹﻧﻔﺎق اﳌﺎدي واﳌﻌﻨﻮي‪ ،‬وﺗُ َ‬
‫اﳌﺎدة اﻟﻌﻠﻤﻴﺔ وﺗﻄﺒﻴﻘﻬﺎ ﺑﺸﻜﻞ ﻋﻤﻠﻲ‪ ،‬وﲤﻨﺢ اﻟﻄﺎﻟﺐ ﻣﻬﺎرة ﻋﻠﻤﻴﺔ ﻋﻤﻠﻴﺔ‪ ،‬وﺗﻮﻓﺮ ﻟﻪ ﺣﺎﻟﺔ ﻣﻦ اﻻﻧﺘﻤﺎء اﳊﻘﻴﻘﻲ إﱃ اﺧﺘﺼﺎﺻﻪ‪ ،‬وﺗﺴﺎﻋﺪﻩ ﰲ‬
‫اﻟﺘﻔﺎﻋﻞ ﻣﻊ اﳌﺎدة اﻟﻨﻈﺮﻳﺔ‪ ،‬ﺣﱴ إن ﺑﻌﺾ اﳉﺎﻣﻌﺎت اﻟﻌﻠﻤﻴﺔ واﳍﻨﺪﺳﻴﺔ ﺟﻌﻠﺖ اﻟﻨﺼﻴﺐ اﻷﻛﱪ ﻣﻦ اﻟﺴﺎﻋﺎت اﻟﺘﺪرﻳﺴﻴﺔ ﳐﺼﺼﺎً ﻟﺴﺎﻋﺎت‬
‫اﻟﻌﻤﻞ اﳌﺨﱪي‪ ،‬وﻻ ﻋﺠﺐ إذ اﳌﺨﺘﱪ ﺑﺎب إﱃ اﻹﺑﺪاع ﰲ اﻟﺒﺤﺚ اﻟﻌﻠﻤﻲ‪ ،‬وﻣﻴﺪان ﻳﻘﺮب اﻟﻄﺎﻟﺐ إﱃ اﳊﻴﺎة اﻟﻮاﻗﻌﻴﺔ اﻟﱵ ﺳﻴﻜﻮن ﻋﻨﺼﺮاً‬
‫ﻓﺎﻋﻼً ﻓﻴﻬﺎ ﺑﻌﺪ اﻟﺘﺨﺮج‪.‬‬

‫ﻳﺆﻛﺪ ‪ David Kolb‬ﺻﺎﺣﺐ اﻟﻨﻈﺮﻳﺔ اﻟﺒﻨﺎﺋﻴﺔ )‪ (Constructivism‬ﻋﻠﻰ أن ﻋﻤﻠﻴﺔ ﺑﻨﺎء اﳌﻌﺮﻓﺔ اﳌﺘﺠﺪدة ﺗﺘﻢ ﻣﻦ ﺧﻼل إﻋﻄﺎء اﻟﻄﺎﻟﺐ‬
‫دوراً أﺳﺎﺳﻴﺎً ﰲ اﻟﻌﻤﻠﻴﺔ اﻟﺘﻌﻠﻴﻤﻴﺔ‪ ،‬وﺟﻌﻠﻪ ﳏﻮراً ﻣﺮﻛﺰﻳﺎً ﳍﺎ )‪ ،(Student-based Learning‬ﻋﻮﺿﺎً ﻋﻦ ﻛﻮﻧﻪ ٍ‬
‫ﻣﺘﻠﻖ ﻟﻠﻤﻌﺮﻓﺔ ﻣﻦ اﶈﺎﺿﺮ‬
‫ﺮﺳ ٍﻞ ﻳﺼﺐ‬ ‫)‪ ،(Teacher-based Learning‬وذﻟﻚ ﻣﻦ ﺧﻼل اﺳﱰاﺗﻴﺠﻴﺎت اﻟﺘﻌﻠﻴﻢ اﳊﺪﻳﺚ‪ ،‬اﻟﱵ أﻋﺎدت ﺻﻴﺎﻏﺔ دور اﳌﻌﻠﻢ ﻣﻦ ﻣ ِ‬
‫ُ‬
‫ﻣﻌﺮﻓﺘﻪ ﰲ أذﻫﺎن ﻃﻼﺑﻪ‪ ،‬إﱃ ﻣﻮﺟﻪ ﻟﻠﻌﻤﻠﻴﺔ اﻟﺘﻌﻠﻴﻤﻴﺔ‪ ،‬ﻳﺴﺘﻌﻤﻞ ذاﺗﻪ وﺧﱪﺗﻪ ﺑﻜﻔﺎءة وﻓﺎﻋﻠﻴﺔ ﻣﻦ أﺟﻞ ﺗﻮﺟﻴﻪ ﻃﻼﺑﻪ ﰲ ﺑﻨﺎء ﻣﻌﺮﻓﺘﻬﻢ‪ .‬ﻓﻬﻮ‬
‫ﻳﺴﻬﻞ اﻟﻌﻤﻠﻴﺔ اﻟﺘﻌﻠﻴﻤﻴﺔ وﻻ ِ‬
‫ﳛﺪﺛُﻬﺎ‪ ،‬ﻳﺪﻳﺮ اﳌﻮﻗﻒ اﻟﺘﻌﻠﻴﻤﻲ دون أن ﻳﻨﺸﺌﻪ‪ ،‬ﻳﻮﺟﻪ وﻳﺮﺷﺪ ﻟﻠﻤﻌﺮﻓﺔ دون أن ﻳﻠ ﱢﻘﻨﻬﺎ أو ﳛ ﱢﻔﻈﻬﺎ اﻷذﻫﺎ َن‪ .‬ﻫﺬا ﻣﺎ‬
‫ﺗﺆﻛﺪ ﻋﻠﻴﻪ أﻳﻀﺎً اﻟﻨﻈﺮﻳﺎت اﻟﺘﻌﻠﻴﻤﻴﺔ ﰲ ﻋﻠﻢ اﻟﻨﻔﺲ اﻟﱰﺑﻮي )‪ (Educational Psychology‬وﻋﻠﻢ أﺻﻮل اﻟﺘﺪرﻳﺲ )‪.(Pedagogy‬‬

‫ﻣﺠﺎل اﻫﺘﻤﺎم اﻟﺒﺤﺚ )‪:(The Research Field‬‬

‫ﻳﻬﺘﻢ اﻟﺒﺤﺚ ﲟﻮﺿﻮﻋﺎت ﺗﺼﻤﻴﻢ اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ )‪ (Embedded Systems‬وﻓﺮوﻋﻬﺎ‪ ،‬وﻳﺘﺨﺼﺺ ﰲ ﺗﺼﻤﻴﻢ اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ ﺑﺎﺳﺘﺨﺪام‬
‫اﳌﺼﻔﻮﻓﺎت اﳊﻘﻠﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ )‪ ،(Embedded Systems FPGAs‬وﻳﻘﺪم أﳘﻴﺔ ﻟﻐﺎت اﻟﱪﳎﺔ اﳌﺮﺋﻴﺔ )‪ (Virtualization‬واﻟﺮﺳﻮﻣﻴﺔ‬
‫)‪ (Graphical‬ﻛﺤﻞ ﺑﺪﻳﻞ ﻟﺘﻌﻘﻴﺪات ﻟﻐﺎت اﻟﻜﻴﺎن اﻟﺼﻠﺐ )‪ ،(HDLs‬وذﻟﻚ ﻣﻦ ﺧﻼل دراﺳﺔ ﻣﻘﺎرﻧﺔ‪ ،‬ﰒ ﻳﻨﺘﻘﻞ ﻣﻦ اﳌﻮﺿﻮﻋﺎت اﻟﻌﻠﻤﻴﺔ‬
‫إﱃ اﳌﻮﺿﻮﻋﺎت اﻟﱰﺑﻮﻳﺔ‪ ،‬ﻓﻴﺒﺤﺚ ﰲ ﻋﻠﻢ أﺻﻮل اﻟﺘﺪرﻳﺲ )‪ ،(Pedagogy‬اﻟﺬي ﻫﻮ ﻓﺮع ﻣﻦ ﻓﺮوع ﻋﻠﻢ اﻟﻨﻔﺲ اﻟﱰﺑﻮي ) ‪Educational‬‬

‫‪III‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫ﻗﺎﺋﻤﺔ اﶈﺘﻮﻳﺎت | ‪Table of Contents‬‬

‫‪ ،(Psychology‬ﰒ ﻳﺴﺘﻌﺮض أﳘﻴﺔ اﺳﱰاﺗﻴﺠﻴﺎت اﻟﺘﻌﻠﻴﻢ اﳊﺪﻳﺚ‪ ،‬وﻳﺘﻔﺮع ﻟﻴﻨﺎﻗﺶ ﻧﻈﺮﻳﺔ اﻟﺘﻌﻠﻢ اﻟﺒﻨﺎﺋﻲ )‪،(Constructivist Learning‬‬
‫وﻣﺮﻛﺰﻳﺔ اﻟﻄﺎﻟﺐ )‪ (Student-centric Approach‬ﻛﺄﺳﺎس ﰲ ﺑﻨﺎء ﻣﻌﺮﻓﺘﻪ ﰲ اﻟﻌﻤﻠﻴﺔ اﻟﺘﻌﻠﻴﻤﻴﺔ‪ ،‬وﻳﺮﻛﺰ ﻋﻠﻰ دور اﻟﺘﻌﻠﱡﻢ اﻟﺘﺠﺮﻳﱯ‬
‫)‪ (Experiential Learning‬ﻛﺒﺪﻳﻞ ﻟﻠﺘﻌﻠﻢ اﻟﺘﺠﺮﻳﺪي )‪ (Conceptual Learning‬ﰲ اﻟﺘﻌﻠﻴﻢ اﳌﺨﱪي ) ‪Laboratory‬‬

‫ﺼﻞ ﰲ اﺳﱰاﺗﻴﺠﻴﺔ اﻟﺘﻌﻠﻢ ﺑﺎﻻﻋﺘﻤﺎد ﻋﻠﻰ اﳌﺸﺎرﻳﻊ )‪ ،(PjBL: Project-based Learning‬واﻟﺘﻌﻠﻢ ﻋﻦ ﻃﺮﻳﻖ ﺣﻞ‬
‫‪ ،(Education‬وﻳﻔ ﱢ‬
‫اﳌﺸﻜﻼت )‪ ،(PrBL: Problem-based Learning‬واﻟﺘﻌﻠﻢ اﻟﺘﻌﺎوﱐ‪.‬‬

‫ﻳﻘﱰح اﻟﺒﺤﺚ ﻣﻨﻬﺠﻴﺔ ﺑﻨﺎﺋﻴﺔ – ﺗﺴﺘﻨﺪ إﱃ اﳌﻮﺿﻮﻋﺎت اﻟﱰﺑﻮﻳﺔ اﳌﺬﻛﻮرة – ﻛﺄﺳﺎس ﰲ ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﳐﱪي ﰲ ﳎﺎل ﺗﺼﻤﻴﻢ اﻷﻧﻈﻤﺔ‬
‫اﳌﺪﳎﺔ‪ ،‬وﻳﻘﺪم اﻟﻨﺘﺎﺋﺞ اﻟﺘﺤﻠﻴﻠﻴﺔ ﻟﺪراﺳﺔ ﻣﻘﺎرﻧﺔ ﺗﻄﺒﻴﻘﻴﺔ ﻟﻠﻤﻨﻬﺠﻴﺔ اﳌﻘﱰﺣﺔ‪ ،‬ﰒ ﻳﺘﺒﲎ ﻫﺬﻩ اﳌﻨﻬﺠﻴﺔ ﻛﺄﺳﺎس ﰲ ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﳐﱪي‬
‫ﺗﻔﺎﻋﻠﻲ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ اﳌﺼﻔﻮﻓﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام اﻟﻠﻐﺔ اﳌﺮﺋﻴﺔ ‪ – LabVIEW‬اﻟﺬي ﺗﺸﲑ‬
‫اﻷﲝﺎث إﱃ أﻧﻪ ﻣﻨﻄﻠﻖ ﻟﻠﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‪.‬‬

‫أﻫﻤﻴﺔ اﻟﺒﺤﺚ وأﻫﺪاﻓﻪ )‪:(The Research Importance and Purpose‬‬

‫إن ﻣﻦ أﻛﱪ اﻟﺘﺤﺪﻳﺎت اﻟﱵ ﺗﻮاﺟﻪ اﳌﺆﺳﺴﺎت اﻟﺘﻌﻠﻴﻤﻴﺔ اﻟﻌﺮﺑﻴﺔ ﰲ اﻟﻌﺼﺮ اﻟﺮاﻫﻦ‪ ،‬ﻫﻮ ﲢﺪي اﻟﻨﻬﻮض ﺑﺎﻟﺘﻌﻠﻴﻢ إﱃ ﻣﺴﺘﻮى ﻳﻀﻤﻦ ﻓﻴﻪ ﻣﻼﺋﻤﺔ‬
‫ﻣﺴﺘﻮى ﺧﺮﳚﻲ اﻟﺘﻌﻠﻴﻢ اﻟﻌﺎﱄ‪ ،‬ﰲ ﻴﻖ ﺣﺎﺟﺎت اﺠﻤﻟﺘﻤﻊ ﳌﺘﻄﻠﺒﺎت اﻟﺘﻄﻮر اﻻﻗﺘﺼﺎدي واﻟﺘﻜﻨﻮﻟﻮﺟﻲ‪.‬‬

‫إن ﻋﻤﻠﻴﺔ ﺗﺄﺳﻴﺲ ﺟﻴﻞ ﻣﺘﺠﺪد اﳌﻌﺮﻓﺔ واﻹﻣﻜﺎﻧﺎت واﳌﻮاﻫﺐ ﻣﻦ اﻟﻜﻮادر اﳍﻨﺪﺳﻴﺔ اﳌﺆﻫﻠﺔ ﳊﻤﻞ أﻋﺒﺎء ﻣﺘﻄﻠﺒﺎت اﻟﺜﻮرة اﻟﺘﻜﻨﻮﻟﻮﺟﻴﺔ‪،‬‬
‫واﻻرﺗﻘﺎء ﲜﻮدة اﻟﺘﻌﻠﻴﻢ إﱃ اﳌﺴﺘﻮى اﳌﻄﻠﻮب‪ ،‬ﻫﻮ ﻣﻦ أﻫﻢ اﻷﻫﺪاف اﻟﱵ ﻳﺘﻮﺟﺐ ﻋﻠﻴﻨﺎ أن ﳓﻤﻠﻬﺎ وﻧﻜﺮس اﻷﲝﺎث اﳌﺴﺘﻘﺒﻠﻴﺔ ﳍﺎ‪ .‬ﻛﻴﻒ‬
‫ﻻ؟! واﻟﻔﺠﻮة اﳌﻌﺮﻓﻴﺔ ﰲ دول اﻟﻌﺎﱂ اﻟﺜﺎﻟﺚ ﺗﺰداد ﺑﺎزدﻳﺎد اﳌﻨﺠﺰات اﻟﻌﻠﻤﻴﺔ واﻟﺘﻜﻨﻮﻟﻮﺟﻴﺔ ﰲ اﻟﻐﺮب‪ .‬ﻛﻴﻒ ﻻ؟! وﻧﺎﻗﻮس اﳋﻄﺮ ﻗﺮع ﺑﺎﻷﻣﺲ‬
‫ﻣﻌﻠﻨﺎً ﻋﻦ ﺧﺮوج اﳉﺎﻣﻌﺎت اﻟﻌﺮﺑﻴﺔ ﺗﺼﻨﻴﻔﺎً ﻣﻦ ﺑﲔ أﻓﻀﻞ ‪ 500‬ﺟﺎﻣﻌﺔ ﰲ اﻟﻌﺎﱂ‪ .‬ﻓﺄي ﺷﻲء ﺑﻌﺪ ذﻟﻚ أﻫﻢ ﻟﻨﺒﺤﺚ ﰲ ﻣﻮﺿﻮﻋﺎﺗﻪ!؟ وأي‬
‫ﲝﺚ ﻛﺎﺋﻦ ﳝﻜﻦ أن ﺗﻘﻮم ﻟﻪ ﻗﻴﺎﻣﺔ أو ﻳﻜﻮن ﻟﻪ ﻫﺪف إذا ﱂ ﻳﻜﻦ ﻣﺮﺗﺒﻄﺎً ﲟﺘﻄﻠﺒﺎت اﻟﺘﻄﻮر اﻟﺪاﺧﻠﻲ!؟‬

‫وﻫﻜﺬا‪ ،‬ﻓﺈﻧﻪ ﳑﺎ ﻻ ﻳﺸﻚ ﻓﻴﻪ اﺛﻨﺎن‪ ،‬أن ﺟﺎﻣﻌﺎﺗﻨﺎ وﳐﺘﱪاﺗﻨﺎ اﻟﻌﻠﻤﻴﺔ ﺗﻔﺘﻘﺮ إﱃ اﳌﻨﺎﻫﺞ اﻟﺘﺪرﻳﺴﻴﺔ ‪ -‬اﻟﻨﻈﺮﻳﺔ ﻣﻨﻬﺎ واﻟﻌﻤﻠﻴﺔ ‪ -‬اﳌﻮاﻛﺒﺔ ﳍﺬﻩ‬
‫اﻷﻧﻈﻤﺔ اﳌﺘﻄﻮرة‪ ،‬واﻟﱵ ﺗﺸﻜﻞ اﻟﻨﻮاة اﻷﺳﺎﺳﻴﺔ ﻟـ‪ 99.9%‬ﻣﻦ اﻟﺘﻜﻨﻮﻟﻮﺟﻴﺎ اﻟﺮﻗﻤﻴﺔ اﳊﺪﻳﺜﺔ ﰲ اﻟﻮﻗﺖ اﳊﺎﱄ‪ ،‬وﻫﺬا اﻻﻓﺘﻘﺎر ﲜﻮﻫﺮﻩ ﻳﺸﻜﻞ‬
‫اﳊﺎﻓﺰ اﻷﺳﺎﺳﻲ ﳍﺬا اﻟﺒﺤﺚ‪ ،‬وذﻟﻚ ﻣﻦ ﺧﻼل اﻟﻨﻘﺎط اﻟﺘﺎﻟﻴﺔ‪:‬‬

‫‪ -‬ﺑﻨﺎء ﻣﻨﻬﺞ ﺗﻌﻠﻴﻤﻲ ﳐﱪي ﻣﺘﻜﺎﻣﻞ‪ ،‬ﻳﺴﺘﻨﺪ إﱃ ﻧﻈﺮﻳﺎت اﻟﺘﻌﻠﻴﻢ اﳊﺪﻳﺚ ﰲ ﻃﺮﻳﻘﺔ إﺧﺮاﺟﻪ وﺗﻘﺪﳝﻪ‪ ،‬ﻳﻬﺪف إﱃ ﺟﻌﻞ دراﺳﺔ وﺑﺮﳎﺔ ﻫﺬﻩ‬
‫اﻟﻨﻈﻢ اﳌﺘﻘﺪﻣﺔ ﰲ ﻣﺘﻨﺎول ﲨﻴﻊ اﻟﻄﻼب ﰲ اﻻﺧﺘﺼﺎﺻﺎت اﳍﻨﺪﺳﻴﺔ‪ ،‬ﲝﻴﺚ ﳝ ّﻜﻨﻬﻢ ﻣﻦ اﻟﺘﻌﺮف إﱃ ﻫﺬﻩ اﻟﻨﻈﻢ وﺑﺮﳎﺘﻬﺎ واﺳﺘﺜﻤﺎرﻫﺎ ﰲ‬
‫دﻋﻢ ﻣﺘﻄﻠﺒﺎت اﻟﺼﻨﺎﻋﺔ اﶈﻠﻴﺔ‪.‬‬
‫‪ -‬اﻟﺘﻐﻠﺐ ﻋﻠﻰ اﻟﺘﻌﻘﻴﺪات اﻟﱪﳎﻴﺔ ﳍﺬﻩ اﻟﻨﻈﻢ ﻋﻨﺪ اﺳﺘﺨﺪام ﻟﻐﺎت وﺻﻒ اﻟﻜﻴﺎن اﻟﺼﻠﺐ‪ ،‬وذﻟﻚ ﻣﻦ ﺧﻼل ارﺗﺒﺎط اﳌﻨﻬﺞ ﺑﻠﻐﺎت ﺑﺮﳎﻴﺔ‬
‫ﻣﺮﺋﻴﺔ ‪ -‬ﻋﻮﺿﺎً ﻋﻦ اﻟﻠﻐﺎت اﻟﻨﺼﻴﺔ ‪ -‬ﺗﻮﻓﺮ ﺳﻬﻮﻟﺔ وﺳﺮﻋﺔ ﰲ ﺗﻌﻠﻢ ﺑﻨﺎء وﺗﻄﻮﻳﺮ ﻫﺬﻩ اﻷﻧﻈﻤﺔ‪.‬‬

‫‪ -‬وﺿﻊ دراﺳﺔ ّ‬
‫ﻣﻮﺛﻘﺔ ﻟﻸﲝﺎث اﻟﻘﺎدﻣﺔ ﻋﻦ اﺳﺘﺜﻤﺎر اﺳﱰاﺗﻴﺠﻴﺎت ﻟﺘﻌﻠﻴﻢ اﳊﺪﻳﺚ وﺗﻄﺒﻴﻘﺎﻬﺗﺎ ﰲ اﻟﺘﻌﻠﻴﻢ اﳌﺨﱪي‪.‬‬
‫‪ -‬اﻟﺘﻄﻠﻊ إﱃ �ﻀﺔ ﻋﻠﻤﻴﺔ ﻣﻌﺮﻓﻴﺔ ﺗﻌﻴﺪﻧﺎ إﱃ ﺣﻴﺚ ﳚﺐ أن ﻧﻜﻮن‪.‬‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪IV‬‬
‫‪I‬‬ ‫اﶈﺘﻮى | ‪Index‬‬

‫ﻣﺮاﺣﻞ اﻟﺪراﺳﺔ واﻟﻌﻤﻞ ﻋﻠﻰ اﻟﺒﺤﺚ )‪:(The Research Timeline‬‬

‫أﺣﺪ ﻋﺸﺮ ﻛﻮﻛﺒﺎً‪ ،‬دورة ﻓﻠﻜﻬﺎ ﺳﻨﺘﺎن‪ ،‬ﲨﻌﺖ ﻣﺮاﺣﻞ اﻟﻌﻤﻞ ﻋﻠﻰ ﻫﺬا اﻟﺒﺤﺚ‪.‬‬

‫‪ ‬اﳌﺮﺣﻠﺔ اﻷوﱃ‪ :‬اﻧﻄﻠﻘﺖ ﺑﺒﺤﺚ ﻣﻜﺘﱯ ﳎﻤﻞ ﻋﻦ اﳌﻨﺎﻫﺞ واﳌﺨﺘﱪات واﻷدوات واﻟﻮﺳﺎﺋﻞ اﻟﺘﻌﻠﻴﻤﻴﺔ ﻟﻸﻧﻈﻤﺔ اﳌﺪﳎﺔ اﻟﱵ ﺗﺴﺘﺨﺪم‬
‫اﳌﺼﻔﻮﻓﺎت اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً )‪ ،(FPGAs‬واﳌﻌﺘﻤﺪة ﻟﺪى اﳌﺆﺳﺴﺎت اﻟﺘﻌﻠﻴﻤ ﰲ ﻫﺬا اﺠﻤﻟﺎل‪.‬‬

‫‪ ‬اﳌﺮﺣﻠﺔ اﻟﺜﺎﻧﻴﺔ‪ :‬ﰎ ﻓﻴﻬﺎ اﻟﺒﺤﺚ ﻋﻦ اﻟﺸﺮﻛﺎت اﳌﺨﺘﺼﺔ ﺑﺘﺼﻨﻴﻊ اﳌﺼﻔﻮﻓﺎت اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً‪ ،‬ودراﺳﺔ ﺣﺠﻢ ﻧﺸﺎﻃﻬﺎ‪ ،‬ودورﻫﺎ ﰲ‬
‫ﻟﺴﻮق‪ ،‬واﻷدوات اﻟﱪﳎﻴﺔ اﻟﱵ ﺗﻮﻓﺮﻫﺎ‪ ،‬وﻣﻘﺪار اﻟﺪﻋﻢ اﻟﻔﲏ‪ ،‬وذﻟﻚ ﻬﺑﺪف اﺧﺘﻴﺎر اﻟﺸﺮﻛﺔ اﻟﱵ ﲤﻠﻚ اﳌﻘﻮﻣﺎت اﻷﻛﱪ‪ .‬وﻣﻦ ﻫﺬﻩ‬
‫اﻟﺪراﺳﺔ‪ ،‬أﺟﺮي ﲝﺚ ﻋﻦ ﻟﻮﺣﺎت اﻟﺘﻄﻮﻳﺮ ﻟﺪى اﻟﺸﺮﻛﺔ اﻟﱵ وﻗﻊ ﻻﺧﺘﻴﺎر ﻋﻠﻴﻬﺎ‪ ،‬وذﻟﻚ ﻬﺑﺪف ﲢﺪﻳﺪ ﻟﻮﺣﺔ اﻟﺘﻄﻮﻳﺮ اﻷﻧﺴﺐ ﻟﻠﺪراﺳﺔ‪،‬‬
‫وإﺟﺮاء ﻋﻤﻠﻴﺔ اﻟﺸﺮاء‪.‬‬

‫ﻣﺪﻋﻤﺔ ﺑﺎﻷﻣﺜﻠﺔ اﻟﺘﻄﺒﻴﻘﻴﺔ‪ ،‬ﺑﲔ أﺳﺎﻟﻴﺐ ﺑﺮﳎﺔ اﻷﻧﻈﻤﺔ اﻟﱵ ﺗﺴﺘﺨﺪم ﻣﺼﻔﻮﻓﺎت‬
‫‪ ‬اﳌﺮﺣﻠﺔ اﻟﺜﺎﻟﺜﺔ‪ :‬ﰎ ﻓﻴﻬﺎ إﺟﺮاء ﻣﻘﺎرﻧﺔ ﻣﻮﺿﻮﻋﻴﺔ‪ّ ،‬‬
‫اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً‪ ،‬وذﻟﻚ ﺑﺪف ﲢﺪﻳﺪ ﺻﻌﻮﺑﺎت اﻟﺘﻌﺎﻣﻞ ﻣﻊ ﻫﺬﻩ اﻷﺳﺎﻟﻴﺐ وﲢﺪﻳﺪ اﳍﺪف ﻣﻦ اﺳﺘﺨﺪام ﻟﻐﺎت‬
‫اﳉﻴﻞ اﻟﻘﺎدم اﳌﺮﺋﻴﺔ‪ ،‬وﺗﺄﻣﲔ اﻷدوات واﳌﺮاﺟﻊ اﻟﻼزﻣﺔ ﻟﻠﺨﻮض ﻓﻴﻬﺎ‪.‬‬

‫‪ ‬اﳌﺮﺣﻠﺔ اﻟﺮاﺑﻌﺔ‪ :‬ﴰﻠﺖ دراﺳﺔ ﺷﺎﻣﻠﺔ ﻟﻠﺒﻴﺌﺔ اﻟﱪﳎﻴﺔ ‪ ،LabVIEW‬وأﻳﻀﺎً ﺻﺤﺐ دراﺳﺔ اﻟﺒﻴﺌﺔ اﻟﱪﳎﻴﺔ اﺳﺘﻄﻼع ﻋﺎم ﻋﻦ اﻷﲝﺎث‬
‫اﳌﻨﺸﻮرة ﰲ اﻟﺘﻌﻠﻴﻢ اﳌﺨﱪي‪ ،‬وأﺳﺲ ﺗﺼﻤﻴﻢ اﻟﺘﺠﺎرب اﳌﺨﱪﻳﺔ‪ .‬ﻫﺬا اﻻﺳﺘﻄﻼع اﻷﺧﲑ ﻓﺘﺢ أﻓﻘﺎً واﺳﻌﺎً – ﱂ ﻳﻜﻦ – أﻣﺎم ﻣﻮﺿﻮﻋﺎت‬
‫اﻟﺘﻌﻠﻴﻢ اﳊﺪﻳﺚ وﻧﻈﺮﻳﺎﺗﻪ واﺳﱰاﺗﻴﺠﻴﺎﺗﻪ وﻧﺘﺎﺋﺠﻪ‪ ،‬واﻟﺬي ﺑﺪورﻩ اﺳﺘﻠﺰم ﲝﺜﺎً ﻣﻌﻤﻘﺎً ﰲ ﺗﻔﺼﻴﻼﺗﻪ‪ ،‬ﺣﻴﺚ أن دراﺳﺔ اﻟﺘﻔﺼﻴﻼت اﻷﺳﺎﺳﻴﺔ‬
‫اﺳﺘﻠﺰﻣﺖ إﻋﺎدة ﺟﺪوﻟﺔ اﳌﺨﻄﻂ اﻟﺰﻣﲏ ﺑﺈدراج ﻣﺮاﺣﻞ ﺟﺪﻳﺪة ﰲ اﻟﺒﺤﺚ‪ ،‬ﻫﻲ اﳌﺮﺣﻠﺔ اﳋﺎﻣﺴﺔ واﻟﺴﺎدﺳﺔ واﻟﺴﺎﺑﻌﺔ‪.‬‬

‫‪ ‬اﳌﺮﺣﻠﺔ اﳋﺎﻣﺴﺔ‪ :‬أﺿﻴﻔﺖ ﳌﺎ اﺳﺘﻠﺰﻣﻪ اﻟﺒﺤﺚ ﰲ اﳌﺮﺣﻠﺔ اﻟﺮاﺑﻌﺔ‪ ،‬وﺗﻄﺮﻗﺖ إﱃ‪ :‬أﲝﺎث ﰲ ﻋﻠﻢ اﻟﻨﻔﺲ اﻟﱰﺑﻮي‪ ،‬وﻋﻠﻢ أﺻﻮل اﻟﺘﻌﻠﻴﻢ‪،‬‬
‫وﻧﻈﺮﻳﺎت اﻟﺘﻌﻠﻴﻢ اﻟﺴﻠﻮﻛﻲ‪ ،‬واﻟﺒﻨﺎﺋﻲ‪ ،‬واﻟﺘﻌﻠﻴﻢ اﳍﻨﺪﺳﻲ اﻟﺘﺠﺮﻳﱯ‪ ،‬واﻟﻨﻈﺮﻳﺔ اﻟﺒﻨﺎﺋﻴﺔ وﻓﺮوﻋﻬﺎ‪ .‬ﺑﻌﺪ اﻻﺳﺘﻐﺮاق ﰲ ﺗﻔﺼﻴﻼت ﻫﺬﻩ اﳌﺮﺣﻠﺔ‪،‬‬
‫ﻇﻬﺮ ﺟﻠﻴﺎً ﺿﺮورة إﻋﺎدة اﻟﻨﻈﺮ ﰲ ﻫﻴﻜﻠﻴﺔ ﺑﻨﺎء اﻟﺘﺠﺎرب‪.‬‬

‫‪ ‬اﳌﺮﺣﻠﺔ اﻟﺴﺎدﺳﺔ‪ :‬ﺧﻼل ﻫﺬﻩ اﳌﺮﺣﻠﺔ ﰎ إﻋﺪاد دﻟﻴﻞ اﻟﺘﺠﺎرب اﻟﻌﻤﻠﻴﺔ ﻟﻠﻮﺣﺔ ﺗﻄﻮﻳﺮ ﳐﱪﻳﻪ ﳐﺼﺼﺔ ﻷﻏﺮاض ﺑﺮﳎﺔ اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ اﻟﱵ‬
‫ﺗﻌﺘﻤﺪ ﻋﻠﻰ اﳌﺘﺤﻜﻤﺎت اﳌﺼﻐﺮة – ﻛﺎﻧﺖ ﻧﻔﺬت ﻣﺸﺮوﻋﺎً ﻟﻠﺴﻨﺔ اﻷوﱃ ﻣﺎﺟﺴﺘﲑ‪ .‬اﺳﺘﻨﺪ دﻟﻴﻞ اﻟﺘﺠﺎرب إﱃ اﺳﱰاﺗﻴﺠﻴﺎت اﻟﺘﻌﻠﻴﻢ‬
‫اﳊﺪﻳﺚ واﻟﱵ ﴰﻠﺖ‪ :‬ﻣﺮﻛﺰﻳﺔ اﻟﻄﺎﻟﺐ ﰲ اﻟﺘﻌﻠﻢ )‪ (Student-centric‬واﳌﻨﻬﺠﻴﺎت اﻟﺘﻔﺎﻋﻠﻴﺔ ﺑﲔ اﳌﺴﺘﺨﺪم واﳊﺎﺳﺐ ) ‪HCI:‬‬

‫‪ (Human-Computer Interaction‬ﺑﺎﺳﺘﺨﺪام ﺑﺮﻧﺎﻣﺞ اﶈﺎﻛﺎة ‪ ،PROTEUS‬إﺿﺎﻓﺔً إﱃ ﻣﻨﻬﺠﻴﺔ اﻟﺘﻌﻠﻢ اﻟﺬاﰐ )‪Self-‬‬

‫‪.(learner‬‬
‫ﺑﻨﻔﺲ اﻟﻮﻗﺖ اﻟﺬي ﰎ ﻓﻴﻪ إﻋﺪاد دﻟﻴﻞ اﻟﺘﺠﺎرب‪ ،‬ﻛﺎﻧﺖ اﻟﺘﺠﺎرب ﺗﺪرس ﳐﱪﻳﺎً – ﻟﻄﻼب اﻟﺴﻨﺔ اﻟﺮاﺑﻌﺔ – ﻗﺴﻢ اﻟﺘﺤﻜﻢ واﻷﲤﺘﺔ –‬
‫وﲡﻤﻊ اﻟﻨﺘﺎﺋﺞ وﲢﻠﻞ إﺣﺼﺎﺋﻴﺎً‪ .‬اﻟﻔﺼﻞ اﳋﺎﻣﺲ ﻦ اﻷﻃﺮوﺣﺔ ﻳﺄﰐ ﻬﺑﺬﻩ اﻟﺪراﺳﺔ ﻣﻔﺼﻠﺔً‪.‬‬

‫‪V‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫ﻗﺎﺋﻤﺔ اﶈﺘﻮﻳﺎت | ‪Table of Contents‬‬

‫‪ ‬اﳌﺮﺣﻠﺔ اﻟﺴﺎﺑﻌﺔ‪ :‬اﺳﺘﻐﺮﻗﺖ ﰲ ﻛﺘﺎﺑﺔ أوراق ﲝﺜﻴﺔ ﺿﻤﺖ ﻧﺘﺎﺋﺞ اﻟﺪراﺳﺔ اﳌﻨﻔﺬة ﰲ اﳌﺮﺣﻠﺔ اﻟﺴﺎدﺳﺔ – ﰎ ﻧﺸﺮﻫﺎ ﻻﺣﻘﺎً ﰲ ﻣﺆﲤﺮ اﳉﻤﻌﻴﺔ‬
‫اﻷﻣﺮﻳﻜﻴﺔ اﻟﺪوﱄ ﻟﻠﺘﻌﻠﻴﻢ اﳍﻨﺪﺳﻲ )‪ (ASEE‬ﰲ ﻫﻨﻐﺎرﻳﺎ ﻟﻌﺎم ‪ .2009‬وﻣﺆﲤﺮ اﳉﻤﻌﻴﺔ اﻷﻣﺮﻳﻜﻴﺔ اﻟﺪوﱄ ﻟﻠﺘﻌﻠﻴﻢ اﳍﻨﺪﺳﻲ )‪ (ASEE‬ﰲ‬
‫اﺳﱰاﻟﻴﺎ ﻟﻌﺎم ‪ ،2010‬إﺿﺎﻓﺔً إﱃ ﳎﻠﺔ ﲝﻮث ﺟﺎﻣﻌﺔ ﺣﻠﺐ ‪.2009-2010‬‬

‫‪ ‬اﳌﺮﺣﻠﺔ اﻟﺜﺎﻣﻨﺔ‪ :‬ﰎ ﻓﻴﻬﺎ ﺗﺼﻤﻴﻢ ﳕﻮذج ﺗﻌﻠﻤﻲ ﻫﻨﺪﺳﻲ ﳐﱪي ﻳﺴﺘﻨﺪ إﱃ أﺳﺲ ﻫﻨﺪﺳﺔ اﻟﺘﺤﻜﻢ واﻟﻨﻈﺮﻳﺔ اﻟﺒﻨﺎﺋﻴﺔ ﰲ اﻟﺘﻌﻠﻢ اﻟﺘﺠﺮﻳﱯ‪،‬‬
‫وارﺗﻜﺰ ﻋﻠﻰ ﻧﺘﺎﺋﺞ اﻟﺒﺤﺚ ﰲ اﳌﺮﺣﻠﺔ اﻟﺴﺎدﺳﺔ واﻟﺴﺎﺑﻌﺔ؛ اﻟﻔﺼﻞ اﳋﺎﻣﺲ ﻳﻔﺼﻞ ﰲ ﻫﺬا اﻟﻨﻤﻮذج‪.‬‬

‫‪ ‬اﳌﺮﺣﻠﺔ اﻟﺘﺎﺳﻌﺔ‪ :‬ﺗﻀﻤﻨﺖ ﺑﻨﺎء ﲡﺎرب ﻋﻤﻠﻴﺔ ﻋﻠﻰ ﻟﻮﺣﺔ اﻟﺘﻄﻮﻳﺮ ‪ Spartan-3E‬ﺑﺎﺳﺘﺨﺪام ﺑﻴﺌﺔ اﻟﺘﻄﻮﻳﺮ اﳌﺮﺋﻴﺔ ‪LabVIEW-‬‬

‫‪ ،FPGA‬ﺣﻴﺚ ﰎ اﻟﺒﻨﺎء اﻟﱪﳎﻲ ﻷﻛﺜﺮ ﻣﻦ ‪ 30‬ﺗﻄﺒﻴﻖ ﳐﺘﻠﻒ )‪1-Wire ،SPI-Flash ،PS2 ،VGA ،RS232 ،LCD ،I/O‬‬

‫‪.(....،ADC ،DAC ،Differential I/O ،SHA-1 EEPROM‬‬

‫ﻛﺬﻟﻚ ﺗﻀﻤﻨﺖ ﻫﺬﻩ اﳌﺮﺣﻠﺔ ﺗﺼﻤﻴﻢ ﻟﻮﺣﺔ ﺗﻮﺳﻌﺔ ووﺣﺪات إﺿﺎﻓﻴﺔ ﻟﺘﺠﺎرب وﳏﻴﻄﻴﺎت أﺧﺮى ﺗﺮﺑﻂ ﻣﻊ ﻟﻮﺣﺔ اﻟﺘﻄﻮﻳﺮ ‪Spartan-‬‬

‫‪ ،3E‬ﲤﻜﻦ اﻟﻄﻼب ﻣﻦ ﺑﻨﺎء ﺗﻄﺒﻴﻘﺎت ﺟﺪﻳﺪة وﺑﺮﳎﺘﻬﺎ ) ‪7.Segments, Ladder-Net., Analog Sensors, DC Motor‬‬

‫‪.(.... ،Controller, RS485, I2C EEPROM, RTC, IR remote, Stepper Moto control‬‬

‫‪ ‬اﳌﺮﺣﻠﺔ اﻟﻌﺎﺷﺮة‪ :‬ﰎ ﻓﻴﻬﺎ ﺗﺼﻤﻴﻢ دﻟﻴﻞ اﻟﺘﺠﺎرب اﳌﺨﱪﻳﺔ ﻟﺒﻌﺾ اﻟﺘﻄﺒﻴﻘﺎت اﻟﱵ ﰎ ﺑﻨﺎؤﻫﺎ ﰲ اﳌﺮﺣﻠﺔ اﻟﺜﺎﻣﻨﺔ وﻓﻘﺎً ﻟﻸﺳﺲ اﳌﺪروﺳﺔ‬
‫واﻟﻨﻤﻮذج اﳌﺨﱪي اﳌﺼﻤﻢ ﰲ اﳌﺮﺣﻠﺔ اﻟﺜﺎﻣﻨﺔ‪ .‬ﻛﺬﻟﻚ ﺗﺴﺠﻴﻞ ﻣﺘﻌﺪد اﻟﻮﺳﺎﺋﻂ ﳌﺮاﺣﻞ ﺑﻨﺎء اﻟﺘﺠﺎرب اﳌﺨﱪﻳﺔ‪.‬‬

‫‪ ‬اﳌﺮﺣﻠﺔ اﳊﺎدﻳﺔ ﻋﺸﺮة‪ :‬ﲨﻊ ﻫﺬﻩ اﻟﺪراﺳﺔ ﻣﻔﺼﻠﺔ ﻋﻠﻰ ﺷﻜﻞ أﻃﺮوﺣﺔ وﻫﻲ اﳌﺮﺣﻠﺔ اﻷﺧﲑة ﻣﻦ اﻟﺒﺤﺚ‪.‬‬

‫اﻟﺼﻌﻮﺑﺎت اﻟﺘﻲ واﺟﻬﺖ اﻟﺒﺤﺚ )‪:(Difficulties and Constraints‬‬

‫إن اﻟﺘﻜﻨﻮﻟﻮﺟﻴﺎ اﻟﱵ ﻧﺘﺤﺪث ﻋﻨﻬﺎ ﰲ ﻫﺬا اﻟﺒﺤﺚ )‪ (FPGA‬ﻫﻲ ﺗﻜﻨﻮﻟﻮﺟﻴﺎ ﳏﻈﻮرة ﻋﻠﻰ ﳎﺘﻤﻌﻨﺎ اﳌﻌﺮﰲ واﻻﻗﺘﺼﺎدي ﻧﻈﺮاً ﻟﻠﺤﺼﺎر‬
‫اﳋﺎرﺟﻲ اﳌﻔﺮوض ﻋﻠﻴﻨﺎ‪ ،‬وﺑﺎﻟﺘﺎﱄ ﻓﺈن ﻋﻤﻠﻴﺔ ﺗﺄﻣﲔ اﳌﺴﺘﻠﺰﻣﺎت اﻟﻀﺮورﻳﺔ ﻟﻠﻌﻤﻞ ﻋﻠﻴﻬﺎ ﻳﻌﺘﱪ أﻣﺮاً ﰲ ﻏﺎﻳﺔ اﻟﺘﻌﻘﻴﺪ وﻳﻜﻠﻒ ﻣﺒﺎﻟﻎ ﻃﺎﺋﻠﺔ‪.‬‬
‫ﻛﺬﻟﻚ وﻟﻨﻔﺲ اﻟﺴﺒﺐ ﻓﺈﻧﻪ ﻻ ﳝﻜﻦ اﳊﺼﻮل ﻋﻠﻰ دﻋﻢ ﻓﲏ ﻣﺒﺎﺷﺮ ﻣﻦ ﻗﺒﻞ اﻟﺸﺮﻛﺎت اﳌﺼﻨﻌﺔ‪ ،‬واﳌﺮاﺟﻊ اﻟﺘﻘﻨﻴﺔ ﻣﺘﻮﻓﺮة ﻣﻦ ﻗﺒﻞ اﻟﺸﺮﻛﺔ‬
‫ﻣﺒﺎﺷﺮة‪.‬‬

‫إن اﻟﻘﺴﻢ اﻟﺜﺎﱐ ﻣﻦ ﻫﺬا اﻟﺒﺤﺚ ﻳﺘﻌﻠﻖ ﲟﻮﺿﻮﻋﺎت اﻟﺘﻌﻠﻴﻢ اﳍﻨﺪﺳﻲ )‪ ،(Engineering Education‬وﻫﻮ ﳎﺎل ﺟﺪﻳﺪ ﻛﻠﻴﺎً وﻗﺪ ﺑﺪأ ﰲ‬
‫ﻋﺎم ‪ 2004‬ﰲ اﻟﻮﻻﻳﺎت اﳌﺘﺤﺪة وﻣﺎﺗﺰال اﻟﺪراﺳﺎت ﻓﻴﻪ ﰲ ﻣﺮاﺣﻠﻬﺎ اﻷوﱃ‪ ،‬أﺿﻒ إﱃ ذﻟﻚ اﻟﺘﻔﺮع اﻟﻜﺒﲑ ﺟﺪاً ﰲ ﻣﻮﺿﻮﻋﺎﺗﻪ‪ ،‬ﻛﻤﺎ أن‬
‫اﳌﺮاﺟﻊ اﻟﺒﺤﺜﻴﺔ ﺗﺘﺤﺪث ﻋﻦ اﳌﻮﺿﻮﻋﺎت ﻣﻦ وﺟﻬﺔ ﻧﻈﺮ ﺑﻴﺪاﻏﻮﺟﻴﺔ ﲡﺮﻳﺪﻳﺔ ﻧﻮﻋﻴﺔ ﻻ ﺗﻘﺎرب اﻟﺘﻄﺒﻴﻖ‪ ،‬وﻫﺬا ﺑﺪورﻩ اﺣﺘﺎج إﱃ وﻗﺖ ﻛﺒﲑ ﺣﱴ‬
‫ﺗﻈﻬﺮ اﳌﻌﺎﱂ اﳊﻘﻴﻘﻴﺔ وﻣﻨﻬﺠﻴﺔ رﺑﻄﻬﺎ وﲢﻮﻳﻠﻬﺎ إﱃ ﻣﻔﻬﻮم ﻛﻤﻲ ﺗﻄﺒﻴﻘﻲ‪.‬‬

‫إن اﻟﻌﻤﻞ ﻋﻠﻰ أﲝﺎث ﺗﻌﻠﻴﻤﻴﺔ ﻟﻠﺘﻜﻨﻮﻟﻮﺟﻴﺎ اﳌﺘﻘﺪﻣﺔ ﻳﺴﺘﻠﺰم ﲝﺜﺎً ﻣﻌﻤﻘﺎً ﻋﻠﻰ ﻋﺪة ﳏﺎور‪ ،‬وﺑﻨﻔﺲ اﻟﻮﻗﺖ ﻳﺴﺘﻠﺰم ﺟﻬﺪاً ﻛﺒﲑاً ﰲ ﺑﻨﺎء اﻵﻟﻴﺎت‬
‫واﻟﺘﻮاﺻﻞ ﻣﻊ اﻟﻄﻼب وﺗﻄﺒﻴﻖ ﻫﺬﻩ اﻵﻟﻴﺎت‪ ،‬وﻣﻦ ﰒ ﲨﻊ اﻟﻨﺘﺎﺋﺞ وﲢﻠﻴﻠﻬﺎ وﺗﺼﻨﻴﻔﻬﺎ وﺗﻌﺪﻳﻞ اﻵﻟﻴﺎت وﻓﻘﺎً ﳍﺎ‪ .‬إن ﻣﺜﻞ ﻫﺬﻩ اﻷﲝﺎث ﳛﺘﺎج‬
‫إﱃ ﻓﺮﻳﻖ ﲝﺚ ﻣﺆﻟﻒ ﻣﻦ ﺛﻼث أﺷﺨﺎص ﻋﻠﻰ اﻷﻗﻞ‪.‬‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪VI‬‬
‫‪I‬‬ ‫اﶈﺘﻮى | ‪Index‬‬

‫اﻟﺨﻄﻮط اﻟﻌﺎﻣﺔ ﻟﻸﻃﺮوﺣﺔ )‪:(The Thesis Outlines‬‬

‫ﺗﻘﻊ اﻷﻃﺮوﺣﺔ ﰲ ﺳﺘﺔ ﻓﺼﻮل‪ ،‬ﻳﺘﺒﻌﻬﺎ ﺳﺘﺔ ﻣﻼﺣﻖ‪ .‬ﻛﻞ ﻓﺼﻞ ﻣﻦ اﻟﻔﺼﻮل‪ ،‬ﻳﻔﺘﺘﺢ ﲟﻘﺪﻣﺔ ﻓﻴﻬﺎ ﻣﻔﺎﺗﻴﺤﻪ‪ ،‬وﳜﺘﺘﻢ ﲞﺎﲤﺔ ﻓﻴﻬﺎ ﻣﻀﺎﻣﻴﻨﻪ‪ .‬ﻓﻴﻤﺎ‬
‫ﻳﻠﻲ‪ ،‬ذﻛﺮ اﳋﻄﻮط اﻟﻌﺮﻳﻀﺔ ﳌﻮﺿﻮﻋﺎت اﻟﻔﺼﻮل‪.‬‬

‫‪ -‬ﻳﻘﺪم اﻟﻔﺼﻞ اﻷول ﻣﺪﺧﻼً إﱃ اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ )‪ ،ESs‬وﺗﻄﺒﻴﻘﺎﻬﺗﺎ اﻟﻌﺎﻣﺔ‪ ،‬وﻓﺮوﻋﻬﺎ اﻟﺮﺋﻴﺴﺔ‪ ،‬ﺣﻴﺚ ﻳﺴﺮد أﻧﻮاﻋﻬﺎ ﻣﻌﺮﻓﺎً وﻣﺼﻨﻔﺎً‬
‫ﻛﻞ ﻧﻮع ﻣﻨﻬﺎ‪ ،‬ﻣﻠﺤﻘﺎً اﻟﺘﻌﺮﻳﻒ واﻟﺘﺼﻨﻴﻒ ﲟﺎ ﻳﺸﺘﻤﻞ ﻋﻠﻴﻪ اﻟﻨﻮع ﻣﻦ اﻟﺘﻄﺒﻴﻘﺎت‪ ،‬وﲟﺎ ﳝﻠﻚ ﻣﻦ اﶈﺎﺳﻦ واﳌﻴﺰات‪ ،‬ﰒ ﻳﺄﰐ ﻋﻠﻰ‬
‫ذﻛﺮ اﳊﻠﻮل اﻟﺘﻜﻨﻮﻟﻮﺟﻴﺔ ودورﻫﺎ ﰲ اﻟﺼﻨﺎﻋﺔ‪ ،‬وﻳﻔﺼﻞ ﰲ اﻷﲝﺎث واﻟﺪراﺳﺎت اﻟﻌﻠﻤﻴﺔ اﻟﱵ ﺗﺘﺤﺪث ﻋﻦ أﳘﻴﺘﻬﺎ ودورﻫﺎ ﰲ اﻟﺘﻌﻠﻴﻢ‬
‫اﳍﻨﺪﺳﻲ واﳌﺨﱪي‪ ،‬وﳜﺘﻢ ﺑﺬﻛﺮ اﻟﺘﺤﺪﻳﺎت اﻻﻗﺘﺼﺎدﻳﺔ ﻟﻠﺤﻠﻮل اﳌﺴﺘﻘﺒﻠﻴﺔ ﻟﻸﻧﻈﻤﺔ اﳌﺪﳎﺔ‪.‬‬

‫‪ -‬ﻳﺘﻨﺎول اﻟﻔﺼﻞ اﻟﺜﺎﱐ ﺗﻔﺼﻴﻼً ﰲ ﻓﺮع ﻣﻦ ﻓﺮوع اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ وﻫﻮ‪ :‬ﻣﺼﻔﻮﻓﺎت اﻟﺒﻮاﺑﺎت اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً – وﻫﻮ أﺻﻞ ﰲ‬
‫دراﺳﺘﻨﺎ – ﺣﻴﺚ ﻳﺄﰐ ﻋﻠﻰ ذﻛﺮ آﺧﺮ اﻷﲝﺎث اﻟﻘﺎﺋﻤﺔ‪ ،‬وﻳﺘﺤﺪث ﻋﻦ أﳘﻴﺘﻬﺎ ودورﻫﺎ ﰲ اﻟﺘﻌﻠﻴﻢ اﳍﻨﺪﺳﻲ واﳌﺨﱪي‪ ،‬ﰒ ﻳﻨﺘﻘﻞ‬
‫ﻟﻔﺼﻞ ﰲ ﺑﻨﺎﻫﺎ اﻟﺪاﺧﻠﻴﺔ‪ ،‬وﻣﺒﺪأ ﻋﻤﻠﻬﺎ‪ ،‬وﻋﺎﺋﻼﻬﺗﺎ‪ ،‬واﻟﺸﺮﻛﺎت اﳌﻌﻨﻴﺔ ﺑﺘﺼﻨﻴﻌﻬﺎ وﺗﻄﻮﻳﺮﻫﺎ‪ ،‬وﻣﺮاﺣﻞ ﺗﺼﻤﻴﻤﻬﺎ وﺑﺮﳎﺘﻬﺎ‪ ،‬ﰒ ﻳﺘﻌﻤﻖ‬
‫ﰲ ﺷﺮاﺋﺢ ﺷﺮﻛﺔ ‪ Xilinx‬اﻟﱵ اﻋﺘﻤﺪت ﰲ اﻟﺪراﺳﺔ‪.‬‬

‫‪ -‬ﻳﺘﺤﺪث اﻟﻔﺼﻞ اﻟﺜﺎﻟﺚ ﻋﻦ اﻟﻠﻐﺎت اﳌﺴﺘﺨﺪﻣﺔ ﰲ ﺑﺮﳎﺔ اﻟﻜﻴﺎن اﻟﺼﻠﺐ‪ ،‬ﻓﺪم ﶈﺔ ﻋﺎﻣﺔ ﻋﻨﻬﺎ‪ ،‬وﻋﻦ ﺗﺼﻨﻴﻔﺎﻬﺗﺎ‪ ،‬وﻋﻦ أدواﻬﺗﺎ‪،‬‬
‫وﻳﺪ ﱢﻋﻤﻬﺎ ﺑﺄﻣﺜﻠﺔ‪ .‬ﰒ ﻳﺒﺤﺚ ﰲ أﳘﻴﺔ اﻟﻠﻐﺎت اﳌﺮﺋﻴﺔ اﻟﺮﺳﻮﻣﻴﺔ ﻛﺄداة اﻟﻌﺼﺮ ﰲ ﺑﺮﳎﺔ ﺗﻄﺒﻴﻘﺎت اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ ﻋﻠﻰ ﳐﺘﻠﻒ أﻧﻮاﻋﻬﺎ‪،‬‬
‫وﻳﻘﺪم ﻣﻘﺎرﻧﺔ ﺑﲔ اﻟﻠﻐﺎت اﳌﺮﺋﻴﺔ واﻟﻠﻐﺎت اﻟﻨﺼﻴﺔ ﻣﱪزاً دور اﻟﻠﻐﺎت اﳌﺮﺋﻴﺔ ﰲ ﺗﺴﺮﻳﻊ ﻣﺮاﺣﻞ اﻟﺘﺼﻤﻴﻢ واﻟﺘﻄﻮﻳﺮ‪ .‬ﰒ ﻳﺴﺘﻌﺮض اﻟﺒﻴﺌﺔ‬
‫اﻟﱪﳎﻴﺔ اﳌﺮﺋﻴﺔ ‪ LabVIEW‬اﻟﱵ اﻋﺘﻤﺪت ﰲ اﻟﺪراﺳﺔ‪.‬‬

‫‪ -‬ﻳﺒﺤﺚ اﻟﻔﺼﻞ اﻟﺮاﺑﻊ ﰲ ﻧﻈﺮﻳﺎت اﻟﺘﻌﻠﻴﻢ اﳊﺪﻳﺚ – واﻟﱵ ﺳﻮف ﺗﺴﺘﺨﺪم ﰲ اﻟﻔﺼﻞ اﳋﺎﻣﺲ ﻛﻤﻨﻬﺠﻴﺔ ﰲ ﺑﻨﺎء اﻟﺘﺠﺎرب اﻟﻌﻤﻠﻴﺔ‬
‫اﳌﺨﱪﻳﺔ – وﻳﺘﻌﻤﻖ ﰲ ﳕﻮذج ‪ Kolb‬وﻧﻈﺮﻳﺘﻪ اﻟﺒﻨﺎﺋﻴﺔ ﰲ اﻟﺘﻌﻠﻢ اﻟﺘﺠﺮﻳﱯ‪ ،‬وﻳﻘﺪم ﻣﻘﺎرﻧﺔ ﺑﲔ اﻟﺘﻌﻠﻴﻢ اﻟﻜﻼﺳﻴﻜﻲ واﻟﺘﻌﻠﻴﻢ اﻟﺒﻨﺎﺋﻲ‬
‫اﻟﺬي ﻳﺸﻤﻞ اﻟﺘﻌﻠﻢ ﻣﻦ ﺧﻼل اﳌﺸﺎرﻳﻊ وﺣﻞ اﳌﺸﻜﻼت‪ ،‬وﻳﺘﻔﺮع ﻟﻴﻨﺎﻗﺶ ﺗﻄﺒﻴﻖ ﻫﻨﺪﺳﺔ اﻟﺘﺤﻜﻢ ﰲ ﻣﻮﺿﻮﻋﺎت اﻟﺒﻴﺪاﻏﻮﺟﻴﺎ‪ ،‬ﰒ‬
‫ﻳﻔﺼﻞ ﰲ اﻟﺘﻌﻠﻴﻢ اﳌﺨﱪي وﺗﺼﻨﻴﻔﺎﺗﻪ واﺳﱰاﺗﻴﺠﻴﺎﺗﻪ‪.‬‬

‫‪ -‬ﻳﻘﺪم اﻟﻔﺼﻞ اﳋﺎﻣﺲ ﶈﺔ ﻣﻮﺟﺰة ﻋﻦ اﻟﻄﺮق اﻹﺣﺼﺎﺋﻴﺔ اﳌﺴﺘﺨﺪﻣﺔ ﰲ اﻷﲝﺎث اﻟﺘﻌﻠﻴﻤﻴﺔ‪ ،‬ﰒ ﻳﻌﺮض ﺗﺼﻤﻴﻤﺎً ﳌﺨﺘﱪ اﻷﻧﻈﻤﺔ‬
‫اﳌﺪﳎﺔ اﻟﺬي اﺳﺘﻨﺪت إﻟﻴﻪ ﻫﺬﻩ اﻟﺪراﺳﺔ ﰲ ﺟﺎﻧﺒﻬﺎ اﻟﺘﻄﺒﻴﻘﻲ‪ ،‬ﰒ ﻳﻨﺎﻗﺶ ﺳﺒﺐ ﺿﻌﻒ ﻧﺘﺎﺋﺞ اﻟﺘﻌﻠﻴﻢ اﳌﺨﱪي‪ ،‬وﻳﻘﺪم ﳕﻮذﺟﺎً‬
‫ﻫﺠﻴﻨﺎً ﻟﻠﺘﻌﻠﻴﻢ اﳌﺨﱪي‪ ،‬ﰒ ﻳﺒﺤﺚ ﰲ ﺗﻄﺒﻴﻖ ﻧﻈﺮﻳﺔ اﻟﺘﺤﻜﻢ ﻛﺄﺳﺎس ﰲ اﻟﺘﻌﻠﻢ اﻟﺒﻨﺎﺋﻲ اﻟﺘﺠﺮﻳﱯ‪ ،‬وﻳﻌﺮض ﻧﺘﺎﺋﺞ اﻟﺘﺤﻠﻴﻞ اﻹﺣﺼﺎﺋﻲ‬
‫اﻟﱵ ﺗﺆﻛﺪ إﻟﻐﺎء ﻣﺒﺪأ اﻟﻔﺮض اﻟﺒﺎﻃﻞ ﰲ اﻟﺪراﺳﺔ اﳊﺎﺻﻠﺔ‪ ،‬ﰒ ﳜﺘﻢ ﺑﺘﺼﻤﻴﻢ ﳕﻮذج ﺗﻌﻠﻴﻤﻲ ﺑﻨﺎﺋﻲ ﺷﺎﻣﻞ وﻳﺸﺮح ﻋﻨﺎﺻﺮﻩ وﻃﺮﻳﻘﺔ‬
‫ﺗﻄﺒﻴﻘﻪ‪.‬‬

‫‪ -‬ﻳﻌﺮض اﻟﻔﺼﻞ اﻟﺴﺎدس اﻟﺪراﺳﺔ اﻟﺘﻄﺒﻴﻘﻴﺔ ﻟﻠﺒﺤﺚ ﻣﻦ ﺧﻼل اﳍﻴﻜﻠﻴﺔ اﻟﺒﻨﺎﺋﻴﺔ ﻟﻠﺘﺠﺎرب اﻟﻌﻤﻠﻴﺔ اﻟﱵ ﺗﺴﺘﻨﺪ ﳌﺎ اﻋﺘﻤﺪ ﰲ ﺟﺰﻳﺌﺎت‬
‫اﻟﺪراﺳﺔ ﰲ اﻟﻔﺼﻮل اﻟﺴﺎﺑﻘﺔ‪ ،‬وﻳﻘﺪم أﻳﻀﺎً اﻟﻮﻇﺎﺋﻒ واﳌﻴﺰات اﻟﻌﺎﻣﺔ ﻟﻠﻮﺣﺔ اﻟﺘﻄﻮﻳﺮ اﻟﱵ اﻋﺘﻤﺪت ﰲ اﻟﺪراﺳﺔ‪ ،‬وﻃﺮﻳﻘﺔ اﻟﺮﺑﻂ ﺑﲔ‬
‫اﻟﺒﻴﺌﺔ اﻟﱪﳎﻴﺔ وﻟﻮﺣﺔ اﻟﺘﻄﻮﻳﺮ‪ ،‬ﰒ ﻳﺴﺘﻌﺮض ﺗﺼﻤﻴﻤﺎً ﻟﻠﻮﺣﺔ ﺗﻮﺳﻌﺔ إﺿﺎﻓﻴﺔ ﺗﺮﺑﻂ إﱃ ﻟﻮﺣﺔ اﻟﺘﻄﻮﻳﺮ‪ ،‬وﲡﺎرب أﺧﺮى ﰎ ﺗﺼﻤﻴﻤﻬﺎ‬

‫‪VII‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 Table of Contents | ‫ﻗﺎﺋﻤﺔ اﶈﺘﻮﻳﺎت‬

‫ ﰒ ﻳﻘﺪم ﳕﻮذﺟﺎً ﻣﻔﺼﻼً ﻟﺒﻨﺎء دﻟﻴﻞ ﳐﱪي‬،‫ﺑﺪف اﺳﺘﺜﻤﺎر اﻟﻨﻈﺎم ﰲ ﺑﻨﺎء ﺗﻄﺒﻴﻘﺎت ﻋﻤﻠﻴﺔ ﰲ ﳎﺎل أﻧﻈﻤﺔ اﻟﺘﺤﻜﻢ اﻟﺮﻗﻤﻲ‬
ٍ ‫ وﳜﺘﻢ ﺑﺘﺼﻤﻴﻢ ﳐﺘﱪ ﻋﻦ ﺑﻌﺪ‬،‫ﻟﻠﺘﺠﺎرب‬
.ً‫ﻟﻨﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻟﺘﻨﻘﻴﺔ ﻣﺼﻔﻮﻓﺎت اﻟﺒﻮاﺑﺎت اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎ‬

‫ اﳌﺨﻄﻄﺎت‬،‫ اﺳﺘﻄﻼع ﻟﻠﺮأي‬،‫ آﻓﺎق اﻟﺒﺤﺚ اﳌﺴﺘﻘﺒﻠﻲ‬،‫ ﺗﺘﻀﻤﻦ اﳌﻼﺣﻖ اﳌﻘﱰﺣﺎت واﻟﺘﻮﺻﻴﺎت اﻟﻼزﻣﺔ ﻟﺒﻨﺎء ﳐﺘﱪ ﻟﻸﻧﻈﻤﺔ اﳌﺪﳎﺔ‬-
.‫ اﺳﺌﻠﺔ اﻻﺧﺘﺒﺎرات اﻟﱵ ﰎ إﺟﺮاؤﻫﺎ‬،‫اﻟﺘﺼﻤﻴﻤﻴﺔ ﻟﻠﻮﺣﺔ اﻟﺘﻮﺳﻌﺔ واﻟﻮﺣﺪات اﻹﺿﺎﻓﻴﺔ‬

‫ أود اﻹﺷﺎرة إﱃ أن ﻫﺬﻩ اﻷﻃﺮوﺣﺔ ﰎ وﺿﻌﻬﺎ ﻟﺘﻜﻮن ﻣﺮﺟﻌﺎً ﲝﺜﻴﺎً وﻣﺪﺧﻼً ﻋﻠﻤﻴﺎً إﱃ ﻣﻮﺿﻮﻋﺎت اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ وﻃﺮاﺋﻖ ﺗﻘﺪﳝﻬﺎ‬،ً‫وأﺧﲑا‬
‫ وﻗﺪ ﲡﺎوزت ﰲ‬،‫ ﻓﺈن ﺑﲔ دﻓﺘﻴﻬﺎ ﻣﺌﺎت اﻟﺼﻔﺤﺎت واﳌﺮاﺟﻊ اﻟﺒﺤﺜﻴﺔ اﳌﺴﻨﺪة‬،‫ ﻟﺬا‬.‫وﺗﻌﻠﻴﻤﻬﺎ وﻓﻘﺎً ﻻﺳﱰاﺗﻴﺠﻴﺎت اﻟﺘﻌﻠﻴﻢ اﳊﺪﻳﺚ وﻧﻈﺮﻳﺎﺗﻪ‬
‫ ﻟﻴﻮﻓﺮ ذﻟﻚ ﻋﻠﻰ‬،‫ إﻻ أن اﳍﺪف اﳌﻘﺼﻮد ﻣﻨﻬﺎ ﺗﺘﻄﻠﺐ ذﻟﻚ‬،(‫ ﺻﻔﺤﺔ‬200) ‫ ﺻﻔﺤﺔ( ﻣﺎ ﻳﻔﱰض ﻋﺎد ًة ﰲ رﺳﺎﺋﻞ اﳌﺎﺟﺴﺘﲑ‬400) ‫ﺗﻌﺪادﻫﺎ‬
.‫اﻟﺒﺎﺣﺜﲔ آﻻف اﻷﻣﻴﺎل وﻋﺸﺮات اﳌﺮاﻛﺐ اﳌﺘﻜﺴﺮة ﻋﻨﺪ ﺷﻄﺂن اﳊﲑة‬

:(Publications during the Research) ‫اﻟﻤﻨﺸﻮرات ﺧﻼل ﻓﺘﺮة اﻟﺒﺤﺚ‬

1. W. Balid, I. Al-Rouh, A. Fatouh, "Design and Implementation of a Self-Learning Open-Source
Interactive Kit for Teaching Microcontroller Programming Based on Learning Methodologies",
Researches Journal at Aleppo University, Engineering Sciences Series, ver. 56 / (2009).
2. W. Balid, I. Al-Rouh, M. Alhaj Dibo, "YES, Constructivist Project Based Learning Could be the
Magical Cure for Engaging Future Engineers! Case of an Embedded Systems Course", Researches
Journal at Aleppo University, Engineering Sciences Series, ver. 55 / (2010).
3. W. Balid, et al., "Multipurpose Open Source Embedded Systems Laboratory Kit for Engaging
Students towards Experiential Education", 2009 Annual ASEE (American Society for Engineering
Education) Global Colloquium on Engineering Education, Budapest, Hungary, Oct. 2009
4. W. Balid, et al., "The Impact of Different Pre-Lab Preparation Modes on Embedded Systems
Hands-on Lab", 2009 Annual ASEE (American Society for Engineering Education) Global
Colloquium on Engineering Education, Budapest, Hungary, Oct. 2009
5. W. Balid, et al., "A Constructivist PBL Approach in Teaching Embedded Systems Hands-on
Course, Comparative Study ", 2009 Annual ASEE (American Society for Engineering Education)
Global Colloquium on Engineering Education, Budapest, Hungary, Oct. 2009
6. W. Balid, et al., "An Assessment Rich PBL vs. Classical Teaching Approach, Case of an
Embedded Systems Course", Proceedings of the 2nd International Research Symposium on PBL,
Melbourne, Australia, Dec. 2009
7. Balid W., Embedded System Microcontroller Interactive Course using BASCOM-
AVR,http://www.mcselec.com/index.php?option=com_content&task=view&id=254&Itemid=67,
[Online]

Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages VIII
 (Table of Contents) ‫ﻓﻬﺮس اﻟﻤﺤﺘﻮﻳﺎت‬

1 ............. ................................ ................................ ................................ ‫ اﻟﻔﺼﻞ اﻷول‬CHAPTER 1

1 ............................ ................................ ................................ ................................ ‫اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ‬

1 ............................... ................................ ................................ :(INTRODUCTION) ‫ﻣﻘﺪﻣﺔ‬ 1-1
2 ............................... ................................ :(WHAT IS AN EMBEDDED SYSTEM?) ‫ﺗﻌﺮﻳﻒ اﻟﻨﻈﺎم اﳌﺪﻣﺞ‬ 2-1
3 ............................. ................................ :(EMBEDDED SYSTEM ARCHITECTURE) ‫ﺑﻨﻴﺔ اﻟﻨﻈﺎم اﳌﺪﻣﺞ‬ 3-1
5 ...... ................................ :(REQUIREMENTS AFFECT IN ESS DESIGN) ‫اﻟﻌﻮاﻣﻞ اﳌﺆﺛﺮة ﰲ ﺗﺼﻤﻴﻢ اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ‬ 4-1
6 ................................ ................................ :(EMBEDDED SYSTEM INDUSTRY) ‫ﺻﻨﺎﻋﺔ اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ‬ 5-1
7 . ................................:(EMBEDDED SYSTEMS ENGINEERING EDUCATION) ‫اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ ﰲ اﻟﺘﻌﻠﻴﻢ اﳍﻨﺪﺳﻲ‬ 6-1
8 ... ................................ :(EMBEDDED SYSTEMS LABORATORY EDUCATION) ‫اﻟﺘﻌﻠﻴﻢ اﳌﺨﱪي ﻟﻸﻧﻈﻤﺔ اﳌﺪﳎﺔ‬ 7-1
9 ................ ................................ :(EMBEDDED SYSTEMS LEARNING CURVE) ‫ﻣﻨﺤﲏ اﻟﺘﻌﻠﻢ ﻟﻸﻧﻈﻤﺔ اﳌﺪﳎﺔ‬ 8-1
10 .... ................................ :(EMBEDDED SYSTEMS EDUCATION CHALLENGES) ‫ﲢﺪﻳﺎت ﺗﻌﻠﻴﻢ اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ‬ 9-1
10 ..........................:(TOWARD MODERN E.SYSTEMS CURRICULUMS) ‫ﳓﻮ ﺗﻄﻮﻳﺮ ﻣﻨﺎﻫﺞ ﻣﻌﺎﺻﺮة ﻟﻸﻧﻈﻤﺔ اﳌﺪﳎﺔ‬ 10-1
11 .. ................................ ................................ ................................ :(DISCUSSION) ‫ﻣﻨﺎﻗﺸﺔ‬ 11-1
11 ..... ................................:(E.SYSTEMS TECHNOLOGIES & APPROACHES) ‫اﳊﻠﻮل اﻟﺘﻜﻨﻠﻮﺟﻴﺔ ﻟﻸﻧﻈﻤﺔ اﳌﺪﳎﺔ‬ 12-1
13 .......... ................................ :(SEMICONDUCTORS INDUSTRY EVOLUTION) ‫ﺗﻄﻮر ﺻﻨﺎﻋﺔ أﻧﺼﺎف اﻟﻨﻮاﻗﻞ‬ 13-1
15 ........ ................................ :(SEMICONDUCTORS INDUSTRY EVOLUTION) ‫ﺗﻘﻨﻴﺎت ﺻﻨﺎﻋﺔ أﻧﺼﺎف اﻟﻨﻮاﻗﻞ‬ 14-1
17 ......... ................................ :(DIGITAL INTEGRATED CIRCUIT CLASSES) ‫أﺻﻨﺎف اﻟﺪارات اﳌﺘﻜﺎﻣﻠﺔ اﻟﺮﻗﻤﻴﺔ‬ 15-1
18 ................................ ................................ :(Standard Logic ICs) ‫اﻟﺪارات اﳌﺘﻜﺎﻣﻠﺔ اﻟﻘﻴﺎﺳﻴﺔ‬ 1-15-1
18 .............................. ................................ :(Microprocessors) MPU, µP ‫اﳌﻌﺎﳉﺎت اﳌﺼﻐﺮة‬ 2-15-1
19 ........ ................................ :(General Purpose Processor) GPP ‫ﻣﻌﺎﳉﺎت اﻷﻏﺮاض اﻟﻌﺎﻣﺔ‬ 1-2-15-1
22 ....... ................................ :(Special Purpose Processors) SPPs ‫ﻣﻌﺎﳉﺎت اﻷﻏﺮاض اﳋﺎﺻﺔ‬ 2-2-15-1
24 ................................:(CPUs Architecture Design Standard) ‫ﻣﻌﻴﺎرﻳﺔ ﺗﺼﻤﻴﻢ ﺑﻨﻴﺔ اﳌﻌﺎﳉﺎت‬ 3-2-15-1
25 ........................ :(CPUs Instruction Set Architectures) ‫ﺑﲎ ﻣﺴﺠﻼت اﻟﺘﻌﻠﻴﻤﺎت ﰲ اﳌﻌﺎﳉﺎت‬ 4-2-15-1
27 ......................... ................................ :(Microcontrollers) MCUs, µC ‫اﳌﺘﺤﻜﻤﺎت اﳌﺼﻐﺮة‬ 3-15-1
30 ....................... :(Microcontrollers Functional Features) ‫اﳌﻴﺰات اﻟﻮﻇﻴﻔﻴﺔ ﻟﻠﻤﺘﺤﻜﻤﺎت اﳌﺼﻐﺮة‬ 1-3-15-1
39 ................. ................................ ................................ :(DSPs) ‫ﻣﻌﺎﳉﺎت اﻹﺷﺎرة اﻟﺮﻗﻤﻴﺔ‬ 4-15-1
40 ................................ :[117](General Types of DSPs) ‫اﻷﻧﻮاع اﻷﺳﺎﺳﻴﺔ ﳌﻌﺎﳉﺎت اﻹﺷﺎرة اﻟﺮﻗﻤﻴﺔ‬ 1-4-15-1
41 ......................:(Fixed vs. Floating Point DSPs) ‫ﻣﻌﺎﳉﺎت اﻹﺷﺎرة اﻟﺮﻗﻤﻴﺔ ﺑﺎﻟﻔﺎﺻﻠﺔ اﻟﻌﺎﺋﻤﺔ واﻟﺜﺎﺑﺘﺔ‬ 2-4-15-1
43 ...............................:(Digital Signal Processors Architecture) ‫ﺑﻨﻴﺔ ﻣﻌﺎﳉﺎت اﻹﺷﺎرة اﻟﺮﻗﻤﻴﺔ‬ 3-4-15-1
44 .. ................................ :(Enhancing DSPs Architecture) ‫ﺗﻌﺰﻳﺰ ﺑﻨﻴﺔ ﻣﻌﺎﳉﺎت اﻹﺷﺎرة اﻟﺮﻗﻤﻴﺔ‬ 4-4-15-1
44 ........................ :(Commercially Available DSP Chips) ‫ﺷﺮاﺋﺢ ﻣﻌﺎﳉﺎت اﻹﺷﺎرة اﻟﺮﻗﻤﻴﺔ اﳌﺘﻮﻓﺮة‬ 5-4-15-1
 ‫ﻗﺎﺋﻤﺔ اﶈﺘﻮﻳﺎت | ‪Table of Contents‬‬

‫اﻟﺼﻔﺎت اﳋﺎﺻﺔ ﻟﺘﻄﺒﻴﻘﺎت ﻣﻌﺎﳉﺔ اﻹﺷﺎرة اﻟﺮﻗﻤﻴﺔ )‪46 ................ :(DSP Applications Special Features‬‬ ‫‪6-4-15-1‬‬
‫دراﺳﺔ ﺑﺪاﺋﻞ ﳌﻌﺎﳉﺎت اﻹﺷﺎرة اﻟﺮﻗﻤﻴﺔ )‪49 ................................ :(Considering DSP Alternatives‬‬ ‫‪7-4-15-1‬‬
‫اﻟﺪارات اﳌﺘﻜﺎﻣﻠﺔ ذات اﻟﺘﻄﺒﻴﻘﺎت اﳋﺎﺻﺔ )‪51 .. ................................ ................................:(ASIC‬‬ ‫‪5-15-1‬‬
‫اﻟﺒﻨﻴﺔ اﻟﻔﻴﺰﻳﺎﺋﻴﺔ ﻟﻠﺪارات اﳌﺘﻜﺎﻣﻠﺔ )‪51 .......... ................................ :(ICs Physical Architecture‬‬ ‫‪1-5-15-1‬‬
‫أﻧﻮاع اﻟﺪارات اﳌﺘﻜﺎﻣﻠﺔ ﻣﺘﺨﺼﺼﺔ اﻟﺘﻄﺒﻴﻘﺎت )‪52 ........... ................................ :(Types of ASIC‬‬ ‫‪2-5-15-1‬‬
‫ﻣﺮاﺣﻞ ﺗﺼﻤﻴﻢ ﺷﺮاﺋﺢ اﻟﺪارات اﳌﺘﻜﺎﻣﻠﺔ ﻣﺘﺨﺼﺼﺔ اﻟﺘﻄﺒﻴﻘﺎت )‪59 ..................... :(ASIC Design Process‬‬ ‫‪3-5-15-1‬‬
‫اﻟﺪارات اﳌﺘﻜﺎﻣﻠﺔ اﳍﺠﻴﻨﺔ ﻣﺘﺨﺼﺼﺔ اﻟﺘﻄﺒﻴﻘﺎت )‪60 ........... ................................ :(Mixed-signals ASIC‬‬ ‫‪6-15-1‬‬
‫اﳌﻨﺘﺠﺎت اﻟﻘﻴﺎﺳﻴﺔ ﻣﺘﺨﺼﺼﺔ اﻟﺘﻄﺒﻴﻘﺎت ‪61 .....................:(Application-specific standard products) ASSPs‬‬ ‫‪7-15-1‬‬
‫اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ ﻋﻠﻰ ﺷﺮاﺋﺢ "‪62 ........................ ................................ :(System-on-Chip) "SoCs‬‬ ‫‪8-15-1‬‬
‫ﺣﻠﻮل ﺗﺼﻤﻴﻢ اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ ﻋﻠﻰ ﺷﺮاﺋﺢ )‪62 ... ................................ :(SOCs Design Solutions‬‬ ‫‪1-8-15-1‬‬
‫اﻟﻌﻨﺎﺻﺮ اﻷﺳﺎﺳﻴﺔ اﻟﱵ ﻣﻨﻬﺎ ﺗﺘﻜﻮن ﺷﺮاﺋﺢ اﻟـ‪63 . ................................ :(SoCs Components) SoCs‬‬ ‫‪2-8-15-1‬‬
‫ﻣﺮاﺣﻞ ﺗﺼﻤﻴﻢ اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ ﻋﻠﻰ ﺷﺮاﺋﺢ )‪63 ....... ................................ :(SoCs Design Stages‬‬ ‫‪3-8-15-1‬‬
‫ﺗﻄﺒﻴﻘﺎت ﺷﺎﺋﻌﺔ ﻟﻸﻧﻈﻤﺔ اﳌﺪﳎﺔ ﻋﻠﻰ ﺷﺮاﺋﺢ )‪64 ............................ :(SoCs Common Application‬‬ ‫‪4-8-15-1‬‬
‫اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ ﻋﻠﻰ اﻟﺸﺮاﺋﺢ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ "‪65 ....................... :(Programmable System-on-Chip) "PSoCs‬‬ ‫‪9-15-1‬‬
‫اﻟﺒﻨﻴﺔ اﻟﺪاﺧﻠﻴﺔ ﻟﺸﺮاﺋﺢ اﻟـ‪67 .......... ................................ ................................ :PSoCs‬‬ ‫‪1-9-15-1‬‬
‫اﻟﺒﻴﺌﺔ اﻟﱪﳎﻴﺔ ﻟﺸﺮاﺋﺢ اﻟـ‪69 ........... ................................ ................................ :PSoCs‬‬ ‫‪2-9-15-1‬‬
‫ﻣﺼﻔﻮﻓﺔ اﳌﻌﺎﳉﺎت اﻟﻐﲑ ﻣﺘﺰاﻣﻨﺔ ‪70 ......................... :(Asynchronous Array of simple Processors) AsAP‬‬ ‫‪10-15-1‬‬
‫اﳉﻴﻞ اﻷول ﳌﺼﻔﻮﻓﺔ اﳌﻌﺎﳉﺎت اﻟﻐﲑ ﻣﺘﺰاﻣﻨﺔ )‪70 . ................................ :(The AsAP 1st Generation‬‬ ‫‪1-15-10-1‬‬

‫اﳉﻴﻞ اﻟﺜﺎﱐ ﳌﺼﻔﻮﻓﺔ اﳌﻌﺎﳉﺎت اﻟﻐﲑ ﻣﺘﺰاﻣﻨﺔ )‪71 ............................. :(The AsAP 2nd Generation‬‬ ‫‪2-10-15-1‬‬
‫اﳉﻴﻞ اﻟﺜﺎﻟﺚ ﳌﺼﻔﻮﻓﺔ اﳌﻌﺎﳉﺎت اﻟﻐﲑ ﻣﺘﺰاﻣﻨﺔ )‪71 ............................. :(The AsAP 3rd Generation‬‬ ‫‪3-10-15-1‬‬
‫اﻷﻏﻠﻔﺔ ﻣﺘﻌﺪدة اﻟﺸﺮاﺋﺢ اﻟﺴﻴﻠﻴﻜﻮﻧﻴﺔ اﳌﺘﻜﺎﻣﻠﺔ "‪72 . ................................ :(Multi-Chip-Package) "MCP‬‬ ‫‪11-15-1‬‬
‫اﻟﻮﺣﺪة اﳌﺘﻜﺎﻣﻠﺔ ﻣﺘﻌﺪد اﻟﺸﺮاﺋﺢ "‪73 ... ................................ :(Multi-Chip-Module) "MCM‬‬ ‫‪1-11-15-1‬‬
‫اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ ﰲ ﻏﻼف "‪73 .............. ................................ :(System-in-Package) "SiP‬‬ ‫‪2-11-15-1‬‬
‫اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ ﻋﻠﻰ ﻏﻼف "‪75 ........... ................................ :(System-on-Package) "SoP‬‬ ‫‪3-11-15-1‬‬
‫اﻟﺸﺮاﺋﺢ اﳌﺪﳎﺔ ﻋﻠﻰ اﻟﺪارة اﳌﻄﺒﻮﻋﺔ ‪77 ... ................................ :177-179(Chip-on-Board) CoB‬‬ ‫‪4-11-15-1‬‬
‫ﺣﻘﺎﺋﻖ وﲢﺪﻳﺎت اﻗﺘﺼﺎدﻳﺔ ﺣﻮل اﳊﻠﻮل اﻟﺘﻜﻨﻮﻟﻮﺟﻴﺔ اﳌﺴﺘﻘﺒﻠﻴﺔ ﻟﻸﻧﻈﻤﺔ اﳌﺪﳎﺔ‪80 ....................... (THE E.SS, CHALLENGES) :‬‬ ‫‪16-1‬‬
‫اﳋﻼﺻﺔ )‪88 ............................... ................................ ................................ :(CONCLUSION‬‬ ‫‪17-1‬‬

‫‪ CHAPTER 2‬اﻟﻔﺼﻞ اﻟﺜﺎﻧﻲ ‪89 ........... ................................ ................................ ................................‬‬

‫اﳌﺼﻔﻮﻓﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ‪89 .. ................................ ................................ ................................‬‬

‫ﲤﻬﻴﺪ )‪89 ....... ................................ ................................ ................................ :(PREFACE‬‬ ‫‪1-2‬‬
‫ﺗﻄﺒﻴﻘﺎت اﻟـ‪ FPGA‬ﰲ اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ )‪90 .. ................................ :(EMBEDDED SYSTEMS FPGA APPLICATIONS‬‬ ‫‪2-2‬‬
‫ﺗﻄﺒﻴﻘﺎت اﻟـ‪ FPGA‬ﰲ اﻷﻧﻈﻤﺔ اﳊﺮﺟﺔ )‪90 ................................ :(FPGAS IN CRITICAL SYSTEM APPLICATIONS‬‬ ‫‪3-2‬‬
‫ﺗﻄﺒﻴﻘﺎت ﺗﻘﻨﻴﺔ اﻟـ‪ FPGA‬ﰲ أﲝﺎث اﻟﻔﻀﺎء )‪91 .............................. :(FPGAs for Aerospace Applications‬‬ ‫‪1-3-2‬‬
‫ﺗﻘﻨﻴﺔ اﻟـ‪ FPGA‬ﰲ اﳊﻮاﺳﺐ اﻟﻔﺎﺋﻘﺔ اﻷداء )‪91 ...... ................................ :(FPGAs for Supercomputing‬‬ ‫‪2-3-2‬‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪II‬‬
‫‪I‬‬ ‫اﶈﺘﻮى | ‪Index‬‬

‫ﺗﻘﻨﻴﺔ اﻟـ‪ FPGA‬ﰲ ﲢﻠﻴﻞ اﻹﺷﺎرات اﳌﺮﺋﻴﺔ )‪91 .......... ................................ :(FPGAs for Video Analysis‬‬ ‫‪3-3-2‬‬
‫ﺗﻘﻨﻴﺔ اﻟـ‪ FPGA‬ﰲ أﻧﻈﻤﺔ اﻟﺘﺸﻔﲑ ﻋﺎﻟﻴﺔ اﻷداء )‪92 ................. :(FPGAs for HighThroughput Cryptography‬‬ ‫‪4-3-2‬‬
‫ﺗﻘﻨﻴﺔ اﻟـ‪ FPGA‬ﰲ أﻧﻈﻤﺔ ﲪﺎﻳﺔ اﻟﺸﺒﻜﺎت )‪92 ................... :(FPGAs for High-Throughput Cryptography‬‬ ‫‪5-3-2‬‬
‫اﺳﱰاﺗﻴﺠﻴﺔ اﻟﺘﺼﻤﻴﻢ ‪ RP‬ﺑﺎﻻﻋﺘﻤﺎد ﻋﻠﻰ اﻟـ‪92 .............................. :(FPGA-BASED RAPID PROTOTYPING) FPGA‬‬ ‫‪4-2‬‬
‫ﺗﻘﻨﻴﺔ اﻟـ‪ FPGA‬ﰲ اﻟﺘﻌﻠﻴﻢ اﳍﻨﺪﺳﻲ )‪93 ... ................................ :(FPGA TECH. IN ENGINEERING EDUCATION‬‬ ‫‪5-2‬‬
‫اﳌﻘﺮرات اﻟﺘﺄﺳﻴﺴﻴﺔ ﻟﺘﻌﻠﻴﻢ ﺗﻘﻨﻴﺔ اﻟـ‪93 ....................... :(Essential Curriculum for Teaching FPGA) FPGA‬‬ ‫‪1-5-2‬‬
‫ﺗﻘﻨﻴﺔ اﻟـ‪ FPGA‬ﰲ ﳐﺘﱪ ﺗﺼﻤﻴﻢ اﻟﺪارات اﳌﻨﻄﻘﻴﺔ )‪93 ........................ :(FPGA-based Digital Electronic Lab‬‬ ‫‪2-5-2‬‬
‫ﺗﻘﻨﻴﺔ اﻟـ‪ FPGA‬ﰲ ﻣﻨﺎﻫﺞ ﺗﺼﻤﻴﻢ اﻷﻧﻈﻤﺔ اﻟﺮﻗﻤﻴﺔ اﳌﺘﻘﺪﻣﺔ )‪94 .................... :(FPGA-based Adv. ESs Courses‬‬ ‫‪3-5-2‬‬
‫ﺗﺒﲏ ﻣﻨﺎﻫﺞ ﺗﻌﻠﻴﻤﻴﺔ ﻟﱪﳎﺔ اﳌﻌﺎﳉﺎت ﺑﺎﺳﺘﺨﺪام اﻟـ‪94 .................. :(FPGA-based MPU Prog. Courses) FPGA‬‬ ‫‪4-5-2‬‬
‫ﺗﺒﲏ ﻣﻨﺎﻫﺞ ﺗﺼﻤﻴﻢ اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ ﺑﺎﺳﺘﺨﺪام ﺗﻘﻨﻴﺔ اﻟـ‪94 ........................ :(FPGA-based ESs Courses) FPGA‬‬ ‫‪5-5-2‬‬
‫ﻟﻮﺣﺎت اﻟﺘﻄﻮﻳﺮ اﻟﺘﻌﻠﻴﻤﻴﺔ ﻟﺸﺮاﺋﺢ اﻟـ‪95 ....................... :(Educational FPGA Development Boards) FPGA‬‬ ‫‪6-5-2‬‬
‫ﳓﻮ ﻣﻨﻬﺠﻴﺔ اﻟﺘﻌﻠﻢ اﻟﺘﺸﺎرﻛﻲ اﻟﺘﻌﺎوﱐ )‪96 ........................ :(Toward Cooperative Learning Methodology‬‬ ‫‪7-5-2‬‬
‫ﺣﺎﺟﺎت اﻟﺼﻨﺎﻋﺔ إﱃ ﻣﻬﻨﺪﺳﻲ ﺗﺼﻤﻴﻢ أﻧﻈﻤﺔ اﻟـ‪96 .............................. :(FPGA ENG. INDUSTRY DEMAND) FPGA‬‬ ‫‪6-2‬‬
‫اﻟﺮﺑﻂ ﺑﲔ اﳌﻨﺎﻫﺞ اﻟﻨﻈﺮﻳﺔ واﻟﺼﻨﺎﻋﺔ )‪97 .. ................................ :(LINKING AMONG CURRICULUM & INDUSTRY‬‬ ‫‪7-2‬‬
‫اﳌﺪﺧﻞ إﱃ دراﺳﺔ اﳌﺼﻔﻮﻓﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً )‪98 ... ................................ :(INTRODUCTION TO FPGAS‬‬ ‫‪8-2‬‬
‫ﺗﻌﺮﻳﻒ اﻟـ ‪98 ................................ ................................ :(What does FPGA mean?) FPGA‬‬ ‫‪1-8-2‬‬
‫أﺻﻞ ﻧﺸﻮء ﺗﻘﻨﻴﺔ اﻟـ‪98 ............................ ................................ :(The Origin of FPGA) FPGA‬‬ ‫‪2-8-2‬‬
‫ﻣﺒﺎدئ ﰲ اﻟﻌﻨﺎﺻﺮ اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ )‪98 ....................... ................................ :(Basics of PLD's‬‬ ‫‪3-8-2‬‬
‫ﺗﻘﻨﻴﺎت اﻟﻮﺻﻼت اﳌﻨﻄﻘﻴﺔ ﰲ اﻟﻌﻨﺎﺻﺮ اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ )‪98 ................... :(PLD’s Link Technologies‬‬ ‫‪1-3-8-2‬‬
‫اﻟﻌﻨﺎﺻﺮ اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ )‪105 .............. ................................ :(Programmable Logic Devices‬‬ ‫‪4-8-2‬‬
‫اﻟﻌﻨﺎﺻﺮ اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺑﺴﻴﻄﺔ اﻟﺒﻨﻴﺔ )‪106 .................. :(Simple Programmable Logic Devices‬‬ ‫‪1-4-8-2‬‬
‫اﻟﻌﻨﺼﺮ اﳌﻨﻄﻘﻲ ﻣﻌﻘﺪ اﻟﺒﻨﻴﺔ‪110 ......................... :(Complex Programmable Logic Device) CPLD‬‬ ‫‪2-8-4-2‬‬

‫ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ”‪112 ...................:(Field Programmable Gate Array) “FPGA‬‬ ‫‪2-8-4-3‬‬

‫ﻣﺼﻔﻮﻓﺔ اﻷﻏﺮاض اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ‪138 ................. :(Field Programmable Object Array) FPOA‬‬ ‫‪4-4-8-2‬‬
‫ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت ‪140 ... ................................ :(Masked Programmable Gate Array) MPGA‬‬ ‫‪5-4-8-2‬‬
‫ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳍﺠﻴﻨﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً )‪140 .. ................................ :(Mixed-signal FPGAs‬‬ ‫‪6-4-8-2‬‬
‫اﳋﻼﺻﺔ )‪142 ............................. ................................ ................................ :(CONCLUSION‬‬ ‫‪9-2‬‬

‫‪ CHAPTER 3‬اﻟﻔﺼﻞ اﻟﺜﺎﻟﺚ ‪143 ........ ................................ ................................ ................................‬‬

‫ﻟﻐﺎت ﺑﺮﳎﺔ اﻟﻜﻴﺎن اﻟﺼﻠﺐ ‪143 ............. ................................ ................................ ................................‬‬

‫ﲤﻬﻴﺪ )‪143 ..... ................................ ................................ ................................ :(PREFACE‬‬ ‫‪1-3‬‬
‫اﻟﺴﻌﻲ ﳓﻮ ﺑﺮﳎﺔ ﻋﺎﻟﻴﺔ اﳌﺴﺘﻮى‪ ،‬ﶈﺔ ﺗﺎرﳜﻴﺔ )‪144 ............................... :(TOWARD HLL, HISTORICAL OVERVIEW‬‬ ‫‪2-3‬‬
‫ﺗﺼﻨﻴﻒ ﻟﻐﺎت ﺑﺮﳎﺔ اﻟﻜﻴﺎن اﻟﺼﻠﺐ )‪145 ........................... :(HARDWARE PROGRAMMING LANGUAGES SORTS‬‬ ‫‪3-3‬‬
‫ﻟﻐﺎت اﻟﱪﳎﺔ اﻟﺘﺨﻄﻴﻄﻴﺔ )‪145 ........ ................................:(Schematic-based Programming Languages‬‬ ‫‪3-3-1‬‬

‫ﻟﻐﺎت وﺻﻒ اﻟﻜﻴﺎن اﻟﺼﻠﺐ ”‪146 ... ................................ :(Hardware Description Languages) “HDLs‬‬ ‫‪3-3-2‬‬

‫‪III‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 Table of Contents | ‫ﻗﺎﺋﻤﺔ اﶈﺘﻮﻳﺎت‬

146 ........................:(Very High Speed IC Hardware Description Language) VHDL‫ﻟﻐﺔ اﻟـ‬ 1-2-3-3
148 ....................... :[386,387](Verilog Hardware Description Language) Verilog-HDL‫ﻟﻐﺔ اﻟـ‬ 2-2-3-3
150 ................................ :(Pebble Hardware Description Language) Pebble-HDL‫ﻟﻐﺔ اﻟـ‬ 3-2-3-3
150 . ................................ :(HML Hardware Description Language) HardwareML‫ﻟﻐﺔ اﻟـ‬ 4-2-3-3
150 ............. ................................ :(Lava Hardware Description Language) Lava‫ﻟﻐﺔ اﻟـ‬ 5-2-3-3
150 ................... :(High-level Hardware Programming Language) ‫ﻟﻐﺎت ﺑﺮﳎﺔ اﻟﻜﻴﺎن اﻟﺼﻠﺐ ﻋﺎﻟﻴﺔ اﳌﺴﺘﻮى‬ 3-3-3

151 .... ................................ :(Java-based Hardware Description Language) JHDL‫ﻟﻐﺔ اﻟـ‬ 1-3-3-3
151 ............................. :(: C-based Hardware Programming Language) Catapult-C ‫اﻟﺒﻴﺌﺔ‬ 2-3-3-3
152 ................ :(Impulse-C: C-based Hardware Programming Language) Impulse-C‫اﻟﺒﻴﺌﺔ ـ‬ 3-3-3-3
153 .................. :(Handle-C: C-based Hardware Programming Language) Handel-C ‫اﻟﺒﻴﺌﺔ‬ 4-3-3-3
154 ........ ................................ :(SAFL Hardware Programming Language) SAFL ‫اﻟﻠﻐﺔ‬ 5-3-3-3
155 .... ................................:(SAFL Hardware Programming Language) DIME-C ‫اﻟﺒﻴﺌﺔ‬ 6-3-3-3
156 ........................ :(Spec-C: C-based Hardware Programming Language) Spec-C ‫اﻟﻠﻐﺔ‬ 7-3-3-3
156 ..................... :(SystemC: C-based Hardware Programming Language) SystemC ‫اﻟﻠﻐﺔ‬ 8-3-3-3
157 ................ :(Other Hardware Programming Languages & Tools) ‫أدوات وﺑﻴﺌﺎت ﺑﺮﳎﻴﺔ أﺧﺮى‬ 9-3-3-3
158 ............................ :(Hardware Tools: Comparisons & Classifications) ‫ﻣﻘﺎرﻧﺔ وﺗﺼﻨﻴﻒ‬ 10-3-3-3
159 ..........................:(Graphical Hardware Programming Language) ‫ﻟﻐﺎت ﺑﺮﳎﺔ اﻟﻜﻴﺎن اﻟﺼﻠﺐ اﻟﺮﺳﻮﻣﻴﺔ‬ 3-3-4

160 .........................:(The Importance of Graphical Programming) ‫أﳘﻴﺔ ﻟﻐﺎت اﻟﱪﳎﺔ اﻟﺮﺳﻮﻣﻴﺔ‬ 1-4-3-3
162 ................ :(Graphical Programming in Curriculums) ‫ﻟﻐﺎت اﻟﱪﳎﺔ اﻟﺮﺳﻮﻣﻴﺔ ﰲ اﳌﻨﺎﻫﺞ اﻟﺘﻌﻠﻴﻤﻴﺔ‬ 2-4-3-3
162 .............................. :(LabVIEW Programming Environment) LabVIEW ‫اﻟﺒﻴﺌﺔ اﻟﱪﳎﻴﺔ‬ 3-4-3-3
184 ............................. ................................ ................................ :(CONCLUSION) ‫اﳋﻼﺻﺔ‬ 4-3

185 ......... ................................ ................................ ................................ ‫ اﻟﻔﺼﻞ اﻟﺮاﺑﻊ‬CHAPTER 4

185 ............. ................................ ................................ ................................ ‫ﻣﻨﻬﺠﻴﺎت اﻟﺘﻌﻠﻴﻢ اﳍﻨﺪﺳﻲ‬

185 ..... ................................ ................................ ................................ :(PREFACE) ‫ﲤﻬﻴﺪ‬ 1-4
187 .. ................................ :(INTRODUCTION TO ENGINEERING EDUCATION) ‫ﻣﻘﺪﻣﺔ ﺣﻮل اﻟﺘﻌﻠﻴﻢ اﳍﻨﺪﺳﻲ‬ 2-4
189 .... ................................ ................................ :(THE PEDAGOGY) "‫ﻋﻠﻢ أﺻﻮل اﻟﺘﺪرﻳﺲ "اﻟﺒﻴﺪاﻏﻮﺟﻴﺎ‬ 3-4
190 .............. ................................ ................................ :(LEARNING THEORIES) ‫ﻧﻈﺮﻳﺎت اﻟﺘﻌﻠﻢ‬ 4-4
191 ............. ................................ ................................ :(Behaviourism) ‫اﻟﻨﻈﺮﻳﺔ اﻟﺴﻠﻮﻛﻴﺔ‬ 1-4-4
191 . ................................ :(Benefits of Behaviourism) ‫أﻫﻢ ﺧﺼﺎﺋﺺ اﻟﺘﻌﻠﻢ ﻣﻦ اﳌﺪﺧﻞ اﻟﺴﻠﻮﻛﻲ‬ 1-1-4-4
192 ............. ................................ :(Behaviorism Theory Principles) ‫ﻣﺒﺎدئ اﻟﻨﻈﺮﻳﺔ اﻟﺴﻠﻮﻛﻴﺔ‬ 4-4-1-2

192 .............. ................................ ................................ :(Cognitivism) ‫اﻟﻨﻈﺮﻳﺔ اﻹدراﻛﻴﺔ‬ 2-4-4

193 .. ................................ :(Benefits of Cognitivism) ‫أﻫﻢ ﺧﺼﺎﺋﺺ اﻟﺘﻌﻠﻢ ﻣﻦ اﳌﺪﺧﻞ اﻹدراﻛﻲ‬ 1-2-4-4
193 .................. ................................:(Elements of Cognitivism) ‫ﻋﻨﺎﺻﺮ اﻟﻨﻈﺮﻳﺔ اﻹدراﻛﻴﺔ‬ 2-2-4-4
196 ............ ................................ ................................ :(Connectivism) ‫اﻟﻨﻈﺮﻳﺔ اﻻﺗﺼﺎﻟﻴﺔ‬ 3-4-4

Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages IV
I Index | ‫اﶈﺘﻮى‬

197 ............. ................................ ................................ :(Constructivism) ‫اﻟﻨﻈﺮﻳﺔ اﻟﺒﻨﺎﺋﻴﺔ‬ 4-4-4

199 ....... ................................ :(Constructivist Learning Stanchions) ‫ﻣﺮﺗﻜﺰات اﻟﺘﻌﻠﻢ اﻟﺒﻨﺎﺋﻲ‬ 1-4-4-4
199 ..................... :(Implications of Constructivist Instructional) ‫ﻣﻘﺘﻀﻴﺎت ﺗﺼﻤﻴﻢ اﻟﺘﻌﻠﻴﻢ اﻟﺒﻨﺎﺋﻲ‬ 2-4-4-4
203 .... ................................ :(Constructivist Learning Methods) ‫أﺷﻜﺎل وﺻﻴﻎ اﻟﺘﻌﻠﻢ اﻟﺒﻨﺎﺋﻲ‬ 3-4-4-4
219 ......................... :(CONTROL SYSTEMS ENGINEERING IN PEDAGOGY) ‫ﻫﻨﺪﺳﺔ أﻧﻈﻤﺔ اﻟﺘﺤﻜﻢ ﰲ اﻟﺒﻴﺪاﻏﻮﺟﻴﺎ‬ 5-4
220 ..................... :(Introduction to Control Systems Feedback) ‫ﻣﻘﺪﻣﺔ ﻋﻦ اﻟﺘﻐﺬﻳﺔ اﻟﻌﻜﺴﻴﺔ ﰲ ﻧﻈﻢ اﻟﺘﺤﻜﻢ‬ 4-5-1

220 ...................... :(Feedback and Formative Assessment Research) ‫اﻟﺘﻐﺬﻳﺔ اﻟﻌﻜﺴﻴﺔ وأﲝﺎث اﻟﺘﻘﻴﻴﻢ اﻟﺒﻨﺎﺋﻲ‬ 4-5-2

222 .. ................................ :(Self-Regulated Learning Research) “SRL” ‫أﲝﺎث اﻟﺘﻌﻠﻢ ذاﰐ اﻟﺘﻨﻈﻴﻢ‬ 3-5-4
224 .................. ................................ :(Instructional Design Research) ‫أﲝﺎث اﻟﺘﺼﻤﻴﻢ اﻟﺘﻌﻠﻴﻤﻲ‬ 4-5-4
225 ....... ................................ ................................ :(LABORATORY EDUCATION) ‫اﻟﺘﻌﻠﻴﻢ اﳌﺨﱪي‬ 6-4
225 ............... ................................ :(Laboratory Education Objectives) ‫أﻫﺪاف اﻟﺘﻌﻠﻴﻢ اﳌﺨﱪي‬ 1-6-4
226 .............................. ................................ :(Laboratories Styles) “LSs” ‫ﺗﺼﻨﻴﻔﺎت اﳌﺨﺎﺑﺮ‬ 2-6-4
226 .............................:(LSs from the Structure Perspective) ‫ﺗﺼﻨﻴﻒ اﳌﺨﺎﺑﺮ ﻣﻦ ﻣﻨﻈﻮر اﳍﻴﻜﻠﻴﺔ‬ 1-2-6-4
227 ..................... :(LSs from the Access Mode Perspective) ‫ﺗﺼﻨﻴﻒ اﳌﺨﺎﺑﺮ ﻣﻦ ﳕﻂ اﻟﻮﺻﻮل إﻟﻴﻬﺎ‬ 2-2-6-4
235 ................ ................................:(EDUCATIONAL THEORIES DISCUSSION) ‫ﻣﻨﺎﻗﺸﺔ اﻟﻨﻈﺮﻳﺎت اﻟﺘﻌﻠﻴﻤﻴﺔ‬ 7-4
237 ............................. ................................ ................................ :(CONCLUSION) ‫اﳋﻼﺻﺔ‬ 8-4

239 ...... ................................ ................................ ................................ ‫ اﻟﻔﺼﻞ اﻟﺨﺎﻣﺲ‬CHAPTER 5

239 .......... ................................ ................................ ................................ ‫ﳓﻮ ﳕﻮذج ﺑﻨﺎﺋﻲ ﻟﻠﺘﻌﻠﻴﻢ اﳌﺨﱪي‬
239 ..... ................................ ................................ ................................ :(PREFACE) ‫ﲤﻬﻴﺪ‬ 1-5
240 .................... :(STATISTICAL METHODS IN EDUCATIONAL RESEARCH) ‫اﻟﻄﺮق اﻹﺣﺼﺎﺋﻴﺔ ﰲ اﻷﲝﺎث اﻟﱰﺑﻮﻳﺔ‬ 2-5
240 ............... ................................ :(Statistical Hypothesis Testing) ‫اﺧﺘﺒﺎرات اﻟﻔﺮوض اﻹﺣﺼﺎﺋﻴﺔ‬ 1-2-5
241 ..... ................................ ................................ :(The Hypothesis Types) ‫أﻧﻮاع اﻟﻔﺮض‬ 2-2-5
241 ........................ ................................ :(The Null-Hypothesis) H0 ‫اﻟﻔﺮض اﻟﺼﻔﺮي‬ 1-2-2-5
241 ................... ................................ :(The Alternative Hypothesis) H1 ‫اﻟﻔﺮض اﻟﺒﺪﻳﻞ‬ 2-2-2-5
241 .............................. :(The Hypothesis Statistical Tests Types) ‫أﻧﻮاع اﻻﺧﺘﺒﺎرات اﻹﺣﺼﺎﺋﻴﺔ ﻟﻠﻔﺮض‬ 3-2-5
242 ...... ................................ ................................:(Level of Significance) ‫ﻣﺴﺘﻮى اﻷﳘﻴﺔ‬ 4-2-5
243 ............... ................................ :(The Mann-Whitney U Test & Wilcoxon Test) ‫اﺧﺘﺒﺎر‬ 5-2-5
244 ..... ................................ ................................ :(Comparing Means) ‫ﻣﻘﺎرﻧﺔ اﳌﺘﻮﺳﻄﺎت‬ 6-2-5
244 .................. ................................ :(Statistical Test Process) ‫ﺧﻄﻮات إﺟﺮاء اﻻﺧﺘﺒﺎر اﻹﺣﺼﺎﺋﻲ‬ 7-2-5
246 ............. ................................ :(Calculating the Test Statistic) ‫ﻃﺮق ﺣﺴﺎب إﺣﺼﺎﺋﻴﺔ اﻻﺧﺘﺒﺎر‬ 8-2-5
246 ..... ................................ :(Statistical Package for the Social Sciences) SPSS ‫اﳊﺰﻣﺔ اﻹﺣﺼﺎﺋﻴﺔ‬ 9-2-5
247 ............................... :(IMPLEMENTATION OF EMBEDDED SYSTEMS LAB) ‫ﺗﺼﻤﻴﻢ وﺑﻨﺎء ﳐﱪ اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ‬ 3-5
247 ..........................:(Designing The Laboratory Development Board) ‫ﺗﺼﻤﻴﻢ ﻟﻮﺣﺔ اﻟﺘﻄﻮﻳﺮ اﳌﺨﱪﻳﺔ‬ 1-3-5
250 ............. ................................ :(Integrated Development Environment) ‫ﺑﻴﺌﺔ اﻟﺘﻄﻮﻳﺮ اﻟﱪﳎﻴﺔ‬ 2-3-5

V ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 Table of Contents | ‫ﻗﺎﺋﻤﺔ اﶈﺘﻮﻳﺎت‬

251 .............................. ................................ :(The Simulation Environment) ‫ﺑﻴﺌﺔ اﶈﺎﻛﺎة‬ 3-3-5

253 ..................... :(Experiments Manual Preparing Methodology) ‫ﻣﻨﻬﺠﻴﺔ إﻋﺪاد دﻟﻴﻞ اﻟﺘﺠﺎرب اﻟﻌﻤﻠﻴﺔ‬ 4-3-5
253 ................ :(Survey and Evaluation of the Educational System) ‫اﺳﺘﻄﻼع رأي وﺗﻘﻴﻴﻢ ﻟﻠﻨﻈﺎم اﻟﺘﻌﻠﻴﻤﻲ‬ 5-3-5
255 ........................ :(PEDAGOGICALLY …) ‫ ﺷﺮح ﺿﻌﻒ ﻧﺘﺎﺋﺞ اﳌﺨﺎﺑﺮ اﻟﺘﻄﺒﻴﻘﻴﺔ اﳌﺴﺘﻨﺪة إﱃ ﻧﻈﺮﻳﺔ ﻛﻮﻟﺐ ﻣﻦ وﺟﻬﺔ ﻧﻈﺮ ﺑﻴﺪاﻏﻮﺟﻴﺔ‬4-5
255 .......................... :(The Virtual Lab in a Preparation Session) ‫اﳌﺨﱪ اﻻﻓﱰاﺿﻲ ﰲ اﳉﻠﺴﺔ اﻟﺘﺤﻀﲑﻳﺔ‬ 1-4-5
256 .................. :(Conducting the Virtual Pre-Lab Strategy) ‫اﺳﱰاﺗﻴﺠﻴﺔ ﺗﻄﺒﻴﻖ اﳌﺨﺘﱪ اﻻﻓﱰاﺿﻲ اﻟﺘﺤﻀﲑي‬ 2-4-5
257 .......... ................................ :(Classical Group Methodology) ‫ﻬﺠﻴﺔ اﺠﻤﻟﻤﻮﻋﺔ اﻟﻘﻴﺎﺳﻴﺔ‬ 1-2-4-5
258 .......... ................................ :(Experimental Group Methodology) ‫ﻤﻟﻤﻮﻋﺔ اﻻﺧﺘﺒﺎرﻳﺔ‬ 2-2-4-5
258 ........................ :(The Experiments and their Main Goals) ‫اﻟﺘﺠﺎرب اﻻﺧﺘﺒﺎرﻳﺔ واﻷﻫﺪاف اﻟﺮﺋﻴﺴﻴﺔ ﳍﺎ‬ 3-4-5
261 ................... :(The Pedagogical Effectiveness Measurement Methodology) ‫ﻣﻨﻬﺠﻴﺔ ﻗﻴﺎس اﻟﻔﻌﺎﻟﻴﺔ‬ 4-4-5
264 ............................. :(TOWARD A MULTI-STYLE LAB - “HYBRID LAB”) ‫ﳓﻮ ﺑﻨﺎء ﳐﺘﱪ ﻫﺠﲔ ﻣﺘﻌﺪد اﻷﳕﺎط‬ 5-5
265 ............................ :(OPEN/CLOSE LOOP MATHEMATICAL MODEL) ‫اﻟﺘﻤﺜﻴﻞ اﻟﺮﻳﺎﺿﻲ ﻟﻠﺤﻠﻘﺔ اﳌﻔﺘﻮﺣﺔ واﳌﻐﻠﻘﺔ‬ 6-5
265 .............................. :(Why Engineering Models of Learning) ً‫اﳍﺪف ﻣﻦ ﳕﺎذج ﺗﻌﻠﻢ ﻣﻨﻤﺬﺟﺔ ﻫﻨﺪﺳﻴﺎ‬ 5-6-1

266 .... ................................:(Engineering Modeling of Learning Process) ً‫ﳕﺬﺟﺔ ﻋﻤﻠﻴﺔ اﻟﺘﻌﻠﻢ ﻫﻨﺪﺳﻴﺎ‬ 5-6-2

266 ................. :(Modeling of Open-loop Learning Process) ‫ﳕﺬﺟﺔ ﻋﻤﻠﻴﺔ اﻟﺘﻌﻠﻢ ﰲ اﳊﻠﻘﺔ اﳌﻔﺘﻮﺣﺔ‬ 1-2-6-5
271 ................... :(Modeling of Close-loop Learning Process) ‫ﳕﺬﺟﺔ ﻋﻤﻠﻴﺔ اﻟﺘﻌﻠﻢ ﰲ اﳊﻠﻘﺔ اﳌﻐﻠﻘﺔ‬ 2-2-6-5
277 ............................. :(CONDUCTING OPEN-CLOSE LOOP MODEL) ً‫ﺗﻄﺒﻴﻖ ﳕﻮذج اﳊﻠﻘﺔ اﳌﻔﺘﻮﺣﺔ واﳌﻐﻠﻘﺔ ﺗﺮﺑﻮﻳﺎ‬ 7-5
277 ................. ................................ :(Classical Group Methodology) ‫ﻬﺠﻴﺔ اﺠﻤﻟﻤﻮﻋﺔ اﻟﻘﻴﺎﺳﻴﺔ‬ 1-7-5
278 .......... ................................ :(Experimental Group Methodology) ‫ﻬﺠﻴﺔ اﺠﻤﻟﻤﻮﻋﺔ اﻻﺧﺘﺒﺎرﻳﺔ‬ 2-7-5
280 ........................ :(The Experiments and their Main Goals) ‫اﻟﺘﺠﺎرب اﻻﺧﺘﺒﺎرﻳﺔ واﻷﻫﺪاف اﻟﺮﺋﻴﺴﻴﺔ ﳍﺎ‬ 3-7-5
281 .......................... :(Experimental Group Assignments) ‫ﺸﺎرﻳﻊ اﳌﺴﻨﺪة إﱃ اﺠﻤﻟﻤﻮﻋﺔ اﻻﺧﺘﺒﺎرﻳﺔ‬ 1-3-7-5
282 .................... :(Experimental Group Assig. Observation) ‫ﺘﻄﻼع ﻣﺸﺎرﻳﻊ اﺠﻤﻟﻤﻮﻋﺔ اﻻﺧﺘﺒﺎرﻳﺔ‬ 2-3-7-5
282 .... ................................ :(Sudden Exam for Both Groups) ‫ﺘﺒﺎر ﻣﻔﺎﺟﺊ ﻟﻜﻼ اﺠﻤﻟﻤﻮﻋﺘﲔ‬ 3-3-7-5
283 ................... :(The Pedagogical Effectiveness Measurement Methodology) ‫ﻣﻨﻬﺠﻴﺔ ﻗﻴﺎس اﻟﻔﻌﺎﻟﻴﺔ‬ 4-7-5
284 .............. ................................ :(The 1st Evaluation Measure) ‫اﻟﻘﻴﺎس اﻻﺧﺘﺒﺎري اﻷول‬ 1-4-7-5
285 .............. ................................ :(The 2nd Evaluation Measure) ‫اﻟﻘﻴﺎس اﻻﺧﺘﺒﺎري اﻟﺜﺎﱐ‬ 2-4-7-5
286 ............. ................................ :(The 3rd Evaluation Measure) ‫اﻟﻘﻴﺎس اﻻﺧﺘﺒﺎري اﻟﺜﺎﻟﺚ‬ 3-4-7-5
287 .............. ................................ :(The 4th Evaluation Measure) ‫اﻟﻘﻴﺎس اﻻﺧﺘﺒﺎري اﻟﺮاﺑﻊ‬ 4-4-7-5
288 ............ ................................ :(The 5th Evaluation Measure) ‫اﻟﻘﻴﺎس اﻻﺧﺘﺒﺎري اﳋﺎﻣﺲ‬ 5-4-7-5
289 ............ ................................:(The 6th Evaluation Measure) ‫اﻟﻘﻴﺎس اﻻﺧﺘﺒﺎري اﻟﺴﺎدس‬ 6-4-7-5
291 ............. ................................ :(The 7th Evaluation Measure) ‫اﻟﻘﻴﺎس اﻻﺧﺘﺒﺎري اﻟﺴﺎﺑﻊ‬ 7-4-7-5
292 ................ ................................ :(Discussing the Empirical Results) ‫ﻣﻨﺎﻗﺸﺔ اﻟﻨﺘﺎﺋﺞ اﻟﺘﺠﺮﻳﺒﻴﺔ‬ 5-7-5
293 ...................... ................................ :(Distinguished Notable Results) ‫ﻧﺘﺎﺋﺞ ﺟﺪﻳﺮة ﺑﺎﳌﻼﺣﻈﺔ‬ 5-7-6

294 .......................... :(TOWARD A COMPREHENSIVE EDUCATIONAL MODEL) ‫ﳓﻮ ﺗﻄﻮﻳﺮ ﳕﻮذج ﺗﻌﻠﻴﻤﻲ ﺷﺎﻣﻞ‬ 8-5
297 ............... ................................ ................................ :(Course Goals) ‫أﻫﺪاف اﳌﻘﺮر‬ 1-8-5
Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages VI
I Index | ‫اﶈﺘﻮى‬

297 .............................. ................................ :(Learning Styles Inventory) ‫اﺳﺘﺒﻴﺎن أﳕﺎط اﻟﺘﻌﻠﻢ‬ 5-8-2

297 ............................. :(VARK Learning Styles Questionary) VARK‫اﺳﺘﺒﻴﺎن أﳕﺎط اﻟﺘﻌﻠﻢ ﻟ ـ‬ 1-2-8-5
300 ............................. :(Kolb Learning Styles Questionary) Kolb‫ﳕﻮذج اﺳﺘﺒﻴﺎن أﳕﺎط اﻟﺘﻌﻠﻢ ﻟـ ـ‬ 2-2-8-5
306 ..................... ................................ :(Set Teaching Methodology) ‫وﺿﻊ اﳌﻨﻬﺠﻴﺔ اﻟﺘﺪرﻳﺴﻴﺔ‬ 3-8-5
306 ........... ................................ ................................ :(Sessions Goals) ‫أﻫﺪاف اﳉﻠﺴﺎت‬ 4-8-5
306 . ................................ ................................ :(Classroom Session) ‫اﳉﺎﻧﺐ اﻟﻨﻈﺮي‬ 1-4-8-5
307 ........................ ................................ :(Laboratory Sessions) ‫اﳉﺎﻧﺐ اﳌﺨﱪي اﻟﻌﻤﻠﻲ‬ 2-4-8-5
307 ....... ................................ ................................ :(Sessions Outcomes) ‫ﻧﺘﺎﺋﺞ اﳉﻠﺴﺎت‬ 5-8-5
307 ................ ................................ ................................ :(Student Role) ‫دور اﻟﻄﺎﻟﺐ‬ 6-8-5
308 .............. ................................ ................................ :(Course Project) ‫ﻣﺸﺮوع اﳌﻘﺮر‬ 7-8-5
308 ............... ................................ :(Calculating the Activities Average) ‫ﺣﺴﺎب اﶈﺼﻠﺔ اﻟﻌﺎﻣﺔ‬ 8-8-5
308 ......................... :(Mapping the new Model to Kolb’s Cycle) Kolb ‫رﺑﻂ اﻟﻨﻤﻮذج اﳉﺪﻳﺪ ﺑﻨﻤﻮذج دورة‬ 5-8-9

309 ............................. ................................ ................................ :(CONCLUSION) ‫اﳋﻼﺻﺔ‬ 9-5

311 ...... ................................ ................................ ................................ ‫ اﻟﻔﺼﻞ اﻟﺴﺎدس‬CHAPTER 6

311 ................ ................................ ................................ ................................ ‫ﺗﺼﻤﻴﻢ اﻟﺘﺠﺎرب اﳌﺨﱪﻳﺔ‬

311 ..... ................................ ................................ ................................ :(PREFACE) ‫ﲤﻬﻴﺪ‬ 1-6
312 ................. ................................ :(SPARTAN-3E DEVELOPMENT KIT) SPARTAN-3E ‫ﻟﻮﺣﺔ اﻟﺘﻄﻮﻳﺮ‬ 2-6
314 ......................... (DESIGNING A COMPREHENSIVE PERIPHERAL MODULES) ‫ﺗﺼﻤﻴﻢ وﺣﺪات ﳏﻴﻄﻴﺔ ﴰﻮﻟﻴﺔ‬ 3-6
315 ............................... :(METHODOLOGY OF THE EXPERIMENTS DESIGN) ‫ﻣﻨﻬﺠﻴﺔ ﺗﺼﻤﻴﻢ اﻟﺘﺠﺎرب اﻟﻌﻤﻠﻴﺔ‬ 4-6
315 . ................................ ................................ :(THE DESIGNED EXPERIMENTS) ‫اﻟﺘﺠﺎرب اﳌﺼﻤﻤﺔ‬ 5-6
316 ............................:(INTRODUCTION TO LABVIEW FPGA MODEL) LABVIEW FPGA ‫ﻣﺪﺧﻞ إﱃ ﺑﻴﺌﺔ‬ 6-6

322 ....................... :(LABORATORY EXPERIMENTS DESIGN METHODOLOGY) ‫ﻣﻨﻬﺠﻴﺔ إﻋﺪاد اﻟﺘﺠﺎرب اﳌﺨﱪﻳﺔ‬ 7-6
322 .................:(Exp.1: Dealing with Input-Output Pins) ‫ اﻟﺘﻌﺎﻣﻞ ﻣﻊ أﻗﻄﺎب اﻟﺪﺧﻞ واﳋﺮج‬:‫اﻟﺘﺠﺮﺑﺔ اﻷوﱃ‬ 1-7-6
322 ......... ................................:(Introduction about the Experiment) ‫ﻣﻘﺪﻣﺔ ﺣﻮل اﻟﺘﺠﺮﺑﺔ‬ 1-1-7-6
322 .................... ................................ :(The Experiment Objective) ‫اﳍﺪف ﻣﻦ اﻟﺘﺠﺮﺑﺔ‬ 2-1-7-6
322 .................... :(The Schematic Diagram & Hardware) ‫اﳌﺨﻄﻂ اﻟﻨﻈﺮي وﻋﻨﺎﺻﺮ اﻟﻜﻴﺎن اﻟﺼﻠﺐ‬ 3-1-7-6
326 . ................................ ................................ :(Background Theory) ‫ﻣﻘﺪﻣﺔ ﻧﻈﺮﻳﺔ‬ 4-1-7-6
326 .............................. :(Data Flow within the FPGA) FPGA‫ﺗﺪﻓﻖ اﻟﺒﻴﺎﻧﺎت ﰲ داﺧﻞ ﺷﺮﳛﺔ اﻟـ‬ 5-1-7-6
330 ................. ................................ :(The Program Flowchart) ‫اﳌﺨﻄﻂ اﳌﻨﻬﺠﻲ ﻟﻠﱪﻧﺎﻣﺞ‬ 6-1-7-6
330 . ................................ ................................ :(Pre-Lab1 Session) ‫اﳌﺨﱪ اﻟﺘﻤﻬﻴﺪي‬ 7-1-7-6
335 ............................. ................................ :(How does it Work?) ‫ﻣﺒﺪأ ﻋﻤﻞ اﻟﺘﺠﺮﺑﺔ‬ 8-1-7-6
335 .............. ................................ :(Pre-Lab1 Assignment) ‫ﻧﺸﺎط إﺿﺎﰲ ﻟﻠﻤﺨﺘﱪ اﻟﺘﻤﻬﻴﺪي‬ 9-1-7-6
335 ............................ ................................:(Hands-on Lab1 Session) ‫ﺟﻠﺴﺔ اﳌﺨﱪ اﻟﺘﻄﺒﻴﻘﻲ‬ 2-7-6
338 ............................. ................................ :(How does it Work?) ‫ﻣﺒﺪأ ﻋﻤﻞ اﻟﺘﺠﺮﺑﺔ‬ 1-2-7-6

VII ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 Table of Contents | ‫ﻗﺎﺋﻤﺔ اﶈﺘﻮﻳﺎت‬

338 ............................ ................................ :(Main-Lab1 Quiz) ‫أﺳﺌﻠﺔ اﳌﺨﺘﱪ اﻟﺘﻄﺒﻴﻘﻲ‬ 2-2-7-6

338 .............. ................................ :(Mian-Lab1 Assignment) ‫ﻧﺸﺎط إﺿﺎﰲ ﻟﻠﻤﺨﺘﱪ اﻟﺘﻄﺒﻴﻘﻲ‬ 6-7-2-3

339 .............................. ................................ :(Remote Lab1 Session) ‫ﺟﻠﺴﺔ اﳌﺨﱪ ﻋﻦ ﺑﻌﺪ‬ 3-7-6
343 ............................. ................................ ................................ :(CONCLUSION) ‫اﳋﻼﺻﺔ‬ 8-6

345 .......... ................................ ................................ ................................ (REFERENCES) ‫اﻟﻤﺮاﺟﻊ‬

375 ...... ................................ ................................ ................................ (APPENDIX 1) ‫اﻟﻤﻠﺤﻖ اﻷول‬

381 ...... ................................ ................................ ................................ (APPENDIX 2) ‫اﻟﻤﻠﺤﻖ اﻟﺜﺎﻧﻲ‬

393 ..... ................................ ................................ ................................ (APPENDIX 3) ‫اﻟﻤﻠﺤﻖ اﻟﺜﺎﻟﺚ‬

401 ...... ................................ ................................ ................................ (APPENDIX 4) ‫اﻟﻤﻠﺤﻖ اﻟﺮاﺑﻊ‬

405 .... ................................ ................................ ................................ (APPENDIX 5) ‫اﻟﻤﻠﺤﻖ اﻟﺨﺎﻣﺲ‬

409 .... ................................ ................................ ................................ (APPENDIX 6) ‫اﻟﻤﻠﺤﻖ اﻟﺴﺎدس‬

Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages VIII
‫‪I‬‬ ‫اﶈﺘﻮى | ‪Index‬‬

‫ﻗﺎﺋﻤﺔ اﻷﺷﻜﺎل )‪(Table of Figures‬‬

‫اﻟﺸﻜﻞ‪ 1-1‬اﳌﻜﻮﻧﺎت اﻟﻌﺎﻣﺔ ﻟﻸﻧﻈﻤﺔ اﳌﺪﳎﺔ ‪3 ..... ................................ ................................ ................................‬‬
‫اﻟﺸﻜﻞ‪ 2-1‬ﳐﻄﻂ ﺑﻨﻴﺔ اﳊﻮاﺳﺐ اﻟﻌﺎﻣﺔ ‪3 ..... ................................ ................................ ................................ PC‬‬
‫اﻟﺸﻜﻞ‪ 3-1‬اﳌﺨﻄﻂ اﻟﺼﻨﺪوﻗﻲ اﻟﻌﺎم ﻟﻸﻧﻈﻤﺔ اﳌﺪﳎﺔ ‪4 .............................. ................................ ................................‬‬
‫اﻟﺸﻜﻞ‪9 ........ ................................ ................................ ................................Steep Learning Curve 4-1‬‬
‫اﻟﺸﻜﻞ‪9 ..... ................................ ................................ ................................ Shallow Learning Curve 5-1‬‬
‫اﻟﺸﻜﻞ‪ 6-1‬اﻟﺘﻄﻮر اﻟﺰﻣﲏ ﻟﺘﻜﻨﻮﻟﻮﺟﻴﺎ اﳊﺎﺳﺒﺎت ‪12 . ................................ ................................ ................................‬‬
‫اﻟﺸﻜﻞ‪ 7-1‬اﳌﻨﺤﲏ اﻟﺰﻣﲏ ﻻزدﻳﺎد ﻋﺪد اﻟﱰاﻧﺰﺳﺘﻮرات ﻋﻠﻰ ﺷﺮﳛﺔ ﻣﺘﻜﺎﻣﻠﺔ ‪12 ......... ................................ ................................‬‬
‫اﻟﺸﻜﻞ‪ 8-1‬اﻟﺼﻤﺎﻣﺎت اﳌﻔﺮﻏﺔ ‪13 ............... ................................ ................................ ................................‬‬
‫اﻟﺸﻜﻞ‪ 9-1‬أول دارة ﻣﺘﻜﺎﻣﻠﺔ ‪13 ................ ................................ ................................ ................................‬‬
‫اﻟﺸﻜﻞ‪ 10-1‬اﳌﺮاﺣﻞ اﻟﺰﻣﻨﻴﺔ ﻟﺘﻄﻮر ﺗﻘﻨﻴﺎت ﺗﺼﻨﻴﻊ اﻟﺪارات اﳌﺘﻜﺎﻣﻠﺔ ‪14 .............. ................................ ................................‬‬
‫اﻟﺸﻜﻞ‪ 11-1‬اﻟﺸﺮﳛﺔ اﻟﺴﻴﻠﻴﻜﻮﻧﻴﺔ ﻟﻠﻤﻌﺎﰿ ‪ 8-core) IBM Power7‬وﳛﻮي ﻋﻠﻰ ‪ 1.2‬ﺑﻠﻴﻮن ﺗﺮاﻧﺰﺳﺘﻮر( وﻟﻮح اﻟ ـ"‪15 ........................... "Wafer‬‬
‫اﻟﺸﻜﻞ‪ 12-1‬اﻟﺸﺮﳛﺔ اﻟﺴﻴﻠﻴﻜﻮﻧﻴﺔ ﻟﻠﻤﻌﺎﰿ ‪ Intel Itanium‬رﺑﺎﻋﻲ اﻟﻨﻮى وﳛﻮي ﻋﻠﻰ‪ 2.046‬ﺑﻠﻴﻮن ﺗﺮاﻧﺰﺳﺘﻮر ‪15 ......... ................................‬‬
‫اﻟﺸﻜﻞ‪ 13-1‬ﺣﺠﻢ اﻟﺸﺮﳛﺔ اﻟﺴﻴﻠﻴﻜﻮﻧﻴﺔ ﻣﻊ ﺗﻄﻮر ﺗﻘﻨﻴﺔ اﻟﺘﺼﻨﻴﻊ ﻣﻦ اﻟﻌﺎم ‪ 1970‬وﺣﱴ ‪16 ...................... ................................ 2014‬‬
‫اﻟﺸﻜﻞ‪ 14-1‬اﳌﻨﺤﲏ اﻟﺰﻣﲏ ﻟﺘﻄﻮر ﺗﻘﻨﻴﺔ ﺗﺼﻨﻴﻊ اﻟﺪارات اﳌﺘﻜﺎﻣﻠﺔ ‪17 ................. ................................ ................................‬‬
‫اﻟﺸﻜﻞ‪ 15-1‬ﺗﺮاﻧﺰﺳﺘﻮر ﻋﻠﻰ ﻣﻘﻄﻊ ﺷﺮﳛﺔ ﺳﻴﻠﻴﻜﻮﻧﻴﺔ ﻳﻌﺘﻤﺪ ﺗﻘﻨﻴﺔ اﻟﺘﺼﻨﻴﻊ ‪17 .. ................................ ................................65nm‬‬
‫اﻟﺸﻜﻞ‪ 16-1‬اﻟﻔﺮوع اﻟﺮﺋﻴﺴﺔ ﻟﻠﺪارات اﳌﺘﻜﺎﻣﻠﺔ اﻟﺮﻗﻤﻴﺔ ‪18 ........................... ................................ ................................‬‬
‫اﻟﺸﻜﻞ‪ 17-1‬اﻟﺒﻨﻴﺔ اﻟﺪاﺧﻠﻴﺔ واﳋﺮﻳﻄﺔ اﻟﺴﻴﻠﻴﻜﻮﻧﻴﺔ ﻟﻠﻤﻌﺎﰿ ‪19 ............................... ................................ 1970 - Intel® 4004‬‬
‫اﻟﺸﻜﻞ‪ 18-1‬ﺷﺮﳛﺔ اﳌﻌﺎﰿ ‪ Intel® 4004‬ذو ﻧﺎﻗﻞ ﺑﻌﺮض ‪ 4-Bit‬وﳛﻮي ﻋﻠﻰ ‪ 2300‬ﺗﺮاﻧﺰﺳﺘﻮر‪19 .................... ................................‬‬
‫اﻟﺸﻜﻞ‪ 19-1‬اﻟﺒﻨﻴﺔ اﻟﺪاﺧﻠﻴﺔ واﳋﺮﻳﻄﺔ اﻟﺴﻴﻠﻴﻜﻮﻧﻴﺔ ﻟﻠﻤﻌﺎﰿ ‪20 ............................... ................................ 1976 - Intel® 8085‬‬
‫اﻟﺸﻜﻞ‪ 20-1‬ﺷﺮﳛﺔ اﳌﻌﺎﰿ ‪ Intel® 8085‬ذو ﻧﺎﻗﻞ ﺑﻌﺮض ‪ 8-Bit‬وﳛﻮي ﻋﻠﻰ ‪ 4500‬ﺗﺮاﻧﺰﺳﺘﻮر‪20 .................... ................................‬‬
‫اﻟﺸﻜﻞ‪ 21-1‬ﺷﺮﳛﺔ اﳌﻌﺎﰿ ‪ Intel® 8086‬ذو ﻧﺎﻗﻞ ﺑﻌﺮض ‪ 16-Bit‬وﳛﻮي ﻋﻠﻰ ‪ 29000‬ﺗﺮاﻧﺰﺳﺘﻮر ‪20 ................. ................................‬‬
‫اﻟﺸﻜﻞ‪ 22-1‬اﻟﺒﻨﻴﺔ اﻟﺪاﺧﻠﻴﺔ واﳋﺮﻳﻄﺔ اﻟﺴﻴﻠﻴﻜﻮﻧﻴﺔ ﻟﻠﻤﻌﺎﰿ ‪20 ............................... ................................ 1978 – Intel® 8086‬‬
‫اﻟﺸﻜﻞ‪ 23-1‬ﺷﺮﳛﺔ اﳌﻌﺎﰿ ‪ Intel®P4‬ذو ﻧﺎﻗﻞ ﺑﻌﺮض ‪ 32-Bit‬وﳛﻮي ﻋﻠﻰ ‪ 125‬ﻣﻠﻴﻮن ﺗﺮاﻧﺰﺳﺘﻮر ‪21 ................. ................................‬‬
‫اﻟﺸﻜﻞ‪ 24-1‬اﻟﺒﻨﻴﺔ اﻟﺪاﺧﻠﻴﺔ واﳋﺮﻳﻄﺔ اﻟﺴﻴﻠﻴﻜﻮﻧﻴﺔ ﻟﻠﻤﻌﺎﰿ ‪21 .. ................................ ................................ 2000 – Intel®P4‬‬
‫اﻟﺸﻜﻞ‪ 25-1‬ﺷﺮﳛﺔ اﳌﻌﺎﰿ ‪ Intel®i7‬رﺑﺎﻋﻲ اﻟﻨﻮى وذو ﻧﺎﻗﻞ ﺑﻌﺮض ‪ 64-Bit‬وﳛﻮي ﻋﻠﻰ ‪ 731‬ﻣﻠﻴﻮن ﺗﺮاﻧﺰﺳﺘﻮر ‪21 ..... ................................‬‬
‫اﻟﺸﻜﻞ‪ 26-1‬اﻟﺒﻨﻴﺔ اﻟﺪاﺧﻠﻴﺔ واﳋﺮﻳﻄﺔ اﻟﺴﻴﻠﻴﻜﻮﻧﻴﺔ ﻟﻠﻤﻌﺎﰿ ‪21 ... ................................ ................................ 2008 – Intel®i7‬‬
‫اﻟﺸﻜﻞ‪ 27-1‬ﻣﻜﻮﻧﺎت اﳊﺎﺳﺐ اﻟﺮﺋﻴﺴﻴﺔ ‪22 ...... ................................ ................................ ................................‬‬
‫اﻟﺸﻜﻞ‪ 28-1‬اﳌﺨﻄﻂ اﻟﺼﻨﺪوﻗﻲ ﻟﻨﻈﺎم ﻳﺴﺘﺨﺪم اﳌﻌﺎﰿ اﳌﺼﻐﺮ ‪22 .................. ................................ ................................‬‬
‫اﻟﺸﻜﻞ‪ 29-1‬اﳌﺨﻄﻂ اﻟﺼﻨﺪوﻗﻲ ﻟﻮﺣﺪة ﻣﻌﺎﳉﺔ اﻟﺮﺳﻮﻣﻴﺎت ‪23 .. ................................ ................................ nForce 680i SLI‬‬
‫اﻟﺸﻜﻞ‪ 30-1‬اﳌﺨﻄﻂ اﻟﺼﻨﺪوﻗﻲ ﻟﻠﻤﻌﺎﰿ ‪23 ................... ................................ ................................ Cell-Processor‬‬
‫اﻟﺸﻜﻞ‪ 31-1‬اﳋﺮﻳﻄﺔ اﻟﺴﻴﻠﻴﻜﻮﻧﻴﺔ ﻟﻠﻤﻌﺎﰿ ‪24 ................... ................................ ................................ Cell-Processor‬‬
‫اﻟﺸﻜﻞ‪ 32-1‬ﻣﻌﻴﺎرﻳﺔ ‪ Von-Neumann‬وﻃﺮﻳﻘﺔ رﺑﻂ اﳌﻌﺎﰿ ﻣﻊ اﻟﺬاﻛﺮة ‪24 ......... ................................ ................................‬‬
‫اﻟﺸﻜﻞ‪ 33-1‬ﻣﻌﻴﺎرﻳﺔ ‪ Harvard‬وﻃﺮﻳﻘﺔ رﺑﻂ اﳌﻌﺎﰿ ﻣﻊ اﻟﺬاﻛﺮة ‪24 .................. ................................ ................................‬‬
‫‪IX‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫ﻗﺎﺋﻤﺔ اﶈﺘﻮﻳﺎت | ‪Table of Contents‬‬

‫اﻟﺸﻜﻞ‪ 34-1‬اﻟﻠﻮﺣﺔ اﻷم ﻟﻠﺤﺎﺳﻮب ‪26 .. ................................ ................................ Transputer Evaluation IMSB008‬‬
‫اﻟﺸﻜﻞ‪ 35-1‬وﺣﺪات اﻟﺘﺤﻜﻢ اﻟﱵ ﺗﺴﺘﺨﺪم اﳌﺘﺤﻜﻤﺎت اﳌﺼﻐﺮة ﰲ اﻟﺴﻴﺎرات ‪27 ..... ................................ ................................‬‬
‫اﻟﺸﻜﻞ‪ 36-1‬اﻟﺒﻨﻴﺔ اﻟﺪاﺧﻠﻴﺔ ﻟﻠﻤﺘﺤﻜﻢ اﳌﺼﻐﺮ ‪ ATAM893-D‬ذو ﻧﺎﻗﻞ ﺑﻌﺮض ‪28 ........................... ................................ 4-bit‬‬
‫اﻟﺸﻜﻞ‪ 37-1‬اﻟﺒﻨﻴﺔ اﻟﺪاﺧﻠﻴﺔ ﻟﻠﻤﺘﺤﻜﻢ اﳌﺼﻐﺮ ‪ ATmega128‬ذو ﻋﺮض ﻧﺎﻗﻞ ‪29 ............................. ................................ 8-bit‬‬
‫اﻟﺸﻜﻞ‪ 38-1‬اﻟﺒﻨﻴﺔ اﻟﺪاﺧﻠﻴﺔ ﳌﻌﺎﰿ ‪ ATMEL Xmega128A1‬ذو ﻋﺮض ﻧﺎﻗﻞ ‪29 .......................... ................................ 16-bit‬‬
‫اﻟﺸﻜﻞ‪ 39-1‬اﻟﺒﻨﻴﺔ اﻟﺪاﺧﻠﻴﺔ ﳌﻌﺎﰿ ‪ AT32UC3B0128‬ذو ﻧﺎﻗﻞ ﺑﻌﺮض ‪30 ................................ ................................ 32-bit‬‬
‫اﻟﺸﻜﻞ‪ 40-1‬ﻣﻌﺪل ﲢﻤﻴﻞ وﺣﺪة اﳌﻌﺎﳉﺔ اﳌﺮﻛﺰﻳﺔ ﺑﺎﻟﻨﺴﺒﺔ إﱃ ﻣﻌﺪل اﻟﻨﻘﻞ ﻣﻊ وﺑﺪون اﻟـ‪31 ....................... ................................ DMA‬‬
‫اﻟﺸﻜﻞ‪ 41-1‬ﻧﺎﻗﻞ اﻟﺒﻴﺎﻧﺎت ﻣﺘﻌﺪد اﻟﻄﺒﻘﺎت واﺗﺼﺎﻟﻪ ﻣﻊ اﻟﻮﺣﺪات اﻟﻄﺮﻓﻴﺔ ‪32 ......... ................................ ................................‬‬
‫اﻟﺸﻜﻞ‪ 42-1‬ﺗﻮزع اﻟﺬاﻛﺮة ‪ SRAM‬وارﺗﺒﺎﻃﻬﺎ ﻣﻊ اﻟﻨﺎﻗﻞ اﻟﺮﺋﻴﺴﻲ ‪32 ................ ................................ ................................‬‬
‫اﻟﺸﻜﻞ‪ 43-1‬ارﺗﺒﺎط اﻟﻮﺣﺪات اﶈﻴﻄﻴﺔ ﻣﻊ ﺑﻌﻀﻬﺎ ﻋﻦ ﻃﺮﻳﻖ ﻧﺎﻗﻞ ﻧﻈﺎم ﻗﺪح اﻷﺣﺪاث ‪33 .............................. ................................‬‬
‫اﻟﺸﻜﻞ‪ 44-1‬ﻣﻘﺎرﻧﺔ ﺑﲔ اﻻﺳﺘﺠﺎﺑﺔ ﻟﻨﻈﺎم ﺗﻘﻠﻴﺪي ﻳﻌﺘﻤﺪ اﳌﻘﺎﻃﻌﺎت وﻧﻈﺎم آﺧﺮ ﻣﻘﺪوح ﺑﺎﻷﺣﺪاث‪33 ................... ................................‬‬
‫اﻟﺸﻜﻞ‪ 45-1‬ارﺗﺒﺎط اﶈﻴﻄﻴﺎت ﺑﻮﺣﺪة اﳌﻌﺎﳉﺔ ﻟﻨﻈﺎم ﻣﻘﺎد ﺑﺎﳌﻘﺎﻃﻌﺔ ‪34 ............... ................................ ................................‬‬
‫اﻟﺸﻜﻞ‪ 46-1‬ارﺗﺒﺎط اﶈﻴﻄﻴﺎت ﻟﻨﻈﺎم ﻳﻘﺪح ﺑﺎﻷﺣﺪاث ‪34 .......................... ................................ ................................‬‬
‫اﻟﺸﻜﻞ‪ 47-1‬ﻃﺮﻳﻘﺔ ﲤﺜﻴﻞ رﻗﻢ ‪ 32-bit‬ﺑﺎﻟﻔﺎﺻﻠﺔ اﻟﻌﺎﺋﻤﺔ ‪34 ........................ ................................ ................................‬‬
‫اﻟﺸﻜﻞ‪ 48-1‬وﺣﺪﰐ اﻟﺘﺸﻔﲑ ‪ DES & AES‬ﰲ ﻣﺘﺤﻜﻤﺎت ‪34 ............ ................................ ................................ AVR‬‬
‫اﻟﺸﻜﻞ‪ 49-1‬ﳕﻂ اﻟﻌﻤﻞ اﻟﻄﺒﻴﻌﻲ ﻟﻠﻤﺆﻗﺖ )ﻋﺪاد ﺗﺼﺎﻋﺪي | ﺗﻨﺎزﱄ( ‪35 ............ ................................ ................................‬‬
‫اﻟﺸﻜﻞ‪ 50-1‬اﳌﺨﻄﻂ اﻟﺼﻨﺪوﻗﻲ ﻟﻠﻤﺒﺪل ﻟﺘﺸﺎﻬﺑﻲ اﻟﺮﻗﻤﻲ ﰲ ﻣﺘﺤﻜﻤﺎت ‪35 .............................. ................................ .AVR32‬‬
‫اﻟﺸﻜﻞ‪ 51-1‬اﳌﻌﺎﳉﺔ اﳌﺘﻮازﻳﺔ ﰲ اﳌﺒﺪل ﻟﺘﺸﺎﻬﺑﻲ اﻟﺮﻗﻤﻲ ﳌﺘﺤﻜﻤﺎت ‪35 ............................. ................................ AVR-Xmega‬‬
‫اﻟﺸﻜﻞ‪ 52-1‬ﺗﻨﻔﻴﺬ اﳌﻘﺎﻃﻌﺎت وﻓﻘﺎً ﻟﻸوﻟﻮﻳﺎت ‪36 . ................................ ................................ ................................‬‬
‫اﻟﺸﻜﻞ‪ 53-1‬وﺣﺪة اﻟﺘﻮﻗﻴﺖ ﰲ اﳌﺘﺤﻜﻢ اﳌﺼﻐﺮ ‪37 ........................ ................................ ................................ AVR‬‬
‫اﻟﺸﻜﻞ‪ 54-1‬وﺻﻞ اﳌﺘﺤﻜﻢ ‪ ATtiny43U‬إﱃ ﺑﻄﺎرﻳﺔ وﺣﻴﺪة ‪37 .................. ................................ ................................‬‬
‫اﻟﺸﻜﻞ‪ 55-1‬اﻟﻌﻼﻗﺔ ﺑﲔ ﺟﻬﺪ اﻟﺘﻐﺬﻳﺔ ﻣﱰدد ﻋﻤﻞ اﳌﻌﺎﰿ ‪38 ....................... ................................ ................................‬‬
‫اﻟﺸﻜﻞ ‪ 56-1‬ﻃﻴﻒ ﻣﻦ اﻟﺘﻄﺒﻴﻘﺎت ﺗﺴﺘﺨﺪم ﻣﻌﺎﳉﺎت اﻹﺷﺎرة اﻟﺮﻗﻤﻴﺔ ‪39 ............ ................................ ................................‬‬
‫اﻟﺸﻜﻞ‪ 57-1‬ﻧﻈﺎم ﻣﻌﺎﳉﺔ إﺷﺎرة رﻗﻤﻴﺔ ﺑﺎﺳﺘﺨﺪام اﳊﺎﺳﺐ اﻟﺸﺨﺼﻲ ‪39 ............. ................................ ................................‬‬
‫اﻟﺸﻜﻞ‪ 58-1‬ﺷﺮﳛﺔ اﳌﻌﺎﰿ ‪40 .. ................................ ................................ ................................ TMS320C30‬‬
‫اﻟﺸﻜﻞ‪ 59-1‬ﺑﻨﻴﺔ اﻟﺸﺮﳛﺔ ‪ DSP-1‬أول ﺷﺮﳛﺔ ﻣﺪﳎﺔ ﳌﻌﺎﰿ إﺷﺎرة رﻗﻤﻴﺔ ‪40 .......... ................................ ................................‬‬
‫اﻟﺸﻜﻞ‪ 60-1‬ﲤﺜﻴﻞ اﻷرﻗﺎم اﻟﺜﻨﺎﺋﻴﺔ اﻟﻜﺴﺮﻳﺔ ﰲ ﻧﻈﺎم اﻟﻔﺎﺻﻠﺔ اﻟﺜﺎﺑﺘﺔ ‪41 ................ ................................ ................................‬‬
‫اﻟﺸﻜﻞ‪ 61-1‬ﻧﻈﺎم ﻣﻌﺎﳉﺔ ﺻﻮت وﺻﻮرة ﺑﺎﺳﺘﺨﺪام ﻣﻌﺎﰿ إﺷﺎرة رﻗﻤﻴﺔ ‪42 ............ ................................ ................................‬‬
‫اﻟﺸﻜﻞ‪ 62-1‬ﳐﻄﻂ ﲤﺜﻴﻠﻲ ﻋﺎم ﻟﻌﻨﺎﺻﺮ اﻟﺒﻨﻴﺔ اﻟﺪاﺧﻠﻴﺔ ﳌﻌﺎﳉﺎت اﻟـ‪43 .......... ................................ ................................ DSP‬‬
‫اﻟﺸﻜﻞ‪ 63-1‬اﳌﺨﻄﻂ اﻟﺼﻨﺪوﻗﻲ ﳌﻌﺎﰿ اﻹﺷﺎرة اﻟﺮﻗﻤﻴﺔ ™‪44 ..... ................................ ................................ TMS320C55x‬‬
‫اﻟﺸﻜﻞ‪ 64-1‬ﻣﻌﺎﰿ اﻹﺷﺎرة اﻟﺮﻗﻤﻴﺔ ﻣﺘﻌﺪد اﻟﻨﻮى ™ ‪45 ............................... ................................ 6-core TMS320C6472‬‬
‫اﻟﺸﻜﻞ‪ 65-1‬ﻟﻮﺣﺔ اﻟﺘﻄﻮﻳﺮ ‪45 ................... ................................ ................................TI-TMS320C6472-EVM‬‬
‫اﻟﺸﻜﻞ‪ 66-1‬ﻧﺴﺐ اﻧﺘﺸﺎر ﻣﻌﺎﳉﺎت اﻹﺷﺎرة اﻟﺮﻗﻤﻴﺔ ‪46 ............................ ................................ ................................‬‬
‫اﻟﺸﻜﻞ‪ 67-1‬ﻧﺴﺐ اﻟﺘﻄﺒﻴﻘﺎت اﻟﱵ ﺗﺴﺘﺨﺪم ﻣﻌﺎﳉﺎت اﻹﺷﺎرة اﻟﺮﻗﻤﻴﺔ ‪46 ............ ................................ ................................‬‬
‫اﻟﺸﻜﻞ‪ 68-1‬ﳐﻄﻂ ﺳﲑ اﻟﻌﻤﻠﻴﺎت ﻋﻠﻰ ﻣﺼﻔﻮﻓﺘﲔ ‪47 ............................. ................................ ................................‬‬
‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪X‬‬
‫‪I‬‬ ‫اﶈﺘﻮى | ‪Index‬‬

‫اﻟﺸﻜﻞ‪ 69-1‬ﻣﺴﺎر اﻟﺒﻴﺎﻧﺎت ﰲ ﻣﻌﺎﰿ أﻏﺮاض ﻋﺎﻣﺔ‪48 ............................. ................................ ................................‬‬

‫اﻟﺸﻜﻞ ‪ 70-1‬ﻣﺴﺎر اﻟﺒﻴﺎﻧﺎت ﰲ ﻣﻌﺎﰿ اﻹﺷﺎرة اﻟﺮﻗﻤﻴﺔ ‪48 .......................... ................................ ................................‬‬
‫اﻟﺸﻜﻞ‪ 71-1‬ﻣﻨﺤﲎ ﻣﻘﺎرﻧﺔ اﻷداء واﻟﺴﺮﻋﺔ ﻷﺟﻴﺎل اﻻﺗﺼﺎﻻت اﻟﻼﺳﻠﻜﻴﺔ ‪49 ......... ................................ ................................‬‬
‫اﻟﺸﻜﻞ‪ 72-1‬ﻣﻨﺤﲎ اﻷداء وﻣﺴﺘﻮى ﺗﻌﻘﻴﺪ اﻟﻨﻈﺎم ﻷﺟﻴﺎل اﻻﺗﺼﺎﻻت اﻟﻼﺳﻠﻜﻴﺔ‪49 ... ................................ ................................‬‬
‫اﻟﺸﻜﻞ ‪ 73-1‬اﳌﺨﻄﻂ اﻟﺪاﺧﻠﻲ ﻟﻠﻮﺣﺪة ‪50 ........................... ................................ ................................ DSP48E‬‬
‫اﻟﺸﻜﻞ‪ 74-1‬ﻟﻨﻈﺎم اﺗﺼﺎﻻت ‪ WiMAX‬ﻣﻦ اﳉﻴﻞ اﻟﺮاﺑﻊ ﻳﻌﺘﻤﺪ ﻋﻠﻰ ‪50 ............... ................................ Spartan-3A DSP FPGA‬‬
‫اﻟﺸﻜﻞ‪ 75-1‬ﻣﻘﻄﻊ ﰲ ﻃﺒﻘﺎت اﻟﺴﻴﻠﻜﻮن واﻷﻛﺴﻴﺪ واﳌﻌﺪن ‪51 .................... ................................ ................................‬‬
‫اﻟﺸﻜﻞ‪ 76-1‬اﻟﺸﺮﳛﺔ اﻟﺴﻴﻠﻴﻜﻮﻧﻴﺔ ﻟﻠﻤﻌﺎﰿ ‪51 . ................................ ................................ ................................ P4‬‬
‫اﻟﺸﻜﻞ‪ 77-1‬أﻗﺴﺎم وﻓﺮوع اﻟﺪارات اﳌﺘﻜﺎﻣﻠﺔ ﻣﺘﺨﺼﺼﺔ اﻟﺘﻄﺒﻴﻘﺎت ‪52 ............... ................................ ................................‬‬
‫اﻟﺸﻜﻞ‪ 78-1‬ﳐﻄﻄﺎت ﺗﺼﻤﻴﻢ ﺑﻮاﺑﺔ ﻋﺎﻛﺲ ﻋﻠﻰ ﺷﺮاﺋﺢ اﻟـ‪52 .............. ................................ ................................ ASICs‬‬
‫اﻟﺸﻜﻞ‪ 79-1‬ﳐﻄﻂ ﺗﻮزع اﳋﻼﻳﺎ ﻋﻠﻰ ﺷﺮﳛﺔ اﻟـ‪53 ............ ................................ ................................ Cell-based ASIC‬‬
‫اﻟﺸﻜﻞ‪ 80-1‬وﺻﻞ اﳋﻼﻳﺎ اﳌﻨﻄﻘﻴﺔ ﰲ ﺗﻘﻨﻴﺔ اﻟـ‪53 .......................... ................................ ................................ CBIC‬‬
‫اﻟﺸﻜﻞ‪ 81-1‬اﳌﻜﺘﺒﺔ اﻟﻘﻴﺎﺳﻴﺔ ﻟﻠﺒﻮاﺑﺔ ‪ XOR‬ﰲ ﺗﻘﻨﻴﺔ اﻟـ‪54 ................. ................................ ................................ CBIC‬‬
‫اﻟﺸﻜﻞ‪ 82-1‬اﳌﻜﺘﺒﺔ اﻟﻘﻴﺎﺳﻴﺔ ﳌﺸﻔﺮ ﻋﺎﻛﺲ ﺛﻨﺎﺋﻲ اﻻﲡﺎﻩ ﰲ ﺗﻘﻨﻴﺔ اﻟـ‪54 ....... ................................ ................................ CBIC‬‬
‫اﻟﺸﻜﻞ‪ 83-1‬ﳐﻄﻂ ﺗﻮزع اﳋﻼﻳﺎ ﻋﻠﻰ اﻟﺸﺮﳛﺔ اﻟﺴﻴﻠﻴﻜﻮﻧﻴﺔ ‪55 ............... ................................ ................................ CGA‬‬
‫اﻟﺸﻜﻞ‪ 84-1‬ﳐﻄﻂ ﺗﻮزع اﳋﻼﻳﺎ ﻋﻠﻰ اﻟﺸﺮﳛﺔ اﻟﺴﻴﻠﻴﻜﻮﻧﻴﺔ ‪56 ............... ................................ ................................ClGA‬‬
‫اﻟﺸﻜﻞ ‪ 85-1‬ﻣﻘﺎرﻧﺔ ﺗﻮزع اﳋﻼﻳﺎ ﻋﻠﻰ اﻟﺸﺮﳛﺔ اﻟﺴﻴﻠﻴﻜﻮﻧﻴﺔ ﺑﲔ اﻟـ‪ CGA‬واﻟـ‪56 ............................... ................................ ClGA‬‬
‫اﻟﺸﻜﻞ‪ 86-1‬ﳐﻄﻂ ﺗﻮزع اﳋﻼﻳﺎ ﻋﻠﻰ اﻟﺸﺮﳛﺔ اﻟﺴﻴﻠﻴﻜﻮﻧﻴﺔ ‪57 ................ ................................ ................................ SGA‬‬
‫اﻟﺸﻜﻞ‪ 87-1‬ﻣﻘﺎرﻧﺔ ﺑﲔ ﻃﺒﻘﺎت اﻷﻗﻨﻌﺔ واﻟﺸﺮﳛﺔ اﻟﺴﻴﻠﻴﻜﻮﻧﻴﺔ ﻟـ‪ Full-custom ASICs‬واﻟـ‪57 ................................ Semi-custom ASICs‬‬
‫اﻟﺸﻜﻞ‪ 88-1‬ﳐﻄﻂ اﻟﺸﺮﳛﺔ ‪58 ............................. ................................ ................................ ATMEL MPCF‬‬
‫اﻟﺸﻜﻞ‪58 ....... ................................ ................................ ................................ A typical ASIC die 89-1‬‬
‫اﻟﺸﻜﻞ‪59 ........................ ................................ ................................ Structured ASIC Faraday NC-1 90-1‬‬
‫اﻟﺸﻜﻞ‪ 91-1‬ﻣﺮاﺣﻞ ﺗﺼﻤﻴﻢ ﺷﺮاﺋﺢ اﻟـ‪60 ................................ ................................ ................................ ASICs‬‬
‫اﻟﺸﻜﻞ‪ 92-1‬اﻟﺸﻜﻞ اﻟﻨﻬﺎﺋﻲ ﻟﻠﺸﺮﳛﺔ اﻟﺴﻴﻠﻴﻜﻮﻧﻴﺔ وﺗﻮﺻﻴﻠﻬﺎ ﻣﻊ اﻟﻐﻼف اﳋﺎرﺟﻲ ‪60 .. ................................ ................................‬‬
‫اﻟﺸﻜﻞ‪61 ...................... ................................ ................................ Custom Mixed-signals ASIC Die 93-1‬‬
‫اﻟﺸﻜﻞ‪61 ...................... ................................ ................................ Full-custom Mixed-signals ASIC 94-1‬‬
‫اﻟﺸﻜﻞ‪ 95-1‬اﻟﺸﺮﳛﺔ ‪61 ......................... ................................ ................................ Fujitsu ASSP MB86H52‬‬
‫اﻟﺸﻜﻞ‪ 96-1‬اﳊﻠﻮل اﳌﺴﺘﺨﺪﻣﺔ ﰲ ﺗﺼﻤﻴﻢ اﻟـ‪62 ............................ ................................ ................................ SoCs‬‬
‫اﻟﺸﻜﻞ‪ 97-1‬اﳌﺨﻄﻂ اﻟﺪاﺧﻠﻲ ‪63 ......................... ................................ ................................ MCU-based SoC‬‬
‫اﻟﺸﻜﻞ‪ 98-1‬اﳌﺨﻄﻂ اﻟﺘﺪﻓﻘﻲ ﻟﺘﺼﻤﻴﻢ اﻟـ‪64 ................................ ................................ ................................ SoC‬‬
‫اﻟﺸﻜﻞ‪ 99-1‬ﺑﻨﻴﺔ اﳌﻌﺎﰿ اﳌﺪﻣﺞ ‪64 .......................... ................................ ................................ Intel® EP80579‬‬
‫اﻟﺸﻜﻞ‪ 100-1‬اﻟﺒﻨﻴﺔ اﻟﺪاﺧﻠﻴﺔ ﻟﻠﻤﻌﺎﰿ ‪65 ...................... ................................ ................................ Axis-Extra-FS‬‬
‫اﻟﺸﻜﻞ‪ 101-1‬اﻟﺒﻨﻴﺔ اﻟﺪاﺧﻠﻴﺔ ﻟﻠﺸﺮﳛﺔ ‪65 ............................... ................................ ................................W7100‬‬
‫اﻟﺸﻜﻞ‪ 102-1‬ﺗﺮﻛﻴﺐ ﺷﺮاﺋﺢ اﻟـ‪66 ..... ................................ ................................ ................................ PSOCs‬‬
‫اﻟﺸﻜﻞ‪ 103-1‬ﻣﻴﺰات ﻋﺎﺋﻼت ﺷﺮاﺋﺢ اﻟـ‪66 ............................. ................................ ................................ PSOCs‬‬
‫‪XI‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫ﻗﺎﺋﻤﺔ اﶈﺘﻮﻳﺎت | ‪Table of Contents‬‬

‫اﻟﺸﻜﻞ‪ 104-1‬اﳌﺨﻄﻂ اﻟﺼﻨﺪوﻗﻲ ﻟﻠﺒﻨﻴﺔ اﻟﺪاﺧﻠﻴﺔ ﻟﺸﺮاﺋﺢ اﻟـ‪67 ............. ................................ ................................ PSoCs‬‬
‫اﻟﺸﻜﻞ‪ 105-1‬ﻋﺎﺋﻼت اﳌﺘﺤﻜﻤﺎت اﳌﺼﻐﺮة ﻟﺸﺮاﺋﺢ اﻟـ‪68 ................. ................................ ................................ PSOCs‬‬
‫اﻟﺸﻜﻞ‪ 106-1‬اﻟﺒﻴﺌﺔ اﻟﱪﳎﻴﺔ ‪69 ............................... ................................ ................................ PSoC Creator‬‬
‫اﻟﺸﻜﻞ‪ 107-1‬اﳌﺨﻄﻂ اﻟﺪاﺧﻠﻲ ﻟﻠﺸﺮﳛﺔ‪70 ................. ................................ ................................ PSoC5 CY8C55‬‬
‫اﻟﺸﻜﻞ‪ 108-1‬ﳐﻄﻂ ﺑﻨﻴﺔ اﻟﺸﺮﳛﺔ ‪71 . ................................ ................................ ................................ AsAP-1‬‬
‫اﻟﺸﻜﻞ‪ 109-1‬ﳐﻄﻂ ﺑﻨﻴﺔ اﻟﺸﺮﳛﺔ ‪71 . ................................ ................................ ................................ AsAP-2‬‬
‫اﻟﺸﻜﻞ ‪ 110-1‬ﳐﻄﻂ اﻟﺒﻨﻴﺔ اﻟﺪاﺧﻠﻴﺔ ﻟﻠﺸﺮﳛﺔ ‪72 ................ ................................ ................................ TILE-GxTM‬‬
‫اﻟﺸﻜﻞ‪ 111-1‬ﻧﻈﺎم ‪73 ...... ................................ ................................ ................................ 9-Layer MCP‬‬
‫اﻟﺸﻜﻞ‪ 112-1‬اﻟﺸﺮﳛﺔ اﻟﺴﻴﻠﻴﻜﻮﻧﻴﺔ ‪73 .............. ................................ ................................ ETRAX 100LX MCM‬‬
‫اﻟﺸﻜﻞ‪ 113-1‬ﳐﻄﻂ ﲤﺜﻴﻠﻲ ﻟﻨﻈﺎم اﻟـ‪74 ..... ................................ ................................ ................................ SiP‬‬
‫اﻟﺸﻜﻞ‪ 114-1‬ﻣﻘﺎرﻧﺔ ﺑﲔ ﻧﻈﺎم ﺗﻘﻠﻴﺪي ﻳﺴﺘﺨﺪم دارات ﻣﺘﻜﺎﻣﻠﺔ ذات وﻇﺎﺋﻒ ﻣﺴﺘﻘﻠﺔ وﻧﻈﺎم ﻣﺘﻜﺎﻣﻞ ﻳﺴﺘﺨﺪم ﺗﻘﻨﻴﺔ اﻟـ‪74 ........................... SiP‬‬
‫اﻟﺸﻜﻞ‪ 115-1‬اﻟﺸﺮﳛﺔ ‪ BGW200‬ﻧﻈﺎم ‪ SiP‬ﻣﺘﻜﺎﻣﻞ ﻟـ‪74 ................................ ................................ 171Mobile WLAN‬‬
‫اﻟﺸﻜﻞ‪ 116-1‬اﳌﺨﻄﻂ اﻟﺼﻨﺪوﻗﻲ ﻟﻨﻈﺎم ﻫﺎﺗﻒ ﳏﻤﻮل ﻋﻠﻰ ﺷﺮﳛﺔ ‪74 ...... ................................ ................................ 172SiP‬‬
‫اﻟﺸﻜﻞ‪ 117-1‬ﻧﻈﺎﻣـ‪ SoP‬ﻣﺘﻜﺎﻣﻞ ﻣﻊ ﻃﺒﻘﺎت اﻟﻌﺰل اﻟﻜﻬﺮﺑﺎﺋﻲ ‪75 .................. ................................ ................................‬‬
‫اﻟﺸﻜﻞ‪ 118-1‬ﻣﻨﺤﲏ ﻗﺎﻧﻮن ازدﻳﺎد اﻟﻜﺜﺎﻓﺔ اﻟﺴﻴﻠﻴﻜﻮﻧﻴﺔ ﻟـ‪76 ................... ................................ ................................ SoP‬‬
‫اﻟﺸﻜﻞ‪ 119-1‬ﻣﻘﺎرﻧﺔ ﺑﲔ اﻟﺘﻘﻨﻴﺎت اﻷرﺑﻌﺔ ‪76 ......... ................................ ................................ SoC, MCM, SiP, SoP‬‬
‫اﻟﺸﻜﻞ‪ 120-1‬ﻋﻨﺎﺻﺮ ﺗﻘﻨﻴﺔ اﻟـ‪77 .......... ................................ ................................ ................................ SoP‬‬
‫اﻟﺸﻜﻞ‪ 121-1‬ﺗﺴﻊ ﺷﺮاﺋﺢ ﺳﻴﻠﻴﻜﻮﻧﻴﺔ )‪ (9-Dies‬ﻣﺘﻮﺿﻌﺔ ﺑﺸﻜﻞ ﻣﺒﺎﺷﺮ ﻋﻠﻰ اﻟﺪارة اﳌﻄﺒﻮﻋﺔ ‪77 ...................... ................................‬‬
‫اﻟﺸﻜﻞ‪ 122-1‬ﻳﺒﲔ ﺷﺎﺷﺔ رﺳﻮﻣﻴﺔ ‪ 128×64pixel‬ﲢﻮي ﻋﻠﻰ ﺛﻼث ﺷﺮاﺋﺢ ‪78 ............................... ................................ CoB‬‬
‫اﻟﺸﻜﻞ‪ 123-1‬ﻣﻘﺎرﻧﺔ ﺑﲔ ﺗﻘﻨﻴﱵ اﻟـ‪ SMD‬واﻟـ‪ CoB‬ﻟﺘﺠﻤﻴﻊ اﻟﺪارة اﳌﺘﻜﺎﻣﻠﺔ ﰲ ﻃﻮرﻫﺎ اﻟﺜﺎﱐ ‪79 ........................ ................................‬‬
‫اﻟﺸﻜﻞ‪ 124-1‬ﺗﻮﺻﻴﻞ ﺷﺮﳛﺔ ﺳﻴﻠﻴﻜﻮﻧﻴﺔ ﻋﻠﻰ دارة ﻣﻄﺒﻮﻋﺔ ‪79 ...................... ................................ ................................‬‬
‫اﻟﺸﻜﻞ‪ 125-1‬ﺷﺮاﺋﺢ ﺳﻴﻠﻴﻜﻮﻧﻴﺔ ﻣﺘﻮﺿﻌﺔ ﺑﺸﻜﻞ ﻋﻤﻮدي وﺗﻌﺘﻤﺪ ﺗﻘﻨﻴﺔ اﻟـ‪79 ... ................................ ................................ CoB‬‬
‫اﻟﺸﻜﻞ‪ 126-1‬اﳌﻌﺪل اﻟﻌﺎﳌﻲ ﻟﺘﺼﺎﻣﻴﻢ اﻟـ ‪ ASIC‬اﳌﺘﻮﻗﻌﺔ ﻟﻸﻋﻮام ‪80 .. ................................ ................................ 1994-2013‬‬
‫اﻟﺸﻜﻞ‪ 127-1‬اﳌﻌﺪل اﻟﻌﺎﳌﻲ ﻟﺘﺼﺎﻣﻴﻢ اﻟـ ‪ ASSP‬اﳌﺘﻮﻗﻌﺔ ﻟﻸﻋﻮام ‪81 .. ................................ ................................ 2003-2013‬‬
‫اﻟﺸﻜﻞ‪ 128-1‬ﻣﻘﺎرﻧﺔ ﻛﻠﻔﺔ وﻣﺮاﺣﻞ اﻟﺘﺼﻤﻴﻢ ﻟﻜﻞ ﻣﻦ اﻟـ‪ FPGA‬واﻟـ‪81 ...... ................................ ................................ ASIC‬‬
‫اﻟﺸﻜﻞ‪ 129-1‬اﳌﻌﺪل اﻟﻌﺎﳌﻲ ﻻزدﻳﺎد ﺗﺼﺎﻣﻴﻢ اﻟـ ‪ FPGA‬اﳌﺘﻮﻗﻌﺔ ﰲ ﻋﺎم ‪81 ... ................................ ................................ 2009‬‬
‫اﻟﺸﻜﻞ‪ 130-1‬اﳌﻨﺤﲏ اﻷﺧﻀﺮ ﳝﺜﻞ أداء اﻟـ‪ FPGA‬واﳌﻨﺤﲏ اﻷﲪﺮ ﳝﺜﻞ أداء اﻟـ‪82 ....................... ................................ DSP/GPP‬‬
‫اﻟﺸﻜﻞ‪ 131-1‬ﻣﻘﺎرﻧﺔ اﻷداء ﺑﲔ ﻣﻌﺎﰿ ‪ DSP‬وﺷﺮﳛﺔ ‪ FPGA‬ﳍﻤﺎ ﻧﻔﺲ اﻟﻜﻠﻔﺔ ‪83 .. ................................ ................................‬‬
‫اﻟﺸﻜﻞ‪ 132-1‬ﻣﻌﺪل اﻷداء ﻟﺸﺮاﺋﺢ اﻟـ‪ FPGAs‬ﻳﻔﻮق ‪ 40‬ﺿﻌﻒ ﺷﺮاﺋﺢ اﻟـ‪83 . ................................ ................................ DSPs‬‬
‫اﻟﺸﻜﻞ‪ 133-1‬ﻧﺴﺒﺔ اﻷداء‪/‬اﻟﻜﻠﻔﺔ ﻟﻜﻞ ‪ Frame/sec‬ﻟﺸﺮاﺋﺢ اﻟـ‪ FPGAs‬أﻓﻀﻞ ﺑـ‪ 30‬ﻣﺮة ﻣﻦ ﺷﺮاﺋﺢ اﻟـ‪83 ........ ................................ DSPs‬‬
‫اﻟﺸﻜﻞ‪ 134-1‬ﻣﻘﺎرﻧﺔ ﺳﺮﻋﺔ اﻷداء ﳌﻌﺎﰿ ‪ DSP‬ﻣﻊ ﺷﺮﳛﺔ ‪ FPGA‬ﻋﻠﻰ ﺧﻮارزﻣﻴﺔ ﻣﺮﺷﺢ رﻗﻤﻲ ‪84 ........... ................................ 256-tap‬‬
‫اﻟﺸﻜﻞ‪ 135-1‬ﻳﺒﲔ ﻣﻌﺪل ازدﻳﺎد اﺳﺘﺨﺪام ﺗﻘﻨﻴﺔ اﻟـ‪ FPGA‬اﳌﺘﻮﻗﻊ ﰲ ﳎﺎل اﻟـ‪84 ....................... ................................ Automotive‬‬
‫اﻟﺸﻜﻞ‪ 136-1‬ﻣﻘﻄﻊ ﺑﻠﻐﺔ اﻟـ‪ C‬ﻟﺮوﺗﲔ ﻣﻌﺎﳉﺔ إﺷﺎرة رﻗﻤﻴﺔ ‪85 ...................... ................................ ................................‬‬
‫اﻟﺸﻜﻞ‪86 ......................... ................................ ................................ FPGA to ASIC Design Ratio 137-1‬‬
‫اﻟﺸﻜﻞ‪ 138-1‬اﻻﺧﺘﻼف ﺑﲔ ﺑﻨﻴﺔ اﳊﻮاﺳﺐ اﻟﻘﻴﺎﺳﻴﺔ وﺑﻨﻴﺔ اﳊﻮاﺳﺐ اﳌﻄﻮرة واﻟﱵ ﺗﺴﺘﺨﺪم اﻟـ‪86 ............... ................................ FPGAs‬‬
‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪XII‬‬
‫‪I‬‬ ‫اﶈﺘﻮى | ‪Index‬‬

‫اﻟﺸﻜﻞ‪ 1-2‬اﳌﺨﻄﻂ اﻟﺰﻣﲏ ﻟﺘﻄﻮر ﺗﻘﻨﻴﺎت اﻟﺪارات اﳌﺘﻜﺎﻣﻠﺔ واﻟﻌﻨﺎﺻﺮ اﳌﻨﻄﻘﻴﺔ ‪98 ...... ................................ ................................‬‬
‫اﻟﺸﻜﻞ‪ 2-2‬ﺗﻘﻨﻴﺎت اﳋﻼﻳﺎ اﻟﺬاﻛﺮﻳﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ‪99 ............................... ................................ ................................‬‬
‫اﻟﺸﻜﻞ‪ 3-2‬اﻟﻮﺻﻼت اﳌﻨﺼﻬﺮة ﻗﺒﻞ ﻋﻤﻠﻴﺔ اﻟﱪﳎﺔ ‪99 ............................... ................................ ................................‬‬
‫اﻟﺸﻜﻞ‪ 4-2‬اﻟﻮﺻﻼت اﳌﻨﺼﻬﺮة ﺑﻌﺪ ﻋﻤﻠﻴﺔ اﻟﱪﳎﺔ ‪99 ............................... ................................ ................................‬‬
‫اﻟﺸﻜﻞ‪ 5-2‬اﻟﻮﺻﻼت اﳌﻘﺼﻮرة ﻗﺒﻞ ﻋﻤﻠﻴﺔ اﻟﱪﳎﺔ ‪100 ............................. ................................ ................................‬‬
‫اﻟﺸﻜﻞ‪ 6-2‬اﻟﻮﺻﻼت اﳌﻘﺼﻮرة ﺑﻌﺪ ﻋﻤﻠﻴﺔ اﻟﱪﳎﺔ ‪100 ............................. ................................ ................................‬‬
‫اﻟﺸﻜﻞ‪ 7-2‬ﻣﻘﻄﻊ ﰲ ﻣﺪﺧﻞ اﻟﺒﻮاﺑﺔ ﻋﻠﻰ اﳌﺴﺘﻮى اﻟﺴﻴﻠﻴﻜﻮﱐ ﻗﺒﻞ )‪ (a‬وﺑﻌﺪ )‪ (b‬ﻋﻤﻠﻴﺔ اﻟﱪﳎﺔ ‪100 ..................... ................................‬‬
‫اﻟﺸﻜﻞ‪ 8-2‬ﺧﻠﻴﺔ ﻗﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺗﻌﺘﻤﺪ ﺗﻘﻨﻴﺔ ‪101 .......................... ................................ ................................ SRAM‬‬
‫اﻟﺸﻜﻞ‪ 9-2‬ﺷﺮﳛﺔ اﻟﺬاﻛﺮة ‪102 .... ................................ ................................ ................................ Intel-1702‬‬
‫اﻟﺸﻜﻞ‪ 10-2‬اﳌﻘﺎرﻧﺔ ﺑﲔ ﺗﺮاﻧﺰﺳﺘﻮر ‪ (a) MOS‬وﺧﻠﻴﺔ ﺗﺮاﻧﺰﺳﺘﻮر ﻣﺴﺘﺨﺪم ﰲ ﺧﻠﻴﺔ ‪103 ............... ................................ (b) EPROM‬‬
‫اﻟﺸﻜﻞ‪ 11-2‬ﺧﻠﻴﺔ ذاﻛﺮة ﺗﻌﺘﻤﺪ ﻋﻠﻰ ﺗﺮاﻧﺰﺳﺘﻮر ‪103 ................... ................................ ................................ EPROM‬‬
‫اﻟﺸﻜﻞ‪ 12-2‬ﺧﻠﻴﺔ ‪103 .......... ................................ ................................ ................................ EEPROM‬‬
‫اﻟﺸﻜﻞ‪ 13-2‬اﻟﺒﻨﻴﺔ اﻟﺪاﺧﻠﻴﺔ ﳋﻠﻴﺔ اﻟﺬاﻛﺮة ‪104 ............................. ................................ ................................ Flash‬‬
‫اﻟﺸﻜﻞ ‪ 14-2‬اﺧﺘﻴﺎر اﻟﻌﻨﺎﺻﺮ اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺑﻨﺎءً ﻋﻠﻰ اﻟﻌﻼﻗﺔ ﺑﲔ درﺟﺔ ﺗﻌﻘﻴﺪ اﻟﻨﻈﺎم وﻛﻠﻔﺘﻪ ‪105 ............... ................................‬‬
‫اﻟﺸﻜﻞ‪ 15-2‬ﺷﺠﺮة اﻟﻌﻨﺎﺻﺮ اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ وﻓﺮوﻋﻬﺎ ‪106 ................... ................................ ................................‬‬
‫اﻟﺸﻜﻞ‪ 16-2‬اﻟﺒﻴﻨﺔ اﻟﺪاﺧﻠﻴﺔ ﻟـ‪106 .............. ................................ ................................ CoolRunner-II Macrocell‬‬
‫اﻟﺸﻜﻞ‪ 17-2‬ﲤﺜﻴﻞ ﻟﺬاﻛﺮة ‪ PROM‬ﻏﲑ ﻣﱪﳎﺔ ﺗﺴﺘﺨﺪم ﻣﺼﻔﻮﻓﺔ ﺑﻮاﺑﺎت ‪ AND‬ﳏﺪدة اﻟﻮﻇﻴﻔﺔ وﻣﺼﻔﻮﻓﺔ ﺑﻮاﺑﺎت ‪ OR‬ﻗﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ‪107 .................‬‬
‫اﻟﺸﻜﻞ‪ 18-2‬ﻛﺘﻠﺔ ﻣﻨﻄﻘﻴﺔ ﻣﺮﻛﺒﺔ ﻣﻦ ﳎﻤﻮع ﺑﻮاﺑﺎت ‪108 ........................... ................................ ................................‬‬
‫اﻟﺸﻜﻞ‪ 19-2‬اﻟﺬاﻛﺮة ‪ PROM‬ﺑﻌﺪ اﻟﱪﳎﺔ ‪108 . ................................ ................................ ................................‬‬
‫اﻟﺸﻜﻞ‪ 20-2‬ﺷﺮﳛﺔ ‪ PLA‬ﻏﲑ ﻣﱪﳎﺔ ‪109 ...... ................................ ................................ ................................‬‬
‫اﻟﺸﻜﻞ‪ 21-2‬ﺷﺮﳛﺔ ‪ PLA‬ﻣﱪﳎﺔ ‪109 .......... ................................ ................................ ................................‬‬
‫اﻟﺸﻜﻞ‪ 22-2‬ﺷﺮﳛﺔ ‪ PAL‬ﻏﲑ ﻣﱪﳎﺔ )ﻣﺼﻔﻮﻓﺔ ‪ AND‬ﻗﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ وﻣﺼﻔﻮﻓﺔ ‪ OR‬ﻣﻌﺮﻓﺔ ﻣﺴﺒﻘﺎً( ‪110 ................ ................................‬‬
‫اﻟﺸﻜﻞ‪ 23-2‬اﻟﺒﻨﻴﺔ اﻟﻌﺎﻣﺔ ﻟﺸﺮاﺋﺢ اﻟـ‪111 . ................................ ................................ ................................ CPLD‬‬
‫اﻟﺸﻜﻞ‪ 24-2‬اﳌﺨﻄﻂ اﻟﺼﻨﺪوﻗﻲ ﻟﻠﺒﻨﻴﺔ اﻟﺪاﺧﻠﻴﺔ ﻟﻠـ‪111 .................... ................................ ................................CPLD‬‬
‫اﻟﺸﻜﻞ‪ 25-2‬اﻟﺒﻨﻴﺔ اﻟﻌﺎﻣﺔ ﻟﻨﻮاﺧﺐ اﻟـ‪ CPLD‬اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ‪111 ................... ................................ ................................‬‬
‫اﻟﺸﻜﻞ‪ 26-2‬اﳌﺨﻄﻂ اﻟﺰﻣﲏ ﻟﻠﺸﺮﻛﺎت اﳌﺼﻨﻌﺔ ﻟﻠـ‪114 ............... ................................ ................................PLD/FPGA‬‬
‫اﻟﺸﻜﻞ‪ 27-2‬اﻟﱰﺗﻴﺐ اﻟﻌﺎﳌﻲ ﻟﻠﺸﺮﻛﺎت اﳌﺼﻨﻌﺔ ﻟﻠـ‪ PLD/FPGA‬ﻟﻌﺎم ‪114 .... ................................ ................................2008‬‬
‫اﻟﺸﻜﻞ‪ 28-2‬اﶈﺎور اﻷﺳﺎﺳﻴﺔ ﻟﺘﺼﻨﻴﻔﺎت ﺗﻘﻨﻴﺔ اﻟـ‪116 ..................... ................................ ................................ FPGA‬‬
‫اﻟﺸﻜﻞ‪ 29-2‬اﻟﺒﲎ اﻷﺳﺎﺳﻴﺔ اﻷرﺑﻌﺔ اﻟﱵ ﺗﺼﻨﻊ وﻓﻘﻬﺎ ﺷﺮاﺋﺢ اﻟـ‪117 ......... ................................ ................................ FPGA‬‬
‫اﻟﺸﻜﻞ‪ 30-2‬اﻟﺒﻨﻴﺔ ﻣﻦ اﻟﻨﻮع ‪118 ........................ ................................ ................................ Symmetrical Array‬‬
‫اﻟﺸﻜﻞ‪ 31-2‬اﻟﺒﻨﻴﺔ ﻣﻦ اﻟﻨﻮع ‪118 ...... ................................ ................................ Actel ACT3 FPGA - Row-based‬‬
‫اﻟﺸﻜﻞ‪ 32-2‬اﻟﺒﻨﻴﺔ ﻣﻦ اﻟﻨﻮع ‪118 ... ................................ ................................ Altera Stratix II - Hierarchical-PLD‬‬
‫اﻟﺸﻜﻞ‪ 33-2‬اﻟﺒﻨﻴﺔ ﻣﻦ اﻟﻨﻮع ‪118 ................. ................................ ................................ ProASIC - Sea-of-gates‬‬
‫اﻟﺸﻜﻞ‪ 34-2‬اﻟﺒﻨﻴﺔ اﻟﺪاﺧﻠﻴﺔ اﻟﻌﺎﻣﺔ ﻟﺸﺮاﺋﺢ اﻟـ‪119 ................. ................................ (c) Actel ،(b) Altera ،(a) Xilinx -FPGA‬‬
‫اﻟﺸﻜﻞ‪ 35-2‬اﻟﺒﻨﻴﺔ اﻟﻌﺎﻣﺔ ﻟﺸﺮﳛﺔ ‪120 ... ................................ ................................ ................................FPGA‬‬
‫‪XIII‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫ﻗﺎﺋﻤﺔ اﶈﺘﻮﻳﺎت | ‪Table of Contents‬‬

‫اﻟﺸﻜﻞ‪ 36-2‬ﺑﻨﻴﺔ اﻟﻜﺘﻠﺔ اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﻟﺸﺮاﺋﺢ ‪120 ... ................................ ................................ Xilinx Spartan-3‬‬
‫اﻟﺸﻜﻞ‪ 37-2‬ﻃﺮﻳﻘﺔ ﺗﻮﺿﻊ ﻛﺘﻞ اﻟـ‪ CLBs‬داﺧﻞ ﺷﺮﳛﺔ اﻟـ‪121 .............. ................................ ................................FPGA‬‬
‫اﻟﺸﻜﻞ‪ 38-2‬اﻟﻜﺘﻞ اﳌﻨﻄﻘﻴﺔ وﻋﻨﺎﺻﺮﻫﺎ اﳌﺘﻮﻓﺮة ﻋﻠﻰ ﺷﺮاﺋﺢ اﻟـ‪ FPGA‬ﻟﻠﻌﺎﺋﻠﺔ ‪121 .............. ................................ Xilinx Spartan-3E‬‬
‫اﻟﺸﻜﻞ‪ 39-2‬اﳌﺼﺎدر اﳌﻮﺟﻮدة ﻋﻠﻰ ٍ‬
‫ﻛﻞ ﻣﻦ اﻟـ‪ SLICEL‬واﻟـ‪121 ....... ................................ ................................ SLICEM‬‬
‫اﻟﺸﻜﻞ‪ 40-2‬اﻟﺒﻨﻴﺔ اﻟﺪاﺧﻠﻴﺔ ﻟﻠـ‪122 .. ................................ ................................ ................................ SLICEM‬‬
‫اﻟﺸﻜﻞ‪ 41-2‬اﻟﺒﻨﻴﺔ اﻟﺪاﺧﻠﻴﺔ ﻟﻠﻮﺣﺪة ‪123 . ................................ ................................ ................................ IOBs‬‬
‫اﻟﺸﻜﻞ‪ 42-2‬ﺗﻮﺿﻊ وﺣﺪات اﻟـ‪ Banks‬ﻋﻠﻰ أﻃﺮاف ﺷﺮﳛﺔ ‪123 ............ ................................ ................................ FPGA‬‬
‫اﻟﺸﻜﻞ‪ 43-2‬ﺗﻮﺿﻊ ﻋﻠﻰ ﺷﻜﻞ أﻋﻤﺪة ﻟﻜﺘﻞ اﻟﺬاﻛﺮة ‪ RAM‬اﳌﺪﳎﺔ ﻋﻠﻰ ﺷﺮﳛﺔ اﻟـ‪124 ....................... ................................FPGA‬‬
‫اﻟﺸﻜﻞ‪ 44-2‬ﺗﻮﺿﻊ ﻛﺘﻞ اﻟﺬاﻛﺮة ‪ RAM‬اﳌﺪﳎﺔ ﻋﻠﻰ ﺷﺮاﺋﺢ ‪124 ........ ................................ ................................ .Xilinx‬‬
‫اﻟﺸﻜﻞ‪ 45-2‬اﻟﻜﺘﻠﺔ اﳌﻨﻄﻘﻴﺔ ‪ BRAM-18KB‬واﻟﻜﺘﻠﺔ اﳌﻨﻄﻘﻴﺔ ‪124 ............................ ................................ BRAM-36KB‬‬
‫اﻟﺸﻜﻞ‪ 46-2‬ﻓﺮوع ﺷﺠﺮة اﻟﺴﺎﻋﺔ‪125 ........... ................................ ................................ ................................‬‬
‫اﻟﺸﻜﻞ‪ 47-2‬ﻣﻨﻈﻢ ﻋﻤﻞ ﻧﺒﻀﺎت اﻟﺴﺎﻋﺔ ﻳﻮﻟﺪ اﻟﻌﺪﻳﺪ ﻣﻦ اﻟﱰددات اﻟﺘﻔﺮﻋﻴﺔ ‪125 ..... ................................ ................................‬‬
‫اﻟﺸﻜﻞ‪ 48-2‬اﻟﺒﻨﻴﺔ اﻟﻮﻇﻴﻔﻴﺔ ﻟﻠﻮﺣﺪة ‪126 ................................ ................................ ................................ DCM‬‬
‫اﻟﺸﻜﻞ ‪ 49-2‬ﺗﻮﺿﻊ اﻟﻮﺣﺪات ‪ DCM‬ﻋﻠﻰ اﻟﺸﺮاﺋﺢ ‪126 ......... ................................ ................................ XC3SxxxxE‬‬
‫اﻟﺸﻜﻞ‪ 50-2‬ﻣﺼﻔﻮﻓﺔ ﺗﺒﺪﻳﻞ إﺷﺎرة اﻟﺘﻮﻗﻴﺖ إﱃ ‪127 .............. ................................ ................................ BUFGMUX‬‬
‫اﻟﺸﻜﻞ‪ 51-2‬اﻟﻮﺻﻼت اﻟﺪاﺧﻠﻴﺔ وﻣﺼﻔﻮﻓﺔ اﻟﺘﺒﺪﻳﻞ ﻟﻠﺸﺮاﺋﺢ ‪127 ........ ................................ ................................ Spartan3‬‬
‫اﻟﺸﻜﻞ‪ 52-2‬اﻟﻮﺻﻼت اﻟﺪاﺧﻠﻴﺔ – ﻃﺮﻳﻘﺔ اﻟﻮﺻﻞ ‪127 ............... ................................ ................................ Long Line‬‬
‫اﻟﺸﻜﻞ‪ 53-2‬اﻟﻮﺻﻼت اﻟﺪاﺧﻠﻴﺔ – ﻃﺮﻳﻘﺔ اﻟﻮﺻﻞ ‪127 ................ ................................ ................................ Hex Line‬‬
‫اﻟﺸﻜﻞ‪ 54-2‬اﻟﻮﺻﻼت اﻟﺪاﺧﻠﻴﺔ – ﻃﺮﻳﻘﺔ اﻟﻮﺻﻞ ‪128 ............ ................................ ................................ Double Line‬‬
‫اﻟﺸﻜﻞ‪ 55-2‬اﻟﻮﺻﻼت اﻟﺪاﺧﻠﻴﺔ – ﻃﺮﻳﻘﺔ اﻟﻮﺻﻞ ‪128 .............. ................................ ................................Direct Line‬‬
‫اﻟﺸﻜﻞ‪ 56-2‬أﻋﻤﺪة ﻣﻦ اﻟﻀﻮارب ﻋﻠﻰ اﻟﺘﻮازي ﻣﻊ ﻛﺘﻞ اﻟـ‪ – BRAM‬اﻟﺸﺮاﺋﺢ ‪128 ................... ................................ XC3Sxxxx‬‬
‫اﻟﺸﻜﻞ‪ 57-2‬اﻟﺒﻨﻴﺔ اﻟﺪاﺧﻠﻴﺔ ﻟﻠﻀﺎرب اﳌﺪﻣﺞ ﺑـ‪ 18x18‬ﻣﺪﺧﻞ وﳐﺮج ‪129 ........... ................................ ................................‬‬
‫اﻟﺸﻜﻞ‪ 58-2‬اﻟﻌﻨﺎﺻﺮ اﳌﻜﻮﻧﺔ ﻟﻠﻀﺎرب اﳌﻜﺪس ‪129 .............................. ................................ ................................‬‬
‫اﻟﺸﻜﻞ‪ 59-2‬ﻋﻨﺎﺻﺮ ﻣﺪﳎﺔ ﺧﺎرج اﻟﺒﻨﺎء اﻟﺮﺋﻴﺴﻲ ﻟﺸﺮﳛﺔ اﻟـ‪130 ............. ................................ ................................ FPGA‬‬
‫اﻟﺸﻜﻞ‪ 60-2‬ﻋﻨﺎﺻﺮ ﻣﺪﳎﺔ ﺿﻤﻦ اﻟﺒﻨﺎء اﻟﺮﺋﻴﺴﻲ ﻟﺸﺮﳛﺔ اﻟـ‪130 ............. ................................ ................................ FPGA‬‬
‫اﻟﺸﻜﻞ‪ 61-2‬اﳌﺨﻄﻂ اﻟﺪاﺧﻠﻲ ﻟﻠﻤﻌﺎﰿ ‪130 ......................... ................................ ................................ PowerPC‬‬
‫اﻟﺸﻜﻞ‪ 62-2‬اﳌﺨﻄﻂ اﻟﺒﻨﻴﻮي ﻟﺸﺮاﺋﺢ ‪ FPSLIC‬وارﺗﺒﺎط اﳌﻌﺎﰿ ‪ AVR‬ﻣﻊ اﻟـ‪131 ........................... ................................ FPGA‬‬
‫اﻟﺸﻜﻞ‪ 63-2‬اﳌﺨﻄﻂ اﻟﺼﻨﺪوﻗﻲ ﻟﻠﻤﻌﺎﰿ ‪ MicroBlaze‬اﳌﺪﻣﺞ ﰲ ﺷﺮاﺋﺢ ‪132 ............................. ................................ Xilinx‬‬
‫اﻟﺸﻜﻞ‪ 64-2‬اﳌﺨﻄﻂ اﻟﺼﻨﺪوﻗﻲ ﻟﻠﻤﻌﺎﰿ ‪ PicoBlaze‬اﳌﺪﻣﺞ ﰲ ﺷﺮاﺋﺢ ‪132 ............................... ................................ Xilinx‬‬
‫اﻟﺸﻜﻞ‪ 65-2‬اﳌﺨﻄﻂ اﻟﺼﻨﺪوﻗﻲ ﻟﻠﻤﻌﺎﰿ ‪ NiosII‬اﳌﺪﻣﺞ ﰲ ﺷﺮاﺋﺢ ‪132 .... ................................ ................................ Altera‬‬
‫اﻟﺸﻜﻞ‪ 66-2‬اﳌﺨﻄﻂ اﻟﺼﻨﺪوﻗﻲ ﻟﻮﺣﺪة اﻟﱰاﺳﻞ اﳌﺴﺘﺨﺪﻣﺔ ﰲ ﺷﺮاﺋﺢ ‪133 ............................... ................................ Vertix-6‬‬
‫اﻟﺸﻜﻞ‪ 67-2‬ﺗﻮﺿﻊ وﺣﺪات ‪ DSP48A‬ﻋﻠﻰ ﺷﺮاﺋﺢ ‪133 .......... ................................ ................................ Spartan-3A‬‬
‫اﻟﺸﻜﻞ‪ 68-2‬اﻟﺒﻨﻴﺔ اﻟﺪاﺧﻠﻴﺔ ﻟﻠﻮﺣﺪة ‪134 ............................. ................................ ................................ DSP84A‬‬
‫اﻟﺸﻜﻞ‪ 69-2‬ﻣﻘﺎرﻧﺔ ﺑﲔ ﺷﺮاﺋﺢ اﻟـ‪ FPGA‬ﻣﻦ ﺷﺮﻛﺔ ‪ Xilinx‬اﳌﺨﺼﺼﺔ ﻟﺘﻄﺒﻴﻘﺎت ‪134 ......................... ................................DSP‬‬
‫اﻟﺸﻜﻞ‪ 70-2‬ﻣﻘﺎرﻧﺔ ﺳﺮﻋﺔ اﻟﺘﻨﻔﻴﺬ ﳌﻌﺎﰿ ‪ DSP‬ﺗﻘﻠﻴﺪي ﻣﻊ وﺣﺪة ‪ DSP‬ﻋﻠﻰ ﺷﺮﳛﺔ ‪ FPGA‬ﳌﺮﺷﺢ رﻗﻤﻲ ‪134 ................................256-bit‬‬
‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪XIV‬‬
‫‪I‬‬ ‫اﶈﺘﻮى | ‪Index‬‬

‫اﻟﺸﻜﻞ‪ 71-2‬ﺗﻮﻟﻴﺪ ‪ IP‬ﳐﺼﺺ ﻟﺘﺨﻔﻴﺾ ﺿﺠﻴﺞ اﻟﺼﻮر ﺑﺎﺳﺘﺨﺪام ﺑﺮﻧﺎﻣﺞ ‪135 ........................ ................................ LogicCore‬‬
‫اﻟﺸﻜﻞ‪ 72-2‬ﳐﻄﻂ ﺷﺎﻣﻞ ﻟﻠﻤﺼﺎدر اﻟﱵ ﺗﺘﻮﻓﺮ ﻋﻠﻰ ﺷﺮاﺋﺢ اﻟـ‪136 .......... ................................ ................................ FPGA‬‬
‫اﻟﺸﻜﻞ‪ 73-2‬اﳌﺨﻄﻂ اﻟﺼﻨﺪوﻗﻲ ﳌﺮاﺣﻞ ﺗﺼﻤﻴﻢ أﻧﻈﻤﺔ اﻟـ‪136 .............. ................................ ................................ FPGA‬‬
‫اﻟﺸﻜﻞ‪ 74-2‬ﻣﺮاﺣﻞ ﺗﺼﻤﻴﻢ وﺑﺮﳎﺔ ﺷﺮاﺋﺢ اﻟـ‪137 ......................... ................................ ................................ FPGA‬‬
‫اﻟﺸﻜﻞ‪ 75-2‬اﻟﺒﻨﻴﺔ اﻟﻌﺎﻣﺔ ﻟﺸﺮاﺋﺢ اﻟـ‪ – FPOA‬اﻟﻌﺎﺋﻠﺔ ‪139 ................. ................................ ................................ Arrix‬‬
‫اﻟﺸﻜﻞ‪ 76-2‬اﳌﺨﻄﻂ اﻟﺪاﺧﻠﻲ ﻟﺸﺮﳛﺔ اﻟـ‪140 ........................... ................................ ................................ MPGA‬‬
‫اﻟﺸﻜﻞ‪ 77-2‬ﳐﻄﻂ ﺗﻮﺿﻊ اﻟﻮﺣﺪات واﻟﻜﺘﻞ اﳌﻨﻄﻘﻴﺔ اﻟﺘﺸﺎﻬﺑﻴﺔ ﻋﻠﻰ ﺷﺮاﺋﺢ ‪141 ............... ................................ Actel SmartFusion‬‬
‫اﻟﺸﻜﻞ‪ 78-2‬اﳌﺨﻄﻂ اﻟﺼﻨﺪوﻗﻲ ﻟﻌﻨﺎﺻﺮ اﻟﺸﺮاﺋﺢ اﳍﺠﻴﻨﺔ ‪141 ............................... ................................ Actel SmartFusion‬‬
‫اﻟﺸﻜﻞ‪ 1-3‬اﻟﺘﻄﻮر اﻟﺰﻣﲏ ﻟﺘﻘﻨﻴﺎت ﺗﺼﻤﻴﻢ وﺑﺮﳎﺔ أﻧﻈﻤﺔ اﻟﻜﻴﺎن اﻟﺼﻠﺐ ‪143 ......... ................................ ................................‬‬
‫اﻟﺸﻜﻞ‪ 2-3‬ﻫﻴﻜﻠﻴﺔ اﻟﺘﺼﻤﻴﻢ ﻟﻠﻜﻴﺎن اﻟﺼﻠﺐ ‪144 . ................................ ................................ ................................‬‬
‫اﻟﺸﻜﻞ‪ 3-3‬ﻫﻴﻜﻠﻴﺔ اﻟﺘﺼﻤﻴﻢ ﻟﻸﻧﻈﻤﺔ اﻟﱪﳎﻴﺔ ‪144 ................................ ................................ ................................‬‬
‫اﻟﺸﻜﻞ‪ 4-3‬اﳌﺨﻄﻂ اﻟﺘﺼﻤﻴﻤﻲ ‪ Schematic‬ﻟﺪارة ﻋﺪاد ﺳﺒﺎق )‪ (Stopwatch‬ﺑﺎﺳﺘﺨﺪام اﻟﺒﻴﺌﺔ ‪145 .... ................................ Xilinx ISE‬‬
‫اﻟﺸﻜﻞ‪ 5-3‬اﳍﻴﻜﻠﻴﺔ اﻟﻌﺎﻣﺔ ﻟﻜﺘﺎﺑﺔ ﺑﺮﻧﺎﻣﺞ ﺑﻠﻐﺔ اﻟـ‪147 ..................... ................................ ................................ VHDL‬‬
‫اﻟﺸﻜﻞ‪ 6-3‬اﳌﻜﺘﺒﺎت اﻟﻘﻴﺎﺳﻴﺔ اﳌﺴﺘﺨﺪﻣﺔ ﰲ ﻟﻐﺔ اﻟـ‪148 ................... ................................ ................................ VHDL‬‬
‫اﻟﺸﻜﻞ‪ 7-3‬ﺗﻌﺮﻳﻒ اﻟﻜﻴﺎن ﻟﺒﻮاﺑﺔ ‪ AND‬ﺑﻠﻐﺔ اﻟـ‪148 ..................... ................................ ................................ VHDL‬‬
‫اﻟﺸﻜﻞ‪ 8-3‬ﺗﻌﺮﻳﻒ اﻟﻮﺻﻒ اﻟﺒﻨﻴﻮي ﻟﺒﻮاﺑﺔ ‪ AND‬ﺑﻠﻐﺔ اﻟـ‪148 ............. ................................ ................................ VHDL‬‬
‫اﻟﺸﻜﻞ‪ 9-3‬ﲤﺜﻴﻞ ﺑﻮاﺑﺔ ‪ AND‬ﺑﻠﻐﺔ اﻟـ‪149 .............................. ................................ ................................ Verilog‬‬
‫اﻟﺸﻜﻞ‪ 10-3‬اﻟﻌﻼﻗﺔ ﺑﲔ ازدﻳﺎد ﺗﻌﻘﻴﺪ اﻟﺪارات اﳌﺘﻜﺎﻣﻠﺔ وﻣﻘﺪرة اﳌﺼﻤﻤﲔ ﻋﻠﻰ ﺗﻄﻮﻳﺮﻫﺎ ‪150 .......................... ................................‬‬
‫اﻟﺸﻜﻞ‪ 11-3‬اﳌﺨﻄﻂ اﻟﺘﺪﻓﻘﻲ ﻟﺘﻮﻟﻴﺪ اﻟـ‪151 .............................. ................................ ................................ netlist‬‬
‫اﻟﺸﻜﻞ‪ 12-3‬اﻟﻮاﺟﻬﺔ اﻟﱪﳎﻴﺔ ﻟﻠﺒﻴﺌﺔ ‪151 ........................... ................................ ................................ Catapult-C‬‬
‫اﻟﺸﻜﻞ‪ 13-3‬اﳌﺨﻄﻂ اﻟﺘﺪﻓﻘﻲ ﻟﺘﻮﻟﻴﺪ اﳌﻠﻒ اﻟﱪﳎﻲ ‪152 ........................... ................................ ................................‬‬
‫اﻟﺸﻜﻞ‪ 14-3‬واﺟﻬﺔ ﺑﻴﺌﺔ اﻟﱪﻧﺎﻣﺞ ‪152 ............ ................................ ................................ Impulse-C CoDeveloper‬‬
‫اﻟﺸﻜﻞ‪ 15-3‬أوﺟﻪ اﻟﺘﺸﺎﺑﻪ ﺑﲔ ﻟﻐﺔ اﻟـ‪ Handel-C‬واﻟﻠﻐﺔ اﻟﻘﻴﺎﺳﻴﺔ ‪153 .. ................................ ................................ ANSI-C‬‬
‫اﻟﺸﻜﻞ‪ 16-3‬اﳌﺨﻄﻂ اﻟﺘﺪﻓﻘﻲ ﻟﺘﻮﻟﻴﺪ اﳌﻠﻒ اﻟﱪﳎﻲ ‪153 ........................... ................................ ................................‬‬
‫اﻟﺸﻜﻞ‪ 17-3‬واﺟﻬﺔ ﺑﻴﺌﺔ اﻟﱪﻧﺎﻣﺞ ‪153 .............................. ................................ ................................ Handle-C‬‬
‫اﻟﺸﻜﻞ‪ 18-3‬ﻣﺘﺘﺎﻟﻴﺔ ﻓﻴﺒﻮﻧﺎﺗﺸﻲ اﳊﺴﺎﺑﻴﺔ ﺑﻠﻐﺔ اﻟـ‪154 .................. ................................ ................................ Handel-C‬‬
‫اﻟﺸﻜﻞ ‪ 19-3‬ﲤﺜﻴﻞ اﻟﺘﻌﻠﻴﻤﺔ ”‪ “Par‬ﻟﻠﺘﻨﻔﻴﺬ اﻟﺘﻔﺮﻋﻲ واﻟﺘﻌﻠﻴﻤﺔ ”‪ “Seq‬ﻟﻠﺘﻨﻔﻴﺬ اﻟﺘﺴﻠﺴﻠﻲ ‪154 ......................... ................................‬‬
‫اﻟﺸﻜﻞ‪ 20-3‬ﺑﻴﺌﺔ ﻟﻐﺔ اﻟﱪﳎﺔ ‪155 .. ................................ ................................ ................................ DIME-C‬‬
‫اﻟﺸﻜﻞ‪ 21-3‬اﻷداة ‪ DIMETalk‬ﺗﻌﺮض ﺷﺒﻜﺔ اﺗﺼﺎل ﺑﲔ وﺣﺪات ﻣﻨﻄﻘﻴﺔ‪155 .... ................................ ................................‬‬
‫اﻟﺸﻜﻞ‪ 22-3‬ﻣﻘﺎرﻧﺔ ﺑﺮﻧﺎﻣﺞ ﻣﻜﺘﻮب ﺑﻠﻐﺔ اﻟـ‪ C‬اﻟﻘﻴﺎﺳﻴﺔ ﻣﻊ ﺑﺮﻧﺎﻣﺞ ﺑﻠﻐﺔ اﻟـ‪156 .............................. ................................ Spec-C‬‬
‫اﻟﺸﻜﻞ‪ 23-3‬ﻫﻴﻜﻠﻴﺔ اﻟﱪﳎﻴﺔ ﰲ ﻟﻐﺔ اﻟـ‪156 ............................. ................................ ................................ Spec-C‬‬
‫اﻟﺸﻜﻞ‪ 24-3‬ﺑﺮﻧﺎﻣﺞ ﻟﺪارة ﺟﺎﻣﻊ )‪ (Adder‬ﺑﻠﻐﺔ اﻟـ‪157 ................ ................................ ................................ SystemC‬‬
‫اﻟﺸﻜﻞ‪ 25-3‬ﻣﻘﺎرﻧﺔ ﺑﲔ اﻟﻠﻐﺎت اﻟﱪﳎﻴﺔ ﻋﺎﻟﻴﺔ اﳌﺴﺘﻮى اﻷﻛﺜﺮ ﺷﻬﺮة ‪158 ............ ................................ ................................‬‬
‫اﻟﺸﻜﻞ‪ 26-3‬اﻟﻌﻼﻗﺔ ﺑﲔ اﳉﻬﺪ اﳌﺒﺬول ﻟﻜﺘﺎﺑﺔ ﺑﺮﻧﺎﻣﺞ وﻓﻌﺎﻟﻴﺔ اﻟﱪﻧﺎﻣﺞ ﻟﻠﻐﺎت وﺻﻒ وﺑﺮﳎﺔ اﻟﻜﻴﺎن اﻟﺼﻠﺐ ‪159 ......... ................................‬‬
‫اﻟﺸﻜﻞ‪ 27-3‬ﺗﺼﻨﻴﻒ وﻇﻴﻔﻲ ﻟﻠﻐﺎت ﺑﺮﳎﺔ اﻟﻜﻴﺎن اﻟﺼﻠﺐ ﻋﺎﻟﻴﺔ اﳌﺴﺘﻮى ‪159 ........ ................................ ................................‬‬
‫‪XV‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫ﻗﺎﺋﻤﺔ اﶈﺘﻮﻳﺎت | ‪Table of Contents‬‬

‫اﻟﺸﻜﻞ‪ 28-3‬ﳐﻄﻂ ﺑﺮﳎﻲ ﺑﺎﺳﺘﺨﺪام اﻟﺒﻴﺌﺔ ‪160 ......... ................................ ................................ Agilent VEE Pro 9.2‬‬
‫اﻟﺸﻜﻞ‪ 29-3‬ﲢﻮﻳﻞ اﻟﻨﺺ إﱃ اﻟﺼﻮت ﰲ اﻟﺒﻴﺌﺔ اﻟﱪﳎﻴﺔ ‪160 ............... ................................ ................................MVPL‬‬
‫اﻟﺸﻜﻞ‪ 30-3‬درﺟﺔ اﻟﺘﻌﻘﻴﺪ ﻟﻠﻨﻈﺎم وﻣﺴﺘﻮى اﻟﺘﺠﺮﻳﺪ ﻟﺘﻄﻮر ﺗﻘﻨﻴﺎت اﻟﺪارات اﳌﺘﻜﺎﻣﻠﺔ ‪161 ............................. ................................‬‬
‫اﻟﺸﻜﻞ‪ 31-3‬ﳐﻄﻂ ﺗﻄﻮر اﻟﱪﳎﺔ اﳊﺎﺳﻮﺑﻴﺔ اﳌﻮاﻓﻖ ﻟﺘﻄﻮر اﻟﻜﻴﺎن اﻟﺼﻠﺐ ‪161 ........ ................................ ................................‬‬
‫اﻟﺸﻜﻞ‪ 32-3‬ﳐﻄﻂ ﺗﻄﻮر اﻟﻠﻐﺎت اﻟﱪﳎﻴﺔ اﳌﻮاﻓﻖ ﻟﺪرﺟﺔ ﺗﻌﻘﻴﺪ اﻟﻜﻴﺎن اﻟﺼﻠﺐ ‪161 ... ................................ ................................‬‬
‫اﻟﺸﻜﻞ‪ 33-3‬ﺑﻌﺾ اﻟﺘﻄﺒﻴﻘﺎت اﻷﺳﺎﺳﻴﺔ ﻟﻠﺒﻴﺌﺔ اﻟﱪﳎﻴﺔ ‪163 ........... ................................ ................................ LabVIEW‬‬
‫اﻟﺸﻜﻞ ‪ 34-3‬اﻟﻮﺟﻬﺎت اﻷﺳﺎﺳﻴﺔ واﳌﺴﺘﻌﺮض ﻟﻠﺒﻴﺌﺔ اﻟﱪﳎﻴﺔ ‪163 ...... ................................ ................................ LabVIEW‬‬
‫اﻟﺸﻜﻞ‪ 35-3‬ﳎﻤﻮﻋﺔ ﻣﻨﺘﻘﺎة ﻣﻦ أﻛﱪ اﻟﺸﺮﻛﺎت اﻟﻌﺎﳌﻴﺔ اﻟﱵ ﺗﺴﺘﺨﺪم اﻟﺒﻴﺌﺔ ‪164 .......................... ................................ LabVIEW‬‬
‫اﻟﺸﻜﻞ‪ 36-3‬واﺟﻬﺔ اﳌﺴﺘﺨﺪم ﻟﻠﺘﻄﺒﻴﻘﺎت اﻟﱪﳎﻴﺔ ﰲ اﻟﺒﻴﺌﺔ ‪164 ....... ................................ ................................ LabVIEW‬‬
‫اﻟﺸﻜﻞ‪ 37-3‬ﻟﻮﺣﺔ ﻋﻨﺎﺻﺮ اﻟﺘﺤﻜﻢ "‪ "Controls Palette‬ﰲ واﺟﻬﺔ اﳌﺴﺘﺨﺪم ﰲ اﻟﺒﻴﺌﺔ ‪164 ............ ................................ LabVIEW‬‬
‫اﻟﺸﻜﻞ‪ 38-3‬واﺟﻬﺔ اﻟﱪﻧﺎﻣﺞ ﻟﻠﺘﻄﺒﻴﻘﺎت اﻟﱪﳎﻴﺔ ﰲ اﻟﺒﻴﺌﺔ ‪165 ......... ................................ ................................ LabVIEW‬‬
‫اﻟﺸﻜﻞ‪ 39-3‬ﻟﻮﺣﺔ اﻟﻌﻨﺎﺻﺮ اﻟﻮﻇﻴﻔﻴﺔ "‪ "Functions Palette‬ﰲ اﻟﻮاﺟﻬﺔ اﻟﱪﳎﻴﺔ ﰲ اﻟﺒﻴﺌﺔ ‪165 ........... ................................ LabVIEW‬‬
‫اﻟﺸﻜﻞ ‪ 40-3‬اﻟﻌﻨﺎﺻﺮ اﻟﻮﻇﻴﻔﻴﺔ ﻟﻠﺤﻠﻘﺎت اﻟﺸﺮﻃﻴﺔ ﰲ اﻟﺒﻴﺌﺔ ‪166 ....... ................................ ................................LabVIEW‬‬
‫اﻟﺸﻜﻞ‪ 41-3‬اﳊﻠﻮل اﻟﱪﳎﻴﺔ وﺣﻠﻮل اﻟﻜﻴﺎن اﻟﺼﻠﺐ ﰲ اﻟﺒﻴﺌﺔ ‪166 ...... ................................ ................................ LabVIEW‬‬
‫اﻟﺸﻜﻞ‪ 42-3‬اﳌﺨﻄﻂ اﻟﱪﳎﻲ ﻻﺳﺘﺤﺼﺎل ﺑﻴﺎﻧﺎت ﻣﻌﺎﳉﺎﻬﺗﺎ وﲣﺰﻳﻨﻬﺎ ﰲ اﻟﱪﻧﺎﻣﺞ ‪168 .................... ................................ LabVIEW‬‬
‫اﻟﺸﻜﻞ‪ 43-3‬اﺳﺘﺨﺪام ﺧﺎﺻﻴﺔ اﻟﺘﻨﻘﻴﺢ "‪ "Execution Highlighting‬ﳌﺮاﻗﺒﺔ ﺗﺪﻓﻖ اﻟﺒﻴﺎﻧﺎت ﺑﲔ اﻟﻌﻘﺪ ﰲ اﻟﺒﻴﺌﺔ ‪168 ...................... LabVIEW‬‬
‫اﻟﺸﻜﻞ‪ 44-3‬ﺗﻨﻔﻴﺬ اﳌﻬﺎم اﻟﺘﻔﺮﻋﻴﺔ ﰲ اﻟﺒﻴﺌﺔ ‪ LabVIEW‬ﺑﺎﺳﺘﺨﺪام اﻟﻨﻤﻂ ‪169 ............. ................................ Producer/Consumer‬‬
‫اﻟﺸﻜﻞ‪ 45-3‬ﺗﻮزﻳﻊ اﳌﻬﺎم اﻟﺘﻠﻘﺎﺋﻲ )‪ (Automatic Multithreading‬ﰲ اﻟﺒﻴﺌﺔ ‪170 .................... ................................ LabVIEW‬‬
‫اﻟﺸﻜﻞ ‪ 46-3‬ﻣﺒﺪأ "‪ "Data Parallelism‬ﻋﻠﻰ ﻣﻌﺎﰿ ‪170 ......... ................................ ................................ Quad-core‬‬
‫اﻟﺸﻜﻞ‪ 47-3‬ﺗﻄﺒﻴﻖ "‪ "Data Parallelism‬ﻋﻠﻰ ﻣﻌﺎﰿ ‪ Quad-core‬ﰲ ‪170 ......................... ................................ LabVIEW‬‬
‫اﻟﺸﻜﻞ‪ 48-3‬ﲤﺜﻴﻞ اﳌﺒﺪأ اﻟﻌﺎم ﻟﻠﻤﻌﺎﳉﺔ اﳌﺘﺰاﻣﻨﺔ "‪ "Pipelining‬ﺑﺄرﺑﻊ ﻣﺴﺘﻮﻳﺎت ‪171 . ................................ ................................‬‬
‫اﻟﺸﻜﻞ‪ 49-3‬ﻣﻘﺎرﻧﺔ ﺑﲔ اﳌﻌﺎﳉﺔ اﻟﺘﺴﻠﺴﻠﻴﺔ )‪ (Sequential‬واﳌﻌﺎﳉﺔ اﳌﺘﺰاﻣﻨﺔ )‪ (4L.Pipelining‬ﰲ ﺑﻴﺌﺔ اﻟﱪﻧﺎﻣﺞ ‪171 .......................LabVIEW‬‬
‫اﻟﺸﻜﻞ‪ 50-3‬اﻟﱪﳎﺔ ﰲ اﻟﺰﻣﻦ اﳊﻘﻴﻘﻲ ﻟﻠﻤﻌﺎﳉﺎت ﻣﺘﻌﺪدة اﻟﻨﻮى ﰲ اﻟﺒﻴﺌﺔ ‪171 ........................... ................................ LabVIEW‬‬
‫اﻟﺸﻜﻞ‪ 51-3‬ﺑﺮﻧﺎﻣﺞ ﺑﺎﺳﺘﺨﺪام اﻟﺒﻴﺌﺔ ‪172 .................. ................................ ................................ LabVIEW FPGA‬‬
‫اﻟﺸﻜﻞ ‪ 52-3‬ﻟﻮﺣﺔ اﻟﺘﺤﻜﻢ ﺑﺎﻷداء وﻣﻮارد اﻟﺬاﻛﺮة ﰲ اﻟﺒﻴﺌﺔ ‪173 ...... ................................ ................................ LabVIEW‬‬
‫اﻟﺸﻜﻞ ‪ 53-3‬أداة ﻣﺘﻘﺪﻣﺔ ﻟﻠﻔﺤﺺ وﺗﺘﺒﻊ اﻷﺧﻄﺎء "‪ "Execution Trace‬ﰲ اﻟﺒﻴﺌﺔ ‪173 ................ ................................ LabVIEW‬‬
‫اﻟﺸﻜﻞ‪ 54-3‬ﻛﺘﺎﺑﺔ ﺑﺮاﻣﺞ ﺑﻠﻐﺔ اﻟـ‪ C‬ﺿﻤﻦ ﺑﻴﺌﺔ ‪ LabVIEW‬ﺑﺎﺳﺘﺨﺪام اﻟﻌﻨﺼﺮ اﻟﱪﳎﻲ ‪174 ................ ................................ C-node‬‬
‫اﻟﺸﻜﻞ ‪ 55-3‬اﻟﺘﻌﺎﻣﻞ ﻣﻊ اﳌﻠﻔﺎت "‪ ".m file‬ﺿﻤﻦ ﺑﻴﺌﺔ ‪ LabVIEW‬ﺑﺎﺳﺘﺨﺪام اﻟﻌﻨﺼﺮ ‪174 .. ................................ MathScript-Node‬‬
‫اﻟﺸﻜﻞ‪ 56-3‬ﻣﻘﺎرﻧﺔ اﳋﻄﻮات اﻟﱪﳎﻴﺔ ﺑﲔ ﻟﻐﺎت اﻟﱪﳎﺔ اﻟﻨﺼﻴﺔ واﻟﻠﻐﺎت اﻟﺮﺳﻮﻣﻴﺔ ‪175 . ................................ ................................‬‬
‫اﻟﺸﻜﻞ‪ 57-3‬ﻳﺒﲔ ﻣﻘﺎرﻧﺔً ﻟﻠﺨﻄﻮات اﻟﱪﳎﻴﺔ ﺑﲔ ﻟﻐﺎت اﻟﱪﳎﺔ اﻟﺮﺳﻮﻣﻴﺔ واﻟﻠﻐﺎت اﻟﻨﺼﻴﺔ ﻟﱪﳎﺔ ﺷﺮﳛﺔ ‪175 ......... ................................ .DSP‬‬
‫اﻟﺸﻜﻞ‪ 58-3‬ﻣﻘﺎرﻧﺔ ﺑﲔ اﻟﻠﻐﺎت اﻟﻨﺼﻴﺔ واﻟﺮﺳﻮﻣﻴﺔ ﻟﱪﳎﺔ ﺣﻠﻘﺔ اﺳﺘﺤﺼﺎل ﺑﻴﺎﻧﺎت ﻣﻦ ﺟﻬﺎز ﻗﻴﺎس وﻋﺮﺿﻬﺎ ﻋﻠﻰ راﺳﻢ إﺷﺎرة ‪176 ..........................‬‬
‫اﻟﺸﻜﻞ‪ 59-3‬ﻣﻘﺎرﻧﺔ ﺑﲔ اﻟﻠﻐﺎت اﻟﻨﺼﻴﺔ واﻟﺮﺳﻮﻣﻴﺔ ﻟﱪﳎﺔ ﺣﻠﻘﱵ اﺳﺘﺤﺼﺎل ﺑﻴﺎﻧﺎت ﻣﻦ ﺟﻬﺎزي ﻗﻴﺎس ﻋﻠﻰ اﻟﺘﻮا ِز وﻋﺮﺿﻬﺎ ‪176 .............................‬‬
‫اﻟﺸﻜﻞ‪ 60-3‬ﻣﻘﺎرﻧﺔ ﺑﲔ اﻟﻠﻐﺎت اﻟﻨﺼﻴﺔ واﻟﺮﺳﻮﻣﻴﺔ ﻟﱪﳎﺔ ﺣﻠﻘﱵ اﺳﺘﺤﺼﺎل ﺑﻴﺎﻧﺎت ﻋﻠﻰ اﻟﺘﻮا ِز وﲟﻌﺪﻻت اﺳﺘﺤﺼﺎل ﳐﺘﻠﻔﺔ ‪177 ............................‬‬
‫اﻟﺸﻜﻞ‪ 61-3‬ﻣﻘﺎرﻧﺔ ﺑﲔ اﻟﻠﻐﺎت اﻟﻨﺼﻴﺔ واﻟﺮﺳﻮﻣﻴﺔ ﻟﻘﺮاءة ﺑﻴﺎﻧﺎت رﻗﻤﻴﺔ ﻣﻦ ﻗﻄﺐ ﺷﺮﳛﺔ ‪177 ................... ................................ FPGA‬‬
‫اﻟﺸﻜﻞ‪ 62-3‬ﻣﻘﺎرﻧﺔ ﺑﲔ اﻟﻠﻐﺎت اﻟﻨﺼﻴﺔ واﻟﺮﺳﻮﻣﻴﺔ ﻟﻘﺮاءة ﺑﻴﺎﻧﺎت ﺸﺎﻬﺑﻴﺔ ﻣﻦ ﻗﻄﺐ ﺷﺮﳛﺔ ‪177 ................. ................................ FPGA‬‬
‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪XVI‬‬
‫‪I‬‬ ‫اﶈﺘﻮى | ‪Index‬‬

‫اﻟﺸﻜﻞ‪ 63-3‬ﻣﻘﺎرﻧﺔ ﺑﲔ اﻟﻠﻐﺎت اﻟﻨﺼﻴﺔ واﻟﺮﺳﻮﻣﻴﺔ ﻟﻘﺮاءة ﺑﻴﺎﻧﺎت ﺸﺎﻬﺑﻴﺔ ﻣﻦ ﻗﻄﺐ ﺷﺮﳛﺔ ‪ FPGA‬وﲣﺰﻳﻨﻬﺎ‪178 ......... ................................‬‬
‫اﻟﺸﻜﻞ‪ 64-3‬ﻧﺴﺒﺔ اﺳﺘﺨﺪام اﻟﺒﻴﺌﺔ ‪ LabVIEW‬ﰲ ﲡﻬﻴﺰات اﻟﺘﺤﻜﻢ واﺳﺘﺤﺼﺎل اﻟﺒﻴﺎﻧﺎت ﻟﻌﺎم ‪179 ............ ................................ 2006‬‬
‫اﻟﺸﻜﻞ‪ 65-3‬ﳎﺎﻻت اﻟﺘﻄﺒﻴﻘﺎت ﻟﻸدوات اﻟﱪﳎﻴﺔ ﻟﻠﺒﻴﺌﺔ ‪181 .......... ................................ ................................ LabVIEW‬‬
‫اﻟﺸﻜﻞ ‪ 1-4‬اﳌﺨﻄﻂ اﻟﺘﻤﺜﻴﻠﻲ ﳌﺒﺤﺚ اﻟﺘﻌﻠﻴﻢ اﳍﻨﺪﺳﻲ ‪188 ........................ ................................ ................................‬‬
‫اﻟﺸﻜﻞ‪ 2-4‬ﻣﻨﺤﲏ ﻣﻌﺎﻣﻞ اﻟﻨﺴﻴﺎن ﻟﻠﻤﻌﻠﻮﻣﺎت ‪194 ............................... ................................ ................................‬‬
‫اﻟﺸﻜﻞ‪ 3-4‬آﻟﻴﺔ ﲣﺰﻳﻦ اﳌﻌﻠﻮﻣﺎت ﰲ اﻟﺬاﻛﺮة اﻟﺒﺸﺮﻳﺔ ‪194 ........................... ................................ ................................‬‬
‫اﻟﺸﻜﻞ‪ 4-4‬ﳕﻮذج ‪ Kolb‬ﰲ اﻟﺘﻌﻠﻢ اﻟﺘﺠﺮﻳﱯ اﻟﺒﻨﺎﺋﻲ ‪205 ........................... ................................ ................................‬‬
‫اﻟﺸﻜﻞ‪212 ............ ................................ ................................ Felder-Silverman Index of Learning Styles 5-4‬‬
‫اﻟﺸﻜﻞ‪214 ......................... ................................ Student-centered Learning vs. Teacher-centered Learning 6-4‬‬
‫اﻟﺸﻜﻞ‪215 ............... ................................ ................................ Problem-based Learning Concept-Map 7-4‬‬
‫اﻟﺸﻜﻞ‪ 8-4‬ﻣﺮاﺣﻞ دورة اﻟﻌﻠﻢ اﻟﻘﺎﺋﻢ ﻋﻠﻰ ﺣﻞ اﳌﺸﻜﻼت ‪217 ..................... ................................ ................................‬‬
‫اﻟﺸﻜﻞ‪ 9-4‬اﳌﺨﻄﻂ اﳌﻨﻬﺠﻲ ﻟﻌﻤﻠﻴﺔ اﻟﺘﻌﻠﻢ اﻟﻘﺎﺋﻢ ﻋﻠﻰ ﺣﻞ اﳌﺸﻜﻼت ‪218 ......... ................................ ................................‬‬
‫اﻟﺸﻜﻞ‪ 10-4‬اﳌﺨﻄﻂ اﻟﺼﻨﺪوﻗﻲ ﻟﻨﻈﺎم ﲢﻜﻢ ذو ﺗﻐﺬﻳﺔ ﻋﻜﺴﻴﺔ ‪220 ............... ................................ ................................‬‬
‫اﻟﺸﻜﻞ‪ 11-4‬ﳕﻮذج اﻟﺘﻘﻴﻴﻢ اﻟﺒﻨﺎﺋﻲ واﻟﺘﻐﺬﻳﺔ اﻟﻌﻜﺴﻴﺔ ﻟ ـ‪222 ............. ................................ ................................ [649]Juwah‬‬
‫اﻟﺸﻜﻞ‪ 12-4‬ﳕﻮذج ‪ Gustafson‬ﻟﻠﺘﺼﻤﻴﻢ اﻟﺘﻌﻠﻴﻤﻲ )‪224 .................. ................................(Instructional design cycle model‬‬
‫اﻟﺸﻜﻞ‪ 13-4‬أﻧﻮاع اﳌﺨﺎﺑﺮ ﺗﺼﻨﻴﻔﺎﻬﺗﺎ ‪234 ....... ................................ ................................ ................................‬‬
‫اﻟﺸﻜﻞ‪ 14-4‬اﻟﻨﻈﺮﻳﺎت اﻟﺘﻌﻠﻴﻤﻴﺔ واﻟﻌﻼﻗﺔ اﳌﺘﺒﺎدﻟﺔ ﺑﲔ اﳉﻮاﻧﺐ اﻟﺘﻌﻠﻴﻤﻴﺔ اﳌﺮﺗﺒﻄﺔ ‪236 .. ................................ ................................‬‬
‫اﻟﺸﻜﻞ‪242 .............. ................................ ................................ ................................ Type I Error 1-5‬‬
‫اﻟﺸﻜﻞ‪242 ............. ................................ ................................ ................................ Type II Error 2-5‬‬
‫اﻟﺸﻜﻞ‪ 3-5‬اﻟﻌﻼﻗﺔ ﺑﲔ اﻟﻔﺮﺿﻴﺔ اﻟﺼﻔﺮﻳﺔ واﻟﺒﺪﻳﻠﺔ واﻷﺧﻄﺎء ﻣﻦ اﻟﻨﻮع اﻷول )‪ (Type-I Error‬واﻟﺜﺎﱐ )‪243 .......................... (Type-II Error‬‬
‫اﻟﺸﻜﻞ‪ 4-5‬ﺗﻮزع ﻣﻨﻄﻘﱵ اﻟﺮﻓﺾ واﻟﻘﺒﻮل ﻋﻠﻰ ﻃﺮﰲ ﻣﻨﺤﲏ اﻟﺘﻮزﻳﻊ اﻹﺣﺼﺎﺋﻲ اﻟﻄﺒﻴﻌﻲ‪243 ............................. ................................‬‬
‫اﻟﺸﻜﻞ‪ 5-5‬ﳐﻄﻂ ﲢﺪﻳﺪ اﻻﺧﺘﺒﺎر اﻷﻣﺜﻞ ﳌﻘﺎرﻧﺔ اﳌﺘﻮﺳﻄﺎت ‪246 ................... ................................ ................................‬‬
‫اﻟﺸﻜﻞ‪ 6-5‬واﺟﻬﺔ اﻟﱪﻧﺎﻣﺞ اﻹﺣﺼﺎﺋﻲ ‪246 ............................... ................................ ................................ SPSS‬‬
‫اﻟﺸﻜﻞ‪ 7-5‬ﺗﻮزع اﶈﻴﻄﻴﺎت ﻋﻠﻰ ﻟﻮﺣﺔ اﻟﺘﻄﻮﻳﺮ ‪248 ................................ ................................ ................................‬‬
‫اﻟﺸﻜﻞ‪ 8-5‬اﻟﻨﻤﻮذج اﻷوﱄ ﻟﻠﻮﺣﺔ اﻟﺘﻄﻮﻳﺮ اﳌﺼﻤﻤﺔ ‪249 ........................... ................................ ................................‬‬
‫اﻟﺸﻜﻞ‪ 9-5‬اﳌﺨﻄﻂ اﻟﺼﻨﺪوﻗﻲ ﻟﻌﻨﺎﺻﺮ ﻟﻮﺣﺔ اﻟﺘﻄﻮﻳﺮ ‪249 ......................... ................................ ................................‬‬
‫اﻟﺸﻜﻞ‪ 10-5‬ﺑﻴﺌﺔ اﻟﺘﻄﻮﻳﺮ اﻟﱪﳎﻴﺔ ‪250 ......................... ................................ ................................ Bascom-AVR‬‬
‫اﻟﺸﻜﻞ‪ 11-5‬ﻣﻨﻬﺠﻴﺔ ﻛﺘﺎﺑﺔ اﻟﱪاﻣﺞ ﰲ اﻟﺒﻴﺌﺔ ‪251 ............... ................................ ................................ Bascom-AVR‬‬
‫اﻟﺸﻜﻞ‪ 12-5‬اﺳﺘﺨﺪام ﺑﻴﺌﺔ اﶈﺎﻛﺎة ‪ PROTEUS‬ﶈﺎﻛﺎة ﺑﺮﻧﺎﻣﺞ ﻟﻠﺘﺤﻜﻢ ﲟﺤﺮك ﺗﻴﺎر ﻣﺴﺘﻤﺮ ‪252 .................... ................................‬‬
‫اﻟﺸﻜﻞ‪ 13-5‬اﺳﺘﺨﺪام ﺑﻴﺌﺔ اﶈﺎﻛﺎة ‪ PROTEUS‬ﻟﺘﺤﻠﻴﻞ دارة ﻋﺪاد ﺗﺼﺎﻋﺪي ﺗﻨﺎزﱄ ﻗﺎﺑﻞ ﻟﻠﻀﺒﻂ ‪252 ............... ................................‬‬
‫اﻟﺸﻜﻞ‪ 14-5‬اﳌﺨﻄﻂ اﻟﻨﻈﺮي واﻟﱪﻧﺎﻣﺞ ﻹﺣﺪى اﻷﻣﺜﻠﺔ اﻟﻌﻤﻠﻴﺔ ﰲ دﻟﻴﻞ اﻟﺘﺠﺎرب اﻟﻌﻤﻠﻴﺔ ‪253 ......................... ................................‬‬
‫اﻟﺸﻜﻞ‪ 15-5‬ﻧﺘﺎﺋﺞ ﺗﻘﻴﻴﻢ اﻟﻨﻈﺎم اﻟﺘﻌﻠﻴﻤﻲ ﻣﻦ ﻗﺒﻞ اﻟﻄﻼب )‪254 ........... ................................ ................................ (N=64‬‬
‫اﻟﺸﻜﻞ‪ 16-5‬ﳕﻮذج ﻫﺮم اﻟﺘﻌﻠﻢ وﻣﻌﺪﻻت اﻻﺣﺘﻔﺎظ ﺑﺎﳌﻌﻠﻮﻣﺎت ‪256 ................ ................................ ................................‬‬
‫اﻟﺸﻜﻞ‪ 17-5‬ﻣﻨﻬﺠﻴﺔ ﻋﻤﻞ ﻤﻟﻤﻮﻋﺔ اﻟﻘﻴﺎﺳﻴﺔ واﻻﺧﺘﺒﺎرﻳﺔ ﺧﻼل اﳌﺨﱪ ‪257 .......... ................................ ................................‬‬
‫اﻟﺸﻜﻞ‪ 18-5‬ﻣﺸﺮوع ﻧﻈﺎم ﳏﻄﺔ ارﺻﺎد ﺟﻮﻳﺔ ﻣﺼﻐﺮ ‪260 .......................... ................................ ................................‬‬
‫‪XVII‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫ﻗﺎﺋﻤﺔ اﶈﺘﻮﻳﺎت | ‪Table of Contents‬‬

‫اﻟﺸﻜﻞ‪ 19-5‬ﳏﺎﻛﺎة ﻣﺸﺮوع ﻣﻘﻴﺎس اﻟﱰدد )‪261 .................. ................................ ................................(1Hz~4MHz‬‬

‫اﻟﺸﻜﻞ‪ 20-5‬ﳏﺎﻛﺎة ﻣﺸﺮوع ﻣﻘﻴﺎس اﻟﺴﻌﺎت )‪261 ................ ................................ ................................ (1nF~100uF‬‬
‫اﻟﺸﻜﻞ‪ 21-5‬ﻣﻨﻬﺠﻴﺔ ﻗﻴﺎس اﻟﻔﻌﺎﻟﻴﺔ ﻟﻠﻤﺠﻤﻮﻋﺔ اﻟﻘﻴﺎﺳﻴﺔ واﻻﺧﺘﺒﺎرﻳﺔ ﰲ ﳕﻮذج اﳌﺨﱪ اﻻﻓﱰاﺿﻲ ‪262 .................... ................................‬‬
‫اﻟﺸﻜﻞ ‪ 22-5‬ﻧﺘﺎﺋﺞ اﻻﺧﺘﺒﺎر اﻹﺣﺼﺎﺋﻲ ﻟﻔﺮﺿﻴﺔ اﳌﺨﺘﱪ اﻻﻓﱰاﺿﻲ ودور ﺟﻠﺴﺎت اﻟﺘﺤﻀﲑ اﳌﺨﱪي )‪264 .. ................................ (N=31/31‬‬
‫اﻟﺸﻜﻞ‪ 23-5‬اﻟﻌﻼﻗﺔ ﺑﲔ أﻧﻮاع اﳌﺨﺎﺑﺮ ﺗﺼﻨﻴﻔﺎﻬﺗﺎ واﻻرﺗﺒﺎط ﻣﻊ اﻟﻨﻤﻮذج اﳌﻘﱰح ﻟﻠﻤﺨﱪ اﳍﺠﲔ ﻣﺘﻌﺪد اﻷﳕﺎط ‪264 ....... ................................‬‬
‫اﻟﺸﻜﻞ‪ 24-5‬ﲤﺜﻴﻞ اﻟﻌﻤﻠﻴﺔ اﻟﺘﻌﻠﻴﻤﺔ ﻛﻨﻈﺎم ﲢﻜﻢ ﰲ اﳊﻠﻘﺔ اﳌﻐﻠﻘﺔ ‪265 .............. ................................ ................................‬‬
‫اﻟﺸﻜﻞ‪ 25-5‬ﲤﺜﻴﻞ ﻧﻈﺎم ﺗﻌﺒﺌﺔ ﺧﺰان ﰲ اﳊﻠﻘﺔ اﳌﻔﺘﻮﺣﺔ ‪267 ........................ ................................ ................................‬‬
‫اﻟﺸﻜﻞ‪ 26-5‬ﳕﻮذج ﻫﻨﺪﺳﻲ ﻟﺘﻤﺜﻴﻞ ﻧﻘﻞ اﳌﻌﻠﻮﻣﺎت ﰲ ﻧﻈﺎم ﺗﻌﻠﻴﻢ وﺗﻌﻠﻢ ﰲ اﳊﻠﻘﺔ اﳌﻔﺘﻮﺣﺔ ‪267 ........................ ................................‬‬
‫اﻟﺸﻜﻞ‪ 27-5‬ﳏﺎﻛﺎة أﺛﺮ اﻻﺧﺘﻼف ﰲ ﻗﺎﺑﻠﻴﺔ اﻟﺘﻌﻠﻢ ﻟﻠﻄﻼب ﻟﻨﻤﻮذج ﺗﻌﻠﻴﻤﻲ ﺑﺎﳊﻠﻘﺔ اﳌﻔﺘﻮﺣﺔ ‪268 ...................... ................................‬‬
‫اﻟﺸﻜﻞ‪ 28-5‬ﳏﺎﻛﺎة أﺛﺮ ﻣﻌﺎﻣﻞ اﻟﻨﺴﻴﺎن ﻋﻠﻰ اﻻﺣﺘﻔﺎظ ﺑﺎﳌﻌﻠﻮﻣﺎت ﻟﻨﻤﻮذج ﺗﻌﻠﻴﻤﻲ ﺑﺎﳊﻠﻘﺔ اﳌﻔﺘﻮﺣﺔ ‪270 ................ ................................‬‬
‫اﻟﺸﻜﻞ ‪ 29-5‬ﳕﻮذج ﺗﻌﻠﻴﻢ ﺗﻌﺎﻗﱯ ﰲ اﳊﻠﻘﺔ اﳌﻔﺘﻮﺣﺔ ‪270 .......................... ................................ ................................‬‬
‫اﻟﺸﻜﻞ‪ 30-5‬ﳏﺎﻛﺎة ﳕﻮذج اﻟﺘﻌﻠﻴﻢ ﰲ اﳊﻠﻘﺔ اﳌﻔﺘﻮﺣﺔ ﻟﻌﺪة ﺟﻠﺴﺎت ‪270 ............ ................................ ................................‬‬
‫اﻟﺸﻜﻞ‪ 31-5‬ﳕﻮذج اﻟﺘﻐﺬﻳﺔ اﻟﻌﻜﺴﻴﺔ ﰲ اﻟﺘﻌﻠﻢ واﻟﺘﻌﻠﻴﻢ ‪271 ........................ ................................ ................................‬‬
‫اﻟﺸﻜﻞ‪ 32-5‬ﳏﺎﻛﺎة أﺛﺮ اﻻﺧﺘﻼف ﰲ ﻗﺎﺑﻠﻴﺔ اﻟﺘﻌﻠﻢ ﻟﻠﻄﻼب ﰲ ﳕﻮذج ﺗﻌﻠﻴﻤﻲ ﺑﺎﳊﻠﻘﺔ اﳌﻐﻠﻘﺔ ‪273 ...................... ................................‬‬
‫اﻟﺸﻜﻞ‪ 33-5‬ﳏﺎﻛﺎة أﺛﺮ ﻣﻌﺎﻣﻞ اﻟﻨﺴﻴﺎن ﻋﻠﻰ اﻻﺣﺘﻔﺎظ ﺑﺎﳌﻌﻠﻮﻣﺎت ﻟﻨﻤﻮذج ﺗﻌﻠﻴﻤﻲ ﺑﺎﳊﻠﻘﺔ اﳌﻐﻠﻘﺔ ‪274 .................. ................................‬‬
‫اﻟﺸﻜﻞ‪ 34-5‬ﳕﻮذج ﺗﻌﻠﻴﻢ ﺗﻌﺎﻗﱯ ﰲ اﳊﻠﻘﺔ اﳌﻐﻠﻘﺔ ‪274 ............................ ................................ ................................‬‬
‫اﻟﺸﻜﻞ‪ 35-5‬ﳏﺎﻛﺎة ﳕﻮذج اﻟﺘﻌﻠﻴﻢ ﰲ اﳊﻠﻘﺔ اﳌﻐﻠﻘﺔ ﻟﻌﺪة ﺟﻠﺴﺎت ‪275 .............. ................................ ................................‬‬
‫اﻟﺸﻜﻞ‪ 36-5‬ﻧﻈﺎم اﻟﺘﺼﻮﻳﺖ اﻹﻟﻜﱰوﱐ )‪ (ARS‬ﻣﻦ ﺷﺮﻛﺔ ‪276 .. ................................ ................................ TurningPoint‬‬
‫اﻟﺸﻜﻞ‪ 37-5‬ﺗﻨﻈﻴﻢ ﺳﲑ اﳉﻠﺴﺎت اﳌﺨﱪﻳﺔ ﻟﻠﻤﺠﻤﻮﻋﺔ اﻟﻘﻴﺎﺳﻴﺔ ‪278 ................ ................................ ................................‬‬
‫اﻟﺸﻜﻞ‪ 38-5‬اﺳﱰاﺗﻴﺠﻴﺔ اﻟﺘﻌﻠﻴﻢ اﳌﺨﱪي ﻟﻠﻤﺠﻤﻮﻋﺔ اﻟﻘﻴﺎﺳﻴﺔ‪278 ................... ................................ ................................‬‬
‫اﻟﺸﻜﻞ ‪ 39-5‬ﺗﻨﻈﻴﻢ ﺳﲑ اﳉﻠﺴﺎت اﳌﺨﱪﻳﺔ ﻟﻠﻤﺠﻤﻮﻋﺔ اﻻﺧﺘﺒﺎرﻳﺔ ‪279 .............. ................................ ................................‬‬
‫اﻟﺸﻜﻞ‪ 40-5‬اﺳﱰاﺗﻴﺠﻴﺔ اﻟﺘﻌﻠﻴﻢ اﳌﺨﱪي ﻟﻠﻤﺠﻤﻮﻋﺔ اﻻﺧﺘﺒﺎرﻳﺔ ‪279 ................. ................................ ................................‬‬
‫اﻟﺸﻜﻞ‪ 41-5‬اﳌﺨﻄﻂ اﻟﺘﺼﻤﻴﻤﻲ وﺑﺮﻧﺎﻣﺞ اﻟﺘﺸﻐﻴﻞ ﻟﺘﺠﺮﺑﺔ ﻋﺪاد ﺗﺼﺎﻋﺪي ﺑﺎﺳﺘﺨﺪام ﻟﻮﺣﺎت إﻇﻬﺎر رﻗﻤﻴﺔ ‪281 .......... ................................‬‬
‫اﻟﺸﻜﻞ‪ 42-5‬ﻣﻨﻬﺠﻴﺔ ﻗﻴﺎس اﻟﻔﻌﺎﻟﻴﺔ ﻟﻠﻤﺠﻤﻮﻋﺔ اﻟﻘﻴﺎﺳﻴﺔ واﻻﺧﺘﺒﺎرﻳﺔ ﰲ ﳕﻮذج اﳊﻠﻘﺔ اﳌﻔﺘﻮﺣﺔ واﳌﻐﻠﻘﺔ ‪283 ............... ................................‬‬
‫اﻟﺸﻜﻞ ‪ 43-5‬ﻣﻠﺨﺺ ﻧﺘﺎﺋﺞ اﻟﻘﻴﺎﺳﺎت اﻟﻜﻤﻴﺔ اﻹﺣﺼﺎﺋﻴﺔ ﻟﻠﻘﻴﺎﺳﺎت اﻻﺧﺘﺒﺎرﻳﺔ اﻟﺜﻼﺛﺔ اﻷوﱃ ‪287 ...................... ................................‬‬
‫اﻟﺸﻜﻞ‪ 45-5‬ﳐﻄﻂ ﻛﻞ ﺟﻠﺴﺔ )‪ (Session‬ﰲ اﻟﻨﻤﻮذج اﻟﺘﻌﻠﻴﻤﻲ اﳌﻘﱰح‪296 ........ ................................ ................................‬‬
‫اﻟﺸﻜﻞ‪ 45-5‬ﳐﻄﻂ اﻟﻨﻤﻮذج اﻟﺘﻌﻠﻴﻤﻲ اﳌﻘﱰح ‪296 ................................ ................................ ................................‬‬
‫اﻟﺸﻜﻞ‪303 ............................ ................................ ................................ ................................ 46-5‬‬
‫اﻟﺸﻜﻞ‪ 47-5‬ﳐﻄﻂ ﺗﻮزع أﳕﺎط اﻟﺘﻌﻠﻢ اﻟﺴﺎﺋﺪة ‪304 ............................... ................................ ................................‬‬
‫اﻟﺸﻜﻞ‪ 1-6‬ﻟﻮﺣﺔ اﻟﺘﻄﻮﻳﺮ ‪ Spartan-3E‬اﳌﺴﺘﺨﺪﻣﺔ ﰲ ﺗﺼﻤﻴﻢ اﻟﺘﺠﺎرب ‪312 ....... ................................ ................................‬‬
‫اﻟﺸﻜﻞ‪ 2-6‬ﻟﻮﺣﺔ اﻟﺘﻮﺳﻌﺔ واﻟﻮﺣﺪات اﶈﻴﻄﻴﺔ اﻹﺿﺎﻓﻴﺔ‪314 ......................... ................................ ................................‬‬
‫اﻟﺸﻜﻞ‪ 3-6‬ﻣﻨﻬﺠﻴﺔ إﻋﺪاد دﻟﻴﻞ اﻟﺘﺠﺎرب‪315 .... ................................ ................................ ................................‬‬
‫اﻟﺸﻜﻞ‪ 4-6‬ﻟﻮﺣﺔ إﺿﺎﻓﺔ ﻣﻜﺘﺒﺎت اﻟﻌﻨﺎﺻﺮ ﰲ واﺟﻬﺔ ”‪317 ..... ................................ ................................ “Block Diagram‬‬
‫اﻟﺸﻜﻞ‪ 5-6‬ﻣﻜﺘﺒﺔ اﻟﻌﻨﺎﺻﺮ واﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ )‪317 .................... ................................ ................................ (Boolean‬‬
‫اﻟﺸﻜﻞ‪ 6-6‬ﻣﻜﺘﺒﺔ اﻟﻌﻨﺎﺻﺮ اﻟﺮﻗﻤﻴﺔ واﻟﻌﻤﻠﻴﺎت اﻟﺮﻳﺎﺿﻴﺔ واﻟﺘﺤﻮﻳﻼت اﻟﻌﺪدﻳﺔ )‪317 ........................ ................................ (Numeric‬‬
‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪XVIII‬‬
‫‪I‬‬ ‫اﶈﺘﻮى | ‪Index‬‬

‫اﻟﺸﻜﻞ‪ 7-6‬ﻣﻜﺘﺒﺔ ﻋﻨﺎﺻﺮ اﳌﻘﺎرﻧﺔ )‪317 .......................... ................................ ................................(Comparison‬‬

‫اﻟﺸﻜﻞ‪ 8-6‬ﻣﻜﺘﺒﺔ اﻷﻧﻮاع وﻋﻨﺎﺻﺮ ﺑﻨﺎء ﻤﻟﻤﻮﻋﺎت )‪318 ....... ................................ ................................ (Cluster & Class‬‬
‫اﻟﺸﻜﻞ‪ 9-6‬ﻣﻜﺘﺒﺔ اﳌﺼﻔﻮﻓﺎت )‪318 .... ................................ ................................ ................................ (Array‬‬
‫اﻟﺸﻜﻞ‪ 10-6‬ﻣﻜﺘﺒﺔ اﳊﻠﻘﺎت اﻟﺸﺮﻃﻴﺔ واﻟﺒﲎ اﻟﺘﻜﺮارﻳﺔ )‪318 ........... ................................ ................................ (Structure‬‬
‫اﻟﺸﻜﻞ‪ 11-6‬ﻣﻜﺘﺒﺔ وﺣﺪات اﻟﺘﻮﻗﻴﺖ واﻟﺘﺄﺧﲑ اﻟﺰﻣﲏ )‪318 .............. ................................ ................................ (Timing‬‬
‫اﻟﺸﻜﻞ‪ 12-6‬ﻣﻜﺘﺒﺔ اﻟﺘﻌﺎﻣﻞ ﻣﻊ اﻟﻜﺘﻞ اﻟﺬاﻛﺮﻳﺔ ﻋﻠﻰ ﺷﺮﳛﺔ اﻟـ‪318 ................... ................................ (Memory & FIFO) FPGA‬‬
‫اﻟﺸﻜﻞ‪ 13-6‬ﻣﻜﺘﺒﺔ اﻟﻌﻨﺎﺻﺮ اﻟﻮﻇﻴﻔﻴﺔ اﻟﺮﻳﺎﺿﻴﺔ واﻟﺘﺤﻠﻴﻠﻴﺔ )‪319 ....................... ................................ (FPGA Math & Analysis‬‬
‫اﻟﺸﻜﻞ‪ 14-6‬ﻣﻜﺘﺒﺔ اﻟﻌﻨﺎﺻﺮ واﻷدوات اﻟﺘﺤﻠﻴﻠﻴﺔ )‪ (Utilities‬وﻋﻨﺎﺻﺮ ﺗﻮﻟﻴﺪ اﻹﺷﺎرات )‪319 ........... ................................ (Generation‬‬
‫اﻟﺸﻜﻞ‪ 15-6‬ﻣﻜﺘﺒﺔ ﻋﻨﺎﺻﺮ اﻟﺘﺤﻜﻢ اﻟﺮﻗﻤﻲ اﳋﻄﻲ واﻟﻼﺧﻄﻲ )‪319 ..... ................................ ................................ (Control‬‬
‫اﻟﺸﻜﻞ‪ 16-6‬ﻣﻜﺘﺒﺔ اﻟﻌﻨﺎﺻﺮ اﻟﺮﻳﺎﺿﻴﺔ اﳌﺘﻘﺪﻣﺔ )‪319 ................................ ................................ (High Throughput Math‬‬
‫اﻟﺸﻜﻞ‪ 17-6‬ﻣﻜﺘﺒﺔ اﻟﺘﻌﺎﻣﻞ ﻣﻊ اﻷﻗﻄﺎب اﻟﻔﻴﺰﻳﺎﺋﻴﺔ ﻟﺸﺮﳛﺔ اﻟـ‪320 .......... ................................ ................................ .FPGA‬‬
‫اﻟﺸﻜﻞ‪ 18-6‬ﻣﻜﺘﺒﺔ اﳌﻘﺎﻃﻌﺎت وﻋﻨﺎﺻﺮ اﻟﺘﻮاﻗﺖ )‪320 ....... ................................ ................................ (Synchronization‬‬
‫اﻟﺸﻜﻞ‪ 19-6‬ﻣﻜﺘﺒﺔ إﻧﺸﺎء واﺟﻬﺎت ‪ GUI‬ﻋﻠﻰ اﳊﺎﺳﺐ ﻟﻠﻮﻇﺎﺋﻒ ﻋﻠﻰ ﺷﺮﳛﺔ اﻟـ‪320 ........ ................................ (Interfacing) FPGA‬‬
‫اﻟﺸﻜﻞ‪ 20-6‬ﻣﻨﻬﺠﻴﺔ ﺗﻮﻟﻴﺪ اﳌﻠﻒ اﻟﱪﳎﻲ ﻟﺸﺮﳛﺔ اﻟـ‪ FPGA‬ﰲ اﻟﺒﻴﺌﺔ ‪320 ...................... ................................ LabVIEW FPGA‬‬
‫اﻟﺸﻜﻞ‪ 21-6‬ﻣﺮاﺣﻞ ﺗﺼﻤﻴﻢ ﺗﻄﺒﻴﻖ ﰲ اﻟﺒﻴﺌﺔ ‪321 ............ ................................ ................................ LabVIEW FPGA‬‬
‫اﻟﺸﻜﻞ‪ 22-6‬ﻣﻨﻬﺠﻴﺔ اﳌﺨﱪ اﻟﺘﻄﺒﻴﻘﻲ )‪ (Hands-on‬ﻟﻠﺘﺠﺎرب ﰲ اﻟﺒﻴﺌﺔ ‪321 ........................... ................................LabVIEW‬‬
‫اﻟﺸﻜﻞ‪ 23-6‬ﳐﻄﻂ اﻟﺘﻮﺻﻴﻞ ﻟﻠﺜﻨﺎﺋﻴﺎت اﻟﻀﻮﺋﻴﺔ واﳌﻔﺎﺗﻴﺢ اﻻﻧﺰﻻﻗﻴﺔ واﻟﻠﺤﻈﻴﺔ وﻣﻔﺘﺎح اﳌﻮﺿﻊ ‪322 ....................... ................................‬‬
‫اﻟﺸﻜﻞ‪ 24-6‬ﺗﻮﺿﻊ اﳌﻔﺎﺗﻴﺢ اﻻﻧﺰﻻﻗﻴﺔ ﻋﻠﻰ ﻟﻮﺣﺔ اﻟﺘﻄﻮﻳﺮ وﺗﻌﺮﻳﻔﺎت اﻷﻗﻄﺎب ‪323 .... ................................ ................................‬‬
‫اﻟﺸﻜﻞ‪ 25-6‬ﺗﻮﺿﻊ اﻟﺜﻨﺎﺋﻴﺎت اﻟﻀﻮﺋﻴﺔ ﻋﻠﻰ ﻟﻮﺣﺔ اﻟﺘﻄﻮﻳﺮ وﺗﻌﺮﻳﻔﺎت اﻷﻗﻄﺎب ‪323 .... ................................ ................................‬‬
‫اﻟﺸﻜﻞ‪ 26-6‬ﺗﻮﺻﻴﻞ اﳌﻔﺘﺎح اﻟﻠﺤﻈﻲ ﻣﻊ ﻗﻄﺐ ﺷﺮﳛﺔ اﻟـ‪ FPGA‬وﺗﻔﻌﻴﻞ ﻣﻘﺎوﻣﺔ اﻟﺴﺤﺐ اﻟﺪاﺧﻠﻴﺔ‪324 ................. ................................‬‬
‫اﻟﺸﻜﻞ‪ 27-6‬ﺗﻮﺿﻊ اﳌﻔﺎﺗﻴﺢ اﻻﻧﺰﻻﻗﻴﺔ وﻣﻔﺘﺎح اﳌﻮﺿﻊ ﻋﻠﻰ ﻟﻮﺣﺔ اﻟﺘﻄﻮﻳﺮ وﺗﻌﺮﻳﻔﺎت اﻷﻗﻄﺎب‪324 ....................... ................................‬‬
‫اﻟﺸﻜﻞ‪ 28-6‬ﺗﻮﺻﻴﻞ ﻣﻔﺘﺎح اﻟﻀﻐﻂ اﻟﻠﺤﻈﻲ ﻣﻊ ﻗﻄﺐ ﺷﺮﳛﺔ اﻟـ‪ FPGA‬وﺗﻔﻌﻴﻞ ﻣﻘﺎوﻣﺔ اﻟﺴﺤﺐ اﻟﺪاﺧﻠﻴﺔ ‪325 .......... ................................‬‬
‫اﻟﺸﻜﻞ‪ 29-6‬ﲤﺜﻴﻞ ﻟﻠﺪارة اﻟﺪاﺧﻠﻴﺔ ﳊﺴﺎس اﳌﻮﺿﻊ )‪325 ........ ................................ ................................ (Shaft Encoder‬‬
‫اﻟﺸﻜﻞ‪ 30-6‬اﻟﻨﺒﻀﺎت اﳌﻮﻟﺪة ﻋﻠﻰ اﻟﻘﻄﺐ ‪ ROT_A‬واﻟﻘﻄﺐ ‪ ROT_B‬ﻋﻨﺪ اﻟﺘﺪوﻳﺮ ﻟﻠﻴﻤﲔ اﻟﻴﺴﺎر‪325 ............ ................................‬‬
‫اﻟﺸﻜﻞ‪ 31-6‬أﺛﺮ ﺿﺠﻴﺞ اﻟﺘﺒﺪﻳﻞ اﳌﻴﻜﺎﻧﻴﻜﻲ أﺛﻨﺎء دوران ﻗﺮص اﳌﻮﺿﻊ ‪325 .......... ................................ ................................‬‬
‫اﻟﺸﻜﻞ‪ 32-6‬اﻟﻌﻨﺎﺻﺮ اﳌﻄﻠﻮﺑﺔ ﻟﺒﻨﺎء ﺑﻮاﺑﺔ ”‪ “Not‬ﰲ ‪ LabVIEW FPGA‬وﻓﻘﺎً ﳌﻨﻬﺠﻴﺔ اﻟـ‪326 ........... ................................ Dataflow‬‬
‫اﻟﺸﻜﻞ‪ 33-6‬ﺗﺪﻓﻖ اﻟﺒﻴﺎﻧﺎت واﻟﺘﺰاﻣﻦ ﰲ ﺷﺮﳛﺔ اﻟـ‪326 ..................... ................................ ................................ FPGA‬‬
‫اﻟﺸﻜﻞ‪ 34-6‬ﻗﻄﱯ دﺧﻞ )‪ (DIO1‬وﺧﺮج )‪ (DIO0‬رﻗﻤﻴﲔ ‪327 ................. ................................ ................................‬‬
‫اﻟﺸﻜﻞ‪ 35-6‬ﺑﻮاﺑﱵ دﺧﻞ )‪ (DIOPORT0‬وﺧﺮج )‪ (DIOPORT1‬رﻗﻤﻴﺘﲔ ‪327 ............................... ................................‬‬
‫اﻟﺸﻜﻞ‪ 36-6‬ﻗﻄﱯ دﺧﻞ )‪ (AIO1‬وﺧﺮج )‪ (AIO0‬ﺸﺎﻬﺑﻴﲔ ‪327 ................ ................................ ................................‬‬
‫اﻟﺸﻜﻞ‪ 37-6‬ﻋﻨﺎﺻﺮ اﻟﺘﻮﻗﻴﺖ واﻟﺘﺄﺧﲑ اﻟﺰﻣﲏ ﰲ ﻟﻮﺣﺔ اﻟﻌﻨﺎﺻﺮ ‪ Functions‬اﻟﺒﻴﺌﺔ ‪328 ........... ................................LabVIEW FPGA‬‬
‫اﻟﺸﻜﻞ‪ 38-6‬اﺳﺘﺨﺪام اﻟﻌﻨﺼﺮ ”‪ “Loop Timer‬ﻟﻠﺘﺤﻜﻢ ﲟﻌﺪل اﺳﺘﺤﺼﺎل ﺑﻴﺎﻧﺎت ﻛﻞ ‪ 50‬ﻧﺒﻀﺔ ‪328 ............... ................................‬‬
‫اﻟﺸﻜﻞ‪ 39-6‬ﻋﻨﺎﺻﺮ اﻟﺘﻮﻗﻴﺖ اﻟﺜﻼﺛﺔ وﻟﻮﺣﺔ ﺿﺒﻂ اﻟﺒﺎراﻣﱰات ‪329 .................. ................................ ................................‬‬
‫اﻟﺸﻜﻞ‪ 40-6‬اﳊﻠﻘﺔ ‪ Do…Loop‬ﻋﻠﻰ اﻟﻴﺴﺎر واﳊﻠﻘﺔ ‪ While…Loop‬ﻋﻠﻰ اﻟﻴﻤﲔ ‪329 .......................... ................................‬‬
‫اﻟﺸﻜﻞ‪ 41-6‬اﳊﻠﻘﺔ ‪329 ....................... ................................ ................................Single-Cycle Timed Loop‬‬
‫‪XIX‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫ﻗﺎﺋﻤﺔ اﶈﺘﻮﻳﺎت | ‪Table of Contents‬‬

‫اﻟﺸﻜﻞ‪ 42-6‬اﳌﺨﻄﻂ اﳌﻨﻬﺠﻲ ﳋﻮارزﻣﻴﺔ ﻋﻤﻞ اﻟﺘﺠﺮﺑﺔ ‪330 ............ ................................ ................................ Lab1-Pre‬‬
‫اﻟﺸﻜﻞ‪ 43-6‬اﻟﻮاﺟﻬﺔ اﻟﺮﺋﻴﺴﻴﺔ ﻟﻠﱪﻧﺎﻣﺞ ‪331 ......................... ................................ ................................ LabVIEW‬‬
‫اﻟﺸﻜﻞ‪ 44-6‬إﺿﺎﻓﺔ ﻟﻮﺣﺔ اﻟﺘﻄﻮﻳﺮ ‪ Spartan-3E Starter Board‬إﱃ اﳌﺸﺮوع ‪331 . ................................ ................................‬‬
‫اﻟﺸﻜﻞ‪ 45-6‬إﺿﺎﻓﺔ ﻗﻄﺐ دﺧﻞ )‪ (SW0‬وﺧﺮج )‪332 ................... ................................ ................................ (LED0‬‬
‫اﻟﺸﻜﻞ‪ 46-6‬إﺿﺎﻓﺔ ﳎﻠﺪ ﺗﻄﺒﻴﻖ وﺗﺴﻤﻴﺘﻪ ﺑﺎﺳﻢ ”‪ “Pre-Lab1‬إﱃ اﳌﺸﺮوع ‪332 ..... ................................ ................................‬‬
‫اﻟﺸﻜﻞ‪ 47-6‬إﺿﺎﻓﺔ ﻣﺸﺮوع ‪ VI‬وﺣﻔﻈﻪ ﺑﺎﺳﻢ ‪ Pre-Lab1-1.vi‬إﱃ ﳎﻠﺪ اﻟﺘﻄﺒﻴﻖ ”‪332 ............... ................................ “Pre-Lab1‬‬
‫اﻟﺸﻜﻞ‪ 48-6‬اﶈﺮر اﻟﱪﳎﻲ ”‪ “Block Diagram‬واﻟﻮاﺟﻬﺔ ”‪ “Front Panel‬وﻣﺪﻳﺮ اﳌﺸﺮوع ”‪333 ............................. “Project Explorer‬‬
‫اﻟﺸﻜﻞ‪ 49-6‬إﺿﺎﻓﺔ ﺣﻠﻘﺔ ‪ While Loop‬إﱃ ﳐﻄﻂ اﻟـ‪333 ... ................................ ................................ Block Diagram‬‬
‫اﻟﺸﻜﻞ‪ 50-6‬ﳐﻄﻂ اﻟﺘﺼﻤﻴﻤﻲ اﻟﺮﺳﻮﻣﻲ اﻟﻜﺎﻣﻞ ﻟﻠﺘﺠﺮﺑﺔ ‪334 .......... ................................ ................................ Lab1-Pre‬‬
‫اﻟﺸﻜﻞ‪ 51-6‬ﺗﻌﻴﲔ ﻣﻨﺼﺔ ﺗﺸﻐﻴﻞ اﻟﺘﻄﺒﻴﻖ ﰲ ﻣﺴﺘﻌﺮض اﳌﺸﺮوع ‪334 ................ ................................ ................................‬‬
‫اﻟﺸﻜﻞ‪ 52-6‬ﲢﻮﻳﻞ اﳌﺨﻄﻄﺎت اﻟﺮﺳﻮﻣﻴﺔ إﱃ ﻣﻠﻔﺎت ”‪336 . ................................ ................................ “Intermediate Files‬‬
‫اﻟﺸﻜﻞ‪ 53-6‬واﺟﻬﺔ اﻟﺘﻄﺒﻴﻖ ‪ Xilinx Complier Server‬واﻟﺘﻘﺮﻳﺮ اﻟﺘﻘﺪﻳﺮي ﻟﻠﻤﻮارد اﳌﺴﺘﺨﺪﻣﺔ ‪336 .................. ................................‬‬
‫اﻟﺸﻜﻞ‪ 54-6‬واﺟﻬﺔ اﻟﺘﻄﺒﻴﻖ ‪ Xilinx Complier Server‬واﻟﺘﻘﺮﻳﺮ اﻟﻨﻬﺎﺋﻲ ‪336 .... ................................ ................................‬‬
‫اﻟﺸﻜﻞ‪ 55-6‬اﳌﺨﻄﻂ اﻟﺘﺼﻤﻴﻤﻲ اﻟﺮﺳﻮﻣﻲ ﻟﻠﺘﺠﺮﺑﺔ ‪ Lab1-Pre‬ﺑﻌﺪ اﺳﺘﺒﺪال اﳊﻠﻘﺔ ‪337 ............................. ................................‬‬
‫اﻟﺸﻜﻞ‪ 56-6‬ﻣﺪﻳﺮ اﳌﺸﺮوع ﺑﻌﺪ إﺿﺎﻓﺔ ﻋﻨﺎﺻﺮ اﳌﻔﺎﺗﻴﺢ واﻟﺜﻨﺎﺋﻴﺎت ‪337 .............. ................................ ................................‬‬
‫اﻟﺸﻜﻞ‪ 57-6‬اﳌﺨﻄﻂ اﻟﺘﺼﻤﻴﻤﻲ اﻟﺮﺳﻮﻣﻲ ﻟﻠﺘﺠﺮﺑﺔ ‪338 ............. ................................ ................................ Lab1-Main‬‬
‫اﻟﺸﻜﻞ‪ 58-6‬اﳌﺨﻄﻂ اﳍﻴﻜﻠﻲ ﻟﻌﻨﺎﺻﺮ ﻣﻨﻈﻮﻣﺔ ﺗﺸﻐﻴﻞ اﳌﺨﱪ ﻋﻦ ﺑﻌﺪ ‪340 .......... ................................ ................................‬‬
‫اﻟﺸﻜﻞ‪ 59-6‬اﻟﱪﻧﺎﻣﺞ ‪ LogMeIn‬وﻋﻨﻮان اﻻﺗﺼﺎل ﻣﻊ اﻟﺘﺠﺮﺑﺔ ﻋﻦ ﺑﻌﺪ ‪340 ........ ................................ ................................‬‬
‫اﻟﺸﻜﻞ‪ 60-6‬اﳌﻨﺼﺔ واﻟﺘﺠﻬﻴﺰات اﳋﺎﺻﺔ ﺑﺘﺠﺮﺑﺔ اﳌﺨﱪ ﻋﻦ ﺑﻌﺪ ‪341 ................ ................................ ................................‬‬
‫اﻟﺸﻜﻞ‪ 61-6‬رﺑﻂ ﻟﻮﺣﺔ اﻟﺘﻄﻮﻳﺮ واﻟﻮﺣﺪات اﻹﺿﺎﻓﻴﺔ واﻟﺘﺠﻬﻴﺰات اﻷﺧﺮى ‪341 ....... ................................ ................................‬‬
‫اﻟﺸﻜﻞ‪ 62-6‬اﻟﺪﺧﻮل إﱃ اﻟﺘﺠﺮﺑﺔ ﻣﻦ ﺟﻬﺎز ﺑﻌﻴﺪ وﺗﺸﻐﻴﻠﻬﺎ‪342 ................... ................................ .................................‬‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪XX‬‬
‫‪I‬‬ ‫اﶈﺘﻮى | ‪Index‬‬

‫ﻗﺎﺋﻤﺔ اﻟﺠﺪاول )‪(Table of Tables‬‬

‫اﳉﺪول‪ 1-1‬ﻣﻘﺎرﻧﺔ ﺑﲔ ﺧﺼﺎﺋﺺ اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ واﳊﻮاﺳﺐ اﻟﻌﺎﻣﺔ ‪4 .................. ................................ ................................‬‬
‫اﳉﺪول‪ 2-1‬اﳌﺮاﺣﻞ اﻟﺰﻣﻨﻴﺔ ﻟﺘﻄﻮر ﺗﺼﻨﻴﻊ اﻟﺪارات اﳌﺘﻜﺎﻣﻠﺔ وﻣﺪى ﺗﻌﻘﻴﺪﻫﺎ ‪14 ......... ................................ ................................‬‬
‫اﳉﺪول‪ 3-1‬اﻟﺘﻘﻨﻴﺎت اﳌﺴﺘﺨﺪﻣﺔ ﰲ ﺑﻨﺎء اﻟﺪارات اﳌﺘﻜﺎﻣﻠﺔ ‪16 ....................... ................................ ................................‬‬
‫اﳉﺪول‪ 4-1‬ﻣﻘﺎرﻧﺔ ﺑﲔ ﺑﻨﻴﺔ اﻟﺘﻌﻠﻴﻤﺎت ‪ RISC‬اﻟﺒﻨﻴﺔ ‪27 .................... ................................ ................................ CISC‬‬
‫اﳉﺪول‪ 5-1‬ﺗﺄﺛﲑ ﻣﺘﺤﻜﻢ اﻟﻮﺻﻮل اﳌﺒﺎﺷﺮ ﻟﻠﺬاﻛﺮة ﻋﻠﻰ ﻣﻌﺪل ﲢﻤﻴﻞ وﺣﺪة اﳌﻌﺎﳉﺔ اﳌﺮﻛﺰﻳﺔ ‪31 ........................... ................................‬‬
‫اﳉﺪول‪ 6-1‬ﻣﻘﺎرﻧﺔ اﻷداء ﻧﺴﺒﺔ إﱃ اﺳﺘﻄﺎﻋﺔ اﻟﻌﻤﻞ ﻷﺷﻬﺮ ﻋﺎﺋﻼت اﳌﺘﺤﻜﻤﺎت اﳌﺼﻐﺮة ذات ﻧﺎﻗﻞ ﺑﻌﺮض ‪38 ..... ................................32-bit‬‬
‫اﳉﺪول‪ 7-1‬ﺧﺼﺎﺋﺺ ﻣﻌﺎﳉﺎت اﻹﺷﺎرة اﻟﺮﻗﻤﻴﺔ ﺑﺎﻟﻔﺎﺻﻠﺔ اﻟﻌﺎﺋﻤﺔ واﻟﻔﺎﺻﻠﺔ اﻟﺜﺎﺑﺘﺔ ‪42 ... ................................ ................................‬‬
‫اﳉﺪول‪ 8-1‬ﺗﻄﺒﻴﻘﺎت ﻣﻌﺎﳉﺎت اﻹﺷﺎرة اﻟﺮﻗﻤﻴﺔ ﺑﺎﻟﻔﺎﺻﻠﺔ اﻟﻌﺎﺋﻤﺔ واﻟﻔﺎﺻﻠﺔ اﻟﺜﺎﺑﺘﺔ ‪42 .... ................................ ................................‬‬
‫اﳉﺪول‪ 9-1‬ﺗﺼﻨﻴﻒ اﻟﺸﺮﻛﺎت اﳌﺼﻨﻌﺔ ﳌﻌﺎﳉﺎت اﻹﺷﺎرة اﻟﺮﻗﻤﻴﺔ ﻋﺎﳌﻴﺎً‪45 .............. ................................ ................................‬‬
‫اﳉﺪول‪ 10-1‬ﺑﺮﻧﺎﻣﺞ ﺣﺴﺎب ﻣﺼﻔﻮﻓﺎت ﺗﻜﺮارﻳﺔ ﺑﺎﺳﺘﺨﺪام ﻣﻌﺎﰿ أﻏﺮاض ﻋﺎﻣﺔ ‪47 .... ................................ ................................‬‬
‫اﳉﺪول‪ 11-1‬ﺑﺮﻧﺎﻣﺞ ﺣﺴﺎب اﳌﺼﻔﻮﻓﺎت ﺑﺎﺳﺘﺨﺪام ﻣﻌﺎﰿ إﺷﺎرة رﻗﻤﻴﺔ ‪48 ............ ................................ ................................‬‬
‫اﳉﺪول‪ 12-1‬ﻣﻘﺎرﻧﺔ ﺑﲔ اﳊﻠﻮل اﳌﺴﺘﺨﺪﻣﺔ ﰲ ﺗﻄﺒﻴﻘﺎت ﻣﻌﺎﳉﺔ اﻹﺷﺎرة اﻟﺮﻗﻤﻴﺔ ‪50 .... ................................ ................................‬‬
‫اﳉﺪول‪ 13-1‬ﻣﻘﺎرﻧﺔ ﺑﲔ أﺣﺠﺎم ﺗﻘﻨﻴﺎت أﻏﻠﻔﺔ اﻟﺸﺮاﺋﺢ اﳌﺨﺘﻠﻔﺔ ‪78 .................. ................................ ................................‬‬
‫اﳉﺪول‪ 14-1‬ﻣﻘﺎرﻧﺔ ﺑﲔ اﳊﻠﻮل اﻟﺘﻜﻨﻮﻟﻮﺟﻴﺔ اﳌﺨﺘﻠﻔﺔ ﻟﺘﻄﺒﻴﻘﺎت ﻣﻌﺎﳉﺔ اﻹﺷﺎرة اﻟﺮﻗﻤﻴﺔ ‪85 .............................. ................................‬‬
‫اﳉﺪول‪ 1-2‬اﳌﻴﺰات اﻷﺳﺎﺳﻴﺔ ﻟﻠﺘﻘﻨﻴﺎت اﳌﺴﺘﺨﺪﻣﺔ ﰲ ﺗﺼﻨﻴﻊ اﳋﻼﻳﺎ اﻟﺬاﻛﺮﻳﺔ ‪105 ..... ................................ ................................‬‬
‫اﳉﺪول‪ 2-2‬اﻟﺘﻘﻨﻴﺎت اﳌﺴﺘﺨﺪﻣﺔ ﰲ ﺗﺼﻨﻴﻊ اﻟﻌﻨﺎﺻﺮ اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ‪105 ....... ................................ ................................‬‬
‫اﳉﺪول‪ 3-2‬اﳋﺼﺎﺋﺺ اﻟﻌﺎﻣﺔ ﻟﺸﺮاﺋﺢ اﻟـ‪107 .............................. ................................ ................................ SPLD‬‬
‫اﳉﺪول‪ 4-2‬اﳋﺼﺎﺋﺺ اﻟﺮﺋﻴﺴﻴﺔ ﻟﺸﺮاﺋﺢ اﻟـ‪112 ............................ ................................ ................................ CPLD‬‬
‫اﳉﺪول‪ 5-2‬اﳋﺼﺎﺋﺺ اﻟﻌﺎﻣﺔ ﻟﺸﺮاﺋﺢ اﻟـ‪113 .............................. ................................ ................................ FPGA‬‬
‫اﳉﺪول‪ 6-2‬اﻟﺸﺮﻛﺎت اﳌﺼﻨﻌﺔ ﻟﺸﺮاﺋﺢ اﻟـ‪ FPGA‬واﻟﺘﻘﻨﻴﺎت اﻟﱵ ﺗﻌﺘﻤﺪﻫﺎ ‪115 ......... ................................ ................................‬‬
‫اﳉﺪول‪ 7-2‬ﺗﺼﻨﻴﻔﺎت ﺷﺮاﺋﺢ اﻟـ‪ FPGA‬اﳌﺘﻮﻓﺮة ﲡﺎرﻳﺎً ‪117 ......................... ................................ ................................‬‬
‫اﳉﺪول‪ 8-2‬اﻟﻨﻮى اﻟﱪﳎﻴﺔ اﻷﺳﺎﺳﻴﺔ اﳌﺴﺘﺨﺪﻣﺔ ﰲ ﺷﺮاﺋﺢ اﻟـ‪131 ............ ................................ ................................ FPGA‬‬
‫اﳉﺪول‪ 9-2‬ﻣﻮاﺻﻔﺎت اﳌﻮارد اﳌﺘﻮﻓﺮة ﻋﻠﻰ اﻟﺸﺮﳛﺔ ‪139 .... ................................ ................................ Arrix Family Silicon‬‬
‫اﳉﺪول‪ 1-3‬أدوات وﺑﻴﺌﺎت ﺑﺮﳎﻴﺔ ﻋﺎﻟﻴﺔ اﳌﺴﺘﻮى ﻟﱪﳎﺔ ﺗﻄﺒﻴﻘﺎت اﻟﻜﻴﺎن اﻟﺼﻠﺐ ‪158 .. ................................ ................................‬‬
‫اﳉﺪول‪ 2-3‬ﺑﻌﺾ ﻧﺘﺎﺋﺞ إﺟﺎﺑﺎت اﻟﻄﻼب ﺣﻮل اﻟﻠﻐﺔ اﻟﱪﳎﻴﺔ اﳌﻔﻀﻠﺔ ﳌﻌﺎﳉﺔ اﻹﺷﺎرة اﻟﺮﻗﻤﻴﺔ ‪179 ........................ ................................‬‬
‫اﳉﺪول‪ 3-3‬ﺗﺼﻨﻴﻔﺎت اﻟﻮﺣﺪات اﻟﱪﳎﻴﺔ اﻹﺿﺎﻓﻴﺔ ﰲ اﻟﺒﻴﺌﺔ ‪ LabVIEW‬وﻓﻘﺎً ﺘﻄﺒﻴﻘﺎﻬﺗﺎ ‪183 ........................... ................................‬‬
‫اﳉﺪول‪ 1-4‬ﻣﻘﺎرﻧﺔ ﺑﲔ اﻟﺘﻌﻠﻴﻢ اﻟﺘﻘﻠﻴﺪي واﻟﺘﻌﻠﻴﻢ اﻟﺒﻨﺎﺋﻲ‪202 ........................ ................................ ................................‬‬
‫اﳉﺪول‪ 2-4‬دور ﻛﻞ ﻣﻦ اﳌﻌﻠّﻢ اﻟﻄﺎﻟﺐ ﰲ دورة ‪ Kolb‬ﻟﻠﺘﻌﻠّﻢ اﻟﺘﺠﺮﻳﱯ ‪207 .......... ................................ ................................‬‬
‫اﳉﺪول‪ 3-4‬اﻟﻌﻤﻠﻴﺎت ﺿﻤﻦ ﻣﺮاﺣﻞ دورة اﻟﻌﻠﻢ اﻟﻘﺎﺋﻢ ﻋﻠﻰ ﺣﻞ اﳌﺸﻜﻼت ‪217 ...... ................................ ................................‬‬
‫اﳉﺪول‪ 4-4‬دور اﳌﻌﻠﻢ ﺧﻼل ﻋﻤﻠﻴﺔ اﻟﺘﻌﻠﻢ اﻟﻘﺎﺋﻢ ﻋﻠﻰ ﺣﻞ اﳌﺸﻜﻼت ‪219 .......... ................................ ................................‬‬
‫اﳉﺪول‪ 5-4‬ﳎﻤﻮﻋﺔ ﳐﺘﺎرة ﻣﻦ اﳌﺨﺎﺑﺮ ﻋﻦ ﺑﻌﺪ ﰲ ﻗﺎرات ﳐﺘﻠﻔﺔ‪231 ................. ................................ ................................‬‬
‫اﳉﺪول‪ 1-5‬اﳌﻌﺪﻻت اﻟﻮﺳﻄﻴﺔ ﻷﻋﻤﺎر اﻟﻄﻼب وﻧﺘﺎﺋﺞ اﻻﺧﺘﺒﺎرات وﻣﻌﺪل اﻟﺴﻨﻮات اﻟﺪراﺳﻴﺔ اﻟﺴﺎﺑﻘﺔ )‪262 . ................................ (N=31/31‬‬
‫اﳉﺪول‪ 2-5‬اﻟﻘﻴﺎﺳﺎت اﻹﺣﺼﺎﺋﻴﺔ ﺣﻮل اﻟﺘﻜﺎﻓﺆ ﺑﲔ ﻤﻟﻤﻮﻋﺘﲔ )‪284 .... ................................ ................................ (N=31/31‬‬
‫‪XXI‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫ﻗﺎﺋﻤﺔ اﶈﺘﻮﻳﺎت | ‪Table of Contents‬‬

‫اﳉﺪول‪ 3-5‬اﻟﻘﻴﺎﺳﺎت اﻹﺣﺼﺎﺋﻴﺔ ﻷداء اﻟﻄﻼب ﺧﻼل ﺟﻠﺴﺎت اﳌﺨﺘﱪ )‪285 ........................... ................................ (N=31/31‬‬
‫اﳉﺪول‪ 4-5‬اﻟﻘﻴﺎﺳﺎت اﻹﺣﺼﺎﺋﻴﺔ ﻟﻨﺘﺎﺋﺞ اﻟﻄﻼب ﰲ اﻻﺧﺘﺒﺎر اﻟﻐﲑ ﻣﻌﻠﻦ )‪286 ........................... ................................ (N=31/31‬‬
‫اﳉﺪول‪ 5-5‬اﻟﻘﻴﺎﺳﺎت اﻹﺣﺼﺎﺋﻴﺔ اﳌﻔﺼﻠﺔ ﻟﻨﺘﺎﺋﺞ اﻟﻄﻼب ﰲ اﻻﺧﺘﺒﺎر اﻟﻐﲑ ﻣﻌﻠﻦ )‪287 .................... ................................ (N=31/31‬‬
‫اﳉﺪول‪ 6-5‬اﻟﻘﻴﺎﺳﺎت اﻹﺣﺼﺎﺋﻴﺔ اﳌﻔﺼﻠﺔ ﻟﻨﺘﺎﺋﺞ اﻟﻄﻼب ﰲ اﻻﺧﺘﺒﺎر اﳌﻌﻠﻦ )‪288 ........................ ................................ (N=31/31‬‬
‫اﳉﺪول‪ 7-5‬ﻗﻴﻢ اﳌﺘﻮﺳﻄﺎت واﻻﳓﺮاف اﳌﻌﻴﺎري ﻟﻠﻔﺌﺎت اﳉﺰﺋﻴﺔ ‪289 .................. ................................ ................................‬‬
‫اﳉﺪول‪ 8-5‬اﳉﺪوﻟﺔ اﻟﺰﻣﻨﻴﺔ وﺗﻮزع اﻟﻌﻼﻣﺎت ﻋﻠﻰ أﺳﺌﻠﺔ اﺧﺘﺒﺎر ﲢﺪﻳﺪ ﻣﻌﺎﻣﻞ اﻟﻨﺴﻴﺎن ‪290 .............................. ................................‬‬
‫اﳉﺪول‪ 9-5‬اﻟﻘﻴﺎﺳﺎت اﻹﺣﺼﺎﺋﻴﺔ ﻟﻨﺘﺎﺋﺞ اﻟﻄﻼب ﰲ اﺧﺘﺒﺎر ﻣﻌﺎﻣﻞ اﻟﻨﺴﻴﺎن ﺑﻌﺪ ﺳﻨﺔ ‪290 .............................. ................................‬‬
‫اﳉﺪول‪ 10-5‬ﻣﻘﺎرﻧﺔ ﺑﲔ اﻟﻄﺮق اﻟﺘﻘﻠﻴﺪﻳﺔ واﻻﺳﱰاﺗﻴﺠﻴﺎت اﳊﺪﻳﺜﺔ ﰲ اﻟﺘﻌﻠﻢ واﻟﺘﻌﻠﻴﻢ ‪293 ............................... ................................‬‬
‫اﳉﺪول‪ 11-5‬ﻣﻘﺎرﻧﺔ ﺑﲔ ﻋﺪد ﻣﺸﺎرﻳﻊ اﻟﺘﺨﺮج اﻟﱵ ﺗﻌﺘﻤﺪ ﻋﻠﻰ اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ ‪294 ... ................................ ................................‬‬
‫اﳉﺪول‪ 12-5‬ﳕﻮذج أﺳﺌﻠﺔ اﺳﺘﺒﻴﺎن ‪ VARK‬ﻟﺘﺤﺪﻳﺪ ﳕﻂ اﻟﺘﻌﻠﻢ ‪300 ............... ................................ ................................‬‬
‫اﳉﺪول‪ 13-5‬ﺟﺪول ﲢﺪﻳﺪ ﻗﻴﻢ أﺳﺎﻟﻴﺐ اﻟﺘﻌﻠﻢ اﻷرﺑﻌﺔ ‪300 ............... ................................ ................................ VARK‬‬
‫اﳉﺪول‪ 14-5‬ﳕﻮذج اﺳﺘﺒﻴﺎن ‪ Kolb‬ﻟﺘﺤﺪﻳﺪ ﳕﻂ اﻟﺘﻌﻠﻢ ‪302 ....................... ................................ ................................‬‬
‫اﳉﺪول‪ 15-5‬ﺟﺪول ﲢﺪﻳﺪ ﻗﻴﻢ أﺳﺎﻟﻴﺐ اﻟﺘﻌﻠﻢ اﻷرﺑﻌﺔ اﻷﺳﺎﺳﻴﺔ ﰲ دورة ‪302 . ................................ ................................ Kolb‬‬
‫اﳉﺪول‪ 16-5‬أﳕﺎط اﻟﺘﻌﻠﻢ اﻟﺴﺎﺋﺪة ‪303 .......... ................................ ................................ ................................‬‬
‫اﳉﺪول‪ 17-5‬ﻧﻘﺎط اﻟﻘﻮة واﻟﻀﻌﻒ ﻷﳕﺎط اﻟﺘﻌﻠﻢ اﻟﺴﺎﺋﺪة ‪304 ...................... ................................ ................................‬‬
‫اﳉﺪول‪ 18-5‬اﻟﺮﺑﻂ ﺑﲔ ﻣﺮاﺣﻞ دورة اﻟﺘﻌﻠﻢ ﻟـ‪ Kolb‬وأﳕﺎط اﻟﺘﻌﻠﻢ ﻟـ‪ VARK‬واﻟﻨﻤﻮذج اﳌﻘﱰح ﰲ ﻫﺬا اﻟﻔﺼﻞ ‪308 ........ ................................‬‬
‫اﳉﺪول‪ 19-5‬اﻟﻌﻼﻗﺔ ﺑﲔ ﻣﻌﺪل اﻻﺣﺘﻔﺎظ ﺑﺎﳌﻌﻠﻮﻣﺎت وﻣﺮاﺣﻞ دورة ‪309 ...... ................................ ................................ Kolb‬‬
‫اﳉﺪول‪ 1-6‬ﳎﺎﻻت أزﻣﻨﺔ اﻟﺘﺄﺧﲑ ﻋﻨﺎﺻﺮ اﻟﺘﻮﻗﻴﺖ واﻟﺘﺄﺧﲑ اﻟﺰﻣﲏ ‪329 ............... ................................ ................................‬‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪XXII‬‬
 ‫اﻟﻔﺼﻞ اﻷول‬ ‫‪Chapter 1‬‬

‫‪@Ú™áæa@Ú‡ƒ„˛a‬‬

‫‪EMBEDDED SYSTEMS‬‬

‫ﻧﻈﺮة ﻋﺎﻣﺔ )‪:(Overview‬‬

‫ﻫـ ـ ــﺬا اﻟﻔﺼـ ـ ــﻞ ﻳﻘـ ـ ــﺪم ﺗﻌﺮﻳﻔ ـ ـ ـﺎً ﺑﺎﻷﻧﻈﻤـ ـ ــﺔ اﳌﺪﳎـ ـ ــﺔ ﻳﺸــ ـ ـﺮح ﻣﻮﺿـ ـ ــﻮﻋﺎﻬﺗﺎ اﳌﺘﻘﺪﻣـ ـ ــﺔ‪ ،‬وﻣﺮاﺣ ـ ــﻞ وأﺳ ـ ــﺲ ﺗﺼ ـ ــﻤﻴﻤﻬﺎ‪ .‬ﻳﺘﻄ ـ ــﺮق ﻫ ـ ــﺬا اﻟﻔﺼ ـ ــﻞ إﱃ دور‬
‫اﻷﻧﻈﻤ ـ ـ ـ ــﺔ اﳌﺪﳎ ـ ـ ـ ــﺔ ﰲ اﻟﺼ ـ ـ ـ ــﻨﺎﻋﺔ‪ ،‬وﰲ اﻟﺘﻌﻠ ـ ـ ـ ــﻴﻢ اﳍﻨﺪﺳ ـ ـ ـ ــﻲ‪ ،‬وﰲ اﻟﺘﻌﻠ ـ ـ ـ ــﻴﻢ اﻟﺘﺠـ ـ ـ ـ ـﺮﻳﱯ ﰲ اﳌﺨﺘـ ـ ـ ـﱪات اﳉﺎﻣﻌﻴ ـ ـ ــﺔ‪ ،‬ﰒ ﻳﻨ ـ ـ ــﺎﻗﺶ ﲢ ـ ـ ــﺪﻳﺎت اﻟﺘﻌﻠ ـ ـ ــﻴﻢ‬
‫اﳉ ـ ـ ــﺎﻣﻌﻲ اﳍﻨﺪﺳـ ـ ـ ــﻲ ﻟﻸﻧﻈﻤـ ـ ـ ــﺔ اﳌﺪﳎ ـ ـ ــﺔ‪ ،‬وأﳘﻴـ ـ ـ ــﺔ ﺗﻄـ ـ ـ ــﻮﻳﺮ ﻣﻨ ـ ـ ــﺎﻫﺞ ﺗﻌﻠﻴﻤﻴّـ ـ ـ ـﺔ ﻣﺘﺠـ ـ ـ ــﺪدة‪ .‬ﻳﻨﺘﻘـ ـ ــﻞ ﻫـ ـ ــﺬا اﻟﻔﺼـ ـ ــﻞ ﰲ ﻗﺴـ ـ ــﻤﻪ اﻟﺜـ ـ ــﺎﱐ إﱃ ﺗﻔﺼـ ـ ــﻴﻞ‬
‫ﻣﻘﺘﻀـ ـ ــﺐ ﻟﻔـ ـ ــﺮوع اﻷﻧﻈﻤـ ـ ــﺔ اﳌﺪﳎـ ـ ــﺔ ﺗﻄﺒﻴﻘﺎﻬﺗـ ـ ــﺎ‪ ،‬واﳊﻠـ ـ ــﻮل اﻟﺘﻜﻨﻮﻟﻮﺟﻴـ ـ ــﺔ اﳌﺴـ ـ ــﺘﺨﺪﻣﺔ ﰲ ﺗﺼ ـ ــﻤﻴﻤﻬﺎ‪ .‬ﳜ ـ ــﺘﻢ ﻫ ـ ــﺬا اﻟﻔﺼ ـ ــﻞ ﺟﻮﻟﺘ ـ ــﻪ ﰲ ﻣﻨﺎﻗﺸ ـ ــﺔ‬
‫ﺣﻘـ ـ ــﺎﺋﻖ اﻗﺘﺼـ ـ ــﺎدﻳﺔ ﺣـ ـ ــﻮل اﳊﻠـ ـ ــﻮل اﻟﺘﻜﻨﻮﻟﻮﺟﻴـ ـ ــﺔ اﳌﺴـ ـ ــﺘﻘﺒﻠﻴﺔ ﻟﻸﻧﻈﻤـ ـ ــﺔ اﳌﺪﳎـ ـ ــﺔ‪ ،‬وﲢـ ـ ــﺪﻳﺎت اﻟﺴ ـ ــﻮق اﻟﺘﺠﺎرﻳ ـ ــﺔ اﻟﻌﺎﳌﻴ ـ ــﺔ‪ ،‬وﻣ ـ ــﻦ ﻧﺘﻴﺠ ـ ــﺔ اﳌﻨﺎﻗﺸ ـ ــﺔ‬
‫اﳋﺘﺎﻣﻴﺔ ﻧُﻌﻨ ِﻮن أﺣﺪ أﻫﻢ ﻓﺮوع اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ‪ ،‬واﻟﺬي ﻫﻮ ﳏﻮر اﻫﺘﻤﺎم ﻫﺬا اﻟﺒﺤﺚ‪ ،‬وﺳﻨﻔﺼﻠﻪ ﻓﻴﻤﺎ ﻳﺄﰐ‪.‬‬

‫ﻣﻘﺪﻣﺔ )‪:(Introduction‬‬ ‫‪1-1‬‬

‫ﰲ ﻋﺎم ‪ 1969‬ﻃﻠﺒﺖ ﺷﺮﻛﺔ ‪ Busicom‬اﻟﻴﺎﺑﺎﻧﻴﺔ ﻣﻦ ﺷﺮﻛﺔ ‪ Intel‬ﺗﺼﻨﻴﻊ ﳎﻤﻮﻋﺔ دارات ﺗﻜﺎﻣﻠﻴﺔ ﺧﺎﺻﺔ ﻹﺣﺪى ﻻﻬﺗﺎ اﳊﺎﺳﺒﺔ اﳉﺪﻳﺪة‪.‬‬
‫ﰲ ﻋﺎم ‪ 1971‬ﻛﺎﻧﺖ اﺳﺘﺠﺎﺑﺔ ﺷﺮﻛﺔ ‪ Intel‬ﺑﺘﺼﻨﻴﻊ اﳌﻌﺎﰿ ‪ 4004‬واﻟﺬي ﻫﻮ أول رﻗﺎﻗﺔ ﻣﻌﺎﰿ ﻳﺴﺘﺨﺪم ﺷﺮﳛﺔ واﺣﺪة )‪،(Single Chip‬‬
‫اض ٍ‬
‫ﻋﺎﻣﺔ ﳝﻜﻦ أن ﻳﺴﺘﺨﺪم ﰲ أي ﳕﻮذج ﻣﻦ‬ ‫وﺑﺎﻟﺘﺎﱄ ﺑﺪﻻً ﻣﻦ ﺗﺼﻤﻴﻢ ﻧﻈﺎم ﻟﻜﻞ ﳕﻮذج آﻟﺔ ﺣﺎﺳﺒﺔ ﺟﺪﻳﺪ‪ ،‬اﻗﱰﺣﺖ ‪ Intel‬ﻣﻌﺎﳉﺎً ذا أﻏﺮ ٍ‬
‫اﻵﻻت اﳊﺎﺳﺒﺔ‪.‬‬

‫اﳌﻌﺎﰿ ‪ 4004‬ﺻﻤﻢ ﻟﻴﻨﻔﺬ ﳎﻤﻮﻋﺔ ﻣﻦ اﻟﺘﻌﻠﻴﻤﺎت اﻟﱪﳎﻴﺔ اﳌﺨﺰﻧﺔ ﰲ ﺷﺮﳛﺔ ذاﻛﺮة ﺧﺎرﺟﻴﺔ‪ ،‬وﺑﺎﻟﺘﺎﱄ ﻳﻜﻔﻲ ﺗﻐﻴﲑ ﺑﺮﻧﺎﻣﺞ اﻟﺬاﻛﺮة اﳋﺎرﺟﻴﺔ‬
‫ﻴﺘﻨﺎﺳﺐ ﻣﻊ ﳕﻮذج اﻵﻟﺔ اﳊﺎﺳﺒﺔ وﻣﻴﺰاﻬﺗﺎ‪ .‬ﻫﺬا اﳌﻌﺎﰿ ﻟﻘﻲ ﳒﺎﺣﺎً ﺑﺎﻫﺮاً‪ ،‬واﺳﺘﺨﺪم ﻋﻠﻰ أﺻﻌﺪة ﻋﺪة ﻟﻌﻘﺪ ﻣﻦ اﻟﺰﻣﻦ‪ ،‬ﺣﻴﺚ ‪ -‬وﻟﻠﻤﺮة اﻷوﱃ‬
‫‪ -‬أﺻﺒﺢ ﻣﻦ اﳌﻤﻜﻦ ﺑﻨﺎء ﻧﻈﺎم ﻣﻌﻘﺪ ﻧﺴﺒﻴﺎً ﺑﺎﺳﺘﺨﺪام ﺷﺮﳛﺔ واﺣﺪة‪.‬‬

‫اﳌﺘﺤﻜﻢ ﺑﺎ ﺣﺎﺳﻮﺑﻴﺎً‪ ،‬أﻧﻈﻤﺔ‬

‫َ‬ ‫اﻟﺘﻄﺒﻴﻘﺎت اﳌﺘﻘﺪﻣﺔ اﻷوﱃ ﰲ ﳎﺎل اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ ﺗﻀﻤﻨﺖ‪ :‬ﻣﺴﺎﺑﺮ ﻓﻀﺎﺋﻴﺔ ﺑﻐﲑ ﻣﻼﺣﲔ‪ ،‬إﺷﺎرات اﳌﺮور‬
‫اﻟﺘﺤﻜﻢ ﺑﺎﻟﻄﺎﺋﺮات‪.‬‬

‫ﰲ اﻟﺜﻤﺎﻧﻴﻨﻴﺎت واﻟﺘﺴﻌﻴﻨﻴﺎت ﻛﺎﻧﺖ ﺑﺪاﻳﺔ ﻋﺼﺮ اﻧﺘﺸﺎر اﳌﻌﺎﳉﺎت اﻟﺪﻗﻴﻘﺔ )‪ ،(Microprocessors‬ﺣﻴﺚ اﻧﺘﺸﺮ اﺳﺘﺨﺪام اﳌﻌﺎﳉﺎت‬
‫واﳌﺘﺤﻜﻤﺎت اﳌﺼﻐﺮة ﰲ ﻣﻌﻈﻢ اﻟﺘﻄﺒﻴﻘﺎت واﻷﺟﻬﺰة اﻹﻟﻜﱰوﻧﻴﺔ اﳌﻮﺟﻮدة ﰲ ﺣﻴﺎﺗﻨﺎ اﻟﻴﻮﻣﻴﺔ – ﰲ اﳌﻄﺒﺦ )اﳌﻴﻜﺮووﻳﻒ‪ ،‬آﻟﺔ ﲢﻀﲑ اﻟﻘﻬﻮة‪،(..‬‬
‫ﰲ ﻏﺮﻓﺔ اﳌﻌﻴﺸﺔ )أﺟﻬﺰة اﻟﻌﺮض واﻟﺘﺤﻜﻢ واﻟﺼﻮت واﻟﺘﻜﻴﻴﻒ‪ ،(..‬ﰲ اﳌﻜﺘﺐ )اﳍﺎﺗﻒ‪ ،‬اﻟﻔﺎﻛﺲ‪ ،‬اﻟﻄﺎﺑﻌﺔ‪ ،‬آﻟﺔ ﻋﺪ اﻟﻨﻘﻮد‪ ،(..‬وﲨﻴﻊ ﻫﺬﻩ‬
‫اﻟﺘﻄﺒﻴﻘﺎت ﻫﻲ أﻧﻈﻤﺔ ﻣﺪﳎﺔ )‪.(ESs‬‬
 ‫‪Embedded Systems‬‬ ‫اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ |‬

‫وﺳﻊ آﻓﺎﻗﺎً ﺟﺪﻳﺪة ذات إﻣﻜﺎﻧﻴﺎت واﻋﺪة ﰲ ﺗﻄﺒﻴﻘﺎت اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ واﻟﱵ ﻣﻨﻬﺎ‪ :‬أﻧﻈﻤﺔ اﻟﺘﺤﻜﻢ ﻋﻦ ﺑﻌﺪ‬
‫اﻟﻌﻘﺪ اﻷﺧﲑ ﺷﻬﺪ ﺗﻄﻮراً ﻛﺒﲑاً ّ‬
‫واﻟﱵ ﺗﺴﺘﺨﺪم ﰲ اﳌﻨﺎزل اﻟﺬﻛﻴﺔ‪ ،‬أﻧﻈﻤﺔ اﻷﻛﻴﺎس اﳍﻮاﺋﻴﺔ اﻟﺬﻛﻴﺔ ﰲ اﻟﺴﻴﺎرات‪ ،‬أﺟﻬﺰة اﳌﺮاﻗﺒﺔ اﻟﻄﺒﻴﺔ اﻟﺬﻛﻴﺔ اﻟﱵ ﺗُـ ْﻌﻠﻢ اﻟﻄﺒﻴﺐ ﺑﺎﳊﺎﻟﺔ‬
‫اﻟﻔﻴﺰﻳﻮﻟﻮﺟﻴﺔ واﳌﺴﺘﻮﻳﺎت اﳊﺮﺟﺔ ﻟﻠﻤﺮﻳﺾ‪ ،‬أﻧﻈﻤﺔ اﳌﻼﺣﺔ واﻟﺘﻮﺟﻴﻪ ﰲ اﻟﺴﻴﺎرات‪.‬‬

‫اﻟﻴﻮم‪ ،‬ﻳﺴﺘﺨﺪم أﻛﺜﺮ ﻣﻦ ‪ 6-Bilion‬ﻣﻌﺎﰿ‪/‬ﻣﺘﺤﻜﻢ ﻣﺼﻐﺮ ﰲ ﻛﻞ ﻋﺎم ﰲ ﺗﻄﺒﻴﻘﺎت اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ‪ ،‬ﰲ ﺣﲔ أن ‪ 2%‬ﻓﻘﻂ ﻣﻦ ﻫﺬﻩ‬
‫اﳌﻌﺎﳉﺎت ﺗﺴﺘﺨﺪم ﰲ اﳊﻮاﺳﺐ اﻟﺸﺨﺼﻴﺔ واﶈﻤﻮﻟﺔ‪ ،‬وﺗﺸﲑ اﻹﺣﺼﺎءات إﱃ أن ﻋﺪد اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ ﻳﺰداد ﺑﺸﻜﻞ ﻣﺘﺴﺎرع‪ ،‬وأن اﻟﻄﻠﺐ‬
‫ﻣﺘﺰاﻳﺪ ﻋﻠﻰ اﳌﻬﻨﺪﺳﲔ اﻟﻠﺬﻳﻦ ﳝﺘﻠﻜﻮن ﻣﻬﺎرات ﺗﺼﻤﻴﻢ اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ اﳌﺴﺘﻘﺒﻠﻴﺔ‪.‬‬

‫ﺗﻌﺮﻳﻒ اﻟﻨﻈﺎم اﻟﻤﺪﻣﺞ )?‪:(What is an Embedded System‬‬ ‫‪2-1‬‬

‫إن ﻣﺼﻄﻠﺢ اﻟـ“‪ ”Embedded system‬ﻫﻮ أﺣﺪ اﳌﺼﻄﻠﺤﺎت اﻟﺸﺎﻣﻠﺔ اﻟﱵ ﻻ ﺗﻌﱪ ﺑﺎﻟﻀﺮورة ﻋﻦ ﻣﻌﲎ ﳏﺪد ﻟﺘﻮﺻﻴﻔﻬﺎ‪ ،‬ﻓﻬﻲ ﺗﻐﻄﻲ ﻃﻴﻔﺎً‬
‫واﺳﻌﺎً ﻣﻦ اﻟﺘﻄﺒﻴﻘﺎت واﻷﻧﻈﻤﺔ‪ ،‬ﻧﺬﻛﺮ ﻣﻨﻬﺎ‪ :‬اﻷﺟﻬﺰة اﳋﻠﻮﻳﺔ‪ ،‬أﻧﻈﻤﺔ اﻟﺘﺤﻜﻢ ﺑﺎﻟﺴﻜﻚ اﳊﺪﻳﺪﻳﺔ‪ ،‬أﻧﻈﻤﺔ اﻟﺘﻮﺟﻴﻪ واﳌﺮاﻗﺒﺔ اﻟﻌﺴﻜﺮﻳﺔ‪،‬‬
‫اﻟﺘﺠﻬﻴﺰات اﻟﻜﻬﺮﺑﺎﺋﻴﺔ واﻹﻟﻜﱰوﻧﻴﺔ اﳌﻨﺰﻟﻴﺔ واﳌﻜﺘﺒﻴﺔ‪...‬‬

‫ﺗﻌﺮف اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ ﻋﻠﻰ أ�ﺎ‪ :‬ﻧﻈﺎم ﳐﺼﺺ ﻷداء وﻇﻴﻔﺔ ﳏﺪدة ﳛﻮي ﻋﻠﻰ ﻛﻴﺎن ﺻﻠﺐ )‪ (HW‬وﺑﺮﳎﻴﺔ ﺧﺎﺻﺔ – ﺑﺮﻧﺎﻣﺞ ﻋﻤﻞ اﳌﻌﺎﰿ‬
‫ّ‬
‫– )‪ (SW‬إﺿﺎﻓﺔ إﱃ أﺟﺰاء أﺧﺮى )ﻣﻴﻜﺎﻧﻴﻜﻴﺔ‪ ،‬إﻟﻜﱰوﻧﻴﺔ(‪.‬‬

‫ﻏﺎﻟﺒﺎً ﺗﻌﺘﱪ اﻟﻌﻨﺎﺻﺮ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ اﻟﻘﻠﺐ اﻟﻨﺎﺑﺾ ﰲ اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ‪ ،‬ﻣﺜﻞ‪ :‬اﳌﺘﺤ ﱢﻜﻢ اﳌﺼﻐﺮ )‪ ،(MCU‬اﳌﻌﺎﰿ اﳌﺼﻐﺮ )‪،(MPU‬‬
‫اﳌﺼﻔﻮﻓﺎت اﳊﻘﻠﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ )‪ .(FPGAs‬ﻋﺸﺮات اﳌﻼﻳﲔ ﻣﻦ ﻫﺬﻩ اﻟﻌﻨﺎﺻﺮ ﺗﺴﺘﺨﺪم ﻳﻮﻣﻴﺎً ﰲ اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ اﻟﱵ ﺗﻐﻄﻲ ﻣﻌﻈﻢ‬
‫اﻟﺘﻄﺒﻴﻘﺎت اﶈﻴﻄﺔ ﺑﻨﺎ‪ ،‬وﺗﺴﺎﻫﻢ ﰲ ﲢﻀﲑ ﻃﻌﺎﻣﻨﺎ دون أن ﻧﻨﺘﺒﻪ إﱃ ذﻟﻚ‪.‬‬

‫ﻋﻠﻰ ﳓﻮ ﺧﺎص ﻓﺈن اﻟﻨﻈﺎم اﳌﺪﻣﺞ ﻳﺸﻜﻞ ﺟﺰءاً أو ﻋﻨﺼﺮاً ﻣﻦ ﻧﻈﺎم أﻛﱪ]‪ ،[5‬ﻣﺜﺎﻟﻪ‪ :‬اﻟﺴﻴﺎرات واﳊﺎﻓﻼت اﳊﺪﻳﺜﺔ اﻟﱵ ﲢﻮي ﻋﻠﻰ اﻟﻌﺪﻳﺪ ﻣﻦ‬
‫وﺣﺪات اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ واﻟﱵ ﻣﻨﻬﺎ‪ :‬ﻧﻈﺎم ﻣﺪﻣﺞ ﻣﺴﺆول ﻋﻦ ﻣﻨﻊ اﻻﻧﺰﻻق ﻋﻨﺪ اﻟﻜﺒﺢ )‪ ،(ABS‬ﻧﻈﺎم ﻣﺪﻣﺞ ﻣﺴﺆول ﻋﻦ ﻟﻮﺣﺔ اﻟﻌﺪادات‬
‫)‪ ،(Dashboard‬ﻧﻈﺎم آﺧﺮ ﻣﺴﺆول ﻋﻦ اﻟﺘﻮﺟﻴﻪ اﳌﻼﺣﻲ )‪ ...(GPS‬ﺣﱴ أﻧﻪ ﰲ ﺑﻌﺾ اﻟﺴﻴﺎرات اﻟﻔﺎﺧﺮة )ﻣﺜﻞ‪ (PMW :‬وﺻﻞ ﻋﺪد‬
‫اﳌﻌﺎﳉﺎت إﱃ أﻛﺜﺮ ﻣﻦ ‪ 100‬ﻣﻌﺎﰿ ﻳﻮﺻﻞ ﻣﻦ ﺧﻼﳍﺎ أﻛﺜﺮ ﻣﻦ ‪ 3000‬ﺣﺴﺎس‪ ،‬ﻣﺮﺗﺒﻄﺔ ﻋﱪ ﺷﺒﻜﺔ ‪.CAN‬‬

‫رﻏﻢ ﻃﻴﻒ اﻟﺘﻄﺒﻴﻘﺎت اﻟﻮاﺳﻊ ﺟﺪاً ﻟﻸﻧﻈﻤﺔ اﳌﺪﳎﺔ‪ ،‬إﻻ أن ﳍﺎ ﻣﻴﺰات ﻣﺸﱰﻛﺔ ﻓﻴﻤﺎ ﺑﻴﻨﻬﺎ‪ ،‬وﻫﻲ أ�ﺎ ﺗﺘﻔﺎﻋﻞ ﻣﻊ اﻟﻌﺎﱂ اﳋﺎرﺟﻲ‪ ،‬وﺗﺘﺤﻜﻢ‬
‫ﺑﺎﻷﺟﻬﺰة اﳌﺮﺗﺒﻄﺔ‪ .‬اﻟﺸﻜﻞ‪ 1-1‬ﻳﺒﲔ ﳐﻄﻄﺎً ﺻﻨﺪوﻗﻴﺎً ﻋﺎﻣﺎً ﻟﻠﻤﻜﻮﻧﺎت اﻷﺳﺎﺳﻴﺔ اﻟﱵ ﺗﺸﱰك ﻓﻴﻬﺎ ﲨﻴﻊ اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ‪ .‬إن ﻋﻤﻠﻴﺔ اﻟﺘﺨﺎﻃﺐ‬
‫ﺑﲔ اﻟﻨﻈﺎم اﳌﺪﻣﺞ واﻟﻌﺎﱂ اﳋﺎرﺟﻲ‪ ،‬ﻫﻲ ﻣﻦ ﺧﻼل ﻗﺮاءة إﺷﺎرات اﳊﺴﺎﺳﺎت اﳌﻮﺻﻮﻟﺔ إﱃ أﻗﻄﺎب اﻟﺪﺧﻞ‪ ،‬وﻣﻦ ﰒ ﺗﻘﻮم وﺣﺪة اﳌﻌﺎﳉﺔ‬
‫اﳌﺮﻛﺰﻳﺔ )‪ (Processing Unit‬ﺑﺎﺳﺘﺨﺪام اﻟﺬاﻛﺮة ‪ RAM‬ﲟﻌﺎﳉﺘﻬﺎ ﺑﻌﺪ ﲢﻮﻳﻠﻬﺎ إﱃ إﺷﺎرات رﻗﻤﻴﺔ ﻋﻦ ﻃﺮﻳﻖ وﺣﺪة اﻟﺘﺒﺪﻳﻞ‪ .ADC‬ﻳﺘﻢ‬
‫إﺻﺪار ﻧﺘﺎﺋﺞ اﳌﻌﺎﳉﺔ ﻛﺈﺷﺎرات ﲢﻜﻢ رﻗﻤﻴﺔ ﻋﻠﻰ أﻗﻄﺎب اﳋﺮج اﻟﺮﻗﻤﻴﺔ‪ ،‬و إﺷﺎرات ﲢﻜﻢ ﺗﺸﺎﻬﺑﻴﺔ ﻋﻦ ﻃﺮﻳﻖ وﺣﺪة اﻟﺘﺒﺪﻳﻞ ‪ .DAC‬ﰒ ﻳﺘﻢ‬
‫ﺗﺮﲨﺔ )‪ (Compile‬ﺑﺮﻧﺎﻣﺞ اﻟﻨﻈﺎم اﳌﺪﻣﺞ )‪ (ES.SW‬ﻣﻦ أﺟﻞ ﻣﻌﺎﰿ ﳏﺪد‪ ،‬وﻳﺘﻢ ﲣﺰﻳﻦ اﻟﱪﻧﺎﻣﺞ ﰲ ذاﻛﺮة داﺋﻤﺔ )‪ (NVM‬ﺗﺪﻋﻰ‬
‫ﺑﺎﻟﺬاﻛﺮة ‪.ROM‬‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪2‬‬
‫‪21‬‬ ‫‪Chapter 1‬‬ ‫اﻟﻔﺼﻞ اﻷول |‬

‫اﻟﺸﻜﻞ‪ 1-1‬اﳌﻜﻮﻧﺎت اﻟﻌﺎﻣﺔ ﻟﻸﻧﻈﻤﺔ اﳌﺪﳎﺔ‬

‫ﺑﻨﻴﺔ اﻟﻨﻈﺎم اﻟﻤﺪﻣﺞ )‪:(Embedded System Architecture‬‬ ‫‪3-1‬‬

‫ﺗﺘﻤﻴﺰ اﳊﻮاﺳﺐ اﻟﻌﺎﻣﺔ )‪ (PC: Personal Computers‬ﺑﺄ�ﺎ ﲤﺘﻠﻚ ذاﻛﺮة ﻛﺒﲑة ﲢﻮي ﻋﻠﻰ ﻧﻈﺎم اﻟﺘﺸﻐﻴﻞ واﻟﺘﻄﺒﻴﻘﺎت اﻟﱪﳎﻴﺔ واﻟﺒﻴﺎﻧﺎت‪،‬‬
‫ﺑﺎﻹﺿﺎﻓﺔ إﱃ إﻣﻜﺎﻧﻴﺔ وﺻﻞ وﺣﺪات ﲣﺰﻳﻦ ذات ﺳﻌﺔ ﻛﺒﲑة ﻣﺜﻞ‪ :‬اﻷﻗﺮاص اﻟﺼﻠﺒﺔ واﻟﺮﻗﻤﻴﺔ‪ .‬ﻛﺬﻟﻚ ﲤﺘﺎز ﺑﺄ�ﺎ ﲤﺘﻠﻚ ﳎﻤﻮﻋﺔ ﻣﺘﻨﻮﻋﺔ ﻣﻦ‬
‫أﺟﻬﺰة اﻹدﺧﺎل )ﻟﻮﺣﺔ اﳌﻔﺎﺗﻴﺢ‪ ،‬اﻟﻔﺄرة‪ ،‬ﻣﺪﺧﻞ ﺻﻮﰐ( واﻹﺧﺮاج )اﻟﺸﺎﺷﺔ‪ ،‬ﳐﺮج ﺻﻮﰐ( إﺿﺎﻓﺔ إﱃ وﺣﺪات اﺗﺼﺎل ﳏﻴﻄﻴﺔ )اﻟﻄﺎﺑﻌﺔ‪،‬‬
‫اﻟﻔﺎﻛﺲ‪ ،‬اﻟﺸﺒﻜﺔ‪ ،‬اﳌﺎﺳﺢ اﻟﻀﻮﺋﻲ‪ .(... ،‬إن وﺟﻮد ﻫﺬﻩ اﳌﻴﺰات ﻳﺘﻄﻠﺐ وﺟﻮد ﻣﻌﺎﰿ ذي أداء ٍ‬
‫ﻋﺎل وﺳﺮﻋﺔ ﻛﺒﲑة‪ ،‬واﻟﺬي ﻳﻨﺘﺞ ﻋﻨﻪ‬
‫اﺳﺘﻬﻼك ﻛﺒﲑ ﻟﻠﺘﻐﺬﻳﺔ‪ ،‬ﻛﻤﺎ أن ﺣﺠﻢ اﻟﻨﻈﺎم ﺳﻴﻜﻮن ﻛﺒﲑاً ﺟﺪاً وﺳﻌﺮﻩ ﻣﺮﺗﻔﻊ ﺟﺪاً‪ .‬اﻟﺸﻜﻞ‪ 2-1‬ﻳﺒﲔ اﳌﺨﻄﻂ اﻟﺼﻨﺪوﻗﻲ ﻟﻠﺤﻮاﺳﺐ اﻟﻌﺎﻣﺔ‬
‫)‪.(PC‬‬

‫اﻟﺸﻜﻞ‪ 2-1‬ﳐﻄﻂ ﺑﻨﻴﺔ اﳊﻮاﺳﺐ اﻟﻌﺎﻣﺔ ‪PC‬‬

‫ﻋﻠﻰ ﺧﻼف اﳊﻮاﺳﺐ اﻟﻌﺎﻣﺔ‪ ،‬ﻓﺈن اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ ﺗﺴﺘﺨﺪم اﳌﺘﺤﻜﻤﺎت أو اﳌﻌﺎﳉﺎت اﳌﺼﻐﺮة‪ ،‬واﻟﱵ ﲤﺘﺎز ﺑﺄن وﺣﺪة اﳌﻌﺎﳉﺔ اﳌﺮﻛﺰﻳﺔ ﺳﻮف‬
‫ﺗﻜﻮن ﻣﺪﳎﺔ ﻣﻊ ﲨﻴﻊ اﶈﻴﻄﻴﺎت واﻟﺬواﻛﺮ ﻋﻠﻰ ﺷﺮﳛﺔ واﺣﺪة‪ .‬ﻳﺒﲔ اﻟﺸﻜﻞ‪ 3-1‬اﳌﺨﻄﻂ اﻟﺼﻨﺪوﻗﻲ اﻟﻌﺎم ﻟﺒﻨﻴﺔ اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ‪.‬‬

‫‪3‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Embedded Systems‬‬ ‫اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ |‬

‫اﻟﺸﻜﻞ‪ 3-1‬اﳌﺨﻄﻂ اﻟﺼﻨﺪوﻗﻲ اﻟﻌﺎم ﻟﻸﻧﻈﻤﺔ اﳌﺪﳎﺔ‬

‫ﲤﺘﻠﻚ ﻣﻌﻈﻢ اﳌﺘﺤﻜﻤﺎت اﳌﺼﻐﺮة اﻟﻮﺣﺪات اﶈﻴﻄﻴﺔ اﻟﺮﺋﻴﺴﻴﺔ اﻟﺘﺎﻟﻴﺔ‪ :‬وﺣﺪة ﻣﻌﺎﳉﺔ ﻣﺮﻛﺰﻳﺔ )‪ ،(CPU‬ذاﻛﺮة ﺑﺮﻧﺎﻣﺞ )‪ ،(ROM‬ذاﻛﺮة‬
‫ﻣﻌﻄﻴﺎت داﺋﻤﺔ )‪ ،(EPROM‬ذاﻛﺮة ﻋﺸﻮاﺋﻴﺔ )‪ ،(RAM‬أﻗﻄﺎب اﻟﺪﺧﻞ واﳋﺮج )‪ ،(I/O‬وﺣﺪات اﻟﺘﻮﻗﻴﺖ واﻟﻌﺪ )‪ ،(T/C‬وﺣﺪات‬
‫اﺗﺼﺎل ﺗﺴﻠﺴﻠﻲ )‪ .(I2C, SPI, UART‬ﻛﻤﺎ أن ﺑﻌﺾ اﳌﺘﺤﻜﻤﺎت اﳌﺼﻐﺮة اﳌﺘﻘﺪﻣﺔ ﲤﺘﻠﻚ ﻧﻮاﻓﺬ اﺗﺼﺎل ﺗﺴﻠﺴﻠﻲ ﻋﺎﻟﻴﺔ اﻟﺴﺮﻋﺔ ﻣﺜﻞ‪:‬‬
‫‪ .CAN, USB, Ethernet‬اﳉﺪول‪ 1-1‬ﻳﺒﲔ ﺑﻌﺾ أوﺟﻪ اﻻﺧﺘﻼف اﻟﻌﺎﻣﺔ ﺑﲔ ﺧﺼﺎﺋﺺ اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ واﳊﻮاﺳﺐ اﻟﺸﺨﺼﻴﺔ‪.‬‬

‫اﻟﺤﻮاﺳﺐ اﻟﻌﺎﻣﺔ )‪(PC Computers‬‬ ‫اﻷﻧﻈﻤﺔ اﻟﻤﺪﻣﺠﺔ )‪(Embedded Systems‬‬

‫ﺗﺴﺘﺨﺪم ﰲ أﻏﺮاض ﻋﺎﻣﺔ‪.‬‬ ‫ﻣﻜﺮﺳﺔ ﳌﻬﺎم ﳏﺪدة‪.‬‬

‫ﲤﻠﻚ ﳎﻤﻮﻋﺔ واﺳﻌﺔ ﺟﺪاً ﻣﻦ اﳌﻌﺎﳉﺎت ﺗﺒﻠﻎ ‪ 140‬ﻋﺎﺋﻠﺔ ﻣﺼﻨﻌﺔ‬

‫ﳏﺪودة ﰲ ﻋﺎﺋﻠﺘﲔ ﻣﻦ اﳌﻌﺎﳉﺎت )‪.(Intel, AMD‬‬
‫ﻣﻦ ﻗﺒﻞ أﻛﺜﺮ ﻣﻦ ‪ 40‬ﺷﺮﻛﺔ ﻣﺘﺨﺼﺼﺔ]‪.[6‬‬

‫ﻻ ﻳﻮﺟﺪ اﻋﺘﺒﺎر ﻟﻠﻜﻠﻔﺔ‪.‬‬ ‫ﻛﻠﻔﺔ اﻟﻨﻈﺎم ﺗﻌﺘﱪ ﻣﻦ اﻟﻌﻮاﻣﻞ اﻷﺳﺎﺳﻴﺔ‪.‬‬

‫ﻻ ﻳﺸﱰط ﻋﻤﻠﻬﺎ ﰲ اﻟﺰﻣﻦ اﳊﻘﻴﻘﻲ‪.‬‬ ‫ﻳﻮﺟﺪ ﻗﻴﻮد ﻟﺸﺮوط اﻟﻌﻤﻞ ﰲ اﻟﺰﻣﻦ اﳊﻘﻴﻘﻲ )‪.(RTS‬‬

‫أﻧﻈﻤﺔ اﻟﺘﺸﻐﻴﻞ ﻻ ﺗﻌﻤﻞ ﰲ اﻟﺰﻣﻦ اﳊﻘﻴﻘﻲ‪.‬‬ ‫أﻧﻈﻤﺔ اﻟﺘﺸﻐﻴﻞ ﺗﻌﻤﻞ ﰲ اﻟﺰﻣﻦ اﳊﻘﻴﻘﻲ )‪.(RTOS‬‬

‫ﻓﺸﻞ اﻟﻨﻈﺎم ﻻ ﻳﺸﻜﻞ ﺧﻄﺮاً‪.‬‬ ‫إن ﻧﺘﺎﺋﺞ ﻓﺸﻞ اﻟﻨﻈﺎم ﺧﻄﲑة ﺟﺪاً وﳝﻜﻦ أن ﺗﻜﻮن ﻗﺎﺗﻠﺔً‪.‬‬

‫ﻻ ﻳﻮﺟﺪ ﻗﻴﻮد ﺣﻮل اﺳﺘﻬﻼك اﻟﻄﺎﻗﺔ‪.‬‬ ‫ﻳﻮﺟﺪ ﻗﻴﻮد ﻻﺳﺘﻬﻼك اﻟﻄﺎﻗﺔ اﻟﻜﻬﺮﺑﺎﺋﻴﺔ‪.‬‬

‫ﻏﺎﻟﺒﺎً ﺗﻮﺟﺪ ﰲ ﻇﺮوف اﻟﻌﻤﻞ اﻟﻄﺒﻴﻌﻲ‪.‬‬ ‫ﳚﺐ أن ﺗﻌﻤﻞ ﰲ ﻇﺮوف ﺑﻴﺌﻴﺔ ﻗﺎﺳﻴﺔ أﺣﻴﺎﻧﺎً‪.‬‬

‫ﻣﺼﺎدر اﻟﻨﻈﺎم ﻻ�ﺎﺋﻴﺔ )‪.(...،PCI, ISA, AGP, LPT‬‬ ‫ﻣﺼﺎدر اﻟﻨﻈﺎم ﳏﺪودة‪.‬‬

‫ﻳﺘﻢ ﲣﺰﻳﻦ ﻧﻈﺎم اﻟﺘﺸﻐﻴﻞ واﻟﱪاﻣﺞ اﳋﺪﻣﻴﺔ ﰲ ‪.HDD‬‬ ‫ﻳﺘﻢ ﲣﺰﻳﻦ ﻛﺎﻣﻞ ﺑﺮﻧﺎﻣﺞ اﳌﻌﺎﰿ ﰲ ذاﻛﺮة ‪.ROM‬‬

‫اﻷدوات اﳌﺴﺘﺨﺪﻣﺔ ﻋﺎﻣﺔ‪.‬‬ ‫ﺗﺘﻄﻠﺐ أدوات وﻃﺮﻗﺎً ﺧﺎﺻﺔ ﻟﻴﺘﻢ ﺗﺼﻤﻴﻤﻬﺎ ﺑﻜﻔﺎءة‪.‬‬

‫ﻻ ﲤﻠﻚ أي دارات ذات وﻇﺎﺋﻒ ﺗﺘﺒﻊ اﻷﺧﻄﺎء‪.‬‬ ‫ﻣﺰودة ﺑﺪارات ‪ Debugger‬ﳐﺼﺼﺔ ﻋﻠﻰ ﻧﻔﺲ اﻟﺸﺮﳛﺔ‪.‬‬

‫اﳉﺪول‪ 1-1‬ﻣﻘﺎرﻧﺔ ﺑﲔ ﺧﺼﺎﺋﺺ اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ واﳊﻮاﺳﺐ اﻟﻌﺎﻣﺔ‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪4‬‬
‫‪21‬‬ ‫‪Chapter 1‬‬ ‫اﻟﻔﺼﻞ اﻷول |‬

‫اﻟﻌﻮاﻣﻞ اﻟﻤﺆﺛﺮة ﻓﻲ ﺗﺼﻤﻴﻢ اﻷﻧﻈﻤﺔ اﻟﻤﺪﻣﺠﺔ )‪:(Requirements Affect in ESs Design‬‬ ‫‪4-1‬‬

‫ﻋﻨﺪ ﺗﺼﻤﻴﻢ أي ﻧﻈﺎم ﻣﺪﻣﺞ ﻓﺈﻧﻪ ﳚﺐ ﻣﺮاﻋﺎة ﳎﻤﻮﻋﺔ ﻣﻦ اﳌﺘﻄﻠﺒﺎت واﻻﻋﺘﺒﺎرات ﻳﺘﻢ ﲢﺪﻳﺪﻫﺎ ﰲ اﻟﺪرﺟﺔ اﻷوﱃ وﻓﻘﺎً ﻟﻌﺎﻣﻞ اﻟﻜﻠﻔﺔ‬
‫اﳌﻄﻠﻮب‪ ،‬ﻋﻠﻰ ﺳﺒﻴﻞ اﳌﺜﺎل‪ :‬إذا ﺗﺘﻄﻠﺐ إﻧﺘﺎج ﻧﻈﺎم ﲢﻜﻢ ﻣﺪﻣﺞ ﺑﻜﻠﻔﺔ ﻻ ﺗﺘﺠﺎوز ‪ 1000‬ﻟﲑة ﺳﻮرﻳﺔ؛ ﻓﺈﻧﻪ رﲟﺎ ﻣﻦ اﻟﻀﺮوري اﻻﺳﺘﻐﻨﺎء ﻋﻦ‬
‫ﺑﻌﺾ اﳌﻴﺰات اﻟﻜﻤﺎﻟﻴﺔ ﻟﻠﻮﺻﻮل إﱃ اﻟﻜﻠﻔﺔ اﳌﻄﻠﻮﺑﺔ‪.‬‬

‫اﻻﻋﺘﺒﺎرات اﻷﺳﺎﺳﻴﺔ ﰲ ﺗﺼﻤﻴﻢ اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ ﻫﻲ‪:‬‬

‫‪ .1‬ﺳﻌﺔ اﳌﻌﺎﳉﺔ )‪ :(Processing Power‬وﻫﻲ ﻋﺪد اﻟﺘﻌﻠﻴﻤﺎت اﻟﱵ ﳝﻜﻦ ﺗﻨﻔﻴﺬﻫﺎ ﺧﻼل ﺛﺎﻧﻴﺔ واﺣﺪة )‪ ،(MIPS‬وﺑﺎزدﻳﺎدﻫﺎ‬
‫ﺗﺰداد ﺳﻌﺔ )ﻗﻮة( اﳌﻌﺎﳉﺔ ﻟﻠﻤﻌﺎﰿ‪.‬‬

‫‪ .2‬ﻋﺮض اﻟﻨﺎﻗﻞ اﻟﺪاﺧﻠﻲ )‪ :(Data-Bus‬وﻫﻲ ﻋﺮض ﻧﺎﻗﻞ اﻟﺒﻴﺎﻧﺎت ﺑﲔ وﺣﺪة اﳌﻌﺎﳉﺔ واﻟﺬاﻛﺮة‪ ،‬وﻳﱰاوح ﻋﺮض اﻟﻨﺎﻗﻞ ﻣﻦ ‪4-bit‬‬

‫‪ ،~ 64-bit‬وﺑﺎزدﻳﺎد ﻋﺮض اﻟﻨﺎﻗﻞ ﺗﺰداد ﺳﺮﻋﺔ ﺗﻨﺎﻗﻞ اﻟﺒﻴﺎﻧﺎت ﺑﲔ اﳌﻌﺎﰿ واﻟﺬاﻛﺮة‪.‬‬

‫‪ .3‬ﺣﺠﻢ اﻟﺬاﻛﺮة )‪ :(Memory Space‬وﻫﻲ اﳌﺴﺎﺣﺔ اﳌﻄﻠﻮﺑﺔ ﻟﺘﺨﺰﻳﻦ ﺑﺮﻧﺎﻣﺞ ﺗﻨﻔﻴﺬ اﻟﺘﻌﻠﻴﻤﺎت )‪ (ROM‬واﻟﺒﻴﺎﻧﺎت )اﳌﻌﻄﻴﺎت(‬
‫اﻟﱵ ﻳﺘﻢ ﻣﻌﺎﳉﺘﻬﺎ آﻧﻴﺎً )‪ .(RAM‬ﻋﻤﻮﻣﺎً‪ ،‬ﻓﺈن ﻣﺴﺎﺣﺔ اﻟﺬاﻛﺮة اﳌﻄﻠﻮﺑﺔ ﺗﺘﻌﻠﻖ ﺑﺎﳌﻌﺎﰿ اﳌﺴﺘﺨﺪم واﳌﻴﺰات اﶈﻴﻄﻴﺔ اﳌﱰاﻓﻘﺔ ﻣﻌﻪ‬
‫وﺣﺠﻢ اﻟﱪﻧﺎﻣﺞ‪.‬‬

‫‪ .4‬اﺳﺘﻬﻼك اﻟﻄﺎﻗﺔ )‪ :(Power Consumption‬ﻫﻲ ﻣﻦ أﻫﻢ اﻻﻋﺘﺒﺎرات ﺧﺼﻮﺻﺎً ﰲ اﻷﺟﻬﺰة اﻟﻨﻘﺎﻟﺔ اﻟﱵ ﺗﻌﻤﻞ ﻋﻠﻰ‬
‫اﳌﺪﺧﺮات‪ ،‬وﺗﺴﺘﻌﻤﻞ وﺣﺪة اﻟﻘﻴﺎس ‪ mW/MIPS‬ﻟﺘﺤﺪﻳﺪ ﻛﻤﻴﺔ اﻟﻄﺎﻗﺔ اﳌﻄﻠﻮﺑﺔ ﺗﺒﻌﺎً ﻟﺴﻌﺔ اﳌﻌﺎﳉﺔ‪ ،‬ﺣﻴﺚ أﻧﻪ ﺑﺎزدﻳﺎد ﺳﻌﺔ‬
‫اﳌﻌﺎﳉﺔ ﺗﺰداد ﻛﻤﻴﺔ اﻟﻄﺎﻗﺔ اﳌﻄﻠﻮﺑﺔ ﻟﻌﻤﻞ اﳌﻌﺎﰿ‪ .‬ﻋﻤﻠﻴﺎً‪ ،‬ﻓﺈن اﻷﻧﻈﻤﺔ اﻟﱵ ﺗﺴﺘﻬﻠﻚ ﻃﺎﻗﺔ ﻣﻨﺨﻔﻀﺔ ﺗﺘﻤﻴﺰ ﲞﺼﺎﺋﺺ ﻣﺮﻏﻮﺑﺔ ﺟﺪاً‬
‫ﻣﺜﻞ‪ :‬ﺣﺮارة أﻗﻞ‪ ،‬وزن أﻗﻞ‪ ،‬ﺣﺠﻢ أﺻﻐﺮ‪ ،‬ﺗﺼﻤﻴﻢ ﻣﻴﻜﺎﻧﻴﻜﻲ أﺑﺴﻂ‪ .‬ﻟﺬﻟﻚ ﺗﺴﺘﺨﺪم اﳌﻌﺎﳉﺎت ﻣﺘﻌﺪدة اﻟﻨﻮى ) ‪Multi-core‬‬

‫‪ (Processors‬ﰲ اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ اﻟﱵ ﺗﺘﻄﻠﺐ ﻧﻈﺎﻣﺎً ﻣﻨﺨﻔﺾ اﻻﺳﺘﻬﻼك واﳊﺠﻢ وذا ﺳﻌﺔ ﻣﻌﺎﳉﺔ ﻋﺎﻟﻴﺔ‪.‬‬

‫‪ .5‬ﻛﻠﻔﺔ اﻟﺘﻄﻮﻳﺮ )‪ :(Development Cost‬ﻫﻲ ﻛﻠﻔﺔ ﺗﺼﻤﻴﻢ اﻟﻜﻴﺎن اﻟﺼﻠﺐ )‪ (ES.HW‬واﻟﱪﳎﻴﺎت اﳌﱰاﻓﻘﺔ )‪،(ES.SW‬‬
‫وﺗﻌﺮف أﻳﻀﺎً ﺑﺎﳌﺼﻄﻠﺢ ‪ ،(Non-Recurring Engineering) NRE‬وﻫﻲ ﻛﻠﻔﺔ ﺛﺎﺑﺘﺔ ﺗﺪﻓﻊ ﳌﺮة واﺣﺪة ﻓﻘﻂ أﺛﻨﺎء ﻣﺮﺣﻠﺔ‬
‫ﺗﺼﻤﻴﻢ اﻟﻨﻈﺎم ‪ -‬ﻫﺬﻩ اﻟﻜﻠﻔﺔ ﻳﺘﻢ ﺗﻮزﻳﻌﻬﺎ ﻋﻠﻰ ﻋﺪد ﻗﻄﻊ اﻹﻧﺘﺎج‪.‬‬

‫‪ .6‬ﻛﻤﻴﺔ اﻹﻧﺘﺎج )‪ :(Number of Units‬إن اﳌﻮازﻧﺔ ﺑﲔ ﻛﻠﻔﺔ اﻹﻧﺘﺎج وﻛﻠﻔﺔ اﻟﺘﻄﻮﻳﺮ ﺗﺘﻌﻠﻖ ﻣﺒﺎﺷﺮة ﺑﻜﻤﻴﺔ اﻹﻧﺘﺎج اﳌﻄﻠﻮﺑﺔ‪ ،‬إذ ﻳﺘﻢ‬
‫ﺗﻮزﻳﻊ اﻟﻜﻠﻔﺔ اﻟﺜﺎﺑﺘﺔ ﻋﻠﻰ ﻋﺪد اﻟﻌﻨﺎﺻﺮ اﳌﻄﻠﻮﺑﺔ‪ .‬أﻣﺎ ﻣﻦ أﺟﻞ ﺗﺼﻤﻴﻢ ذي ﻛﻤﻴﺔ ﳏﺪودة ﻣﻦ اﻟﻘﻄﻊ؛ ﻓﺈن ﻛﻠﻔﺔ اﻟﺘﻄﻮﻳﺮ ﳌﺜﻞ ﻫﺬا‬
‫اﻟﻨﻈﺎم ﺳﺘﻜﻮن ﻛﺒﲑة ﺟﺪاً‪.‬‬

‫‪ .7‬ﺣﻴﺎة اﳌﻨﺘﺞ )‪ :(Lifetime‬وﻫﻮ اﻟﻌﻤﺮ اﻻﻓﱰاﺿﻲ اﳌﺘﻮﻗﻊ ﻟﺒﻘﺎء اﳌﻨﺘﺞ ﰲ اﻻﺳﺘﺨﺪام اﻟﻔﻌﺎل‪ .‬إن ﻫﺬا اﻻﻋﺘﺒﺎر ﻳﺆﺛﺮ ﻣﺒﺎﺷﺮة ﰲ ﲨﻴﻊ‬
‫ﻗﺮارات اﻟﺘﺼﻤﻴﻢ اﻧﻄﻼﻗﺎً ﻣﻦ اﺧﺘﻴﺎر ﻋﻨﺎﺻﺮ اﻟﻜﻴﺎن اﻟﺼﻠﺐ وﺻﻮﻻً إﱃ ﻛﻠﻔﺔ اﻟﺘﻄﻮﻳﺮ‪.‬‬

‫‪ .8‬اﻟﻮﺛﻮﻗﻴﺔ )‪ :(Reliability‬وﻫﻲ ﻣﻘﺪرة اﻟﻨﻈﺎم ﻋﻠﻰ اﻻﺳﺘﺠﺎﺑﺔ ﰲ ﳐﺘﻠﻒ اﻟﻈﺮوف‪ ،‬وﺗﺘﻨﺎﺳﺐ اﻟﻮﺛﻮﻗﻴﺔ ﻃﺮداً ﻣﻊ ﻛﻠﻔﺔ اﻟﻨﻈﺎم‪.‬‬

‫‪5‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Embedded Systems‬‬ ‫اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ |‬

‫إﺿﺎﻓﺔً إﱃ ﻫﺬﻩ اﳌﺘﻄﻠﺒﺎت اﻷﺳﺎﺳﻴﺔ اﻟﺜﻤﺎﻧﻴﺔ‪ ،‬ﻓﺈن ﻟﻜﻞ ﻧﻈﺎم ﻣﺪﻣﺞ ﻣﺘﻄﻠﺒﺎت وﻇﻴﻔﻴﺔ أﺧﺮى ﺎﺻﺔ ﺗﺘﻌﻠﻖ ﻬﺑﻮﻳﺔ اﻟﻨﻈﺎم وﺗﻮﻇﻴﻔﻪ‬
‫)ﻣﺎﻳﻜﺮووﻳﻒ‪ ،‬ﻣﻨﻈﻢ دﻗﺎت اﻟﻘﻠﺐ‪ ،‬ﻧﻈﺎم اﻟﻄﲑان اﻵﱄ‪ ،‬ﻧﻈﺎم اﻟﺘﻮﺟﻴﻪ اﳌﻼﺣﻲ‪ ،(...‬وﻣﻦ ﻫﺬﻩ اﳌﺘﻄﻠﺒﺎت‪ :‬اﳌﻌﺎﳉﺔ ﰲ اﻟﺰﻣﻦ اﳊﻘﻴﻘﻲ‬
‫)‪.(Real-time Processing‬‬

‫ﻣﻼﺣﻈﺔ‪ :‬إن ﺳﻠﻮك اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ ﲨﻴﻌﻬﺎ ﻣﻘﻴﺪ ﺑﺎﻟﺰﻣﻦ ﺑﺸﻜﻞ ﻛﻠﻲ‪ ،‬وذﻟﻚ ﻋﻠﻰ اﻟﺮﻏﻢ ﻣﻦ أﻧﻪ ﰲ ﺑﻌﺾ اﻷﺣﻴﺎن ﻻ ﻳﺘﻄﻠﺐ اﻟﻌﻤﻞ ﰲ‬
‫اﻟﺰﻣﻦ اﳊﻘﻴﻘﻲ]‪ "Embedded is almost synonymous with real-time" .[7‬ﻫﺬا ﻣﺎ ﻧﺺ ﻋﻠﻴﻪ اﻟﺒﺎﺣﺚ ‪ Zave‬ﻣﺸﲑاً إﱃ أن‬
‫اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ ﻣﱰاﻓﻘﺔ اﳌﻌﲎ ﳌﺼﻄﻠﺢ اﻟﺰﻣﻦ اﳊﻘﻴﻘﻲ]‪ ،[8‬ﻛﻤﺎ أن ﺻﺤﺔ ﻋﻤﻞ اﻟﻨﻈﺎم ﰲ اﻟﺰﻣﻦ اﳊﻘﻴﻘﻲ ﻻ ﺗﻌﺘﻤﺪ ﻓﻘﻂ ﻋﻠﻰ اﻟﻨﺘﺎﺋﺞ اﳊﺴﺎﺑﻴﺔ‪،‬‬
‫وإﳕﺎ ﺗﻌﺘﻤﺪ أﻳﻀﺎً ﻋﻠﻰ اﻟﺰﻣﻦ اﻟﺬي ﰎ ﻓﻴﻪ ﻣﻌﺎﳉﺔ ﻫﺬﻩ اﻟﻨﺘﺎﺋﺞ]‪.[9‬‬

‫ﺻﻨﺎﻋﺔ اﻷﻧﻈﻤﺔ اﻟﻤﺪﻣﺠﺔ )‪:(Embedded System Industry‬‬ ‫‪5-1‬‬

‫ﰲ اﻟﺴﻨﻮات اﻷﺧﲑة أﺻﺒﺢ ﻗﻄﺎع ﺻﻨﺎﻋﺔ اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ ﰲ اﻟﻌﺪﻳﺪ ﻣﻦ اﻟﺒﻠﺪان اﻟﺼﻨﺎﻋﻴﺔ اﻟﻘﻄﺎع اﻷﻛﺜﺮ ازدﻫﺎراً وﺗﻄﻮراً‪ ،‬ﺣﻴﺚ ﺗﻌﺘﱪ ﺻﻨﺎﻋﺔ‬
‫اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ ﻋﺎﳌﻴﺎً اﳉﺰء اﻷﻛﱪ واﻷﺳﺮع ﳕﻮاً‪ ،‬وﺧﺼﻮﺻﺎً ﺻﻨﺎﻋﺔ اﳌﺘﺤﻜﻤﺎت اﳌﺼﻐﺮة اﻟﱵ ﺗﺸﻜﻞ ﺗﻘﺮﻳﺒﺎً ‪ 99.99%‬ﻣﻦ اﻟﻨﺎﺗﺞ اﻟﻌﺎﳌﻲ ﻣﻦ‬
‫اﳌﻌﺎﳉﺎت )‪ (MCU, MPU‬اﻟﱵ ﻳﺘﻢ إﻧﺘﺎﺟﻬﺎ ﺳﻨﻮﻳﺎً‪.‬‬

‫إن ﺳﺒﺐ ﻫﺬا اﻟﺘﻜﺎﺛﺮ اﳌﺘﺰاﻳﺪ ﻳﻌﻮد إﱃ أن ﻋﺪد اﳌﻌﺎﳉﺎت اﳌﺴﺘﺨﺪﻣﺔ ﰲ اﳊﻮاﺳﺐ اﻟﺸﺨﺼﻴﺔ ﻳﻌﺘﱪ ﺻﻐﲑاً ﺟﺪاً ﻣﻘﺎرﻧﺔً ﻣﻊ اﳌﻌﺎﳉﺎت‬
‫اﳌﺴﺘﺨﺪﻣﺔ ﰲ اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ‪ .‬اﻟﺘﻘﺮﻳﺮ اﻷﺧﲑ ﻳﺸﲑ إﱃ أن اﳌﻨﺰل اﻟﻮاﺣﺪ ﳛﻮي ﻋﻠﻰ اﻷﻗﻞ ‪ 40~100‬ﻣﺘﺤﻜﻢ ﻣﺼﻐﺮ‪ ،‬ﰲ ﺣﲔ ﳝﻜﻦ أن‬
‫ﻳﻮﺟﺪ ﺛﻼﺛﺔ أو أﻗﻞ ﰲ اﳊﺎﺳﺐ اﻟﺸﺨﺼﻲ‪.‬‬

‫اﳌﺘﺤﻜﻤﺎت اﳌﺼﻐﺮة ﳝﻜﻦ أن ﺗﻮﺟﺪ ﰲ ﲨﻴﻊ اﻟﺘﺠﻬﻴﺰات اﳌﻨﺰﻟﻴﺔ‪ ،‬ﻣﺜﻼً‪ :‬اﻟﺘﻠﻔﺎز‪ ،‬اﳌﺸﻐﻞ اﻟﺮﻗﻤﻲ‪ ،‬أﻟﻌﺎب اﻷﻃﻔﺎل‪ ،‬اﳌﻮﻗﺪ]‪ .[10‬إﺿﺎﻓﺔً إﱃ ذﻟﻚ‬
‫ﺋﻴﺴﻲ ﰲ ﺳﻮق اﻷﻧﻈﻤﺔ اﻟﺮﻗﻤﻴﺔ‪ ،‬واﳊﻠﻮل اﻟﺘﻜﻨﻮﻟﻮﺟﻴﺔ ﳌﻌﻈﻢ ﺗﻄﺒﻴﻘﺎﺗﻪ اﻟﺼﻨﺎﻋﻴﺔ‪ ،‬واﻟﱵ ﻣﻨﻬﺎ‪ :‬وﺳﺎﺋﻞ اﻟﻨﻘﻞ‬
‫ﻓﺈن اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ ﲤﺜﻞ اﻟﻘﻄﺎع اﻟﺮ ﱠ‬
‫)‪ ،(Automotive‬إﻟﻜﱰوﻧﻴﺎت اﳌﺴﺘﻬﻠﻚ )‪ ،(Consumer Electronics‬اﻷﲤﺘﺔ اﻟﺼﻨﺎﻋﻴﺔ )‪ ،(Industrial Automation‬اﻟﺘﻄﺒﻴﻘﺎت‬
‫اﻟﻌﺴﻜﺮﻳﺔ )‪ ،(Military‬ﺗﻨﺎﻗﻞ اﻟﺒﻴﺎﻧﺎت )‪ ،(Data-Transmission‬اﻻﺗﺼﺎﻻت )‪ ،(Communication‬أﲝﺎث اﻟﻔﻀﺎء‬
‫)‪. [11-13](Aerospace‬‬

‫ﺣﺎﻟﻴﺎً‪ ،‬أﻛﺜﺮ ﻣﻦ ‪ 98%‬ﻣﻦ ﻣﺘﺤﻜﻤﺎت ‪ 8/32-bit‬ﺗﺴﺘﺨﺪم ﰲ اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ]‪ .[14‬ﻃﺒﻘﺎً ﻟﻠﺪراﺳﺔ اﻹﺣﺼﺎﺋﻴﺔ اﻟﱵ ﺸﺮﻬﺗﺎ ﺷﺮﻛﺔ‬
‫‪ SEMICO‬ﰲ ﻋﺎم ‪ 2006‬ﻓﺈن ‪ 55%‬ﻣﻦ اﳌﺘﺤﻜﻤﺎت اﻟﱵ ﺗﺒﺎع ﺣﻮل اﻟﻌﺎﱂ ﻫﻲ ‪ ،8-bit‬وأﻛﺜﺮ ﻣﻦ ‪ 4-billion‬ﻣﺘﺤﻜﻢ ‪ 8-bit‬ﺑﻴﻊ ﰲ‬
‫ﻋﺎم ‪.[15]2006‬‬

‫اﶈﻠﻠﻮن اﻻﻗﺘﺼﺎدﻳﻮن ﻳﺘﻮﻗﻌﻮن أﻧﻪ ﻣﻊ اﻧﻄﻼﻗﺔ ﻋﺎم ‪ 2010‬ﻓﺈن أﻛﺜﺮ ﻣﻦ ‪ 90%‬ﻣﻦ اﻟﱪاﻣﺞ اﻟﱵ ﰎ ﺗﻄﻮﻳﺮﻫﺎ ﺳﺘﻜﻮن ﳐﺼﺼﺔ ﻟﻸﻧﻈﻤﺔ اﳌﺪﳎﺔ‪،‬‬
‫ﻛﻤﺎ أ ّن ﻋﺪد ﻣﱪﳎﻲ اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ ﺳﻴﺰداد ﲟﻘﺪار ﻋﺸﺮة أﺿﻌﺎف ﻣﻘﺎرﻧﺔً ﻣﻊ ﻣﱪﳎﻲ اﻷﻧﻈﻤﺔ اﻷﺧﺮى]‪ .[16‬ﻋﻠﻰ اﻟﺮﻏﻢ ﻣﻦ ﻫﺬﻩ‬
‫اﻹﺣﺼﺎءات؛ ﻓﺈن ﻣﻌﻈﻢ ﻣﻨﺎﻫﺞ ﻫﻨﺪﺳﺔ اﳊﺎﺳﺒﺎت واﻟﺘﺤﻜﻢ ﰲ اﻟﻌﺪﻳﺪ ﻣﻦ اﳉﺎﻣﻌﺎت اﻟﻐﺮﺑﻴﺔ ﻋﻠﻰ وﺟﻪ ﻋﺎم‪ ،‬وﺟﺎﻣﻌﺎﺗﻨﺎ اﶈﻠﻴﺔ ﻋﻠﻰ وﺟﻪ‬
‫اﻟﺘﺨﺼﻴﺺ‪ ،‬ﻣﺎ ﺗﺰال ﺗﻌﻠﻢ ﻣﻬﺎرات اﻟﱪﳎﺔ واﻟﺘﺼﻤﻴﻢ اﳌﺘﻌﻠﻘﺔ ﺑﻠﻐﺎت ﺑﺮﳎﺔ اﳊﻮاﺳﺐ اﻟﻌﺎﻣﺔ ﻓﻘﻂ‪ ،‬ﺑﺪﻻً ﻣﻦ ﺑﺮﳎﺔ اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ اﻷﻛﺜﺮ‬
‫ﲣﺼﺼﺎً]‪.[17‬‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪6‬‬
‫‪21‬‬ ‫‪Chapter 1‬‬ ‫اﻟﻔﺼﻞ اﻷول |‬

‫اﻷﻧﻈﻤﺔ اﻟﻤﺪﻣﺠﺔ ﻓﻲ اﻟﺘﻌﻠﻴﻢ اﻟﻬﻨﺪﺳﻲ )‪:(Embedded systems Engineering Education‬‬ ‫‪6-1‬‬

‫إن اﻻﻧﺘﺸﺎر اﳌﺘﺴﺎرع ﻟﻸﻧﻈﻤﺔ اﳌﺪﳎﺔ ﻳﺘﻄﻠﺐ ﻋﺪداً ﻣﺘﺰاﻳﺪاً ﻣﻦ اﳌﻬﻨﺪﺳﲔ اﳌﺆﻫﻠﲔ واﳌﺪرﺑﲔ ﻋﻠﻰ ﺗﺼﻤﻴﻢ اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ ﺑﻜﻞ‬
‫ﻋﺘﺒﺎراﻬﺗﺎ]‪[18‬ﻣﺜﻞ‪ :‬ﺗﺼﻤﻴﻢ ﻧﻈﻢ اﻟﺘﺤﻜﻢ ﺑﺎﺳﺘﺨﺪام اﳌﺘﺤﻜﻤﺎت اﳌﺼﻐﺮة‪ ،‬أﻧﻈﻤﺔ اﻟﺰﻣﻦ اﳊﻘﻴﻘﻲ‪ ،‬اﻟﱪﳎﺔ اﻟﺘﻔﺮﻋﻴﺔ واﳌﻮزﻋﺔ ) ‪Distributed‬‬

‫‪ ،(Programming‬اﻟﱪﳎﺔ ﻣﺘﻌﺪدة اﳌﻬﺎم )‪ ،... ،(Multitasking, Multithreading‬إﱃ ﻣﺎ ﻫﻨﺎﻟﻚ ﻣﻦ اﻻﻋﺘﺒﺎرات اﳍﺎﻣﺔ واﻟﻜﺜﲑة ﰲ‬
‫ﺗﺼﻤﻴﻢ اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ‪.‬‬

‫ﰲ اﳊﻘﻴﻘﺔ‪ ،‬ﺗﻌﺎﱐ ﳎﺘﻤﻌﺎت ﺗﺼﻤﻴﻢ اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ اﻟﻴﻮم ‪ -‬ﰲ اﻟﺒﻠﺪان اﳌﺘﻘﺪﻣﺔ وﻏﲑﻫﺎ ‪ -‬ﻣﻦ ﻗﻠﺔ اﳌﻬﻨﺪﺳﲔ ذوي اﳌﻬﺎرات اﻟﻨﻮﻋﻴﺔ اﻟﻘﺎدرﻳﻦ‬
‫ﻋﻠﻰ ﺗﻄﻮﻳﺮ ﻣﺜﻞ ﻫﺬﻩ اﻷﻧﻈﻤﺔ ﻋﻠﻰ ﺻﻌﻴﺪ اﻟﻜﻴﺎن اﻟﺼﻠﺐ )‪ (HW‬أو اﻟﺼﻌﻴﺪ اﻟﱪﳎﻲ )‪ ،(SW‬وﺗﻌﺘﱪ ﻫﺬﻩ ﻣﺸﻜﻠﺔ ﻛﺒﲑة ﻣﺸﱰﻛﺔ ﺧﺼﻮﺻﺎً‬
‫ﰲ اﻟﺒﻠﺪان اﻟﺼﻨﺎﻋﻴﺔ]‪ ،[19-21‬إذ ﺗﺰداد اﳊﺎﺟﺔ ﺑﺸﻜﻞ ﻛﺒﲑ إﱃ ﻣﻬﻨﺪﺳﻲ ﺗﺼﻤﻴﻢ اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ‪ ،‬وﺗﺸﺘﻜﻲ اﻟﺼﻨﺎﻋﺔ ﻣﻦ أن ﻣﻨﺎﻫﺞ اﻟﺘﻌﻠﻴﻢ ﰲ‬
‫اﳍﻨﺪﺳﺔ اﳊﺎﺳﻮﺑﻴﺔ واﳍﻨﺪﺳﺔ اﻟﻜﻬﺮﺑﺎﺋﻴﺔ واﻹﻟﻜﱰوﻧﻴﺔ ﻏﲑ ﻗﺎدرة ﻋﻠﻰ ﺗﺰوﻳﺪ اﳌﻬﻨﺪﺳﲔ اﳌﺒﺘﺪﺋﲔ ﲟﻬﺎر ٍ‬
‫ات أوﻟﻴﺔ ﻛﺎﻓﻴﺔ ﻟﻴﺼﺒﺤﻮا ﻗﺎدرﻳﻦ ﻋﻠﻰ‬ ‫ُ‬
‫ﺗﺼﻤﻴﻢ ﻣﺜﻞ ﻫﺬﻩ اﻷﻧﻈﻤﺔ ﺑﺄﺑﺴﻂ أﺷﻜﺎﳍﺎ‪ ،‬واﻟﺴﺒﺐ ﻳﻌﻮد إﱃ أن ﻣﻨﺎﻫﺞ اﳍﻨﺪﺳﺔ اﳊﺎﺳﻮﺑﻴﺔ اﻟﺘﻘﻠﻴﺪﻳﺔ ﺗﺮﻛﺰ ﺑﺸﻜﻞ أﺳﺎﺳﻲ ﻋﻠﻰ اﻟﺘﻄﺒﻴﻘﺎت‬
‫واﳊﻠﻮل اﻟﱪﳎﻴﺔ اﳊﺎﺳﻮﺑﻴﺔ )‪ ،(PC SW‬وﻻ ﺗﺰود اﻟﻄﻼب ﺑﺎﻟﻔﺮﺻﺔ ﻟﻜﺴﺐ اﳌﻬﺎرات اﻟﻀﺮورﻳﺔ ﰲ اﻟﺘﻄﺒﻴﻘﺎت اﻟﱪﳎﻴﺔ ﻟﻸﻧﻈﻤﺔ اﳌﺪﳎﺔ‪.‬‬

‫إن ارﺗﺒﺎط ﻫﺬﻩ اﳊﻘﻴﻘﺔ ﻣﻊ اﻟﺘﻀﺨﻢ اﳌﻌﺮﰲ اﳌﺘﺰاﻳﺪ ﰲ ﳎﺎل ﺗﺼﻤﻴﻢ اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ ﻳﻨﺸﺄ ﻋﻨﻪ اﻫﺘﻤﺎم ﻋﺎﳌﻲ ﻣﺘﺰاﻳﺪ ﰲ اﻗﱰاح ﻣﻨﺎﻫﺞ ﺗﻌﻠﻴﻤﻴﺔ‬
‫ﺟﺎﻣﻌﻴﺔ ﻣﺘﺠﺪدة ﺗُﻌﲎ ﺑﺘﺼﻤﻴﻢ اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ ﺗﻄﺒﻴﻘﺎﻬﺗﺎ‪.‬‬

‫ﻳﻮﺟﺪ ﻣﺴﺎﺋﻞ أﺧﺮى ﻫﺎﻣﺔ ﻣﻮﺿﺤﺔ ﰲ ﲦﺎﻧﻴﺔ أوراق ﲝﺜﻴﺔ ﺣﻮل ﺑﻌﺾ اﳌﺴﺎﺋﻞ اﳊﺎﻟﻴﺔ ﻋﻦ أﳘﻴﺔ ﺗﻌﻠﻴﻢ اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ‪ ،‬واﻟﱵ ﰎ إﻗﺮارﻫﺎ ﰲ‬
‫اﳌﺆﲤﺮ اﻟﻌﺎﳌﻲ ‪ ACM‬ﻟﻠﻨﻈﻢ اﳌﺪﳎﺔ‪ ،‬ﳝﻜﻦ ﻣﺮاﺟﻌﺘﻬﺎ ﰲ اﳌﺮﺟﻊ]‪.[22‬‬

‫ﺗﺆﻛﺪ اﻷﲝﺎث أﻳﻀﺎً ﻋﻠﻰ أن اﳌﻨﺎﻫﺞ اﻟﺘﻌﻠﻴﻤﻴﺔ واﻟﺘﺪرﻳﺒﻴﺔ ﰲ اﳍﻨﺪﺳﺔ اﻟﻜﻬﺮﺑﺎﺋﻴﺔ واﻹﻟﻜﱰوﻧﻴﺔ واﳊﺎﺳﻮﺑﻴﺔ وﻓﺮوﻋﻬﺎ‪ ،‬ﳚﺐ أن ﺗﻌﻜﺲ أﳘﻴﺔ ﻫﺬا‬
‫ﻤﻟﺎل وﺗﻼﺣﻖ اﻟﻨﻤﻮ اﳌﻌﺮﰲ واﻟﺘﻜﻨﻮﻟﻮﺟﻲ‪ ،‬وذﻟﻚ ﻣﻦ ﺧﻼل ﺗﻄﻮﻳﺮ ﻣﻨﺎﻫﺞ ﺗﻌﻠﻴﻤﻴﺔ ﺗﺘﻀﻤﻦ ﻣﻘﺮرات ﺗﺪرﻳﺴﻴﺔ ﺗﺮﻛﺰ ﻋﻠﻰ ﺗﺼﻤﻴﻢ اﻷﻧﻈﻤﺔ‬
‫اﳌﺪﳎﺔ )‪ .[23](ES.HW & ES.SW‬إﺿﺎﻓﺔ إﱃ ذﻟﻚ‪ ،‬ﻓﺈن ﺗﺪرﻳﺲ اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ ﳝﻜﻦ أن ﻳﺰﻳﺪ ﻓﺮص ﺗﻮﺳﻊ أﻓﻖ اﳌﻨﺎﻫﺞ اﳉﺎﻣﻌﻴﺔ؛‬
‫ﻟﻜﻮن ﻫﺬﻩ اﻷﻧﻈﻤﺔ ﺗﺴﺘﻠﺰم اﳌﻜﻮﻧﺎت اﻷﺳﺎﺳﻴﺔ ﻣﺜﻞ اﻟﻜﻴﺎن اﻟﺼﻠﺐ‪ ،‬واﻟﺒﻴﺌﺔ اﻟﱪﳎﻴﺔ‪ ،‬واﻟﱵ ﺗﺮﺗﺒﻂ ﺑﻌﻨﺎﺻﺮ ﻣﺘﻌﺪدة )ﻣﻴﻜﺎﻧﻴﻜﻴﺔ‪ ،‬ﻛﻬﺮﺑﺎﺋﻴﺔ‪،‬‬
‫ﻛﻴﻤﻴﺎﺋﻴﺔ(‪ ،‬وﺑﺎﻟﺘﺎﱄ ﻓﺈن ﺗﻌﻠﻴﻢ اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ ﻳﻌﺘﱪ ﻣﺜﺎﻻً ﳕﻮذﺟﻴﺎً ﻟﻨﻄﺎق دراﺳﺔ ﺗﺘﻄﻠﺐ ﻋﻤﻘﺎً ودﻗﺔً ﺑﻨﻔﺲ اﻟﻮﻗﺖ اﻟﺬي ﻳﺘﻄﻠﺐ اﺗﺴﺎﻋﺎً‬
‫داﺋﻤﺎً؛ ﻟﺘﺤﻘﻴﻖ اﻧﺒﻌﺎث اﻟﻘﻮة اﻟﻌﺎﻣﻠﺔ اﳌﺘﺠﺪدة‪ ،‬وﻣﺘﻄﻠﺒﺎت اﻟﺘﻌﻠﻴﻢ ﻟﻠﺼﻨﺎﻋﺔ اﻟﻌﺎﳌﻴﺔ]‪ ،[24,25‬وﺑﺎﻟﺘﺎﱄ ﻓﺈن ﻋﻠﻰ اﻟﺘﻌﻠﻴﻢ اﳍﻨﺪﺳﻲ أن ﻳﺘﻨﺒﺄ وﻳﻘﻮد‬
‫اﲡﺎﻩ اﻟﺘﻐﲑ اﻟﺮﺋﻴﺴﻲ ﻟﻠﺘﻜﻨﻮﻟﻮﺟﻴﺎ اﳌﺴﺘﻘﺒﻠﻴﺔ‪ ،‬وذﻟﻚ ﻣﻦ ﺧﻼل ﺗﻘﺪﱘ ﻋﺪة ﻣﻘﺮرات دراﺳﻴﺔ ﻣﻜﺜﻔﺔ ﺗﺮﺗﺒﻂ ﻣﺒﺎﺷﺮةً ﺑﺎﻟﺘﻄﺒﻴﻖ اﻟﻌﻤﻠﻲ‪ ،‬ﻋﻮﺿﺎً ﻋﻦ‬
‫ﺳﻠﺴﻠﺔ ﻣﻄﻮﻟﺔ ﻣﻦ اﳌﻘﺮرات اﻷﻛﺎدﳝﻴﺔ اﻟﺒﺤﺘﺔ اﻟﱵ ﻳﻌﻤﻞ ﺑﺎ ﰲ ﻣﻨﺎﻫﺞ اﻟﻌﺪﻳﺪ ﻣﻦ اﳉﺎﻣﻌﺎت ﰲ اﻟﺸﺮق اﻷوﺳﻂ!‬

‫إن ﻣﻨﺎﻫﺞ ﺗﺼﻤﻴﻢ اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ ﳝﻜﻦ أن ﺗﺘﻮاﺟﺪ ﰲ ﺑﺮاﻣﺞ اﻟﺘﻌﻠﻴﻢ اﳉﺎﻣﻌﻴﺔ ﰲ اﳍﻨﺪﺳﺔ اﻟﻜﻬﺮﺑﺎﺋﻴﺔ واﻹﻟﻜﱰوﻧﻴﺔ]‪ ،[26-30‬وﰲ ﻫﻨﺪﺳﺔ‬
‫اﳊﻮاﺳﺐ واﳍﻨﺪﺳﺔ اﳌﻌﻠﻮﻣﺎﺗﻴﺔ]‪ .[31-36‬ﻓﻴﻤﺎ ﺑﲔ ﻫﺬﻩ اﻻﺧﺘﺼﺎﺻﺎت‪ ،‬ﻓﺈﻧﻪ رﲟﺎ ﻳﻮﺟﺪ ﺗﻔﺎوت ﰲ اﻟﱰﻛﻴﺰ ﻋﻠﻰ ﻣﻮﺿﻮﻋﺎت اﻟﻜﻴﺎن اﻟﺼﻠﺐ‬
‫ﻣﻘﺎﺑﻞ اﳌﻮﺿﻮﻋﺎت اﻟﱪﳎﻴﺔ‪ ،‬وﻟﻜﻦ ﻋﻤﻮﻣﺎً‪ ،‬ﻓﺈن ﲨﻴﻊ ﻫﺬﻩ اﻻﺧﺘﺼﺎﺻﺎت ﳍﺎ ﻗﻮاﺳﻢ ﻣﺸﱰﻛﺔ ﻋﺪﻳﺪة‪ .‬أﻳﻀﺎً‪ ،‬وﳑﺎ ﻻ ﺷﻚ ﻓﻴﻪ أﻧﻪ ﻻ ﻳﻮﺟﺪ‬
‫ﺗﻘﺼﲑ ﰲ ﻣﺴﺎﻋﻲ اﳉﺎﻣﻌﺎت اﻟﻐﺮﺑﻴﺔ ﻟﺘﻀﻤﲔ ﻣﻘﺮرات ﺗﺼﻤﻴﻢ اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ ﰲ ﻣﻨﺎﻫﺠﻬﺎ اﻟﺪراﺳﻴﺔ]‪ ،[37-42‬ﻏﲑ أن اﻟﻌﺪﻳﺪ ﻣﻦ ﻫﺬﻩ اﳉﻬﻮد‬

‫‪7‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Embedded Systems‬‬ ‫اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ |‬

‫اﳌﺬﻛﻮرة ﺗﺮﻛﺰ ﻋﻠﻰ ﳎﻤﻮﻋﺔ ﺛﺎﻧﻮﻳﺔ ﻣﻦ اﻋﺘﺒﺎرات ﺗﺼﻤﻴﻢ اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ ﺑﺪﻻً ﻣﻦ اﳌﻨﺎﻫﺞ اﳌﻜﺜﻔﺔ‪ .‬ﻣﺎ ﳓﺘﺎج إﻟﻴﻪ ﺣﻘﻴﻘﺔ ﻫﻮ اﻻﺳﺘﻔﺎدة ﻣﻦ‬
‫ﻫﺬﻩ اﳌﻨﺎﻫﺞ واﳉﻬﻮد وﺗﻮﻇﻴﻔﻬﺎ وﺗﻄﻮﻳﺮﻫﺎ‪.‬‬

‫ﺣﺎﻟﻴﺎً وﺑﺎﻟﺘﻌﺎون اﳌﺸﱰك ﺑﲔ اﳌﻨﻈﻤﺘﲔ اﻟﻌﺎﳌﻴﺘﲔ ‪ IEEE/ACM‬ﻳﻮﺟﺪ ورﻗﺔ ﲝﺜﻴﺔ ﺻﺎدرة ﻋﻨﻬﻤﺎ ﺗﺸﺮح إﺻﻼﺣﺎً ﺟﺬرﻳﺎً ﻗﺎﺋﻤﺎً ﻋﻠﻰ ﳕﻮذج‬
‫ﻋﺎﳌﻲ ﳌﻨﻬﺞ دراﺳﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻌﻨﺎﺻﺮ اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ وﻓﺮوﻋﻬﺎ‪ ،‬ﳝﻜﻦ اﻻﺳﺘﻔﺎدة ﻣﻨﻬﺎ ﰲ اﳌﺮﺟﻊ]‪.[43‬‬

‫اﻟﺘﻌﻠﻴﻢ اﻟﻤﺨﺒﺮي ﻟﻸﻧﻈﻤﺔ اﻟﻤﺪﻣﺠﺔ )‪:(Embedded systems Laboratory Education‬‬ ‫‪7-1‬‬

‫إن اﻟﺘﻌﻠﻴﻢ اﳍﻨﺪﺳﻲ اﳌﺨﱪي ﳝﺜﻞ اﳌﺮﺣﻠﺔ اﳌﺒﻜﺮة ﻟﺒﻨﺎء اﳋﱪة اﻟﻌﻤﻠﻴﺔ اﳍﻨﺪﺳﻴﺔ اﻟﺼﻨﺎﻋﻴﺔ‪ ،‬ﻛﻤﺎ أن اﻟﻐﺮض اﻷﺳﺎﺳﻲ ﻣﻦ أي ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻫﻮ‬
‫ﲢﻘﻴﻖ أﻫﺪاف اﻟﺘﻌﻠﻴﻢ اﳍﻨﺪﺳﻲ ﻣﻦ ﺧﻼل ﺗﻘﻠﻴﺺ اﻟﻔﺠﻮة اﳌﻌﺮﻓﻴﺔ ﺑﲔ اﻟﺒﻴﺌﺔ اﻟﺘﻜﻨﻮﻟﻮﺟﻴﺔ اﻟﺼﻨﺎﻋﻴﺔ واﻟﺒﻴﺌﺔ اﻟﺘﻌﻠﻴﻤﻴﺔ‪ ،‬وﳑﺎ أُﲨﻊ ﻋﻠﻴﻪ ﰲ اﻟﻔﺮوع‬
‫اﻟﻌﻠﻤﻴﺔ واﳍﻨﺪﺳﻴﺔ‪ ،‬أن أﻫﻢ أﻫﺪاف اﳌﺨﺘﱪات اﻟﺘﻄﺒﻴﻘﻴﺔ ﻣﺴﺎﻋﺪة اﻟﻄﻼب ﰲ ﺑﻨﺎء اﳌﻌﺮﻓﺔ اﳉﺪﻳﺪة واﳌﺮﺗﺒﻄﺔ ﺑﺎﳌﻔﻬﻮم اﻟﺘﻄﺒﻴﻘﻲ اﻟﺘﺼﻮري‬
‫ﻟﻠﻔﻜﺮة‪ .‬ﺗﺆﻛﺪ اﻷﲝﺎث ﺑﺸﻜﻞ ﻣﺴﺘﻤﺮ ﻋﻠﻰ أن اﻟﺘﻌﻠﻴﻢ اﳌﺨﱪي ﻫﻮ اﳉﺰء اﻷﻫﻢ ﰲ اﻟﻌﻤﻠﻴﺔ اﻟﺘﻌﻠﻴﻤﻴﺔ ﰲ ﻓﺮوع اﳍﻨﺪﺳﺔ واﻟﻌﻠﻮم اﻟﺘﻄﺒﻴﻘﻴﺔ‪،‬‬
‫ﺣﻴﺚ أﻧﻪ ﻳﻠﻌﺐ اﻟﺪور اﻷﺳﺎﺳﻲ ﰲ رﺑﻂ اﻷﺳﺲ اﻟﻨﻈﺮﻳﺔ ﺘﻄﺒﻴﻘﺎﻬﺗﺎ اﻟﻌﻤﻠﻴﺔ‪ ،‬وﺑﺎﻟﺘﺎﱄ ﺗﻘﻠﻴﺺ اﻟﻔﺠﻮة ﺑﲔ اﻟﺘﻜﻨﻮﻟﻮﺟﻴﺎ اﳌﺴﺘﺨﺪﻣﺔ ﰲ اﻟﻮاﻗﻊ‬
‫اﻟﻌﻤﻠﻲ )اﻟﺼﻨﺎﻋﺔ(‪ ،‬وﺑﲔ اﻟﻌﻠﻮم اﻷﻛﺎدﳝﻴﺔ )اﳉﺎﻣﻌﺔ(‪.‬‬

‫إن أﳘﻴﺔ اﻟﺘﻌﻠﻴﻢ اﳌﺨﱪي ﰲ اﻟﻌﻠﻮم اﳍﻨﺪﺳﻴﺔ وﻓﺮوﻋﻬﺎ‪ ،‬ودورﻩ ﰲ ﺗﻌﻤﻴﻖ اﻟﻔﻬﻢ ﻟﻠﻔﻜﺮة اﻟﻨﻈﺮﻳﺔ‪ ،‬وﲢﻮﻳﻠﻬﺎ ﻣﻦ اﳌﻔﻬﻮم اﻟﺘﺠﺮﻳﺪي إﱃ اﳌﻔﻬﻮم‬
‫اﻟﺘﻄﺒﻴﻘﻲ اﳌﻠﻤﻮس‪ ،‬ﰎ اﻟﺘﺄﻛﻴﺪ ﻋﻠﻰ أﳘﻴﺘﻪ ﺗﻘﺮﻳﺒﺎً ﰲ ﻛﻞ ورﻗﺔ ﲝﺜﻴﺔ ﺗﻌﲎ ﺑﺎﻟﺘﻌﻠﻴﻢ اﳌﺨﱪي]‪.[44-51‬‬

‫إن ﻣﺴﺄﻟﺔ ﺗﻌﻠﻴﻢ ﺗﺼﻤﻴﻢ وﺑﺮﳎﺔ اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ ﺗﺘﻄﻠﺐ ﺑﺸﻜﻞ ﻛﺒﲑ ﺟﺪاً ﻋﻨﺎﺻﺮ وأدوات ﻋﻤﻠﻴﺔ ﺗﻄﺒﻴﻘﻴﺔ ﺗﺮﺗﺒﻂ ﻣﺒﺎﺷﺮة ﻣﻊ ﻣﻀﻤﻮن اﶈﺘﻮى‬
‫اﻟﺘﻌﻠﻴﻤﻲ اﻟﻨﻈﺮي؛ إن اﳌﻮاد اﻟﺘﻌﻠﻴﻤﻴﺔ واﶈﺎﺿﺮات اﻟﻨﻈﺮﻳﺔ ﻫﻲ اﳋﻄﻮة اﻷوﱃ ﻟﻼﻧﻄﻼق ﰲ ﻫﺬا اﳊﻘﻞ اﻟﺘﻌﻠﻴﻤﻲ وﺗﻄﻮﻳﺮﻩ‪ ،‬وﻟﻜﻦ ﺑﺪون ارﺗﺒﺎط‬
‫ﺗﻠﻚ اﳌﻮارد اﻟﺘﻌﻠﻴﻤﻴﺔ اﻷﻛﺎدﳝﻴﺔ ﺑﺎﻟﺘﺠﺎرب اﻟﻌﻤﻠﻴﺔ اﻟﺘﻄﺒﻴﻘﻴﺔ‪ ،‬ﻓﺈن اﳌﻬﺎرات اﳌﻜﺘﺴﺒﺔ ﻣﻦ ﻋﻤﻠﻴﺔ ﺗﻌﻠﻴﻢ ﺗﺼﻤﻴﻢ وﺑﺮﳎﺔ اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ ‪-‬‬
‫ﻛﻤﺤﺎﺿﺮات ﻧﻈﺮﻳﺔ ﺑﺪون اﳉﻠﺴﺎت اﻟﻌﻤﻠﻴﺔ اﳌﺨﱪﻳﺔ‪ -‬ﺳﺘﻜﻮن ﺑﻌﻴﺪة ﺟﺪاً ﻋﻦ اﳌﻀﻤﻮن اﻟﻮاﻗﻌﻲ اﻟﺘﻄﺒﻴﻘﻲ ﰲ اﻟﻌﺎﱂ اﳋﺎرﺟﻲ )اﻟﺼﻨﺎﻋﺔ(‪ ،‬وإن‬
‫ﻫﺬا ﻳﻌﻮد إﱃ ﻛﻮن اﳊﻘﻞ اﻟﺘﻌﻠﻴﻤﻲ واﻟﺘﻄﺒﻴﻘﻲ ﻟﻸﻧﻈﻤﺔ اﳌﺪﳎﺔ ذو ﻃﺒﻴﻌﺔ ﻣﺘﻌﺪدة اﻻﺧﺘﺼﺎﺻﺎت واﻟﺘﻔﺮﻋﺎت‪.‬‬

‫ﰲ اﳊﻘﻴﻘﺔ ﺗﻌﺘﱪ اﳌﺨﺘﱪات اﻟﻌﻤﻠﻴﺔ اﻟﺘﻄﺒﻴﻘﻴﺔ اﻟﱵ ﲤﺎرس وﻓﻖ ﻣﻨﻬﺞ ﻳﺴﻤﻰ ﺑـ "‪ – "Hands-on‬اﺳﱰاﺗﻴﺠﻴﺔ ﺗﺘﻄﻠﺐ اﳌﺸﺎرﻛﺔ اﻟﻔﻌﺎﻟﺔ ﻟﻠﻤﺘﻌﻠﻢ‬
‫ﰲ ﺗﻨﻔﻴﺬ اﻟﺘﺠﺮﺑﺔ ﺑﺸﻜﻞ ﻣﺴﺘﻘﻞ ﻛﻠﻴﺎً‪ ،‬وﺗﺴﺘﻠﺰم ﻮﻧﻪ ﻋﻠﻰ اﺗﺼﺎل ﻣﺒﺎﺷﺮ ﻣﻊ ﻣﺎدة اﻟﺘﺠﺮﺑﺔ وأدواﻬﺗﺎ )وﳝﻜﻦ اﻹﺷﺎرة إﻟﻴﻬﺎ ﻋﻠﻰ أ�ﺎ ﻣﻨﻬﺠﻴﺔ‬
‫ﺗﻄﻮﻳﺮ ذاﰐ ﰲ اﳌﺨﺘﱪات اﻟﻌﻤﻠﻴﺔ اﻟﺘﻄﺒﻴﻘﻴﺔ( – اﻟﺸﻜﻞ اﻷﻗﺪم واﻷﻛﺜﺮ اﻧﺘﺸﺎراً ﻟﻠﺘﻌﻠﻴﻢ اﳌﺨﱪي‪ ،‬وﻳﺸﲑ اﻟﺒﺎﺣﺚ ‪ Feisel‬ﺧﻼل ﲝﺜﻪ إﱃ أن‬
‫ﻗﺮون ٍ‬
‫ﺛﻼث‬ ‫اﳌﺨﺘﱪات اﻟﱵ ﺗﻌﲎ ﺑﺎﳌﻤﺎرﺳﺔ اﻟﻌﻤﻠﻴﺔ اﻟﺘﻄﺒﻴﻘﻴﺔ اﳌﺒﺎﺷﺮة ﻫﻲ اﳌﻜﺎن اﻷول واﻟﻮﺣﻴﺪ اﻟﺬي اﻧﻄﻠﻖ ﻣﻨﻪ اﻟﺘﻌﻠﻴﻢ اﳍﻨﺪﺳﻲ ﺧﻼل ٍ‬
‫ﻣﻀﺖ]‪.[47‬‬

‫ﺗﺸﲑ اﻟﺪراﺳﺎت اﻻﺳﺘﻘﺼﺎﺋﻴﺔ إﱃ أن ‪ 100%‬ﻣﻦ اﻷوراق اﻟﺒﺤﺜﻴﺔ اﳌﺘﻌﻠﻘﺔ ﺑﺎﳌﺨﺘﱪات اﻟﺘﻄﺒﻴﻘﻴﺔ اﻟﻌﻤﻠﻴﺔ ﺗﺆﻛﺪ ﻋﻠﻰ أن اﳉﻠﺴﺎت اﳌﺨﱪﻳﺔ ﳚﺐ‬
‫أن ﺗﻜﻮن ﺗﻄﺒﻴﻘﻴﺔ ﻋﻤﻠﻴﺔ ﻣﺴﺘﻨﺪة إﱃ أدوات ﺗﺴﺎﻋﺪ ﰲ ﺗﺴﻬﻴﻞ وﺗﻌﺰﻳﺰ اﻟﻔﻬﻢ اﻟﺘﺼﻮري اﻟﻮاﻗﻌﻲ ﻟﺪى اﻟﻄﻼب‪ ،‬ﻛﻤﺎ أن ‪ 65%‬ﻣﻦ اﻟﺪراﺳﺎت‬
‫ﺗﺆﻛﺪ ﻋﻠﻰ أن اﳉﻠﺴﺎت اﳌﺨﱪﻳﺔ ﳚﺐ أن ﺗﺮﻋﻰ ﻟﻴﺲ ﻓﻘﻂ ﻣﻬﺎرات اﻟﺘﻄﺒﻴﻖ واﻟﺘﺸﻐﻴﻞ وإﳕﺎ ﻣﻬﺎرات اﻟﺘﺼﻤﻴﻢ أﻳﻀﺎً]‪.[49‬‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪8‬‬
‫‪21‬‬ ‫‪Chapter 1‬‬ ‫اﻟﻔﺼﻞ اﻷول |‬

‫ﻋﻠﻰ اﻟﺮﻏﻢ ﻣﻦ اﻷﳘﻴﺔ اﳊﺘﻤﻴﺔ ﻟﻠﺘﻌﻠﻴﻢ اﳌﺨﱪي ﻓﺈن اﻟﻌﺪﻳﺪ ﻣﻦ اﳌﺆﺳﺴﺎت اﻟﺘﻌﻠﻴﻤﻴﺔ ﻗﺎﻣﺖ ﻋﻠﻰ اﺳﺘﺒﺪال اﳌﺨﺘﱪات اﻟﺘﻄﺒﻴﻘﻴﺔ اﻟﻌﻤﻠﻴﺔ‬
‫ﲟﺨﺘﱪات اﻓﱰاﺿﻴﺔ )‪ (Virtual Labs‬ﺗﻌﺘﻤﺪ ﻋﻠﻰ اﶈﺎﻛﺎة )‪ (Simulation‬ﻋﻮﺿﺎً ﻋﻦ اﻟﺘﻄﺒﻴﻖ اﻟﻌﻤﻠﻲ‪ ،‬ذﻟﻚ ﻬﺑﺪف ﲣﻔﻴﺾ اﳌﻴﺰاﻧﻴﺔ ﲢﺖ‬
‫وﻃﺄة اﻟﻀﻐﻮط واﳊﺎﺟﺎت اﳌﺎدﻳﺔ]‪.[48-52‬‬

‫ﻣﻨﺤﻨﻲ اﻟﺘﻌﻠﻢ ﻟﻸﻧﻈﻤﺔ اﻟﻤﺪﻣﺠﺔ )‪:(Embedded systems Learning Curve‬‬ ‫‪8-1‬‬

‫إن ﻣﻨﺤﲏ اﻟﺘﻌﻠﻢ ﳝﺜﻞ اﻟﻌﻼﻗﺔ ﺑﲔ اﳉﻬﺪ واﻟﻮﻗﺖ اﳌﺒﺬوﻟﲔ ﻟﺘﺤﻘﻴﻖ ﻓﻬﻢ ﻣﻮﺿﻮع ﻣﺎ‪ ،‬ﻓﺈذا ﻛﺎﻧﺖ ﻋﻤﻠﻴﺔ اﻟﺘﻌﻠﻢ ﺗﺴﺘﻐﺮق وﻗﺘًﺎ ﻃﻮﻳﻼً وﺟﻬﺪاً‬
‫ﻣﻀﻨﻴﺎً؛ ﻓﺈن ﻣﻨﺤﲏ اﻟﺘﻌﻠﻢ ﻳﺴﻤﻰ "‪ ،"Steep Learning Curve‬اﻟﺸﻜﻞ‪ .4-1‬أﻣﺎ إذا ﻛﺎﻧﺖ ﻋﻤﻠﻴﺔ اﻟﺘﻌﻠﻢ ﲢﺼﻞ ﻋﻨﺪ أﻗﻞ وﻗﺖ وﺟﻬﺪ؛‬
‫ﻓﺈن ﻣﻨﺤﲏ اﻟﺘﻌﻠﻢ ﻳﺴﻤﻰ "‪ ،"Shallow Learning Curve‬اﻟﺸﻜﻞ‪.5-1‬‬

‫اﻟﺸﻜﻞ ‪Shallow Learning Curve 5-1‬‬ ‫اﻟﺸﻜﻞ ‪Steep Learning Curve 4-1‬‬

‫ﳑﺎ ﻻ ﺷﻚ ﻓﻴﻪ أن ﻋﻤﻠﻴﺔ ﺗﺼﻤﻴﻢ وﺗﻄﻮﻳﺮ اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ ﲣﺘﻠﻒ ﻋﻦ ﻣﺴﺎﺋﻞ ﺗﺼﻤﻴﻢ اﻷﻧﻈﻤﺔ اﻟﺘﻘﻠﻴﺪﻳﺔ ﰲ أﻣﻮر ﻛﺜﲑة‪ .‬إن ﻣﺴﺄﻟﺔ ﺗﻌﻠﻢ‬
‫ﺗﺼﻤﻴﻢ وﺗﻄﻮﻳﺮ اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ ﲢﺎج إﱃ اﻟﻌﺪﻳﺪ ﻣﻦ اﳌﺴﺎﺋﻞ اﻷوﻟﻴﺔ اﻟﻀﺮورﻳﺔ )ﻣﺜﻼً‪ :‬ﺗﺼﻤﻴﻢ اﻟﺪارات اﻟﺮﻗﻤﻴﺔ واﻟﺘﺸﺎﻬﺑﻴﺔ(‪ ،‬وذﻟﻚ ﻟﻜﻮن‬
‫اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ ﰲ اﻟﻐﺎﻟﺐ ﻣﺮﺗﺒﻄﺔ إﱃ ﻋﻨﺎﺻﺮ ﺧﺎرﺟﻴﺔ ﻣﺜﻞ‪ :‬ﺣﺴﺎﺳﺎت‪ ،‬ﳏﺮﻛﺎت‪ ،‬ﻣﻔﺎﺗﻴﺢ‪ ...،‬وﻫﺬﻩ اﻟﻌﻨﺎﺻﺮ ﲢﺘﺎج إﱃ دارات ﳏﻴﻄﻴﺔ‬
‫وﺳﻴﻄﻴﺔ ﻻ ﻋﻼﻗﺔ ﳍﺎ ﺑﺎﻟﻘﺮﻳﺐ ﻣﻦ اﳌﻮﺿﻮﻋﺎت اﻷﺳﺎﺳﻴﺔ ﰲ ﺗﺼﻤﻴﻢ اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ‪ ،‬أﺿﻒ إﱃ ذﻟﻚ اﻷﻣﻮر اﻷﺧﺮى اﳌﺘﻔﺮﻋﺔ ﻋﻦ اﻷﻧﻈﻤﺔ‬
‫اﳌﺪﳎﺔ واﻋﺘﺒﺎرات ﺗﺼﻤﻴﻤﻬﺎ ﻣﺜﻞ‪ :‬اﺧﺘﺒﺎرات ﺗﺘﺒﻊ اﻷﺧﻄﺎء ﺑﺪون وﺟﻮد ﺷﺎﺷﺔ إﻇﻬﺎر ﻣﺮﺋﻴﺔ ‪ -‬ﻛﻤﺎ ﻫﻮ اﳊﺎل ﰲ ﻟﻐﺎت اﻟﱪﳎﺔ اﻟﻌﺎﻣﺔ ‪ -‬ﻛﻤﺎ‬
‫أن ﻟﻐﺎت ﺗﺼﻤﻴﻢ اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ ﺗﻌﺘﱪ ﻣﻦ اﻟﻠﻐﺎت اﻟﱵ ﲤﻠﻚ اﻟﻜﺜﲑ ﻣﻦ اﻟﺘﻌﻘﻴﺪات]‪ .[53‬ﻛﻞ ذﻟﻚ ﳛﺘﺎج إﱃ ﻣﻌﺮﻓﺔ وﻓﻬﻢ ﻣﻦ ﻗﺒﻞ اﳌﺘﻌﻠﻢ‪،‬‬
‫وﻫﺬا ﺑﺪورﻩ ﳛﺘﺎج إﱃ ﺟﻬﻮد ﻛﺒﲑة ووﻗﺖ ﻃﻮﻳﻞ ﻳﺒﺬﻻن ﰲ ﻣﺮﺣﻠﺔ اﻟﺘﻌﻠﻴﻢ؛ وﺑﺎﻟﺘﺎﱄ ﻓﺈن اﳋﱪاء ﻳﺸﲑون إﱃ أن ﻣﻨﺤﲏ اﻟﺘﻌﻠﻢ ﻟﻸﻧﻈﻤﺔ اﳌﺪﳎﺔ‬
‫ﻫﻮ ﻣﻦ اﻟﻨﻮع "‪."Steep‬‬

‫إن ﻋﻤﻠﻴﺔ ﺑﻨﺎء أي ﻣﻨﻬﺞ ﺗﻌﻠﻴﻤﻲ ﻳﺴﺘﻨﺪ ﰲ اﻟﻐﺎﻟﺐ إﱃ ﺧﻄﺔ زﻣﻨﻴﺔ ﻟﺘﺪرﻳﺲ ﻫﺬا اﳌﻨﻬﺞ‪ ،‬ﻛﻤﺎ أن اﳌﻨﻬﺞ ﳚﺐ أن ﻳﺮاﻋﻲ ﺗﻐﻄﻴﺔ اﳌﻮﺿﻮﻋﺎت‬
‫اﻷﺳﺎﺳﻴﺔ ﺿﻤﻦ اﳋﻄﺔ زﻣﻨﻴﺔ‪ .‬ﰲ اﻟﻮاﻗﻊ وﻃﺒﻘﺎً ﳌﺎ ﺗﻘﺪم ﻣﻦ ﻛﻮن اﻟﻨﻈﻢ اﳌﺪﳎﺔ ذات ﺗﻔﺮﻋﺎت ﻛﺜﲑة وﻣﺘﻌﺪدة‪ ،‬وﲢﺘﺎج إﱃ أﻣﻮر أﺧﺮى ﻣﺮﺗﺒﻄﺔ‬
‫إﺿﺎﻓﺔ إﱃ اﻟﺘﻌﻘﻴﺪات اﳌﺘﻌﻠﻘﺔ ﺑﺒﻴﺌﺎت اﻟﺘﻄﻮﻳﺮ‪ ،‬ﻓﺈن ﻋﻤﻠﻴﺔ ﺑﻨﺎء ﻣﻨﻬﺞ ﺗﻌﻠﻴﻤﻲ ﻣﻜﺜﻒ ﻟﻠﻨﻈﻢ اﳌﺪﳎﺔ ﲢﺘﺎج إﱃ ﲝﺚ ﻛﺒﲑ ووﻗﺖ وﺟﻬﺪ‪.‬‬

‫‪9‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Embedded Systems‬‬ ‫اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ |‬

‫ﺗﺤﺪﻳﺎت ﺗﻌﻠﻴﻢ اﻷﻧﻈﻤﺔ اﻟﻤﺪﻣﺠﺔ )‪:(Embedded Systems Education Challenges‬‬ ‫‪9-1‬‬

‫إن اﻟﻌﻮﳌﺔ اﻟﺼﻨﺎﻋﻴﺔ واﻟﻘﺪرة اﻟﺘﻨﺎﻓﺴﻴﺔ أﺻﺒﺤﺖ ﳑﻜﻨﺔ اﻵن ﺑﻔﻀﻞ ﻣﻨﺘﺠﺎت اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ‪ ،‬وﻫﺬا ﳚﻌﻠﻬﺎ أﻛﺜﺮ أﳘﻴﺔ ﻣﻦ أي وﻗﺖ ﻣﻀﻰ‬
‫ﻟﻸﻧﻈﻤﺔ اﻟﺘﻌﻠﻴﻤﻴﺔ‪ ،‬وذﻟﻚ ﺑﺪف ﺗﻮﻓﲑ ﳎﺘﻤﻊ ﻣﻦ اﳌﻬﻨﺪﺳﲔ اﳌﺆﻫﻠﲔ واﳌﺨﺘﺼﲔ ﰲ ﳎﺎل اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ‪ ،‬ﺑﻴﺪ أن إﳒﺎز ﻫﺬﻩ اﳌﻬﻤﺔ ﻟﻴﺲ‬
‫ﺑﺎﻷﻣﺮ اﻟﺴﻬﻞ‪.‬‬

‫إن ﺗﻜﻨﻮﻟﻮﺟﻴﺎ وﻣﻨﺘﺠﺎت اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ ﺗﺘﻄﻮر ﺑﺸﻜﻞ ﻣﺘﺴﺎرع‪ ،‬ﻛﻤﺎ أن اﳋﺪﻣﺎت اﻟﱵ ﺗﻘﺪﻣﻬﺎ اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ ﺗﺘﻄﻮر ﺗﺪرﳚﻴﺎً ﻟﺘﺸﻤﻞ‬
‫وﻇﺎﺋﻒ ﻣﺘﻘﺪﻣﺔ وﻣﺴﺘﻘﻠﺔ‪ ،‬وﻣﻊ اﺗﺴﺎع ﻧﻄﺎق اﳌﻨﺘﺠﺎت ﻣﻦ أﻧﻈﻤﺔ اﻟﻘﻴﺎس اﳌﺴﺘﻘﻠﺔ‪ ،‬وأﻧﻈﻤﺔ اﻟﺘﺤﻜﻢ اﻟﺬﻛﻴﺔ‪ ،‬إﱃ اﻷﻧﻈﻤﺔ اﳌﻮزﻋﺔ واﳌﱰاﺑﻄﺔ‬
‫ﻣﻊ أﺟﻬﺰة أﺧﺮى ﻣﻦ ﺧﻼل وﺻﻼت ﺳﻠﻜﻴﺔ أو ﻻ ﺳﻠﻜﻴﺔ‪ ،‬ﻓﺈن اﳌﻨﺘﺠﺎت اﻟﻨﺎﲡﺔ أﺻﺒﺤﺖ أﻛﺜﺮ ﺗﻌﻘﻴﺪاً‪ .‬إن ﻫﺬا اﻟﺘﻌﻘﻴﺪ اﳌﺘﺰاﻳﺪ ﰲ اﻷﻧﻈﻤﺔ‬
‫اﳌﺪﳎﺔ ﻳﺘﻄﻠﺐ ﺑﺪورﻩ ﺗﺒﲏ ﻣﻨﺎﻫﺞ ﺗﻌﻠﻴﻤﻴﺔ ﻫﻨﺪﺳﻴﺔ ﻣﺘﺠﺪدة ﻣﻦ أﺟﻞ ﺗﻄﻮﻳﺮ ﻧﺎﺟﺢ‪ ،‬وﺑﺴﺒﺐ اﻻﺳﺘﺤﺪاث اﳌﺘﺠﺪد ﻧﺴﺒﻴﺎً ﻟﻸﻧﻈﻤﺔ اﳌﺪﳎﺔ؛‬
‫ﻓﺈﻧﻪ ﻻ ﻳﻮﺟﺪ ﻋﻠﻮم ﻣﻘﺮرة )ﻣﺆﺳﺴﺔ وﻣﻌﺘﻤﺪة( أو ﻃﺮق ﺗﺮﺑﻮﻳﺔ ﺗﻌﻠﻴﻤﻴﺔ ﻣﻮﺛﻘﺔ ﻟﺘﻌﻠﻴﻢ ﻫﻨﺪﺳﺔ اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ‪ ،‬ﻛﻤﺎ أن اﻟﺘﻨﻮع اﳌﺨﺘﻠﻒ ﻷﺻﻨﺎف‬
‫اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ‪ ،‬ووﺟﻮد ﻣﺘﻄﻠﺒﺎت ذات ﺻﻔﺎت ﻧﻮﻋﻴﺔ ﳐﺘﻠﻔﺔ‪ ،‬وأﺑﻌﺎد ﺗﺼﻤﻴﻤﻴﺔ ﻣﺘﻌﺪدة ذات ﻋﻮاﻣﻞ ﻣﺘﻐﲑة إﺿﺎﻓﺔً إﱃ اﻟﺘﻘﻨﻴﺎت اﳌﺨﺘﻠﻔﺔ‪،‬‬
‫ﻓﺈن ﻛﻞ ذﻟﻚ ﳚﻌﻞ ﻣﻦ اﻟﺼﻌﺐ ﺟﺪاً اﻟﻮﺻﻮل إﱃ ﺗﻌﺮﻳﻒ ﻣﻨﺎﺳﺐ ﻳﺴﺘﻄﻴﻊ أن ﳛﺪد ﻫﻮﻳﺔ واﺿﺤﺔ ﻟﻸﻧﻈﻤﺔ اﳌﺪﳎﺔ ﻹﳚﺎد ﻃﺮﻳﻘﺔ ﻣﺜﻠﻰ‬
‫ﻟﺘﺪرﻳﺴﻬﺎ]‪.[31‬‬

‫ﰲ ﻋﺎم ‪ 2005‬وﺿﻤﻦ ﺧﻄﺔ ورﺷﺔ ﻋﻤﻞ ﻟﻠﺘﻌﻠﻴﻢ اﳍﻨﺪﺳﻲ ﻟﻸﻧﻈﻤﺔ اﳌﺪﳎﺔ ﰲ ﻣﺪﻳﻨﺔ ﺟﲑﺳﻲ اﻷﻣﺮﻳﻜﻴﺔ‪ ،‬ﰎ اﻗﱰاح ﻣﻨﻬﺠﲔ أو ﻃﺮﻳﻘﲔ‬
‫أﺳﺎﺳﻴﲔ ﻟﺘﻄﻮﻳﺮ ﻣﻨﺎﻫﺞ ﻫﻨﺪﺳﺔ ﺗﻌﻠﻴﻢ اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ وﳘﺎ‪:‬‬

‫‪ -1‬اﳌﻨﻬﺞ اﻟﺘﺄﺳﻴﺴﻲ اﻟﻌﻠﻤﻲ )‪ :(Scientific foundation approach‬ﻫﺬا اﳌﻨﻬﺞ ﻳﻘﱰح ﺑﺄن اﻟﺘﻌﻠﻴﻢ ﻳﻄﻤﺢ إﱃ ﺑﻨﺎء اﳌﻌﺮﻓﺔ اﻟﻌﻠﻤﻴﺔ‬
‫اﳍﻨﺪﺳﻴﺔ ﳉﻮﻫﺮ اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ ﻣﺘﻀﻤﻨﺔً ﻣﺴﺎﺋﻞ ﺣﻮل اﻟﻨﻤﺎذج اﳊﺴﺎﺑﻴﺔ واﻟﺘﺤﻠﻴﻼت اﳌﻨﻬﺠﻴﺔ]‪.[54‬‬

‫‪ -2‬ﻣﻨﻬﺞ ﺗﻄﻮﻳﺮ اﳌﻨﺘﺞ )‪ :(Product development approach‬وﻓﻴﻪ ﳝﻠﻚ اﻟﺘﻌﻠﻴﻢ اﻟﻌﺪﻳﺪ ﻣﻦ اﻟﻌﻨﺎﺻﺮ واﳌﻘﻮﻣﺎت اﻟﱵ ﺗﻘﺎﺑﻞ ﺗﻄﻮﻳﺮ‬
‫ﻣﻨﺘﺞ ﺻﻨﺎﻋﻲ ﲟﺎ ﰲ ذﻟﻚ اﳌﺸﺎرﻳﻊ اﳌﻮﺟﻬﺔ وﻓﺮﻳﻖ اﻟﻌﻤﻞ وﺣﻞ ﻣﺸﺎﻛﻞ اﻟﻨﻤﺎذج اﻟﻮﻇﻴﻔﻴﺔ]‪.[55‬‬

‫ﺣﺼﻠﻬﺎ اﻟﻄﻼب ﻋﻠﻰ أﻓﻀﻞ وﺟﻪ ﻫﻲ ﺟﺰءٌ ﻣﻦ‬ ‫ﺑﻨﺎءً ﻋﻠﻴﻪ ﻓﺈن اﻟﻔﺮﺿﻴﺔ وراء اﳍﺪف ﻣﻦ اﳌﻨﻬﺞ ﻫﻲ أن اﳌﻬﺎرات واﳌﻌﺎرف اﳌﺘﺼﻠﺔ‪ ،‬واﻟﱵ ّ‬
‫ﻣﺸﺎرﻳﻊ اﻟﺘﻄﻮﻳﺮ واﻟﺘﻨﻤﻴﺔ اﳊﻘﻴﻘﻴﺔ؛ ﻫﺬﻩ اﻟﻔﺮﺿﻴﺔ ﻳﺴﺘﻨﺪ إﻟﻴﻬﺎ ﰲ اﻟﻌﺪﻳﺪ ﻣﻦ اﻷﲝﺎث اﳌﺘﻌﻠﻘﺔ ﺑﺎﻟﺘﻌﻠﻴﻢ اﻋﺘﻤﺎداً ﻋﻠﻰ اﺳﱰاﺗﻴﺠﻴﺔ ﺣﻞ‬
‫اﳌﺸﻜﻼت]‪ (Problem Based Learning) [56-58‬واﻟﱵ ﺳﻮف ﻧﻔﺼﻠﻬﺎ ﰲ اﻟﻔﺼﻞ اﳋﺎﻣﺲ‪.‬‬

‫وﻋﻠﻴﻪ‪ ،‬ﻳﺴﺘﻨﺘﺞ اﶈﻠﻠﻮن ﰲ ﳎﺎل اﻟﺘﻌﻠﻴﻢ ﺑﺄن ﻣﻮﺿﻮﻋﺎت اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ ذات ﻫﻮﻳﺔ ﻣﻮﺿﻮﻋﻴﺔ إﻧﺸﺎﺋﻴﺔ وﻇﻴﻔﻴﺔ‪ ،‬واﻟﺬي ﺑﺪورﻩ ﻳﻘﺘﻀﻲ أن‬
‫اﻟﻄﺮﻳﻘﺔ اﳌﺜﻠﻰ ﻟﺘﻌﻠﻴﻢ اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ ﻫﻲ ﻣﻦ ﺧﻼل رﺑﻂ ﻛﻞ ﻓﻜﺮة ﲟﺜﺎل ﻋﻤﻠﻲ ﰲ ﺑﻴﺌﺔ ﺗﻔﺎﻋﻠﻴﺔ واﻗﻌﻴﺔ‪.‬‬

‫‪ 10-1‬ﻧﺤﻮ ﺗﻄﻮﻳﺮ ﻣﻨﺎﻫﺞ ﻣﻌﺎﺻﺮة ﻟﻸﻧﻈﻤﺔ اﻟﻤﺪﻣﺠﺔ )‪:(Toward Modern E.Systems Curriculums‬‬
‫إن ﻋﻤﻠﻴﺔ ﺗﻄﻮﻳﺮ واﻧﺘﺸﺎر ﻣﻨﺎﻫﺞ اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ ﺗﻌﺘﱪ ﻣﻦ اﳌﻬﻤﺎت اﻟﺮﺋﻴﺴﻴﺔ ﰲ ﻛﺜﲑ ﻣﻦ اﳉﺎﻣﻌﺎت واﻟﺒﻠﺪان اﳌﺘﻄﻮرة]‪ [59‬واﻟﱵ ﻣﻨﻬﺎ‪ :‬اﻟﻮﻻﻳﺎت‬
‫اﳌﺘﺤﺪة]‪ ،[60‬أورﺑﺎ]‪ ،[61‬اﻟﺼﲔ]‪ ،[62‬ﺗﺎﻳﻮان]‪ ،[63‬ﻛﻮرﻳﺎ]‪ ،[64‬واﻟﻌﺪﻳﺪ ﻣﻦ اﻟﺪول اﻷﺧﺮى اﻟﱵ ﺗﺪرك ﲤﺎﻣﺎً أﳘﻴﺔ إﳚﺎد ﻣﻨﺎﻫﺞ ﻣﺘﺠﺪدة ﻟﺘﻌﻠﻴﻢ‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪10‬‬
‫‪21‬‬ ‫‪Chapter 1‬‬ ‫اﻟﻔﺼﻞ اﻷول |‬

‫ﻫﻨﺪﺳﺔ اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ؛ ﻛﻤﺎ أن اﻟﺪراﺳﺎت اﳌﺘﻌﻠﻘﺔ ﺑﺘﻄﻮﻳﺮ اﳌﻨﺎﻫﺞ ﻻ ﺗﻘﺘﺼﺮ ﻓﻘﻂ ﻋﻠﻰ أﲝﺎث ﻋﻠﻰ ﻣﺴﺘﻮى دوﻳﻼت‪ ،‬وإﳕﺎ ﺗﺴﻌﻰ اﻷﲝﺎث‬
‫ﺑﺪف اﻻﺳﺘﻔﺎدة ﻣﻦ اﻟﺘﺠﺎرب ﰲ ﻫﺬا اﳌﻴﺪان اﻟﺬي‬ ‫]‪[65-66‬‬
‫ﺑﺸﻜﻞ داﺋﻢ إﱃ دراﺳﺎت ﻣﻘﺎرﻧﺔ ﻟﻠﻤﻨﺎﻫﺞ اﳌﻘﺮرة ﰲ ﳐﺘﻠﻒ اﳉﺎﻣﻌﺎت اﻟﻌﺎﳌﻴﺔ‬
‫ﻳﺘﺴﺎﺑﻖ ﻓﻴﻪ اﳉﻤﻴﻊ‪.‬‬

‫إن ﻣﺴﺄﻟﺔ ﺗﻄﻮﻳﺮ اﳌﻨﺎﻫﺞ ﲢﺘﺎج إﱃ ﻓﺮﻳﻖ ﻣﺘﺨﺼﺺ ﻳﺒﺤﺚ ﰲ اﳌﻨﺎﻫﺞ اﻟﺪراﺳﻴﺔ ﺣﻮل اﳌﻮﺿﻮﻋﺎت اﻷﺳﺎﺳﻴﺔ ﰲ ﻫﻨﺪﺳﺔ اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ واﻟﱵ‬
‫ﻫﻲ‪ :‬ﺑﺮﳎﻴﺎت اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ )‪ ،(ES-SW‬اﻟﻜﻴﺎن اﻟﺼﻠﺐ ﻟﻸﻧﻈﻤﺔ اﳌﺪﳎﺔ )‪ ،(ES-HW‬ﻋﻠﻮم اﳊﺎﺳﺐ ) ‪CS: Computer‬‬

‫‪ ،(Science‬وﲨﻴﻊ ﻫﺬﻩ اﳌﻨﺎﻫﺞ ﰎ ﺗﻄﻮﻳﺮﻫﺎ ﻣﻦ ﻗﺒﻞ اﳍﻴﺌﺘﲔ ‪ ACM & IEEE-CE‬ﺑﺎﻹﺿﺎﻓﺔ إﱃ اﳉﺎﻣﻌﺎت واﻟﺪول اﻟﺮاﺋﺪة ﰲ ﻫﺬا‬
‫ﻤﻟﺎل]‪ ،[67-76‬ﻛﻤﺎ أﻧﻪ ﺑﺎﻹﺿﺎﻓﺔ إﱃ ﻛﻮن ﻫﺬﻩ اﳌﻨﺎﻫﺞ ﺗﺮاﻋﻲ اﻟﺘﻄﻮر اﻟﺘﻜﻨﻮﻟﻮﺟﻲ‪ ،‬ﻓﺈ�ﺎ أﻳﻀﺎً ﺗﺄﺧﺬ ﺑﻌﲔ اﻻﻋﺘﺒﺎر ﺣﺎﺟﺎت اﻟﺘﻄﻮﻳﺮ ﻟﻠﺼﻨﺎﻋﺔ‬
‫اﶈﻠﻴﺔ ﻣﺘﻄﻠﺒﺎﻬﺗﺎ‪.‬‬

‫إن ﻋﺪداً ﻛﺒﲑاً ﻦ اﳉﺎﻣﻌﺎت اﻟﱵ ﻗﺎﻣﺖ ﺑﺘﻄﻮﻳﺮ ﻣﻨﺎﻫﺞ ﻟﻠﻨﻈﻢ اﳌﺪﳎﺔ اﻋﺘﻤﺪت ﰲ ﻣﻘﺮراﻬﺗﺎ اﻟﺘﻤﻬﻴﺪﻳﺔ ﺗﺼﻤﻴﻢ وﺑﺮﳎﺔ اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ‬
‫ﺑﺎﺳﺘﺨﺪام اﳌﺘﺤﻜﻤﺎت اﳌﺼﻐﺮة ‪ ،8-bit‬ﺣﻴﺚ ﲤﻜﻦ اﻟﻄﻼب ﻣﻦ ﺗﻌﻠﻢ ﺑﺮﳎﺔ اﳌﺘﺤﻜﻤﺎت وﺑﻨﺎء اﻟﻜﻴﺎن اﻟﺼﻠﺐ ورﺑﻄﻪ ﻣﻊ اﻟﻌﺎﱂ اﳋﺎرﺟﻲ‬
‫ﻷﻏﺮاض اﻟﺘﺤﻜﻢ‪ .‬ﺑﻌﺾ اﳉﺎﻣﻌﺎت ﻻﺣﻈﺖ اﻻﺳﺘﺨﺪام اﳌﺘﺰاﻳﺪ ﳌﺘﺤﻜﻤﺎت ‪ 32-bit‬ﰲ ﺗﻄﺒﻴﻘﺎت اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ‪ ،‬واﻟﺬي ﻛﺎن ﺑﺪورﻩ‬
‫ﺣﺎﻓﺰاً ﻟﺘﻄﻮﻳﺮ ﻣﻨﺎﻫﺞ ﻣﻌﺎﺻﺮة ﻟﺘﻌﻠﻴﻢ ﺑﺮﳎﺔ وﺗﺼﻤﻴﻢ اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ ﺑﺎﺳﺘﺨﺪام ﻣﺘﺤﻜﻤﺎت ‪[77]32-bit‬ﺑﺎﻹﺿﺎﻓﺔ إﱃ اﻟﻌﺪﻳﺪ ﻣﻦ ﻣﻮﺿﻮﻋﺎت‬
‫ﲢﻠﻴﻞ وﺗﻄﻮﻳﺮ اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ اﳌﺘﻘﺪﻣﺔ]‪[78‬اﻟﱵ ﺗﺴﺘﺨﺪم اﳌﺼﻔﻮﻓﺎت اﳊﻘﻠﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ )‪ ،(FPGAs‬وﻣﻌﺎﳉﺎت اﻹﺷﺎرة اﻟﺮﻗﻤﻴﺔ‬
‫)‪.(DSPs‬‬

‫‪ 11-1‬ﻣﻨﺎﻗﺸﺔ )‪:(Discussion‬‬
‫إن اﻟﺘﺤﻠﻴﻞ ﻣﻦ وﺟﻬﺔ ﻧﻈﺮ ﺗﻌﻠﻴﻤﻴﺔ ﳝﻜﻦ أن ﻳﻠﺨﺺ ﻣﺎﻳﻠﻲ‪:‬‬

‫‪ -‬ﲤﻠﻚ اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ ﻃﺎﺑﻊ ﻣﻮﺿﻮﻋﻲ ﻣﺘﺠﺪد ﺧﻼﻓﺎً ﳌﻌﻈﻢ اﳌﻮاﺿﻴﻊ اﻷﻛﺎدﳝﻴﺔ اﻟﺘﻘﻠﻴﺪﻳﺔ واﻟﱵ ﳍﺎ ﻃﺎﺑﻊ ﳏﺪد وواﺿﺢ‪.‬‬
‫‪ -‬ﺗﻌﻠﻴﻢ اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ ﳚﺐ أن ﻳﺮﻛﺰ ﻋﻠﻰ اﻟﺴﻤﺎت اﻟﻮﻇﻴﻔﻴﺔ ﻋﻮﺿﺎً ﻋﻦ ﻛﻮﻧﻪ ﻗﺎﺋﻤﺎً ﻋﻠﻰ ﻃﺮق اﻟﺘﺪرﻳﺲ اﻟﺘﻘﻠﻴﺪﻳﺔ‪ ،‬ﻛﻤﺎ ﳚﺐ أن ﻳﺪرس‬
‫ﻣﻦ ﺧﻼل ﻃﺮح أﻣﺜﻠﺔ ﻣﺘﻌﺪدة ﻋﻮﺿﺎً ﻋﻦ اﻟﺘﻤﺜﻴﻞ اﳌﻮﺿﻮﻋﻲ اﻟﻌﺎم واﻟﺴﺎﺋﺪ ﰲ اﳌﻮﺿﻮﻋﺎت اﻷﻛﺎدﳝﻴﺔ اﻟﺘﻘﻠﻴﺪﻳﺔ‪.‬‬
‫‪ -‬ﻋﻤﻠﻴﺔ ﺗﻌﻠﻴﻢ اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ ﳚﺐ أن ﺗﺘﻢ ﰲ ﺑﻴﺌﺔ ﺗﻔﺎﻋﻠﻴﺔ ﺗﺸﺎرﻛﻴﺔ ﻋﻮﺿﺎً ﻋﻦ اﻟﻄﺮﻳﻘﺔ اﻷﻛﺎدﳝﻴﺔ اﻟﺘﻘﻠﻴﺪﻳﺔ اﻟﱵ ﺗﺴﺘﻌﺮض ﺑﺸﻜﻞ داﺋﻢ‬
‫وﺟﻬﺔ ﻧﻈﺮ اﳌﻌﻠﻢ ﻓﻘﻂ‪.‬‬

‫ﺗﻘﺪم ﻣﻦ ﺧﻼل اﻟﻔﻘﺮات اﻟﺴﺎﺑﻘﺔ أﺻﻮل اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ وأﳘﻴﺘﻬﺎ ﰲ اﻟﺘﻌﻠﻴﻢ اﻷﻛﺎدﳝﻲ واﳌﻴﺪان اﻟﺼﻨﺎﻋﻲ‪ ،‬وﺳﻮف ﻧﻨﺎﻗﺶ ﰲ اﻟﻔﻘﺮات اﻟﺘﺎﻟﻴﺔ‬
‫ﻓﺮوع اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ وأﻧﻮاﻋﻬﺎ‪.‬‬

‫‪ 12-1‬اﻟﺤﻠﻮل اﻟﺘﻜﻨﻠﻮﺟﻴﺔ ﻟﻸﻧﻈﻤﺔ اﻟﻤﺪﻣﺠﺔ )‪:(E.Systems Technologies & Approaches‬‬

‫ﻗﺒﻴﻞ ﻇﻬﻮر اﻟﻌﻨﺎﺻﺮ اﻹﻟﻜﱰوﻧﻴﺔ ﻛﺎﻧﺖ اﳊﺎﺳﺒﺎت ﺗﺒﲎ ﺑﺎﺳﺘﺨﺪام ﻋﻨﺎﺻﺮ ﻛﻬﺮوﻣﻴﻜﺎﻧﻴﻜﻴﺔ ﺣﱴ اﻟﻌﻘﺪ اﳋﺎﻣﺲ ﻣﻦ اﻟﻘﺮن اﻟﺘﺎﺳﻊ ﻋﺸﺮ وﻇﻬﻮر‬
‫اﻟﺼﻤﺎﻣﺎت اﻹﻟﻜﱰوﻧﻴﺔ واﻟﺪارات اﳌﻨﻄﻘﻴﺔ – اﻟﱵ ﺗﺒﲎ ﻣﻦ اﻟﱰاﻧﺰﺳﺘﻮرات واﳌﻘﺎوﻣﺎت )‪ ،(RTL‬ﰒ ﺗﻼﻩ ﻇﻬﻮر اﻟﺪارات اﳌﺘﻜﺎﻣﻠﺔ‪ ،‬وأﺻﺒﺢ‬
‫ﺑﺎﻹﻣﻜﺎن ﺗﺼﻨﻴﻊ دارة ﻣﻨﻄﻘﻴﺔ ﻋﻠﻰ ﺷﺮﳛﺔ ﺳﻴﻠﻴﻜﻮﻧﻴﺔ واﺣﺪة‪ .‬اﻟﺸﻜﻞ‪ 6-1‬ﻳﺒﲔ ﳐﻄﻄﺎً زﻣﻨﻴﺎً ﻟﻠﺘﻄﻮر اﻟﺘﻜﻨﻮﻟﻮﺟﻲ ﻟﻠﺤﺎﺳﺒﺎت‪.‬‬
‫‪11‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Embedded Systems‬‬ ‫اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ |‬

‫اﻟﺸﻜﻞ‪ 6-1‬اﻟﺘﻄﻮر اﻟﺰﻣﲏ ﻟﺘﻜﻨﻮﻟﻮﺟﻴﺎ اﳊﺎﺳﺒﺎت‬

‫ﰲ ﻋﺎم ‪ 1965‬ﻻﺣﻆ ‪ Gordon Moore‬ﻣﺪﻳﺮ ﺷﺮﻛﺔ ‪ Intel‬أن ﺗﻜﻨﻮﻟﻮﺟﻴﺎ اﻟﺪارات اﳌﺘﻜﺎﻣﻠﺔ ﺗﺘﻄﻮر ﲟﻌﺪل ﻣﺬﻫﻞ ﲝﻴﺚ أن ﻋﺪد‬
‫اﻟﱰاﻧﺰﺳﺘﻮرات اﻟﱵ ﳝﻜﻦ أن ﺗﻮﺿﻊ ﻋﻠﻰ ﳓﻮ رﺧﻴﺺ )ﺑﺪون أي ﻛﻠﻔﺔ زاﺋﺪة( ﻋﻠﻰ دارة ﻣﺘﻜﺎﻣﻠﺔ – أي أن ﺗﻌﻘﻴﺪ اﻟﺪارات اﳌﺘﻜﺎﻣﻠﺔ ﻣﻊ اﻋﺘﺒﺎر‬
‫اﻟﻜﻠﻔﺔ اﻷﺧﻔﺾ ﻟﻠﻌﻨﺎﺻﺮ – ﻳﺘﻀﺎﻋﻒ ﻛﻞ ﺳﻨﺘﲔ ﺗﻘﺮﻳﺒﺎً‪ .‬إن ﻗﺎﺑﻠﻴﺔ ودرﺟﺔ ﺗﻄﻮر اﻟﻌﺪﻳﺪ ﻣﻦ اﻷﺟﻬﺰة اﻹﻟﻜﱰوﻧﻴﺔ اﻟﺮﻗﻤﻴﺔ )ﺳﻌﺔ وﺳﺮﻋﺔ‬
‫اﳌﻌﺎﳉﺔ‪ ،‬ﺣﺠﻢ اﻟﺬاﻛﺮة‪ (... ،‬ﻳﺮﺗﺒﻂ ﺑﺸﻜﻞ وﺛﻴﻖ ﺑﺬا اﻟﻘﺎﻧﻮن ﺣﻴﺚ أن ﻫﺬﻩ اﳌﻼﺣﻈﺔ أدت ﻋﻠﻰ ﳓﻮ ﻛﺒﲑ ﺟﺪاً إﱃ زﻳﺎدة ﻓﺎﺋﺪة اﺳﺘﺨﺪام‬
‫ﺗﻜﻨﻮﻟﻮﺟﻴﺎ اﻹﻟﻜﱰوﻧﻴﺎت ﺗﻘﺮﻳﺒﺎً ﰲ ﲨﻴﻊ ﻗﻄﺎﻋﺎت اﻻﻗﺘﺼﺎد اﻟﻌﺎﳌﻲ]‪[79,80‬وﻗﺪ ﰎ ﺗﺴﻤﻴﺔ ﻫﺬا اﻟﻘﺎﻧﻮن ﻋﻠﻤﻴﺎً ﺑﺎﺳﻢ "ﻗﺎﻧﻮن ﻣﻮر" ) ‪Moore's‬‬

‫‪ (Law‬ﻧﺴﺒﺔً إﱃ ‪ Gordon E. Moore‬اﻟﺬي ﻗﺪم ﻫﺬا اﻟﻘﺎﻧﻮن]‪[81-83‬وﻣﻨﺬ ذاك اﻟﻮﻗﺖ ﻳﻌﺘﱪ ﻫﺬا اﻟﻘﺎﻧﻮن ﳏﻮر اﻟﺘﺨﻄﻴﻂ واﻟﺘﻮﺟﻴﻪ ﻃﻮﻳﻞ‬
‫اﻷﻣﺪ ﰲ وﺿﻊ أﻫﺪاف اﻟﺒﺤﺚ واﻟﺘﻄﻮﻳﺮ ﰲ ﺻﻨﺎﻋﺔ أﻧﺼﺎف اﻟﻨﻮاﻗﻞ]‪[84‬ﻳﺘﻮﻗﻊ أن ﻳﺴﺘﻤﺮ اﻟﻌﻤﻞ ﻬﺑﺬا اﻟﻘﺎﻧﻮن إﱃ ﻣﺎ ﺑﻌﺪ ﻋﺎم ‪.2020‬‬
‫اﻟﺸﻜﻞ‪ 7-1‬ﻳﺒﲔ ﳐﻄﻄﺎً ﻟﻮﻏﺎرﲤﻴﺎً ﻟﻌﺪد اﻟﱰاﻧﺰﺳﺘﻮرات ﻋﻠﻰ ﺷﺮﳛﺔ واﺣﺪة ﰲ ﻣﺮاﺣﻞ زﻣﻨﻴﺔ ﻣﺘﻌﺪدة )‪ (1960-2010‬وﻳﻼﺣﻆ ﺑﺄن ﻣﻌﺪل‬
‫اﻟﺘﺰاﻳﺪ ﻳﺘﻀﺎﻋﻒ ﻛﻞ ﺳﻨﺘﲔ‪.‬‬

‫اﻟﺸﻜﻞ‪ 7-1‬اﳌﻨﺤﲏ اﻟﺰﻣﲏ ﻻزدﻳﺎد ﻋﺪد اﻟﱰاﻧﺰﺳﺘﻮرات ﻋﻠﻰ ﺷﺮﳛﺔ ﻣﺘﻜﺎﻣﻠﺔ‬

‫ﺗﻌﺘﱪ ﻣﺴﺄﻟﺔ ﲢﺪﻳﺪ اﻟﺘﻘﻨﻴﺔ اﳌﺴﺘﺨﺪﻣﺔ ﰲ ﺗﺼﻤﻴﻢ اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ ﻣﻦ اﻷﻣﻮر اﳍﺎﻣﺔ واﻷﺳﺎﺳﻴﺔ ﰲ اﳌﺮاﺣﻞ اﳌﺒﻜﺮة ﻟﻠﺘﺼﻤﻴﻢ وﻫﻲ ﺗﺴﺘﻨﺪ إﱃ‬
‫اﻟﻮﻇﺎﺋﻒ اﻷﺳﺎﺳﻴﺔ اﳌﻄﻠﻮﺑﺔ ﻣﻦ اﻟﻨﻈﺎم‪ ،‬إذ ﻫﻨﺎك اﻟﻌﺪﻳﺪ ﻣﻦ اﳋﻴﺎرات اﳌﺘﺎﺣﺔ ﻟﺘﺼﻤﻴﻢ اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ ﺑﺪءاً ﻣﻦ اﳌﻌﺎﳉﺎت اﳌﺼﻐﺮة‬
‫)‪ (MPUs‬واﳌﺘﺤﻜﻤﺎت اﳌﺼﻐﺮة )‪ (MCUs‬واﻟﻌﻨﺎﺻﺮ اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ )‪ (PLDs‬واﻟﺪارات اﳌﺘﻜﺎﻣﻠﺔ ذات اﻟﺘﻄﺒﻴﻘﺎت اﳋﺎﺻﺔ‬
‫)‪ ،(ASICs‬ﻛﻤﺎ أن اﻻﺧﺘﻴﺎر ﺑﲔ ﻫﺬﻩ اﻟﻌﻨﺎﺻﺮ اﳌﺨﺘﻠﻔﺔ ﻳﻌﺘﻤﺪ ﻋﻠﻰ ﻣﺘﻄﻠﺒﺎت اﻟﻨﻈﺎم اﳌﻄﻠﻮب ﺗﺼﻤﻴﻤﻪ أﻛﺜﺮ ﻣﻦ ﻛﻮﻧﻪ ﻣﻌﺘﻤﺪاً ﻋﻠﻰ‬
‫اﻋﺘﺒﺎرات وﻣﻴﻮل ﺷﺨﺼﻴﺔ ﻟﻠﻤﺼﻤﻢ‪.‬‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪12‬‬
‫‪21‬‬ ‫‪Chapter 1‬‬ ‫اﻟﻔﺼﻞ اﻷول |‬

‫ﻓﺈذا ﻛﺎن اﳌﻄﻠﻮب ﻧﻈﺎﻣﺎً ﻗﺎﺑﻼً ﻟﻠﱪﳎﺔ ﻟﺘﻨﻔﻴﺬ ﺧﻮارزﻣﻴﺎت ذات ﻋﻤﻠﻴﺎت ﺣﺴﺎﺑﻴﺔ ﻣﻌﻘﺪة‪ ،‬ﻓﺈن اﻻﺧﺘﻴﺎر اﻷﻣﺜﻞ ﳍﺬﻩ اﻟﺘﻄﺒﻴﻘﺎت ﻫﻲ ﻣﻌﺎﳉﺎت‬
‫اﻹﺷﺎرة اﻟﺮﻗﻤﻴﺔ )‪(DSP‬؛ أﻣﺎ إذا ﱂ ﻳﻜﻦ ﻻﻋﺘﺒﺎرات اﻟﺴﺮﻋﺔ أﳘﻴﺔ ﺑﺎﻟﻐﺔ ﰲ ﻋﻤﻞ اﻟﻨﻈﺎم وﻛﺎﻧﺖ اﻟﺘﻜﻠﻔﺔ وﻇﺮوف اﻟﻌﻤﻞ ﻻ ﺗﺴﻤﺢ ﺑﺎﺳﺘﺨﺪام‬
‫ﺷﺮاﺋﺢ ﻣﺘﻄﻮرة‪ ،‬ﻓﻴﻜﻮن اﺳﺘﺨﺪام اﳌﻌﺎﳉﺎت اﳌﺼﻐﺮة )‪ (MCUs | MPUs‬ﻣﺜﺎﻟﻴﺎً ﳍﺬﻩ اﳊﺎﻟﺔ؛ وﰲ ﺣﺎل ﻛﺎن اﻟﻨﻈﺎم ﻳﺘﻄﻠﺐ ﻣﺴﺘﻮﻳﺎت أداء‬
‫ﻋﺎﻟﻴﺔ‪ ،‬وﺳﺮﻋﺎت ﻣﻌﺎﳉﺔ ﻋﺎﻟﻴﺔ ﺟﺪاً‪ ،‬وﺑﻨﻴﺔ ﺗﻨﻔﻴﺬ ﺗﻔﺮﻋﻴﺔ‪ ،‬ﻓﺈن ﻣﺼﻔﻮﻓﺎت اﻟﺒﻮاﺑﺎت اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً )‪ (FPGAs‬ﺗﻘﺪم اﻷداء اﳌﻄﻠﻮب‬
‫وﺗﺘﻴﺢ ﻟﻠﻤﺼﻤﻢ ﻣﺮوﻧﺔ ﻛﺒﲑة ﰲ ﺗﺼﻤﻴﻢ ﺧﻮارزﻣﻴﺔ اﻟﻨﻈﺎم‪ ،‬ﺣﻴﺚ أن ﺑﻨﻴﺔ اﻟـ‪ FPGAs‬ﺗﺘﻴﺢ إﻣﻜﺎﻧﻴﺔ اﻟﻌﻤﻞ اﳌﺘﺰاﻣﻦ )‪ (Parallelism‬ﻟﻮﻇﺎﺋﻒ‬
‫اﻟﻨﻈﺎم‪ ،‬وﻫﺬا ﻣﺎ ﻻ ﺗﺴﺘﻄﻴﻊ ﺗﺄﻣﻴﻨﻪ اﳌﻌﺎﳉﺎت أو اﳊﻠﻮل اﳌﺘﻜﺎﻣﻠﺔ اﻷﺧﺮى اﻟﱵ ﺗﻌﺘﻤﺪ ﰲ ﺗﻨﻔﻴﺬ ﺧﻮارزﻣﻴﺘﻬﺎ ﻋﻠﻰ اﻟﻌﻤﻞ اﻟﺘﺴﻠﺴﻠﻲ‪.‬‬

‫‪ 13-1‬ﺗﻄﻮر ﺻﻨﺎﻋﺔ أﻧﺼﺎف اﻟﻨﻮاﻗﻞ )‪:(Semiconductors Industry Evolution‬‬

‫ﰲ أواﺋﻞ اﻟﻌﺸﺮﻳﻨﻴﺎت ﻣﻦ اﻟﻘﺮن اﻟﻌﺸﺮﻳﻦ ﻛﺎﻧﺖ اﻷﺟﻬﺰة ﺗﻌﺘﻤﺪ ﻋﻠﻰ اﳌﻔﺎﺗﻴﺢ اﳌﻴﻜﺎﻧﻴﻜﻴﺔ )‪ (Electromechanical‬ﻣﺜﻞ اﻟـ‪ Relays‬ﰲ‬
‫ﻋﻤﻠﻴﺎت اﻟﺘﺤﻜﻢ ﺑﺎﻷﺟﻬﺰة‪ .‬ﰲ أواﺧﺮ ﻋﺎم ‪ 1920‬ﻇﻬﺮ اﳉﻴﻞ اﻷول ﻣﻦ اﻟﻌﻨﺎﺻﺮ اﻹﻟﻜﱰوﻧﻴﺔ وﻋﺮﻓﺖ ﺑﺎﻟﺼﻤﺎﻣﺎت اﳌﻔﺮﻏﺔ ) ‪Vacuum‬‬

‫‪ ،(Tubes‬ﻣﺒﻴﻨﺔ ﻋﻠﻰ اﻟﺸﻜﻞ‪ ،8-1‬ﺣﻴﺚ اﺳﺘﻌﻤﻠﺖ ﰲ اﻟﻌﺪﻳﺪ ﻣﻦ اﻷﺟﻬﺰة اﻹﻟﻜﱰوﻧﻴﺔ ﰲ ذاك اﻟﻮﻗﺖ‪ :‬اﻟﺮادﻳﻮ واﻟﺘﻠﻔﺎز وﻏﲑﻫﺎ]‪.[85-88‬‬

‫اﻟﺸﻜﻞ‪ 8-1‬اﻟﺼﻤﺎﻣﺎت اﳌﻔﺮﻏﺔ‬

‫ﰲ ﲬﺴﻴﻨﻴﺎت اﻟﻘﺮن اﻟﻌﺸﺮﻳﻦ ﻇﻬﺮت اﻟﱰاﻧﺰﺳﺘﻮرات‪ ،‬وﺑﺪأت اﻷﲝﺎث ﺣﻮل اﻟﺪارات اﳌﺘﻜﺎﻣﻠﺔ اﻟﱵ ﳝﻜﻦ أن ﲢﻮي ﻋﻠﻰ ﻋﺪة ﺗﺮاﻧﺰﺳﺘﻮرات‪،‬‬
‫وﻛﺎن ﻫﻨﺎك ﳏﺎوﻻت ﻋﺪﻳﺪة ﻟﺒﻨﺎء دارة ﻣﺘﻜﺎﻣﻠﺔ‪ ،‬وﻛﺎﻧﺖ اﻟﺘﺠﺮﺑﺔ اﻟﻨﺎﺟﺤﺔ اﻷوﱃ ﰲ ﻋﺎم ‪ 1958‬ﺣﻴﺚ ﻗﺎم ﻋﺎﱂ اﻟﻔﻴﺰﻳﺎء ‪Jack Kilby‬‬

‫ﺑﺘﺼﻤﻴﻢ أول دارة ﻣﺘﻜﺎﻣﻠﺔ – اﻟﺸﻜﻞ‪.9-1‬‬

‫اﻟﺸﻜﻞ‪ 9-1‬أول دارة ﻣﺘﻜﺎﻣﻠﺔ‬

‫‪13‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Embedded Systems‬‬ ‫اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ |‬

‫ﺻﻨﺎﻋﺔ أﻧﺼﺎف اﻟﻨﻮاﻗﻞ ﻇﻬﺮت ﺑﻮﺿﻮح ﰲ أواﺋﻞ اﻟﺴﺘﻴﻨﻴﺎت‪ ،‬وﺑﺪأت ﺑﺎﻟﺘﻄﻮر ﺑﺸﻜﻞ ﻣﺘﺴﺎرع ﻣﻨﺬ ذاك اﻟﻮﻗﺖ‪ .‬اﳉﻴﻞ اﻷول ﻣﻦ اﻟﺪارات‬
‫اﳌﺘﻜﺎﻣﻠﺔ ﻋﺮف ﺑـ‪ (Small-scale Integration) SSI‬ﺣﻴﺚ ﻛﺎﻧﺖ اﻟﺪارات اﳌﺘﻜﺎﻣﻠﺔ ﺗﺘﻜﻮن ﻣﻦ ﻋﺪد ﻗﻠﻴﻞ ﺟﺪاً ﻣﻦ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ‬
‫)‪ (OR, NOR, AND, etc.‬ﺗﺘﺸﻜﻞ ﻣﻦ ﻋﺸﺮات اﻟﱰاﻧﺰﺳﺘﻮرات‪ .‬ﺗﻼﻩ ﻋﺼﺮ اﳉﻴﻞ اﻟﺜﺎﱐ ﻣﻦ اﻟﺪارات اﳌﺘﻜﺎﻣﻠﺔ ﰲ أواﺳﻂ اﻟﺴﺘﻴﻨﻴﺎت‬
‫وﻋﺮف ﺑـ‪ ،(Medium-scale Integration) MSI‬وﻗﺪ ﲤﻴﺰ ﺑﺰﻳﺎدة ﻛﺒﲑة ﰲ ﻋﺪد اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ ﻋﻠﻰ ﺷﺮﳛﺔ ﻣﺘﻜﺎﻣﻠﺔ وﺣﻴﺪة‪ ،‬ﺣﻴﺚ‬
‫اﺳﺘﺨﺪﻣﺖ اﻟﺸﺮاﺋﺢ ﰲ اﳌﺆﻗﺘﺎت واﻟﻌﺪادات واﳌﺴﺠﻼت‪ ،‬وﲤﻴﺰت ﺑﻜﻠﻔﺔ أﺧﻔﺾ ﺑﻜﺜﲑ ﻣﻦ ﺳﺎﺑﻘﺘﻬﺎ وإﻣﻜﺎﻧﻴﺔ ﺗﺼﻤﻴﻢ أﻧﻈﻤﺔ أﻛﺜﺮ ﺗﻌﻘﻴﺪاً‪.‬‬
‫اﳉﻴﻞ اﻟﺜﺎﻟﺚ ﻣﻦ اﻟﺪارات اﳌﺘﻜﺎﻣﻠﺔ ﻇﻬﺮ ﰲ أواﺳﻂ اﻟﺴﺒﻌﻴﻨﻴﺎت وﻋﺮف ﺑـ‪ ،(Large-scale Integration) LSI‬وﻓﻴﻪ ﰎ ﺗﻀﻤﲔ ﻋﺸﺮات‬
‫اﻵﻻف ﻣﻦ اﻟﱰاﻧﺰﺳﺘﻮرات ﻋﻠﻰ ﺷﺮﳛﺔ ﻣﺘﻜﺎﻣﻠﺔ وﺣﻴﺪة ﻣﺜﻞ اﻟـ‪ ،1K-bit RAMs, calculator chips‬وﻛﺬﻟﻚ اﳉﻴﻞ اﻷول ﻣﻦ اﳌﻌﺎﳉﺎت‬
‫اﳌﺼﻐﺮة‪ .‬اﳋﻄﻮة اﻷﺧﲑة ﰲ ﻋﻤﻠﻴﺔ ﺗﻄﻮر اﻟﺪارات اﳌﺘﻜﺎﻣﻠﺔ ﻛﺎﻧﺖ ﺑﻈﻬﻮر ﺗﻘﻨﻴﺔ ‪ (Very-large-scale Integration) VLSI‬ﺣﻴﺚ أن‬
‫ﻋﻤﻠﻴﺔ اﻟﺘﻄﻮر ﺑﺪأت ﰲ أواﺋﻞ اﻟﺜﻤﺎﻧﻴﻨﻴﺎت ﻣﻦ ﺧﻼل دﻣﺞ ﻣﺌﺎت اﻵﻻف ﻣﻦ اﻟﱰاﻧﺰﺳﺘﻮرات ﻋﻠﻰ ﺷﺮﳛﺔ واﺣﺪة‪ ،‬واﺳﺘﻤﺮت ﻟﺘﺼﻞ ﰲ ﻋﺎم‬
‫‪ 2009‬إﱃ ﻋﺪة ﺑﻼﻳﲔ ﻣﻦ اﻟﱰاﻧﺰﺳﺘﻮرات ﻋﻠﻰ ﺷﺮﳛﺔ واﺣﺪة‪ .‬إن اﳌﻌﺎﳉﺎت ﻣﺘﻌﺪدة اﻟﻨﻮى اﻟﱵ ﻇﻬﺮت ﻣﺆﺧﺮاً ذات ﻋﺮض ﻧﺎﻗﻞ ‪،64-bit‬‬

‫واﻟﱵ ﻳﺪﻣﺞ ﻣﻌﻬﺎ ذاﻛﺮة وﺳﻴﻄﺔ )‪ (cache memory‬ووﺣﺪات ﺣﺴﺎب وﻣﻌﺎﳉﺔ ﺑﺎﻟﻔﺎﺻﻠﺔ اﻟﻌﺸﺮﻳﺔ ﺗﻌﺘﱪ ﻣﻦ اﻷﺟﻴﺎل اﳌﺘﻄﻮرة ﻟﻠﺪارات‬
‫اﳌﺘﻜﺎﻣﻠﺔ ‪ .VLSI‬اﻟﺸﻜﻞ‪ 10-1‬ﻳﺒﲔ ﳐﻄﻄﺎً زﻣﻨﻴﺎً ﳌﺮاﺣﻞ ﻟﺘﻄﻮر ﺗﻘﻨﻴﺎت ﺗﺼﻨﻴﻊ اﻟﺪارات اﳌﺘﻜﺎﻣﻠﺔ‪ .‬اﳉﺪول‪ 2-1‬ﻳﺒﲔ ﺗﺼﻨﻴﻔﺎً ﻟﺘﻘﻨﻴﺎت ﺗﺼﻨﻴﻊ‬
‫اﻟﺪارات اﳌﺘﻜﺎﻣﻠﺔ وﻓﻘﺎً ﻟﻌﺪد اﻟﱰاﻧﺰﺳﺘﻮرات ﻋﻠﻰ ﺷﺮﳛﺔ واﺣﺪة أو ﻋﺪد اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ واﻟﺘﻄﺒﻴﻘﺎت ﻟﻜﻞ ﺟﻴﻞ‪.‬‬

‫‪Electro‬‬ ‫‪Discrete‬‬ ‫‪Optical‬‬

‫‪Mechanical‬‬ ‫‪Transistors‬‬ ‫‪Circuit‬‬
‫‪1950‬‬ ‫‪1920‬‬ ‫‪1920‬‬

‫‪1920‬‬ ‫‪Vacuum 1920‬‬ ‫‪Integrated 1920‬‬ ‫‪Molecular‬‬

‫‪Tubes‬‬ ‫‪Circuit‬‬ ‫‪Circuit‬‬

‫اﻟﺸﻜﻞ‪ 10-1‬اﳌﺮاﺣﻞ اﻟﺰﻣﻨﻴﺔ ﻟﺘﻄﻮر ﺗﻘﻨﻴﺎت ﺗﺼﻨﻴﻊ اﻟﺪارات اﳌﺘﻜﺎﻣﻠﺔ‬

‫‪Density‬‬ ‫‪Date‬‬ ‫‪Transistors‬‬ ‫‪Gates‬‬ ‫‪Application‬‬

‫‪SSI‬‬ ‫‪1961-1966‬‬ ‫‪1~100‬‬ ‫‪10‬‬ ‫‪AND, OR, NOT gates chips‬‬

‫‪MSI‬‬ ‫‪1966-1971‬‬ ‫‪100~3000‬‬ ‫‪100‬‬ ‫‪Decoder, encoder, multiplexer, counter‬‬

‫‪LSI‬‬ ‫‪1971-1979‬‬ ‫‪3K~100K‬‬ ‫‪10,000‬‬ ‫‪Micro-controller, special-function chips‬‬

‫‪VLSI‬‬ ‫‪1980s‬‬ ‫‪100K~1M‬‬ ‫‪100,000‬‬ ‫‪Memory, special-function chips‬‬

‫‪ULSI‬‬ ‫‪1990s‬‬ ‫‪> 1M‬‬ ‫‪>100,000‬‬ ‫‪Memory, microprocessor chips‬‬

‫‪GSI‬‬ ‫‪2009s‬‬ ‫‪2M~2Bilion‬‬ ‫‪>1M‬‬ ‫‪Multi-core Processors‬‬

‫اﳉﺪول‪ 2-1‬اﳌﺮاﺣﻞ اﻟﺰﻣﻨﻴﺔ ﻟﺘﻄﻮر ﺗﺼﻨﻴﻊ اﻟﺪارات اﳌﺘﻜﺎﻣﻠﺔ وﻣﺪى ﺗﻌﻘﻴﺪﻫﺎ‬

‫ﳑﺎ ﳚﺐ اﻹﺷﺎرة إﻟﻴﻪ أن اﻟﺒﻌﺾ )ﻛﻤﺎ ﰲ اﻟﻴﺎﺑﺎن( ﻳﺴﺘﺨﺪم ﻣﺼﻄﻠﺢ اﻟـ‪ ULSI‬اﺧﺘﺼﺎراً ﻟـ‪ Ultra-large-scale Integration‬وﻛﺬﻟﻚ‬
‫اﳌﺼﻄﻠﺢ ‪ GSI‬اﺧﺘﺼﺎراً ‪ Giga-scale Integration‬واﻟﺬي ﻳﺸﲑ إﱃ اﻟﺪارات اﳌﺘﻜﺎﻣﻠﺔ اﻟﱵ ﲢﻮي ﻋﻠﻰ ﺑﻼﻳﲔ اﻟﱰاﻧﺰﺳﺘﻮرات‪ ،‬إﻻ أن‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪14‬‬
‫‪21‬‬ ‫‪Chapter 1‬‬ ‫اﻟﻔﺼﻞ اﻷول |‬

‫اﳌﻌﻈﻢ وﻗﻒ ﻋﻨﺪ اﳌﺼﻄﻠﺢ ‪ VLSI‬وأدرج اﻟﺘﻘﻨﻴﺎت اﳌﺬﻛﻮرة ﻛﻔﺮوع ﻟﺘﻘﻨﻴﺔ اﻟـ‪ ،VLSI‬وإﻻ ﻓﺈﻧﻪ ﺳﻮف ﻳﺘﻮﺟﺐ إﳚﺎد ﻣﺼﻄﻠﺤﺎت ﻣﺘﺠﺪدة‬
‫ﺑﺸﻜﻞ داﺋﻢ ‪ -‬ﻋﻠﻰ اﻷﻗﻞ ﻛﻞ ﺳﻨﺘﲔ‪ .‬اﻟﺸﻜﻞ‪ 11-1‬ﻳﺒﲔ اﻟﺸﺮﳛﺔ اﻟﺴﻴﻠﻴﻜﻮﻧﻴﺔ ﻟﻠﻤﻌﺎﰿ ‪ IBM Power-7‬واﻟﺬي ﳝﻠﻚ ‪ 8-core‬وﳛﻮي‬
‫ﻋﻠﻰ ‪ 1.2‬ﺑﻠﻴﻮن ﺗﺮاﻧﺰﺳﺘﻮر وﻋﻠﻰ اﻟﻴﺴﺎر ﻟﻮح اﻟـ ـ‪ Wafer‬وﳛﻮي ﻣﺌﺎت اﻟﺸﺮاﺋﺢ اﻟﺴﻴﻠﻴﻜﻮﻧﻴﺔ ﻗﺒﻞ ﻓﺼﻠﻬﺎ‪ .‬اﻟﺸﻜﻞ‪ 12-1‬ﻳﺒﲔ اﻟﺸﺮﳛﺔ‬
‫اﻟﺴﻴﻠﻴﻜﻮﻧﻴﺔ وﻟﻮح اﻟـ‪ Wafer‬ﻟﻠﻤﻌﺎﰿ ‪ Intel Itanium‬واﻟﺬي ﳝﻠﻚ ‪ 4-core‬وﳛﻮي ﻋﻠﻰ ‪ 2.046‬ﺑﻠﻴﻮن ﺗﺮاﻧﺰﺳﺘﻮر‪.‬‬

‫اﻟﺸﻜﻞ‪ 11-1‬اﻟﺸﺮﳛﺔ اﻟﺴﻴﻠﻴﻜﻮﻧﻴﺔ ﻟﻠﻤﻌﺎﰿ ‪ 8-core) IBM Power7‬وﳛﻮي ﻋﻠﻰ ‪ 1.2‬ﺑﻠﻴﻮن ﺗﺮاﻧﺰﺳﺘﻮر( وﻟﻮح اﻟ ـ"‪"Wafer‬‬

‫اﻟﺸﻜﻞ‪ 12-1‬اﻟﺸﺮﳛﺔ اﻟﺴﻴﻠﻴﻜﻮﻧﻴﺔ ﻟﻠﻤﻌﺎﰿ ‪ Intel Itanium‬رﺑﺎﻋﻲ اﻟﻨﻮى وﳛﻮي ﻋﻠﻰ‪ 2.046‬ﺑﻠﻴﻮن ﺗﺮاﻧﺰﺳﺘﻮر‬

‫‪ 14-1‬ﺗﻘﻨﻴﺎت ﺻﻨﺎﻋﺔ أﻧﺼﺎف اﻟﻨﻮاﻗﻞ )‪:(Semiconductors Industry Evolution‬‬

‫ﺗﻄﻮرت ﺗﻘﻨﻴﺎت ﺻﻨﺎﻋﺔ أﻧﺼﺎف اﻟﻨﻮاﻗﻞ ﺑﺸﻜﻞ ﻛﺒﲑ ﺧﻼل اﻟﻌﻘﻮد اﻟﺜﻼﺛﺔ اﳌﺎﺿﻴﺔ]‪ ،[89-91‬وأﺻﺒﺤﺖ ﺗﻌﺘﻤﺪ ﻋﻠﻰ ﺗﻘﻨﻴﺔ اﻟـ‪ CMOS‬اﻟﱵ‬
‫أﻣﻜﻨﺖ ﻣﻦ أن ﺗﺼﺒﺢ اﻟﱰاﻧﺰﺳﺘﻮرات أﺻﻐﺮ ﺣﺠﻤﺎً‪ ،‬وﺑﺎﻟﺘﺎﱄ ﳝﻜﻦ ﻟﻠﺪارات اﳌﺘﻜﺎﻣﻠﺔ أن ﲢﻮي ﻋﺪد ﺗﺮاﻧﺰﺳﺘﻮرات أﻛﱪ‪ .‬اﻟﺪارات اﳌﺘﻜﺎﻣﻠﺔ‬
‫اﻷوﱃ ﻛﺎﻧﺖ ﺗﺴﺘﺨﺪم اﻟﱰاﻧﺰﺳﺘﻮرات ﺛﻨﺎﺋﻴﺔ اﻟﻘﻄﺒﻴﺔ )‪ ،(BJT‬وﻛﺎﻧﺖ ﻏﺎﻟﺒﻴﺔ اﻟﺪارات اﳌﺘﻜﺎﻣﻠﺔ ﺗﺴﺘﺨﺪم اﳌﻨﻄﻖ ‪ TTL‬أو اﳌﻨﻄﻖ ‪.ECL‬‬
‫ﻋﻠﻰ اﻟﺮﻏﻢ ﻣﻦ أن ﺗﻘﻨﻴﺔ اﻟـ‪ MOS‬ﰎ اﺧﱰاﻋﻬﺎ ﻗﺒﻞ اﻟﱰاﻧﺰﺳﺘﻮرات اﻟﺜﻨﺎﺋﻴﺔ‪ ،‬إﻻ أﻧﻪ ﻛﺎن ﰲ اﻟﺒﺪاﻳﺔ ﻣﻦ اﻟﺼﻌﺐ ﺟﺪاً ﺗﺼﻨﻴﻌﻬﺎ ﻧﻈﺮاً ﳌﺸﻜﻠﺔ‬
‫ﻃﺒﻘﺔ اﻷﻛﺴﻴﺪ‪ .‬ﰲ اﻟﺴﺒﻌﻴﻨﻴﺎت ﰎ ﺣﻞ ﻫﺬﻩ اﳌﺸﻜﻠﺔ‪ ،‬وﰎ ﺗﻄﻮﻳﺮ ﺗﻘﻨﻴﺔ اﻟـ‪NMOS‬؛ ﰲ ذاك اﻟﻮﻗﺖ ﺗﻄﻠﺐ اﺳﺘﺨﺪام ﺗﻘﻨﻴﺔ ‪ MOS‬ﻋﺪد‬
‫أﻗﻞ ﻣﻦ ﻃﺒﻘﺎت اﻟـ‪) Mask‬أﻓﻼم ﺗﺼﻨﻴﻊ اﻟﻄﺒﻘﺎت ﻋﻠﻰ ﻣﺴﺘﻮى اﻟﺴﻠﻴﻜﻮن واﻷﻛﺴﻴﺪ( وﺑﺎﻟﺘﺎﱄ ﻛﺜﺎﻓﺔ أﻛﱪ واﺳﺘﻬﻼك ﻃﺎﻗﺔ أﻗﻞ وﺳﻌﺮ‬
‫أرﺧﺺ ﻣﻘﺎرﻧﺔً ﻣﻊ اﻟﺪارات اﳌﺘﻜﺎﻣﻠﺔ اﻟﱵ ﺗﻌﺘﻤﺪ ﺗﻘﻨﻴﺔ اﻟﺘﺼﻨﻴﻊ ‪.BJT‬‬

‫ﻣﻊ ﺑﺪاﻳﺎت اﻟﺜﻤﺎﻧﻴﻨﻴﺎت ﰎ اﺳﺘﺒﺪال ﺑﻮاﺑﺎت اﻟﱰاﻧﺰﺳﺘﻮرات اﳌﺼﻨﻌﺔ ﻣﻦ اﻷﳌﻨﻴﻮم ﺑﺒﻮاﺑﺎت اﻟـ‪ Polysilicon‬واﻟﱵ أدت إﱃ ﲢﺴﲔ ﻛﺒﲑ ﰲ ﺗﻘﻨﻴﺔ‬
‫‪ CMOS‬ﺣﻴﺚ أ�ﺎ ﻣﻜﻨﺖ ﻣﻦ اﺳﺘﺨﺪام ﻧﻮﻋﲔ ﻣﻦ اﻟﱰاﻧﺰﺳﺘﻮرات )‪ (NMOS, PMOS‬ﻋﻠﻰ ﻧﻔﺲ اﻟﺸﺮﳛﺔ اﻟﺴﻴﻠﻴﻜﻮﻧﻴﺔ‪ ،‬وﺑﺎﻟﺘﺎﱄ‬
‫‪15‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Embedded Systems‬‬ ‫اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ |‬

‫أﺻﺒﺤﺖ ﻋﻤﻠﻴﺔ اﻟﺘﺼﻨﻴﻊ أﺳﻬﻞ‪ ،‬ﻛﻤﺎ أن اﺳﺘﻬﻼك اﻟﻄﺎﻗﺔ أﺻﺒﺢ أﺧﻔﺾ‪ ،‬وﻫﺬا ﲨﻴﻌﻪ ﺳﺎﻋﺪ ﰲ ﺗﺼﻤﻴﻢ دارات ﻣﺘﻜﺎﻣﻠﺔ أﺻﻐﺮ ﺣﺠﻤﺎً‪.‬‬
‫اﳉﺪول‪ 3-1‬ﻳﺒﲔ أﺟﻴﺎل اﻟﺘﻘﻨﻴﺎت اﳌﺴﺘﺨﺪﻣﺔ ﰲ ﺑﻨﺎء اﻟﺪارات اﳌﺘﻜﺎﻣﻠﺔ‪.‬‬

‫‪Technology‬‬ ‫‪Power Consumption‬‬ ‫‪Speed‬‬ ‫‪Packaging‬‬

‫)‪RTL (BJT‬‬ ‫‪High‬‬ ‫‪Low‬‬ ‫‪Discrete‬‬

‫)‪DTL (BJT‬‬ ‫‪High‬‬ ‫‪Low‬‬ ‫‪Discrete, SSI‬‬

‫)‪TTL (BJT‬‬ ‫‪Medium‬‬ ‫‪Medium‬‬ ‫‪SSI, MSI‬‬

‫)‪ECL (BJT‬‬ ‫‪High‬‬ ‫‪High‬‬ ‫‪SSI, MSI, LSI‬‬

‫)‪pMOS (MOSFET‬‬ ‫‪Medium‬‬ ‫‪Low‬‬ ‫‪SSI, MSI‬‬

‫)‪nMOS (MOSFET‬‬ ‫‪Medium‬‬ ‫‪Medium‬‬ ‫‪SSI, MSI, VLSI‬‬

‫)‪CMOS (MOSFET‬‬ ‫‪Low‬‬ ‫‪Medium‬‬ ‫‪SSI, MSI, LSI, VLSI‬‬

‫)‪GaAs (MOSFET‬‬ ‫‪High‬‬ ‫‪High‬‬ ‫‪SSI, MSI, LSI‬‬

‫اﳉﺪول‪ 3-1‬اﻟﺘﻘﻨﻴﺎت اﳌﺴﺘﺨﺪﻣﺔ ﰲ ﺑﻨﺎء اﻟﺪارات اﳌﺘﻜﺎﻣﻠﺔ‬

‫إن اﻟﺘﻄﻮر اﻟﺬي ﺣﺼﻞ ﺧﻼل ‪ 40‬ﻋﺎﻣﺎً ‪ -‬اﺑﺘﺪاءً ﻣﻦ اﻟﻌﺎم ‪ 1971‬وﺣﱴ ﻋﺎم ‪ - 2010‬أدى إﱃ اﻧﺘﻘﺎل ﻣﺴﺘﻮى ﺗﻘﻨﻴﺔ اﻟﺘﺼﻨﻴﻊ ﻣﻦ اﳊﺠﻢ‬
‫‪ 10µm‬إﱃ اﳊﺠﻢ ‪ 32nm‬ﻟﻠﺨﻠﻴﺔ اﻟﱰاﻧﺰﺳﺘﻮرﻳﺔ ﻋﻠﻰ اﳌﺴﺘﻮى اﻟﺴﻴﻠﻴﻜﻮﱐ‪ ،‬وﺑﺎﻟﺘﺎﱄ ﺗﻀﺎﻋﻒ ﻋﺪد اﻟﱰاﻧﺰﺳﺘﻮرات ﻋﻠﻰ اﻟﺸﺮﳛﺔ اﻟﻮاﺣﺪة‬
‫ﲝﻮاﱄ ‪ 1000‬ﻣﺮة! اﻟﺸﻜﻞ‪ 13-1‬ﻳﺒﲔ اﻟﺸﺮﳛﺔ اﻟﺴﻴﻠﻴﻜﻮﻧﻴﺔ ﻟﻠﻤﻌﺎﰿ ‪ Intel-4004‬واﻟﱵ ﰎ إﻧﺘﺎﺟﻬﺎ ﰲ ﻋﺎم ‪ 1970‬ﻋﻠﻰ ﺷﺮﳛﺔ ﺳﻴﻠﻴﻜﻮﻧﻴﺔ‬
‫ﲟﺴﺎﺣﺔ ‪ 10um‬ﻣﻘﺎرﻧﺔً ﻣﻊ ﺣﺠﻤﻬﺎ ﰲ ﻋﺎم ‪ 2010‬ﲟﺴﺎﺣﺔ ‪ .32nm‬اﻟﺸﻜﻞ‪ 14-1‬ﻳﺒﲔ اﳋﻂ اﻟﺰﻣﲏ ﻟﺘﻄﻮر ﺗﻘﻨﻴﺔ ﺗﺼﻨﻴﻊ اﻟﺪارات‬
‫اﳌﺘﻜﺎﻣﻠﺔ‪.‬‬

‫اﻟﺸﻜﻞ‪ 13-1‬ﺣﺠﻢ اﻟﺸﺮﳛﺔ اﻟﺴﻴﻠﻴﻜﻮﻧﻴﺔ ﻣﻊ ﺗﻄﻮر ﺗﻘﻨﻴﺔ اﻟﺘﺼﻨﻴﻊ ﻣﻦ اﻟﻌﺎم ‪ 1970‬وﺣﱴ ‪2014‬‬

‫إن ﻣﺘﻮﺳﻂ ﻧﺼﻒ ﺣﺠﻢ اﻟﱰاﻧﺰﺳﺘﻮر ﻋﻠﻰ اﻟﺸﺮﳛﺔ اﻟﺴﻴﻠﻴﻜﻮﻧﻴﺔ ﻳﻄﻠﻖ ﻋﻠﻴﻪ ﺑـ‪ Process Technology‬وﻫﻮ اﻟﺬي ﻳﺘﻀﺎﻋﻒ وﻓﻖ ﻗﺎﻧﻮن‬
‫‪ Moor‬ﻛﻞ ﺳﻨﺘﲔ‪ .‬ﻓﻤﺜﻼً ﻣﻦ أﺟﻞ ﺗﻘﻨﻴﺔ اﻟﺘﺼﻨﻴﻊ ‪ 65nm‬ﻓﺈن ﻋﺸﺮات اﻵﻻف ﻣﻦ اﻟﱰاﻧﺰﺳﺘﻮرات ﳝﻜﻦ أن ﺗﺘﺴﻊ ﰲ ﻣﺴﺎﺣﺔ ﺗﻌﺎدل‬
‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪16‬‬
‫‪21‬‬ ‫‪Chapter 1‬‬ ‫اﻟﻔﺼﻞ اﻷول |‬

‫ﻣﺴﺎﺣﺔ ﺧﻠﻴﺔ دم ﲪﺮاء – ﳝﻜﻦ ﻟﻌﺸﺮ ﻣﻼﻳﲔ ﺗﺮاﻧﺰﺳﺘﻮر أن ﺗﺘﺴﻊ ﰲ ﻣﺴﺎﺣﺔ ﺗﻌﺎدل ‪ .1mm2‬اﻟﺸﻜﻞ‪ 15-1‬ﻳﺒﲔ ﺻﻮرة ﻣﻴﻜﺮوﻳﺔ ﻟﱰاﻧﺰﺳﺘﻮر‬
‫ﻋﻠﻰ اﻟﺸﺮﳛﺔ اﻟﺴﻴﻠﻴﻜﻮﻧﻴﺔ ﻟﻠﻤﻌﺎﰿ ‪ Intel-Quad-core‬ﻳﻌﺘﻤﺪ ﺗﻘﻨﻴﺔ ‪ 65nm‬وﳒﺪ أن ﻣﺘﻮﺳﻂ ﻧﺼﻒ ﺣﺠﻢ اﳌﺴﺎﺣﺔ ﻫﻮ ‪.35nm‬‬

‫اﻟﺸﻜﻞ‪ 14-1‬اﳌﻨﺤﲏ اﻟﺰﻣﲏ ﻟﺘﻄﻮر ﺗﻘﻨﻴﺔ ﺗﺼﻨﻴﻊ اﻟﺪارات اﳌﺘﻜﺎﻣﻠﺔ‬

‫اﻟﺸﻜﻞ‪ 15-1‬ﺗﺮاﻧﺰﺳﺘﻮر ﻋﻠﻰ ﻣﻘﻄﻊ ﺷﺮﳛﺔ ﺳﻴﻠﻴﻜﻮﻧﻴﺔ ﻳﻌﺘﻤﺪ ﺗﻘﻨﻴﺔ اﻟﺘﺼﻨﻴﻊ ‪65nm‬‬

‫‪ 15-1‬أﺻﻨﺎف اﻟﺪارات اﻟﻤﺘﻜﺎﻣﻠﺔ اﻟﺮﻗﻤﻴﺔ )‪:(Digital Integrated Circuit Classes‬‬

‫ﻓﻴﻤﺎ ﻳﻠﻲ ﺗﻔﺼﻴﻞ ﻣﻘﺘﻀﺐ ﻟﻔﺮوع اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ وﺧﻮاﺻﻬﺎ ﻳﻮﻓﺮ ﻋﻠﻰ اﻟﺒﺎﺣﺚ واﻟﺪارس اﳋﻮض ﰲ ﻣﺌﺎت اﳌﺮاﺟﻊ‪.‬‬

‫ﺑﺸﻜﻞ ﻋﺎم‪ ،‬ﺗﺼﻨﻒ ﺣﻠﻮل اﻟﺪارات اﳌﺘﻜﺎﻣﻠﺔ اﻟﺮﻗﻤﻴﺔ ﺿﻤﻦ ﻓﺮوع رﺋﻴﺴﻴﺔ ﺛﻼث‪:‬‬
‫‪ -1‬اﻟﺪارات اﳌﺘﻜﺎﻣﻠﺔ اﻟﻘﻴﺎﺳﻴﺔ )‪.(Standard Logic ICs‬‬
‫‪ -2‬اﻟﺪارات اﳌﺘﻜﺎﻣﻠﺔ ذات اﻟﺘﻄﺒﻴﻘﺎت اﻟﻌﺎﻣﺔ )‪.(General Purposes ICs‬‬
‫‪ -3‬اﻟﺪارات اﳌﺘﻜﺎﻣﻠﺔ ذات اﻟﺘﻄﺒﻴﻘﺎت اﳋﺎﺻﺔ )‪.(Special Purposes ICs‬‬

‫ﻓﻤﻨﻬﺎ ﻣﺎ ﻫﻮ ﻏﲑ ﻗﺎﺑﻞ ﻟﻠﱪﳎﺔ‪ ،‬وﻣﻨﻬﺎ ﻣﺎ ﻫﻮ ﻗﺎﺑﻞ ﻟﻠﱪﳎﺔ ﻋﻠﻰ ﻣﺴﺘﻮى اﻟﺘﻌﻠﻴﻤﺎت اﻟﱪﳎﻴﺔ )‪ ،(Software‬وﻣﻨﻬﺎ ﻣﺎ ﻫﻮ ﻗﺎﺑﻞ ﻟﻠﱪﳎﺔ ﻋﻠﻰ‬
‫ﻣﺴﺘﻮى اﻟﻜﻴﺎن اﻟﺼﻠﺐ )‪ .(Hardware‬اﻟﺸﻜﻞ‪ 16-1‬ﻳﺒﲔ اﻟﻔﺮوع اﻟﺮﺋﻴﺴﺔ ﻟﻠﺪارات اﳌﺘﻜﺎﻣﻠﺔ اﻟﺮﻗﻤﻴﺔ‪.‬‬

‫‪17‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Embedded Systems‬‬ ‫اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ |‬

‫‪Digital ICs‬‬
‫‪Semiconductors Solution‬‬

‫‪General Purposes‬‬ ‫‪Standard Logic‬‬ ‫‪Special Purposes‬‬

‫‪SW Programmable‬‬ ‫‪HW Programmable‬‬ ‫‪Glue‬‬ ‫‪DSP‬‬ ‫‪SoC‬‬ ‫‪ASSP‬‬ ‫‪ASIC‬‬

‫‪Logic‬‬
‫‪ICs‬‬
‫‪MCU‬‬ ‫‪MPU‬‬ ‫‪PLD‬‬ ‫‪FPGA‬‬

‫اﻟﺸﻜﻞ‪ 16-1‬اﻟﻔﺮوع اﻟﺮﺋﻴﺴﺔ ﻟﻠﺪارات اﳌﺘﻜﺎﻣﻠﺔ اﻟﺮﻗﻤﻴﺔ‬

‫إن ﻫﺬا اﻟﺘﺼﻨﻴﻒ ﳝﺜﻞ ﺗﺼﻨﻴﻔﺎً ﻋﺎﻣﺎً إذ ﳝﻜﻦ أن ﻳﻮﺟﺪ ﺗﺼﻨﻴﻔﺎت ﻓﺮﻋﻴﺔ أﺧﺮى ﺗﺼﻨﻒ ﺑﺄ�ﺎ دارات ﻣﺘﻜﺎﻣﻠﺔ ﻣﺘﺨﺼﺼﺔ اﻟﺘﻄﺒﻴﻘﺎت أو ﻋﺎﻣﺔ‬
‫اﻟﺘﻄﺒﻴﻘﺎت؛ ﻓﻴﻤﺎ ﻳﻠﻲ ﻧﻔﺼﻞ ﰲ ﻫﺬﻩ اﻟﻔﺮوع‪.‬‬

‫‪ 1-15-1‬اﻟﺪارات اﳌﺘﻜﺎﻣﻠﺔ اﻟﻘﻴﺎﺳﻴﺔ )‪:(Standard Logic ICs‬‬

‫وﻫﻲ ﺷﺮاﺋﺢ ﻣﺘﻜﺎﻣﻠﺔ ذات وﻇﺎﺋﻒ ﻋﺎﻣﺔ ﰎ ﺗﺼﻤﻴﻤﻬﺎ ﻟﻮﻇﺎﺋﻒ ﳏﺪدة )‪ (Fixed Functionality‬ﻻ ﳝﻜﻦ ﺗﻐﻴﲑﻫﺎ وﻓﻘﺎً ﻟﻨﻤﻮذج ﻗﻴﺎﺳﻲ‬
‫ﻋﺎﳌﻲ‪ ،‬ﻛﻤﺎ أ�ﺎ ﻻ ﺗﻘﻮم ﺑﺄي ﻋﻤﻠﻴﺎت ﻣﻌﺎﳉﺔ )ﻻ ﲤﻠﻚ وﺣﺪة ﻣﻌﺎﳉﺔ(؛ ﻣﻦ ﺧﻼل رﺑﻂ اﻟﻌﺪﻳﺪ ﻣﻦ ﻫﺬﻩ اﻟﺪارات ﻣﻊ ﺑﻌﻀﻬﺎ اﻟﺒﻌﺾ ﳝﻜﻦ‬
‫اﳊﺼﻮل ﻋﻠﻰ دارة وﻇﻴﻔﻴﺔ ﻣﻨﻄﻘﻴﺔ‪ ،‬ﻛﻤﺎ أن أي ﺗﻐﻴﲑ ﰲ وﻇﻴﻔﺔ اﻟﺪارة ﳛﺘﺎج إﱃ إﻋﺎدة رﺑﻂ ﻫﺬﻩ اﻟﺪارات ﺑﺎﻟﻜﺎﻣﻞ‪ .‬ﻣﺜﺎﳍﺎ‪ :‬اﻟﺪارات اﳌﺘﻜﺎﻣﻠﺔ‬
‫ﻟﻠﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ )‪ (AND, NAND, OR, NOR, NOT‬ﻣﺜﻞ ﺷﺮاﺋﺢ اﻟﻌﺎﺋﻠﺔ ‪،(74HC595: Shift Register) 74xxxx‬‬

‫وﺷﺮاﺋﺢ اﻟﻌﺎﺋﻠﺔ ‪ ،(4018: Counter) 40xxxx‬وﺷﺮاﺋﺢ اﻟﺘﻮﻗﻴﺖ )‪ ،(NE555‬وﻏﲑﻫﺎ ﻣﻦ اﻟﺸﺮاﺋﺢ اﻟﻘﻴﺎﺳﻴﺔ اﻟﱵ ﺗﺼﻨﻊ ﻣﻦ ﻗﺒﻞ اﻟﻌﺪﻳﺪ‬
‫ﻣﻦ اﻟﺸﺮﻛﺎت‪.‬‬

‫‪ 2-15-1‬اﳌﻌﺎﳉﺎت اﳌﺼﻐﺮة ‪:(Microprocessors) MPU, µP‬‬

‫وﻫﻲ ﻣﻦ ﻓﺮوع اﻟﺪارات اﳌﺘﻜﺎﻣﻠﺔ ذات اﻷﻏﺮاض اﻟﻌﺎﻣﺔ )‪ .(General Purposes ICs‬ﲡﻤﻊ اﳌﻌﺎﳉﺎت اﳌﺼﻐﺮة ﻛﻞ وﻇﺎﺋﻒ وﺣﺪة اﳌﻌﺎﳉﺔ‬
‫اﳌﺮﻛﺰﻳﺔ ‪ CPU‬ﰲ دارة ﻣﺘﻜﺎﻣﻠﺔ واﺣﺪة]‪ ،[92‬وﻳﺘﻢ ﺑﺮﳎﺘﻬﺎ ﻣﻦ أﺟﻞ ﺗﻄﺒﻴﻖ ﺧﺎص ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت ﺑﺮﳎﻴﺔ ﳐﺼﺼﺔ ﻟﺘﻄﺒﻴﻘﺎت اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ‬
‫)‪.(Embedded Systems Programming Languages‬‬

‫ﺗﺼﻨﻒ اﳌﻌﺎﳉﺎت اﳌﺼﻐﺮة ﻣﻦ ﺣﻴﺚ اﻻﺳﺘﺨﺪام إﱃ ﻧﻮﻋﲔ رﺋﻴﺴﻴﲔ‪:‬‬

‫‪ -‬ﻣﻌﺎﳉﺎت اﻷﻏﺮاض اﻟﻌﺎﻣﺔ‪.‬‬
‫‪ -‬ﻣﻌﺎﳉﺎت اﻷﻏﺮاض اﳋﺎﺻﺔ‪.‬‬

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‫‪21‬‬ ‫‪Chapter 1‬‬ ‫اﻟﻔﺼﻞ اﻷول |‬

‫‪ 1-2-15-1‬ﻣﻌﺎﳉﺎت اﻷﻏﺮاض اﻟﻌﺎﻣﺔ ‪:(General Purpose Processor) GPP‬‬

‫ﰲ ﻋﺎم ‪ 1970‬ﻇﻬﺮ اﳌﻌﺎﰿ ‪ Intel 4004‬ذو ﻧﺎﻗﻞ ﺑﻌﺮض ‪ 4-Bit‬واﺳﺘﺨﺪم ﰲ ﺗﺼﻤﻴﻤﻪ ‪ 2300‬ﺗﺮاﻧﺰﺳﺘﻮر وﻗﺪ ﺗﻀﻤﻦ ذاﻛﺮة ‪RAM‬‬

‫وذاﻛﺮة ‪ ROM‬ووﺣﺪة ﻣﻌﺎﳉﺔ ﻣﺮﻛﺰﻳﺔ ﺑﱰدد ﻋﻤﻞ ‪ ،108KHz‬اﺳﺘﺨﺪم ﻫﺬا اﳌﻌﺎﰿ ﺑﺸﻜﻞ رﺋﻴﺴﻲ ﰲ اﻵﻻت اﳊﺎﺳﺒﺔ‪ ،‬وﻳﻌﺘﱪ أول ﻣﻌﺎﰿ‬
‫ﻣﺼﻐﺮ]‪ ،[93-95‬وﻗﺪ ﺑﻠﻎ ﺳﻌﺮﻩ آﻻف اﻟﺪوﻻرات]‪ .[96‬ﰲ ﻋﺎم ‪ 1974‬أﻋﻠﻨﺖ ﺷﺮﻛﺔ ‪ Intel‬ﻋﻦ أول ﻣﻌﺎﰿ ﻟﻸﻏﺮاض اﻟﻌﺎﻣﺔ )‪ (GPP‬وﻫﻮ‬
‫اﳌﻌﺎﰿ ‪ 8080‬ﺑﻌﺮض ﻧﺎﻗﻞ ‪ ،8-Bit‬واﺳﺘﺨﺪم ﰲ ﺗﺼﻤﻴﻤﻪ ‪ 4500‬ﺗﺮاﻧﺰﺳﺘﻮر ووﺻﻠﺖ ﺳﺮﻋﺔ ﺗﻨﻔﻴﺬﻩ إﱃ ‪ 290000‬ﺗﻌﻠﻴﻤﺔ ﰲ اﻟﺜﺎﻧﻴﺔ ﻋﻨﺪ ﺗﺮدد‬
‫ﻋﻤﻞ ‪ ،2MHz‬وﺗﻀﻤﻦ أﻳﻀﺎً ‪ 64KB‬ﻣﻦ اﻟﺬاﻛﺮة اﳌﻌﻨﻮﻧﺔ وأﺻﺒﺢ اﳌﻌﺎﰿ ‪ 8080‬ﻣﻌﻴﺎراً ﺻﻨﺎﻋﻴﺎً وﺑﻠﻎ ﺳﻌﺮﻩ ‪ $395‬واﺳﺘﺨﺪم ﰲ ﺑﻨﺎء أول‬
‫ﺣﺎﺳﺐ ﺷﺨﺼﻲ‪ .‬ﻣﻨﺬ ذاك اﳊﲔ ﺗﻄﻮرت ﻣﻌﺎﳉﺎت اﻷﻏﺮاض اﻟﻌﺎﻣﺔ – ﺳﺮﻋﺔً وأداءً – ﻓﻈﻬﺮت اﳌﻌﺎﳉﺎت ذات ﻋﺮض اﻟﻨﺎﻗﻞ ‪16-Bit‬‬

‫)‪ ،(Intel 8086‬وﻣﻌﺎﳉﺎت ‪ ،(Intel/AMD x86) 32-bit‬وﻣﻌﺎﳉﺎت ‪ ،(Intel/AMD x64) 64-Bit‬ﻛﻤﺎ ﻇﻬﺮت ﻣﺆﺧﺮاً اﳌﻌﺎﳉﺎت‬
‫ﻣﺘﻌﺪدة اﻟﻨﻮى )‪ (multi-core‬ﻟﺘﺴﻴﻄﺮ ﻋﻠﻰ ﻣﺴﺘﻘﺒﻞ ﺻﻨﺎﻋﺔ اﳌﻌﺎﳉﺎت‪ .‬اﻟﺸﻜﻞ‪ 17-1‬ﻳﺒﲔ اﻟﺒﻨﻴﺔ اﻟﺪاﺧﻠﻴﺔ )ﻋﻠﻰ اﻟﻴﻤﻦ( واﳋﺮﻳﻄﺔ‬
‫اﻟﺴﻴﻠﻴﻜﻮﻧﻴﺔ )ﻋﻠﻰ اﻟﻴﺴﺎر( ﻟﻠﻤﻌﺎﰿ ‪ .Intel® 4004‬اﻟﺸﻜﻞ‪ 18-1‬ﻳﺒﲔ ﺷﺮﳛﺔ اﳌﻌﺎﰿ ‪.Intel® 4004‬‬

‫اﻟﺸﻜﻞ‪ 17-1‬اﻟﺒﻨﻴﺔ اﻟﺪاﺧﻠﻴﺔ واﳋﺮﻳﻄﺔ اﻟﺴﻴﻠﻴﻜﻮﻧﻴﺔ ﻟﻠﻤﻌﺎﰿ ‪1970 - Intel® 4004‬‬

‫اﻟﺸﻜﻞ‪ 18-1‬ﺷﺮﳛﺔ اﳌﻌﺎﰿ ‪ Intel® 4004‬ذو ﻧﺎﻗﻞ ﺑﻌﺮض ‪ 4-Bit‬وﳛﻮي ﻋﻠﻰ ‪ 2300‬ﺗﺮاﻧﺰﺳﺘﻮر‬

‫اﻟﺸﻜﻞ‪ 19-1‬ﻳﺒﲔ اﻟﺒﻨﻴﺔ اﻟﺪاﺧﻠﻴﺔ )ﻋﻠﻰ اﻟﻴﻤﻦ( واﳋﺮﻳﻄﺔ اﻟﺴﻴﻠﻴﻜﻮﻧﻴﺔ )ﻋﻠﻰ اﻟﻴﺴﺎر( ﻟﻠﻤﻌﺎﰿ ‪ .Intel®8085‬أﻳﻀﺎً اﻟﺸﻜﻞ‪ 20-1‬ﻳﺒﲔ‬
‫ﺷﺮﳛﺔ اﳌﻌﺎﰿ ‪ Intel®8085‬اﻟﺬي ﰎ إﻧﺘﺎﺟﻪ ﰲ ﻋﺎم ‪ 1976‬وﳛﻮي ﻋﻠﻰ ‪ 4500‬ﺗﺮاﻧﺰﺳﺘﻮر وﻳﻌﻤﻞ ﺑﱰدد ‪ .3MHz‬اﻟﺸﻜﻞ‪ 20-1‬ﻳﺒﲔ‬
‫ﺷﺮﳛﺔ اﳌﻌﺎﰿ ‪ Intel®8086‬ذو ﻧﺎﻗﻞ ﺑﻴﺎﻧﺎت ﺑﻌﺮض ‪ 16-Bit‬وﰎ إﻧﺘﺎﺟﻪ ﰲ ﻋﺎم ‪ 1978‬وﳛﻮي ﻋﻠﻰ ‪ 29000‬ﺗﺮاﻧﺰﺳﺘﻮر وﻳﻌﻤﻞ ﺑﱰدد‬
‫‪.5MHz‬‬

‫‪19‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Embedded Systems‬‬ ‫اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ |‬

‫اﻟﺸﻜﻞ‪ 19-1‬اﻟﺒﻨﻴﺔ اﻟﺪاﺧﻠﻴﺔ واﳋﺮﻳﻄﺔ اﻟﺴﻴﻠﻴﻜﻮﻧﻴﺔ ﻟﻠﻤﻌﺎﰿ ‪1976 - Intel® 8085‬‬

‫اﻟﺸﻜﻞ‪ 20-1‬ﺷﺮﳛﺔ اﳌﻌﺎﰿ ‪ Intel® 8085‬ذو ﻧﺎﻗﻞ ﺑﻌﺮض ‪ 8-Bit‬وﳛﻮي ﻋﻠﻰ ‪ 4500‬ﺗﺮاﻧﺰﺳﺘﻮر‬

‫اﻟﺸﻜﻞ‪ 21-1‬ﻳﺒﲔ اﻟﺒﻨﻴﺔ اﻟﺪاﺧﻠﻴﺔ )ﻋﻠﻰ اﻟﻴﻤﻦ( واﳋﺮﻳﻄﺔ اﻟﺴﻴﻠﻴﻜﻮﻧﻴﺔ )ﻋﻠﻰ اﻟﻴﺴﺎر( ﻟﻠﻤﻌﺎﰿ ‪.Intel®8086‬‬

‫اﻟﺸﻜﻞ‪ 21-1‬ﺷﺮﳛﺔ اﳌﻌﺎﰿ ‪ Intel® 8086‬ذو ﻧﺎﻗﻞ ﺑﻌﺮض ‪ 16-Bit‬وﳛﻮي ﻋﻠﻰ ‪ 29000‬ﺗﺮاﻧﺰﺳﺘﻮر‬

‫اﻟﺸﻜﻞ‪ 22-1‬اﻟﺒﻨﻴﺔ اﻟﺪاﺧﻠﻴﺔ واﳋﺮﻳﻄﺔ اﻟﺴﻴﻠﻴﻜﻮﻧﻴﺔ ﻟﻠﻤﻌﺎﰿ ‪1978 – Intel® 8086‬‬

‫اﻟﺸﻜﻞ‪ 23-1‬ﻳﺒﲔ ﺷﺮﳛﺔ اﳌﻌﺎﰿ ‪ Intel®P4‬ذو ﻧﺎﻗﻞ ﺑﻴﺎﻧﺎت ﺑﻌﺮض ‪ ،32-Bit‬وﰎ إﻧﺘﺎﺟﻪ ﰲ ﻋﺎم ‪ ،2000‬وﳛﻮي ﻋﻠﻰ ‪ 125‬ﻣﻠﻴﻮن‬
‫ﺗﺮاﻧﺰﺳﺘﻮر‪ ،‬وﻳﻌﻤﻞ ﺑﱰدد ‪ .1,3~3,8GHz‬اﻟﺸﻜﻞ‪ 24-1‬ﻳﺒﲔ اﻟﺒﻨﻴﺔ اﻟﺪاﺧﻠﻴﺔ )ﻋﻠﻰ اﻟﻴﻤﻦ( واﳋﺮﻳﻄﺔ اﻟﺴﻴﻠﻴﻜﻮﻧﻴﺔ )ﻋﻠﻰ اﻟﻴﺴﺎر( ﻟﻠﻤﻌﺎﰿ‬
‫‪.Intel®P4‬‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪20‬‬
‫‪21‬‬ ‫‪Chapter 1‬‬ ‫اﻟﻔﺼﻞ اﻷول |‬

‫اﻟﺸﻜﻞ‪ 23-1‬ﺷﺮﳛﺔ اﳌﻌﺎﰿ ‪ Intel®P4‬ذو ﻧﺎﻗﻞ ﺑﻌﺮض ‪ 32-Bit‬وﳛﻮي ﻋﻠﻰ ‪ 125‬ﻣﻠﻴﻮن ﺗﺮاﻧﺰﺳﺘﻮر‬

‫اﻟﺸﻜﻞ‪ 24-1‬اﻟﺒﻨﻴﺔ اﻟﺪاﺧﻠﻴﺔ واﳋﺮﻳﻄﺔ اﻟﺴﻴﻠﻴﻜﻮﻧﻴﺔ ﻟﻠﻤﻌﺎﰿ ‪2000 – Intel®P4‬‬

‫اﻟﺸﻜﻞ‪ 25-1‬ﻳﺒﲔ ﺷﺮﳛﺔ اﳌﻌﺎﰿ ‪ Intel® i7‬ﻣﺘﻌﺪدة اﻟﻨﻮى )‪ (4-Core‬ذو ﻧﺎﻗﻞ ﺑﻴﺎﻧﺎت ﺑﻌﺮض ‪ ،64-Bit‬ﰎ إﻧﺘﺎﺟﻪ ﰲ ﻋﺎم ‪،2008‬‬
‫وﳛﻮي ﻋﻠﻰ ‪ 731‬ﻣﻠﻴﻮن ﺗﺮاﻧﺰﺳﺘﻮر]‪ ،[97‬وﻳﻌﻤﻞ ﺑﱰدد ‪ .1.6~3.47GHz‬اﻟﺸﻜﻞ‪ 26-1‬ﻳﺒﲔ ﲤﺜﻴﻞ اﻟﺒﻨﻴﺔ اﻟﺪاﺧﻠﻴﺔ اﻟﻌﺎﻣﺔ )ﻋﻠﻰ اﻟﻴﻤﻦ(‬
‫واﳋﺮﻳﻄﺔ اﻟﺴﻴﻠﻴﻜﻮﻧﻴﺔ )ﻋﻠﻰ اﻟﻴﺴﺎر( ﻟﻠﻤﻌﺎﰿ ‪.Intel® i7‬‬

‫اﻟﺸﻜﻞ‪ 25-1‬ﺷﺮﳛﺔ اﳌﻌﺎﰿ ‪ Intel®i7‬رﺑﺎﻋﻲ اﻟﻨﻮى وذو ﻧﺎﻗﻞ ﺑﻌﺮض ‪ 64-Bit‬وﳛﻮي ﻋﻠﻰ ‪ 731‬ﻣﻠﻴﻮن ﺗﺮاﻧﺰﺳﺘﻮر‬

‫اﻟﺸﻜﻞ‪ 26-1‬اﻟﺒﻨﻴﺔ اﻟﺪاﺧﻠﻴﺔ واﳋﺮﻳﻄﺔ اﻟﺴﻴﻠﻴﻜﻮﻧﻴﺔ ﻟﻠﻤﻌﺎﰿ ‪2008 – Intel®i7‬‬

‫ﺗﺘﺴﻢ اﻟﺘﻄﺒﻴﻘﺎت اﻟﱵ ﺗﺴﺘﺨﺪم اﳌﻌﺎﳉﺎت اﳌﺼﻐﺮة ﺑﺎﻟﺘﻌﻘﻴﺪ ﻋﻠﻰ ﻣﺴﺘﻮى اﻟﻜﻴﺎن اﻟﺼﻠﺐ واﻟﱪﳎﻲ‪ ،‬وذﻟﻚ ﻟﻜﻮن اﳌﻌﺎﰿ ﳛﻮي ﻋﻠﻰ وﻇﺎﺋﻒ‬
‫وﺣﺪة اﳌﻌﺎﳉﺔ اﳌﺮﻛﺰﻳﺔ )‪ (CPU‬وذاﻛﺮة اﻟﱪﻧﺎﻣﺞ )‪ (ROM‬ﻓﻘﻂ‪ ،‬وأﻣﺎ ﺑﺎﻗﻲ اﶈﻴﻄﻴﺎت ﻛﻮﺣﺪات اﻟﺘﻮﻗﻴﺖ وذاﻛﺮة اﳌﻌﻄﻴﺎت ‪RAM‬‬
‫‪21‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Embedded Systems‬‬ ‫اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ |‬

‫ووﺣﺪات اﳌﻘﺎﻃﻌﺎت وﻏﲑﻫﺎ‪ ،‬ﻓﺠﻤﻴﻌﻬﺎ ﻳﺘﻢ وﺻﻠﻬﺎ ﺧﺎرﺟﻴﺎً ﻋﱪ اﻟﻨﺎﻗﻞ اﻟﺮﺋﻴﺴﻲ )‪ ،(BUS‬ﻟﺬﻟﻚ ﻓﺈن ﻣﻌﺎﳉﺎت اﻷﻏﺮاض اﻟﻌﺎﻣﺔ ﺗﺴﺘﺨﺪم‬
‫ﻓﻘﻂ ﰲ اﳊﻮاﺳﺐ اﻟﺸﺨﺼﻴﺔ‪ ،‬وﻻ ﺗﺴﺘﺨﺪم ﰲ اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ‪ .‬اﻟﺸﻜﻞ‪ 27-1‬ﻳﺒﲔ ﳐﻄﻄﺎً ﺗﻮﺿﻴﺤﻴﺎً ﳌﻜﻮﻧﺎت اﳊﺎﺳﺐ اﻟﺮﺋﻴﺴﻴﺔ‪ ،‬ﺣﻴﺚ أن‬
‫اﳌﻌﺎﰿ اﳌﺼﻐﺮ ﻫﻮ اﻟﻌﻨﺼﺮ اﻟﺬي ﻳﻘﻮد ﲨﻴﻊ اﶈﻴﻄﻴﺎت اﻷﺧﺮى اﳌﺘﺼﻠﺔ ﻣﻌﻪ ﻋﱪ اﻟﻨﺎﻗﻞ اﻟﺮﺋﻴﺴﻲ أو ﻋﱪ ﻣﻨﺎﻓﺬ اﻹدﺧﺎل واﻹﺧﺮاج اﳋﺎرﺟﻴﺔ‪.‬‬
‫اﻟﺸﻜﻞ‪ 28-1‬ﻳﺒﲔ اﳌﺨﻄﻂ اﻟﺼﻨﺪوﻗﻲ ﳉﻬﺎز ﺣﺎﺳﺐ ﺷﺨﺼﻲ ﻳﺴﺘﺨﺪم اﳌﻌﺎﰿ اﳌﺼﻐﺮ ﻣﻦ اﳉﻴﻞ ‪.Intel-P3‬‬

‫اﻟﺸﻜﻞ‪ 27-1‬ﻣﻜﻮﻧﺎت اﳊﺎﺳﺐ اﻟﺮﺋﻴﺴﻴﺔ‬

‫اﻟﺸﻜﻞ‪ 28-1‬اﳌﺨﻄﻂ اﻟﺼﻨﺪوﻗﻲ ﻟﻨﻈﺎم ﻳﺴﺘﺨﺪم اﳌﻌﺎﰿ اﳌﺼﻐﺮ‬

‫‪ 2-2-15-1‬ﻣﻌﺎﳉﺎت اﻷﻏﺮاض اﳋﺎﺻﺔ ‪:(Special Purpose Processors) SPPs‬‬

‫ﺗﺼﻤﻢ ﻣﻌﺎﳉﺎت اﻷﻏﺮاض اﳋﺎﺻﺔ ﲝﻴﺚ ﺗﺆﻣﻦ ﺳﻌﺔ ﻣﻌﺎﳉﺔ ﻋﺎﻟﻴﺔ ووﻇﺎﺋﻒ ﳐﺼﺼﺔ ﻣﺘﻘﺪﻣﺔ‪ .‬ﻣﺜﺎﳍﺎ‪ :‬وﺣﺪة ﻣﻌﺎﳉﺔ اﻟﺮﺳﻮﻣﻴﺎت ‪GPU‬‬

‫)‪ .(Graphics Processing Unit‬اﻟﺸﻜﻞ‪ 29-1‬ﻳﺒﲔ اﳌﻌﺎﰿ واﳌﺨﻄﻂ اﻟﺼﻨﺪوﻗﻲ ﻟﻮﺣﺪة ﻣﻌﺎﳉﺔ اﻟﺮﺳﻮﻣﻴﺎت ‪NVIDIA nForce‬‬

‫‪.680i SLI‬‬

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‫‪21‬‬ ‫‪Chapter 1‬‬ ‫اﻟﻔﺼﻞ اﻷول |‬

‫اﻟﺸﻜﻞ‪ 29-1‬اﳌﺨﻄﻂ اﻟﺼﻨﺪوﻗﻲ ﻟﻮﺣﺪة ﻣﻌﺎﳉﺔ اﻟﺮﺳﻮﻣﻴﺎت ‪nForce 680i SLI‬‬

‫ﰲ ﻋﺎم ‪ 2001‬ﻗﺮرت ﺷﺮﻛﺔ ‪ Sony‬ﺑﺎﻟﺘﻌﺎون ﻣﻊ ﺷﺮﻛﺔ ‪ IBM‬وﺷﺮﻛﺔ ‪ Toshiba‬ﺗﻄﻮﻳﺮ ﻣﻌﺎﰿ ‪ Cell-Processor‬ﻋﺎﱄ اﻷداء‪ ،‬واﺳﺘﻤﺮ‬
‫ﺗﻄﻮﻳﺮ ﻫﺬا اﳌﻌﺎﰿ أرﺑﻊ ﺳﻨﻮات‪ ،‬وﰎ ﺻﺮف ﻣﺒﻠﻎ ‪ 400‬ﻣﻠﻴﻮن دوﻻر ﻋﻠﻰ أﲝﺎث اﻟﺘﻄﻮﻳﺮ‪ ،‬وﻳﺸﺎر إﻟﻴﻪ ﻋﺎدةً ﺑـ ‪Cell ) CBEA‬‬

‫‪. [98](Broadband Engine Architecture‬‬

‫ﻳﻀﻢ اﳌﻌﺎﰿ ‪ Cell-Processor‬ﻣﻌﺎﰿ أﻏﺮاض ﻋﺎﻣﺔ ﻣﻦ اﻟﻨﻮع ‪ 64-bit Power-PC Core‬ﻳﺴﻤﻰ ﺑـ ـ ‪ PPE‬إﺿﺎﻓﺔً إﱃ ﳎﻤﻮﻋﺔ‬
‫ﻣﻌﺎﳉﺎت ﻣﺆازرة ﻣﻦ اﳌﻌﺎﳉﺎت اﳋﺎﺻﺔ ﻣﻦ اﻟﻨﻮع ‪ SoCs‬ﻟﺘﺴﺮﻳﻊ اﻟﺮﺳﻮﻣﻴﺎت واﻟﻮﺳﺎﺋﻂ ﺗﺴﻤﻰ ﺑـ ‪ ،SPE‬ﻫﺬﻩ اﳌﻌﺎﳉﺎت اﳌﺆازرة ﻣﺘﺼﻠﺔ ﻣﻊ‬
‫اﻟﻮﺣﺪة اﻟﺮﺋﻴﺴﻴﺔ ‪ PPE‬ﻋﱪ ﻧﺎﻗﻞ ﻳﺴﻤﻰ ﺑـ‪ ،EIB‬وﻛﻼﳘﺎ ﻣﺘﺼﻞ ﻣﻊ ذاﻛﺮة اﻟﻨﻈﺎم ﻋﱪ ﻣﺘﺤﻜﻢ ﻳﺪﻋﻰ ﺑـ‪ DMIC‬اﻟﺬي ﻳﻠﺞ ذاﻛﺮة ﻣﻦ ﻧﻮع‬
‫‪ XDR‬ﺑﺴﻌﺔ ‪ ،25GB/s‬وﻛﺬﻟﻚ ﳝﻠﻚ وﺣﺪات إدﺧﺎل وإﺧﺮاج ﻣﻦ اﻟﻨﻮع ‪ FlexIO‬ذات ﺳﺮﻋﺔ ﺗﺼﻞ إﱃ ‪ ،76.8GBs‬واﻟﺘﺸﻐﻴﻞ اﻷول‬
‫ﳍﺬا اﳌﻌﺎﰿ ﻋﻨﺪ ﺗﺮدد ‪.[99]4GHz‬‬

‫‪Cell-Processor‬‬ ‫اﻟﺸﻜﻞ‪ 30-1‬اﳌﺨﻄﻂ اﻟﺼﻨﺪوﻗﻲ ﻟﻠﻤﻌﺎﰿ‬

‫ﻳﺘﻤﻴﺰ اﳌﻌﺎﰿ ‪ Cell-Processor‬ﺑﺎﻹﻣﻜﺎﻧﻴﺎت اﳍﺎﺋﻠﺔ ﰲ ﻣﻌﺎﳉﺔ اﻟﻌﻤﻠﻴﺎت اﳊﺴﺎﺑﻴﺔ اﳌﻌﻘﺪة‪ ،‬وﺧﺼﻮﺻﺎً اﻟﻔﺎﺻﻠﺔ اﻟﻌﺎﻣﻠﺔ )‪Floating-‬‬

‫‪ (point‬إﺿﺎﻓﺔً إﱃ اﻟﱪﳎﺔ اﳌﻮزﻋﺔ واﳌﺘﻌﺪدة اﳌﻬﺎم‪ ،‬وﺣﺎﻟﻴﺎً ﻳﺴﺘﺨﺪم ﻫﺬا اﳌﻌﺎﰿ ﰲ ﺟﻬﺎز ‪ Playstation3‬وﳝﻠﻚ ‪ .9-core‬اﻟﺸﻜﻞ‪30-1‬‬

‫ﻳﺒﲔ اﳌﺨﻄﻂ اﻟﺼﻨﺪوﻗﻲ ﻟﻠﻤﻌﺎﰿ ‪ [100]Cell-Processor‬اﳌﺴﺘﺨﺪم ﰲ ﺟﻬﺎز ‪ .Playstation3‬اﻟﺸﻜﻞ‪ 31-1‬ﻳﺒﲔ اﳋﺮﻳﻄﺔ اﻟﺴﻴﻠﻴﻜﻮﻧﻴﺔ‬
‫ﻟﻠﻤﻌﺎﰿ ‪.Cell-Processor‬‬

‫‪23‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Embedded Systems‬‬ ‫اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ |‬

‫‪Cell-Processor‬‬ ‫اﻟﺸﻜﻞ‪ 31-1‬اﳋﺮﻳﻄﺔ اﻟﺴﻴﻠﻴﻜﻮﻧﻴﺔ ﻟﻠﻤﻌﺎﰿ‬

‫‪ 3-2-15-1‬ﻣﻌﻴﺎرﻳﺔ ﺗﺼﻤﻴﻢ ﺑﻨﻴﺔ اﳌﻌﺎﳉﺎت )‪:(CPUs Architecture Design Standard‬‬

‫ﻌﺮف اﳌﻌﻴﺎرﻳﺔ ﺑﺄ�ﺎ اﻟﻄﺮﻳﻘﺔ اﻟﱵ ﻳﺘﻌﺎﻣﻞ ﻬﺑﺎ اﳌﻌﺎﰿ ﻣﻊ اﻟﺬاﻛﺮة ﰲ ﺟﻠﺐ وﺗﻨﻔﻴﺬ اﻟﺘﻌﻠﻴﻤﺎت وﲣﺰﻳﻦ اﻟﺒﻴﺎﻧﺎت‪ ،‬وﻳﻮﺟﺪ ﻣﻌﻴﺎرﻳﺘﲔ أﺳﺎﺳﻴﺘﲔ ﰲ‬
‫ﺗﺼﻤﻴﻢ اﳌﻌﺎﳉﺎت]‪:[101-103‬‬
‫‪ -‬ﻣﻌﻴﺎرﻳﺔ ‪.Harvard‬‬
‫‪ -‬ﻣﻌﻴﺎرﻳﺔ ‪.Von-Neumann‬‬

‫‪ 1-3-2-15-1‬ﻣﻌﻴﺎرﻳﺔ ‪:Von-Neumann‬‬
‫ﺗﻌﺘﻤﺪ ﻫﺬﻩ اﳌﻌﻴﺎرﻳﺔ ﻋﻠﻰ اﳌﻌﺎﰿ وﻧﺎﻗﻞ وﺣﻴﺪ ﻟﻨﻘﻞ اﻟﺘﻌﻠﻴﻤﺎت واﻟﺒﻴﺎﻧﺎت ﺑﲔ اﻟﺬاﻛﺮة ووﺣﺪة اﳌﻌﺎﳉﺔ‪ ،‬وﺑﺎﻟﺘﺎﱄ ﺳﻮف ﳛﺘﺎج إﱃ ﻧﺒﻀﺎت‬
‫ﺗﻮﻗﻴﺖ أﻛﺜﺮ ﻣﻦ أﺟﻞ ﺗﻨﻔﻴﺬ ﻋﻤﻠﻴﺔ واﺣﺪة‪ ،‬ﻟﺬﻟﻚ ﺗﺘﺼﻒ ﻫﺬﻩ اﻟﻨﻈﻢ ﺑﻜﻮ�ﺎ ﺑﻄﻴﺌﺔ ﻧﺴﺒﻴﺎً‪ ،‬ﻣﺒﺪأ ﻋﻤﻠﻬﺎ ﻳﺘﻠﺨﺺ ﲟﺎ ﻳﻠﻲ‪:‬‬
‫ﻳﻘﻮم اﳌﻌﺎﰿ ﲜﻠﺐ اﻟﺘﻌﻠﻴﻤﺎت ﻣﻦ اﻟﺬاﻛﺮة‪.‬‬ ‫‪-1‬‬
‫ﻳﻘﻮم ﺑﻘﺮاءة اﻟﺒﻴﺎﻧﺎت ﻣﻦ اﻟﺬاﻛﺮة‪.‬‬ ‫‪-2‬‬
‫إﺟﺮاء اﻟﻌﻤﻠﻴﺎت ﻋﻠﻰ اﻟﺒﻴﺎﻧﺎت‪.‬‬ ‫‪-3‬‬
‫إﻋﺎدة ﻛﺘﺎﺑﺔ ﺗﻠﻚ اﻟﺒﻴﺎﻧﺎت ﻋﻠﻰ اﻟﺬاﻛﺮة‪.‬‬ ‫‪-4‬‬

‫اﻟﺸﻜﻞ‪ 32-1‬ﻣﻌﻴﺎرﻳﺔ ‪ Von-Neumann‬وﻃﺮﻳﻘﺔ رﺑﻂ اﳌﻌﺎﰿ ﻣﻊ اﻟﺬاﻛﺮة‬

‫‪ 2-3-2-15-1‬ﻣﻌﻴﺎرﻳﺔ ‪:Harvard‬‬
‫ﺗﺘﻜﻮن ﻫﺬﻩ اﳌﻌﻴﺎرﻳﺔ ﻣﻦ اﳌﻌﺎﰿ وﻧﺎﻗﻠﲔ ﻣﻨﻔﺼﻠﲔ أﺣﺪﳘﺎ ﻟﻨﻘﻞ‬
‫اﻟﺘﻌﻠﻴﻤﺎت واﻵﺧﺮ ﻟﻨﻘﻞ اﻟﺒﻴﺎﻧﺎت‪ ،‬وﲣﺘﻠﻒ ذاﻛﺮة اﻟﺒﻴﺎﻧﺎت ﻋﻦ‬
‫ذاﻛﺮة اﻟﺘﻌﻠﻴﻤﺎت ﺣﻴﺚ أن ﻟﻜﻞ ذاﻛﺮة ﺧﻄﻮط ﻋﻨﻮﻧﺔ وﲢﻜﻢ‬
‫وﳑﺮ ﻣﻌﻄﻴﺎت ﳐﺘﻠﻔﺔ‪ ،‬وﺑﺎﻟﺘﺎﱄ ﻓﺈن ﻋﻤﻠﻴﺔ ﻗﺮاءة اﻟﺘﻌﻠﻴﻤﺎت‬
‫واﻟﺒﻴﺎﻧﺎت ﺗﺘﻢ ﰲ ﻧﻔﺲ اﻟﻮﻗﺖ‪ ،‬وﺳﺘﻜﻮن ﺳﺮﻋﺔ اﻟﺘﻨﻔﻴﺬ أﻛﱪ‪.‬‬
‫اﻟﺸﻜﻞ‪ 33-1‬ﻣﻌﻴﺎرﻳﺔ ‪ Harvard‬وﻃﺮﻳﻘﺔ رﺑﻂ اﳌﻌﺎﰿ ﻣﻊ اﻟﺬاﻛﺮة‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪24‬‬
‫‪21‬‬ ‫‪Chapter 1‬‬ ‫اﻟﻔﺼﻞ اﻷول |‬

‫‪ 4-2-15-1‬ﺑﲎ ﻣﺴﺠﻼت اﻟﺘﻌﻠﻴﻤﺎت ﰲ اﳌﻌﺎﳉﺎت )‪:(CPUs Instruction Set Architectures‬‬

‫ﺣﱴ ﻣﻨﺘﺼﻒ اﻟﺜﻤﺎﻧﻴﻨﺎت ﰲ اﻟﻘﺮن اﻟﺴﺎﺑﻖ ﻛﺎن اﻟﺘﻮﺟﻪ اﻟﺴﺎﺋﺪ ﰲ ﻋﺎﱂ ﺻﻨﺎﻋﺔ اﳌﻌﺎﳉﺎت ﻫﻮ ﺑﻨﺎء ﻣﻌﺎﳉﺎت ذات ﺗﻌﻠﻴﻤﺎت أﻋﻘﺪ وأﻛﺜﺮ ﻋﺪداً‬
‫ﺑﺪف ﺗﺴﻬﻴﻞ ﻋﻤﻠﻴﺔ اﻟﱪﳎﺔ‪ ،‬وﻟﻜﻦ ﰲ ﺗﻠﻚ اﻷﺛﻨﺎء ﻇﻬﺮ ﺗﻮﺟﻪ آﺧﺮ ﻣﻌﺎﻛﺲ ﲤﺎﻣﺎً‪ ،‬وﻫﻮ اﻟﺴﻌﻲ ﻟﺒﻨﺎء ﻣﻌﺎﳉﺎت ذات ﺗﻌﻠﻴﻤﺎت ﺑﺴﻴﻄﺔ‬
‫وﳏﺪودة اﻟﻌﺪد ﳝﻜﻦ ﺗﻨﻔﻴﺬﻫﺎ ﺑﺴﺮﻋﺎت ﻋﺎﻟﻴﺔ ﺟﺪاً‪.‬‬

‫ﺗﻘﺴﻢ ﺑﲎ ﻣﺴﺠﻼت اﻟﺘﻌﻠﻴﻤﺎت ﰲ اﳌﻌﺎﳉﺎت إﱃ ﺛﻼث ﺑﲎ أﺳﺎﺳﻴﺔ]‪:[104-106‬‬

‫‪.(300 ~ 3000 Instruction) CISC -1‬‬

‫‪.(50 ~ 200 Instruction) RISC -2‬‬
‫‪.(15 ~ 30 Instruction) MISC -3‬‬

‫‪ 1-4-2-15-1‬اﻟﺒﻨﻴﺔ ‪:CISC‬‬
‫وﻫﻲ ﳎﻤﻮﻋﺔ أواﻣﺮ اﳊﺎﺳﺐ اﳌﻌﻘﺪة "‪"Complex Instruction Set Computer‬؛ ﻣﻌﻈﻢ ﻣﻌﺎﳉﺎت اﳊﻮاﺳﺐ اﻟﺸﺨﺼﻴﺔ ﺗﺴﺘﺨﺪم‬
‫ﻣﻌﻤﺎرﻳﺔ ‪ ،CISC‬واﻟﱵ ﺗﺪﻋﻢ ﳎﻤﻮﻋﺔ ﺗﻌﻠﻴﻤﺎت ﻗﺪ ﻳﺼﻞ ﻋﺪدﻫﺎ إﱃ ‪ 3000‬ﺗﻌﻠﻴﻤﺔ أو أﻛﺜﺮ‪.‬‬

‫اﻟﺪاﻓﻊ اﻷﺳﺎﺳﻲ ﳍﺬﻩ اﻟﺘﻘﻨﻴﺔ ﻫﻮ ﲣﻔﻴﺾ اﻟﺘﻜﻠﻔﺔ اﻟﻌﺎﻣﺔ ﻟﻠﺤﻮاﺳﺐ‪ ،‬وذﻟﻚ ﻋﻦ ﻃﺮﻳﻖ ﺟﻌﻞ اﻟﱪﳎﺔ – وﻫﻲ اﻟﻌﻨﺼﺮ اﻷﻛﺜﺮ ﺗﻜﻠﻔﺔ ﰲ أي‬
‫ﻧﻈﺎم ﺣﺎﺳﻮﰊ – أﻛﺜﺮ ﺳﻬﻮﻟﺔ وﺑﺎﻟﺘﺎﱄ أﻗﻞ ﺗﻜﻠﻔﺔ‪.‬‬

‫ﻳﺘﻠﺨﺺ ﲨﻴﻊ ذﻟﻚ ﺑﺘﻄﺒﻴﻖ ﻣﺒﺪأ ﺑﺴﻴﻂ وﻫﻮ‪ :‬ﻧﻘﻞ اﻟﺘﻌﻘﻴﺪ ﻣﻦ اﻟﱪﳎﻴﺎت إﱃ اﻟﻌﺘﺎد اﻟﺼﻠﺐ‪ ،‬ﳍﺬا اﻟﺴﺒﺐ ﻳﺘﻢ ﲣﺼﻴﺺ ﺗﻌﻠﻴﻤﺔ ﻟﻜﻞ ﺣﺪث‬
‫ﻳﺘﻢ ﰲ اﳌﻌﺎﰿ‪ ،‬وﺑﺎﻟﺘﺎﱄ ﳝﻜﻦ أن ﺗﺼﻞ ﳎﻤﻮﻋﺔ ﺗﻌﻠﻴﻤﺎت ﻫﺬﻩ اﳌﻌﺎﳉﺎت إﱃ آﻻف اﻟﺘﻌﻠﻴﻤﺎت‪ ،‬ﻛﻤﺎ أن اﻟﻘﺎﻋﺪة اﻷﺳﺎﺳﻴﺔ ﺗﻘﻮل‪ :‬إن أداء‬
‫اﻟﻜﻴﺎن اﻟﺼﻠﺐ "داﺋﻤﺎً" أﺳﺮع ﺑﻜﺜﲑ ﻣﻦ اﻷداء اﻟﱪﳎﻲ‪.‬‬

‫ﻋﻠﻰ اﻟﻨﻘﻴﺾ ﻣﻦ ذﻟﻚ‪ ،‬ﻓﺈن زﻳﺎدة ﻋﺪد اﻟﺘﻌﻠﻴﻤﺎت ﻳﺰﻳﺪ ﻣﻦ ﺳﻬﻮﻟﺔ اﻟﱪﳎﺔ‪ ،‬وﻳﺴﺮع زﻣﻦ ﺗﺴﻮﻳﻖ اﳌﻨﺘﺞ )‪ ،(Time to Market‬وﻟﻜﻦ ﺑﻨﻔﺲ‬
‫اﻟﻮﻗﺖ ﻳﺆدي إﱃ زﻳﺎدة ﺗﻌﻘﻴﺪ اﻟﻌﺘﺎد اﻟﺼﻠﺐ ﻟﻠﻤﻌﺎﰿ‪ ،‬ﺣﻴﺚ ﺳﻴﺤﺘﺎج إﱃ وﺣﺪة ﺗﺮﲨﺔ ﻣﻌﻘﺪة داﺧﻞ ﻧﻔﺲ اﳌﻌﺎﰿ ﻟﻠﺘﻌﺮف ﻋﻠﻰ ﻛﻢ‬
‫اﻟﺘﻌﻠﻴﻤﺎت اﻟﻜﺒﲑ‪ ،‬ﻛﻤﺎ أن دورة ﺗﻨﻔﻴﺬ اﻟﺘﻌﻠﻴﻤﺔ ﺳﺘﺴﺘﻐﺮق وﻗﺘﺎً إﺿﺎﻓﻴﺎً داﺧﻞ وﺣﺪة اﻟﱰﲨﺔ ﺣﱴ ﻳﺘﻢ ﺗﻔﺴﲑﻫﺎ ﳑﺎ ﻳﻌﲏ ﺗﺒﺎﻃﺆاً ﰲ اﻷداء‪ ،‬ﻛﻤﺎ‬
‫أﻧﻪ وﺑﺴﺒﺐ اﳊﺎﺟﺔ إﱃ ﻣﺴﺠﻼت داﺧﻠﻴﺔ إﺿﺎﻓﻴﺔ ﳍﺬﻩ اﻟﺘﻌﻠﻴﻤﺎت؛ ﻓﺈن ﻋﺪد اﻟﱰاﻧﺰﺳﺘﻮرات ﻟﺒﻨﻴﺔ اﳌﻌﺎﰿ ﺳﺘﺰداد‪ ،‬وﺑﺎﻟﺘﺎﱄ ﺳﺘﺰداد ﺿﻴﺎﻋﺎت‬
‫اﻟﻄﺎﻗﺔ ﰲ اﳌﻌﺎﰿ ﳑﺎ ﻳﻨﺘﺞ ﻋﻨﻪ ارﺗﻔﺎع ﰲ درﺟﺔ ﺣﺮارة اﳌﻌﺎﰿ‪ ،‬وﺳﻴﺤﺘﺎج إﱃ وﺣﺪة ﺗﱪﻳﺪ ﺧﺎﺻﺔ‪ ،‬وﻫﺬا ﺑﺎﻟﻔﻌﻞ ﻣﺎ ﻧﻼﺣﻈﻪ ﰲ ﻣﻌﺎﳉﺎت‬
‫‪ AMD & INTEL‬اﳌﺴﺘﺨﺪﻣﺔ ﰲ اﳊﻮاﺳﺐ اﻟﺸﺨﺼﻴﺔ‪ .‬إن اﻟﺴﺒﺐ اﻷﺳﺎﺳﻲ ﰲ زﻳﺎدة ﻋﺪد اﻟﺘﻌﻠﻴﻤﺎت ﰲ اﳌﻌﺎﳉﺎت اﻟﱵ ﺗﺘﺒﲎ اﻟﺒﻨﻴﺔ‬
‫‪ – CISC‬ﻋﻠﻰ اﻟﺮﻏﻢ ﻣﻦ اﳉﺎﻧﺐ اﻟﺴﻠﱯ ﳍﺬا اﻷﻣﺮ – ﻫﻮ أن ﻫﺬﻩ اﳌﻌﺎﳉﺎت ﺗﻜﻮن ﻣﻜﺮﺳﺔ ﻷﻏﺮاض ﻋﺎﻣﺔ ذات ﻣﻬﺎم ﻣﻌﻘﺪة‪ ،‬وﺑﺎﻟﺘﺎﱄ ﻓﺈن‬
‫ﺑﺮﻧﺎﻣﺞ ﻫﺬﻩ اﳌﻌﺎﳉﺎت ﻳﻜﻮن ﰲ ﻏﺎﻳﺔ اﻟﺘﻌﻘﻴﺪ‪ ،‬ﳍﺬا اﻟﺴﺒﺐ ﻳﺘﻢ ﺗﺰوﻳﺪ اﳌﻌﺎﰿ ﲟﺴﺠﻼت ﺗﻌﻠﻴﻤﺎت ﻟﻜﺎﻓﺔ اﻟﻌﻤﻠﻴﺎت اﻟﺮﻳﺎﺿﻴﺔ ) ‪Sin, Cos,‬‬

‫…‪ (etc‬وﻏﲑﻫﺎ وﻫﺬا ﻻ ﻳﺘﻮﻓﺮ ﰲ اﳌﻌﺎﳉﺎت اﻟﱵ ﺗﺘﺒﲎ اﻟﺒﻨﻴﺔ ‪.RISC‬‬

‫ﻣﻦ أﺷﻬﺮ ﻋﺎﺋﻼت اﳌﻌﺎﳉﺎت اﻟﱵ ﺗﺘﺒﲎ اﻟﺒﻨﻴﺔ ‪ CISC‬ﻫﻲ‪ System/360, PDP-11, VAX, 68000, and x86 :‬إﺿﺎﻓﺔً إﱃ ‪Intel,‬‬
‫‪.AMD, Cyrix, and IBM‬‬

‫‪25‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Embedded Systems‬‬ ‫اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ |‬

‫‪ 2-4-2-15-1‬اﻟﺒﻨﻴﺔ ‪:RISC‬‬
‫وﻫﻲ ﳎﻤﻮﻋﺔ أواﻣﺮ اﳊﺎﺳﺐ اﳌﺨﺘﺼﺮة "‪ ،"Reduced Instruction Set Computer‬وﻫﻲ ﻧﻮع ﻣﻦ اﳌﻌﺎﳉﺎت اﻟﱵ ﲤﻠﻚ ﳎﻤﻮﻋﺔ‬
‫ﳏﺪودة ﻧﺴﺒﻴﺎً ﻣﻦ اﻟﺘﻌﻠﻴﻤﺎت اﻟﱪﳎﻴﺔ اﻟﻌﺎﻣﺔ واﻷﺳﺎﺳﻴﺔ‪ ،‬واﻟﱵ ﺗﺒﻠﻎ ﺣﻮاﱄ ‪ 200‬ﺗﻌﻠﻴﻤﺔ ﻛﺤﺪ أﻋﻈﻤﻲ‪.‬‬

‫ﻣﻦ ﻣﻴﺰات ﺗﻌﻠﻴﻤﺎت اﳌﻌﺎﳉﺎت ذات اﻟﺒﻨﻴﺔ ‪ RISC‬أ�ﺎ ﻗﺼﲑة وﻻ ﲢﺘﺎج ﻟﻮﺣﺪة ﺗﺮﲨﺔ ﺧﺎﺻﺔ )‪ ،(Microcode‬ﳑﺎ ﻳﺴﺮع ﰲ ﻋﻤﻠﻴﺔ اﻟﺘﻨﻔﻴﺬ‬
‫ﺣﻴﺚ ﳝﻜﻦ أن ﺗﺼﻞ ﺳﺮﻋﺔ اﻟﺘﻨﻔﻴﺬ ﰲ ﺑﻌﺾ اﳌﻌﺎﳉﺎت إﱃ دورة آﻟﺔ واﺣﺪة ﻟﻜﻞ ﺗﻌﻠﻴﻤﻴﺔ‪ .‬ﻣﻴﺰة أﺧﺮى ﻗﺪ ﺗﻜﻮن أﻛﺜﺮ أﳘﻴﺔ‪ ،‬وﻫﻲ أﻧﻪ ﺑﺴﺒﺐ‬
‫ﻗﻠﺔ وﺑﺴﺎﻃﺔ ﺗﻌﻠﻴﻤﺎت ﻫﺬا اﻟﻨﻮع ﻓﻘﺪ أﺻﺒﺢ ﺑﺎﻹﻣﻜﺎن ﺗﻘﻠﻴﻞ ﻋﺪد اﳌﺴﺠﻼت اﻟﺪاﺧﻠﻴﺔ‪ ،‬واﻟﺬي ﻳﺆدي إﱃ ﺗﻘﻠﻴﻞ ﻋﺪد اﻟﱰاﻧﺰﺳﺘﻮرات‪ ،‬وﺑﺎﻟﺘﺎﱄ‬
‫ﲣﻔﻴﺾ ﺗﻜﻠﻔﺔ اﻟﺘﺼﻨﻴﻊ واﺳﺘﻬﻼك اﻟﻄﺎﻗﺔ‪ .‬ﻋﻠﻰ اﻟﻨﻘﻴﺾ ﻣﻦ ذﻟﻚ‪ ،‬ﻓﺈن ﻗﻠﺔ ﻋﺪد اﻟﺘﻌﻠﻴﻤﺎت وﻋﻤﻮﻣﻴﺘﻬﺎ ﻳﻨﻌﻜﺲ ﺳﻠﺒﺎً ﻋﻠﻰ ﺗﻌﻘﻴﺪات ﻛﺘﺎﺑﺔ‬
‫ﺑﺮﻧﺎﻣﺞ اﳌﻌﺎﰿ وﻃﻮﻟﻪ‪.‬‬

‫ﻣﺆﺧﺮاً وﻣﻊ وﺟﻮد ﻟﻐﺎت ﺑﺮﳎﻴﺔ ﻋﺎﻟﻴﺔ اﳌﺴﺘﻮى ﱂ ﺗﻌﺪ ﻫﻨﺎك ﻣﺸﻜﻠﺔ ﰲ ﺗﻌﻘﻴﺪ ﺑﺮاﻣﺞ اﳌﻌﺎﳉﺎت ذات اﻟﺒﻨﻴﺔ ‪ ،RISC‬وﻫﺬﻩ اﻟﺒﻨﻴﺔ ﺗﻌﺘﻤﺪﻫﺎ‬
‫ﻣﻌﻈﻢ أﻧﻮاع اﳌﺘﺤﻜﻤﺎت اﳌﺼﻐﺮة )‪ (Microcontrollers‬وﻣﻌﺎﳉﺎت اﻹﺷﺎرة اﻟﺮﻗﻤﻴﺔ )‪.(DSPs‬‬

‫ﻣﻦ أﺷﻬﺮ ﻋﺎﺋﻼت اﳌﻌﺎﳉﺎت اﻟﱵ ﺗﺘﺒﲎ اﻟﺒﻨﻴﺔ ‪ CISC‬ﻫﻲ‪DEC Alpha, AMD 29k, ARC, ARM, Atmel AVR, :‬‬

‫‪.MIPS, PA-RISC, PowerPC, SuperH, and SPARC‬‬

‫‪ 3-4-2-15-1‬اﻟﺒﻨﻴﺔ ‪:MISC‬‬
‫ﺗﻘﻮم ﻫﺬﻩ اﻟﺒﻨﻴﺔ ﻋﻠﻰ ﻋﺪد ﻗﻠﻴﻞ ﺟﺪاً ﻣﻦ اﻟﺘﻌﻠﻴﻤﺎت اﻷﺳﺎﺳﻴﺔ ﺑﺪف ﺗﻘﻠﻴﻞ ﻋﺪد اﳌﺴﺠﻼت اﻟﺪاﺧﻠﻴﺔ ﻟﻠﻤﻌﺎﰿ‪ ،‬ﻛﻤﺎ أن ﻫﺬا اﻟﻨﻮع ﻣﻦ‬
‫اﻟﺘﻌﻠﻴﻤﺎت ﻳﻌﺘﻤﺪ ﻋﻠﻰ اﳌﻜﺪس )‪ – (Stack-based‬اﻟﺬي ﻳﺴﺘﺨﺪم ﻟﺘﺨﺰﻳﻦ ﻋﻨﻮان اﻟﻌﻮدة ﻋﻨﺪ اﻟﻘﻔﺰ إﱃ اﻟﱪاﻣﺞ اﻟﻔﺮﻋﻴﺔ ﰲ ﺑﲎ اﻟﺘﻌﻠﻴﻤﺎت‬
‫اﻟﱵ ﺗﺴﺘﺨﺪم اﳌﺴﺠﻼت – ﺑﺪﻻً ﻣﻦ ﻛﻮﻧﻪ ﻣﻌﺘﻤﺪاً ﻋﻠﻰ اﳌﺴﺠﻼت )‪ ،(Register-based‬وﺑﺎﻟﺘﺎﱄ ﻳﺘﻢ ﻓﻚ ﺗﺸﻔﲑ اﻟﺘﻌﻠﻴﻤﺎت ﺑﺴﺮﻋﺔ أﻛﱪ‬
‫ﻏﲑ أن ﻫﺬا ﻳﺆدي إﱃ ﻛﻮن اﻟﺘﻨﻔﻴﺬ ﻳﻌﺘﻤﺪ ﻋﻠﻰ اﻟﺘﺴﻠﺴﻞ اﻟﺘﺘﺎﺑﻌﻲ ﻟﻠﺘﻌﻠﻴﻤﺔ‪ .‬ﻫﺬا اﻟﻨﻮع ﻣﻦ ﺑﲎ اﻟﺘﻌﻠﻴﻤﺎت ﺷﺎﺋﻊ ﰲ ‪Java Virtual‬‬

‫‪ ،Machine‬وﻣﻦ أﺑﺮز اﻟﺘﻄﺒﻴﻘﺎت اﻟﺘﺠﺎرﻳﺔ اﻟﱵ ﺗﺒﻨﺖ ﻫﺬﻩ اﻟﺒﻨﻴﺔ ﻫﻮ اﳊﺎﺳﻮب ‪ INMOS Transputer‬ﻣﺒﲔ ﻋﻠﻰ اﻟﺸﻜﻞ‪.34-1‬‬

‫اﻟﺸﻜﻞ‪ 34-1‬اﻟﻠﻮﺣﺔ اﻷم ﻟﻠﺤﺎﺳﻮب ‪Transputer Evaluation IMSB008‬‬

‫اﳉﺪول‪ 4-1‬ﻳﻠﺨﺺ ﻣﻘﺎرﻧﺎً ﺑﲔ ﺑﻨﻴﺔ اﻟﺘﻌﻠﻴﻤﺎت ‪ RISC‬واﻟﺒﻨﻴﺔ ‪.CISC‬‬

‫ﻣﻌﺎﻟﺠﺎت ‪RISC‬‬ ‫ﻣﻌﺎﻟﺠﺎت ‪CISC‬‬

‫ﻋﺪد ﻗﻠﻴﻞ ﻣﻦ اﻟﺘﻌﻠﻴﻤﺎت اﻟﱪﳎﻴﺔ ﻻ ﻳﺘﺠﺎوز ‪200‬‬ ‫ﻋﺪد ﻛﺒﲑ ﺟﺪاً ﻣﻦ اﻟﺘﻌﻠﻴﻤﺎت اﻟﱪﳎﻴﺔ ﻳﺼﻞ إﱃ ‪3000‬‬

‫ﺗﻌﻠﻴﻤﺎت ﺑﺮﳎﻴﺔ أﺳﺎﺳﻴﺔ ﺑﺴﻴﻄﺔ ﳝﻜﻦ ﺗﻨﻔﻴﺬﻫﺎ ﺑﺪورة واﺣﺪة ﻓﻘﻂ‬ ‫ﺗﻌﻠﻴﻤﺎت ﺑﺮﳎﻴﺔ ﻣﻌﻘﺪة ﻳﺴﺘﻐﺮق ﺗﻨﻔﻴﺬﻫﺎ زﻣﻨﺎًﻛﺒﲑاً ﻳﺼﻞ إﱃ ‪ 12‬دورة‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪26‬‬
‫‪21‬‬ ‫‪Chapter 1‬‬ ‫اﻟﻔﺼﻞ اﻷول |‬

‫ﺗﻨﻔﻴﺬ اﻟﺘﻌﻠﻴﻤﺎت ﻳﺘﻢ ﺑﺸﻜﻞ ﻣﺒﺎﺷﺮ دون اﳊﺎﺟﺔ ﻟﻮﺣﺪة ﺗﺮﲨﺔ‬ ‫اﻟﺘﻌﻠﻴﻤﺎت ﲢﺘﺎج إﱃ ‪ Microcode‬ﰲ اﳌﻌﺎﰿ ﻟﱰﲨﺘﻬﺎ ﻗﺒﻞ اﻟﺘﻨﻔﻴﺬ‬
‫ﻛﺘﻠﺔ اﻟﺘﻌﻠﻴﻤﺎت ﺑﺴﻴﻄﺔ وﻣﻮﺣﺪة اﻟﻄﻮل )‪(8, 16, 32-bit‬‬ ‫ﻛﺘﻠﺔ اﻟﺘﻌﻠﻴﻤﺎت ﺗﺘﻔﺎوت ﰲ اﻟﻄﻮل واﻟﺘﻌﻘﻴﺪ‬
‫ﻻ ﺣﺎﺟﺔ ﻟﻠﻮﺻﻮل ﻟﻠﺬاﻛﺮة )اﻷواﻣﺮ ﰲ اﳌﺴﺠﻼت(‬ ‫ﲢﺘﺎج ﻟﻠﻮﺻﻮل إﱃ اﻟﺬاﻛﺮة أﺛﻨﺎء اﻟﺘﻨﻔﻴﺬ‬
‫ﺗﺴﺘﺨﺪم ﺗﻘﻨﻴﺔ ‪ Pipelining‬ﺑﺸﻜﻞ واﺳﻊ‬ ‫ﻧﺎدراً ﻣﺎ ﺗﺴﺘﺨﺪم ﺗﻘﻨﻴﺔ ‪Pipelining‬‬

‫ذات ﺗﻌﻘﻴﺪ ﻋﻠﻰ ﻣﺴﺘﻮى اﻟﱪﳎﻴﺎت )‪(Compiler‬‬ ‫ذات ﺗﻌﻘﻴﺪ ﰲ اﻟﻜﻴﺎن اﻟﺼﻠﺐ )‪(Microcode Unit‬‬
‫اﻟﻌﺪﻳﺪ ﻣﻦ ﳎﻤﻮﻋﺎت اﳌﺴﺠﻼت وﻳﺘﻢ اﻟﺘﻨﻔﻴﺬ ﻣﻨﻬﺎ‬ ‫ﳎﻤﻮﻋﺔ ﻣﺴﺠﻼت وﺣﻴﺪة واﻟﻨﻘﻞ ﻳﺘﻢ ﻣﻦ اﻟﺬاﻛﺮة‬

‫اﳉﺪول‪ 4-1‬ﻣﻘﺎرﻧﺔ ﺑﲔ ﺑﻨﻴﺔ اﻟﺘﻌﻠﻴﻤﺎت ‪ RISC‬اﻟﺒﻨﻴﺔ ‪CISC‬‬

‫‪ 3-15-1‬اﳌﺘﺤﻜﻤﺎت اﳌﺼﻐﺮة ‪:(Microcontrollers) MCUs, µC‬‬

‫ﳝﺜﻞ اﳌﺘﺤﻜﻢ اﳌﺼﻐﺮ ﻣﻨﻈﻮﻣﺔ ﺣﺎﺳﻮﺑﻴﺔ ﻣﺘﻜﺎﻣﻠﺔ ﻣﺼﻐﺮة ﻣﺘﻮﺿﻌﺔ ﻋﻠﻰ دارة ﻣﺘﻜﺎﻣﻠﺔ وﺣﻴﺪة‪ .‬ﲞﻼف اﳌﻌﺎﳉﺎت اﳌﺼﻐﺮة )‪ (MPU‬اﳌﺴﺘﺨﺪﻣﺔ‬
‫ﰲ اﳊﻮاﺳﺐ اﻟﺸﺨﺼﻴﺔ واﻟﺘﻄﺒﻴﻘﺎت اﻷﺧﺮى ﻋﺎﻟﻴﺔ اﻷداء‪ ،‬ﻓﺈن اﳌﺘﺤﻜﻤﺎت اﳌﺼﻐﺮة ﺗﺴﺘﺨﺪم ﰲ اﻟﺘﻄﺒﻴﻘﺎت ﺻﻐﲑة اﳊﺠﻢ ﺣﻴﺚ ﻳﻜﻮن‬
‫اﺳﺘﻬﻼك اﻟﻄﺎﻗﺔ ﳏﺪوداً‪ ،‬ﻛﺄﺟﻬﺰة اﻟﺘﺤﻜﻢ ﻋﻦ ﺑﻌﺪ‪ ،‬واﻟﺘﺠﻬﻴﺰات اﳌﻨﺰﻟﻴﺔ‪ ،‬واﻷﻟﻌﺎب‪ ،‬ﺑﺎﻹﺿﺎﻓﺔ إﱃ أﻧﻈﻤﺔ اﻟﺘﺤﻜﻢ ﰲ اﻟﺴﻴﺎرات وﻏﲑﻫﺎ‪.‬‬

‫ﺗﻌﺘﱪ اﳌﺘﺤﻜﻤﺎت اﻟﺮﻗﻤﻴﺔ اﳌﺼﻐﺮة اﻟﻘﻠﺐ اﻟﻨﺎﺑﺾ ﰲ أﻧﻈﻤﺔ اﻟﺘﺤﻜﻢ وﰲ اﻟﺘﺠﻬﻴﺰات اﻟﻜﻬﺮﺑﺎﺋﻴﺔ واﻹﻟﻜﱰوﻧﻴﺔ‪ ،‬وﺑﻘﺪر ازدﻳﺎد ﺗﻌﻘﻴﺪ اﻟﻮﻇﺎﺋﻒ‬
‫اﳌﻄﻠﻮﺑﺔ ﻣﻦ ﻫﺬﻩ اﻷﻧﻈﻤﺔ‪ ،‬ﻳﺰداد ﺗﻌﻘﻴﺪ ﺑﻨﻴﺔ ﻫﺬﻩ اﳌﺘﺤﻜﻤﺎت؛ ﻟﺬﻟﻚ ﺗﺘﻮﻓﺮ ﻫﺬﻩ اﳌﺘﺤﻜﻤﺎت ﺿﻤﻦ ﻃﻴﻒ واﺳﻊ ﺟﺪاً ﻣﻦ اﻟﻌﺎﺋﻼت اﻟﱵ‬
‫ﺗﺘﻨﻮع ﺑﺘﻨﻮع ﻇﺎﺋﻔﻬﺎ وﺗﻄﺒﻴﻘﺎﻬﺗﺎ‪ ،‬ﻓﻤﻨﻬﺎ اﳋﺎص وﻣﻨﻬﺎ اﻟﻌﺎم‪.‬‬

‫ﺗﻌﺘﱪ ﺻﻨﺎﻋﺔ اﻟﺴﻴﺎرات اﻟﻘﻮة اﶈﺮﻛﺔ ﰲ ازدﻳﺎد ﳕﻮ ﺗﻄﻮﻳﺮ اﳌﺘﺤﻜﻤﺎت اﳌﺼﻐﺮة‪ ،‬وﺗﺸﲑ اﻹﺣﺼﺎءات إﱃ أن ‪ 33%‬ﻣﻦ اﳌﺘﺤﻜﻤﺎت اﳌﺼﻨﻌﺔ‬
‫ﺗﺴﺘﺨﺪم ﰲ أﻧﻈﻤﺔ اﻟﺘﺤﻜﻢ ﰲ اﻟﺴﻴﺎرات اﳊﺪﻳﺜﺔ]‪ ،[107‬ﻛﻤﺎ ﺗﺸﲑ اﻹﺣﺼﺎءات إﱃ أن ﻋﺪد اﳌﺘﺤﻜﻤﺎت اﳌﺼﻐﺮة اﻟﱵ ﺗﺴﺘﺨﺪم ﰲ اﻟﺴﻴﺎرات‬
‫ذات اﻟﻜﻠﻔﺔ اﳌﻨﺨﻔﻀﺔ ﻳﱰاوح ‪ ،30~40‬ﰲ ﺣﲔ ﻳﺴﺘﺨﺪم ‪ 70~100‬ﻣﺘﺤﻜﻢ ﰲ اﻟﺴﻴﺎرات ذات اﻟﻜﻠﻔﺔ اﳌﺮﺗﻔﻌﺔ]‪.[107‬‬

‫ﻣﻦ اﳉﺪﻳﺮ ذﻛﺮﻩ أن ﻣﺘﻄﻠﺒﺎت ﻗﻄﺎع ﺻﻨﺎﻋﺔ اﻟﺴﻴﺎرات دﻓﻌﺖ ﺷﺮﻛﺎت ﺗﺼﻨﻴﻊ اﳌﺘﺤﻜﻤﺎت اﳌﺼﻐﺮة إﱃ ﺗﻄﻮﻳﺮ وﺗﺒﲏ ﺑﺮﺗﻮﻛﻮﻻت اﺗﺼﺎل‬
‫ﺗﺴﻠﺴﻠﻲ ﺟﺪﻳﺪة ذات وﻇﺎﺋﻒ وﻣﻴﺰات ﺗﺴﺘﻮﻋﺐ رﺑﻂ آﻻف اﳊﺴﺎﺳﺎت ﻣﺜﻞ ‪ .CAN & LIN‬اﻟﺸﻜﻞ‪ 35-1‬ﻳﺒﲔ ﻋﻨﺎﺻﺮ اﻟﺘﺤﻜﻢ اﻟﱵ‬
‫ﺗﺴﺘﺨﺪم اﳌﺘﺤﻜﻤﺎت اﳌﺼﻐﺮة ﰲ اﻟﺴﻴﺎرات‪.‬‬

‫اﻟﺸﻜﻞ‪ 35-1‬وﺣﺪات اﻟﺘﺤﻜﻢ اﻟﱵ ﺗﺴﺘﺨﺪم اﳌﺘﺤﻜﻤﺎت اﳌﺼﻐﺮة ﰲ اﻟﺴﻴﺎرات‬

‫‪27‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Embedded Systems‬‬ ‫اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ |‬

‫ﺗﺼﻨﻒ اﳌﺘﺤﻜﻤﺎت اﳌﺼﻐﺮة ﺑﺸﻜﻞ أﺳﺎﺳﻲ وﻓﻘﺎً ﻟﻌﺮض اﻟﻨﺎﻗﻞ اﻟﺮﺋﻴﺴﻲ )‪ (4-bit, 8-bit, 16-bit, 32-bit, 64-bit‬اﻟﺬي ﻳﺼﻞ ﺑﲔ‬
‫وﺣﺪة اﳌﻌﺎﳉﺔ اﳌﺮﻛﺰﻳﺔ وﺑﲔ ذاﻛﺮة اﳌﺘﺤﻜﻢ‪.‬‬

‫إن ﻣﻌﻴﺎر اﺧﺘﻴﺎر اﳌﻌﺎﰿ وﻓﻘﺎً ﻟﻌﺮض اﻟﻨﺎﻗﻞ اﻟﺮﺋﻴﺴﻲ ﻳﻌﺘﻤﺪ ﻋﻠﻰ درﺟﺔ ﺗﻌﻘﻴﺪ اﻟﻨﻈﺎم‪ ،‬ﻓﻤﺜﻼً‪ :‬ﺗﺴﺘﺨﺪم ﻣﻌﺎﳉﺎت ‪ 4-bit‬ﰲ أﺟﻬﺰة اﻟﺘﺤﻜﻢ‬
‫ﻋﻦ ﺑﻌﺪ وأﻟﻌﺎب اﻷﻃﻔﺎل‪ ،‬وﻫﺬﻩ اﳌﻌﺎﳉﺎت ﺗﻜﻮن ﳏﺪودة اﳌﻴﺰات‪ ،‬وﺗﻌﻤﻞ ﻋﻨﺪ ﺗﺮدد ﻻ ﻳﺘﺠﺎوز ‪ .8MHz‬وأﻣﺎ ﻣﻌﺎﳉﺎت ‪ 8-bit‬ﻓﺘﺴﺘﺨﺪم‬
‫ﰲ أﻧﻈﻤﺔ اﻟﺘﺤﻜﻢ ﺑﺎﻟﻐﺴﺎﻻت واﻷﺟﻬﺰة اﳌﻨﺰﻟﻴﺔ‪ ،‬وﻫﻲ ﺗﻌﻤﻞ ﻋﻨﺪ ﺗﺮدد ﻻ ﻳﺘﺠﺎوز ‪ .20MHz‬وﺗﺴﺘﺨﺪم ﻣﻌﺎﳉﺎت ‪ 16-bit‬ﰲ أﻧﻈﻤﺔ‬
‫اﻟﺘﺤﻜﻢ اﻟﺮﻗﻤﻲ ﺑﺎﶈﺮﻛﺎت وﻫﻲ ﺗﻌﻤﻞ ﻋﻨﺪ ﺗﺮدد ﻻ ﻳﺘﺠﺎوز ‪ ،40MHz‬وأﻣﺎ ﻣﻌﺎﳉﺎت ‪ 32-bit‬ﻓﺘﺴﺘﺨﺪم ﰲ اﻷﻧﻈﻤﺔ اﳌﺘﻘﺪﻣﺔ اﻟﱵ ﲢﺘﺎج‬
‫إﱃ ﻣﻌﺎﳉﺔ ﺑﺎﻟﻔﺎﺻﻠﺔ اﻟﻌﺸﺮﻳﺔ أو ﲢﻮي ﻋﻠﻰ ﻧﻈﺎم ﺗﺸﻐﻴﻞ ﻣﺪﻣﺞ )‪ (RTOS‬ﻣﺜﻞ ‪ ،Linux‬وﻫﻲ ﲤﻠﻚ ﻣﻴﺰات واﺳﻌﺔ ﻻ ﲤﻠﻜﻬﺎ اﳌﻌﺎﳉﺎت‬
‫اﻷدﱏ‪ ،‬ﻣﺜﻞ‪ :‬إﻣﻜﺎﻧﻴﺔ اﻟﺮﺑﻂ ﻣﻊ ﺑﺮوﺗﻮﻛﻮﻻت اﺗﺼﺎل ﺗﺴﻠﺴﻠﻲ ﻋﺎﻟﻴﺔ اﻟﺴﺮﻋﺔ )…‪ (Ethernet, USB, Wi-Fi, CAN, etc‬وﺗﻜﻮن‬
‫ﺑﻨﻴﺘﻬﺎ أﻗﺮب إﱃ ﺑﻨﻴﺔ أﻧﻈﻤﺔ اﳊﻮاﺳﺐ وﺗﻌﻤﻞ ﻋﻦ ﺗﺮددات ﺗﱰاوح ﻣﻦ ‪.60MHz~400MHz‬‬

‫اﻟﺴﺆال اﻟﺬي ﻳﺘﻢ ﻃﺮﺣﻪ ﺑﺎﺳﺘﻤﺮار ﻫﻮ‪ :‬ﻣﺎ ﻫﻮ اﳌﺘﺤﻜﻢ اﳌﺼﻐﺮ اﻷﻧﺴﺐ وﻓﻘﺎً ﻟﻌﺮض اﻟﻨﺎﻗﻞ اﻷﺳﺎﺳﻲ؟‬

‫اﻹﺟﺎﺑﺔ ﻋﻠﻰ ﻫﺬا اﻟﺴﺆال ﺗﺘﺤﺪد ﲟﻮاﺻﻔﺎت اﻟﻨﻈﺎم اﳌﺮاد ﺗﻨﻔﻴﺬﻩ‪ ،‬واﻟﺬي ﺑﻨﺎءً ﻋﻠﻴﻪ ﻳﺘﻢ ﲢﺪﻳﺪ اﳌﺘﺤﻜﻢ اﳌﻄﻠﻮب‪ .‬اﻟﻨﻘﻄﺔ اﻷﺳﺎﺳﻴﺔ ﻫﻨﺎ ﻫﻲ‬
‫ﺳﺮﻋﺔ اﻷداء اﳌﻄﻠﻮﺑﺔ واﻟﻘﻴﻮد اﳌﻔﺮوﺿﺔ ﻋﻠﻰ اﻟﻨﻈﺎم‪ ،‬ﻣﺜﻞ ﺳﺮﻋﺔ ﺗﻨﻔﻴﺬ ﺧﻮارزﻣﻴﺔ ﲢﻜﻢ ﻣﻌﻴﻨﺔ‪ ،‬وﺑﺎﻟﺘﺎﱄ ﻓﺈن ﺗﺮدد ﻋﻤﻞ اﳌﻌﺎﰿ ﻳﻠﻌﺐ دوراً‬
‫أﺳﺎﺳﻴﺎً ﰲ ﲢﺪﻳﺪ اﳌﻌﺎﰿ اﳌﻄﻠﻮب‪.‬‬

‫اﻟﺸﻜﻞ‪ 36-1‬ﻳﺒﲔ ﳐﻄﻂ اﻟﺒﻨﻴﺔ اﻟﺪاﺧﻠﻴﺔ ﻟﻠﻤﺘﺤﻜﻢ اﳌﺼﻐﺮ ‪ ATAM893-D‬ذو ﻧﺎﻗﻞ ﺑﻌﺮض ‪.[108-109]4-bit‬‬

‫اﻟﺸﻜﻞ‪ 36-1‬اﻟﺒﻨﻴﺔ اﻟﺪاﺧﻠﻴﺔ ﻟﻠﻤﺘﺤﻜﻢ اﳌﺼﻐﺮ ‪ ATAM893-D‬ذو ﻧﺎﻗﻞ ﺑﻌﺮض ‪4-bit‬‬

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‫‪21‬‬ ‫‪Chapter 1‬‬ ‫اﻟﻔﺼﻞ اﻷول |‬

‫اﻟﺸﻜﻞ‪ 37-1‬ﻳﺒﲔ ﳐﻄﻂ اﻟﺒﻨﻴﺔ اﻟﺪاﺧﻠﻴﺔ ﻟﻠﻤﺘﺤﻜﻢ اﳌﺼﻐﺮ ‪ ATmega128‬ذو ﻧﺎﻗﻞ ﺑﻌﺮض ‪.[110] 8-bit‬‬

‫ﻋﺮض ﻧﺎﻗﻞ ‪8-bit‬‬ ‫اﻟﺸﻜﻞ‪ 37-1‬اﻟﺒﻨﻴﺔ اﻟﺪاﺧﻠﻴﺔ ﻟﻠﻤﺘﺤﻜﻢ اﳌﺼﻐﺮ ‪ ATmega128‬ذو‬

‫اﻟﺸﻜﻞ‪ 38-1‬ﻳﺒﲔ اﻟﺒﻨﻴﺔ اﻟﺪاﺧﻠﻴﺔ ﳌﻌﺎﰿ ‪ ATMEL Xmega128A1‬ذو ﻋﺮض ﻧﺎﻗﻞ ‪.[111] 16-bit‬‬

‫ﻋﺮض ﻧﺎﻗﻞ ‪16-bit‬‬ ‫اﻟﺸﻜﻞ‪ 38-1‬اﻟﺒﻨﻴﺔ اﻟﺪاﺧﻠﻴﺔ ﳌﻌﺎﰿ ‪ ATMEL Xmega128A1‬ذو‬

‫‪29‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Embedded Systems‬‬ ‫اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ |‬

‫‪.‬‬
‫]‪[112‬‬
‫اﻟﺸﻜﻞ‪ 39-1‬ﻳﺒﲔ اﻟﺒﻨﻴﺔ اﻟﺪاﺧﻠﻴﺔ ﳌﻌﺎﰿ ‪ AT32UC3B0128‬ذو ﻧﺎﻗﻞ ﺑﻌﺮض ‪32-bit‬‬

‫اﻟﺸﻜﻞ‪ 39-1‬اﻟﺒﻨﻴﺔ اﻟﺪاﺧﻠﻴﺔ ﳌﻌﺎﰿ ‪ AT32UC3B0128‬ذو ﻧﺎﻗﻞ ﺑﻌﺮض ‪32-bit‬‬

‫‪ 1-3-15-1‬اﳌﻴﺰات اﻟﻮﻇﻴﻔﻴﺔ ﻟﻠﻤﺘﺤﻜﻤﺎت اﳌﺼﻐﺮة )‪:(Microcontrollers Functional Features‬‬

‫ﲤﺘﻠﻚ اﳌﺘﺤﻜﻤﺎت اﳌﺼﻐﺮة اﻟﻌﺪﻳﺪ ﻣﻦ اﳌﻴﺰات اﻷﺳﺎﺳﻴﺔ واﳌﻴﺰات اﶈﻴﻄﻴﺔ اﻟﻮﻇﻴﻔﻴﺔ؛ إن اﳍﺪف ﻣﻦ ﺗﻨﻮع ﻫﺬﻩ اﳌﻴﺰات ﻫﻮ ﺗﻘﻠﻴﻞ ﻋﺪد اﻟﻌﻨﺎﺻﺮ‬
‫اﳋﺎرﺟﻴﺔ اﶈﻴﻄﻴﺔ ﻋﻠﻰ اﻟﺪارة اﳌﻄﺒﻮﻋﺔ )‪ (PCB‬وذﻟﻚ ﺑﺪف‪:‬‬

‫‪ ‬ﲣﻔﻴﺾ اﺳﺘﻬﻼك اﻟﻄﺎﻗﺔ‪.‬‬

‫‪ ‬ﲣﻔﻴﺾ ﺗﻜﻠﻔﺔ ﺗﻄﻮﻳﺮ اﻟﻨﻈﺎم‪.‬‬
‫‪ ‬ﺗﻘﻠﻴﺺ زﻣﻦ اﻟﺘﺼﻤﻴﻢ‪.‬‬
‫‪ ‬اﳊﺼﻮل ﻋﻠﻰ أداء أﻋﻠﻰ‪.‬‬
‫‪ ‬اﳊﺼﻮل ﻋﻠﻰ وﺛﻮﻗﻴﺔ ﻋﺎﻟﻴﺔ‪.‬‬

‫ﺿﺎﻓﺔً إﱃ اﳌﻴﺰات اﻷﺳﺎﺳﻴﺔ اﻟﱵ ﺗﺸﱰك ﻬﺑﺎ ﲨﻴﻊ اﳌﺘﺤﻜﻤﺎت اﳌﺼﻐﺮة‪ ،‬ﻓﺈن اﻟﻌﺪﻳﺪ ﻣﻦ اﳌﻴﺰات ﻇﻬﺮت ﻣﺆﺧﺮاً‪ ،‬وأدت إﱃ دﻓﻊ ﻋﺠﻠﺔ‬
‫اﳌﺘﺤﻜﻤﺎت اﳌﺼﻐﺮة ﻟﺘﻜﻮن ﺑﺪﻳﻼً ﻋﻦ اﺳﺘﺨﺪام اﳌﻌﺎﳉﺎت اﳌﺼﻐﺮة ﰲ اﻟﻌﺪﻳﺪ ﻣﻦ ﻣﺸﺎرﻳﻊ اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ‪.‬‬

‫ﻓﻴﻤﺎ ﻳﻠﻲ ﻧﻠﺨﺺ أﻫﻢ ﻫﺬﻩ اﳌﻴﺰات‪ ،‬وﻧﺒﲔ ﺗﺄﺛﲑﻫﺎ ﻋﻠﻰ ﻣﺴﺘﻮى أداء اﳌﺘﺤﻜﻤﺎت اﳌﺼﻐﺮة ﻣﻦ ﺧﻼل ﻣﻘﺎرﻧﺎت وﻇﻴﻔﻴﺔ‪.‬‬

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‫‪21‬‬ ‫‪Chapter 1‬‬ ‫اﻟﻔﺼﻞ اﻷول |‬

‫‪ 1-1-3-15-1‬ﻣﺘﺤﻜﻢ اﻟﻮﺻﻮل اﳌﺒﺎﺷﺮ إﱃ اﻟﺬاﻛﺮة )‪:(DMA Controller‬‬

‫إن ﻇﻬﻮر ﻣﺘﺤﻜﻢ اﻟﻮﺻﻮل اﳌﺒﺎﺷﺮ إﱃ اﻟﺬاﻛﺮة ﰲ اﳌﺘﺤﻜﻤﺎت اﳌﺼﻐﺮة ﻣﺜﻞ‪ AVR®-XMEGA™ & AVR32 :‬وﺿﻊ ﻣﻌﺎﻳﲑ‬
‫ﺟﺪﻳﺪة ﻟﻜﻔﺎءة ﻧﻘﻞ اﻟﺒﻴﺎﻧﺎت وﺳﺮﻋﺔ اﻷداء ﰲ اﳌﺘﺤﻜﻤﺎت‪ ،‬ﺣﻴﺚ ﺗﺴﻤﺢ ﻫﺬﻩ اﻟﻮﺣﺪة ﺑﻨﻘﻞ اﻟﺒﻴﺎﻧﺎت ﺑﻜﻔﺎءة ﻋﺎﻟﻴﺔ ﺑﲔ اﻟﻮﺣﺪات اﻟﻄﺮﻓﻴﺔ‬
‫)‪ (I/Os‬واﻟﺬاﻛﺮة ﺑﺎﺳﺘﺨﺪام اﳊﺪ اﻷدﱏ ﻟﺴﻌﺔ اﳌﻌﺎﳉﺔ ﻟﻮﺣﺪة اﳌﻌﺎﳉﺔ اﳌﺮﻛﺰﻳﺔ‪.‬‬

‫إن ﻣﻌﺪل ﻧﻘﻞ اﻟﺒﻴﺎﻧﺎت اﻷﻋﻈﻤﻲ اﳌﻤﻜﻦ ﲢﻘﻴﻘﻪ ﻋﻠﻰ ﻧﺎﻓﺬة اﺗﺼﺎل ﺗﺴﻠﺴﻠﻲ ‪ SPI‬أو ‪ UART‬ﰲ ﺣﺎل وﺟﻮد وﺣﺪة ﻣﺘﺤﻜﻢ اﻟﻮﺻﻮل‬
‫اﳌﺒﺎﺷﺮ إﱃ اﻟﺬاﻛﺮة ﻫﻮ ‪ 33MBit/s‬ﲟﻌﺎﻣﻞ ﲢﻤﻴﻞ ﻟﻮﺣﺪة اﳌﻌﺎﳉﺔ اﳌﺮﻛﺰﻳﺔ ﺑﻨﺴﺒﺔ ‪ّ ،15%‬أﻣﺎ ﰲ ﺣﺎل ﻋﺪم وﺟﻮد ﻫﺬﻩ اﻟﻮﺣﺪة؛ ﻓﺈن ﻣﻌﺪل‬
‫ﻧﻘﻞ اﻟﺒﻴﺎﻧﺎت اﻷﻋﻈﻤﻲ اﳌﻤﻜﻦ ﲢﻘﻴﻘﻪ ﻫﻮ ‪ 1MBit/s‬ﻓﻘﻂ‪ ،‬وﲟﻌﺎﻣﻞ ﲢﻤﻴﻞ ﻟﻮﺣﺪة اﳌﻌﺎﳉﺔ اﳌﺮﻛﺰﻳﺔ ﺑﻨﺴﺒﺔ ‪ ،50%‬وذﻟﻚ ﻷن ﻋﻠﻰ وﺣﺪة‬
‫اﳌﻌﺎﳉﺔ اﳌﺮﻛﺰﻳﺔ اﻟﺘﻌﺎﻣﻞ ﻣﻊ ﻛﻞ ﺑﺎﻳﺖ ﻣﻦ اﻟﺒﺎﻳﺘﺎت اﳌﺮﺳﻠﺔ‪ .‬اﻟﺸﻜﻞ‪ 40-1‬ﻳﻮﺿﺢ ﻣﻨﺤﲏ ﲢﻤﻴﻞ وﺣﺪة اﳌﻌﺎﳉﺔ اﳌﺮﻛﺰﻳﺔ إﱃ ﻣﻌﺪل ﻧﻘﻞ ﺑﻴﺎﻧﺎت‬
‫ﰲ ﺣﺎل وﺟﻮد وﻋﺪم وﺟﺪد ‪.DMA‬‬

‫اﻟﺸﻜﻞ‪ 40-1‬ﻣﻌﺪل ﲢﻤﻴﻞ وﺣﺪة اﳌﻌﺎﳉﺔ اﳌﺮﻛﺰﻳﺔ ﺑﺎﻟﻨﺴﺒﺔ إﱃ ﻣﻌﺪل اﻟﻨﻘﻞ ﻣﻊ وﺑﺪون اﻟـ‪DMA‬‬

‫اﳉﺪول‪ 5-1‬ﻳﺒﲔ ﻣﻘﺎرﻧﺔ ﳌﻌﺪﻻت ﻧﻘﻞ ﻣﺘﻌﺪدة وﻧﺴﺒﺔ ﲢﻤﻴﻞ وﺣﺪة اﳌﻌﺎﳉﺔ اﳌﺮﻛﺰﻳﺔ ﰲ ﺣﺎل ﺗﻔﻌﻴﻞ وﻋﺪم ﺗﻔﻌﻴﻞ ﻣﺘﺤﻜﻢ اﻟﻮﺻﻮل اﳌﺒﺎﺷﺮ‬
‫ﻟﻠﺬاﻛﺮة ‪ DMA‬ﻣﻦ أﺟﻞ ﻛﻞ ﻣﻌﺪل‪.‬‬

‫‪Peripheral DMA‬‬
‫‪Bit Rate‬‬
‫‪Enabled‬‬ ‫‪Disabled‬‬
‫‪0Kbit/s‬‬ ‫‪0.0%‬‬ ‫‪0.0%‬‬
‫‪400Kbit/s‬‬ ‫‪0.4%‬‬ ‫‪17.7%‬‬
‫‪1.2Mbit/s‬‬ ‫‪1.2%‬‬ ‫‪53.4%‬‬
‫‪2Mbit/s‬‬ ‫‪2.2%‬‬ ‫‪89.9%‬‬
‫‪4Mbit/s‬‬ ‫‪4.4%‬‬ ‫‪N/A‬‬
‫‪33Mbit/s‬‬ ‫‪14.7%‬‬ ‫‪N/A‬‬

‫اﳉﺪول‪ 5-1‬ﺗﺄﺛﲑ ﻣﺘﺤﻜﻢ اﻟﻮﺻﻮل اﳌﺒﺎﺷﺮ ﻟﻠﺬاﻛﺮة ﻋﻠﻰ ﻣﻌﺪل ﲢﻤﻴﻞ وﺣﺪة اﳌﻌﺎﳉﺔ اﳌﺮﻛﺰﻳﺔ‬

‫‪ 2-1-3-15-1‬ﻧﺎﻗﻞ اﻟﺒﻴﺎﻧﺎت ﻣﺘﻌﺪد اﻟﻄﺒﻘﺎت )‪:(Multi-Layer Data-Bus‬‬

‫ﺑﺪف ﺿﻤﺎن ﻋﺮض ﺣﺰﻣﺔ ﺑﻴﺎﻧﺎت ﻛﺎف‪ ،‬ﻗﺎﻣﺖ ﺑﻌﺾ اﻟﺸﺮﻛﺎت )‪ (e.g. ATMEL‬ﺑﺘﺰوﻳﺪ ﻋﺎﺋﻼت ﻣﻦ اﳌﺘﺤﻜﻤﺎت اﳌﺼﻐﺮة ) & ‪16‬‬

‫‪ (32-bit‬ﺑﻨﺎﻗﻞ ﺑﻴﺎﻧﺎت ﻣﺘﻌﺪد اﻟﻄﺒﻘﺎت‪ ،‬وﻫﻮ ﳛﻮي ﻋﻠﻰ ﳎﻤﻮﻋﺔ ﻣﻦ ﻧﻮاﻗﻞ اﻟﺒﻴﺎﻧﺎت ﻋﻠﻰ اﻟﺘﻮازي ﺣﻴﺚ أن ﻛﻞ ﻧﺎﻗﻞ رﺋﻴﺴﻲ ) ‪Master‬‬

‫‪31‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Embedded Systems‬‬ ‫اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ |‬

‫‪ (Bus‬ﻳﺘﺤﻜﻢ ﲟﺠﻤﻮﻋﺔ اﻟﻨﻮاﻗﻞ اﻟﺘﻔﺮﻋﻴﺔ اﳌﺨﺼﺼﺔ ﻟﻪ واﳌﺘﺼﻠﺔ ﻣﻊ اﻟﻮﺣﺪات اﻟﻄﺮﻓﻴﺔ اﻟﺜﺎﻧﻮﻳﺔ )‪ .(Slaves‬اﻟﺸﻜﻞ‪ 41-1‬ﻳﺒﲔ ﻧﺎﻗﻞ اﻟﺒﻴﺎﻧﺎت‬
‫ﻣﺘﻌﺪد اﻟﻄﺒﻘﺎت واﺗﺼﺎﻟﻪ ﻣﻊ اﻟﻮﺣﺪات اﻟﻄﺮﻓﻴﺔ‪.‬‬

‫اﻟﺸﻜﻞ‪ 41-1‬ﻧﺎﻗﻞ اﻟﺒﻴﺎﻧﺎت ﻣﺘﻌﺪد اﻟﻄﺒﻘﺎت واﺗﺼﺎﻟﻪ ﻣﻊ اﻟﻮﺣﺪات اﻟﻄﺮﻓﻴﺔ‬

‫‪ 3-1-3-15-1‬ﻧﺎﻓﺬة اﺗﺼﺎل ﻣﺰدوﺟﺔ ﻟﻠﺬاﻛﺮة ‪:(Dual-Port SRAM) SRAM‬‬

‫ﻧﻈﺮاً ﻹﻣﻜﺎﻧﻴﺔ ﺣﺼﻮل ﳏﺎوﻟﺔ اﻟﻨﻔﺎذ إﱃ اﻟﺬاﻛﺮة ‪ SRAM‬ﰲ ﻧﻔﺲ اﻟﻮﻗﺖ ﻣﻦ ﻗﺒﻞ وﺣﺪة اﳌﻌﺎﳉﺔ اﳌﺮﻛﺰﻳﺔ وﻣﺘﺤﻜﻢ اﻟﻮﺻﻮل اﳌﺒﺎﺷﺮ ﻟﻠﺬاﻛﺮة‬
‫ﺑﺎﺳﺘﺨﺪام ﻧﺎﻗﻞ اﻟﺒﻴﺎﻧﺎت‪ ،‬واﻟﺬي ﺳﻮف ﻳﺆدي إﱃ ﺣﺼﻮل ﺗﻌﺎرض ﺑﲔ ﻛﻼ اﻟﻮﺣﺪﺗﲔ‪ ،‬ﻓﺈﻧﻪ ﻳﺘﻢ ﺗﺰوﻳﺪ اﳌﻌﺎﳉﺎت اﻟﱵ ﲤﻠﻚ ﻣﺘﺤﻜﻢ وﺻﻮل‬
‫ﻣﺒﺎﺷﺮ ﺑﻨﺎﻓﺬة اﺗﺼﺎل ﺛﻨﺎﺋﻴﺔ ﻟﻠﺬاﻛﺮة ‪ ،SRAM‬واﻟﱵ ﲤﻜﻦ ﻣﻦ اﻟﻨﻔﺎذ إﱃ اﻟﺬاﻛﺮة ﻣﻦ ﻗﺒﻞ ﻛﻼ اﻟﻮﺣﺪﺗﲔ ﰲ ﻧﻔﺲ اﻟﻮﻗﺖ ﺑﺪون اﳊﺎﺟﺔ‬
‫ﻟﻼﻧﺘﻈﺎر‪ ،‬ﻛﻤﺎ ﲤﻜﻦ ﻣﻦ ﻣﻀﺎﻋﻔﺔ ﺳﺮﻋﺔ ﻧﻘﻞ اﻟﺒﻴﺎﻧﺎت ﻣﻦ وإﱃ اﻟﺬاﻛﺮة‪.‬‬

‫‪ 4-1-3-15-1‬اﻟﺬاﻛﺮة ‪ SRAM‬اﳌﻮزﻋﺔ )‪:(Distributed SRAM‬‬

‫إﺿﺎﻓﺔ إﱃ ﻛﻮن ﻛﻼً ﻣﻦ وﺣﺪة اﳌﻌﺎﳉﺔ اﳌﺮﻛﺰﻳﺔ وﻣﺘﺤﻜﻢ اﻟﻮﺻﻮل اﳌﺒﺎﺷﺮ ﻟﻠﺬاﻛﺮة ﻳﺘﺸﺎرﻛﺎن ذاﻛﺮة ‪ SRAM‬ذات ﻧﺎﻓﺬة اﺗﺼﺎل ﻣﺰدوﺟﺔ‪،‬‬
‫ﻓﺈن ﺑﻌﺾ اﳌﺘﺤﻜﻤﺎت اﳌﺼﻐﺮة ﲤﻠﻚ ‪ SRAM-Blocks‬ﻣﻮﺻﻮﻟﺔ إﱃ ﻧﺎﻗﻞ اﻟﺒﻴﺎﻧﺎت ﻣﺘﻌﺪد اﻟﻄﺒﻘﺎت ﺑﺪف ﲤﻜﲔ اﶈﻴﻄﻴﺎت اﻟﱵ ﺗﻌﻤﻞ‬
‫ﻋﻨﺪ ﻣﻌﺪﻻت ﻧﻘﻞ ﻋﺎﻟﻴﺔ ﺟﺪاً )‪ (USB, Ethernet‬ﻣﻦ اﺳﺘﺨﺪام ﻛﺎﻣﻞ ﻋﺮض اﳊﺰﻣﺔ اﳌﺘﻮﻓﺮة ﻷي ﻣﻦ ‪ ،SRAM-Blocks‬ﻛﻤﺎ أﻧﻪ‬
‫وﺑﺎﻻﺷﱰاك ﻣﻊ ‪ DMA‬ﳝﻜﻦ ﻧﻘﻞ ﻛﺘﻞ ﺑﻴﺎﻧﺎت ﻛﺒﲑة ﻋﻨﺪ أﻗﻞ ﲢﻤﻴﻞ ﻟﻮﺣﺪة اﳌﻌﺎﳉﺔ اﳌﺮﻛﺰﻳﺔ‪ .‬اﻟﺸﻜﻞ‪ 42-1‬ﻳﺒﲔ ﳐﻄﻂ اﻟﺒﻨﻴﺔ اﻟﺪاﺧﻠﻴﺔ‬
‫ﳌﺘﺤﻜﻢ ﻣﺼﻐﺮ ذو ﻧﺎﻗﻞ ﺑﻌﺮض ‪ 32-bit‬وارﺗﺒﺎط ﳎﻤﻮﻋﺎت اﻟﺬاﻛﺮة ‪ SRAM‬اﳌﻮزﻋﺔ ﻣﻊ اﻟﻨﺎﻗﻞ اﻟﺮﺋﻴﺴﻲ‪.‬‬

‫اﻟﺸﻜﻞ‪ 42-1‬ﺗﻮزع اﻟﺬاﻛﺮة ‪ SRAM‬وارﺗﺒﺎﻃﻬﺎ ﻣﻊ اﻟﻨﺎﻗﻞ اﻟﺮﺋﻴﺴﻲ‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪32‬‬
‫‪21‬‬ ‫‪Chapter 1‬‬ ‫اﻟﻔﺼﻞ اﻷول |‬

‫‪ 5-1-3-15-1‬ﻧﻈﺎم أﺣﺪاث اﻟﻮﺣﺪات اﶈﻴﻄﻴﺔ )‪:(Peripherals Events System‬‬

‫ﻳﺴﻤﺢ ﻫﺬا اﻟﻨﻈﺎم ﻟﻠﻮﺣﺪات اﶈﻴﻄﻴﺔ ﰲ اﳌﺘﺤﻜﻢ اﳌﺼﻐﺮ ﺑﺎﻟﺘﺨﺎﻃﺐ ﻣﻊ اﻟﻮﺣﺪات اﶈﻴﻄﻴﺔ اﻷﺧﺮى ﺑﺪون ﺗﺪﺧﻞ وﺣﺪة اﳌﻌﺎﳉﺔ اﳌﺮﻛﺰﻳﺔ‪ ،‬ﻋﻠﻰ‬
‫ﺳﺒﻴﻞ اﳌﺜﺎل‪ :‬ﰲ ﺣﺎل ﺣﺪوث ﻣﻘﺎﻃﻌﺔ ﻃﻔﺤﺎن اﳌﺆﻗﺖ؛ ﻓﺈن ﻫﺬا اﳊﺪث ﳝﻜﻦ أن ﻳﻘﺪح ﺣﺪث آﺧﺮ ﻣﺜﻞ ﺑﺪء ﻋﻤﻠﻴﺔ اﻟﺘﺤﻮﻳﻞ ﻟﺘﺸﺎﻬﺑﻲ‬
‫اﻟﺮﻗﻤﻲ )‪ (ADC‬أو أي ﺣﺪث آﺧﺮ ﰲ اﻟﻨﻈﺎم دون ﺗﺪﺧﻞ اﳌﻌﺎﰿ‪ .‬اﻟﺸﻜﻞ‪ 43-1‬اﻻرﺗﺒﺎط ﺑﲔ اﻟﻮﺣﺪات اﶈﻴﻄﻴﺔ اﻟﱵ ﺗﻌﻤﻞ ﻋﻨﺪ ﺳﺮﻋﺎت‬
‫ﻧﻘﻞ ﻻ ﺗﺘﺠﺎوز ‪ 3MB‬وﻧﻈﺎم ﻗﺪح اﻷﺣﺪاث ﺑﲔ اﻟﻮﺣﺪات‪.‬‬

‫اﻟﺸﻜﻞ‪ 43-1‬ارﺗﺒﺎط اﻟﻮﺣﺪات اﶈﻴﻄﻴﺔ ﻣﻊ ﺑﻌﻀﻬﺎ ﻋﻦ ﻃﺮﻳﻖ ﻧﺎﻗﻞ ﻧﻈﺎم ﻗﺪح اﻷﺣﺪاث‬

‫إن ﻫﺬﻩ اﳌﻴﺰة ﺗﻀﻤﻦ ﺑﻨﺴﺒﺔ ‪ 100%‬ﺳﺘﺠﺎﺑﺔ ﻗﺼﲑة ﻟﻠﻨﻈﺎم ﳝﻜﻦ اﻟﺘﻨﺒﺆ ﻬﺑﺎ‪ ،‬وﺗﻠﻐﻲ اﻟﺘﺄﺛﲑ اﻟﺴﻠﱯ ﳌﻼﻳﲔ اﳌﻘﺎﻃﻌﺎت اﻟﱵ ﳝﻜﻦ أن ﺗﻘﺎﻃﻊ‬
‫ﻋﻤﻞ وﺣﺪة اﳌﻌﺎﳉﺔ اﳌﺮﻛﺰﻳﺔ‪ .‬إن اﺳﺘﺒﺪال ﻧﻈﺎم ﻧﻘﻞ ﺑﻴﺎﻧﺎت ﻣﻘﺎد ﺑﺎﳌﻘﺎﻃﻌﺎت )‪ (interrupt-driven‬ﺑﻨﻈﺎم ﻧﻘﻞ ﺑﻴﺎﻧﺎت ﻣﻘﺪوح ﺑﺎﻷﺣﺪاث‬
‫)‪ (event-triggered‬ﻳﺴﺎﻋﺪ ﰲ ﲣﻔﻴﺾ اﺳﺘﻬﻼك اﻟﻄﺎﻗﺔ اﻟﻜﻬﺮﺑﺎﺋﻴﺔ ﰲ اﻟﺘﻄﺒﻴﻘﺎت ﻧﻈﺮاً ﻟﺘﺨﻔﻴﺾ دور وﺣﺪة اﳌﻌﺎﳉﺔ اﳌﺮﻛﺰﻳﺔ‪ .‬اﻟﺸﻜﻞ‪44-‬‬

‫‪ 1‬ﻳﺒﲔ ﻣﻨﺤﲏ زﻣﻦ اﻻﺳﺘﺠﺎﺑﺔ ﻧﺴﺒﺔً إﱃ درﺟﺔ ﺗﻌﻘﻴﺪ اﻟﺘﻄﺒﻴﻖ ﻟﻨﻈﺎم ﺗﻘﻠﻴﺪي ﻳﻌﺘﻤﺪ ﻋﻠﻰ اﳌﻘﺎﻃﻌﺎت )‪ (Conventional‬وﻧﻈﺎم آﺧﺮ‬
‫ﻣﻘﺪوح ﺑﺎﻷﺣﺪاث )‪.(Event System‬‬

‫اﻟﺸﻜﻞ‪ 44-1‬ﻣﻘﺎرﻧﺔ ﺑﲔ اﻻﺳﺘﺠﺎﺑﺔ ﻟﻨﻈﺎم ﺗﻘﻠﻴﺪي ﻳﻌﺘﻤﺪ اﳌﻘﺎﻃﻌﺎت وﻧﻈﺎم آﺧﺮ ﻣﻘﺪوح ﺑﺎﻷﺣﺪاث‬

‫اﻟﺸﻜﻞ‪ 45-1‬ﻳﺒﲔ اﻻرﺗﺒﺎط ﺑﲔ اﶈﻴﻄﻴﺎت ووﺣﺪة اﳌﻌﺎﳉﺔ ﻟﻨﻈﺎم ﻣﻘﺎد ﺑﺎﳌﻘﺎﻃﻌﺎت‪ ،‬وﻛﻴﻒ أن ﻣﻘﺎﻃﻌﺎت اﶈﻴﻄﻴﺎت ﲢﺘﺎج أن ﺗﻘﺎﻃﻊ وﺣﺪة‬
‫اﳌﻌﺎﳉﺔ اﳌﺮﻛﺰﻳﺔ ﰲ ﻛﻞ ﻣﺴﺘﻮى‪ .‬اﻟﺸﻜﻞ‪ 46-1‬ﻳﺒﲔ اﻻرﺗﺒﺎط ﺑﲔ اﶈﻴﻄﻴﺎت ووﺣﺪة اﳌﻌﺎﳉﺔ ﻟﻨﻈﺎم ﻳﻘﺪح ﺑﺎﻷﺣﺪاث‪ ،‬وﻛﻴﻒ أن أﺣﺪاث‬
‫اﶈﻴﻄﻴﺎت ﳝﻜﻦ أن ﺗﻘﺪح أﺣﺪاث ﳏﻴﻄﻴﺎت أﺧﺮى ﺑﺪون ﻣﻘﺎﻃﻌﺔ وﺣﺪة اﳌﻌﺎﳉﺔ‪.‬‬

‫‪33‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Embedded Systems‬‬ ‫اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ |‬

‫اﻟﺸﻜﻞ‪ 46-1‬ارﺗﺒﺎط اﶈﻴﻄﻴﺎت ﻟﻨﻈﺎم ﻳﻘﺪح ﺑﺎﻷﺣﺪاث‬ ‫اﻟﺸﻜﻞ‪ 45-1‬ارﺗﺒﺎط اﶈﻴﻄﻴﺎت ﺑﻮﺣﺪة اﳌﻌﺎﳉﺔ ﻟﻨﻈﺎم ﻣﻘﺎد ﺑﺎﳌﻘﺎﻃﻌﺔ‬

‫‪ 6-1-3-15-1‬وﺣﺪة اﳊﺴﺎب ﺑﺎﻟﻔﺎﺻﻠﺔ اﻟﻌﺎﺋﻤﺔ )‪:(FPU-Floating Point Unit‬‬

‫ﺗﻌﺘﱪ ﻫﺬﻩ اﻟﻮﺣﺪة )‪ (FPU‬ﻣﻦ اﳌﻴﺰات اﻷﺳﺎﺳﻴﺔ ﰲ اﳌﺘﺤﻜﻤﺎت اﳌﺼﻐﺮة اﻟﱵ ﺗﺴﺘﺨﺪم ﰲ ﺗﻄﺒﻴﻘﺎت ﻣﻌﺎﳉﺔ اﻹﺷﺎرة اﻟﺮﻗﻤﻴﺔ )‪ (DSP‬اﻟﱵ‬
‫ﲢﺘﺎج ﺳﺮﻋﺎت ﻋﺎﻟﻴﺔ ﰲ اﳌﻌﺎﳉﺔ – أﻧﻈﻤﺔ اﻟﺘﺤﻜﻢ اﳌﺘﻘﺪم ﺑﺎﶈﺮﻛﺎت‪ ،‬اﻷﲤﺘﺔ اﻟﺼﻨﺎﻋﻴﺔ‪ ،‬أﻧﻈﻤﺔ اﻟﺘﺤﻜﻢ ﺑﺎﻟﺴﻴﺎرات – ﻟﺬا ﻓﺈن ﻫﺬﻩ اﳌﻌﺎﳉﺎت‬
‫ﺗﻜﻮن ذات ﻋﺮض ﻧﺎﻗﻞ ‪.32-bit‬‬

‫ﺗﻘﻮم ﻫﺬﻩ اﻟﻮﺣﺪة ﻋﻠﻰ ﲢﺴﲔ أداء اﳌﻌﺎﳉﺔ ﺑﺎﻟﺴﻤﺎح ﻟﻠﻤﻌﺎﰿ ﺑﺈﳒﺎز ﻋﻤﻠﻴﺎت ﺣﺴﺎﺑﻴﺔ ﻋﻠﻰ أﻋﺪاد ﻋﺸﺮﻳﺔ ﺑﺪﻗﺔ ﻋﺎﻟﻴﺔ ﻣﻦ ﺧﻼل أﻗﻞ ﻋﺪد‬
‫ﻣﻜﻦ ﻣﻦ دورات اﳍﺰاز اﻟﻜﺮﻳﺴﺘﺎﱄ )‪ .(clock cycles‬إن ﻫﺬا ﺳﻮف ﻳﻨﻌﻜﺲ ﺑﺪورﻩ ﻋﻠﻰ ﺟﻮدة أداء اﻟﻨﻈﺎم اﳌﺘﺤﻜﻢ ﺑﻪ‪ ،‬ﻛﻤﺜﺎل ﻋﻠﻴﻪ‪ :‬ﻓﺈن‬
‫ﺧﻮارزﻣﻴﺔ اﻟﺘﺤﻜﻢ ﺑﺎﶈﺮك ﺳﻮف ﻳﺘﻌﲔ أداؤﻫﺎ ﲝﻴﺚ ﳝﻜﻦ ﺗﺸﻐﻴﻞ اﶈﺮك ﺑﺘﺤﻜﻢ ﻧﺎﻋﻢ ﺑﺎﻟﺴﺮﻋﺔ‪ -‬ﺿﻴﺎﻋﺎت أﻗﻞ‪ -‬ﻛﻤﺎ ﳝﻜﻦ ﺗﺮﺷﻴﺢ إﺷﺎرات‬
‫اﳊﺴﺎﺳﺎت ﻟﻠﺘﺨﻠﺺ ﻣﻦ اﻟﻀﺠﻴﺞ‪ .‬اﻟﺸﻜﻞ‪ 47-1‬ﻳﺒﲔ ﻃﺮﻳﻘﺔ ﲤﺜﻴﻞ رﻗﻢ ‪ 32-bit‬ﺑﺎﻟﻔﺎﺻﻠﺔ اﻟﻌﺎﺋﻤﺔ ﺣﻴﺚ ﳝﺜﻞ ‪ Bit-0‬إﺷﺎرة اﻟﺮﻗﻢ‪ ،‬وﲤﺜﻞ‬
‫‪ Bit-1~8‬اﻷس‪ ،‬وﲤﺜﻞ ‪ Bit-9~31‬اﻟﻜﺴﺮ‪.‬‬

‫اﻟﺸﻜﻞ‪ 47-1‬ﻃﺮﻳﻘﺔ ﲤﺜﻴﻞ رﻗﻢ ‪ 32-bit‬ﺑﺎﻟﻔﺎﺻﻠﺔ اﻟﻌﺎﺋﻤﺔ‬

‫‪ 7-1-3-15-1‬وﺣﺪة اﻟﺘﺸﻔﲑ )‪:(Cryptography Unit‬‬

‫ﰎ ﺗﺰوﻳﺪ ﺑﻌﺾ اﳌﺘﺤﻜﻤﺎت اﳌﺼﻐﺮة )‪ (AVR-XMEGA, AVR-UC3‬ﲟﺤﺮك ﺗﺸﻔﲑ )‪ (crypto engine‬ﻳﺴﺘﺨﺪم ﺧﻮارزﻣﻴﺎت‬
‫ﺗﺸﻔﲑ وﻓﻚ ﺗﺸﻔﲑ ﻣﺜﻞ‪ (64-bit) DES :‬وﻛﺬﻟﻚ ‪ (128-bit) AES‬واﻟﺬي ﺑﺪورﻩ ﳝ ّﻜﻦ ﻣﻦ اﺳﺘﺨﺪام ﻫﺬﻩ اﳌﺘﺤﻜﻤﺎت ﰲ ﻃﻴﻒ أوﺳﻊ‬
‫ﻣﻦ اﻟﺘﻄﺒﻴﻘﺎت وﺧﺼﻮﺻﺎً اﻟﺘﻄﺒﻴﻘﺎت اﻟﱵ ﺗﺘﻄﻠﺐ ﺗﺸﻔﲑ ﺑﻴﺎﻧﺎت ﺧﻼل ﻧﻘﻠﻬﺎ ﺑﺴﺮﻋﺎت ﻋﺎﻟﻴﺔ‪ .‬اﻟﺸﻜﻞ‪ 48-1‬ﻳﺒﲔ اﳌﺨﻄﻂ اﻟﺼﻨﺪوﻗﻲ‬
‫ﻟﻮﺣﺪﰐ اﻟﺘﺸﻔﲑ ‪ DES & AES‬ﰲ ﻣﺘﺤﻜﻤﺎت ‪.AVR‬‬

‫اﻟﺸﻜﻞ‪ 48-1‬وﺣﺪﰐ اﻟﺘﺸﻔﲑ ‪ DES & AES‬ﰲ ﻣﺘﺤﻜﻤﺎت ‪AVR‬‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪34‬‬
‫‪21‬‬ ‫‪Chapter 1‬‬ ‫اﻟﻔﺼﻞ اﻷول |‬

‫‪ 8-1-3-15-1‬اﳌﺆﻗﺘﺎت )‪:(Timers‬‬
‫ﻣﻌﻈﻢ اﳌﺘﺤﻜﻤﺎت اﳌﺼﻐﺮة ﲤﺘﻠﻚ ﻣﺆﻗﺘﺎت داﺧﻠﻴﺔ ﺗﺘﻔﺎوت ﻣﻦ ﺣﻴﺚ اﻟﻌﺪد واﻟﻮﻇﺎﺋﻒ واﻟﺪﻗﺔ‪ .‬ﺗﺘﻮﻓﺮ ﻫﺬﻩ اﳌﺆﻗﺘﺎت ﺑﺪﻗﺔ ‪8, 16, 24, or‬‬

‫‪ 32-bit‬ﺣﻴﺚ أن اﻟﺪﻗﺔ ﲤﺜﻞ اﻟﻘﻴﻤﺔ اﻷﻋﻈﻤﻴﺔ اﻟﱵ ﳝﻜﻦ ﻟﻠﻤﺆﻗﺖ أن ﻳﻌﺪﻫﺎ واﻟﱵ ﻳﻘﺎﺑﻠﻬﺎ ﻗﻴﻤﺔ زﻣﻨﻴﺔ‪ .‬أﻳﻀﺎً ﻣﻦ اﳌﻴﺰات اﳍﺎﻣﺔ اﻟﱵ ﲤﺘﻠﻜﻬﺎ‬
‫اﳌﺆﻗﺘﺎت ﻫﻲ‪ :‬ﻣﺪﺧﻞ ﺣﺎدﺛﺔ اﳌﺴﻚ ‪ ،(Input Capture) ICP‬أﳕﺎط ﻣﺘﻌﺪدة ﻟﺘﻮﻟﻴﺪ إﺷﺎرة ﺗﻌﺪﻳﻞ ﻋﺮض اﻟﻨﺒﻀﺔ )‪.(PWM‬‬
‫اﻟﺸﻜﻞ‪ 49-1‬ﻳﺒﲔ ﳕﻂ اﻟﻌﻤﻞ اﻟﻄﺒﻴﻌﻲ ﻟﻠﻤﺆﻗﺖ )ﻋﺪاد ﺗﺼﺎﻋﺪي ﺗﻨﺎزﱄ(‪.‬‬

‫اﻟﺸﻜﻞ‪ 49-1‬ﳕﻂ اﻟﻌﻤﻞ اﻟﻄﺒﻴﻌﻲ ﻟﻠﻤﺆﻗﺖ )ﻋﺪاد ﺗﺼﺎﻋﺪي | ﺗﻨﺎزﱄ(‬

‫‪ 9-1-3-15-1‬اﳌﺒﺪل ﻟﺘﺸﺎﻬﺑﻲ اﻟﺮﻗﻤﻲ )‪:(ADC‬‬

‫ﺗﺘﻮﻓﺮ ﻫﺬﻩ اﳌﺒﺪﻻت ﰲ اﳌﺘﺤﻜﻤﺎت ﺑﺪﻗﺔ ‪ 10, 12, or 16-bit‬وﺑﻌﺪد ﻣﻦ اﻟﻘﻨﻮات ﻳﱰاوح ‪ 6~16‬ﻗﻨﺎة ﺗﺒﺪﻳﻞ‪ ،‬ﻛﻤﺎ أن ﻣﻌﻈﻢ اﳌﺘﺤﻜﻤﺎت‬
‫اﻟﱵ ﲤﻠﻚ ﻣﺒﺪﻻت ﺸﺎﻬﺑﻴﺔ رﻗﻤﻴﺔ ﻳﺘﻢ ﺗﺰوﻳﺪﻫﺎ ﺑﻮﺣﺪة ﺗﻮﻟﻴﺪ ﺟﻬﺪ ﻣﺮﺟﻌﻲ داﺧﻠﻲ )‪ (1.1, 2.56V‬إﺿﺎﻓﺔً إﱃ ﻣﺪاﺧﻞ ﲢﻮﻳﻞ ﺗﻔﺎﺿﻠﻴﺔ‬
‫وﻣﺮﺣﻠﺔ ﺗﻀﺨﻴﻢ أوﱄ )‪ (1x, 2x, 4x, 8x, 16x, 32x or 64x‬ﻗﺎﺑﻠﺔ ﻟﻠﻀﺒﻂ ﳌﻼﺋﻤﺔ )ﺗﻀﺨﻴﻢ( اﻹﺷﺎرة ﻗﺒﻞ ﲢﻮﻳﻠﻬﺎ‪ .‬إن وﺟﻮد ﻫﺬﻩ‬
‫ﻟﻮﺣﺪات ﰲ اﳌﺘﺤﻜﻤﺎت ﻳﺴﺎﻋﺪ ﻋﻠﻰ رﺑﻂ ﺣﺴﺎﺳﺎت أو إﺷﺎرات ﺗﺸﺎﻬﺑﻴﺔ إﱃ أﻗﻄﺎب اﳌﺘﺤﻜﻢ دون اﳊﺎﺟﺔ إﱃ وﺟﻮد ﻋﻨﺎﺻﺮ ﺧﺎرﺟﻴﺔ‬
‫إﺿﺎﻓﻴﺔ‪ ،‬وﻳﺒﺴﻂ اﻟﺪارة اﳌﻄﺒﻮﻋﺔ ﳑﺎ ﻳﺰﻳﺪ ﻣﻦ ﻣﻮﺛﻮﻗﻴﺔ اﻟﻨﻈﺎم‪ .‬اﻟﺸﻜﻞ‪ 50-1‬ﻳﺒﲔ اﳌﺨﻄﻂ اﻟﺼﻨﺪوﻗﻲ ﻟﻮﺣﺪة اﻟﺘﺒﺪﻳﻞ ﻟﺘﺸﺎﻬﺑﻲ اﻟﺮﻗﻤﻲ ﰲ‬
‫ﻣﻌﺎﳉﺎت ‪.AVR32‬‬

‫اﻟﺸﻜﻞ‪ 50-1‬اﳌﺨﻄﻂ اﻟﺼﻨﺪوﻗﻲ ﻟﻤﺒﺪل اﻟﺘﺸﺎﻬﺑﻲ اﻟﺮﻗﻤﻲ ﰲ ﻣﺘﺤﻜﻤﺎت ‪.AVR32‬‬

‫ﺘﻮﻓﺮ ﰲ اﳌﺒﺪﻻت اﻟﺘﺸﺎﻬﺑﻴﺔ اﻟﺮﻗﻤﻴﺔ ﻟﻠﻌﺎﺋﻠﺔ ‪ AVR-Xmega‬ﻣﻴﺰة اﳌﻌﺎﳉﺔ اﳌﺘﻮازﻳﺔ اﻟﺘﺰاﻣﻨﻴﺔ )‪ (Pipelining‬ﺑﺄرﺑﻊ ﻗﻨﻮات‪ ،‬ﺣﻴﺚ ﳝﻜﻦ ﻗﺮاءة‬
‫إﺷﺎرات أرﺑﻊ ﻣﺒﺪﻻت وﻣﻌﺎﳉﺘﻬﺎ ﻋﻠﻰ اﻟﺘﻮازي ﻛﻤﺎ ﻫﻮ ﻣﺒﲔ ﻋﻠﻰ اﻟﺸﻜﻞ‪.51-1‬‬

‫‪AVR-Xmega‬‬ ‫اﻟﺸﻜﻞ‪ 51-1‬اﳌﻌﺎﳉﺔ اﳌﺘﻮازﻳﺔ ﰲ ﳌﺒﺪل اﻟﺘﺸﺎﻬﺑﻲ اﻟﺮﻗﻤﻲ ﳌﺘﺤﻜﻤﺎت‬

‫‪35‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Embedded Systems‬‬ ‫اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ |‬

‫‪10-1-3-15-1‬ﶈﻮل اﻟﺮﻗﻤﻲ اﻟﺘﺸﺎﻬﺑﻲ )‪:(DAC‬‬

‫ﺗﺘﻮﻓﺮ ﰲ ﺑﻌﺾ اﳌﺘﺤﻜﻤﺎت اﳌﺼﻐﺮة )ﻏﺎﻟﺒﺎً ﰲ ﻣﺘﺤﻜﻤﺎت ‪ 16, 32-bit‬وﺣﺪات ﲢﻮﻳﻞ رﻗﻤﻲ ﺗﺸﺎﻬﺑﻲ ‪ .12, 16-bit‬ﻛﻤﺎ ﻳﺘﻢ ﺗﺰوﻳﺪ ﻫﺬﻩ‬
‫ﻟﻮﺣﺪات ﺑﺪارة ﺗﻌﻮﻳﺾ اﻹزاﺣﺔ اﳋﻄﻴﺔ واﻟﺮﺑﺢ‪ .‬إن اﳍﺪف اﻷﺳﺎﺳﻲ ﻣﻦ وﺟﻮد ﻣﺒﺪﻻت رﻗﻤﻴﺔ ﺗﺸﺎﻬﺑﻴﺔ ﻫﻮ دﻋﻢ اﻟﺘﻄﺒﻴﻘﺎت اﻟﱵ ﺗﺘﻄﻠﺐ‬
‫ﻣﻌﺎﳉﺔ وﺗﻮﻟﻴﺪ اﻹﺷﺎرة اﻟﺼﻮﺗﻴﺔ‪.‬‬

‫‪11-1-3-15-1‬ﳌﻘﺎرن اﻟﺘﺸﺎﻬﺑﻲ )‪:(Analog Comparators‬‬

‫ﻌﺘﱪ اﳌﻘﺎرن اﻟﺘﺸﺎﻬﺑﻲ ﻣﻦ ﻋﻨﺎﺻﺮ وﺣﺪات اﻟﺘﺤﻮل اﻟﺘﺸﻬﺑﻲ وﻳﺘﻮﻓﺮ ﰲ اﳌﺘﺤﻜﻤﺎت ﺑﻘﻨﻮات ﻣﺘﻌﺪدة ﻣﺘﺼﻠﺔ إﱃ ﻣﻮزع )‪،(Multiplexer‬‬
‫ﻳﺴﺘﺨﺪم ﳌﻘﺎرﻧﺔ إﺷﺎرﺗﲔ ﺗﺸﺎﻬﺑﻴﺘﲔ أو أﻛﺜﺮ‪.‬‬

‫‪12-1-3-15-1‬اﳌﻘﺎﻃﻌﺎت )‪:(Interrupts‬‬
‫ﲤﺘﻠﻚ اﳌﺘﺤﻜﻤﺎت اﳌﺼﻐﺮة ﳎﻤﻮﻋﺔ واﺳﻌﺔ ﻣﻦ اﳌﻘﺎﻃﻌﺎت‪ ،‬وﻫﻲ ﺗﻘﺴﻢ ﺑﺸﻜﻞ ﻋﺎم إﱃ ﻣﻘﺎﻃﻌﺎت ﺧﺎرﺟﻴﺔ )أﺣﺪاث ﻓﻴﺰﻳﺎﺋﻴﺔ ﻋﻠﻰ أﻗﻄﺎب‬
‫اﳌﺘﺤﻜﻢ(‪ ،‬وﻣﻘﺎﻃﻌﺎت داﺧﻠﻴﺔ )أﺣﺪاث ﺑﺮﳎﻴﺔ(‪ ،‬وﻟﻜﻞ ﻣﻘﺎﻃﻌﺔ ﻣﻦ ﻫﺬﻩ اﳌﻘﺎﻃﻌﺎت ﻋﻠﻢ ﻳﺴﻤﻰ ﺷﻌﺎع اﳌﻘﺎﻃﻌﺔ )‪(Interrupt Vector‬‬
‫ﺴﺘﺨﺪم ﻟﻠﺘﺤﻜﻢ ﺑﺘﻨﻔﻴﺬ اﳌﻘﺎﻃﻌﺎت وﻓﻘﺎً ﻷوﻟﻮﻳﺎﻬﺗﺎ‪ .‬ﺗﻘﻮم وﺣﺪة اﻟﺘﺤﻜﻢ ﺑﺎﳌﻘﺎﻃﻌﺎت ﺑﺘﻤﻜﲔ ﻣﻴﺰة اﻟﺘﻌﺎﻣﻞ ﻣﻊ اﳌﻘﺎﻃﻌﺎت ﺑﻌﺪة ﻣﺴﺘﻮﻳﺎت‬
‫أوﻟﻮﻳﺔ )‪ ،(multi-level interrupt‬وذﻟﻚ ﻟﻜﻞ وﺣﺪة ﻣﻦ وﺣﺪات اﶈﻴﻄﻴﺎت‪ ،‬ﺣﻴﺚ أن اﳌﻘﺎﻃﻌﺔ ذات اﻷوﻟﻮﻳﺔ اﻷﻋﻠﻰ ﺗﺴﺘﻄﻴﻊ أن‬
‫ﺗﻘﺎﻃﻊ اﳌﻘﺎﻃﻌﺔ اﻷدﱏ ﻣﻨﻬﺎ أوﻟﻮﻳﺔ ﺧﻼل ﺗﻨﻔﻴﺬﻫﺎ ﰒ ﺗﻌﻮد ﻹﻛﻤﺎل اﳌﻘﺎﻃﻌﺔ اﻟﱵ ﰎ ﺗﻮﻗﻴﻔﻬﺎ وﻫﻜﺬا‪ .‬ﻋﻠﻰ اﻟﺸﻜﻞ‪ 52-1‬ﲢﺼﻞ أوﻻً اﳌﻘﺎﻃﻌﺔ‬
‫"‪ "1‬وأﺛﻨﺎء ﺗﻨﻔﻴﺬﻫﺎ ﲢﺼﻞ اﳌﻘﺎﻃﻌﺔ "‪ "2‬اﻟﱵ ﳍﺎ أوﻟﻮﻳﺔ أﻋﻠﻰ‪ ،‬ﻓﻴﺘﻢ إﻳﻘﺎف اﳌﻘﺎﻃﻌﺔ اﻷوﱃ ﻣﺆﻗﺘﺎً ﻟﻴﺘﻢ ﺗﻨﻔﻴﺬ اﳌﻘﺎﻃﻌﺔ اﻟﺜﺎﻧﻴﺔ‪ ،‬وﺧﻼل ﺗﻨﻔﻴﺬ‬
‫اﳌﻘﺎﻃﻌﺔ اﻟﺜﺎﻧﻴﺔ ﲢﺼﻞ اﳌﻘﺎﻃﻌﺔ "‪ "3‬اﻟﱵ ﳍﺎ أﻋﻠﻰ أوﻟﻮﻳﺔ ﺑﲔ اﳌﻘﺎﻃﻌﺎت‪ ،‬ﻓﻴﻨﺘﻘﻞ اﻟﱪﻧﺎﻣﺞ ﻟﺘﻨﻔﻴﺬﻫﺎ ﻟﻴﻌﻮد ﺑﻌﺪﻫﺎ ﻹﻛﻤﺎل اﳌﻘﺎﻃﻌﺔ اﻟﺜﺎﻧﻴﺔ‪ ،‬وﻣﻦ‬
‫ﰒ اﳌﻘﺎﻃﻌﺔ اﻷوﱃ ذات اﻷوﻟﻮﻳﺔ اﻷدﱏ‪.‬‬

‫اﻟﺸﻜﻞ‪ 52-1‬ﺗﻨﻔﻴﺬ اﳌﻘﺎﻃﻌﺎت وﻓﻘﺎً ﻟﻸوﻟﻮﻳﺎت‬

‫‪ 13-1-3-15-1‬ﻣﺼﺎدر اﻟﺘﻮﻗﻴﺖ )‪:(Oscillator Sources‬‬

‫ﲤﺘﻠﻚ ﻋﺎﺋﻼت اﳌﺘﺤﻜﻤﺎت ﻋﺪة أﻧﻮاع ﳐﺘﻠﻔﺔ ﻣﻦ ﻣﻮﻟﺪات ﺗﺮدد ﻋﻤﻞ اﳌﻌﺎﰿ )اﳍﺰازات(‪ ،‬واﻟﺬي ﻳﺘﻴﺢ ﳌﺼﻤﻢ اﻟﻨﻈﺎم اﺧﺘﻴﺎر ﻣﺼﺪر اﻟﱰدد‬
‫اﻷﻧﺴﺐ ﳌﺘﻄﻠﺒﺎت اﻟﻨﻈﺎم اﳌﻄﻠﻮب‪ ،‬واﻟﺬي ﻳﻌﺘﻤﺪ ﺑﺸﻜﻞ أﺳﺎﺳﻲ ﻋﻠﻰ اﻷداء واﺳﺘﻬﻼك اﻟﻄﺎﻗﺔ‪ .‬ﻣﺼﺎدر اﳍﺰازات اﻟﱵ ﳝﻜﻦ ﲢﺪﻳﺪﻫﺎ‬
‫ﺑﺎﻟﻨﺴﺒﺔ ﳌﻌﺎﳉﺎت ‪ AVR‬ﻫﻲ‪:‬‬

‫ﻫﺰاز ﻛﺮﻳﺴﺘﺎﱄ ﺧﺎرﺟﻲ )‪ :(External crystal oscillator‬ﻋﺎﱄ اﻟﺪﻗﺔ واﻟﱰدد‪ ،‬ﺣﺴﺎس ﲡﺎﻩ اﻟﺼﺪﻣﺎت اﳌﻴﻜﺎﻧﻴﻜﻴﺔ واﻟﻀﺠﻴﺞ‬ ‫‹‬
‫اﻟﻜﻬﺮوﻣﻐﻨﺎﻃﻴﺴﻲ‪.‬‬
‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪36‬‬
‫‪21‬‬ ‫‪Chapter 1‬‬ ‫اﻟﻔﺼﻞ اﻷول |‬

‫ﻫﺰاز ‪ RC‬ﺧﺎرﺟﻲ )‪ :(External crystal oscillator‬ﻣﻨﺨﻔﺾ اﻟﺪﻗﺔ واﻟﱰدد‪ ،‬ﺣﺴﺎس ﲡﺎﻩ اﻟﻀﺠﻴﺞ اﻟﻜﻬﺮوﻣﻐﻨﺎﻃﻴﺴﻲ‪.‬‬ ‫‹‬
‫ﻣﺼﺪر ﺗﻮﻗﻴﺖ رﻗﻤﻲ ﺧﺎرﺟﻲ )‪ :(External digital clock‬اﻟﺪﻗﺔ ﺗﻌﺘﻤﺪ ﻋﻠﻰ ﻣﺼﺪر اﻟﺘﻮﻗﻴﺖ‪ ،‬ﻳﺘﻴﺢ إﻣﻜﺎﻧﻴﺔ ﻋﻤﻞ ﻣﺘﻮاﻗﺖ‪.‬‬ ‫‹‬
‫ﻫﺰاز ﻛﺮﻳﺴﺘﺎﱄ ‪ 32KHz‬ﺧﺎرﺟﻲ )‪ :(External 32KHz oscillator‬اﺳﺘﻬﻼك ﻃﺎﻗﺔ ﻣﻨﺨﻔﺾ‪ ،‬دﻗﺔ ﻋﺎﻟﻴﺔ‪ ،‬ﺣﺴﺎس ﲡﺎﻩ‬ ‫‹‬
‫اﻟﺼﺪﻣﺎت اﳌﻴﻜﺎﻧﻴﻜﻴﺔ‪.‬‬
‫ﻫﺰاز ﻣﻌﺎﻳﺮ ‪ RC‬داﺧﻠﻲ )‪ :(Internal calibrated RC oscillator‬دﻗﺔ ﻣﺘﻮﺳﻄﺔ‪ ،‬اﺳﺘﻬﻼك ﻃﺎﻗﺔ ﻣﻨﺨﻔﺾ ﺟﺪاً‪ ،‬ﻣﺴﺘﻘﺮ‬ ‫‹‬
‫ﺟﺪاً‪ ،‬ﺗﺮدد ﻋﻤﻞ ﻣﺘﻮﺳﻂ‪.‬‬
‫ﺣﻠﻘﺔ ﻗﻔﻞ ﻃﻮري داﺧﻠﻲ )‪ :(Internal PLL‬ﺗﺴﺘﺨﺪم ﻛﻤﻀﺎﻋﻒ ﺗﺮددي ﻟﺘﺰوﻳﺪ ﻣﺼﺪر ﺗﻮﻗﻴﺖ ﻋﺎﱄ اﻟﱰدد ﻟﻠﻮﺣﺪات اﻟﱵ‬ ‫‹‬
‫ﺗﻌﻤﻞ ﺑﺴﺮﻋﺎت ﻋﺎﻟﻴﺔ ﻋﻠﻰ اﻟﺸﺮﳛﺔ ﻧﻔﺴﻬﺎ‪.‬‬
‫ﺣﻠﻘﺔ ﻗﻔﻞ ﺗﺮددي داﺧﻠﻲ )‪ :(Internal DFLL‬ﻣﺼﺪر ﺗﻮﻗﻴﺖ ﻳﺘﻢ ﺗﻮﻟﻴﺪﻩ ﻋﻠﻰ اﻟﺸﺮﳛﺔ ﻧﻔﺴﻬﺎ‪ ،‬ﻣﺘﻮاﻗﺖ ﻣﻊ ﻣﺼﺪر ﺗﻮﻗﻴﺖ‬ ‫‹‬
‫ﺧﺎرﺟﻲ‪.‬‬

‫اﻟﺸﻜﻞ‪ 53-1‬وﺣﺪة اﻟﺘﻮﻗﻴﺖ ﰲ اﳌﺘﺤﻜﻢ اﳌﺼﻐﺮ ‪AVR‬‬

‫‪ 14-1-3-15-1‬ﻣﺼﺪر اﻟﺘﻐﺬﻳﺔ )‪:(Supply Source‬‬

‫ﺑﻘﺪر ﻣﺎ ﺗﻜﻮن اﻟﺘﻐﺬﻳﺔ اﻟﺮﺋﻴﺴﻴﺔ – ﻷي دارة إﻟﻜﱰوﻧﻴﺔ – ﻣﺼﻤﻤﺔ ﺑﺸﻜﻞ ﺟﻴﺪ وﻓﻖ اﻋﺘﺒﺎرات ﺗﺼﻤﻴﻤﻴﺔ ﻗﻴﺎﺳﻴﺔ‪ ،‬ﺑﻘﺪر ﻣﺎ ﻳﻜﻮن ﻋﻤﻞ‬
‫اﻟﻌﻨﺎﺻﺮ اﻹﻟﻜﱰوﻧﻴﺔ ﰲ اﻟﺪارة ﻣﺴﺘﻘﺮاً وﻗﺮﻳﺒﺎً ﻣﻦ ﻣﻨﺤﲏ اﻟﻌﻤﻞ اﻷﻣﺜﻠﻲ‪.‬‬

‫ﺗﱰاوح اﳉﻬﻮد اﻟﻨﻤﻮذﺟﻴﺔ ﻟﺘﻐﺬﻳﺔ اﳌﻌﺎﳉﺎت ﻣﻦ ‪ 1.2V to 5.5V‬ﻏﲑ أن ﺑﻌﺾ اﳌﻌﺎﳉﺎت ﳝﻜﻦ أن ﺗﻌﻤﻞ ﻋﻨﺪ ﺟﻬﻮد أﻗﻞ ﻣﻦ ‪ 1V‬ﻣﺜﻞ‬
‫اﳌﺘﺤﻜﻢ]‪ ATtiny43U[113‬اﻟﺬي ﳝﻜﻦ أن ﻳﻌﻤﻞ ﻋﻨﺪ ﺟﻬﺪ ‪ ،0.7V‬وﺑﺎﻟﺘﺎﱄ ﳝﻜﻦ ﺗﻐﺬﻳﺘﻪ ﻣﻦ ﺑﻄﺎرﻳﺔ ‪ AA‬واﺣﺪة وﻫﺬا اﻟﻨﻮع ﻣﻦ‬
‫اﳌﺘﺤﻜﻤﺎت ﻳﻌﻤﻞ ﻋﻨﺪ ﺗﺮددات ﻣﻨﺨﻔﻀﺔ‪ ،‬وﺻﻤﻢ ﻣﻦ أﺟﻞ ﺗﻄﺒﻴﻘﺎت ﺧﺎﺻﺔ ﺟﺪاً‪ .‬إن اﻟﻔﻜﺮة ﰲ ﻫﺬا اﳌﺘﺤﻜﻢ ﻫﻮ أﻧﻪ ﳝﻠﻚ دارة ﺗﻌﺰﻳﺰ‬
‫ﺟﻬﺪ ﺗﻘﻮم ﻋﻠﻰ رﻓﻊ ﺟﻬﺪ اﻟﺒﻄﺎرﻳﺔ اﳌﻄﺒﻖ إﱃ ‪.3V‬‬

‫اﻟﺸﻜﻞ‪ 54-1‬وﺻﻞ اﳌﺘﺤﻜﻢ ‪ ATtiny43U‬إﱃ ﺑﻄﺎرﻳﺔ وﺣﻴﺪة‬

‫‪37‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Embedded Systems‬‬ ‫اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ |‬

‫إن اﻟﻌﻼﻗﺔ ﺑﲔ ﺗﺮدد ﻋﻤﻞ اﳌﻌﺎﰿ وﺟﻬﺪ اﻟﺘﻐﺬﻳﺔ اﳌﻄﺒﻖ ﻋﻠﻴﻪ ﻳﻌﺘﱪ ﻣﻦ اﻻﻋﺘﺒﺎرات اﻷﺳﺎﺳﻴﺔ اﳍﺎﻣﺔ‪ ،‬واﻟﱵ ﻳﻐﻔﻞ ﻋﻨﻬﺎ ﻛﺜﲑ ﻣﻦ اﳌﺼﻤﻤﲔ‪ ،‬إذ‬
‫أن اﳌﻌﺎﰿ ﻟﻦ ﻳﻌﻤﻞ ﻋﻨﺪ ﻛﺎﻣﻞ ﳎﺎل اﻟﱰدد ﻣﻦ أﺟﻞ ﺟﻬﺪ اﻟﺘﻐﺬﻳﺔ اﻷﺻﻐﺮي‪ .‬اﻟﺸﻜﻞ‪ 55-1‬ﺑﲔ ﻣﻨﺤﲏ اﻟﻌﻤﻞ اﻵﻣﻦ ﳌﻌﺎﳉﺎت & ‪AVR‬‬

‫‪ PIC‬ﻧﺴﺒﺔ إﱃ اﻟﺘﻐﺬﻳﺔ اﳌﻄﺒﻘﺔ ﻣﻦ أﺟﻞ ﻛﻞ ﺗﺮدد ﻋﻤﻞ ﳝﻜﻦ ﺗﻄﺒﻴﻘﻪ‪ .‬ﻓﻤﻦ أﺟﻞ ﻣﺘﺤﻜﻢ ﻣﺼﻐﺮ ﻣﻦ اﻟﻌﺎﺋﻠﺔ ‪) AVR‬اﳌﻨﺤﲏ ﻋﻠﻰ اﻟﻴﻤﲔ(‬
‫ﻓﺈن اﻟﺘﻐﺬﻳﺔ ‪ 4.5V‬ﺳﺘﺆﻣﻦ ﻋﻤﻞ آﻣﻦ ﻟﻠﻤﻌﺎﰿ ﻋﻨﺪ ﻛﺎﻣﻞ ﳎﺎل ﺗﺮدد ﻋﻤﻞ اﳌﻌﺎﰿ‪ ،‬أﻣﺎ ﻣﻦ أﺟﻞ ﺟﻬﺪ ﺗﻐﺬﻳﺔ ‪ 3V‬ﻓﺈن أﻗﺼﻰ ﺳﺮﻋﺔ ﻋﻤﻞ‬
‫ﻟﻠﻤﺘﺤﻜﻢ ﳚﺐ أن ﻻ ﺗﺰﻳﺪ ﻋﻦ ‪ 8MHZ‬ﻟﻜﻲ ﻳﺒﻘﻰ اﳌﻌﺎﰿ ﺿﻤﻦ ﻣﻨﻄﻘﺔ اﻟﻌﻤﻞ اﻵﻣﻨﺔ‪ ،‬وإﻻ ﻓﺈن اﳌﻌﺎﰿ ﺳﻴﻌﻤﻞ ﺿﻤﻦ ﺷﺮوط ﺣﺮﺟﺔ وﻏﲑ‬
‫ﻣﺴﺘﻘﺮة‪.‬‬

‫إن اﻟﻌﻼﻗﺔ ﺑﲔ أداء اﳌﻌﺎﰿ واﺳﺘﻬﻼك اﻟﺘﻐﺬﻳﺔ )‪ (DMIPS/mW‬ﻫﻲ اﳌﻌﻴﺎر اﻷﺳﺎﺳﻲ ﰲ اﺧﺘﻴﺎر اﳌﻌﺎﳉﺎت اﳌﺨﺼﺼﺔ ﻟﻠﺘﻄﺒﻴﻘﺎت اﶈﻤﻮﻟﺔ‬
‫)ﻫﻮاﺗﻒ ﳏﻤﻮﻟﺔ‪ ،‬أﺟﻬﺰة ﻛﻔﻴﺔ( ﺣﻴﺚ ﳚﺐ أن ﻳﻜﻮن اﺳﺘﻬﻼك اﻟﻄﺎﻗﺔ أﺻﻐﺮي وأداء اﳌﻌﺎﰿ أﻋﻈﻤﻲ‪ .‬اﳉﺪول‪ 6-1‬ﻳﺒﲔ ﻣﻘﺎرﻧﺔ اﻷداء ﻧﺴﺒﺔ‬
‫إﱃ اﺳﺘﻄﺎﻋﺔ اﻟﻌﻤﻞ ﻷﺷﻬﺮ ﻋﺎﺋﻼت اﳌﺘﺤﻜﻤﺎت اﳌﺼﻐﺮة ذات ﻧﺎﻗﻞ ‪ 32-bit‬ﺣﻴﺚ أن اﳌﻌﺎﰿ ‪ AVR32 UC3B‬ﻳﻌﻤﻞ ﻋﻨﺪ ﺗﺮدد‬
‫‪ 60MHz‬وﻳﺴﺘﺠﺮ ﺗﻴﺎر ‪ 13.8 mA‬ﻛﻤﺎ أن اﻻﺳﺘﻄﺎﻋﺔ اﳌﺴﺘﻬﻠﻜﺔ ﻟﻜﻞ ‪ 1MHz‬ﻫﻲ ‪ 1.26mW‬ﻓﻘﻂ‪.‬‬

‫اﻟﺸﻜﻞ‪ 55-1‬اﻟﻌﻼﻗﺔ ﺑﲔ ﺟﻬﺪ اﻟﺘﻐﺬﻳﺔ ﻣﱰدد ﻋﻤﻞ اﳌﻌﺎﰿ‬

‫‪Device‬‬ ‫‪CPU‬‬ ‫‪FoscMAX‬‬ ‫‪DMIPSMAX‬‬ ‫‪DMIPS/mW‬‬ ‫‪Idd36MHz/3v3‬‬ ‫‪mW/MHz‬‬

‫‪AVR32 UC3B‬‬ ‫‪AVR32‬‬ ‫‪60 MHz‬‬ ‫‪82 DMIPS‬‬ ‫‪1.08‬‬ ‫‪13.8 mA‬‬ ‫‪1.26‬‬

‫‪AVR32 UC3A‬‬ ‫‪AVR32‬‬ ‫‪66 MHz‬‬ ‫‪89 DMIPS‬‬ ‫‪0.73‬‬ ‫‪20.3 mA‬‬ ‫‪1.86‬‬

‫‪STM32F103‬‬ ‫‪Cortex-M3‬‬ ‫‪72 MHz‬‬ ‫‪90 DMIPS‬‬ ‫‪0.62‬‬ ‫‪22 mA‬‬ ‫‪2.01‬‬

‫‪LM3S6965‬‬ ‫‪Cortex-M3‬‬ ‫‪50 MHz‬‬ ‫‪63 DMIPS‬‬ ‫‪0.39‬‬ ‫‪35 mA‬‬ ‫‪3.03‬‬

‫‪LPC236x‬‬ ‫‪ARM7‬‬ ‫‪72 MHz‬‬ ‫‪50 DMIPS‬‬ ‫‪0.13‬‬ ‫‪57 mA‬‬ ‫‪5.22‬‬

‫‪SAM7X512‬‬ ‫‪ARM7‬‬ ‫‪55 MHz‬‬ ‫‪39 DMIPS‬‬ ‫‪0.32‬‬ ‫‪24 mA‬‬ ‫‪-‬‬

‫اﳉﺪول‪ 6-1‬ﻣﻘﺎرﻧﺔ اﻷداء ﻧﺴﺒﺔ إﱃ اﺳﺘﻄﺎﻋﺔ اﻟﻌﻤﻞ ﻷﺷﻬﺮ ﻋﺎﺋﻼت اﳌﺘﺤﻜﻤﺎت اﳌﺼﻐﺮة ذات ﻧﺎﻗﻞ ﺑﻌﺮض ‪32-bit‬‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪38‬‬
‫‪21‬‬ ‫‪Chapter 1‬‬ ‫اﻟﻔﺼﻞ اﻷول |‬

‫‪ 15-1-3-15-1‬ﺗﻴﺎر ﲢﻤﻴﻞ أﻗﻄﺎب اﻟﺪﺧﻞ واﳋﺮج )‪:(I/O Source/Sink Current‬‬

‫ﻣﻦ اﻻﻋﺘﺒﺎرات اﳍﺎﻣﺔ ﺟﺪاً اﻟﱵ ﳚﺐ ﺮاﻋﺎﻬﺗﺎ ﻋﻨﺪ رﺑﻂ أﻗﻄﺎب اﳌﻌﺎﰿ إﱃ اﻷﲪﺎل ﻫﻮ اﻟﺘﻴﺎر اﻷﻋﻈﻤﻲ اﳌﺴﺘﻬﻠﻚ ﻣﻦ ﻗﻄﺐ اﳌﻌﺎﰿ‪ .‬إن ﻗﻴﻤﺔ‬
‫اﻟﺘﻴﺎر اﻟﱵ ﳝﻜﻦ ﺳﺤﺒﻬﺎ أو ﺗﺼﺮﻳﻔﻬﺎ ﻟﻘﻄﺐ دﺧﻞ‪/‬ﺧﺮج ﻣﻦ أﻗﻄﺎب اﳌﻌﺎﰿ ﺗﱰاوح ﻋﺎدة ﻣﻦ ‪ 10~40mA‬ﺣﺴﺐ اﳌﻮاﺻﻔﺎت اﻟﻜﻬﺮﺑﺎﺋﻴﺔ‬
‫ﻟﻌﺎﺋﻠﺔ اﳌﻌﺎﰿ‪ ،‬ﻛﻤﺎ أن ﳎﻤﻮع اﻟﺘﻴﺎر اﻷﻋﻈﻤﻲ – ﳎﻤﻮع ﺗﻴﺎرات اﻷﻗﻄﺎب وﺗﻴﺎر اﻟﺘﺸﻐﻴﻞ ﻟﻠﻤﺘﺤﻜﻢ – اﻟﺬي ﳝﻜﻦ ﺳﺤﺒﻪ ﻣﻦ ﲨﻠﺔ أﻗﻄﺎب‬
‫اﳌﻌﺎﰿ أو ﺗﺼﺮﻳﻔﻪ ﻓﻴﻬﺎ ﻳﱰاوح ﺑﲔ ‪ .100~200mA‬إن أي اﺳﺘﺠﺮار زاﺋﺪ ﻟﻠﺘﻴﺎر ﻣﻦ ﻗﻄﺐ اﳌﻌﺎﰿ ﺳﻴﺆدي إﱃ ﺿﺮر ﻛﺒﲑ ﻓﻴﻪ‪.‬‬

‫‪ 4-15-1‬ﻣﻌﺎﳉﺎت اﻹﺷﺎرة اﻟﺮﻗﻤﻴﺔ )‪:(DSPs‬‬

‫ﺗﻌﺘﱪ ﻣﻌﺎﳉﺔ اﻹﺷﺎرة اﻟﺮﻗﻤﻴﺔ ﻣﻦ اﻟﺘﻘﻨﻴﺎت اﳍﺎﻣﺔ اﻟﱵ ﲢﻜﻢ اﻟﺘﻄﻮر ﰲ اﻟﻘﺮن اﳊﺎﱄ‪ ،‬ﺣﻴﺚ إ�ﺎ ﺗﺪﺧﻞ ﰲ ﺗﻄﺒﻴﻘﺎت ﻛﺜﲑة ﻣﺘﻨﻮﻋﺔ ﻣﺜﻞ‪:‬‬
‫اﻻﺗﺼﺎﻻت‪ ،‬اﻟﺘﺼﻮﻳﺮ اﻟﻄﱯ‪ ،‬اﻟﺮادار واﻟﺴﻮﻧﺎر‪ ،‬اﺳﺘﺨﺮاج اﻟﻨﻔﻂ‪ ،‬وﻏﲑﻫﺎ اﻟﻜﺜﲑ ﻣﻦ اﻟﺘﻄﺒﻴﻘﺎت‪.‬‬

‫اﻟﺸﻜﻞ ‪ 56-1‬ﻃﻴﻒ ﻣﻦ اﻟﺘﻄﺒﻴﻘﺎت ﺗﺴﺘﺨﺪم ﻣﻌﺎﳉﺎت اﻹﺷﺎرة اﻟﺮﻗﻤﻴﺔ‬

‫ﺗﺼﻨﻒ ﻣﻌﺎﳉﺎت اﻹﺷﺎرة اﻟﺮﻗﻤﻴﺔ ﺿﻤﻦ اﳌﻌﺎﳉﺎت اﳋﺎﺻﺔ اﻟﱵ ﲤﻠﻚ ﺑﻨﻴﺔ أﻣﺜﻠﻴﺔ ﳐﺼﺼﺔ ﻟﺘﻄﺒﻴﻘﺎت ﻣﻌﺎﳉﺔ اﻹﺷﺎرة اﻟﺮﻗﻤﻴﺔ ﺑﺴﺮﻋﺎت‬
‫ﻋﺎﻟﻴﺔ]‪ .[114‬اﻟﺸﻜﻞ‪ 57-1‬ﻳﺒﲔ ﲤﺜﻴﻼً ﻋﺎﻣﺎً ﻟﻨﻈﺎم ﻣﻌﺎﳉﺔ إﺷﺎرة ﺻﻮﺗﻴﺔ ﺑﺎﺳﺘﺨﺪام اﳊﺎﺳﺐ‪.‬‬

‫اﻟﺸﻜﻞ‪ 57-1‬ﻧﻈﺎم ﻣﻌﺎﳉﺔ إﺷﺎرة رﻗﻤﻴﺔ ﺑﺎﺳﺘﺨﺪام اﳊﺎﺳﺐ اﻟﺸﺨﺼﻲ‬

‫ﻋﻠﻰ اﻟﺮﻏﻢ ﻣﻦ أن ﺑﻌﺾ اﳌﺘﺤﻜﻤﺎت اﳌﺼﻐﺮة )‪ (dsPIC, AVR32‬ﲤﺘﻠﻚ وﺣﺪة ﻣﻌﺎﳉﺔ إﺷﺎرة رﻗﻤﻴﺔ‪ ،‬إﻻ أن ﻫﺬﻩ اﳌﻌﺎﳉﺎت ﻻ ﳝﻜﻦ‬
‫اﺳﺘﺨﺪاﻣﻬﺎ ﰲ اﻟﺘﻄﺒﻴﻘﺎت اﻟﱵ ﺗﻌﺘﻤﺪ ﻛﻠﻴﺎً ﻋﻠﻰ ﻣﻌﺎﳉﺎت إﺷﺎرة رﻗﻤﻴﺔ ﳐﺼﺼﺔ )أﺟﻬﺰة اﳍﻮاﺗﻒ اﻟﻨﻘﺎﻟﺔ واﳍﻮاﺗﻒ اﻟﺬﻛﻴﺔ(‪ ،‬وذﻟﻚ ﻟﻜﻮن ﻫﺬﻩ‬
‫اﻷﺟﻬﺰة ﺗﺘﻄﻠﺐ اﺳﺘﻬﻼك ﻣﻨﺨﻔﺾ ﻟﻠﻄﺎﻗﺔ‪ ،‬ﻛﻤﺎ أن ﺧﻮارزﻣﻴﺎت ﻣﻌﺎﳉﺔ اﻹﺷﺎرة اﻟﺮﻗﻤﻴﺔ )ﺻﻮت‪ ،‬ﺻﻮرة‪ ،‬ﻓﻴﺪﻳﻮ( ﺗﺘﻄﻠﺐ ﻋﺪد ﻛﺒﲑ ﻣﻦ‬
‫اﻟﻌﻤﻠﻴﺎت اﻟﺮﻳﺎﺿﻴﺔ اﳌﻌﻘﺪة اﻟﱵ ﲢﺘﺎج إﱃ أن ﻳﺘﻢ ﺗﻨﻔﻴﺬﻫﺎ ﺑﺴﺮﻋﺔ وﺑﺸﻜﻞ ﻣﺘﻜﺮر‪.‬‬

‫ﰲ ﻋﺎم ‪ 1979‬ﻇﻬﺮت أول ﺷﺮﳛﺔ ﻣﺪﳎﺔ ﳌﻌﺎﰿ إﺷﺎرة رﻗﻤﻴﺔ )‪ (DSP-1‬ﻣﻦ ﻗﺒﻞ ﺷﺮﻛﺔ ‪ ،Bell-Labs‬واﻟﱵ ﻛﺎﻧﺖ ﻋﺒﺎرة ﻋﻦ ﻣﻌﺎﰿ ﻣﺼﻐﺮ ﰎ‬
‫ﺗﺰوﻳﺪﻩ ﺑﺈﻣﻜﺎﻧﻴﺎت ﻣﻌﺎﳉﺔ رﻳﺎﺿﻴﺔ ﻣﻌﻘﺪة‪ ،‬وﰎ اﺳﺘﺨﺪاﻣﻪ ﰲ أﺟﻬﺰة اﳍﻮاﺗﻒ واﻟﺘﻠﻐﺮاف ‪ .[115-116]AT&T‬ﰲ ﻋﺎم ‪ 1980‬ﻇﻬﺮ أول ﻣﻌﺎﰿ‬
‫ﻳﺪﻋﻢ ﻣﻌﺎﳉﺔ رﻗﻤﻴﺔ ﺑﺎﻟﻔﺎﺻﻠﺔ اﻟﻌﺎﺋﻤﺔ )‪ (µPD7720‬ﻣﻦ ﻗﺒﻞ ﺷﺮﻛﺔ ‪ NEC‬واﻟﺬي ﰎ اﺳﺘﺨﺪاﻣﻪ ﰲ ﺗﻄﺒﻴﻘﺎت ‪ voice-band‬وﻳﻌﺘﱪ ﻣﻦ‬
‫‪39‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Embedded Systems‬‬ ‫اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ |‬

‫ﻣﻌﺎﳉﺎت اﻹﺷﺎرة اﻟﺮﻗﻤﻴﺔ اﻷ َُول اﻷﳒﺢ ﲡﺎرﻳﺎً ﰲ ذاك اﻟﻮﻗﺖ‪ .‬ﰲ ﻋﺎم ‪ 1983‬ﻇﻬﺮ اﳌﻌﺎﰿ ‪ TMS32010‬اﻟﺬي أﻧﺘﺠﺘﻪ اﻟﺸﺮﻛﺔ اﻟﺮاﺋﺪة ﰲ‬
‫ﺻﻨﺎﻋﺔ ﻣﻌﺎﳉﺎت اﻹﺷﺎرة اﻟﺮﻗﻤﻴﺔ ‪ Texas Instruments‬وﻗﺪ ﻻﻗﻰ ﳒﺎﺣﺎً ﻛﺒﲑاً آﻧﺬاك‪ ،‬ﺣﻴﺚ اﺳﺘﺨﺪﻣﺖ ﻓﻴﻪ اﻟﺒﻨﻴﺔ ‪ Harvard‬وﻛﺎن ﻟﻪ‬
‫ذاﻛﺮﺗﲔ ﻣﻨﻔﺼﻠﺘﲔ )ذاﻛﺮة ﺑﻴﺎﻧﺎت وذاﻛﺮة ﺗﻌﻠﻴﻤﺎت( ﺑﺎﻹﺿﺎﻓﺔ إﱃ ﻗﺪرﺗﻪ ﻋﻠﻰ اﻟﺘﻌﺎﻣﻞ ﻣﻊ أرﻗﺎم ﺑﻄﻮل ‪ .16-bit‬اﻟﺸﻜﻞ‪ 58-1‬ﻳﺒﲔ ﺻﻮرة‬
‫ﺷﺮﳛﺔ اﳌﻌﺎﰿ ‪ TMS320C30‬اﻷﻛﺜﺮ اﻧﺘﺸﺎراً ﰲ ﻓﱰة اﻟﺜﻤﺎﻧﻴﻨﻴﺎت‪ .‬اﻟﺸﻜﻞ‪ 59-1‬ﻳﺒﲔ ﺻﻮرة اﻟﺒﻨﻴﺔ اﻟﺪاﺧﻠﻴﺔ ﻋﻠﻰ اﳌﺴﺘﻮى اﻟﺴﻴﻠﻴﻜﻮﱐ‬
‫ﻟﺸﺮﳛﺔ اﳌﻌﺎﰿ ‪ DSP-1‬أول ﺷﺮﳛﺔ ﻣﺪﳎﺔ ﳌﻌﺎﰿ إﺷﺎرة رﻗﻤﻴﺔ‪.‬‬

‫اﻟﺸﻜﻞ‪ 58-1‬ﺷﺮﳛﺔ اﳌﻌﺎﰿ ‪TMS320C30‬‬

‫اﻟﺸﻜﻞ‪ 59-1‬ﺑﻨﻴﺔ اﻟﺸﺮﳛﺔ ‪ DSP-1‬أول ﺷﺮﳛﺔ ﻣﺪﳎﺔ ﳌﻌﺎﰿ إﺷﺎرة رﻗﻤﻴﺔ‬

‫ﻣﺒﺪأ اﻟﻌﻤﻞ اﻷﺳﺎﺳﻲ ﻳﺘﻠﺨﺺ ﲟﺎ ﻳﻠﻲ‪ :‬ﻘﻮم ﻣﻌﺎﳉﺎت اﻹﺷﺎرة اﻟﺮﻗﻤﻴﺔ ﻋﻠﻰ ﺗﻄﺒﻴﻖ ﺧﻮارزﻣﻴﺎت رﻳﺎﺿﻴﺔ ﻟﺘﺤﻠﻴﻞ اﻹﺷﺎرات اﻟﺘﺸﺎﻬﺑﻴﺔ ﻣﻦ‬
‫ﻣﺼﺎدرﻫﺎ اﻟﻔﻴﺰﻳﺎﺋﻴﺔ ﺑﺪف ﻓﺼﻞ اﳌﻌﻠﻮﻣﺎت اﻷﺳﺎﺳﻴﺔ ﻋﻦ اﻟﻀﺠﻴﺞ اﳌﱰاﻛﺐ ﻋﻠﻰ اﻹﺷﺎرة‪ ،‬ﺣﻴﺚ ﺘﻢ أوﻻً ﲢﻮﻳﻞ اﻹﺷﺎرة اﻟﺘﺸﺎﻬﺑﻴﺔ إﱃ إﺷﺎرة‬
‫ﻗﻤﻴﺔ ﺑﺎﺳﺘﺨﺪام ﻣﺒﺪل ﺗﺸﺎﻬﺑﻲ رﻗﻤﻲ )‪ ،(ADC‬ﰒ ﻳﺘﻢ ﺗﻄﺒﻴﻖ ﺧﻮارزﻣﻴﺎت رﻳﺎﺿﻴﺔ ﻣﺜﻞ ﻣﺮﺷﺢ ﲢﻮﻳﻞ ﻓﻮرﻳﻪ اﻟﺴﺮﻳﻊ )‪ (FFTF‬اﻟﺬي ﻳﻘﻮم‬
‫ﻋﻠﻰ اﺳﺘﺨﻼص إﺷﺎرة اﳌﻌﻠﻮﻣﺎت اﻷﺳﺎﺳﻴﺔ‪ ،‬وﺑﻌﺪ ﻫﺬﻩ اﳌﺮﺣﻠﺔ ﻳﺘﻢ إﻋﺎدة ﲢﻮﻳﻞ اﻟﺒﻴﺎﻧﺎت اﻟﺮﻗﻤﻴﺔ اﳌﺮﺷﺤﺔ إﱃإﺷﺎرة ﺗﺸﺎﻬﺑﻴﺔ ﺑﺎﺳﺘﺨﺪام ﻣﺒﺪل‬
‫ﻗﻤﻲ ﺗﺸﺎﻬﺑﻲ )‪.(DAC‬‬

‫‪ 1-4-15-1‬اﻷﻧﻮاع اﻷﺳﺎﺳﻴﺔ ﳌﻌﺎﳉﺎت اﻹﺷﺎرة اﻟﺮﻗﻤﻴﺔ )‪:[117](General Types of DSPs‬‬

‫‪ -1‬ﻣﻌﺎﳉﺎت إﺷﺎرة رﻗﻤﻴﺔ ﺑﺎﻟﻔﺎﺻﻠﺔ اﻟﺜﺎﺑﺘﺔ ﻟﻠﺘﻄﺒﻴﻘﺎت اﻟﺒﺴﻴﻄﺔ )‪.(Low End Fixed Point DSPs‬‬
‫أﻣﺜﻠﺔ‪.TMS320C2XX, ADSP21XX, DSP56XXX :‬‬
‫‪ -2‬ﻣﻌﺎﳉﺎت إﺷﺎرة رﻗﻤﻴﺔ ﺑﺎﻟﻔﺎﺻﻠﺔ اﻟﺜﺎﺑﺘﺔ ﻟﻠﺘﻄﺒﻴﻘﺎت اﳌﺘﻘﺪﻣﺔ )‪.(High End Fixed Point DSPs‬‬
‫أﻣﺜﻠﺔ‪TMS320C55XX, DSP16XXX, ADSP215XX, DSP56800 :‬‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪40‬‬
‫‪21‬‬ ‫‪Chapter 1‬‬ ‫اﻟﻔﺼﻞ اﻷول |‬

‫‪ -3‬ﻣﻌﺎﳉﺎت إﺷﺎرة رﻗﻤﻴﺔ ﺑﺎﻟﻔﺎﺻﻠﺔ اﻟﻌﺎﺋﻤﺔ )‪.(Floating Point DSPs‬‬

‫أﻣﺜﻠﺔ‪TMS320C3X, C67XX, ADSP210XX, DSP96000, DSP32XX :‬‬

‫‪ 2-4-15-1‬ﻣﻌﺎﳉﺎت اﻹﺷﺎرة اﻟﺮﻗﻤﻴﺔ ﺑﺎﻟﻔﺎﺻﻠﺔ اﻟﻌﺎﺋﻤﺔ واﻟﺜﺎﺑﺘﺔ )‪:(Fixed Point vs. Floating Point DSPs‬‬

‫ﰲ ﻧﻈﺎم اﻟﻔﺎﺻﻠﺔ اﻟﺜﺎﺑﺘﺔ )‪ (Fixed Point‬ﻳﻜﻮن ﻟﻠﻔﺎﺻﻠﺔ اﻟﻌﺸﺮﻳﺔ )اﻟﺜﻨﺎﺋﻴﺔ( ﻣﻮﺿﻊ ﺛﺎﺑﺖ ﰲ اﳌﺴﺠﻞ‪ ،‬أﻣﺎ ﰲ ﻧﻈﺎم اﻟﻔﺎﺻﻠﺔ اﻟﻌﺎﺋﻤﺔ‬
‫)‪ (Floating Point‬ﻓﻼ ﻳﻜﻮن ﻟﻠﻔﺎﺻﻠﺔ ﻣﻮﻗﻊ ﺛﺎﺑﺖ‪.‬‬

‫ﻓﻤﻦ ﻣﻦ أﺟﻞ رﻗﻢ ذو ﻓﺎﺻﻠﺔ ﻋﺎﺋﻤﺔ وﺑﻄﻮل ‪ ،n-bit‬ﻓﺈﻧﻪ ﳝﻜﻦ أن ﳝﺜﻞ ﺑﻌﺪد ﺻﺤﻴﺢ أو ﻋﺪد ﻛﺴﺮي‪ ،‬وﻣﻦ اﻷﻓﻀﻞ اﻻﻗﺘﺼﺎر ﻋﻠﻰ ﲤﺜﻴﻞ‬
‫اﻷﻋﺪاد اﻟﻜﺴﺮﻳﺔ ﻓﻘﻂ ﰲ ﻧﻈﺎم اﻟﻔﺎﺻﻠﺔ اﻟﺜﺎﺑﺘﺔ؛ ﻷﻧﻪ ﻣﻦ اﻟﺼﻌﺐ ﲣﻔﻴﺾ ﻋﺪد اﳋﺎﻧﺎت ﻟﺘﻤﺜﻴﻞ اﻟﻌﺪد اﻟﺼﺤﻴﺢ‪ .‬اﻟﺸﻜﻞ‪ 60-1‬ﻳﻌﺮض ﲤﺜﻴﻼً‬
‫ﻟﻠﺮﻗﻢ اﻟﻜﺴﺮي ‪ x‬ﰲ ﻧﻈﺎم اﻟﻔﺎﺻﻠﺔ اﻟﺜﺎﺑﺘﺔ‪ ،‬ﺣﻴﺚ ‪ M‬ﻫﻮ ﻋﺪد ﺧﺎﻧﺎت اﳌﻌﻠﻮﻣﺔ‪ ،‬أﻣﺎ اﳋﺎﻧﺔ اﻷﻛﺜﺮ أﳘﻴﺔ ‪ MSB‬ﻓﺘﻤﺜﻞ ﺧﺎﻧﺔ اﻹﺷﺎرة ‪.b0‬‬
‫ﻓﻤﻦ أﺟﻞ ‪ b0=0‬ﻓﺈن ‪.x>0‬‬

‫𝑀𝑏 ‪𝑑 = 𝑏0 . 𝑏1 𝑏2 … 𝑏𝑀−1‬‬

‫‪Binary Point‬‬
‫‪Sign-bit‬‬
‫اﻟﺸﻜﻞ‪ 60-1‬ﲤﺜﻴﻞ اﻷرﻗﺎم اﻟﺜﻨﺎﺋﻴﺔ اﻟﻜﺴﺮﻳﺔ ﰲ ﻧﻈﺎم اﻟﻔﺎﺻﻠﺔ اﻟﺜﺎﺑﺘﺔ‬

‫ﺗﺴﺘﺨﺪم ﻣﻌﺎﳉﺎت اﻹﺷﺎرة اﻟﺮﻗﻤﻴﺔ ذات ﻧﻈﺎم اﻟﻔﺎﺻﻠﺔ اﻟﺜﺎﺑﺘﺔ ﰲ أﻧﻈﻤﺔ اﳌﻌﺎﳉﺔ ﰲ اﻟﺰﻣﻦ اﳊﻘﻴﻘﻲ‪ ،‬وذﻟﻚ ﻷ�ﺎ ﺗﻮﻓﺮ ﺳﺮﻋﺔ ﰲ اﻷداء‪ ،‬وﺗﻜﻮن‬
‫اﻗﺘﺼﺎدﻳﺔ ﻧﺴﺒﻴﺎً‪ .‬أﻣﺎ ﻣﺴﺎوﺋﻬﺎ ﻓﺘﺘﻤﺜﻞ ﺑﺄن ﳍﺎ ﳎﺎﻻً دﻳﻨﺎﻣﻴﻜﻴﺎً ﺻﻐﲑاً ودﻗﺔً ﻣﻨﺨﻔﻀﺔ‪.‬‬

‫ﰲ ﻧﻈﺎم اﻟﻔﺎﺻﻠﺔ اﻟﻌﺎﺋﻤﺔ ﻳﺘﻢ ﲤﺜﻴﻞ اﻷﻋﺪاد اﻟﻜﺴﺮﻳﺔ ﺑﺴﻠﺴﻠﺔ ﻣﻦ اﳋﺎﻧﺎت اﻟﺜﻨﺎﺋﻴﺔ‪ ،‬ﺣﻴﺚ ﺗﻜﻮن اﻟﻔﺎﺻﻠﺔ اﻟﻌﺸﺮﻳﺔ ﻟﻴﺲ ﳍﺎ ﻣﻮﻗﻊ ﺛﺎﺑﺖ ﰲ ﺑﻨﻴﺔ‬
‫اﻟﻌﺪد اﻟﻜﺴﺮي ‪ -‬ﻋﺎﺋﻤﺔ‪ -‬وﺑﺎﻟﺘﺎﱄ ﻻ ﻳﻜﻮن ﻟﻠﻌﺪد اﻟﻜﺴﺮي ﺟﺰء ﺻﺤﻴﺢ وﺟﺰء ﻋﺸﺮي ﳏﺪدﻳﻦ‪ ،‬وإﳕﺎ ﻳﺘﻢ ﲤﺜﻴﻠﻪ ﺗﺒﻌﺎً ﻟﺼﻴﻐﺔ رﻳﺎﺿﻴﺔ ﻣﻌﻴﻨﺔ –‬
‫ﻋﻠﻰ ﺳﺒﻴﻞ اﳌﺜﺎل‪ :‬اﳌﻌﻴﺎر ‪.IEEE Standard 754‬‬

‫إن ﻣﺎ ﳝﻴﺰ ﻧﻈﺎم اﻟﺘﻤﺜﻴﻞ ﺑﺎﻟﻔﺎﺻﻠﺔ اﻟﻌﺎﺋﻤﺔ ﻋﻦ ﻧﻈﺎم اﻟﻔﺎﺻﻠﺔ اﻟﺜﺎﺑﺘﺔ ﻫﻮ ﻛﻮﻧﻪ ﻳﺪﻋﻢ ﲤﺜﻴﻼً ﻟﺎل واﺳﻊ ﻣﻦ اﻷﻋﺪاد واﻟﻘﻴﻢ‪ ،‬ﻓﻌﻠﻰ ﺳﺒﻴﻞ اﳌﺜﺎل‪:‬‬
‫ﻣﻦ أﺟﻞ ﻋﺪد ﺑﻨﻈﺎم اﻟﻔﺎﺻﻠﺔ اﻟﺜﺎﺑﺘﺔ ﻣﻜﻮن ﻣﻦ ﺳﺒﻊ ﺧﺎﻧﺎت ﻋﺸﺮﻳﺔ‪ ،‬وﺗﺘﻮﺿﻊ اﻟﻔﺎﺻﻠﺔ ﰲ اﳋﺎﻧﺔ اﳋﺎﻣﺴﺔ‪ ،‬ﻓﺈن اﻷﻋﺪاد اﻟﱵ ﳝﻜﻦ ﲤﺜﻴﻠﻬﺎ‬
‫ﺳﺘﻜﻮن ﻣﻦ اﻟﺸﻜﻞ‪ .12345.67, 8765.43, 123.00, … :‬ﺑﻴﻨﻤﺎ ﰲ ﻧﻈﺎم اﻟﻔﺎﺻﻠﺔ اﻟﻌﺎﺋﻤﺔ ووﻓﻘﺎً ﻟﻠﻤﻌﻴﺎر ‪،IEEE Standard 754‬‬
‫ﻓﺈن اﻟﺘﻤﺜﻴﻞ ﳝﻜﻦ أن ﻳﺘﻀﻤﻦ أﻳﻀﺎً اﻷﻋﺪاد ﻣﻦ اﻟﺸﻜﻞ‪1.234567, 123456.6, 0.00001234567, 1234567000000000, :‬‬

‫ﻛﻤﺎ ﻫﻮ واﺿﺢ ﻣﻦ اﻟﺘﻤﺜﻴﻞ اﻟﺴﺎﺑﻖ‪ ،‬ﻓﺈن ﻧﻈﺎم اﻟﻔﺎﺻﻠﺔ اﻟﻌﺎﺋﻤﺔ ﺳﻴﻜﻮن أﻋﻠﻰ دﻗﺔً‪ ،‬وﻟﻜﻦ ﺳﻴﺤﺘﺎج إﱃ ﺳﻌﺎت ﲣﺰﻳﻦ أﻛﱪ‪ ،‬ﻛﻤﺎ أﻧﻪ أﻏﻠﻰ‬
‫ﲦﻨﺎً‪ ،‬وأﻗﻞ ﺳﺮﻋﺔ ﻣﻦ ﻧﻈﺎم اﻟﻔﺎﺻﻠﺔ اﻟﺜﺎﺑﺘﺔ‪.‬‬

‫اﳉﺪول‪ 7-1‬ﻳﺒﲔ ﻣﻘﺎرﻧﺔ ﺑﲔ ﺧﺼﺎﺋﺺ ﻣﻌﺎﳉﺎت اﻹﺷﺎرة اﻟﺮﻗﻤﻴﺔ ﺑﺎﻟﻔﺎﺻﻠﺔ اﻟﻌﺎﺋﻤﺔ‪ ،‬وﻣﻌﺎﳉﺎت اﻹﺷﺎرة اﻟﺮﻗﻤﻴﺔ ﺑﺎﻟﻔﺎﺻﻠﺔ اﻟﺜﺎﺑﺘﺔ‪ .‬اﳉﺪول‪8-1‬‬
‫ﻳﺴﺘﻌﺮض أﻫﻢ ﺗﻄﺒﻴﻘﺎت ﻣﻌﺎﳉﺎت اﻹﺷﺎرة اﻟﺮﻗﻤﻴﺔ ﺑﺎﻟﻔﺎﺻﻠﺔ اﻟﻌﺎﺋﻤﺔ واﻟﻔﺎﺻﻠﺔ اﻟﺜﺎﺑﺘﺔ‪.‬‬

‫‪41‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Embedded Systems‬‬ ‫اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ |‬

‫ﻣﻌﺎﻟﺠﺎت اﻹﺷﺎرة اﻟﺮﻗﻤﻴﺔ ﺑﺎﻟﻔﺎﺻﻠﺔ اﻟﻌﺎﺋﻤﺔ‬ ‫ﻣﻌﺎﻟﺠﺎت اﻹﺷﺎرة اﻟﺮﻗﻤﻴﺔ ﺑﺎﻟﻔﺎﺻﻠﺔ اﻟﺜﺎﺑﺘﺔ‬
‫أﻋﻠﻰ ﺳﻌﺮاً‬ ‫أرﺧﺺ ﺳﻌﺮاً‬ ‫اﻟﺴﻌﺮ‬
‫أﻛﱪ ﺣﺠﻤﺎً‬ ‫أﺻﻐﺮ ﺣﺠﻤﺎً‬ ‫اﻟﺤﺠﻢ‬
‫أﻛﺜﺮ اﺳﺘﻬﻼﻛﺎً ﻟﻠﻄﺎﻗﺔ‬ ‫أﻗﻞ اﺳﺘﻬﻼﻛﺎً ﻟﻠﻄﺎﻗﺔ‬ ‫اﺳﺘﻬﻼك اﻟﻄﺎﻗﺔ‬
‫أﻗﻞ ﺗﻌﻘﻴﺪاً‬ ‫أﻛﺜﺮ ﺗﻌﻘﻴﺪاً‬ ‫اﻟﺒﺮﻣﺠﺔ‬
‫أﻛﺜﺮ دﻗﺔً‬ ‫أﻗﻞ دﻗﺔً‬ ‫اﻟﺪﻗﺔ‬
‫ﳎﺎل ﻛﺒﲑ‬ ‫ﳎﺎل ﳏﺪود‬ ‫اﻟﺬاﻛﺮة‬
‫ﺗﺴﺘﺨﺪم ﰲ اﻟﺘﻄﺒﻴﻘﺎت اﳌﺘﻘﺪﻣﺔ‬ ‫ﺗﺴﺘﺨﺪم ﰲ ‪ 95%‬ﻣﻦ اﻟﺘﻄﺒﻴﻘﺎت‬ ‫اﻟﺘﻄﺒﻴﻘﺎت‬
‫‪ 32/40/44/96‬ﺑﺖ‬ ‫‪ 16/24/36/40/56/64‬ﺑﺖ‬ ‫اﻟﺪﻗﺔ‬

‫اﳉﺪول‪ 7-1‬ﺧﺼﺎﺋﺺ ﻣﻌﺎﳉﺎت اﻹﺷﺎرة اﻟﺮﻗﻤﻴﺔ ﺑﺎﻟﻔﺎﺻﻠﺔ اﻟﻌﺎﺋﻤﺔ واﻟﻔﺎﺻﻠﺔ اﻟﺜﺎﺑﺘﺔ‬

‫ﺗﻄﺒﻴﻘﺎت ﻣﻌﺎﻟﺠﺎت اﻹﺷﺎرة اﻟﺮﻗﻤﻴﺔ ﺑﺎﻟﻔﺎﺻﻠﺔ اﻟﺜﺎﺑﺘﺔ‬ ‫ﺗﻄﺒﻴﻘﺎت ﻣﻌﺎﻟﺠﺎت اﻹﺷﺎرة اﻟﺮﻗﻤﻴﺔ ﺑﺎﻟﻔﺎﺻﻠﺔ اﻟﻌﺎﺋﻤﺔ‬

‫‪Portable Products‬‬ ‫•‬ ‫‪Modems‬‬ ‫•‬

‫‪2G, 2.5G and 3G Cell Phones‬‬ ‫•‬ ‫)‪Digital Subscriber Line (DSL‬‬ ‫•‬
‫‪Digital Audio Players‬‬ ‫•‬ ‫‪Wireless Base-stations‬‬ ‫•‬
‫‪Digital Still Cameras‬‬ ‫•‬ ‫‪Central Office Switches‬‬ ‫•‬
‫‪Electronic Books‬‬ ‫•‬ ‫‪Private Branch Exchange‬‬ ‫•‬
‫‪Voice Recognition‬‬ ‫•‬ ‫‪Digital Imaging‬‬ ‫•‬
‫‪GPS Receivers‬‬ ‫•‬ ‫‪3D Graphics‬‬ ‫•‬
‫‪Fingerprint Recognition‬‬ ‫•‬ ‫‪Speech Recognition‬‬ ‫•‬
‫‪Biometrics‬‬ ‫•‬ ‫‪Voice over IP‬‬ ‫•‬

‫اﳉﺪول‪ 8-1‬ﺗﻄﺒﻴﻘﺎت ﻣﻌﺎﳉﺎت اﻹﺷﺎرة اﻟﺮﻗﻤﻴﺔ ﺑﺎﻟﻔﺎﺻﻠﺔ اﻟﻌﺎﺋﻤﺔ واﻟﻔﺎﺻﻠﺔ اﻟﺜﺎﺑﺘﺔ‬

‫اﻟﺸﻜﻞ‪ 61-1‬ﻳﺴﺘﻌﺮض اﳌﺨﻄﻂ اﻟﺼﻨﺪوﻗﻲ ﻟﻨﻈﺎم ﻣﻌﺎﳉﺔ إﺷﺎرة ﺷﺎﻣﻞ ﻳﺴﺘﺨﺪم ﻣﻌﺎﰿ إﺷﺎرة رﻗﻤﻴﺔ ﰲ ﻣﻌﺎﳉﺔ إﺷﺎرات ﺻﻮﺗﻴﺔ وﻣﺮﺋﻴﺔ‬
‫واﻟﺘﺤﻜﻢ ﺑﻮﺣﺪات ﳏﻴﻄﻴﺔ ﺧﺪﻣﻴﺔ]‪.[118‬‬

‫اﻟﺸﻜﻞ‪ 61-1‬ﻧﻈﺎم ﻣﻌﺎﳉﺔ ﺻﻮت وﺻﻮرة ﺑﺎﺳﺘﺨﺪام ﻣﻌﺎﰿ إﺷﺎرة رﻗﻤﻴﺔ‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪42‬‬
‫‪21‬‬ ‫‪Chapter 1‬‬ ‫اﻟﻔﺼﻞ اﻷول |‬

‫‪ 3-4-15-1‬ﺑﻨﻴﺔ ﻣﻌﺎﳉﺎت اﻹﺷﺎرة اﻟﺮﻗﻤﻴﺔ )‪:(Digital Signal Processors Architecture‬‬

‫ﺗﺘﻜﻮن ﺑﻨﻴﺔ ﻣﻌﺎﳉﺎت اﻹﺷﺎرة اﻟﺮﻗﻤﻴﺔ ﻣﻦ اﻟﻌﻨﺎﺻﺮ اﻟﺘﺎﻟﻴﺔ‪:‬‬

‫‪ -1‬ﻧﻮاة اﳌﻌﺎﰿ )‪ :(DSP Core‬وﻫﻲ ﲢﻮي ﻋﻠﻰ اﻟﻮﺣﺪات اﻟﺘﺎﻟﻴﺔ‪:‬‬

‫‪ -‬ﻧﻮاﻗﻞ اﻟﻌﻨﺎوﻳﻦ )‪.(Address buses‬‬
‫‪ -‬ﻧﻮاﻗﻞ اﻟﺒﻴﺎﻧﺎت )‪.(Data buses‬‬
‫‪ -‬وﺣﺪة اﳊﺴﺎب اﳌﻨﻄﻘﻲ ﻟﻠﺒﻴﺎﻧﺎت ‪.(Data arithmetic logic unit) ALU‬‬
‫‪ -‬وﺣﺪة ﺗﻮﻟﻴﺪ اﻟﻌﻨﺎوﻳﻦ ‪.(Address generation unit) AGU‬‬
‫‪ -‬ﻣﺪﻳﺮ اﻟﱪﻧﺎﻣﺞ )‪.(Program controller‬‬
‫‪ -‬وﺣﺪة اﳌﻌﺎﳉﺔ ﻋﻠﻰ ﻣﺴﺘﻮى اﻟﺒﺖ )‪.(Bit-manipulation unit‬‬
‫‪ -‬وﺣﺪة ﺗﺘﺒﻊ اﻷﺧﻄﺎء اﳌﻌﺰزة )‪.(Enhanced debugging module‬‬

‫‪ -2‬اﶈﻴﻄﻴﺎت اﳌﺘﻮﺿﻌﺔ ﻋﻠﻰ اﻟﺸﺮﳛﺔ )‪:(Peripherals on chip‬‬

‫‪ -‬اﳌﺆﻗﺘﺎت )‪.(Timer‬‬
‫ﻧﻮاﻓﺬ اﻻﺗﺼﺎﻻت )‪DSP-2-DSP, Ethernet, ATM :(communication links‬‬ ‫‪-‬‬

‫‪ -‬اﻟﻨﺎﻓﺬة اﻟﺘﺴﻠﺴﻠﻴﺔ )‪.(serial link‬‬

‫‪ -‬ﺑﻮاﺑﺎت رﺑﻂ ﻃﺮﻓﻴﺎت ﻣﻦ ﻧﻮع ﻣﻀﻴﻒ )‪.(host ports‬‬
‫‪ -‬أﻗﻄﺎب اﻟﺪﺧﻞ واﳋﺮج )‪.(input/output pins‬‬
‫‪ -‬وﺣﺪة ﻣﻼﺋﻤﺔ ﲢﻮﻳﻞ ﻓﻮرﻳﻴﺔ اﻟﺴﺮﻳﻊ )‪.(Adaptation for FFT‬‬
‫‪ -‬وﺣﺪة دﻋﻢ اﻟﺘﻨﻔﻴﺬ اﳌﺘﻮازي ﻟﻠﺘﻌﻠﻴﻤﺎت )‪.(Instructions Parallel move support‬‬
‫‪ -‬وﺣﺪة ﺗﻌﻠﻴﻤﺎت اﻟﻜﻴﺎن اﻟﺼﻠﺐ اﳋﺎﺻﺔ )‪ (special hardware instructions‬ﻣﺜﻞ ‪.FIR‬‬

‫اﻟﺸﻜﻞ‪ 62-1‬ﳐﻄﻂ ﲤﺜﻴﻠﻲ ﻋﺎم ﻟﻌﻨﺎﺻﺮ اﻟﺒﻨﻴﺔ اﻟﺪاﺧﻠﻴﺔ ﳌﻌﺎﳉﺎت اﻟـ‪DSP‬‬

‫‪43‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Embedded Systems‬‬ ‫اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ |‬

‫‪ 4-4-15-1‬ﺗﻌﺰﻳﺰ ﺑﻨﻴﺔ ﻣﻌﺎﳉﺎت اﻹﺷﺎرة اﻟﺮﻗﻤﻴﺔ )‪:(Enhancing DSPs Architecture‬‬

‫إن اﻟﺘﻄﻮر اﳌﺘﺴﺎرع ﰲ ﺗﻜﻨﻮﻟﻮﺟﻴﺎ اﻻﺗﺼﺎﻻت اﻟﺮﻗﻤﻴﺔ ﻫﻮ ﻧﺘﻴﺠﺔ اﳊﺎﺟﺔ إﱃ ﺗﻘﻨﻴﺎت ذات أداء وﺳﺮﻋﺔ أﻛﱪ‪ ،‬واﻟﺬي ﺑﺪورﻩ ﻳﺘﻄﻠﺐ وﺟﻮد‬
‫ﻣﻌﺎﳉﺎت إﺷﺎرة رﻗﻤﻴﺔ ذات أداء أﻋﻠﻰ وﻗﺎدرة ﻋﻠﻰ اﻟﻌﻤﻞ ﺑﺴﺮﻋﺎت ﻛﺒﲑة ﺟﺪاً‪ ،‬ﻣﻦ أﺟﻞ ذﻟﻚ ﰎ ﲢﺴﲔ وﺗﻌﺰﻳﺰ ﺑﻨﻴﺔ ﻣﺘﺤﻜﻤﺎت اﻹﺷﺎرة‬
‫اﻟﺮﻗﻤﻴﺔ ﻋﻠﻰ اﶈﺎور اﻟﺘﺎﻟﻴﺔ‪:‬‬

‫‪ ‬زﻳﺎدة ﻋﺪد اﻟﻌﻤﻠﻴﺎت اﻟﺘﻔﺮﻋﻴﺔ اﳌﺘﺰاﻣﻨﺔ اﻟﱵ ﳝﻜﻦ ﺗﻨﻔﻴﺬﻫﺎ ﰲ ﻛﻞ ﺗﻌﻠﻴﻤﺔ ﺧﻼل ﻛﻞ دورة ﻣﻦ دورات اﻟﱪﻧﺎﻣﺞ وذﻟﻚ ﺑﺈﺿﺎﻓﺔ‬
‫وﺣﺪات ﺗﻨﻔﻴﺬ إﺿﺎﻓﻴﺔ )‪.(e.g. Multipliers‬‬
‫‪ ‬إﺿﺎﻓﺔ وﺣﺪات ﻛﻴﺎن ﺻﻠﺐ ذات وﻇﺎﺋﻒ ﻣﺘﻘﺪﻣﺔ ﰲ اﻟﻨﻮاة‪.‬‬
‫‪ ‬إﺿﺎﻓﺔ وﺣﺪات ﻣﻌﺎﳉﺔ ﻣﺴﺎﻋﺪة )‪.(Co-processors‬‬
‫‪ ‬ﺗﻄﻮﻳﺮ ﻣﻌﺎﳉﺎت إﺷﺎرة رﻗﻤﻴﺔ ﻣﺘﻌﺪدة اﻟﻨﻮى )‪.(Multi-Core DSPs‬‬

‫اﻟﺸﻜﻞ‪ 63-1‬ﻳﺒﲔ اﳌﺨﻄﻂ اﻟﺼﻨﺪوﻗﻲ ﳌﻌﺎﰿ اﻹﺷﺎرة اﻟﺮﻗﻤﻴﺔ ™‪ TMS320C55x‬واﻟﺬي ﳝﻠﻚ ﻣﻌﺎﰿ أﻏﺮاض ﻋﺎﻣﺔ ﻣﺴﺎﻋﺪ ﻣﻦ اﳉﻴﻞ‬
‫‪ ARM926‬واﻟﻌﺪﻳﺪ ﻣﻦ وﺣﺪات ذات وﻇﺎﺋﻒ ﻣﺘﻘﺪﻣﺔ ﻋﻠﻰ ﻧﻔﺲ اﻟﺸﺮﳛﺔ‪.‬‬

‫اﻟﺸﻜﻞ‪ 63-1‬اﳌﺨﻄﻂ اﻟﺼﻨﺪوﻗﻲ ﳌﻌﺎﰿ اﻹﺷﺎرة اﻟﺮﻗﻤﻴﺔ ™‪TMS320C55x‬‬

‫اﻟﺸﻜﻞ‪ 64-1‬ﻳﺒﲔ اﳌﺨﻄﻂ اﻟﺪاﺧﻠﻲ ﳌﻌﺎﰿ اﻹﺷﺎرة اﻟﺮﻗﻤﻴﺔ اﳌﻌﺰز واﳌﺘﻌﺪد اﻟﻨﻮى ™‪ TMS320C6472‬واﻟﺬي ﳝﻠﻚ ‪.6-core DSP‬‬
‫اﻟﺸﻜﻞ‪ 65-1‬ﻳﺒﲔ ﻟﻮﺣﺔ اﻟﺘﻄﻮﻳﺮ ‪ TI-TMS320C6472-EVM‬اﳋﺎﺻﺔ ﺑﺘﻄﻮﻳﺮ ﻣﻌﺎﳉﺎت اﻹﺷﺎرة اﻟﺮﻗﻤﻴﺔ ﻣﺘﻌﺪدة اﻟﻨﻮى‪.‬‬

‫‪ 5-4-15-1‬ﺷﺮاﺋﺢ ﻣﻌﺎﳉﺎت اﻹﺷﺎرة اﻟﺮﻗﻤﻴﺔ اﳌﺘﻮﻓﺮة )‪:(Commercially Available DSP Chips‬‬

‫ﻳﻮﺟﺪ اﻟﻌﺪﻳﺪ ﻣﻦ اﻟﺸﺮﻛﺎت اﻟﱵ ﺗﻘﻮم ﻋﻠﻰ ﺗﺼﻨﻴﻊ ﺷﺮاﺋﺢ ﻣﻌﺎﳉﺎت اﻹﺷﺎرة اﻟﺮﻗﻤﻴﺔ وﲣﺘﻠﻒ ﺷﺮاﺋﺢ ﻫﺬﻩ اﻟﺸﺮﻛﺎت ﻣﻦ ﺣﻴﺚ ﻣﻌﺪل اﻻﻧﺘﺸﺎر‬
‫واﻷداء واﻟﺴﻌﺮ‪ .‬اﳉﺪول‪ 9-1‬ﻳﺴﺘﻌﺮض ﺗﺼﻨﻴﻒ اﻟﺸﺮﻛﺎت اﳌﺼﻨﻌﺔ ﳌﻌﺎﳉﺎت اﻟـ‪ DSP‬ﻣﺮﺗﺒﺔً]‪.[119‬‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪44‬‬
‫‪21‬‬ ‫‪Chapter 1‬‬ ‫اﻟﻔﺼﻞ اﻷول |‬

‫اﻟﺸﻜﻞ‪ 64-1‬ﻣﻌﺎﰿ اﻹﺷﺎرة اﻟﺮﻗﻤﻴﺔ ﻣﺘﻌﺪد اﻟﻨﻮى ™ ‪6-core TMS320C6472‬‬

‫اﻟﺸﻜﻞ‪ 65-1‬ﻟﻮﺣﺔ اﻟﺘﻄﻮﻳﺮ ‪TI-TMS320C6472-EVM‬‬

‫ﻳﺒﲔ اﻟﺸﻜﻞ‪ 66-1‬ﳐﻄﻂ ﻧﺴﺒﺔ اﻧﺘﺸﺎر ﻣﻌﺎﳉﺎت اﻹﺷﺎرة اﻟﺮﻗﻤﻴﺔ ﻟﻠﺸﺮﻛﺎت اﳌﺼﻨﻌﺔ اﻷواﺋﻞ]‪ .[120‬اﻟﺸﻜﻞ‪ 67-1‬ﻳﺒﲔ ﳐﻄﻂ ﻧﺴﺒﺔ اﻟﺘﻄﺒﻴﻘﺎت‬
‫اﻟﱵ ﺗﺴﺘﺨﺪم ﻣﻌﺎﳉﺎت اﻹﺷﺎرة اﻟﺮﻗﻤﻴﺔ]‪.[121‬‬

‫‪Website‬‬ ‫‪Company‬‬ ‫‪Rank‬‬

‫‪www.ti.com‬‬ ‫‪Texas Instruments‬‬ ‫‪1‬‬

‫‪www.freescale.com‬‬ ‫‪Freescale Semiconductor‬‬ ‫‪2‬‬
‫‪www.analog.com‬‬ ‫‪Analog Devices‬‬ ‫‪3‬‬
‫‪www.nxp.com‬‬ ‫‪Philips Semiconductors‬‬ ‫‪4‬‬
‫‪www.lsi.com‬‬ ‫‪Agere Systems‬‬ ‫‪5‬‬

‫‪www.toshiba.com‬‬ ‫‪Toshiba‬‬ ‫‪6‬‬

‫‪www.dspg.com‬‬ ‫‪DSP Group‬‬ ‫‪7‬‬

‫‪www.necel.com‬‬ ‫‪NEC Electronics‬‬ ‫‪8‬‬

‫اﳉﺪول‪ 9-1‬ﺗﺼﻨﻴﻒ اﻟﺸﺮﻛﺎت اﳌﺼﻨﻌﺔ ﳌﻌﺎﳉﺎت اﻹﺷﺎرة اﻟﺮﻗﻤﻴﺔ ﻋﺎﳌﻴﺎً‬

‫‪45‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Embedded Systems‬‬ ‫اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ |‬

‫‪7.28%‬‬ ‫‪9%‬‬ ‫‪Texas Instruments‬‬

‫‪Freescale‬‬
‫‪7.47%‬‬
‫‪Analog Devices‬‬
‫‪8%‬‬ ‫‪54%‬‬ ‫‪Philips‬‬

‫‪Agere‬‬
‫‪14%‬‬
‫‪Others‬‬

‫اﻟﺸﻜﻞ‪ 66-1‬ﻧﺴﺐ اﻧﺘﺸﺎر ﻣﻌﺎﳉﺎت اﻹﺷﺎرة اﻟﺮﻗﻤﻴﺔ‬

‫‪0.40%‬‬ ‫‪4.40% 4.00%‬‬

‫‪5.30%‬‬
‫‪4.00%‬‬
‫‪Consumer Electronics‬‬
‫‪Auto‬‬
‫‪Computer‬‬
‫‪Industrial‬‬
‫‪81.90%‬‬ ‫‪Communications‬‬
‫‪Gov/Mil‬‬

‫اﻟﺸﻜﻞ‪ 67-1‬ﻧﺴﺐ اﻟﺘﻄﺒﻴﻘﺎت اﻟﱵ ﺗﺴﺘﺨﺪم ﻣﻌﺎﳉﺎت اﻹﺷﺎرة اﻟﺮﻗﻤﻴﺔ‬

‫‪ 6-4-15-1‬اﻟﺼﻔﺎت اﳋﺎﺻﺔ ﻟﺘﻄﺒﻴﻘﺎت ﻣﻌﺎﳉﺔ اﻹﺷﺎرة اﻟﺮﻗﻤﻴﺔ )‪:(DSP Applications Special Features‬‬

‫ﺗﺘﺴﻢ ﺗﻄﺒﻴﻘﺎت ﻣﻌﺎﳉﺔ اﻹﺷﺎرة اﻟﺮﻗﻤﻴﺔ ﺑﺼﻔﺎت ﳑﻴﺰة ﺧﺎﺻﺔ وﻫﻲ أن ﻋﺪداً ﻛﺒﲑاً ﻣﻦ اﻟﻌﻴﻨﺎت ﻳﺘﻢ إدﺧﺎﳍﺎ إﱃ اﻟﻨﻈﺎم وﻣﻌﺎﳉﺘﻬﺎ ﰒ إﺧﺮاﺟﻬﺎ‬
‫ﺑﺸﻜﻞ دوري‪ .‬إن ﻫﺬﻩ اﻟﻌﻤﻠﻴﺎت ﻳﺘﻢ ﺗﻄﺒﻴﻘﻬﺎ ﺑﺸﻜﻞ ﻣﺘﻜﺮر ﻋﻠﻰ ﳎﻤﻮﻋﺔ ﳐﺘﻠﻔﺔ ﻣﻦ اﻟﻌﻴﻨﺎت ﻋﻠﻰ ﺷﻜﻞ ﻣﺼﻔﻮﻓﺎت ﺷﻌﺎﻋﻴﺔ ﻛﻤﺎ ﻳﺘﻢ‬
‫ﺗﻨﻔﻴﺬﻫﺎ ﰲ اﻟﺰﻣﻦ اﳊﻘﻴﻘﻲ‪ ،‬ﻓﻴﻤﺎ ﻳﻠﻲ ﻣﺜﺎل ﻋﻦ ﻣﺮﺷﺢ رﻗﻤﻲ‪.‬‬

‫‪ 1-6-4-15-1‬اﻟﱰﺷﻴﺢ اﻟﺮﻗﻤﻲ )‪:(Digital Filtering‬‬

‫ﻣﻦ أﻛﺜﺮ اﳌﺮﺷﺤﺎت اﻟﺮﻗﻤﻴﺔ ﰲ اﻟﺰﻣﻦ اﳊﻘﻴﻘﻲ ﺷﻴﻮﻋﺎً واﺳﺘﺨﺪاﻣﺎً ﻫﻲ‪:‬‬

‫‪Finite Impulse Filter :FIR -‬‬

‫‪Infinite Impulse Filter :IIR -‬‬

‫ﻓﻌﻠﻰ ﺳﺒﻴﻞ اﳌﺜﺎل ﻓﺈن ﻣﻌﺎدﻟﺔ اﳌﺮﺷﺢ ‪ FIR‬اﻷﺳﺎﺳﻴﺔ ﺗﻌﻄﻰ ﺑﺎﻟﻌﻼﻗﺔ‪:‬‬

‫= ]‪y[ n‬‬ ‫] ‪∑ h[k ].x[n − k‬‬

‫ﺣﻴﺚ أن‪ h[k] :‬ﻫﻲ ﻣﺼﻔﻮﻓﺔ ﺛﻮاﺑﺖ‪ .‬ﳝﻜﻦ ﲤﺜﻴﻞ ﻫﺬﻩ اﳌﻌﺎدﻟﺔ ﰲ ﻟﻐﺔ ‪ C‬ﺑﺎﻟﺸﻜﻞ اﻟﺘﺎﱄ‪:‬‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪46‬‬
‫‪21‬‬ ‫‪Chapter 1‬‬ ‫اﻟﻔﺼﻞ اﻷول |‬

‫;‪y[n]=0‬‬
‫)‪For (n=0; n<N; n++‬‬
‫)‪{For (k = 0; k<N; k++‬‬
‫;]‪y[n] = y[n] + h[k] * x[n-k‬‬
‫}‪Next k‬‬
‫‪Next n‬‬
‫ﺑﺎﻟﻨﻈﺮ إﱃ اﻟﺘﻌﻠﻴﻤﺎت ﻓﺈن اﻟﻌﻤﻠﻴﺎت ﻫﻲ اﻟﻀﺮب )‪ (Multiply‬واﳉﻤﻊ )‪ (Accumulate‬ﺿﻤﻦ ﺣﻠﻘﺎت ﺗﻜﺮارﻳﺔ‪.‬‬

‫ﻟﻨﺪرس ﺣﺎﻟﺔ ﺗﻄﺒﻴﻖ اﳌﺮﺷﺢ ﻋﻠﻰ ﻣﺼﻔﻮﻓﺘﲔ ﺗﺘﻜﻮن ﻛﻞ واﺣﺪة ﻣﻨﻬﻤﺎ ﻣﻦ ﺛﻼث أﻋﺪاد‪ ،‬اﻟﺸﻜﻞ‪.68-1‬‬

‫اﻟﺸﻜﻞ‪ 68-1‬ﳐﻄﻂ ﺳﲑ اﻟﻌﻤﻠﻴﺎت ﻋﻠﻰ ﻣﺼﻔﻮﻓﺘﲔ‬

‫دراﺳﺔ اﳊﺎﻟﺔ اﻷوﱃ‪ :‬ﻋﻤﻠﻴﺎت اﻟﻀﺮب واﳉﻤﻊ ﺑﺎﺳﺘﺨﺪام ﻣﻌﺎﰿ أﻏﺮاض ﻋﺎﻣﺔ )‪:(MAC using GPP‬‬
‫اﳉﺪول‪ 10-1‬ﳛﻮي ﻋﻠﻰ ﺑﺮﻧﺎﻣﺞ ﰎ ﻛﺘﺎﺑﺘﻪ ﺑﻠﻐﺔ اﻟـ‪ Assembly‬وﻫﻮ ﻳﻘﻮم ﻋﻠﻰ ﺣﺴﺎب ﻣﺼﻔﻮﻓﺎت ﺑﺎﺳﺘﺨﺪام ﻣﻌﺎﰿ أﻏﺮاض ﻋﺎﻣﺔ‪ .‬إن ﻋﺪد‬
‫اﻟﺘﻌﻠﻴﻤﺎت ﻫﻮ ‪ 12‬ﺗﻌﻠﻴﻤﺔ‪ ،‬وإذا أﺧﺬﻧﺎ ﺑﻌﲔ اﻻﻋﺘﺒﺎر اﻟﻌﻤﻠﻴﺎت اﻟﺘﻜﺮارﻳﺔ‪ ،‬ﻓﺈن ﺧﻮارزﻣﻴﺔ اﻟﺘﻨﻔﻴﺬ ﺳﻮف ﺗﺴﺘﻐﺮق زﻣﻨﺎً ﻛﺒﲑاً‪ ،‬وﺳﻴﻔﻘﺪ اﻟﻨﻈﺎم‬
‫إﻣﻜﺎﻧﻴﺔ اﻟﺘﻨﻔﻴﺬ ﰲ اﻟﺰﻣﻦ اﳊﻘﻴﻘﻲ‪.‬‬

‫‪Clr‬‬ ‫‪A‬‬ ‫‪;Clear Accumulator A‬‬

‫‪Clr‬‬ ‫‪B‬‬ ‫‪;Clear Accumulator B‬‬
‫‪Loop‬‬ ‫‪Mov‬‬ ‫‪*R0, Y0‬‬ ‫‪;Move data from memory location 1 to register Y0‬‬
‫‪Mov‬‬ ‫‪*R1,X0‬‬ ‫‪;Move data from memory location 2 to register X0‬‬
‫‪Mpy‬‬ ‫‪X0,Y0,A‬‬ ‫‪;X0*Y0 ->A‬‬
‫‪Add‬‬ ‫‪A,B‬‬ ‫‪;A + B -> B‬‬
‫‪Inc‬‬ ‫‪R0‬‬ ‫‪;R0 + 1 -> R0‬‬
‫‪Inc‬‬ ‫‪R1‬‬ ‫‪;R1 + 1 -> R1‬‬
‫‪Dec‬‬ ‫‪N‬‬ ‫)‪;Dec N (initially equals to 3‬‬
‫‪Tst‬‬ ‫‪N‬‬ ‫‪;Test for the value‬‬
‫‪Jnz‬‬ ‫‪Loop‬‬ ‫‪;Different than zero loop again‬‬
‫‪Mov‬‬ ‫‪B,*R2‬‬ ‫‪;Move result to memory‬‬

‫اﳉﺪول‪ 10-1‬ﺑﺮﻧﺎﻣﺞ ﺣﺴﺎب ﻣﺼﻔﻮﻓﺎت ﺗﻜﺮارﻳﺔ ﺑﺎﺳﺘﺨﺪام ﻣﻌﺎﰿ أﻏﺮاض ﻋﺎﻣﺔ‬

‫إن اﻟﻌﻘﺒﺎت اﻟﱵ ﺗﺘﻤﺜﻞ ﰲ ﺣﻞ ﻣﺜﻞ ﻫﺬﻩ اﳌﻌﺎدﻻت ﺑﺎﻟﻨﺴﺒﺔ ﳌﻌﺎﳉﺎت اﻷﻏﺮاض اﻟﻌﺎﻣﺔ ﻫﻲ أن اﳌﻌﺎﰿ ﺳﻴﺤﺘﺎج إﱃ ﻋﺪد ﺗﻌﻠﻴﻤﺎت أﻛﺜﺮ‬
‫)ﻣﻬﺎم أﻛﺜﺮ( وﺑﺎﻟﺘﺎﱄ زﻣﻦ ﺗﻨﻔﻴﺬ أﻛﱪ‪ ،‬ﻛﺬﻟﻚ ﻣﺴﺄﻟﺔ وﳏﺪودﻳﺔ ﰲ اﺳﺘﺨﺪام اﻟﻨﺎﻗﻞ اﻟﺪاﺧﻠﻲ ﻟﻠﻤﻌﺎﰿ ﻧﻈﺮاً ﻷن ذاﻛﺮة اﻟﺘﻌﻠﻴﻤﺎت واﻟﺒﻴﺎﻧﺎت‬

‫‪47‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Embedded Systems‬‬ ‫اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ |‬

‫ﻣﺸﱰﻛﺔ‪ .‬اﻟﺸﻜﻞ‪ 69-1‬ﻳﺒﲔ ﻣﺴﺎر اﻟﺒﻴﺎﻧﺎت ﰲ ﻫﺬﻩ اﳊﺎﻟﺔ ﺣﻴﺚ ﻳﺘﻢ اﺳﺘﺨﺪام ﻧﻔﺲ اﻟﺬاﻛﺮة ﻟﻠﱪﻧﺎﻣﺞ واﻟﺒﻴﺎﻧﺎت‪ ،‬وﺗﺘﻢ اﻟﻌﻤﻠﻴﺎت ﻋﻠﻰ‬
‫ﻣﺴﺘﻮى اﳌﺴﺠﻼت‪.‬‬

‫اﻟﺸﻜﻞ‪ 69-1‬ﻣﺴﺎر اﻟﺒﻴﺎﻧﺎت ﰲ ﻣﻌﺎﰿ أﻏﺮاض ﻋﺎﻣﺔ‬

‫دراﺳﺔ اﳊﺎﻟﺔ اﻟﺜﺎﻧﻴﺔ‪ :‬ﻋﻤﻠﻴﺎت اﻟﻀﺮب اﳉﻤﻊ ﺑﺎﺳﺘﺨﺪام ﻣﻌﺎﰿ إﺷﺎرة رﻗﻤﻴﺔ )‪:(MAC using DSP‬‬
‫اﳉﺪول‪ 11-1‬ﳛﻮي ﻋﻠﻰ ﺑﺮﻧﺎﻣﺞ ﰎ ﻛﺘﺎﺑﺘﻪ ﺑﻠﻐﺔ اﻟـ‪ Assembly‬وﻫﻮ ﻳﻘﻮم ﻋﻠﻰ ﺣﺴﺎب اﳌﺼﻔﻮﻓﺎت ﺑﻠﻐﺔ اﻟﺘﺠﻤﻴﻊ ﺑﺎﺳﺘﺨﺪام ﻣﻌﺎﰿ إﺷﺎرة‬
‫رﻗﻤﻴﺔ‪ .‬إن ﻋﺪد اﻟﺘﻌﻠﻴﻤﺎت اﻟﻼزم ﻫﻮ أرﺑﻊ ﺗﻌﻠﻴﻤﺎت ﻓﻘﻂ‪ ،‬وإذا أﺧﺬﻧﺎ ﺑﻌﲔ اﻻﻋﺘﺒﺎر أن اﳌﻌﺎﰿ ﳝﻠﻚ ﺧﺎﺻﻴﺔ اﻟﺘﻨﻔﻴﺬ اﻟﺘﻔﺮﻋﻲ اﳌﺘﺰاﻣﻦ‬
‫)‪ (Pipeline‬ﺑﺄرﺑﻊ أﻗﻨﻴﺔ‪ ،‬ﻓﺈن ﻣﻌﺎﳉﺔ ﻛﻞ ﻋﻴﻨﺔ ﺳﻮف ﺗﺴﺘﻐﺮق دورة واﺣﺪة ﻓﻘﻂ!‬

‫‪Clr‬‬ ‫‪A‬‬ ‫‪;Clear Accumulator A‬‬

‫‪Rep‬‬ ‫‪N‬‬ ‫‪;Rep N times the next instruction‬‬

‫‪;Fetch the two memory locations pointed by R0 and‬‬

‫‪MAC‬‬ ‫‪*(R0)+, *(R1)+, A‬‬ ‫‪R1, multiply them together and add the result to A,‬‬
‫‪the final result is stored back in A‬‬

‫‪Mov‬‬ ‫‪A, *R2‬‬ ‫‪;Move result to memory‬‬

‫اﳉﺪول‪ 11-1‬ﺑﺮﻧﺎﻣﺞ ﺣﺴﺎب اﳌﺼﻔﻮﻓﺎت ﺑﺎﺳﺘﺨﺪام ﻣﻌﺎﰿ إﺷﺎرة رﻗﻤﻴﺔ‬

‫ﻧﻈﺮاً ﻟﻜﻮن ﻣﻌﺎﳉﺎت اﻹﺷﺎرة اﻟﺮﻗﻤﻴﺔ ﲤﻠﻚ ﺑﻨﻴﺔ ﺧﺎﺻﺔ ﻟﻠﺘﻄﺒﻴﻘﺎت اﻟﱵ ﲢﺘﺎج إﱃ ﻣﻌﺎﳉﺔ إﺷﺎرة‪ ،‬ﻓﺈن اﻟﻌﻘﺒﺎت اﻟﱵ ﻇﻬﺮت ﰲ ﻣﻌﺎﳉﺎت‬
‫اﻷﻏﺮاض اﻟﻌﺎﻣﺔ ﻏﲑ ﻣﻮﺟﻮدة ﰲ ﻣﻌﺎﳉﺎت اﻹﺷﺎرة‪ ،‬ﺣﻴﺚ ﲤﻠﻚ ﻫﺬﻩ اﳌﻌﺎﳉﺎت ﺗﻌﻠﻴﻤﺎت ﺧﺎﺻﺔ ﻣﺜﻞ ‪ MAC‬اﻟﱵ ﺗﻨﻔﺬ ﰲ دورة واﺣﺪة ﻣﻦ‬
‫دورات ﻋﻤﻞ اﳌﻌﺎﰿ‪ ،‬ﻛﻤﺎ أن ﻫﺬﻩ اﳌﻌﺎﳉﺎت ﲤﻠﻚ ذاﻛﺮة ﺧﺎﺻﺔ ﻟﻠﱪﻧﺎﻣﺞ وذاﻛﺮة أﺧﺮى ﻟﻠﻤﻌﻄﻴﺎت‪ ،‬وﻛﻞ واﺣﺪة ﻣﻨﻬﻤﺎ ﳍﺎ ﻧﺎﻗﻞ ﻣﺴﺘﻘﻞ‪.‬‬
‫اﻟﺸﻜﻞ‪ 70-1‬ﻳﺒﲔ ﻣﺴﺎر اﻟﺒﻴﺎﻧﺎت ﰲ ﻫﺬﻩ اﳊﺎﻟﺔ‪.‬‬

‫اﻟﺸﻜﻞ ‪ 70-1‬ﻣﺴﺎر اﻟﺒﻴﺎﻧﺎت ﰲ ﻣﻌﺎﰿ اﻹﺷﺎرة اﻟﺮﻗﻤﻴﺔ‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪48‬‬
‫‪21‬‬ ‫‪Chapter 1‬‬ ‫اﻟﻔﺼﻞ اﻷول |‬

‫‪ 7-4-15-1‬دراﺳﺔ ﺑﺪاﺋﻞ ﳌﻌﺎﳉﺎت اﻹﺷﺎرة اﻟﺮﻗﻤﻴﺔ )‪:(Considering DSP Alternatives‬‬

‫ﳑﺎ ﻻ ﺷﻚ ﻓﻴﻪ أن ﻣﻌﺎﳉﺎت اﻹﺷﺎرة اﻟﺮﻗﻤﻴﺔ ﻛﺎن ﳍﺎ اﻟﺪور اﻟﺒﺎرز ﰲ ﺗﻄﺒﻴﻘﺎت ﺗﻜﻨﻮﻟﻮﺟﻴﺎ اﻻﺗﺼﺎﻻت اﻟﺮﻗﻤﻴﺔ ﰲ ﺟﻴﻠﻴﻬﺎ اﻷول واﻟﺜﺎﱐ‪.‬‬
‫ﺑﺎﻷﻣﺲ ﻇﻬﺮ ﺟﻴﻞ ﺟﺪﻳﺪ – وﻫﻮ اﳉﻴﻞ اﻟﺜﺎﻟﺚ ‪ – 3G‬ذو ﺳﻌﺔ ﻧﻘﻞ ﻋﺎﻟﻴﺔ ﺟﺪاً‪ ،‬واﻟﺬي ﻳﺘﻄﻠﺐ أداءً ﻋﺎﻟﻴﺎً وﻋﺮض ﺣﺰﻣﺔ ﺗﻨﺎﻗﻞ أﻛﱪ ﺑﻜﺜﲑ‪.‬‬
‫أﻳﻀﺎً ﻳﺘﻢ ﺗﻄﻮﻳﺮ اﳉﻴﻞ اﻟﺮاﺑﻊ ﺑﺴﺮﻋﺎت ﻧﻘﻞ ﺗﺘﺠﺎوز ﻣﺌﺎت اﳉﻴﻐﺎ ﻫﺮﺗﺰ‪ .‬ﻣﺜﻞ ﻫﺬﻩ اﻟﺘﻄﺒﻴﻘﺎت ﻻ ﳝﻜﻦ ﳌﻌﺎﳉﺎت اﻹﺷﺎرة اﻟﺮﻗﻤﻴﺔ اﻟﺘﻌﺎﻣﻞ ﻣﻌﻬﺎ‬
‫ﻣﻬﻤﺎ ﺑﻠﻐﺖ ﺳﻌﺔ اﳌﻌﺎﳉﺔ ﳍﺎ‪ .‬إذاً‪ ،‬ﻓﻤﺎ ﻫﻲ اﻟﺒﺪاﺋﻞ اﳌﺘﻮﻓﺮة؟‬

‫اﻟﺸﻜﻞ‪ 71-1‬ﻳﺒﲔ ﻣﻨﺤﲎ ﻣﻘﺎرﻧﺔ اﻷداء واﻟﺴﺮﻋﺔ ﻷﺟﻴﺎل اﻻﺗﺼﺎﻻت اﻟﻼﺳﻠﻜﻴﺔ‪ .‬اﻟﺸﻜﻞ‪ 72-1‬ﻳﺒﲔ ﻣﻨﺤﲎ اﻷداء وﻣﺴﺘﻮى ﺗﻌﻘﻴﺪ اﻟﻨﻈﺎم‬
‫ﻷﺟﻴﺎل اﻻﺗﺼﺎﻻت اﻟﻼﺳﻠﻜﻴﺔ‪ ،‬ﺣﻴﺚ ﻧﻼﺣﻆ أن اﻷداء اﳌﻄﻠﻮب ﻟﻸﺟﻴﺎل اﳌﺘﻘﺪﻣﺔ ﻣﻦ ﺗﻘﻨﻴﺎت اﻻﺗﺼﺎﻻت ﻳﺘﻄﻠﺐ أداءً ﻳﻘﻊ ﺧﺎرج ﺣﺪود‬
‫أداء ﻣﻌﺎﳉﺎت اﻹﺷﺎرة اﻟﺮﻗﻤﻴﺔ‪.‬‬

‫اﻟﺸﻜﻞ‪ 71-1‬ﻣﻨﺤﲎ ﻣﻘﺎرﻧﺔ اﻷداء واﻟﺴﺮﻋﺔ ﻷﺟﻴﺎل اﻻﺗﺼﺎﻻت اﻟﻼﺳﻠﻜﻴﺔ‬

‫اﻟﺸﻜﻞ‪ 72-1‬ﻣﻨﺤﲎ اﻷداء وﻣﺴﺘﻮى ﺗﻌﻘﻴﺪ اﻟﻨﻈﺎم ﻷﺟﻴﺎل اﻻﺗﺼﺎﻻت اﻟﻼﺳﻠﻜﻴﺔ‬

‫‪ 1-7-4-15-1‬ﻣﻌﺎﳉﺎت اﻹﺷﺎرة اﻟﺮﻗﻤﻴﺔ ﻣﺘﻌﺪدة اﻟﻨﻮى ﲟﻌﺎﳉﺎت ﻣﺆازرة ) ‪:(DSP with GPP Multi-core‬‬
‫ﺗﻌﺘﱪ ﻫﺬﻩ اﳌﻌﺎﳉﺎت اﳉﻴﻞ اﳉﺪﻳﺪ ﻣﻦ ﻣﻌﺎﳉﺎت اﻹﺷﺎرة اﻟﺮﻗﻤﻴﺔ اﳌﺨﺼﺼﺔ ﻟﻠﺘﻄﺒﻴﻘﺎت ﻋﺎﻟﻴﺔ اﻟﺴﺮﻋﺔ واﻷداء‪ ،‬إﻻ أن اﻟﺴﻤﺎت اﳌﻤﻴﺰة‬
‫ﳌﻌﺎﳉﺎت اﻹﺷﺎرة ﻣﻦ اﳔﻔﺎض اﻟﺘﻜﻠﻔﺔ واﺳﺘﻬﻼك ﻃﺎﻗﺔ ﳏﺪود ﺑﺎت ﺑﻌﻴﺪاً ﺑﻌﺾ اﻟﺸﻲء ﰲ ﻫﺬا اﳉﻴﻞ‪ ،‬ﻛﻤﺎ أن ﺑﺮﳎﺔ ﻫﺬا اﻟﻨﻮع ﻣﻦ اﳌﻌﺎﳉﺎت‬
‫ﻳﻌﺘﱪ ﻣﻦ اﻟﺘﻌﻘﻴﺪات اﻟﱪﳎﻴﺔ اﻟﻜﺒﲑة؛ إذ ﻳﻨﺒﻐﻲ ﺗﻮزﻳﻊ اﳌﻬﺎم ﻋﻠﻰ اﳌﻌﺎﳉﺎت ﺑﺮﳎﻴﺎً‪.‬‬

‫‪ 2-7-4-15-1‬اﻟﺪارات اﳌﺘﻜﺎﻣﻠﺔ ذات اﻟﺘﻄﺒﻴﻘﺎت اﳋﺎﺻﺔ )‪:(ASIC‬‬

‫ﲤﺘﺎز ﺗﻘﻨﻴﺔ اﻟـ‪ ASIC‬ﺑﺎﻟﻌﺪﻳﺪ ﻣﻦ اﳌﻴﺰات واﻟﱵ ﻣﻨﻬﺎ‪ :‬اﻟﺴﺮﻋﺔ‪ ،‬اﺳﺘﻬﻼك ﻣﻨﺨﻔﺾ ﻟﻠﻄﺎﻗﺔ‪ ،‬ﻛﻠﻔﺔ ﻣﻨﺨﻔﻀﺔ‪ ،‬أداء ٍ‬
‫ﻋﺎل‪ ،‬ﻣﺮوﻧﺔ ﻋﺎﻟﻴﺔ‪ ،‬إﻻ أ�ﺎ‬
‫ﺑﻨﻔﺲ اﻟﻮﻗﺖ ﲢﺘﺎج إﱃ ﺗﻜﻠﻔﺔ ﺗﻄﻮﻳﺮ ﻛﺒﲑة ﺟﺪاً‪ ،‬وزﻣﻦ ﺗﻄﻮﻳﺮ ﻃﻮﻳﻞ‪ ،‬وﻻ ﳝﻜﻦ إﻋﺎدة ﺑﺮﳎﺘﻬﺎ‪.‬‬

‫‪49‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Embedded Systems‬‬ ‫اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ |‬

‫‪ 3-7-4-15-1‬ﻣﺼﻔﻮﻓﺎت اﻟﺒﻮاﺑﺎت اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً )‪:(FPGA‬‬

‫ﺗﻌﺘﱪ ﻣﺼﻔﻮﻓﺎت اﻟﺒﻮاﺑﺎت اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً اﳊﻞ اﻷﻣﺜﻞ ﻟﺘﻄﺒﻴﻘﺎت ﻣﻌﺎﳉﺔ اﻹﺷﺎرة اﻟﺮﻗﻤﻴﺔ اﻟﻌﺎﻟﻴﺔ اﻷداء؛ إذ أن ﻗﺎﺑﻠﻴﺔ ﺗﻨﻔﻴﺬ ﻋﺪة ﻋﻤﻠﻴﺎت‬
‫ﻰ اﻟﺘﻔﺮع ﻏﲑ ﳏﺪودة‪ ،‬ﻛﻤﺎ أن ﺑﻌﺾ اﻟﺸﺮﻛﺎت اﳌﺘﺨﺼﺼﺔ ﰲ ﻫﺬا اﺠﻤﻟﺎل ﻣﺜﻞ ﺷﺮﻛﺔ ‪ Xilinx‬اﻟﺮاﺋﺪة ﻗﺎﻣﺖ ﺑﺈﺿﺎﻓﺔ وﺣﺪات ﻛﻴﺎن ﺻﻠﺐ‬
‫ﺧﺎﺻﺔ ﻟﻌﻤﻠﻴﺎت ﻣﻌﺎﳉﺔ اﻹﺷﺎرة اﻟﺮﻗﻤﻴﺔ )‪. [122](DSP48E/DSP48E1‬‬

‫ﺗﺘﻜﻮن ﻫﺬﻩ اﻟﻮﺣﺪات ﻣﻦ دارة ﺿﺎرب ‪ 18x25bit‬ودارة ﺟﺎﻣﻊ|ﻃﺎرح ‪ 48bits‬ﺑﺎﻹﺿﺎﻓﺔ إﱃ ﻣﺴﺠﻼت ﻟﺪﻋﻢ ﻋﻤﻠﻴﺎت اﻟﺘﻨﻔﻴﺬ اﻟﺘﻔﺮﻋﻲ‬
‫اﳌﺘﺰاﻣﻦ )‪ .(pipelining‬اﻟﺸﻜﻞ‪ 73-1‬ﻳﺒﲔ اﳌﺨﻄﻂ اﻟﺪاﺧﻠﻲ ﻟﻮﺣﺪة ‪ DSP48E‬ﰲ ﻣﺼﻔﻮﻓﺎت اﻟﺒﻮاﺑﺎت اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﻣﻦ اﻟﻌﺎﺋﻠﺔ‬
‫‪ .Spartan-3A DSP‬اﻟﺸﻜﻞ‪ 74-1‬ﻳﺒﲔ اﳌﺨﻄﻂ اﻟﺼﻨﺪوﻗﻲ ﻟﻨﻈﺎم اﺗﺼﺎﻻت ‪ WiMAX‬ﻣﻦ اﳉﻴﻞ اﻟﺮاﺑﻊ ﻳﻌﺘﻤﺪ ﻋﻠﻰ ‪Spartan-3A‬‬
‫‪.DSP FPGA‬‬

‫اﻟﺸﻜﻞ ‪ 73-1‬اﳌﺨﻄﻂ اﻟﺪاﺧﻠﻲ ﻟﻠﻮﺣﺪة ‪DSP48E‬‬

‫اﻟﺸﻜﻞ ‪ 74-1‬ﻟﻨﻈﺎم اﺗﺼﺎﻻت ‪ WiMAX‬ﻣﻦ اﳉﻴﻞ اﻟﺮاﺑﻊ ﻳﻌﺘﻤﺪ ﻋﻠﻰ ‪Spartan-3A DSP FPGA‬‬

‫اﳉﺪول‪ 12-1‬ﻳﺒﲔ ﻣﻘﺎرﻧﺔ اﳌﻴﺰات اﻷﺳﺎﺳﻴﺔ ﻟﻠﺘﻘﻨﻴﺎت اﳌﺴﺘﺨﺪﻣﺔ ﰲ ﺗﻄﺒﻴﻘﺎت ﻣﻌﺎﳉﺔ اﻹﺷﺎرة اﻟﺮﻗﻤﻴﺔ]‪.[123‬‬

‫‪Performance‬‬ ‫‪Cost‬‬ ‫‪Power‬‬ ‫‪Flexibility‬‬ ‫‪Design effort‬‬

‫‪ASIC‬‬ ‫‪High‬‬ ‫‪High‬‬ ‫‪Low‬‬ ‫‪Low‬‬ ‫‪High‬‬

‫‪DSP‬‬ ‫‪Medium‬‬ ‫‪Medium‬‬ ‫‪Medium‬‬ ‫‪Medium‬‬ ‫‪Medium‬‬

‫‪GPP‬‬ ‫‪Low‬‬ ‫‪Low‬‬ ‫‪Medium‬‬ ‫‪High‬‬ ‫‪Low‬‬

‫‪FPGA‬‬ ‫‪Medium‬‬ ‫‪Low‬‬ ‫‪Med-High‬‬ ‫‪High‬‬ ‫‪Medium‬‬

‫اﳉﺪول‪ 12-1‬ﻣﻘﺎرﻧﺔ ﺑﲔ اﳊﻠﻮل اﳌﺴﺘﺨﺪﻣﺔ ﰲ ﺗﻄﺒﻴﻘﺎت ﻣﻌﺎﳉﺔ اﻹﺷﺎرة اﻟﺮﻗﻤﻴﺔ‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪50‬‬
‫‪21‬‬ ‫‪Chapter 1‬‬ ‫اﻟﻔﺼﻞ اﻷول |‬

‫‪ 5-15-1‬اﻟﺪارات اﳌﺘﻜﺎﻣﻠﺔ ذات اﻟﺘﻄﺒﻴﻘﺎت اﳋﺎﺻﺔ )‪:(ASIC‬‬

‫وﻫﻲ ﻋﺒﺎرة ﻋﻦ دارات ﻣﺘﻜﺎﻣﻠﺔ ﰎ ﺗﺼﻤﻴﻤﻬﺎ وﺗﺼﻨﻴﻌﻬﺎ ﻻﺳﺘﺨﺪام ﳏﺪد ﻣﺜﻞ اﻟﺸﺮاﺋﺢ اﳌﺴﺘﺨﺪﻣﺔ ﰲ اﻷﺟﻬﺰة اﳋﻠﻮﻳﺔ‪ .‬ﺗﻄﻮرت ﺗﻘﻨﻴﺎت ﻫﺬﻩ‬
‫اﻟﺪارات – ‪ – ASIC‬ﻣﻊ ﻣﺮور اﻟﻮﻗﺖ ﺣﻴﺚ ﰎ ﺗﻘﻠﻴﺺ ﺣﺠﻤﻬﺎ ﺑﻨﻔﺲ اﻟﻮﻗﺖ اﻟﺬي ﰎ ﻓﻴﻪ زﻳﺎدة ﺗﻌﻘﻴﺪﻫﺎ ﻣﻦ ‪ 5000‬ﺑﻮاﺑﺔ إﱃ أﻛﺜﺮ ﻣﻦ‬
‫‪ 100‬ﻣﻠﻴﻮن ﺑﻮاﺑﺔ‪ ،‬ﻛﻤﺎ أن اﻟﻨﻤﺎذج اﳌﺘﻄﻮرة ﻣﻨﻬﺎ ﲢﻮي ﻋﻠﻰ ﻣﻌﺎﰿ ‪ 32-bit‬وأﻧﻮاع ﳐﺘﻠﻔﺔ ﻣﻦ اﻟﺬواﻛﺮ ) ‪ROM, RAM,‬‬

‫‪ (EEPROM, Flash‬ﺑﺎﻹﺿﺎﻓﺔ إﱃ وﺣﺪات ﺧﺎﺻﺔ ﻟﺘﻨﻔﻴﺬ وﻇﺎﺋﻒ ﻛﺎﻻﺗﺼﺎل واﻟﺘﺸﻔﲑ واﻟﺘﺤﻜﻢ وﻏﲑﻫﺎ‪ ،‬وﲤﺘﺎز ﺑﺄ�ﺎ ﳝﻜﻦ أن ﺗﻌﻤﻞ‬
‫ﻋﻨﺪ ﺳﺮﻋﺎت ﻋﺎﻟﻴﺔ ﺟﺪاً واﺳﺘﻬﻼك ﻃﺎﻗﺔ أﺻﻐﺮي وﺗﺼﻞ ﺗﻜﺎﻟﻴﻒ ﺗﻄﻮﻳﺮ ﳕﺎذﺟﻬﺎ إﱃ ﻣﻼﻳﲔ اﻟﺪوﻻرات‪ ،‬ﻟﺬا ﻓﺈ�ﺎ اﳊﻞ اﻷﻣﺜﻠﻲ ﻟﻺﻧﺘﺎج ﻋﻠﻰ‬
‫ﻧﻄﺎق واﺳﻊ ﺟﺪاً ﻓﻘﻂ!‬

‫‪ 1-5-15-1‬اﻟﺒﻨﻴﺔ اﻟﻔﻴﺰﻳﺎﺋﻴﺔ ﻟﻠﺪارات اﳌﺘﻜﺎﻣﻠﺔ )‪:(ICs Physical Architecture‬‬

‫ﻳﺘﻢ ﺻﻨﻊ اﻟﺪارات اﳌﺘﻜﺎﻣﻠﺔ ﻋﻠﻰ ﺷﺮﳛﺔ ﺳﻴﻠﻴﻜﻮﻧﻴﺔ داﺋﺮﻳﺔ )‪ (300×300mm‬رﻗﻴﻘﺔ ﺗﺴﻤﻰ ﺑـ"‪ ،"wafer‬وﻛﻞ ﺷﺮﳛﺔ "‪ "wafer‬ﲤﻠﻚ ﻣﺌﺎت‬
‫ﻣﻦ اﻟﻮﺣﺪات اﻟﱵ ﺗﺴﻤﻰ ﺑـ"‪ "die‬واﻟﱵ ﻫﻲ ﻋﺒﺎرة ﻋﻦ ﻗﻄﻌﺔ ﺳﻴﻠﻴﻜﻮﻧﻴﺔ ﻣﺮﺑﻌﺔ ﲢﻮي ﻋﻠﻰ اﻟﺪارة اﳌﺘﻜﺎﻣﻠﺔ اﳌﺼﻤﻤﺔ‪ .‬ﻳﺘﻢ ﺗﻜﻮﻳﻦ اﻟﱰاﻧﺰﺳﺘﻮرات‬
‫واﻟﻮﺻﻼت ﻣﻦ اﻟﻌﺪﻳﺪ ﻣﻦ اﻟﻄﺒﻘﺎت اﻟﺴﻴﻠﻴﻜﻮﻧﻴﺔ واﻟﱵ ﺗﱰاوح ﻋﺎدة ﻣﻦ ‪ 10‬إﱃ ‪ 40‬ﻃﺒﻘﺔ ﻣﺴﺘﻘﻠﺔ ﻣﱰاﻛﺒﺔ ﻓﻮق ﺑﻌﻀﻬﺎ اﻟﺒﻌﺾ‪ ،‬ﻛﻞ ﻃﺒﻘﺔ ﻣﻦ‬
‫ﻫﺬﻩ اﻟﻄﺒﻘﺎت اﳌﺘﻌﺎﻗﺒﺔ ﺗﺴﻤﻰ ﺑـ"‪mask layer‬ﺠﻤﻟﻤﻮﻋﺔ اﻷوﱃ ﻣﻦ اﻟﻄﺒﻘﺎت ﺗﺸﻜﻞ اﻟﱰاﻧﺰﺳﺘﻮرات واﳌﻘﺎوﻣﺎت واﳌﻜﺜﻔﺎت‪ ،‬أﻣﺎ اﺠﻤﻟﻤﻮﻋﺔ‬
‫اﻟﺜﺎﻧﻴﺔ ﻓﺘﺸﻜﻞ اﻟﻮﺻﻼت اﳌﻌﺪﻧﻴﺔ ﺑﲔ ﻫﺬﻩ اﻟﻌﻨﺎﺻﺮ‪ .‬اﻟﺸﻜﻞ‪ 75-1‬ﻳﺒﲔ ﻣﻘﻄﻌﺎً ﰲ ﻃﺒﻘﺎت اﻟﺴﻴﻠﻴﻜﻮن واﻷﻛﺴﻴﺪ ﻟﺪارة ﻣﺘﻜﺎﻣﻠﺔ‪.‬‬
‫اﻟﺸﻜﻞ‪ 76-1‬ﻳﺒﲔ اﻟﺒﻨﻴﺔ اﻟﺴﻴﻠﻴﻜﻮﻧﻴﺔ ﻟﻠﻤﻌﺎﰿ ‪ P4‬واﻟﺬي ﺗﻄﻠﺐ ‪ 21‬ﻃﺒﻘﺔ ﻗﻨﺎع وﳝﻠﻚ ‪ 6‬ﻃﺒﻘﺎت وﺻﻼت ﻣﻌﺪﻧﻴﺔ ﲨﻌﺖ ‪ 22‬ﻣﻠﻴﻮن‬
‫ﺗﺮاﻧﺰﺳﺘﻮر ﻋﻠﻰ ﺷﺮﳛﺔ ‪ wafer‬ﺑﻘﻴﺎس ‪.224mm2 die‬‬

‫اﻟﺸﻜﻞ‪ 75-1‬ﻣﻘﻄﻊ ﰲ ﻃﺒﻘﺎت اﻟﺴﻴﻠﻜﻮن واﻷﻛﺴﻴﺪ واﳌﻌﺪن‬

‫اﻟﺸﻜﻞ‪ 76-1‬اﻟﺸﺮﳛﺔ اﻟﺴﻴﻠﻴﻜﻮﻧﻴﺔ ﻟﻠﻤﻌﺎﰿ ‪P4‬‬

‫‪51‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 Embedded Systems | ‫اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ‬

:(Types of ASIC) ‫ أﻧﻮاع اﻟﺪارات اﳌﺘﻜﺎﻣﻠﺔ ﻣﺘﺨﺼﺼﺔ اﻟﺘﻄﺒﻴﻘﺎت‬2-5-15-1

77-1‫ اﻟﺸﻜﻞ‬.‫ وﲣﺘﻠﻒ ﻋﻦ ﺑﻌﻀﻬﺎ ﻣﻦ ﺣﻴﺚ أﺳﻠﻮب اﻟﺘﺼﻤﻴﻢ وﺗﻘﻨﻴﺔ اﻟﺘﺼﻨﻴﻊ‬،‫ﻳﻮﺟﺪ اﻟﻌﺪﻳﺪ ﻣﻦ اﻟﺪارات اﳌﺘﻜﺎﻣﻠﺔ ﻣﺘﺨﺼﺼﺔ اﻟﺘﻄﺒﻴﻘﺎت‬

.‫ﻳﺒﲔ أﻗﺴﺎم وﻓﺮوع اﻟﺪارات اﳌﺘﻜﺎﻣﻠﺔ ﻣﺘﺨﺼﺼﺔ اﻟﺘﻄﺒﻴﻘﺎت‬

Full-Custom ASICs •
Standard-Cell–Based ASICs •
Gate-Array–Based ASICs •
Channeled Gate Array ‹
Channelless Gate Array ‹
Structured Gate Array ‹
Programmable Logic Devices •
Field-Programmable Gate Arrays •

ASICs

Structured Semi-custom Full-custom Programmable Mixed-signal

ASICs ASICs ASICs ASICs ASICs

Standard-cell Gate-array PLDs FPGAs

LPA PAL LUT

Embedded Channeled Channelless PRM GAL MUX

PML Gate

‫ أﻗﺴﺎم وﻓﺮوع اﻟﺪارات اﳌﺘﻜﺎﻣﻠﺔ ﻣﺘﺨﺼﺼﺔ اﻟﺘﻄﺒﻴﻘﺎت‬77-1‫اﻟﺸﻜﻞ‬

:Semi-Custom ASICs 1-2-5-15-1

.‫وﻫﻲ اﻟﺪارات اﳌﺘﻜﺎﻣﻠﺔ اﻟﱵ ﰎ ﺗﺼﻤﻴﻤﻬﺎ إﻣﺎ ﺑﺎﺳﺘﺨﺪام ﻣﻜﺘﺒﺎت ﺟﺎﻫﺰة أو ﰎ ﺑﻨﺎؤﻫﺎ ﻋﻠﻰ ﻣﺼﻔﻮﻓﺔ ﺑﻮاﺑﺎت ﻣﻨﻄﻘﻴﺔ ﻣﻮﺻﻮﻟﺔ ﻣﻊ ﺑﻌﻀﻬﺎ‬
:‫ ﻳﻮﺟﺪ ﻧﻮﻋﲔ ﳍﺬﻩ اﻟﺪارات‬.ASICs‫ ﻳﺒﲔ ﺗﺼﻤﻴﻢ ﺑﻮاﺑﺔ ﻋﺎﻛﺲ ﻋﻠﻰ ﺷﺮاﺋﺢ اﻟـ‬78-1‫اﻟﺸﻜﻞ‬

TTL‫اﻟـ‬ ‫ﳐﻄﻂ‬ Layout‫اﻟـ‬ ‫ﳐﻄﻂ‬ Wafer‫اﻟـ‬ ‫ﻣﻘﻄﻊ ﻋﺮﺿﻲ ﰲ‬

ASICs‫ ﳐﻄﻄﺎت ﺗﺼﻤﻴﻢ ﺑﻮاﺑﺔ ﻋﺎﻛﺲ ﻋﻠﻰ ﺷﺮاﺋﺢ اﻟـ‬78-1‫اﻟﺸﻜﻞ‬

Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages 52
‫‪21‬‬ ‫‪Chapter 1‬‬ ‫اﻟﻔﺼﻞ اﻷول |‬

‫‪:(CBIC) Standard cell based ASIC 1-1-2-5-15-1‬‬

‫ﺗﻌﺘﱪ اﻟـ‪ CBIC‬أﻛﺜﺮ أﻧﻮاع اﻟﺪارات اﳌﺘﻜﺎﻣﻠﺔ ﻣﺘﺨﺼﺼﺔ اﻟﺘﻄﺒﻴﻘﺎت ﻋﻤﻮﻣﺎً واﻧﺘﺸﺎراً ﺣﻴﺚ ﻳﺘﻢ ﺑﻨﺎؤﻫﺎ ﺑﺎﻻﻋﺘﻤﺎد ﻋﻠﻰ ﻣﻜﺘﺒﺎت ﺗﺴﻤﻰ‬
‫ﺑـ"‪ "Cell Library‬ﻳﺘﻢ ﺗﺰوﻳﺪﻫﺎ ﻣﻦ ﻗﺒﻞ اﻟﺸﺮﻛﺎت اﳌﺼﻨﻌﺔ ﻷﻧﺼﺎف اﻟﻨﻮاﻗﻞ وﲢﻮي ﻋﻠﻰ ﻋﻨﺎﺻﺮ ﻣﻨﻄﻘﻴﺔ ‪(AND gates, OR gates,‬‬

‫)…‪ ،multiplexers, and flip-flops, etc‬ﻫﺬﻩ اﳌﻜﺘﺒﺎت اﻟﻘﻴﺎﺳﻴﺔ ﻳﺘﻢ أﻧﺸﺎؤﻫﺎ وﺗﺮﻛﻴﺒﻬﺎ ﻣﻦ اﻟﻮﺻﻒ ‪ RTL‬ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت وﺻﻒ‬
‫اﻟﻜﻴﺎن اﻟﺼﻠﺐ ﻣﺜﻞ‪ ،VHDL or Verilog :‬إﺿﺎﻓﺔً إﱃ ذﻟﻚ ﻓﺈن ﻫﺬا اﻟﻨﻮع ﳝﻜﻦ أن ﻳﺘﻀﻤﻦ وﺣﺪات )‪ (Blocks‬ﺗﺴﻤﻰ‬
‫ﺑـ"‪ "megacells‬ﻣﺘﻮﺿﻌﺔ ﻋﻠﻰ اﻟﺸﺮﳛﺔ ﺑﺸﻜﻞ ﻣﺴﺒﻖ‪ ،‬وﻳﺘﻢ اﺳﺘﺪﻋﺎؤﻫﺎ ﻣﻦ اﳌﻜﺘﺒﺎت اﻟﻘﻴﺎﺳﻴﺔ‪ ،‬وﳝﻜﻦ أن ﺗﻜﻮن ﻣﺘﺤﻜﻢ ﻣﺼﻐﺮ )‪(MCU‬‬
‫أو ﻣﻌﺎﰿ ﻣﺼﻐﺮ )‪ ،(MPU‬ﻟﺬا ﻓﺈن ﻣﺼﻤﻢ اﻟـ ‪ ASIC‬ﳛﺪد ﻓﻘﻂ ﺗﻮﺿﻊ وﺣﺪات اﳋﻼﻳﺎ اﻟﻘﻴﺎﺳﻴﺔ واﻟﻮﺻﻼت ﻓﻴﻤﺎ ﺑﻴﻨﻬﺎ ﻣﻊ اﻟﻌﻠﻢ أن‬
‫اﳋﻼﻳﺎ ﳝﻜﻦ أن ﻳﺘﻢ ﺗﻮزﻳﻌﻬﺎ ﰲ أي ﻣﻜﺎن ﻋﻠﻰ اﻟﺸﺮﳛﺔ اﻟﺴﻴﻠﻴﻜﻮﻧﻴﺔ‪ ،‬وﺑﺎﻟﺘﺎﱄ ﻓﺈن ﲨﻴﻊ ﻃﺒﻘﺎت اﻷﻗﻨﻌﺔ ﻳﺘﻢ ﺑﻨﺎؤﻫﺎ ﺑﺸﻜﻞ اﺳﺘﺜﻨﺎﺋﻲ ﻣﻦ أﺟﻞ‬
‫ﺗﻄﺒﻴﻖ ﺧﺎص وﳏﺪد‪.‬‬

‫اﻟﺸﻜﻞ‪ 79-1‬ﻳﺒﲔ اﳌﺨﻄﻂ اﻟﺪاﺧﻠﻲ ﻟـ‪ CBIC‬واﻟﺬي ﳝﻜﻦ رؤﻳﺘﻪ ﺑﺎﺳﺘﺨﺪام ﻣﻴﻜﺮوﺳﻜﻮب‪ ،‬وﻫﻲ ﲢﻮي ﻋﻠﻰ ‪ standard-cell‬إﺿﺎﻓﺔ إﱃ‬
‫‪ flexible block‬اﻟﱵ ﲢﻮي ﻋﻠﻰ ﳎﻤﻮﻋﺎت ﻣﻦ ‪ ،standard cells‬وﻋﻠﻰ اﻷﻃﺮاف ﻳﻮﺟﺪ ﻧﻘﺎط اﻟﺘﻮﺻﻴﻞ ﻟﻠﺸﺮﳛﺔ اﻟﺴﻴﻠﻴﻜﻮﻧﻴﺔ ﻣﻊ أﻗﻄﺎب‬
‫اﻟﻐﻼف اﳋﺎرﺟﻲ ﻟﻠﺸﺮﳛﺔ‪ ،‬وﻫﻲ ﻋﻠﻰ ﺷﻜﻞ ﻣﺮﺑﻌﺎت ﺻﻐﲑة‪.‬‬

‫اﻟﺸﻜﻞ‪ 79-1‬ﳐﻄﻂ ﺗﻮزع اﳋﻼﻳﺎ ﻋﻠﻰ ﺷﺮﳛﺔ اﻟـ‪Cell-based ASIC‬‬

‫ﻳﺘﻢ ﺗﺼﻤﻴﻢ وﺣﺪات اﳋﻼﻳﺎ اﻟﻘﻴﺎﺳﻴﺔ ﲝﻴﺚ ﳝﻜﻦ ﲨﻌﻬﺎ إﱃ ﺑﻌﻀﻬﺎ ﺗﺼﺒﺢ ﻛﺘﻠﺔ ﻗﺎﺑﻞ ﻟﻠﺘﺸﻜﻴﻞ‪ .‬اﻟﺸﻜﻞ‪ 80-1‬ﻳﺒﲔ ﻃﺒﻘﺎت اﻷﻗﻨﻌﺔ وﻃﺮﻳﻘﺔ‬
‫رﺑﻂ اﳋﻼﻳﺎ ﻣﻊ ﺑﻌﻀﻬﺎ اﻟﺒﻌﺾ؛ اﻟﻮﺻﻠﺔ ‪ Metal2‬ﺗﺴﺘﺨﺪم ﻟﺘﺨﻄﻲ اﻟﺘﻘﺎﻃﻌﺎت ﻣﻊ ﺻﻔﻮف اﳋﻼﻳﺎ اﳌﻨﻄﻘﻴﺔ اﻟﱵ ﺗﺴﺘﺨﺪم اﻟﻮﺻﻠﺔ‬
‫‪.Metal1‬‬

‫اﻟﺸﻜﻞ‪ 80-1‬وﺻﻞ اﳋﻼﻳﺎ اﳌﻨﻄﻘﻴﺔ ﰲ ﺗﻘﻨﻴﺔ اﻟـ‪CBIC‬‬

‫‪53‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Embedded Systems‬‬ ‫اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ |‬

‫ﳏﺎﺳﻦ ﻫﺬا اﻟﻨﻮع ﻫﻲ أن اﳌﺼﻤﻢ ﻳﻮﻓﺮ اﻟﻮﻗﺖ واﳌﺎل ﺑﺎﺳﺘﺨﺪام ﻣﻜﺘﺒﺎت اﳋﻼﻳﺎ اﻷﻣﺜﻠﻴﺔ اﻟﻨﻤﻮذﺟﻴﺔ ﻋﻮﺿﺎً ﻋﻦ ﺑﻨﺎء ﻫﺬﻩ اﳌﻜﺘﺒﺎت وﻓﺤﺼﻬﺎ‬
‫وﺟﻌﻠﻬﺎ أﻣﺜﻠﻴﺔ‪ ،‬ﻛﻤﺎ ﳝﻜﻦ ﺗﻀﻤﲔ وﺣﺪات وﻇﻴﻔﻴﺔ ﻣﺘﻘﺪﻣﺔ‪ .‬اﳌﻴﺰات اﻷﺳﺎﺳﻴﺔ ﳍﺬا اﻟﻨﻮع ﺗﺘﻠﺨﺺ ﺑـ‪:‬‬

‫‪ ‬اﻟﺴﻌﺮ اﻷﺧﻔﺾ ﻣﻦ أﺟﻞ ﻛﻤﻴﺔ ﺗﺼﻨﻴﻊ ﺗﺰﻳﺪ ﻋﻦ ‪ 200‬أﻟﻒ ﺷﺮﳛﺔ ﺳﻨﻮﻳﺎً!‬

‫‪ ‬ﺳﺮﻋﺔ وأداء ﻋﺎل ﺟﺪاً واﺳﺘﻬﻼك ﻣﻨﺨﻔﺾ ﻟﻠﻄﺎﻗﺔ‪.‬‬
‫‪ ‬ﻜﻦ دﻣﺞ وﺣﺪات وﻇﻴﻔﻴﺔ ﺗﺸﺎﻬﺑﻴﺔ )‪.(Custom ASICs‬‬

‫ﻣﺴﺎوئ ﻫﺬا اﻟﻨﻮع ﻫﻮ اﻟﻮﻗﺖ اﳌﺼﺮوف ﻟﺘﺼﻤﻴﻢ ﻫﺬﻩ اﳌﻜﺘﺒﺎت أو ﻛﻠﻔﺔ ﺷﺮاﺋﻬﺎ‪ ،‬أﻳﻀﺎً ﲢﺘﺎج ﻫﺬﻩ اﻟﺘﻘﻨﻴﺔ إﱃ إﻋﺎدة ﺗﺼﻨﻴﻊ ﲨﻴﻊ اﻟﻄﺒﻘﺎت‬
‫ﻣﻦ أﺟﻞ ﻛﻞ ﺗﻄﺒﻴﻖ ﺧﺎص‪ .‬ﳝﻜﻦ ﺗﻠﺨﻴﺺ اﳌﺴﺎوئ ﲟﺎ ﻳﻠﻲ‪:‬‬

‫‪ ‬ﻛﻠﻔﺔ ﺗﻄﻮﻳﺮ ﻋﺎﻟﻴﺔ ﺟﺪاً وزﻣﻦ اﻟﺘﺼﻤﻴﻢ ﻛﺒﲑ ﺟﺪاً‪.‬‬

‫‪ ‬ﻗﻠﺔ ﻣﻦ اﻟﺸﺮﻛﺎت ﺗﻘﻮم ﻋﻠﻰ ﺗﻄﻮﻳﺮ ﻣﻜﺎﺗﺐ )‪ (IP‬ﳍﺬا اﻟﻨﻮع‪.‬‬
‫‪ ‬زﻣﻦ اﻟﺘﺼﻨﻴﻊ ﺣﻮاﱄ ﲦﺎﻧﻴﺔ أﺳﺎﺑﻴﻊ‪.‬‬

‫اﻟﺸﻜﻞ‪ 81-1‬ﻳﺒﲔ اﳌﻜﺘﺒﺔ اﻟﻘﻴﺎﺳﻴﺔ ﻟﻠﺒﻮاﺑﺔ ‪ .XOR‬اﻟﺸﻜﻞ‪ 82-1‬ﻳﺒﲔ اﳌﻜﺘﺒﺔ اﻟﻘﻴﺎﺳﻴﺔ ﳌﺸﻔﺮ ﻋﺎﻛﺲ ﺛﻨﺎﺋﻲ اﻻﲡﺎﻩ]‪.[124‬‬

‫اﻟﺸﻜﻞ‪ 81-1‬اﳌﻜﺘﺒﺔ اﻟﻘﻴﺎﺳﻴﺔ ﻟﻠﺒﻮاﺑﺔ ‪ XOR‬ﰲ ﺗﻘﻨﻴﺔ اﻟـ‪CBIC‬‬

‫اﻟﺸﻜﻞ‪ 82-1‬اﳌﻜﺘﺒﺔ اﻟﻘﻴﺎﺳﻴﺔ ﳌﺸﻔﺮ ﻋﺎﻛﺲ ﺛﻨﺎﺋﻲ اﻻﲡﺎﻩ ﰲ ﺗﻘﻨﻴﺔ اﻟـ‪CBIC‬‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪54‬‬
‫‪21‬‬ ‫‪Chapter 1‬‬ ‫اﻟﻔﺼﻞ اﻷول |‬

‫‪:Gate-Array–Based ASICs 2-1-2-5-15-1‬‬

‫ﰲ ﻫﺬا اﻟﻨﻮع ﺗﻜﻮن اﻟﱰاﻧﺰﺳﺘﻮرات ﻣﺘﻮﺿﻌﺔ ﺑﺸﻜﻞ ﻣﺴﺒﻖ ﻋﻠﻰ اﻟﺸﺮﳛﺔ اﻟﺴﻴﻠﻴﻜﻮﻧﻴﺔ "‪ ."Wafer‬إن ﻃﺮﻳﻘﺔ اﻟﺘﻌﻴﲔ اﳌﺴﺒﻖ ﻟﻠﱰاﻧﺰﺳﺘﻮرات‬
‫ﺗﺪﻋﻰ ﺑـ‪ ،Base-array‬ﻛﻤﺎ أن اﻟﻌﻨﺼﺮ اﻷﺻﻐﺮ اﻟﺬي ﻳﺘﻢ ﺗﻜﺮارﻩ ﻟﺘﺘﺸﻜﻞ اﻟـ‪ Base-array‬ﻳﺪﻋﻰ ﺑـ‪ Base-cell‬أو ‪،Primitive-cell‬‬
‫وﺑﺎﻟﺘﺎﱄ ﻓﺈن اﳌﺼﻤﻢ ﻳﻘﻮم ﻋﻠﻰ ﲢﺪﻳﺪ اﻟﻄﺒﻘﺎت اﳌﻌﺪﻧﻴﺔ اﻟﱵ ﲢﺪد ﻃﺮﻳﻘﺔ اﻟﻮﺻﻞ ﺑﲔ اﻟﱰاﻧﺰﺳﺘﻮرات ﺑﺎﺳﺘﺨﺪام أﻗﻨﻌﺔ ﺧﺎﺻﺔ ﺗﺪﻋﻰ‬
‫ﺑـ‪ Custom-masks‬ﻛﻤﺎ وأﻧﻪ ﻬﺑﺪف ﲤﻴﻴﺰ ﻫﺬا اﻟﻨﻮع ﻣﻦ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺔ )‪ (Gate Array‬ﻋﻦ ﻏﲑﻫﺎ‪ ،‬ﻓﺈﻧﻪ ﻳﻄﻠﻖ ﻋﻠﻴﻬﺎ أﻳﻀﺎً ‪MGA‬‬

‫اﺧﺘﺼﺎراً ﻟـ ‪.Masked Gate Array‬‬

‫ﻳﺘﻢ ﺗﻨﻔﻴﺬ اﻟﺘﺼﻤﻴﻢ ﻣﻦ ﺧﻼل اﺧﺘﻴﺎر اﳋﻼﻳﺎ اﳌﻨﻄﻘﻴﺔ اﳌﺼﻤﻤﺔ واﳌﺼﻨﻔﺔ ﺑﺸﻜﻞ ﻣﺴﺒﻖ ﻣﻦ ﻣﻜﺘﺒﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺔ )‪(gate-array library‬‬
‫وﻣﻦ ﰒ رﺑﻄﻬﺎ ﻣﻦ ﺧﻼل اﻟﻮﺻﻼت اﳌﻌﺪﻧﻴﺔ؛ ﻫﺬﻩ اﳋﻼﻳﺎ اﳌﻨﻄﻘﻴﺔ ﺗﺪﻋﻰ ﺑـ‪ .Macros‬ﺑﻌﺪ اﻟﺘﺄﻛﺪ ﻣﻦ اﻟﺘﻮﺻﻴﻞ اﻟﻨﻈﺮي‪ ،‬ﻳﺘﻢ ﲢﻮﻳﻞ اﳌﺨﻄﻂ‬
‫ﻣﻦ ‪ macro-based‬إﱃ ﳐﻄﻂ ﺧﺮج )‪ (layout‬ﺑﺎﺳﺘﺨﺪام اﻟـ ‪ Base-cells‬وﻳﺘﻢ ذﻟﻚ ﺑﺎﺳﺘﺨﺪام ﻣﻌﺎﰿ رﺻﻒ أو ﺗﻮﺿﻊ )‪Auto-‬‬

‫‪ (placement‬وﻣﻌﺎﰿ ﺗﻮﺻﻴﻞ آﱄ )‪ (Auto-router‬ﻟﻠﺨﻼﻳﺎ‪.‬‬

‫إن ﻛﻠﻔﺔ اﻟﺘﺼﻤﻴﻢ واﻟﺘﺼﻨﻴﻊ ﻟـ‪ MGA‬ﺗﻌﺘﱪ أﺧﻔﺾ ﻣﻦ ﻃﺮﻳﻘﺔ اﻟﺘﺼﻨﻴﻊ ‪ Standard-cell ASIC‬وﻛﺬﻟﻚ اﻟﻄﺮﻳﻘﺔ ‪Full-custom‬‬

‫‪ ASIC‬ﻷن ﺗﻜﺎﻟﻴﻒ ﻣﺮاﺣﻞ اﻟﺘﺼﻨﻴﻊ اﻷوﻟﻴﺔ ﻫﻲ ﻧﻔﺴﻬﺎ ﻟﻜﻞ ﺗﺼﻤﻴﻢ ﰲ اﻟـ‪.MGA‬‬

‫ﻳﻮﺟﺪ ﺛﻼث أﻧﻮاع ﻟـ‪:Gate-Array-based ASICs‬‬

‫‪.Channeled gate arrays -1‬‬

‫‪.Channelless gate arrays -2‬‬
‫‪.Structured gate arrays -3‬‬

‫‪ 1-2-1-2-5-15-1‬ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺔ ذات اﻟﻘﻨﺎة ‪:(Channeled Gate Array) CGA‬‬

‫ﻫﺬا اﻟﻨﻮع ﻣﺸﺎﺑﻪ ﻟـ ‪ Cell-based‬ﺣﻴﺚ أن ﻛﻼﳘﺎ ﻳﻌﺘﻤﺪ ﺻﻔﻮف ﻣﻦ اﳋﻼﻳﺎ اﳌﻨﻄﻘﻴﺔ ﺑﻴﻨﻬﺎ ﻗﻨﻮات ﻣﻦ أﺟﻞ اﻟﻮﺻﻼت ﺑﲔ اﻟﱰاﻧﺰﺳﺘﻮرات‪.‬‬
‫اﻟﺸﻜﻞ‪ 83-1‬ﻳﺒﲔ ﳐﻄﻂ اﻟﺸﺮﳛﺔ اﻟﺴﻴﻠﻴﻜﻮﻧﻴﺔ ﻟـ‪.CGA‬‬

‫اﻟﺸﻜﻞ‪ 83-1‬ﳐﻄﻂ ﺗﻮزع اﳋﻼﻳﺎ ﻋﻠﻰ اﻟﺸﺮﳛﺔ اﻟﺴﻴﻠﻴﻜﻮﻧﻴﺔ ‪CGA‬‬

‫اﳌﻴﺰات اﻷﺳﺎﺳﻴﺔ ﳍﺬا اﻟﺼﻨﻒ ﺗﺘﻠﺨﺺ ﺑـ‪:‬‬

‫‪ ‬ﻳﺘﻢ ﺗﻌﻴﲔ اﻟﻮﺻﻼت ﺑﲔ اﻟﱰاﻧﺰﺳﺘﻮرات ﻓﻘﻂ‪.‬‬
‫‪ ‬اﻟﻮﺻﻼت ﺗﺘﻮﺿﻊ ﺑﲔ ﺻﻔﻮف اﳋﻼﻳﺎ اﳌﻨﻄﻘﻴﺔ ﻋﻠﻰ ﻣﺴﺎﻓﺎت ﳏﺪدة ﻣﺴﺒﻘﺎً‪.‬‬
‫‪55‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Embedded Systems‬‬ ‫اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ |‬

‫‪ ‬زﻣﻦ ﺗﺼﻨﻴﻊ اﻟﺘﺼﻤﻴﻢ ﻳﱰاوح ﺑﲔ ﻳﻮﻣﲔ وأﺳﺒﻮﻋﲔ‪.‬‬

‫‪ 2-2-1-2-5-15-1‬ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺔ ﺑﺪون ﻗﻨﺎة ‪:(Channelless Gate Array) ClGA‬‬

‫ﻳﻄﻠﻖ ﻋﻠﻰ ﻫﺬا اﻟﻨﻮع أﻳﻀﺎً اﳌﺼﻄﻠﺢ ‪sea-of-gates array‬؛ اﻻﺧﺘﻼف ﺑﲔ اﻟـ‪ CGA‬وﺑﲔ اﻟـ‪ ClGA‬ﻫﻮ أن اﻟـ‪ ClGA‬ﻻ ﲤﻠﻚ ﻣﻨﻄﻘﺔ‬
‫ﻗﻨﻮات ﻣﻌﺰوﻟﺔ ﻟﻠﻮﺻﻼت ﺑﲔ اﳋﻼﻳﺎ اﳌﻨﻄﻘﻴﺔ‪ ،‬ﺑﺪﻻً ﻣﻦ ذﻟﻚ ﻳﺘﻢ ﺗﻮﺻﻴﻞ اﳋﻼﻳﺎ ﺑﻮﺻﻼت ﻋﻠﻮﻳﺔ‪ ،‬وﺑﺎﻟﺘﺎﱄ ﻓﺈن اﻟﻜﺜﺎﻓﺔ اﳌﻨﻄﻘﻴﺔ ﻋﻠﻰ ﻧﻔﺲ‬
‫اﳌﺴﺎﺣﺔ اﻟﺴﻴﻠﻴﻜﻮﻧﻴﺔ ﺳﻮف ﺗﻜﻮن أﻛﱪ ﺑﻜﺜﲑ‪ .‬اﻟﺸﻜﻞ‪ 84-1‬ﻳﺒﲔ ﳐﻄﻂ اﻟﺸﺮﳛﺔ اﻟﺴﻴﻠﻴﻜﻮﻧﻴﺔ ﻟـ‪.ClGA‬‬

‫اﳌﻴﺰات اﻷﺳﺎﺳﻴﺔ ﳍﺬا اﻟﺼﻨﻒ ﺗﺘﻠﺨﺺ ﺑـ‪:‬‬

‫‪ ‬ﻳﺘﻢ ﺗﻌﻴﲔ ﺑﻌﺾ اﻟﻮﺻﻼت ﻓﻘﻂ ﻋﻠﻰ ﻃﺒﻘﺎت اﻷﻗﻨﻌﺔ‪.‬‬

‫‪ ‬اﻟﻜﺜﺎﻓﺔ اﳌﻨﻄﻘﻴﺔ أﻛﱪ ﺑﻜﺜﲑ ﻋﻠﻰ ﻧﻔﺲ اﳌﺴﺎﺣﺔ اﻟﺴﻴﻠﻴﻜﻮﻧﻴﺔ‪.‬‬
‫‪ ‬زﻣﻦ ﺗﺼﻨﻴﻊ اﻟﺘﺼﻤﻴﻢ ﻳﱰاوح ﺑﲔ ﻳﻮﻣﲔ وأﺳﺒﻮﻋﲔ‪.‬‬

‫اﻟﺸﻜﻞ‪ 84-1‬ﳐﻄﻂ ﺗﻮزع اﳋﻼﻳﺎ ﻋﻠﻰ اﻟﺸﺮﳛﺔ اﻟﺴﻴﻠﻴﻜﻮﻧﻴﺔ ‪ClGA‬‬

‫اﻟﺸﻜﻞ‪ 85-1‬ﻳﺒﲔ ﻣﻘﺎرﻧﺔ ﺑﲔ ﺗﻮزع اﳋﻼﻳﺎ ﻟـ‪ CGA‬ﻋﻠﻰ اﻟﺸﻜﻞ )‪ (a‬واﻟـ‪ ClGA‬ﻋﻠﻰ اﻟﺸﻜﻞ )‪.(b‬‬

‫اﻟﺸﻜﻞ ‪ 85-1‬ﻣﻘﺎرﻧﺔ ﺗﻮزع اﳋﻼﻳﺎ ﻋﻠﻰ اﻟﺸﺮﳛﺔ اﻟﺴﻴﻠﻴﻜﻮﻧﻴﺔ ﺑﲔ اﻟـ‪ CGA‬واﻟـ‪ClGA‬‬

‫‪ 3-2-1-2-5-15-1‬ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺔ اﳌﻀﻤﻨﺔ ‪:(Structured Gate Array) SGA‬‬

‫ﻳﻄﻠﻖ ﻋﻠﻰ ﻫﺬا اﻟﻨﻮع أﻳﻀﺎً ‪ (EGA) embedded gate array‬وﻫﻮ ﻳﻀﻢ ﺑﻌﺾ ﻣﻴﺰات ‪ Cell-based‬وﻛﺬﻟﻚ ‪Masked-gate-‬‬

‫‪ .array‬ﻫﺬا اﻟﻨﻮع ﻳﻌﺎﰿ أﺣﺪى ﻣﺸﻜﻼت اﻟـ‪ Masked-gate-array‬وﻫﻲ ﻛﻮن اﳋﻼﻳﺎ ﻣﻌﻴﻨﺔ وﻣﺼﻤﻤﺔ ﺑﺸﻜﻞ ﻣﺴﺒﻖ وﻻ ﳝﻜﻦ ﺗﻌﺪﻳﻠﻬﺎ‪،‬‬
‫ﳎﺪ‪ .‬ﻟﺬﻟﻚ ﻓﺈﻧﻪ ﰲ اﻟـ‪ EGA‬أو اﻟـ‪ SGA‬ﻳﺘﻢ ﲣﺼﻴﺺ ﻗﻄﺎع ﻟﻮﻇﺎﺋﻒ‬‫وﺑﺎﻟﺘﺎﱄ ﻓﺈن ﺑﻨﺎء وﺣﺪات ﲣﺰﻳﻦ ﻣﺜﻞ ذاﻛﺮة ﻳﻌﺘﱪ أﻣﺮاً ﺻﻌﺒﺎً وﻏﲑ ٍ‬

‫ﺧﺎﺻﺔ‪ ،‬وﻫﺬا اﻟﻘﻄﺎع ﳝﻜﻦ أن ﳛﻮي ﻋﻠﻰ ﺧﻼﻳﺎ ﻣﻨﻄﻘﻴﺔ ﳐﺘﻠﻔﺔ ﳋﻼﻳﺎ اﻟﺒﻨﻴﺔ اﻷﺳﺎﺳﻴﺔ ﲝﻴﺚ ﺗﻜﻮن ﻣﻼﺋﻤﺔ ﻟﺒﻨﺎء وﺣﺪات ﺧﺎﺻﺔ ﻣﺜﻞ‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪56‬‬
‫‪21‬‬ ‫‪Chapter 1‬‬ ‫اﻟﻔﺼﻞ اﻷول |‬

‫اﻟﺬواﻛﺮ أو ﳝﻜﻦ أن ﲢﻮي ﻋﻠﻰ وﺣﺪات وﻇﻴﻔﻴﺔ ﺟﺎﻫﺰة ﻣﺜﻞ ﻣﺘﺤﻜﻢ ﻣﺼﻐﺮ أو وﺣﺪة ﻣﻌﺎﳉﺔ ﺧﺎﺻﺔ‪ .‬اﻟﺸﻜﻞ‪ 86-1‬ﻳﺒﲔ ﳐﻄﻂ اﻟﺸﺮﳛﺔ‬
‫اﻟﺴﻴﻠﻴﻜﻮﻧﻴﺔ ﻟـ‪.SGA‬‬

‫اﻟﺸﻜﻞ‪ 86-1‬ﳐﻄﻂ ﺗﻮزع اﳋﻼﻳﺎ ﻋﻠﻰ اﻟﺸﺮﳛﺔ اﻟﺴﻴﻠﻴﻜﻮﻧﻴﺔ ‪SGA‬‬

‫اﳌﻴﺰات اﻷﺳﺎﺳﻴﺔ ﳍﺬا اﻟﻨﻮع ﺗﺘﻠﺨﺺ ﺑـ‪:‬‬

‫‪ ‬ﻳﺘﻢ ﺗﻌﻴﲔ اﻟﻮﺻﻼت ﺑﲔ اﻟﱰاﻧﺰﺳﺘﻮرات ﻓﻘﻂ ﻷن اﻟﱰاﻧﺰﺳﺘﻮرات ﻣﺘﻮﺿﻌﺔ ﺑﺸﻜﻞ ﻣﺴﺒﻖ‪.‬‬

‫‪ ‬ﳝﻜﻦ دﻣﺞ ﺧﻼﻳﺎ ﻣﻨﻄﻘﻴﺔ أو وﺣﺪات وﻇﻴﻔﻴﺔ ﻣﺘﻘﺪﻣﺔ‪.‬‬
‫‪ ‬زﻣﻦ ﺗﺼﻨﻴﻊ اﻟﺘﺼﻤﻴﻢ ﻳﱰاوح ﺑﲔ ﻳﻮﻣﲔ وأﺳﺒﻮﻋﲔ‪.‬‬

‫‪:Full-Custom ASICs 2-2-5-15-1‬‬

‫ﳜﺘﻠﻒ ﻫﺬا اﻟﻨﻮع ﻋﻦ اﻷﻧﻮاع اﻟﺴﺎﺑﻘﺔ ﻣﻦ ﺣﻴﺚ أن ﻣﺼﻤﻢ اﻟﻨﻈﺎم ﻳﻘﻮم ﻋﻠﻰ ﺗﺼﻤﻴﻢ اﳋﻼﻳﺎ اﳌﻨﻄﻘﻴﺔ )‪ (Logic Cells‬واﻟﺪارات وﳐﻄﻂ‬
‫اﳋﺮج ﺑﺸﻜﻞ ﺧﺎص ﻣﺘﻌﻠﻖ ﺑﻮﻇﺎﺋﻒ اﻟﺸﺮﳛﺔ اﳌﻄﻠﻮﺑﺔ ﻋﻠﻰ ﳓﻮ ﺧﺎص‪ ،‬وﺑﺎﻟﺘﺎﱄ ﻻ ﻳﺘﻢ اﺳﺘﺨﺪام اﳌﻜﺘﺒﺎت اﻟﻘﻴﺎﺳﻴﺔ إﻻ ﻟﺒﻌﺾ اﳋﻼﻳﺎ اﳌﻨﻄﻘﻴﺔ‬
‫ﻋﺎﻣﺔ اﻟﻮﻇﻴﻔﺔ ﻓﻘﻂ‪ .‬ﻛﻤﺎ أﻧﻪ ﻳﺴﺘﺨﺪم ﻋﻨﺪﻣﺎ ﻻ ﺗﻮﺟﺪ ﰲ اﳌﻜﺘﺒﺎت اﻟﻘﻴﺎﺳﻴﺔ ﺑﻌﺾ اﳌﻜﺘﺒﺎت اﳋﺎﺻﺔ أو ﻋﻨﺪﻣﺎ ﺗﻜﻮن ﻣﻮاﺻﻔﺎت اﳌﻜﺘﺒﺎت‬
‫اﻟﻘﻴﺎﺳﻴﺔ ﻻ ﺗﻠﱯ ﻣﺘﻄﻠﺒﺎت ﺧﺎﺻﺔ ﻟﻸداء واﺳﺘﻬﻼك اﻟﻄﺎﻗﺔ‪ .‬اﻟﺸﻜﻞ‪ 87-1‬ﻳﺒﲔ ﻣﻘﺎرﻧﺔ ﺑﲔ ﻃﺒﻘﺎت اﻷﻗﻨﻌﺔ واﻟﺸﺮﳛﺔ اﻟﺴﻴﻠﻴﻜﻮﻧﻴﺔ ﻟـ‪Full-‬‬

‫‪ custom ASICs‬ﻋﻠﻰ اﳉﺎﻧﺐ اﻷﻳﺴﺮ واﻟـ‪ Semi-custom ASICs‬ﻋﻠﻰ اﳉﺎﻧﺐ اﻷﳝﻦ‪ ،‬ﺣﻴﺚ أن ﻃﺒﻘﺎت اﻷﻗﻨﻌﺔ ﺗﺼﻤﻢ ﺧﺼﻴﺼﺎً‬
‫ﻟﺘﻄﺒﻴﻖ ﻣﻌﲔ ﻋﻠﻰ ﳓﻮ ﺧﺎص وﺗﻜﻮن ﺷﺮﳛﺔ اﻟﺴﻴﻠﻴﻜﻮن ﻏﲑ ﻣﻌﺎﳉﺔ ﺑﺸﻜﻞ ﻣﺴﺒﻖ‪.‬‬

‫اﻟﺸﻜﻞ‪ 87-1‬ﻣﻘﺎرﻧﺔ ﺑﲔ ﻃﺒﻘﺎت اﻷﻗﻨﻌﺔ واﻟﺸﺮﳛﺔ اﻟﺴﻴﻠﻴﻜﻮﻧﻴﺔ ﻟـ‪ Full-custom ASICs‬واﻟـ‪Semi-custom ASICs‬‬

‫اﻟﺘﻄﺒﻴﻘﺎت اﻟﱵ ﺗﺴﺘﺨﺪم ﻫﺬا اﻟﻨﻮع ﻫﻲ‪ :‬أﻧﻈﻤﺔ ﻟﺘﺤﻜﻢ ﺑﺎﻟﺴﻴﺎرات‪ ،‬اﻻﺗﺼﺎﻻت اﻟﺘﺸﺎﻬﺑﻴﺔ‪/‬اﻟﺮﻗﻤﻴﺔ‪ ،‬اﳊﺴﺎﺳﺎت‪ ،‬اﻷﺟﻬﺰة اﻟﻨﻘﺎﻟﺔ واﳍﻮاﺗﻒ‬
‫اﻟﺬﻛﻴﺔ وﻏﲑﻫﺎ ﻣﻦ اﻟﺘﻄﺒﻴﻘﺎت‪.‬‬

‫‪57‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Embedded Systems‬‬ ‫اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ |‬

‫ﺗﻘﻮم ﺑﻌﺾ اﻟﺸﺮﻛﺎت ﻋﻠﻰ ﺗﺼﻤﻴﻢ ﻣﻜﺎﺗﺐ ﺧﺎﺻﺔ وﻇﻴﻔﻴﺔ ﳍﺬا اﻟﻨﻮع ﺗﺘﻀﻤﻦ ﻣﻜﺎﺗﺐ ﺑﺮوﺗﻮﻛﻮﻻت اﻻﺗﺼﺎل اﻟﺘﺴﻠﺴﻠﻲ وﻣﻜﺎﺗﺐ ﳌﻌﺎﳉﺎت‬
‫‪ 8/32-bit‬وﻣﻜﺎﺗﺐ وﺣﺪات ﲣﺰﻳﻦ ذاﻛﺮﻳﺔ وﻏﲑﻫﺎ‪ .‬اﻟﺸﻜﻞ‪ 88-1‬ﻳﺒﲔ اﳌﺨﻄﻂ اﻟﺼﻨﺪوﻗﻲ ﻟﺸﺮﳛﺔ ‪ Full-Custom ASICs‬ﻣﺼﻨﻌﺔ ﻣﻦ‬
‫ﻗﺒﻞ ﺷﺮﻛﺔ ‪ ATMEL‬وﻣﺰودة ﲟﻜﺘﺒﺎت ‪ IP‬ﺧﺎﺻﺔ]‪.[125‬‬

‫اﻟﺸﻜﻞ‪ 89-1‬ﻳﺒﲔ اﳌﺨﻄﻂ اﻟﺸﺮﳛﺔ اﻟﺴﻴﻠﻴﻜﻮﻧﻴﺔ ﻟـ‪ Full-Custom ASICs‬وﻫﻲ ﲢﻮي ﻋﻠﻰ ﻣﺘﺤﻜﻢ ‪ 32-bit‬دارات رﻗﻤﻴﺔ وﺗﺸﺎﻬﺑﻴﺔ‬
‫ﻣﺪﳎﺔ ﻋﻠﻰ ﻧﻔﺲ اﻟﺸﺮﳛﺔ ﺑﺎﻹﺿﺎﻓﺔ إﱃ وﺣﺪات ذاﻛﺮﻳﺔ]‪.[126‬‬

‫‪ATMEL MPCF‬‬ ‫اﻟﺸﻜﻞ‪ 88-1‬ﳐﻄﻂ اﻟﺸﺮﳛﺔ‬

‫اﻟﺸﻜﻞ‪A typical ASIC die 89-1‬‬

‫‪:Structured ASIC 3-2-5-15-1‬‬

‫ﻫﺬا اﻟﻨﻮع ﻫﻮ ﺗﻜﻨﻮﻟﻮﺟﻴﺎ وﺳﻴﻄﺔ ﺑﲔ اﻟـ‪ ASICs‬واﻟـ‪ FPGAs‬ﺣﻴﺚ ﲤﺘﻠﻚ ﻣﻴﺰات اﻷداء اﻟﻌﺎﱄ واﻟﻜﻠﻔﺔ اﳌﻨﺨﻔﻀﺔ ﻟﺸﺮاﺋﺢ اﻟـ‪،ASIC‬‬
‫وﻛﺬﻟﻚ ﻣﻴﺰات ﺳﻬﻮﻟﺔ اﻟﺘﺼﻤﻴﻢ واﻟﺘﺼﻨﻴﻊ واﻟﺘﻄﻮﻳﺮ ﻟﺸﺮاﺋﺢ اﻟـ‪.FPGA‬‬

‫ﰲ ﺷﺮاﺋﺢ اﻟـ‪ FPGA‬ﻢ ﺑﺮﳎﺔ اﺠﻤﻟﻤﻮﻋﺎت اﳌﻨﻄﻘﻴﺔ )‪ (Logic Blocks‬واﻟﻮﺻﻼت ﺑﻌﺪ ﺗﺼﻨﻴﻊ ﺷﺮﳛﺔ اﻟـ‪ ،FPGA‬واﻟﺬي ﺑﺪورﻩ ﻳﺘﻴﺢ‬
‫إﻣﻜﺎﻧﻴﺔ وﻣﺮوﻧﺔ ﻛﺒﲑة ﰲ ﺗﺼﻤﻴﻢ اﻟﻨﻤﻮذج اﻷوﱄ ﻟﻠﻤﻨﺘﺞ وﻛﺬﻟﻚ ﰲ ﻓﺤﺼﻪ‪ ،‬وﻟﻜﻦ ﰲ ﻧﻔﺲ اﻟﻮﻗﺖ ﻓﺈن إﻣﻜﺎﻧﻴﺔ ﺑﻨﺎء دارات ﻣﻌﻘﺪة داﺧﻞ‬
‫ﺷﺮﳛﺔ اﻟـ‪ FPGA‬ﺘﱪ ﻣﻦ اﻟﻘﻴﻮد اﻷﺳﺎﺳﻴﺔ ﻋﻠﻰ ﻣﺴﺘﻮى اﻟﻜﻠﻔﺔ واﳊﺠﻢ‪ ،‬وذﻟﻚ ﺑﺴﺒﺐ اﻟﺘﻌﻘﻴﺪ ﻋﻠﻰ ﻣﺴﺘﻮى ﺗﻮﺻﻴﻞ اﺠﻤﻟﻤﻮﻋﺎت اﳌﻨﻄﻘﻴﺔ‬
‫إﺿﺎﻓﺔً إﱃ اﳌﺴﺎﺣﺔ اﻟﻜﺒﲑة اﶈﺠﻮزة ﻣﻦ أﺟﻞ اﻟﻮﺣﺪات اﻟﱪﳎﻴﺔ ﻣﺜﻞ‪ .SRAMs, MUXes :‬ﻣﻦ ﻧﺎﺣﻴﺔ أﺧﺮى ﻓﺈن ﺷﺮاﺋﺢ اﻟـ‪ ASIC‬ذات‬
‫ﺗﻜﻠﻔﺔ ﻋﺎﻟﻴﺔ‪ ،‬وﲢﺘﺎج إﱃ زﻣﻦ ﻛﺒﲑ ﻋﻠﻰ ﻣﺴﺘﻮى اﻟﺘﺼﻤﻴﻢ واﻟﺘﺼﻨﻴﻊ‪ ،‬وﻛﻞ ﺗﺼﻤﻴﻢ ﳛﺘﺎج ﺑﺸﻜﻞ ﺧﺎص إﱃ إﻋﺎدة ﻣﺮاﺣﻞ ﻋﻤﻠﻴﺎت اﻟﺘﺼﻤﻴﻢ‬
‫واﻟﺘﺼﻨﻴﻊ ﻛﺎﻣﻠﺔ]‪.[127-128‬‬

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‫‪21‬‬ ‫‪Chapter 1‬‬ ‫اﻟﻔﺼﻞ اﻷول |‬

‫ﲢﺖ ﻣﺎرﻛﺔ‬ ‫ﻋﻤﻮﻣﺎً ﻓﺈن ﻫﺬﻩ اﻟﺘﻘﻨﻴﺔ ﰎ ﻃﺮﺣﻬﺎ ﻣﻦ ﻗﺒﻞ ﺷﺮﻛﺎت اﻟﺘﺼﻨﻴﻊ اﻟﺮﺋﻴﺴﻴﺔ ﻟﻠـ‪ - FPGA‬ﻣﻦ ﻗﺒﻞ ﺷﺮﻛﺔ ‪Xilinx‬‬
‫]‪[130‬‬

‫‪ ،[131]EasyPath‬وأﻳﻀﺎً ﻣﻦ ﻗﺒﻞ ﺷﺮﻛﺔ ‪ [132]Altera‬ﲢﺖ ﻣﺎرﻛﺔ ‪ ،[133]HardCopy‬وﻛﺬﻟﻚ ﻣﺆﺧﺮاً ﻣﻦ ﻗﺒﻞ ﺷﺮﻛﺔ ‪ [134]eASIC‬ﲢﺖ‬
‫‪ -‬واﻟﱵ ﺗﻘﻮم ﻋﻠﻰ إﻧﺘﺎج ﺷﺮاﺋﺢ ﻣﱪﳎﺔ وﻣﻬﻴﺄة ﻣﺴﺒﻘﺎً ﺣﺴﺐ اﻟﻄﻠﺐ ﺑﺎﻟﺘﺎﱄ ﻳﻜﻮن اﻟﺴﻌﺮ أﻗﻞ ﺑﻌﺪة ﻣﺮات ﻣﻦ‬ ‫]‪[135‬‬
‫ﻣﺎرﻛﺔ ‪Nextreme‬‬

‫ﺷﺮاﺋﺢ اﻟـ‪ FPGA‬اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ‪ .‬ﺗﺴﺘﺨﺪم ﻫﺬﻩ اﻟﺸﺮاﺋﺢ ﰲ اﻟﺘﻄﺒﻴﻘﺎت اﻟﱵ ﺗﺘﻄﻠﺐ ﻛﻠﻔﺔ ﺗﻄﻮﻳﺮ ﻣﻨﺨﻔﻀﺔ وإﻧﺘﺎج ﻣﺘﻮﺳﻂ اﻟﻜﻤﻴﺔ‪.‬‬
‫اﻟﺸﻜﻞ‪ 90-1‬ﻳﺒﲔ ﳐﻄﻂ اﻟﺸﺮﳛﺔ اﻟﺴﻴﻠﻴﻜﻮﻧﻴﺔ ﻟﻠﺪارة ‪ Faraday NC-1‬اﻟﱵ ﺗﻌﺘﱪ ﻣﻦ أﺑﺮز ﺗﻄﺒﻴﻘﺎت اﻟـ‪.[129]Structured ASIC‬‬

‫‪Structured ASIC Faraday NC-1‬‬ ‫اﻟﺸﻜﻞ‪90-1‬‬

‫‪ 3-5-15-1‬ﻣﺮاﺣﻞ ﺗﺼﻤﻴﻢ ﺷﺮاﺋﺢ اﻟﺪارات اﳌﺘﻜﺎﻣﻠﺔ ﻣﺘﺨﺼﺼﺔ اﻟﺘﻄﺒﻴﻘﺎت )‪:(ASIC Design Process‬‬

‫ﻳﺘﻢ ﺗﺼﻤﻴﻢ ﺷﺮاﺋﺢ اﻟـ‪ ASICs‬ﻋﻠﻰ ﺗﺴﻌﺔ ﻣﺮاﺣﻞ ﻣﺘﺘﺎﺑﻌﺔ‪ .‬ﻳﺘﻢ ﰲ اﳌﺮاﺣﻞ اﻷرﺑﻌﺔ اﻷوﱃ اﻟﺘﺼﻤﻴﻢ اﳌﻨﻄﻘﻲ )‪ ،(Logical Design‬ﻛﻤﺎ ﻳﺘﻢ‬
‫ﰲ اﳌﺮاﺣﻞ اﳋﻤﺲ اﻟﻼﺣﻘﺔ اﻟﺘﺼﻤﻴﻢ اﻟﻔﻴﺰﻳﺎﺋﻲ )‪ .(Physical Design‬اﳌﺮاﺣﻞ ﻋﻠﻰ اﻟﱰﺗﻴﺐ ﻫﻲ‪:‬‬

‫‪ :Design entry -1‬اﻟﺘﺼﻤﻴﻢ ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت وﺻﻒ اﻟﻜﻴﺎن اﻟﺼﻠﺐ)‪ (HDL‬أو ‪.Schematic‬‬
‫‪ :Logic synthesis -2‬ﺗﻮﻟﻴﺪ ﻣﻠﻒ "‪ "netlist‬اﻟﺬي ﻳﺼﻒ ﻃﺮﻳﻘﺔ وﺻﻞ اﳋﻼﻳﺎ اﳌﻨﻄﻘﻴﺔ‪.‬‬
‫‪ :System partitioning -3‬ﺗﻘﺴﻴﻢ اﻟﺘﺼﻤﻴﻢ إﱃ ﳎﻤﻮﻋﺎت )‪.(Blocks‬‬
‫‪ :Pre-layout simulation -4‬اﻟﻔﺤﺺ اﻟﻮﻇﻴﻔﻲ ﻟﻠﺘﺼﻤﻴﻢ‪.‬‬
‫‪ :Floorplanning -5‬ﻈﻴﻢ اﺠﻤﻟﻤﻮﻋﺎت )‪ (Blocks‬ﰲ اﳌﻠﻒ "‪ "netlist‬ﻋﻠﻰ اﻟﺸﺮﳛﺔ اﻟﺴﻴﻠﻴﻜﻮﻧﻴﺔ‪.‬‬
‫‪ :Placement -6‬ﲢﺪﻳﺪ ﺗﻮزع‪/‬ﺗﻮﺿﻊ اﳋﻼﻳﺎ اﳌﻨﻄﻘﻴﺔ )‪Logic Cells‬ﰲ اﺠﻤﻟﻤﻮﻋﺎت )‪.(Blocks‬‬
‫‪ :Routing -7‬رﺑﻂ اﻟﻮﺻﻼت ﺑﲔ اﳋﻼﻳﺎ اﳌﻨﻄﻘﻴﺔ )‪Logic Cells‬واﺠﻤﻟﻤﻮﻋﺎت )‪.(Blocks‬‬
‫‪ :Extraction -8‬ﲢﺪﻳﺪ ﻣﻘﺎوﻣﺔ وﺳﻌﺔ )‪ (RC‬اﻟﻮﺻﻼت‪.‬‬
‫‪ :Postlayout simulation -9‬اﻟﻔﺤﺺ اﻟﻮﻇﻴﻔﻲ ﻟﻠﺘﺼﻤﻴﻢ ﻟﻠﺘﺄﻛﺪ ﻣﻦ ﺗﺄﺛﲑ اﳊﻤﻞ ‪ RC‬ﻟﻠﻮﺻﻼت‪.‬‬

‫ﺑﻌﺪ اﻻﻧﺘﻬﺎء ﻣﻦ ﻫﺬﻩ اﳌﺮاﺣﻞ ﻳﺘﻢ إرﺳﺎل ﻣﻠﻔﺎت اﻟﺘﺼﻤﻴﻢ إﱃ ﺷﺮﻛﺎت أﻧﺼﺎف اﻟﻨﻮاﻗﻞ ﻟﻴﺘﻢ ﺗﺼﻨﻴﻊ اﻟﻄﺒﻘﺎت وﺗﻄﺒﻴﻘﻬﺎ ﻋﻠﻰ اﻟﺸﺮاﺋﺢ‬
‫اﻟﺴﻴﻠﻴﻜﻮﻧﻴﺔ‪ .‬اﻟﺸﻜﻞ‪ 91-1‬ﻳﺒﲔ ﳐﻄﻂ ﻣﺮاﺣﻞ ﺗﺼﻤﻴﻢ ﺷﺮاﺋﺢ اﻟﺪارات اﳌﺘﻜﺎﻣﻠﺔ ﻣﺘﺨﺼﺼﺔ اﻟﺘﻄﺒﻴﻘﺎت‪ .‬اﻟﺸﻜﻞ‪ 92-1‬ﻳﺒﲔ اﻟﺸﻜﻞ اﻟﻨﻬﺎﺋﻲ‬
‫ﻟﻠﺸﺮﳛﺔ اﻟﺴﻴﻠﻴﻜﻮﻧﻴﺔ وﺗﻮﺻﻴﻠﻬﺎ ﻣﻊ اﻟﻐﻼف اﻟﻔﻴﺰﻳﺎﺋﻲ اﳋﺎرﺟﻲ‪.‬‬

‫‪59‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Embedded Systems‬‬ ‫اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ |‬

‫اﻟﺸﻜﻞ‪ 91-1‬ﻣﺮاﺣﻞ ﺗﺼﻤﻴﻢ ﺷﺮاﺋﺢ اﻟـ‪ASICs‬‬

‫اﻟﺸﻜﻞ‪ 92-1‬اﻟﺸﻜﻞ اﻟﻨﻬﺎﺋﻲ ﻟﻠﺸﺮﳛﺔ اﻟﺴﻴﻠﻴﻜﻮﻧﻴﺔ وﺗﻮﺻﻴﻠﻬﺎ ﻣﻊ اﻟﻐﻼف اﳋﺎرﺟﻲ‬

‫‪ 6-15-1‬اﻟﺪارات اﳌﺘﻜﺎﻣﻠﺔ اﳍﺠﻴﻨﺔ ﻣﺘﺨﺼﺼﺔ اﻟﺘﻄﺒﻴﻘﺎت )‪:(Mixed-signals ASIC‬‬

‫ﻠﻒ ﻫﺬا اﻟﻨﻮع ﻣﻦ اﻟﺪارات اﳌﺘﻜﺎﻣﻠﺔ ﻣﺘﺨﺼﺼﺔ اﻟﺘﻄﺒﻴﻘﺎت ﺑﺎﺣﺘﻮاﺋﻪ ﻋﻠﻰ وﺣﺪات ﺗﺸﺎﻬﺑﻴﺔ ﳌﻌﺎﳉﺔ اﻹﺷﺎرات اﻟﺘﺸﺎﻬﺑﻴﺔ وﳝﻜﻦ أن ﺗﺘﻀﻤﻦ‪:‬‬
‫ﳏﻮﻻت إﺷﺎرة )‪ ،ADC, DAC‬ﻣﻘﺎرﻧﺎت ﺗﺸﺎﻬﺑﻴﺔ‪ ،‬ﻣﻀﺎﻋﻔﺎت ﺗﺮددﻳﺔ‪ ،‬ﻣﻮﻟﺪات إﺷﺎرة‪ ،‬ﻣﺎزﺟﺎت‪ ،‬وﻏﲑﻫﺎ]‪ .[136-137‬اﳍﺪف ﻣﻦ دﻣﺞ‬
‫ﺣﺪات ﺗﺸﺎﻬﺑﻴﺔ ﻫﻮ اﳊﺼﻮل ﻋﻠﻰ ﻧﻈﺎم ﻣﺘﻜﺎﻣﻞ ﻋﻠﻰ ﺷﺮﳛﺔ واﺣﺪة‪ ،‬وﺑﺎﻟﺘﺎﱄ اﻟﻮﺻﻮل إﱃ ﻣﺴﺘﻮى ﺗﻜﺎﻣﻞ ٍ‬
‫ﻋﺎل‪ ،‬ﻛﻤﺎ أن ﻫﺬا اﻻﻧﺪﻣﺎج‬
‫ﻳﻌﻄﻲ ﻣﻮﺛﻮﻗﻴﺔ أﻛﱪ ﻟﻠﻨﻈﺎم وﻳﻘﻠﻞ اﻟﻀﺠﻴﺞ اﻟﺬي ﳝﻜﻦ أن ﻳﻨﺸﺄ ﻋﻦ رﺑﻂ ﳎﻤﻮﻋﺔ دارات ﻣﺘﻜﺎﻣﻠﺔ ﻋﻠﻰ دارة ﻣﻄﺒﻮﻋﺔ )‪.(PCB‬‬

‫ﺗﺴﺘﺨﺪم ﻫﺬﻩ اﻟﺸﺮاﺋﺢ اﳌﺘﻜﺎﻣﻠﺔ ﰲ ﺗﻄﺒﻴﻘﺎت‪ :‬اﻻﺗﺼﺎﻻت اﻟﻼﺳﻠﻜﻴﺔ‪ ،‬ﻣﻌﺎﳉﺔ اﻹﺷﺎرة‪ ،‬أﺟﻬﺰة اﳍﻮاﺗﻒ اﻟﻨﻘﺎﻟﺔ‪ ،‬أﺟﻬﺰة اﻟﺘﻠﻔﺎز‪ ،‬أﺟﻬﺰة‬
‫اﳌﻼﺣﺔ‪ ،‬اﳊﺴﺎﺳﺎت اﻟﺬﻛﻴﺔ‪ ،‬أﺟﻬﺰة اﳌﺮاﻗﺒﺔ اﻟﻄﺒﻴﺔ‪.‬‬

‫اﻟﺸﻜﻞ‪ 93-1‬ﻳﺒﲔ اﳌﺨﻄﻂ اﻟﺪاﺧﻠﻲ ﻟﻠﺸﺮﳛﺔ اﻟﺴﻴﻠﻴﻜﻮﻧﻴﺔ ﻟـ‪ Custom Mixed Signal ASIC‬ﻣﺴﺘﺨﺪﻣﺔ ﰲ اﻟﺴﻴﺎرات اﻟﻜﻬﺮﺑﺎﺋﻴﺔ‬
‫وﻣﺼﻨﻌﺔ ﻣﻦ ﻗﺒﻞ ﺷﺮﻛﺔ ]‪ CSS[138‬وﻫﻲ ﲢﻮي ﻠﻰ وﺣﺪات ﺗﺸﺎﻬﺑﻴﺔ ورﻗﻤﻴﺔ وﻗﻄﺎﻋﺎت ﲣﺰﻳﻦ ووﺣﺪة ﻣﻌﺎﳉﺔ ﻣﺮﻛﺰﻳﺔ‪ .‬اﻟﺸﻜﻞ‪ 94-1‬ﻳﺒﲔ‬
‫إﺣﺪى اﻟﺸﺮاﺋﺢ اﳍﺠﻴﻨﺔ اﳌﺴﺘﺨﺪﻣﺔ ﰲ ﺗﻄﺒﻴﻘﺎت أﺟﻬﺰة ﲢﺮﻳﺾ اﻟﻘﻠﺐ اﻟﻄﺒﻴﺔ]‪ [139‬وﺗﺘﻤﻴﺰ ﺑﺄ�ﺎ ﻣﺘﻨﺎﻫﻴﺔ اﻟﺼﻐﺮ‪.‬‬

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‫اﻟﺸﻜﻞ‪Custom Mixed-signals ASIC Die 93-1‬‬

‫اﻟﺸﻜﻞ‪Full-custom Mixed-signals ASIC 94-1‬‬

‫‪ 7-15-1‬اﳌﻨﺘﺠﺎت اﻟﻘﻴﺎﺳﻴﺔ ﻣﺘﺨﺼﺼﺔ اﻟﺘﻄﺒﻴﻘﺎت ‪:(Application-specific standard products) ASSPs‬‬

‫ﻳﻄﻠﻖ ﻫﺬا اﻻﺳﻢ اﺻﻄﻼﺣﺎً‪ ،‬وﻫﻮ ﻋﺒﺎرة ﻋﻦ دارات ﻣﺘﻜﺎﻣﻠﺔ ﻗﻴﺎﺳﻴﺔ ﻣﺼﻤﻤﺔ ﺑﺸﻜﻞ أﻣﺜﻠﻲ ﻷداء ﻣﻬﺎم ﳏﺪدة ﻋﻠﻰ ﻣﺴﺘﻮى ٍ‬
‫ﻋﺎل ﻣﻦ اﻷداء‬
‫– ﻧﻈﺮاً ﻟﻜﻮن اﻟﻮﻇﻴﻔﺔ اﳌﻄﻠﻮﺑﺔ ﰎ ﺑﻨﺎﺋﻬﺎ ﺑﺸﻜﻞ أﻣﺜﻠﻲ ﻛﻜﻴﺎن ﺻﻠﺐ‪ .‬ﻫﺬﻩ اﻟﺘﻘﻨﻴﺔ ﻳﺘﻢ ﺗﺼﻤﻴﻤﻬﺎ وﺑﻴﻌﻬﺎ ﻣﻦ ﻗﺒﻞ اﻟﻌﺪﻳﺪ ﻣﻦ اﻟﺸﺮﻛﺎت‬
‫اﳌﺼﻨﻌﺔ إﱃ ﺷﺮﻛﺎت أﺧﺮى ﺗﻘﻮم ﻋﻠﻰ دﳎﻬﺎ ﰲ ﻨﺘﺠﺎﻬﺗﺎ‪ ،‬وذﻟﻚ ﲞﻼف اﻟـ‪ ASICs‬اﻟﱵ ﺗﻀﻢ ﳎﻤﻮﻋﺔ ﻣﻦ اﶈﻴﻄﻴﺎت اﻟﻮﻇﻴﻔﻴﺔ اﳌﺼﻤﻤﺔ‬
‫ﺧﺼﻴﺼﺎً ﺣﺴﺐ اﻟﻄﻠﺐ ﳌﺴﺘﺨﺪم وﺣﻴﺪ‪ ،‬ﻛﻤﺎ أن ﻫﺬﻩ اﻟﺸﺮاﺋﺢ ﺗﻜﻮن وﻇﻴﻔﻴﺎً ﺟﺎﻫﺰة ﻟﻼﺳﺘﺨﺪام اﳌﺒﺎﺷﺮ دون اﳊﺎﺟﺔ ﻟﱪﳎﺘﻬﺎ )‪off-the-‬‬

‫‪ .(shelf‬ﻣﺜﺎل ﻋﻦ ﻫﺬﻩ اﻟﺸﺮاﺋﺢ‪ :‬اﳌﺴﺮﻋﺎت اﻟﺮﺳﻮﻣﻴﺔ )‪ :(graphics accelerators‬ﻳﺘﻢ دﳎﻬﺎ ﰲ ﻟﻮﺣﺎت ﻣﻌﺎﳉﺔ اﻟﺮﺳﻮﻣﻴﺎت‪ ،‬ﻣﻜﻮدات‬
‫اﻟﻮﺳﺎﺋﻂ اﻟﺮﻗﻤﻴﺔ )‪ :(multimedia Encoding/Decoding chips‬ﻳﺘﻢ دﳎﻬﺎ ﰲ ﻟﻮﺣﺎت اﻟﺼﻮت واﻟﻔﻴﺪﻳﻮ‪ ،‬وﻏﲑﻫﺎ ﻣﻦ اﻟﻌﺪﻳﺪ ﻣﻦ‬
‫اﻟﺸﺮاﺋﺢ اﻷﺧﺮى )‪ .(... ،WLAN ،Ethernet ،smart card chips ،data compression chips‬اﻟﺘﻄﺒﻴﻘﺎت اﻟﺮﺋﻴﺴﻴﺔ ﳍﺬﻩ‬
‫اﻟﺸﺮاﺋﺢ ﻫﻲ اﻟﺘﻄﺒﻴﻘﺎت اﻟﺼﻨﺎﻋﻴﺔ وﺧﺼﻮﺻﺎً ﰲ ﳎﺎل اﻟﺴﻴﺎرات واﻻﺗﺼﺎﻻت]‪.[140‬‬

‫إن ﻋﻤﻠﻴﺔ ﺗﻄﻮﻳﺮ )ﺗﺼﻤﻴﻢ اﻟﻨﻤﻮذج اﻷوﱄ( ﳍﺬﻩ اﻟﺸﺮاﺋﺢ ﺗﺘﻢ ﻋﻤﻮﻣﺎً ﺑﺎﺳﺘﺨﺪام ﺷﺮاﺋﺢ اﳌﺼﻔﻮﻓﺎت اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً )‪.(FPGAs‬‬
‫اﻟﺸﻜﻞ‪ 95-1‬ﻳﺒﲔ اﳌﺨﻄﻂ اﻟﺼﻨﺪوﻗﻲ ﻟﻠﺸﺮﳛﺔ ‪ Fujitsu ASSP MB86H52‬واﻟﱵ ﺗﺴﺘﺨﺪم ﻛـ ‪MPEG-2 HL to H.264‬‬
‫]‪[141‬‬

‫‪.HD Transcoder‬‬

‫اﻟﺸﻜﻞ‪ 95-1‬اﻟﺸﺮﳛﺔ ‪Fujitsu ASSP MB86H52‬‬

‫‪61‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Embedded Systems‬‬ ‫اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ |‬

‫‪ 8-15-1‬اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ ﻋﻠﻰ ﺷﺮاﺋﺢ "‪:(System-on-Chip) "SoCs‬‬

‫إن اﳊﺎﺟﺔ إﱃ وﺳﺎﺋﻞ وأدوات ﺗﻜﻨﻮﻟﻮﺟﻴﺔ ذات ﺣﺠﻢ أﺻﻐﺮ وﻛﻠﻔﺔ أﺧﻔﺾ واﺳﺘﻬﻼك أﻗﻞ ﻟﻠﻄﺎﻗﺔ ﲝﻴﺚ ﺗﺴﺘﺨﺪم ﰲ ﺣﻴﺎﺗﻨﺎ وﺿﻤﻦ ﺗﻨﻘﻼﺗﻨﺎ‬
‫اﻟﻴﻮﻣﻴﺔ‪ ،‬ﻣﺜﻞ أﺟﻬﺰة اﳍﻮاﺗﻒ اﻟﻨﻘﺎﻟﺔ واﻷﺟﻬﺰة اﻟﺬﻛﻴﺔ؛ ﻧﺘﺞ ﻋﻨﻬﺎ دﻓﻊ ﻣﺘﺴﺎرع ﰲ ﻣﻨﺤﲏ اﻟﺘﻄﻮر اﻟﺘﻜﻨﻮﻟﻮﺟﻲ ﻋﻠﻰ ﻣﺴﺘﻮى اﻟﺪارات اﳌﺘﻜﺎﻣﻠﺔ‬
‫واﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ واﻟﺬي ﻛﺎن أﺣﺪ ﻋﻼﻣﺎﺗﻪ اﻟﻮاﺿﺤﺔ ﻇﻬﻮر ﻣﺎ ﻳﻌﺮف ﺑﺎﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ ﻋﻠﻰ ﺷﺮاﺋﺢ "‪ .[142]"SoCs‬ﰲ ﻫﺬا اﻟﻨﻮع ﻣﻦ اﻟﺸﺮاﺋﺢ‬
‫ﻳﺘﻢ ﺗﻀﻤﲔ وﺣﺪة اﳌﺘﺤﻜﻢ اﳌﺼﻐﺮ أو اﳌﻌﺎﰿ اﳌﺼﻐﺮ إﺿﺎﻓﺔً إﱃ ﲨﻴﻊ اﻟﻮﺣﺪات اﶈﻴﻄﻴﺔ أو اﻟﺪارات اﻟﺘﻜﺎﻣﻠﻴﺔ اﻟﱵ ﳝﻜﻦ أن ﺗﻜﻮن وﺣﺪات‬
‫ﻗﻤﻴﺔ أو وﺣﺪات ﺗﺸﺎﻬﺑﻴﺔ أو وﺣﺪات ﻫﺠﻴﻨﺔ أو ﺣﱴ وﺣﺪات ﻣﻌﺎﳉﺔ إﺷﺎرة ﻋﻠﻰ ﺷﺮﳛﺔ ﻣﺪﳎﺔ وﺣﻴﺪة‪ .‬إن اﳌﻴﺰة اﻷﺳﺎﺳﻴﺔ ﻣﻦ اﻟـ‪ SoC‬ﻫﻮ‬
‫اﻟﻜﻠﻔﺔ اﳌﻨﺨﻔﻀﺔ وﺻﻐﺮ ﺣﺠﻢ اﻟﻨﻈﺎم]‪ [143‬إﺿﺎﻓﺔ إﱃ اﻻﺳﺘﻬﻼك اﳌﻨﺨﻔﺾ ﻟﻠﻄﺎﻗﺔ]‪ .[144‬إن اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ ﻋﻠﻰ ﺷﺮاﺋﺢ رﲟﺎ ﺗﺘﻀﻤﻦ اﻟﻌﺪﻳﺪ‬
‫ﻣﻦ ﻋﻨﺎﺻﺮ اﻷﻧﻈﻤﺔ اﻟﺮﻗﻤﻴﺔ اﳌﻌﻘﺪة ﻣﺜﻞ‪ :‬وﺣﺪة اﺳﺘﻘﺒﺎل ﻻﺳﻠﻜﻴﺔ‪ ،‬ﻛﻤﺎ أ�ﺎ ﳝﻜﻦ أن ﺗﺘﻀﻤﻦ وﺣﺪة ﻣﻨﻄﻘﻴﺔ ﻗﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ‬
‫)‪ .(Configurable Logic Unit‬ﻳﺘﻢ ﺗﺼﻤﻴﻢ اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ ﻋﻠﻰ ﺷﺮاﺋﺢ ﻣﻦ ﺧﻼل ﺿﻢ اﻟﻌﺪﻳﺪ ﺗﺼﺎﻣﻴﻢ أو ﻧﻮى )‪ (Cores‬دارات‬
‫ﺗﻜﺎﻣﻠﻴﺔ ذات ﻧﻄﺎق واﺳﻊ )‪ (VLSI‬وﺗﻀﻤﻴﻨﻬﺎ ﻋﻠﻰ ﺷﺮﳛﺔ واﺣﺪة ﲝﻴﺚ ﲢﻘﻖ ﻧﻈﺎم ﻣﺘﻜﺎﻣﻞ اﳌﻴﺰات ﻟﺘﻄﺒﻴﻖ ﻣﻌﲔ]‪ .[145‬إن اﻻﺳﺘﺨﺪام‬
‫اﻷﴰﻞ ﻟﻸﻧﻈﻤﺔ اﳌﺪﳎﺔ ﻋﻠﻰ ﺷﺮاﺋﺢ ﻫﻮ ﰲ ﺗﻮﻓﲑ ﻣﻌﺎﳉﺎت ﻣﺪﳎﺔ ﺗﺘﻀﻤﻦ ﺣﻠﻮل ﻣﺘﻜﺎﻣﻠﺔ ﻣﻦ اﻟﻮﺣﺪات اﶈﻴﻄﻴﺔ اﳌﺮﺗﺒﻄﺔ ﻣﻊ اﳌﻌﺎﰿ‪ ،‬ﻟﺬا ﻓﺈن‬
‫ﻫﺬﻩ اﻟﺸﺮاﺋﺢ ﺗﺘﻤﻴﺰ ﺑﺎﻷداء اﳌﺮﺗﻔﻊ ﺟﺪاً واﺳﺘﻬﻼك ﻃﺎﻗﺔ أﺻﻐﺮي]‪.[146‬‬

‫‪ 1-8-15-1‬ﺣﻠﻮل ﺗﺼﻤﻴﻢ اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ ﻋﻠﻰ ﺷﺮاﺋﺢ )‪:(SOCs Design Solutions‬‬

‫ﻳﺘﻢ ﺗﺼﻤﻴﻢ اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ ﻋﻠﻰ ﺷﺮاﺋﺢ "‪ "SoCs‬اﻧﻄﻼﻗﺎً ﻣﻦ ﻋﺪة ﺣﻠﻮل ﺗﺘﻠﺨﺺ ﰲ اﻟﺪارات اﳌﺨﺼﺼﺔ اﻟﺘﻄﺒﻴﻘﺎت "‪"ASICs‬‬
‫واﳌﺼﻔﻮﻓﺎت اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً "‪ ،[147]"FPGAs‬ﺣﻴﺚ أﻧﻪ ﰲ اﻟﺴﻨﻮات اﻷﺧﲑة ﺗﻄﻮرت اﳌﺼﻔﻮﻓﺎت اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً "‪،"FPGAs‬‬
‫وﺗﻄﻮرت أدوات ﺗﺼﻤﻴﻤﻬﺎ وأﺻﺒﺤﺖ ﺗﻘﺎرب اﻟﺪارات اﳌﺘﻜﺎﻣﻠﺔ ﻣﺘﺨﺼﺼﺔ اﻟﺘﻄﺒﻴﻘﺎت "‪ ASICs‬ﰲ ﻣﻴﺰاﻬﺗﺎ وﺗﺘﻐﻠﺐ ﻋﻠﻴﻬﺎ ﰲ ﻣﺴﺎﺋﻞ اﻟﻜﻠﻔﺔ‬
‫وﺳﺮﻋﺔ اﻟﺘﺼﻤﻴﻢ وﺳﻬﻮﻟﺘﻪ‪ ،‬ﻟﺬﻟﻚ ﻓﺈن ﺷﺮﻛﺎت ﺗﺼﻤﻴﻢ اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ ﻋﻠﻰ ﺷﺮاﺋﺢ "‪ "SoCs‬ﺗﻔﻀﻞ اﺳﺘﺨﺪام ﺷﺮاﺋﺢ اﻟـ‪ FPGAs‬ﻛﺄﺳﺎس‬
‫ﰲ ﺗﺼﻤﻴﻢ أﻧﻈﻤﺔ ﺷﺮاﺋﺢ اﻟـ‪ SoCs‬ﻟﻺﻧﺘﺎج ﻋﻠﻰ ﻧﻄﺎق ﻣﺘﻮﺳﻂ]‪ .[148‬اﻟﺸﻜﻞ‪ 96-1‬ﻳﺒﲔ اﳊﻠﻮل اﳌﺴﺘﺨﺪﻣﺔ ﰲ ﺗﺼﻤﻴﻢ اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ ﻋﻠﻰ‬
‫ﺷﺮاﺋﺢ "‪."SoCs‬‬

‫‪Structured‬‬
‫‪ASIC‬‬
‫‪Standard‬‬ ‫‪IP Cores‬‬
‫‪Cell-based‬‬ ‫‪HW/SW‬‬
‫‪Design‬‬ ‫‪Macros‬‬

‫‪FPGA based‬‬ ‫‪SoC‬‬ ‫‪Full Custom‬‬

‫‪Design‬‬ ‫‪Design‬‬
‫‪Platforms‬‬

‫اﻟﺸﻜﻞ‪ 96-1‬اﳊﻠﻮل اﳌﺴﺘﺨﺪﻣﺔ ﰲ ﺗﺼﻤﻴﻢ اﻟـ‪SoCs‬‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪62‬‬
‫‪21‬‬ ‫‪Chapter 1‬‬ ‫اﻟﻔﺼﻞ اﻷول |‬

‫‪ 2-8-15-1‬اﻟﻌﻨﺎﺻﺮ اﻷﺳﺎﺳﻴﺔ اﻟﱵ ﻣﻨﻬﺎ ﺗﺘﻜﻮن ﺷﺮاﺋﺢ اﻟـ‪:(SoCs Components) SoCs‬‬

‫‪ -‬ﻣﺘﺤﻜﻢ ﻣﺼﻐﺮ )‪ (MCU‬أو ﻣﻌﺎﰿ ﻣﺼﻐﺮ )‪ (MPU‬أو ﻣﻌﺎﰿ إﺷﺎرة رﻗﻤﻴﺔ )‪.(DSP‬‬
‫‪ -‬ﺑﻌﺾ اﻟﺸﺮاﺋﺢ ﲢﻮي ﻋﻠﻰ أﻛﺜﺮ ﻣﻦ ﻣﻌﺎﰿ وﺗﺴﻤﻰ ﺑـ‪.(multiprocessor SoC) MPSoC‬‬
‫‪ -‬وﺣﺪات ذاﻛﺮﻳﺔ )‪.(ROM, RAM, EEPROM and Flash‬‬
‫‪ -‬وﺣﺪة ﺗﻮﻗﻴﺖ ﻣﺮﻛﺰﻳﺔ ﺗﺘﻀﻤﻦ ﻫﺰاز ﻛﺮﻳﺴﺘﺎﱄ وﺣﻠﻘﺔ ﻗﻔﻞ ﻃﻮري‪.‬‬
‫‪ -‬وﺣﺪات ﳏﻴﻄﻴﺔ داﺧﻠﻴﺔ )…‪.(Timers, Counters, PWM, RTC, WDT, etc‬‬
‫‪ -‬ﻣﻨﺎﻓﺬ اﺗﺼﺎل ﺗﺴﻠﺴﻠﻲ )‪.(USB, FireWire, Ethernet, USART, SPI‬‬
‫‪ -‬ﻣﺒﺪﻻت ‪ .ADC, DAC‬وﺣﺪة إدارة اﻟﻄﺎﻗﺔ وﺗﻨﻈﻴﻢ اﻟﺘﻐﺬﻳﺔ‪.‬‬
‫ﲨﻴﻊ ﻫﺬﻩ اﻟﻮﺣﺪات ﺗﻜﻮن ﻣﺘﺼﻠﺔ ﻣﻊ ﺑﻌﻀﻬﺎ ﻋﱪ ﻧﺎﻗﻞ ﻣﻌﻴﺎري ﻣﺜﻞ ‪ AMBA‬ﻛﻤﺎ أن ﻣﺘﺤﻜﻢ اﻟﻮﺻﻮل اﳌﺒﺎﺷﺮ ﻟﻠﺬاﻛﺮة ﻳﻘﻮم ﻋﻠﻰ ﺗﻨﻈﻴﻢ‬
‫ﻧﻘﻞ اﻟﺒﻴﺎﻧﺎت ﺑﲔ اﻟﺬاﻛﺮة واﶈﻴﻄﻴﺎت اﳌﺘﺼﻠﺔ ﻣﻊ اﻟﻌﺎﱂ اﳋﺎرﺟﻲ‪ .‬اﻟﺸﻜﻞ‪ 97-1‬ﻳﺒﲔ ﳐﻄﻂ اﻟﺒﻨﻴﺔ اﻟﺪاﺧﻠﻴﺔ ﻟﻨﻈﺎم ﻣﺪﻣﺞ ﻋﻠﻰ ﺷﺮﳛﺔ‬
‫ﻳﺴﺘﺨﺪم ﻣﺘﺤﻜﻢ ‪.ARM 32-bit‬‬

‫‪ 3-8-15-1‬ﻣﺮاﺣﻞ ﺗﺼﻤﻴﻢ اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ ﻋﻠﻰ ﺷﺮاﺋﺢ )‪:(SoCs Design Stages‬‬

‫ﺗﻀﻢ اﻟﺒﻨﻴﺔ اﻟﻌﺎﻣﺔ ﻟﻸﻧﻈﻤﺔ اﳌﺪﳎﺔ ﻋﻠﻰ ﺷﺮاﺋﺢ "‪ "SoC‬ﻋﻨﺎﺻﺮ اﻟﻜﻴﺎن اﻟﺼﻠﺐ اﳌﺬﻛﻮرة ﰲ اﻟﻔﻘﺮة اﻟﺴﺎﺑﻘﺔ إﺿﺎﻓﺔً إﱃ اﻟﻜﻴﺎن اﻟﱪﳎﻲ ﻟﻠﻤﻌﺎﰿ‬
‫أو اﳌﺘﺤﻜﻢ اﻟﺮﺋﻴﺴﻲ ﻟﻠﺸﺮﳛﺔ؛ إن ﻋﻤﻠﻴﺔ ﺗﺼﻤﻴﻢ أو ﺗﻄﻮﻳﺮ ﻫﺬا اﻟﻨﻮع ﻣﻦ اﻟﺸﺮاﺋﺢ ﻳﺘﻢ ﺑﺎﺳﺘﺨﺪام وﺣﺪات ﻛﻴﺎن ﺻﻠﺐ ﺟﺎﻫﺰة ﺗﺴﻤﻰ‬
‫ﺑـ"‪ "Hardware Blocks‬ﻟﺘﺸﻜﻴﻞ اﻟﻜﻴﺎن اﻟﺼﻠﺐ )اﶈﻴﻄﻴﺎت اﻟﻮﻇﻴﻔﻴﺔ( ﻟﻠﺸﺮﳛﺔ‪ ،‬وذﻟﻚ ﺑﺎﺳﺘﺨﺪام أدوات ‪ .CAD‬اﻟﻜﻮد اﻟﱪﳎﻲ ﻟﺮﺑﻂ‬
‫ﺑﺮاﻣﺞ اﶈﻴﻄﻴﺎت اﳉﺎﻫﺰة وﲢﺪﻳﺪ ﻋﻤﻠﻬﺎ ﻳﺘﻢ ﻛﺘﺎﺑﺘﻪ ﺑﺎﺳﺘﺨﺪام أدوات ﺗﻄﻮﻳﺮ ‪ .IDE‬اﻟﺘﺼﻤﻴﻢ ﺑﺸﻘﻴﻪ )‪ (SW, HW‬ﻳﺘﻢ ﻋﻠﻰ اﻟﺘﻮازي وﺑﻌﺪﻫﺎ‬
‫ﻳﺘﻢ ﺑﺮﳎﺘﻪ ﻋﻠﻰ ﺷﺮﳛﺔ ‪ FPGA‬وﻳﺘﻢ ﲢﻤﻴﻞ اﻟﻜﻮد اﻟﱪﳎﻲ إﱃ ﳏﺎﻛﻲ )‪ Emulator‬وذﻟﻚ ﻬﺑﺪف اﻟﺘﺄﻛﺪ ﻣﻦ ﺳﻠﻮك اﻟﻨﻈﺎم وﻓﺤﺼﻪ‪ .‬ﺑﻌﺪ‬
‫اﻟﺘﺄﻛﺪ ﻣﻦ أداء ﻋﻤﻞ اﻟﻨﻈﺎم‪ ،‬ﻳﺘﻢ ﲢﺪﻳﺪ اﳊﻞ اﻷﻣﺜﻞ ﻟﻠﺸﻜﻞ اﻟﻨﻬﺎﺋﻲ ﻟﺸﺮﳛﺔ اﻟـ‪ .SoC‬اﻟﺸﻜﻞ‪ 98-1‬ﻳﺒﲔ اﳌﺨﻄﻂ اﻟﺘﺪﻓﻘﻲ ﳌﺮاﺣﻞ ﺗﺼﻤﻴﻢ‬
‫اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ ﻋﻠﻰ ﺷﺮاﺋﺢ "‪."SoC‬‬

‫‪MCU-based SoC‬‬ ‫اﻟﺸﻜﻞ‪ 97-1‬اﳌﺨﻄﻂ اﻟﺪاﺧﻠﻲ‬

‫‪63‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Embedded Systems‬‬ ‫اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ |‬

‫اﻟﺸﻜﻞ‪ 98-1‬اﳌﺨﻄﻂ اﻟﺘﺪﻓﻘﻲ ﻟﺘﺼﻤﻴﻢ اﻟـ‪SoC‬‬

‫‪ 4-8-15-1‬ﺗﻄﺒﻴﻘﺎت ﺷﺎﺋﻌﺔ ﻟﻸﻧﻈﻤﺔ اﳌﺪﳎﺔ ﻋﻠﻰ ﺷﺮاﺋﺢ )‪:(SoCs Common Application‬‬

‫اﻟﺪارات اﳌﺘﻜﺎﻣﻠﺔ اﻟﺘﺎﻟﻴﺔ ﺗﻌﺘﱪ إﺣﺪى اﻟﺘﻄﺒﻴﻘﺎت اﻟﺸﺎﺋﻌﺔ اﻻﺳﺘﺨﺪام ﻟﻸﻧﻈﻤﺔ اﳌﺪﳎﺔ ﻋﻠﻰ ﺷﺮاﺋﺢ‪.‬‬

‫‪ 1-4-8-15-1‬اﳌﻌﺎﰿ اﳌﺪﻣﺞ ‪:Intel® EP80579‬‬

‫وﻫﻮ ﻋﺒﺎرة ﻋﻦ ﻧﻈﺎم ﻣﺪﻣﺞ ﻋﻠﻰ ﺷﺮﳛﺔ ﻳﺘﻜﻮن ﻣﻦ ﻣﻌﺎﰿ ‪ NU80579EZ009C‬ﻳﻌﻤﻞ ﺑﱰدد ‪ 1.2GHz‬وﳎﻤﻮﻋﺔ ﻣﻦ اﶈﻴﻄﻴﺎت‬
‫اﳌﺨﺼﺼﺔ ﻟﺘﻄﺒﻴﻘﺎت اﻻﺗﺼﺎﻻت ووﺳﺎﺋﻂ اﻟﺘﺨﺰﻳﻦ اﻟﺮﻗﻤﻴﺔ‪ .‬اﻟﺸﻜﻞ‪ 99-1‬ﻳﺒﲔ ﳐﻄﻂ ﺑﻨﻴﺔ اﳌﻌﺎﰿ اﳌﺪﻣﺞ ‪.[149]EP80579‬‬

‫اﻟﺸﻜﻞ‪ 99-1‬ﺑﻨﻴﺔ اﳌﻌﺎﰿ اﳌﺪﻣﺞ ‪Intel® EP80579‬‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪64‬‬
‫‪21‬‬ ‫‪Chapter 1‬‬ ‫اﻟﻔﺼﻞ اﻷول |‬

‫‪ 2-4-8-15-1‬اﳌﻌﺎﰿ ﻣﺘﻌﺪد اﻟﻨﻮى ‪:AXIS ETRAX FS‬‬

‫وﻫﻮ ﻋﺒﺎرة ﻋﻦ ﻧﻈﺎم ﻣﺘﻌﺪد اﻟﻨﻮى ﻣﺪﻣﺞ ﻋﻠﻰ ﺷﺮﳛﺔ )‪ (MPSoC‬ﳝﻠﻚ ﻣﻌﺎﰿ ذو أداء ٍ‬
‫ﻋﺎل ﻳﻌﻤﻞ ﻋﻨﺪ ﺗﺮدد ‪ 200MHz‬إﺿﺎﻓﺔ إﱃ ﺛﻼث‬
‫ﻣﻌﺎﳉﺎت ‪ 32-bit‬ﺗﻌﻤﻞ ﺑﱰدد ‪ 200MHz‬ﳐﺼﺼﺔ ﻟﻮﺣﺪات اﻟﺪﺧﻞ واﳋﺮج ﻋﺎﻟﻴﺔ اﻟﺴﺮﻋﺔ‪ ،‬إﺿﺎﻓﺔً إﱃ ﳎﻤﻮﻋﺔ ﻣﻦ واﺟﻬﺎت اﻻﺗﺼﺎل ﻣﺜﻞ‬
‫‪ .[150]Ethernet-USB‬اﻟﺸﻜﻞ‪ 100-1‬ﻳﺒﲔ ﺑﻨﻴﺔ اﳌﻌﺎﰿ ‪.Axis-Extra-FS‬‬

‫اﻟﺸﻜﻞ‪ 100-1‬اﻟﺒﻨﻴﺔ اﻟﺪاﺧﻠﻴﺔ ﻟﻠﻤﻌﺎﰿ ‪Axis-Extra-FS‬‬

‫‪:W7100 Internet SoC 3-4-8-15-1‬‬

‫وﻫﻲ ﻋﺒﺎرة ﻋﻦ ﻧﻈﺎم ﻣﺪﻣﺞ ﻋﻠﻰ ﺷﺮﳛﺔ ﻳﺘﻀﻤﻦ ﻣﺘﺤﻜﻢ ﻣﺼﻐﺮ ﻣﻦ اﻟﻌﺎﺋﻠﺔ ‪ 8051‬إﺿﺎﻓﺔً إﱃ وﺣﺪات ﳏﻴﻄﻴﺔ ﳐﺼﺼﺔ ﻷﻏﺮاض اﻻﺗﺼﺎل‬
‫واﻟﺮﺑﻂ ﺑﺎﺳﺘﺨﺪام اﻟﱪوﺗﻮﻛﻮﻻت ‪ .[151] TCP/IP‬اﻟﺸﻜﻞ‪ 101-1‬ﻳﺒﲔ ﳐﻄﻂ ﺑﻨﻴﺔ اﻟﺸﺮﳛﺔ ‪.W7100‬‬

‫اﻟﺸﻜﻞ‪ 101-1‬اﻟﺒﻨﻴﺔ اﻟﺪاﺧﻠﻴﺔ ﻟﻠﺸﺮﳛﺔ ‪W7100‬‬

‫‪ 9-15-1‬اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ ﻋﻠﻰ اﻟﺸﺮاﺋﺢ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ "‪:(Programmable System-on-Chip) "PSoCs‬‬

‫وﻫﻲ ﻋﺒﺎرة ﻋﻦ ﺷﺮاﺋﺢ رﻗﻤﻴﺔ ﲢﻮي ﻋﻠﻰ ﳎﻤﻮﻋﺎت ﻫﺠﻴﻨﺔ )‪ ،(Mixed-Signal Array Blocks‬رﻗﻤﻴﺔ )‪(Digital Array Blocks‬‬
‫ﺗﺸﺎﻬﺑﻴﺔ )‪ ،(Analog Array Blocks‬ﻗﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﻋﻠﻰ ﻣﺴﺘﻮى اﻟﺘﻌﻠﻴﻤﺎت اﻟﱪﳎﻴﺔ‪ .‬إﺿﺎﻓﺔ إﱃ ذﻟﻚ ﻓﺈ�ﺎ ﲤﻠﻚ ﻧﻮاة ﻣﺘﺤﻜﻢ ﻣﺼﻐﺮ‬
‫وذواﻛﺮ ﳐﺘﻠﻔﺔ‪.‬‬

‫‪65‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Embedded Systems‬‬ ‫اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ |‬

‫ﺗﻜﻮن ﳎﻤﻮﻋﺔ ﻛﺒﲑة ﻣﻦ‬

‫ﳝﻜﻦ اﻟﻘﻮل ﺑﺄن ﺷﺮاﺋﺢ اﻟـ‪ PSoCs‬ﺗﺸﺎﺑﻪ ﺷﺮاﺋﺢ اﻟـ‪ ASICs‬ﺣﻴﺚ أن اﺠﻤﻟﻤﻮﻋﺎت )‪ (Blocks‬ﳝﻜﻦ أن ّ‬
‫اﻟﻮﺣﺪات اﻟﻮﻇﻴﻔﻴﺔ اﳌﱰاﺑﻄﺔ ﻋﻠﻰ ﻧﻔﺲ اﻟﺸﺮﳛﺔ‪ ،‬إﻻ أ�ﺎ ﲣﺘﻠﻒ ﻣﻦ ﺣﻴﺚ أن ﺷﺮاﺋﺢ اﻟـ‪ ASICs‬ﲢﺘﺎج إﱃ ﻣﺮاﺣﻞ وﻋﻤﻠﻴﺎت ﺗﺼﻨﻴﻊ ﺧﺎﺻﺔ‬
‫ﻹﻧﺸﺎء اﻟﺘﺸﻜﻴﻞ اﻟﺴﻴﻠﻴﻜﻮﱐ اﳌﻄﻠﻮب‪ .‬أﻣﺎ ﺑﺎﻟﻨﺴﺒﺔ ﻟﺸﺮاﺋﺢ اﻟـ‪ PSoCs‬ﻓﺈن ﺗﺸﻜﻴﻞ ﻤﻟﻤﻮﻋﺎت اﻟﻮﻇﻴﻔﻴﺔ ﻳﺘﻢ ﺑﺎﺳﺘﺨﺪام ﻣﻜﺎﺗﺐ ﺑﺮﳎﻴﺔ ﰎ‬
‫إﻧﺸﺎﺋﻬﺎ ﻣﻦ ﻗﺒﻞ اﻟﺸﺮﻛﺔ اﳌﺼﻨﻌﺔ ‪ [152]Cypress‬ﺑﺎﺳﺘﺨﺪام ﺑﻴﺌﺔ اﻟﺘﻄﻮﻳﺮ اﻟﱪﳎﻴﺔ ‪.[153]PSoC Designer IDE‬‬

‫أﻳﻀﺎً ﳝﻜﻦ اﻟﻘﻮل ﺑﺄن ﺷﺮاﺋﺢ اﻟـ‪ PSoCs‬ﺗﺸﺎﺑﻪ ﺷﺮاﺋﺢ اﻟـ‪ FPGAs‬ﻣﻦ ﺣﻴﺚ أﻧﻪ ﻋﻨﺪ وﺻﻞ اﻟﺘﻐﺬﻳﺔ ﺗﺘﻢ اﻟﺘﻬﻴﺌﺔ ﻟﻠﻤﺼﻔﻮﻓﺎت اﳌﻨﻄﻘﻴﺔ إﻻ أن‬
‫اﻟﺘﻬﻴﺌﺔ ﺑﺎﻟﻨﺴﺒﺔ ﻟﺸﺮاﺋﺢ اﻟـ‪ PSoCs‬ﺗﺘﻢ ﻣﻦ ﺧﻼل ﲢﻤﻴﻞ اﻟﺘﻌﻠﻴﻤﺎت ﻣﻦ ذاﻛﺮة "‪ "Flash‬ﳎﺔ ﻋﻠﻰ ﻧﻔﺲ اﻟﺸﺮﳛﺔ‪ ،‬ﻛﻤﺎ أن اﺠﻤﻟﻤﻮﻋﺎت‬
‫ﻟﺮﻗﻤﻴﺔ واﻟﺘﺸﺎﻬﺑﻴﺔ ﻻ ﳝﻜﻦ ﺑﺮﳎﺘﻬﺎ ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت وﺻﻒ اﻟﻜﻴﺎن اﻟﺼﻠﺐ )‪ ،VHDL or Verilog‬وﻟﻜﻦ ﻳﺘﻢ ﻬﺗﻴﺌﺘﻬﺎ ﻣﻦ ﺧﻼل‬
‫ﻣﺴﺠﻞ إﻋﺪادات )‪.(register settings‬‬

‫ﺑﺎﳋﻼﺻﺔ ﻓﺈن ﺷﺮاﺋﺢ اﻟـ‪ PSoCs‬ﻋﺒﺎرة ﻋﻦ ﻛﻴﺎن ﻣﺪﻣﺞ ﻳﺸﺎﺑﻪ – إﱃ ﺣﺪ ﻣﺎ – ﻣﻴﺰات ﺷﺮاﺋﺢ اﻟـ‪ ASICs‬وﺷﺮاﺋﺢ اﻟـ‪ FPGAs‬إﺿﺎﻓﺔ إﱃ‬
‫ﺣﺘﻮاﺋﻪ ﻋﻠﻰ ﺑﻨﻴﺔ ﻣﺸﺎﻬﺑﺔ ﻟﻠﻤﺘﺤﻜﻤﺎت اﳌﺼﻐﺮة‪ .‬اﻟﺸﻜﻞ‪ 102-1‬ﻳﺒﲔ ﲤﺜﻴﻼً ﻟﱰﻛﻴﺐ ﺷﺮاﺋﺢ اﻟـ‪ PSOCs‬ﺣﻴﺚ أ�ﺎ ﺗﱰﻛﺐ ﻣﻦ ﺛﻼث ﻋﻨﺎﺻﺮ‬
‫)رﻗﻤﻴﺔ‪ ،‬ﺸﺎﻬﺑﻴﺔ‪ ،‬ﻣﺘﺤﻜﻢ ﻣﺼﻐﺮ(‪.‬‬

‫اﻟﺸﻜﻞ‪ 102-1‬ﺗﺮﻛﻴﺐ ﺷﺮاﺋﺢ اﻟـ‪PSOCs‬‬

‫ﺗﻘﺪم ﺷﺮﻛﺔ ‪ Cypress‬ﺛﻼث ﻋﺎﺋﻼت ﻣﻦ ﺷﺮاﺋﺢ اﻟـ‪ (PSoC1, PSoC3, PSoC5) PSoCs‬ﲣﺘﻠﻒ ﻋﻦ ﺑﻌﻀﻬﺎ ﻣﻦ ﺣﻴﺚ اﳌﻴﺰات‬
‫اﻷﺳﺎﺳﻴﺔ اﳌﺪﳎﺔ واﻟﺒﻨﻴﺔ اﻟﺪاﺧﻠﻴﺔ‪ .‬اﻟﺸﻜﻞ‪ 103-1‬ﻳﺒﲔ ﻣﻘﺎرﻧﺔ ﺑﲔ ﻋﺎﺋﻼت اﻟـ‪ PSoC‬اﻟﺜﻼﺛﺔ‪.‬‬

‫اﻟﺸﻜﻞ‪ 103-1‬ﻣﻴﺰات ﻋﺎﺋﻼت ﺷﺮاﺋﺢ اﻟـ‪PSOCs‬‬

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‫‪ 1-9-15-1‬اﻟﺒﻨﻴﺔ اﻟﺪاﺧﻠﻴﺔ ﻟﺸﺮاﺋﺢ اﻟـ‪:PSoCs‬‬

‫ﺗﻘﺴﻢ اﻟﺒﻨﻴﺔ اﻟﺪاﺧﻠﻴﺔ إﱃ ﺛﻼث ﻣﻨﺎﻃﻖ رﺋﻴﺴﻴﺔ ﻣﺒﻴﻨﺔ ﻋﻠﻰ اﻟﺸﻜﻞ‪.104-1‬‬

‫اﻟﺸﻜﻞ‪ 104-1‬اﳌﺨﻄﻂ اﻟﺼﻨﺪوﻗﻲ ﻟﻠﺒﻨﻴﺔ اﻟﺪاﺧﻠﻴﺔ ﻟﺸﺮاﺋﺢ اﻟـ‪PSoCs‬‬

‫‪ 1-1-9-15-1‬ﳎﻤﻮﻋﺎت رﻗﻤﻴﺔ ﺗﺸﺎﻬﺑﻴﺔ ﻗﺎﺑﻠﺔ ﻟﻠﺘﺸﻜﻴﻞ )‪:(Configurable Analog and Digital Blocks‬‬
‫ﻌﺘﱪ ﳎﻤﻮﻋﺎت اﻟﺪارات اﻟﺮﻗﻤﻴﺔ واﻟﺘﺸﺎﻬﺑﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﺘﺸﻜﻴﻞ اﻟﻘﺎﻋﺪة اﻷﺳﺎﺳﻴﺔ ﻟﺸﺮاﺋﺢ اﻟـ‪ ،PSoCs‬ﺣﻴﺚ ﳝﻜﻦ ﺗﺸﻜﻴﻞ وﻇﺎﺋﻒ ﳏﻴﻄﻴﺔ ﻣﻦ‬
‫ﻩ اﺠﻤﻟﻤﻮﻋﺎت )اﻟﻜﺘﻞ( ﺑﺎﺳﺘﺨﺪام ﻣﻜﺘﺒﺎت ﻗﻴﺎﺳﻴﺔ أو ﻣﻦ ﺧﻼل ﺑﻨﺎء ﻣﻜﺘﺒﺎت ﺧﺎﺻﺔ‪.‬‬

‫‪ 1-1-1-9-15-1‬ﻟﻤﻮﻋﺎت اﻟﺘﺸﺎﻬﺑﻴﺔ )‪:(Analog Blocks‬‬

‫ أن ﻳﺘﻢ ﺗﺸﻜﻴﻞ اﻟﻌﻨﺎﺻﺮ اﻟﺘﺎﻟﻴﺔ ﻣﻦ اﺠﻤﻟﻤﻮﻋﺎت اﻟﺘﺸﺎﻬﺑﻴﺔ‪:‬‬
‫‪ -‬ﻣﺒﺪﻻت ‪.(6~20-bit) ADCs‬‬
‫‪ -‬ﻣﺒﺪﻻت ‪.(6~20-bit) DACs‬‬
‫‪ -‬ﻣﺮﺷﺤﺎت إﺷﺎرة ‪.(LPF, BPF) Filters‬‬
‫‪ -‬ﻣﻀﺨﻤﺎت ذات رﺑﺢ ﻣﺘﺤﻜﻢ ﺑﻪ )‪.(Amplifiers‬‬
‫‪ -‬ﻣﻘﺎرﻧﺎت )‪.(Comparators‬‬
‫‪ -‬ﻛﻮاﺷﻒ ﻗﻤﺔ )‪.(Peak Detectors‬‬
‫‪ -‬ﻣﺒﺪﻻت ﺟﻬﺪ إﱃ ﺗﻴﺎر )‪.(V>I Converters‬‬
‫‪ -‬ﺣﺴﺎﺳﺎت ﳌﺲ ﺳﻌﻮﻳﺔ )‪.(switch capacitor‬‬

‫‪ 2-1-1-9-15-1‬ﻤﻟﻤﻮﻋﺎت اﻟﺮﻗﻤﻴﺔ )‪:(Digital Blocks‬‬

‫ﻦ أن ﻳﺘﻢ ﺗﺸﻜﻴﻞ اﻟﻌﻨﺎﺻﺮ اﻟﺘﺎﻟﻴﺔ ﻣﻦ اﺠﻤﻟﻤﻮﻋﺎت اﻟﺮﻗﻤﻴﺔ‪:‬‬
‫‪ -‬ﻣﺆﻗﺘﺎت )‪.(Timers: 8, 16, 24, 32 bit‬‬
‫‪ -‬ﻋﺪادات )‪.(Counters: 8, 16, 24, 32 bit‬‬
‫‪67‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 Embedded Systems | ‫اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ‬

.(PWM: 8, 16, 24, 32 bit) ‫ وﺣﺪات ﺗﻌﺪﻳﻞ ﻋﺮض اﻟﻨﺒﻀﺔ‬-

.(I/Os) ‫ﺧﺮج ﻋﺎﻣﺔ‬/‫ ﺑﻮاﺑﺎت دﺧﻞ‬-
:‫ ﻧﻮاﻓﺬ اﺗﺼﺎل ﺗﺴﻠﺴﻠﻲ‬-
.(Full/Half Duplex) USART ‹
.(Master/Slave) SPI | (Master/Slave) I2C ‹

:(MCU Cores) ‫ اﳌﺘﺤﻜﻤﺎت اﳌﺼﻐﺮة‬2-1-9-15-1

:‫ وﻫﻲ‬105-1‫ﻳﻮﺟﺪ ﺛﻼث أﻧﻮاع ﳐﺘﻠﻔﺔ ﻣﻦ اﳌﺘﺤﻜﻤﺎت اﳌﺼﻐﺮة ﻣﺒﻴﻨﺔ ﻋﻠﻰ اﻟﺸﻜﻞ‬

.4-MIPS ‫ ﻳﺴﺘﻄﻴﻊ ﺗﻨﻔﻴﺬ‬fosc=24MHz ‫ ﺑﱰدد ﻋﻤﻞ‬8-bit ‫ ﻣﺘﺤﻜﻢ‬:M8C<PSOC1 -

.33-MIPS ‫ ﻳﺴﺘﻄﻴﻊ ﺗﻨﻔﻴﺬ‬fosc=67MHz ‫ ﺑﱰدد ﻋﻤﻞ‬8-bit ‫ ﻣﺘﺤﻜﻢ‬:8051<PSOC3 -

.100-DMIPS ‫ ﻳﺴﺘﻄﻴﻊ ﺗﻨﻔﻴﺬ‬fosc=80MHz ‫ ﺑﱰدد ﻋﻤﻞ‬16/32bit ‫ ﻣﺘﺤﻜﻢ‬:ARM <PSOC5 -

PSOCs‫ ﻋﺎﺋﻼت اﳌﺘﺤﻜﻤﺎت اﳌﺼﻐﺮة ﻟﺸﺮاﺋﺢ اﻟـ‬105-1‫اﻟﺸﻜﻞ‬

:(MCU Subsystems) ‫ اﶈﻴﻄﻴﺎت اﻟﻔﺮﻋﻴﺔ ﻟﻠﻤﺘﺤﻜﻢ اﳌﺼﻐﺮ‬3-1-9-15-1

:‫ ﲤﻠﻚ ﻫﺬﻩ اﻟﺸﺮاﺋﺢ ﺛﻼث أﻧﻮاع ﳐﺘﻠﻔﺔ ﻣﻦ اﻟﺬواﻛﺮ وﻫﻲ‬:(Memories) ‫ اﻟﺬواﻛﺮ‬-1
.4KB~256KB :Flash -
.1KB~64KB :SRAM -
.256B~2KB :EEPROM -

:(communication interfaces) ‫ واﺟﻬﺎت اﻻﺗﺼﺎل‬-2

.(Full Speed) USB2.0 -
.CAN2.0 -
.Wireless -
.JTAG Debugging -
.Serial Wire Debug -

Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages 68
‫‪21‬‬ ‫‪Chapter 1‬‬ ‫اﻟﻔﺼﻞ اﻷول |‬

‫‪ -3‬وﺣﺪات اﻟﺘﻮﻗﻴﺖ )‪:(Clock System‬‬

‫‪.Internal low-speed oscillator -‬‬
‫‪.External crystal oscillator -‬‬
‫‪.Sleep and watchdog timers -‬‬
‫‪ -‬ﺣﻠﻘﺔ ﻗﻔﻞ ﻃﻮري ‪.PLL‬‬

‫‪ 4-1-9-15-1‬اﻟﻮﺻﻼت اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ )‪:(Programmable Routing & Interconnect‬‬

‫ﺗﺴﺘﺨﺪم ﰲ ﺗﻌﻴﲔ اﻹﺷﺎرات اﳌﻄﻠﻮب ﺗﻮﺻﻴﻠﻬﺎ ﻣﻊ أﻗﻄﺎب ﳏﺪدة ﻣﻦ ﻗﺒﻞ اﳌﱪﻣﺞ‪ .‬ﺗﻌﻄﻲ ﻫﺬﻩ اﻟﻮﺻﻼت ﺣﺮﻳﺔ ﻛﺒﲑة ﰲ اﺧﺘﻴﺎر ﺗﻮزع‬
‫اﻹﺷﺎرات واﻟﻮﻇﺎﺋﻒ ﻋﻠﻰ اﻷﻗﻄﺎب‪ ،‬إﺿﺎﻓﺔً إﱃ ذﻟﻚ ﻓﺈن اﻟﻮﺻﻼت ﻋﻠﻰ اﻟﻨﻮاﻗﻞ اﻟﺮﺋﻴﺴﻴﺔ ﺗﺴﻤﺢ ﺑﻌﻤﻠﻴﺎت ﺗﺒﺪﻳﻞ ﻟﻺﺷﺎرات ) ‪signal‬‬

‫‪ (multiplexing‬دون اﳊﺎﺟﺔ إﱃ ﺗﺼﻤﻴﻢ ﺑﻮاﺑﺎت ﻣﻨﻄﻘﻴﺔ ﻣﻌﻘﺪة ﳍﺬا اﻟﻐﺮض‪.‬‬

‫‪ 2-9-15-1‬اﻟﺒﻴﺌﺔ اﻟﱪﳎﻴﺔ ﻟﺸﺮاﺋﺢ اﻟـ‪:PSoCs‬‬

‫ﺗﺴﺘﺨﺪم اﻟﺒﻴﺌﺔ اﻟﱪﳎﻴﺔ اﳌﺘﻜﺎﻣﻠﺔ ‪ Cypress’s PSoC Creator‬ﻣﻦ أﺟﻞ ﺗﺼﻤﻴﻢ اﻟﻨﻈﺎم وﻓﻖ أرﺑﻊ ﻣﺮاﺣﻞ رﺋﻴﺴﻴﺔ‪:‬‬

‫‪ .1‬اﻟﺘﺸﻜﻴﻞ )‪ :(Hardware Configuration‬اﺧﺘﻴﺎر ﳎﻤﻮﻋﺔ اﶈﻴﻄﻴﺎت اﻟﻼزم إﻧﺸﺎؤﻫﺎ ﻋﻠﻰ اﻟﺸﺮﳛﺔ‪.‬‬

‫‪ .2‬اﻟﺘﻄﻮﻳﺮ )‪ :(Software Development‬ﻛﺘﺎﺑﺔ اﻟﺘﻌﻠﻴﻤﺎت اﻟﱪﳎﻴﺔ ﺑﻠﻐﺔ اﻟـ‪.C‬‬

‫‪ .3‬اﻟﺘﺸﺨﻴﺺ )‪ :(System Debugging‬ﺗﺘﺒﻊ اﻷﺧﻄﺎء وﲢﻠﻴﻞ ﻋﻤﻞ اﻟﻨﻈﺎم ﺑﺎﺳﺘﺨﺪام اﻟﻨﺎﻓﺬة ‪.JTAG‬‬

‫اﻟﺸﻜﻞ‪ 106-1‬اﻟﺒﻴﺌﺔ اﻟﱪﳎﻴﺔ ‪PSoC Creator‬‬

‫‪69‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Embedded Systems‬‬ ‫اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ |‬

‫اﻟﺸﻜﻞ‪ 107-1‬اﳌﺨﻄﻂ اﻟﺪاﺧﻠﻲ ﻟﻠﺸﺮﳛﺔ ‪PSoC5 CY8C55‬‬

‫ﻣﺼﻔﻮﻓﺔ اﳌﻌﺎﳉﺎت اﻟﻐﲑ ﻣﺘﺰاﻣﻨﺔ ‪:(Asynchronous Array of simple Processors) AsAP‬‬ ‫‪10-15-1‬‬

‫إن ﺑﻨﻴﺔ ﻫﺬا اﻟﻨﻮع ﻣﻦ اﳌﻌﺎﳉﺎت ﻳﺸﻜﻞ ﻣﺼﻔﻮﻓﺔ ﺛﻨﺎﺋﻴﺔ اﻷﺑﻌﺎد ﻣﻦ اﳌﻌﺎﳉﺎت اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ذات اﻟﺘﻌﻘﻴﺪ اﻟﺒﻨﻴﻮي اﻟﺒﺴﻴﻂ‪ ،‬إﺿﺎﻓﺔً إﱃ‬
‫وﺣﺪات ذاﻛﺮﻳﺔ ﻣﺼﻐﺮة ﻣﺮﺗﺒﻄﺔ ﻋﱪ ﻧﺎﻗﻞ ﻋﻠﻰ ﺷﻜﻞ ﺷﺒﻜﺔ )‪ (mesh network‬ﻗﺎﺑﻞ ﻹﻋﺎدة اﻟﺘﺸﻜﻴﻞ )‪ .(Reconfigurable‬اﻟﺴﺒﺐ‬
‫وراء ﻛﻮن ﻫﺬﻩ اﳌﻌﺎﳉﺎت ﻏﲑ ﻣﺘﻮاﻗﺘﺔ رﻏﻢ ﻛﻮ�ﺎ ﻣﺮﺗﺒﻄﺔ ﻋﱪ ﺷﺒﻜﺔ ﻣﺼﻔﻮﻓﻴﺔ ﻫﻮ أن ﻛﻞ ﻣﻌﺎﰿ ﳛﻮي ﻋﻠﻰ وﺣﺪة اﻟﺘﻮﻗﻴﺖ )‪(Oscillator‬‬
‫اﳋﺎﺻﺔ ﺑﻪ‪ ،‬وﻳﻄﻠﻖ ﻋﻠﻰ ﻫﺬﻩ اﻟﺘﻘﻨﻴﺔ أﻳﻀﺎً اﳌﺼﻄﻠﺢ ‪(Globally Asynchronous Locally Synchronous) GALS‬؛ اﳌﻴﺰة ﰲ‬
‫اﺳﺘﻘﻼﻟﻴﺔ وﺣﺪات اﻟﺘﻮﻗﻴﺖ ﻫﻮ أن اﳌﻌﺎﳉﺎت اﻟﱵ ﺗﻨﺘﻬﻲ ﻣﻦ ﻋﻤﻠﻴﺔ اﳌﻌﺎﳉﺔ اﳌﺴﻨﺪة إﻟﻴﻬﺎ ﺳﻮف ﺗﺘﻮﻗﻒ وﺣﺪة اﻟﺘﻮﻗﻴﺖ اﳋﺎﺻﺔ ﺑﺎ ﺑﻌﺪ ‪9-‬‬

‫‪ Cycle‬إذا ﱂ ﻳﺴﻨﺪ إﻟﻴﻬﺎ ﻣﻬﻤﺔ أﺧﺮى‪ ،‬وﻓﻮر إﺳﻨﺎد ﻣﻬﻤﺔ ﺟﺪﻳﺪة ﺳﺘﻌﻮد إﱃ اﻟﻌﻤﻞ ﺧﻼل دورة آﻟﺔ واﺣﺪة )‪ ،(1-Cycle‬وﺑﺎﻟﺘﺎﱄ ﳝﻜﻦ‬
‫ﺗﻮﻓﲑ اﻟﻄﺎﻗﺔ آﻧﻴﺎً‪ .‬إن ﻫﺬﻩ اﻟﺒﻨﻴﺔ ﺗﺴﻤﺢ ﺑﻌﻤﻠﻴﺎت ﻣﻌﺎﳉﺔ ﺗﻔﺮﻋﻴﺔ ﻣﺘﺰاﻣﻨﺔ )‪ (Parallelism‬ﻋﻠﻰ ﻣﺴﺘﻮى أداء وﻛﻔﺎءة ﻛﺒﲑﻳﻦ‪ ،‬وﺧﺼﻮﺻﺎً ﻣﻦ‬
‫أﺟﻞ ﺗﻄﺒﻴﻘﺎت ﻣﻌﺎﳉﺔ اﻹﺷﺎرة اﻟﺮﻗﻤﻴﺔ اﳌﻌﻘﺪة اﻟﱵ ﺗﺘﻄﻠﺐ ﻋﻤﻠﻴﺎت ﺣﺴﺎﺑﻴﺔ ﻋﻠﻰ درﺟﺔ ﻋﺎﻟﻴﺔ ﻣﻦ اﻟﺘﻌﻘﻴﺪ )اﻟﺘﺸﻔﲑ وﻓﻚ اﻟﺘﺸﻔﲑ(]‪.[154-156‬‬

‫‪ 1-10-15-1‬اﳉﻴﻞ اﻷول ﳌﺼﻔﻮﻓﺔ اﳌﻌﺎﳉﺎت اﻟﻐﲑ ﻣﺘﺰاﻣﻨﺔ )‪:(The AsAP 1st Generation‬‬

‫اﳉﻴﻞ اﻷول ‪ AsAP-1‬ﰎ إﺻﺪارﻩ ﰲ ﻋﺎم ‪ ،2005‬وﻛﺎن ﻋﺒﺎرة ﻋﻦ ﺷﺮﳛﺔ ﲢﻮي ﻋﻠﻰ ‪ 36‬ﻣﻌﺎﰿ ﻗﺎﺑﻞ ﻟﻠﱪﳎﺔ ﺑﺎﺳﺘﺨﺪام ﺗﻘﻨﻴﺔ ﺷﺮاﺋﺢ‬
‫ﺳﻴﻠﻴﻜﻮﻧﻴﺔ ‪ ،0.18um-CMOS‬وﺑﺎﻻﻋﺘﻤﺎد ﻋﻠﻰ ﺗﻘﻨﻴﺔ اﻟـ‪Standard-cell‬؛ ﺗﺮدد ﻋﻤﻞ اﳌﻌﺎﳉﺎت ﻋﻠﻰ اﻟﺸﺮﳛﺔ ﻫﻮ‬
‫‪ 520MHz~540MHz‬ﻋﻨﺪ ﺟﻬﺪ ﻋﻤﻞ ‪ 1.8V‬وﻛﻞ ﻣﻌﺎﰿ ﻳﺴﺘﻬﻠﻚ وﺳﻄﻴﺎً ‪ .32mW‬اﻟﺸﻜﻞ‪ 108-1‬ﻳﺒﲔ ﳐﻄﻂ اﳋﺮﻳﻄﺔ‬
‫اﻟﺴﻴﻠﻴﻜﻮﻧﻴﺔ ﻟﻠﺸﺮﳛﺔ ‪ AsAP-1‬وﺑﻨﻴﺔ ﻛﻞ ﻣﻌﺎﰿ ﻣﻦ ﻣﻌﺎﳉﺎت اﳌﺼﻔﻮﻓﺔ‪.‬‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪70‬‬
‫‪21‬‬ ‫‪Chapter 1‬‬ ‫اﻟﻔﺼﻞ اﻷول |‬

‫‪AsAP-1‬‬ ‫اﻟﺸﻜﻞ‪ 108-1‬ﳐﻄﻂ ﺑﻨﻴﺔ اﻟﺸﺮﳛﺔ‬

‫‪ 2-10-15-1‬اﳉﻴﻞ اﻟﺜﺎﱐ ﳌﺼﻔﻮﻓﺔ اﳌﻌﺎﳉﺎت اﻟﻐﲑ ﻣﺘﺰاﻣﻨﺔ )‪:(The AsAP 2nd Generation‬‬

‫اﳉﻴﻞ اﻟﺜﺎﱐ ‪ AsAP-2‬ﰎ إﺻﺪارﻩ ﻻﺣﻘﺎً ﰲ ﻋﺎم ‪ ،2008‬وﻛﺎن ﻋﺒﺎرة ﻋﻦ ﺷﺮﳛﺔ ﲢﻮي ﻋﻠﻰ ‪ 167‬ﻣﻌﺎﰿ ‪ 32-bit‬ﻗﺎﺑﻞ ﻟﻠﱪﳎﺔ ﺑﺎﺳﺘﺨﺪام‬
‫ﺗﻘﻨﻴﺔ ﺷﺮاﺋﺢ ﺳﻴﻠﻴﻜﻮﻧﻴﺔ ‪ ،65nm-CMOS‬وﺑﺎﻻﻋﺘﻤﺎد ﻋﻠﻰ ﺗﻘﻨﻴﺔ اﻟـ‪Standard-cell‬؛ وﻗﺪ اﺣﺘﻮت اﻟﺸﺮﳛﺔ أﻳﻀﺎً ﻋﻠﻰ ﻣﻌﺎﳉﺎت أﻏﺮاض‬
‫ﺧﺎﺻﺔ )‪ (FFT, Viterbi Decoder, Video Motion Estimation‬إﺿﺎﻓﺔً إﱃ ‪ 16KB‬ﻣﻦ اﻟﻮﺣﺪات اﻟﺬاﻛﺮﻳﺔ اﳌﺸﱰﻛﺔ‪ ،‬ﻛﻤﺎ أن‬
‫ﻫﺬا اﳉﻴﻞ ﻣﻦ اﳌﻌﺎﳉﺎت ﳝﻜﻦ ﳍﺎ أن ﺗﻐﲑ ﺟﻬﺪ وﺗﺮدد ﻋﻤﻠﻬﺎ وذﻟﻚ ﻋﻠﻰ ﳓﻮ دﻳﻨﺎﻣﻴﻜﻲ ﻣﺴﺘﻘﻞ‪ .‬ﺗﺮدد ﻋﻤﻞ اﳌﻌﺎﳉﺎت ﻋﻠﻰ اﻟﺸﺮﳛﺔ ﻫﻮ‬
‫‪ 1.2GHz‬ﻋﻨﺪ ﺟﻬﺪ ﻋﻤﻞ ‪ 1.3V‬وﻛﻞ ﻣﻌﺎﰿ ﻳﺴﺘﻬﻠﻚ وﺳﻄﻴﺎً ‪ 47mW‬ﰲ ﳕﻂ اﻟﻌﻤﻞ اﻟﻔﻌﺎل‪ ،‬ﻛﻤﺎ ﺗﺴﺘﻄﻴﻊ ﻫﺬﻩ اﳌﻌﺎﳉﺎت أن ﺗﺆﻣﻦ‬
‫ﺳﻌﺔ ﻣﻌﺎﳉﺔ ﻋﺎﻟﻴﺔ ﺗﺼﻞ إﱃ ﻣﻌﺪل ‪ 1-trillion‬ﻋﻤﻠﻴﺔ ﺑﺎﻟﺜﺎﻧﻴﺔ وﺗﺴﺘﻬﻠﻚ ﻣﻦ أﺟﻠﻬﺎ ‪ 9.2W‬ﻓﻘﻂ! اﻟﺸﻜﻞ‪ 109-1‬ﻳﺒﲔ ﳐﻄﻂ اﳋﺮﻳﻄﺔ‬
‫اﻟﺴﻴﻠﻴﻜﻮﻧﻴﺔ ﻟﻠﺸﺮﳛﺔ ‪ AsAP-2‬وﺑﻨﻴﺔ ﻛﻞ ﻣﻌﺎﰿ]‪.[157,158‬‬

‫‪AsAP-2‬‬ ‫اﻟﺸﻜﻞ‪ 109-1‬ﳐﻄﻂ ﺑﻨﻴﺔ اﻟﺸﺮﳛﺔ‬

‫ﻫﺬﻩ اﳌﻌﺎﳉﺎت ﻳﺘﻢ ﺑﺮﳎﺘﻬﺎ ﺑﺸﻜﻞ ﻣﻨﻔﺼﻞ ﻣﻦ أﺟﻞ وﻇﻴﻔﺔ ﳏﺪدة ﺑﺎﺳﺘﺨﺪام ﻣﱰﺟﻢ ﺑﻠﻐﺔ اﻟـ‪ ،C‬ﻳﺘﻢ ﺑﻌﺪﻫﺎ ﺑﺮﳎﺔ وﺻﻼت اﻟﻨﺎﻗﻞ ﺑﲔ‬
‫اﳌﻌﺎﳉﺎت ﺣﺴﺐ ﺗﻨﺴﻴﻖ اﻟﻌﻤﻞ‪ ،‬ﻫﺬﻩ اﳌﻴﺰة ﺗﻌﻄﻲ إﻣﻜﺎﻧﻴﺔ ﻛﺒﲑة وﻓﻌﺎﻟﻴﺔ ﻋﺎﻟﻴﺔ ﰲ اﺳﺘﺨﺪام اﳌﻮارد اﳌﻮﺟﻮدة ﻋﻠﻰ اﻟﺸﺮﳛﺔ إﻻ أ�ﺎ ذات‬
‫ﻣﺴﺘﻮى ٍ‬
‫ﻋﺎل ﻣﻦ اﻟﺘﻌﻘﻴﺪ؛ ﻧﻈﺮاً ﻟﻜﻮن اﳌﻌﺎﳉﺎت ﳚﺐ أن ﺗﱪﻣﺞ ﺑﺸﻜﻞ ﻣﻨﻔﺼﻞ‪.‬‬

‫‪ 3-10-15-1‬اﳉﻴﻞ اﻟﺜﺎﻟﺚ ﳌﺼﻔﻮﻓﺔ اﳌﻌﺎﳉﺎت اﻟﻐﲑ ﻣﺘﺰاﻣﻨﺔ )‪:(The AsAP 3rd Generation‬‬

‫اﳉﻴﻞ اﻟﺜﺎﻟﺚ ‪ AsAP-3‬ﰎ ﺗﻄﻮﻳﺮﻩ ﻣﻦ ﻗﺒﻞ ﺷﺮﻛﺔ ‪ ،[159]TILERA‬وﰎ إﻧﺘﺎﺟﻪ ﻋﻠﻰ ﻧﻄﺎق واﺳﻊ ﲝﻴﺚ أﺻﺒﺢ ﻳﺴﺘﺨﺪم ﻟﺘﻄﺒﻴﻘﺎت أﻛﺜﺮ‬
‫ﴰﻮﻟﻴﺔ‪ ،‬وﻫﻮ ﻳﻀﻢ ﻣﺼﻔﻮﻓﺔ ﻣﻌﺎﳉﺎت ﻋﺎﻟﻴﺔ اﻷداء‪ ،‬وﻳﺼﻞ ﻋﺪد اﳌﻌﺎﳉﺎت إﱃ ‪ 100‬ﻣﻌﺎﰿ ‪ 64-bit‬ﻣﺘﻤﺎﺛﻞ ﻣﺮﺗﺒﻄﺔ ﻋﱪ ﻧﺎﻗﻞ ﻋﻠﻰ ﺷﻜﻞ‬
‫ﺷﺒﻜﺔ )‪ ،(iMesh‬وﳝﻜﻦ أن ﺗﻌﻤﻞ ﻋﻨﺪ ﺗﺮدد ‪.1.5GHz‬‬

‫‪71‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Embedded Systems‬‬ ‫اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ |‬

‫اﳌﻌﺎﳉﺎت ﰲ ﻫﺬا اﳉﻴﻞ ﻟﻴﺴﺖ ﻣﺒﺴﻄﺔ اﻟﺒﻨﻴﺔ‪ ،‬وإﳕﺎ ﻛﺎﻣﻠﺔ اﳌﻮاﺻﻔﺎت واﳌﻴﺰات ﻛﻤﺎ أ�ﺎ ﲤﻠﻚ ذاﻛﺮة ﻧﻘﻞ داﺧﻠﻴﺔ )‪32KB-L1i, 32KB-‬‬

‫‪ (256KB-L2 ،L1d Cashe‬إﺿﺎﻓﺔً إﱃ وﺣﺪة اﻟـ‪ Terabit Switch‬اﻟﱵ ﺗﻘﻮم ﻋﻠﻰ وﺻﻞ اﳌﻌﺎﰿ إﱃ ﺷﺒﻜﺔ اﻟﻨﺎﻗﻞ‪.‬‬

‫اﳌﻴﺰة اﻟﺘﻔﺮدﻳﺔ ﳍﺬﻩ اﻟﺸﺮاﺋﺢ ﻫﻲ أن ﻛﻞ ﻣﻌﺎﰿ ﻋﻠﻰ اﻟﺸﺮﳛﺔ ﳝﻜﻦ أن ﻳﺘﻀﻤﻦ ﻧﻈﺎم ﺗﺸﻐﻴﻞ ﻣﺘﻜﺎﻣﻞ أو ﻧﻈﺎم ﺗﺸﻐﻴﻞ ﳐﺼﺺ ﻷﻏﺮاض اﳌﻌﺎﳉﺔ‬
‫اﳌﺘﻮازﻳﺔ ﻣﺜﻞ‪.SMP Linux :‬‬

‫اﻟﻌﺪﻳﺪ ﻣﻦ اﳌﻴﺰات ﰎ ﺗﻀﻤﻴﻨﻬﺎ ﻋﻠﻰ ﻧﻔﺲ اﻟﺸﺮﳛﺔ ﻣﺜﻞ ذواﻛﺮ ‪ 64-bit DDR3‬واﻟﻌﺪﻳﺪ ﻣﻦ اﻟﻮﺻﻼت اﻟﺘﺴﻠﺴﻠﻴﺔ واﳌﺘﺤﻜﻤﺎت اﳌﺴﺎﻋﺪة‪.‬‬
‫اﻟﺸﻜﻞ‪ 110-1‬اﻟﺸﺮﳛﺔ ‪ TILE-GxTM‬وﳐﻄﻂ اﻟﺒﻨﻴﺔ اﻟﺪاﺧﻠﻴﺔ وﺑﻨﻴﺔ ﻛﻞ ﻣﻌﺎﰿ‪.‬‬

‫‪TILE-GxTM‬‬ ‫اﻟﺸﻜﻞ ‪ 110-1‬ﳐﻄﻂ اﻟﺒﻨﻴﺔ اﻟﺪاﺧﻠﻴﺔ ﻟﻠﺸﺮﳛﺔ‬

‫اﻷﻏﻠﻔﺔ ﻣﺘﻌﺪدة اﻟﺸﺮاﺋﺢ اﻟﺴﻴﻠﻴﻜﻮﻧﻴﺔ اﳌﺘﻜﺎﻣﻠﺔ "‪:(Multi-Chip-Package) "MCP‬‬ ‫‪11-15-1‬‬

‫ﻋﻨﺪﻣﺎ ﻳﺼﺒﺢ ﻣﻦ ﻏﲑ اﳌﻼﺋﻢ اﺳﺘﺨﺪام ﺗﻘﻨﻴﺔ اﻟـ‪ SoCs‬ﻣﻦ أﺟﻞ اﻟﻮﺻﻮل ﻧﻈﺎم ﳝﻠﻚ ﺧﺼﺎﺋﺺ ﻣﺘﻜﺎﻣﻠﺔ‪ ،‬ﻓﺈن ﺗﻘﻨﻴﺔ اﻟـ‪Multi-) MCP‬‬

‫‪ (chip Package‬ﻫﻲ اﳊﻞ اﻷﻣﺜﻞ واﻟﺒﺪﻳﻞ‪ .‬ﻋﻠﻰ اﻟﺮﻏﻢ ﻣﻦ أن ﺗﻘﻨﻴﺔ اﻟـ‪ SoCs‬ﺗﻌﺘﱪ أﻗﻞ ﺳﻌﺮاً ﻣﻦ أﺟﻞ إﻧﺘﺎج ﻋﺪد ﻛﺒﲑ ﺟﺪاً ﻣﻦ اﻟﺸﺮاﺋﺢ‬
‫وذﻟﻚ ﻧﻈﺮاً ﻟﻠﻜﻠﻔﺔ اﳌﺮﺗﻔﻌﺔ ﻧﺴﺒﻴﺎً ﻟﻐﻼف اﻟﺸﺮاﺋﺢ ‪ ،MCP‬إﻻ أن اﻷﻣﺜﻠﻴﺔ اﻟﱵ ﲢﻘﻘﻬﺎ ﺗﻘﻨﻴﺔ اﻟـ‪ MCP‬ﺗﺘﺠﺎوز ﻛﻮن اﻟﺒﻌﺪ اﻻﻗﺘﺼﺎدي ﻫﻮ‬
‫اﶈﻮر اﻷﺳﺎﺳﻲ ﰲ ﲢﺪﻳﺪ اﻟﺘﻘﻨﻴﺔ اﻷﻧﺴﺐ]‪.[160‬‬

‫ﺗﻌﺘﱪ اﻷﺟﻴﺎل اﻟﻘﺎدﻣﺔ ﻣﻦ اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ ﺑﺎﺳﺘﺨﺪام ﺗﻜﻨﻮﻟﻮﺟﻴﺎ اﻟﺸﺮاﺋﺢ اﻟﺴﻴﻠﻴﻜﻮﻧﻴﺔ اﳌﺪﳎﺔ ﰲ ﻏﻼف دارة ﻣﺘﻜﺎﻣﻠﺔ وﺣﻴﺪة‬
‫ﻣﻦ أﻫﻢ اﻟﺘﻘﻨﻴﺎت اﳌﺴﺘﻘﺒﻠﻴﺔ اﻟﱵ ﻳﺘﻮﺟﻪ إﻟﻴﻬﺎ اﻻﻫﺘﻤﺎم اﻟﻜﺎﻣﻞ ﺣﺎﻟﻴﺎً‪ ،‬وﺗﻌﺘﱪ ﺗﻘﻨﻴﺔ اﻟـ‪System-on-) SoP‬‬ ‫)‪(MCPs‬‬
‫]‪[161-164‬‬

‫‪ (Package‬اﻟﺘﻘﻨﻴﺔ اﻷﺑﺮز ﻣﻦ أﺟﻞ ﻧﻈﺎم ﻣﺘﻜﺎﻣﻞ ﺿﻤﻦ ﻏﻼف ﺷﺮﳛﺔ ﳝﻠﻚ درﺟﺔ ﻋﺎﻟﻴﺔ ﻣﻦ ﺗﻌﺪد اﻟﻮﻇﺎﺋﻒ )‪ ،(HIMFS‬إذ أن ﺗﻘﻨﻴﺔ‬
‫اﻟـ‪ SoP‬ﺗﺘﺠﺎوز ﻋﻘﺒﺎت ﳏﺪودﻳﺔ ﺳﻌﺔ اﳌﻌﺎﳉﺔ وﻣﻌﺪل اﻻﻧﺪﻣﺎج ﻟﻠﺸﺮاﺋﺢ اﻟﺴﻴﻠﻴﻜﻮﻧﻴﺔ اﻟﱵ ﺗﻌﺎﱐ ﻣﻨﻬﺎ ﺗﻘﻨﻴﺔ اﻟـ‪ SoC‬وﺗﻘﻨﻴﺔ اﻟـ‪ SiP‬وﻛﺬﻟﻚ‬
‫ﺗﻘﻨﻴﺔ اﻟـ‪ MCM‬وﻏﲑﻫﺎ ﻣﻦ اﻟﺘﻘﻨﻴﺎت اﻟﺘﻘﻠﻴﺪﻳﺔ]‪ .[165-168‬ﻓﻤﺜﻼً ﰲ اﻷﺟﻬﺰة اﻟﻨﻘﺎﻟﺔ اﻟﱵ ﺗﻌﺘﻤﺪ اﻟﺘﻘﻨﻴﺎت اﻟﺘﻘﻠﻴﺪﻳﺔ ﳝﻜﻦ أن ﻳﺼﻞ ﻋﺪد‬
‫اﻟﺸﺮاﺋﺢ اﳌﻨﻔﺼﻠﺔ اﻟﻮﻇﻴﻔﺔ وﻋﻨﺎﺻﺮﻫﺎ إﱃ أﻛﺜﺮ ﻣﻦ ‪ 400‬ﻋﻨﺼﺮ واﻟﱵ ﻣﻨﻬﺎ اﳌﺴﺘﻘﺒﻼت وﻣﻮﻟﺪات اﻹﺷﺎرة ووﺣﺪات اﻟﱰﺷﻴﺢ ودارات اﻟﺘﻌﺪﻳﻞ‬
‫وﻏﲑﻫﺎ‪ ،‬وﻛﻞ ﻫﺬا ﻳﺆدي إﱃ اﺳﺘﻬﻼك ﻛﺒﲑ ﰲ اﻟﻄﺎﻗﺔ‪ ،‬واﳔﻔﺎض ﰲ اﳌﻮﺛﻮﻗﻴﺔ‪ ،‬وﺿﻌﻒ ﰲ اﻷداء‪ ،‬وزﻳﺎدة ﰲ اﳊﺠﻢ‪ ،‬ﺑﺎﻹﺿﺎﻓﺔ إﱃ ﻣﺸﺎﻛﻞ‬
‫اﻟﺴﻌﺎت اﻟﻄﻔﻴﻠﻴﺔ اﻟﻨﺎﲡﺔ ﻋﻦ اﳌﺴﺎرات ﻋﻠﻰ اﻟﺪارة اﳌﻄﺒﻮﻋﺔ‪ ،‬ﰲ ﺣﲔ أﻧﻪ ﺑﺎﺳﺘﺨﺪام ﺗﻘﻨﻴﺔ اﻟـ‪ SoP‬ﻓﺈن ﲨﻴﻊ ﻫﺬﻩ اﻟﻌﻨﺎﺻﺮ ﳝﻜﻦ أن ﺗﺪﻣﺞ‬
‫ﻋﻠﻰ ﺷﺮﳛﺔ ذات ﻏﻼف وﺣﻴﺪ‪ .‬ﻓﻴﻤﺎ ﻳﻠﻲ ﻧﻔﺼﻞ ﰲ اﻟﺘﻘﻨﻴﺎت اﳌﺬﻛﻮرة ﻛﻞ ﻋﻠﻰ ﺣﺪا‪ .‬اﻟﺸﻜﻞ‪ 111-1‬ﻳﺒﲔ ﳐﻄﻄﺎً داﺧﻠﻴﺎً ﻟﻨﻈﺎم ﻣﺘﻌﺪد‬
‫اﻟﺸﺮاﺋﺢ اﻟﺴﻴﻠﻴﻜﻮﻧﻴﺔ اﳌﺪﳎﺔ ﰲ ﻏﻼف ﳛﻮي ﻋﻠﻰ ﺗﺴﻌﺔ ﻃﺒﻘﺎت ﺗﺸﻜﻞ ﲬﺲ ﻃﺒﻘﺎت ﻣﻨﻬﺎ ﺷﺮاﺋﺢ ﺳﻴﻠﻴﻜﻮﻧﻴﺔ‪.‬‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪72‬‬
‫‪21‬‬ ‫‪Chapter 1‬‬ ‫اﻟﻔﺼﻞ اﻷول |‬

‫اﻟﺸﻜﻞ‪ 111-1‬ﻧﻈﺎم ‪9-Layer MCP‬‬

‫‪ 1-11-15-1‬اﻟﻮﺣﺪة اﳌﺘﻜﺎﻣﻠﺔ ﻣﺘﻌﺪد اﻟﺸﺮاﺋﺢ "‪:(Multi-Chip-Module) "MCM‬‬

‫وﻫﻲ ﻋﺒﺎرة ﻋﻦ ﳎﻤﻮﻋﺔ ﻣﻦ اﻟﺸﺮاﺋﺢ اﻟﺴﻴﻠﻴﻜﻮﻧﻴﺔ اﳌﺘﻜﺎﻣﻠﺔ )‪ ،(Dies‬وﳎﻤﻮﻋﺔ ﻣﻦ اﻟﻌﻨﺎﺻﺮ اﻟﻐﲑ ﻓﻌﺎﻟﺔ "‪ "RLC‬وﻋﻨﺎﺻﺮ أﺧﺮى ﻣﺜﻞ‪:‬‬
‫‪ ،Sensors ،MEMS‬وﻏﲑﻫﺎ‪ ...‬ﻣﺘﻮﺿﻌﺔ ﺿﻤﻦ ﻏﻼف ﻗﻴﺎﺳﻲ وﺣﻴﺪ وﻣﺮﺗﺒﺔ ﺑﺸﻜﻞ أﻓﻘﻲ ﻣﺘﺠﺎﻧﺐ‪.‬‬

‫إﺣﺪى اﻟﺴﻤﺎت اﳌﻤﻴﺰة ﳍﺬﻩ اﻟﺘﻘﻨﻴﺔ ﻫﻲ إﻣﻜﺎﻧﻴﺔ دﻣﺞ ﺗﻘﻨﻴﺎت ﻣﺘﻌﺪدة ﲣﺘﻠﻒ ﻣﻦ ﺷﺮﳛﺔ ﻣﺪﳎﺔ إﱃ أﺧﺮى ) ‪MCU, ASIC, SoC,‬‬

‫‪ ،(DSP, FPGA, CPLD, Memory‬وﻛﺬﻟﻚ دﻣﺞ ﻋﻨﺎﺻﺮ ﻏﲑ ﻓﻌﺎﻟﺔ‪ ،‬ﺗﻀﻤﲔ ﻫﻮاﺋﻲ إﺷﺎرة ﻋﻠﻰ ﻧﻔﺲ اﻟﺸﺮﳛﺔ ﻬﺑﺪف ﻟﻠﻮﺻﻮل إﱃ‬
‫ﻧﻈﺎم وﻇﻴﻔﻲ ﻣﺘﻜﺎﻣﻞ ﻣﻦ ﺧﻼل ﺷﺮﳛﺔ واﺣﺪة ﻋﻠﻰ اﻟﺪارة اﳌﻄﺒﻮﻋﺔ اﻟﻨﻬﺎﺋﻴﺔ‪.‬‬

‫ﻫﺬﻩ اﻟﺘﻘﻨﻴﺔ وﺟﺪت ﻟﻠﺘﺨﻠﺺ ﻣﻦ اﻟﻘﻴﻮد اﳌﻔﺮوﺿﺔ ﰲ ﺗﻘﻨﻴﺔ ﺷﺮاﺋﺢ اﻟـ‪ SoCs‬وﻣﺜﺎﳍﺎ ﻣﻌﺎﳉﺎت ‪ .Core2Quad‬اﻟﺸﻜﻞ‪ 112-1‬ﻳﺒﲔ اﻟﺸﺮﳛﺔ‬
‫اﳌﺘﻜﺎﻣﻠﺔ ‪ [169]ETRAX 100LX MCM‬وﻫﻲ ﻋﺒﺎرة ﻋﻦ ﺷﺮﳛﺔ ذات ‪ 256‬ﻗﻄﺐ وﺑﺄﺑﻌﺎد ‪ 27×27mm‬وﺗﺘﻀﻤﻦ وﺣﺪة ‪ETRAX‬‬

‫‪ 100LX SoC‬وذاﻛﺮة ‪ Flash‬ﺑﺴﻌﺔ ‪ 4Mbyte‬وذاﻛﺮة ‪ SDRAM‬ﺑﺴﻌﺔ ‪ 16Mbyte‬ووﺣﺪة ﺗﺮاﺳﻞ ‪ Ethernet‬إﺿﺎﻓﺔً إﱃ ‪55‬‬

‫ﻋﻨﺼﺮ ﻏﲑ ﻓﻌﺎل ﻣﻦ ﻣﻘﺎوﻣﺎت وﻣﻜﺜﻔﺎت‪.‬‬

‫اﻟﺸﻜﻞ‪ 112-1‬اﻟﺸﺮﳛﺔ اﻟﺴﻴﻠﻴﻜﻮﻧﻴﺔ ‪ETRAX 100LX MCM‬‬

‫‪ 2-11-15-1‬اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ ﰲ ﻏﻼف "‪:(System-in-Package) "SiP‬‬

‫ﻫﺬا اﻟﻨﻮع ﻣﻦ اﻟﺸﺮاﺋﺢ ﻳﻌﺮف أﻳﻀﺎً ﺑـ‪ Chip Stack MCM‬وﻫﻲ اﳉﻴﻞ اﳉﺪﻳﺪ ﻟﻠﺸﺮاﺋﺢ ‪ MCM‬إﻻ أن اﻟﺸﺮاﺋﺢ اﻟﺴﻴﻠﻴﻜﻮﻧﻴﺔ ﰲ ﻫﺬﻩ‬
‫اﻟﺘﻘﻨﻴﺔ ﺗﻜﻮن ﻣﺘﻮﺿﻌﺔ داﺧﻞ ﻏﻼف اﻟﺸﺮﳛﺔ ﻋﻠﻰ ﺷﻜﻞ ﻃﺒﻘﺎت ﻣﺮﺗﺒﺔ ﻋﻤﻮدﻳﺎً وﺗﻜﻮن ﻣﻮﺻﻮﻟﺔ داﺧﻠﻴﺎً ﻣﻊ أﻗﻄﺎب اﻟﻐﻼف اﳋﺎرﺟﻲ‬
‫ﺑﺎﺳﺘﺨﺪام أﺳﻼك دﻗﻴﻘﺔ ﻋﻮﺿﺎً ﻋﻦ اﳌﺴﺎرات اﻷﻓﻘﻴﺔ وﻳﺘﻢ اﺳﺘﺨﺪام ﺗﻘﻨﻴﺔ ﳊﺎم ﺧﺎﺻﺔ ﻟﺮﺑﻂ اﻟﻄﺒﻘﺎت اﻟﺴﻴﻠﻴﻜﻮﻧﻴﺔ ﺗﺴﻤﻰ ﺑـ ‪Solder‬‬

‫‪ .Bumps‬اﻟﺸﻜﻞ‪ 113-1‬ﳐﻄﻂ ﲤﺜﻴﻠﻲ ﻟﻨﻈﺎم اﻟـ‪.SiP‬‬

‫‪73‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Embedded Systems‬‬ ‫اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ |‬

‫اﻟﺸﻜﻞ‪ 113-1‬ﳐﻄﻂ ﲤﺜﻴﻠﻲ ﻟﻨﻈﺎم اﻟـ‪SiP‬‬

‫ﺗﺴﺘﺨﺪم ﻫﺬﻩ اﻟﺘﻘﻨﻴﺔ ﰲ ﺗﻄﺒﻴﻘﺎت اﻷﺟﻬﺰة اﳋﻠﻮﻳﺔ واﻟﻮﺳﺎﺋﻂ اﻟﺮﻗﻤﻴﺔ‪ ،‬وﻛﺬﻟﻚ ﰲ اﻟﺘﻄﺒﻴﻘﺎت اﻟﱵ ﺗﺘﻄﻠﺐ ﺣﺠﻤﺎً ﺻﻐﲑاً ووزﻧﺎً ﳏﺪوداً‬
‫واﺳﺘﻬﻼﻛﺎً ﺻﻐﲑاً ﻟﻠﻄﺎﻗﺔ ﻣﺜﻞ اﻷﺟﻬﺰة اﶈﻤﻮﻟﺔ واﻷﺟﻬﺰة اﻟﻄﺒﻴﺔ اﻟﱵ ﻳﺘﻢ زراﻋﺘﻬﺎ ﰲ اﳉﺴﻢ اﻟﺒﺸﺮي‪ ،‬ﺣﻴﺚ ﳝﻜﻦ ﻟﺸﺮﳛﺔ واﺣﺪة أن ﺗﻀﻢ ﻣﻦ‬
‫ﺷﺮﳛﺘﲔ إﱃ ﻋﺸﺮ ﺷﺮاﺋﺢ ﺿﻤﻦ ﻏﻼف واﺣﺪ‪ ،‬وﲨﻴﻌﻬﺎ ﻣﱰاﺑﻄﺔ ﻣﻊ ﺑﻌﻀﻬﺎ ﺑﺎﺳﺘﺨﺪام ﻋﻨﺎﺻﺮ ﻏﲑ ﻓﻌﺎﻟﺔ )‪ ،(RLC‬وﺑﺎﻟﺘﺎﱄ ﳝﻜﻦ دﻣﺞ‬
‫اﻟﻌﺪﻳﺪ ﻣﻦ اﻟﺪارات اﳌﺘﻜﺎﻣﻠﺔ اﳌﺴﺘﻘﻠﺔ ﺿﻤﻦ ﻏﻼف وﺣﻴﺪ؛ ﳑﺎ ﻳﺆدي إﱃ ﺗﻘﻠﻴﻞ ﻋﺪد اﻟﻌﻨﺎﺻﺮ اﶈﻴﻄﻴﺔ اﳌﺘﻮﺿﻌﺔ ﻋﻠﻰ اﻟﺪارة اﳌﻄﺒﻮﻋﺔ]‪.[170‬‬
‫اﻟﺸﻜﻞ‪ 114-1‬ﻳﺒﲔ ﻣﻘﺎرﻧﺔ ﺑﲔ ﻧﻈﺎم ﺗﻘﻠﻴﺪي ﻳﺴﺘﺨﺪم دارات ﻣﺘﻜﺎﻣﻠﺔ ذات وﻇﺎﺋﻒ ﻣﺴﺘﻘﻠﺔ وﻧﻈﺎم ﻣﺘﻜﺎﻣﻞ ﻳﺴﺘﺨﺪم ﺗﻘﻨﻴﺔ اﻟـ‪.SiP‬‬

‫اﻟﺸﻜﻞ‪ 114-1‬ﻣﻘﺎرﻧﺔ ﺑﲔ ﻧﻈﺎم ﺗﻘﻠﻴﺪي ﻳﺴﺘﺨﺪم دارات ﻣﺘﻜﺎﻣﻠﺔ ذات وﻇﺎﺋﻒ ﻣﺴﺘﻘﻠﺔ وﻧﻈﺎم ﻣﺘﻜﺎﻣﻞ ﻳﺴﺘﺨﺪم ﺗﻘﻨﻴﺔ اﻟـ‪SiP‬‬

‫اﻟﺸﻜﻞ‪ 115-1‬ﻳﺒﲔ اﻟﺸﺮﳛﺔ ‪ Philips BGW200‬أﺣﺪ اﻷﻣﺜﻠﺔ اﻟﻌﻤﻠﻴﺔ ﻟﺘﻘﻨﻴﺔ اﻟـ‪ SiP‬وﻫﻲ ﻋﺒﺎرة ﻋﻦ ﻧﻈﺎم ‪ Wireless LAN‬ﳐﺼﺺ‬
‫ﻟﻠﻬﻮاﺗﻒ اﳉﻮاﻟﺔ‪ .‬اﻟﺸﻜﻞ‪ 116-1‬ﻳﺒﲔ ﳐﻄﻄﺎً ﺻﻨﺪوﻗﻴﺎً ﻟﻨﻈﺎم ﻫﺎﺗﻒ ﺟﻮال ﻋﻠﻰ ﺷﺮﳛﺔ واﺣﺪة ‪.SiP‬‬

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‫اﻟﺸﻜﻞ‪ 115-1‬اﻟﺸﺮﳛﺔ ‪ BGW200‬ﻧﻈﺎم ‪ SiP‬ﻣﺘﻜﺎﻣﻞ ﻟـ‪Mobile WLAN‬‬

‫‪172‬‬
‫اﻟﺸﻜﻞ‪ 116-1‬اﳌﺨﻄﻂ اﻟﺼﻨﺪوﻗﻲ ﻟﻨﻈﺎم ﻫﺎﺗﻒ ﳏﻤﻮل ﻋﻠﻰ ﺷﺮﳛﺔ ‪SiP‬‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪74‬‬
‫‪21‬‬ ‫‪Chapter 1‬‬ ‫اﻟﻔﺼﻞ اﻷول |‬

‫‪ 1-2-11-15-1‬ﻣﻴﺰات ﺗﻘﻨﻴﺔ اﻟـ‪:(SiP Advantages) SiP‬‬

‫‪ ‬ﻛﻠﻔﺔ اﻟﺸﺮﳛﺔ أﻗﻞ‪.‬‬
‫‪ ‬أﻗﻞ ﺗﻌﻘﻴﺪاً ﰲ ﻋﻤﻠﻴﺔ اﻟﺘﺼﻤﻴﻢ وﺑﺎﻟﺘﺎﱄ ﻛﻠﻔﺔ اﻟﺘﺼﻤﻴﻢ أﻗﻞ‪.‬‬
‫‪ ‬ﺣﺠﻢ أﺻﻐﺮ ووزن أﻗﻞ‪.‬‬
‫‪ ‬اﺳﺘﻬﻼك اﻟﻄﺎﻗﺔ أﻗﻞ‪.‬‬
‫‪ ‬ﻣﻜﺎﻧﻴﺔ ﺗﻀﻤﲔ ﻋﻨﺎﺻﺮ ﻫﺠﻴﻨﺔ )رﻗﻤﻴﺔ وﺗﺸﺎﻬﺑﻴﺔ( وﻋﻨﺎﺻﺮ ﻏﲑ ﻓﻌﺎﻟﺔ‪.‬‬
‫‪ ‬إﻣﻜﺎﻧﻴﺔ ﺗﻀﻤﲔ أﺣﺠﺎم ذاﻛﺮة ﻛﺒﲑة وﺑﺎﻟﺘﺎﱄ ﻣﺮوﻧﺔ أﻛﱪ ﰲ إﻋﺎدة اﻟﺘﺼﻤﻴﻢ واﻟﺘﻄﻮﻳﺮ‪.‬‬
‫‪ ‬أداء أﻋﻠﻰ وﻣﻨﺎﻋﺔ ﻋﺎﻟﻴﺔ ﺿﺪ اﻟﺘﺸﻮﻳﺶ اﻟﻜﻬﺮوﻣﻐﻨﺎﻃﻴﺴﻲ )‪.(EMI‬‬
‫‪ ‬ﻛﺜﺎﻓﺔ ﺳﻴﻠﻴﻜﻮﻧﻴﺔ أﻛﱪ ﻋﻠﻰ اﻟﺸﺮﳛﺔ ﻣﻦ ﺧﻼل ﺗﻀﻤﲔ ﻋﺪة ﺷﺮاﺋﺢ ﺳﻴﻠﻴﻜﻮﻧﻴﺔ ﳐﺘﻠﻔﺔ‪.‬‬
‫‪ ‬إﻣﻜﺎﻧﻴﺔ اﺳﺘﺨﺪام وإﻋﺎدة اﺳﺘﺨﺪام اﻟـ‪ (Intellectual Property) IP‬اﳌﺪﳎﺔ‪.‬‬
‫‪ ‬ﻣﺴﺎﺣﺔ اﻟﺪارة اﳌﻄﺒﻮﻋﺔ ﻟﻠﺠﻬﺎز أﺻﻐﺮ وﻋﺪد اﻟﻌﻨﺎﺻﺮ ﻋﻠﻰ اﻟﺪارة أﻗﻞ‪.‬‬
‫‪ ‬زﻣﻦ اﻟﺘﺼﻤﻴﻢ أﻗﻞ وﻋﻤﻠﻴﺎت اﻟﺘﺤﻘﻖ )‪ (verification‬أﺳﺮع ﻧﻈﺮاً ﻹﻣﻜﺎﻧﻴﺔ ﺗﻀﻤﲔ ﺷﺮاﺋﺢ ﺟﺎﻫﺰة ﳐﺘﻠﻔﺔ‪.‬‬
‫‪ ‬ﻣﺮﺣﻠﺔ اﻟﻨﻤﻮذج اﻷوﱄ ﺗﺴﺘﻐﺮق ‪ 3~6‬أﺷﻬﺮ‪ ،‬ﻣﺮﺣﻠﺔ اﻹﻧﺘﺎج ﻋﻠﻰ ﻧﻄﺎق واﺳﻊ ﺗﺴﺘﻐﺮق ‪ 2~3‬أﺷﻬﺮ‪.‬‬

‫اﻟﺴﻴﺌﺔ اﻟﻮﺣﻴﺪة ﳍﺬﻩ اﻟﺸﺮاﺋﺢ ﻫﻲ أﻧﻪ ﰲ ﺣﺎل ﺣﺼﻮل أي ﺧﻠﻞ ‪-‬وﻟﻮ ﰲ ﺟﺰء ﻣﻦ اﻟﺸﺮﳛﺔ‪ -‬ﻓﺈن ﲨﻴﻊ اﻟﻮﻇﺎﺋﻒ اﳌﺪﳎﺔ اﻷﺧﺮى ﺳﻮف‬
‫ﺗﺼﺒﺢ ﺑﻼ ﻓﺎﺋﺪة‪ ،‬وﺳﻴﺘﻄﻠﺐ اﻷﻣﺮ ﺗﻐﻴﲑ اﻟﺸﺮﳛﺔ‪ ،‬ورﲟﺎ ﻳﻜﻮن اﻷﻣﺮ ﻣﻜﻠﻒ‪.‬‬

‫‪ 3-11-15-1‬اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ ﻋﻠﻰ ﻏﻼف "‪:(System-on-Package) "SoP‬‬

‫ﻫﺬﻩ اﻟﺘﻘﻨﻴﺔ أﻳﻀﺎً ﺗﻘﺘﺼﺮ ﻛﺴﺎﺑﻘﺎﻬﺗﺎ ﻋﻠﻰ ﺗﻄﺒﻴﻘﺎت اﻷﻧﻈﻤﺔ اﻟﺪﻗﻴﻘﺔ )‪ (micro-systems‬ﻓﻘﻂ‪ ،‬وإﳕﺎ ﺗﻌﺘﱪ اﳉﻴﻞ اﳉﺪﻳﺪ واﻟﻨﻤﻮذج‬
‫اﳌﺒﺘﻜﺮ ﰲ ﳎﺎل ﺗﻄﺒﻴﻘﺎت أﻧﻈﻤﺔ اﻟﻄﺐ اﻟﺒﻴﻮﻟﻮﺟﻲ )‪ .(Bio-medical‬ﺗﺘﺨﻄﻰ ﻫﺬﻩ اﻟﺘﻘﻨﻴﺔ ﺗﻘﻨﻴﺎت اﻟـ‪ SoC‬واﻟـ‪ SiP‬ﻣﻦ ﺣﻴﺚ أ�ﺎ ﻣﻨﺘﺸﺮة‬
‫ﺑﺸﻜﻞ واﺳﻊ ﰲ اﻟﺘﻄﺒﻴﻘﺎت اﻟﺼﻨﺎﻋﻴﺔ واﻟﻄﺒﻴﺔ‪ ،‬ﻛﻤﺎ أ�ﺎ ﺗﺘﻤﻴﺰ ﺑﺎﻷداء اﻟﻌﺎﱄ وﺳﻌﺔ اﳌﻌﺎﳉﺔ إﺿﺎﻓﺔً إﱃ إﻣﻜﺎﻧﻴﺔ ﺗﻀﻤﲔ أﻧﻈﻤﺔ وﻋﻨﺎﺻﺮ‬
‫اﺗﺼﺎﻻت ﻻﺳﻠﻜﻴﺔ‪ ،‬ﺣﻴﺚ أن ﻫﺬﻩ اﳌﻴﺰات ﻛﺎﻧﺖ ﺗﻌﺘﱪ ﻋﺎﺋﻘﺎً ﰲ اﻟﺘﻘﻨﻴﺎت اﻟﺴﺎﺑﻘﺔ]‪ .[173,174‬اﻟﺸﻜﻞ‪ 117-1‬ﻳﻌﺮض ﳐﻄﻄﺎً ﺑﻨﻴﻮﻳﺎً ﻟـ‪SoP‬‬

‫ﳛﻮي ﻋﻠﻰ ﺛﻼث أﻧﻮاع ﻣﻦ اﻟﺪارات ذواﻛﺮ‪ ،‬ﻣﻌﺎﳉﺎت‪ ،‬دارات ﺗﺸﺎﻬﺑﻴﺔ( وﻃﺒﻘﺎت اﻟﻌﺰل اﻟﻜﻬﺮﺑﺎﺋﻲ اﳋﺎﺻﺔ ﺑﺎ إﺿﺎﻓﺔً إﱃ ﻋﻨﺎﺻﺮ ﻏﲑ ﻓﻌﺎﻟﺔ‬
‫وﻫﻮاﺋﻲ‪.‬‬

‫اﻟﺸﻜﻞ‪ 117-1‬ﻧﻈﺎﻣـ‪ SoP‬ﻣﺘﻜﺎﻣﻞ ﻣﻊ ﻃﺒﻘﺎت اﻟﻌﺰل اﻟﻜﻬﺮﺑﺎﺋﻲ‬

‫‪75‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Embedded Systems‬‬ ‫اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ |‬

‫ﻋﻠﻰ ﺧﻼف اﻟﺘﻘﻨﻴﺎت اﻟﺴﺎﺑﻘﺔ )‪ (SiP, SoC, MCM‬اﻟﱵ ﺗﺘﺒﻊ ﻗﺎﻧﻮن "‪ "Moor‬ﰲ ﺗﻄﻮر زﻳﺎدة ﻋﺪد اﻟﱰاﻧﺰﺳﺘﻮرات ﻋﻠﻰ اﻟﺸﺮﳛﺔ )اﻟﻜﺜﺎﻓﺔ‬
‫اﻟﺴﻴﻠﻴﻜﻮﻧﻴﺔ(‪ ،‬وأن ﻫﺬا اﻟﻌﺪد ﳝﻜﻦ أن ﻳﺘﻀﺎﻋﻒ ﻛﻞ ‪ 18‬ﺷﻬﺮاً ﻣﻦ أﺟﻞ ﻧﻔﺲ اﻟﻜﻠﻔﺔ‪ ،‬ﻓﺈن ﻫﺬﻩ ﺗﻘﻨﻴﺔ ‪ SoP‬ﺗﺘﺨﻄﻰ ﻗﺎﻧﻮن "‪"Moor‬‬
‫وﺗﻌﺘﱪ اﻷﺧﲑ ﻳﻔﺘﻘﺮ إﱃ اﻟﺘﻮﺻﻴﻒ اﻟﺼﺤﻴﺢ‪ ،‬وذﻟﻚ ﻷن ﻫﻨﺎﻟﻚ ﻋﻮاﻣﻞ أﺧﺮى ﺗﺆﺛﺮ ﻋﻠﻰ اﻷداء‪ ،‬وﻟﺬﻟﻚ ﻓﻬﻲ ﺗﺘﺒﻊ ﻣﻨﺤﲏ ﻳﺴﻤﻰ ﺑـ‪Mega-‬‬

‫‪ ،Function‬ﺣﻴﺚ أ�ﺎ ﲡﻤﻊ ﻛﺜﺎﻓﺔ اﻟﱰﻛﻴﺐ اﻟﺴﻴﻠﻴﻜﻮﱐ واﻟﺘﻌﻘﻴﺪ اﻟﻮﻇﻴﻔﻲ ﻋﻠﻰ ﻣﺴﺘﻮى اﻟﻨﻈﺎم‪ ،‬وﺗﻨﺺ ﻋﻠﻰ أن ﻋﺪد اﻟﻌﻨﺎﺻﺮ ﻋﻠﻰ اﻟﺸﺮﳛﺔ‬
‫ﳝﻜﻦ أن ﻳﺘﻀﺎﻋﻒ ﻛﻞ ‪ 12‬ﺷﻬﺮاً‪ ،‬وﺑﺬﻟﻚ ﻓﺈن ﻋﺪد ﻣﻬﺎم اﻟﻨﻈﺎم ﺳﺘﺘﻨﺎﺳﺐ ﻃﺮدا ﻣﻊ ﻫﺬﻩ اﻟﺰﻳﺎدة]‪ .[175, 176‬اﻟﺸﻜﻞ‪ 118-1‬ﻳﺒﲔ ﻣﻨﺤﲏ‬
‫ﻗﺎﻧﻮن ازدﻳﺎد اﻟﻜﺜﺎﻓﺔ اﻟﺴﻴﻠﻴﻜﻮﻧﻴﺔ ﻟـ‪ SoP‬ﺑﺎﻟﻠﻮن اﻷﲪﺮ ﻣﻘﺎرﻧﺔ ﻣﻊ ﻣﻨﺤﻲ ﻗﺎﻧﻮن ‪ Moor‬ﺑﺎﻟﻠﻮن اﻷزرق‪.‬‬

‫اﻟﺸﻜﻞ‪ 118-1‬ﻣﻨﺤﲏ ﻗﺎﻧﻮن ازدﻳﺎد اﻟﻜﺜﺎﻓﺔ اﻟﺴﻴﻠﻴﻜﻮﻧﻴﺔ ﻟـ‪SoP‬‬

‫ﺑﺎﳋﻼﺻﺔ ﳝﻜﻨﻨﺎ اﻟﻘﻮل ﺑﺄن ﺗﻘﻨﻴﺔ اﻟـ‪ SoP‬ﻋﺒﺎرة ﻋﻦ دﻣﺞ ﺗﻘﻨﻴﺔ اﻟـ‪ SoC‬وﺗﻘﻨﻴﺔ اﻟـ‪ SiP‬وﻛﺬﻟﻚ ﺗﻘﻨﻴﺔ اﻟـ‪ SoB‬ﻟﻠﻮﺻﻮل إﱃ ﻣﺴﺘﻮى ٍ‬
‫ﻋﺎل ﺟﺪاً‬
‫ﻣﻦ اﻟﺘﻜﺎﻣﻞ ﻋﻠﻰ دارة ﻣﺘﻜﺎﻣﻠﺔ وﺣﻴﺪة‪ .‬اﻟﺸﻜﻞ‪ 119-1‬ﻳﺒﲔ ﻣﻘﺎرﻧﺔ ﺑﲔ اﻟﺘﻘﻨﻴﺎت اﻷرﺑﻌﺔ ‪ .SoC, MCM, SiP, SoP‬اﻟﺸﻜﻞ‪120-1‬‬

‫ﻳﺒﲔ ﻋﻨﺎﺻﺮ ﺗﻘﻨﻴﺔ اﻟـ‪.SoP‬‬

‫اﻟﺸﻜﻞ‪ 119-1‬ﻣﻘﺎرﻧﺔ ﺑﲔ اﻟﺘﻘﻨﻴﺎت اﻷرﺑﻌﺔ ‪SoC, MCM, SiP, SoP‬‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪76‬‬
‫‪21‬‬ ‫‪Chapter 1‬‬ ‫اﻟﻔﺼﻞ اﻷول |‬

‫اﻟﺸﻜﻞ‪ 120-1‬ﻋﻨﺎﺻﺮ ﺗﻘﻨﻴﺔ اﻟـ‪SoP‬‬

‫‪ 4-11-15-1‬اﻟﺸﺮاﺋﺢ اﳌﺪﳎﺔ ﻋﻠﻰ اﻟﺪارة اﳌﻄﺒﻮﻋﺔ ‪:177-179(Chip-on-Board) CoB‬‬

‫ﰎ ﺗﻄﻮﻳﺮ ﻫﺬﻩ اﻟﺘﻘﻨﻴﺔ واﺳﺘﺨﺪاﻣﻬﺎ ﻷول ﻣﺮة ﰲ اﻟﺴﺎﻋﺎت اﻟﺮﻗﻤﻴﺔ‪ ،‬ﺣﻴﺚ ﻛﺎن ﻳﺴﺘﺨﺪم ﺷﺮﳛﺔ ﺳﻴﻠﻴﻜﻮﻧﻴﺔ واﺣﺪة ﻋﻠﻰ اﻟﺪارة ﻣﻄﺒﻮﻋﺔ‪ .‬ﻣﺆﺧﺮاً‬
‫ﺗﻄﻮرت ﻫﺬﻩ اﻟﺘﻘﻨﻴﺔ إﱃ ﺣﺪ ﻛﺒﲑ وأﺻﺒﺤﺖ ﺗﺴﺘﺨﺪم ﰲ اﻟﻌﺪﻳﺪ ﻣﻦ اﻟﺘﻄﺒﻴﻘﺎت ﻣﺜﻞ‪ :‬أﺟﻬﺰة اﻟﻮﺳﺎﺋﻂ اﻟﺮﻗﻤﻴﺔ اﻟﺘﻔﺎﻋﻠﻴﺔ واﳊﺎﺳﺒﺎت وأﺟﻬﺰة‬
‫اﳍﻮاﺗﻒ وﺑﻄﺎﻗﺎت اﻻﺋﺘﻤﺎن واﻟﺸﺎﺷﺎت اﻟﺮﻗﻤﻴﺔ واﻟﺮﺳﻮﻣﻴﺔ وﻏﲑﻫﺎ‪ .‬اﻟﺘﻄﺒﻴﻘﺎت اﳊﺪﻳﺜﺔ اﳌﺘﻘﺪﻣﺔ ﳍﺬﻩ اﻟﺘﻘﻨﻴﺔ أﺻﺒﺤﺖ ﲢﻮي ﻋﻠﻰ أﻛﺜﺮ ﻣﻦ‬
‫‪ 100‬ﺷﺮﳛﺔ ﺳﻴﻠﻴﻜﻮﻧﻴﺔ ﻋﻠﻰ ﻟﻮﺣﺔ اﻟﺪارة اﳌﻄﺒﻮﻋﺔ‪ .‬اﻟﺸﻜﻞ‪ 121-1‬ﻳﺒﲔ دارة ﻣﻄﺒﻮﻋﺔ )‪ (PCB‬ﺗﺴﺘﺨﺪم ﺗﻘﻨﻴﺔ اﻟـ‪ CoB‬وﻫﻲ ﲢﻮي ﻋﻠﻰ ‪9‬‬

‫ﺷﺮاﺋﺢ ﺳﻴﻠﻴﻜﻮﻧﻴﺔ )‪ (Dies‬ﻣﺘﻮﺿﻌﺔ ﺑﺸﻜﻞ ﻣﺒﺎﺷﺮ ﻋﻠﻰ اﻟﺪارة اﳌﻄﺒﻮﻋﺔ‪.‬‬

‫اﻟﺸﻜﻞ‪ 121-1‬ﺗﺴﻊ ﺷﺮاﺋﺢ ﺳﻴﻠﻴﻜﻮﻧﻴﺔ )‪ (9-Dies‬ﻣﺘﻮﺿﻌﺔ ﺑﺸﻜﻞ ﻣﺒﺎﺷﺮ ﻋﻠﻰ اﻟﺪارة اﳌﻄﺒﻮﻋﺔ‬

‫ﰲ ﺑﻌﺾ اﻟﺘﻄﺒﻴﻘﺎت اﺳﺘﻄﺎﻋﺖ ﺗﻘﻨﻴﺔ اﻟـ‪ CoB‬أن ﲢﻞ ﳏﻞ ﺗﻘﻨﻴﺔ اﻟﻌﻨﺎﺻﺮ ذات اﻟﺘﻮﺿﻊ اﻟﺴﻄﺤﻲ )‪ ،(SMD‬وذﻟﻚ ﻷ�ﺎ ﲤﻜﻦ ﻣﻦ‬
‫اﺳﺘﺨﺪام ﺣﺠﻢ دارة ﻣﻄﺒﻮﻋﺔ أﺻﻐﺮ‪ ،‬وﺗﻌﻄﻲ ﻣﻨﺎﻋﺔ ﻋﺎﻟﻴﺔ ﺿﺪ اﻟﺴﻌﺎت اﻟﻄﻔﻴﻠﻴﺔ اﻟﱵ ﺗﻨﺸﺄ ﻋﻦ اﻟﺪارات اﳌﺘﻜﺎﻣﻠﺔ ذات اﻷﻏﻠﻔﺔ ﻛﻤﺎ أ�ﺎ‬
‫ﺗﺴﺮع ﰲ ﻋﻤﻠﻴﺔ اﻹﻧﺘﺎج‪.‬‬

‫إن ﻛﻠﻔﺔ اﻟﺘﺼﻨﻴﻊ ﻟﻐﻼف ‪ PDIP‬ﺗﺼﻞ إﱃ ﺿﻌﻔﻲ ﻣﺎﻫﻮ ﻣﻮﺟﻮد ﻋﻠﻰ اﻟﺸﺮﳛﺔ اﻟﺴﻴﻠﻴﻜﻮﻧﻴﺔ داﺧﻞ اﻟﻐﻼف‪ ،‬وﻛﺬﻟﻚ ﺑﺎﻟﻨﺴﺒﺔ ﻟﻸﻏﻠﻔﺔ‬
‫اﻟﺴﻄﺤﻴﺔ )‪ ،(SMD‬ﻓﺈن اﻟﻜﻠﻔﺔ ﺳﺘﻜﻮن اﻟﻀﻌﻒ‪ ،‬وﺑﺎﻟﺘﺎﱄ ﺑﺎﺳﺘﺨﺪام ﺗﻘﻨﻴﺔ اﻟـ‪ CoB‬ﺳﺘﻜﻮن ﻛﻠﻔﺔ اﻟﻨﻈﺎم أﺧﻔﺾ ﺑﻜﺜﲑ‪ ،‬ﻛﻤﺎ أن اﳌﺴﺎﺣﺔ‬
‫اﻟﱵ ﲢﺘﺎﺟﻬﺎ دارة ﻣﺘﻜﺎﻣﻠﺔ ذات ﻏﻼف ﻫﻲ ﻣﻦ ‪ 10‬إﱃ ‪ 20‬ﺿﻌﻒ‪.‬‬

‫اﻟﺸﻜﻞ‪ 122-1‬ﻳﺒﲔ ﺷﺎﺷﺔ رﺳﻮﻣﻴﺔ ‪ 128×64pixel‬ﺗﺴﺘﺨﺪم ﺛﻼث ﻣﻌﺎﳉﺎت ﻧﻘﻄﻴﺔ ﺗﻌﺘﻤﺪ ﻋﻠﻰ ﺗﻘﻨﻴﺔ اﻟـ‪.CoB‬‬

‫‪77‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Embedded Systems‬‬ ‫اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ |‬

‫‪CoB‬‬ ‫اﻟﺸﻜﻞ‪ 122-1‬ﻳﺒﲔ ﺷﺎﺷﺔ رﺳﻮﻣﻴﺔ ‪ 128×64pixel‬ﲢﻮي ﻋﻠﻰ ﺛﻼث ﺷﺮاﺋﺢ‬

‫اﻟﺼﻌﻮﺑﺔ اﻟﻮﺣﻴﺪة ﻫﻲ ﰲ اﻟﺘﻌﺎﻣﻞ ﻣﻊ ﻫﺬﻩ اﻟﺸﺮاﺋﺢ اﻟﺴﻴﻠﻴﻜﻮﻧﻴﺔ‪ ،‬ﺣﻴﺚ ﺳﻴﺤﺘﺎج إﱃ أﺟﻬﺰة ذات ﻣﺴﺘﻮى ٍ‬
‫ﻋﺎل ﻣﻦ اﻟﺘﻘﻨﻴﺔ ﺗﻘﻮم ﻋﻠﻰ ﺗﻮﺻﻴﻞ‬
‫اﻟﺸﺮﳛﺔ اﻟﺴﻴﻠﻴﻜﻮﻧﻴﺔ ﻣﻊ ﻣﺴﺎرات اﻟﺪارة اﳌﻄﺒﻮﻋﺔ‪ ،‬ﻛﻤﺎ أن ﻋﻤﻠﻴﺔ ﺻﻴﺎﻧﺔ ﻫﺬﻩ اﻟﺸﺮاﺋﺢ ﻏﲑ ﳑﻜﻨﺔ ﻋﻤﻮﻣﺎً‪ ،‬ﻓﺈذا ﺗﻀﺮرت ﺷﺮﳛﺔ ﻣﺎ ﻋﻠﻰ دارة‬
‫ﻣﻄﺒﻮﻋﺔ‪ ،‬ﻓﺴﻮف ﻳﺘﻄﻠﺐ اﻷﻣﺮ اﺳﺘﺒﺪال اﻟﺪارة ﻛﺎﻣﻠﺔً‪.‬‬

‫اﳉﺪول‪ 13-1‬ﻳﺒﲔ ﻣﻘﺎرﻧﺔ ﺑﲔ ﻣﺴﺎﺣﺔ اﻟﺪارة اﳌﻄﺒﻮﻋﺔ اﳌﻄﻠﻮﺑﺔ ﻟﺸﺮﳛﺔ ‪ CoB‬ذات ‪ 24‬ﻗﻄﺐ‪ ،‬وﻟﻠﺸﺮاﺋﺢ ذات اﻷﻏﻠﻔﺔ ﻣﻦ أﺟﻞ ﻧﻔﺲ ﻋﺪد‬
‫اﻷﻗﻄﺎب‪ ،‬ﺣﻴﺚ أ ّن اﻟﺸﺮﳛﺔ ‪ Chip‬ﻫﻲ اﻟﺸﺮﳛﺔ اﻟﺴﻴﻠﻴﻜﻮﻧﻴﺔ اﻷوﻟﻴﺔ )‪.(Die‬‬

‫‪Area‬‬ ‫‪Chip‬‬ ‫‪CoB‬‬ ‫‪CC24‬‬ ‫‪SOP24‬‬ ‫‪DIP24‬‬

‫‪mm‬‬ ‫‪3×3‬‬ ‫‪5×5‬‬ ‫‪11.8×11.8‬‬ ‫‪15.4×15.4‬‬ ‫‪31×15.24‬‬

‫‪mm2‬‬ ‫‪9‬‬ ‫‪25‬‬ ‫‪157.70‬‬ ‫‪157.70‬‬ ‫‪472.44‬‬

‫اﳉﺪول‪ 13-1‬ﻣﻘﺎرﻧﺔ ﺑﲔ أﺣﺠﺎم ﺗﻘﻨﻴﺎت أﻏﻠﻔﺔ اﻟﺸﺮاﺋﺢ اﳌﺨﺘﻠﻔﺔ‬

‫إن اﻟﻄﻮر اﻟﺜﺎﱐ ﰲ ﻣﺮاﺣﻞ ﺻﻨﺎﻋﺔ اﻟﺪارات اﳌﺘﻜﺎﻣﻠﺔ ﻫﻮ ﻋﻤﻠﻴﺔ وﺿﻊ اﻟﺸﺮﳛﺔ اﻟﺴﻴﻠﻴﻜﻮﻧﻴﺔ )‪ (Die‬داﺧﻞ ﻏﻼف )‪ ،(Package‬ﺑﺎﺳﺘﺨﺪام‬
‫ﺷﺮاﺋﺢ اﻟـ‪ CoB‬ﳝﻜﻦ ﺗﻘﻠﻴﺺ زﻣﻦ وﻛﻠﻔﺔ اﻟﺘﺼﻨﻴﻊ ﳍﺬﻩ اﳌﺮﺣﻠﺔ‪ .‬اﻟﺸﻜﻞ‪ 123-1‬ﻳﺒﲔ ﳐﻄﻄﺎً ﻣﻨﻬﺠﻴﺎً ﳌﺮاﺣﻞ ﺗﺼﻨﻴﻊ اﻟﺪارة اﳌﺘﻜﺎﻣﻠﺔ ﰲ ﻃﻮرﻫﺎ‬
‫اﻟﺜﺎﱐ – وﻫﻮ وﺿﻊ اﻟﺸﺮﳛﺔ ﰲ ﻏﻼف – ٍ‬
‫ﻟﻜﻞ ﻣﻦ اﻟﺘﻘﻨﻴﺔ اﻟﺘﻘﻠﻴﺪﻳﺔ ‪ SMD‬وﺗﻘﻨﻴﺔ اﻟـ‪ CoB‬ﺣﻴﺚ ﻳﻼﺣﻆ أن ﻋﺪد اﳌﺮاﺣﻞ ﳜﺘﺼﺮ إﱃ‬
‫اﻟﻨﺼﻒ ﺑﺎﻟﻨﺴﺒﺔ ﻟﺘﻘﻨﻴﺔ اﻟـ‪.CoB‬‬

‫ﻳﺘﻢ وﺿﻊ اﻟﺸﺮﳛﺔ اﻟﺴﻴﻠﻴﻜﻮﻧﻴﺔ ﻋﻠﻰ اﻟﺪارة اﳌﻄﺒﻮﻋﺔ ﻟﻴﺘﻢ ﻟﺼﻘﻬﺎ ﻋﻨﺪ درﺟﺔ ﺣﺮارة ‪ ،150ºC‬ﰒ ﻳﺘﻢ ﺗﻮﺻﻴﻠﻬﺎ ﺑﺎﺳﺘﺨﺪام أﺳﻼك ﻣﻴﻜﺮوﻧﻴﺔ‬
‫ﻣﺼﻨﻌﺔ ﻣﻦ ﺧﻠﻴﻄﻪ ﻣﺮﻛﺐ ﻣﻦ اﻟﻨﺤﺎس واﻟﻨﻴﻜﻞ واﻟﺬﻫﺐ أو أﺳﻼك ﻣﻦ اﻷﳌﻨﻴﻮم‪ ،‬وﺗﺴﺘﺨﺪم أﺟﻬﺰة ﺗﺪﻋﻰ ﺑـ‪ Wire-bonder‬ﻣﻦ أﺟﻞ‬
‫ﻋﻤﻠﻴﺔ اﻟﺘﻮﺻﻴﻞ‪ .‬ﺑﻌﺪ اﻧﺘﻬﺎء ﻋﻤﻠﻴﺔ اﻟﺘﻮﺻﻴﻞ ﻳﺘﻢ ﺗﻐﻄﻴﺔ اﻟﺸﺮﳛﺔ اﻟﺴﻴﻠﻴﻜﻮﻧﻴﺔ ﺑﻐﻼف )‪ (Encapsulated‬ﻣﺮﻛﺐ ﻣﻦ ﻣﻮاد ﻛﻴﻤﻴﺎﺋﻴﺔ‬
‫)‪ .(Epoxy‬اﻟﺸﻜﻞ‪ 124-1‬ﻳﺒﲔ ﺗﻮﺻﻴﻞ ﺷﺮﳛﺔ ﺳﻴﻠﻴﻜﻮﻧﻴﺔ ﻋﻠﻰ دارة ﻣﻄﺒﻮﻋﺔ ﺗﺴﺘﺨﺪم ﺗﻘﻨﻴﺔ اﻟـ‪ .CoB‬اﳉﻴﻞ اﳉﺪﻳﺪ ﻣﻦ ﻫﺬﻩ اﻟﺘﻘﻨﻴﺔ أﺻﺒﺢ‬
‫ﻳﺪﻋﻢ إﻣﻜﺎﻧﻴﺔ ﺗﻮﺿﻊ ﻋﺪة ﺷﺮاﺋﺢ ﺳﻴﻠﻴﻜﻮﻧﻴﺔ ﺑﺸﻜﻞ ﻋﻤﻮدي )ﻃﺒﻘﺎت( ﻓﻮق ﺑﻌﻀﻬﺎ اﻟﺒﻌﺾ وأﺻﺒﺤﺖ ﻫﺬﻩ اﻟﺘﻘﻨﻴﺔ ﺗﻨﺎﻓﺲ ﺗﻘﻨﻴﺔ اﻟـ‪.SoP‬‬
‫اﻟﺸﻜﻞ‪ 125-1‬ﻳﺒﲔ ﺛﻼث ﺷﺮاﺋﺢ ﺳﻴﻠﻴﻜﻮﻧﻴﺔ ﻣﺘﻮﺿﻌﺔ ﺑﺸﻜﻞ ﻋﻤﻮدي ﻋﻠﻰ دارة ﻣﻄﺒﻮﻋﺔ ﺗﻌﺘﻤﺪ ﻋﻠﻰ ﺗﻘﻨﻴﺔ اﻟـ‪.CoB‬‬

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21 Chapter 1 | ‫اﻟﻔﺼﻞ اﻷول‬

Inovative CoB assembly Conventional SMD assembly

Wafer Wafer
1
Test, dice, clean Test, dice, clean
2
Die bond onto PCB Die bond onto leadframe
3
Wire bond, Test Wire bond
4
Seal off bond area Mould, Stamp
5
Add connectors, Test Surface treat leads, test
6
<Finished Product> Pack and Ship
7
Unpack, prepare for assembly
8
Assemble using SMD machines
9
Solder
10
Cleaning
11
Test
12
<Finished Product>

‫ ﻟﺘﺠﻤﻴﻊ اﻟﺪارة اﳌﺘﻜﺎﻣﻠﺔ ﰲ ﻃﻮرﻫﺎ اﻟﺜﺎﱐ‬CoB‫ واﻟـ‬SMD‫ ﻣﻘﺎرﻧﺔ ﺑﲔ ﺗﻘﻨﻴﱵ اﻟـ‬123-1‫اﻟﺸﻜﻞ‬

‫ ﺗﻮﺻﻴﻞ ﺷﺮﳛﺔ ﺳﻴﻠﻴﻜﻮﻧﻴﺔ ﻋﻠﻰ دارة ﻣﻄﺒﻮﻋﺔ‬124-1‫اﻟﺸﻜﻞ‬

CoB‫ ﺷﺮاﺋﺢ ﺳﻴﻠﻴﻜﻮﻧﻴﺔ ﻣﺘﻮﺿﻌﺔ ﺑﺸﻜﻞ ﻋﻤﻮدي وﺗﻌﺘﻤﺪ ﺗﻘﻨﻴﺔ اﻟـ‬125-1‫اﻟﺸﻜﻞ‬

79 ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Embedded Systems‬‬ ‫اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ |‬

‫‪ 16-1‬ﺣﻘﺎﺋﻖ وﺗﺤﺪﻳﺎت اﻗﺘﺼﺎدﻳﺔ ﺣﻮل اﻟﺤﻠﻮل اﻟﺘﻜﻨﻮﻟﻮﺟﻴﺔ اﻟﻤﺴﺘﻘﺒﻠﻴﺔ ﻟﻸﻧﻈﻤﺔ اﻟﻤﺪﻣﺠﺔ‬

‫‪(The E.Ss High-Tech Future Solutions, Economical Facts & Challenges) :‬‬
‫ﻋﻠﻰ ﻣﺪى ﺳﻨﻮات ﻃﻮﻳﻠﺔ واﺟﻪ ﻣﺼﻤﻤﻲ اﻷﻧﻈﻤﺔ اﳌﺘﻘﺪﻣﺔ ‪ -‬ﺧﺼﻮﺻﺎً أﻧﻈﻤﺔ اﻻﺗﺼﺎﻻت اﻟﺮﻗﻤﻴﺔ ﻟﻜﻮ�ﺎ ﺗﻌﻤﻞ ﻋﻨﺪ ﺳﺮﻋﺎت ﻋﺎﻟﻴﺔ وﲢﺘﺎج‬
‫إﱃ ﺧﻮارزﻣﻴﺎت ﻣﻌﻘﺪة ‪ -‬ﺳﻠﺴﻠﺔ ﻣﻦ اﻟﻌﺪﻳﺪ ﻣﻦ اﳋﻴﺎرات ﻣﻦ اﻟﺸﺮاﺋﺢ اﳌﻌﻘﺪة ﻟﺒﻨﺎء ﻄﺒﻴﻘﺎﻬﺗﻢ‪ ،‬ﻣﻦ أﻫﻢ ﻫﺬﻩ اﳋﻴﺎرات أو اﳊﻠﻮل اﻧﺘﺸﺎراً‪:‬‬
‫‪.ASSPs, ASICs, DSPs, SoCs, FPGAs‬‬

‫ﻗﺒﻴﻞ ﻋﺸﺮ ﺳﻨﻮات ﻛﺎﻧﺖ ﺗﻘﻨﻴﺔ اﻟـ‪ ASIC‬واﻟـ‪ ASSP‬اﻷﻛﺜﺮ اﻧﺘﺸﺎراً ﰲ اﻷﺳﻮاق‪ ،‬اﻟﻴﻮم ﺗﺆﻛﺪ اﻷﲝﺎث اﻻﻗﺘﺼﺎدﻳﺔ ﻋﻠﻰ أن اﺳﺘﺨﺪام ﺗﻘﻨﻴﺔ‬
‫اﻟـ‪ ASIC‬واﻟـ‪ ASSP‬ﰲ ﺗﻀﺎؤل ﻣﺴﺘﻤﺮ ﻧﺘﻴﺠﺔً ﻻرﺗﻔﺎع ﺗﻜﺎﻟﻴﻒ ﺗﺼﻨﻴﻊ ﻫﺬﻩ اﻟﺘﻜﻨﻮﻟﻮﺟﻴﺎ‪.‬‬

‫اﻟﺸﺮﻛﺎت اﳌﺼﻨﻌﺔ ﳍﺬﻩ اﻟﺘﻘﻨﻴﺔ ﻣﺜﻞ‪ LSI Logic, Fujitsu, NEC Electronics, Oki Electric, Toshiba :‬وﻏﲑﻫﻢ‪ ،‬ﻳﻮاﺟﻬﻮن‬
‫ﺻﻌﻮﺑﺎت ﻛﺒﲑة وﺗﻀﺎؤل ﰲ ﺣﺠﻢ اﳌﺒﻴﻌﺎت‪ ،‬ﻋﻼوة ﻋﻠﻰ ذﻟﻚ ﻓﺈن ﺳﻠﺴﻠﺔ ﻣﻦ اﻷﺣﺪاث اﻻﻗﺘﺼﺎدﻳﺔ ﺗﺆﻛﺪ ﻋﻠﻰ وﺟﻮد ﻗﻠﻖ ﻣﺴﺘﻤﺮ ﻓﻴﻤﺎ إذا‬
‫ﻛﺎﻧﺖ ﻫﺬﻩ اﻟﺘﻘﻨﻴﺔ ﺳﻮف ﺗﺴﺘﺨﺪم ﰲ ﺗﻄﻮﻳﺮ اﳌﻨﺘﺠﺎت اﻟﻘﺎدﻣﺔ أم ﻻ]‪.[180‬‬

‫اﻹﺣﺼﺎءات واﳌﺆﺷﺮات اﻻﻗﺘﺼﺎدﻳﺔ ﺗﺸﲑ إﱃ أن ﻣﻌﺪل اﻟﺘﺼﺎﻣﻴﻢ اﻟﱵ ﺗﻌﺘﻤﺪ ﺗﻘﻨﻴﺔ اﻟـ‪ ASIC‬ﻗﺪ اﳔﻔﺾ ﲟﻌﺪل ﲡﺎوز اﻟـ‪ 50%‬ﻣﻦ ﻋﺎم‬
‫‪ 2000‬إﱃ ‪) 2007‬ﻣﻦ ‪ 7749‬إﱃ ‪ (3196‬وﻫﻮ ﰲ اﳓﺪار ﻣﺘﺰاﻳﺪ ﺗﺒﺎﻋﺎً وﻓﻘﺎً ﻟﺘﻘﺮﻳﺮ ‪ .[181]Gartner‬اﻟﺸﻜﻞ‪ 126-1‬ﻳﺒﲔ ﻣﻌﺪﻻت‬
‫ﺗﺼﺎﻣﻴﻢ اﻟـ‪ ASIC‬اﳌﺘﻮﻗﻌﺔ ﻋﺎﳌﻴﺎً ﻣﻦ ﻋﺎم ‪ 1994‬إﱃ ﻋﺎم ‪ 2013‬وﻳﺘﻮﻗﻊ أن ﻳﺘﺼﻞ ﻣﻌﺪل اﳔﻔﺎض اﺳﺘﺨﺪام ﻫﺬﻩ اﻟﺘﻜﻨﻮﻟﻮﺟﻴﺎ إﱃ ‪ 70%‬ﻣﻊ‬
‫ﺑﺪاﻳﺔ ﻋﺎم ‪ .[182]2012‬اﻟﺸﻜﻞ‪ 127-1‬ﻳﺒﲔ ﻧﺴﺒﺔ اﳔﻔﺎض ﺗﺼﺎﻣﻴﻢ اﻟـ‪ ASSP‬اﳌﺘﻮﻗﻌﺔ ﻋﺎﳌﻴﺎً ﻣﻦ ﻋﺎم ‪ 2003‬إﱃ ﻋﺎم ‪ 2013‬وﻗﺪ ﺑﻠﻐﺖ‬
‫‪ 25%‬ﰲ ﻋﺎم ‪.[183]2010‬‬

‫اﻟﺸﻜﻞ‪ 126-1‬اﳌﻌﺪل اﻟﻌﺎﳌﻲ ﻟﺘﺼﺎﻣﻴﻢ اﻟـ ‪ ASIC‬اﳌﺘﻮﻗﻌﺔ ﻟﻸﻋﻮام ‪1994-2013‬‬

‫ﺑﺸﻜﻞ ﻋﺎم ﻓﺈن ﻛﻠﻔﺔ اﻟﺘﺼﻤﻴﻢ ﻟﻠﺠﻴﻞ اﳉﺪﻳﺪ ﺑﺎﺳﺘﺨﺪام ﺗﻘﻨﻴﺔ اﻟـ‪ ASIC‬وﺗﻘﻨﻴﺔ اﻟـ‪ ASSP‬ﺳﻮف ﺗﺒﺪأ ‪ -‬ﺑﺎﳊﺪ اﻷدﱏ ‪ -‬ﻣﻦ ‪ 50‬ﻣﻠﻴﻮن‬
‫دوﻻر ﻟﻠﻮﺻﻮل إﱃ اﳌﻨﺘﺞ )دارة ﻣﺘﻜﺎﻣﻠﺔ( اﻟﺬي ﳝﻜﻦ ﺗﺴﻮﻳﻘﻪ ﲡﺎرﻳﺎً‪ ،‬وﻋﻠﻰ ﻫﺬا اﳌﻌﺪل ﻓﺈن ﻫﺬﻩ اﻟﺘﻘﻨﻴﺔ ﳝﻜﻦ أن ﺗﺘﻼﺷﻰ ﺑﺄﺳﺮع ﳑﺎ ﻫﻮ‬
‫ﺗﺼﻨﻊ ﻫﺬﻩ اﻟﺘﻘﻨﻴﺔ إﱃ إﻏﻼق ﻣﻌﺎﻣﻠﻬﺎ أو ﺑﻴﻌﻬﺎ إﱃ ﺷﺮﻛﺎت أﺧﺮى‪.‬‬
‫ﻣﺘﻮﻗﻊ‪ ،‬وﻫﺬا ﻫﻮ اﻟﺴﺒﺐ اﻟﺬي دﻓﻊ اﻟﻌﺪﻳﺪ ﻣﻦ اﻟﺸﺮﻛﺎت اﻟﱵ ّ‬
‫اﻟﺸﻜﻞ‪ 128-1‬ﻳﺒﲔ ﻣﻘﺎرﻧﺔ ﲤﺜﻴﻠﻴﺔ ﻟﻜﻠﻔﺔ وﻣﺮاﺣﻞ اﻟﺘﺼﻤﻴﻢ ﻟﻜﻞ ﻣﻦ ﺗﻘﻨﻴﺔ اﻟـ‪ FPGA‬واﻟـ‪ ASIC‬وﻳﻼﺣﻆ أن ﻛﻠﻔﺔ اﻟﺘﺼﻤﻴﻢ ﻟﺘﻘﻨﻴﺔ‬
‫اﻟـ‪ ASIC‬ﺗﻔﻮق ﲟﺌﺎت اﻷﺿﻌﺎف ﺗﻘﻨﻴﺔ اﻟـ‪.FPGA‬‬

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‫‪21‬‬ ‫‪Chapter 1‬‬ ‫اﻟﻔﺼﻞ اﻷول |‬

‫اﻟﺸﻜﻞ‪ 127-1‬اﳌﻌﺪل اﻟﻌﺎﳌﻲ ﻟﺘﺼﺎﻣﻴﻢ اﻟـ ‪ ASSP‬اﳌﺘﻮﻗﻌﺔ ﻟﻸﻋﻮام ‪2003-2013‬‬

‫اﻟﺸﻜﻞ‪ 128-1‬ﻣﻘﺎرﻧﺔ ﻛﻠﻔﺔ وﻣﺮاﺣﻞ اﻟﺘﺼﻤﻴﻢ ﻟﻜﻞ ﻣﻦ اﻟـ‪ FPGA‬واﻟـ‪ASIC‬‬

‫إن اﻻﻋﺘﺒﺎر اﻷول ﰲ ﺗﺼﻤﻴﻢ اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ ﻫﻮ اﻟﺒﺤﺚ ﻋﻦ ﻠﻮل أﻣﺜﻠﻴﺔ ﻬﺑﺪف اﻟﻮﺻﻮل إﱃ اﻟﻜﻠﻔﺔ اﻷﺧﻔﺾ واﳌﺰاﻳﺎ اﻷﻛﱪ ﻟﻠﻨﻈﺎم‬
‫اﳌﻄﻠﻮب؛ ﻓﻔﻲ ﻧﻔﺲ اﻟﻮﻗﺖ اﻟﺬي ﺗﺰداد ﻓﻴﻪ ﺗﻜﺎﻟﻴﻒ اﻟﺘﺼﻨﻴﻊ ﻟﺘﻘﻨﻴﺔ اﻟـ‪ ASIC‬وﺗﻘﻨﻴﺔ اﻟـ‪ ،ASSP‬ﻓﺈن ﺗﻜﻠﻔﺔ ﺷﺮاﺋﺢ اﻟـ‪ FPGA‬ﺗﻨﺨﻔﺾ‪،‬‬
‫وﻣﺰاﻳﺎﻫﺎ ﺗﺰداد وﻫﺬا ﻣﺎ ﻳﺴﺒﺐ ﳕﻮ ﻣﺘﺴﺎرع ﳍﺬﻩ اﻟﺘﻘﻨﻴﺔ‪ .‬اﻟﺸﻜﻞ‪ 129-1‬ﻳﺒﲔ ﻣﻌﺪل ازدﻳﺎد ﺗﺼﺎﻣﻴﻢ اﻟـ‪ FPGA‬اﳌﺘﻮﻗﻌﺔ ﻋﺎﳌﻴﺎً )ﻣﻦ ﻋﺎم‬
‫‪ 1999‬إﱃ ﻋﺎم ‪.[184](2013‬‬

‫اﻟﺸﻜﻞ‪ 129-1‬اﳌﻌﺪل اﻟﻌﺎﳌﻲ ﻻزدﻳﺎد ﺗﺼﺎﻣﻴﻢ اﻟـ ‪ FPGA‬اﳌﺘﻮﻗﻌﺔ ﰲ ﻋﺎم ‪2009‬‬

‫ﲤﺘﻠﻚ ﺗﻘﻨﻴﺔ اﻟـ‪ FPGA‬ﻣﺆﺧﺮاً ﻣﻴﺰات ﻋﺪﻳﺪة ﻛﺎﻟﱵ ﲤﺘﻠﻜﻬﺎ ﺗﻘﻨﻴﺔ اﻟـ‪ ASIC‬ﻣﺜﻞ اﻷداء اﻟﻌﺎﱄ واﻻﺳﺘﻬﻼك اﳌﻨﺨﻔﺾ ﻟﻠﻄﺎﻗﺔ واﻟﻜﺜﺎﻓﺔ‬
‫اﻟﺴﻴﻠﻴﻜﻮﻧﻴﺔ ﻋﻠﻰ اﻟﺸﺮﳛﺔ‪ ،‬ﻋﻼوة ﻋﻠﻰ ذﻟﻚ ﻓﺈن ﺗﻘﻨﻴﺔ اﻟـ‪ FPGA‬ﲤﻠﻚ ﺻﻔﺎت ﳑﻴﺰة أﺧﺮى ﻣﺜﻞ اﳌﺮوﻧﺔ ﰲ إﻋﺎدة ﺗﺸﻜﻴﻞ اﻟﻨﻈﺎم‬
‫)‪ ،(Reconfiguring‬أﳕﺎط اﻟﺘﺸﻐﻴﻞ اﳌﺨﺘﻠﻔﺔ‪ ،‬ﻣﻌﺎﳉﺎت ﻣﺪﳎﺔ ﻋﻠﻰ ﻧﻔﺲ اﻟﺸﺮﳛﺔ )‪ ،(Embedded Processors‬وﺣﺪات ذاﻛﺮﻳﺔ‪،‬‬
‫وﺣﺪات ‪DSPs‬؛ ﻫﺬﻩ اﳌﻴﺰات ﲡﻌﻠﻬﺎ ﺗﺘﻔﻮق ﺑﺸﻜﻞ واﺿﺢ ﻋﻠﻰ ﺗﻘﻨﻴﺔ اﻟـ‪ ،ASIC‬وﻫﻲ اﳊﺎﻓﺰ اﻟﺮﺋﻴﺴﻲ ﳌﻌﻈﻢ اﻟﺸﺮﻛﺎت ﰲ اﺳﺘﺨﺪام ﺗﻘﻨﻴﺔ‬
‫‪81‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Embedded Systems‬‬ ‫اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ |‬

‫اﻟـ‪ FPGA‬ﻛﺒﺪﻳﻞ ﻟﺘﻘﻨﻴﺔ اﻟـ‪ ASIC‬وﺗﻘﻨﻴﺔ اﻟـ‪ SoC‬واﻟﺘﺄﻛﻴﺪ ﻋﻠﻰ وﺿﻊ ﺧﻄﻂ ﻣﺴﺘﻘﺒﻠﻴﺔ ﻻﺳﺘﺨﺪام ﺗﻘﻨﻴﺔ اﻟـ‪ FPGA‬ﰲ ﺑﻨﺎء ﺗﻄﺒﻴﻘﺎت‬
‫ﻣﺘﻜﺎﻣﻠﺔ]‪ [185‬وﺧﻄﻂ ﻣﺮﺣﻠﻴﺔ ﻻﺳﺘﺨﺪام ﻫﺬﻩ اﻟﺘﻘﻨﻴﺔ ﰲ ﺗﺼﻤﻴﻢ اﻟﻨﻤﺎذج اﻷوﻟﻴﺔ )‪ (Prototyping‬ﳑﺎ ﻳﻮﻓﺮ ﰲ اﻟﻮﻗﺖ واﻟﻜﻠﻔﺔ]‪.[186-188‬‬

‫وﻓﻘﺎً ﻟﻘﺎﻧﻮن ‪ [80-83] Moor‬ﻓﺈن ﻋﺪد اﻟﱰاﻧﺰﺳﺘﻮرات اﻟﱵ ﳝﻜﻦ وﺿﻌﻬﺎ ﻋﻠﻰ دارة ﻣﺘﻜﺎﻣﻠﺔ وﺣﻴﺪة ﰲ ﺗﺰاﻳﺪ ﻣﺴﺘﻤﺮ‪ ،‬وﻗﺪ أﻛﺪ ﻣﺴﺎﻋﺪ ﻣﺪﻳﺮ‬
‫ﺷﺮﻛﺔ ‪ - Michael Hames - TI‬ﻋﻠﻰ أﻧﻪ ﻻ أﺣﺪ ﻳﺴﺘﻄﻴﻊ ﺗﺼﻤﻴﻢ دارة ﻣﺘﻜﺎﻣﻠﺔ ﲢﻮي ﻋﻠﻰ ‪ 500‬ﻣﻠﻴﻮن ﺗﺮاﻧﺰﺳﺘﻮر ﻣﻦ ﻧﻘﻄﺔ اﻟﺼﻔﺮ‪،‬‬
‫ﻷن ذﻟﻚ ﺳﻮف ﻳﺘﻄﻠﺐ ﻣﻮارد ﻫﺎﺋﻠﺔ‪ ،‬وإﳕﺎ ﻳﻨﺒﻐﻲ أن ﻳﻜﻮن اﻟﺘﺼﻤﻴﻢ ﻋﻠﻰ اﳌﺴﺘﻮى اﻟﻮﻇﻴﻔﻲ ﻻ ﻋﻠﻰ اﳌﺴﺘﻮى اﻟﺴﻴﻠﻴﻜﻮﱐ ﻣﻦ اﻵن وﺻﺎﻋﺪاً‬
‫– أي اﺳﺘﺨﺪام ﺣﻠﻮل ﻻ ﲢﺘﺎج إﱃ ﻣﺮﺣﻠﺔ ﺗﺼﻤﻴﻢ ﺑﻨﻴﻮي‪ ،‬وإﳕﺎ ﺗﺼﻤﻴﻢ ﻣﺒﺎﺷﺮ ﻟﻠﻮﻇﺎﺋﻒ اﳌﻄﻠﻮﺑﺔ ﻣﺜﻞ ﺷﺮاﺋﺢ اﻟـ‪.FPGAs‬‬

‫ﻋﻠﻰ ﻣﺴﺘﻮى ﺗﻄﺒﻴﻘﺎت ﻣﻌﺎﳉﺔ اﻹﺷﺎرة اﻟﺮﻗﻤﻴﺔ ﻓﺈن اﻟﻌﺪﻳﺪ ﻣﻦ اﻷﲝﺎث واﳌﻘﺎﻻت ﺗﺆﻛﺪ ﻋﻠﻰ اﺳﺘﺨﺪام ﺗﻘﻨﻴﺔ اﻟـ‪ FPGA‬ﰲ ﺗﻄﺒﻴﻘﺎت ﻣﻌﺎﳉﺔ‬
‫اﻹﺷﺎرة اﻟﺮﻗﻤﻴﺔ ﻛﺤﻞ ﺑﺪﻳﻞ ﳌﻌﺎﳉﺎت اﻟـ‪ ،DSP‬وذﻟﻚ ﳌﺎ ﲤﺘﻠﻜﻪ ﻣﻦ ﺳﻌﺔ ﻣﻌﺎﳉﺔ ﻋﺎﻟﻴﺔ وأداء ﻛﺒﲑ وﻋﻤﻠﻴﺎت ﺗﺸﻐﻴﻞ ﺗﻔﺮﻋﻴﺔ]‪.[189-191‬‬
‫اﻟﺸﻜﻞ‪ 130-1‬ﻳﺒﲔ ﻣﻘﺎرﻧﺔ اﻷداء ﻟﻜﻞ ﻣﻦ ﺷﺮاﺋﺢ اﻟـ‪ FPGAs‬وﺷﺮاﺋﺢ اﻟـ‪ DSPs‬ﺣﻴﺚ ﳝﺜﻞ اﳌﻨﺤﲏ ﺑﺎﻟﻠﻮن اﻷﺧﻀﺮ أداء ﺷﺮاﺋﺢ اﻟـ‪FPGA‬‬

‫واﳌﻨﺤﲏ ﺑﺎﻟﻠﻮن اﻷﲪﺮ أداء اﻟـ‪.DSP/GPP‬‬

‫اﻟﺸﻜﻞ‪ 130-1‬اﳌﻨﺤﲏ اﻷﺧﻀﺮ ﳝﺜﻞ أداء اﻟـ‪ FPGA‬واﳌﻨﺤﲏ اﻷﲪﺮ ﳝﺜﻞ أداء اﻟـ‪DSP/GPP‬‬

‫اﻟﺪراﺳﺔ اﻷﺧﲑة ﻟﻸداء اﻟﱵ ﻗﺎﻣﺖ ﺑﺎ ﺷﺮﻛﺔ ﺣﻠﻮل اﻟﺘﺼﻤﻴﻢ ‪ - BDTI‬ﺷﺮﻛﺔ ‪ BTDI‬ﻫﻲ ﻣﻦ اﻟﺸﺮﻛﺎت اﻟﻌﺎﳌﻴﺔ اﳌﺘﺨﺼﺼﺔ واﳌﻮﺛﻮﻗﺔ اﻟﱵ‬
‫ﻳﺮﺟﻊ إﻟﻴﻬﺎ اﳌﻬﻨﺪﺳﲔ اﳌﺼﻤﻤﲔ وﻣﺪراء اﻟﺘﺴﻮﻳﻖ واﻹدارة ﰲ اﲣﺎذ ﻗﺮارات ﲡﺎرﻳﺔ وﺗﻘﻨﻴﺔ ﻣﻦ أﺟﻞ وﺿﻊ ﺧﻄﻂ ﻣﺴﺘﻘﺒﻠﻴﺔ ﺣﻮل ﺗﻜﻨﻮﻟﻮﺟﻴﺎ‬
‫ﻣﻌﺎﳉﺎت اﻹﺷﺎرة اﻟﺮﻗﻤﻴﺔ ﺗﻄﺒﻴﻘﺎﻬﺗﺎ ‪ -‬ﺗﺸﲑ إﱃ أن ﺗﻘﻨﻴﺔ اﻟـ‪ FPGA‬ﲤﻠﻚ ﻣﻴﺰات ﻛﺒﲑة وﻫﻲ أﻓﻀﻞ ﺑﻜﺜﲑ ﻣﻦ اﺳﺘﺨﺪام ﻣﻌﺎﳉﺎت اﻹﺷﺎرة‬
‫اﻟﺮﻗﻤﻴﺔ )‪ (DSPs‬ﰲ ﳎﺎل ﻣﻌﺎﳉﺔ اﻹﺷﺎرة وﺧﺼﻮﺻﺎً اﻟﺘﻄﺒﻴﻘﺎت اﻟﱵ ﲢﻮي ﻋﻠﻰ ﺧﻮارزﻣﻴﺎت ﺗﻨﻔﻴﺬ ﺗﻔﺮﻋﻴﺔ وﲢﺘﺎج إﱃ أداء ٍ‬
‫ﻋﺎل ﻣﺜﻞ ﺗﻄﺒﻴﻘﺎت‬
‫اﻻﺗﺼﺎﻻت اﻟﻼﺳﻠﻜﻴﺔ ﻣﻦ اﳉﻴﻞ اﻟﺜﺎﻟﺚ واﻟﺮاﺑﻊ؛ ﻛﻤﺎ أن اﻟﺪراﺳﺔ أﺷﺎرت أﻳﻀﺎً إﱃ أن ﺗﻘﻨﻴﺔ اﻟـ‪ FPGA‬أﻛﺜﺮ ﻓﻌﺎﻟﻴﺔ ﻧﺴﺒﺔ إﱃ اﻟﻜﻠﻔﺔ ﻣﻦ‬
‫اﺳﺘﺨﺪام ﻣﻌﺎﳉﺎت اﻟـ‪ DSP‬ﺑﻨﺴﺒﺔ ﺗﺘﺠﺎوز ‪ 43‬ﻣﺮة ‪ -‬ﻫﺬا ﻋﻠﻰ ﻣﻘﻴﺎس أن ﲨﻴﻊ ﻫﺬﻩ اﻟﺸﺮاﺋﺢ ﳍﺎ ﻧﻔﺲ اﻟﺴﻌﺮ‪ ،‬أﻣﺎ ﺑﺎﻋﺘﺒﺎر اﻷداء دون‬
‫اﻟﺘﻜﻠﻔﺔ ﻓﺈن ﺷﺮاﺋﺢ اﻟـ‪ FPGAs‬ﳝﻜﻦ أن ﺗﻘﺪم أداءً ﻳﺘﺠﺎوز ‪ 1000‬ﺿﻌﻒ‪ ،‬وﻗﺪ أﻛﺪ ﻣﺪﻳﺮ ﻗﺴﻢ اﻟـ‪ DSPs‬ﰲ ﺷﺮﻛﺔ ‪Leon ) TI‬‬

‫‪ (Adams‬ﻋﻠﻰ أن ﻫﺬﻩ اﻟﻨﺘﺎﺋﺞ ﻟﻴﺴﺖ ﻣﻔﺎﺟﺌﺔ ﻛﻮن أﻧﻈﻤﺔ اﻻﺗﺼﺎﻻت ذات ﻃﺒﻴﻌﺔ ﻋﻤﻞ ﺗﻔﺮﻋﻴﺔ‪ ،‬وأﻧﻪ ﻣﻦ اﳌﺘﻮﻗﻊ أن ﺗﻘﻨﻴﺔ اﻟـ‪FPGA‬‬

‫ﺳﻮف ﲢﺘﻞ ﻫﺬا اﻟﻘﻄﺎع ﻛﻐﲑﻩ ﻋﻠﻰ ﻣﺪى اﻟﺴﻨﻮات اﻟﻘﻠﻴﻠﺔ اﻟﻘﺎدﻣﺔ]‪ .[192, 193‬اﻟﺸﻜﻞ‪ 131-1‬ﻳﺒﲔ ﻧﺘﺎﺋﺞ اﻟﺪراﺳﺔ اﻟﺘﺤﻠﻴﻠﻴﺔ ﺣﻴﺚ أن اﳌﻘﺎرﻧﺔ‬
‫ﲤﺖ ﻋﻠﻰ ﻣﻌﺎﰿ اﻹﺷﺎرة اﻟﺮﻗﻤﻴﺔ ‪ TMS320C6410‬وﻫﻮ ﻣﻦ ﺻﻨﻊ ﺷﺮﻛﺔ ‪ TI‬وﻳﻌﻤﻞ ﻋﻨﺪ ﺗﺮدد ‪ ،400MHz‬وﺷﺮﳛﺔ اﻟـ‪ FPGA‬ﻣﻦ‬
‫ﺗﺼﻨﻴﻊ ﺷﺮﻛﺔ ‪ Xilinx‬وﻫﻲ ‪ ،Virtex-4 SX25‬ﻣﻊ اﻷﺧﺬ ﺑﻌﲔ اﻻﻋﺘﺒﺎر أن ﲨﻴﻊ ﻫﺬﻩ اﻟﺸﺮاﺋﺢ ﳍﺎ ﻧﻔﺲ اﻟﻜﻠﻔﺔ‪.‬‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪82‬‬
‫‪21‬‬ ‫‪Chapter 1‬‬ ‫اﻟﻔﺼﻞ اﻷول |‬

‫اﻟﺸﻜﻞ‪ 131-1‬ﻣﻘﺎرﻧﺔ اﻷداء ﺑﲔ ﻣﻌﺎﰿ ‪ DSP‬وﺷﺮﳛﺔ ‪ FPGA‬ﳍﻤﺎ ﻧﻔﺲ اﻟﻜﻠﻔﺔ‬

‫دراﺳﺔ أﺧﺮى ﲤﺖ ﳌﻘﺎرﻧﺔ اﻷداء ﻧﺴﺒﺔ إﱃ اﻟﻜﻠﻔﺔ ﻟﺘﻄﺒﻴﻖ أﻛﺜﺮ ﺗﻌﻘﻴﺪاً وﻫﻮ ﻣﻌﺎﳉﺔ إﺷﺎرة ﻣﺮﺋﻴﺔ‪ .‬اﻟﺸﻜﻞ‪ 132-1‬ﻳﺒﲔ ﻣﻘﺎرﻧﺔ اﻷداء ﺑﲔ ﺷﺮﳛﺔ‬
‫‪ FPGA Spartan-3A‬وﻣﻌﺎﰿ ‪ 600MHz TI C64x+DSP‬ﻋﻠﻰ ﺗﻄﺒﻴﻖ ﻣﻌﺎﳉﺔ ‪ ،Video‬ﺣﻴﺚ أن ﺷﺮﳛﺔ اﻟـ‪ FPGA‬أﳒﺰت ﻣﻌﺎﳉﺔ‬
‫‪ 195frame/sec‬ﺑﺪﻗﺔ ‪ 720pixel‬ﰲ ﺣﲔ أن ﺷﺮﳛﺔ اﻟـ‪ DSP‬أﳒﺰت ﻣﻌﺎﳉﺔ ‪ 5.1frame/sec‬ﻓﻘﻂ ﻣﻦ أﺟﻞ ﻧﻔﺲ اﻟﺪﻗﺔ‪.‬‬

‫اﻟﺸﻜﻞ‪ 132-1‬ﻣﻌﺪل اﻷداء ﻟﺸﺮاﺋﺢ اﻟـ‪ FPGAs‬ﻳﻔﻮق ‪ 40‬ﺿﻌﻒ ﺷﺮاﺋﺢ اﻟـ‪DSPs‬‬

‫اﻟﺸﻜﻞ‪ 133-1‬ﻳﺒﲔ ﻣﻘﺎرﻧﺔ اﻷداء‪/‬اﻟﻜﻠﻔﺔ ﺑﲔ ﺷﺮﳛﺔ ‪ FPGA Spartan-3A‬وﻣﻌﺎﰿ ‪ 600MHz TI C64x+DSP‬ﻋﻠﻰ ﺗﻄﺒﻴﻖ‬
‫‪ ،Video‬ﺣﻴﺚ أن ﺷﺮﳛﺔ اﻟـ‪ FPGA‬ﻛﺎﻧﺖ أﻓﻀﻞ ﺑـ‪ 30‬ﻣﺮة ﻣﻦ ﺷﺮﳛﺔ اﻟـ‪ DSP‬ﻣﻦ أﺟﻞ ﻧﺴﺒﺔ اﻷداء إﱃ اﻟﺴﻌﺮ ﻟﻜﻞ ‪.frame/sec‬‬

‫اﻟﺸﻜﻞ‪ 133-1‬ﻧﺴﺒﺔ اﻷداء‪/‬اﻟﻜﻠﻔﺔ ﻟﻜﻞ ‪ Frame/sec‬ﻟﺸﺮاﺋﺢ اﻟـ‪ FPGAs‬أﻓﻀﻞ ﺑـ‪ 30‬ﻣﺮة ﻣﻦ ﺷﺮاﺋﺢ اﻟـ‪DSPs‬‬

‫إن ﺗﻘﻨﻴﺔ اﻟـ‪ FPGA‬ﺗﻌﺘﱪ ﻣﺆﺧﺮاً ﻣﻨﺼﺔ اﻟﺘﺼﻤﻴﻢ واﻟﺘﻄﻮﻳﺮ اﻟﺮﺋﻴﺴﻴﺔ واﳊﻞ اﻷﺳﺎﺳﻲ ﻟﻠﺘﻄﺒﻴﻘﺎت اﻟﱵ ﲢﺘﺎج ﻋﻤﻠﻴﺎت ﺣﺴﺎﺑﻴﺔ ﺗﻜﺮارﻳﺔ‬
‫ﻣﻌﻘﺪة]‪ [199-208‬وﺧﺼﻮﺻﺎً ﻋﻨﺪﻣﺎ ﻳﺘﻄﻠﺐ ﺑﻨﺎء ﻧﻈﺎم ذو أداء ٍ‬
‫ﻋﺎل ﺟﺪاً ﻓﻴﻤﻜﻦ ﻟﻠﻤﺼﻤﻤﲔ اﻻﺳﺘﻔﺎدة ﻣﻦ اﻷداء اﻟﻌﺎﱄ واﻟﻜﺜﺎﻓﺔ اﻟﺴﻴﻠﻴﻜﻮﻧﻴﺔ‬
‫ﻟﻠـ‪ FPGAs‬ﺑﺪﻻً ﻣﻦ اﺳﺘﺨﺪام ﺗﻘﻨﻴﺔ اﻟـ‪ [199]Multi-core-DSP‬ذات اﻟﺘﻌﻘﻴﺪات اﻟﻜﺒﲑة واﻟﻜﻠﻔﺔ اﻟﻌﺎﻟﻴﺔ‪ .‬إن ﺗﻘﻨﻴﺔ اﻟـ‪ FPGA‬ﲤﻠﻚ درﺟﺔ‬

‫‪83‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Embedded Systems‬‬ ‫اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ |‬

‫ﻋﺎﻟﻴﺔ ﻣﻦ ﻋﻤﻠﻴﺎت اﻟﺘﻨﻔﻴﺬ اﻟﺘﻔﺮﻋﻴﺔ )‪ (parallelism‬ﻛﻤﺎ أن ﺳﺮﻋﺔ اﻟﺘﻨﻔﻴﺬ ﳝﻜﻦ أن ﺗﺘﺠﺎوز ﺳﺮﻋﺔ ﻣﻌﺎﳉﺎت اﻷﻏﺮاض اﻟﻌﺎﻣﺔ اﻷﻋﻠﻰ ﻣﻨﻬﺎ‬
‫ﺗﺮدداً ﺑﺄﻛﺜﺮ ﻣﻦ ﻋﺸﺮة أﺿﻌﺎف]‪ .[202‬اﻟﺸﻜﻞ‪ 134-1‬ﻳﻮﺿﺢ ﻣﻘﺎرﻧﺔ ﺑﲔ ﺳﺮﻋﺔ أداء ﻣﻌﺎﰿ ‪ DSP‬وأداء ﺷﺮﳛﺔ ‪ FPGA‬ﻋﻠﻰ ﺧﻮارزﻣﻴﺔ‬
‫ﻣﺮﺷﺢ رﻗﻤﻲ ‪.256tap‬‬

‫‪ FPGA‬ﻋﻠﻰ ﺧﻮارزﻣﻴﺔ ﻣﺮﺷﺢ رﻗﻤﻲ ‪256-tap‬‬ ‫اﻟﺸﻜﻞ‪ 134-1‬ﻣﻘﺎرﻧﺔ ﺳﺮﻋﺔ اﻷداء ﳌﻌﺎﰿ ‪ DSP‬ﻣﻊ ﺷﺮﳛﺔ‬

‫ﺗﺆﻛﺪ أﻳﻀﺎً ﺷﺮﻛﺔ ﺣﻠﻮل اﻟﺘﺼﻤﻴﻢ ‪ BDTI‬ﻋﻠﻰ أن ﺗﻜﻨﻮﻟﻮﺟﻴﺎ اﻟـ‪ FPGA‬ﻟﻦ ﲢﻞ ﻓﻘﻂ ﻣﻜﺎن ﺗﻘﻨﻴﺔ اﻟـ‪ ،DSP‬وإﳕﺎ ﺳﻮف ﺗﺴﺘﺒﺪل اﻟﻌﺪﻳﺪ‬
‫ﻣﻦ اﻟﺘﻘﻨﻴﺎت اﻷﺧﺮى اﳌﺴﺘﺨﺪﻣﺔ ﺣﺎﻟﻴﺎً )…‪ (SoCs, DSPs, ASICs, ASSP, etc‬ﻋﻠﻰ ﻣﺪى اﻟﺴﻨﻮات اﻟﻘﺎدﻣﺔ‪ ،‬ﻛﻤﺎ أ�ﺎ ﺗﻠﻌﺐ دوراً‬
‫ﻫﺎﻣﺎً ﺰاﻳﺪ ﺑﺸﻜﻞ ﻣﺘﺴﺎرع ﰲ اﻟﻌﺪﻳﺪ ﻣﻦ اﺠﻤﻟﺎﻻت ﻣﺜﻞ‪ :‬اﻻﺗﺼﺎﻻت واﻟﺘﺤﻜﻢ وأﲝﺎث اﻟﻔﻀﺎء واﻟﺘﻄﺒﻴﻘﺎت اﻟﻌﺴﻜﺮﻳﺔ واﻟﺴﻴﺎرات‬
‫وﻏﲑﻫﺎ]‪ ،[194,195, 216‬وﻳﺘﻮﻗﻊ أن ﻳﺼﻞ ﻣﻌﺪل ﳕﻮ ﻫﺬﻩ اﻟﺘﻘﻨﻴﺔ ﰲ ﳎﺎل ﺻﻨﺎﻋﺔ اﻟﺴﻴﺎرات ووﺳﺎﺋﻞ اﻟﻨﻘﻞ )‪ (Automotive‬إﱃ ﻧﺴﺒﺔ ‪22%‬‬

‫ﺧﻼل اﻟﻌﻘﺪ اﻟﻘﺎدم]‪ .[196‬اﻟﺸﻜﻞ‪ 135-1‬ﻳﺒﲔ اﳌﻌﺪل اﳌﺘﻮﻗﻊ ﻻزدﻳﺎد اﺳﺘﺨﺪام ﺗﻘﻨﻴﺔ اﻟـ‪ FPGA‬ﰲ ﺻﻨﺎﻋﺔ اﻟﺴﻴﺎرات ووﺳﺎﺋﻞ اﻟﻨﻘﻞ ﺧﻼل‬
‫اﻟﻌﻘﺪ اﻟﻘﺎدم‪.‬‬

‫إن اﻟﺘﻄﺒﻴﻘﺎت اﻟﱵ ﺗﺴﺘﺨﺪم ﺗﻘﻨﻴﺔ اﻟـ‪ FPGA‬ﱂ ﺗﻌﺪ ﺗﻘﺘﺼﺮ ﻋﻠﻰ اﳊﺎﺟﺔ ﻷداء ٍ‬
‫ﻋﺎل ﻓﻘﻂ‪ ،‬وإﳕﺎ اﳊﺼﻮل ﻋﻠﻰ ﻧﻈﺎم ﻣﺪﻣﺞ ﻣﺘﻜﺎﻣﻞ ﻗﺎﺑﻞ‬
‫ﻟﻠﺘﻄﻮﻳﺮ ﺑﺸﻜﻞ ﻣﺮن‪ .‬ﻣﺆﺧﺮاً ﺗﺘﻤﻴﺰ ﺷﺮاﺋﺢ اﻟـ‪ FPGAs‬ﺑﺄ�ﺎ ﲤﻠﻚ ﻣﻌﺎﳉﺎت ﻣﺪﳎﺔ ﻣﺘﻌﺪدة ﻋﻠﻰ ﻧﻔﺲ اﻟﺸﺮﳛﺔ ﳝﻜﻦ اﺳﺘﺨﺪاﻣﻬﺎ ﻷﻏﺮاض‬
‫اﳌﻌﺎﳉﺔ اﻟﺘﺴﻠﺴﻠﻴﺔ اﻟﱰاﻛﻤﻴﺔ أو اﻟﺘﻜﺮارﻳﺔ )ﺧﻮارزﻣﻴﺎت اﻟﺘﺸﻔﲑ وﻓﻚ اﻟﺘﺸﻔﲑ(‪ ،‬وﻫﺬﻩ اﳌﻌﺎﳉﺎت ﻳﺘﻢ ﺑﺮﳎﺘﻬﺎ ﺑﻠﻐﺎت ﻋﺎﻟﻴﺔ اﳌﺴﺘﻮى ﻣﺜﻞ‪:‬‬
‫اﻟـ‪C/C++‬وﻫﻲ ﺗﻌﻤﻞ ﻋﻠﻰ اﻟﺘﻮازي ﻣﻊ اﺠﻤﻟﻤﻮﻋﺎت اﳌﻨﻄﻘﻴﺔ اﻷﺧﺮى]‪ .[197‬اﻟﺸﻜﻞ‪ 136-1‬ﻳﺒﲔ ﻣﻘﻄﻊ ﻟﻜﻮد ﺑﻠﻐﺔ اﻟـ‪ C‬ﻳﺒﲔ اﻟﻄﺒﻴﻌﺔ‬
‫اﻟﺘﻜﺮارﻳﺔ ﻟﺮوﺗﲔ ﻣﻌﺎﳉﺔ إﺷﺎرة رﻗﻤﻴﺔ‪ .‬اﳉﺪول‪ 14-1‬ﻳﺒﲔ ﻣﻘﺎرﻧﺔ ﺑﲔ اﳊﻠﻮل اﻟﺘﻜﻨﻮﻟﻮﺟﻴﺔ اﳌﺨﺘﻠﻔﺔ ﻟﺘﻄﺒﻴﻘﺎت ﻣﻌﺎﳉﺔ اﻹﺷﺎرة اﻟﺮﻗﻤﻴﺔ‪.‬‬

‫اﻟﺸﻜﻞ‪ 135-1‬ﻳﺒﲔ ﻣﻌﺪل ازدﻳﺎد اﺳﺘﺨﺪام ﺗﻘﻨﻴﺔ اﻟـ‪ FPGA‬اﳌﺘﻮﻗﻊ ﰲ ﳎﺎل اﻟـ‪Automotive‬‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪84‬‬
‫‪21‬‬ ‫‪Chapter 1‬‬ ‫اﻟﻔﺼﻞ اﻷول |‬

‫اﻟﺸﻜﻞ‪ 136-1‬ﻣﻘﻄﻊ ﺑﻠﻐﺔ اﻟـ‪ C‬ﻟﺮوﺗﲔ ﻣﻌﺎﳉﺔ إﺷﺎرة رﻗﻤﻴﺔ‬

‫‪Energy‬‬ ‫‪Design‬‬ ‫‪Program‬‬ ‫‪Developme‬‬ ‫‪DSP Tools‬‬

‫‪DSP Speed‬‬
‫‪Consumption‬‬ ‫‪Flexibility‬‬ ‫‪-mability‬‬ ‫‪nt Cost‬‬ ‫‪Support‬‬

‫‪Low End GPP‬‬ ‫‪Poor‬‬ ‫‪Medium‬‬ ‫‪Fair‬‬ ‫‪Excellent‬‬ ‫‪Low‬‬ ‫‪Poor‬‬

‫‪High End GPP‬‬ ‫‪Good‬‬ ‫‪High‬‬ ‫‪Fair‬‬ ‫‪Excellent‬‬ ‫‪Low‬‬ ‫‪Poor‬‬

‫‪DSPs‬‬ ‫‪Good‬‬ ‫‪Medium‬‬ ‫‪Fair‬‬ ‫‪Excellent‬‬ ‫‪Low‬‬ ‫‪Good‬‬

‫‪ASICs‬‬ ‫‪Very Good‬‬ ‫‪Low‬‬ ‫‪Poor‬‬ ‫‪Poor‬‬ ‫‪High‬‬ ‫‪Poor‬‬

‫‪ASSPs‬‬ ‫‪Very Good‬‬ ‫‪Low‬‬ ‫‪Poor‬‬ ‫‪Poor‬‬ ‫‪Low‬‬ ‫‪Poor‬‬

‫‪FPGAs‬‬ ‫‪Excellent‬‬ ‫‪Low‬‬ ‫‪Excellent‬‬ ‫‪Excellent‬‬ ‫‪Medium‬‬ ‫‪Good‬‬

‫اﳉﺪول‪ 14-1‬ﻣﻘﺎرﻧﺔ ﺑﲔ اﳊﻠﻮل اﻟﺘﻜﻨﻮﻟﻮﺟﻴﺔ اﳌﺨﺘﻠﻔﺔ ﻟﺘﻄﺒﻴﻘﺎت ﻣﻌﺎﳉﺔ اﻹﺷﺎرة اﻟﺮﻗﻤﻴﺔ‬

‫اﻟﻨﻘﻄﺔ اﻟﺴﻠﺒﻴﺔ اﻟﱵ ﲡﻌﻞ ﻧﻘﻞ اﻟﺘﻜﻨﻮﻟﻮﺟﻴﺎ إﱃ ﺷﺮاﺋﺢ اﻟـ‪ FPGAs‬ﺑﺎﻟﻨﺴﺒﺔ ﻟﺒﻌﺾ اﳊﻠﻮل اﻟﺘﻜﻨﻮﻟﻮﺟﻴﺔ اﳉﺎﻫﺰة ﻣﺜﻞ اﻟـ‪ ASSPs‬وﺑﻌﺾ‬
‫اﻟـ‪ ،DSPs‬ﻫﻮ ﻛﻮن ﻫﺬﻩ اﻟﺘﻘﻨﻴﺔ ﲢﺘﺎج إﱃ ﺧﱪة ﻛﺒﲑة ﺣﱴ ﻳﺘﻢ ﺑﻨﺎء ﺗﻄﺒﻴﻘﺎت ﻋﻠﻰ ﻣﺴﺘ ٍﻮ ٍ‬
‫ﻋﺎل ﻣﻦ اﻷداء واﻟﺘﺨﺼﺺ واﻷﻣﺜﻠﻴﺔ‪ .‬ﻟﺬا‪ :‬ﻓﺈن‬
‫اﳌﻮاﺟﻬﺔ اﻟﻴﻮم ﺑﲔ اﻟﺸﺮﻛﺎت اﻟﻌﻤﻼﻗﺔ اﳌﺼﻨﻌﺔ ﻟﺸﺮاﺋﺢ اﻟـ‪ FPGAs‬ﻟﻴﺲ ﻫﻮ ﻓﻘﻂ ﺗﻮﻓﲑ ﺷﺮاﺋﺢ ﲟﻴﺰات وأداء ﻛﺒﲑﻳﻦ‪ ،‬وإﳕﺎ ﺗﻮﻓﲑ ﺣﻠﻮل ﺑﺮﳎﻴﺔ‬
‫ﻜﻦ ﲨﻴﻊ ﻣﻬﻨﺪﺳﻲ ﺗﺼﻤﻴﻢ اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ ﻣﻦ ﺑﻨﺎء ﺗﻄﺒﻴﻘﺎﻬﺗﻢ – ﻣﻬﻤﺎ ﺗﻌﻘﺪت – ﺑﺄﻗﻞ وﻗﺖ وأدﱏ ﺟﻬﺪ ﳑﻜﻦ‪ .‬ﺛﻮرة اﳊﻠﻮل اﻟﱪﳎﻴﺔ ﰲ‬
‫اﻟﻘﺮن اﻟﻮاﺣﺪ واﻟﻌﺸﺮﻳﻦ ﻫﻲ ﺑﺮﳎﺔ اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت ﺑﺮﳎﻴﺔ ذات ﻣﺴﺘﻮ ﻋﺎل ﺗﺴﻤﻰ ﺑـ ‪Graphical Programming‬‬

‫‪ ،Language‬وذﻟﻚ ﻣﻦ ﺧﻼل واﺟﻬﺎت ﻣﺮﺋﻴﺔ وﺑﺎﺳﺘﺨﺪام ﺻﻨﺎدﻳﻖ وﻇﻴﻔﻴﺔ وﻫﺬا ﻣﺎ ﺳﻮف ﻳﻘﻮم ﻋﻠﻴﻪ ﻫﺬا اﻟﺒﺤﺚ ﰲ ﺟﺎﻧﺒﻪ اﻟﱪﳎﻲ‪.‬‬

‫إن ﺗﻘﻨﻴﺔ اﻟـ‪ FPGA‬اﻟﻴﻮم ﲤﻠﻚ ﻣﻘﻮﻣﺎت ﻛﺒﲑة ﲡﻌﻠﻬﺎ ﻗﺎدرة ﻋﻠﻰ ﺗﺒﲏ اﻷﻧﻈﻤﺔ اﳌﻌﻘﺪة‪ ،‬ﻛﻤﺎ أﻧﻪ ﻣﻦ ﺧﻼل رﺑﻂ اﻟﻌﺪﻳﺪ ﻣﻦ ﺷﺮاﺋﺢ‬
‫اﻟـ‪ FPGAs‬ﳝﻜﻦ اﳊﺼﻮل ﻋﻠﻰ ﻧﻈﺎم ﳛﻮي ﻋﻠﻰ ﻣﻼﻳﲔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ‪ ،‬وﻗﺎدر ﻋﻠﻰ اﺳﺘﻴﻌﺎب أﻋﻘﺪ اﻷﻧﻈﻤﺔ وﺑﺴﻌﺮ ﻣﻨﺎﻓﺲ‪ ،‬وﻫﺬﻩ اﳌﻴﺰة‬
‫ﺗﻌﺘﱪ اﳊﻞ اﻷﻣﺜﻞ ﻻﺳﺘﺒﺪال اﻷﻧﻈﻤﺔ اﳌﻌﻘﺪة اﻟﱵ ﺗﻌﺘﻤﺪ ﻋﻠﻰ ﺗﻘﻨﻴﺔ اﻟـ‪ ASIC‬ﻣﻦ ﺧﻼل ﺗﻘﺴﻴﻢ اﻟﻨﻈﺎم إﱃ ﳎﻤﻮﻋﺎت وﻇﻴﻔﻴﺔ ﺗﻌﺘﻤﺪ ﻋﻠﻰ‬
‫ﺷﺮاﺋﺢ اﻟـ‪.[198]FPGAs‬‬

‫إن ﻗﻮة ﺗﻘﻨﻴﺔ اﻟـ‪ FPGA‬اﻟﺬي ﻇﻬﺮت ﺑﺸﻜﻞ واﺿﺢ ﻣﺆﺧﺮاً ﺗﻜﻤﻦ ﰲ اﳌﻮارد اﻟﱵ ﰎ ﺗﻀﻤﻴﻨﻬﺎ ﻋﻠﻰ ﺷﺮﳛﺔ اﻟـ‪ FPGA‬ﻣﺜﻞ‪ :‬اﻟﻮﺣﺪات‬
‫اﻟﺬاﻛﺮﻳﺔ‪ ،‬وﺣﺪات اﻟـ‪ DSPs‬ووﺣﺪات اﳌﻌﺎﳉﺔ )ﻣﻌﺎﳉﺎت ‪ ،HW‬ﻣﻌﺎﳉﺎت ‪ (SW‬وﻏﲑﻫﺎ‪ ،‬ﻛﻤﺎ أن ﺷﺮاﺋﺢ اﻟـ‪ FPGA‬اﳊﺪﻳﺜﺔ أﺻﺒﺤﺖ‬
‫ﲤﻠﻚ ﻣﺎ ﻳﺰﻳﺪ ﻋﻦ ‪ 10‬ﻣﻠﻴﻮن ﺑﻮاﺑﺔ وﺗﻌﻤﻞ ﺑﱰدد ﻳﺼﻞ إﱃ ‪.[208]1GHz‬‬

‫‪85‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Embedded Systems‬‬ ‫اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ |‬

‫إن أﻧﻈﻤﺔ اﻟﺘﺤﻜﻢ ﺑﺎﻟﺰﻣﻦ اﳊﻘﻴﻘﻲ )‪ (Real-time‬ﻫﻲ ﻣﻦ اﻟﺘﻄﺒﻴﻘﺎت اﻟﱵ ﺗﺴﺘﺨﺪم ﺗﻘﻨﻴﺔ اﻟـ‪ FPGA‬ﻣﺆﺧﺮاً؛ ﻟﻜﻮ�ﺎ ﺗﺘﻄﻠﺐ اﺳﺘﺠﺎﺑﺔً ﻋﺎﻟﻴﺔ‬
‫ﻋﻨﺪ ﻣﺴﺘﻮﻳﺎت ﺣﺮﺟﺔ‪ .‬ﰲ ﻫﺬﻩ اﻷﻧﻈﻤﺔ ﺗﺴﺘﺨﺪم ﺗﻘﻨﻴﺔ اﻟـ‪ FPGA‬ﻛﺒﺪﻳﻞ ﻟﺘﻘﻨﻴﺔ اﻟـ‪ DSP‬وﺗﻘﻨﻴﺔ اﻟـ‪SoC‬؛ إذ ﺗﻮﻓﺮ ﺗﻘﻨﻴﺔ اﻟـ‪ FPGA‬أداءً أﻋﻠﻰ‬
‫وﻣﺮوﻧﺔ ﻛﺒﲑة ﰲ إﻋﺎدة ﺗﺸﻜﻴﻞ ﻧﻈﺎم اﻟﺘﺤﻜﻢ ﻣﺜﻞ أﻧﻈﻤﺔ اﻟﺘﺤﻜﻢ]‪ [200, 215‬وأﻧﻈﻤﺔ اﻟﻘﻴﺎدة اﳌﺘﻘﺪﻣﺔ ﻟﻠﻤﺤﺮﻛﺎت]‪.[209‬‬

‫ﻋﻠﻰ ﻣﺴﺘﻮى ﺗﻘﻨﻴﺔ اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ ﻋﻠﻰ ﺷﺮاﺋﺢ‪ ،‬ﻓﺈن ﻣﻌﻈﻢ اﳊﻠﻮل واﻟﺘﺼﺎﻣﻴﻢ اﻟﱵ ﺗﻌﺘﻤﺪ ﺗﻘﻨﻴﺔ اﻟـ‪ SoCs‬ﻳﺘﻢ ﺗﺼﻤﻴﻤﻬﺎ ﺑﺎﻻﻋﺘﻤﺎد ﻋﻠﻰ‬
‫اﳌﺼﻔﻮﻓﺎت اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً )‪ ،(FPGA‬وذﻟﻚ ﻷ�ﺎ ﺗﻮﻓﺮ وﻗﺘﺎً ﻛﺒﲑاً ﰲ ﻋﻤﻠﻴﺔ اﻟﺘﺼﻤﻴﻢ واﻟﺘﺤﻘﻖ ﻛﻤﺎ ﺗﺸﲑ اﻟﺪراﺳﺎت إﱃ أن ﺗﻘﻨﻴﺔ‬
‫اﻟـ‪ FPGA‬ﺳﻮف ﺗﻘﻮم ﻣﻜﺎن ﺗﻘﻨﻴﺔ اﻟـ‪ SoC‬وﻣﻌﻈﻢ اﻟﺘﻄﺒﻴﻘﺎت اﻟﱵ ﺗﺴﺘﺨﺪم ﺗﻘﻨﻴﺔ اﻟـ‪ ASIC‬ﻛﺤﻞ ﺗﺼﻤﻴﻤﻲ ﻟﺘﻘﻨﻴﺔ اﻟـ‪.[210]SoC‬‬

‫اﻟﺘﻘﺮﻳﺮ اﻷﺧﲑ ﻟـ‪ [211]Gartner‬ﻳﺸﲑ إﱃ أن ﻣﻦ أﺣﺪ اﻷﺳﺒﺎب اﻟﱵ ﺗﺴﺒﺒﺖ ﰲ ﻗﻴﺎم ﻛﺜﲑ ﻣﻦ اﻟﺸﺮﻛﺎت اﻟﱵ ﺗﺴﺘﺨﺪم ﺗﻘﻨﻴﺔ اﻟـ‪ ASIC‬ﺑﺈﻟﻐﺎء‬
‫اﻟﻌﺪﻳﺪ ﻣﻦ اﳌﺸﺎرﻳﻊ اﻟﱵ ﺗﻌﺘﻤﺪ ﻋﻠﻰ ﺗﻘﻨﻴﺔ اﻟـ‪ ASIC‬ﻫﻮ اﻷزﻣﺔ اﳌﺎﻟﻴﺔ اﻟﻌﺎﳌﻴﺔ اﻟﱵ ﺣﺪﺛﺖ ﰲ أواﺧﺮ ﻋﺎم ‪ ،2008‬ﺣﻴﺚ أن ﻫﺬﻩ اﻟﺸﺮﻛﺎت‬
‫ﻛﺎن ﻟﺪﻳﻬﺎ ﲣﻮف ﻛﺒﲑ ﻣﻦ ﺗﺮاﺟﻊ ﻣﻌﺪﻻت ﺷﺮاء اﻟﻌﻨﺎﺻﺮ اﻹﻟﻜﱰوﻧﻴﺔ ﰲ اﻷﺳﻮاق‪ .‬اﻟﻨﺘﺎﺋﺞ ﻛﺎﻧﺖ اﳔﻔﺎض ﻧﺴﺒﺔ اﳌﺸﺎرﻳﻊ اﻟﱵ ﺗﺴﺘﺨﺪم ﺗﻘﻨﻴﺔ‬
‫‪30 FPGA‬‬ ‫‪97% FPGA‬‬
‫‪.‬‬ ‫≫‬ ‫اﻟـ‪ ASIC‬ﺑـ‪ ،22%‬واﺳﺘﺒﺪاﳍﺎ ﺑﺘﻘﻨﻴﺔ اﻟـ‪ .FPGA‬ﻣﻊ ﲤﻜﻦ ﺗﻘﻨﻴﺔ اﻟـ‪ FPGA‬ﻓﺈن اﻟﻨﺴﺒﺔ أﺻﺒﺤﺖ‬
‫‪1‬‬ ‫‪ASIC‬‬ ‫‪03% ASIC‬‬
‫اﻟﺸﻜﻞ‪ 137-1‬ﻳﺒﲔ ﻣﻌﺪل اﻟﺘﺼﺎﻣﻴﻢ )اﳌﺸﺎرﻳﻊ( اﻟﱵ ﺗﻌﺘﻤﺪ ﺗﻘﻨﻴﺔ اﻟـ‪ ASIC‬ﻧﺴﺒﺔ إﱃ اﻟﺘﺼﺎﻣﻴﻢ اﻟﱵ ﺗﻌﺘﻤﺪ ﺗﻘﻨﻴﺔ اﻟـ‪.FPGA‬‬

‫‪3%‬‬

‫‪FPGA Design‬‬
‫‪97%‬‬ ‫‪ASICs Design‬‬

‫اﻟﺸﻜﻞ‪FPGA to ASIC Design Ratio 137-1‬‬

‫إن ﺗﻘﻨﻴﺔ اﻟـ‪ FPGA‬ﻻ ﺗﻘﺘﺼﺮ ﻓﻘﻂ ﻋﻠﻰ اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ‪ ،‬وإﳕﺎ أﺻﺒﺤﺖ ﺗﺴﺘﺨﺪم ﰲ اﻷﺟﻬﺰة اﳊﺎﺳﻮﺑﻴﺔ ﻋﺎﻟﻴﺔ اﻷداء‪ ،‬ﺣﻴﺚ ﺗﺴﺘﺨﺪم‬
‫ﺷﺮاﺋﺢ ‪ FPGAs‬ﻛﻤﺘﺤﻜﻤﺎت رﺋﻴﺴﻴﺔ ﰲ إدارة وﺗﻨﻈﻴﻢ ﻋﻤﻞ اﻟﻮﺣﺪات اﶈﻴﻄﻴﺔ ﺑﻴﻨﻬﺎ وﺑﲔ اﳌﻌﺎﰿ‪ ،‬وﺑﺎﻟﺘﺎﱄ ﲢﺴﻦ ﰲ زﻣﻦ وﺳﻌﺔ اﳌﻌﺎﳉﺔ‬
‫وﲡﻌﻞ اﻟـ‪ Switchback‬ﻋﻠﻰ درﺟﺔ ﻋﺎﻟﻴﺔ ﻣﻦ اﻟﺪﻳﻨﺎﻣﻴﻜﻴﺔ]‪ .[212‬اﻟﺸﻜﻞ‪ 138-1‬ﻳﺒﲔ اﻻﺧﺘﻼف ﺑﲔ ﺑﻨﻴﺔ اﳊﻮاﺳﺐ اﻟﻘﻴﺎﺳﻴﺔ )ﻋﻠﻰ اﻟﻴﺴﺎر(‬
‫وﺑﻨﻴﺔ اﳊﻮاﺳﺐ اﳌﻄﻮرة واﻟﱵ ﺗﺴﺘﺨﺪم اﻟـ‪.FPGAs‬‬

‫اﻟﺸﻜﻞ‪ 138-1‬اﻻﺧﺘﻼف ﺑﲔ ﺑﻨﻴﺔ اﳊﻮاﺳﺐ اﻟﻘﻴﺎﺳﻴﺔ وﺑﻨﻴﺔ اﳊﻮاﺳﺐ اﳌﻄﻮرة واﻟﱵ ﺗﺴﺘﺨﺪم اﻟـ‪FPGAs‬‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪86‬‬
‫‪21‬‬ ‫‪Chapter 1‬‬ ‫اﻟﻔﺼﻞ اﻷول |‬

‫ﻣﺆﺧﺮاً‪ ،‬ﺗﻌﻤﻞ ﻣﺮاﻛﺰ اﻷﲝﺎث ﰲ أورﺑﺎ وأﻣﺮﻳﻜﺎ ﻋﻠﻰ ﻣﺎ ﻳﺴﻤﻰ ﺑـ‪) Liquid-circuits‬اﻟﺪارات اﻟﺴﺎﺋﻠﺔ(‪ .‬ﻫﺬﻩ اﻟﺘﺴﻤﻴﺔ ﺗﻄﻠﻖ ﻋﻠﻰ ﻧﻈﺎم‬
‫ﻣﺪﻣﺞ ﻳﻌﺘﻤﺪ ﻋﻠﻰ ﺗﻘﻨﻴﺔ اﻟـ‪ ،FPGA‬وﻳﻌﻤﻞ ﻛﻤﺴﺮع أداء ﻣﺘﻌﺪد اﳌﻬﺎم ﻋﻠﻰ ﻣﺴﺘﻮى اﻟﻜﻴﺎن اﻟﺼﻠﺐ ) ‪Automated Dynamic‬‬

‫‪ .(Hardware Acceleration‬ﻳﻮﺿﻊ ﻫﺬا اﻟﻨﻈﺎم ﰲ ﺟﻬﺎز ﺣﺎﺳﺐ وﻳﻘﻮم ﻋﻠﻰ إﻋﺎدة ﺑﺮﳎﺘﻪ‪/‬ﺗﻴﺌﺘﻪ ذاﺗﻴﺎً )‪ (Reconfigurable‬وﻓﻘﺎً‬
‫ﻟﻠﺘﻄﺒﻴﻖ اﻟﺬي ﻳﻘﻮم اﳌﺴﺘﺨﺪم ﺑﺘﺸﻐﻴﻠﻪ‪ .‬ﻓﺈذا ﻛﺎن اﳌﻄﻠﻮب ﺗﺸﻐﻴﻞ ﺑﺮﻧﺎﻣﺞ ﻣﻌﺎﳉﺔ ﺻﻮر ﺛﻨﺎﺋﻲ اﻷﺑﻌﺎد ﻣﺜﻞ‪ ،Photoshop, Corel :‬ﻓﺈن‬
‫ﻟﻨﻈﺎم ﻳﻘﻮم ﺑﺈﻋﺎدة ﻬﺗﻴﺌﺘﻪ ذاﺗﻴﺎً ﻟﻴﻌﻤﻞ ﻛﻜﻴﺎن ﺻﻠﺐ داﻋﻢ ﳌﻌﺎﳉﺔ رﺳﻮﻣﻴﺎت ﺛﻨﺎﺋﻴﺔ اﻷﺑﻌﺎد‪ ،‬وإذا ﻛﺎن اﳌﻄﻠﻮب ﺗﺸﻐﻴﻞ ﺑﺮﻧﺎﻣﺞ ﻣﻌﺎﳉﺔ ﺛﻼﺛﻴﺔ‬
‫اﻷﺑﻌﺎد ﻣﺜﻞ‪ 3D-MAX :‬ﻓﺈن اﻟﻨﻈﺎم ﺳﻴﻌﻴﺪ ﻬﺗﻴﺌﺘﻪ ﻟﻴﻌﻤﻞ ﻛﻤﺴﺮع رﺳﻮم ﺛﻼﺛﻴﺔ اﻷﺑﻌﺎد وﻫﻜﺬا]‪...[213-214‬‬

‫‪87‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Embedded Systems‬‬ ‫اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ |‬

‫‪ 17-1‬اﻟﺨﻼﺻﺔ )‪:(Conclusion‬‬
‫ ﲨﻴﻊ ﻣﺎ ﺗﻘﺪم ﰲ ﻫﺬا ا ﻟﻔﺼﻞ ﻫﻮ ﻟﺒﻴﺎن أﳘﻴﺔ اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ وﳎﺎﻻﻬﺗﺎ وﺣﻠﻮﳍﺎ اﳌﺘﻌﺪدة‪ ،‬وذﻟﻚ ﻬﺑﺪف ﺗﺒﲏ ﻣﻨﺎﻫﺞ ﺗﻌﻠﻴﻤﻴﺔ ﺗﻮاﻓﻖ‬
‫ﻣﺘﻄﻠﺒﺎت اﻟﺘﻘﺪم اﻟﺘﻜﻨﻮﻟﻮﺟﻲ‪.‬‬

‫ﳑﺎ ﻇﻬﺮ ﺟﻠﻴﺎً ﰲ ﻫﺬا اﻟﻔﺼﻞ أﻳﻀﺎً أن ﺗﻘﻨﻴﺔ اﻟـ‪ FPGA‬ﻫﻲ اﻟﺘﻘﻨﻴﺔ اﻟﱵ ﲢﺘﻞ أﻋﻠﻰ اﻷوﻟﻮﻳﺎت ﻛﺤﻞ ﺗﻜﻨﻮﻟﻮﺟﻲ ﻣﺮﺣﻠﻲ وﻣﺴﺘﻘﺒﻠﻲ ﳌﻌﻈﻢ‬
‫ﺗﻄﺒﻴﻘﺎت اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ ﺑﻜﺎﻓﺔ ﻓﺮوﻋﻬﺎ ﻣﻦ ﺗﻄﺒﻴﻘﺎت ﺻﻨﺎﻋﻴﺔ وﻃﺒﻴﺔ وﻋﺴﻜﺮﻳﺔ وﺧﺪﻣﻴﺔ وﻏﲑﻫﺎ‪.‬‬

‫إن اﳌﺴﺄﻟﺔ ﻻ ﺗﻘﺘﺼﺮ ﻓﻘﻂ ﻋﻠﻰ إﻧﺸﺎء ﻣﻨﺎﻫﺞ ﺗﻌﻠﻴﻤﻴﺔ وﻣﻘﺮرات ﺗﺪرﻳﺴﻴﺔ‪ ،‬وإﳕﺎ ﳚﺐ أن ﻳﺮاﻋﻰ ﰲ ﻫﺬﻩ اﳌﻨﺎﻫﺞ ﺣﺎﺟﺔ اﻟﺘﻄﻮر اﻟﺘﻜﻨﻮﻟﻮﺟﻲ‬
‫واﻟﺼﻨﺎﻋﺔ اﶈﻠﻴﺔ ﺑﺎﻟﺪرﺟﺔ اﻷوﱃ‪ .‬ﻫﺬا ﻫﻮ اﻟﺴﺒﺐ اﻟﺬي ﳔﺼﺺ ﻟﻪ ﻫﺬا اﻟﺒﺤﺚ‪.‬‬

‫اﳌﻔﺎرﻗﺔ ﰲ ﻫﺬا اﻟﻔﺼﻞ أﻧﲏ ﻛﻨﺖ ﻗﺪ ﻋﻘﺪت اﻟﻌﺰم ﻋﻠﻰ إﻧﺸﺎءﻩ ﳐﺘﺼﺮاً ﰲ ﲬﺲ ﻋﺸﺮة ﺻﻔﺤﺔ‪ ،‬وﻟﻜﻦ اﻟﻘﻠﻢ ﺟﺮى ﺑﺎﻟﻜﻠﻤﺎت ﻓﺴﺎﻟﺖ ﻋﻠﻰ‬
‫اﻟﺼﻔﺤﺎت ﺣﱴ ﺑﻠﻐﺖ ﻣﻨﺘﻬﺎﻫﺎ ﰲ اﻟﺼﻔﺤﺔ اﻟﺜﺎﻟﺜﺔ واﻟﺘﺴﻌﲔ‪ ،‬وﻣﺎزال اﻟﺘﻮق اﻟﺸﺪﻳﺪ إﱃ اﳌﺰﻳﺪ ﳚﻨﺢ ﲟﺠﺎﻣﻊ اﻟﻘﻠﻢ أن ﳜﻮض اﳌﺰﻳﺪ‪ ،‬وﻟﻜﺄﱐ‬
‫أﻛﺘﺐ أرﺟﻮزة ﻣﺎﻟﻜﻴﺔ‪ ،‬وﻣﺎ ذاك إﻻ ﻟﻜﻮن ﻫﺬا اﻟﺘﺨﺼﺺ ﻛﺜﲑ اﻟﺘﻔﺮﻋﺎت‪ ،‬وﻻ ﻳﻮﺟﺪ إﱃ اﻵن ﺗﺮﲨﺎت أو أﲝﺎث ﻋﻠﻤﻴﺔ ﺗﻘﺪﻣﻪ ﳎﻤﻮﻋﺎً‬
‫ﻣﻔﺮوﻗﺎً ﻣﻮﺟﺰاً ﳐﺘﺼﺮاً ﻣﺸﺬﺑﺎً ﻣﻬﺬﺑﺎً ﻣﺴﻨﺪاً ﲟﺮاﺟﻊ ﻋﺪﻳﺪة ﻛﻤﺎ ﺣﺎوﻟﻨﺎ ﺟﺎﻫﺪﻳﻦ أن ﻧﻔﻌﻞ ﻫﺎﻫﻨﺎ ﻓﺂﻻف اﻟﺼﻔﺤﺎت ﲨﻌﺖ ﲬﺮﻬﺗﺎ ﻣﻌﺼﻮرةً‬
‫ﺑﻜﺮاً ﻣﻌﺘﻘﺔً ﺑﲔ ﻫﺬﻩ اﻟﺴﻄﻮر‪.‬‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪88‬‬
 ‫اﻟﻔﺼﻞ اﻟﺜﺎﻧﻲ‬ ‫‪Chapter 2‬‬

‫‪@�bÓ‹‘y@Ú™5‹€@Ú‹ib‘€a@ÚÓ‘�‰æa@pbœÏ–óæa‬‬

‫‪FIELD PROGRAMMABLE GATE ARRAYS‬‬

‫ﻧﻈﺮة ﻋﺎﻣﺔ )‪:(Overview‬‬

‫ﻳﻘـ ـ ــﺪم ﻫـ ـ ــﺬا اﻟﻔﺼـ ـ ــﻞ ﺑﺎﻗﺘﻀـ ـ ــﺎب ﺷـ ـ ــﺮﺣﺎً واﻓﻴ ـ ـ ـﺎًﻛﺎﻓﻴ ـ ـ ـﺎً ﻟﺪراﺳـ ـ ــﺔ ﺗﻘﻨﻴـ ـ ــﺔ اﳌﺼـ ـ ــﻔﻮﻓﺎت اﳌﻨﻄﻘﻴ ـ ــﺔ اﻟﻘﺎﺑﻠ ـ ــﺔ ﻟﻠﱪﳎ ـ ــﺔ ﺣﻘﻠﻴـ ـ ـﺎً‪ .‬ﻳﺸ ـ ــﺮع اﻟﻔﺼ ـ ــﻞ ﺑﻌ ـ ــﺮض‬
‫ﻟﺘﻄﺒﻴﻘ ـ ــﺎت اﳌﺼ ـ ــﻔﻮﻓﺎت اﳌﻨﻄﻘﻴ ـ ــﺔ اﻟﻘﺎﺑﻠ ـ ــﺔ ﻟﻠﱪﳎ ـ ــﺔ ﺣﻘﻠﻴـ ـ ـﺎً ﰲ اﻷﻧﻈﻤ ـ ــﺔ اﳌﺪﳎ ـ ــﺔ وﻓﺮوﻋﻬـ ــﺎ‪ ،‬ﰒ ﻳﺸـ ــﲑ إﱃ ﺑﻌـ ــﺾ اﻷﲝـ ــﺎث اﳍﺎﻣـ ــﺔ ﺟـ ــﺪاً واﳌﺮﺗﺒﻄـ ــﺔ‬
‫ﺑﺎﻟﺘﻄﺒﻴﻘ ـ ـ ــﺎت اﳌﺘﻘﺪﻣ ـ ـ ــﺔ اﻟ ـ ـ ــﱵ ﺗﺴ ـ ـ ــﺘﺨﺪم ﻫ ـ ـ ــﺬﻩ اﻟﺘﻘﻨﻴ ـ ـ ــﺔ‪ .‬ﻳﺘﻄ ـ ـ ــﺮق اﻟﻔﺼ ـ ـ ــﻞ ﺑﻌ ـ ـ ــﺪﻫﺎ إﱃ اﺳـ ـ ــﺘﺨﺪام ﻫـ ـ ــﺬﻩ اﻟﺘﻘﻨﻴـ ـ ــﺔ ﰲ ﻣﻨـ ـ ــﺎﻫﺞ اﻟﺘﻌﻠـ ـ ــﻴﻢ اﳍﻨﺪﺳـ ـ ــﻲ‬
‫اﳉ ـ ـ ـﺎﻣﻌﻲ ﺑﻜﺎﻓـ ـ ــﺔ ﻓﺮوﻋـ ـ ــﻪ‪ ،‬وﻳﺒـ ـ ــﲔ اﳊﺎﺟـ ـ ــﺔ اﳌﻠﺤـ ـ ــﺔ إﱃ ﺗﺒـ ـ ــﲏ ﻫـ ـ ــﺬﻩ اﻟﺘﻘﻨﻴـ ـ ــﺔ ﰲ اﳌﻨـ ـ ــﺎﻫﺞ اﻟﺘﻌﻠﻴﻤﻴ ـ ــﺔ اﳉﺎﻣﻌﻴ ـ ــﺔ‪ ،‬ﰒ ﻳﺒﺤ ـ ــﺚ ﺣﺎﺟ ـ ــﺔ اﻟﺼ ـ ــﻨﺎﻋﺔ ﻣ ـ ــﻦ‬
‫اﻟﺘﻌﻠ ـ ـ ــﻴﻢ اﳍﻨﺪﺳ ـ ـ ــﻲ‪ .‬ﻳﻨﺘﻘ ـ ـ ــﻞ اﻟﻔﺼ ـ ـ ــﻞ ﰲ ﻗﺴ ـ ـ ــﻤﻪ اﻟﺜ ـ ـ ــﺎﱐ إﱃ ﺗﻔﺼ ـ ـ ــﻴﻞ ﻣﻘﺘﻀ ـ ـ ــﺐ ﳌﺒ ـ ـ ــﺎدئ اﻟﻌﻨﺎﺻـ ـ ــﺮ اﳌﻨﻄﻘﻴـ ـ ــﺔ اﻟﻘﺎﺑﻠـ ـ ــﺔ ﻟﻠﱪﳎـ ـ ــﺔ‪ ،‬ﻓﻴﻘـ ـ ــﺪم أﺻـ ـ ــﻮﳍﺎ‬
‫ﻓﺮوﻋﻬﺎ‪ ،‬وﻳﺘﻨﺎول ﺗﺼﻨﻴﻔﺎﻬﺗﺎ‪ ،‬وﻳﺸﺮح ﺑﻨﺎﻫﺎ‪ ،‬وﻳﻘﺎرن ﻓﻴﻤﺎ ﺑﻴﻨﻬﺎ‪ ،‬ﰒ ﻳﻌﺘﲏ ﲟﺮاﺣﻞ ﺗﺼﻤﻴﻤﻬﺎ وﻃﺮاﺋﻖ ﺑﺮﳎﺘﻬ ـ ـ ـ ـ ـ ـ ـ ـ ـﺎ‪.‬‬

‫ﺗﻤﻬﻴﺪ )‪:(Preface‬‬ ‫‪1-2‬‬

‫ﻣﻊ اﻻزدﻳﺎد اﳌﺴﺘﻤﺮ ﰲ ﻋﺪد اﻟﱰاﻧﺰﺳﺘﻮرات اﻟﱵ ﳝﻜﻦ أن ﺗﻮﺿﻊ ﻋﻠﻰ ﺷﺮﳛﺔ‪ ،‬واﻟﺬي ﲡﺎوز ﻣﺆﺧﺮاً اﻟـ‪ 2-bilion‬ﺗﺮاﻧﺰﺳﺘﻮر‪ ،‬ﻓﺈن ﻋﻤﻠﻴﺔ اﻟﺘﺤﻘﻖ‬
‫)‪ (Verification‬ﻣﻦ ﳐﻄﻄﺎت اﻟﺘﺼﻤﻴﻢ ﻋﻠﻰ اﳌﺴﺘﻮى اﻟﺴﻴﻠﻴﻜﻮﱐ أﺻﺒﺤﺖ أﻣﺮاً ﰲ ﻏﺎﻳﺔ اﻟﺘﻌﻘﻴﺪ ﻳﺘﻄﻠﺐ ﻛﻠﻔﺔ ﻋﺎﻟﻴﺔ ﺟﺪاً‪ ،‬ﻛﻤﺎ أن ﻋﻤﻠﻴﺔ‬
‫ﺗﻄﻮﻳﺮ ﳕﻮذج أوﱄ ﰲ اﻷﻧﻈﻤﺔ اﻟﺮﻗﻤﻴﺔ اﳌﺘﻘﺪﻣﺔ – ﻣﺜﻞ‪ – VLSI :‬ﻳﺘﻄﻠﺐ ﺗﻄﺒﻴﻖ ﻣﺮاﺣﻞ اﻟﺘﺼﻤﻴﻢ واﻟﺘﺤﻘﻖ ﻛﺎﻣﻠﺔً إﺿﺎﻓﺔً إﱃ ﲢﻀﲑ ﻃﺒﻘﺎت‬
‫اﻷﻗﻨﻌﺔ )‪ ،(Masks‬واﻟﺬي ﺑﺪورﻩ ﻳﺘﻄﻠﺐ ﻛﻠﻔﺔ ﺗﺄﺳﻴﺴﻴﺔ ﻋﺎﻟﻴﺔ ﻗﺪ ﺗﺼﻞ إﱃ ﻋﺸﺮات ﺑﻞ ﻣﺌﺎت آﻻف اﻟﺪوﻻرات‪ ،‬وﻣﺪة زﻣﻨﻴﺔ ﻛﺒﲑة ﺗﱰاوح‬
‫ﻣﻦ ‪ 4‬إﱃ ‪ 12‬أﺳﺒﻮع‪ .‬ﻋﻼوةً ﻋﻠﻰ ذﻟﻚ ﻓﺈن اﻟﻨﻤﻮذج اﻷوﱄ ﻳﺘﻄﻠﺐ ﲢﺪﻳﺪ اﻟﺼﻴﻐﺔ اﻟﻨﻬﺎﺋﻴﺔ ﻟﻌﻨﺎﺻﺮ اﻟﺘﺼﻤﻴﻢ وﺑﺎراﻣﱰاﺗﻪ اﻟﻜﺎﻣﻠﺔ‪ ،‬ﻛﻤﺎ ﻟﻮ أﻧﻪ‬
‫ﺳﻴﻌﻤﻞ ﰲ ﺻﻴﻐﺘﻪ اﻟﻨﻬﺎﺋﻴﺔ ﻛﻤﻨﺘﺞ ﺟﺎﻫﺰ‪ ،‬وﺑﺎﻟﺘﺎﱄ ﻓﺈن أي ﺗﻌﺪﻳﻞ ﰲ اﳌﻴﺰات أو أي ﺗﻨﻘﻴﺢ ﰲ اﻟﺘﺼﻤﻴﻢ ﺳﻴﺘﻄﻠﺐ إﻋﺎدة ﺑﻨﺎء اﳌﺮاﺣﻞ ﻛﺎﻓﺔً‪،‬‬
‫واﻧﺘﻈﺎر ﻣﺪة زﻣﻨﻴﺔ ﻛﺒﲑة ودﻓﻊ اﻟﻜﻠﻔﺔ اﻟﺘﺄﺳﻴﺴﻴﺔ ﻟﺘﺤﻀﲑ اﻟﻨﻤﻮذج اﳉﺪﻳﺪ ﻗﺒﻞ اﻟﻮﺻﻮل إﱃ اﻟﻨﻤﻮذج اﻟﻨﻬﺎﺋﻲ اﻟﺬي ﳝﻜﻦ ﻧﻘﻠﻪ إﱃ ﻣﺮﺣﻠﺔ‬
‫اﻟﺘﺼﻨﻴﻊ ﻋﻠﻰ ﻧﻄﺎق واﺳﻊ‪ ،‬واﻟﱵ ﺗﻜﻠﻒ ﻣﻼﻳﲔ اﻟﺪوﻻرات‪.‬‬

‫إن ﺗﻘﻨﻴﺔ اﳌﺼﻔﻮﻓﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً )‪ (FPGA‬ﺗﺄﰐ ﻫﻨﺎ ﻟﺘﺘﺨﻄﻰ ﻫﺬﻩ اﻟﻌﻘﺒﺎت واﳌﺸﺎﻛﻞ‪ ،‬ﺣﻴﺚ أن ﻣﻴﺰة إﻋﺎدة ﺗﺸﻜﻴﻞ‬
‫اﻟﻜﻴﺎن اﻟﺼﻠﺐ ﻟﺸﺮاﺋﺢ اﻟـ‪ FPGA‬ﻣﻦ ﻗﺒﻞ اﳌﺴﺘﺨﺪم ﺗﺘﻴﺢ إﻣﻜﺎﻧﻴﺔ ﺑﻨﺎء ﳕﺎذج أوﻟﻴﺔ ﻣﺘﻌﺪدة ﰲ ﻣﺮاﺣﻞ ﻣﺒﻜﺮة ﻣﻦ اﻟﺘﺼﻤﻴﻢ دون اﳊﺎﺟﺔ إﱃ‬
‫وﺿﻊ اﻟﺼﻴﻐﺔ اﻟﻨﻬﺎﺋﻴﺔ اﻟﻜﺎﻣﻠﺔ ﻟﻠﺘﺼﻤﻴﻢ‪ ،‬ﻛﺬﻟﻚ ﻓﺈن ﻫﺬﻩ اﻟﺘﻘﻨﻴﺔ ﺗﺘﻴﺢ إﻣﻜﺎﻧﻴﺔ اﻟﺘﺤﻘﻖ ﻣﻦ ﺳﻠﻮك اﻟﻨﻈﺎم ﻋﻠﻰ اﻟﻜﻴﺎن اﻟﺼﻠﺐ ﻗﺒﻞ ﺗﺼﻨﻴﻌﻪ‪،‬‬
‫وﺑﺎﻟﺘﺎﱄ ﻓﺈن ﻣﺴﺎﺋﻞ ﺗﻌﺪﻳﻞ ﺑﺎراﻣﱰات اﻟﻨﻈﺎم أو إﺿﺎﻓﺔ ﻣﻴﺰات ﺟﺪﻳﺪة أو ﺗﻌﺪﻳﻠﻬﺎ؛ ﻟﻦ ﻳﺘﻄﻠﺐ إﻋﺎدة ﻣﺮاﺣﻞ اﻟﺘﺼﻤﻴﻢ اﳌﺮﻫﻘﺔ ﺑﺎﻟﻜﺎﻣﻞ واﻧﺘﻈﺎر‬
‫ﻣﺪة ﻃﻮﻳﻠﺔ ودﻓﻊ ﺗﻜﺎﻟﻴﻒ ﺑﺎﻫﻈﺔ‪.‬‬
 ‫اﳌﺼﻔﻮﻓﺎت اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً | ‪Field Programmable Gate Arrays‬‬

‫اﻟﻴﻮم‪ ،‬ﱂ ﻳﻌﺪ اﺳﺘﺨﺪام ﺗﻘﻨﻴﺔ اﻟـ‪ FPGA‬ﻳﻘﺘﺼﺮ ﻓﻘﻂ ﻋﻠﻰ ﺗﺼﻤﻴﻢ وﺗﻄﻮﻳﺮ اﻟﻨﻤﺎذج اﻷوﻟﻴﺔ ﻗﺒﻞ ﻣﺮﺣﻠﺔ اﻟﺘﺼﻨﻴﻊ ﻋﻠﻰ ﻧﻄﺎق واﺳﻊ‪ ،‬وإﳕﺎ‬
‫أﺻﺒﺤﺖ ﻫﺬﻩ اﻟﺘﻘﻨﻴﺔ ﺗﺴﺘﺨﺪم ﰲ اﻟﺘﻄﺒﻴﻘﺎت اﻟﺘﺠﺎرﻳﺔ اﻟﱵ ﻳﺴﺘﺨﺪﻣﻬﺎ اﳌﺴﺘﻬﻠﻚ ﰲ اﻷﻣﻮر اﳊﻴﺎﺗﻴﺔ اﻟﻴﻮﻣﻴﺔ‪.‬‬

‫ﺗﻄﺒﻴﻘﺎت اﻟـ‪ FPGA‬ﻓﻲ اﻷﻧﻈﻤﺔ اﻟﻤﺪﻣﺠﺔ )‪:(Embedded Systems FPGA Applications‬‬ ‫‪2-2‬‬

‫ﺗﻘﻨﻴﺔ اﻟـ‪ FPGA‬أﺣﺮزت ﺗﻘﺪﻣﺎً وﺗﻄﻮراً ﻛﺒﲑاً ﻋﻠﻰ ﻛﺎﻓﺔ ﳏﺎور اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ ﺧﻼل اﻟﻌﻘﺪ اﻟﺴﺎﺑﻖ‪ ،‬ﺣﻴﺚ ازداد ﻋﺪد اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ ﻣﻊ‬
‫اﶈﺎﻓﻈﺔ ﻋﻠﻰ ﺳﻌﺮ ﻣﻘﺒﻮل ﻳﻨﺎﺳﺐ اﻟﻌﺪﻳﺪ ﻣﻦ اﻟﺘﻄﺒﻴﻘﺎت]‪ ،[217‬ﻣﻬﻨﺪﺳﻲ ﺗﺼﻤﻴﻢ اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ ﻗﺪ ﻳﺄﺧﺬون ﺑﻌﲔ اﻻﻋﺘﺒﺎر اﺳﺘﺨﺪام ﺗﻘﻨﻴﺔ‬
‫اﻟـ‪ FPGA‬ﰲ ﺑﻨﺎء ﺗﻄﺒﻴﻘﺎت اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ؛ ﻧﻈﺮاً ﻟﻠﻤﺮوﻧﺔ اﻟﻜﺒﲑة ﰲ إﻋﺎدة ﺑﻨﺎء اﻟﻜﻴﺎن اﻟﺼﻠﺐ ﻟﺸﺮﳛﺔ اﻟـ‪ FPGA‬إﺿﺎﻓﺔً إﱃ ﺳﻌﺔ اﳌﻌﺎﳉﺔ‬
‫اﻟﻌﺎﻟﻴﺔ وﻗﺎﺑﻠﻴﺔ إﻋﺎدة اﺳﺘﺨﺪام اﻟﻮﺣﺪات اﻟﱪﳎﻴﺔ "‪."IPs‬‬

‫إن اﻟﺘﻄﺒﻴﻘﺎت اﻟﱵ ﺗﺴﺘﺨﺪم ﺗﻘﻨﻴﺔ اﻟـ‪ FPGA‬ﱂ ﺗﻌﺪ ﺗﻘﺘﺼﺮ ﻋﻠﻰ اﻟﺘﻄﺒﻴﻘﺎت اﻟﻌﺴﻜﺮﻳﺔ وﺗﻄﺒﻴﻘﺎت أﲝﺎث اﻟﻔﻀﺎء‪ ،‬وإﳕﺎ ﻗﺪ ﺑﺪا ﺟﻠﻴﺎً أن ﻫﺬﻩ‬
‫اﻟﺘﻘﻨﻴﺔ أﺻﺒﺤﺖ ﺷﺎﺋﻌﺔ اﻻﺳﺘﺨﺪام ﰲ ﺗﻄﺒﻴﻘﺎت اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ ﲟﺨﺘﻠﻒ أﻧﻮاﻋﻬﺎ‪ ،218,219‬ﻛﻤﺎ وأ�ﺎ ﺑﺸﻜﻞ ﺧﺎص ﺗﻌﺘﱪ ﻣﻨﺼﺔ اﻟﺘﻄﻮﻳﺮ‬
‫واﻟﺘﺸﻐﻴﻞ اﻟﻮﺣﻴﺪة ﻟﻠﻌﺪﻳﺪ ﻣﻦ اﻟﺘﻄﺒﻴﻘﺎت ﻣﺜﻞ‪ :‬اﳌﺴﺮﻋﺎت اﻟﺮﺳﻮﻣﻴﺔ اﻟﻘﺎﺋﻤﺔ ﻋﻠﻰ اﻟﻜﻴﺎن اﻟﺼﻠﺐ )‪ (hardware acceleration‬ﰲ ﻣﻌﺎﳉﺔ‬
‫اﻹﺷﺎرة اﻟﺮﻗﻤﻴﺔ]‪ – [220‬اﳌﺸﻔﺮات اﳌﺮﺋﻴﺔ )‪ ،[221](video encoder‬ﺗﻄﺒﻴﻘﺎت اﻟﻮﺳﺎﺋﻂ اﻟﺮﻗﻤﻴﺔ]‪ ،[222,223‬وﻏﲑﻫﺎ ﻣﻦ اﻟﻌﺪﻳﺪ ﻣﻦ اﻟﺘﻄﺒﻴﻘﺎت‪.‬‬

‫إن ﺧﻮارزﻣﻴﺎت ﻣﻌﺎﳉﺔ اﻹﺷﺎرة اﻟﺮﻗﻤﻴﺔ ﻛﺎﻧﺖ ﺗﻌﺘﻤﺪ ﰲ ﺑﻨﺎﺋﻬﺎ ﺳﺎﺑﻘﺎً ﻋﻠﻰ اﻟﺪارات اﳌﺘﻜﺎﻣﻠﺔ اﳌﺨﺼﺼﺔ اﻟﺘﻄﺒﻴﻘﺎت )‪ (ASICs‬أو ﻣﻌﺎﳉﺎت‬
‫اﻹﺷﺎرة اﻟﺮﻗﻤﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ )‪ ،(PDSPs‬وﻟﻜﻦ ﺑﻌﺪ ﻇﻬﻮر ﺷﺮاﺋﺢ اﻟـ‪ FPGA‬ذات اﻟﺴﻌﺎت اﻟﻜﺒﲑة‪ ،‬ﰎ اﻟﺘﺤﻮل ﺑﺎﲡﺎﻩ اﺳﺘﺨﺪام ﺗﻘﻨﻴﺔ‬
‫اﻟـ‪ FPGA‬ﻛﺒﺪﻳﻞ ﰲ ﺗﻄﺒﻴﻘﺎت ﻣﻌﺎﳉﺔ اﻹﺷﺎرة اﻟﺮﻗﻤﻴﺔ ﻛﺎﻓﺔً ]‪ .[224-226‬إن ﻫﺬا اﻻﻧﺘﺸﺎر اﻟﻮاﺳﻊ واﻻﻋﺘﻤﺎد اﳌﺘﺰاﻳﺪ ﻋﻠﻰ ﺗﻘﻨﻴﺔ اﻟـ‪FPGA‬‬

‫ﻳﺸﻜﻞ ﺑﺪورﻩ ﺣﺎﻓﺰاً ﻛﺒﲑاً ﳌﻌﻈﻢ اﳌﺆﺳﺴﺎت اﻟﺘﻌﻠﻴﻤﻴﺔ ﻟﻠﺘﻮﺟﻪ أﻛﺎدﳝﻴﺎً ﻫﺬا اﺠﻤﻟﺎل‪.‬‬

‫ﺗﻄﺒﻴﻘﺎت اﻟـ‪ FPGA‬ﻓﻲ اﻷﻧﻈﻤﺔ اﻟﺤﺮﺟﺔ )‪:(FPGAs in Critical System Applications‬‬ ‫‪3-2‬‬

‫إن ﺗﻘﻨﻴﺔ اﻟـ‪ FPGA‬ﻗﺪ أﺻﺒﺤﺖ ﰲ ﺻﻠﺐ ﺗﻜﻮﻳﻦ اﻟﻌﺪﻳﺪ ﻣﻦ اﻟﺘﻄﺒﻴﻘﺎت اﻟﱵ ﺗﻘﻮم ﲟﻬﺎم ﳏﺪدة ﻋﻠﻰ درﺟﺔ ﻋﺎﻟﻴﺔ ﻣﻦ اﻟﺪﻗﺔ واﳋﻄﻮرة ‪-‬‬
‫ﻛﺘﻠﻚ اﳌﺴﺘﺨﺪﻣﺔ ﰲ اﻟﺼﻨﺎﻋﺎت اﻟﻨﻮوﻳﺔ واﻟﻔﻀﺎﺋﻴﺔ واﻷﲝﺎث اﻟﻌﺴﻜﺮﻳﺔ‪.‬‬

‫ﲞﻼف اﻟﺘﻨﻔﻴﺬ اﻟﺘﺴﻠﺴﻠﻲ اﻟﺬي ﻳﻘﻮم ﺑﻪ ﻣﻌﺎﰿ اﻷﻏﺮاض اﻟﻌﺎﻣﺔ )‪ ،(GPP‬ﻓﺈن ﺗﻘﻨﻴﺔ اﻟـ‪ FPGA‬ﺗﺴﺘﻄﻴﻊ اﻟﻘﻴﺎم ﲟﺌﺎت ﻋﻤﻠﻴﺎت اﻟﻀﺮب‬
‫وآﻻف ﻋﻤﻠﻴﺎت اﳉﻤﻊ ﰲ ﻛﻞ دورة ﺗﻨﻔﻴﺬ )‪ ،(Clock Cycle‬واﻟﺬي ﺑﺪورﻩ ﻳﻌﻄﻴﻬﺎ اﳌﻘﺪرة ﻋﻠﻰ ﻣﻌﺎﳉﺔ اﻟﻌﺪﻳﺪ ﻣﻦ اﻟﻮﺣﺪات اﳌﻨﻄﻘﻴﺔ‬
‫اﶈﻴﻄﻴﺔ اﳌﺨﺘﻠﻔﺔ ﰲ وﻗﺖ واﺣﺪ‪ .‬ﻓﻌﻠﻰ ﺳﺒﻴﻞ اﳌﺜﺎل‪ :‬إن ﺷﺮﳛﺔ اﻟـ‪ FPGA‬اﻟﱵ ﺗﺴﺘﺨﺪم ﻟﻠﺘﺤﻜﻢ ﺑﻮﺣﺪة اﺗﺼﺎل ﻻﺳﻠﻜﻲ "‪"WAP‬‬
‫)‪ (Wireless Application Protocol‬ﺗﺴﺘﻄﻴﻊ أن ﺗﺴﺘﺨﺪم وﺣﺪة ﻣﻌﺎﳉﺔ إﺷﺎرة‪ ،‬ووﺣﺪة ﻣﻌﺎﳉﺔ ﻟﻠﱪوﺗﻮﻛﻮل‪ ،‬وﻣﻨﻈﻢ ﻣﻌﺎﳉﺔ ﺣﺰم‬
‫اﻟﺒﻴﺎﻧﺎت‪ ،‬واﻟﱵ ﺗﺸﱰك ﲨﻴﻌﻬﺎ ﺑﻨﻔﺲ ﺷﺮﳛﺔ اﻟﺴﻴﻠﻴﻜﻮن اﻟﻔﻴﺰﻳﺎﺋﻴﺔ‪ ،‬إﺿﺎﻓﺔً إﱃ ذﻟﻚ وﻧﻈﺮاً ﻟﻜﻮن اﻟﻜﻴﺎن اﻟﺼﻠﺐ ﻗﺎﺑﻞ ﻹﻋﺎدة اﻟﺘﺸﻜﻴﻞ‬
‫)‪ ،(Reconfigurable‬ﻓﺈﻧﻪ ﳝﻜﻦ ﲢﻤﻴﻞ اﻟﱪاﻣﺞ ﻋﻠﻰ اﻟﺸﺮﳛﺔ ﰲ اﳌﺨﺘﱪ أو ﰲ ﺣﻘﻞ اﻟﻌﻤﻞ – ﻣﺜﻼً‪ :‬إﺻﻼﺣﺎت اﳋﻠﻞ اﻟﱪﳎﻲ وﺗﻌﺰﻳﺰ أداء‬
‫اﻟﻮﻇﺎﺋﻒ ﳝﻜﻦ إرﺳﺎﻟﻪ ﻋﱪ اﻟﺸﺒﻜﺔ إﱃ اﳍﻮاﺗﻒ اﳋﻠﻮﻳﺔ أو إﱃ ﻧﻘﺎط اﻟﻨﻔﺎذ اﻟﻼﺳﻠﻜﻴﺔ ﻋﻨﺪ اﻟﻄﻠﺐ‪.‬‬

‫ﺑﺴﺒﺐ ﻫﺬا اﻟﺘﻀﺎﻓﺮ اﻟﻨﺎدر ﺑﲔ اﳌﻘﺪرة اﳊﺴﺎﺑﻴﺔ اﻟﻔﺎﺋﻘﺔ‪ ،‬واﳌﺮوﻧﺔ ﰲ إﻋﺎدة ﺗﺸﻜﻴﻞ اﻟﻜﻴﺎن اﻟﺼﻠﺐ‪ ،‬إﺿﺎﻓﺔ إﱃ ﻛﻮن اﻟﻌﺪﻳﺪ ﻣﻦ ﺷﺮاﺋﺢ‬
‫اﻟـ‪ FPGA‬ﺗﺴﺘﻄﻴﻊ أن ﺗﻨﺠﺰ ﺳﺮﻋﺔ ﻣﻌﺎﳉﺔ وأداء أﻛﱪ ﲟﺌﺔ ﺿﻌﻒ ﻣﻘﺎرﻧﺔً ﻣﻊ ﻣﻌﺎﳉﺎت اﻷﻏﺮاض اﻟﻌﺎﻣﺔ]‪ ،[227-229‬ﻓﺈن ﺗﻘﻨﻴﺔ اﻟـ‪ FPGA‬ﻫﻲ‬
‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪90‬‬
‫‪2‬‬ ‫اﻟﻔﺼﻞ اﻟﺜﺎﱐ | ‪Chapter 2‬‬

‫اﻵن اﻟﻌﺎﻣﻞ اﻟﺮﺋﻴﺴﻲ ﰲ اﻟﺘﻨﻮع اﻟﻜﺒﲑ ﰲ ﺗﻄﺒﻴﻘﺎت اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ ذات اﻷداء اﻟﻌﺎﱄ واﳊﺮج وﻏﲑﻫﺎ‪ .230-235‬ﻓﻌﻠﻰ ﺳﺒﻴﻞ اﳌﺜﺎل‪ :‬إن أﻧﻈﻤﺔ‬
‫اﻷﻗﻤﺎر اﻟﺼﻨﺎﻋﻴﺔ وأﻧﻈﻤﺔ اﻟﺮادارات وﺷﺒﻜﺎت ﺗﻮزﻳﻊ اﻟﻄﺎﻗﺔ اﻟﻜﻬﺮﺑﺎﺋﻴﺔ ووﺣﺪات اﻟﺘﺸﻔﲑ وأﻧﻈﻤﺔ اﻟﺘﺤﻜﻢ ﺑﺎﻟﻄﺎﺋﺮات واﳌﺴﺎﺑﺮ اﻟﻔﻀﺎﺋﻴﺔ‪،‬‬
‫ﲨﻴﻌﻬﺎ ﺗﻌﺘﻤﺪ ﻋﻠﻰ ﺗﻘﻨﻴﺔ اﻟـ‪ FPGA‬ﻷداء وﻇﺎﺋﻔﻬﺎ‪.‬‬

‫ﻟﻘﺪ ﻗﺪر أﻧﻪ ﰲ ﻋﺎم ‪ 2005‬وﺣﺪﻩ ﻛﺎن ﻳﻮﺟﺪ أﻛﺜﺮ ﻣﻦ ‪ 80000‬ﻣﺸﺮوع ﲡﺎري ﳐﺘﻠﻒ ﻗﺪ ﺑﺪأ ﺑﺎﻻﻋﺘﻤﺎد ﻋﻠﻰ ﺗﻘﻨﻴﺔ اﻟـ‪236FPGA‬؛ أﻣﺎ‬
‫اﻟﻴﻮم ﻓﺈن اﻟﻌﺪد ﲡﺎوز ﻋﺸﺮات أﺿﻌﺎف ﻣﺎ ﻛﺎن ﻋﻠﻴﻪ ٍ‬
‫وﻗﺘﺌﺬ‪.‬‬

‫ﻓﻴﻤﺎ ﻳﻠﻲ ﻧﻮرد ﺑﺈﳚﺎز ﺑﻌﺾ اﻷﲝﺎث اﳌﺮﺗﺒﻄﺔ ﺑﺎﻟﺘﻄﺒﻴﻘﺎت اﳌﺘﻘﺪﻣﺔ واﳊﺮﺟﺔ اﻟﱵ ﺗﺴﺘﺨﺪم ﺗﻘﻨﻴﺔ اﻟـ‪ FPGA‬واﻟﱵ ﻫﻲ ﳏﻮر اﻻﻫﺘﻤﺎم اﻷول ﻋﻠﻰ‬
‫اﳌﺴﺘﻮى اﻟﺒﺤﺜﻲ واﻟﺘﻄﺒﻴﻘﻲ ﻋﺎﳌﻴﺎً‪.‬‬

‫‪ 1-3-2‬ﺗﻄﺒﻴﻘﺎت ﺗﻘﻨﻴﺔ اﻟـ‪ FPGA‬ﰲ أﲝﺎث اﻟﻔﻀﺎء )‪:(FPGAs for Aerospace Applications‬‬
‫إن اﻟﻌﺪﻳﺪ ﻣﻦ اﻷﻧﻈﻤﺔ اﻹﻟﻜﱰوﻧﻴﺔ اﳌﺴﺘﺨﺪﻣﺔ ﰲ ﳎﺎل اﻟﻄﲑان واﻟﻔﻀﺎء ﺗﺴﺘﺨﺪم ﺗﻘﻨﻴﺔ اﻟـ‪ ،FPGA‬وذﻟﻚ ﻟﻜﻮ�ﺎ ﻗﺎدرة ﻋﻠﻰ ﺗﺄﻣﲔ اﻟﺘﻮازن‬
‫اﻟﻔﻌﺎل ﺑﲔ اﻷداء واﻟﻜﻠﻔﺔ واﳌﺮوﻧﺔ ﰲ اﻟﺘﺼﻤﻴﻢ‪ .‬ﻓﻤﺜﻼً‪ :‬اﻟﻮﻇﺎﺋﻒ اﻷﺳﺎﺳﻴﺔ اﳊﺮﺟﺔ ﰲ ﻧﻈﺎم اﻟﺘﻮﺟﻴﻪ اﳋﺎص ﺑﺎﻷﺳﻠﺤﺔ ) ‪Joint Strike‬‬

‫‪ Fighter‬ﻳﺘﻢ اﻟﺘﺤﻜﻢ ﻬﺑﺎ ﻣﻦ ﺧﻼل ﻧﻈﺎم ﻳﻌﺘﻤﺪ ﻋﻠﻰ ﺗﻘﻨﻴﺔ اﻟـ‪[237,238] FPGA‬؛ ﻧﻈﺎم اﻟﺘﺤﻜﻢ وﺷﺎﺷﺎت ﻣﻘﺼﻮرة اﻟﻄﻴﺎر ﻟﻠﻄﺎﺋﺮة‬
‫‪ Boing-787‬واﻟﺮادارات]‪[239‬؛ ‪.[240,241]NASA Mars Rovers‬‬

‫‪ 2-3-2‬ﺗﻘﻨﻴﺔ اﻟـ‪ FPGA‬ﰲ اﳊﻮاﺳﺐ اﻟﻔﺎﺋﻘﺔ اﻷداء )‪:(FPGAs for Supercomputing‬‬

‫ﺑﻴﻨﻤﺎ ﻻ ﺗﺰال اﳊﻮاﺳﺐ اﻟﺸﺨﺼﻴﺔ ﰲ ﺗﻄﻮر ﻣﺴﺘﻤﺮ‪ ،‬إﻻ أن اﻷداء وﺳﻌﺔ اﳌﻌﺎﳉﺔ وﺻﻠﺖ إﱃ ﺣﺪود ﺑﺪأت ﺗﻈﻬﺮ ﻓﻴﻬﺎ ﻣﺸﺎﻛﻞ ﻋﺪﻳﺪة ﺗﺘﻌﻠﻖ‬
‫ﺑﺎﳊﺮارة واﺳﺘﻬﻼك اﻟﻄﺎﻗﺔ واﻟﻜﻠﻔﺔ‪ ،‬اﻟﻌﻠﻤﺎء واﳌﻬﻨﺪﺳﻮن ﻳﺴﺘﺨﺪﻣﻮن ﺣﻮاﺳﺐ ﺧﺎﺻﺔ "‪ "big iron‬ﻋﻨﺪﻣﺎ ﳛﺘﺎﺟﻮن ﻷداء أﻋﻠﻰ – ﺗﺪﻋﻰ‬
‫ﺑﺎﳊﻮاﺳﺐ اﻟﻔﺎﺋﻘﺔ اﻷداء‪.‬‬

‫اﻟﻌﺪﻳﺪ ﻣﻦ ﺷﺮﻛﺎت اﳊﻮاﺳﺐ اﻟﻔﺎﺋﻘﺔ اﻷداء – ﻣﺜﻞ‪ – [245,246]SRC ،[244]Cray ،[242,243]SGI :‬ﻗﺎﻣﺖ ﺑﺈﺿﺎﻓﺔ ﺗﻘﻨﻴﺔ اﻟـ‪ FPGA‬إﱃ‬
‫أﻧﻈﻤﺘﻬﺎ ﻟﺘﺤﺴﲔ اﻷداء]‪ .[247,248‬ﻓﻤﺜﻼً‪ :‬ﺑﻨﻴﺔ اﳊﺎﺳﺐ ‪ Cray’s XD1‬ﺗﻀﻢ ﺳﺘﺔ ﺷﺮاﺋﺢ ‪ Xilinx FPGAs Virtex-4‬ﻣﻊ اﺛﲏ ﻋﺸﺮ‬
‫ﻣﻌﺎﰿ ‪ .x86‬أﻳﻀﺎً ﺣﻮاﺳﺐ اﻟـ‪ SRC‬ﻓﺎﺋﻘﺔ اﻷداء ﺗﺴﺘﺨﺪم ﺗﻘﻨﻴﺔ اﻟـ‪ FPGA‬ﻟﺘﺴﺮﻳﻊ اﻟﱪاﻣﺞ اﻟﱵ ﺗﻌﻤﻞ ﻋﻠﻰ ﻣﻌﺎﳉﺎت اﻷﻏﺮاض‬
‫اﻟﻌﺎﻣﺔ]‪ .[245,249‬ﻫﺬﻩ اﳊﻮاﺳﺐ أﺻﺒﺤﺖ ﺗﻨﺪرج ﲢﺖ ﻣﺼﻄﻠﺢ "‪ ."Reconfigurable Computers‬ﻣﻦ أﺟﻞ دراﺳﺔ اﳌﺒﺎدئ اﻟﻌﺎﻣﺔ‬
‫واﻟﺘﺼﻨﻴﻔﺎت )‪ (Taxonomy‬ﺣﻮل اﻟـ‪ reconfigurable computing‬ﳝﻜﻦ اﻟﺮﺟﻮع إﱃ اﳌﺮاﺟﻊ]‪.[250,251‬‬

‫‪ 3-3-2‬ﺗﻘﻨﻴﺔ اﻟـ‪ FPGA‬ﰲ ﲢﻠﻴﻞ اﻹﺷﺎرات اﳌﺮﺋﻴﺔ )‪:(FPGAs for Video Analysis‬‬
‫ﺗﺴﺘﺨﺪم ﺗﻘﻨﻴﺔ اﻟـ‪ FPGA‬ﰲ ﺗﻄﺒﻴﻘﺎت ﻣﻌﺎﳉﺔ اﻹﺷﺎرة اﳌﻌﻘﺪة ﻋﺎﻟﻴﺔ اﻟﱰدد ﻣﺜﻞ اﻟﺘﺤﻠﻴﻞ واﻟﺘﻌﺮف ﻋﻠﻰ اﻟﻮﺟﻪ]‪[252‬؛ ﻫﺬا اﻟﻨﻮع ﻣﻦ‬
‫ﺧﻮارزﻣﻴﺎت ﻣﻌﺎﳉﺔ اﻹﺷﺎرة ﻳﻜﻮن ﻋﺒﺎرة ﻋﻦ ﻋﻤﻠﻴﺎت ﺣﺴﺎب ﻣﺼﻔﻮﻓﻴﺔ ﺿﺨﻤﺔ ذات ﺳﻌﺔ ﻣﻌﺎﳉﺔ ﻋﺎﻟﻴﺔ ﺟﺪاً‪ ،‬وﺑﺎﻟﺘﺎﱄ ﻓﺈن اﺳﺘﺨﺪام‬
‫ﺗﻘﻨﻴﺎت ﻣﺜﻞ اﻟـ‪ FPGA‬ﻗﺎدرة ﻋﻠﻰ أداء ﻣﻬﺎم ﺗﻔﺮﻋﻴﺔ )‪ (parallelism‬وﻣﻌﺎﳉﺔ ﻣﺘﺰاﻣﻨﺔ )‪ (pipelining‬ﳝﻜﻦ أن ﳝﻨﺢ اﻷداء اﳌﻄﻠﻮب ﳌﺜﻞ‬
‫ﻫﺬﻩ اﻟﺘﻄﺒﻴﻘﺎت‪.‬‬

‫‪91‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫اﳌﺼﻔﻮﻓﺎت اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً | ‪Field Programmable Gate Arrays‬‬

‫ﻣﺆﺧﺮاً‪ ،‬ﻃﻮرت ﺷﺮﻛﺔ ‪ IBM‬ﻧﻈﺎم ﺧﺼﻮﺻﻴﺔ ﻳﺪﻋﻰ ‪ ،[253]People Vision‬ﰎ ﺗﻄﺒﻴﻘﻪ ﻋﻠﻰ ﻧﻈﺎم ‪ FPGA‬ﻳﺴﺘﺨﺪم ﺛﻼث وﺣﺪات ﺑﺮﳎﻴﺔ‬
‫ﺟﺎﻫﺰة )‪ ،(IP‬وﺣﺪة ﻣﻌﺎﳉﺔ اﻟﻔﻴﺪﻳﻮ‪ ،‬وﺣﺪة ﺗﺼﺤﻴﺢ ﺻﻮرة اﻟﻮﺟﻪ‪ ،‬ووﺣﺪة اﻟـ‪ Ethernet‬ﻹرﺳﺎل اﻟﻔﻴﺪﻳﻮ اﳌﺼﺤﺢ إﱃ ﺷﺎﺷﺔ ﺣﺎرس اﻷﻣﻦ؛‬
‫ﻛﻞ وﺣﺪة ﻣﻦ ﻫﺬﻩ اﻟﻮﺣﺪات ﺗﺘﻄﻠﺐ ذاﻛﺮة ﻣﻨﻔﺼﻠﺔ ذات ﻣﺴﺘﻮى ﲪﺎﻳﺔ ﺧﺼﻮﺻﻴﺔ ﻟﻠﺒﻴﺎﻧﺎت اﳌﺨﺰﻧﺔ ﻋﻠﻰ ﻫﺬﻩ اﻟﺬاﻛﺮة‪ ،‬وﻛﻞ ذﻟﻚ ﺗﻮﻓﺮﻩ‬
‫ﺷﺮﳛﺔ ‪ FPGA‬واﺣﺪة‪.‬‬

‫‪ 4-3-2‬ﺗﻘﻨﻴﺔ اﻟـ‪ FPGA‬ﰲ أﻧﻈﻤﺔ اﻟﺘﺸﻔﲑ ﻋﺎﻟﻴﺔ اﻷداء )‪:(FPGAs for HighThroughput Cryptography‬‬
‫إن ﺗﻨﻔﻴﺬ ﻋﻤﻠﻴﺔ اﻟﺘﺸﻔﲑ ﺑﺎﺳﺘﺨﺪام ﺗﻘﻨﻴﺔ اﻟـ‪ FPGA‬ﻳﻘﺪم ﻣﺰاﻳﺎ ﻋﺪﻳﺪة‪ ،‬ﺣﻴﺚ أن اﻟﻜﺘﺎﺑﺔ ﺑﺎﻟﺸﻴﻔﺮة ﺗﺘﻄﻠﺐ ﻋﺪة ﻋﻤﻠﻴﺎت ﻋﻠﻰ ﻣﺴﺘﻮى‬
‫اﻟﺒﺖ‪ ،‬ﻣﺜﻞ ﻋﻤﻠﻴﺎت اﻹزاﺣﺔ واﻟﺘﺒﺪﻳﻞ واﻟﺘﻜﻤﻴﻢ‪ .‬إن ﺑﻨﺎء ﺧﻮارزﻣﻴﺎت اﻟﺘﺸﻔﲑ ﺑﺎﺳﺘﺨﺪام ﺗﻘﻨﻴﺔ اﻟـ‪ FPGA‬ﻳﺘﻴﺢ إﻣﻜﺎﻧﻴﺔ ﺗﻐﻴﲑ ﺑﺎراﻣﱰات‬
‫ﺧﻮارزﻣﻴﺔ اﻟﺘﺸﻔﲑ )اﳌﻔﺎﺗﻴﺢ واﻟﺸﻴﻔﺮات(‪ ،‬أو ﺗﻌﻴﲔ ﺳﻠﺴﻠﺔ ﺟﺪﻳﺪة ﻣﻨﻘﺤﺔ ﺑﺴﻬﻮﻟﺔ ﻛﺒﲑة‪ .‬ﻫﺬﻩ اﳌﺰاﻳﺎ ﻗﺪ ﰎ اﺳﺘﻐﻼﳍﺎ ﰲ ﺗﻄﺒﻴﻘﺎت اﻟﺘﺸﻔﲑ اﻟﱵ‬
‫وﺗﻘﻨﻴﺔ ﺗﺸﻔﲑ "اﳌﻔﺘﺎح اﻟﻌﺎم" )‪(public-key‬‬ ‫]‪[255‬‬
‫وﺗﻘﻨﻴﺔ اﻟﺘﺸﻔﲑ ‪SHA-2‬‬ ‫]‪[254‬‬
‫ﺗﺴﺘﺨﺪم ﺗﻘﻨﻴﺔ اﻟـ‪ FPGA‬ﻣﺜﻞ‪ :‬ﺗﻘﻨﻴﺔ اﻟﺘﺸﻔﲑ ‪MD5‬‬

‫ﻣﺜﻞ ‪ (RSA) Rivest Shamir Adelman‬اﻟﱵ ﺗﺘﻄﻠﺐ وﻇﺎﺋﻒ ﻣﺘﻘﺪﻣﺔ )ـ‪ ،modular multiplication‬ـ ‪Elliptic Curve‬‬

‫‪ ،[260-262](Crypto‬وﺗﻘﻨﻴﺎت ﺗﺸﻔﲑ أﺧﺮى ﻋﺪﻳﺪة]‪.[256-259‬‬

‫‪ 5-3-2‬ﺗﻘﻨﻴﺔ اﻟـ‪ FPGA‬ﰲ أﻧﻈﻤﺔ ﲪﺎﻳﺔ اﻟﺸﺒﻜﺎت )‪:(FPGAs for High-Throughput Cryptography‬‬

‫ﺗﻘﻨﻴﺔ اﻟـ‪ FPGA‬ﺗﺴﺘﺨﺪم ﺑﺸﻜﻞ واﺳﻊ ﺟﺪاً ﰲ أﻧﻈﻤﺔ ﲪﺎﻳﺔ اﻟﺸﺒﻜﺎت ﻣﻦ اﻻﺧﱰاق ‪ (IDS) intrusion detection systems‬ﻧﻈﺮاً‬
‫ﻟﻠﻜﻔﺎءة وﺳﻌﺔ اﳌﻌﺎﳉﺔ اﻟﻌﺎﻟﻴﺔ واﻟﻘﺪرة ﻋﻠﻰ اﻟﻔﺤﺺ اﳌﺘﻮازي ﻟﺴﻼﺳﻞ ﺣﺰم اﻟﺒﻴﺎﻧﺎت اﻟﻮاردة واﻟﺼﺎدرة ﻋﱪ اﳌﻮزﻋﺎت اﻟﺮﺋﻴﺴﻴﺔ وﻓﻘﺎً ﻟﻘﻮاﻧﲔ‬
‫وﺣﺎﻻت ﻣﺘﻌﺪدة]‪ .[263-271‬ﻫﺬﻩ اﻷﻧﻮاع ﻣﻦ اﻷﻧﻈﻤﺔ ﺗﺴﺘﺨﺪم أﻧﻈﻤﺔ ﻛﻴﺎن اﻟﺼﻠﺐ ﺗﺴﺘﺨﺪم ﺗﻘﻨﻴﺔ اﻟـ‪ FPGA‬ﳌﺮاﻗﺒﺔ اﳌﻮزﻋﺎت‪ ،‬أي أن‬
‫اﳌﺮاﻗﺒﺔ واﻟﻔﺤﺺ ﻳﺘﻢ ﻋﻦ ﻃﺮﻳﻖ اﻟﻜﻴﺎن اﻟﺼﻠﺐ ﻻ ﻋﻦ ﻃﺮﻳﻖ اﻟﱪاﻣﺞ‪.‬‬

‫اﺳﺘﺮاﺗﻴﺠﻴﺔ اﻟﺘﺼﻤﻴﻢ ‪ RP‬ﺑﺎﻻﻋﺘﻤﺎد ﻋﻠﻰ اﻟـ‪:(FPGA-based Rapid Prototyping) FPGA‬‬ ‫‪4-2‬‬

‫ﺗﻌﺘﱪ ﻫﺬﻩ اﻻﺳﱰاﺗﻴﺠﻴﺔ ﻣﻦ اﳌﻨﻬﺠﻴﺎت اﻟﺘﺼﻤﻴﻤﻴﺔ اﳊﺪﻳﺜﺔ ﰲ ﺑﻨﺎء ﻧﻈﺎم ﻣﻌﻘﺪ ﰲ زﻣﻦ ﻗﺼﲑ ﻧﺴﺒﻴﺎً‪ ،‬ﺣﻴﺚ ﻳﺘﻢ ﺗﺒﲏ ﻫﺬﻩ اﳌﻨﻬﺠﻴﺔ ﰲ ﻃﻴﻒ‬
‫اﺳﻊ ﻣﻦ اﻟﺼﻨﺎﻋﺎت اﳊﺪﻳﺜﺔ اﻟﱵ ﻬﺗﺘﻢ ﺑﺘﺨﻔﻴﺾ ﻛﻠﻔﺔ اﻟﺘﺼﻨﻴﻊ‪ ،‬وﺗﻘﻠﻴﺺ زﻣﻦ وﺻﻮل اﳌﻨﺘﺞ ﻟﻠﺴﻮق]‪.[272‬‬

‫إن اﻟﻨﻘﻄﺔ اﳉﻮﻫﺮﻳﺔ اﻷﺳﺎﺳﻴﺔ ﳍﺬﻩ اﳌﻨﻬﺠﻴﺔ واﳌﺮﺗﻜﺰ اﻟﺬي ﻳﻘﻮم ﻋﻠﻴﻪ ﺑﻨﻴﺎ�ﺎ ﻫﻮ اﺳﺘﺨﺪام ﺗﻘﻨﻴﺔ اﻟـ‪ FPGA‬ﰲ ﺑﻨﺎء وﺗﺼﻤﻴﻢ وﺗﻘﻴﻴﻢ واﺧﺘﺒﺎر‬
‫اﻟﻨﻤﺎذج اﻷوﻟﻴﺔ ﻟﻠﻤﻨﺘﺞ‪ ،‬ﺣﻴﺚ أن ﺗﺼﻤﻴﻢ اﳌﻨﺘﺞ ﻛﺎﻣﻼً واﺧﺘﺒﺎرﻩ ﳝﻜﻦ أن ﻳﺘﻢ ﻋﻠﻰ ﺷﺮﳛﺔ ‪ FPGA‬ﺑﺼﻮرة ﻣﺒﺎﺷﺮة دون اﳊﺎﺟﺔ إﱃ أي‬
‫ﻣﺮاﺣﻞ ﺗﺼﻨﻴﻊ ﻛﻴﺎن ﺻﻠﺐ ﻣﺴﺒﻘﺔ‪ .‬وﻫﺬا ﻫﻮ اﳌﻌﲎ اﳌﺸﺎر إﻟﻴﻪ ﺑﺎﳌﺼﻄﻠﺢ "‪."Rapid‬‬

‫إن ﻣﻨﻬﺠﻴﺔ اﻟـ‪ Rapid Prototyping‬ﰲ اﻟﺘﺼﻤﻴﻢ إﺿﺎﻓﺔً إﱃ ﻗﺎﺑﻠﻴﺔ إﻋﺎدة اﻟﺘﺸﻜﻴﻞ ﻟﺘﻘﻨﻴﺔ اﻟـ‪ FPGA‬ﻫﻲ ﻣﻦ أﻛﺜﺮ اﻟﻌﻮاﻣﻞ واﻷﺳﺒﺎب‬
‫ﻻﻧﺘﺸﺎر ﺗﻘﻨﻴﺔ اﻟـ‪ FPGA‬وازدﻳﺎد ﺷﻌﺒﻴﺘﻬﺎ ﺑﲔ اﻟﻘﻄﺎﻋﺎت اﻟﺼﻨﺎﻋﻴﺔ واﻟﺘﻌﻠﻴﻤﻴﺔ ﻣﻨﺬ اﺧﱰﻋﻬﺎ ﻣﺆﺳﺲ ﺷﺮﻛﺔ ‪ Xilinx‬اﻟﻌﺮﻳﻘﺔ ‪Ross‬‬

‫‪ Freeman‬ﰲ أواﺋﻞ ﻋﺎم ‪.[273]1984‬‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪92‬‬
‫‪2‬‬ ‫اﻟﻔﺼﻞ اﻟﺜﺎﱐ | ‪Chapter 2‬‬

‫ﺗﻘﻨﻴﺔ اﻟـ‪ FPGA‬ﻓﻲ اﻟﺘﻌﻠﻴﻢ اﻟﻬﻨﺪﺳﻲ )‪:(FPGA Tech. in Engineering Education‬‬ ‫‪5-2‬‬

‫إن اﻟﻜﻠﻔﺔ اﳌﻨﺨﻔﻀﺔ واﳌﺮوﻧﺔ اﻟﻜﺒﲑة ﰲ اﻟﺘﺼﻤﻴﻢ وإﻋﺎدة ﺗﺸﻜﻴﻞ اﻟﻨﻈﺎم‪ ،‬إﺿﺎﻓﺔً إﱃ اﻷداء اﻟﻔﺎﺋﻖ واﻟﻜﺜﺎﻓﺔ اﻟﺴﻴﻠﻴﻜﻮﻧﻴﺔ اﻟﻌﺎﻟﻴﺔ واﳌﻴﺰات‬
‫اﻟﻼﳏﺪودة ووﺟﻮد اﻷدوات اﻟﱪﳎﻴﺔ واﻟﺘﺼﻤﻴﻤﻴﺔ اﳌﺘﻄﻮرة واﻟﺪﻋﻢ اﻟﺘﻘﲏ اﻟﻜﺒﲑ واﳊﻠﻮل اﳉﺎﻫﺰة ﻟـ‪ IPs‬ودﺧﻮل ﺗﻘﻨﻴﺔ اﻟـ‪ FPGA‬ﺣﱴ إﱃ‬
‫روﺑﻮﺗﺎت اﻷﻃﻔﺎل؛ ﻫﻲ اﻟﱵ أﻋﻄﺖ اﻟﺪور اﻟﻜﺒﲑ واﳍﺎم أﻛﺎدﳝﻴﺎً وﺻﻨﺎﻋﻴﺎً ﻟﻸﻧﻈﻤﺔ اﻟﱵ ﺗﻌﺘﻤﺪ ﺗﻘﻨﻴﺔ اﻟـ‪ ،[280]FPGA‬وﺟﻌﻠﺖ ﻫﺬﻩ اﻟﺘﻘﻨﻴﺔ‬
‫ﳏﻮر اﻫﺘﻤﺎم ﻛﺒﲑ ﻣﻦ ﻗﺒﻞ اﳉﺎﻣﻌﺎت اﳍﻨﺪﺳﻴﺔ اﻟﺮاﺋﺪة ﰲ اﻟﺪول اﳌﺘﻘﺪﻣﺔ‪.‬‬

‫ن اﻫﺘﻤﺎم اﻟﺘﻌﻠﻴﻢ اﳍﻨﺪﺳﻲ ﻬﺑﺬﻩ اﻟﺘﻘﻨﻴﺔ ﻳﻌﻮد إﱃ أواﺋﻞ ﻋﺎم ‪ 1997‬ﺣﻴﺚ ﻗﺎم اﻟﺪﻛﺘﻮر ‪ Ochi‬ﰲ ﻋﺎم ‪ 1997‬ﺑﺎﺳﺘﺨﺪام ﺗﻘﻨﻴﺔ اﻟـ‪FPGA‬‬

‫ﺧﻼل ﺗﺪرﻳﺲ ﻣﻘﺮر ﺑﻨﻴﺔ اﳊﺎﺳﺐ‪ ،‬ﺣﻴﺚ ﻗﺎم اﻟﻄﻼب ﺑﺒﻨﺎء ﻣﻌﺎﰿ ‪ 16-bit‬ﻋﻠﻰ ﺷﺮﳛﺔ ‪.[274]FPGA‬‬

‫ﻣﺪى ﻃﻮﻳﻞ اﳌﻘﺪرة ﻋﻠﻰ ﻣﻨﺢ ﻋﺪد ﻣﻦ اﻟﻔﺮص اﳉﺪﻳﺪة ﻟﻠﺘﻌﻠﻴﻢ اﳉﺎﻣﻌﻲ اﳍﻨﺪﺳﻲ إذ ﻏﺪت ﺿﻤﻦ‬ ‫ﻟﻘﺪ أﻇﻬﺮت ﺗﻘﻨﻴﺔ اﻟـ‪ FPGA‬ﻋﻠﻰ ً‬
‫ﳌﻘﺮرات اﳌﺨﱪﻳﺔ اﳉﺎﻣﻌﻴﺔ ﻟﺘﺼﻤﻴﻢ اﻷﻧﻈﻤﺔ اﻟﺮﻗﻤﻴﺔ ﻋﻠﻰ ﻛﺎﻓﺔ ﻣﺴﺘﻮﻳﺎﻬﺗﺎ وﺻﻔﻮﻓﻬﺎ اﳉﺎﻣﻌﻴﺔ‪ .‬ﻛﻤﺎ أن اﻟﺮوﺑﻮﺗﺎت اﻟﱵ ﻳﺘﻢ ﺗﻄﻮﻳﺮﻫﺎ ﺑﺎﻻﻋﺘﻤﺎد‬
‫ﻋﻠﻰ ﺗﻘﻨﻴﺔ اﻟـ‪ FPGA‬أوﺟﺪت ﺿﻤﻦ اﳌﻘﺮرات اﻟﺘﺪرﻳﺴﻴﺔ ﲡﺎرب ﳐﱪﻳﺔ ﺟﺪﻳﺪة ﺟﺬﺑﺖ اﻟﻄﻼب وأﺳﺮت ﻓﻀﻮﳍﻢ وأﺛﺮت ﰲ ﲢﻔﻴﺰﻫﻢ ﳓﻮ‬
‫ﺗﻄﻮﻳﺮ ﻣﺸﺎرﻳﻊ اﻷﻧﻈﻤﺔ اﻟﺮﻗﻤﻴﺔ اﳌﺪﳎﺔ]‪ .[275-277‬ﻛﻤﺎ اﺳﺘﺨﺪﻣﺖ ﺗﻘﻨﻴﺔ اﻟـ‪ FPGA‬ﰲ اﶈﺎﺿﺮات اﳉﺎﻣﻌﻴﺔ ﻟﺪراﺳﺔ ﺗﺼﻤﻴﻢ أﻧﻈﻤﺔ اﻟـ‪،SoPC‬‬
‫وﻣﻨﻬﺠﻴﺔ اﻟﺘﺼﻤﻴﻢ ‪ ،Hw-Sw co-design‬وﺑﻨﻴﺔ اﳊﺎﺳﺐ‪ ،‬وﻣﻌﺎﳉﺔ اﻹﺷﺎرة اﻟﺮﻗﻤﻴﺔ‪ ،‬وﺗﺼﻤﻴﻢ اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ ﻋﻠﻰ ﺷﺮاﺋﺢ‬
‫)‪.[276,28,279](SoCs‬‬

‫‪ 1-5-2‬اﳌﻘﺮرات اﻟﺘﺄﺳﻴﺴﻴﺔ ﻟﺘﻌﻠﻴﻢ ﺗﻘﻨﻴﺔ اﻟـ‪:(Essential Curriculum for Teaching FPGA) FPGA‬‬
‫إن ﻣﺴﺄﻟﺔ ﺗﺼﻤﻴﻢ ﻫﺬﻩ اﻷﻧﻈﻤﺔ ﺑﻜﻔﺎءة ﻋﺎﻟﻴﺔ ﳛﺘﺎج إﱃ ﻣﻌﺮﻓﺔ ﻛﺎﻓﻴﺔ ﺣﻮل ﻣﺴﺎﺋﻞ ﺗﺼﻤﻴﻢ اﻷﻧﻈﻤﺔ اﻟﺮﻗﻤﻴﺔ وﻟﻐﺎت وﺻﻒ اﻟﻜﻴﺎن اﻟﺼﻠﺐ‬
‫)‪ ،(HDLs‬إذ أن اﻟﱪاﻣﺞ اﳌﻜﺘﻮﺑﺔ ﺑﻠﻐﺎت وﺻﻒ اﻟﻜﻴﺎن اﻟﺼﻠﺐ )ﻣﺜﻞ‪VHDL, Verilog :‬ﺗﻌﺘﱪ ﻏﺮﻳﺒﺔ ﺟﺪاً ﰲ ﺗﻌﻠﻴﻤﺎﻬﺗﺎ وﻫﻴﻜﻠﻴﺎﻬﺗﺎ‬
‫ﺑﺎﻟﻨﺴﺒﺔ ﻟﻠﻐﺎت اﻟﱪﳎﺔ اﻟﻌﺎﻣﺔ‪ ،‬ﻏﲑ أ�ﺎ ﻻ ﺗﺘﻄﻠﺐ ﻣﻌﺮﻓﺔ ﻋﻤﻴﻘﺔ وﻣﻬﺎرات ﰲ ﻋﻠﻮم اﻹﻟﻜﱰوﻧﻴﺎت‪ ،‬وﺑﺎﻟﺘﺎﱄ ﻻ ﺗﺘﻄﻠﺐ إﺿﺎﻓﺔ ﻣﻘﺮرات دراﺳﻴﺔ‬
‫ﺗﺸﲑ إﱃ أﻧﻪ اﳌﻘﺮرات اﻟﺘﺄﺳﻴﺴﻴﺔ اﻟﱵ ﺗﻌﻄﻰ ﰲ اﳌﺮاﺣﻞ اﻟﺪراﺳﻴﺔ اﻷوﱃ ﰲ‬ ‫]‪[281-283‬‬
‫ﺟﺪﻳﺪة ﺣﻮل اﻹﻟﻜﱰوﻧﻴﺎت اﳌﺘﻘﺪﻣﺔ‪ .‬اﳋﱪات اﻟﺴﺎﺑﻘﺔ‬
‫‪ -‬واﻟﱵ ﺗﺪرس ﻛﻤﺤﺎﺿﺮات ﻧﻈﺮﻳﺔ ‪ -‬ﺗﻘﺪم‬ ‫]‪[285‬‬
‫وﺑﻨﻴﺔ اﳊﺎﺳﺐ‬ ‫]‪[284‬‬
‫ﻋﻠﻮم اﻹﻟﻜﱰوﻧﻴﺎت إﺿﺎﻓﺔً إﱃ أﺳﺎﺳﻴﺎت اﻟﺪارات اﻟﺮﻗﻤﻴﺔ اﳌﻨﻄﻘﻴﺔ‬
‫اﳌﻌﺮﻓﺔ اﻟﻜﺎﻓﻴﺔ واﻟﻮاﻓﻴﺔ ﻟﻠﻄﻼب ﻟﻠﺒﺪء ﰲ دراﺳﺔ ﺑﺮﳎﺔ وﺗﺼﻤﻴﻢ أﻧﻈﻤﺔ اﻟـ‪ .FPGA‬وﻟﺘﺴﺮﻳﻊ ﻋﻤﻠﻴﺔ اﻟﺘﻌﻠﻢ اﻟﺘﻄﺒﻴﻘﻲ ﰲ اﻟﺼﻔﻮف اﻟﻨﻈﺮﻳﺔ ﻳﻠﺠﺄ‬
‫ﻋﺎدة إﱃ إﺿﺎﻓﺔ ﻣﻨﻬﺞ ﻋﻤﻠﻲ ﺗﻄﺒﻴﻘﻲ ﻟﺘﺼﻤﻴﻢ اﻷﻧﻈﻤﺔ اﻟﺮﻗﻤﻴﺔ ﺑﺎﺳﺘﺨﺪام ﺗﻘﻨﻴﺔ اﻟـ‪.[286]FPAG‬‬

‫‪ 2-5-2‬ﺗﻘﻨﻴﺔ اﻟـ‪ FPGA‬ﰲ ﳐﺘﱪ ﺗﺼﻤﻴﻢ اﻟﺪارات اﳌﻨﻄﻘﻴﺔ )‪:(FPGA-based Digital Electronic Lab‬‬
‫إن اﳌﺮوﻧﺔ اﻟﻜﺒﲑة واﻟﺴﻬﻮﻟﺔ ﰲ اﺳﺘﺨﺪام ﺗﻘﻨﻴﺔ اﻟـ‪ FPGA‬أدواﻬﺗﺎ اﳌﺘﻄﻮرة ﺗﺰود اﻟﻄﻼب أﺛﻨﺎء ﺗﻌﻠﻢ ﻣﺒﺎدئ ﺗﺼﻤﻴﻢ اﻷﻧﻈﻤﺔ اﻟﺮﻗﻤﻴﺔ واﳌﻨﻄﻘﻴﺔ‬
‫ﺑﺎﻟﻔﺮﺻﺔ اﳌﻼﺋﻤﺔ ﻟﻠﻌﻤﻞ ﻋﻠﻰ ﻣﺸﺎرﻳﻊ ﻫﺎدﻓﺔ ذات ﺗﻄﺒﻴﻖ واﻗﻌﻲ‪ ،‬وذو أﺛﺮ ﻣﻠﻤﻮس ﻣﻦ ﺧﻼل ﺗﺼﻤﻴﻢ ﳛﻮي ﻋﻠﻰ ﻋﺸﺮات اﻵﻻف ﻣﻦ‬
‫اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ]‪ ،[287,288‬وﺑﺪﻻً ﻣﻦ ﺗﺼﻤﻴﻢ اﻟﺪارات اﳌﻨﻄﻘﻴﺔ ﺑﺎﺳﺘﺨﺪام ﺑﺮاﻣﺞ اﶈﺎﻛﺎة أو اﻻﻗﺘﺼﺎر ﻋﻠﻰ اﻟﺘﺼﻤﻴﻢ اﻟﻨﻈﺮي‪ ،‬ﻓﺈن اﻟﻌﺪﻳﺪ ﻣﻦ‬
‫ﻣﻘﺮرات ﺗﺼﻤﻴﻢ اﻟﺪارات اﳌﻨﻄﻘﻴﺔ ﻳﺘﻢ ﺗﺪرﻳﺴﻬﺎ اﻵن ﺑﺎﺳﺘﺨﺪام ﺗﻘﻨﻴﺔ اﻟـ‪ ،FPGA‬ﺣﻴﺚ ﻳﺘﻢ ﺗﺼﻤﻴﻢ اﻟﺪارات اﳌﻨﻄﻘﻴﺔ ﻋﻠﻰ ﺷﺮﳛﺔ ‪FPGA‬‬

‫وﻳﺘﻢ ﺗﺸﻐﻴﻠﻬﺎ‪ ،‬وﻳﺴﺘﺨﺪم ﰲ ﻫﺬﻩ اﳌﺮﺣﻠﺔ ﳏﺮر اﻟﺘﺼﻤﻴﻢ اﻟﺮﺳﻮﻣﻲ )‪ (Schematic Design‬ﺑﺪﻻً ﻣﻦ اﻟﺪﺧﻮل ﰲ ﺗﻔﺎﺻﻴﻞ ﻟﻐﺎت وﺻﻒ‬
‫اﻟﻜﻴﺎن اﻟﺼﻠﺐ‪.‬‬
‫‪93‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫اﳌﺼﻔﻮﻓﺎت اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً | ‪Field Programmable Gate Arrays‬‬

‫‪ 3-5-2‬ﺗﻘﻨﻴﺔ اﻟـ‪ FPGA‬ﰲ ﻣﻨﺎﻫﺞ ﺗﺼﻤﻴﻢ اﻷﻧﻈﻤﺔ اﻟﺮﻗﻤﻴﺔ اﳌﺘﻘﺪﻣﺔ )‪:(FPGA-based Adv. ESs Courses‬‬
‫ﺗﻌﺘﱪ ﺗﻘﻨﻴﺔ اﻟـ‪ FPGA‬اﻟﻴﻮم اﻟﺘﻘﻨﻴﺔ اﻷﻛﺜﺮ ﺗﻄﻮراً ﻋﻠﻰ ﻣﺴﺘﻮى ﺗﺼﻤﻴﻢ اﻷﻧﻈﻤﺔ اﻟﺮﻗﻤﻴﺔ]‪ .[289-291‬وﻓﻘﺎً إﱃ اﳋﱪات اﳌﻨﺸﻮرة]‪ ،[292-297‬ﻓﺈن‬
‫اﻟﻌﺪﻳﺪ ﻣﻦ اﳉﺎﻣﻌﺎت ﺣﻮل اﻟﻌﺎﱂ ﺗﺘﺒﲎ ﺗﻌﻠﻴﻢ ﺗﻄﻮﻳﺮ ﻣﻨﺎﻫﺞ ﺗﻌﻠﻴﻤﻴﺔ ﻟﺘﺼﻤﻴﻢ اﻷﻧﻈﻤﺔ اﻟﺮﻗﻤﻴﺔ ﺑﺎﺳﺘﺨﺪام ﺗﻘﻨﻴﺔ اﻟـ‪ FPGA‬ﻣﻦ ﺧﻼل اﺳﺘﺨﺪام‬
‫أدوات اﻟﺘﻄﻮﻳﺮ اﳊﻘﻴﻘﺔ‪.‬‬

‫اﻟﻌﺪﻳﺪ ﻣﻦ اﳉﺎﻣﻌﺎت ﺣﻮل اﻟﻌﺎﱂ ﺗﻘﺪم ﻣﻨﺎﻫﺞ ﺗﺪرﻳﺴﻴﺔ ﻟﺘﻌﻠﻴﻢ ﺗﺼﻤﻴﻢ اﻷﻧﻈﻤﺔ اﻟﺮﻗﻤﻴﺔ اﳌﺘﻘﺪﻣﺔ )‪ ،(VLSI, SoCs‬إﻻ أﻧﻪ ﻋﻠﻰ اﻟﺮﻏﻢ ﻣﻦ‬
‫ذﻟﻚ ﻣﺎ ﻳﺰال اﻟﺒﺤﺚ واﺳﻌﺎً ﻣﻜﺜﻔﺎً ﻋﻦ اﳊﻠﻮل اﳌﺜﻠﻰ ﻟﺘﺪرﻳﺲ وﺗﻨﻈﻴﻢ ﻫﺬﻩ اﳌﻨﺎﻫﺞ‪ ،‬ﲝﻴﺚ ﻳﻜﻮن اﻟﺮﺑﻂ ﺑﲔ اﳉﺎﻧﺐ اﻟﻌﻤﻠﻲ واﳉﺎﻧﺐ‬
‫اﻟﺘﻄﺒﻴﻘﻲ اﻟﻌﻤﻠﻲ أﻗﺮب ﻣﺎ ﳝﻜﻦ إﱃ اﻟﻮاﻗﻊ‪.‬‬

‫ﺑﺸﻜﻞ ﻋﺎم‪ ،‬ﰲ ﻫﺬﻩ اﳌﻘﺮرات ﺗُﻌﺘﻤﺪ اﻟﺘﻤﺎرﻳﻦ اﳌﺨﱪﻳﺔ اﻟﱵ ﺗَﻌﺘﻤﺪ ﻋﻠﻰ اﶈﺎﻛﺎة )‪ (Simulation‬واﻟﺘﺤـ ـﻠﻴﻞ )‪- (Analysis‬ﺑﺪﻻً ﻣﻦ ﻣﻨﻬﺞ‬
‫اﻟﺘﺼﻤﻴﻢ اﻟﺘﻄﺒﻴﻘﻲ ﺑﺎﺳﺘﺨﺪام اﻟﻜﻴﺎن اﻟﺼﻠﺐ‪ -‬ﻛﺄﺳﺎس ﰲ ﺗﻘﺪﱘ اﳉﺎﻧﺐ اﻟﻌﻤﻠﻲ ﰲ اﳌﺨﺘﱪ )‪ .(Hands-on‬ﺑﻌﺾ اﳉﺎﻣﻌﺎت اﻟﺮاﺋﺪة‬
‫)‪ (MIT, Brinkley, Stanford‬ﲤﻨﺢ اﻟﻄﻼب إﻣﻜﺎﻧﻴﺔ ﺑﻨﺎء ﳕﻮذج ‪ VLSI‬ﺣﻘﻴﻘﻲ‪ ،‬وﻟﻜﻦ ﺑﺸﻜﻞ ﻋﺎم‪ ،‬ﻓﺈن ﻫﺬا اﳌﻨﻬﺞ ﻣﺎ ﻳﺰال ﻧﺎدراً‬
‫ﺟﺪاً ﻧﻈﺮاً ﻟﻠﻜﻠﻔﺔ اﻟﻌﺎﻟﻴﺔ ﺟﺪاً ﻟﺒﻨﺎء اﻟﻨﻤﻮذج‪.‬‬

‫ﺗﻘﻨﻴﺔ اﻟـ‪ FPGA‬ﺗﺄﰐ ﻛﺤﻞ ﳌﺸﻜﻠﺔ اﻟﻜﻠﻔﺔ اﻟﻌﺎﻟﻴﺔ ﰲ ﺑﻨﺎء ﳕﺎذج ﺣﻘﻴﻘﻴﺔ ﻟﻸﻧﻈﻤﺔ اﻟﺮﻗﻤﻴﺔ اﳌﺘﻘﺪﻣﺔ‪ ،‬ﺣﻴﺚ أن اﻟﻌﺪﻳﺪ ﻣﻦ اﳉﺎﻣﻌﺎت وﻣﺮاﻛﺰ‬
‫اﻟﺘﺪرﻳﺐ ﺣﻮل اﻟﻌﺎﱂ وﺟﺪت اﻟﻔﺮﺻﺔ اﳌﺜﻠﻰ واﳊﻞ اﻟﻨﻤﻮذﺟﻲ ﻣﻦ ﺧﻼل اﺳﺘﺨﺪام ﻟﻮﺣﺎت ﺗﻄﻮﻳﺮ اﻟ ـ‪FPGA Development ) FPGA‬‬

‫‪ (Boards‬ﰲ ﺗﺪرﻳﺲ ﻣﻨﺎﻫﺞ ﺗﺼﻤﻴﻢ اﻷﻧﻈﻤﺔ اﻟﺮﻗﻤﻴﺔ اﳌﺘﻘﺪﻣﺔ‪ ،‬ﺣﻴﺚ اﺳﺘﻄﺎﻋﺖ ﻫﺬﻩ اﻟﺘﻘﻨﻴﺔ أن ﺗﻀﻴﻒ ﻣﺴﺘﻮى ﻛﺒﲑ ﻣﻦ اﻟﻮاﻗﻌﻴﺔ ﻟﻠﺨﱪة‬
‫اﳌﻜﺘﺴﺒﺔ ﻣﻦ اﻟﺘﻌﻠﻴﻢ اﳌﺨﱪي اﳍﻨﺪﺳﻲ‪ ،‬إﺿﺎﻓﺔً إﱃ ﻧﺸﻮء ﲢﻔﻴﺰ وﺗﻌﺰﻳﺰ ﻛﺒﲑ ﻟﺪى اﻟﻄﻼب ﻣﻦ ﺣﻴﺚ أ�ﻢ ﻳﻠﻤﺴﻮن اﻟﻔﻜﺮة اﻟﻨﻈﺮﻳﺔ ﺑﺸﻜﻞ‬
‫ﻋﻤﻠ ٍﻲ ﺗﻄﺒﻴﻘ ٍﻲ ﻛﻤﺎ ﻟﻮ أ�ﺎ ﺗﻌﻤﻞ ﰲ اﻟﻮاﻗﻊ اﳊﻘﻴﻘﻲ]‪.[298‬‬

‫رﲟﺎ ﳚﺪر اﻹﺷﺎرة إﱃ أﻧﻪ وﻋﻠﻰ اﻟﺮﻏﻢ ﻣﻦ أن اﻻﺳﺘﺨﺪام اﻟﺒﺪﻳﻞ ﻟﺸﺮاﺋﺢ اﻟـ‪ FPGA‬ﻛﻤﻨﺼﺎت ﺗﻄﺒﻴﻘﻴﺔ ﰲ ﺑﻨﺎء أﻧﻈﻤﺔ اﻟـ‪ VLSI‬اﻟﺮﻗﻤﻴﺔ‪ ،‬ﻟﻴﺲ‬
‫ﻟﻪ ﺻﻠﺔ ﻣﺒﺎﺷﺮة ﺑﺎﻟﺘﺼﻤﻴﻢ اﻟﻨﻬﺎﺋﻲ ﻋﻠﻰ اﳌﺴﺘﻮى اﻟﺴﻴﻠﻴﻜﻮﱐ‪ ،‬إﻻ أن اﳌﺴﺎﺋﻞ اﻟﺘﺼﻤﻴﻤﻴﺔ اﳉﻮﻫﺮﻳﺔ واﻟﻌﻼﻗﺔ ﻓﻴﻤﺎ ﺑﻴﻨﻬﺎ وﻣﺮاﺣﻞ ﺑﻨﺎء اﻟﻨﻈﺎم‬
‫وﺗﻮﺻﻴﻒ ﺳﻠﻮﻛﻪ واﺧﺘﺒﺎر أداءﻩ ﻋﻠﻰ اﻟﻜﻴﺎن اﻟﺼﻠﺐ ﻫﻲ ﻧﻔﺴﻬﺎ ﻟﻜﻼ اﻟﺘﻘﻨﻴﺘﲔ‪ ،‬ﺑﻞ أن ﺗﻘﻨﻴﺔ اﻟـ‪ FPGA‬ﺗﻀﻴﻒ واﻗﻌﻴﺔ ووﺿﻮح أﻛﺜﺮ ﳍﺬﻩ‬
‫اﳌﺴﺎﺋﻞ‪.‬‬

‫‪ 4-5-2‬ﺗﺒﲏ ﻣﻨﺎﻫﺞ ﺗﻌﻠﻴﻤﻴﺔ ﻟﱪﳎﺔ اﳌﻌﺎﳉﺎت ﺑﺎﺳﺘﺨﺪام اﻟـ‪:(FPGA-based MPU Prog. Courses) FPGA‬‬
‫ﻧﻈﺮاً ﻟﻠﻤﺮوﻧﺔ اﻟﻜﺒﲑة ﰲ ﺗﺼﻤﻴﻢ ﺷﺮاﺋﺢ اﻟـ‪ ،FPGA‬وﻛﻮن ﻫﺬﻩ اﻟﺘﻘﻨﻴﺔ ﻏﺪت ﳏﻮر اﻫﺘﻤﺎم اﻟﻘﻄﺎﻋﺎت اﻟﺼﻨﺎﻋﻴﺔ‪ ،‬ﻗﺎﻣﺖ اﻟﺸﺮﻛﺎت اﻟﺮاﺋﺪة‬
‫اﳌﺼﻨﻌﺔ ﻟﺸﺮاﺋﺢ اﻟـ‪ FPGA‬ﺑﺘﺰوﻳﺪ اﻟﺸﺮاﺋﺢ ﺑﻮﺣﺪات ﻣﻌﺎﳉﺎت ﻋﺎﻣﺔ ﻣﺪﳎﺔ ﻋﻠﻰ اﻟﺸﺮاﺋﺢ]‪ ،[299‬واﻟﺬي ﺑﺪورﻩ ﺣﻔﺰ اﻟﻌﺪﻳﺪ ﻣﻦ اﳉﺎﻣﻌﺎت ﻋﻠﻰ‬
‫ﺗﺒﲏ ﻣﻨﺎﻫﺞ ﺗﻌﻠﻴﻤﻴﺔ ﺟﺪﻳﺪة ﰲ اﳌﺨﺘﱪات اﳉﺎﻣﻌﻴﺔ اﳍﻨﺪﺳﻴﺔ ﻟﺘﺼﻤﻴﻢ وﺑﺮﳎﺔ اﳌﻌﺎﳉﺎت ﺑﺎﺳﺘﺨﺪام ﺷﺮاﺋﺢ اﻟـ‪.[300]FPGA‬‬

‫‪ 5-5-2‬ﺗﺒﲏ ﻣﻨﺎﻫﺞ ﺗﺼﻤﻴﻢ اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ ﺑﺎﺳﺘﺨﺪام ﺗﻘﻨﻴﺔ اﻟـ‪:(FPGA-based ESs Courses) FPGA‬‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪94‬‬
‫‪2‬‬ ‫اﻟﻔﺼﻞ اﻟﺜﺎﱐ | ‪Chapter 2‬‬

‫إن اﻻﺳﺘﺨﺪام اﻟﻨﺎﺟﺢ ﻟﺘﻘﻨﻴﺔ اﻟـ‪ FPGAs‬ﰲ ﺑﻨﺎء أﺟﺰاء ﻧﻈﺎم ﻣﺎ ﻟﻠﻮﺻﻮل إﱃ ﺗﻄﺒﻴﻖ أﻛﺜﺮ ﻛﻔﺎءة ﻫﻮ اﻟﺬي ﻳﻘﻮد اﳊﺎﺟﺔ إﱃ اﺳﺘﺨﺪام ﺗﻘﻨﻴﺔ‬
‫اﻟـ‪ FPGAs‬ﰲ اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ ﻛﻤﺎ ﻫﻮ اﳊﺎل ﰲ ﺑﺎﻗﻲ اﻷﻧﻈﻤﺔ]‪ ،[16,301‬وﻟﻜﻦ اﻟﺘﺴﺎؤل اﳌﻬﻢ واﻟﻮﺣﻴﺪ ﻫﻮ‪ :‬ﻛﻢ ﻣﻦ اﻟﻄﻼب واﳌﻬﻨﺪﺳﲔ ﰲ‬
‫ﻓﺮوع اﻟﻌﻠﻮم اﳍﻨﺪﺳﻴﺔ ﻗﺎدرﻳﻦ ﻋﻠﻰ ﺗﺼﻤﻴﻢ أﻧﻈﻤﺔ اﻟـ‪ FPGA‬وﺑﺮﳎﺘﻬﺎ!؟‬

‫ﻳﺸﲑ اﻟﺒﺎﺣﺚ ‪ R. Hartenstein‬إﱃ أن اﳌﻨﺎﻫﺞ اﳍﻨﺪﺳﻴﺔ اﻟﱵ ﻳﺘﻢ ﺗﺪرﻳﺴﻬﺎ ﻟﻠﻄﻼب ﺗﻘﻮم ﻋﻠﻰ ﺗﻮﻇﻴﻒ ﻧﺼﻒ ﻗﺪرات ﻋﻘﻮﳍﻢ ﻓﻘﻂ]‪،[302‬‬
‫ﻣﺸﲑاً إﱃ أن ﻫﺬﻩ اﳌﻨﺎﻫﺞ ﺗﻌﲎ ﻓﻘﻂ ﺑﺘﻄﻮﻳﺮ اﳊﻠﻮل اﻟﱪﳎﻴﺔ اﻟﺒﺤﺘﺔ )‪ (Software‬ﺑﺪون اﻟﱰﻛﻴﺰ ﻋﻠﻰ ﺑﺮﳎﺔ اﻟﻜﻴﺎن اﻟﺼﻠﺐ اﻟﻘﺎﺑﻞ ﻹﻋﺎدة‬
‫أدرﻛﺖ اﳊﺎﺟﺔ‬ ‫اﻟﺘﺸﻜﻴﻞ )‪ ،(Reconfigurable Hardware‬ﻣﺜﻞ‪ :‬ﺷﺮاﺋﺢ اﻟـ‪ . FPGAs‬اﻟﻌﺪﻳﺪ ﻣﻦ اﳌﺮاﺟﻊ واﻟﻜﺘﺐ ﺣﺎﻟﻴﺎً‬
‫]‪[302-305‬‬ ‫]‪[16‬‬

‫اﳌﻠﺤﺔ ﻟﺘﺒﲏ ﻣﻨﺎﻫﺞ ﺗﺄﺳﻴﺴﻴﺔ ﲡﻤﻊ ﺑﲔ ﺗﺼﻤﻴﻢ وﺑﺮﳎﺔ اﻟﻜﻴﺎن اﻟﺼﻠﺐ ﻋﻠﻰ اﳌﺴﺘﻮى اﻟﺒﻨﻴﻮي‪ ،‬وذﻟﻚ ﻣﻦ ﺧﻼل ﺗﻘﺪﱘ ﺑﻌﺾ اﳌﻔﺎﻫﻴﻢ‬
‫ﺣﻮل اﻷﻧﻈﻤﺔ اﻟﻘﺎﺑﻠﺔ ﻹﻋﺎدة اﻟﺘﺸﻜﻴﻞ ﻋﻠﻰ ﻣﺴﺘﻮى‬ ‫]‪[306-310‬‬
‫اﻟﺘﺄﺳﻴﺴﻴﺔ ﳍﺬﻩ اﻷﻧﻈﻤﺔ‪ ،‬ﻏﲑ أن اﻟﻌﺪﻳﺪ ﻣﻦ اﻟﻜﺘﺐ اﻷﺧﺮى اﻟﱵ ﰎ ﻧﺸﺮﻫﺎ‬
‫اﻟﻜﻴﺎن اﻟﺼﻠﺐ )‪ ،(Reconfigurable Systems‬ﱂ ﻳﻐﻄﻲ أي ﻣﻨﻬﺎ اﻻﻋﺘﺒﺎرات اﻟﻮاﻓﻴﺔ واﻟﻜﺎﻓﻴﺔ ﻟﺘﻌﻠﻴﻢ ﺗﺼﻤﻴﻢ وﺑﺮﳎﺔ ﻫﺬﻩ اﻷﻧﻈﻤﺔ‪.‬‬

‫إﱃ أن اﻟﻜﺜﺎﻓﺔ اﻟﺴﻴﻠﻴﻜﻮﻧﻴﺔ ﻋﻠﻰ ﺷﺮاﺋﺢ اﳌﺸﺎرﻳﻊ اﳌﺴﺘﻘﺒﻠﻴﺔ رﲟﺎ ﺗﺘﺠﺎوز اﻟـ‪ 100‬ﺑﻠﻴﻮن ﻋﻨﺼﺮ ﻋﻠﻰ‬ ‫]‪[311‬‬
‫اﻟﺒﺎﺣﺚ ‪ Butts‬ﻳﺸﲑ ﰲ ﺗﻘﺮﻳﺮﻩ‬
‫ﻣﺴﺎﺣﺔ ﺷﺮﳛﺔ ﺳﻴﻠﻴﻜﻮﻧﻴﺔ ﺗﻘﺪر ﺑـ‪ ،1mm2‬ﰒ ﳛﺎول اﻟﺒﺎﺣﺚ أن ﻳﱪﻫﻦ ﻋﻠﻰ أن اﳌﻨﻄﻖ اﻟﻘﺎﺑﻞ ﻹﻋﺎدة اﻟﺘﺸﻜﻴﻞ ﻋﻠﻰ ﻣﺴﺘﻮى اﻟﻨﻄﺎق اﳉﺰﻳﺌﻲ‬
‫)‪ (Molecular-scale Reconfigurable Logic‬ﻣﻦ اﳌﺮﺟﺢ أن ﻳﺼﺒﺢ اﻟﺘﻜﻨﻠﻮﺟﻴﺎ اﻟﺮﻗﻤﻴﺔ اﻟﺴﺎﺋﺪة ﺧﻼل ﻋﻘﺪ ﻣﻦ اﻵن‪ .‬إن ﻫﺬﻩ‬
‫اﻟﻔﺮﺿﻴﺔ اﻟﱵ وﺿﻌﺖ ﰲ ﻋﺎم ‪ 2003‬ﺑﺪت ﻣﻼﳏﻬﺎ ﰲ ﻋﺎم ‪ ،2010‬ﺣﻴﺚ أن ﺗﺄﺛﲑ ﺗﻘﻨﻴﺔ اﻟـ‪ FPGA‬ﻳﺰداد أﻛﺎدﳝﻴﺎً وﺻﻨﺎﻋﻴﺎً ﺑﺸﻜﻞ ﻛﺒﲑ‬
‫ﻋﻠﻰ ﻋﺪة ﳏﺎور وﳎﺎﻻت ﳐﺘﻠﻔﺔ‪.‬‬

‫وﻋﻠﻴﻪ ﻓﺈن ﲨﻴﻊ اﻷﲝﺎث ﺗﺆﻛﺪ ﻋﻠﻰ أﻧﻪ ﻣﻦ اﻟﻀﺮوري أن ﺗﻨﻌﻜﺲ ﻫﺬﻩ اﻻﲡﺎﻫﺎت اﻟﺘﻜﻨﻮﻟﻮﺟﻴﺔ اﳉﺪﻳﺪة ﺣﻘﻴﻘﺔ ﻋﻤﻠﻴﺔ ﰲ اﻷﻧﺸﻄﺔ اﻟﱰﺑﻮﻳﺔ‪،‬‬
‫وﺑﺎﻟﺘﺎﱄ ﻓﺈﻧﻪ ﻣﻦ اﻟﻀﺮوري وﺟﻮد ﻣﺮاﺟﻌﺔ وﺗﻄﻮﻳﺮ ﻣﺴﺘﻤﺮ ﻟﻠﻤﻨﺎﻫﺞ اﻟﺪراﺳﻴﺔ ﳉﺎﻣﻌﻴﺔ ﻬﺑﺪف دﻣﺞ اﻟﺘﻄﻮرات اﳉﺪﻳﺪة ﻟﺘﻘﻨﻴﺔ اﻟـ‪) FPGAs‬اﻟﺒﲎ‬
‫ﻣﻨﻬﺠﻴﺎت اﻟﺘﺼﻤﻴﻢ واﻟﺘﻄﻮﻳﺮ اﳉﺪﻳﺪة( وأدواﻬﺗﺎ‪ .‬ﺑﻌﺒﺎرة أﺧﺮى‪ :‬إن اﳌﻨﺎﻫﺞ اﻟﺪراﺳﻴﺔ اﳉﺎﻣﻌﻴﺔ ﳚﺐ أن ﺗﻜﻮن ﺣﺴﺎﺳﺔ ﻟﻠﺘﻐﲑات ﰲ‬
‫اﻟﺘﻜﻨﻮﻟﻮﺟﻴﺎ واﻟﺘﻄﻮرات اﳉﺪﻳﺪة ﰲ ﳎﺎل ﻋﻠﻮم اﻟﺘﻌﻠﻴﻢ‪ ،‬وﻳﻨﺒﻐﻲ أن ﺗﺆﻛﺪ ﻋﻠﻰ أﳘﻴﺔ ﻮاﻛﺒﺔ ﻫﺬﻩ اﻟﺘﻄﻮرات ﻬﺑﺪف اﻟﻮﺻﻮل إﱃ ﺗﻌﻠﻴﻢ‬
‫ﻓﻌﺎل]‪ .[312-315‬ﺑﻌﺾ اﻷﺳﺎﻟﻴﺐ واﻟﻨﺘﺎﺋﺞ ﺣﻮل ﺗﺪرﻳﺲ أﻧﻈﻤﺔ اﻟـ‪ FPGAs‬ﰎ ﻣﻨﺎﻗﺸﺘﻬﺎ ﰲ اﻷوراق اﻟﺒﺤﺜﻴﺔ]‪ [316,317‬ﺣﻴﺚ ﰎ دراﺳﺔ اﻟﻨﻤﺎذج‬
‫اﻟﱪﳎﻴﺔ ﻣﻦ وﺟﻬﺔ ﻧﻈﺮ ﺗﻌﻠﻴﻤﻴﺔ ﺣﺪﻳﺜﺔ‪.‬‬

‫‪ 6-5-2‬ﻟﻮﺣﺎت اﻟﺘﻄﻮﻳﺮ اﻟﺘﻌﻠﻴﻤﻴﺔ ﻟﺸﺮاﺋﺢ اﻟـ‪:(Educational FPGA Development Boards) FPGA‬‬

‫ﺗﺴﺘﺨﺪم ﻟﻮﺣﺎت ﺗﻄﻮﻳﺮ اﻟـ‪ FPGA‬ﰲ ﺑﻨﺎء ﺗﻄﺒﻴﻘﺎت اﻷﻧﻈﻤﺔ اﻟﺮﻗﻤﻴﺔ ﰲ اﳌﻨﺎﻫﺞ اﳌﺨﱪﻳﺔ اﳍﻨﺪﺳﻴﺔ اﳉﺎﻣﻌﻴﺔ]‪ [318,319‬إﺿﺎﻓﺔً إﱃ ﻛﻮ�ﺎ ﻣﻨﺼﺎت‬
‫اﻟﻌﻤﻞ واﻟﺘﻄﻮﻳﺮ ﰲ اﻟﺸﺮﻛﺎت اﻟﺼﻨﺎﻋﻴﺔ اﻟﱵ ﺗﻌﲎ ﺑﺘﻄﻮﻳﺮ اﳊﻠﻮل اﳍﻨﺪﺳﻴﺔ ﻟﻸﻧﻈﻤﺔ اﳌﺪﳎﺔ‪ .‬ﺗﺘﺄﻟﻒ ﻟﻮﺣﺔ اﻟﺘﻄﻮﻳﺮ ﺑﺸﻜﻞ أﺳﺎﺳﻲ ﻣﻦ ﺷﺮﳛﺔ‬
‫‪ ،FPGA‬وﺣﺪات ﳏﻴﻄﻴﺔ ﻣﻨﻄﻘﻴﺔ‪ ،‬وﺣﺪات دﺧﻞ وﺧﺮج‪ ،‬وواﺟﻬﺔ ﺑﺮﳎﻴﺔ ﻟﱪﳎﺔ اﻟﺸﺮﳛﺔ ﻋﱪ اﳊﺎﺳﺐ )ﲢﻤﻴﻞ اﳌﻠﻒ ‪.(Bit-stream‬‬

‫اﳌﻨﺎﻫﺞ اﳌﺨﱪﻳﺔ اﻟﺘﺄﺳﻴﺴﻴﺔ – ﻣﺜﻞ‪ :‬ﺗﺼﻤﻴﻢ اﻟﺪارات اﳌﻨﻄﻘﻴﺔ – ﺗﺒﺪأ ﺑﺎﺳﺘﺨﺪام ﻟﻮﺣﺎت ﺗﻄﻮﻳﺮ اﻟـ‪ FPGA‬ﻛﺄداة ﰲ ﺗﺼﻤﻴﻢ اﻟﺘﻤﺎرﻳﻦ‬
‫واﳌﺸﺎرﻳﻊ اﻟﺮﻗﻴﻤﺔ اﳌﻨﻄﻘﻴﺔ )اﻟﺒﻮاﺑﺎت‪ ،‬اﻟﻌﺪادات‪ ،‬اﻟﻘﻼﺑﺎت‪ ،‬اﳌﺆﻗﺘﺎت‪ (... ،‬وﺗﻌﺘﻤﺪ ﻋﻠﻰ اﻟﺒﻴﺌﺔ اﻟﺼﻨﺪوﻗﻴﺔ اﻟﺮﺳﻮﻣﻴﺔ ﰲ اﻟﺘﺼﻤﻴﻢ‬
‫)‪ ،(Schematic Diagram Design‬ﰒ ﺗﻨﺘﻘﻞ إﱃ اﳌﻨﻬﺞ اﻟﺘﺎﱄ اﻟﺬي ﻳﻬﺘﻢ ﺑﺘﺼﻤﻴﻢ اﳌﻌﺎﰿ]‪.[320‬‬

‫‪95‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫اﳌﺼﻔﻮﻓﺎت اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً | ‪Field Programmable Gate Arrays‬‬

‫اﳌﻨﺎﻫﺞ اﳌﺨﱪﻳﺔ اﳌﺘﻘﺪﻣﺔ ﺗﺴﺘﺨﺪم ﻟﻮﺣﺎت ﺗﻄﻮﻳﺮ اﻟـ‪ FPGA‬ﻛﺄﺳﺎس ﰲ ﺑﻨﺎء ﻣﺸﺎرﻳﻊ اﻷﻧﻈﻤﺔ اﻟﺮﻗﻤﻴﺔ اﳌﺘﻘﺪﻣﺔ ﻣﺜﻞ‪ ،VLSI, SoCs:‬إﺿﺎﻓﺔً‬
‫إﱃ ﻛﻮن ﻫﺬﻩ اﻟﻠﻮﺣﺎت ﺗﺴﺘﺨﺪم ﻛﺄدوات ﻣﺴﺎﻋﺪة ﰲ ﺗﻌﻠﻴﻢ ﺑﺮﳎﺔ ﺗﻘﻨﻴﺔ اﻟـ‪ FPGA‬ﺗﻄﺒﻴﻘﺎﻬﺗﺎ]‪ ،[321‬ﻛﻤﺎ ﻳﺘﻢ اﻻﺳﺘﻔﺎدة ﻣﻦ ﻣﻮﺿﻮﻋﺎت‬
‫ﳐﺘﻠﻔﺔ ﺑﺸﺮح اﻟﻌﻨﺎﺻﺮ اﶈﻴﻄﻴﺔ ﻋﻠﻰ اﻟﺒﻮرد‪.‬‬

‫اﳌﻨﺎﻫﺞ اﳌﺨﱪﻳﺔ اﻟﱵ ﻇﻬﺮت ﻣﺆﺧﺮاً واﻟﱵ ﻳﺸﺎر إﻟﻴﻬﺎ ﺑـ‪ [322](Systems-on-Programmable Chips) SoPC‬ﺗﺘﻢ ﺑﺎﺳﺘﺨﺪام ﻟﻮﺣﺎت‬
‫اﻟﺘﻄﻮﻳﺮ ﰲ ﺗﻄﺒﻴﻖ ﻣﻨﻬﺠﻴﺔ اﻟـ‪ Software-Hardware co-design‬ﰲ ﺑﻨﺎء وﺗﺼﻤﻴﻢ ﻧﻈﺎم ﻣﺘﻜﺎﻣﻞ ﺑﺎﺳﺘﺨﺪام ﺷﺮاﺋﺢ اﻟـ‪ FPGA‬واﻟﺬي‬
‫ﳝﻜﻦ أن ﳛﻮي ﻋﻠﻰ ﻣﻌﺎﳉﺎت ووﺣﺪات ذاﻛﺮة ووﺣﺪات ﻣﻌﺎﳉﺔ إﺷﺎرة ووﺣﺪات اﺗﺼﺎل ﺗﺴﻠﺴﻠﻲ ﻋﺎﻟﻴﺔ اﻟﺴﺮﻋﺔ وﻏﲑﻫﺎ ﻣﻦ اﶈﻴﻄﻴﺎت‬
‫اﳌﺘﻘﺪﻣﺔ اﻟﱵ ﺗﺘﻀﻤﻨﻬﺎ ﺷﺮﳛﺔ اﻟـ‪.FPGA‬‬

‫ﺑﻌﺾ اﳉﺎﻣﻌﺎت ﺑﺎﻟﺘﻌﺎون ﻣﻊ اﳌﺆﺳﺴﺎت واﻟﺸﺮﻛﺎت اﳌﺼﻨﻌﺔ ﻟﺘﻘﻨﻴﺔ اﻟـ‪ FPGA‬ﻔﺰ اﻟﻄﻼب ﻋﻠﻰ ﺷﺮاء ﻟﻮﺣﺎت اﻟﺘﻄﻮﻳﺮ اﳋﺎﺻﺔ ﻬﺑﻢ ﻗﺒﻞ‬
‫ﲡﻤﻴﻌﻬﺎ‪ ،‬وذﻟﻚ ﺑﺄﺳﻌﺎر ﳐﻔﻀﺔ وﺧﺎﺻﺔ]‪ ،[323‬وﺑﺎﻟﺘﺎﱄ ﰲ ﺑﺪاﻳﺔ اﻟﻔﺼﻞ ﻳﺘﻢ ﺗﻌﻠﻴﻢ اﻟﻄﻼب ﻋﻠﻰ ﺗﻘﻨﻴﺎت اﻟﻠﺤﺎم واﻟﺘﺠﻤﻴﻊ واﻟﻔﺤﺺ ﻟﻠﻜﻴﺎن‬
‫ﺼﻠﺐ ﻬﺑﺪف ﲡﻤﻴﻊ ﻟﻮﺣﺎت اﻟﺘﻄﻮﻳﺮ اﳋﺎﺻﺔ ﻬﺑﻢ ﻗﺒﻞ أن ﻳﺘﻢ اﺳﺘﺨﺪاﻣﻬﺎ ﻟﻠﻤﻘﺮر اﻷﺳﺎﺳﻲ‪ ،‬إﺿﺎﻓﺔ إﱃ ذﻟﻚ ﻓﺈن ﻫﺬﻩ اﻟﻠﻮﺣﺎت ﺗﺴﺘﺨﺪم‬
‫ﰲ ﺗﻄﺒﻴﻖ اﻟﻮﻇﺎﺋﻒ اﳌﻨﺰﻟﻴﺔ ﺑﺪﻻً ﻣﻦ أن ﺗﻜﻮن اﻟﻮﻇﺎﺋﻒ ﻧﻈﺮﻳﺔ‪.‬‬

‫‪ 7-5-2‬ﳓﻮ ﻣﻨﻬﺠﻴﺔ اﻟﺘﻌﻠﻢ اﻟﺘﺸﺎرﻛﻲ اﻟﺘﻌﺎوﱐ )‪:(Toward Cooperative Learning Methodology‬‬

‫اﺳﱰاﺗﻴﺠﻴﺔ اﻟﺘﻌﻠﻢ اﻟﺘﺸﺎرﻛﻲ اﻟﺘﻌﺎوﱐ]‪ [324-326‬ﻫﻲ إﺣﺪى أﻛﺜﺮ ﳕﺎذج واﺳﱰاﺗﻴﺠﻴﺎت اﻟﺘﻌﻠﻴﻢ اﻟﻔﻌﺎل ﻟﺘﺪرﻳﺲ ﻣﻘﺮرات ﺗﺼﻤﻴﻢ اﻷﻧﻈﻤﺔ اﻟﺮﻗﻤﻴﺔ‬
‫اﳌﺘﻘﺪﻣﺔ ‪ VLSI‬ﻟﻄﻼب اﻟﻜﻠﻴﺎت اﳍﻨﺪﺳﻴﺔ‪ ،‬ﺣﻴﺚ ﳝﻜﻦ ﻟﻠﻄﻼب أن ﻳﺘﻌﻠﻤﻮا ﻣﻦ ﺧﻼل اﳌﻨﺎﻗﺸﺔ واﳌﻤﺎرﺳﺔ ﺿﻤﻦ ﳎﻤﻮﻋﺎت ﻋﻤﻞ ﻣﺸﱰﻛﺔ‬
‫)‪ (Team-based Learning‬ﺑﺪﻻً ﻣﻦ اﻟﺘﻌﻠﻢ اﻟﺴﻠﱯ اﻟﺬي ﻳﻌﺘﻤﺪ ﻋﻠﻰ اﶈﺎﺿﺮ ﻓﻘﻂ‪.‬‬

‫إن ﻣﺸﺎرﻛﺔ اﻟﻄﻼب ﰲ اﻟﻌﻤﻠﻴﺔ اﻟﺘﻌﻠﻴﻤﻴﺔ ﻫﻲ ﻣﻦ اﻷﻣﻮر اﻟﱵ ﰎ إﻗﺮارﻫﺎ ﻋﻠﻰ ﻧﻄﺎق واﺳﻊ ﻋﻠﻰ أ�ﺎ اﻟﻨﻘﻄﺔ اﳉﻮﻫﺮﻳﺔ ﰲ اﻟﺘﻌﻠﻢ اﻟﻔﻌﺎل‪ ،‬وﻣﻦ‬
‫اﳌﻌﺮوف أﻳﻀﺎ أن اﶈﺎﺿﺮات اﻟﺘﻘﻠﻴﺪﻳﺔ ﳝﻜﻦ أن ﺗﺘﻄﻮر ﻣﻦ ﺧﻼل ﺧﱪات اﻟﺘﻌﻠﻢ اﻟﻘﺎﺋﻤﺔ ﻋﻠﻰ دور اﻟﻄﻼب ﰲ اﻟﻌﻤﻠﻴﺔ اﻟﺘﻌﻠﻴﻤﻴﺔ]‪،[327,328‬‬
‫وﻫﺬا ﺻﺤﻴﺢ ﻻ ﺳﻴﻤﺎ ﰲ ﻤﻟﺎﻻت اﻟﺘﻜﻨﻮﻟﻮﺟﻴﺔ‪ ،‬ﺣﻴﺚ أن اﻻﻋﺘﺒﺎر اﻷﺳﺎﺳﻲ ﻟﻠﺘﻌﻠﻴﻢ اﻟﻨﺎﺟﺢ ﻫﻮ اﺗﺼﺎل اﻟﻄﻼب ﻣﻊ اﻟﺘﺠﻬﻴﺰات واﻷدوات‬
‫اﳌﺨﱪﻳﺔ‪ ،‬ﺣﻴﺚ ﳝﻜﻦ أن ﻳﻜﺘﺴﺐ اﻟﻄﻼب ﻣﻬﺎرات اﺣﱰاﻓﻴﺔ ﻋﺪﻳﺪﻳﺔ إﺿﺎﻓﺔً إﱃ ﻣﻬﺎرات اﻟﻌﻤﻞ ﺿﻤﻦ ﻓﺮﻳﻖ‪ ،‬اﳌﻘﺪرة ﻋﻠﻰ اﻹﺑﺪاع وإﳚﺎد‬
‫اﳊﻠﻮل اﳌﺜﻠﻰ‪ ،‬اﻟﺘﻌﻠﻢ ﻣﻦ اﻷﺧﻄﺎء‪ ،‬واﳌﻘﺪرة ﻋﻠﻰ اﻟﺘﺼﻤﻴﻢ وﻓﻘﺎً ﻻﺳﱰاﺗﻴﺠﻴﺎت ﻋﻠﻤﻴﺔ ﺣﻘﻴﻘﻴﺔ]‪ ،[329-331‬ﻛﻤﺎ ﺗﺸﲑ اﻟﺪراﺳﺎت أﻳﻀﺎً إﱃ أن‬
‫اﻟﻄﻼب ﻳﻔﻀﻠﻮن داﺋﻤﺎً اﻟﻌﻤﻞ ﰲ ﳎﻤﻮﻋﺎت‪ ،‬ﻛﻤﺎ أن ﻣﻌﻈﻢ اﻷﲝﺎث ﺗﺘﺠﻪ إﱃ أن ﻤﻟﻤﻮﻋﺎت اﳌﺆﻟﻔﺔ ﻣﻦ ﺛﻼث ﻃﻼب ﺗﺒﻘﻰ ﻣﺘﻤﺎﺳﻜﺔ‬
‫وﻣﺘﻔﺎﻋﻠﺔ وﻣﻨﺴﺠﻤﺔ]‪.[332‬‬

‫ﺣﺎﺟﺎت اﻟﺼﻨﺎﻋﺔ إﻟﻰ ﻣﻬﻨﺪﺳﻲ ﺗﺼﻤﻴﻢ أﻧﻈﻤﺔ اﻟـ‪:(FPGA Eng. Industry Demand) FPGA‬‬ ‫‪6-2‬‬

‫إن اﻟﺸﺮﻛﺎت اﻟﺮاﺋﺪة اﳌﺼﻨﻌﺔ ﻟﺸﺮاﺋﺢ اﻟـ‪ FPGA‬ﺗﻘﻮم ﺑﺸﻜﻞ ﻣﻨﺘﻈﻢ ﻋﻠﻰ زﻳﺎدة ﻛﻤﻴﺎت اﻹﻧﺘﺎج ﻟﺸﺮاﺋﺢ اﻟـ‪ FPGA‬اﻟﱵ ﺗﺒﺎع ﺑﻜﺜﺮة‪ ،‬وذﻟﻚ‬
‫ﻧﻈﺮاً ﻟﻜﻮ�ﺎ ﻳﻮﻣﺎً ﺑﻌﺪ ﻳﻮم ﲤﻠﻚ ﻣﻴﺰات أﻛﺜﺮ ﺗﻘﺪﻣﺎً‪ ،‬وﺗﻘﺪم ﺣﻠﻮل ﻓﻌﺎﻟﺔ ذ ﻛﻠﻔﺔ أﺧﻔﺾ ﺠﻤﻟﺎل واﺳﻊ ﻣﻦ ﺗﻄﺒﻴﻘﺎت اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ ﺑﻜﺎﻓﺔ‬
‫ﻓﺮوﻋﻬﺎ]‪[333‬؛ ﻳﺸﲑ اﶈﻠﻠﻮن إﱃ أن ﻫﺬﻩ اﻟﺰﻳﺎدة ﰲ اﳌﺒﻴﻌﺎت ﺗﱰاﻓﻖ ﻳﺪاً ﺑﻴﺪ ﻣﻊ ازدﻳﺎد اﳊﺎﺟﺔ اﳌﻠﺤﺔ إﱃ ﻣﻬﻨﺪﺳﲔ ذوي ﻣﻬﺎرات ﺟﻮﻫﺮﻳﺔ‬
‫ﻻﺳﺘﺜﻤﺎر ﻫﺬﻩ اﻟﻔﺮص واﳊﻠﻮل اﳉﺪﻳﺪة‪.‬‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪96‬‬
‫‪2‬‬ ‫اﻟﻔﺼﻞ اﻟﺜﺎﱐ | ‪Chapter 2‬‬

‫ﻣﻦ ﺟﺎﻧﺐ آﺧﺮ ﻓﺈن أدوات ﺗﺼﻤﻴﻢ اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ اﻟﱵ ﺗﺴﺘﺨﺪﻣﻬﺎ اﻟﺸﺮﻛﺎت ﰲ ﺑﻨﺎء اﻟﺘﻄﺒﻴﻘﺎت اﻟﺼﻨﺎﻋﻴﺔ ﰲ ﺗﻄﻮر ﻣﺘﺰاﻳﺪ‪ ،‬وإن اﳊﺎﺟﺔ إﱃ‬
‫ﻣﻬﻨﺪﺳﲔ ﻋﻠﻰ ﺳﻮﻳﺔ ﻋﺎﻟﻴﺔ ﻗﺎدرﻳﻦ ﻋﻠﻰ إﳚﺎد ﺗﺼﻤﻴﻢ ﺣﻘﻴﻘﻲ ﻟﻸﻧﻈﻤﺔ اﳌﺪﳎﺔ ﻋﻤﻮﻣﺎً‪ ،‬واﻷﻧﻈﻤﺔ اﻟﱵ ﺗﻌﺘﻤﺪ اﻟـ‪ FPGAs‬ﺧﺼﻮﺻﺎً ﰲ ﻃﻠﺐ‬
‫ﻣﺘﺰاﻳﺪ أﻳﻀﺎً؛ ﻟﺬا ﻓﺈن اﳌﻨﺎﻫﺞ اﻟﺘﻌﻠﻴﻤﻴﺔ واﻟﺘﺪرﻳﺒﻴﺔ ﳚﺐ أن ﺗﺮاﻋﻲ اﻟﱰﻛﻴﺰ اﻷﻛﱪ ﻋﻠﻰ ﺗﻄﻮﻳﺮ اﳌﻬﺎرات اﻟﺘﺼﻤﻴﻤﻴﺔ ﺑﺪﻻً ﻣﻦ اﻟﱰﻛﻴﺰ ﻋﻠﻰ ﻟﻐﺔ‬
‫ﻛﻴﺎن ﺻﻠﺐ أو ﺑﻴﺌﺔ ﺑﺮﳎﻴﺔ ﳏﺪدة‪ .‬اﻟﻌﺪﻳﺪ ﻣﻦ اﳌﻘﺮرات اﻟﺘﻌﻠﻴﻤﻴﺔ ﻟﻠـ‪ FPGA‬ﺗﺮﻛﺰ ﺑﺸﻜﻞ ﻛﺒﲑ ﻋﻠﻰ ﺗﻔﺎﺻﻴﻞ ﻟﻐﺔ وﺻﻒ ﻛﻴﺎن ﺻﻠﺐ ﳏﺪدة‬
‫)‪ ،[334-336](HDL‬إﻻ أن ﻫﺬﻩ اﳌﻘﺮرات ﻻ ﺗﻠﱯ ﺣﺎﺟﺎت اﻟﺼﻨﺎﻋﺔ ﻟﻜﻮ�ﺎ ﺑﻌﻴﺪة ﻋﻦ ﺗﻄﻮﻳﺮ اﳌﻬﺎرات اﳌﻄﻠﻮﺑﺔ ﻟﻠﻤﻬﻨﺪﺳﲔ اﳌﺴﺘﻘﺒﻠﻴﲔ]‪،[337‬‬
‫إذ أن ﻋﻤﻠﻴﺔ ﺗﻌﻠﻴﻢ ﺗﺼﻤﻴﻢ ﻫﺬﻩ اﻷﻧﻈﻤﺔ ﳚﺐ أن ﺗﺮﻛﺰ ﻋﻠﻰ اﺳﱰاﺗﻴﺠﻴﺎت وﻃﺮاﺋﻖ اﻟﺘﺼﻤﻴﻢ وأدواﺗﻪ ﲝﻴﺚ ﻳﻜﻮن اﻟﻄﻼب أﻗﺮب ﻣﺎ ﳝﻜﻦ إﱃ‬
‫اﻷدوات واﻻﺳﱰاﺗﻴﺠﻴﺎت اﻟﱵ ﺗﺴﺘﺨﺪم ﰲ اﻟﺼﻨﺎﻋﺔ‪ ،‬وﻋﻠﻰ أﺛﺮ ذﻟﻚ ﺗﺒﺬل ﻣﺆﺧﺮاً اﻟﻌﺪﻳﺪ ﻣﻦ اﳌﻘﱰﺣﺎت واﳉﻬﻮد اﻟﺮاﻣﻴﺔ ﻟﺘﻘﻠﻴﺺ اﻟﻔﺠﻮة ﺑﲔ‬
‫اﳌﺆﺳﺴﺎت اﻟﺘﻌﻠﻴﻤﻴﺔ واﻟﺼﻨﺎﻋﺔ ﳝﻜﻦ اﻻﻃﻼع ﻋﻠﻴﻬﺎ ﰲ اﻷوراق اﻟﺒﺤﺜﻴﺔ]‪ .[338-341‬اﻟﻌﺪﻳﺪ ﻣﻦ اﻟﺪراﺳﺎت ﺗﺸﲑ إﱃ ارﺗﻔﺎع وﺗﲑة ﺟﺮس اﻹﻧﺬار‬
‫ﻟﺪى اﳌﺆﺳﺴﺎت اﻷورﺑﻴﺔ واﻷﻣﺮﻳﻜﻴﺔ ﻣﻦ ﺗﻘﻠﺺ ﻋﺪد اﻟﺸﺒﺎب اﻟﻠﺬﻳﻦ ﳜﺘﺎرون ﳎﺎل اﻟﻌﻠﻮم اﳍﻨﺪﺳﻴﺔ ﳌﺴﺘﻘﺒﻠﻬﻢ اﻟﻌﻤﻠﻲ]‪ [342,343‬إذ ﺗﻔﻘﺪ ﻫﺬﻩ‬
‫اﳌﺆﺳﺴﺎت اﻟﻘﻴﺎدة ﰲ ﳎﺎﻻت اﻟﻌﻠﻮم واﳍﻨﺪﺳﺔ]‪.[344,345‬‬

‫اﻟﺮﺑﻂ ﺑﻴﻦ اﻟﻤﻨﺎﻫﺞ اﻟﻨﻈﺮﻳﺔ واﻟﺼﻨﺎﻋﺔ )‪:(Linking among Curriculum & Industry‬‬ ‫‪7-2‬‬

‫ﻣﺎ ﻫﻮ اﻟﻔﺮق ﺑﲔ اﳌﻨﺎﻫﺞ اﻟﺘﺪرﻳﺴﻴﺔ اﳉﺎﻣﻌﻴﺔ ﰲ اﻟﺼﻔﻮف واﻟﺼﻨﺎﻋﺔ؟ ﰲ اﳊﻘﻴﻘﺔ ﻫﺬا اﻟﺴﺆال ﰎ ﻃﺮﺣﻪ ﻣﺮاراً وﺗﻜﺮاراً ﰲ اﻟﻌﺪﻳﺪ ﻣﻦ اﶈﺎﻓﻞ‬
‫واﳌﺆﲤﺮات]‪ [346‬وﳝﻜﻦ اﻹﺟﺎﺑﺔ ﻋﻠﻴﻪ ﻣﻦ وﺟﻬﱵ ﻧﻈﺮ‪...‬‬

‫ﻓﻤﻦ وﺟﻬﺔ ﻧﻈﺮ ﻋﻤﻠﻴﺔ ﺻﻨﺎﻋﻴﺔ‪ :‬إن ﻣﺴﺎﻟﺔ ﺗﺼﻤﻴﻢ ﻣﻨﺘﺞ ﲡﺎري ﻋﻠﻰ درﺟﺔ ﻋﺎﻟﻴﺔ ﻣﻦ اﻟﻄﻠﺐ ﺧﻼل أﻗﺼﺮ زﻣﻦ ﳑﻜﻦ‪ ،‬ﻳﻌﺘﱪ ﻣﻦ اﳌﺴﺎﺋﻞ‬
‫اﳊﺮﺟﺔ ﰲ اﳌﺸﺎرﻳﻊ اﳍﻨﺪﺳﻴﺔ‪ ،‬ﻟﺬا ﻓﺈن اﳌﻬﻨﺪﺳﲔ اﳌﺨﺘﺼﲔ ﻳﻜﻮﻧﻮن ﻋﺎدة ﻣﻬﺘﻤﲔ ﺑﺸﻜﻞ أﻛﱪ وﻣﺒﺎﺷﺮ ﰲ اﳌﻌﺮﻓﺔ واﳌﻬﺎرات اﳌﺘﻌﻠﻘﺔ‬
‫ﺑﺘﻄﺒﻴﻘﺎت وﺗﻘﻨﻴﺎت ﳏﺪدة ﺑﺄﺳﺮع وﻗﺖ ﳑﻜﻦ‪.‬‬

‫وأﻣﺎ ﻣﻦ وﺟﻬﺔ ﻧﻈﺮ ﺗﻌﻠﻴﻤﻴﺔ‪ :‬إن اﻟﺘﻌﻠﻴﻢ اﳍﻨﺪﺳﻲ ﻳﻬﺘﻢ ﺑﺎﻟﺪرﺟﺔ اﻷوﱃ – ﻋﺎدةً – ﺑﺎﳌﻘﺮرات واﳌﻮﺿﻮﻋﺎت اﻷﻛﺜﺮ ﻋﻤﻮﻣﻴﺔ‪ ،‬واﻟﱵ ﺗﻌﺘﱪ‬
‫ﺿﺮورﻳﺔ "ﻣﻦ وﺟﻬﺔ ﻧﻈﺮ أﻛﺎدﳝﻴﺔ ﺗﻌﻠﻴﻤﻴﺔ"‪ ،‬ﻣﻊ أن اﻟﻌﺪﻳﺪ ﻣﻦ ﻫﺬﻩ اﳌﻮﺿﻮﻋﺎت رﲟﺎ ﻻ ﺗﺴﺘﺨﺪم – ﰲ اﻟﻐﺎﻟﺐ أو ﻋﻠﻰ اﻹﻃﻼق – ﰲ‬
‫اﻟﺘﻄﺒﻴﻖ اﻟﻌﻤﻠﻲ ﺑﻌﺪ اﻟﺘﺨﺮج‪.‬‬

‫ﻟﺬا ﻓﺈن اﳌﺆﺳﺴﺎت اﻟﺒﺤﺜﻴﺔ ﺗﺸﲑ إﱃ أﳘﻴﺔ اﻋﺘﻤﺎد ﻣﻨﺎﻫﺞ ﻋﻤﻠﻴﺔ ذات ﺻﻠﺔ ﻣﺒﺎﺷﺮة ﲝﺎﺟﺔ اﻟﺼﻨﺎﻋﺔ‪ ،‬وﻫﺬﻩ اﳌﻨﺎﻫﺞ ﺗﺪف إﱃ زﻳﺎدة ﻓﺎﻋﻠﻴﺔ‬
‫وﻓﺎﺋﺪة اﳋﱪة اﻟﻌﻤﻠﻴﺔ ﰲ اﶈﺎﺿﺮات اﻟﻨﻈﺮﻳﺔ ﻣﻦ ﺧﻼل اﻋﺘﻤﺎد اﺳﱰاﺗﻴﺠﻴﺔ إﺿﺎﻓﺔ ﻣﻨﻬﺞ ﺗﻌﻠﻴﻤﻲ ﻟﺘﺼﻤﻴﻢ اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ ﺑﺎﺳﺘﺨﺪام ﺗﻘﻨﻴﺔ‬
‫اﻟـ‪.FPGA‬‬

‫ﻳﻘﺪم ﻣﺎرﺗﻦ – ﻛﺒﲑ اﻟﺒﺎﺣﺜﲔ ﰲ ﻣﺪﻳﻨﺔ ‪ Tensilica‬ﻛﺎﻟﻴﻔﻮرﻧﻴﺎ – أﻓﻜﺎراً ﻣﻔﻴﺪة ﺣﻮل ﻣﺎ ﻳﺘﻮﺟﺐ ﻋﻠﻰ اﳌﻘﺮرات اﳉﺎﻣﻌﻴﺔ ﻟﺘﺪرﻳﺲ اﻷﻧﻈﻤﺔ‬
‫اﻟﺮﻗﻤﻴﺔ اﳌﺘﻘﺪﻣﺔ أن ﺗﻘﺪﻣﻪ‪ ،‬وذﻟﻚ ﻣﻦ ﻣﻨﻈﻮر اﻟﺼﻨﺎﻋﺔ]‪ ،[347‬ﺣﻴﺚ ﻳﺸﲑ إﱃ "أن اﳌﻘﺮرات اﻟﺘﺪرﻳﺴﻴﺔ اﻟﺘﻘﻠﻴﺪﻳﺔ ﳌﻨﻬﺞ ﺗﺼﻤﻴﻢ اﻷﻧﻈﻤﺔ اﻟﺮﻗﻤﻴﺔ‬
‫اﳌﺘﻘﺪﻣﺔ ﳚﺐ أن ﺗﺘﻐﲑ ﲝﻴﺚ ﺗﻌﻜﺲ اﻟﺘﻄﻮر اﻟﺘﻜﻨﻮﻟﻮﺟﻲ ﰲ ﻫﺬا ﻤﻟﺎل‪ ،‬ﰒ ﻳﻀﻴﻒ ﺑﺄﻧﻪ إﱃ اﻵن ﻻ ﻳﻮﺟﺪ دﻟﻴﻞ واﺿﺢ ﻋﻠﻰ أن اﳌﻨﺎﻫﺞ‬
‫اﳊﺎﻟﻴﺔ ﺗﻘﺪم اﳌﻄﻠﻮب وﺧﺼﻮﺻﺎً ﺑﺎﻟﻨﻈﺮ إﱃ ﻣﺴﺘﻮى اﳋﺮﳚﲔ اﳉﺎﻣﻌﻴﲔ؛ أﻳﻀﺎً ﻳﻨﺒﻐﻲ ﻋﻠﻰ اﻟﻄﻼب اﻟﺘﻌﺎﻣﻞ ﻣﻊ أدوات اﻟﺘﺼﻤﻴﻢ واﻟﺘﻄﻮﻳﺮ‬
‫اﳊﺪﻳﺜﺔ واﳌﺘﻘﺪﻣﺔ واﻟﱵ ﺗﺴﺘﻌﻤﻞ ﰲ اﻟﺼﻨﺎﻋﺔ"‪ ،‬وﻫﺬا ﻣﺎ أﻛﺪت ﻋﻠﻴﻪ أﲝﺎث أﺧﺮى]‪.[348‬‬

‫‪97‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫اﳌﺼﻔﻮﻓﺎت اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً | ‪Field Programmable Gate Arrays‬‬

‫اﻟﻤﺪﺧﻞ إﻟﻰ دراﺳﺔ اﻟﻤﺼﻔﻮﻓﺎت اﻟﻤﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﺒﺮﻣﺠﺔ ﺣﻘﻠﻴﺎً )‪:(Introduction to FPGAs‬‬ ‫‪8-2‬‬

‫‪ 1-8-2‬ﺗﻌﺮﻳﻒ اﻟـ ‪:(What does FPGA mean?) FPGA‬‬

‫اﻟـ‪ FPGA‬ﺑﺎﻟﺘﻌﺮﻳﻒ‪ :‬ﻫﻮ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً‪ ،‬وﻫﻮ ﻋﺒﺎرة ﻋﻦ دارات ﻣﺘﻜﺎﻣﻠﺔ ﻗﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ‪ -‬ﻋﻠﻰ ﻣﺴﺘﻮى‬
‫ﻋﺎل ﻣﻦ اﻟﺘﻜﺎﻣﻞ )‪ (VLSI‬وﺗﻜﻠﻔﺔ ﻣﻨﺨﻔﻀﺔ وﻗﺎﺑﻠﺔ ﻟﻠﺘﺼﻨﻴﻊ ﻣﺒﺎﺷﺮة دون أي ﻣﺮاﺣﻞ ﻣﺴﺒﻘﺔ‪.‬‬ ‫اﻟﻜﻴﺎن اﻟﺼﻠﺐ ‪ -‬ذات ﻣﺴﺘﻮى ٍ‬

‫إن ﻣﺼﻄﻠﺢ "‪ "Field Programmable‬ﻳﺸﲑ إﱃ أن اﻟﺒﻨﻴﺔ اﻟﺪاﺧﻠﻴﺔ ﻟﻠﺸﺮﳛﺔ – وﻫﻲ اﻟﺒﻠﻮﻛﺎت اﳌﻨﻄﻘﻴﺔ – ﳝﻜﻦ أن ﻳﺘﻢ ﺗﻌﻴﲔ ﻃﺮﻳﻘﺔ‬
‫وﺻﻠﻬﺎ ﻋﻠﻰ ﻣﺴﺘﻮى اﻟﻜﻴﺎن اﻟﺼﻠﺐ ﻣﻦ ﻗﺒﻞ اﳌﺼﻤﻢ أﺛﻨﺎء ﻋﻤﻞ اﻟﺸﺮﳛﺔ ﰲ اﻟﻨﻈﺎم‪ ،‬ﻋﻠﻰ ﺧﻼف اﻟﺸﺮاﺋﺢ ذات اﻟﺘﻄﺒﻴﻘﺎت اﶈﺪدة اﻟﻮﻇﻴﻔﺔ‬
‫)…‪ (MCUs, MPUs, ASICs, SOCs, etc‬اﻟﱵ ﰎ ﻓﻴﻬﺎ ﺗﻌﻴﲔ ﺑﻨﻴﺔ اﻟﻜﻴﺎن اﻟﺼﻠﺐ ﺑﺸﻜﻞ ﻣﺴﺒﻖ ﻣﻦ ﻗﺒﻞ اﻟﺸﺮﻛﺔ اﻟﺼﺎﻧﻌﺔ‪.‬‬

‫‪ 2-8-2‬أﺻﻞ ﻧﺸﻮء ﺗﻘﻨﻴﺔ اﻟـ‪:(The Origin of FPGA) FPGA‬‬

‫ﺗﻌﺘﱪ ﺗﻘﻨﻴﺔ اﻟـ‪ FPGA‬أﺣﺪ ﻓﺮوع اﻟﻌﻨﺎﺻﺮ اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ )‪ ،(PLDs‬واﻟﱵ ﻫﻲ ﻋﺒﺎرة ﻋﻦ ﻋﻨﺎﺻﺮ ذات ﺑﻨﻴﺔ داﺧﻠﻴﺔ ﳏﺪدة ﻣﺴﺒﻘﺎً ﻣﻦ‬
‫ﻗﺒﻞ اﻟﺸﺮﻛﺔ اﻟﺼﺎﻧﻌﺔ‪ ،‬إﻻ أن ﺑﻨﻴﺘﻬﺎ اﻟﺪاﺧﻠﻴﺔ ﳝﻜﻦ ﺗﻌﺪﻳﻞ ﻃﺮﻳﻘﺔ ﺗﻮﺻﻴﻠﻬﺎ ﻟﺘﻘﻮم ﺑﻮﻇﺎﺋﻒ ﳐﺘﻠﻔﺔ‪ .‬ﺑﺎﳌﻘﺎرﻧﺔ ﻣﻊ اﻟـ‪ FPGA‬ﻓﺈن ﻋﻨﺎﺻﺮ اﻟـ‪PLD‬‬

‫ﲤﻠﻚ ﻋﺪد ﳏﺪود ﻣﻦ اﻟﺒﻮاﺑﺎت ﻛﻤﺎ أن اﻟﻮﻇﺎﺋﻒ اﻟﱵ ﺗﺆدﻳﻬﺎ ﺗﻜﻮن أﺻﻐﺮ وأﺑﺴﻂ ﻣﻦ اﻟﻮﻇﺎﺋﻒ اﻟﱵ ﻣﻦ اﳌﻤﻜﻦ أن ﺗﺆدﻳﻬﺎ ﺗﻘﻨﻴﺔ اﻟـ‪.FPGA‬‬

‫اﻟﺸﻜﻞ‪ 1-2‬ﻳﺒﲔ اﳌﺨﻄﻂ اﻟﺰﻣﲏ ﻟﺘﻄﻮر ﺗﻘﻨﻴﺎت اﻟﺪارات اﳌﺘﻜﺎﻣﻠﺔ ﺣﻴﺚ ﺗﻮﺿﺢ اﻷﻗﺴﺎم اﳌﻈﻠﺔ ﺑﺎﻟﻠﻮن اﻷﺻﻔﺮ ﺑﺄن ﻫﺬﻩ اﻟﺘﻘﻨﻴﺔ ﻛﺎﻧﺖ ﻣﺘﻮﻓﺮة‬
‫ﻣﻨﺬ وﻗﺖ ﻣﺒﻜﺮ‪ ،‬وﻟﻜﻨﻬﺎ ﱂ ﺗﻜﻦ ﻣﻄﺮوﻗﺔ اﻻﺳﺘﺨﺪام ﺣﱴ وﻗﺖ ﻣﺘﺄﺧﺮ‪ ،‬ﻓﻘﺪ ﻗﺪﻣﺖ ﺷﺮﻛﺔ ‪ Xilinx‬ﻟﻠﻌﺎﱂ أول ﺷﺮﳛﺔ ‪ FPGA‬ﰲ ﺑﺪاﻳﺔ‬
‫ﻋﺎم ‪ 1984‬إﻻ أن ﻫﺬﻩ اﻟﺘﻘﻨﻴﺔ ﱂ ﺗﺴﺘﺨﺪم ﻋﻠﻰ ﻧﻄﺎق واﺳﻊ ﺣﱴ ﺑﺪاﻳﺔ اﻟﺘﺴﻌﻴﻨﻴﺎت]‪.[349‬‬

‫اﻟﺸﻜﻞ‪ 1-2‬اﳌﺨﻄﻂ اﻟﺰﻣﲏ ﻟﺘﻄﻮر ﺗﻘﻨﻴﺎت اﻟﺪارات اﳌﺘﻜﺎﻣﻠﺔ واﻟﻌﻨﺎﺻﺮ اﳌﻨﻄﻘﻴﺔ‬

‫‪ 3-8-2‬ﻣﺒﺎدئ ﰲ اﻟﻌﻨﺎﺻﺮ اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ )‪:(Basics of PLD's‬‬

‫ﻗﺒﻞ اﳋﻮض ﰲ ﺗﻘﻨﻴﺎت وﺗﻔﺎﺻﻴﻞ اﻟﻌﻨﺎﺻﺮ اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ‪ ،‬ﻓﺈﻧﻪ ﻻﺑﺪ ﻣﻦ اﻟﺘﻌﺮف إﱃ اﳌﺒﺎدئ اﻷﺳﺎﺳﻴﺔ ﳍﺬﻩ اﻟﺘﻘﻨﻴﺎت واﻟﱵ ﻣﻨﻬﺎ‪:‬‬
‫ﺗﻘﻨﻴﺎت اﻟﻮﺻﻼت ﺑﲔ اﻟﻜﺘﻞ اﳌﻨﻄﻘﻴﺔ – ﺗﻘﻨﻴﺎت اﻟﺘﺼﻨﻴﻊ ﻟﻠﻌﻨﺎﺻﺮ اﳌﻨﻄﻘﻴﺔ‪.‬‬

‫ﺗﻘﻨﻴﺎت اﻟﻮﺻﻼت اﳌﻨﻄﻘﻴﺔ ﰲ اﻟﻌﻨﺎﺻﺮ اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ )‪:(PLD’s Link Technologies‬‬ ‫‪1-3-8-2‬‬

‫ﻳﺘﻢ ﺗﺸﻜﻴﻞ اﻟﻜﺘﻞ اﳌﻨﻄﻘﻴﺔ ﻣﻦ ﺧﻼل وﺻﻼت ﻣﻨﻄﻘﻴﺔ ﻗﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ واﻟﱵ ﺗﻘﻮم ﻋﻠﻰ وﺻﻞ أو ﻓﺼﻞ اﳌﺪاﺧﻞ أو اﳌﺨﺎرج ﺑﲔ اﻟﺒﻮاﺑﺎت‬
‫ﻟﺘﺸﻜﻴﻞ اﳊﺎﻟﺔ اﳌﻨﻄﻘﻴﺔ اﳌﻄﻠﻮﺑﺔ‪ .‬ﻳﻮﺟﺪ ﺳﺘﺔ ﺗﻘﻨﻴﺎت ﳐﺘﻠﻔﺔ ﻟﻠﻮﺻﻼت وﻫﻲ]‪:[350,351‬‬

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‫‪2‬‬ ‫اﻟﻔﺼﻞ اﻟﺜﺎﱐ | ‪Chapter 2‬‬

‫• ﺗﻘﻨﻴﺔ اﻟﻮﺻﻠﺔ اﳌﻨﺼﻬﺮة )‪.(Fusible Link Technology‬‬

‫• ﺗﻘﻨﻴﺔ اﻟﻮﺻﻠﺔ اﳌﻘﺼﻮرة )‪.(Anti-fuse Technology‬‬
‫• ﺗﻘﻨﻴﺔ اﻟﺬاﻛﺮة ‪.(SRAM-based Technology) SRAM‬‬
‫• ﺗﻘﻨﻴﺔ اﻟﺬاﻛﺮة ‪.(Flash-based Technologies) Flash‬‬
‫• ﺗﻘﻨﻴﺔ اﻟﺬاﻛﺮة ‪.(EPROM-based Technologies) EPROM‬‬
‫• ﺗﻘﻨﻴﺔ اﻟﺬاﻛﺮة ‪.(EEPROM-based Technologies) EEPROM‬‬

‫اﻟﺸﻜﻞ‪ 2-2‬ﻳﺒﲔ ﳐﻄﻂ ﺗﻘﻨﻴﺎت ﺧﻼﻳﺎ اﻟﺘﺨﺰﻳﻦ اﻟﺬاﻛﺮﻳﺔ اﳌﺴﺘﺨﺪﻣﺔ ﰲ اﻟﻌﻨﺎﺻﺮ اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ‪.‬‬
‫‪Programmable‬‬
‫‪Memory Cells‬‬

‫‪Unipolar‬‬ ‫‪Bipolar‬‬
‫‪CMOS‬‬ ‫‪BJT‬‬

‫‪EEPROM‬‬ ‫‪EPROM‬‬ ‫‪FLASH‬‬ ‫‪SRAM‬‬ ‫‪AntiFuse‬‬ ‫‪Fusible‬‬

‫اﻟﺸﻜﻞ‪ 2-2‬ﺗﻘﻨﻴﺎت اﳋﻼﻳﺎ اﻟﺬاﻛﺮﻳﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ‬

‫‪ 1-1-3-8-2‬ﺗﻘﻨﻴﺔ اﻟﻮﺻﻠﺔ اﳌﻨﺼﻬﺮة )‪:(Fusible Link Technology‬‬

‫ﺗﻌﺘﱪ ﺗﻘﻨﻴﺔ اﻟﻮﺻﻠﺔ اﳌﻨﺼﻬﺮة إﺣﺪى أواﺋﻞ اﻟﺘﻘﻨﻴﺎت اﳌﺴﺘﺨﺪﻣﺔ ﻟﺘﻌﻴﲔ اﻟﻮﺻﻼت ﺑﲔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ ﰲ اﻟﻌﻨﺎﺻﺮ اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ‪.‬‬
‫ﺗﻌﺘﻤﺪ اﻟﻮﺻﻼت ﰲ ﻫﺬﻩ اﻟﺘﻘﻨﻴﺔ ﻋﻠﻰ اﻟﱰاﻧﺰﺳﺘﻮرات اﻟﺜﻨﺎﺋﻴﺔ ﻟﺘﺸﻜﻴﻞ اﻟﻮﺣﺪات اﻟﺬاﻛﺮﻳﺔ اﳌﻨﻄﻘﻴﺔ اﻟﱵ ﺗﻌﺘﱪ ﻛﺨﻼﻳﺎ ﲣﺰﻳﻦ داﺋﻤﺔ )‪non-‬‬

‫‪ (volatile‬ﻗﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﳌﺮة واﺣﺪة ”‪ ،(One-Time-Programmable) “OTP‬أي أﻧﻪ ﻻ ﳝﻜﻦ ﳏﻴﻬﺎ أو إﻋﺎدة ﺑﺮﳎﺘﻬﺎ ﻣﺮة ﺛﺎﻧﻴﺔ‪،‬‬
‫إﻻ أن زﻣﻦ اﻻﺣﺘﻔﺎظ ﺑﺎﳊﺎﻟﺔ اﳌﻨﻄﻘﻴﺔ ﺑﻌﺪ اﻟﱪﳎﺔ ﻏﲑ ﳏﺪود‪.‬‬

‫ﰲ اﳊﺎﻟﺔ اﻷوﻟﻴﺔ ﺗﻜﻮن اﻟﺸﺮﳛﺔ اﳌﻨﻄﻘﻴﺔ ﻣﺼﻨﻮﻋﺔ ﺑﻮﺟﻮد ﲨﻴﻊ اﻟﻮﺻﻼت )‪ (Fuses‬ﰲ ﻣﻜﺎ�ﺎ )ﻣﻘﺼﻮرة(‪ ،‬اﻟﺸﻜﻞ‪ ،3-2‬واﻟﱵ ﻫﻲ ﻋﺒﺎرة ﻋﻦ‬
‫وﺻﻼت ﻣﻌﺪﻧﻴﺔ ﻣﻴﻜﺮوﻳﺔ ﻗﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﻛﻬﺮﺑﺎﺋﻴﺎً؛ ﺗﺘﻢ اﻟﱪﳎﺔ ﺑﺘﻤﺮﻳﺮ ﺗﻴﺎر ﻣﻦ ﺧﻼل اﻟﻮﺻﻠﺔ‪ ،‬وذﻟﻚ ﺑﺘﻄﺒﻴﻖ ﺟﻬﺪ ٍ‬
‫ﻋﺎل ﻧﺴﺒﻴﺎً ﻋﻠﻰ ﻣﺪﺧﻞ‬
‫اﻟﻮﺻﻠﺔ؛ ﻳﺆدي إﱃ ﻓﺘﺢ اﻟﻮﺻﻠﺔ وﲢﺪﻳﺪ اﳊﺎﻟﺔ اﳌﻨﻄﻘﻴﺔ اﳌﻄﻠﻮﺑﺔ‪ ،‬اﻟﺸﻜﻞ‪.4-2‬‬

‫اﻟﺸﻜﻞ‪ 4-2‬اﻟﻮﺻﻼت اﳌﻨﺼﻬﺮة ﺑﻌﺪ ﻋﻤﻠﻴﺔ اﻟﱪﳎﺔ‬ ‫اﻟﺸﻜﻞ‪ 3-2‬اﻟﻮﺻﻼت اﳌﻨﺼﻬﺮة ﻗﺒﻞ ﻋﻤﻠﻴﺔ اﻟﱪﳎﺔ‬

‫‪99‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫اﳌﺼﻔﻮﻓﺎت اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً | ‪Field Programmable Gate Arrays‬‬

‫ﻣﻼﺣﻈﺔ‪ :‬إن ﺗﻘﻨﻴﺔ اﻟﻮﺻﻠﺔ اﳌﻨﺼﻬﺮة ﻟﻴﺴﺖ ﻣﻦ اﻟﺘﻘﻨﻴﺎت اﳌﺴﺘﺨﺪﻣﺔ ﰲ ﺑﻨﺎء ﺷﺮاﺋﺢ اﻟـ‪ ،FPGA‬وإﳕﺎ ﻫﻲ ﻣﺴﺘﺨﺪﻣﺔ ﻓﻘﻂ ﰲ اﻷﺟﻴﺎل اﻷوﱃ‬
‫ﻟﺸﺮاﺋﺢ اﻟـ‪.PLDs‬‬

‫‪ 2-1-3-8-2‬ﺗﻘﻨﻴﺔ اﻟﻮﺻﻠﺔ اﳌﻘﺼﻮرة )‪:(Anti-fuse Technology‬‬

‫ﺗﻌﺘﻤﺪ ﻫﺬﻩ اﻟﻮﺻﻼت ﻋﻠﻰ اﻟﱰاﻧﺰﺳﺘﻮرات أﺣﺎدﻳﺔ اﻟﻘﻄﺒﻴﺔ )‪ (CMOS‬ﻟﺘﺸﻜﻴﻞ اﻟﻮﺣﺪات اﻟﺬاﻛﺮﻳﺔ اﳌﻨﻄﻘﻴﺔ اﻟﱵ ﺗﻌﺘﱪ ﻛﺨﻼﻳﺎ ذاﻛﺮﻳﺔ داﺋﻤﺔ‬
‫)‪ (non-volatile‬ﻗﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﳌﺮة واﺣﺪة ﻓﻘﻂ )‪ ،(OTP‬ﻛﻤﺎ أن ﻫﺬﻩ اﻟﺘﻘﻨﻴﺔ ﺗﻌﺘﱪ ﺟﻴﺪة ﺟﺪاً ﻣﻦ أﺟﻞ ﺗﻄﺒﻴﻘﺎت اﻟﻮﺛﻮﻗﻴﺔ اﻟﻌﺎﻟﻴﺔ‪ ،‬ﻛﻤﺎ‬
‫أن زﻣﻦ اﻻﺣﺘﻔﺎظ ﺑﺎﳊﺎﻟﺔ اﳌﻨﻄﻘﻴﺔ ﺑﻌﺪ اﻟﱪﳎﺔ ﻏﲑ ﳏﺪود‪.‬‬

‫ﻳﻮﺟﺪ أﻧﻮاع ﳐﺘﻠﻔﺔ ﻣﻦ ﺷﺮاﺋﺢ اﻟـ‪ PLD‬اﻟﱵ ﺗﻌﺘﻤﺪ اﻟﻮﺻﻠﺔ اﳌﻘﺼﻮرة ﻣﺜﻞ‪.PLICE, ViaLink, MicroVia :‬‬

‫ﻋﻠﻰ اﻟﻌﻜﺲ ﲤﺎﻣﺎً ﻣﻦ ﺗﻘﻨﻴﺔ اﻟﻮﺻﻠﺔ اﳌﻨﺼﻬﺮة‪ ،‬ﻓﺈن ﺗﻘﻨﻴﺔ اﻟﻮﺻﻠﺔ اﳌﻘﺼﻮرة ﻳﺰود ﻓﻴﻬﺎ ﻛﻞ ﻣﺴﺎر ﻗﺎﺑﻞ ﻟﻠﺘﻌﺪﻳﻞ ﰲ اﻟﺪارة ﺑﻮﺻﻠﺔ ﻗﺎﺑﻠﺔ ﻟﻠﺒﻨﺎء‪،‬‬
‫ﺣﻴﺚ ﳝﺜﻞ اﳌﺴﺎر ﰲ اﳊﺎﻟﺔ ﻏﲑ اﳌﱪﳎﺔ دارة ﻣﻔﺘﻮﺣﺔ )اﻟﻮﺻﻠﺔ ﻏﲑ ﻣﺘﻮﺿﻌﺔ(؛ اﻟﺸﻜﻞ‪.5-2‬‬

‫اﻟﺸﻜﻞ‪ 6-2‬اﻟﻮﺻﻼت اﳌﻘﺼﻮرة ﺑﻌﺪ ﻋﻤﻠﻴﺔ اﻟﱪﳎﺔ‬ ‫اﻟﺸﻜﻞ‪ 5-2‬اﻟﻮﺻﻼت اﳌﻘﺼﻮرة ﻗﺒﻞ ﻋﻤﻠﻴﺔ اﻟﱪﳎﺔ‬

‫ﻣﻦ أﺟﻞ ﺑﺮﳎﺔ اﻟﻮﺻﻠﺔ )ﻗﺼﺮﻫﺎ( ﻳﺘﻢ ﺗﻄﺒﻴﻖ ﺟﻬﺪ ﻋﺎﱄ ﻋﻠﻰ ﻣﺪﺧﻞ اﻟﺪارة اﳌﻨﻄﻘﻴﺔ اﳌﻮاﻓﻖ‪ ،‬وﻋﻨﺪﻫﺎ ﺗﺒﺪأ اﻟﻮﺻﻠﺔ ﺑﺎﻟﻈﻬﻮر ﻛﻮﺻﻠﺔ ﺳﻴﻠﻴﻜﻮﻧﻴﺔ‬
‫ﻣﻴﻜﺮوﻳﺔ زﺟﺎﺟﻴﺔ ﺗﻔﺼﻞ ﺑﲔ ﻗﻄﻌﺘﲔ ﻣﻦ اﳌﻌﺪن واﻟﱵ ﺗﻘﻮم ﻋﻠﻰ ﲢﻮﻳﻞ اﻟﻄﺒﻘﺔ اﻟﺴﻴﻠﻴﻜﻮﻧﻴﺔ إﱃ ﻧﺎﻗﻞ‪ .‬أﻣﺎ ﰲ اﳊﺎﻟﺔ اﻷوﻟﻴﺔ ﻓﺘﻌﻤﻞ اﻟﻮﺻﻠﺔ‬
‫اﻟﺴﻴﻠﻴﻜﻮﻧﻴﺔ ﻋﻤﻞ ﻣﻘﺎوﻣﺔ ﻋﺎﻟﻴﺔ ﺟﺪاً‪ .‬اﻟﺸﻜﻞ‪ 6-2‬ﻳﺒﲔ اﻟﻮﺻﻼت ﺑﻌﺪ ﻋﻤﻠﻴﺔ اﻟﱪﳎﺔ‪ .‬اﻟﺸﻜﻞ‪ (a) 7-2‬ﻳﺒﲔ ﻣﻘﻄﻊ ﰲ اﻟﺸﺮﳛﺔ اﻟﺴﻴﻠﻴﻜﻮﻧﻴﺔ‬
‫‪ CMOS‬ﻗﺒﻞ ﻋﻤﻠﻴﺔ اﻟﱪﳎﺔ ﺣﻴﺚ ﺗﻜﻮن اﻟﻮﺻﻠﺔ ﻋﺒﺎرة ﻋﻦ ﻣﻘﺎوﻣﺔ ﻻ �ﺎﺋﻴﺔ‪ .‬اﻟﺸﻜﻞ‪ (b) 7-2‬ﻳﺒﲔ ﳕﻮ اﻟﻮﺻﻠﺔ اﻟﺴﻴﻠﻴﻜﻮﻧﻴﺔ ووﺻﻞ اﻟﻨﺎﻗﻠﲔ‬
‫اﳌﻌﺪﻧﻴﲔ‪.‬‬

‫اﻟﺸﻜﻞ‪ 7-2‬ﻣﻘﻄﻊ ﰲ ﻣﺪﺧﻞ اﻟﺒﻮاﺑﺔ ﻋﻠﻰ اﳌﺴﺘﻮى اﻟﺴﻴﻠﻴﻜﻮﱐ ﻗﺒﻞ )‪ (a‬وﺑﻌﺪ )‪ (b‬ﻋﻤﻠﻴﺔ اﻟﱪﳎﺔ‬

‫إن اﻷﻧﻈﻤﺔ اﻟﱵ ﺗﻌﺘﻤﺪ ﻫﺬﻩ اﻟﺘﻘﻨﻴﺔ ﺗﻌﺘﱪ أﺟﻬﺰة ﺟﺎﻫﺰة ﻟﻠﻌﻤﻞ ﻓﻮر ﺗﻐﺬﻳﺘﻬﺎ ﺑﺎﻟﻄﺎﻗﺔ اﻟﻜﻬﺮﺑﺎﺋﻴﺔ‪ ،‬وذﻟﻚ ﻷن اﳊﺎﻟﺔ اﳌﻨﻄﻘﻴﺔ ﻟﻠﺨﻼﻳﺎ ﻻ ﻳﺘﻢ‬
‫ﻓﻘﺪا�ﺎ ﻋﻨﺪ اﻧﻘﻄﺎع اﻟﻄﺎﻗﺔ؛ ﻛﻤﺎ ﺗﻌﺘﱪ ﻫﺬﻩ اﻷﺟﻬﺰة ذات ﻣﻨﺎﻋﺔ ﻛﺒﲑة ﺿﺪ اﻟﺘﺄﺛﺮ ﺑﺎﻟﻀﺠﻴﺞ‪ ،‬ﻓﻤﻦ اﳌﻤﻜﻦ ﻟﻸﺟﻬﺰة اﻟﱵ ﺗﻌﺘﻤﺪ ﻋﻠﻰ ﺗﻘﻨﻴﺔ‬
‫‪ SRAM‬ﻣﺜﻼً ن ﺗﻔﻘﺪ ﺑﻴﺎﻧﺎﻬﺗﺎ ﻋﻨﺪ ﺗﻌﺮﺿﻬﺎ ﻟﻠﻀﺠﻴﺞ‪.‬‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪100‬‬
‫‪2‬‬ ‫اﻟﻔﺼﻞ اﻟﺜﺎﱐ | ‪Chapter 2‬‬

‫‪ 3-1-3-8-2‬ﺗﻘﻨﻴﺔ اﻟﺬاﻛﺮة ‪:(Static Random Access Memory Technology) SRAM‬‬

‫ﻳﻮﺻﻒ ﻫﺬا اﻟﻨﻮع ﺑﺎﻟﺴﺘﺎﺗﻴﻜﻲ ﻷﻧﻪ ﺣﺎﳌﺎ ﻳﺘﻢ ﲢﻤﻴﻞ ﻗﻴﻤﺔ ﻣﻨﻄﻘﻴﺔ إﱃ ﺧﻠﻴﺔ ﺿﻤﻦ اﻟﺬاﻛﺮة؛ ﻓﺈن اﳋﻠﻴﺔ ﺗﺒﻘﻰ ﳏﺎﻓﻈﺔ ﻋﻠﻰ ﻗﻴﻤﺘﻬﺎ ﻣﺎ ﱂ ﻳﺘﻢ‬
‫ﺗﻌﺪﻳﻠﻬﺎ أو ﻳﺘﻢ ﻗﻄﻊ اﻟﺘﻐﺬﻳﺔ ﻋﻦ اﻟﻨﻈﺎم‪ .‬ﺗﺘﻀﻤﻦ اﳋﻠﻴﺔ وﺣﺪة ﲣﺰﻳﻦ ‪ SRAM‬ﻣﺘﻌﺪد اﻟﱰاﻧﺰﺳﺘﻮرات‪ ،‬ﻳﻘﻮد ﺧﺮج وﺣﺪة اﻟﺘﺨﺰﻳﻦ ﺗﺮاﻧﺰﺳﺘﻮر‬
‫ﲢﻜﻢ إﺿﺎﰲ‪ ،‬واﻋﺘﻤﺎداً ﻋﻠﻰ ﳏﺘﻮﻳﺎت وﺣﺪة اﻟﺘﺨﺰﻳﻦ )”‪ (“0” or “1‬ﺳﻴﻜﻮن ﺗﺮاﻧﺰﺳﺘﻮر اﻟﺘﺤﻜﻢ ﰲ ﺣﺎﻟﺔ ‪ Off‬أو ‪.On‬‬

‫إن اﻷﺟﻬﺰة اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ اﳌﻌﺘﻤﺪة ﻋﻠﻰ ﺧﻼﻳﺎ ‪ SRAM‬ﲢﺘﺎج إﱃ ﻣﺴﺎﺣﺔ ﻛﺒﲑة ﻧﺴﺒﻴﺎً ﻣﻦ اﻟﻘﻄﺎﻋﺎت اﻟﺴﻴﻠﻴﻜﻮﻧﻴﺔ‪ ،‬وذﻟﻚ ﻷن اﳋﻠﻴﺔ‬
‫ﺗﺘﺸﻜﻞ ﻣﻦ أرﺑﻊ أو ﺳﺖ ﺗﺮاﻧﺰﺳﺘﻮرات ﺗﻌﻤﻞ ﻛﻤﺎﺳﻚ؛ اﻟﺸﻜﻞ‪ 8-2‬اﳋﻠﻴﺔ اﻟﺬاﻛﺮﻳﺔ ﻧﻮع ‪.SRAM‬‬

‫اﻟﺸﻜﻞ‪ 8-2‬ﺧﻠﻴﺔ ﻗﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺗﻌﺘﻤﺪ ﺗﻘﻨﻴﺔ ‪SRAM‬‬

‫ﺗﻌﺘﱪ اﻷﺟﻬﺰة اﳌﻌﺘﻤﺪة ﻋﻠﻰ ﺗﻘﻨﻴﺔ ‪ SRAM‬ﰲ ﻣﻘﺪﻣﺔ اﻷﺟﻬﺰة ﻣﻦ ﻧﺎﺣﻴﺔ اﻟﺘﻄﻮر اﻟﺘﻜﻨﻮﻟﻮﺟﻲ إﺿﺎﻓﺔ إﱃ أن ﻋﻤﻠﻴﺔ إﻧﺸﺎء ﺧﻼﻳﺎ‬
‫اﻟـ‪ SRAM‬ﻳﺘﻢ ﺑﻨﻔﺲ ﺗﻘﻨﻴﺔ إﻧﺸﺎء ‪ CMOS‬ﻛﻤﺎ ﰲ ﺑﻘﻴﺔ أﺟﺰاء اﻟﺸﺮﳛﺔ‪ ،‬ﻟﺬﻟﻚ ﻟﻴﺲ ﻫﻨﺎك ﻣﺘﻄﻠﺒﺎت وﻋﻤﻠﻴﺎت ﻣﻌﺎﳉﺔ ﺧﺎﺻﺔ أﺛﻨﺎء‬
‫اﻟﺘﺼﻨﻴﻊ‪ .‬ﻛﻤﺎ ﲤﺘﺎز ﺷﺮاﺋﺢ اﻟـ‪ FPGA‬اﻟﱵ ﺗﻌﺘﻤﺪ ﻋﻠﻰ ﺗﻘﻨﻴﺔ ﺧﻼﻳﺎ ‪ SRAM‬ﺑﺈﻣﻜﺎﻧﻴﺔ ﺑﻨﺎء اﻟﻨﻤﺎذج اﻷوﻟﻴﺔ ﲟﺮوﻧﺔ ﻛﺒﲑة ﲝﻴﺚ ﻜﻦ ﻬﺗﻴﺌﺔ‬
‫ﺷﺮﳛﺔ اﻟـ‪ FPGA‬ﻟﺘﻨﻔﻴﺬ ﺑﱪﻧﺎﻣﺞ ﻣﺒﺪﺋﻲ ﻋﻨﺪﻣﺎ ﻳﺘﻢ ﺗﻐﺬﻳﺔ اﻟﻨﻈﺎم ﺑﺎﻟﻄﺎﻗﺔ اﻟﻜﻬﺮﺑﺎﺋﻴﺔ‪ ،‬ﻣﺜﻞ‪ :‬اﺧﺘﺒﺎر ذاﰐ أو ﻓﺤﺺ ﻟﻠﻨﻈﺎم واﻟﺪارة اﻟﺮﺋﻴﺴﻴﺔ‪ ،‬ﰒ‬
‫ﻳﻜﻮن ﺑﻌﺪﻫﺎ ﺟﺎﻫﺰاً ﻟﻴﱪﻣﺞ ﻟﻠﻘﻴﺎم ﺑﻮﻇﻴﻔﺘﻪ اﻟﺮﺋﻴﺴﻴﺔ‪.‬‬

‫اﻟﺴﻴﺌﺔ اﻟﻮﺣﻴﺪة ﻟﻠﺸﺮاﺋﺢ اﳌﻌﺘﻤﺪة ﻋﻠﻰ ﺗﻘﻨﻴﺔ ‪ SRAM‬ﻫﻲ اﳊﺎﺟﺔ ﻟﱪﳎﺘﻬﺎ ﻣﻦ ﺟﺪﻳﺪ ﻛﻠﻤﺎ ﰎ إﻋﺎدة ﺗﻐﺬﻳﺘﻬﺎ ﺑﺎﻟﻄﺎﻗﺔ اﻟﻜﻬﺮﺑﺎﺋﻴﺔ‪ ،‬وﻫﺬا ﻳﻘﻮد‬
‫إﱃ اﳊﺎﺟﺔ إﱃ ذاﻛﺮة ﺧﺎرﺟﻴﺔ ﳏﻴﻄﻴﺔ ﺧﺎﺻﺔ ﻟﻴﺘﻢ ﲢﻤﻴﻞ اﻟﱪﻧﺎﻣﺞ ﻋﻠﻴﻬﺎ‪ ،‬وﻟﻜﻦ ﻣﻦ ﻧﺎﺣﻴﺔ أﺧﺮى ﻓﺈن ﻣﺜﻞ ﻫﺬﻩ اﻷﺟﻬﺰة ﳝﻜﻦ أن ﺗﱪﻣﺞ‬
‫ﺑﺴﺮﻋﺔ وﳌﺮات ﻋﺪﻳﺪة‪.‬‬

‫‪ 4-1-3-8-2‬اﻟﺘﻘﻨﻴﺔ ‪:(Dynamic Random Access Memory Technology) DRAM‬‬

‫ﰲ ﻫﺬا اﻟﻨﻮع ﻳﺘﻢ ﺗﺸﻜﻴﻞ ﻛﻞ ﺧﻠﻴﺔ ﻣﻦ ﺗﺮاﻧﺰﺳﺘﻮر وﻣﻜﺜﻒ‪ ،‬اﻷﻣﺮ اﻟﺬي ﳚﻌﻞ ﻫﺬا اﻟﻨﻮع ﻣﻦ اﻟﻮﺣﺪات ﳛﺘﺎج إﱃ ﻣﺴﺎﺣﺔ أﻗﻞ ﺑﻜﺜﲑ ﻣﻦ‬
‫اﻟﻘﻄﺎﻋﺎت اﻟﺴﻴﻠﻴﻜﻮﻧﻴﺔ ﻣﻘﺎرﻧﺔً ﻣﻊ اﻟﺘﻘﻨﻴﺔ ‪ SRAM‬وﺑﺎﻟﺘﺎﱄ اﺳﺘﻬﻼك ﺗﻐﺬﻳﺔ أﻗﻞ‪.‬‬

‫ﻳﻮﺻﻒ ﻫﺬا اﻟﻨﻮع ﺑﺎﻟﺪﻳﻨﺎﻣﻴﻜﻲ؛ وذﻟﻚ ﻷن اﳌﻜﺜﻒ ﻳﻔﻘﺪ ﺷﺤﻨﺘﻪ ﻣﻊ اﻟﺰﻣﻦ‪ ،‬ﻟﺬﻟﻚ ﻓﺈﻧﻪ ﳚﺐ إﻋﺎدة ﺷﺤﻦ ﻣﻜﺜﻒ ﻛﻞ ﺧﻠﻴﺔ ﺑﺎﺳﺘﻤﺮار‬
‫ﺘﺒﻘﻰ ﳏﺘﻔﻈﺔ ﺑﺒﻴﺎﻧﺎﻬﺗﺎ‪ .‬إن ﻫﺬﻩ اﻟﻌﻤﻠﻴﺔ ﺗﺪﻋﻰ ﺑ ـ”‪ “Refreshing‬وﻫﻲ ﻣﻌﻘﺪة وﲢﺘﺎج ﻟﺰﻳﺎدة ﻋﺪد اﻟﺪارات ﰲ اﻟﻨﻈﺎم‪ ،‬وﻋﻨﺪﻣﺎ ﲢﺴﺐ ﻛﻠﻔﺔ‬
‫دارات اﻟﺸﺤﻦ ﻣﻦ أﺟﻞ ﻋﺸﺮات ﻣﻼﻳﲔ اﳋﺎﻧﺎت اﻟﺬاﻛﺮﻳﺔ ﰲ ﺷﺮﳛﺔ ذاﻛﺮة‪ ،‬ﻓﺈن اﻟﻜﻠﻔﺔ ﺳﺘﻜﻮن ﻛﺒﲑة ﺟﺪاً؛ وﻋﻠﻰ ﻛﻞ ﺣﺎل ﻓﺈن اﻟﺘﻘﻨﻴﺔ‬
‫‪ DRAM‬ﻻﻗﺖ اﻫﺘﻤﺎﻣﺎً ﻗﻠﻴﻼً ﻓﻴﻤﺎ ﻳﺘﻌﻠﻖ ﺑﺎﻷﺟﻬﺰة اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ‪.‬‬

‫‪101‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫اﳌﺼﻔﻮﻓﺎت اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً | ‪Field Programmable Gate Arrays‬‬

‫‪ 5-1-3-8-2‬اﻟﺘﻘﻨﻴﺔ ‪:(Magnetic Random Access Memory Technology) MRAM‬‬

‫ﺗﻌﺘﱪ ﻫﺬﻩ اﻟﺘﻘﻨﻴﺔ إﺣﺪى اﻟﺘﻘﻨﻴﺎت اﻟﱵ ﺗﻘﺪم ﻣﻴﺰات ﻋﺪﻳﺪة ﻟﻠﻤﺴﺘﻘﺒﻞ اﻟﻘﺮﻳﺐ‪ .‬ﻟﻘﺪ ﻇﻬﺮ أﺳﺎس ﻫﺬﻩ اﻟﺘﻘﻨﻴﺔ ﻋﺎم ‪ 1974‬ﻋﻨﺪﻣﺎ ﻃﻮرت ﺷﺮﻛﺔ‬
‫‪ IBM‬اﻟﻌﻨﺼﺮ اﳌﺴﻤﻰ ﺑﻮﺻﻠﺔ اﻟﻨﻔﻖ اﳌﻐﻨﺎﻃﻴﺴﻲ ”‪ (Magnetic tunnel Junction) “MJT‬واﻟﺬي ﻫﻮ ﻋﺒﺎرة ﻋﻦ ﻃﺒﻘﺔ ﻣﻦ ﻣﺎدﺗﲔ‬
‫ﻓﲑو ﻣﻐﻨﺎﻃﻴﺴﻴﲔ ﻣﻔﺼﻮﻟﲔ ﺑﻄﺒﻘﺔ ﻋﺎزﻟﺔ‪.‬‬

‫ﲤﺘﻠﻚ ﺧﻠﻴﺔ اﻟﺬاﻛﺮة ‪ MRAM‬اﳌﻘﺪرة ﻋﻠﻰ اﳌﺰج ﺑﲔ اﻟﺴﺮﻋﺔ اﻟﻌﺎﻟﻴﺔ ﻟـ‪ SRAM‬وﻣﻘﺪرة اﻟﺘﺨﺰﻳﻦ ‪ DRAM‬ودﳝﻮﻣﺔ اﻟﺬاﻛﺮة ‪ ،Flash‬ﻛﻞ‬
‫ﻫﺬا ﻣﻊ اﺳﺘﻬﻼك ﻗﻠﻴﻞ ﻟﻠﻄﺎﻗﺔ اﻟﻜﻬﺮﺑﺎﺋﻴﺔ‪.‬‬

‫إن اﻟﺬواﻛﺮ اﳌﻌﺘﻤﺪة ﻋﻠﻰ اﻟﺘﻘﻨﻴﺔ ‪ MRAM‬أﺻﺒﺤﺖ ﻣﺘﺎﺣﺔ ﻟﻼﺳﺘﺨﺪام اﻋﺘﺒﺎراً ﻣﻦ اﻟﻌﺎم ‪ ،2005‬وﺣﺎﳌﺎ ﺗﺼﺒﺢ ﻫﺬﻩ اﻟﺬواﻛﺮ ﻣﻨﺘﺸﺮة ﰲ‬
‫اﻷﺳﻮاق ﻓﻤﻦ اﳌﺆﻛﺪ أن أﻧﻮاع ﺟﺪﻳﺪة ﻣﻦ اﻷﺟﻬﺰة ﻣﺜﻞ ﺷﺮاﺋﺢ اﻟـ‪ FPGA‬اﳌﻌﺘﻤﺪة ﻋﻞ ﺗﻘﻨﻴﺔ ‪ MRAM‬ﺳﺘﻈﻬﺮ ﻗﺮﻳﺒﺎً ﻟﺘﺤﺪث ﺛﻮرة ﺟﺪﻳﺪة‬
‫ﰲ ﺗﻜﻨﻮﻟﻮﺟﻴﺎ اﻟﻌﻨﺎﺻﺮ اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ‪.‬‬

‫‪ 6-1-3-8-2‬ﺗﻘﻨﻴﺔ ‪:(Erasable Programmable Read Only Memory Technology) EPROM‬‬

‫إن اﻷﺟﻬﺰة اﻟﱵ ﺗﻌﺘﻤﺪ ﻋﻠﻰ اﻟﻮﺻﻠﺔ اﳌﻨﺼﻬﺮة أو اﻟﻮﺻﻠﺔ اﳌﻀﺎدة ﻟﻼﻧﺼﻬﺎر ﳝﻜﻦ أن ﺗﱪﻣﺞ ﳌﺮة واﺣﺪة ﻓﻘﻂ‪ ،‬وﺣﺎﳌﺎ ﻳﻘﻮم اﳌﱪﻣﺞ ﺑﺈﻧﺸﺎء أو‬
‫ﺻﻬﺮ اﻟﻮﺻﻠﺔ‪ ،‬ﻓﺈﻧﻪ ﻻ ﳝﻜﻦ إﻋﺎدة ﺗﻌﻴﲔ اﳊﺎﻟﺔ اﻻﻓﱰاﺿﻴﺔ ﻟﻠﻮﺻﻠﺔ‪ .‬ﻋﻠﻰ اﻟﺮﻏﻢ ﻣﻦ أﻧﻪ ﰲ ﺑﻌﺾ اﳊﺎﻻت ﳝﻜﻦ ﺗﻌﺪﻳﻞ ﻋﻤﻞ اﻟﺸﺮﳛﺔ ﺑﺈﻧﺸﺎء‬
‫أو إﺗﻼف اﻟﻮﺻﻼت اﻟﱵ ﻣﺎﺗﺰال ﰲ ﺣﺎﻟﺘﻬﺎ اﻻﻓﱰاﺿﻴﺔ‪ ،‬إﻻ أن إﻣﻜﺎﻧﻴﺔ اﻟﺘﻌﺪﻳﻞ ﳏﺪودة ﺟﺪاً‪ .‬ﳍﺬا اﻟﺴﺒﺐ ﰎ اﻻﲡﺎﻩ إﱃ اﻟﺘﻔﻜﲑ ﺑﺄن اﳊﺼﻮل‬
‫ﻋﻠﻰ ﺟﻬﺎز ﻗﺎﺑﻞ ﻟﻠﱪﳎﺔ واﳌﺴﺢ ﺳﻴﻜﻮن ﻣﻔﻴﺪ ﺟﺪاً‪ ،‬وﻧﺘﻴﺠﺔ ﻟﺬﻟﻚ ﻇﻬﺮت اﻟﺘﻘﻨﻴﺔ ‪ EPROM‬وﻫﻲ اﺧﺘﺼﺎراً ﻟـﺬاﻛﺮة اﻟﻘﺮاءة اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ‬
‫واﳌﺴﺢ ﻛﻬﺮﺑﺎﺋﻴﺎً‪ ،‬ﺣﻴﺚ ﻗﺎﻣﺖ ﺷﺮﻛﺔ ‪ Intel‬ﺑﺎﻹﻋﻼن ﻋﻦ أول ﺷﺮﳛﺔ وﻫﻲ ‪ Intel-1702‬ﻋﺎم ‪1971‬؛ اﻟﺸﻜﻞ‪.9-2‬‬

‫اﻟﺸﻜﻞ‪ 9-2‬ﺷﺮﳛﺔ اﻟﺬاﻛﺮة ‪Intel-1702‬‬

‫ﲤﺘﻠﻚ اﻟﺬاﻛﺮة ‪ EPROM‬ﻧﻔﺲ اﻟﺒﻨﻴﺔ اﻷﺳﺎﺳﻴﺔ ﻟﻠﱰاﻧﺰﺳﺘﻮر ‪ ،MOS‬ﻟﻜﻦ ﻳﺘﻢ إﺿﺎﻓﺔ ﺑﻮاﺑﺔ ﻋﺎﺋﻤﺔ إﺿﺎﻓﻴﺔ ﻣﺼﻨﻮﻋﺔ ﻣﻦ اﻟﺴﻴﻠﻴﻜﻮن وﻣﻌﺰوﻟﺔ‬
‫ﺑﻄﺒﻘﺎت ﻣﻦ اﻷوﻛﺴﻴﺪ‪ .‬اﻟﺸﻜﻞ‪ 10-2‬ﻳﺒﲔ ﻣﻘﺎرﻧﺔ ﺑﲔ اﻟﺒﻨﻴﺔ اﻟﺪاﺧﻠﻴﺔ ﻟﱰاﻧﺰﺳﺘﻮر ‪ (a) MOS‬واﻟﺒﻨﻴﺔ اﻟﺪاﺧﻠﻴﺔ ﻟﱰاﻧﺰﺳﺘﻮر ‪ MOS‬ﻣﻊ ﺑﻮاﺑﺔ‬
‫ﻋﺎﺋﻤﺔ )‪ .(b‬ﻓﻔﻲ اﳊﺎﻟﺔ ﻏﲑ اﳌﱪﳎﺔ ﺗﻜﻮن اﻟﺒﻮاﺑﺔ اﻟﻌﺎﺋﻤﺔ ﻏﲑ ﻣﺸﺤﻮﻧﺔ وﻻ ﺗﺆﺛﺮ ﻋﻠﻰ اﻟﻌﻤﻞ اﻟﻄﺒﻴﻌﻲ ﻟﺒﻮاﺑﺔ اﻟﺘﺤﻜﻢ‪.‬‬

‫ﻣﻦ أﺟﻞ ﺑﺮﳎﺔ اﻟﱰاﻧﺰﺳﺘﻮر ﻳﺘﻢ ﺗﻄﺒﻴﻖ ﺟﻬﺪ ﻋﺎﱄ ﻧﺴﺒﻴﺎً )‪ (12V‬ﺑﲔ ﺑﻮاﺑﺔ اﻟﺘﺤﻜﻢ واﳌﺼﺮف‪ ،‬وﻫﺬا ﻳﺴﺒﺐ ﲢﻮل اﻟﱰاﻧﺰﺳﺘﻮر إﱃ ﺣﺎﻟﺔ اﻟﻮﺻﻞ‬
‫)‪ ،(On‬وﺗﺄﺧﺬ اﻻﻟﻜﱰوﻧﺎت اﳌﺸﺤﻮﻧﺔ ﺑﺎﻟﻄﺎﻗﺔ ﻃﺮﻳﻘﻬﺎ ﰲ اﻷوﻛﺴﻴﺪ ﳓﻮ اﻟﺒﻮاﺑﺔ اﻟﻌﺎﺋﻤﺔ ﺑﻌﻤﻠﻴﺔ ﺗُﻌﺮف ﺑـ"اﳊﻘﻦ ﻋﺎﱄ اﻟﻄﺎﻗﺔ ﻟﻺﻟﻜﱰوﻧﺎت"؛‬
‫وﻣﻊ إزاﻟﺔ إﺷﺎرة اﻟﱪﳎﺔ ﺗﺒﻘﻰ اﻟﺒﻮاﺑﺔ اﻟﻌﺎﺋﻤﺔ ﻣﺸﺤﻮﻧﺔ ﺑﺸﺤﻨﺔ ﺳﺎﻟﺒﺔ ﻣﺴﺘﻘﺮة‪.‬‬

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‫‪2‬‬ ‫اﻟﻔﺼﻞ اﻟﺜﺎﱐ | ‪Chapter 2‬‬

‫‪(b) EPROM‬‬ ‫اﻟﺸﻜﻞ‪ 10-2‬اﳌﻘﺎرﻧﺔ ﺑﲔ ﺗﺮاﻧﺰﺳﺘﻮر ‪ (a) MOS‬وﺧﻠﻴﺔ ﺗﺮاﻧﺰﺳﺘﻮر ﻣﺴﺘﺨﺪم ﰲ ﺧﻠﻴﺔ‬

‫إن ﺧﻼﻳﺎ اﻟـ‪ EPROM‬ﺗﺘﻄﻠﺐ ﻣﺴﺎﺣﺔ أﻗﻞ ﻣﻦ اﻟﻘﻄﺎﻋﺎت اﻟﺴﻴﻠﻴﻜﻮﻧﻴﺔ ﻣﻘﺎرﻧﺔً ﻣﻊ ﺧﻼﻳﺎ اﻟﻮﺻﻼت اﳌﻨﺼﻬﺮة‪ ،‬وإن أﻛﺜﺮ ﻣﺎ ﺣﻘﻖ اﻟﺸﻬﺮة‬
‫واﻻﻧﺘﺸﺎر ﳍﺬﻩ اﳋﻼﻳﺎ ﻫﻮ إﻣﻜﺎﻧﻴﺔ ﺑﺮﳎﺘﻬﺎ وﻣﺴﺤﻬﺎ‪ ،‬ﻓﻤﻦ اﳌﻤﻜﻦ ﻣﺴﺢ ﺧﻠﻴﺔ اﻟﺬاﻛﺮة ‪ EPROM‬ﺑﺈزاﻟﺔ ﺷﺤﻨﺔ اﻟﺒﻮاﺑﺔ اﻟﻌﺎﺋﻤﺔ ﻟﺘﻠﻚ اﳋﻠﻴﺔ‪،‬‬
‫وإن اﻟﻄﺎﻗﺔ اﳌﻄﻠﻮﺑﺔ ﻹزاﻟﺔ اﻟﺸﺤﻨﺔ ﻳﺘﻢ اﳊﺼﻮل ﻋﻠﻴﻬﺎ ﺑﻮاﺳﻄﺔ ﻣﺼﺪر ﻟﻸﺷﻌﺔ ﻓﻮق اﻟﺒﻨﻔﺴﺠﻴﺔ‪ .‬اﻟﺸﻜﻞ‪ 11-2‬ﻳﺒﲔ ﺧﻠﻴﺔ ذاﻛﺮة ﺗﻌﺘﻤﺪ ﻋﻠﻰ‬
‫ﺗﺮاﻧﺰﺳﺘﻮر ‪.EPROM‬‬

‫‪EPROM‬‬ ‫اﻟﺸﻜﻞ‪ 11-2‬ﺧﻠﻴﺔ ذاﻛﺮة ﺗﻌﺘﻤﺪ ﻋﻠﻰ ﺗﺮاﻧﺰﺳﺘﻮر‬

‫إن اﳌﺸﻜﻠﺔ اﻟﺮﺋﻴﺴﻴﺔ ﻟﺬواﻛﺮ اﻟـ‪ EPROM‬ﻫﻲ اﻟﺜﻤﻦ اﳌﺮﺗﻔﻊ ﺟﺪاً ﻟﻠﻐﻼف اﳋﺎرﺟﻲ ﻟﻠﺸﺮﳛﺔ واﳌﺰود ﺑﻨﺎﻓﺬة ﻣﻦ اﻟﻜﻮارﺗﺰ واﻟﱵ ﺗﺴﺘﺨﺪم‬
‫ﻟﻠﱪﳎﺔ اﻟﻀﻮﺋﻴﺔ ﻟﻠﺸﺮﳛﺔ‪ ،‬إﺿﺎﻓﺔً إﱃ اﻟﺰﻣﻦ اﻟﻄﻮﻳﻞ ﻹﳒﺎز ﻋﻤﻠﻴﺔ اﳌﺴﺢ واﻟﱵ ﺗﺴﺘﻐﺮق ﺣﻮاﱄ ‪ 20‬دﻗﻴﻘﺔ‪.‬‬

‫‪ 7-1-3-8-2‬ﺗﻘﻨﻴﺔ ‪:(Electrically Erasable Programmable Read-Only Memory) EEPROM‬‬

‫إن ﺗﺴﻠﺴﻞ ﻇﻬﻮر ذاﻛﺮة اﻟﻘﺮاءة ﻓﻘﻂ اﻟﻘﺎﺑﻠﺔ ﻟﻠﻤﺴﺢ ﻛﻬﺮﺑﺎﺋﻴﺎً )‪ (EEPROM‬أﺗﻰ ﺑﻌﺪ ﻇﻬﻮر اﻟﺘﻘﻨﻴﺔ ‪ ،EPROM‬ﺣﻴﺚ أن ﺧﻠﻴﺔ اﻟﺬاﻛﺮة‬
‫‪ EEPROM‬أﻛﱪ ﲟﺮﺗﲔ وﻧﺼﻒ ﻣﻦ ﺧﻠﻴﺔ اﻟﺬاﻛﺮة ‪ EPROM‬وذﻟﻚ ﻻﺣﺘﻮاﺋﻬﺎ ﻋﻠﻰ ﺗﺮاﻧﺰﺳﺘﻮرﻳﻦ ﻣﻊ ﻣﺴﺎﻓﺔ ﻓﺎﺻﻠﺔ ﺑﻴﻨﻬﻤﺎ‪ ،‬ﻛﻤﺎ ﻫﻮ‬
‫ﻣﻮﺿﺢ ﰲ اﻟﺸﻜﻞ‪ ،12-2‬ﺣﻴﺚ ﻳﺴﺘﺨﺪم اﻟﱰاﻧﺰﺳﺘﻮر اﻟﺜﺎﱐ ﻟﻴﻘﻮم ﲟﺴﺢ اﳋﻠﻴﺔ ﻛﻬﺮﺑﺎﺋﻴﺎً‪.‬‬

‫إن ﺗﺮاﻧﺰﺳﺘﻮر اﻟﺬاﻛﺮة ‪ EEPROM‬ﻣﺸﺎﺑﻪ ﻟﱰاﻧﺰﺳﺘﻮر اﻟﺬاﻛﺮة ‪ EPROM‬اﻟﺬي ﳛﺘﻮي ﻋﻠﻰ ﺑﻮاﺑﺔ ﻋﺎﺋﻤﺔ‪ ،‬إﻻ أن ﻃﺒﻘﺔ اﻷوﻛﺴﻴﺪ ﰲ ﺣﺎﻟﺔ‬
‫اﻟﺬاﻛﺮة ‪ EEPROM‬أرق ﺑﻜﺜﲑ‪.‬‬

‫‪EEPROM‬‬ ‫اﻟﺸﻜﻞ‪ 12-2‬ﺧﻠﻴﺔ‬

‫‪103‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫اﳌﺼﻔﻮﻓﺎت اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً | ‪Field Programmable Gate Arrays‬‬

‫‪ 8-1-3-8-2‬ﺗﻘﻨﻴﺔ اﻟﺬاﻛﺮة ‪:(Flash Memory Technology) FLASH‬‬

‫ﺗﺸﺎﺑﻪ ﺗﻘﻨﻴﺔ اﻟﺬاﻛﺮة ‪ Flash‬ﺗﻘﻨﻴﺔ اﻟﺬاﻛﺮة ‪ EPROM‬وﺗﻘﻨﻴﺔ اﻟﺬاﻛﺮة ‪ EEPROM‬وﻗﺪ أﻃﻠﻖ ﻋﻠﻴﻬﺎ اﺳﻢ ‪ FLASH‬ﻟﺘﻮﺿﻴﺢ ﺣﻘﻴﻘﺔ أ�ﺎ‬
‫ﺗﻌﻤﻞ ﺑﺴﺮﻋﺔ ﻣﻀﺎﻋﻔﺔ ﻣﻘﺎرﻧﺔ ﻣﻊ اﻟﺬاﻛﺮة ‪.EPROM‬‬

‫ﲤﺘﻠﻚ ﺧﻼﻳﺎ اﻟﺬاﻛﺮة ‪ FLASH‬ﺑﲎ ﳐﺘﻠﻔﺔ ﺣﻴﺚ أن ﺑﻌﻀﻬﺎ ﻳﻜﻮن ﻣﺰود ﺑﺒﻮاﺑﺔ ﻋﺎﺋﻤﺔ واﺣﺪة ﺑﻨﻔﺲ اﳌﺴﺎﺣﺔ ﻛﻤﺎ ﰲ اﻟﺬاﻛﺮة ‪EPROM‬‬

‫وﻟﻜﻦ ﺑﻄﺒﻘﺎت أوﻛﺴﻴﺪ ذات ﲰﺎﻛﺔ أﻗﻞ ﻣﻦ اﻟﻄﺒﻘﺎت اﳌﺴﺘﺨﺪﻣﺔ ﰲ اﻟﺬاﻛﺮة ‪ ،EEPROM‬اﻟﺸﻜﻞ‪ .13-2‬ﻳﺘﻢ ﻣﺴﺢ ﻫﺬﻩ اﻟﺬاﻛﺮة‬
‫ﻛﻬﺮﺑﺎﺋﻴﺎً وذﻟﻚ ﲟﺴﺢ ﻛﺎﻣﻞ اﻟﺬاﻛﺮة أو اﳉﺰء اﻷﻛﱪ ﻣﻨﻬﺎ‪ ،‬ﻟﻜﻨﻬﺎ ﳝﻜﻦ أن ﲤﻠﻚ ﺑﻨﻴﺔ أﺧﺮى ﺗﻜﻮن ﻓﻴﻬﺎ اﳋﻠﻴﺔ ﻣﺰودة ﺑﱰاﻧﺰﺳﺘﻮرﻳﻦ ﻛﻤﺎ ﰲ‬
‫اﻟﺬاﻛﺮة ‪ EEPROM‬ﳑﺎ ﻳﺴﻤﺢ ﺑﱪﳎﺔ وﻣﺴﺢ ﻫﺬﻩ اﻟﺬاﻛﺮة ﺟﺰﺋﻴﺎً‪.‬‬

‫اﻟﺸﻜﻞ‪ 13-2‬اﻟﺒﻨﻴﺔ اﻟﺪاﺧﻠﻴﺔ ﳋﻠﻴﺔ اﻟﺬاﻛﺮة ‪Flash‬‬

‫‪ 9-1-3-8-2‬ﻣﻨﺎﻗﺸﺔ )‪:(Discussion‬‬
‫‪ -‬ﺗﺸﺎﺑﻪ اﻷﺟﻬﺰة اﳌﻌﺘﻤﺪة ﻋﻠﻰ ﺗﻘﻨﻴﺔ ‪ EEPROM/FLASH‬ﻧﻈﺎﺋﺮﻫﺎ اﳌﻌﺘﻤﺪة ﻋﻠﻰ ﺗﻘﻨﻴﺔ ‪ SRAM‬ﻣﻦ ﺣﻴﺚ أن ﺧﻼﻳﺎ اﻟﺘﻌﺪﻳﻞ‬
‫ﺗﺘﺼﻞ ﻣﻊ ﺑﻌﻀﻬﺎ ﻋﻠﻰ ﺷﻜﻞ ﺳﻠﺴﻠﺔ إزاﺣﺔ ﻃﻮﻳﻠﺔ‪.‬‬

‫‪ -‬ﳝﻜﻦ ﺑﺮﳎﺔ ﻫﺬﻩ اﻷﺟﻬﺰة ﺧﺎرج اﻟﻨﻈﺎم ﺑﻮﺟﻮد ﻣﱪﳎﺔ ﺧﺎﺻﺔ‪ ،‬وﻓﻮر إﲤﺎم ﻋﻤﻠﻴﺔ اﻟﱪﳎﺔ ﻓﺈن اﻟﺒﻴﺎﻧﺎت ﺗﺒﻘﻰ ﺛﺎﺑﺘﺔ‪ ،‬وﻫﺬا ﻳﻌﲏ أن اﻟﻨﻈﺎم‬
‫ﻳﻜﻮن ﺟﺎﻫﺰاً ﻟﻠﻌﻤﻞ ﻓﻮر وﺻﻮل اﻟﺘﻐﺬﻳﺔ ﻟﻠﻨﻈﺎم‪.‬‬

‫‪ -‬إن ﺧﻠﻴﺔ اﻟﺬاﻛﺮة ‪ EEPROM‬واﻟﺬاﻛﺮة ‪ FLASH‬اﳌﺆﻟﻔﺔ ﻣﻦ ﺗﺮاﻧﺰﺳﺘﻮرﻳﻦ ﺗﺰﻳﺪ ﰲ اﳊﺠﻢ ﺣﻮاﱄ ﻣﺮﺗﲔ وﻧﺼﻒ ﻋﻦ ﺣﺠﻢ اﳋﻠﻴﺔ‬
‫اﳌﺆﻟﻔﺔ ﻣﻦ ﺗﺮاﻧﺰﺳﺘﻮر واﺣﺪ‪ ،‬إﻻ أ�ﺎ ﺗﺒﻘﻰ أﺻﻐﺮ ﻣﻦ ﺧﻼﻳﺎ ‪.SRAM‬‬

‫‪ -‬أﺣﺪ ﻣﺴﺎوئ ﺧﻼﻳﺎ اﻟﺬاﻛﺮة ‪ EEPROM‬واﻟﺬاﻛﺮة ‪ FLASH‬ﻫﻲ أ�ﻤﺎ ﲝﺎﺟﺔ إﱃ ﲬﺲ ﺧﻄﻮات ﻣﻌﺎﳉﺔ إﺿﺎﻓﻴﺔ أﺛﻨﺎء اﻟﺘﺼﻨﻴﻊ زﻳﺎدة‬
‫ﻋﻠﻰ ﺗﻘﻨﻴﺔ ‪ CMOS‬اﻟﻘﻴﺎﺳﻴﺔ‪ .‬ﻫﺬا ﳚﻌﻞ اﻷﺟﻬﺰة اﻟﱵ ﺗﻌﺘﻤﺪ ﻫﺬﻩ اﻟﺘﻘﻨﻴﺔ ﺗﺘﺄﺧﺮ ﻣﻦ ﻧﺎﺣﻴﺔ ﺗﻘﻨﻴﺔ اﻟﺘﺼﻨﻴﻊ ﲜﻴﻞ أو أﻛﺜﺮ ﻋﻦ اﻷﺟﻬﺰة‬
‫اﻟﱵ ﺗﺴﺘﺨﺪم ﺗﻘﻨﻴﺔ ‪.SRAM‬‬

‫‪ -‬إن اﻷﺟﻬﺰة اﳌﻌﺘﻤﺪة ﻋﻠﻰ ﺗﻘﻨﻴﺔ ‪ EEPROM‬أو ‪ FLASH‬ذات اﺳﺘﻬﻼك ﻛﺒﲑ ﻧﺴﺒﻴﺎً ﻟﻠﻄﺎﻗﺔ ﰲ اﳊﺎﻟﺔ اﻟﺴﺎﻛﻨﺔ وﻫﺬا ﻳﻌﻮد إﱃ اﻟﻌﺪد‬
‫اﻟﻜﺒﲑ ﻧﺴﺒﻴﺎً ﻣﻦ ﻣﻘﺎوﻣﺎت اﻟﺮﻓﻊ اﻟﺪاﺧﻠﻴﺔ اﻟﱵ ﲢﻮﻳﻬﺎ ﻫﺬﻩ اﻷﺟﻬﺰة‪.‬‬

‫اﳉﺪول‪ 1-2‬ﻳﺒﲔ ﻣﻠﺨﺼﺎً ﻟﻠﻤﻴﺰات اﻷﺳﺎﺳﻴﺔ ﳌﺰاﻳﺎ اﻟﺘﻘﻨﻴﺎت اﳌﺴﺘﺨﺪﻣﺔ ﰲ ﺗﺼﻨﻴﻊ اﳋﻼﻳﺎ اﻟﺬاﻛﺮﻳﺔ‪ .‬ﻛﻤﺎ ﻳﺒﲔ اﳉﺪول‪ 2-2‬اﻟﺘﻘﻨﻴﺎت‬
‫اﳌﺴﺘﺨﺪﻣﺔ ﰲ ﺗﺼﻨﻴﻊ اﻟﻌﻨﺎﺻﺮ اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ورﻣﻮزﻫﺎ‪.‬‬

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‫‪2‬‬ ‫اﻟﻔﺼﻞ اﻟﺜﺎﱐ | ‪Chapter 2‬‬

‫‪Type‬‬ ‫‪Volatile‬‬ ‫‪Writeable‬‬ ‫‪Erase Size‬‬ ‫‪Erase Cycles‬‬ ‫‪Cost‬‬ ‫‪Speed‬‬

‫‪SRAM‬‬ ‫‪Yes‬‬ ‫‪Yes‬‬ ‫‪Byte‬‬ ‫‪Unlimited‬‬ ‫‪Expensive‬‬ ‫‪Fast‬‬
‫‪DRAM‬‬ ‫‪Yes‬‬ ‫‪Yes‬‬ ‫‪Byte‬‬ ‫‪Unlimited‬‬ ‫‪Moderate‬‬ ‫‪Moderate‬‬
‫‪MROM‬‬ ‫‪Yes‬‬ ‫‪No‬‬ ‫‪n/a‬‬ ‫‪n/a‬‬ ‫‪Inexpensive‬‬ ‫‪Fast‬‬
‫‪PROM‬‬ ‫‪No‬‬ ‫‪Once‬‬ ‫‪n/a‬‬ ‫‪n/a‬‬ ‫‪Moderate‬‬ ‫‪Fast‬‬
‫‪EPROM‬‬ ‫‪No‬‬ ‫‪Yes‬‬ ‫‪All Chip‬‬ ‫‪Limited‬‬ ‫‪Moderate‬‬ ‫‪Fast‬‬
‫‪Fast to read, slow to‬‬
‫‪EEPROM‬‬ ‫‪No‬‬ ‫‪Yes‬‬ ‫‪Byte‬‬ ‫‪Limited‬‬ ‫‪Expensive‬‬
‫‪erase/write‬‬
‫‪Fast to read, slow to‬‬
‫‪Flash‬‬ ‫‪No‬‬ ‫‪Yes‬‬ ‫‪Sector‬‬ ‫‪Limited‬‬ ‫‪Moderate‬‬
‫‪erase/write‬‬
‫‪NVRAM‬‬ ‫‪No‬‬ ‫‪Yes‬‬ ‫‪Byte‬‬ ‫‪Unlimited‬‬ ‫‪Expensive‬‬ ‫‪Fast‬‬

‫اﳉﺪول‪ 1-2‬اﳌﻴﺰات اﻷﺳﺎﺳﻴﺔ ﻟﻠﺘﻘﻨﻴﺎت اﳌﺴﺘﺨﺪﻣﺔ ﰲ ﺗﺼﻨﻴﻊ اﳋﻼﻳﺎ اﻟﺬاﻛﺮﻳﺔ‬

‫اﳉﺪول‪ 2-2‬اﻟﺘﻘﻨﻴﺎت اﳌﺴﺘﺨﺪﻣﺔ ﰲ ﺗﺼﻨﻴﻊ اﻟﻌﻨﺎﺻﺮ اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ‬

‫‪ 4-8-2‬اﻟﻌﻨﺎﺻﺮ اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ )‪:(Programmable Logic Devices‬‬

‫اﻟﻈﻬﻮر اﻷول ﻟﻠﻌﻨﺎﺻﺮ اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﻛﺎن ﰲ أواﺳﻂ اﻟﺴﺒﻌﻴﻨﻴﺎت ﻋﻠﻰ ﺷﻜﻞ ذاﻛﺮة ﻗﺎﺑﻠﺔ ﻟﻠﻘﺮاءة ﻓﻘﻂ )‪ (PROM‬واﻟﱵ ﻛﺎﻧﺖ‬
‫ﺑﺴﻴﻄﺔ ﻧﻮﻋﺎً ﻣﺎ‪ ،‬وﻣﻊ �ﺎﻳﺔ اﻟﺴﺒﻌﻴﻨﺎت ﻇﻬﺮت أﺟﻬﺰة أﺧﺮى أﻛﺜﺮ ﺗﻌﻘﻴﺪاً ﻋﺮﻓﺖ ﺑﺎﻟـ‪.PLD‬‬

‫ﺗﻘﺴﻢ اﻟﻌﻨﺎﺻﺮ اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ )‪ (PLDs‬ﺣﺴﺐ اﻟﺒﻨﻴﺔ إﱃ ﺛﻼث ﻓﺮوع رﺋﻴﺴﺔ‪:‬‬
‫‪ :(Simple Programmable Logic Devices) SPLDs -1‬اﻟﻌﻨﺎﺻﺮ اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺑﺴﻴﻄﺔ اﻟﺒﻨﻴﺔ‪.‬‬
‫‪ :(Complex Programmable Logic Devices) CPLDs -2‬اﻟﻌﻨﺎﺻﺮ اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﻣﻌﻘﺪة اﻟﺒﻨﻴﺔ‪.‬‬
‫‪ :(Field Programmable Gate Arrays) FPGAs -3‬ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً‪.‬‬

‫ﲣﺘﻠﻒ ﻫﺬﻩ اﻟﻌﻨﺎﺻﺮ اﳌﻨﻄﻘﻴﺔ اﻟﺜﻼﺛﺔ ﻓﻴﻤﺎ ﺑﻴﻨﻬﺎ ﻣﻦ ﺣﻴﺚ ﺗﻌﻘﻴﺪ اﻟﺒﻨﻴﺔ اﻟﺪاﺧﻠﻴﺔ ﻛﻤﺎ أ�ﺎ ﺗﺸﱰك ﻓﻴﻤﺎ ﺑﻴﻨﻬﺎ ﺑﺎﻟﻌﺪﻳﺪ ﻣﻦ اﳌﻴﺰات‪ .‬اﻟﺸﻜﻞ‪14-‬‬

‫‪ 2‬ﻳﺒﲔ اﻟﻌﻼﻗﺔ ﺑﲔ درﺟﺔ ﺗﻌﻘﻴﺪ اﻟﺘﺼﻤﻴﻢ واﻟﻜﻠﻔﺔ ﻟﻸﻧﻮاع اﻟﺜﻼﺛﺔ اﳌﺬﻛﻮرة‪.‬‬

‫اﻟﺸﻜﻞ ‪ 14-2‬اﺧﺘﻴﺎر اﻟﻌﻨﺎﺻﺮ اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺑﻨﺎءً ﻋﻠﻰ اﻟﻌﻼﻗﺔ ﺑﲔ درﺟﺔ ﺗﻌﻘﻴﺪ اﻟﻨﻈﺎم وﻛﻠﻔﺘﻪ‬

‫‪105‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫اﳌﺼﻔﻮﻓﺎت اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً | ‪Field Programmable Gate Arrays‬‬

‫ﺗﺘﻔﺮع اﻟﻔﺮوع اﻟﺮﺋﻴﺴﺔ ﻟﻠﻌﻨﺎﺻﺮ اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ إﱃ ﻓﺮوع ﺛﺎﻧﻮﻳﺔ أﺧﺮى ﲣﺘﻠﻒ ﻋﻦ ﺑﻌﻀﻬﺎ ﻣﻦ ﺣﻴﺚ ﺗﺎرﻳﺦ اﻟﻈﻬﻮر واﻟﱰﻛﻴﺐ اﻟﺪاﺧﻠﻲ‬
‫ﻟﻠﺸﺮﳛﺔ‪ .‬اﻟﺸﻜﻞ‪ 15-2‬ﻳﺒﲔ اﻟﻔﺮوع اﻟﺮﺋﻴﺴﺔ وﻓﺮوﻋﻬﺎ اﻟﺜﺎﻧﻮﻳﺔ ﻟﻠﻌﻨﺎﺻﺮ اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ‪.‬‬

‫‪PLDs‬‬

‫‪SPLDs‬‬ ‫‪CPLDs‬‬ ‫‪FPGAs‬‬

‫‪PLA‬‬ ‫‪CPLD‬‬ ‫‪FPGA‬‬

‫‪PAL‬‬ ‫‪EPLD‬‬ ‫‪LCA‬‬

‫‪GAL‬‬ ‫‪EEPLD‬‬ ‫‪PASIC‬‬

‫‪PROM‬‬ ‫‪SPLD‬‬ ‫‪SPGA‬‬

‫‪XPLD‬‬ ‫‪XPGA‬‬

‫اﻟﺸﻜﻞ‪ 15-2‬ﺷﺠﺮة اﻟﻌﻨﺎﺻﺮ اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ وﻓﺮوﻋﻬﺎ‬

‫اﻟﻌﻨﺎﺻﺮ اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺑﺴﻴﻄﺔ اﻟﺒﻨﻴﺔ )‪:(Simple Programmable Logic Devices‬‬ ‫‪1-4-8-2‬‬

‫ﰎ ﺗﻄﻮﻳﺮ اﻟﺸﺮﳛﺔ اﻷوﱃ ﻟﻠـ‪ SPLD‬ﰲ ﻋﺎم ‪ 1975‬ﺑﻮاﺳﻄﺔ ﺷﺮﻛﺔ ‪ Monolitic Memories Inc.‬وﻛﺎﻧﺖ ﺗﺪﻋﻰ ﺑـ" ‪Programmable‬‬

‫‪(PAL) "Array Logic‬؛ ﻫﺬﻩ اﻟﺸﺮﳛﺔ ﻛﺎﻧﺖ وﻗﺘﻬﺎ اﻟﻨﻮع اﻷول ﻣﻦ ﺷﺮاﺋﺢ اﻟـ‪.PLD‬‬

‫ﺗﺘﺄﻟﻒ ﺷﺮﳛﺔ اﻟـ‪ SPLD‬ﻣﻦ وﺣﺪﺗﲔ أو أﻛﺜﺮ ﻣﻦ اﳋﻼﻳﺎ اﳌﻴﻜﺮوﻳﺔ )‪ (macrocells‬اﻟﱵ ﲢﻘﻖ اﻟﻮﻇﺎﺋﻒ اﳌﻨﻄﻘﻴﺔ اﳌﻄﻠﻮﺑﺔ‪ .‬اﻷﺟﻴﺎل اﻟﻼﺣﻘﺔ‬
‫اﻟﱵ ﰎ ﺗﻄﻮﻳﺮﻫﺎ ﻣﻦ ﺷﺮاﺋﺢ اﻟـ‪ PLD‬ﺗﻌﺘﻤﺪ ﻋﻠﻰ ﻧﻔﺲ ﺑﻨﻴﺔ ﺷﺮاﺋﺢ اﻟـ‪ PAL‬اﻷوﱃ ﻣﻊ ﺑﻌﺾ اﻟﺘﺤﺴﻴﻨﺎت‪ .‬اﻟﺸﻜﻞ‪ 16-2‬ﻳﺒﲔ اﻟﺒﻴﻨﺔ اﻟﺪاﺧﻠﻴﺔ‬
‫ﻟـ‪ Macrocell‬اﳌﺴﺘﺨﺪﻣﺔ ﰲ اﻟﺸﺮﳛﺔ ‪.[252]CoolRunner-II‬‬

‫اﻟﺸﻜﻞ‪ 16-2‬اﻟﺒﻴﻨﺔ اﻟﺪاﺧﻠﻴﺔ ﻟـ‪CoolRunner-II Macrocell‬‬

‫ﺗﺘﻀﻤﻦ ﻋﺎﺋﻠﺔ اﻟـ‪ SPLD‬ﺛﻼث ﺗﻘﻨﻴﺎت ﳐﺘﻠﻔﺔ وﻫﻲ]‪PLAs, PALs, GALs :[253‬؛ ﲨﻴﻊ ﻫﺬﻩ اﻟﺘﻘﻨﻴﺎت ﳍﺎ ﻧﻔﺲ اﻟﺒﻨﻴﺔ اﻟﺪاﺧﻠﻴﺔ اﻟﱵ ﳍﺎ‬
‫ﻛﺜﺎﻓﺔ ﻣﻨﺨﻔﻀﺔ ﻣﻦ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ‪ .‬اﳉﺪول‪ 3-2‬ﻳﺒﲔ اﳋﺼﺎﺋﺺ اﻟﻌﺎﻣﺔ ﻟﺸﺮاﺋﺢ اﻟـ‪.[254]SPLD‬‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪106‬‬
‫‪2‬‬ ‫اﻟﻔﺼﻞ اﻟﺜﺎﱐ | ‪Chapter 2‬‬

‫اﻟﺘﻘﻨﻴﺘﲔ ‪ GAL&PAL‬ﺗﺸﻜﻼن اﻟﻨﻤﻮذج اﻷوﱄ ﻟﺘﻘﻨﻴﺔ اﻟـ‪ ،PLD‬أﻣﺎ اﻟﺘﻘﻨﻴﺔ ‪ PLA‬ﻓﺘﺸﻜﻞ اﻟﻨﻤﺎذج اﳌﺘﻘﺪﻣﺔ‪ .‬ﰲ اﻟﻐﺎﻟﺐ ﺗﺘﻜﻮن اﻟﻮﺣﺪات‬
‫اﳌﻨﻄﻘﻴﺔ اﻟﺪاﺧﻠﻴﺔ ﳍﺬﻩ اﻟﺘﻘﻨﻴﺎت اﻟﺜﻼﺛﺔ ﻣﻦ ﻣﺼﻔﻮﻓﺔ ﺑﻮاﺑﺎت ‪ AND‬أو ‪ OR‬واﻟﱵ ﺗﺴﺘﺨﺪم ﻟﺘﺼﻤﻴﻢ ﺑﻌﺾ أﻧﻮاع اﻟﺪارات اﳌﻨﻄﻘﻴﺔ اﻟﺮﻗﻤﻴﺔ‬
‫اﻟﺒﺴﻴﻄﺔ‪ ،‬ﻛﻤﺎ ﲤﻠﻚ ﻫﺬﻩ اﻟﻌﻨﺎﺻﺮ اﻟﻌﺪﻳﺪ ﻣﻦ اﳌﻴﺰات ﻣﺜﻞ‪ :‬اﺳﺘﻬﻼك ﻣﻨﺨﻔﺾ ﻟﻠﻄﺎﻗﺔ‪ ،‬ﻛﻠﻔﺔ ﻣﻨﺨﻔﻀﺔ‪ ،‬ﺣﺠﻢ ﻏﻼف ﺷﺮﳛﺔ ﺻﻐﲑ‪ ،‬ﻣﻮﺛﻮﻗﻴﺔ‬
‫ﻋﺎﻟﻴﺔ‪ ،‬ﺳﻬﻮﻟﺔ ﰲ اﻟﺘﺼﻤﻴﻢ‪ .‬ﺗﺴﺘﺨﺪم ﻫﺬﻩ اﻟﻌﻨﺎﺻﺮ ﻛﺒﺪﻳﻞ ﻻﺳﺘﺒﺪال اﻟﺪارات اﳌﻨﻄﻘﻴﺔ ﻣﻦ اﻟﻌﺎﺋﻠﺔ ‪.74xxxx‬‬

‫اﻟﻤﺠﺎل‬ ‫ﺧﺼﺎﺋﺺ ﺷﺮاﺋﺢ اﻟـ‪SPLD‬‬

‫‪ 16 ~ 28‬ﻗﻄﺐ‬ ‫ﻋﺪد أﻗﻄﺎب اﻟﺸﺮﳛﺔ‬
‫‪ 8 ~ 24‬ﺧﻠﻴﺔ ﻣﻨﻄﻘﻴﺔ‬ ‫ﻋﺪد اﳋﻼﻳﺎ ‪Macrocell‬‬
‫‪ 8 ~ 24‬ﻗﻼب‬ ‫‪FFs‬‬ ‫ﻋﺪد اﻟﻘﻼﺑﺎت‬
‫‪EPROM, EEPROM‬‬ ‫ﺗﻘﻨﻴﺔ اﻟﺘﺸﻜﻴﻞ‬
‫‪Nonvolatile‬‬ ‫اﳊﺎﻟﺔ ﻋﻨﺪ وﺻﻞ اﻟﺘﻐﺬﻳﺔ‬
‫ﳝﻜﻦ ﺑﺮﳎﺘﻬﺎ ﺑﻌﺪ ﻣﺴﺤﻬﺎ‬ ‫ﻗﺎﺑﻠﻴﺔ اﻟﱪﳎﺔ‬
‫ﺗﺘﻢ اﻟﱪﳎﺔ ﺑﺸﻜﻞ ﻣﺴﺘﻘﻞ ﻋﻦ اﻟﻨﻈﺎم )‪(off-board‬‬ ‫آﻟﻴﺔ اﻟﱪﳎﺔ‬
‫ﺻﻐﲑ‬ ‫اﳊﺠﻢ‬
‫اﳉﺪول‪ 3-2‬اﳋﺼﺎﺋﺺ اﻟﻌﺎﻣﺔ ﻟﺸﺮاﺋﺢ اﻟـ‪SPLD‬‬

‫‪ 1-1-4-8-2‬ذاﻛﺮة اﻟﻘﺮاءة ﻓﻘﻂ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ‪:(Programmable Read only Memory) PROM‬‬
‫ﺗﻌﺘﱪ اﻟﺬاﻛﺮة ‪ PROM‬اﻟﻨﻤﻮذج اﻷول ﻟﻠﻌﻨﺎﺻﺮ اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ واﻟﺬي ﻇﻬﺮ ﻋﺎم ‪ .1970‬ﰎ ﺗﻄﻮﻳﺮ اﻟﺬاﻛﺮة ‪ PROM‬ﺑﺎﻷﺻﻞ‬
‫ﻟﺘﻌﻤﻞ ﻛﺬاﻛﺮة ﺣﺎﺳﺐ ﺣﻴﺚ ﲣﺰن ﺗﻌﻠﻴﻤﺎت اﻟﱪﻧﺎﻣﺞ واﻟﻘﻴﻢ اﻟﺜﺎﺑﺘﺔ‪ ،‬وﻛﺬﻟﻚ اﺳﺘﺨﺪﻣﻬﺎ أﻳﻀﺎً ﻣﻬﻨﺪﺳﻮ اﻟﱪﳎﺔ ﻹﳒﺎز ﻣﻬﺎم ﻣﻨﻄﻘﻴﺔ ﺑﺴﻴﻄﺔ‬
‫ﻣﺜﻞ اﳉﺪاول اﳌﺮﺟﻌﻴﺔ ‪ ،(Look-up-tables) LUTs‬ﻛﻤﺎ ﳝﻜﻦ اﺳﺘﺨﺪﻣﻬﺎ ﻹﳒﺎز أي ﻛﺘﻠﺔ ﻣﻨﻄﻘﻴﺔ ﲢﺘﻮي ﻋﻠﻰ اﻟﻌﺪﻳﺪ ﻣﻦ اﻟﺒﻮاﺑﺎت‬
‫اﳌﻨﻄﻘﻴﺔ ﻣﻦ أﺟﻞ ﻋﺪد ﳏﺪود ﻣﻦ اﳌﺪاﺧﻞ واﳌﺨﺎرج‪.‬‬

‫ﻟﻔﻬﻢ ﻣﺒﺪأ ﻋﻤﻞ ﻫﺬﻩ اﻟﺘﻘﻨﻴﺔ؛ ﻓﺈﻧﻪ ﳝﻜﻦ أن ﻧﻌﺘﱪ أن اﻟﻌﻨﺼﺮ اﳌﻨﻄﻘﻲ ﻳﺘﺄﻟﻒ ﻣﻦ ﻣﺼﻔﻮﻓﺔ ﺛﺎﺑﺘﺔ ﻣﻦ ﺑﻮاﺑﺎت ”‪ “AND‬واﻟﱵ ﺗﻘﻮد ﻣﺼﻔﻮﻓﺔ‬
‫ﻣﻦ ﺑﻮاﺑﺎت ”‪ “OR‬ذات وﺻﻼت ﻗﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ‪ .‬ﻓﺈذا أﺧﺬﻧﺎ ﻋﻠﻰ ﺳﺒﻴﻞ اﳌﺜﺎل ذاﻛﺮة ‪ PROM‬ﺑﺜﻼﺛﺔ ﻣﺪاﺧﻞ وﺛﻼﺛﺔ ﳐﺎرج ﻛﻤﺎ ﻫﻮ ﻣﺒﲔ‬
‫ﰲ اﻟﺸﻜﻞ‪ ،17-2‬ﻓﺈن اﻟﻮﺻﻼت اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﰲ ﻣﺼﻔﻮﻓﺔ ”‪ “OR‬ﳝﻜﻦ أن ﲢﺪد ﻃﺮﻳﻘﺔ وﺻﻠﻬﺎ ﻛﻮﺻﻼت ﻣﻨﺼﻬﺮة ) ‪Fusible‬‬

‫‪ ،(Links‬وﰲ ﺣﺎﻟﺔ ذاﻛﺮة ﻣﻦ اﻟﻨﻮع ‪ EPROM‬أو ذاﻛﺮة ﻣﻦ اﻟﻨﻮع ‪ EEPROM‬ﻓﺈن ﻃﺮﻳﻘﺔ وﺻﻠﻬﺎ ﲢﺪد ﻛﻤﺼﻔﻮﻓﺔ ﺗﺮاﻧﺰﺳﺘﻮرات‬
‫‪ EPROM‬أو ﻛﻤﺼﻔﻮﻓﺔ ﺧﻼﻳﺎ ‪.EEPROM‬‬

‫اﻟﺸﻜﻞ‪ 17-2‬ﲤﺜﻴﻞ ﻟﺬاﻛﺮة ‪ PROM‬ﻏﲑ ﻣﱪﳎﺔ ﺗﺴﺘﺨﺪم ﻣﺼﻔﻮﻓﺔ ﺑﻮاﺑﺎت ‪ AND‬ﳏﺪدة اﻟﻮﻇﻴﻔﺔ وﻣﺼﻔﻮﻓﺔ ﺑﻮاﺑﺎت ‪ OR‬ﻗﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ‬

‫‪107‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫اﳌﺼﻔﻮﻓﺎت اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً | ‪Field Programmable Gate Arrays‬‬

‫ﻛﻤﺎ ﻫﻮ واﺿﺢ ﻋﻠﻰ اﻟﺸﻜﻞ‪ 17-2‬ﻓﺈن ﻛﻞ ﺑﻮاﺑﺔ ”‪ “AND‬ﲤﻠﻚ ﺛﻼث ﻣﺪاﺧﻞ ﲤﺜﻞ اﳊﺎﻟﺔ اﳊﻘﻴﻘﻴﺔ أو ﻣﺘﻤﻢ اﳊﺎﻟﺔ ﻋﻠﻰ اﳌﺪاﺧﻞ ‪،a,b,c‬‬
‫وﺑﺸﻜﻞ ﳑﺎﺛﻞ ﻓﺈن ﻛﻞ ﺑﻮاﺑﺔ ”‪ “OR‬ﰲ ﻣﺼﻔﻮﻓﺔ ﺑﻮاﺑﺎت ”‪ “OR‬ﲤﻠﻚ ﲦﺎﻧﻴﺔ ﻣﺪاﺧﻞ‪ ،‬واﻟﱵ ﻫﻲ ﻋﺒﺎرة ﻋﻦ ﳐﺎرج ﻣﺼﻔﻮﻓﺔ ﺑﻮاﺑﺎت‬
‫اﻟـ”‪ .“AND‬ﺑﻔﺮض أﻧﻨﺎ ﳓﺘﺎج إﱃ ﺑﻨﺎء اﻟﻜﺘﻠﺔ اﳌﻨﻄﻘﻴﺔ اﻟﻮﻇﻴﻔﻴﺔ اﳌﺒﻴﻨﺔ ﰲ اﻟﺸﻜﻞ‪ 18-2‬وذﻟﻚ ﻣﻦ اﻟﻜﺘﻠﺔ اﻷﺳﺎﺳﻴﺔ اﳌﺒﻴﻨﺔ ﺑﺎﻟﺸﻜﻞ‪،17-2‬‬
‫ﻓﺈﻧﻨﺎ ﺳﻮف ﳓﺘﺎج ﻓﻘﻂ إﱃ ﺑﺮﳎﺔ اﻟﻮﺻﻼت اﳌﻨﺎﺳﺒﺔ ﰲ ﻣﺼﻔﻮﻓﺔ ﺑﻮاﺑﺎت ‪ OR‬ﻛﻤﺎ ﻫﻮ ﻣﺒﲔ ﻋﻠﻰ اﻟﺸﻜﻞ‪.19-2‬‬

‫اﻟﺸﻜﻞ‪ 18-2‬ﻛﺘﻠﺔ ﻣﻨﻄﻘﻴﺔ ﻣﺮﻛﺒﺔ ﻣﻦ ﳎﻤﻮع ﺑﻮاﺑﺎت‬

‫إن ﻫﺬا اﳌﺜﺎل ﻫﻮ ﻣﺜﺎل ﺑﺴﻴﻂ ﺟﺪاً ﺣﻴﺚ أن ﺷﺮاﺋﺢ اﻟـ‪ PROM‬اﳊﻘﻴﻘﻴﺔ ﲤﻠﻚ اﻟﻌﺪﻳﺪ ﻣﻦ اﳌﺪاﺧﻞ واﳌﺨﺎرج ﲟﺎ ﻳﻜﻔﻲ ﻹﳒﺎز أي ﻋﻤﻠﻴﺔ‬
‫ﻣﻨﻄﻘﻴﺔ ﺗﺘﻄﻠﺐ ﻋﺪد ﻛﺒﲑ ﻣﻦ اﻟﻜﺘﻞ اﳌﻨﻄﻘﻴﺔ‪.‬‬

‫ﻋﻤﻮﻣﺎً ﻳﻌﺘﱪ اﺳﺘﺨﺪام اﻟـ‪ PROM‬ﻣﻔﻴﺪاً ﻹﳒﺎز ﻋﻤﻠﻴﺎت ﻣﻨﻄﻘﻴﺔ ﻣﺮﻛﺒﺔ ﲢﺘﻮي ﻋﻠﻰ ﻋﺪد ﻛﺒﲑ ﻣﻦ اﳉﺪاءات اﳌﻨﻄﻘﻴﺔ ﺑﻌﺪد ﻣﺪاﺧﻞ وﳐﺎرج‬
‫ﳏﺪود‪ ،‬ﺣﻴﺚ ﻳﺮﻣﺰ ﻟﻠﺒﻮاﺑﺔ ”‪ “AND‬ﺑﺎﻟﺮﻣﺰ )”&“( وﻟﻠﺒﻮاﺑﺔ ‪ OR‬ﺑﺎﻟﺮﻣﺰ )”|“( وﻟﻠﺒﻮاﺑﺔ ‪ NOT‬ﺑﺎﻟﺮﻣﺰ )”!“( وﻟﻠﺒﻮاﺑﺔ ‪ XOR‬ﺑﺎﻟﺮﻣﺰ‬
‫)”^“(‪.‬‬

‫اﻟﺸﻜﻞ‪ 19-2‬اﻟﺬاﻛﺮة ‪ PROM‬ﺑﻌﺪ اﻟﱪﳎﺔ‬

‫‪ 2-1-4-8-2‬اﳌﺼﻔﻮﻓﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ‪:(Programmable Logic Array) PLA‬‬

‫ﻟﻠﺘﻐﻠﺐ ﻋﻠﻰ ﻧﻘﺎط اﻟﻀﻌﻒ ﻟﻠـ‪ PROM‬ﻛﺎﻧﺖ اﳋﻄﻮة اﳉﺪﻳﺪة ﻋﻠﻰ ﺳﻠﻢ ﺗﻄﻮر اﻟﻌﻨﺎﺻﺮ اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﻇﻬﻮر ﺗﻘﻨﻴﺔ اﻟـ”‪“PLA‬‬

‫اﺧﺘﺼﺎر ﻟـ‪ :‬اﳌﺼﻔﻮﻓﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ )‪ (Programmable logic arrays‬واﻟﱵ أﺻﺒﺤﺖ ﻣﺘﺎﺣﺔ ﻟﻠﻤﺮة اﻷوﱃ ﻋﺎم ‪،1975‬‬
‫ٌ‬ ‫وﻫﻲ‬
‫وﻗﺪ ﻛﺎﻧﺖ ﻫﺬﻩ اﻟﺘﻘﻨﻴﺔ ﺑﲔ ﻓﺮوع اﻟـ‪ SPLD‬اﻟﺘﻘﻨﻴﺔ اﻷﻛﺜﺮ ﻗﺎﺑﻠﻴﺔ ﻟﻠﺘﺸﻜﻴﻞ )‪ (configurable‬وذﻟﻚ ﻟﻜﻮن ﻛﻼ ﻣﺼﻔﻮﻓﱵ اﻟـ‪& AND‬‬

‫‪ OR‬ﻗﺎﺑﻞ ﻟﻠﱪﳎﺔ‪.‬‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪108‬‬
‫‪2‬‬ ‫اﻟﻔﺼﻞ اﻟﺜﺎﱐ | ‪Chapter 2‬‬

‫ﻟﻨﻌﺘﱪ أن ﻟﺪﻳﻨﺎ ﺷﺮﳛﺔ ‪ PLA‬ﺑﺜﻼث ﻣﺪاﺧﻞ وﺛﻼث ﳐﺎرج‪ ،‬وﺧﻼﻓﺎً ﻟﻠـ‪ PROM‬ﻓﺈن ﻋﺪد اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ ﰲ ﻣﺼﻔﻮﻓﺔ ﺑﻮاﺑﺎت ‪AND‬‬

‫ﻣﺴﺘﻘﻞ ﻋﻦ ﻋﺪد ﻣﺪاﺧﻞ اﻟﺸﺮﳛﺔ‪ ،‬ﺣﻴﺚ ﳝﻜﻦ ﺑﺴﻬﻮﻟﺔ إﺿﺎﻓﺔ ﻋﺪد أﻛﱪ ﻣﻦ ﺑﻮاﺑﺎت ‪ AND‬ﺑﺈﺿﺎﻓﺔ اﳌﺰﻳﺪ ﻣﻦ اﻷﺳﻄﺮ ﻟﻠﻤﺼﻔﻮﻓﺔ‪ ،‬وﺑﺎﳌﺜﻞ‬
‫ﻓﺈن ﻋﺪد ﺑﻮاﺑﺎت ‪ OR‬ﰲ ﻣﺼﻔﻮﻓﺔ ﺑﻮاﺑﺎت ‪ OR‬ﻣﺴﺘﻘﻞ ﻋﻦ ﻋﺪد ﻣﺪاﺧﻞ اﻟﺸﺮﳛﺔ‪ ،‬وﻣﺴﺘﻘﻞ ﻋﻦ ﻋﺪد ﺑﻮاﺑﺎت ‪ AND‬ﰲ ﻣﺼﻔﻮﻓﺔ‬
‫ﺑﻮاﺑﺎت ‪ ،AND‬ﻫﺬا ﺑﺎﻹﺿﺎﻓﺔ إﱃ إﻣﻜﺎﻧﻴﺔ إﺿﺎﻓﺔ اﳌﺰﻳﺪ ﻣﻦ ﺑﻮاﺑﺎت ‪ OR‬ﺑﺈﺿﺎﻓﺔ اﳌﺰﻳﺪ ﻣﻦ اﻷﻋﻤﺪة‪ .‬ﻳﻮﺿﺢ اﻟﺸﻜﻞ‪ 20-2‬اﳊﺎﻟﺔ ﻏﲑ‬
‫اﳌﱪﳎﺔ ﻟﺸﺮﳛﺔ اﻟـ‪.PLA‬‬

‫اﻟﺸﻜﻞ‪ 20-2‬ﺷﺮﳛﺔ ‪ PLA‬ﻏﲑ ﻣﱪﳎﺔ‬

‫ﺑﻔﺮض أﻧﻨﺎ ﻧﺮﻳﺪ ﻣﻦ اﻟﺸﺮﳛﺔ اﻟـ‪ PLA‬ﲢﻘﻴﻖ اﳌﻌﺎدﻻت اﳌﻨﻄﻘﻴﺔ اﻟﺘﺎﻟﻴﺔ‪:‬‬

‫‪𝑊 = (𝑎 & 𝑐) | (! 𝑏 & ! 𝑐),‬‬ ‫‪𝑋 = (𝑎 & 𝑏 & 𝑐) | (! 𝑏 & ! 𝑐),‬‬ ‫)𝑐 & 𝑏 & 𝑎( = 𝑌‬

‫ﻓﺈﻧﻪ ﳝﻜﻦ ﲢﻘﻴﻖ اﳌﻌﺎدﻻت ﺑﱪﳎﺔ اﻟﻮﺻﻼت اﳌﻨﺎﺳﺒﺔ ﻛﻤﺎ ﻫﻮ ﻣﻮﺿﺢ ﰲ اﻟﺸﻜﻞ‪.21-2‬‬

‫اﻟﺸﻜﻞ‪ 21-2‬ﺷﺮﳛﺔ ‪ PLA‬ﻣﱪﳎﺔ‬

‫اﺳﺘﺨﺪﻣﺖ ﺷﺮاﺋﺢ اﻟـ‪ PLA‬ﻋﻤﻠﻴﺎً ﰲ ﻋﺪد ﻛﺒﲑ ﺟﺪاً ﻣﻦ اﻟﺘﺼﻤﻴﻤﺎت اﳌﻨﻄﻘﻴﺔ ﻟﱵ ﲤﺘﺎز ﻣﻌﺎدﻻﻬﺗﺎ اﳌﻨﻄﻘﻴﺔ ﺑﻌﺪد ﻛﺒﲑة ﻣﻦ اﳉﺪاءات‪ ،‬واﻟﱵ‬
‫ﳝﻜﻦ أن ﺗﺴﺘﺨﺪم أﻳﻀﺎً اﻟﻌﺪﻳﺪ ﻣﻦ اﳌﺨﺎرج؛ ﻋﻠﻰ اﻟﺮﻏﻢ ﻣﻦ ذﻟﻚ ﻓﺈن ﺷﺮاﺋﺢ اﻟـ‪ PLA‬ﱂ ﲢﻘﻖ اﻧﺘﺸﺎراً ﲡﺎرﻳﺎً ﻛﺒﲑاً؛ وذﻟﻚ ﻟﻜﻮ�ﺎ ﲤﻠﻚ‬
‫ﺑﻌﺾ اﳋﺼﺎﺋﺺ ﻏﲑ اﳌﺮﻏﻮﺑﺔ ﻣﺜﻞ وﺟﻮد ﻣﺼﻔﻮﻓﺔ ﻣﻦ ﺑﻮاﺑﺎت ‪ AND‬ﺗﻘﻮد ﻣﺼﻔﻮﻓﺔ ﻣﻦ ﺑﻮاﺑﺎت ‪ ،OR‬ﻻﺣﻘﺎً ﻇﻬﺮت ﺑﻌﺾ اﻟﺒﲎ اﻷﺧﺮى‬
‫ﻣﺜﻞ ﻣﺼﻔﻮﻓﺔ ﻣﻦ ﺑﻮاﺑﺎت ‪ AND‬ﺗﻘﻮد ﻣﺼﻔﻮﻓﺔ ﻣﻦ ﺑﻮاﺑﺎت ‪ .NOR‬وﻋﻠﻰ اﻟﺮﻏﻢ ﻣﻦ أﻧﻪ ﻣﻦ اﳌﻤﻜﻦ ﻧﻈﺮﻳﺎً ﺑﻨﺎء ﻣﺜﻞ ﻫﺬﻩ اﻷﺟﻬﺰة ﺑﺒﲎ‬
‫ﻣﻨﻄﻘﻴﺔ ﳐﺘﻠﻔﺔ ﻣﺜﻞ‪ OR-AND :‬أو ‪ OR-AND‬أو ‪ ،NAND-NOR‬إﻻ أن ﻫﺬﻩ اﻟﺒﲎ ﻛﺎﻧﺖ ﻧﺎدرة أو ﻏﲑ ﻣﻮﺟﻮدة‪ ،‬وذﻟﻚ‬
‫ﻟﻜﻮن اﻟﺸﺮاﺋﺢ اﻟﱵ ﺗﻌﺘﻤﺪ ﻋﻠﻰ ﺑﲎ ‪ AND-OR‬أو ﺣﱴ ‪ AND-NOR‬ﲤﺜﻞ ﻏﺎﻟﺒﺎً ﲟﻌﺎدﻻت ﻣﻨﻄﻘﻴﺔ ﺗﻌﺘﻤﺪ ﻋﻠﻰ ﳎﻤﻮع ﺟﺪاءات‬
‫ﳝﻜﻦ ﺑﻨﺎؤﻫﺎ ﻋﻠﻰ اﻟﺸﺮﳛﺔ ﺑﺴﻬﻮﻟﺔ‪ ،‬ﰲ ﺣﲔ أن اﻟﺒﲎ اﻷﺧﺮى ﲤﺜﻞ ﲟﻌﺎدﻻت ﻣﻨﻄﻘﻴﺔ ﺗﻌﺘﻤﺪ ﻋﻠﻰ ﺟﺪاء ﳎﺎﻣﻴﻊ‪ ،‬وإن ﺑﻨﺎء ﻫﺬﻩ اﻟﻌﻤﻠﻴﺔ ﻋﻠﻰ‬
‫اﻟﺸﺮﳛﺔ ﲝﺎﺟﺔ إﱃ ﺗﻘﻨﻴﺎت ﺧﺎﺻﺔ‪.‬‬
‫‪109‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫اﳌﺼﻔﻮﻓﺎت اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً | ‪Field Programmable Gate Arrays‬‬

‫أﺣﺪ ﻣﺴﺎوئ ﺷﺮاﺋﺢ اﻟـ‪ PLA‬اﻟﺸﺎﺋﻌﺔ ﻫﻲ ﻛﻮن اﻹﺷﺎرة ﺗﺴﺘﻐﺮق زﻣﻦ ﻃﻮﻳﻞ ﻧﺴﺒﻴﺎً ﻟﺘﻤﺮ ﻋﱪ اﻟﻮﺻﻼت اﳌﱪﳎﺔ ﺧﻼﻓﺎً ﻟﻸﺟﻬﺰة اﻟﺴﺎﺑﻘﺔ‬
‫ﳌﺸﺎﻬﺑﺔ‪ ،‬وﻫﻜﺬا ﻓﺈن ﺣﻘﻴﻘﺔ أن ﻛﻞ ﻣﻦ ﻣﺼﻔﻮﻓﱵ ‪ AND-OR‬ﻛﺎﻧﺘﺎ ﻗﺎﺑﻠﺘﲔ ﻟﻠﱪﳎﺔ ﺟﻌﻠﺖ اﻟـ‪ PLA‬أﺑﻄﺄ ﻧﺴﺒﻴﺎً ﻣﻦ ‪.PROM‬‬

‫‪ 3-1-4-8-2‬ﻣﻨﻄﻖ اﳌﺼﻔﻮﻓﺎت اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ‪:(Programmable Array Logic) PAL‬‬

‫ﻣﻦ أﺟﻞ ﻣﻌﺎﳉﺔ ﻣﺸﻜﻠﺔ اﻟﺴﺮﻋﺔ اﻟﱵ ﺗﻌﺎﱐ ﻣﻨﻬﺎ ﺷﺮاﺋﺢ اﻟـ‪ ،PLA‬ﰎ ﰲ �ﺎﻳﺔ اﻟﺴﺒﻌﻴﻨﺎت ﺗﻄﻮﻳﺮ ﺻﻨﻒ ﺟﺪﻳﺪ ﻣﻦ اﻟﻌﻨﺎﺻﺮ اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ‬
‫ﻟﻠﱪﳎﺔ وﲰﻲ ﺑـ‪.Programmable Array Logic:‬‬

‫ﻣﻦ ﺣﻴﺚ اﳌﺒﺪأ ﻓﺈن ﺷﺮاﺋﺢ اﻟـ‪ PAL‬ذات ﺑﻨﻴﺔ ﻣﺒﺎﻳﻨﺔ ﻟﺸﺮاﺋﺢ اﻟـ‪ PROM‬وذﻟﻚ ﻷ�ﺎ ﲤﻠﻚ ﻣﺼﻔﻮﻓﺔ ‪ AND‬ﻗﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ وﻣﺼﻔﻮﻓﺔ ‪OR‬‬

‫ﻣﻌﺮﻓﺔ ﻣﺴﺒﻘﺎً‪ .‬اﻟﺸﻜﻞ‪ 22-2‬ﻳﺒﲔ ﺷﺮﳛﺔ ‪ PAL‬ﺑﺜﻼث ﻣﺪاﺧﻞ وﺛﻼث ﳐﺎرج ﻗﺒﻞ اﻟﱪﳎﺔ‪.‬‬

‫ﺗﺘﻤﻴﺰ ﺷﺮاﺋﺢ اﻟـ‪ PAL‬ﻣﻘﺎرﻧﺔ ﻣﻊ ﺷﺮاﺋﺢ اﻟـ‪ PLA‬ﺑﺴﺮﻋﺔ أﻛﱪ ﻟﻮﺟﻮد ﻣﺼﻔﻮﻓﺔ واﺣﺪة ﻓﻘﻂ ﻗﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ )‪ ،(AND‬إﻻ أن ﻫﺬﻩ اﳌﻴﺰة ﺟﻌﻠﺖ‬
‫ﺷﺮاﺋﺢ اﻟـ‪ PAL‬ذات ﳏﺪودﻳﺔ ﰲ ﻋﺪد اﳉﺪاءات اﻟﱵ ﳚﺮي ﻋﻠﻴﻬﺎ اﳉﻤﻊ اﳌﻨﻄﻘﻲ‪.‬‬

‫اﻟﺸﻜﻞ‪ 22-2‬ﺷﺮﳛﺔ ‪ PAL‬ﻏﲑ ﻣﱪﳎﺔ )ﻣﺼﻔﻮﻓﺔ ‪ AND‬ﻗﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ وﻣﺼﻔﻮﻓﺔ ‪ OR‬ﻣﻌﺮﻓﺔ ﻣﺴﺒﻘﺎً(‬

‫‪ 4-1-4-8-2‬اﳌﺼﻔﻮﻓﺎت اﳌﻨﻄﻘﻴﺔ اﻟﺸﺎﻣﻠﺔ ‪:(Generic Logic Array) GLA‬‬

‫ﺗﻌﺘﱪ ﻫﺬﻩ اﻟﺘﻘﻨﻴﺔ اﳉﻴﻞ اﳉﺪﻳﺪ ﻣﻦ ﺷﺮاﺋﺢ اﻟـ‪ PAL‬واﻟﱵ ﰎ ﺗﻄﻮﻳﺮﻫﺎ ﻣﻦ ﻗﺒﻞ ﺷﺮﻛﺔ ‪ Lattice Semiconductor‬ﻋﺎم ‪ 1985‬وﺗﻌﺘﻤﺪ‬
‫ﺑﻨﻴﺘﻬﺎ ﻋﻠﻰ ﺗﻘﻨﻴﺔ ‪ EEPROM‬ﻛﻤﺎ أ�ﺎ ﲤﻠﻚ ﻧﻔﺲ اﳋﺼﺎﺋﺺ اﳌﻨﻄﻘﻴﺔ ﻟﺸﺮاﺋﺢ اﻟـ‪ ،PAL‬إﻻ أ�ﺎ ﳝﻜﻦ إﻋﺎدة ﺑﺮﳎﺘﻬﺎ وﳏﻴﻬﺎ‪ .‬ﺗﻌﺘﱪ ﻫﺬﻩ‬
‫اﻟﺘﻘﻨﻴﺔ ﻣﻔﻴﺪة ﺟﺪاً ﰲ ﻣﺮاﺣﻞ ﺗﺼﻤﻴﻢ اﻟﻨﻤﺎذج اﻷوﻟﻴﺔ وذﻟﻚ ﻟﻜﻮ�ﺎ ﻗﺎﺑﻠﺔ ﻟﻠﻤﺤﻲ وإﻋﺎدة اﻟﱪﳎﺔ دون ﻓﺼﻠﻬﺎ ﻋﻦ اﻟﻨﻈﺎم ) ‪In system‬‬

‫‪.(programmable‬‬

‫اﻟﻌﻨﺼﺮ اﳌﻨﻄﻘﻲ اﻟﻘﺎﺑﻞ ﻟﻠﱪﳎﺔ ﻣﻌﻘﺪ اﻟﺒﻨﻴﺔ‪:(Complex Programmable Logic Device) CPLD‬‬ ‫‪2-4-8-2‬‬

‫ﺷﻬﺪت �ﺎﻳﺔ اﻟﺴﺒﻌﻴﻨﺎت وﺑﺪاﻳﺔ اﻟﺜﻤﺎﻧﻴﻨﺎت ﻇﻬﻮر ﺷﺮاﺋﺢ ‪ PLD‬أﻛﺜﺮ ﺗﻌﻘﻴﺪاً وﻋﺮﻓﺖ وﻗﺘﻬﺎ ﺑـ‪ ،CPLD‬وﻗﺪ ﻇﻬﺮ وﻗﺘﻬﺎ ﻋﻨﺼﺮ اﻟـ‪Mega-‬‬

‫‪ PAL‬واﻟﺬي ﻫﻮ ﻋﺒﺎرة ﻋﻦ ﺷﺮﳛﺔ ﺑـ‪ 84‬ﻗﻄﺐ ﻛﺎﻧﺖ ﲢﻮي ﻋﻠﻰ أرﺑﻊ ﺷﺮاﺋﺢ ‪ PAL‬ﻣﻊ ﺑﻌﺾ اﻟﺘﻮﺻﻴﻼت اﻟﺪاﺧﻠﻴﺔ ﻟﻮﺻﻞ ﻫﺬﻩ اﻟﺸﺮاﺋﺢ‬
‫ﻣﻌﺎً‪ .‬ﻟﺴﻮء اﳊﻆ ﻓﺈن اﻟـ‪ Mega-PAL‬ﻛﺎن ﻳﺴﺘﻬﻠﻚ ﻛﻤﻴﺎت ﻛﺒﲑة ﻣﻦ اﻟﻄﺎﻗﺔ‪ ،‬ﻛﻤﺎ أﻧﻪ ﻳﻘﺪم ﻣﻴﺰات ﳏﺪودة ﻣﻘﺎرﻧﺔ ﻣﻊ اﺳﺘﺨﺪام أرﺑﻌﺔ‬
‫ﺷﺮاﺋﺢ ‪ PAL‬ﻣﻨﻔﺼﻠﺔ‪.‬‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪110‬‬
‫‪2‬‬ ‫اﻟﻔﺼﻞ اﻟﺜﺎﱐ | ‪Chapter 2‬‬

‫إن اﻟﻘﻔﺰة اﻟﻜﺒﲑة ﺣﺪﺛﺖ ﻋﺎم ‪ 1984‬ﻋﻨﺪﻣﺎ ﻗﺪﻣﺖ ﺷﺮﻛﺔ ‪ Altera‬ﺷﺮﳛﺔ ‪ CPLD‬ﺗﻌﺘﻤﺪ ﻋﻠﻰ اﳌﺰج ﺑﲔ ﺗﻘﻨﻴﺔ ‪ CMOS‬وﺗﻘﻨﻴﺔ‬
‫‪ ،EPROM‬واﻟﺬي ﺑﺪورﻩ ﻣﻜﻦ ﻣﻦ إﳒﺎز ﻋﺪد ﻫﺎﺋﻞ ﻣﻦ اﻟﺘﻮاﺑﻊ ﻣﻦ ﺣﻴﺚ اﻟﻜﺜﺎﻓﺔ واﻟﺘﻌﻘﻴﺪ ﻣﻦ أﺟﻞ اﺳﺘﻬﻼك ﻣﻨﺨﻔﺾ ﻧﺴﺒﻴﺎً ﻟﻠﻄﺎﻗﺔ‪.‬‬

‫إن اﻟﺒﻨﻴﺔ اﻟﻌﺎﻣﺔ ﻟﺸﺮاﺋﺢ اﻟـ‪ CPLD‬ﺗﺘﺄﻟﻒ ﻣﻦ ﻋﺪة وﺣﺪات ‪ SPLD‬ﺗﺘﺸﺎرك ﻣﺼﻔﻮﻓﺔ وﺻﻞ ﻣﺮﻛﺰﻳﺔ ‪(Interconnect Matrix) ICM‬‬
‫ﻗﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ‪ ،‬وﻛﻠﻬﺎ ﻋﻠﻰ ﺷﺮﳛﺔ واﺣﺪة ﻛﻤﺎ ﻫﻮ ﻣﺒﲔ ﻋﻠﻰ اﻟﺸﻜﻞ‪ 23-2‬واﻟﺸﻜﻞ‪.24-2‬‬

‫اﻟﺸﻜﻞ‪ 23-2‬اﻟﺒﻨﻴﺔ اﻟﻌﺎﻣﺔ ﻟﺸﺮاﺋﺢ اﻟـ‪CPLD‬‬

‫اﻟﺸﻜﻞ‪ 24-2‬اﳌﺨﻄﻂ اﻟﺼﻨﺪوﻗﻲ ﻟﻠﺒﻨﻴﺔ اﻟﺪاﺧﻠﻴﺔ ﻟﻠـ‪CPLD‬‬

‫ﺑﺎﻹﺿﺎﻓﺔ إﱃ إﻣﻜﺎﻧﻴﺔ ﺑﺮﳎﺔ وﺣﺪات اﻟـ‪ SPLD‬اﳌﺴﺘﻘﻠﺔ‪ ،‬ﻓﺈن اﻟﻮﺻﻼت ﺑﲔ اﻟﻮﺣﺪات ﳝﻜﻦ أن ﺗﱪﻣﺞ ﺑﻮاﺳﻄﺔ ﻣﺼﻔﻮﻓﺔ اﻟﻮﺻﻞ اﻟﺪاﺧﻠﻲ‬
‫اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ‪ ،‬ﻛﻤﺎ أن ﻣﺼﻔﻮﻓﺔ اﻻﺗﺼﺎل اﻟﺪاﺧﻠﻲ ﲢﺘﻮي ﻋﻠﻰ اﻟﻜﺜﲑ ﻣﻦ اﻷﺳﻼك )‪ 100‬ﻣﺜﻼً(‪ ،‬وﻫﺬا أﻛﺜﺮ ﳑﺎ ﳝﻜﻦ ﻟﻮﺣﺪة ‪ SPLD‬أن‬
‫ﺗﺘﻌﺎﻣﻞ ﻣﻌﻪ‪ ،‬ﺣﻴﺚ ﳝﻜﻦ ﻟﻮﺣﺪة اﻟـ‪ SPLD‬أن ﺗﺘﻌﺎﻣﻞ ﻣﻊ ﻋﺪد ﳏﺪود ﻣﻦ اﻹﺷﺎرات )‪ 30‬ﻣﺜﻼً( وﺑﺬﻟﻚ ﻓﺈن وﺣﺪة اﻟـ‪ SPLD‬ﺗﺘﺼﻞ إﱃ‬
‫ﻣﺼﻔﻮﻓﺔ اﻻﺗﺼﺎل اﻟﺪاﺧﻠﻲ ﺑﻮاﺳﻄﺔ ﻧﺎﺧﺐ ﻗﺎﺑﻞ ﻟﻠﱪﳎﺔ )‪ ،(Programmable Multiplexer‬وﺑﺎﻻﻋﺘﻤﺎد ﻋﻠﻰ اﻟﺸﺮﻛﺔ اﻟﺼﺎﻧﻌﺔ ﻓﺈن‬
‫ﻧﻮاﺧﺐ اﻟـ‪ CPLD‬اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﳝﻜﻦ أن ﺗﻌﺘﻤﺪ ﻋﻠﻰ ﺗﻘﻨﻴﺔ اﻟـ‪ EPROM‬أو ﺗﻘﻨﻴﺔ اﻟـ‪ EEPROM‬أو ﺗﻘﻨﻴﺔ اﻟـ‪ Flash‬أو ﺧﻼﻳﺎ‬
‫اﻟـ‪ .SRAM‬اﻟﺸﻜﻞ‪ 25-2‬ﻳﺒﲔ اﻟﺒﻨﻴﺔ اﻟﻌﺎﻣﺔ ﻟﻨﻮاﺧﺐ اﻟـ‪ CPLD‬اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ‪.‬‬

‫اﻟﺸﻜﻞ‪ 25-2‬اﻟﺒﻨﻴﺔ اﻟﻌﺎﻣﺔ ﻟﻨﻮاﺧﺐ اﻟـ‪ CPLD‬اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ‬

‫اﳉﺪول‪ 4-2‬ﻳﺒﲔ اﻟﺴﻤﺎت اﻟﻌﺎﻣﺔ ﻟﺸﺮاﺋﺢ اﻟـ‪.CPLD‬‬

‫‪111‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫اﳌﺼﻔﻮﻓﺎت اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً | ‪Field Programmable Gate Arrays‬‬

‫اﻟﻤﺠﺎل‬ ‫ﺧﺼﺎﺋﺺ ﺷﺮاﺋﺢ اﻟـ‪CPLD‬‬

‫‪ 44 ~ 300+‬ﻗﻄﺐ‬ ‫ﻋﺪد أﻗﻄﺎب اﻟﺸﺮﳛﺔ‬
‫‪ 32 ~ 500+‬ﺧﻠﻴﺔ ﻣﻨﻄﻘﻴﺔ‬ ‫ﻋﺪد اﳋﻼﻳﺎ ‪Macrocell‬‬
‫‪ 32 ~ 500+‬ﻗﻼب‬ ‫‪FFs‬‬ ‫ﻋﺪد اﻟﻘﻼﺑﺎت‬
‫‪EPROM, EEPROM, Flash, SRAM‬‬ ‫ﺗﻘﻨﻴﺔ اﻟﺘﺸﻜﻴﻞ‬
‫‪Nonvolatile‬‬ ‫اﳊﺎﻟﺔ ﻋﻨﺪ وﺻﻞ اﻟﺘﻐﺬﻳﺔ‬
‫ﻗﺎﺑﻠﺔ ﻹﻋﺎدة اﻟﱪﳎﺔ‬ ‫ﻗﺎﺑﻠﻴﺔ اﻟﱪﳎﺔ‬
‫ﳝﻜﻦ اﻟﱪﳎﺔ ﺿﻤﻦ اﻟﻨﻈﺎم )‪(In-system‬‬ ‫آﻟﻴﺔ اﻟﱪﳎﺔ‬
‫ﻣﺘﻮﺳﻂ‬ ‫اﳊﺠﻢ‬
‫‪ 900 ~ 20,000+‬ﺑﻮاﺑﺔ ﻣﻨﻄﻘﻴﺔ‬ ‫اﻟﻌﺪد اﳌﻜﺎﻓﺊ ﻟﻠﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ‬

‫اﳉﺪول‪ 4-2‬اﳋﺼﺎﺋﺺ اﻟﺮﺋﻴﺴﻴﺔ ﻟﺸﺮاﺋﺢ اﻟـ‪CPLD‬‬

‫‪ 1-2-4-8-2‬اﻷﻧﻮاع اﻟﺘﺠﺎرﻳﺔ ﻟﺸﺮاﺋﺢ اﻟـ‪:(Typical vendor-specific names for CPLD) CPLD‬‬

‫ﺗﻘﻮم اﻟﺸﺮﻛﺎت اﳌﺼﻨﻌﺔ ﻟﻠﻌﻨﺎﺻﺮ اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺑﺘﻄﻮﻳﺮ أﻧﻮاع ﳐﺘﻠﻔﺔ ﻣﻦ ﻫﺬﻩ اﻟﺸﺮاﺋﺢ‪ ،‬اﻷﻧﻮاع اﻟﺘﺎﻟﻴﺔ ﰎ ﺗﻄﻮﻳﺮﻫﺎ ﻣﻦ ﻗﺒﻞ ﺷﺮﻛﺎت‬
‫اﻟﺘﺼﻨﻴﻊ اﳌﺨﺘﻠﻔﺔ ) ‪ (Lattice, Altera, Xilinx, Atmel, etc...‬وﲨﻴﻌﻬﺎ ﺗﻌﺘﻤﺪ ﺑﻨﻴﺔ اﻟـ‪.CPLD‬‬
‫‪(Complex Programmable Logic Device ) CPLD -‬‬
‫‪(Electrical Programmable Logic Device) EPLD -‬‬
‫‪(Erasable Programmable Logic Device) EPLD -‬‬
‫‪(Electrically-Erasable Programmable Logic Device) EEPLD -‬‬
‫‪(eXpanded Programmable Logic Device) XPLD -‬‬

‫ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ”‪:(Field Programmable Gate Array) “FPGA‬‬ ‫‪3-4-8-2‬‬

‫‪ 1-3-4-8-2‬ﶈﺔ ﻋﺎﻣﺔ )‪:(Overview‬‬

‫ﰲ ﺑﺪاﻳﺔ اﻟﺜﻤﺎﻧﻴﻨﺎت ﻛﺎن ﻣﻦ اﻟﻮاﺿﺢ أن ﻫﻨﺎك ﻓﺠﻮة ﻫﺎﺋﻠﺔ ﰲ ﺗﺴﻠﺴﻞ ﻇﻬﻮر اﻟﺪارات اﳌﻨﻄﻘﻴﺔ اﳌﺘﻜﺎﻣﻠﺔ‪ ،‬ﻓﻤﻦ ﺟﺎﻧﺐ ﳒﺪ اﻟﻌﻨﺎﺻﺮ اﳌﻨﻄﻘﻴﺔ‬
‫اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﻣﺜﻞ‪ :‬اﻟـ‪ CPLD‬واﻟـ‪ ،SPLD‬واﻟﱵ ﻛﺎﻧﺖ ﻗﺎﺑﻠﺔ ﻹﻋﺎدة اﻟﺘﻌﺪﻳﻞ واﻟﱪﳎﺔ وﻻ ﲢﺘﺎج زﻣﻨﺎً ﻛﺒﲑاً ﻟﻠﺘﺼﻤﻴﻢ واﻟﺘﻄﻮﻳﺮ‪ ،‬ﻏﲑ أ�ﺎ‬
‫ﻟﻴﺴﺖ ﻗﺎدرة ﻋﻠﻰ دﻋﻢ وﻇﺎﺋﻒ ﻣﺘﻘﺪﻣﺔ وﻣﻌﻘﺪة‪ .‬ﻣﻦ ﺟﺎﻧﺐ آﺧﺮ ﳒﺪ ﺗﻘﻨﻴﺔ اﻟـ‪ ASIC‬اﻟﱵ ﺗﺪﻋﻢ وﻇﺎﺋﻒ ﻣﺘﻘﺪﻣﺔ وﻣﻌﻘﺪة ﻏﲑ أن ﻛﻠﻔﺔ‬
‫اﻟﺘﺼﻤﻴﻢ واﻟﺘﺼﻨﻴﻊ ﻣﺮﺗﻔﻌﺔ ﺟﺪاً وﺗﺴﺘﻐﺮق ﺷﻬﻮراً‪ ،‬ﻛﻤﺎ أ�ﺎ ﲢﺘﺎج إﱃ وﻗﺖ ﻃﻮﻳﻞ وﺧﱪة ﻛﺒﲑة ﻟﺘﺼﻤﻴﻤﻬﺎ‪ ،‬ﻫﺬا ﺑﺎﻹﺿﺎﻓﺔ إﱃ ﻋﺪم إﻣﻜﺎﻧﻴﺔ‬
‫ﺗﻌﺪﻳﻞ اﻟﺘﺼﻤﻴﻢ ﺑﻌﺪ ﺑﺮﳎﺘﻪ ﻋﻠﻰ اﻟﺸﺮﳛﺔ]‪.[355‬‬

‫ﰲ ﻋﺎم ‪ 1984‬أﻋﻠﻨﺖ ﺷﺮﻛﺔ ‪ Xilinx‬اﻟﺮاﺋﺪة ﻋﻦ ﺗﻄﻮﻳﺮﻫﺎ ﻟﺼﻨﻒ ﺟﺪﻳﺪ ﻣﻦ اﻟﻌﻨﺎﺻﺮ اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ واﻟﺬي أﻃﻠﻘﺖ ﻋﻠﻴﻪ‬
‫”‪ “FPGA‬اﺧﺘﺼﺎراً ﻟـ”‪ .“Field Programmable Gate Array‬إن ﺷﺮاﺋﺢ اﻟـ‪ FPGA‬اﻷوﱃ )‪ (XC2064‬ﻛﺎﻧﺖ ﺗﺴﺘﺨﺪم ﺧﻼﻳﺎ‬
‫‪ SRAM‬ﺗﻌﺘﻤﺪ ﺗﻘﻨﻴﺔ ﺗﺮاﻧﺰﺳﺘﻮرات ‪ CMOS‬وﲢﻮي ﻋﻠﻰ ﺑﻀﻊ آﻻف ﻣﻦ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ‪.‬‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪112‬‬
‫‪2‬‬ ‫اﻟﻔﺼﻞ اﻟﺜﺎﱐ | ‪Chapter 2‬‬

‫ﻣﻊ �ﺎﻳﺔ اﻟﻘﺮن اﻟﻌﺸﺮﻳﻦ ﺗﻄﻮرت ﻫﺬﻩ اﻟﺘﻘﻨﻴﺔ ﺑﺸﻜﻞ ﻛﺒﲑ ﺟﺪاً ﺣﻴﺚ ﲡﺎوز ﻋﺪد اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ ﻋﻠﻰ ﺷﺮﳛﺔ واﺣﺪة ﺛﻼث ﻣﻼﻳﲔ وﻧﺼﻒ‬
‫اﳌﻠﻴﻮن ﺑﻮاﺑﺔ‪ ،‬وﻏﺪت ﺷﺮاﺋﺢ اﻟـ‪ FPGA‬ﳏﻮر اﻫﺘﻤﺎم ﲨﻴﻊ اﻟﻘﻄﺎﻋﺎت اﻟﺼﻨﺎﻋﻴﺔ واﻟﺘﺠﺎرﻳﺔ وأﺻﺒﺤﺖ ﺣﱴ أﻟﻌﺎب اﻷﻃﻔﺎل ﺗﻌﺘﻤﺪ ﻋﻠﻰ ﻫﺬﻩ‬
‫اﻟﺘﻘﻨﻴﺔ‪.‬‬

‫‪ 2-3-4-8-2‬ﻣﺎ ﻫﻮ اﻟـ‪(What Does FPGA Mean) FPGA‬؟‬

‫اﻋﺘﻤﺪﻧﺎ أن ﻧﱰﲨﻬﺎ ﰲ ﻫﺬﻩ اﻷﻃﺮوﺣﺔ إﱃ‪" :‬ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً" واﻟﱵ ﻫﻲ ﻋﺒﺎرة ﻋﻦ ﺷﺮﳛﺔ ﻣﺘﻜﺎﻣﻠﺔ ﺻﻤﻤﺖ‬
‫ﲝﻴﺚ ﳝﻜﻦ ﺑﺮﳎﺘﻬﺎ ‪ -‬إﻋﺎدة ﺗﺸﻜﻴﻠﻬﺎ )‪ (re-configuring‬ﻋﻠﻰ ﻣﺴﺘﻮى اﻟﻜﻴﺎن اﻟﺼﻠﺐ ‪ -‬أي ﳝﻜﻦ ﺿﺒﻂ اﻟﻮﺻﻼت ﺑﲔ اﻟﻮﺣﺪات‬
‫اﳌﻨﻄﻘﻴﺔ ﻋﻠﻰ اﻟﺸﺮﳛﺔ ‪ -‬ﻣﻦ ﻗﺒﻞ ﻣﻬﻨﺪس ﺗﺼﻤﻴﻢ اﻟﻨﻈﺎم )‪ ،(System Designer‬وﻫﻲ ﺗﺘﺄﻟﻒ ﻣﻦ وﺣﺪات ﻣﻨﻄﻘﻴﺔ ﻋﻠﻰ ﺷﻜﻞ ﻣﺼﻔﻮﻓﺔ‬
‫ﺛﻨﺎﺋﻴﺔ ”‪ “Gate Array‬وﳝﻜﻦ ﺑﺮﳎﺘﻬﺎ ﰲ ﺣﻘﻞ اﻟﻌﻤﻞ اﻟﺬي ﺗﻌﻤﻞ ﺑﻪ ”‪.“Filed Programmable‬‬

‫إن ﺷﺮاﺋﺢ اﻟـ‪ FPGA‬اﻟﱵ ﺗﻌﺘﻤﺪ ﺗﻘﻨﻴﺔ اﻟـ‪ Antifuse, Fusible, ROM‬ﻗﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﳌﺮة واﺣﺪة ﻓﻘﻂ وﻳﺸﺎر إﻟﻴﻬﺎ ﺑـ‪ ،OTP‬أﻣﺎ ﺑﺎﻗﻲ‬
‫اﻟﺸﺮاﺋﺢ ذات اﻟﺘﻘﻨﻴﺎت ‪ ،SRAM, EEPROM, FLASH‬ﻓﻴﻤﻜﻦ إﻋﺎدة ﺑﺮﳎﺘﻬﺎ‪/‬ﺿﺒﻄﻬﺎ‪.‬‬

‫ﺗﺆﻣﻦ ﺗﻘﻨﻴﺔ اﻟـ‪ FPGA‬ﻣﺮوﻧﺔ ﻛﺒﲑة ﰲ اﻟﺘﺼﻤﻴﻢ وﻛﻠﻔﺔ ﻣﻨﺨﻔﻀﺔ إﺿﺎﻓﺔ إﱃ ذﻟﻚ ﻓﺈن ﺗﻘﻨﻴﺔ اﻟـ‪ FPGA‬ﳝﻜﻦ أن ﺗﺴﺘﺨﺪم ﻟﺘﺤﻘﻴﻖ أي وﻇﻴﻔﺔ‬
‫ﻣﻨﻄﻘﻴﺔ ﳝﻜﻦ ﲢﻘﻴﻘﻬﺎ ﺑﺎﺳﺘﺨﺪام ﺗﻘﻨﻴﺔ اﻟـ‪ ASICs‬إﺿﺎﻓﺔ إﱃ إﻣﻜﺎﻧﻴﺔ ﲢﻘﻴﻖ وﻇﺎﺋﻒ ﻣﻨﻄﻘﻴﺔ ﻣﺘﻘﺪﻣﺔ )‪MCUs, Memories, High-‬‬

‫…‪ ،(speed Buss, etc‬وﻛﻞ ﻫﺬا ﳝﻜﻦ إﻋﺎدة ﺿﺒﻄﻪ ﺑﺸﻜﻞ ﻛﻠﻲ أو ﺟﺰﺋﻲ )‪ (Partial re-configurable‬ﺑﺎﺳﺘﺨﺪام ﺗﻘﻨﻴﺔ‬
‫اﻟـ‪ .FPGA‬اﳉﺪول‪ 5-2‬ﻳﺒﲔ اﻟﺴﻤﺎت اﻟﻌﺎﻣﺔ ﻟﺸﺮاﺋﺢ اﻟـ‪.FPGA‬‬

‫اﻟﻤﺠﺎل‬ ‫ﺧﺼﺎﺋﺺ ﺷﺮاﺋﺢ اﻟـ‪FPGA‬‬

‫‪ 64+‬ﻗﻄﺐ‬ ‫ﻋﺪد أﻗﻄﺎب اﻟﺸﺮﳛﺔ‬
‫‪ 5000+‬ﺧﻠﻴﺔ ﻣﻨﻄﻘﻴﺔ‬ ‫ﻋﺪد اﳋﻼﻳﺎ ‪Macrocell‬‬
‫‪ 5000+‬ﻗﻼب‬ ‫‪FFs‬‬ ‫ﻋﺪد اﻟﻘﻼﺑﺎت‬
‫‪EPROM, EEPROM, Flash, SRAM‬‬ ‫ﺗﻘﻨﻴﺔ اﻟﺘﺸﻜﻴﻞ‬
‫‪SRAM: volatile, OTP: nonvolatile‬‬ ‫اﳊﺎﻟﺔ ﻋﻨﺪ وﺻﻞ اﻟﺘﻐﺬﻳﺔ‬
‫ﻗﺎﺑﻠﺔ ﻹﻋﺎدة اﻟﱪﳎﺔ‬ ‫ﻗﺎﺑﻠﻴﺔ اﻟﱪﳎﺔ‬
‫ﳝﻜﻦ اﻟﱪﳎﺔ ﺿﻤﻦ اﻟﻨﻈﺎم )‪(In-system‬‬ ‫آﻟﻴﺔ اﻟﱪﳎﺔ‬
‫ﻣﺘﻮﺳﻂ إﱃ ﻛﺒﲑ‬ ‫اﳊﺠﻢ‬
‫‪ 10,000+‬ﺑﻮاﺑﺔ ﻣﻨﻄﻘﻴﺔ‬ ‫اﻟﻌﺪد اﳌﻜﺎﻓﺊ ﻟﻠﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ‬

‫اﳉﺪول‪ 5-2‬اﳋﺼﺎﺋﺺ اﻟﻌﺎﻣﺔ ﻟﺸﺮاﺋﺢ اﻟـ‪FPGA‬‬

‫‪ 3-3-4-8-2‬اﻟﺸﺮﻛﺎت اﳌﺼﻨﻌﺔ ﻟﺸﺮاﺋﺢ اﻟـ‪:(FPGA Vendors) FPGA‬‬

‫ﰲ ﻣﺸﺎرﻳﻊ اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ ﻋﻤﻮﻣﺎً ﻳﺘﻢ اﺧﺘﻴﺎر اﳊﻠﻮل اﻟﺘﻜﻨﻠﻮﺟﻴﺔ ﺑﻨﺎءً ﻋﻠﻰ ﻋﺪة ﻧﻘﺎط أﺳﺎﺳﻴﺔ‪ ،‬واﻟﱵ ﻣﻨﻬﺎ‪ :‬ﺗﻜﻠﻔﺔ اﻟﺸﺮﳛﺔ‪ ،‬ﻣﺴﺘﻮى اﳌﺮوﻧﺔ‬
‫ﰲ ﺑﻴﺌﺔ اﻟﺘﻄﻮﻳﺮ‪ ،‬ﻣﺴﺘﻮى اﻟﺪﻋﻢ اﻟﻔﲏ ﻣﻦ ﻗﺒﻞ اﻟﺸﺮﻛﺔ اﳌﺼﻨﻌﺔ‪ ،‬ﻣﺴﺘﻮى اﻟﺸﺮﻛﺔ اﳌﺼﻨﻌﺔ ﲡﺎرﻳﺎً؛ إن ﲨﻴﻊ ﻫﺬﻩ اﻟﻨﻘﺎط ﺿﺮورﻳﺔ ﺟﺪاً ﰲ ﲢﺪﻳﺪ‬
‫أﻓﻖ اﻟﺘﻄﻮﻳﺮ اﳌﺴﺘﻘﺒﻠﻲ ﻟﻠﻤﺸﺎرﻳﻊ‪ ،‬ﺣﻴﺚ ﻻ ﳝﻜﻦ اﻻﻋﺘﻤﺎد ﻋﻠﻰ اﻟﺸﺮﻛﺎت اﳌﻨﻄﻠﻘﺔ ﺣﺪﻳﺜﺎً )‪ (Startups‬ﻋﻨﺪ اﺧﺘﻴﺎر اﳌﻌﺎﳉﺎت واﻟﺸﺮاﺋﺢ‬

‫‪113‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫اﳌﺼﻔﻮﻓﺎت اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً | ‪Field Programmable Gate Arrays‬‬

‫اﻟﺮﻗﻤﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ‪ ،‬اﻟﻜﺜﲑ ﻣﻦ اﻟﺸﺮﻛﺎت اﳌﺼﻨﻌﺔ ﻟﺸﺮاﺋﺢ اﻟـ‪ FPGA‬ﺑﺪأت واﻧﺘﻬﺖ ﺧﻼل ﻣﺪة أﻗﻞ ﻣﻦ اﻟﻌﻤﺮ اﻻﻓﱰاﺿﻲ ﳌﺸﺮوع ﻛﺒﲑ‪.‬‬
‫اﻟﺸﻜﻞ‪ 26-2‬ﻳﺒﲔ اﳌﺨﻄﻂ اﻟﺰﻣﲏ ﻟﻠﺸﺮﻛﺎت اﻟﻌﺎﳌﻴﺔ اﳌﺼﻨﻌﺔ ﻟﺘﻘﻨﻴﺔ اﻟـ‪ PLD/FPGA‬ﺣﻴﺚ ﳝﺜﻞ اﻟﻠﻮن اﻷﺧﻀﺮ اﻟﺸﺮﻛﺎت اﻟﻨﺎﺟﺤﺔ‬
‫ﳌﺴﺘﻤﺮة ﰲ ﻫﺬا ا ﺠﻤﻟﺎل‪ ،‬وﳝﺜﻞ اﻟﻠﻮن اﻟﺮﻣﺎدي اﻟﺸﺮﻛﺎت اﻟﱵ ﻛﺎﻧﺖ ﻣﻮﺟﻮدة ﺳﺎﺑﻘﺎً وﻓﺸﻠﺖ‪ ،‬وأﻣﺎ اﻟﻠﻮن اﻷزرق ﻓﻴﻤﺜﻞ اﻟﺸﺮﻛﺎت اﻟﻐﲑ‬
‫ﻣﺴﺘﻘﺮة‪ ،‬واﻟﻠﻮن اﻷﺻﻔﺮ ﳝﺜﻞ اﻟﺸﺮﻛﺎت اﻟﱵ ﺑﺪأت ﺣﺪﻳﺜﺎً‪.‬‬

‫ﻋﻤﻮﻣﺎً ﻓﺈن اﻟﺸﺮﻛﺎت اﻟﻌﻤﻼﻗﺔ ﻫﻲ اﻟﱵ ﺗﻘﺪم أﻓﻀﻞ اﳊﻠﻮل وأﻓﻀﻞ اﻷﺳﻌﺎر‪ .‬اﻟﺸﻜﻞ‪ 27-2‬ﻳﺒﲔ اﻟﱰﺗﻴﺐ اﻟﻌﺎﳌﻲ ﻟﻠﺸﺮﻛﺎت اﳌﺼﻨﻌﺔ وﻓﻘﺎً‬
‫ﻟﺘﻘﺮﻳﺮ ‪ Gartner‬ﻟﻌﺎم ‪ ،2008‬وﻳﺄﰐ ﻋﻠﻰ رأﺳﻬﺎ اﻟﺸﺮﻛﺔ اﻟﺮاﺋﺪة ‪ Xilinx‬واﻟﱵ ﲢﺘﻞ أﻛﺜﺮ ﻣﻦ ‪ 51%‬ﻣﻦ ﺳﻮق اﻟﻌﻨﺎﺻﺮ اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ‬
‫ﻟﻠﱪﳎﺔ‪.‬‬

‫اﻟﺸﻜﻞ‪ 26-2‬اﳌﺨﻄﻂ اﻟﺰﻣﲏ ﻟﻠﺸﺮﻛﺎت اﳌﺼﻨﻌﺔ ﻟﻠـ‪PLD/FPGA‬‬

‫اﳌﺼﻨﻌﺔ ﻟﻠـ‪ PLD/FPGA‬ﻟﻌﺎم ‪2008‬‬ ‫اﻟﺸﻜﻞ‪ 27-2‬اﻟﱰﺗﻴﺐ اﻟﻌﺎﳌﻲ ﻟﻠﺸﺮﻛﺎت‬

‫إن ﻛﻞ ﻣﻦ ﻫﺬﻩ اﻟﺸﺮﻛﺎت ﺗﻌﺘﻤﺪ ﺑﻨﻴﺔ ﺧﺎﺻﺔ وﺗﻘﻨﻴﺎت ﳐﺘﻠﻔﺔ ﻟﻠﺸﺮاﺋﺢ اﻟﱵ ﺗﻘﻮم ﺑﺘﺼﻨﻴﻌﻬﺎ‪ ،‬وﻻ ﻳﻮﺟﺪ اﺷﱰاك ﻓﻴﻤﺎ ﺑﻴﻨﻬﺎ إﻻ ﻣﻦ ﺣﻴﺚ اﻟﺒﻨﻴﺔ‬
‫اﻟﻌﺎﻣﺔ ﻟﺸﺮاﺋﺢ اﻟـ‪ .FPGA‬اﳉﺪول‪ 5-2‬ﻳﺒﲔ اﻟﺸﺮﻛﺎت اﻟﺮاﺋﺪة ﰲ ﺻﻨﺎﻋﺔ ﺷﺮاﺋﺢ اﻟـ‪ FPGA‬واﻟﺘﻘﻨﻴﺎت اﻟﱵ ﺗﻌﺘﻤﺪﻫﺎ إﺿﺎﻓﺔً إﱃ ﻋﻨﺎوﻳﻦ اﳌﻮاﻗﻊ‬
‫ﻋﻠﻰ اﻷﻧﱰﻧﺖ‪.‬‬
‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪114‬‬
‫‪2‬‬ ‫اﻟﻔﺼﻞ اﻟﺜﺎﱐ | ‪Chapter 2‬‬

‫‪Manufacturer‬‬ ‫‪Technology‬‬ ‫‪Website‬‬

‫‪Actel‬‬ ‫‪Antifuse‬‬ ‫‪www.actel.com‬‬

‫‪Altera‬‬ ‫‪SRAM, Flash‬‬ ‫‪www.altera.com‬‬
‫‪Atmel‬‬ ‫‪EEPROM‬‬ ‫‪www.atmel.com‬‬
‫‪Lattice‬‬ ‫‪SRAM, Flash‬‬ ‫‪www.latticesemi.com‬‬
‫‪Quicklogic‬‬ ‫‪Antifuse‬‬ ‫‪www.quicklogic.com‬‬
‫‪Xilinx‬‬ ‫‪SRAM‬‬ ‫‪www.xilinx.com‬‬

‫اﳉﺪول‪ 6-2‬اﻟﺸﺮﻛﺎت اﳌﺼﻨﻌﺔ ﻟﺸﺮاﺋﺢ اﻟـ‪ FPGA‬واﻟﺘﻘﻨﻴﺎت اﻟﱵ ﺗﻌﺘﻤﺪﻫﺎ‬

‫ﻣﻌﺎﻳﲑ اﺧﺘﻴﺎر اﻟﺸﺮﻛﺎت اﳌﺼﻨﻌﺔ )‪:(Manufacturer Selection Criteria‬‬ ‫‪1-3-3-4-8-2‬‬

‫ﻳﻮﺟﺪ اﻟﻌﺪﻳﺪ ﻣﻦ اﳌﻌﺎﻳﲑ واﻟﻌﻮاﻣﻞ اﳍﺎﻣﺔ ﰲ اﺧﺘﻴﺎر اﻟﺸﺮﻛﺔ اﳌﺼﻨﻌﺔ ﻟﻠﺤﻠﻮل اﻟﺘﻜﻨﻠﻮﺟﻴﺔ ﻧﻮردﻫﺎ ﻓﻴﻤﺎ ﻳﻠﻲ]‪:[355,356‬‬
‫‪ ‬ﺗﻮﻓﲑ اﻷدوات واﳊﻠﻮل اﻟﱪﳎﻴﺔ )‪.(Tools‬‬
‫‪ ‬اﻟﺮﻳﺎدة ﰲ اﻟﺘﻜﻨﻮﻟﻮﺟﻴﺎ )‪.(Technology leadership‬‬
‫‪ ‬ﺗﺰوﻳﺪ اﻟﻮﺣﺪات اﻟﱪﳎﻴﺔ اﳌﺘﻮاﻓﻘﺔ ﻣﻊ اﳊﻠﻮل اﻟﱪﳎﻴﺔ )‪.(IP offerings‬‬
‫‪ ‬ﺗﺰوﻳﺪ ﻣﻨﺘﺠﺎت ﲟﻮاﺻﻔﺎت وﻣﺰاﻳﺎ إﺑﺪاﻋﻴﺔ )‪.(Innovative product features‬‬
‫‪ ‬ﺗﻄﻮﻳﺮ أﺟﻴﺎل اﳌﻨﺘﺠﺎت ﺑﺸﻜﻞ ﻣﺘﺠﺪد )‪.(Solid roadmaps‬‬
‫‪ ‬دﻋﻢ وﺗﺼﻨﻴﻊ ﻋﺎﺋﻼت اﻟﺸﺮاﺋﺢ ﻟﻔﱰات ﻃﻮﻳﻠﺔ ﺟﺪاً )‪.(Longevity of parts‬‬
‫‪ ‬ﺗﻮﻓﺮ اﻟﻌﺪﻳﺪ ﻣﻦ ﻋﺎﺋﻼت اﻟﺸﺮاﺋﺢ ﲟﻴﺰات ﻋﺪﻳﺪة )‪.(Multiple families‬‬
‫‪ ‬اﻟﺪﻋﻢ اﻟﻔﲏ واﻟﺘﻘﲏ )‪.(Support‬‬

‫ﻋﻮاﻣﻞ اﺧﺘﻴﺎر اﻟﺸﺮﳛﺔ اﳌﻨﺎﺳﺒﺔ ﻟﻠﺘﻄﺒﻴﻖ )‪:(Chip Selection Factors‬‬ ‫‪2-3-3-4-8-2‬‬

‫ﲟﺎ أن اﻟﺸﺮﻛﺎت اﳌﺼﻨﻌﺔ اﻟﺮاﺋﺪة ﺗﻮﻓﺮ اﻟﻌﺪﻳﺪ ﻣﻦ اﻟﻌﺎﺋﻼت اﻟﺸﺮاﺋﺢ اﻟﱵ ﺗﺘﻔﺎوت ﰲ ﻣﻴﺰﻬﺗﺎ وأداﺋﻬﺎ وﺳﻌﺮﻫﺎ‪ ،‬ﻓﺈﻧﻪ ﻣﻦ اﻟﻀﺮوري اﺧﺘﻴﺎر اﻟﺸﺮﳛﺔ‬
‫اﳌﻨﺎﺳﺒﺔ ﻟﻠﺘﻄﺒﻴﻖ ﻣﻦ ﺧﻼل ﲢﺪﻳﺪ اﻟﻌﻮاﻣﻞ اﳌﻄﻠﻮﺑﺔ]‪ [355,356‬وﻫﻲ‪:‬‬
‫‪ ‬اﻟﺴﻌﺮ )‪.(Cost‬‬
‫‪ ‬اﳊﺠﻢ )‪.(Size‬‬
‫‪ ‬اﻟﻄﺎﻗﺔ )‪.(Power‬‬
‫‪ ‬اﻟﺴﺮﻋﺔ )‪.(Speed‬‬
‫‪ ‬ﻋﺪد أﻗﻄﺎب اﻟﺪﺧﻞ واﳋﺮج )‪.(I/O Count‬‬
‫‪ ‬اﳌﺼﺎدر اﳌﻨﻄﻘﻴﺔ اﻷﺳﺎﺳﻴﺔ ﻋﻠﻰ اﻟﺸﺮﳛﺔ )‪.(Logic fabric resources‬‬
‫‪ ‬ﻣﺼﺎدر إدارة ﺗﺮدد ﻋﻤﻞ اﻟﺸﺮﳛﺔ )‪.(Clock management resources‬‬
‫‪ ‬ﻣﺼﺎدر اﻟﺬاﻛﺮة )‪.(Memory resources‬‬
‫‪ ‬دﻋﻢ ﻧﻮاة ﻣﺪﳎﺔ ﳌﻌﺎﰿ ﻣﺼﻐﺮ )‪.(Embedded processor support‬‬

‫‪115‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 Field Programmable Gate Arrays | ً‫اﳌﺼﻔﻮﻓﺎت اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎ‬

.(DSP resources) ‫ دﻋﻢ ﻣﺼﺎدر وﺣﺪات ﻣﻌﺎﳉﺔ اﻹﺷﺎرة اﻟﺮﻗﻤﻴﺔ‬

.(Packaging) ‫ اﻟﺸﻜﻞ اﻟﻔﻴﺰﻳﺎﺋﻲ ﻟﻠﺸﺮﳛﺔ‬
.(Common footprint component migration options) ‫ إﻣﻜﺎﻧﻴﺔ وﺟﻮد ﺑﺪاﺋﻞ ﻟﻠﺸﺮﳛﺔ‬
.(Interface requirements) ‫ ﻣﺘﻄﻠﺒﺎت اﻟﺮﺑﻂ ﻣﻊ اﶈﻴﻄﻴﺎت‬
.(Design tool features and familiarity) ‫ ﻣﻴﺰات أدوات اﻟﺘﺼﻤﻴﻢ واﻧﺘﺸﺎرﻫﺎ‬

:(Typical vendor-specific names for FPGA) FPGA‫ اﻷﻧﻮاع اﻟﺘﺠﺎرﻳﺔ ﻟﺸﺮاﺋﺢ اﻟـ‬4-3-4-8-2
‫ اﻷﻧﻮاع اﻟﺘﺎﻟﻴﺔ ﰎ ﺗﻄﻮﻳﺮﻫﺎ ﻣﻦ ﻗﺒﻞ ﺷﺮﻛﺎت اﻟﺘﺼﻨﻴﻊ‬،‫ﺗﻘﻮم اﻟﺸﺮﻛﺎت اﳌﺼﻨﻌﺔ ﻟﻠﻌﻨﺎﺻﺮ اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺑﺘﻄﻮﻳﺮ أﻧﻮاع ﳐﺘﻠﻔﺔ ﳍﺬﻩ اﻟﺸﺮاﺋﺢ‬
.FPGA‫( وﲨﻴﻌﻬﺎ ﺗﻌﺘﻤﺪ ﺑﻨﻴﺔ اﻟـ‬Lattice, Altera, Xilinx, Atmel, etc... ) ‫اﳌﺨﺘﻠﻔﺔ‬
(Field Programmable Gate Array) FPGA -
(System Programmable Gate Array) SPGA -
(eXpanded Programmable Gate Array) XPGA -
(Programmable ASIC) pASIC -
(Logic Cell Array) LCA -
(Masked Programmable Gate Array) MPGA -
(Field Programmable Object Array) FPOA -
(Field Programmable Analog Array) FPAA -

:(FPGA Classification) FPGA‫ ﺗﺼﻨﻴﻔﺎت اﻟﺒﻨﻴﺔ ﻟﺘﻘﻨﻴﺔ اﻟـ‬5-3-4-8-2

FPGAs Classification

Implementation Logic Programming

Architecture Implementation Technology

Symmetrical Array LUT-based SRAM

Row based Array MUX-based Flash

Hierarchical PLD PLD-based Anti-fuse

Sea of Gates Gate-based Eprom/EEPROM

FPGA‫ اﶈﺎور اﻷﺳﺎﺳﻴﺔ ﻟﺘﺼﻨﻴﻔﺎت ﺗﻘﻨﻴﺔ اﻟـ‬28-2‫اﻟﺸﻜﻞ‬

.28-2‫[ ﻣﺒﻴﻨﺔ ﻋﻠﻰ اﻟﺸﻜﻞ‬357]‫ وﻓﻘﺎً ﻟﺜﻼث ﳏﺎور رﺋﻴﺴﻴﺔ‬FPGA‫ﻳﺘﻢ ﺗﺼﻨﻴﻒ اﻟﺘﻘﻨﻴﺔ اﳌﺴﺘﺨﺪﻣﺔ ﰲ اﻟﺒﻨﻴﺔ اﻟﻌﺎﻣﺔ ﻟﺸﺮاﺋﺢ اﻟـ‬
.‫ اﻟﺒﻨﻴﺔ اﻟﺘﻨﻈﻴﻤﻴﺔ ﻟﻌﻨﺎﺻﺮ اﻟﺸﺮﳛﺔ‬-1
Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages 116
‫‪2‬‬ ‫اﻟﻔﺼﻞ اﻟﺜﺎﱐ | ‪Chapter 2‬‬

‫‪ -2‬اﻟﻌﻨﺎﺻﺮ اﳌﺴﺘﺨﺪﻣﺔ ﰲ ﺗﻜﻮﻳﻦ اﻟﻮﺣﺪات اﳌﻨﻄﻘﻴﺔ‪.‬‬

‫‪ -3‬ﺗﻘﻨﻴﺔ اﻟﱪﳎﺔ اﳌﺴﺘﺨﺪﻣﺔ‪.‬‬

‫ﲣﺘﻠﻒ اﻟﺘﺼﻨﻴﻔﺎت ﻟﻠﺸﺮاﺋﺢ اﳌﺘﻮﻓﺮة ﰲ اﻟﺴﻮق ﺑﺎﺧﺘﻼف اﻟﺸﺮﻛﺔ اﳌﺼﻨﻌﺔ‪ ،‬ﻓﻜﻞ ﺷﺮﻛﺔ ﻣﺼﻨﻌﺔ ﺗﺘﺒﲎ ﻋﻨﺼﺮاً ﻣﻦ ﻛﻞ واﺣﺪ ﻣﻦ ﻫﺬﻩ‬
‫اﻟﺘﺼﻨﻴﻔﺎت‪ .‬اﳉﺪول‪ 7-2‬ﻳﺒﲔ اﻟﺸﺮﻛﺎت اﻟﺮﺋﻴﺴﺔ واﻟﺒﲎ واﻟﺘﺼﻨﻴﻔﺎت اﳌﺨﺘﻠﻔﺔ ﻟﻠﺸﺮاﺋﺢ اﻟﱵ ﺗﻨﺘﺠﻬﺎ‪.‬‬

‫‪Manufacture‬‬ ‫‪Implementation‬‬ ‫‪Logic‬‬ ‫‪Programming‬‬

‫‪Company‬‬ ‫‪Architecture‬‬ ‫‪Implementation‬‬ ‫‪Technology‬‬

‫‪Xilinx‬‬ ‫‪Symmetrical Array‬‬ ‫‪Look-up Table‬‬ ‫‪Static RAM‬‬

‫‪Actel‬‬ ‫‪Row-based‬‬ ‫‪Multiplexer-Based‬‬ ‫‪Anti-fuse‬‬
‫‪Altera‬‬ ‫‪Hierarchical-PLD‬‬ ‫‪PLD Block‬‬ ‫‪EPROM‬‬
‫‪Plessey‬‬ ‫‪Sea-of-Gates‬‬ ‫‪NAND-gate‬‬ ‫‪Static RAM‬‬
‫‪PLUS‬‬ ‫‪Hierarchical-PLD‬‬ ‫‪PLD Block‬‬ ‫‪EPROM‬‬
‫‪AMD‬‬ ‫‪Hierarchical-PLD‬‬ ‫‪PLD Block‬‬ ‫‪EEPROM‬‬
‫‪QuickLogic‬‬ ‫‪Symmetrical Array‬‬ ‫‪Multiplexer-Based‬‬ ‫‪Anti-fuse‬‬
‫‪Algotronix‬‬ ‫‪Sea-of-gates‬‬ ‫‪Multiplexers, Basic Gate‬‬ ‫‪Static RAM‬‬
‫‪Concurrent‬‬ ‫‪Sea-of-gates‬‬ ‫‪Multiplexers, Basic Gate‬‬ ‫‪Static RAM‬‬
‫‪Crosspoint‬‬ ‫‪Row-based‬‬ ‫‪Transistors Pairs, Multiplexers‬‬ ‫‪Anti-fuse‬‬

‫اﳉﺪول‪ 7-2‬ﺗﺼﻨﻴﻔﺎت ﺷﺮاﺋﺢ اﻟـ‪ FPGA‬اﳌﺘﻮﻓﺮة ﲡﺎرﻳﺎً‬

‫ﺗﻌﺘﱪ اﻟﺒﻨﻴﺔ اﻟﺘﻨﻈﻴﻤﻴﺔ ﻟﻌﻨﺎﺻﺮ اﻟﺸﺮﳛﺔ ﻫﻲ اﳌﻌﻴﺎر اﻷﺳﺎﺳﻲ اﻟﺬي ﳝﻴﺰ اﻟﺸﺮﻛﺎت اﳌﺼﻨﻌﺔ ﻟﺸﺮاﺋﺢ اﻟـ‪ .FPGA‬ﻋﻤﻮﻣﺎً ﻳﻮﺟﺪ أرﺑﻊ ﺑﲎ ﺗﻨﻈﻴﻤﻴﺔ‬
‫أﺳﺎﺳﻴﺔ ﻣﺒﻴﻨﺔ ﻋﻠﻰ اﻟﺸﻜﻞ‪.30-2‬‬

‫اﻟﺸﻜﻞ‪ 29-2‬اﻟﺒﲎ اﻷﺳﺎﺳﻴﺔ اﻷرﺑﻌﺔ اﻟﱵ ﺗﺼﻨﻊ وﻓﻘﻬﺎ ﺷﺮاﺋﺢ اﻟـ‪FPGA‬‬

‫ﲣﺘﻠﻒ ﻫﺬﻩ اﻟﺒﲎ ﻋﻦ ﺑﻌﻀﻬﺎ ﻣﻦ ﺣﻴﺚ ﻃﺮﻳﻘﺔ ﺗﻮزع اﻟﻮﺣﺪات واﻟﻜﺘﻞ اﳌﻨﻄﻘﻴﺔ ﻋﻠﻰ اﻟﺸﺮﳛﺔ اﻟﺴﻴﻠﻴﻜﻮﻧﻴﺔ إﺿﺎﻓﺔً إﱃ ﻃﺮﻳﻘﺔ رﺑﻂ ﻫﺬﻩ اﻟﻜﺘﻞ‬
‫واﻟﻮﺣﺪات‪ .‬ﻓﻌﻠﻰ ﺳﺒﻴﻞ اﳌﺜﺎل ﺗﺘﺒﲎ ﺷﺮﻛﺔ ‪ Xilinx‬وﺷﺮﻛﺔ ‪ Atmel‬اﻟﺒﻨﻴﺔ ‪ Symmetrical Array‬واﻟﱵ ﻓﻴﻬﺎ ﺗﺘﻮزع اﻟﻜﺘﻞ اﳌﻨﻄﻘﻴﺔ ﻋﻠﻰ‬
‫ﺷﻜﻞ ﻣﺼﻔﻮﻓﺔ ﺛﻨﺎﺋﻴﺔ وﺗﻜﻮن اﻟﻮﺻﻼت اﳌﻨﻄﻘﻴﺔ ﺑﲔ اﻟﻜﺘﻞ؛ اﻟﺸﻜﻞ‪ .30-2‬ﰲ ﺣﲔ ﺗﺘﺒﲎ ﺷﺮﻛﺔ ‪ Actel‬اﻟﺒﻨﻴﺔ ﻣﻦ اﻟﻨﻮع ‪Row-based‬‬

‫‪117‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 Field Programmable Gate Arrays | ً‫اﳌﺼﻔﻮﻓﺎت اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎ‬

.31-2‫ وﺗﻜﻮن اﻟﻮﺻﻼت اﳌﻨﻄﻘﻴﺔ ﻣﻮزﻋﺔ ﺑﲔ اﻟﺼﻔﻮف ﺑﺸﻜﻞ أﻓﻘﻲ؛ اﻟﺸﻜﻞ‬،‫واﻟﱵ ﻓﻴﻬﺎ ﺗﺘﻮزع اﻟﻜﺘﻞ اﳌﻨﻄﻘﻴﺔ ﻋﻠﻰ ﺷﻜﻞ ﺻﻔﻮف ﻣﻨﺘﻈﻤﺔ‬
Plessey ‫ وﺷﺮﻛﺔ‬Actel ‫ ﺗﺘﺒﻨﺎﻫﺎ ﺷﺮﻛﺔ‬Sea-of-Gates ‫ اﻟﺒﻨﻴﺔ‬.32-2‫ اﳌﻮﺿﺤﺔ ﻋﻠﻰ اﻟﺸﻜﻞ‬Hierarchical ‫ ﺗﺘﺒﲎ اﻟﺒﻨﻴﺔ‬Altera ‫ﺷﺮﻛﺔ‬

.33-2‫وﻏﲑﻫﺎ؛ اﻟﺸﻜﻞ‬

(a) The Xilinx Virtex II (b) Atmel AT40K FPGAs

Symmetrical Array ‫ اﻟﺒﻨﻴﺔ ﻣﻦ اﻟﻨﻮع‬30-2‫اﻟﺸﻜﻞ‬

Actel ACT3 FPGA - Row-based ‫ اﻟﺒﻨﻴﺔ ﻣﻦ اﻟﻨﻮع‬31-2‫اﻟﺸﻜﻞ‬

Altera Stratix II - Hierarchical-PLD ‫ اﻟﺒﻨﻴﺔ ﻣﻦ اﻟﻨﻮع‬32-2‫اﻟﺸﻜﻞ‬

ProASIC - Sea-of-gates ‫ اﻟﺒﻨﻴﺔ ﻣﻦ اﻟﻨﻮع‬33-2‫اﻟﺸﻜﻞ‬

Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages 118
‫‪2‬‬ ‫اﻟﻔﺼﻞ اﻟﺜﺎﱐ | ‪Chapter 2‬‬

‫‪ 6-3-4-8-2‬اﻟﺒﻨﻴﺔ اﻟﻌﺎﻣﺔ ﻟﺸﺮاﺋﺢ اﻟـ‪:(Generic FPGA Architecture) FPGA‬‬

‫ﺗﺘﺄﻟﻒ اﻟﺒﻨﻴﺔ اﻟﻌﺎﻣﺔ واﻷﺳﺎﺳﻴﺔ ﻟﺸﺮاﺋﺢ اﻟـ‪ FPGA‬ﻣﻦ ﳎﻤﻮﻋﺔ ﻣﻦ اﻟﻜﺘﻞ اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ واﻟﺘﺸﻜﻴﻞ وﺗﺪﻋﻰ ﺑـ‪ PLBs‬أو ‪،CLBs‬‬
‫إﺿﺎﻓﺔً إﱃ ﳎﻤﻮﻋﺔ ﻣﻦ اﻟﻮﺻﻼت اﻟﺪاﺧﻠﻴﺔ وﺗﺪﻋﻰ ﺑـ‪ RMIs‬واﻟﱵ ﺗﺼﻞ ﳎﻤﻮﻋﺔ اﻟﻜﺘﻞ اﳌﻨﻄﻘﻴﺔ‪ .‬إن اﻟﺸﻜﻞ اﻟﻌﺎم ﳍﺬﻩ اﻟﻜﺘﻞ ﻣﻊ ﳎﻤﻮﻋﺔ‬
‫اﻟﻮﺻﻼت ﳝﺜﻞ ﻣﺼﻔﻮﻓﺔ ﻣﱰاﺑﻄﺔ ﲢﻮي ﻋﻠﻰ آﻻف اﻟﻜﺘﻞ اﳌﻨﻄﻘﻴﺔ اﳌﱰاﺑﻄﺔ‪ .‬إﺿﺎﻓﺔً إﱃ ذﻟﻚ ﲤﻠﻚ ﺷﺮاﺋﺢ اﻟـ‪ FPGA‬وﺣﺪات دﺧﻞ وﺧﺮج‬
‫)‪ (IOBs‬اﳌﺴﺆوﻟﺔ ﻋﻦ اﻟﺘﺨﺎﻃﺐ ﻣﻊ اﻹﺷﺎرات اﻟﻔﻴﺰﻳﺎﺋﻴﺔ ﻟﻠﻮﺳﻂ اﳋﺎرﺟﻲ‪ .‬اﻟﺸﻜﻞ‪ 34-2‬ﻳﺒﲔ اﻟﺒﻨﻴﺔ اﻟﺪاﺧﻠﻴﺔ اﻟﻌﺎﻣﺔ ﻟﺸﺮاﺋﺢ اﻟـ‪.FPGA‬‬

‫)‪( b‬‬ ‫)‪(a‬‬

‫)‪( c‬‬
‫اﻟﺸﻜﻞ‪ 34-2‬اﻟﺒﻨﻴﺔ اﻟﺪاﺧﻠﻴﺔ اﻟﻌﺎﻣﺔ ﻟﺸﺮاﺋﺢ اﻟـ‪(c) Actel ،(b) Altera ،(a) Xilinx -FPGA‬‬

‫ﻋﻠﻰ اﻟﺮﻏﻢ ﻣﻦ أن ﺗﻘﻨﻴﺔ اﻟـ‪ FPGA‬ﺗﺸﱰك ﰲ ﻋﻨﺎﺻﺮ اﻟﺒﻨﻴﺔ اﻟﻌﺎﻣﺔ اﳉﻮﻫﺮﻳﺔ اﳌﻮﺿﺤﺔ ﰲ اﻟﺸﻜﻞ‪ ،34-2‬إﻻ أن ﻋﻨﺎﺻﺮ ﺑﻨﻴﺘﻬﺎ اﻟﺪاﺧﻠﻴﺔ‬
‫ﲣﺘﻠﻒ ﺣﺴﺐ اﻟﺸﺮﻛﺔ اﳌﺼﻨﻌﺔ واﻟﺘﻘﻨﻴﺔ اﳌﺴﺘﺨﺪﻣﺔ ﰲ اﻟﺘﺼﻨﻴﻊ‪ ،‬ﻓﻬﻲ ﲤﻠﻚ أﺣﺠﺎم ﻣﺘﻌﺪدة ﳐﺘﻠﻔﺔ ﰲ ﺧﺼﺎﺋﺼﻬﺎ اﻟﺒﻨﻴﻮﻳﺔ واﻟﻮﻇﻴﻔﻴﺔ‪.‬‬
‫اﻟﺸﻜﻞ‪ 35-2‬ﻳﺒﲔ اﻟﺒﻨﻴﺔ اﻟﺸﺎﻣﻠﺔ ﻟﺸﺮاﺋﺢ اﻟـ‪ FPGA‬وﻋﻨﺎﺻﺮﻫﺎ اﻷﺳﺎﺳﻴﺔ واﳌﺘﻘﺪﻣﺔ وﻫﻲ‪:‬‬

‫‪ :(Configurable Logic Blocks) CLBs -1‬اﻟﻜﺘﻞ اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ‪.‬‬

‫‪ :(Input / Output Blocks) IOBs -2‬وﺣﺪات اﻟﺪﺧﻞ واﳋﺮج‪.‬‬
‫‪ :(Digital clock management) DCM -3‬وﺣﺪة إدارة ﺗﺮدد ﻋﻤﻞ اﻟﺸﺮﳛﺔ‪.‬‬
‫‪ :(Embedded RAM Memory) ERM -4‬ذاﻛﺮة ‪ RAM‬ﻣﺪﳎﺔ‪.‬‬
‫‪ :(Routing Matrix Interconnects) RMIs -5‬اﻟﻮﺻﻼت اﻟﺪاﺧﻠﻴﺔ ﻟﻠﻜﺘﻞ اﳌﻨﻄﻘﻴﺔ‪.‬‬
‫‪ :(Embedded Multipliers, Adders) EMAs -6‬ﺟﻮاﻣﻊ وﺿﻮارب ﻣﺪﳎﺔ‪.‬‬
‫‪ :(Embedded Processor Cores) EPCs -7‬ﻧﻮى ﻣﻌﺎﳉﺎت ﻣﺪﳎﺔ‪.‬‬
‫‪ :(Gigabit Transceivers) GbTs -8‬وﺣﺪة ﺗﺮاﺳﻞ ﺑﻴﺎﻧﺎت ﻋﺎﻟﻴﺔ اﻟﺴﺮﻋﺔ‪.‬‬

‫‪119‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫اﳌﺼﻔﻮﻓﺎت اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً | ‪Field Programmable Gate Arrays‬‬

‫‪ :(Intellectual Property) IPs -9‬وﺣﺪات ﺑﺮﳎﻴﺔ وﻇﻴﻔﻴﺔ ﺟﺎﻫﺰة‪.‬‬

‫‪ :(Digital Signal Processing Blocks) DSPBs -10‬وﺣﺪات ﳐﺼﺼﺔ ﻟﺘﻄﺒﻴﻘﺎت ﻣﻌﺎﳉﺔ اﻹﺷﺎرة اﻟﺮﻗﻤﻴﺔ‪.‬‬

‫اﻟﺸﻜﻞ‪ 35-2‬اﻟﺒﻨﻴﺔ اﻟﻌﺎﻣﺔ ﻟﺸﺮﳛﺔ ‪FPGA‬‬

‫اﻟﻜﺘﻞ اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ”‪:(Configurable Logic Blocks) “CLBs‬‬ ‫‪1-6-3-4-8-2‬‬

‫ﺗﻌﺘﱪ اﻟـ‪ CLB‬اﻟﻮﺣﺪة اﳌﻨﻄﻘﻴﺔ اﻷﺳﺎﺳﻴﺔ ﰲ ﺑﻨﻴﺔ اﻟـ‪ ،FPGA‬ﻛﻤﺎ أن ﻋﺪد وﻣﻴﺰات ﻫﺬﻩ اﻟﻮﺣﺪة ﲣﺘﻠﻒ ﻣﻦ ﺷﺮﳛﺔ إﱃ أﺧﺮى‪ .‬ﺑﻌﺾ‬
‫اﻟﺸﺮﻛﺎت )‪ (Altera‬ﺗﺴﺘﺨﺪم اﻟﺘﺴﻤﻴﺔ ‪ (Logic Array Block) LAB‬ﺑﺪﻻً ﻣﻦ ‪ .CLB‬ﻋﻤﻮﻣﺎً ﺳﻮف ﻧﺮﻛﺰ ﰲ ﲝﺜﻨﺎ ﻋﻠﻰ ﺷﺮاﺋﺢ ﺷﺮﻛﺔ‬
‫‪ Xilinx‬ﻷ�ﺎ اﻷﻛﺜﺮ اﻧﺘﺸﺎراً‪ ،‬وﺳﻮف ﻧﺘﻄﺮق إﱃ اﻟﺒﲎ اﻷﺧﺮى إن ﻟﺰم ذﻟﻚ ﰲ ﻣﻜﺎﻧﻪ‪.‬‬

‫ﺗﺘﺄﻟﻒ اﻟـ‪ CLB‬ﻣﻦ ‪ switch matrix‬ﺗﺘﺼﻞ ﻣﻊ ”‪ ،“4-Slice‬وﻛﻞ ‪ Slice‬ﻣﻦ ﻫﺬﻩ اﻷرﺑﻊ ﳛﻮي ﻋﻠﻰ ”‪Look-up ) “2-LUT‬‬

‫‪ .(Table‬اﻟـ‪ LUTs‬ﳝﻜﻦ أن ﺗﺴﺘﺨﺪم ﻟﺘﺸﻜﻴﻞ ذاﻛﺮة ‪ RAM‬ﺑﻌﺮض ‪ ،(RAM16) 16×1‬أو ﻣﺴﺠﻞ إزاﺣﺔ ﺑﻌﺮض ‪16-bit‬‬

‫)‪ (SRL16‬واﻟﺬي ﳝﻜﻦ أن ﻳﻌﻤﻞ اﳌﺴﺠﻞ ﻛﻘﻼب أو ﻣﺎﺳﻚ‪ ،‬ﻛﻤﺎ ﳛﻮي اﻟـ‪ CLB‬ﻋﻠﻰ دارات ﻣﻨﻄﻘﻴﺔ أﺧﺮى ) ‪Multiplexer, Cary‬‬

‫‪ .(Logic‬اﻟﺸﻜﻞ‪ 36-2‬ﻳﺒﲔ ﺑﻨﻴﺔ اﻟـ‪ CLB‬ﻟﺸﺮاﺋﺢ ‪.[358]Xilinx‬‬

‫‪Xilinx Spartan-3‬‬ ‫اﻟﺸﻜﻞ‪ 36-2‬ﺑﻨﻴﺔ اﻟﻜﺘﻠﺔ اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﻟﺸﺮاﺋﺢ‬

‫ﻳﺘﻢ ﺗﻮﺿﻊ اﻟﻜﺘﻞ اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ )‪ (CLBs‬داﺧﻞ ﺷﺮﳛﺔ اﻟـ‪ FPGA‬ﻋﻠﻰ ﺷﻜﻞ ﻣﺼﻔﻮﻓﺔ ﺗﺘﺄﻟﻒ ﻣﻦ أﺳﻄﺮ وأﻋﻤﺪة ﻛﻤﺎ ﻫﻮ ﻣﻮﺿﺢ‬
‫ﻋﻠﻰ اﻟﺸﻜﻞ‪ ،37-2‬ﺣﻴﺚ أن ﻋﺪد ﻫﺬﻩ اﻟﻜﺘﻞ ﳜﺘﻠﻒ ﻣﻦ ﺷﺮﳛﺔ إﱃ أﺧﺮى‪ .‬اﻟﺸﻜﻞ‪ 38-2‬ﻳﺒﲔ ﻋﺪد اﻟـ‪ CLBs‬واﳌﺼﺎدر اﳌﺘﻮﻓﺮة ﻋﻠﻰ‬
‫ﺷﺮاﺋﺢ اﻟـ‪ FPGA‬ﻟﻠﻌﺎﺋﻠﺔ ‪.Xilinx Spartan-3E‬‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪120‬‬
‫‪2‬‬ ‫اﻟﻔﺼﻞ اﻟﺜﺎﱐ | ‪Chapter 2‬‬

‫اﻟﺸﻜﻞ‪ 37-2‬ﻃﺮﻳﻘﺔ ﺗﻮﺿﻊ ﻛﺘﻞ اﻟـ‪ CLBs‬داﺧﻞ ﺷﺮﳛﺔ اﻟـ‪FPGA‬‬

‫اﻟﺸﻜﻞ‪ 38-2‬اﻟﻜﺘﻞ اﳌﻨﻄﻘﻴﺔ وﻋﻨﺎﺻﺮﻫﺎ اﳌﺘﻮﻓﺮة ﻋﻠﻰ ﺷﺮاﺋﺢ اﻟـ‪ FPGA‬ﻟﻠﻌﺎﺋﻠﺔ ‪Xilinx Spartan-3E‬‬

‫إن ﻛﻞ ‪ CLB‬ﲢﻮي ﻋﻠﻰ أرﺑﻊ ‪ Slices‬ﻣﱰاﺑﻄﺔ داﺧﻠﻴﺎً ﻓﻴﻤﺎ ﺑﻴﻨﻬﺎ وﻣﻮزﻋﺔ ﻋﻠﻰ ﺷﻜﻞ أزواج‪ ،‬ﲝﻴﺚ أن ﻛﻞ زوج ﰎ ﺗﻨﻈﻴﻤﻪ ﻛﻌﻤﻮد ﻣﻊ وﺣﺪة‬
‫ﻣﻨﻄﻘﻴﺔ ﻣﺴﺘﻘﻠﺔ ﻟﻠـ‪.Cary‬‬

‫ﻛﻤﺎ ﻫﻮ ﻣﻮﺿﺢ ﻋﻠﻰ اﻟﺸﻜﻞ‪ 36-2‬ﻓﺈن اﻟﺰوج اﻷﻳﺴﺮ ﻳﺴﻤﻰ ﺑـ‪ SLICEM‬وﻫﻮ ﻳﺪﻋﻢ اﻟﻮﻇﺎﺋﻒ اﳌﻨﻄﻘﻴﺔ )‪ (Logic‬واﻟﺘﺨﺰﻳﻨﻴﺔ‬
‫)‪(RAM16, SRL16‬؛ ﻛﻤﺎ أن اﻟﺰوج اﻷﳝﲔ ﻳﺴﻤﻰ ﺑـ‪ SLICEL‬وﻫﻮ ﻳﺪﻋﻢ ﻓﻘﻂ اﻟﻮﻇﺎﺋﻒ اﳌﻨﻄﻘﻴﺔ‪ ،‬ذﻟﻚ ﻬﺑﺪف ﲣﻔﻴﺾ ﺣﺠﻢ‬
‫وﻛﻠﻔﺔ اﻟﻜﺘﻠﺔ ‪ .CLB‬اﻟﺸﻜﻞ‪ 39-2‬ﻳﺒﲔ ﲤﺜﻴﻼً ﻟﻠﻤﺼﺎر اﳌﻮﺟﻮدة ﻋﻠﻰ ﻛﻼ اﻟـ‪.SLICEs‬‬

‫اﻟﺸﻜﻞ‪ 39-2‬اﳌﺼﺎدر اﳌﻮﺟﻮدة ﻋﻠﻰ ٍ‬

‫ﻛﻞ ﻣﻦ اﻟـ‪ SLICEL‬واﻟـ‪SLICEM‬‬

‫اﻟﺸﻜﻞ‪ 40-2‬ﻳﺒﲔ اﻟﺒﻨﻴﺔ اﻟﺪاﺧﻠﻴﺔ ﻟﻠـ‪ ،SLICEM‬ﺣﻴﺚ أن اﳋﻂ اﻷزرق اﳌﻨﻘﻂ ﳝﺜﻞ اﻟﻮﻇﺎﺋﻒ ‪ RAM16, SRL16‬ﺑﻴﻨﻤﺎ اﳋﻂ اﻷﺳﻮد‬
‫ﳝﺜﻞ اﻟﻮﻇﺎﺋﻒ اﳌﻨﻄﻘﻴﺔ ﻓﻘﻂ واﻟﺬي ﳝﺜﻞ اﻟـ‪.SLICEL‬‬

‫‪121‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫اﳌﺼﻔﻮﻓﺎت اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً | ‪Field Programmable Gate Arrays‬‬

‫اﻟﺸﻜﻞ‪ 40-2‬اﻟﺒﻨﻴﺔ اﻟﺪاﺧﻠﻴﺔ ﻟﻠـ‪SLICEM‬‬

‫وﺣﺪات اﻟﺪﺧﻞ واﳋﺮج ”‪:(Input/Output Blocks) “IOBs‬‬ ‫‪2-6-3-4-8-2‬‬

‫ﺗﺰود وﺣﺪات اﻟـ‪ IOBs‬واﺟﻬﺔ اﺗﺼﺎل )أﺣﺎدﻳﺔ أو ﺛﻨﺎﺋﻴﺔ اﻻﲡﺎﻩ( ﺑﲔ اﻷﻗﻄﺎب اﻟﻔﻴﺰﻳﺎﺋﻴﺔ ﻟﻠﺸﺮﳛﺔ واﻟﺪارات اﳌﻨﻄﻘﻴﺔ اﻟﺪاﺧﻠﻴﺔ‪ .‬اﻟﺸﻜﻞ‪41-2‬‬

‫ﻳﺒﲔ اﻟﺒﻨﻴﺔ اﻟﺪاﺧﻠﻴﺔ ﻟﻠﻜﺘﻞ اﳌﻨﻄﻘﻴﺔ اﻟـ‪ ،IOBs‬ﺣﻴﺚ ﻳﻮﺟﺪ ﺛﻼث ﻣﺴﺎرات رﺋﻴﺴﻴﺔ ﻟﻺﺷﺎرات‪ :‬ﻣﺴﺎر اﻟﺪﺧﻞ )‪ ،(Input path‬ﻣﺴﺎر اﳋﺮج‬
‫)‪ ،(Output path‬ﻣﺴﺎر ﺣﺎﻟﺔ اﳌﻤﺎﻧﻌﺔ اﻟﻌﺎﻟﻴﺔ )‪.(3-State path‬‬

‫إن اﻷﻗﻄﺎب ﰲ وﺣﺪات اﻟﺪﺧﻞ واﳋﺮج إﺿﺎﻓﺔ إﱃ ﻛﻮ�ﺎ أﻗﻄﺎب ذات �ﺎﻳﺔ ﺣﺮة )‪ ،(Single-Ended IOs‬ﻓﺈ�ﺎ ﳝﻜﻦ أن ﺗﻌﻤﻞ ﻛﺄﻗﻄﺎب‬
‫دﺧﻞ‪/‬ﺧﺮج ﺗﻔﺎﺿﻠﻴﺔ )‪ ،Differential IOs‬وﻫﻲ ﻋﺒﺎرة ﻋﻦ زوج ﻣﻦ اﻷﻗﻄﺎب ﺗﻜﻮن اﻹﺷﺎرة ﻋﻠﻰ أﺣﺪﻫﺎ ﻋﻜﺲ اﻵﺧﺮ وذﻟﻚ ﻬﺑﺪف‬
‫إﻟﻐﺎء اﻟﻀﺠﻴﺞ‪.‬‬

‫إن أﻗﻄﺎب ﺷﺮاﺋﺢ اﻟـ‪ FPGA‬ﺗﺘﺒﻊ أﻧﻈﻤﺔ ﺟﻬﻮد ﻗﻴﺎﺳﻴﺔ – ٍ‬

‫ﻟﻜﻞ ﻣﻦ اﻷﻗﻄﺎب ﺑﻨﻬﺎﻳﺔ وﺣﻴﺪة ”‪LVTTL, ) “Single-Ended IOs‬‬

‫‪ (LVCMOS, PCI-X, GTL, GTLP‬أو اﻷﻗﻄﺎب اﻟﺘﻔﺎﺿﻠﻴﺔ ”‪LVDS, BLVDS, ) “Differential signaling‬‬

‫‪ – (ULVDS, LDT, LVPECL‬ﺗﺘﻌﻠﻖ ﲟﺴﺘﻮﻳﺎت اﳉﻬﻮد واﳌﻼﺋﻤﺔ ﻣﻊ اﻹﺷﺎرات‪ ،‬ﺣﻴﺚ ﳝﻜﻦ ﻟﺸﺮﳛﺔ واﺣﺪة أن ﺗﺪﻋﻢ ﳎﺎل واﺳﻊ‬
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‫‪2‬‬ ‫اﻟﻔﺼﻞ اﻟﺜﺎﱐ | ‪Chapter 2‬‬

‫ﻣﻦ اﳉﻬﻮد ‪ .1.2V, 1.5V, 1.8V, 2.5V, 3.3V‬إﺿﺎﻓﺔ إﱃ ذﻟﻚ ﻓﺈن ﻫﺬﻩ اﻷﻗﻄﺎب ﲤﻠﻚ ﻣﻘﺎوﻣﺎت داﺧﻠﻴﺔ ﻗﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ – ﳝﻜﻦ‬
‫ﺗﻌﻴﻴﻨﻬﺎ ﺑﺮﳎﻴﺎً ﻛﻤﻘﺎوﻣﺎت رﻓﻊ )‪ ،(pull-up‬أو ﻣﻘﺎوﻣﺎت ﺳﺤﺐ )‪ ،(pull-down‬أو ﻣﻘﺎوﻣﺎت ﻃﺮﻓﻴﺔ ﰲ ﺣﺎل اﻷزواج اﻟﺘﻔﺎﺿﻠﻴﺔ‪.‬‬

‫اﻟﺸﻜﻞ‪ 41-2‬اﻟﺒﻨﻴﺔ اﻟﺪاﺧﻠﻴﺔ ﻟﻠﻮﺣﺪة ‪IOBs‬‬

‫إن اﻟﻜﺘﻞ اﳌﻨﻄﻘﻴﺔ ﻟﺒﻮاﺑﺎت اﻟﺪﺧﻞ واﳋﺮج )‪ (IOBs‬ﻳﺘﻢ ﺗﻨﻈﻴﻤﻬﺎ وﻓﻖ ﻣﺎ ﻳﺴﻤﻰ ﺑـ‪ – Banks‬اﳌﻌﲎ ﳑﺎﺛﻞ ﳌﺎ ﻫﻮ ﻋﻠﻴﻪ ﰲ اﳌﺘﺤﻜﻤﺎت‬
‫واﳌﻌﺎﳉﺎت اﳌﺼﻐﺮة واﳌﻘﺼﻮد ﻫﻮ اﻟﺒﻮاﺑﺎت ﻋﻠﻰ أﻃﺮاف اﻟﺸﺮﳛﺔ – وﳜﺘﻠﻒ ﻋﺪد ﻫﺬﻩ اﻟـ‪ Banks‬ﻣﻦ ﺷﺮﳛﺔ إﱃ أﺧﺮى‪ ،‬وﳝﻜﻦ أن ﻳﺼﻞ ﻋﺪد‬
‫اﻷﻗﻄﺎب ﰲ ﻛﻞ ‪ Bank‬إﱃ ‪ ،IOs-40‬ﻛﻤﺎ أن اﻷﻗﻄﺎب ﺿﻤﻦ اﻟـ‪ Bank‬ﳝﻜﻦ أن ﻳﺘﻢ ﺗﻌﻴﻴﻨﻬﺎ ﺑﺸﻜﻞ ﻣﺴﺘﻘﻞ ﻟﺘﺪﻋﻢ ﻧﻈﺎم ﺟﻬﻮد‬
‫ﻗﻴﺎﺳﻲ ﻣﻌﲔ واﻟﺬي ﺑﺪورﻩ ﻳﺴﻤﺢ ﻋﻤﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﺷﺮاﺋﺢ اﻟـ‪ FPGA‬ﰲ إﻧﺸﺎء اﺗﺼﺎل ﺑﲔ ﻋﺪة أﺟﻬﺰة ذات أﻧﻈﻤﺔ ﺟﻬﻮد ﻗﻴﺎﺳﻴﺔ ﳐﺘﻠﻔﺔ‪.‬‬
‫اﻟﺸﻜﻞ‪ 42-2‬ﻳﺒﲔ ﲤﺜﻴﻼً ﻟﻠـ‪ Banks‬ﻋﻠﻰ أﻃﺮاف ﺷﺮﳛﺔ ‪ FPGA‬ﺣﻴﺚ ﲢﻮي اﻟﺸﺮﳛﺔ ﻋﻠﻰ ‪.Bank0~Bank7‬‬

‫‪FPGA‬‬ ‫اﻟﺸﻜﻞ‪ 42-2‬ﺗﻮﺿﻊ وﺣﺪات اﻟـ‪ Banks‬ﻋﻠﻰ أﻃﺮاف ﺷﺮﳛﺔ‬

‫‪123‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫اﳌﺼﻔﻮﻓﺎت اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً | ‪Field Programmable Gate Arrays‬‬

‫ذاﻛﺮة ‪ RAM‬ﻣﺪﳎﺔ ”‪:(Embedded RAM Memory) “ERM‬‬ ‫‪3-6-3-4-8-2‬‬

‫إن ﻣﻌﻈﻢ اﻟﺘﻄﺒﻴﻘﺎت ﲢﺘﺎج ﺑﺸﻜﻞ أﺳﺎﺳﻲ إﱃ اﺳﺘﺨﺪام اﻟﺬواﻛﺮ‪ ،‬ﻟﺬﻟﻚ ﻳﺘﻢ ﺗﺰوﻳﺪ ﺷﺮاﺋﺢ اﻟـ‪ FPGA‬ﺑﻮﺣﺪات )ﻛﺘﻞ( ﻣﻨﻄﻘﻴﺔ ﻟﺬاﻛﺮة‬
‫ﻣﺪﳎﺔ ﻣﻦ اﻟﻨﻮع ‪ RAM‬ﺗﺴﻤﻰ‪ .ERAM :‬ﺗﺘﻀﻤﻦ ﺷﺮﳛﺔ اﻟـ‪ FPGA‬ﻣﻦ ﺑﻀﻊ وﺣﺪات ‪ BRAM‬ﻣﺪﳎﺔ إﱃ آﻻف اﻟﻮﺣﺪات وذﻟﻚ‬
‫ﺣﺴﺐ اﻟﺸﺮﳛﺔ اﳌﺴﺘﺨﺪﻣﺔ‪ ،‬وﺗﺘﻮﺿﻊ وﺣﺪات اﻟﺬاﻛﺮة ‪ RAM‬ﺿﻤﻦ اﻟﺸﺮﳛﺔ إﻣﺎ ﻋﻠﻰ أﻃﺮاف اﻟﺸﺮﳛﺔ اﻟﺪاﺧﻠﻴﺔ‪ ،‬أو ﺗﻨﻈﻢ ﰲ أﻋﻤﺪة ﺑﲔ‬
‫اﻟﻜﺘﻞ اﳌﻨﻄﻘﻴﺔ ﻛﻤﺎ ﻫﻮ ﻣﻮﺿﺢ ﰲ اﻟﺸﻜﻞ‪ 43-2‬واﻟﺸﻜﻞ‪.44-2‬‬

‫اﻟﺸﻜﻞ‪ 43-2‬ﺗﻮﺿﻊ ﻋﻠﻰ ﺷﻜﻞ أﻋﻤﺪة ﻟﻜﺘﻞ اﻟﺬاﻛﺮة ‪ RAM‬اﳌﺪﳎﺔ ﻋﻠﻰ ﺷﺮﳛﺔ اﻟـ‪FPGA‬‬

‫اﻟﺸﻜﻞ‪ 44-2‬ﺗﻮﺿﻊ ﻛﺘﻞ اﻟﺬاﻛﺮة ‪ RAM‬اﳌﺪﳎﺔ ﻋﻠﻰ ﺷﺮاﺋﺢ ‪.Xilinx‬‬

‫إن ﻛﺘﻞ اﻟﺬاﻛﺮة ‪ BRAM‬ﻳﺘﻢ ﺗﻨﻈﻴﻤﻬﺎ داﺧﻞ ﺷﺮﳛﺔ اﻟـ‪ FPGA‬إﻣﺎ ﻛﻜﺘﻞ ﺑﺴﻌﺔ ‪ 18KB‬أو ‪ 36KB‬أو ‪ ،72KB‬ﺣﻴﺚ ﳝﻜﻦ أن‬
‫ﺗﺴﺘﺨﺪم ﻫﺬﻩ اﻟﻜﺘﻞ ٍ‬
‫ﻛﻞ ﻋﻠﻰ ﺣﺪى ﺑﺸﻜﻞ ﻣﺴﺘﻘﻞ‪ ،‬أو ﳝﻜﻦ دﳎﻬﺎ ﻟﺘﺸﻜﻴﻞ ﻛﺘﻠﺔ ذاﻛﺮﻳﺔ ﻛﺒﲑة ﺗﺴﺘﺨﺪم ﻟﻠﻌﺪﻳﺪ ﻣﻦ اﻷﻏﺮاض ﻣﺜﻞ‬
‫اﻟـ‪ (First In First Out) FIFO‬وﻏﲑﻫﺎ ﻣﻦ وﻇﺎﺋﻒ اﻟﺘﺨﺰﻳﻦ واﻟﺘﻜﺪﻳﺲ‪ .‬اﻟﺸﻜﻞ‪ 45-2‬ﻳﺒﲔ ﳐﻄﻂ اﻟﻜﺘﻠﺔ اﳌﻨﻄﻘﻴﺔ ‪BRAM-18KB‬‬

‫واﻟﻜﺘﻠﺔ اﳌﻨﻄﻘﻴﺔ ‪.BRAM-36KB‬‬

‫اﻟﺸﻜﻞ‪ 45-2‬اﻟﻜﺘﻠﺔ اﳌﻨﻄﻘﻴﺔ ‪ BRAM-18KB‬واﻟﻜﺘﻠﺔ اﳌﻨﻄﻘﻴﺔ ‪BRAM-36KB‬‬

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‫‪2‬‬ ‫اﻟﻔﺼﻞ اﻟﺜﺎﱐ | ‪Chapter 2‬‬

‫وﺣﺪة إدارة ﺗﺮدد ﻋﻤﻞ اﻟﺸﺮﳛﺔ ”‪:(Digital Clock Management) “DCM‬‬ ‫‪4-6-3-4-8-2‬‬

‫ﻳﺘﻢ ﻗﻴﺎدة اﻟﻮﺣﺪات اﳌﻨﻄﻘﻴﺔ اﳌﺘﺰاﻣﻨﺔ داﺧﻞ ﺷﺮﳛﺔ اﻟـ‪ FPGA‬ﺑﻮاﺳﻄﺔ ﻧﺒﻀﺎت ﺳﺎﻋﺔ ﻣﺮﺟﻌﻴﺔ ﻳﺘﻢ ﺗﻮﻟﻴﺪﻫﺎ ﺑﺎﺳﺘﺨﺪام ﻫﺰاز ﻛﺮﻳﺴﺘﺎﱄ ﺧﺎرﺟﻲ‬
‫ﻣﻮﺻﻮل ﻣﻊ ﺷﺮﳛﺔ اﻟـ‪ FPGA‬ﻣﻦ ﺧﻼل ﻗﻄﺐ ﺧﺎص‪.‬‬

‫ﻟﻨﻌﺘﱪ ﲤﺜﻴﻼً ﺑﺴﻴﻄﺎً ﻟﻔﺮوع إﺷﺎرة اﳍﺰاز اﻟﻜﺮﻳﺴﺘﺎﱄ )‪ (Clock‬واﳌﺴﺠﻼت اﳌﺘﺼﻠﺔ ﻣﻌﻪ ﻛﻤﺎ ﻫﻮ ﻣﺒﲔ ﻋﻠﻰ اﻟﺸﻜﻞ‪46-2‬؛ ﻧﻼﺣﻆ أن إﺷﺎرة‬
‫اﻟـ‪ Clock‬اﻟﺮﺋﻴﺴﻴﺔ ﺗﺘﻔﺮع وﺗﺘﻮزع داﺧﻞ اﻟﺸﺮﳛﺔ ﻟﺘﺼﻞ إﱃ ﻛﺎﻓﺔ اﻟﻮﺣﺪات اﳌﻨﻄﻘﻴﺔ اﳌﺘﺰاﻣﻨﺔ واﻟﱵ ﺗﺘﺸﻜﻞ أﺻﻼً ﻣﻦ اﻟﻘﺎﺑﻼت؛ إن اﻟﻐﺎﻳﺔ ﻣﻦ‬
‫ﻫﺬﻩ اﻟﻌﻤﻠﻴﺔ ﻫﻲ أن ﺗﺮى ﻛﻞ اﻟﻘﺎﺑﻼت إﺷﺎرة اﻟـ‪ Clock‬اﳋﺻﺔ ﻬﺑﺎ ﻣﺘﻄﺎﺑﻘﺔ إﱃ أﻛﱪ ﺣﺪ ﳑﻜﻦ‪ .‬وﺑﺎﻟﺘﺎﱄ إذا ﰎ ﺗﻮزﻳﻊ إﺷﺎرة اﻟـ‪Clock‬‬

‫ﻛﺈﺷﺎرة ذات ﻣﺴﺎر ﻃﻮﻳﻞ ﺗﻘﻮد ﲨﻴﻊ اﻟﻮﺣﺪات اﳌﻨﻄﻘﻴﺔ اﳌﺘﺰاﻣﻨﺔ‪ ،‬ﻓﺈن اﻟﻮﺣﺪات اﳌﻨﻄﻘﻴﺔ اﻟﻘﺮﻳﺒﺔ ﻣﻦ اﻟﻘﻄﺐ اﳋﺎص ﺑﺈﺷﺎرة اﻟـ‪ Clock‬ﺳﻮف‬
‫ﺗﻘﺪح ﺑﺈﺷﺎرة اﻟـ‪ Clock‬ﺑﺸﻜﻞ ﺳﺎﺑﻖ ﻟﻠﻮﺣﺪات اﳌﻨﻄﻘﻴﺔ اﻷﺧﺮى اﳌﻮﺟﻮد ﰲ �ﺎﻳﺔ ﺧﻂ إﺷﺎرة اﻟـ‪ ،Clock‬ﳑﺎ ﻳﺴﺒﺐ اﻟﻌﺪﻳﺪ ﻣﻦ اﳌﺸﺎﻛﻞ‬
‫وﻣﻨﻬﺎ ﻓﻘﺪان اﻟﺘﻮاﻗﺖ‪.‬‬

‫اﻟﺸﻜﻞ‪ 46-2‬ﻓﺮوع ﺗﺮدد ﻋﻤﻞ اﻟﺸﺮﳛﺔ‬

‫ﳊﻞ ﻫﺬﻩ اﳌﺸﻜﻠﺔ‪ ،‬ﻳﺘﻢ ﺗﻮزﻳﻊ إﺷﺎرة اﻟـ‪ Clock‬ﺑﻮاﺳﻄﺔ ﻗﻄﺎﻋﺎت ﺧﺎﺻﺔ وﻣﺴﺘﻘﻠﺔ ﻋﻦ ﻧﻘﺎط اﻻﺗﺼﺎل اﻟﺪاﺧﻠﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ وذات اﻷﻏﺮاض‬
‫اﻟﻌﺎﻣﺔ‪ ،‬ﻛﻤﺎ ﻳﺘﻢ ﺗﻨﻈﻴﻢ ﻋﻤﻞ اﻟﺴﺎﻋﺔ ﺑﺎﺳﺘﺨﺪام ﻗﻄﺐ إﺷﺎرة اﻟـ‪ Clock‬ﻟﻴﻘﻮد ﻣﻨﻈﻢ ﻋﻤﻞ اﻟﺴﺎﻋﺔ )‪ (Clock Manager‬ﺑﺪﻻً ﻣﻦ وﺻﻠﻪ‬
‫ﻣﺒﺎﺷﺮة إﱃ ﻓﺮوع إﺷﺎرة اﻟـ‪ Clock‬اﻟﺪاﺧﻠﻴﺔ‪ ،‬وﻫﺬا ﻳﺆدي إﱃ ﺗﻮﻟﻴﺪ ﻋﺪد ﻣﻦ اﻟﻨﺒﻀﺎت اﳌﺨﺘﻠﻔﺔ ﺗﺴﻤﻰ اﻟﻨﺒﻀﺎت اﻟﻔﺮﻋﻴﺔ واﻟﱵ ﻣﻦ اﳌﻤﻜﻦ أن‬
‫ﺗﺴﺘﺨﺪم ﻟﻘﻴﺎدة ﳎﻤﻮﻋﺔ ﻓﺮوع إﺷﺎرة ﺗﻮﻗﻴﺖ داﺧﻠﻴﺔ أو ﻟﺘﻘﻮد ﻗﻄﺐ إﺷﺎرة ﺗﻮﻗﻴﺖ ﺧﺎرﺟﻲ ﻣﺴﺘﺨﺪم ﻟﺘﻐﺬﻳﺔ ﺟﻬﺎز آﺧﺮ ‪ -‬اﻟﺸﻜﻞ‪.47-2‬‬

‫اﻟﺸﻜﻞ‪ 47-2‬ﻣﻨﻈﻢ ﻋﻤﻞ ﻧﺒﻀﺎت اﻟﺴﺎﻋﺔ ﻳﻮﻟﺪ اﻟﻌﺪﻳﺪ ﻣﻦ اﻟﱰددات اﻟﺘﻔﺮﻋﻴﺔ‬

‫ﺗﺘﻮﺿﻊ وﺣﺪة اﻟـ‪ DCM‬ﻏﺎﻟﺒﺎً ﻋﻠﻰ اﳊﻮاف اﻟﻌﻠﻴﺎ واﻟﺴﻔﻠﻰ ﻟﻠﺸﺮﳛﺔ اﻟﺴﻴﻠﻴﻜﻮﻧﻴﺔ‪ ،‬وﺗﺘﺄﻟﻒ ﻣﻦ أرﺑﻊ وﺣﺪات وﻇﻴﻔﻴﺔ ﻣﺘﻜﺎﻣﻠﺔ ﻣﺒﻴﻨﺔ ﻋﻠﻰ‬
‫اﳌﺨﻄﻂ اﻟﻮﻇﻴﻔﻲ ﰲ اﻟﺸﻜﻞ‪ 48-2‬وﻫﻲ‪:‬‬

‫‪125‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫اﳌﺼﻔﻮﻓﺎت اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً | ‪Field Programmable Gate Arrays‬‬

‫‪ :(Delay-Locked Loop) DLL -‬ﺗﻘﻮم ﻋﻠﻰ ﺗﻘﻠﻴﻞ اﻹﺷﺎرات اﻟﻌﺸﻮاﺋﻴﺔ واﻟﺘﺸﻮﻩ ﻟﻨﺒﻀﺎت اﻟﺴﺎﻋﺔ‪.‬‬
‫‪ :(Digital Frequency Synthesizer) DFS -‬ﺗﺴﺘﺨﺪم ﻟﺘﻮﻟﻴﺪ ﺗﺮدد إﺷﺎرة اﻟﺴﺎﻋﺔ اﻟﺪاﺧﻠﻴﺔ اﻟﱵ ﻫﻲ اﳉﺪاء ﺑﲔ إﺷﺎرة‬
‫اﻟﺴﺎﻋﺔ ﻋﻠﻰ اﳌﺪﺧﻞ ‪ CLKIN‬وﻣﻌﺎﻣﻞ اﳉﺪاء اﶈﺪد ﻣﻦ ﻗﺒﻞ اﳌﺴﺘﺨﺪم‪.‬‬
‫‪ :(Status Logic) SL -‬ﺗﺴﺘﺨﺪم ﻟﺘﺼﻔﲑ وﺣﺪة اﻟـ‪ DCM‬واﻹﺷﺎرة إﱃ اﳊﺎﻟﺔ اﳊﺎﻟﻴﺔ ﻟﻠﻮﺣﺪة اﳌﻨﻄﻘﻴﺔ‪.‬‬
‫‪ :(Phase Shifter) PS -‬ﺗﺴﺘﺨﺪم ﻹزاﺣﺔ إﺷﺎرة وﻓﻘﺎً ﳌﻌﺎﻣﻼت إزاﺣﺔ ﳏﺪدة ﻣﻦ ﻗﺒﻞ اﳌﺴﺘﺨﺪم وﻫﻲ‪CLK0, CLK90, :‬‬

‫‪.CLK180, CLK270, CLK2X, CLK2X180, CLKFX, CLKFX180‬‬

‫اﻟﺸﻜﻞ‪ 48-2‬اﻟﺒﻨﻴﺔ اﻟﻮﻇﻴﻔﻴﺔ ﻟﻠﻮﺣﺪة ‪DCM‬‬

‫ﲤﺘﻠﻚ ﺷﺮاﺋﺢ اﻟـ‪ FPGA‬ﻋﺪد ﻣﻦ اﻟﻮﺣﺪات اﳌﻨﻄﻘﻴﺔ ‪ DCM‬ﻳﱰاوح ﻣﻦ وﺣﺪﺗﲔ إﱃ ﻋﺪة أزواج ﻣﻦ اﻟﻮﺣﺪات وذﻟﻚ ﺣﺴﺐ اﻟﺸﺮﳛﺔ‪.‬‬
‫اﻟﺸﻜﻞ‪ 49-2‬ﻳﺒﲔ اﳌﺨﻄﻂ اﻟﻜﺎﻣﻞ ﻟﺘﻮﺿﻊ وﺣﺪات اﻟـ‪ DCM‬وارﺗﺒﺎﻃﻬﺎ ﻣﻊ ﺧﻄﻮط اﻟﺘﻮاﻗﺖ ﻟﻠﺸﺮﳛﺔ ‪ ،XC3SxxxxE‬ﺣﻴﺚ ﲢﻮي‬
‫اﻟﺸﺮﳛﺔ ﻋﻠﻰ ﲦﺎن وﺣﺪات ‪ DCM‬ﻣﺘﻮﺿﻌﺔ ﻋﻠﻰ اﻷﻃﺮاف‪.‬‬

‫اﻟﺸﻜﻞ ‪ 49-2‬ﺗﻮﺿﻊ اﻟﻮﺣﺪات ‪ DCM‬ﻋﻠﻰ اﻟﺸﺮاﺋﺢ ‪XC3SxxxxE‬‬

‫إن إﺷﺎرة ﻣﺪﺧﻞ ﻧﺒﻀﺎت اﻟﺴﺎﻋﺔ ﻳﺘﻢ ﺗﻮﺻﻴﻠﻬﺎ ﻣﺒﺎﺷﺮة إﱃ ﺧﻂ اﻟﺘﻮاﻗﺖ )‪ ،(BUFG‬أو ﻳﺘﻢ ﻣﻦ ﺧﻼل ﻣﻮزع إﺷﺎرة )‪(Multiplexer‬‬
‫ﻟﻠﺘﺒﺪﻳﻞ ﺑﲔ إﺷﺎرﺗﲔ ﻣﻨﻔﺼﻠﺘﲔ )‪ (BUFGMUX‬ﻛﻤﺎ ﻫﻮ ﻣﺒﲔ ﻋﻠﻰ اﻟﺸﻜﻞ‪.50-2‬‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪126‬‬
‫‪2‬‬ ‫اﻟﻔﺼﻞ اﻟﺜﺎﱐ | ‪Chapter 2‬‬

‫اﻟﺸﻜﻞ‪ 50-2‬ﻣﺼﻔﻮﻓﺔ ﺗﺒﺪﻳﻞ إﺷﺎرة اﻟﺘﻮﻗﻴﺖ إﱃ ‪BUFGMUX‬‬

‫اﻟﻮﺻﻼت اﻟﺪاﺧﻠﻴﺔ ﻟﻠﻜﺘﻞ اﳌﻨﻄﻘﻴﺔ ‪:(Routing Matrix Interconnects) RMIs‬‬ ‫‪5-6-3-4-8-2‬‬

‫وﻫﻲ ﻋﺒﺎرة ﻋﻦ ﺷﺒﻜﺔ ﻣﻦ ﻣﺴﺎرات اﻹﺷﺎرات )اﻟﻮﺻﻼت( ﺑﲔ ﻣﺪاﺧﻞ وﳐﺎرج اﻟﻮﺣﺪات اﻟﻮﻇﻴﻔﻴﺔ داﺧﻞ ﺷﺮﳛﺔ اﻟـ‪ FPGA‬ﻣﺜﻞ‪IOBs, :‬‬

‫‪ ،CLBs, DCMs, BRAMs‬ﻛﻤﺎ أن ﻫﺬﻩ اﻟﺸﺒﻜﺔ ﻗﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ وﺗﺮﺗﺒﻂ ﻓﻴﻬﺎ اﻟﻮﺻﻼت إﱃ ﻣﺼﻔﻮﻓﺔ ﺗﺒﺪﻳﻞ ﺗﺪﻋﻰ ﺑـ" ‪Switch‬‬

‫‪ "Matrix‬واﻟﱵ ﺗﻘﻮم ﻋﻠﻰ وﺻﻞ أﻧﻮاع ﳐﺘﻠﻔﺔ ﻣﻦ اﻟﻮﺻﻼت‪ .‬اﻟﺸﻜﻞ‪ 51-2‬ﻳﺒﲔ ﲤﺜﻴﻼً ﻟﻠﻮﺻﻼت اﻟﺪاﺧﻠﻴﺔ ﻣﻊ ﻣﺼﻔﻮﻓﺔ اﻟﺘﺒﺪﻳﻞ‪.‬‬

‫اﻟﺸﻜﻞ‪ 51-2‬اﻟﻮﺻﻼت اﻟﺪاﺧﻠﻴﺔ وﻣﺼﻔﻮﻓﺔ اﻟﺘﺒﺪﻳﻞ ﻟﻠﺸﺮاﺋﺢ ‪Spartan3‬‬

‫ﻋﻤﻮﻣﺎً ﻳﻮﺟﺪ أﻧﻮاع ﳐﺘﻠﻔﺔ ﻣﻦ اﻟﻮﺻﻼت ﻧﺬﻛﺮ ﻣﻨﻬﺎ‪ .Direct lines ،Long lines, Hex lines, Double lines :‬ﻛﻤﺎ أن ﲨﻴﻊ ﻫﺬﻩ‬
‫اﻟﻮﺻﻼت ﳝﻜﻦ أن ﺗﺘﻮﻓﺮ ﻋﻠﻰ ﺷﺮﳛﺔ واﺣﺪة‪.‬‬

‫اﻟﺸﻜﻞ‪ 52-2‬ﻳﺒﲔ اﻟﻮﺻﻠﺔ ‪ Long Line‬ﺣﻴﺚ ﺗﻘﻮم ﻋﻠﻰ وﺻﻞ واﺣﺪ ﻣﻦ ﻛﻞ ﺳﺘﺔ وﺣﺪات ‪.CLBs‬‬

‫– ﻃﺮﻳﻘﺔ اﻟﻮﺻﻞ ‪Long Line‬‬ ‫اﻟﺸﻜﻞ‪ 52-2‬اﻟﻮﺻﻼت اﻟﺪاﺧﻠﻴﺔ‬

‫اﻟﺸﻜﻞ‪ 53-2‬ﻳﺒﲔ اﻟﻮﺻﻠﺔ ‪ Hex Line‬ﺣﻴﺚ ﺗﻘﻮم ﻋﻠﻰ وﺻﻞ واﺣﺪ ﻣﻦ ﻛﻞ ﺛﻼث وﺣﺪات ‪.CLBs‬‬

‫– ﻃﺮﻳﻘﺔ اﻟﻮﺻﻞ ‪Hex Line‬‬ ‫اﻟﺸﻜﻞ‪ 53-2‬اﻟﻮﺻﻼت اﻟﺪاﺧﻠﻴﺔ‬

‫‪127‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫اﳌﺼﻔﻮﻓﺎت اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً | ‪Field Programmable Gate Arrays‬‬

‫اﻟﺸﻜﻞ‪ 54-2‬ﻳﺒﲔ اﻟﻮﺻﻠﺔ ‪ Double Line‬ﺣﻴﺚ ﺗﻘﻮم ﻋﻠﻰ وﺻﻞ واﺣﺪ ﻣﻦ ﻛﻞ وﺣﺪﺗﲔ ‪.CLBs‬‬

‫– ﻃﺮﻳﻘﺔ اﻟﻮﺻﻞ ‪Double Line‬‬ ‫اﻟﺸﻜﻞ‪ 54-2‬اﻟﻮﺻﻼت اﻟﺪاﺧﻠﻴﺔ‬

‫اﻟﺸﻜﻞ‪ 55-2‬ﻳﺒﲔ اﻟﻮﺻﻠﺔ ‪ Direct Line‬ﺚ ﺗﻘﻮم ﻋﻠﻰ اﻟﻮﺻﻞ اﳌﺒﺎﺷﺮ ﻣﻊ اﻟﻮﺣﺪات اﺠﻤﻟﺎورة وﺗﺴﺘﺨﺪم ﻫﺬﻩ اﻟﻮﺻﻠﺔ ﻟﻘﻴﺎدة اﻹﺷﺎرة ﻣﻦ‬
‫وﺣﺪة ‪ CLB‬اﳌﺼﺪرﻳﺔ إﱃ أي ﻣﻦ اﻟﻮﺻﻼت ‪ Double, Hex, Long‬ﰒ وﺻﻮﻻً إﱃ وﺣﺪة اﻟـ‪ CLB‬اﳍﺪف‪.‬‬

‫– ﻃﺮﻳﻘﺔ اﻟﻮﺻﻞ ‪Direct Line‬‬ ‫اﻟﺸﻜﻞ‪ 55-2‬اﻟﻮﺻﻼت اﻟﺪاﺧﻠﻴﺔ‬

‫ﺟﻮاﻣﻊ وﺿﻮارب ﻣﺪﳎﺔ ‪:(Embedded Multipliers & Adders) EMAs‬‬ ‫‪6-6-3-4-8-2‬‬

‫إن ﺑﻌﺾ اﻟﺘﻮاﺑﻊ اﻟﻮﻇﻴﻔﻴﺔ ﻛﺎﻟﻀﻮارب ﻣﺜﻼً ﺗﻜﻮن ﺑﻄﻴﺌﺔ ﺟﺪاً ﻋﻨﺪﻣﺎ ﻳﺘﻢ ﺗﺸﻜﻴﻠﻬﺎ ﻣﻦ وﺣﺪات اﻟـ‪ ،CLBs‬وﲟﺎ أن ﻋﻤﻠﻴﺎت اﻟﻀﺮب واﳉﻤﻊ‬
‫ﺗﻌﺘﱪ ﺟﻮﻫﺮﻳﺔ ﰲ اﻟﻜﺜﲑ ﻣﻦ اﻟﺘﻄﺒﻴﻘﺎت‪ ،‬ﺧﺼﻮﺻﺎً ﰲ ﺗﻄﺒﻴﻘﺎت ﻣﻌﺎﳉﺔ اﻹﺷﺎرة‪ ،‬ﻓﺈن اﻟﻌﺪﻳﺪ ﻣﻦ ﺷﺮاﺋﺢ اﻟـ‪ FPGA‬ﺗﺘﻀﻤﻦ ﻛﺘﻞ ﻣﻨﻄﻘﻴﺔ‬
‫ﻟﻮﻇﺎﺋﻒ اﻟﻀﺮب واﳉﻤﻊ ﻣﺪﳎﺔ ﻋﻠﻰ اﻟﻜﻴﺎن اﻟﺼﻠﺐ ﻟﻠﺸﺮﳛﺔ؛ ﺗﺘﻮﺿﻊ ﻫﺬﻩ اﻟﻜﺘﻞ ﺑﺎﻟﻘﺮب ﻣﻦ ﻛﺘﻞ اﻟﺬاﻛﺮة ‪ RAM‬اﳌﺪﳎﺔ ﻛﻤﺎ ﻫﻮ ﻣﺒﲔ‬
‫ﻋﻠﻰ اﻟﺸﻜﻞ‪ ،56-2‬وذﻟﻚ ﻷن ﻫﻨﺎك ارﺗﺒﺎط وﻇﻴﻔﻲ ﺑﲔ اﻟﻀﻮارب وﻛﺘﻞ اﻟﺬاﻛﺮة‪ .‬اﻟﺸﻜﻞ‪ 57-2‬ﻳﺒﲔ اﻟﺒﻨﻴﺔ اﻟﺪاﺧﻠﻴﺔ ﻟﻠﻀﺎرب اﳌﺪﻣﺞ‬
‫‪.MULT18X18SIO‬‬

‫اﻟﺸﻜﻞ‪ 56-2‬أﻋﻤﺪة ﻣﻦ اﻟﻀﻮارب ﻋﻠﻰ اﻟﺘﻮازي ﻣﻊ ﻛﺘﻞ اﻟـ‪ – BRAM‬اﻟﺸﺮاﺋﺢ ‪XC3Sxxxx‬‬

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‫‪2‬‬ ‫اﻟﻔﺼﻞ اﻟﺜﺎﱐ | ‪Chapter 2‬‬

‫اﻟﺸﻜﻞ‪ 57-2‬اﻟﺒﻨﻴﺔ اﻟﺪاﺧﻠﻴﺔ ﻟﻠﻀﺎرب اﳌﺪﻣﺞ ﺑـ‪ 18x18‬ﻣﺪﺧﻞ وﳐﺮج‬

‫إن ﺑﻌﺾ ﺷﺮاﺋﺢ اﻟـ‪ FPGA‬ﲤﻠﻚ وﺣﺪة ﻣﻨﻄﻘﻴﺔ ”‪ (Multiply and Accumulate) “MAC‬واﻟﱵ ﺗﺴﺘﺨﺪم ﻛﻀﺎرب ﻣﻜﺪس ﰲ‬
‫ﺗﻄﺒﻴﻘﺎت ﻣﻌﺎﳉﺔ اﻹﺷﺎرة اﻟﺮﻗﻤﻴﺔ‪ ،‬وﻫﻮ ﻋﺒﺎرة ﻋﻦ ﺿﺎرب وﺟﺎﻣﻊ ووﺣﺪة ﻣﺮاﻛﻢ ﻣﺒﻨﻴﺔ ﰲ ﻛﺘﻠﺔ ﻣﻨﻄﻘﻴﺔ وﺣﻴﺪة‪ ،‬ﺗﻘﻮم ﺑﻀﺮب ﻋﺪدﻳﻦ ﰒ ﲨﻊ‬
‫اﻟﻨﺘﻴﺠﺔ ﻣﻊ ﻗﻴﻤﺔ ﺳﺎﺑﻘﺔ ﰲ اﳌﺮاﻛﻢ‪ ،‬وﲣﺰن اﻟﻨﺘﻴﺠﺔ ﰲ ﻗﻼب ﻣﺴﺎﻋﺪ أو ﰲ ذاﻛﺮة ‪ RAM‬ﻣﺪﳎﺔ‪ .‬اﻟﺸﻜﻞ‪ 58-2‬ﻳﺒﲔ اﻟﻌﻨﺎﺻﺮ اﳌﻨﻄﻘﻴﺔ‬
‫اﳌﻜﻮﻧﺔ ﻟﻠﻀﺎرب اﳌﻜﺪس‪.‬‬

‫اﻟﺸﻜﻞ‪ 58-2‬اﻟﻌﻨﺎﺻﺮ اﳌﻜﻮﻧﺔ ﻟﻠﻀﺎرب اﳌﻜﺪس‬

‫ﻧﻮى ﻣﻌﺎﳉﺎت ﻣﺪﳎﺔ ‪:(Embedded Processor Cores) EPCs‬‬ ‫‪7-6-3-4-8-2‬‬

‫ﰲ ﻣﻌﻈﻢ اﻟﺘﻄﺒﻴﻘﺎت ﺗﻈﻬﺮ اﳊﺎﺟﺔ ﺑﺸﻜﻞ أو ﺑﺂﺧﺮ إﱃ وﺟﻮد ﻣﻌﺎﰿ ﻣﺼﻐﺮ‪ ،‬وﺣﱴ وﻗﺖ ﻣﺘﺄﺧﺮ ﻛﺎن ﻳﺘﻮﺟﺐ وﺿﻊ اﳌﻌﺎﰿ ﻛﻌﻨﺼﺮ ﻣﻨﻔﺼﻞ‬
‫ﻋﻠﻰ اﻟﺪارة اﳌﻄﺒﻮﻋﺔ‪ .‬أﻣﺎ ﰲ ﺷﺮاﺋﺢ اﻟـ‪ FPGA‬اﳊﺪﻳﺜﺔ ﻓﻘﺪ أﺻﺒﺢ ﻣﻦ اﳌﻤﻜﻦ أن ﲢﻮي اﻟﺸﺮﳛﺔ ﻋﻠﻰ واﺣﺪ أو أﻛﺜﺮ ﻣﻦ اﳌﻌﺎﳉﺎت اﳌﺪﳎﺔ‪،‬‬
‫وﺑﺎﻟﺘﺎﱄ ﻳﺘﻢ اﻻﺳﺘﻐﻨﺎء ﻛﻠﻴﺎً ﻋﻦ اﳌﻬﺎم اﻟﱵ ﺗﻨﺠﺰ ﺑﻮاﺳﻄﺔ ﻣﻌﺎﳉﺎت ﺧﺎرﺟﻴﺔ‪ ،‬واﻟﺬي ﺑﺪورﻩ ﳛﻘﻖ اﻟﻌﺪﻳﺪ ﻣﻦ اﳌﺰاﻳﺎ واﻟﱵ ﻣﻨﻬﺎ‪ :‬اﻟﺘﺨﻠﺺ ﻣﻦ‬
‫ﺗﻜﻠﻔﺔ وﺟﻮد ﺷﺮﳛﺘﲔ ﻣﻨﻔﺼﻠﺘﲔ‪ ،‬ﺗﻘﻠﻴﻞ ﻋﺪد ﻧﻘﺎط اﻻﺗﺼﺎل واﻷﻗﻄﺎب ﻋﻠﻰ اﻟﺪارة اﳌﻄﺒﻮﻋﺔ‪ ،‬اﻟﺪارة اﳌﻄﺒﻮﻋﺔ ﺗﺼﺒﺢ أﺻﻐﺮ ﺣﺠﻤﺎً وأﺧﻒ‬
‫وزﻧﺎً‪.‬‬

‫إن اﻟﺴﺒﺐ وراء اﳊﺎﺟﺔ إﱃ ﻣﻌﺎﰿ ﻣﺼﻐﺮ ﻋﻠﻰ ﺷﺮﳛﺔ اﻟـ‪ -FPGA‬وذﻟﻚ ﻋﻠﻰ اﻟﺮﻏﻢ ﻣﻦ أن ﺷﺮاﺋﺢ اﻟـ‪ FPGA‬أﺳﺮع ﺑﻜﺜﲑ ﻣﻦ اﳌﻌﺎﳉﺎت‪-‬‬
‫ﻫﻮ أن ﺷﺮاﺋﺢ اﻟـ‪ FPGA‬ﺗﻘﻮم ﻋﻠﻰ ﺗﻨﻔﻴﺬ ﺧﻮارزﻣﻴﺎت ﺗﻔﺮﻋﻴﺔ )‪ ،(Parallel Algorithms‬إﻻ أن اﻟﻌﺪﻳﺪ ﻣﻦ اﳋﻮارزﻣﻴﺎت اﻟﱵ ﻻ ﲢﺘﺎج إﱃ‬
‫ﺳﻌﺔ ﻣﻌﺎﳉﺔ ﻋﺎﻟﻴﺔ ﻫﻲ ﺧﻮارزﻣﻴﺎت ﺗﻌﺎﻗﺒﻴﺔ )‪ ،(Sequential Algorithms‬وﺑﺎﻟﺘﺎﱄ ﳝﻜﻦ ﺑﺮﳎﺘﻬﺎ ﻋﻠﻰ ﺷﺮﳛﺔ ﻣﻌﺎﰿ ﺑﺸﻜﻞ أﺳﻬﻞ ﺑﻜﺜﲑ‬
‫ﻣﻦ ﺗﻨﻔﻴﺬﻫﺎ ﺑﺎﺳﺘﺨﺪام اﻟﻮﺣﺪات اﳌﻨﻄﻘﻴﺔ ﻟﻠـ‪.FPGA‬‬

‫ﺑﺸﻜﻞ ﻋﺎم ﻳﻮﺟﺪ ﻧﻮﻋﲔ ﻣﻦ ﻧﻮى اﳌﻌﺎﳉﺎت ﰲ ﺷﺮاﺋﺢ اﻟـ‪:FPGA‬‬

‫‪ :Embedded Hardware Cores -‬ﻧﻮى اﳌﻌﺎﳉﺎت ذات اﻟﻜﻴﺎن اﻟﺼﻠﺐ‬

‫‪129‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫اﳌﺼﻔﻮﻓﺎت اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً | ‪Field Programmable Gate Arrays‬‬

‫‪ :Embedded Software Cores -‬ﻧﻮى اﳌﻌﺎﳉﺎت اﻟﱪﳎﻴﺔ‬

‫ﻧﻮى اﳌﻌﺎﳉﺎت ذات اﻟﻜﻴﺎن اﻟﺼﻠﺐ )‪:(Embedded Hardware Cores‬‬ ‫‪1-7-6-3-4-8-2‬‬

‫ﰲ ﻫﺬا اﻟﻨﻮع ﻳﺘﻢ ﲣﺼﻴﺺ ﻣﺴﺎﺣﺔ ﻋﻠﻰ اﻟﺸﺮﳛﺔ اﻟﺴﻴﻠﻴﻜﻮﻧﻴﺔ اﻷﺳﺎﺳﻴﺔ ﻟﺸﺮﳛﺔ اﻟـ‪ FPGA‬ﻟﺒﻨﺎء اﳌﻌﺎﰿ اﳌﺼﻐﺮ اﳌﺪﻣﺞ ﻛﻜﻴﺎن ﺻﻠﺐ ﻋﻠﻰ‬
‫ﺷﻜﻞ ﻛﺘﻞ‪ ،‬وﻳﻮﺟﺪ ﻃﺮﻳﻘﺘﲔ ﻟﻠﺘﻮزﻳﻊ‪:‬‬
‫• دﻣﺞ ﻧﻮاة اﳌﻌﺎﰿ ﻋﻠﻰ ﺷﻜﻞ ﺷﺮاﺋﻂ ”‪ “Strips‬ﺧﺎرج اﻟﺒﻨﺎء اﻟﺮﺋﻴﺴﻲ ﻟﻠﻜﺘﻞ اﳌﻨﻄﻘﻴﺔ ﻟﺸﺮﳛﺔ اﻟـ‪ – FPGA‬اﻟﺸﻜﻞ‪.59-2‬‬
‫• دﻣﺞ ﻧﻮاة اﳌﻌﺎﰿ ﻋﻠﻰ ﺷﻜﻞ ﻛﺘﻞ ﻣﻮزﻋﺔ ﺿﻤﻦ اﻟﺒﻨﺎء اﻟﺮﺋﻴﺴﻲ ﻟﻠﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ ﻟﺸﺮﳛﺔ اﻟـ‪– FPGA‬اﻟﺸﻜﻞ‪.60-2‬‬

‫اﻟﺸﻜﻞ‪ 59-2‬ﻋﻨﺎﺻﺮ ﻣﺪﳎﺔ ﺧﺎرج اﻟﺒﻨﺎء اﻟﺮﺋﻴﺴﻲ ﻟﺸﺮﳛﺔ اﻟـ‪FPGA‬‬

‫اﻟﺸﻜﻞ‪ 60-2‬ﻋﻨﺎﺻﺮ ﻣﺪﳎﺔ ﺿﻤﻦ اﻟﺒﻨﺎء اﻟﺮﺋﻴﺴﻲ ﻟﺸﺮﳛﺔ اﻟـ‪FPGA‬‬

‫ﻳﻮﺟﺪ اﻟﻌﺪﻳﺪ ﻣﻦ ﺷﺮاﺋﺢ اﳌﻌﺎﳉﺎت اﳌﺪﳎﺔ ﻋﻠﻰ اﻟﻜﻴﺎن اﻟﺼﻠﺐ‪ ،‬وﻣﻦ أﺷﻬﺮﻫﺎ اﳌﻌﺎﰿ ‪ 32-bit PowerPC‬اﳌﺪﻣﺞ ﰲ ﺷﺮاﺋﺢ ﺷﺮﻛﺔ‬
‫‪ Xilinx‬ﻣﺜﻞ اﻟﺸﺮاﺋﺢ]‪ ،Virtex-4, Virtex-5, Vertex-6 :[359‬واﳌﻌﺎﰿ ‪ 8-bit AVR‬اﳌﺪﻣﺞ ﰲ ﺷﺮاﺋﺢ ﺷﺮﻛﺔ ‪ ATMEL‬ﻣﺜﻞ‬
‫اﻟﺸﺮﳛﺔ]‪ .FPSLIC :[360‬اﻟﺸﻜﻞ‪ 61-2‬ﻳﺒﲔ اﳌﺨﻄﻂ اﻟﺼﻨﺪوﻗﻲ ﻟﻠﻤﻌﺎﰿ ‪ .PowerPC‬اﻟﺸﻜﻞ‪ 62-2‬ﻳﺒﲔ اﳌﺨﻄﻂ اﻟﺒﻨﻴﻮي ﻟﺸﺮاﺋﺢ‬
‫‪.FPSLIC‬‬

‫اﻟﺸﻜﻞ‪ 61-2‬اﳌﺨﻄﻂ اﻟﺪاﺧﻠﻲ ﻟﻠﻤﻌﺎﰿ ‪PowerPC‬‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪130‬‬
2 Chapter 2 | ‫اﻟﻔﺼﻞ اﻟﺜﺎﱐ‬

FPGA‫ ﻣﻊ اﻟـ‬AVR ‫ وارﺗﺒﺎط اﳌﻌﺎﰿ‬FPSLIC ‫ اﳌﺨﻄﻂ اﻟﺒﻨﻴﻮي ﻟﺸﺮاﺋﺢ‬62-2‫اﻟﺸﻜﻞ‬

:(Embedded Software Cores) ‫ﻧﻮى اﳌﻌﺎﳉﺎت اﻟﱪﳎﻴﺔ‬ 2-7-6-3-4-8-2

‫ وﺑﺎﻟﺘﺎﱄ ﻓﻬﻲ ﺗﺴﺘﻨﻔﺪ ﻣﻦ‬،‫ ﺑﺮﳎﻴﺎً ﺑﺎﺳﺘﺨﺪام اﻟﻜﺘﻞ اﳌﻨﻄﻘﻴﺔ اﻷﺳﺎﺳﻴﺔ اﳌﻮﺟﻮدة ﻋﻠﻰ اﻟﺸﺮﳛﺔ‬FPGA‫ﻫﺬﻩ اﻟﻨﻮى ﻳﺘﻢ ﺗﺸﻜﻴﻠﻬﺎ ﻋﻠﻰ ﺷﺮﳛﺔ اﻟـ‬
‫ إذ ﻫﻨﺎك اﻟﻌﺪﻳﺪ ﻣﻦ ﻧﻮى‬،‫ وﳜﺘﻠﻒ ﻋﺪد اﻟﻜﺘﻞ اﳌﻨﻄﻘﻴﺔ اﻟﻼزﻣﺔ ﻟﺒﻨﺎء ﻧﻮاة اﳌﻌﺎﰿ ﺣﺴﺐ اﳌﻌﺎﰿ اﳌﺴﺘﺨﺪم‬،‫ﻋﺪد اﻟﻜﺘﻞ اﳌﻨﻄﻘﻴﺔ ﻋﻠﻰ اﻟﺸﺮﳛﺔ‬
.‫اﳌﻌﺎﳉﺎت اﻟﱪﳎﻴﺔ‬

‫ وﺑﺸﻜﻞ‬،‫ وﻫﻲ إﻣﻜﺎﻧﻴﺔ ﺑﻨﺎء اﳌﻌﺎﰿ ﻋﻨﺪ اﳊﺎﺟﺔ‬،‫ إﻻ أ�ﺎ ﲤﻠﻚ ﻣﻴﺰة ﻫﺎﻣﺔ‬،‫ﺗﻌﺘﱪ ﻫﺬﻩ اﻟﻨﻮى أﺑﺴﻂ وأﺑﻄﺄ ﻣﻦ اﻟﻨﻮى ذات اﻟﻜﻴﺎن اﻟﺼﻠﺐ‬
.361FPGA‫ ﻳﺒﲔ اﻟﺒﲎ اﻟﱪﳎﻴﺔ اﻷﺳﺎﺳﻴﺔ اﳌﺴﺘﺨﺪﻣﺔ ﰲ ﺷﺮاﺋﺢ اﻟـ‬8-2‫ اﳉﺪول‬.‫ﻣﺸﺎﺑﻪ ﳝﻜﻦ ﺑﻨﺎء ﻋﺪة ﻣﻌﺎﳉﺎت ﻋﻨﺪ اﳊﺎﺟﺔ ﻟﺬﻟﻚ‬
‫ ﻳﺒﲔ اﳌﺨﻄﻂ اﻟﺼﻨﺪوﻗﻲ‬64-2‫ اﻟﺸﻜﻞ‬.32-bit ‫ذو ﻋﺮض ﻧﺎﻗﻞ‬ [362]
MicroBlaze ‫ ﻳﺒﲔ اﳌﺨﻄﻂ اﻟﺼﻨﺪوﻗﻲ ﻟﻠﻤﻌﺎﰿ‬63-2‫اﻟﺸﻜﻞ‬

.[364]Altera NiosII ‫ ﻳﺒﲔ اﳌﺨﻄﻂ اﻟﺼﻨﺪوﻗﻲ ﻟﻠﻤﻌﺎﰿ‬65-2‫ اﻟﺸﻜﻞ‬.8-bit ‫[ ذو ﻋﺮض ﻧﺎﻗﻞ‬363]PicoBlaze ‫ﻟﻠﻤﻌﺎﰿ‬

PU core Architecture Bits License Pipeline Cycles FPGA Vendor

S1 Core SPARC-v9 64 Open-source 6 1
LEON3 SPARC-v8 32 Open-source 7 1
LEON2 SPARC-v8 32 Open-source 5 1
OpenRISC OpenRISC1000 32 Open-source 5 1
MicroBlaze MicroBlaze 32 Proprietary 3, 5 1 Xilinx
aeMB MicroBlaze 32 Open-source 3 1
clones of MicroBlaze
OpenFire MicroBlaze 32 Open-source 3 1
Nios II/f Nios II 32 Proprietary 6 1
Nios II/s Nios II 32 Proprietary 5 1 Altera
Nios II/e Nios II 32 Proprietary no 6
LatticeMico32 LatticeMico32 32 Open-source 6 1 Lattice, All
Cortex-M1 ARMv6 32 Proprietary 3 1
CoreMP7 Actel 32 Proprietary 1 Actel
DSPuva16 DSPuva16 16 Open-source no 4
PicoBlaze PicoBlaze 8 Proprietary no 2 Xilinx
PacoBlaze PicoBlaze 8 Open-source no 2 clone of PicoBlaze
LatticeMico8 LatticeMico8 8 Open-source no 2 Lattice, All
Core8051 Actel 8 Proprietary 8 Actel

FPGA‫ اﻟﻨﻮى اﻟﱪﳎﻴﺔ اﻷﺳﺎﺳﻴﺔ اﳌﺴﺘﺨﺪﻣﺔ ﰲ ﺷﺮاﺋﺢ اﻟـ‬8-2‫اﳉﺪول‬

131 ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫اﳌﺼﻔﻮﻓﺎت اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً | ‪Field Programmable Gate Arrays‬‬

‫اﻟﺸﻜﻞ‪ 63-2‬اﳌﺨﻄﻂ اﻟﺼﻨﺪوﻗﻲ ﻟﻠﻤﻌﺎﰿ ‪ MicroBlaze‬اﳌﺪﻣﺞ ﰲ ﺷﺮاﺋﺢ ‪Xilinx‬‬

‫اﻟﺸﻜﻞ‪ 64-2‬اﳌﺨﻄﻂ اﻟﺼﻨﺪوﻗﻲ ﻟﻠﻤﻌﺎﰿ ‪ PicoBlaze‬اﳌﺪﻣﺞ ﰲ ﺷﺮاﺋﺢ ‪Xilinx‬‬

‫‪ NiosII‬اﳌﺪﻣﺞ ﰲ ﺷﺮاﺋﺢ ‪Altera‬‬ ‫اﻟﺸﻜﻞ‪ 65-2‬اﳌﺨﻄﻂ اﻟﺼﻨﺪوﻗﻲ ﻟﻠﻤﻌﺎﰿ‬

‫وﺣﺪة ﺗﺮاﺳﻞ ﺑﻴﺎﻧﺎت ﻋﺎﻟﻴﺔ اﻟﺴﺮﻋﺔ ‪:(Gigabit Transceivers) GbTs‬‬ ‫‪8-6-3-4-8-2‬‬

‫ﺗﺘﻀﻤﻦ ﺷﺮاﺋﺢ اﻟـ‪ FPGA‬اﳌﺘﻘﺪﻣﺔ اﻟﻴﻮم ﻛﻴﺎن ﺻﻠﺐ ﺧﺎص ﻳﺴﻤﻰ ﺑـ‪ Transceiver Block‬ﳐﺼﺺ ﻟﻨﻘﻞ اﻟﺒﻴﺎﻧﺎت ﺑﺴﺮﻋﺎت ﻋﺎﻟﻴﺔ ﺗﺼﻞ‬
‫إﱃ ﻋﺸﺮات اﻟـ‪ .Gigabit‬ﺑﺸﻜﻞ ﻋﺎم ﺗﺘﻀﻤﻦ ﻫﺬﻩ اﻟﻮﺣﺪة ﻛﺘﻠﺘﲔ ﻣﻨﻄﻘﻴﺘﲔ‪ :‬ﻛﺘﻠﺔ ﳐﺼﺼﺔ ﻟﻺرﺳﺎل‪ ،‬وأﺧﺮى ﳐﺼﺼﺔ ﻟﻼﺳﺘﻘﺒﺎل‪.‬‬
‫اﻟﺸﻜﻞ‪ 66-2‬ﻳﺒﲔ اﳌﺨﻄﻂ اﻟﺼﻨﺪوﻗﻲ اﳌﺒﺴﻂ ﻟﻮﺣﺪة اﻟﱰاﺳﻞ ‪ Vertix-6‬اﳌﺴﺘﺨﺪﻣﺔ ﰲ ﺷﺮاﺋﺢ ﺷﺮﻛﺔ ‪.[365]Xilinx‬‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪132‬‬
‫‪2‬‬ ‫اﻟﻔﺼﻞ اﻟﺜﺎﱐ | ‪Chapter 2‬‬

‫اﻟﺸﻜﻞ‪ 66-2‬اﳌﺨﻄﻂ اﻟﺼﻨﺪوﻗﻲ ﻟﻮﺣﺪة اﻟﱰاﺳﻞ اﳌﺴﺘﺨﺪﻣﺔ ﰲ ﺷﺮاﺋﺢ ‪Vertix-6‬‬

‫وﺣﺪات ﻣﻌﺎﳉﺔ اﻹﺷﺎرة اﻟﺮﻗﻤﻴﺔ ‪:(Digital Signal Processing Blocks) DSPBs‬‬ ‫‪9-6-3-4-8-2‬‬

‫إﺿﺎﻓﺔً إﱃ وﺣﺪات اﻟﻜﻴﺎن اﻟﺼﻠﺐ اﻟﺴﺎﺑﻘﺔ‪ ،‬ﻓﺈن ﺑﻌﺾ ﺷﺮاﺋﺢ اﻟـ‪ – FPGA‬ﻏﺎﻟﺒﺎً ﺗﻜﻮن ﻣﻦ اﻟﻌﺎﺋﻼت اﳌﺨﺼﺼﺔ ﻟﺘﻄﺒﻴﻘﺎت ﻣﻌﺎﳉﺔ اﻹﺷﺎرة‬
‫اﻟﺮﻗﻤﻴﺔ – ﲢﻮي ﻋﻠﻰ وﺣﺪات ﻛﻴﺎن ﺻﻠﺐ ‪DSP‬؛ اﳍﺪف ﻣﻦ ﻫﺬﻩ اﻟﻮﺣﺪات ﻫﻮ دﻋﻢ اﳋﻮارزﻣﻴﺎت اﻟﺮﻳﺎﺿﻴﺔ اﳌﺴﺘﺨﺪﻣﺔ ﰲ ﲢﻠﻴﻞ اﻹﺷﺎرة‬
‫اﻟﺮﻗﻤﻴﺔ ﲝﻴﺚ ﺗﻜﻮن أﺳﺮع ﻣﺎ ﳝﻜﻦ ﺑﺄﻋﻠﻰ أداء ﻓﻌﺎل وأﻗﻞ اﺳﺘﻬﻼك ﻟﻠﻄﺎﻗﺔ وأﻗﻞ ﻋﺪد ﳑﻜﻦ ﻣﻦ اﳌﺴﺎﺣﺎت اﻟﺴﻴﻠﻴﻜﻮﻧﻴﺔ ﻋﻠﻰ ﺷﺮﳛﺔ‬
‫اﻟـ‪.FPGA‬‬

‫ﺗﺘﻮﺿﻊ ﻫﺬﻩ اﻟﻜﺘﻞ ﺑﲔ ﻛﺘﻞ اﻟﺬاﻛﺮة اﳌﺪﳎﺔ ‪ ،RAM‬واﻟﻜﺘﻞ اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﻛﻤﺎ ﻫﻮ ﻣﺒﲔ ﻋﻠﻰ اﻟﺸﻜﻞ‪ ،67-2‬وذﻟﻚ ﻷن ﻫﻨﺎك‬
‫ارﺗﺒﺎﻃﺎً وﻇﻴﻔﻴﺎً ﻣﻊ ﻛﺘﻞ اﻟﺬاﻛﺮة‪.‬‬

‫ﺷﺮاﺋﺢ ‪Spartan-3A‬‬ ‫اﻟﺸﻜﻞ‪ 67-2‬ﺗﻮﺿﻊ وﺣﺪات ‪ DSP48A‬ﻋﻠﻰ‬

‫ﺑﺸﻜﻞ ﻋﺎم ﻫﺬﻩ اﻟﻮﺣﺪات أو اﻟﻜﺘﻞ ﺗﻜﻮن ﻣﻜﻮﻧﺔ ﻣﻦ وﺣﺪات ‪ 18×18-bit‬أو ‪ 25×18-bit‬ﺗﺘﻀﻤﻨﻬﺎ ﻣﺮاﺣﻞ ودارات ﻣﻨﻄﻘﻴﺔ أﺳﺎﺳﻴﺔ‬
‫)ﺿﺮب وﲨﻊ وﻃﺮح وﺗﻜﻤﻴﻢ وﻣﺮاﻛﻢ( إﺿﺎﻓﺔً إﱃ ﻣﺮﺣﻠﺔ ﺟﺎﻣﻊ أوﱄ ﻣﻦ أﺟﻞ ﺗﻄﺒﻴﻘﺎت اﳌﺮﺷﺤﺎت اﻟﺮﻗﻤﻴﺔ "‪ ،"FIR, IIR‬وﻫﻲ ﺗﻌﻤﻞ ﻋﻨﺪ‬
‫ﺳﺮﻋﺎت ﻋﺎﻟﻴﺔ ﳝﻜﻦ أن ﺗﺼﻞ إﱃ ‪ .400MHz‬اﻟﺸﻜﻞ‪ 68-2‬ﻳﺒﲔ اﻟﺒﻨﻴﺔ اﻟﺪاﺧﻠﻴﺔ ﻟﻠﻜﺘﻠﺔ اﳌﺪﳎﺔ‪.[366]XtremeDSP DSP48A1‬‬

‫‪133‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫اﳌﺼﻔﻮﻓﺎت اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً | ‪Field Programmable Gate Arrays‬‬

‫اﻟﺸﻜﻞ‪ 68-2‬اﻟﺒﻨﻴﺔ اﻟﺪاﺧﻠﻴﺔ ﻟﻠﻮﺣﺪة ‪DSP84A‬‬

‫إن ﻋﺪد اﻟﻜﺘﻞ اﳌﻨﻄﻘﻴﺔ ﻟﻠـ‪ DSP Slice‬ﳜﺘﻠﻒ ﻣﻦ ﺷﺮﳛﺔ ﻷﺧﺮى‪ ،‬ﻛﻤﺎ أن ﻫﺬﻩ اﻟﻜﺘﻞ ﳝﻜﻦ أن ﺗﺮﺗﺒﻂ ﻣﻊ ﺑﻌﻀﻬﺎ ﻟﺘﺸﻜﻞ ﻋﺪة ﻣﺮاﺣﻞ ﻣﻦ‬
‫أﺟﻞ ﻋﻤﻠﻴﺎت وﺗﻄﺒﻴﻘﺎت ﻣﺘﻘﺪﻣﺔ‪ .‬اﻟﺸﻜﻞ‪ 69-2‬ﻳﺒﲔ ﻣﻘﺎرﻧﺔ ﺑﲔ ﺷﺮاﺋﺢ اﻟـ‪ FPGA‬ﻣﻦ ﺷﺮﻛﺔ ‪ Xilinx‬اﳌﺨﺼﺼﺔ ﻟﺘﻄﺒﻴﻘﺎت ﻣﻌﺎﳉﺔ اﻹﺷﺎرة‬
‫اﻟﺮﻗﻤﻴﺔ‪.‬‬

‫‪DSP‬‬ ‫اﻟﺸﻜﻞ‪ 69-2‬ﻣﻘﺎرﻧﺔ ﺑﲔ ﺷﺮاﺋﺢ اﻟـ‪ FPGA‬ﻣﻦ ﺷﺮﻛﺔ ‪ Xilinx‬اﳌﺨﺼﺼﺔ ﻟﺘﻄﺒﻴﻘﺎت‬

‫ﻫﻨﺎك ﺗﺴﺎؤل ﻳﻄﺮح داﺋﻤﺎً وﻫﻮ‪ :‬ﳌﺎذا ﻧﺴﺘﺨﺪم ﺷﺮاﺋﺢ اﻟـ‪ FPGA‬ﰲ ﺗﻄﺒﻴﻘﺎت ﻣﻌﺎﳉﺔ اﻹﺷﺎرة اﻟﺮﻗﻤﻴﺔ ﺑﺪﻻً ﻣﻦ ﻣﻌﺎﳉﺎت اﻹﺷﺎرة اﻟﺮﻗﻤﻴﺔ‬
‫ﻧﻔﺴﻬﺎ!؟‬

‫ﰲ اﳊﻘﻴﻘﺔ ﻫﻨﺎك اﻟﻌﺪﻳﺪ ﻣﻦ اﳌﺰاﻳﺎ ﰲ اﺳﺘﺨﺪام ﺷﺮاﺋﺢ اﻟـ‪ FPGA‬ﺑﺪﻻً ﻣﻦ ﻣﻌﺎﳉﺎت اﻟـ‪ ،DSP‬وﻟﻜﻦ اﳌﻴﺰة اﻷﻫﻢ ﻫﻲ إﻣﻜﺎﻧﻴﺔ ﺗﻨﻔﻴﺬ‬
‫ﺧﻮارزﻣﻴﺎت ﺗﻔﺮﻋﻴﺔ ﺑﺴﺮﻋﺎت ﻛﺒﲑة ﺟﺪاً ﻛﻤﺎ ﻫﻮ ﻣﺒﲔ ﺑﺎﳌﻘﺎرﻧﺔ ﻋﻠﻰ اﻟﺸﻜﻞ‪.70-2‬‬

‫‪ FPGA‬ﳌﺮﺷﺢ رﻗﻤﻲ ‪256-bit‬‬ ‫اﻟﺸﻜﻞ‪ 70-2‬ﻣﻘﺎرﻧﺔ ﺳﺮﻋﺔ اﻟﺘﻨﻔﻴﺬ ﳌﻌﺎﰿ ‪ DSP‬ﺗﻘﻠﻴﺪي ﻣﻊ وﺣﺪة ‪ DSP‬ﻋﻠﻰ ﺷﺮﳛﺔ‬

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‫‪2‬‬ ‫اﻟﻔﺼﻞ اﻟﺜﺎﱐ | ‪Chapter 2‬‬

‫‪ 10-6-3-4-8-2‬وﺣﺪات ﺑﺮﳎﻴﺔ وﻇﻴﻔﻴﺔ ﺟﺎﻫﺰة ‪:(Intellectual Property) IPs‬‬

‫ﻳﻄﻠﻖ ﻋﻠﻰ ﻫﺬﻩ اﻟﻮﺣﺪات اﻟﻮﻇﻴﻔﻴﺔ اﳌﺼﻄﻠﺢ ‪ IPs‬اﺧﺘﺼﺎراً ﻟـ‪ ،Intellectual Property‬واﻟﱵ ﻫﻲ ﻋﺒﺎرة ﻋﻦ وﻇﺎﺋﻒ ﻣﺴﺘﻘﻠﺔ ﻳﺘﻢ‬
‫ﺗﻮﺻﻴﻔﻬﺎ ﺑﺮﳎﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﻟﻜﻴﺎن اﻟﺼﻠﺐ )‪ (HDL‬ﺑﺪﻻً ﻣﻦ ﺑﻨﺎﺋﻬﺎ ﻓﻴﺰﻳﺎﺋﻴﺎً ﻋﻠﻰ اﻟﻜﻴﺎن اﻟﺼﻠﺐ‪.‬‬

‫إن اﳍﺪف ﻣﻦ ﻫﺬﻩ اﻟﻮﺣﺪات اﻟﱪﳎﻴﺔ ﻫﻮ إﺿﺎﻓﺔ وﻇﺎﺋﻒ ﻣﻨﻄﻘﻴﺔ إﺿﺎﻓﻴﺔ ﻣﻦ دون اﳊﺎﺟﺔ إﱃ ﻛﺘﺎﺑﺘﻬﺎ ﺑﺮﳎﻴﺎً‪ ،‬وﺑﺎﻟﺘﺎﱄ ﳝﻜﻦ ﺑﻨﺎء ﻧﻈﺎم ﻣﻌﻘﺪ‬
‫ﺑﺰﻣﻦ ﻗﺼﲑ ﻧﺴﺒﻴﺎً ﻣﻦ ﺧﻼل ﺗﻀﻤﲔ ﻫﺬﻩ اﻟﻮﺣﺪات اﻟﱪﳎﻴﺔ ﰲ اﻟﻨﻈﺎم ورﺑﻂ وﻇﺎﺋﻔﻬﺎ‪.‬‬

‫ﻳﺘﻢ ﺑﻨﺎء ﻫﺬﻩ اﻟﻮﺣﺪات اﻟﱪﳎﻴﺔ ﻣﻦ ﻗﺒﻞ اﻷﻓﺮاد أو اﻟﺸﺮﻛﺎت اﳌﺨﺘﺼﺔ أو اﻟﺸﺮﻛﺎت اﳌﺼﻨﻌﺔ ﻟﻠﺸﺮاﺋﺢ اﳌﻨﻄﻘﻴﺔ‪ ،‬وﻳﺘﻢ ﺗﻄﻮﻳﺮﻫﺎ ﺑﺸﻜﻞ أﻣﺜﻠﻲ‬
‫وﳕﻮذﺟﻲ وﻓﺤﺼﻬﺎ وذﻟﻚ ﺑﻮاﺳﻄﺔ ﻣﻄﻮري ﺑﺮاﻣﺞ ﳐﺘﺼﲔ‪ ،‬وﺑﺎﻟﺘﺎﱄ ﳝﻜﻦ اﺳﺘﺨﺪام ﻫﺬﻩ اﻟﻮﺣﺪات ﰲ ﺑﻨﺎء ﺑﺮاﻣﺞ ووﻇﺎﺋﻒ ﻣﻌﻘﺪة ﺑﺰﻣﻦ ﻗﺼﲑ‬
‫ﺟﺪاً‪ ،‬وﺗﻜﻮن إﻣﺎ ﻣﻔﺘﻮﺣﺔ اﳌﺼﺪر أو ذات ﻛﻠﻔﺔ ﳏﺪدة ﻣﻦ ﻗﺒﻞ اﻟﺸﺮﻛﺔ اﳌﻄﻮرة‪.‬‬

‫ﺗﻮﻓﺮ اﻟﺸﺮﻛﺎت اﳌﺼﻨﻌﺔ ﻏﺎﻟﺒﺎً ﺑﻴﺌﺎت ﺑﺮﳎﻴﺔ ﻟﺘﻮﻟﻴﺪ اﻟـ‪ – IPs‬ﻣﻦ أﻫﻢ ﻫﺬﻩ اﻟﺒﻴﺌﺎت اﻟﱪﻧﺎﻣﺞ ‪ – [367]Xilinx LogicCore‬ﻛﻤﺎ ﳝﻜﻦ أن ﻳﺘﻢ‬
‫ﻧﻘﻞ ﻫﺬﻩ اﻟـ‪ IPs‬واﺳﺘﺨﺪاﻣﻬﺎ ﰲ ﺷﺮاﺋﺢ ﺷﺮﻛﺎت أﺧﺮى‪ .‬اﻟﺸﻜﻞ‪ 71-2‬ﻳﺒﲔ ﺗﻮﻟﻴﺪ وﺣﺪة ﺑﺮﳎﻴﺔ ﻟﱰﺷﻴﺢ اﻟﺼﻮر اﻟﺮﻗﻤﻴﺔ ) ‪LogiCORE IP‬‬

‫‪ (Image Noise Reduction‬ﺑﺎﺳﺘﺨﺪام اﻟﺒﻴﺌﺔ ‪.LogicCore‬‬

‫اﻟﺸﻜﻞ‪ 71-2‬ﺗﻮﻟﻴﺪ ‪ IP‬ﳐﺼﺺ ﻟﺘﺨﻔﻴﺾ ﺿﺠﻴﺞ اﻟﺼﻮر ﺑﺎﺳﺘﺨﺪام ﺑﺮﻧﺎﻣﺞ ‪LogicCore‬‬

‫‪ 11-6-3-4-8-2‬اﻟﻌﻨﺎﺻﺮ اﳌﻨﻄﻘﻴﺔ اﳌﺨﺼﺼﺔ )‪:(Dedicated Logic‬‬

‫إﺿﺎﻓﺔً إﱃ ﻣﺎ ذﻛﺮﻧﺎ ﻣﻦ اﻟﻌﻨﺎﺻﺮ اﻷﺳﺎﺳﻴﺔ اﳌﻜﻮﻧﺔ ﻟﺒﻨﻴﺔ اﻟـ‪ ،FPGA‬ﻓﺈن ﺷﺮاﺋﺢ اﻟـ‪ FPGA‬ﲢﻮي ﻋﻠﻰ ﻋﻨﺎﺻﺮ ﻣﻨﻄﻘﻴﺔ ﻣﺒﻨﻴﺔ ﰲ اﻟﻜﻴﺎن‬
‫اﻟﺼﻠﺐ ﻟﻠﺸﺮﳛﺔ اﻟﺴﻴﻠﻴﻜﻮﻧﻴﺔ وﻣﻜﺮﺳﺔ ﻟﻌﻤﻴﺎت ﻣﻨﻄﻘﻴﺔ ﺧﺎﺻﺔ ﺑﺎﻟﻌﻨﺎﺻﺮ اﻷﺳﺎﺳﻴﺔ‪ .‬ﻫﺬﻩ اﻟﻌﻨﺎﺻﺮ ﻫﻲ‪:‬‬

‫• ‪ :Multiplexer Logic‬ﺗﻘﻮم ﻋﻠﻰ اﻟﻮﺻﻞ ﺑﲔ اﻟـ‪ LUTs‬واﻟـ‪.Slices‬‬

‫• ‪ :Carry Chains‬ﺗﺴﺎﻋﺪ ﰲ ﺗﺴﺮﻳﻊ اﻟﻌﻤﻠﻴﺎت اﻟﺮﻳﺎﺿﻴﺔ‪.‬‬
‫• ‪ :Multiplier AND gate‬ﺗﺴﺎﻋﺪ ﰲ ﺗﺴﺮﻳﻊ ﻋﻤﻠﻴﺎت اﻟﻀﺮب ﻟﻠﻀﻮارب اﳌﺒﻨﻴﺔ ﺑﺎﻻﻋﺘﻤﺎد ﻋﻠﻰ وﺣﺪات اﻟـ‪.LUT‬‬
‫• ‪ :Shift Register LUT‬ﻣﺴﺠﻼت إﺿﺎﻓﻴﺔ ﻳﺘﻢ ﺑﻨﺎؤﻫﺎ ﺑﺎﻻﻋﺘﻤﺎد ﻋﻠﻰ وﺣﺪات اﻟـ‪.LUT‬‬
‫‪135‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 Field Programmable Gate Arrays | ً‫اﳌﺼﻔﻮﻓﺎت اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎ‬

.FPGA‫ ﻳﺒﲔ ﲤﺜﻴﻼً ﺷﺎﻣﻼً ﻟﻠﻤﺼﺎدر اﳌﺘﻮﻓﺮة ﻋﻠﻰ ﺷﺮاﺋﺢ اﻟـ‬72-2‫اﻟﺸﻜﻞ‬

CLB PCIe Interface

BlockRAM Tri-mode EMAC

DSP Slices System Monitor

DCM Hardened M Controller

Parallel I/O 3.3 Volt I/O

HSS Transceivers FIFO Logic

FPGA‫ ﳐﻄﻂ ﺷﺎﻣﻞ ﻟﻠﻤﺼﺎدر اﻟﱵ ﺗﺘﻮﻓﺮ ﻋﻠﻰ ﺷﺮاﺋﺢ اﻟـ‬72-2‫اﻟﺸﻜﻞ‬

:(FPGA Design Flow Process) FPGA‫ ﻣﺮاﺣﻞ ﺗﺼﻤﻴﻢ وﺑﺮﳎﺔ اﻟـ‬7-3-4-8-2

‫ إﻻ أ�ﺎ أﻛﺜﺮ‬،‫ ﺗﺸﺎﺑﻪ إﱃ ﺣﺪ ﻣﺎ ﻋﻤﻠﻴﺔ ﺑﺮﳎﺔ اﳌﺘﺤﻜﻤﺎت واﳌﻌﺎﳉﺎت اﳌﺼﻐﺮة‬FPGA‫ﺑﺸﻜﻞ ﻋﺎم ﻓﺈن ﻣﺮاﺣﻞ ﺗﺼﻤﻴﻢ وﺑﺮﳎﺔ ﺷﺮاﺋﺢ اﻟـ‬
:[368]‫ﺗﻌﻘﻴﺪاً وﺗﺘﻄﻠﺐ ﺳﺘﺔ ﻣﺮاﺣﻞ أﺳﺎﺳﻴﺔ وﻫﻲ‬
Functional Description .1
Logic Synthesis .2
Technology Mapping .3
Placement .4
Routing .5
Bitstream Generation .6

‫ ﲟﺎ ﰲ ذﻟﻚ‬FPGA‫ ﻳﺒﲔ ﲤﺜﻴﻼً ﳌﺮاﺣﻞ ﺗﺼﻤﻴﻢ وﺑﺮﳎﺔ ﺷﺮاﺋﺢ اﻟـ‬74-2‫ اﻟﺸﻜﻞ‬.‫ ﻳﺒﲔ اﳌﺨﻄﻂ اﻟﺼﻨﺪوﻗﻲ ﳌﺮاﺣﻞ اﻟﺘﺼﻤﻴﻢ‬73-2‫اﻟﺸﻜﻞ‬
.‫ﻣﺮاﺣﻞ اﻟﺘﺤﻠﻴﻞ واﻟﺘﺤﻘﻖ ﻣﻦ ﺳﻠﻮك اﻟﻨﻈﺎم‬

Implementation
Functional Synthesis & Generating
Description Optimization Mapping Placement Routing Bitstream

Behavioral Functional Timing

Simulation Simulation Analysis

FPGA‫ اﳌﺨﻄﻂ اﻟﺼﻨﺪوﻗﻲ ﳌﺮاﺣﻞ ﺗﺼﻤﻴﻢ أﻧﻈﻤﺔ اﻟـ‬73-2‫اﻟﺸﻜﻞ‬

Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages 136
‫‪2‬‬ ‫اﻟﻔﺼﻞ اﻟﺜﺎﱐ | ‪Chapter 2‬‬

‫اﻟﺘﻮﺻﻴﻒ اﻟﻮﻇﻴﻔﻲ )‪:(Functional Description‬‬ ‫‪1-7-3-4-8-2‬‬

‫وﺗﺪﻋﻰ أﻳﻀﺎً ﺑـ‪ .Design Entry‬ﰲ ﻫﺬﻩ اﳌﺮﺣﻠﺔ ﻳﺘﻢ وﺻﻒ ﺳﻠﻮك أو ﻋﻤﻞ اﻟـ‪ FPGA‬ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت وﺻﻒ اﻟﻜﻴﺎن اﻟﺼﻠﺐ]‪ [369‬ﻣﺜﻞ‪:‬‬
‫‪ ،VHDL, Verilog‬واﻟﱵ ﺗﻘﻮم ﻋﻠﻰ وﺻﻒ اﻟﺴﻠﻮك اﻟﻮﻇﻴﻔﻲ اﳌﻄﻠﻮب ﻣﻦ اﻟﻜﻴﺎن اﻟﺼﻠﺐ ﻋﻠﻰ اﳌﺴﺘﻮى "‪Resistor-) "RTL‬‬

‫‪.(Transistor Logic‬‬

‫اﻟﱰﲨﺔ وﲢﻘﻴﻖ اﻷﻣﺜﻠﻴﺔ )‪:(Logic Synthesis & Optimization‬‬ ‫‪2-7-3-4-8-2‬‬

‫ﺗﺘﺄﻟﻒ ﻫﺬﻩ اﳌﺮﺣﺔ ﻣﻦ ﻣﺮﺣﻠﺘﲔ ﻣﺮﺗﺒﻄﺘﲔ‪ :‬ﺗﻮﻟﻴﺪ اﻟ ـ‪ Netlist‬واﻟﺬي ﻫﻮ ﺧﺮج ﻫﺬﻩ اﳌﺮﺣﻠﺔ وﻫﻮ اﳌﺴﺘﻮى اﻷﻋﻠﻰ اﳌﺴﻤﻰ ﺑـ‪،Logic Gate‬‬
‫وﲢﻘﻴﻖ اﻷﻣﺜﻠﻴﺔ )‪(Optimization‬؛ وﺑﺎﻟﺘﺎﱄ ﻳﺘﻢ ﲢﻮﻳﻞ اﻟﻮﺻﻒ اﻟﺴﻠﻮﻛﻲ ﻷداء اﻟﻜﻴﺎن اﻟﺼﻠﺐ ﻟﻠـ‪ – FPGA‬اﻟﺬي ﰎ ﻛﺘﺎﺑﺘﻪ ﺑﺎﺳﺘﺨﺪام‬
‫ﻟﻐﺔ وﺻﻒ اﻟﻜﻴﺎن اﻟﺼﻠﺐ – إﱃ ﳎﻤﻮﻋﺔ ﻣﻦ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﳌﺘﺼﻠﺔ ﻣﻊ ﺑﻌﻀﻬﺎ اﻟﺒﻌﺾ‪ ،‬ﻛﻤﺎ ﻳﺘﻢ ﺑﻌﺪ ذﻟﻚ ﲢﻘﻴﻖ اﻷﻣﺜﻠﻴﺔ ﻋﻠﻰ ﻣﺴﺘﻮى‬
‫اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ‪ ،‬وﻫﻨﺎ ﻳﻮﺟﺪ ﻗﺎﻋﺪة أﺳﺎﺳﻴﺔ ﳌﺴﺎﺋﻞ اﻷﻣﺜﻠﻴﺔ‪ ،‬وﻫﻲ أن اﻟﺴﺮﻋﺔ ﺗﺘﻨﺎﺳﺐ ﻋﻜﺴﺎً ﻣﻊ ﻋﺪد اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ‪ ،‬ﻋﻠﻰ ﺳﺒﻴﻞ اﳌﺜﺎل‬
‫ﳝﻜﻦ اﳊﺼﻮل ﻋﻠﻰ دارات ﻣﻨﻄﻘﻴﺔ ﺳﺮﻳﻌﺔ ﺟﺪاً داﺧﻞ ﺷﺮﳛﺔ اﻟـ‪ ،FPGA‬وﻟﻜﻦ ﻫﺬا ﺳﻮف ﻳﺘﻄﻠﺐ ﻋﺪد أﻛﱪ ﻣﻦ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ ﻟﺘﺤﻘﻴﻖ‬
‫ذﻟﻚ‪ .‬وﻋﻠﻰ اﻟﻨﻘﻴﺾ ﳝﻜﻦ ﺗﻘﻠﻴﺺ ﻋﺪد اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ ﻋﻠﻰ ﺣﺴﺎب اﻟﺴﺮﻋﺔ]‪ .[370‬ﻋﻠﻰ ﻛﻞ ﺣﺎل ﻓﺈن ﻣﻌﻈﻢ أدوات اﻟﺘﺼﻤﻴﻢ اﳋﺎﺻﺔ‬
‫ﺑﺎﻟـ‪ FPGA‬ﺗﻌﻄﻲ إﻣﻜﺎﻧﻴﺔ ﲢﺪﻳﺪ ﻣﺴﺘﻮى اﻷﻣﺜﻠﻴﺔ اﳌﻄﻠﻮب ﻣﻦ اﻟﱪﻧﺎﻣﺞ ﲢﻘﻴﻘﻪ )‪.(Speed vs. Area‬‬

‫اﻟﺸﻜﻞ‪ 74-2‬ﻣﺮاﺣﻞ ﺗﺼﻤﻴﻢ وﺑﺮﳎﺔ ﺷﺮاﺋﺢ اﻟـ‪FPGA‬‬

‫‪137‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫اﳌﺼﻔﻮﻓﺎت اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً | ‪Field Programmable Gate Arrays‬‬

‫)‪:(Technology Mapping‬‬ ‫‪3-7-3-4-8-2‬‬

‫ﺗﻌﺘﱪ ﻫﺬﻩ اﳌﺮﺣﻠﺔ اﳋﻄﻮة اﻷوﱃ ﰲ ﻣﺮﺣﻠﺔ ﺑﻨﺎء اﻟﺘﺼﻤﻴﻢ )‪ .(Design Implementation‬ﰲ ﻫﺬﻩ اﳌﺮﺣﻠﺔ ﻳﺘﻢ ﻓﺼﻞ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ‬
‫اﳌﻮﺻﻮﻓﺔ ﰲ ﻣﻠﻒ اﻟـ‪ netlist‬إﱃ ﳎﻤﻮﻋﺎت ﻛﺘﻞ ﻣﻨﻄﻘﻴﺔ )‪ (LBs‬ﲝﻴﺚ ﺗﻨﺎﺳﺐ ﺑﻨﻴﺔ وﻣﻮارد ﺷﺮﳛﺔ اﻟـ‪ FPGA‬اﻟﻨﻬﺎﺋﻴﺔ‪ .‬ﻓﻤﺜﻼً‪ :‬ﻣﻦ أﺟﻞ ﻣﻠﻒ‬
‫‪ netlist‬ﻳﺼﻒ ﺳﻠﻮك دارة ﻣﻨﻄﻘﻴﺔ ﻣﺆﻟﻔﺔ ﻣﻦ ﺑﻮاﺑﺘﲔ ‪ XOR‬وﺑﻮاﺑﺘﲔ ‪ ،NAND‬ﻓﺈن ﻫﺬﻩ اﳌﺮﺣﻠﺔ ﺳﺘﻘﻮم ﻋﻠﻰ ﲢﺪﻳﺪ اﻟﻄﺮﻳﻘﺔ اﻷﻣﺜﻞ‬
‫ﻟﺘﺸﻜﻴﻞ ﳎﻤﻮﻋﺔ ﺗﻀﻢ ﻫﺬﻩ اﻟﺒﻮاﺑﺎت اﻷرﺑﻌﺔ وﻓﻘﺎً ﻟﻨﻮع وﻣﻮارد اﻟﺸﺮﳛﺔ اﶈﺪدة‪ .‬ﺑﺎﳋﻼﺻﺔ‪ :‬ﻓﺈن ﻫﺬﻩ اﳌﺮﺣﻠﺔ ﻣﺮﺗﺒﻄﺔ ﲤﺎﻣﺎً ﺑﻨﻮع ﺷﺮﳛﺔ‬
‫اﻟـ‪ FPGA‬اﶈﺪدة‪ ،‬وذﻟﻚ ﲞﻼف ﻣﺮﺣﻠﺔ اﻟﱰﲨﺔ واﻟﱵ ﻫﻲ ﻣﺮﺣﻠﺔ ﻣﺴﺘﻘﻠﺔ ﻻ ﺗﺮﺗﺒﻂ ﺑﺄي ﺗﻘﻨﻴﺔ أو ﺷﺮﳛﺔ ﻛﻴﺎن ﺻﻠﺐ‪.‬‬

‫ﺗﻮﺿﻊ اﻟﻮﺣﺪات اﳌﻨﻄﻘﻴﺔ )‪:(Placement‬‬ ‫‪4-7-3-4-8-2‬‬

‫ﺗﻌﺘﱪ ﻫﺬﻩ اﳌﺮﺣﻠﺔ اﳋﻄﻮة اﻟﺜﺎﻧﻴﺔ ﰲ ﻣﺮﺣﻠﺔ ﺑﻨﺎء اﻟﺘﺼﻤﻴﻢ ﺣﻴﺚ ﻳﺘﻢ ﺗﻌﻴﲔ ﻣﺎ اﺠﻤﻟﻤﻮﻋﺎت اﳌﻨﻄﻘﻴﺔ )اﻟﱵ ﰎ ﲢﺪﻳﺪﻫﺎ ﰲ ﻣﺮﺣﻠﺔ‬
‫اﻟـ‪ (Mapping‬إﱃ اﻟﻜﺘﻞ اﳌﻨﻄﻘﻴﺔ اﶈﺪدة واﳌﺘﻮﻓﺮة إﱃ اﻟﺸﺮﳛﺔ‪.‬‬

‫ﲢﺪ أﻛﱪ ﰲ ﻣﺴﺎﺋﻞ وأﲝﺎث ﺑﺮﳎﺔ ﺷﺮاﺋﺢ اﻟـ‪ ،FPGA‬وذﻟﻚ ﻟﻠﻌﺪد اﻷﺳﻲ‬ ‫ﺗﻌﺘﱪ ﻫﺬﻩ اﳌﺮﺣﻠﺔ ﻣﻦ اﳌﺮاﺣﻞ اﻟﱵ ﳍﺎ اﻋﺘﺒﺎر ﻛﺒﲑ‪ ،‬وﺗﺸﻜﻞ ٍ‬
‫ٍ‬
‫ﻋﻨﺪﺋﺬ ﻟﺪﻳﻨﺎ ‪ n‬اﺣﺘﻤﺎل‬ ‫ﻻﺣﺘﻤﺎﻻت اﻟﺘﻮﺿﻊ ﻟﻠﻮﺣﺪات اﳌﻨﻄﻘﻴﺔ]‪ ،[371,372‬وﺑﺎﻟﺘﺎﱄ إذا ﻛﺎﻧﺖ ﺷﺮﳛﺔ اﻟـ‪ FPGA‬ﲤﻠﻚ "‪ "n‬ﻛﺘﻠﺔ ﻣﻨﻄﻘﻴﺔ‪ ،‬ﻓﺈﻧﻪ‬
‫ﻟﺘﻮﺿﻊ اﻟﻮﺣﺪات اﳌﻨﻄﻘﻴﺔ ﰲ اﻟﻜﺘﻞ اﳌﻨﻄﻘﻴﺔ ﻟﺸﺮﳛﺔ اﻟـ‪.FPGA‬‬

‫)‪:(Routing‬‬ ‫‪5-7-3-4-8-2‬‬

‫ﺗﻌﺘﱪ ﻫﺬﻩ اﳌﺮﺣﻠﺔ اﳋﻄﻮة اﻟﺜﺎﻟﺜﺔ ﰲ ﻣﺮﺣﻠﺔ ﺑﻨﺎء اﻟﺘﺼﻤﻴﻢ ﺣﻴﺚ ﻳﺘﻢ ﲢﺪﻳﺪ اﻟﻮﺻﻼت اﻷﻣﺜﻠﻴﺔ ﺑﲔ اﻟﻜﺘﻞ اﳌﻨﻄﻘﻴﺔ ﻋﻠﻰ ﺷﺮﳛﺔ اﻟـ‪،FPGA‬‬
‫ﺗﻌﺘﱪ ﺧﻮارزﻣﻴﺔ "‪ [373]"Simulated Annealing‬وﺧﻮارزﻣﻴﺔ "‪ [374]"Partitioning‬ﻣﻦ ﺧﻮارزﻣﻴﺎت اﻟﺘﻮﺻﻴﻞ اﻷﺷﻬﺮ واﻟﱵ ﺗﺴﺘﺨﺪم ﻣﻦ‬
‫ﻗﺒﻞ ﺷﺮﻛﺔ ‪ Altera‬وﺷﺮﻛﺔ ‪.Xilinx‬‬

‫)‪:(Bitstream Generation‬‬ ‫‪6-7-3-4-8-2‬‬

‫وﻫﻲ اﳌﺮﺣﻠﺔ اﻷﺧﲑة اﻟﱵ ﻳﺘﻢ ﻓﻴﻬﺎ ﺗﻮﻟﻴﺪ اﳌﻠﻒ اﻟﱪﳎﻲ اﻟﺬي ﻳﻌﲔ اﻟﻜﺘﻞ اﳌﻨﻄﻘﻴﺔ واﻟﻮﺻﻼت ﻓﻴﻬﺎ ﺑﻴﻨﻬﺎ‪ ،‬وذﻟﻚ ﺑﻨﺎءً ﻋﻠﻰ اﻟﻮﺻﻒ اﻟﺬي ﰎ‬
‫ﻛﺘﺎﺑﺘﻪ ﰲ اﳌﺮﺣﻠﺔ اﻷوﱃ )‪ ،(Functional Description‬واﻟﺬي ﻳﺘﻢ ﲢﻮﻳﻠﻪ ﻓﻴﻤﺎ ﺑﻌﺪ إﱃ اﳌﻠﻒ ـ‪ Bitstream‬اﻟﺬي ﳝﻜﻦ ﺑﺮﳎﺘﻪ ﻋﻠﻰ‬
‫ﺷﺮﳛﺔ اﻟـ‪ FPGA‬ﺑﺎﺳﺘﺨﺪام ﻣﱪﳎﺔ ﺧﺎﺻﺔ]‪.[375‬‬

‫ﻣﺼﻔﻮﻓﺔ اﻷﻏﺮاض اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ‪:(Field Programmable Object Array) FPOA‬‬ ‫‪4-4-8-2‬‬

‫وﻫﻲ ﺗﺸﺒﻪ إﱃ ﺣﺪ ﻛﺒﲑ ﺗﻘﻨﻴﺔ اﻟـ‪ FPGA‬إﻻ أﻧﻪ ﰎ اﺳﺘﺒﺪال وﺣﺪات اﻟـ‪CLB‬‬ ‫]‪[376‬‬
‫ﰎ ﺗﻄﻮﻳﺮ ﻫﺬﻩ اﻟﺘﻘﻨﻴﺔ ﻣﻦ ﻗﺒﻞ ﺷﺮﻛﺔ ‪Mathstar‬‬
‫ﺑﻮﺣﺪات ‪ .ALU‬ﺗﺘﻤﻴﺰ ﺷﺮاﺋﺢ اﻟـ‪ FPOA‬ﺑﺄداء ٍ‬
‫ﻋﺎل وﺗﻌﻤﻞ ﻋﻨﺪ ﺗﺮددات ﻋﺎﻟﻴﺔ ﺗﺼﻞ إﱃ ‪ 1GHz‬وﻳﺘﻢ ﺑﺮﳎﺘﻬﺎ ﻋﻠﻰ ﻣﺴﺘﻮى اﻟـ‪.Objects‬‬
‫ﺗﻌﺘﱪ ﻫﺬﻩ اﻟﺘﻘﻨﻴﺔ اﳊﻞ اﻷﻣﺜﻞ ﻟﺘﻄﺒﻴﻘﺎت ﻣﻌﺎﳉﺔ اﻟﺼﻮر ﻋﺎﻟﻴﺔ اﻟﺪﻗﺔ وﻓﺎﺋﻘﺔ اﻟﺴﺮﻋﺔ‪.‬‬

‫ﺗﺘﻜﻮن ﺷﺮاﺋﺢ اﻟـ‪ FPOA‬ﻣﻦ ﻣﺼﻔﻮﻓﺔ ﺛﻨﺎﺋﻴﺔ ﻣﻦ ‪ (SOs) Silicon Objects‬واﻟﱵ ﻫﻲ ﻋﺒﺎرة ﻋﻦ وﺣﺪات ﻗﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺑﻌﺮض ‪16-bit‬‬

‫وﺗﺘﻜﻮن ﻣﻦ‪،ALUs (Arithmetic Logic Units) | MACs (Multiply-Accumulators) RFs (Register Files) :‬‬
‫إﺿﺎﻓﺔً إﱃ اﻟﻮﺻﻼت اﻟﱵ ﺗﺮﺑﻂ ﻫﺬﻩ اﻟﻮﺣﺪات‪ ،‬ﺎ أن ﻛﻼً ﻣﻦ ﻫﺬﻩ اﻟﻮﺻﻼت واﺠﻤﻟﻤﻮﻋﺎت )‪ (SOs‬ﻫﻮ ﻗﺎﺑﻞ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً‪ .‬ﺗﺘﻢ ﺑﺮﳎﺔ‬
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2 Chapter 2 | ‫اﻟﻔﺼﻞ اﻟﺜﺎﱐ‬

‫ ﻳﺒﲔ‬9-2‫ اﳉﺪول‬.‫ ﻣﻜﻮﻧﺎﻬﺗﺎ‬FPOA‫ ﻳﺒﲔ ﳐﻄﻂ اﻟﺒﻨﻴﺔ اﻟﻌﺎﻣﺔ ﻟﺸﺮاﺋﺢ اﻟـ‬75-2‫ اﻟﺸﻜﻞ‬.SystemC ‫ ﺑﺎﺳﺘﺨﺪام ﻟﻐﺔ‬FPOA‫ﺷﺮاﺋﺢ اﻟـ‬
.[377]‫ ﻣﻮاﺻﻔﺎﻬﺗﺎ‬Arrix ‫اﳌﻮارد اﻷﺳﺎﺳﻴﺔ ﻋﻠﻰ اﻟﺸﺮﳛﺔ‬

Arrix ‫ – اﻟﻌﺎﺋﻠﺔ‬FPOA‫ اﻟﺒﻨﻴﺔ اﻟﻌﺎﻣﺔ ﻟﺸﺮاﺋﺢ اﻟـ‬75-2‫اﻟﺸﻜﻞ‬

Resources Number Speed Size Total Capability

ALU 256 objects Up to 1GHz 16 bits + control logic 1-operation/clock

RF 256 objects Up to 1GHz 128 Byte + 80 tag bits 1-operation/clock

MAC 256 objects Up to 1GHz 16x16 bit multiplier 1-operation/clock

Internal RAM 12 banks Up to 500MHz 2K x 76 bits 57GBytes/sec total

External RAM 2 interfaces Up to 500MHz 36 bit RLDRAM II 5.4GBytes/sec total

GPIO 12 banks Up to 500MHz 48 pins per bank 96 pins

High Speed Transmit 2 ports 18-500MHz DDR 16 + 1 bit LVDS 32Gbps output

High Speed Receive 2 ports 18-500MHz DDR 16 + 1 bit LVDS 32Gbps output

Arrix Family Silicon ‫ ﻣﻮاﺻﻔﺎت اﳌﻮارد اﳌﺘﻮﻓﺮة ﻋﻠﻰ اﻟﺸﺮﳛﺔ‬9-2‫اﳉﺪول‬

139 ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫اﳌﺼﻔﻮﻓﺎت اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً | ‪Field Programmable Gate Arrays‬‬

‫ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت ‪:(Masked Programmable Gate Array) MPGA‬‬ ‫‪5-4-8-2‬‬

‫ﻫﺬا اﻟﻨﻮع ﻣﻦ اﻟﺘﻘﻨﻴﺔ ﰎ ﺗﻄﻮﻳﺮﻩ ﻟﻴﻀﻢ ﻋﺪد ﻛﺒﲑ ﺟﺪاً ﻣﻦ اﻟﺪارات اﳌﻨﻄﻘﻴﺔ ﻋﻠﻰ ﺷﺮﳛﺔ واﺣﺪة‪ .‬إن ﺷﺮاﺋﺢ اﻟـ‪ MPGA‬اﻟﻘﻴﺎﺳﻴﺔ ﺗﺘﻜﻮن ﻣﻦ‬
‫ﺻﻔﻮف ﻣﻦ اﻟﱰاﻧﺰﺳﺘﻮرات )ﻋﻠﻰ ﺷﻜﻞ ﻣﺼﻔﻮﻓﺔ( اﻟﱵ ﳝﻜﻦ أن ﺗﻮﺻﻞ ﻟﺘﺸﻜﻴﻞ اﻟﺪارة اﳌﻨﻄﻘﻴﺔ اﳌﻄﻠﻮﺑﺔ‪ .‬إن ﻫﺬﻩ اﻟﺸﺮاﺋﺢ ﻟﻴﺴﺖ ﻗﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ‬
‫ﻣﺒﺎﺷﺮة ﻣﻦ ﻗﺒﻞ اﳌﺴﺘﺨﺪم ﻛﻤﺎ ﻫﻮ اﳊﺎل ﰲ ﺷﺮاﺋﺢ اﻟـ‪ ،FPGA‬وإﳕﺎ ﻳﺘﻢ اﻟﺘﺼﻤﻴﻢ ﻣﻦ ﻗﺒﻞ اﳌﺴﺘﺨﺪم وﺗﺘﻢ اﻟﱪﳎﺔ ﻣﻦ ﻗﺒﻞ اﻟﺸﺮﻛﺔ اﳌﺼﻨﻌﺔ‪،‬‬
‫وﺑﺎﻟﺘﺎﱄ ﻳﻮﺟﺪ ﻛﻠﻔﺔ ﺗﺄﺳﻴﺴﻴﺔ وزﻣﻦ ﺗﺼﻨﻴﻊ‪ .‬اﻟﺸﻜﻞ‪ 76-2‬ﻳﺒﲔ اﳌﺨﻄﻂ اﻟﺴﻴﻠﻴﻜﻮﱐ اﻟﺪاﺧﻠﻲ ﻟﺸﺮاﺋﺢ اﻟـ‪.MPGA‬‬

‫اﻟﺸﻜﻞ‪ 76-2‬اﳌﺨﻄﻂ اﻟﺪاﺧﻠﻲ ﻟﺸﺮﳛﺔ اﻟـ‪MPGA‬‬

‫ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳍﺠﻴﻨﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً )‪:(Mixed-signal FPGAs‬‬ ‫‪6-4-8-2‬‬

‫ﲤﺘﻠﻚ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳍﺠﻴﻨﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﻧﻔﺲ ﺑﻨﻴﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﻟﺮﻗﻤﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً‪ ،‬إﻻ أ�ﺎ ﺗﺘﻤﻴﺰ ﺑﻮﺟﻮد‬
‫ﻄﺎﻋﺎت ﺗﺸﺎﻬﺑﻴﺔ ﻗﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ واﻟﺘﻌﺪﻳﻞ‪ ،‬وﻫﺬا ﻫﻮ ﺳﺒﺐ ﺗﺴﻤﻴﺘﻬﺎ ﺑﺎﳍﺠﻴﻨﻴﺔ‪ .‬ﻣﻦ أﺷﻬﺮ اﻟﺸﺮﻛﺎت اﳌﺼﻨﻌﺔ ﻟﺸﺮاﺋﺢ اﻟـ ‪Mixed-signal‬‬

‫‪FPGAs‬ﺷﺮﻛﺔ ‪ ،[378]Actel‬ﺣﻴﺚ ﺗﺰود ﻫﺬﻩ اﻟﺸﺮﻛﺔ ﺷﺮاﺋﺢ ﲡﻤﻊ ﺑﲔ ﺑﻨﻴﺔ اﻟـ‪ FPGA‬اﻟﱵ ﺗﻌﺘﻤﺪ ﺗﻘﻨﻴﺔ اﻟـ‪ Antifuse‬إﺿﺎﻓﺔً إﱃ ﻣﻌﺎﰿ‬
‫ﻣﺼﻐﺮ ذو ﻧﻮاة ‪ ARM‬ﻗﻄﺎﻋﺎت ﺗﺸﺎﻬﺑﻴﺔ ﻗﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ‪.‬‬

‫ﻮي اﻟﻘﻄﺎﻋﺎت اﻟﺘﺸﺎﻬﺑﻴﺔ ﻋﻠﻰ ﻛﺘﻞ ‪ (Signal Conditioning Blocks) SCBs‬ﺗﻘﻮم ﻋﻠﻰ ﻣﻼﺋﻤﺔ اﻹﺷﺎة اﻟﺘﺸﺎﻬﺑﻴﺔ ﻋﻠﻰ اﳌﺪاﺧﻞ‬
‫واﳌﺨﺎرج ﻟﺘﺸﺎﻬﺑﻴﺔ ﻟﻠﺸﺮﳛﺔ‪ .‬ﻛﻤﺎ ﲢﻮي ﻋﻠﻰ وﺣﺪات ﻣﺮاﻗﺒﺔ ﻟﻠﺠﻬﻮد واﻟﺘﻴﺎرات واﳊﺮارة‪ ،‬إﺿﺎﻓﺔ إﱃ وﺣﺪة ‪Analog Compute ) ACE‬‬

‫‪ (Engine‬واﻟﱵ ﺗﻮم ﻋﻠﻰ ﻬﺗﻴﺌﺔ وﻣﻌﺎﳉﺔ وﺣﺪات اﻟـ‪ DAC, ADC, SCBs‬ﺑﺪف ﲣﻔﻴﻒ اﳊﻤﻞ ﻋﻦ اﳌﻌﺎﰿ‪ .‬أﻳﻀﺎً ﲢﻮي ﻫﺬﻩ‬
‫ﻟﻘﻄﺎﻋﺎت ﻋﻠﻰ ﻣﺒﺪﻻت إﺷﺎرة وﻣﻘﺎرﻧﺎت ﺗﺸﺎﻬﺑﻴﺔ‪ .‬اﻟﺸﻜﻞ‪ 77-2‬ﻳﺒﲔ ﳐﻄﻂ ﺗﻮﺿﻊ اﻟﻮﺣﺪات واﻟﻜﺘﻞ اﳌﻨﻄﻘﻴﺔ اﻟﺘﺸﺎﻬﺑﻴﺔ ﻋﻠﻰ اﳌﺴﺘﻮى‬
‫اﻟﺴﻴﻠﻴﻜﻮﱐ ﻟﻠﺸﺮاﺋﺢ ‪ .[379]SmartFusion‬اﻟﺸﻜﻞ‪ 78-2‬ﻳﺒﲔ اﳌﺨﻄﻂ اﻟﺼﻨﺪوﻗﻲ ﻟﻌﻨﺎﺻﺮ اﻟﺸﺮاﺋﺢ اﳍﺠﻴﻨﺔ ‪Actel SmartFusion‬‬

‫وﻃﺮﻳﻘﺔ ارﺗﺒﺎﻃﻬﺎ داﺧﻠﻴﺎً‪.‬‬

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‫‪2‬‬ ‫اﻟﻔﺼﻞ اﻟﺜﺎﱐ | ‪Chapter 2‬‬

‫اﻟﺸﻜﻞ‪ 77-2‬ﻄﻂ ﺗﻮﺿﻊ اﻟﻮﺣﺪات واﻟﻜﺘﻞ اﳌﻨﻄﻘﻴﺔ واﻟﺘﺸﺎﻬﺑﻴﺔ ﻋﻠﻰ ﺷﺮاﺋﺢ ‪Actel SmartFusion‬‬

‫اﻟﺸﻜﻞ‪ 78-2‬اﳌﺨﻄﻂ اﻟﺼﻨﺪوﻗﻲ ﻟﻌﻨﺎﺻﺮ اﻟﺸﺮاﺋﺢ اﳍﺠﻴﻨﺔ ‪Actel SmartFusion‬‬

‫‪141‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫اﳌﺼﻔﻮﻓﺎت اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً | ‪Field Programmable Gate Arrays‬‬

‫اﻟﺨﻼﺻﺔ )‪:(Conclusion‬‬ ‫‪9-2‬‬

‫إن ﺗﻘﻨﻴﺔ ﻣﺼﻔﻮﻓﺎت اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً )‪ (FPGA‬ﺗﻌﺘﱪ اﻟﺘﻘﻨﻴﺔ اﻟﱵ ﲢﺘﻞ أﻋﻠﻰ اﻷوﻟﻮﻳﺎت ﻛﺤﻞ ﺗﻜﻨﻮﻟﻮﺟﻲ ﻣﺮﺣﻠﻲ‬
‫وﻣﺴﺘﻘﺒﻠﻲ ﳌﻌﻈﻢ ﺗﻄﺒﻴﻘﺎت اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ ﺑﻜﺎﻓﺔ ﻓﺮوﻋﻬﺎ‪ ،‬ﻣﻦ ﺗﻄﺒﻴﻘﺎت ﺻﻨﺎﻋﻴﺔ وﻃﺒﻴﺔ وﻋﺴﻜﺮﻳﺔ وﺧﺪﻣﻴﺔ وﻏﲑﻫﺎ‪ ،‬وذﻟﻚ ﻧﻈﺮاً ﻟﻠﻤﺮوﻧﺔ‬
‫اﻟﻜﺒﲑة ﰲ إﻋﺎدة ﺗﺸﻜﻴﻞ اﻟﻜﻴﺎن اﻟﺼﻠﺐ ﳍﺬﻩ اﻟﺘﻘﻨﻴﺔ‪ ،‬إﺿﺎﻓﺔً إﱃ ﺳﻌﺔ اﳌﻌﺎﳉﺔ اﻟﻌﺎﻟﻴﺔ‪ ،‬وﻗﺎﺑﻠﻴﺔ إﻋﺎدة اﺳﺘﺨﺪام اﻟﻮﺣﺪات اﻟﱪﳎﻴﺔ "‪،"IPs‬‬
‫وﻏﲑﻫﺎ ﻣﻦ اﳌﻴﺰات اﻟﱵ ﻛﺎﻧﺖ ﺳﺒﺒﺎً ﰲ ﺟﻌﻞ ﻫﺬﻩ اﻟﺘﻘﻨﻴﺔ اﳊﻞ اﻟﺒﺪﻳﻞ ﻟﺘﻘﻨﻴﺎت ﻋﺪﻳﺪة ﺳﺎدت ﻟﻌﻘﻮد ﻣﻦ اﻟﺰﻣﻦ ﻣﺜﻞ‪ :‬اﻟـ ‪DSPs, ASICs,‬‬

‫‪.SoCs, ASSPs‬‬

‫وﻋﻠﻴﻪ‪ ،‬وﻧﻈﺮاً ﻟﻠﺘﻮﺟﻪ اﻟﺘﻜﻨﻮﻟﻮﺟﻲ اﻟﻜﺒﲑ اﻟﺬي ﲢﺘﻠﻪ ﺗﻘﻨﻴﺔ اﻟـ‪ FPGA‬واﻟﺘﻄﻮر اﳌﺘﺴﺎرع ﳍﺬﻩ اﻟﺘﻘﻨﻴﺔ‪ ،‬ﻓﺈن اﻟﻌﺪﻳﺪ ﻣﻦ اﻷﲝﺎث ﺗﻮﻛﺪ ﻋﻠﻰ أﻧﻪ‬
‫ﻣﻦ اﻟﻀﺮوري أن ﺗﻨﻌﻜﺲ ﻫﺬﻩ اﻻﲡﺎﻫﺎت اﻟﺘﻜﻨﻮﻟﻮﺟﻴﺔ اﳉﺪﻳﺪة ﺣﻘﻴﻘﺔ ﻋﻤﻠﻴﺔ ﰲ اﻷﻧﺸﻄﺔ اﻟﱰﺑﻮﻳﺔ‪ ،‬وذﻟﻚ ﻣﻦ ﺧﻼل ﺗﺒﲏ ﻣﻨﺎﻫﺞ ﺗﻌﻠﻴﻤﻴﺔ‬
‫ﺗﻮاﻓﻖ ﻣﺘﻄﻠﺒﺎت اﻟﺘﻘﺪم اﻟﺘﻜﻨﻮﻟﻮﺟﻲ‪ ،‬وﺑﺎﻟﺘﺎﱄ ﻓﺈﻧﻪ ﻣﻦ اﻟﻀﺮوري وﺟﻮد ﻣﺮاﺟﻌﺔ وﺗﻄﻮﻳﺮ ﻣﺴﺘﻤﺮ ﻟﻠﻤﻨﺎﻫﺞ اﻟﺪراﺳﻴﺔ اﳉﺎﻣﻌﻴﺔ‪ ،‬ﺗﺪف إﱃ دﻣﺞ‬
‫اﻟﺘﻄﻮرات اﳉﺪﻳﺪة ﻟﺘﻘﻨﻴﺔ اﻟـ‪ FPGAs‬أدواﻬﺗﺎ‪.‬‬

‫ﺗﺴﺘﺨﺪم ﺗﻘﻨﻴﺔ اﻟـ‪ FPGA‬ﻛﻤﻨﺼﺎت ﺗﺼﻤﻴﻢ أوﻟﻴﺔ ﻟﺘﻘﻨﻴﺔ اﻟـﺪارات اﳌﺘﻜﺎﻣﻠﺔ ﻣﺘﺨﺼﺼﺔ اﻟﺘﻄﺒﻴﻘﺎت‪ ،‬واﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ ﻋﻠﻰ ﺷﺮاﺋﺢ‪ ،‬واﻟﻌﺪﻳﺪ‬
‫ﻣﻦ اﻷﻧﻈﻤﺔ اﻷﺧﺮى‪ ،‬ﻛﺬﻟﻚ ﺗﺴﺘﺨﺪم ﻛﻮﺳﻴﻠﺔ ﺗﻌﻠﻴﻤﻴﺔ أﺳﺎﺳﻴﺔ ﰲ اﳌﺨﺘﱪات اﳉﺎﻣﻌﻴﺔ ﻟﺘﻌﻠﻴﻢ اﻟﻄﻼب ﻣﺒﺎدئ ﺗﺼﻤﻴﻢ اﻟﺪارات اﳌﻨﻄﻘﻴﺔ‪،‬‬
‫ﺗﺼﻤﻴﻢ اﻷﻧﻈﻤﺔ اﻟﺮﻗﻤﻴﺔ‪ ،‬ﺗﺼﻤﻴﻢ أﻧﻈﻤﺔ اﻟﺰﻣﻦ اﳊﻘﻴﻘﻲ‪ ،‬ﺑﺮﳎﺔ اﳌﻌﺎﳉﺎت اﳌﺼﻐﺮة‪ ،‬ﺗﺼﻤﻴﻢ أﻧﻈﻤﺔ ﻣﻌﺎﳉﺔ اﻹﺷﺎرة اﻟﺮﻗﻤﻴﺔ‪ .‬إن اﺳﺘﺨﺪام‬
‫اﻟـ‪ FPGA‬ﻛﻮﺳﻴﻠﺔ ﺗﻌﻠﻴﻤﺔ ﻳﺰود اﻟﻄﻼب ﺑﺎﻟﻔﺮﺻﺔ اﳌﺜﻠﻰ ﻟﻠﻌﻤﻞ ﻋﻠﻰ ﻣﺸﺎرﻳﻊ ﻫﺎدﻓﺔ ذات ﺗﻄﺒﻴﻖ واﻗﻌﻲ وذو أﺛﺮ ﻣﻠﻤﻮس‪ ،‬ﺑﺪﻻً ﻣﻦ اﺳﺘﺨﺪام‬
‫ﺑﺮاﻣﺞ اﶈﺎﻛﺎة‪.‬‬

‫ﺑﺎﻟﻨﺘﻴﺠﺔ ﻓﺈﻧﻪ ﻣﻦ اﻟﻀﺮوري ﺗﺒﲏ ﻣﻨﺎﻫﺞ ﻣﺘﺠﺪدة ﻋﻤﻠﻴﺔ‪ ،‬ات ﺻﻠﺔ ﻣﺒﺎﺷﺮة ﲝﺎﺟﺔ اﻟﺼﻨﺎﻋﺔ‪ ،‬ﻬﺗﺪف إﱃ زﻳﺎدة ﻓﺎﻋﻠﻴﺔ وﻓﺎﺋﺪة اﳋﱪة اﻟﻌﻤﻠﻴﺔ ﰲ‬
‫اﶈﺎﺿﺮات اﻟﻨﻈﺮﻳﺔ‪ ،‬وذﻟﻚ ﻣﻦ ﺧﻼل اﻋﺘﻤﺎد اﺳﱰاﺗﻴﺠﻴﺔ إﺿﺎﻓﺔ ﻣﻨﺎﻫﺞ ﺗﻌﻠﻴﻤﻴﺔ ﻟﺘﺼﻤﻴﻢ اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ ﺑﺎﺳﺘﺨﺪام ﺗﻘﻨﻴﺔ اﻟـ‪ ،FPGA‬ﲝﻴﺚ‬
‫ﺗﺮﺗﻜﺰ ﻫﺬﻩ اﻻﺳﱰاﺗﻴﺠﻴﺔ ﻋﻠﻰ ﻃﺮاﺋﻖ اﻟﺘﺼﻤﻴﻢ وأدواﺗﻪ اﻟﻌﻤﻠﻴﺔ ﺑﺪﻻً ﻣﻦ اﻟﺪﻗﺎﺋﻖ اﻟﻨﻈﺮﻳﺔ‪ ،‬ﲝﻴﺚ ﻳﻜﻮن اﻟﻄﻼب أﻗﺮب ﻣﺎ ﳝﻜﻦ إﱃ اﻷدوات‬
‫واﻻﺳﱰاﺗﻴﺠﻴﺎت اﻟﱵ ﺗﺴﺘﺨﺪم ﰲ اﻟﺼﻨﺎﻋﺔ‪ ،‬ذﻟﻚ ﻬﺑﺪف ﺗﻘﻠﻴﺺ اﻟﻔﺠﻮة ﺑﲔ اﳌﺆﺳﺴﺎت اﻟﺘﻌﻠﻴﻤﻴﺔ واﻟﺼﻨﺎﻋﺔ‪ ،‬ﻓﻼ ﻳﺒﻘﻰ اﻟﺘﺴﺎؤل اﶈﲑ ﻳﻄﺮق‬
‫ﻣﺴﺎﻣﻌﻨﺎ ﻋﻠﻰ اﻟﺪوام ﺑـﺨﻄﺎب‪" :‬ﻛﻢ ﻣﻦ اﻟﻄﻼب واﳌﻬﻨﺪﺳﲔ ﰲ ﻓﺮوع اﻟﻌﻠﻮم اﳍﻨﺪﺳﻴﺔ ﰲ ﺟﺎﻣﻌﺎﺗﻨﺎ ﻗﺎدرﻳﻦ ﻋﻠﻰ ﺗﺼﻤﻴﻢ أﻧﻈﻤﺔ‬
‫اﻟـ‪!FPGA‬؟"‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪142‬‬
 ‫اﻟﻔﺼﻞ اﻟﺜﺎﻟﺚ‬ ‫‪Chapter 3‬‬

‫‪@k‹ó€a@ÊbÓÿ€a@Ú™ãi@pbÀ‬‬

‫‪HARDWARE PROGRAMMING LANGUAGES‬‬

‫ﻧﻈﺮة ﻋﺎﻣﺔ )‪:(Overview‬‬

‫ﻳﺘﺤﺪث ﻫﺬا اﻟﻔﺼﻞ ﻋﻦ ﻟﻐﺎت ﺑﺮﳎـﺔ اﻟﻜﻴـﺎن اﻟﺼـﻠﺐ‪ ،‬وﺑﺸـﻜﻞ ﺧـﺎص ﻋـﻦ ﻟﻐـﺎت ﺑﺮﳎـﺔ اﳌﺼـﻔﻮﻓﺎت اﳌﻨﻄﻘﻴـﺔ اﻟﻘﺎﺑﻠـﺔ ﻟﻠﱪﳎـﺔ ﺣﻘﻠﻴـﺎً‪ ،‬ﺣﻴـﺚ ﻳﻘـﺪم‬
‫ﶈﺔ ﻋﺎﻣﺔ ﻋﻨﻬﺎ‪ ،‬وﻋﻦ ﺼﻨﻴﻔﺎﻬﺗﺎ‪ ،‬وﻋﻦ دواﻬﺗﺎ‪ ،‬وﻳﺪ ﱢﻋﻤﻬﺎ ﺑﺄﻣﺜﻠﺔ‪ .‬ﰒ ﻳﺒﺤﺚ ﰲ أﳘﻴﺔ ﻟﻐـﺎت ﺑﺮﳎـﺔ اﻟﻜﻴـﺎن اﻟﺼـﻠﺐ اﻟﺮﺳـﻮﻣﻴﺔ ﻛـﺄداة اﻟﻌﺼـﺮ ﰲ ﺑﺮﳎـﺔ‬
‫اﻷﻧﻈﻤــﺔ اﳌﺪﳎ ــﺔ‪ ،‬وﻳﺒــﲔ دورﻫ ــﺎ ﰲ ﺗﻌﺰﻳــﺰ اﳌﻨ ــﺎﻫﺞ اﻟﺘﻌﻠﻴﻤﻴــﺔ‪ ،‬ﰒ ﻳﺴ ــﺘﻌﺮض اﻟﺒﻴﺌــﺔ اﻟﱪﳎﻴ ــﺔ ‪ LabVIEW‬وﻓﻮاﺋــﺪ ﻟﻐ ــﺔ اﻟﱪﳎــﺔ اﻟﺮﺳ ــﻮﻣﻴﺔ “‪ ”G‬اﻟ ــﱵ‬
‫اﻋﺘﻤــﺪت ﰲ اﻟﺪراﺳــﺔ‪ ،‬وﻳﻘــﺪم ﻣﻘﺎرﻧــﺔ ﺑــﲔ اﻟﻠﻐــﺎت اﻟﺮﺳــﻮﻣﻴﺔ واﻟﻠﻐــﺎت اﻟﻨﺼــﻴﺔ ﻣــﱪزاً دور اﻟﻠﻐــﺎت اﻟﺮﺳــﻮﻣﻴﺔ ﰲ ﺗﺴـﺮﻳﻊ ﻣﺮاﺣــﻞ اﻟﺘﺼــﻤﻴﻢ واﻟﺘﻄــﻮﻳﺮ‪ .‬ﰒ‬
‫ﻳﺘﻄﺮق ﺑﺸﻜﻞ ﺧﺎص إﱃ اﺳﺘﺨﺪام اﻟﺒﻴﺌﺔ ‪ LabVIEW‬ﰲ اﳌﻨﺎﻫﺞ اﻟﺘﻌﻠﻴﻤﻴﺔ‪.‬‬

‫ﺗﻤﻬﻴﺪ )‪:(Preface‬‬ ‫‪1-3‬‬

‫إن ﻃﺮق ﺗﺼﻤﻴﻢ ﺧﻮارزﻣﻴﺎت ﺑﻨﺎء اﻟﺪارات ﺿﻤﻦ اﻟﺸﺮاﺋﺢ اﻹﻟﻜﱰوﻧﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ )‪ (FPGA‬ﻣﺘﻤﺎﺛﻠﺔ ﰲ �ﺎﻳﺔ اﳌﻄﺎف‪ ،‬وﻳﻜﻮن اﻟﻔﺮق ﺑﲔ‬
‫ﳐﺘﻠﻒ ﻫﺬﻩ اﻟﻄﺮق ﻫﻲ ﺗﻌﻘﻴﺪات ﺑﻌﺾ اﻟﻄﺮق ﰲ وﺻﻒ اﻟﻜﻴﺎن اﻟﺼﻠﺐ ﻣﻦ ﺟﻬﺔ واﻟﺘﺴﻬﻴﻼت اﻟﱵ ﺗﻘﺪﻣﻬﺎ اﻟﻄﺮق اﻷﺧﺮى ﲟﺎ ﲢﻮﻳﻬﺎ ﻣﻦ‬
‫أدوات ﻣﺴﺎﻋﺪة ﻣﻦ ﺟﻬﺔ أﺧﺮى؛ ﻓﻔﻲ اﳌﺎﺿﻲ ﻛﺎﻧﺖ ﻛﺘﺎﺑﺔ ﺧﻮارزﻣﻴﺎت ﺑﻨﺎء اﻟﺪارات ﺗﺘﻢ ﺑﺎﺳﺘﺨﺪام اﻟﻮرﻗﺔ واﻟﻘﻠﻢ )‪،(Hand-crafted‬‬
‫ﺣﻴﺚ ﻳﻘﻮم ﻓﺮﻳﻖ اﻟﻌﻤﻞ ﺑﺮﺳﻢ ﳐﻄﻂ اﳋﻮارزﻣﻴﺔ اﻟﱵ ﺳﻴﺘﻢ ﺗﻨﻔﻴﺬﻫﺎ ﻋﻠﻰ اﻟﺪارات اﳌﺘﻜﺎﻣﻠﺔ‪ ،‬وﺑﺎﻟﺘﺎﱄ ﺗﺰداد إﻣﻜﺎﻧﻴﺔ ﺣﺼﻮل اﳋﻄﺄ وﺧﺎﺻﺔ‬
‫ﻋﻨﺪﻣﺎ ﺗﺘﻌﻘﺪ اﳋﻮارزﻣﻴﺔ‪ ،‬أﻣﺎ ﰲ اﻟﻮﻗﺖ اﳊﺎﱄ وﺑﺎﻋﺘﻤﺎد اﻟﺘﺼﻤﻴﻢ ﺑﺎﺳﺘﺨﺪام اﳊﺎﺳﺐ )‪ (CAD‬ﻛﻮﺳﻴﻠﺔ ﻟﺒﻨﺎء اﳋﻮارزﻣﻴﺎت أﺻﺒﺢ اﳌﺮدود أﻋﻠﻰ‬
‫وإﻣﻜﺎﻧﻴﺔ اﳋﻄﺄ أﻗﻞ‪ .‬اﻟﺸﻜﻞ‪ 1-3‬ﻳﺒﲔ اﻟﺘﻄﻮر اﻟﺰﻣﲏ ﻟﺘﻘﻨﻴﺎت ﺗﺼﻤﻴﻢ وﺑﺮﳎﺔ أﻧﻈﻤﺔ اﻟﻜﻴﺎن اﻟﺼﻠﺐ‪.‬‬
‫‪2010's‬‬
‫‪2000's‬‬
‫‪1990's‬‬ ‫?!?‬
‫‪1980's‬‬ ‫‪System.Level‬‬
‫‪1970's‬‬ ‫‪HDL‬‬
‫‪Schematic‬‬
‫‪Hand.Craft‬‬

‫اﻟﺸﻜﻞ‪ 1-3‬اﻟﺘﻄﻮر اﻟﺰﻣﲏ ﻟﺘﻘﻨﻴﺎت ﺗﺼﻤﻴﻢ وﺑﺮﳎﺔ أﻧﻈﻤﺔ اﻟﻜﻴﺎن اﻟﺼﻠﺐ‬

‫ﳑﺎ ﻻ ﺷﻚ ﻓﻴﻪ أن ﻟﻐﺎت وﺻﻒ اﻟﻜﻴﺎن اﻟﺼﻠﺐ )‪ ،(HDLs‬ﻣﺜﻞ‪ ،VHDL, Verilog :‬ﻫﻲ أﻛﺜﺮ ﻓﻌﺎﻟﻴﺔ ﻣﻦ ﻏﲑﻫﺎ ﻣﻦ اﻟﻠﻐﺎت ﻋﻨﺪﻣﺎ‬
‫ﻳﺘﻌﻠﻖ اﻷﻣﺮ ﺑﻮﺻﻒ وﻇﺎﺋﻒ وﺳﻠﻮك اﻟﻜﻴﺎن اﻟﺼﻠﺐ‪ ،‬وﻟﻜﻦ ﻫﺬا ﻣﻦ ﺟﺎﻧﺐ آﺧﺮ ﻓﺈﻧﻪ ﳛﺘﺎج إﱃ ﻣﺴﺘﻮى ٍ‬
‫ﻋﺎل ﻣﻦ اﳋﱪة ﰲ اﻟﻜﻴﺎن اﻟﺼﻠﺐ‬
 ‫‪Hardware Programming Languages‬‬ ‫ﻟﻐﺎت ﺑﺮﳎﺔ أﻧﻈﻤﺔ اﻟﻜﻴﺎن اﻟﺼﻠﺐ |‬

‫ﻟﺘﻮﻇﻴﻒ ﻟﻐﺎت وﺻﻒ اﻟﻜﻴﺎن اﻟﺼﻠﺐ ﺑﺸﻜﻞ ﻓﻌﺎل؛ اﻟﺴﺒﺐ اﻟﺬي ﳚﻌﻞ ﻣﻄﻮري اﻟﱪاﻣﺞ اﳊﺎﺳﻮﺑﻴﺔ ﻳﻌﺎﻧﻮن ﻣﻦ ﻧﻘﺺ اﳋﱪة ﺣﻮل ﺗﻔﺎﺻﻴﻞ‬
‫وﺗﻌﻘﻴﺪات ﺗﻄﻮﻳﺮ اﻟﻜﻴﺎن اﻟﺼﻠﺐ؛ ﺎ ﳛﺪ ﻣﻦ ﻣﻘﺪرﻬﺗﻢ ﻋﻠﻰ ﺗﺼﻤﻴﻢ وﺗﻄﻮﻳﺮ ﺗﻄﺒﻴﻘﺎت اﻟﻜﻴﺎن اﻟﺼﻠﺐ ﻣﺜﻞ ﺗﻘﻨﻴﺔ اﻟـ‪.[380,381] FPGA‬‬

‫ﻟﻼﺳﺘﻔﺎدة ﻣﻦ ﻣﻬﺎرات ﻣﻄﻮري اﻟﱪﳎﻴﺎت اﳊﺎﺳﻮﺑﻴﺔ‪ ،‬واﳊﺪ ﻣﻦ ﻃﺎﺑﻊ ﺗﻌﻘﻴﺪات اﻟﻜﻴﺎن اﻟﺼﻠﺐ وﻟﻐﺎﺗﻪ‪ ،‬ﻗﺎﻣﺖ ﺷﺮﻛﺎت اﻟ ـ"‪"EDA‬‬

‫)‪ (Electronic Design Automation‬ﺑﺘﻄﻮﻳﺮ ﺑﻴﺌﺎت وأدوات ﺑﺮﳎﻴﺔ ﺗﺴﺘﺨﺪم ﻟﻐﺔ اﻟـ‪ C/C++‬اﻟﻘﻴﺎﺳﻴﺔ أو ﻟﻐﺔ اﻟـ‪ Java‬ﻟﺘﻄﻮﻳﺮ وﺑﺮﳎﺔ‬
‫أﻧﻈﻤﺔ اﻟﻜﻴﺎن اﻟﺼﻠﺐ‪ .‬ﻫﺬﻩ اﻷدوات اﻟﱪﳎﻴﺔ اﳉﺪﻳﺪة ﺗﻘﻮم ﻋﻠﻰ ﲢﻮﻳﻞ اﻟﱪﻧﺎﻣﺞ ﻣﻦ ﻟﻐﺔ ﻋﺎﻟﻴﺔ اﳌﺴﺘﻮى )‪ (high-level C++‬إﱃ ﺑﺮﻧﺎﻣﺞ‬
‫وﺻﻒ اﻟﻜﻴﺎن اﻟﺼﻠﺐ ﻣﻨﺨﻔﺾ اﳌﺴﺘﻮى )‪ (low-level HDL‬وﺗﺪﻋﻰ ﰲ أﻏﻠﺐ اﻷﺣﻴﺎن ﺑـ‪ .Mappers‬ﲤﺘﻠﻚ ﻫﺬﻩ اﻷدوات اﳌﻘﺪرة‬
‫ﻋﻠﻰ ﺗﻄﻮﻳﺮ وﻓﺺ وﺗﺘﺒﻊ أﺧﻄﺎء اﻟﱪاﻣﺞ اﻟﱵ ﻫﻲ ﻣﺸﺎﻬﺑﺔ ﺟﺪا ﻟﺒﻴﺌﺎت ﺗﻄﻮﻳﺮ اﻟﱪﳎﻴﺎت‪.‬‬

‫ﻋﻠﻰ ﺧﻼف اﻟﻠﻐﺎت ﻋﺎﻟﻴﺔ اﳌﺴﺘﻮى‪ ،‬ﻓﺈن ﻟﻐﺎت وﺻﻒ اﻟﻜﻴﺎن اﻟﺼﻠﺐ ﺗﺸﲑ ﺑﻮﺿﻮح إﱃ اﻟﺴﻠﻮك واﻻرﺗﺒﺎط اﳌﺘﺰاﻣﻦ ﺑﲔ اﻟﻜﺘﻞ اﳌﻨﻄﻘﻴﺔ ﻋﻠﻰ‬
‫اﻟﺸﺮﳛﺔ‪ ،‬وﺑﺎﻟﺘﺎﱄ ﻓﺈن ﻫﺬا اﻟﺸﻜﻞ ﻣﻦ أﺷﻜﺎل اﻟﺘﻮﺻﻴﻒ اﻟﱪﳎﻲ ﳝﺜﻞ درﺟﺔ أﺧﻔﺾ وأﻋﻘﺪ ﰲ اﳌﺴﺘﻮى اﻟﱪﳎﻲ ) ‪low-level‬‬

‫‪ (abstraction‬ﻣﻘﺎرﻧﺔ ﻣﻊ ﻟﻐﺎت ﺗﻄﻮﻳﺮ اﻟﱪﳎﻴﺎت اﳊﺎﺳﻮﺑﻴﺔ‪ .‬اﻟﺸﻜﻞ‪ 2-3‬ﻳﺒﲔ ﻫﻴﻜﻠﻴﺔ ﺑﺮﳎﺔ أﻧﻈﻤﺔ اﻟﻜﻴﺎن اﻟﺼﻠﺐ‪ .‬اﻟﺸﻜﻞ‪ 3-3‬ﻳﺒﲔ‬
‫ﻫﻴﻜﻠﻴﺔ ﺑﻨﺎء اﻟﺘﻄﺒﻴﻘﺎت اﻟﱪﳎﻴﺔ اﳊﺎﺳﻮﺑﻴﺔ‪.‬‬

‫‪Design‬‬ ‫‪Design‬‬

‫‪Implementation‬‬ ‫‪HDL Code‬‬

‫‪Edit‬‬ ‫‪Synthesis‬‬

‫‪Simulation‬‬

‫‪Compile‬‬ ‫‪Debug‬‬
‫‪Translate‬‬
‫‪Mapping + Placement + Routing‬‬

‫‪Link‬‬ ‫‪On-Chip‬‬
‫‪Debugging‬‬

‫اﻟﺸﻜﻞ‪ 3-3‬ﻫﻴﻜﻠﻴﺔ اﻟﺘﺼﻤﻴﻢ ﻟﻸﻧﻈﻤﺔ اﻟﱪﳎﻴﺔ‬ ‫اﻟﺸﻜﻞ‪ 2-3‬ﻫﻴﻜﻠﻴﺔ اﻟﺘﺼﻤﻴﻢ ﻟﻠﻜﻴﺎن اﻟﺼﻠﺐ‬

‫اﻟﺴﻌﻲ ﻧﺤﻮ ﺑﺮﻣﺠﺔ ﻋﺎﻟﻴﺔ اﻟﻤﺴﺘﻮى‪ ،‬ﻟﻤﺤﺔ ﺗﺎرﻳﺨﻴﺔ )‪:(Toward HLL, Historical Overview‬‬ ‫‪2-3‬‬

‫اﳉﺬور اﻷوﱃ ﻟﻨﺸﺄة ﻟﻐﺎت اﻟﱪﳎﺔ ﻋﺎﻟﻴﺔ اﳌﺴﺘﻮى‪ ،‬ﺣﻴﺚ أﻧﻪ ﻣﻊ إﺷﺮاﻗﺔ ﻓﺠﺮ ﻋﺼﺮ اﳊﻮﺳﺒﺔ اﳊﺪﻳﺜﺔ ﰲ ﻣﻨﺘﺼﻒ اﳋﻤﺴﻴﻨﻴﺎت ﻣﻦ اﻟﻘﺮن‬
‫اﳌﺎﺿﻲ‪ ،‬ﻛﺎن ﻓﺮﻳﻖ ﺻﻐﲑ ﻣﻦ اﻟﺒﺎﺣﺜﲔ ﰲ ﺷﺮﻛﺔ ‪ IBM‬ﻗﺪ ﻗﺮر إﳚﺎد ﺑﺪﻳﻞ آﺧﺮ ﻻﺳﺘﺨﺪام ﻟﻐﺔ اﻟﺘﺠﻤﻴﻊ ﻣﻨﺨﻔﻀﺔ اﳌﺴﺘﻮى )‪(Assembly‬‬

‫ﰲ ﺑﺮﳎﺔ اﳊﺎﺳﺐ ‪ ،IBM-704‬وﻛﺎﻧﺖ اﻟﻨﺘﻴﺠﺔ ﻇﻬﻮر ﻟﻐﺔ ‪ٌ - Fortran‬‬

‫ﺷﻜﻞ آﺧﺮ ﻣﻦ أﺷﻜﺎل ﻟﻐﺎت اﻟﱪﳎﺔ أﻛﺜﺮ ﻗﺎﺑﻠﻴﺔ ﻟﻠﻘﺮاءة واﻟﻔﻬﻢ ‪-‬‬
‫اﻟﱵ ﻬﺗﺪف ﰲ اﻷﺳﺎس إﱃ ﺗﺴﺮﻳﻊ ﻋﻤﻠﻴﺎت ﺗﻄﻮﻳﺮ اﻟﱪاﻣﺞ اﳌﺨﺘﻠﻔﺔ‪.‬‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪144‬‬
‫‪23‬‬ ‫اﻟﻔﺼﻞ اﻟﺜﺎﻟﺚ | ‪Chapter 3‬‬

‫ﺑﻌﺾ اﻟﺸﻜﻮك ﰲ ﻛﻮن ﻫﺬﻩ اﻟﻄﺮﻳﻘﺔ اﳉﺪﻳﺪة ﻗﺎدرة ﻋﻠﻰ اﻟﺘﻔﻮق ﻋﻠﻰ اﻟﱪاﻣﺞ اﳌﻜﺘﻮﺑﺔ ﻳﺪوﻳﺎً ﺑﻠﻐﺔ‬ ‫ﺪ اﻧﺘﺎب اﺠﻤﻟﺘﻤﻊ اﳍﻨﺪﺳﻲ ﰲ اﻟﺒﺪء ُ‬
‫اﻟﺘﺠﻤﻴﻊ‪ ،‬وﻟﻜﻦ ﺳﺮﻋﺎن ﻣﺎ ﺛﺒﺖ أن اﻟﱪاﻣﺞ اﳌﻜﺘﻮﺑﺔ ﺑﻠﻐﺔ ‪ Fortran‬ﻗﺎدرةٌ ﻋﻠﻰ اﻟﻌﻤﻞ ﺗﻘﺮﻳﺒﺎً ﺑﻨﻔﺲ ﻓﻌﺎﻟﻴﺔ ﺗﻠﻚ اﳌﻜﺘﻮﺑﺔ ﺑﻠﻐﺔ اﻟﺘﺠﻤﻴﻊ؛ وﰲ‬
‫ﻧﻔﺲ اﻟﻮﻗﺖ‪ ،‬اﺳﺘﻄﺎﻋﺖ ﻟﻐﺔ ‪ Fortran‬ﺗﻘﻠﻴﺺ ﻋﺪد اﻟﺘﻌﻠﻴﻤﺎت اﻟﱪﳎﻴﺔ اﳌﺴﺘﺨﺪﻣﺔ ﻟﺒﻨﺎء ﺑﺮﻧﺎﻣﺞ ﻣﺎ ﲝﻮاﱄ ﻋﺸﺮﻳﻦ ﻣﺮة‪ ،‬وﻫﺬا ﻣﺎ ﺟﻌﻠﻬﺎ‬
‫ﺗﻌﺘﱪ أوﱃ ﻟﻐﺎت اﻟﱪﳎﺔ ﻋﺎﻟﻴﺔ اﳌﺴﺘﻮى‪ ،‬وﱂ ﻳﻜﻦ ﻣﻦ اﳌﻔﺎﺟﺊ أن ﻟﻐﺔ ‪ Fortran‬ﻗﺪ ﺣﺼﻠﺖ ﺑﺴﺮﻋﺔ ﻛﺒﲑﻋﻠﻰ رﺿﻰ وﻗﺒﻮل اﺠﻤﻟﺘﻤﻊ اﻟﻌﻠﻤﻲ‬
‫ﰲ ذاك اﻟﻮﻗﺖ وﺣﱴ وﻗﺖ ﻣﺘﺄﺧﺮ‪.‬‬

‫ﺑﻌﺪ ﻧﺼﻒ ﻗﺮن‪ ،‬ﻣﺎ زﻟﻨﺎ ﻧﺴﺘﻄﻴﻊ اﺳﺘﺨﻼص اﻟﻜﺜﲑ ﻣﻦ اﻟﻌَِﱪ اﳍﺎﻣﺔ ﻣﻦ ﻫﺬﻩ اﻟﻘﺼﺔ وﻫﻲ‪:‬‬
‫‪ ‬ﻷﻛﺜﺮ ﻣﻦ ﲬﺴﲔ ﻋﺎﻣﺎً‪ ،‬ﺣﺎول اﳌﻬﻨﺪﺳﻮن اﺑﺘﻜﺎر ﻃﺮق أﺳﻬﻞ وأﺳﺮع ﳊﻞ اﳌﺸﻜﻼت ﺑﺎﺳﺘﺨﺪام اﻟﱪﳎﺔ اﳊﺎﺳﻮﺑﻴﺔ‪.‬‬
‫‪ ‬ﻟﻐﺎت اﻟﱪﳎﺔ ﻟﱵ اﺧﺘﺎرﻫﺎ اﳌﻬﻨﺪﺳﻮن ﻟﺘﻠﺒﻴﺔ ﻣﺘﻄﻠﺒﺎﻬﺗﻢ اﲡﻬﺖ ﳓﻮ ﻣﺴﺘﻮﻳﺎت أﻋﻠﻰ )‪.(High-level of Abstraction‬‬

‫ﺗﺼﻨﻴﻒ ﻟﻐﺎت ﺑﺮﻣﺠﺔ اﻟﻜﻴﺎن اﻟﺼﻠﺐ )‪:(Hardware Programming Languages Sorts‬‬ ‫‪3-3‬‬

‫ﺗﺼﻨﻒ ﻟﻐﺎت ﺑﺮﳎﺔ اﻟﻜﻴﺎن اﻟﺼﻠﺐ وﻓﻖ أرﺑﻊ ﳎﻤﻮﻋﺎت رﺋﻴﺴﻴﺔ‪ ،‬وﻫﻲ‪:‬‬

‫‪ .1‬ﻟﻐﺎت اﻟﱪﳎﺔ اﻟﺘﺨﻄﻴﻄﻴﺔ )‪.(Schematic-based Programming Languages‬‬

‫‪ .2‬ﻟﻐﺎت اﻟﱪﳎﺔ اﻟﻮﺻﻔﻴﺔ )‪.(Hardware Description Language‬‬
‫‪ .3‬ﻟﻐﺎت اﻟﱪﳎﺔ اﳍﻴﻜﻠﻴﺔ )‪.(C/C++ Programming Languages‬‬
‫‪ .4‬ﻟﻐﺎت اﻟﱪﳎﺔ اﻟﺮﺳﻮﻣﻴﺔ )‪.(Graphical Programming Languages‬‬

‫‪ 1-3-3‬ﻟﻐﺎت اﻟﱪﳎﺔ اﻟﺘﺨﻄﻴﻄﻴﺔ )‪:(Schematic-based Programming Languages‬‬

‫ﻳﻌﺘﻤﺪ اﻟﺘﺼﻤﻴﻢ اﻟﺘﺨﻄﻴﻄﻲ ﻋﻠﻰ اﻟﻮاﺟﻬﺎت اﻟﺮﺳﻮﻣﻴﺔ ﺑﺪﻻً ﻣﻦ ﻛﺘﺎﺑﺔ اﻟﱪاﻣﺞ اﻟﻨﺼﻴﺔ‪ ،‬ﲝﻴﺚ ﻳﺘﻢ ﺑﻨﺎء اﻟﺘﺼﻤﻴﻢ ﺑﺎﺳﺘﺨﺪام ﻋﻨﺎﺻﺮ ووﺣﺪات‬
‫ﻣﻨﻄﻘﻴﺔ ﺟﺎﻫﺰة ﻳﺘﻢ اﺳﺘﺪﻋﺎؤﻫﺎ ﻣﻦ ﻣﻜﺘﺒﺎت اﻟﱪﻧﺎﻣﺞ‪ ،‬اﳌﻜﺘﺒﺎت ﳝﻜﻦ أن ﺗﺘﻀﻤﻦ‪ :‬اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ‪ ،‬اﻟﻘﻼﺑﺎت‪ ،‬اﻟﻌﺪادات‪ ،‬اﳌﺆﻗﺘﺎت‪،‬‬
‫اﳉﻮاﻣﻊ واﻟﻄﻮارح واﻟﻀﻮارب‪ ،‬اﳌﺸﻔﺮات وﻓﺎﻛﺎت اﻟﺘﺸﻔﲑ‪ ،‬وﻏﲑﻫﺎ ﻣﻦ اﻟﻮﻇﺎﺋﻒ اﳌﻨﻄﻘﻴﺔ‪.‬‬

‫اﻟﺸﻜﻞ‪ 4-3‬اﳌﺨﻄﻂ اﻟﺘﺼﻤﻴﻤﻲ ‪ Schematic‬ﻟﺪارة ﻋﺪاد ﺳﺒﺎق )‪ (Stopwatch‬ﺑﺎﺳﺘﺨﺪام اﻟﺒﻴﺌﺔ ‪Xilinx ISE‬‬

‫‪145‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Hardware Programming Languages‬‬ ‫ﻟﻐﺎت ﺑﺮﳎﺔ أﻧﻈﻤﺔ اﻟﻜﻴﺎن اﻟﺼﻠﺐ |‬

‫ﺗﺘﻤﻴﺰ ﻫﺬﻩ اﻟﻠﻐﺎت ﺑﺎﻟﺴﻬﻮﻟﺔ واﳌﺮوﻧﺔ‪ ،‬ﻛﻤﺎ أ�ﺎ ﺗﻌﻄﻲ ﺗﻔﺎﻋﻠﻴﺔ ﻛﺒﲑة ﺑﲔ اﳊﺎﺳﺐ واﳌﺴﺘﺨﺪم‪ ،‬إﻻ أ�ﺎ ﺗﺴﺘﺨﺪم ﻣﻦ أﺟﻞ اﻟﺘﻄﺒﻴﻘﺎت اﳌﻨﻄﻘﻴﺔ‬
‫اﻟﺒﺴﻴﻄﺔ‪ ،‬واﻟﱵ ﻻ ﲢﻮي ﻋﻠﻰ ﺗﻌﻘﻴﺪات ﻛﺒﲑة ﰲ اﻟﺘﺼﻤﻴﻢ‪ .‬ﻛﻤﺎ أ�ﺎ ﺗﺴﺘﺨﺪم ﻛﺄﺳﺎس ﰲ ﺗﻌﻠﻴﻢ اﻟﻄﻼب ﻣﻨﺎﻫﺞ ﺗﺼﻤﻴﻢ اﻟﺪارات اﳌﻨﻄﻘﻴﺔ‬
‫ﺑﺎﻻﻋﺘﻤﺎد ﻋﻠﻰ ﺗﻘﻨﻴﺔ اﻟـ‪ .[287,288]FPGA‬اﻟﺸﻜﻞ‪ 4-3‬ﻳﺒﲔ اﳌﺨﻄﻂ اﻟﺘﺼﻤﻴﻤﻲ ‪ Schematic‬ﻟﺪارة ﻋﺪاد ﺳﺒﺎق )‪(Stopwatch‬‬
‫ﺑﺎﺳﺘﺨﺪام اﻟﺒﻴﺌﺔ ‪.Xilinx ISE Schematic Editor‬‬

‫ﰲ ﻟﻐﺎت اﻟﱪﳎﺔ اﻟﺘﺨﻄﻴﻄﻴﺔ ﻳﺘﻢ ﺑﻨﺎء اﻟﺘﺼﻤﻴﻢ ﺑﺸﻜﻞ ﻫﺮﻣﻲ )‪ – (Hierarchical‬أي أن اﳌﺴﺘﻮى اﻷﻋﻠﻰ ﻟﻠﺘﺼﻤﻴﻢ )‪ (top-level‬ﻫﻮ‬
‫اﻟﻮاﺟﻬﺔ ”‪ “Schematic‬اﻟﱵ ﺗﺮﺗﺒﻂ ﻣﺒﺎﺷﺮة ﲟﺴﺘﻮى أﺧﻔﺾ واﻟﺬي ﻫﻮ ﻋﺒﺎرة ﻋﻦ وﺣﺪات ”‪ ،“Macros‬ﻫﺬﻩ اﻟﻮﺣﺪات ﺗﺘﺸﻜﻞ ﻣﻦ‬
‫أﻧﻮاع ﳐﺘﻠﻔﺔ ﻣﻦ اﻟﻨﻤﺎذج اﻟﺘﺼﻤﻴﻤﻴﺔ ﻣﺜﻞ‪.Schematic, HDL, IPs :‬‬

‫ﺑﺸﻜﻞ ﻋﺎم ﺗﺘﺄﻟﻒ ﻟﻐﺎت اﻟﱪﳎﺔ اﻟﺘﺨﻄﻴﻄﻴﺔ ﻣﻦ اﻷﻗﺴﺎم اﻟﺘﺎﻟﻴﺔ‪:‬‬

‫‪ :Schematic Editor -‬وﻫﻮ اﻟﻮاﺟﻬﺔ اﻟﺮﺋﻴﺴﻴﺔ ﶈﺮر اﻟﺘﺼﻤﻴﻢ اﻟﺮﺳﻮﻣﻲ ﺣﻴﺚ ﻳﺘﻢ وﺿﻊ اﻟﻌﻨﺎﺻﺮ‪.‬‬
‫‪ :Symbol Editor -‬ﳏﺮر رﺳﻮﻣﻲ ﻹﻧﺸﺎء وﺗﻌﺪﻳﻞ اﳌﻜﺘﺒﺎت‪.‬‬
‫‪ :Library Manager -‬واﺟﻬﺔ إدارة اﳌﻜﺘﺒﺎت‪.‬‬
‫‪ :Hierarchy Navigator -‬أداة رﺳﻮﻣﻴﺔ ﻟﺘﺼﻔﺢ اﳌﺨﻄﻂ اﳍﺮﻣﻲ ﻟﻠﺘﺼﻤﻴﻢ‪.‬‬

‫‪ 2-3-3‬ﻟﻐﺎت وﺻﻒ اﻟﻜﻴﺎن اﻟﺼﻠﺐ ”‪:(Hardware Description Languages) “HDLs‬‬

‫ﺗﻌﺘﱪ ﻫﺬﻩ اﻟﻠﻐﺎت اﳌﺴﺘﻮى اﻷﻋﻠﻰ ﺑﻌﺪ ﻟﻐﺎت اﻟﱪﳎﺔ اﻟﺘﺨﻄﻴﻄﻴﺔ‪ ،‬وﻫﻲ ﻋﺒﺎرة ﻋﻦ ﻟﻐﺎت ﺑﺮﳎﺔ ﺗﺴﺘﺨﺪم ﺗﻌﺎﺑﲑ ﻧﺼﻴﺔ ﺗﺼﺮﳛﻴﺔ ) ‪Textual,‬‬

‫‪ (Declarative‬ﻟﻮﺻﻒ ﺳﻠﻮك أو ﻋﻤﻞ اﻟﻮﺣﺪات اﳌﻨﻄﻘﻴﺔ اﻟﺮﻗﻤﻴﺔ )‪ (Digital Logic‬ﻋﻠﻰ اﻟﻜﻴﺎن اﻟﺼﻠﺐ ﺑﺸﻜﻞ ﻣﺒﺎﺷﺮ‪ ،‬وﻣﻦ أﺷﻬﺮ‬
‫ﻫﺬﻩ اﻟﻠﻐﺎت اﳌﺴﺘﺨﺪﻣﺔ ﻫﻲ ﻟﻐﺔ اﻟـ‪ [382] VHDL‬وﻟﻐﺔ اﻟـ‪.[383] Verilog‬‬

‫ﲤﺘﺎز ﻟﻐﺎت وﺻﻒ اﻟﻜﻴﺎن اﻟﺼﻠﺐ ﺑﺄ�ﺎ ﻟﻐﺎت وﺻﻔﻴﺔ ﺗﺘﻌﻠﻖ ﻣﺒﺎﺷﺮة ﺑﺒﻨﺎء اﻟﻜﻴﺎن اﻟﺼﻠﺐ وﺳﻠﻮﻛﻪ ﻋﻠﻰ اﻟﺸﺮﳛﺔ‪ ،‬ﻛﻤﺎ أ�ﺎ ﲣﺘﻠﻒ ﻋﻦ اﻟﻠﻐﺎت‬
‫اﻟﱪﳎﻴﺔ اﳌﺨﺼﺼﺔ ﻟﺘﻄﺒﻴﻘﺎت اﳊﺎﺳﺐ ﺑﺸﻜﻞ ﺟﺬري]‪.[384‬‬

‫ﻟﻐﺔ اﻟـ‪:(Very High Speed IC Hardware Description Language) VHDL‬‬ ‫‪1-2-3-3‬‬

‫وﻫﻲ ﻟﻐﺔ ﺗﻮﺻﻴﻒ ﻋﻤﻞ أو ﺳﻠﻮك اﻟﻜﻴﺎن اﻟﺼﻠﺐ ﻋﻠﻰ ﺷﺮاﺋﺢ اﻟﺪارات اﳌﺘﻜﺎﻣﻠﺔ اﻟﺮﻗﻤﻴﺔ ﻓﺎﺋﻘﺔ اﻟﺴﺮﻋﺔ )‪ .(VHSICHDL‬ﻇﻬﺮت ﻟﻐﺔ‬
‫اﻟـ‪ VHDL‬ﻷول ﻣﺮة ﰲ اﻟﻮﻻﻳﺎت اﳌﺘﺤﺪة اﻷﻣﺮﻳﻜﻴﺔ ﻋﺎم ‪ 1980‬وﻗﺪ ﰎ ﺗﻄﻮﻳﺮﻫﺎ ﻣﻦ ﻗﺒﻞ وزارة اﻟﺪﻓﺎع اﻷﻣﺮﻳﻜﻴﺔ وﻗﺪ ﻋﺮﻓﺖ ﰲ ذاك اﻟﻮﻗﺖ‬
‫ﺑـ‪ (Very-high-speed Integrate Circuit) VHSIC‬ﻗﺒﻞ ﻇﻬﻮرﻫﺎ وﺗﻄﻮرﻫﺎ إﱃ ﻟﻐﺔ اﻟـ‪ ،VHDL‬ﰒ ﺑﺪأت ﺑﺎﻻﻧﺘﺸﺎر ﺑﺸﻜﻞ ﻛﺒﲑ‬
‫وواﺳﻊ؛ وذﻟﻚ ﻟﺘﻤﺘﻌﻬﺎ ﲟﺰاﻳﺎ ﻋﺪﻳﺪة ﻛﺈﻣﻜﺎﻧﻴﺔ ﺑﻨﺎء اﻟﻨﻈﺎم اﳌﻄﻠﻮب ﲟﺴﺎﺣﺔ أﺻﻐﺮ ﻣﻦ اﻟﻘﻄﺎﻋﺎت اﻟﺴﻴﻠﻴﻜﻮﻧﻴﺔ‪ ،‬واﺳﺘﻬﻼك أﻗﻞ ﻟﻠﻄﺎﻗﺔ‪،‬‬
‫وﺳﺮﻋﺔ ﻋﻤﻞ أﻛﱪ‪.‬‬

‫اﻟﻨﺴﺨﺔ اﻷوﱃ ﻇﻬﺮت رﲰﻴﺎً ﻋﺎم ‪ 1987‬وﻋﺮﻓﺖ ﺑﺎﺳﻢ ‪ ،VHDL-87‬ﰒ ﰲ ﻋﺎم ‪ 1993‬ﰎ ﺗﺮﻗﻴﺘﻬﺎ إﱃ ‪ VHDL-93‬واﻟﱵ ﻛﺎﻧﺖ ﻟﻐﺔ‬
‫ﺗﻮﺻﻴﻒ اﻟﻜﻴﺎن اﻟﺼﻠﺐ اﳌﻌﻴﺎرﻳﺔ اﻷوﱃ اﳌﻌﺘﻤﺪة ﻣﻦ ﻗﺒﻞ ﻫﻴﺌﺔ اﻟـ‪ IEEE‬ﰲ اﻟﻮﻻﻳﺎت اﳌﺘﺤﺪة‪ ،‬وﻋﺮف اﳌﻌﻴﺎر ﺑـ‪ ،IEEE1076‬ﰒ ﺑﻌﺪ ذﻟﻚ‬
‫ﰎ إﺿﺎﻓﺔ ﻣﻌﻴﺎر آﺧﺮ ﳍﺬﻩ اﻟﻠﻐﺔ وﻫﻮ اﳌﻌﻴﺎر ‪.[385]IEEE1164‬‬
‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪146‬‬
‫‪23‬‬ ‫اﻟﻔﺼﻞ اﻟﺜﺎﻟﺚ | ‪Chapter 3‬‬

‫ﺑﺸﻜﻞ رﺋﻴﺴﻲ ﺻﻤﻤﺖ ﻟﻐﺔ اﻟـ‪ VHDL‬ﻟﺘﻠﺒﻴﺔ اﻟﻌﺪﻳﺪ ﻣﻦ اﻟﻮﻇﺎﺋﻒ ﰲ ﻋﻤﻠﻴﺎت اﻟﺘﺼﻤﻴﻢ ) ‪development, verification, synthesis‬‬

‫‪ (and testing‬واﻟﱵ ﻣﻨﻬﺎ‪:‬‬

‫‪ -‬وﺻﻒ ﺑﻨﻴﺔ اﻟﻨﻈﺎم ﻣﻮﺿﺤﺔ أن اﻟﺘﺼﻤﻴﻢ اﻟﻜﺎﻣﻞ ﻟﻠﻨﻈﺎم ﳝﻜﻦ أن ﻳﺘﺤﻘﻖ ﻋﱪ ﻋﺪة وﺣﺪات ﺗﺼﻤﻴﻤﻴﺔ ﻣﺴﺘﻘﻠﺔ‪ ،‬ﻣﻊ ﺑﻴﺎن ﻛﻴﻔﻴﺔ‬
‫ﺗﻮﺻﻴﻞ ﻫﺬﻩ اﻟﻮﺣﺪات ﻟﻠﺤﺼﻮل ﻋﻠﻰ اﻟﻨﻈﺎم اﳌﺮﻏﻮب‪.‬‬
‫‪ -‬ﲤﺜﻴﻞ وﻇﺎﺋﻒ اﻟﺪارات ﺑﺎﺳﺘﺨﺪام ﺻﻴﻎ ﺑﺮﳎﻴﺔ ﻣﺄﻟﻮﻓﺔ‪.‬‬
‫‪ -‬ﳏﺎﻛﺎة اﻟﺘﺼﻤﻴﻢ ﻗﺒﻞ ﺗﺸﻜﻴﻠﻪ ﻓﻴﺰﻳﺎﺋﻴﺎً وﻫﺬا ﻳﻮﻓﺮ اﻟﻜﺜﲑ ﻣﻦ اﻟﻮﻗﺖ وﻣﻦ ﻛﻠﻔﺔ اﻟﻨﻤﺎذج اﻷوﻟﻴﺔ‪.‬‬

‫‪ -‬ﺗﻌﺘﱪ ﻟﻐﺔ اﻟـ‪ VHDL‬ﻟﻐﺔ ﰲ ﻏﺎﻳﺔ اﻟﺘﻌﻘﻴﺪ ﻛﻤﺎ أ�ﺎ ﲤﻠﻚ اﻟﻌﺪﻳﺪ ﻣﻦ اﻟﱰاﻛﻴﺐ اﻟﻠﻐﻮﻳﺔ واﻟﺬي ﳚﻌﻠﻬﺎ ﻟﻐﺔ ﻗﻮﻳﺔ ﺟﺪاً إﻻ أ�ﺎ ﻋﺴﲑة‬
‫ﰲ ﺗﻌﻠﻤﻬﺎ واﺳﺘﺨﺪاﻣﻬﺎ‪.‬‬

‫ﻋﻠﻰ ﺧﻼف ﻟﻐﺎت اﻟﱪﳎﺔ اﻻﻋﺘﻴﺎدﻳﺔ ﻣﺜﻞ ‪ BASIC, C, assembly‬اﻟﱵ ﺗﻨﻔﺬ ﺑﺸﻜﻞ ﺗﺘﺎﺑﻌﻲ )‪ ،(Sequentially‬ﻓﺈن اﳍﻴﻜﻠﻴﺔ اﻟﱪﳎﻴﺔ‬
‫ﻟﻠﻐﺔ اﻟـ‪ VHDL‬ﺗﻨﻔﺬ ﺑﺸﻜﻞ ﺗﻔﺮﻋﻲ ﻣﺘﺰاﻣﻦ‪ ،‬ﻟﺬﻟﻚ ﻓﻬﻲ ﺗﻌﺘﱪ ﺷﻴﻔﺮة وﻟﻴﺴﺖ ﺑﺮﻧﺎﳎﺎً‪ ،‬ﻛﻤﺎ أن ﻟﻐﺔ اﻟـ‪ VHDL‬ﻟﻴﺴﺖ ﺧﺎﺻﺔ ﺑﻨﻈﺎم أو‬
‫ﻛﻴﺎن ﳏﺪد أو ﺷﺮﻛﺔ ﻣﻌﻴﻨﺔ‪ ،‬وإﳕﺎ ﻫﻲ ﻧﻈﺎم ﻗﻴﺎﺳﻲ ﺗﻌﺘﻤﺪﻩ اﻟﺸﺮﻛﺎت اﳌﺼﻨﻌﺔ واﳌﱪﳎﺔ‪ ،‬ﻓﻴﻤﻜﻦ ﲢﻮﻳﻞ أي ﺷﻴﻔﺮة ﻣﻜﺘﻮﺑﺔ ﺑﻠﻐﺔ اﻟـ‬
‫‪VHDL‬واﺳﺘﺨﺪاﻣﻬﺎ ﻟﺘﻨﻔﻴﺬ أي ﻧﻈﺎم ﺑﱰﲨﺘﻬﺎ )‪ (Synthesis‬وﺑﺮﳎﺘﻬﺎ إﱃ اﻟﻌﻨﺎﺻﺮ اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ‪ .‬إن اﳋﺮج اﻟﻨﻬﺎﺋﻲ ﻟﺸﻴﻔﺮة‬
‫ﻣﻜﺘﻮﺑﺔ ﺑﻠﻐﺔ اﻟـ‪ VHDL‬ﻣﻠﻒ اﻟﺘﻮﺻﻴﻼت "‪."Netlist‬‬

‫‪ 1-1-2-3-3‬ﻋﻨﺎﺻﺮ اﻟﺘﺼﻤﻴﻢ ﰲ ﻟﻐﺔ اﻟـ‪:(VHDL Design Elements) VHDL‬‬

‫إن ﻋﻤﻠﻴﺔ وﺻﻒ اﻟﻜﻴﺎن اﻟﺼﻠﺐ ﰲ ﻟﻐﺔ اﻟـ‪ VHDL‬ﻳﺘﻀﻤﻦ ﻋﻨﺎﺻﺮ ﺗﺼﻤﻴﻢ رﺋﻴﺴﻴﺔ ﺗﺼﻒ واﺟﻬﺔ اﻟﺘﺼﻤﻴﻢ وﻫﻲ اﻟـ"‪ ،"Entity‬وﻋﻨﺎﺻﺮ‬
‫ﺗﺼﻤﻴﻢ ﺛﺎﻧﻮﻳﺔ ﲢﻮي اﻟﺘﻤﺜﻴﻞ واﻟﻮﺻﻒ اﳊﻘﻴﻘﻲ ﻟﻠﺘﺼﻤﻴﻢ وﻫﻲ اﻟـ"‪ ،"Architecture‬إﺿﺎﻓﺔً إﱃ اﳌﻜﺘﺒﺎت "‪ "Libraries‬واﻟﱵ ﺗﻀﻢ ﳕﺎذج‬
‫وﻛﺘﻞ اﻟﺘﺼﻤﻴﻢ‪.‬‬

‫إن اﳍﻴﻜﻠﻴﺔ اﻟﻌﺎﻣﺔ واﻷﺳﺎﺳﻴﺔ ﻟﻜﺘﺎﺑﺔ أي ﺑﺮﻧﺎﻣﺞ ﺑﻠﻐﺔ اﻟـ‪ VHDL‬ﻣﺒﻴﻨﺔ ﻋﻠﻰ اﻟﺸﻜﻞ‪ ،5-3‬ﺣﻴﺚ ﻳﺘﻢ ﰲ ﺑﺪاﻳﺔ اﻟﱪﻧﺎﻣﺞ إﺳﻨﺎد اﳌﻜﺎﺗﺐ‬
‫اﳌﺴﺘﺨﺪﻣﺔ‪ ،‬ﰒ ﻛﺘﺎﺑﺔ ﻛﻴﺎن اﻟﱪﻧﺎﻣﺞ )‪ ،(Entity‬ﰒ اﻟﺒﻨﻴﺔ اﻟﻮﺻﻔﻴﺔ وﻓﻴﻬﺎ اﻟﱪﻧﺎﻣﺞ اﻟﺮﺋﻴﺴﻲ واﻟﱪاﻣﺞ اﻟﻔﺮﻋﻴﺔ‪.‬‬

‫‪Libraries‬‬

‫‪Entity‬‬

‫‪Architecture‬‬

‫‪Sub-routines‬‬

‫اﻟﺸﻜﻞ‪ 5-3‬اﳍﻴﻜﻠﻴﺔ اﻟﻌﺎﻣﺔ ﻟﻜﺘﺎﺑﺔ ﺑﺮﻧﺎﻣﺞ ﺑﻠﻐﺔ اﻟـ‪VHDL‬‬

‫‪147‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Hardware Programming Languages‬‬ ‫ﻟﻐﺎت ﺑﺮﳎﺔ أﻧﻈﻤﺔ اﻟﻜﻴﺎن اﻟﺼﻠﺐ |‬

‫اﳌﻜﺘﺒﺎت )‪:(Libraries‬‬ ‫‪1-1-1-2-3-3‬‬

‫ﺗﻀﻢ اﳌﻜﺘﺒﺎت ﳎﻤﻮﻋﺎت اﻟﻨﻤﺎذج اﻟﺘﺼﻤﻴﻤﻴﺔ واﻟﺘﻮاﺑﻊ واﻟﻮﺣﺪات ﻟﻠﻐﺔ اﻟـ‪ ،VHDL‬وﳝﻜﻦ ان ﻳﻀﻢ اﻟﱪﻧﺎﻣﺞ ﻣﻜﺘﺒﺔ أو أﻛﺜﺮ ﺗﺒﻌﺎً ﻟﻠﻮﻇﺎﺋﻒ‬
‫اﳌﻄﻠﻮﺑﺔ ﻣﻦ اﻟﱪﻧﺎﻣﺞ‪ .‬اﻟﺸﻜﻞ‪ 6-3‬ﻳﺒﲔ ﺑﻌﺾ اﳌﻜﺘﺒﺎت اﻟﻘﻴﺎﺳﻴﺔ ﻟﻠﻐﺔ اﻟـ‪.VHDL‬‬

‫;‪Library IEEE‬‬
‫;‪use IEEE.numeric_std.all‬‬
‫;‪use IEEE.std_logic_1164.all‬‬
‫;‪use IEEE.std_logic_arith.all‬‬
‫;‪use IEEE.std_logic_signed.all‬‬
‫;‪use IEEE.std_logic_unsigned.all‬‬

‫اﻟﺸﻜﻞ‪ 6-3‬اﳌﻜﺘﺒﺎت اﻟﻘﻴﺎﺳﻴﺔ اﳌﺴﺘﺨﺪﻣﺔ ﰲ ﻟﻐﺔ اﻟـ‪VHDL‬‬

‫اﻟﻜﻴﺎن )‪:(Entity‬‬ ‫‪2-1-1-2-3-3‬‬

‫ﻳﻌﺘﱪ اﻟﻜﻴﺎن اﳌﺴﺘﻮى اﻷﻋﻠﻰ واﻷﻛﺜﺮ أﳘﻴﺔ ﰲ اﻟﺘﺼﻤﻴﻢ‪ ،‬وﻓﻴﻪ ﻳﺘﻢ ﺗﻌﺮﻳﻒ ﻣﺪاﺧﻞ وﳐﺎرج اﻟﻨﻈﺎم ﻋﻠﻰ اﻟﺒﻮاﺑﺎت إﺿﺎﻓﺔً إﱃ ﲨﻴﻊ اﳌﻮارد‬
‫اﳌﺮﺗﺒﻄﺔ ﺑﺎﻟﻜﻴﺎن؛ ﰲ اﻟﻨﻈﺎم ﻛﻴﺎن واﺣﺪ أو أﻛﺜﺮ‪ ،‬ﻳﺘﻢ اﻟﺘﺼﺮﻳﺢ ﻋﻨﻪ ﻛﻤﺎ ﻫﻮ ﻣﺒﲔ ﻋﻠﻰ اﻟﺸﻜﻞ‪.7-3‬‬

‫‪Entity Entity-name is‬‬ ‫‪Entity AND_GATE is‬‬

‫( ‪Port‬‬
‫;‪IN1 : in std_logic‬‬
‫;)‪Port (port name and type‬‬
‫;‪IN2 : in std_logic‬‬
‫;‪OUT1: out std_logic‬‬
‫;‪End Entity_name‬‬ ‫;‪End AND_GATE‬‬

‫اﻟﺸﻜﻞ‪ 7-3‬ﺗﻌﺮﻳﻒ اﻟﻜﻴﺎن ﻟﺒﻮاﺑﺔ ‪ AND‬ﺑﻠﻐﺔ اﻟـ‪VHDL‬‬

‫اﻟﺒﻨﻴﺔ اﳍﻴﻜﻠﻴﺔ )‪:(Architecture‬‬ ‫‪3-1-1-2-3-3‬‬

‫ﺗﻀﻢ اﳍﻴﻜﻠﻴﺔ "‪ "Architecture‬اﻟﻮﻇﺎﺋﻒ اﻟﱵ ﺗﺼﻒ ﺳﻠﻮك اﻟﻜﻴﺎن اﻟﺼﻠﺐ اﳌﺮﺗﺒﻂ ﺑﺎﻟﻮﻇﻴﻔﺔ اﻷﺳﺎﺳﻴﺔ اﳌﻌﺮﻓﺔ ﺑﺎﻟﻜﻴﺎن "‪ ."Entity‬ﳝﻜﻦ‬
‫أن ﻳﻀﻢ اﻟﻜﻴﺎن ﻫﻴﻜﻠﻴﺔ أو اﻛﺜﺮ وﻛﻞ واﺣﺪة ﻣﻨﻬﻤﺎ ﳝﻜﻦ ان ﺗﻜﻮن وﺻﻔﺎً ﺳﻠﻮﻛﻴﺎً ﻟﻠﻨﻈﺎم او وﺻﻔﺎً ﺑﻨﻴﻮﻳﺎً‪ ،‬وﻳﺘﻢ اﻟﺘﺼﺮﻳﺢ ﻋﻦ اﳍﻴﻜﻠﻴﺔ ﻛﻤﺎ‬
‫ﻫﻮ ﻣﺒﲔ ﺑﺎﻟﺸﻜﻞ‪.8-3‬‬

‫‪Architecture Architecture-name of‬‬

‫‪Architecture RTL of ANDGATE is‬‬
‫‪Entity-name is‬‬
‫‪Begin‬‬
‫‪Begin‬‬
‫;‪OUT1 <= IN1 and IN2‬‬
‫‪Architecture-Body‬‬
‫;‪End RTL‬‬
‫;‪End Architecture-name‬‬

‫‪ AND‬ﺑﻠﻐﺔ اﻟـ‪VHDL‬‬ ‫اﻟﺸﻜﻞ‪ 8-3‬ﺗﻌﺮﻳﻒ اﻟﻮﺻﻒ اﻟﺒﻨﻴﻮي ﻟﺒﻮاﺑﺔ‬

‫ﻟﻐﺔ اﻟـ‪:[386,387](Verilog Hardware Description Language) Verilog-HDL‬‬ ‫‪2-2-3-3‬‬

‫ﻇﻬﺮت ﻟﻐﺔ اﻟـ‪ Verilog‬ﻋﺎم ‪ ،1984‬وﺗﻌﺘﱪ أﺣﺪ ﻟﻐﺎت ﺗﻮﺻﻴﻒ ﻋﻤﻞ أو ﺳﻠﻮك اﻟﻜﻴﺎن اﻟﺼﻠﺐ‪ .‬ﺗﺴﺘﺨﺪم ﻟﻐﺔ اﻟـ‪ Verilog‬ﻟﻨﻤﺬﺟﺔ‬
‫اﻷﻧﻈﻤﺔ اﻹﻟﻜﱰوﻧﻴﺔ ﰲ ﻣﻌﻤﻞ ﺗﺼﻤﻴﻢ اﻟﺸﺮاﺋﺢ اﻹﻟﻜﱰوﻧﻴﺔ وأﻧﺼﺎف اﻟﻨﻮاﻗﻞ‪ ،‬ﻛﻤﺎ أ�ﺎ اﻷﻛﺜﺮ اﺳﺘﺨﺪاﻣﺎً ﰲ اﻟﺘﺼﺎﻣﻴﻢ ﰲ ﻣﺮﺣﻠﺔ اﻻﺧﺘﺒﺎر‬
‫واﻟﺘﻤﺜﻴﻞ ﻟﻠﺸﺮاﺋﺢ اﻟﺮﻗﻤﻴﺔ اﳌﻨﻄﻘﻴﺔ ﻋﻨﺪ اﳌﺴﺘﻮى اﳌﻨﺨﻔﺾ ‪ ،RTL‬وﻛﺬﻟﻚ ﰲاﺧﺘﺒﺎر اﻟﺪارات اﻟﺘﺸﺎﻬﺑﻴﺔ ودارات اﻹﺷﺎرات اﳍﺠﻴﻨﻴﺔ‪.‬‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪148‬‬
‫‪23‬‬ ‫اﻟﻔﺼﻞ اﻟﺜﺎﻟﺚ | ‪Chapter 3‬‬

‫ﲣﺘﻠﻒ ﻟﻐﺔ اﻟـ‪ Verilog‬ﻋﻦ ﺑﻘﻴﺔ ﻟﻐﺎت اﻟﱪﳎﺔ ﻣﻦ ﺣﻴﺚ أ�ﺎ ﺗﺄﺧﺬ ﺑﻌﲔ اﻻﻋﺘﺒﺎر اﻟﺘﻐﲑات اﻟﺰﻣﻨﻴﺔ اﳊﺎﺻﻠﺔ ﺑﺸﻜﻞ ﺷﺪﻳﺪ اﳊﺴﺎﺳﻴﺔ واﻟﺪﻗﺔ‪،‬‬
‫ﻛﻤﺎ أ�ﺎ ﲤﻠﻚ ﻧﻮﻋﲔ ﻣﻦ ﻣﻌﺎﻣﻼت اﻟﺘﺤﺪﻳﺪ اﻟﱵ ﺗﺴﻤﺢ ﻟﻠﻤﺼﻤﻢ ﺑﻮﺻﻒ ﲢﺪﻳﺜﺎت اﳊﺎﻻت ﺑﺪون اﳊﺎﺟﺔ إﱃ ﺗﺼﺮﻳﺢ اﺳﺘﺨﺪام ﳌﺘﺤﻮﻻت‬
‫ﲣﺰﻳﻦ ﻣﺆﻗﺘﺔ‪ ،‬وﻃﺎﳌﺎ أن ﻫﺬﻩ اﳌﻔﺎﻫﻴﻢ ﻫﻲ ﺟﺰء ﻣﻦ دﻻﻻت ﻟﻐﺔ اﻟـ‪ ،Verilog‬ﻓﺈن اﳌﺼﻤﻢ ﻳﺴﺘﻄﻴﻊ ﻛﺘﺎﺑﺔ وﺻﻒ ﻟﺪارات ﻛﺒﲑة ﺑﺸﻜﻞ‬
‫ﻣﻀﻐﻮط ودﻗﻴﻖ ﺟﺪاً‪.‬‬

‫إن ﻣﺼﻤﻤﻲ ﻟﻐﺔ اﻟـ‪ Verilog‬أرادوا إﳚﺎد ﻟﻐﺔ ذات ﺗﺮﻛﻴﺐ ﺷﺒﻴﻪ ﺑﻠﻐﺔ اﻟﱪﳎﺔ ‪ ،C‬واﻟﱵ ﺗﺴﺘﺨﺪم ﺣﺎﻟﻴﺎً ﺑﺸﻜﻞ واﺳﻊ ﰲ ﺗﻄﻮﻳﺮ اﻟﱪاﻣﺞ‬
‫اﳍﻨﺪﺳﻴﺔ‪ .‬إن ﻟﻐﺔ اﻟـ‪ Verilog‬ﺣﺴﺎﺳﺔ ﳊﺎﻻت اﳊﺮوف‪ ،‬وﻫﻲ ﲤﺘﻠﻚ ﻣﻌﺎﳉﺎً أوﻟﻴﺎً ذو ﺗﻌﻘﻴﺪ أﻗﻞ ﻣﻦ‪ ، ANSI C/C++‬وﻛﺬﻟﻚ ﺗﻌﻠﻴﻤﺎت‬
‫ﺷﺮﻃﻴﺔ )…‪ ،(if/else, for, while, case‬وﻣﻌﺎﻣﻞ أوﻟﻮﻳﺔ‪.‬‬

‫إن ﺗﺼﻤﻴﻢ ﻟﻐﺔ اﻟـ‪ Verilog‬ﻳﺘﻜﻮن ﻣﻦ وﺣﺪات ﻫﺮﻣﻴﺔ ﻣﱰاﺑﻄﺔ ﻣﻊ وﺣﺪات أﺧﺮى ﺑﺎﺳﺘﺨﺪام ﻣﺪاﺧﻞ وﳐﺎرج‪ ،‬وﲢﺘﻮي اﻟﻮﺣﺪة ﻋﻠﻰ اﻟﻌﺪﻳﺪ‬
‫ﻣﻦ اﻟﺘﺼﺮﳛﺎت ﻋﻦ اﳌﺘﺤﻮﻻت‪ ،‬ﺑﺎﻹﺿﺎﻓﺔ إﱃ ﻋﺒﺎرات ﺗﺘﺎﺑﻌﻴﺔ وﻣﺘﺰاﻣﻨﺔ‪ ،‬اﻷﻣﺮ اﻟﺬي ﳚﻌﻞ ﻟﻐﺔ اﻟـ‪ Verilog‬ﺷﺒﻴﻬﺔ ﺑﻠﻐﺎت ﳐﻄﻂ ﺗﺪﻓﻖ‬
‫اﳌﻌﻄﻴﺎت‪ .‬اﻟﺸﻜﻞ‪ 9-3‬ﻳﺒﲔ ﲤﺜﻴﻼً ﻟﺒﻮاﺑﺔ ‪ AND‬ﺑﻠﻐﺔ اﻟـ‪.Verilog‬‬

‫;)‪module andgate(a,b,c‬‬
‫;‪input a, b‬‬
‫;‪output c‬‬
‫;‪reg c‬‬

‫‪always @(a or b) begin‬‬

‫;‪c = a & b‬‬
‫‪end‬‬
‫‪endmodule‬‬

‫‪ AND‬ﺑﻠﻐﺔ اﻟـ‪Verilog‬‬ ‫اﻟﺸﻜﻞ‪ 9-3‬ﲤﺜﻴﻞ ﺑﻮاﺑﺔ‬

‫‪ 1-2-2-3-3‬إﺻﺪارات ﻟﻐﺔ اﻟـ‪:Verilog‬‬

‫ﰎ اﺧﱰاع ﻟﻐﺔ اﻟـ‪ Verilog‬ﻣﻦ ﻗﺒﻞ ‪ Prabhu Goel & Phil Moorby‬ﰲ ﻋﺎم ‪ 1983‬وﻛﺎن ﳍﺎ ﻋﺪد ﻣﻦ اﻹﺻﺪارات‪.‬‬

‫اﻹﺻﺪار ‪:Verilog-95‬‬ ‫‪1-1-2-2-3-3‬‬

‫ﺑﻌﺪ اﻟﻨﺠﺎح اﳌﺘﺰاﻳﺪ ﻟﻠﻐﺔ اﻟـ‪ VHDL‬ﰲ ذاك اﻟﻮﻗﺖ‪ ،‬ﻗﺮرت ﺷﺮﻛﺔ ‪ Cadence‬أن ﺗﺼﻨﻊ ﻟﻐﺔ ذات ﻣﻌﺎﻳﲑ ﻣﻔﺘﻮﺣﺔ‪ ،‬ﻓﻘﺎﻣﺖ ﺑﻮﺿﻊ ﻟﻐﺔ‬
‫اﻟـ‪ Verilog‬ﰲ اﳌﻴﺪان ﲢﺖ اﺳﻢ )‪ ،Open Verilog International (OVI‬واﻋﱰف ﺑﻌﺪ ذﻟﻚ ﺑﻠﻐﺔ اﻟـ‪ Verilog‬ﰲ ﻫﻴﺌﺔ ‪IEEE‬‬

‫وأﺻﺒﺤﺖ ﻣﻌﻴﺎرﻳﺔ وﻓﻖ اﳌﻌﻴﺎر ‪.IEEE-1364‬‬

‫اﻹﺻﺪار ‪:Verilog 2001‬‬ ‫‪2-1-2-2-3-3‬‬

‫ﻫﺬا اﻹﺻﺪار وﺟﺪ ﰲ ﻋﺎم ‪ 2001‬وﻛﺎن اﻣﺘﺪاداً ﻟﻺﺻﺪار ‪ Verilog-95‬ﺣﻴﺚ ﰎ إﻋﺎدة ﺗﻮﺛﻴﻘﻪ ﻣﻦ ﻗﺒﻞ ﻫﻴﺌﺔ ‪ IEEE‬ﻟﻴﻜﻤﻞ اﻟﻨﻮاﻗﺺ ﰲ‬
‫ﻣﻌﺎﻳﲑ ﻟﻐﺔ اﻟـ‪ Verilog‬اﻷﺳﺎﺳﻴﺔ وﻓﻖ اﳌﻌﻴﺎر ‪ IEEE-1364‬وﻗﺪ ﺗﻀﻤﻦ ﲢﺪﻳﺜﺎت ﻛﺒﲑة ﰲ اﻟﻠﻐﺔ‪.‬‬

‫‪149‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Hardware Programming Languages‬‬ ‫ﻟﻐﺎت ﺑﺮﳎﺔ أﻧﻈﻤﺔ اﻟﻜﻴﺎن اﻟﺼﻠﺐ |‬

‫اﻹﺻﺪار ‪:Verilog 2005‬‬ ‫‪3-1-2-2-3-3‬‬

‫ﺗﻀﻤﻦ ﻫﺬا اﻹﺻﺪار ﺗﻌﺪﻳﻼت ﺛﺎﻧﻮﻳﺔ ﰲ ‪ .Verilog 2001‬ﻛﻤﺎ ﰎ إﺿﺎﻓﺔ ﻗﺴﻢ ﻣﻨﻔﺼﻞ ﻣﻦ ﻣﻌﻴﺎر ‪ Verilog‬ﻫﻮ ‪ Verilog-AMS‬ﰲ‬
‫ﳏﺎوﻟﺔ ﻟﻤﺬﺟﺔ اﻷﻧﻈﻤﺔ اﻟﺘﺸﺎﻬﺑﻴﺔ واﳌﺨﺘﻠﻄﺔ ﺿﻤﻦ ﻟﻐﺔ ‪ Verilog‬اﻷﺳﺎﺳﻴﺔ‪.‬‬

‫اﻹﺻﺪار ‪:System Verilog‬‬ ‫‪4-1-2-2-3-3‬‬

‫ﻫﻮ ﺗﻮﻇﻴﻒ ﲡﺎري ﻟﻺﺻﺪار ‪ Verilog 2005‬ﻣﻊ اﻟﻌﺪﻳﺪ ﻣﻦ اﳌﻴﺰات )‪.(design verification & modeling‬‬

‫ﻟﻐﺔ اﻟـ‪:(Pebble Hardware Description Language) Pebble-HDL‬‬ ‫‪3-2-3-3‬‬

‫وﻫﻲ ﳕﻮذج ﻣﺒﺴﻂ ﻣﻦ ﻟﻐﺔ اﻟـ‪ VHDL‬ﺗﺘﻴﺢ إﻣﻜﺎﻧﻴﺔ وﺻﻒ اﻟﻜﻴﺎن اﻟﺼﻠﺐ ﻣﻦ ﺧﻼل ﺗﻌﻴﲔ اﻻرﺗﺒﺎط ﺑﲔ اﻟﻜﺘﻞ اﳌﻨﻄﻘﻴﺔ اﶈﺪدة‬
‫اﻟﻮﻇﻴﻔﺔ]‪.[388‬‬

‫ﻟﻐﺔ اﻟـ‪:(HML Hardware Description Language) HardwareML‬‬ ‫‪4-2-3-3‬‬

‫وﻫﻲ ﻟﻐﺔ وﺻﻒ ﻛﻴﺎن ﺻﻠﺐ ﺗﻌﺘﻤﺪ ﻋﻠﻰ ﻟﻐﺔ اﻟﱪﳎﻴﺔ اﻟﻮﻇﻴﻔﻴﺔ ‪SML‬؛ ﰎ ﺗﺼﻤﻴﻢ ﻟﻐﺔ اﻟـ‪ HML‬ﻟﺘﺠﻤﻊ ﻣﻴﺰات وﺧﺼﺎﺋﺺ ﻟﻐﺎت اﻟـ‪STPL‬‬

‫)‪ (Strongly Typed Programming Languages‬ﻣﻊ ﻣﻴﺰات وﺧﺼﺎﺋﺺ ﻟﻐﺎت اﻟـ‪un-Typed Programming ) u-TPL‬‬

‫‪.[389](Languages‬‬

‫ﻟﻐﺔ اﻟـ‪:(Lava Hardware Description Language) Lava‬‬ ‫‪5-2-3-3‬‬

‫وﻫﻲ ﻟﻐﺔ وﻇﻴﻔﻴﺔ ﺑﻨﻴﻮﻳﺔ )‪ (Functional, Structural‬ﻟﻮﺻﻒ اﻟﻜﻴﺎن اﻟﺼﻠﺐ ﺑﺎﻻﻋﺘﻤﺎد ﻋﻠﻰ ﻟﻐﺔ اﻟﱪﳎﺔ اﻟﻮﻇﻴﻔﻴﺔ "‪ ."Haskell‬ﺗﺮﻛﺰ ﻟﻐﺔ‬
‫اﻟـ‪ Lava‬ﻋﻠﻰ اﻟﻮﺻﻒ اﻟﺴﻠﻮﻛﻲ )ﻣﻦ ﺧﻼل وﺻﻞ اﳋﺮج ﻟﻜﺘﻠﺔ ﳌﻨﻄﻘﻴﺔ إﱃ اﻟﺪﺧﻞ ﻟﻠﺘﻜﻠﺔ ﻤﻟﺎورة( وﻋﻠﻰ اﻟﺘﻮﺿﻊ اﻟﻨﺴﱯ )ﻣﻦ ﺧﻼل ﺗﻌﻴﲔ‬
‫اﻟﻜﺘﻞ اﳌﻨﻄﻘﻴﺔ ﲜﺎﻧﺐ ﺑﻌﻀﻬﺎ( ﻟﻠﻜﺘﻞ اﳌﻨﻄﻘﻴﺔ ﻋﻠﻰ اﻟﺸﺮﳛﺔ ]‪.[390‬‬

‫‪ 3-3-3‬ﻟﻐﺎت ﺑﺮﳎﺔ اﻟﻜﻴﺎن اﻟﺼﻠﺐ ﻋﺎﻟﻴﺔ اﳌﺴﺘﻮى )‪:(High-level Hardware Programming Language‬‬
‫إن اﻻزدﻳﺎد ﰲ ﺗﻌﻘﻴﺪ ﺷﺮاﺋﺢ اﻟﺪارات اﳌﺘﻜﺎﻣﻠﺔ وﻓﻘﺎً ﻟﻘﺎﻧﻮن ”‪ [80] “Moore‬ﻳﺆدي إﱃ ﻧﺸﻮء ﻓﺠﻮة ﻛﺒﲑة ﺑﲔ ﻋﺪد اﻟﻜﺘﻞ اﳌﻨﻄﻘﻴﺔ اﻟﱵ ﳝﻜﻦ‬
‫إﻧﺸﺎؤﻫﺎ ﻋﻠﻰ ﻣﺴﺎﺣﺔ ﳏﺪدة ﻣﻦ ﺷﺮﳛﺔ ﺳﻴﻠﻴﻜﻮﻧﻴﺔ وﺑﲔ إﻣﻜﺎﻧﻴﺔ ﻣﻬﻨﺪﺳﻲ اﻟﺘﺼﻤﻴﻢ ﻋﻠﻰ إﻧﺸﺎء ﻫﺬﻩ اﻟﺸﺮﳛﺔ اﳌﺘﻜﺎﻣﻠﺔ‪ ،‬وﻫﺬا ﻣﺎ ﻳﺪﻋﻰ اﻵن‬
‫ﺑ ـ”‪ .”design gap‬اﻟﺸﻜﻞ‪ 10-3‬ﻳﺒﲔ اﻟﻌﻼﻗﺔ ﺑﲔ اﻹﻧﺘﺎﺟﻴﺔ اﻟﺘﺼﻤﻴﻤﻴﺔ ﳌﻬﻨﺪﺳﻲ ﺗﺼﻤﻴﻢ اﻟﺸﺮاﺋﺢ اﳌﺘﻜﺎﻣﻠﺔ وﺑﲔ ﻋﺪد اﻟﱰاﻧﺰﺳﺘﻮرات اﻟﱵ‬
‫ﳝﻜﻦ أن ﺗﻮﺿﻊ ﻋﻠﻰ ﺷﺮﳛﺔ ﺳﻴﻠﻴﻜﻮﻧﻴﺔ‪.‬‬

‫اﻟﺸﻜﻞ‪ 10-3‬اﻟﻌﻼﻗﺔ ﺑﲔ ازدﻳﺎد ﺗﻌﻘﻴﺪ اﻟﺪارات اﳌﺘﻜﺎﻣﻠﺔ وﻣﻘﺪرة اﳌﺼﻤﻤﲔ ﻋﻠﻰ ﺗﻄﻮﻳﺮﻫﺎ‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪150‬‬
‫‪23‬‬ ‫اﻟﻔﺼﻞ اﻟﺜﺎﻟﺚ | ‪Chapter 3‬‬

‫إن ﻧﺸﻮء ﻫﺬﻩ اﻟﻔﺠﻮة ﻳﻘﻮد إﱃ اﳊﺎﺟﺔ ﰲ اﻟﺒﺤﺚ ﻋﻦ ﻃﺮاﺋﻖ ووﺳﺎﺋﻞ ﻟﻮﺻﻒ اﻟﻜﻴﺎن اﻟﺼﻠﺐ ﲟﺴﺘﻮﻳﺎت ﺑﺮﳎﻴﺔ أﻋﻠﻰ وﻫﻮ ﻣﺎ ﻳﻌﺮف‬
‫اﺻﻄﻼﺣﺎً ﺑـ”‪ .”high-level abstraction‬ﻋﻠﻰ اﻟﺮﻏﻢ ﻣﻦ أن اﻟﺘﺼﻤﻴﻢ اﻟﺬي ﳝﻜﻦ إﻧﺸﺎؤﻩ ﻣﻦ ﻣﺴﺘﻮى ﺑﺮﳎﻲ أﻋﻠﻰ ﻗﺪ ﻳﻜﻮن أﻗﻞ ﻛﻔﺎءة‬
‫ﻣﻘﺎرﻧﺔً ﻣﻊ اﻟﺘﺼﻤﻴﻢ اﻟﺬي ﻳﺘﻢ إﻧﺸﺎؤﻩ ﻣﺒﺎﺷﺮة ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت وﺻﻒ اﻟﻜﻴﺎن اﻟﺼﻠﺐ‪ ،‬إﻻ أن ﻫﺬا اﻷﻣﺮ أﻗﻞ أﳘﻴﺔ ﺑﻜﺜﲑ ﻣﻦ ﻣﺴﺎﺋﻞ اﻟﺘﻌﻘﻴﺪ‬
‫اﻟﱪﳎﻲ واﳉﻬﻮد اﻟﻜﺒﲑة واﻟﺰﻣﻦ اﳌﺼﺮوف ﻟﻠﱪﳎﺔ ﺑﻠﻐﺎت اﻟﻜﻴﺎن اﻟﺼﻠﺐ‪ .‬ﻋﻠﻰ ﻛﻞ ﺣﺎل ﻓﺈﻧﻪ ﻳﺘ ﱡﻢ ﺑﺬل اﻟﻌﺪﻳﺪ ﻣﻦ اﳉﻬﻮد ﻹﳚﺎد أدوات ﺑﺮﳎﻴﺔ‬
‫ﻠﻐﺎت ﻋﺎﻟﻴﺔ اﳌﺴﺘﻮى ﻬﺗﺪف إﱃ اﻟﻮﺻﻮل ﻟﺘﺼﻤﻴﻢ أﻣﺜﻠﻲ‪.‬‬

‫ﻳﻮﺟﺪ اﻟﻌﺪﻳﺪ ﻣﻦ ﻟﻐﺎت ﺑﺮﳎﺔ اﻟﻜﻴﺎن اﻟﺼﻠﺐ ﻋﺎﻟﻴﺔ اﳌﺴﺘﻮى )‪ (HLLs‬ﻣﺜﻞ‪ ،Ada, Prolog, C, C++ and Java :‬ﻫﺬﻩ اﻟﻠﻐﺎت ﻳﺘﻢ‬
‫ﺗﻀﻤﻴﻨﻬﺎ ﰲ ﻣﱰﲨﺎت ‪ C-to-HDL‬ﳐﺘﻠﻔﺔ]‪ .[391‬ﻓﻴﻤﺎ ﻳﻠﻲ ﻧﺴﺘﻌﺮض ﺑﺈﳚﺎز ﺑﻌﺾ أﻗﻮى وأﺷﻬﺮ ﻫﺬﻩ اﳌﱰﲨﺎت‪.‬‬

‫ﻟﻐﺔ اﻟـ‪:(Java-based Hardware Description Language) JHDL‬‬ ‫‪1-3-3-3‬‬

‫وﻫﻲ ﻟﻐﺔ ﺗﻮﺻﻴﻒ ﻛﻴﺎن ﺻﻠﺐ ذات ﻣﺴﺘﻮى ﺑﻨﻴﻮي ﻣﻨﺨﻔﺾ‪ ،‬ﺗﺮﻛﺰ ﺑﺸﻜﻞ رﺋﻴﺴﻲ ﻋﻠﻰ ﺑﺮﳎﺔ اﻟﻜﻴﺎن اﻟﺼﻠﺐ وﻓﻖ ﻣﻨﻬﺞ اﻟﱪﳎﺔ ﻏﺮﺿﻴﺔ‬
‫اﻟﺘﻮﺟﻪ )‪ (Object Oriented‬ﻣﻦ ﺧﻼل ﺣﺰم ﳎﻤﻮﻋﺎت اﻟﺒﻮاﺑﺎت داﺧﻞ ﻋﻨﺎﺻﺮ ﻟﻐﺔ اﻟـ‪.[392]JAVA‬‬

‫ﰎ ﺗﻄﻮﻳﺮ ﻫﺬﻩ اﻟﻠﻐﺔ ﰲ ﻋﺎم ‪ 1997‬ﰲ ﳐﺘﱪات أﲝﺎث اﳊﻮاﺳﺐ اﻟﻘﺎﺑﻠﺔ ﻟﻠﺘﻌﺪﻳﻞ ﰲ ﺟﺎﻣﻌﺔ ‪.[393]Brigham Young‬‬

‫ﺗﺄﰐ ﻫﺬﻩ اﻟﻠﻐﺔ ﻗﻤﺔ ﻟﻐﺎت اﻟﱪﳎﺔ ﻣﻦ ﻧﺎﺣﻴﺔ ﺗﺼﻨﻴﻔﺎﻬﺗﺎ ﻟﻠﻤﻜﺘﺒﺎت اﻟﱵ ﺗﻌﻤﻞ ﺑﺎﺳﺘﺨﺪام اﳉﺎﻓﺎ‪ ،‬وﻫﻲ ﺑﺸﻜﻞ أﺳﺎﺳﻲ ﺗﺴﺘﺨﺪم ﰲ ﺗﺼﻤﻴﻢ‬
‫اﻟﺪارات اﻟﺮﻗﻤﻴﺔ اﻟﱵ ﻳﺘﻢ ﺑﺮﳎﺘﻬﺎ ﻋﻠﻰ ﺷﺮاﺋﺢ اﻟ ـ‪ ،FPGA‬وﺗﺪﻋﻢ ﺑﺸﻜﻞ أﺳﺎﺳﻲ ﺷﺮاﺋﺢ ﺷﺮﻛﺔ ‪.Xilinx‬‬

‫اﻟﺒﻴﺌﺔ ‪:(Catapult-C: C-based Hardware Programming Language) Catapult-C‬‬ ‫‪2-3-3-3‬‬

‫ﰲ ﻋﺎم ‪ 2004‬أﻋﻠﻨﺖ ﺷﺮﻛﺔ ‪ Mentor Graphics‬رﲰﻴﺎً ﻋﻦ ﻣﻨﺘﺠﻬﺎ ‪ Catapult-C‬ﻛﻠﻐﺔ ﺑﺮﳎﻴﺔ ذات ﻣﺴﺘﻮى ٍ‬
‫ﻋﺎل ﻟﻠﻜﻴﺎن اﻟﺼﻠﺐ‪،‬‬
‫ﺗﺪﻋﻢ اﻟﺘﺼﻤﻴﻢ اﳍﺮﻣﻲ إﺿﺎﻓﺔً إﱃ ﺧﺎﺻﻴﺔ اﻟـ‪ Pipeline‬واﻷﻧﻈﻤﺔ اﻟﻔﺮﻋﻴﺔ ﻣﺘﻌﺪدة اﻟﻜﺘﻞ ﻣﻦ ﺗﻮﺻﻴﻔﺎت ‪ .ANSI C/C++‬وﻇﻴﻔﺔ اﻟﱪﻧﺎﻣﺞ‬
‫‪ Catapult-C‬اﻷﺳﺎﺳﻴﺔ ﺗﻮﻟﻴﺪ ﻣﻠﻒ ‪ RTL‬ﺑﺼﻴﻐﺔ ‪ VHDL‬أو ‪ Verilog‬ﺗﺴﺘﺨﺪم ﻻﺣﻘﺎً ﻟﱪﳎﺔ ﺷﺮاﺋﺢ اﻟـ‪.ASICs / FPGAs‬‬

‫اﻟﺸﻜﻞ‪ 12-3‬اﻟﻮاﺟﻬﺔ اﻟﱪﳎﻴﺔ ﻟﻠﺒﻴﺌﺔ ‪Catapult-C‬‬ ‫اﻟﺸﻜﻞ‪ 11-3‬اﳌﺨﻄﻂ اﻟﺘﺪﻓﻘﻲ ﻟﺘﻮﻟﻴﺪ اﻟـ‪netlist‬‬

‫‪151‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Hardware Programming Languages‬‬ ‫ﻟﻐﺎت ﺑﺮﳎﺔ أﻧﻈﻤﺔ اﻟﻜﻴﺎن اﻟﺼﻠﺐ |‬

‫ﺗﻮﻓﺮ اﻟﺒﻴﺌﺔ ‪ Catapult-C‬إﻣﻜﺎﻧﻴﺔ ﺑﻨﺎء أﻧﻈﻤﺔ ﻣﻌﻘﺪة ﺟﺪاً ﺑﺄﻗﻞ ﺟﻬﺪ وزﻣﻦ ﳑﻜﻦ‪ ،‬ﻛﻤﺎ أ�ﺎ ﺗﺘﻀﻤﻦ اﻟﻌﺪﻳﺪ ﻣﻦ اﻟﻮﻇﺎﺋﻒ اﳌﺘﻘﺪﻣﺔ اﳌﺘﻌﻠﻘﺔ‬
‫ﺑﺘﺤﻠﻴﻞ ﺳﻠﻮك اﻟﱪﻧﺎﻣﺞ ﻋﻠﻰ اﻟﻜﻴﺎن اﻟﺼﻠﺐ‪ ،‬ﻛﻤﺎ أن ﲨﻴﻊ ﻋﻤﻠﻴﺎت اﻟﺘﺤﻠﻴﻞ واﻟﺘﺤﻘﻖ ﺗﺘﻢ ﺑﺸﻜﻞ ﻣﺆﲤﺖ‪ .‬اﻟﺸﻜﻞ‪ 11-3‬ﻳﺒﲔ اﳌﺨﻄﻂ‬
‫اﻟﺘﺪﻓﻘﻲ ﻟﻮﻇﺎﺋﻒ اﻟﱪﻧﺎﻣﺞ اﳌﺆﲤﺘﺔ‪ ،‬ﺣﻴﺚ ان اﻟﺪﺧﻞ ﻫﻮ اﻟﱪﻧﺎﻣﺞ اﳌﻜﺘﻮب ﺑﻠﻐﺔ ‪ C/C++‬واﳋﺮج ﻫﻮ ﻣﻠﻒ ‪ .RTL‬اﻟﺸﻜﻞ‪ 12-3‬ﻳﺒﲔ‬
‫اﻟﻮاﺟﻬﺔ اﻟﱪﳎﻴﺔ ﻟﻠﱪﻧﺎﻣﺞ ‪.[394]Catapult-C‬‬

‫اﻟﺒﻴﺌﺔ ـ‪:(Impulse-C: C-based Hardware Programming Language) Impulse-C‬‬ ‫‪3-3-3-3‬‬

‫ﻇﻬﺮت ﺑﻴﺌﺔ ‪ Impulse-C‬ﰲ ﻋﺎم ‪ 2003‬وﻗﺪ ﰎ ﺗﻄﻮﻳﺮﻫﺎ ﻣﻦ ﻗﺒﻞ ﺷﺮﻛﺔ ‪ Impulse Accelerated Technologies‬وﻫﻲ ﻋﺒﺎرة ﻋﻦ‬
‫ﺑﻴﺌﺔ ﺑﺮﳎﻴﺔ ﻋﺎﻟﻴﺔ اﳌﺴﺘﻮى ﺗﺘﻀﻤﻦ ﻣﱰﺟﻢ ‪ Impulse-C‬ﻣﺘﻮاﻓﻖ ﻣﻊ اﳌﻌﻴﺎر ‪ ANSI-C‬اﻟﺘﻘﻠﻴﺪي‪ ،‬وﺑﺎﻟﺘﺎﱄ ﳝﻜﻦ اﺳﺘﺨﺪام أدوات ﻟﻐﺔ اﻟـ‪C‬‬

‫اﻟﺘﻘﻠﻴﺪﻳﺔ ﰲ ﺗﻄﺒﻴﻘﺎت اﻟﺘﺼﻤﻴﻢ واﻟﻔﺤﺺ اﻟﱵ اﳋﺎﺻﺔ ﺑﱪﳎﺔ ﺷﺮاﺋﺢ اﻟـ‪.FPGA‬‬

‫ﺗﺘﻤﻴﺰ ﺑﻴﺌﺔ ‪ Impulse-C‬ﻋﻦ ﻟﻐﺔ ‪ C‬اﻟﺘﻘﻠﻴﺪﻳﺔ ﺑﺄ�ﺎ ﲤﻠﻚ ﳕﺎذج ﺑﺮﳎﻴﺔ ﻟﻠﱪﳎﺔ اﻟﺘﻔﺮﻋﻴﺔ ﻟﻠﻤﻌﺎﳉﺎت اﳌﺪﳎﺔ ﻋﻠﻰ ﺷﺮاﺋﺢ اﻟـ‪ ،FPGA‬وﳍﺬا‬
‫اﻟﻐﺮض ﺗﺘﻀﻤﻦ ﺑﻴﺌﺔ ‪ Impulse-C‬ﺗﻮﺳﻴﻌﺎً ﻟﻠﻐﺔ اﻟـ‪ C‬ﰲ ﻃﺮﻳﻘﺔ ﺻﻴﺎﻏﺔ اﻟﺘﻮاﺑﻊ وأﻧﻮاع اﻟﺒﻴﺎﻧﺎت‪ ،‬ﳑﺎ ﻳﺴﻤﺢ ﻟﻠﺘﻄﺒﻴﻘﺎت اﳌﻜﺘﻮﺑﺔ ﺑﻠﻐﺔ ‪C‬‬

‫اﻟﺘﻘﻠﻴﺪﻳﺔ أن ﺗﺘﻢ ﻋﻤﻠﻴﺔ دﳎﻬﺎ ﰲ اﻟﺒﻨﻴﺔ اﻟﺘﻔﺮﻋﻴﺔ اﳌﻌﻘﺪة اﳌﻤﻜﻦ ﺗﻮاﺟﺪﻫﺎ ﰲ اﳌﻌﺎﳉﺎت اﳌﺼﻐﺮة اﳌﺪﳎﺔ ﻋﻠﻰ ﺷﺮاﺋﺢ اﻟـ‪.FPGA‬‬

‫إن ﺗﻄﺒﻴﻘﺎت ‪ Impulse-C‬واﺳﻌﺔ ﺟﺪاً‪ ،‬وﺗﺮﻛﺰ ﻋﻠﻰ اﻟﺘﻄﺒﻴﻘﺎت ﻋﺎﻟﻴﺔ اﻷداء وذات اﻷداء اﳊﺮج‪ .‬ﻓﻌﻠﻰ ﺳﺒﻴﻞ اﳌﺜﺎل ﻳﺘﻢ اﺳﺘﺨﺪاﻣﻬﺎ ﰲ‬
‫ﺗﻄﺒﻴﻘﺎت ﻣﻌﺎﳉﺔ اﻟﺼﻮر ‪،‬وﻣﻌﺎﳉﺔ اﻻﺷﺎرات اﻟﺮﻗﻤﻴﺔ ﰲ اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ‪ ،‬وﻛﺬﻟﻚ ﻟﺘﺤﻘﻴﻖ أداء ﻋﺎﱄ ﰲ اﻟﺘﻄﺒﻴﻘﺎت اﳊﺎﺳﻮﺑﻴﺔ ﻛﺎﻟﺘﺤﻠﻴﻞ اﳌﺎﱄ‬
‫واﳌﻌﻠﻮﻣﺎت اﻟﺒﻴﻮﻟﻮﺟﻴﺔ واﳊﻮاﺳﻴﺐ اﻟﻌﻠﻤﻴﺔ‪.‬‬

‫ﺗﺘﻀﻤﻦ اﻟﺒﻴﺌﺔ ‪ Impulse-C CoDeveloper‬أدوات ﳏﺎﻛﺎة ﻟﻠﱪاﻣﺞ وﻟﻠﻤﻜﻮﻧﺎت اﻟﺼﻠﺒﺔ ﲤﺎﻣﺎً‪ ،‬إﺿﺎﻓﺔً إﱃ اﻷدوات اﻟﱪﳎﻴﺔ‪ .‬ﺗﺘﻢ ﻋﻤﻠﻴﺔ‬
‫ﲢﻮﻳﻞ اﻟﱪﻧﺎﻣﺞ اﳌﻜﺘﻮب ﺑﻠﻐﺔ اﻟـ‪) C‬ﺑﺎﺳﺘﺨﺪام اﻟﺒﻴﺌﺔ ‪ (Impulse-C‬إﱃ ﻣﻠﻒ ﺑﺮﳎﻲ ﻳﺘﻢ ﺑﺮﳎﺘﻪ ﻋﻠﻰ ﺷﺮﳛﺔ اﻟـ‪ FPGA‬ﻣﻦ ﺧﻼل ﺳﺘﺔ‬
‫ﻣﺮاﺣﻞ ﻣﻮﺿﺤﺔ ﻋﻠﻰ اﻟﺸﻜﻞ‪ .13-3‬ﻛﻤﺎ ﻳﺒﲔ اﻟﺸﻜﻞ‪ 14-3‬واﺟﻬﺔ ﺑﻴﺌﺔ اﻟﱪﻧﺎﻣﺞ ‪.[395] Impulse-C CoDeveloper‬‬

‫اﻟﺸﻜﻞ‪ 14-3‬واﺟﻬﺔ ﺑﻴﺌﺔ اﻟﱪﻧﺎﻣﺞ ‪Impulse-C CoDeveloper‬‬ ‫اﻟﺸﻜﻞ‪ 13-3‬اﳌﺨﻄﻂ اﻟﺘﺪﻓﻘﻲ ﻟﺘﻮﻟﻴﺪ اﳌﻠﻒ اﻟﱪﳎﻲ‬

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‫‪23‬‬ ‫اﻟﻔﺼﻞ اﻟﺜﺎﻟﺚ | ‪Chapter 3‬‬

‫اﻟﺒﻴﺌﺔ ‪:(Handle-C: C-based Hardware Programming Language) Handel-C‬‬ ‫‪4-3-3-3‬‬

‫ﰎ ﺗﻄﻮﻳﺮ ﻫﺬﻩ اﻟﻠﻐﺔ ﰲ ﻋﺎم ‪ 1996‬وﻛﺎﻧﺖ ﺗﻌﻮد إﱃ ﺳﻠﺴﻠﺔ ﻣﻦ ﻟﻐﺎت ﺗﻮﺻﻴﻒ اﻟﻜﻴﺎن اﻟﺼﻠﺐ )‪ (Handel-HDL‬اﳌﻄﻮرة ﻣﻦ ﻗﺒﻞ ﳐﺘﱪ‬
‫اﳊﺎﺳﺒﺎت ﰲ ﺟﺎﻣﻌﺔ أﻛﺴﻔﻮرد وﺗﺴﻮﻳﻘﻬﺎ ﲡﺎرﻳﺎً ﻣﻦ ﻗﺒﻞ ﺷﺮﻛﺔ ‪ .[396,397]Celoxica‬اﻟﺒﻴﺌﺔ ‪ Handel-C‬ﻋﺒﺎرة ﻋﻦ ﻟﻐﺔ ﺑﺮﳎﺔ ﻋﺎﻟﻴﺔ اﳌﺴﺘﻮى‬
‫ﻣﺘﻮاﻓﻘﺔ ﻣﻊ اﳌﻌﻴﺎر ‪ ANSI-C‬وﳐﺼﺼﺔ ﻟﱪﳎﺔ اﻟﻜﻴﺎن اﻟﺼﻠﺐ‪ ،‬وﺗﻌﺘﱪ أول اﻟﻠﻐﺎت ﻋﺎﻟﻴﺔ اﳌﺴﺘﻮى اﳌﺴﺘﺨﺪﻣﺔ ﰲ ﺗﺼﻤﻴﻢ اﻟﻜﻴﺎن اﻟﺼﻠﺐ‬
‫وﺑﺮﳎﺔ اﳌﻌﺎﳉﺎت‪ ،‬إﺿﺎﻓﺔً إﱃ أ�ﺎ ﺗﺮﻛﺰ ﻣﺆﺧﺮاً ﻋﻠﻰ ﺑﺮﳎﺔ اﻟـ‪ .(high performance reconfigurable computing) HPRC‬ﻋﻠﻰ‬
‫ﺧﻼف ﲨﻴﻊ ﻟﻐﺎت اﻟﱪﳎﺔ اﻷﺧﺮى واﻟﱵ ﺗﺴﺘﻬﺪف ﺑﻨﻴﺔ ﺧﺎﺻﺔ‪ ،‬ﻓﺈن اﻟﺒﻴﺌﺔ اﻟﱪﳎﻴﺔ ‪ Handel-C‬ﺗﺴﺘﻄﻴﻊ أن ﺗﱰﺟﻢ اﻟﱪﻧﺎﻣﺞ ﻋﺎﱄ اﳌﺴﺘﻮى‬
‫إﱃ اﻟﻌﺪﻳﺪ ﻣﻦ ﻟﻐﺎت اﻟﱪﳎﺔ اﻟﺘﺼﻤﻴﻤﻴﺔ‪ ،‬وﺑﻌﺪ ذﻟﻚ ﳝﻜﻨﻬﺎ أن ﺗﱰﲨﻪ وﻓﻘﺎً ﻟﻠﻜﻴﺎن اﻟﺼﻠﺐ اﶈﺪد‪ ،‬وﺑﺎﻟﺘﺎﱄ ﻓﺈن اﳌﱪﻣﺞ ﻳﺴﺘﻄﻴﻊ أن ﻳﺮﻛﺰ ﻋﻠﻰ‬
‫اﳌﻬﺎم اﻟﱪﳎﻴﺔ ﺑﺪﻻً ﻣﻦ اﻟﱰﻛﻴﺰ ﻋﻠﻰ ﻃﺎﺑﻊ ﻟﻐﺔ ﺗﺼﻤﻴﻢ ذات ﺑﻨﻴﺔ ﳏﺪدة‪ .‬ﺗﺘﻀﻤﻦ ﻫﺬﻩ اﻟﻠﻐﺔ ﺗﻌﻠﻴﻤﺎت ﺗﺼﺮﳛﺎت ﳏﺪدة ﻟﻌﺮض اﻟﺒﻴﺎﻧﺎت‬
‫وﻣﻌﺎﳉﺔ ﻣﺘﻮازﻳﺔ واﺗﺼﺎل ﺑﲔ اﻟﻮﺣﺪات اﳌﺘﻮازﻳﺔ اﳌﺘﺰاﻣﻨﺔ]‪ .[398‬اﻟﺸﻜﻞ‪ 15-3‬ﻳﺒﲔ أوﺟﻪ اﻟﺘﺸﺎﺑﻪ ﺑﲔ ﻟﻐﺔ اﻟـ‪ Handel-C‬واﻟﻠﻐﺔ اﻟﻘﻴﺎﺳﻴﺔ‬
‫‪ANSI-C‬؛ ﺗﻀﻴﻒ ﻟﻐﺔ اﻟـ‪ Handel-C‬ﺑﻌﺾ اﻟﺒﲎ اﻟﱪﳎﻴﺔ اﻟﺒﺴﻴﻄﺔ ﻟـ‪ ANSI-C‬ﻟﺪﻋﻤﻬﺎ ﰲ وﺻﻒ ﺧﺼﺎﺋﺺ اﻟﻜﻴﺎن اﻟﺼﻠﺐ‪.‬‬

‫‪ANSI-C‬‬ ‫اﻟﺸﻜﻞ‪ 15-3‬أوﺟﻪ اﻟﺘﺸﺎﺑﻪ ﺑﲔ ﻟﻐﺔ اﻟـ‪ Handel-C‬واﻟﻠﻐﺔ اﻟﻘﻴﺎﺳﻴﺔ‬

‫اﻟﺸﻜﻞ‪ 17-3‬واﺟﻬﺔ ﺑﻴﺌﺔ اﻟﱪﻧﺎﻣﺞ ‪Handle-C‬‬ ‫اﻟﺸﻜﻞ‪ 16-3‬اﳌﺨﻄﻂ اﻟﺘﺪﻓﻘﻲ ﻟﺘﻮﻟﻴﺪ اﳌﻠﻒ اﻟﱪﳎﻲ‬

‫ﻣﺆﺧﺮاً‪ ،‬اﻣﺘﻠﻜﺖ ﺷﺮﻛﺔ ‪ Mentor Graphics‬اﳊﻘﻮق اﻟﻜﺎﻣﻠﺔ ﻟـ‪ ،Handel-C‬وﻗﺎﻣﺖ أﻳﻀﺎً ﻋﻠﻰ ﺗﻄﻮﻳﺮﻫﺎ‪ ،‬وأوﺟﺪت ﺑﻴﺌﺔ ﺑﺮﳎﻴﺔ ﻣﺘﻄﻮرة‬
‫ﳐﺼﺼﺔ ﳍﺬﻩ اﻟﻠﻐﺔ‪ .‬اﻟﺸﻜﻞ‪ 16-3‬ﻳﺒﲔ اﳌﺨﻄﻂ اﻟﺘﺪﻓﻘﻲ ﻟﺘﻮﻟﻴﺪ اﳌﻠﻒ اﻟﱪﳎﻲ ﰲ اﻟﺒﻴﺌﺔ ‪.Handel-C‬‬
‫‪153‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Hardware Programming Languages‬‬ ‫ﻟﻐﺎت ﺑﺮﳎﺔ أﻧﻈﻤﺔ اﻟﻜﻴﺎن اﻟﺼﻠﺐ |‬

‫اﻟﺸﻜﻞ‪ 17-3‬ﻳﺒﲔ اﻟﻮاﺟﻬﺔ اﻟﱪﳎﻴﺔ ﻟﻠﱪﻧﺎﻣﺞ ‪ DK Design Suite‬اﳌﻄﻮر ﻣﻦ ﻗﺒﻞ ﺷﺮﻛﺔ ‪ Mentor Graphics‬ﻛﻮاﺟﻬﺔ ﺑﺮﳎﻴﺔ‬
‫ﻟﻠـ‪.[399]Handel-C‬‬

‫ﺗﻌﺮف اﻟﺒﻴﺌﺔ اﻟﱪﳎﻴﺔ ‪ Handel-C‬ﺑﺎﻟﺼﻌﻮﺑﺔ واﻟﺜﻤﻦ اﻟﺒﺎﻫﻆ‪ ،‬إﻻ أ�ﺎ ﲤﻠﻚ ﻣﻘﻮﻣﺎت ﻋﺪﻳﺪة ﲡﻌﻠﻬﺎ ﻣﺘﻮﻓﻘﺔ ﻋﻠﻰ ﻧﻈﺎﺋﺮﻫﺎ ﻣﻦ اﻟﻠﻐﺎت‬
‫اﻷﺧﺮى‪ ،‬ﺣﻴﺚ أ�ﺎ ﲤﻠﻚ ﻣﺮوﻧﺔ ﻛﺒﲑة ﺟﺪاً ﻟﻌﻤﻠﻴﺎت اﻷﻣﺜﻠﻴﺔ ﻋﻠﻰ اﳌﺴﺘﻮى اﳌﻨﺨﻔﺾ )‪ ،(low-level optimization‬إﺿﺎﻓﺔً إﱃ أ�ﺎ‬
‫ﺗﺪﻋﻢ ﻃﻴﻔﺎً واﺳﻌﺎً ﺟﺪاً ﻣﻦ اﻟﺸﺮاﺋﺢ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ‪ ،‬ﻛﺬﻟﻚ ﻓﺈ�ﺎ أﻗﺮب إﱃ ﻛﻮ�ﺎ ﻟﻐﺔ ‪ (C-like) C‬ﻣﻦ ﺑﺎﻗﻲ اﻟﻠﻐﺎت اﻷﺧﺮى‪ ،‬وأﺧﲑاً ﻓﺈن‬
‫ﻫﺬﻩ اﻟﺒﻴﺌﺔ وﻋﻠﻰ اﻟﺮﻏﻢ ﻣﻦ ﻛﻮ�ﺎ ﺑﺎﻫﻈﺔ اﻟﺜﻤﻦ إﻻ أ�ﺎ ﺗﺘﻮﻓﺮ ﻟﻠﻬﻴﺌﺎت اﻷﻛﺎدﳝﻴﺔ ﺑﺄﺳﻌﺎر ﳐﻔﻀﺔ ﺟﺪاً ﳑﺎ ﻳﺘﻴﺢ ﻟﻠﻄﻼب اﺳﺘﺜﻤﺎر اﳌﻴﺰات‬
‫اﳍﺎﺋﻠﺔ ﺟﺪاً‪ .‬اﻟﺸﻜﻞ‪ 18-3‬ﻳﺒﲔ ﺑﺮﻧﺎﳎﺎً ﻟﺘﺸﻐﻴﻞ ﻣﺘﺘﺎﻟﻴﺔ ﻓﻴﺒﻮﻧﺎﺗﺸﻲ اﳊﺴﺎﺑﻴﺔ ﻋﻠﻰ ﺷﺮﳛﺔ ‪ FPGA‬ﺑﺎﺳﺘﺨﺪام ﻟﻐﺔ اﻟـ‪.Handel-C‬‬

‫)(‪void main‬‬
‫{‬
‫;‪unsigned int 100 prev, fib‬‬
‫;‪unsigned int 7 n‬‬
‫} ;‪par { fib = 1; prev = 0; n = 0‬‬
‫‪do‬‬
‫{ ‪par‬‬
‫;‪fib += prev‬‬
‫;‪prev = fib‬‬
‫;‪n++‬‬
‫}‬
‫;)‪while (n != 30‬‬
‫}‬

‫اﻟﺸﻜﻞ‪ 18-3‬ﻣﺘﺘﺎﻟﻴﺔ ﻓﻴﺒﻮﻧﺎﺗﺸﻲ اﳊﺴﺎﺑﻴﺔ ﺑﻠﻐﺔ اﻟـ‪Handel-C‬‬

‫اﻟﺸﻜﻞ ‪ 19-3‬ﲤﺜﻴﻞ اﻟﺘﻌﻠﻴﻤﺔ ”‪ “Par‬ﻟﻠﺘﻨﻔﻴﺬ اﻟﺘﻔﺮﻋﻲ واﻟﺘﻌﻠﻴﻤﺔ ”‪ “Seq‬ﻟﻠﺘﻨﻔﻴﺬ اﻟﺘﺴﻠﺴﻠﻲ‬

‫اﻟﻠﻐﺔ ‪:(SAFL Hardware Programming Language) SAFL‬‬ ‫‪5-3-3-3‬‬

‫ﻋﺒﺎرة ﻋﻦ ﻟﻐﺔ ﺑﺮﳎﺔ وﻇﻴﻔﻴﺔ )‪ (Functional Programming‬ﻋﺎﻟﻴﺔ اﳌﺴﺘﻮى ﳐﺼﺼﺔ ﻟﱪﳎﺔ اﻟﻜﻴﺎن اﻟﺼﻠﺐ‪ .‬إن ﻟﻐﺎت‬ ‫ﻫﺬﻩ اﻟﻠﻐﺔ‬
‫]‪[400‬‬

‫اﻟﱪﳎﻴﺔ اﻟﻮﻇﻴﻔﻴﺔ ﺗﻌﺎﻣﻞ اﳊﺴﺎب ﻋﻠﻰ أﺳﺎس ﺗﻘﻴﻴﻢ اﻟﻮﻇﺎﺋﻒ اﻟﺮﻳﺎﺿﻴﺔ ﻣﻊ اﻟﱰﻛﻴﺰ ﻋﻠﻰ ﺗﻘﻴﻴﻢ اﻟﺘﻌﺎﺑﲑ ﺑﺪﻻً ﻣﻦ ﺗﻨﻔﻴﺬ اﻷواﻣﺮ‪ .‬إن اﻟﻠﻐﺎت‬
‫اﻟﻮﻇﻴﻔﻴﺔ اﻟﺒﺤﺘﺔ ﲢﺚ وﺗﺸﺠﻊ ﻋﻠﻰ اﺳﺘﺨﺪام اﻻﺳﺘﺪﻻل اﳌﻨﻄﻘﻲ اﻷﺳﺎﺳﻲ ﺣﻮل اﻟﱪاﻣﺞ‪ ،‬ﻛﻤﺎ ﺗﺘﻤﻴﺰ أﻳﻀﺎً ﺑﺎﺳﺘﺨﺪام وﻇﺎﺋﻒ ﻣﻦ درﺟﺔ‬
‫أﻋﻠﻰ )‪ – (higher-order functions‬اﻟﻮﻇﺎﺋﻒ اﻟﱵ ﺗﺴﺘﺨﺪم وﻇﺎﺋﻒ أﺧﺮى ﻛﻮﺳﺎﺋﻂ‪ ،‬وﺗﻌﺘﱪ ﻫﺬﻩ اﻟﻠﻐﺎت ﰲ اﻟﻐﺎﻟﺐ ذات ﻣﻴﺰات‬
‫أﻋﻠﻰ ﺑﻜﺜﲑ ﻣﻦ ﻟﻐﺎت اﻟﱪﳎﺔ اﻟﱵ ﺗﻨﻔﺬ ﻋﻦ ﻃﺮﻳﻖ أواﻣﺮ )‪.[401](Imperative Languages‬‬

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‫‪23‬‬ ‫اﻟﻔﺼﻞ اﻟﺜﺎﻟﺚ | ‪Chapter 3‬‬

‫اﻟﺒﻴﺌﺔ ‪:(SAFL Hardware Programming Language) DIME-C‬‬ ‫‪6-3-3-3‬‬

‫ﰎ ﺗﻄﻮﻳﺮ ﺑﻴﺌﺔ اﻟﱪﳎﺔ ‪ DIME-C‬ﻣﻦ ﻗﺒﻞ ﺷﺮﻛﺔ ‪[402] Nallatech‬وﺗﻌﺘﱪ ﻣﻦ اﻟﻠﻐﺎت اﻟﱵ ﺗﻌﺘﻤﺪ ﻋﻠﻰ ﳎﻤﻮﻋﺔ ﺟﺰﺋﻴﺔ ﻣﻦ اﳌﻌﻴﺎر ‪ANSI-‬‬

‫‪ C‬ﻓﻘﻂ‪ ،‬واﻟﺬي ﺑﺪورﻩ ﻳﻌﻄﻴﻬﺎ اﻟﻌﺪﻳﺪ ﻣﻦ اﳌﻴﺰات اﻟﻮاﺿﺤﺔ ﻋﻠﻰ ﺑﻌﺾ اﻟﻠﻐﺎت اﳌﺘﻘﺪﻣﺔ اﻷﺧﺮى ﻣﺜﻞ‪Handel-C and Mitrion-C :‬؛‬
‫ﻣﻦ ﻫﺬﻩ اﳌﻴﺰات أن اﳌﱪﻣﺞ ﻟﻦ ﳛﺘﺎج إﱃ ﺗﻌﻠﻢ ﺗﻌﻠﻴﻤﺎت وﻗﻮاﻋﺪ ﻟﻐﻮﻳﺔ ﺟﺪﻳﺪة ﺧﺎﺻﺔ ﺑﺎﻟﻠﻐﺔ ﻋﻨﺪ اﺳﺘﺨﺪام ﻟﻐﺔ ‪ ،DIME-C‬وإﳕﺎ ﻳﻜﻔﻲ أن‬
‫ﻳﻌﺮف اﳌﱪﻣﺞ أي ﺟﺰء ﻣﻦ ‪ ANSI-C‬ﻻ ﳝﻜﻦ اﺳﺘﺨﺪاﻣﻪ‪ .‬أﻳﻀﺎً ﻣﻦ اﳌﻴﺰات اﳍﺎﻣﺔ ﻫﻮ أن اﻟﱪاﻣﺞ اﳌﻜﺘﻮﺑﺔ ﺑﺎﺳﺘﺨﺪام ﻟﻐﺔ اﻟﱪﳎﺔ‬
‫‪DIME-C‬ﳝﻜﻦ أن ﺗﱰﺟﻢ )‪ (compiled‬وﻳﺘﻢ ﺗﺘﺒﻊ أﺧﻄﺎﺋﻬﺎ )‪ (debugged‬ﺑﺎﺳﺘﺨﺪام ﻣﱰﲨﺎت ﻟﻐﺔ اﻟـ‪ C‬اﻟﻘﻴﺎﺳﻴﺔ]‪ .[403‬اﻟﺸﻜﻞ‪20-‬‬

‫‪ 3‬ﻳﺒﲔ ﳏﺮر اﻟﺒﻴﺌﺔ اﻟﱪﳎﻴﺔ ‪.DIME-C‬‬

‫اﻟﺸﻜﻞ‪ 20-3‬ﺑﻴﺌﺔ ﻟﻐﺔ اﻟﱪﳎﺔ ‪DIME-C‬‬

‫ﲤﻠﻚ ﻟﻐﺔ اﻟﱪﳎﺔ ‪ DIME-C‬ﺑﻴﺌﺔ ﺗﻄﻮﻳﺮ ﺗﺘﻀﻤﻦ ﻣﱰﺟﻢ ﻟﻐﻮي وﺑﺮﻧﺎﻣﺞ ﺗﺘﺒﻊ أﺧﻄﺎء‪ ،‬إﻻ أن اﻟﺒﻴﺌﺔ اﻟﱪﳎﻴﺔ ﲤﻠﻚ ﺑﻌﺾ اﳌﺸﺎﻛﻞ اﳌﺘﻌﻠﻘﺔ‬
‫ﺑﺘﻔﺴﲑ اﻷﺧﻄﺎء اﻟﱪﳎﻴﺔ‪ ،‬إﺿﺎﻓﺔ إﱃ ﳏﺪودﻳﺔ ﰲ إﻣﻜﺎﻧﻴﺎت ووﻇﺎﺋﻒ ﲢﺮﻳﺮ اﻟﱪاﻣﺞ اﳌﻜﺘﻮﺑﺔ‪ .‬ﻋﻤﻮﻣﺎً وﻋﻠﻰ اﻟﺮﻏﻢ ﻣﻦ ﻫﺬﻩ اﻟﻨﻘﺎط ﻓﺈن ﺑﻴﺌﺔ‬
‫ﳐﺼﺺ‬ ‫اﻟﱪﳎﺔ ‪ DIME-C‬ﺗﻌﺘﱪ ﺑﻴﺌﺔ ﺟﻴﺪة ﻟﺘﻄﻮﻳﺮ ﺑﺮاﻣﺞ اﻟﻜﻴﺎن اﻟﺼﻠﺐ‪ .‬ﲤﻠﻚ اﻟﻠﻐﺔ أﻳﻀﺎً ﻣﻌﺎﰿ ﺑﻨﺎء ﺗﻄﺒﻴﻘﺎت ‪DIMETalk‬‬
‫]‪[404‬‬

‫ﻹﻧﺸﺎء ﺷﺒﻜﺎت ﻣﻦ ﻋﻨﺎﺻﺮ اﻟﻜﻴﺎن اﻟﺼﻠﺐ ﻋﻠﻰ ﺷﺮاﺋﺢ اﻟـ‪ ،FPGA‬ﻫﺬﻩ اﻟﻌﻨﺎﺻﺮ ﳝﻜﻦ أن ﺗﺘﻀﻤﻦ ﻛﺘﻞ ذاﻛﺮة أو ﻣﻨﺎﻓﺬ اﺗﺼﺎل ﻋﺎﻟﻴﺔ‬
‫اﻟﺴﺮﻋﺔ واﻟﱵ ﳝﻜﻦ أن ﺗﺮﺑﻂ ﲨﻴﻌﻬﺎ رﺳﻮﻣﻴﺎً ﺑﺎﺳﺘﺨﺪام اﻷداة ‪ DIMETalk‬ﻟﻴﺘﻢ ﺑﻌﻬﺪﻫﺎ ﺗﻮﻟﻴﺪ ﻣﻠﻒ اﻟﺒﻴﺎﻧﺎت اﻟﱪﳎﻲ ﻟﺸﺮﳛﺔ اﻟـ‪.FPGA‬‬
‫اﻟﺸﻜﻞ‪ 21-3‬ﻳﺒﲔ اﻷداة ‪.DIMETalk‬‬

‫اﻟﺸﻜﻞ‪ 21-3‬اﻷداة ‪ DIMETalk‬ﺗﻌﺮض ﺷﺒﻜﺔ اﺗﺼﺎل ﺑﲔ وﺣﺪات ﻣﻨﻄﻘﻴﺔ‬

‫‪155‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Hardware Programming Languages‬‬ ‫ﻟﻐﺎت ﺑﺮﳎﺔ أﻧﻈﻤﺔ اﻟﻜﻴﺎن اﻟﺼﻠﺐ |‬

‫اﻟﻠﻐﺔ ‪:(Spec-C: C-based Hardware Programming Language) Spec-C‬‬ ‫‪7-3-3-3‬‬

‫وﻫﻲ ﻋﺒﺎرة ﻋﻢ ﻟﻐﺔ وﺻﻒ ﻧﻈﺎم )‪ (System Description Language‬أو وﺻﻒ ﻣﺴﺘﻮى ﻧﻈﺎم‪ ،‬ﺗﻌﺘﻤﺪ ﻋﻠﻰ ﻟﻐﺔ اﻟـ‪ C‬اﻟﻘﻴﺎﺳﻴﺔ ﻋﺎﻟﻴﺔ‬
‫اﳌﺴﺘﻮى ﻟﱪﳎﺔ اﻟﻜﻴﺎن اﻟﺼﻠﺐ‪ .‬ﰎ ﺗﻄﻮﻳﺮﻫﺎ ﺑﺪاﻳﺔً ﰲ ﺟﺎﻣﻌﺔ ﻛﺎﻟﻴﻔﻮرﻧﻴﺎ ﻋﺎم ‪ 1997‬ﻟﺘﻜﻮن ﻋﺒﺎرة ﻋﻦ ﳎﻤﻮﻋﺎت ﺟﺰﺋﻴﺔ ﻣﻦ ﻣﻜﺘﺒﺎت ﻟﻐﺔ اﻟـ‪C‬‬

‫اﻟﻘﻴﺎﺳﻴﺔ ﻳﺘﻢ ﺗﻀﻤﻴﻨﻬﺎ ﺿﻤﻦ ﻣﱰﺟﻢ ﻟﻐﻮي ﺧﺎص]‪ .[405-407‬اﻟﺸﻜﻞ‪ 22-3‬ﻳﺒﲔ ﻣﻘﺎرﻧﺔ اﻟﺘﻌﻠﻴﻤﺎت ﺑﲔ ﺑﺮﻧﺎﻣﺞ ﻣﻜﺘﻮب ﺑﻠﻐﺔ اﻟـ‪ C‬اﻟﻘﻴﺎﺳﻴﺔ ﻣﻊ‬
‫ﺑﺮﻧﺎﻣﺞ ﺑﻠﻐﺔ اﻟـ‪.Spec-C‬‬

‫‪ANSI-C‬‬ ‫‪Spec-C‬‬
‫>‪#include <stdio.h‬‬
‫>‪#include <stdio.h‬‬ ‫‪behavior Main‬‬
‫)‪void main(void‬‬ ‫{‬
‫{‬ ‫)‪void main(void‬‬
‫;)”‪printf(“Hello World!\n‬‬ ‫{‬
‫}‬ ‫;)”‪printf(“Hello World!\n‬‬
‫;}}‬

‫اﻟﺸﻜﻞ‪ 22-3‬ﻣﻘﺎرﻧﺔ ﺑﺮﻧﺎﻣﺞ ﻣﻜﺘﻮب ﺑﻠﻐﺔ اﻟـ‪ C‬اﻟﻘﻴﺎﺳﻴﺔ ﻣﻊ ﺑﺮﻧﺎﻣﺞ ﺑﻠﻐﺔ اﻟـ‪Spec-C‬‬

‫ﺗﺪﻋﻢ ﻟﻐﺔ اﻟـ‪ Spec-C‬اﻟﻮﻇﺎﺋﻒ اﻟﺘﻔﺮﻋﻴﺔ‪ ،‬اﻟﺒﻨﻴﺔ اﳍﻴﻜﻠﻴﺔ‪ ،‬وﻇﺎﺋﻒ اﻟـ"‪ ،"Exception Handling‬اﻟﻘﻴﻮد اﻟﺰﻣﻨﻴﺔ‪ ،‬اﳌﻌﺎﻳﲑ اﻟﺘﺰاﻣﻨﻴﺔ‪ ،‬وﻇﺎﺋﻒ‬
‫اﻻﺗﺼﺎﻻت‪ ،‬ﻣﺴﺎر ﺗﺪﻓﻖ اﻟﺒﻴﺎﻧﺎت‪ ،‬وﻏﲑﻫﺎ ﻣﻦ اﻟﻮﻇﺎﺋﻒ اﻟﱵ ﺗﺪﻋﻤﻬﺎ ﻣﻌﻈﻢ اﳌﱰﲨﺎت‪.‬‬

‫ﺗﺘﻀﻤﻦ ﻟﻐﺔ اﻟـ‪ Spec-C‬ﻣﻜﺘﺒﺎت ﻗﺎﺳﻴﺔ إﺿﺎﻓﺔً إﱃ ﻣﻜﺘﺒﺎت ﺗﺘﻌﻠﻖ ﺑﻮﻇﺎﺋﻒ اﻻﺗﺼﺎل وﻣﻜﺘﺒﺎت ﻟﻠﻤﺤﺎﻛﺎة‪ ،‬ﻛﻤﺎ ﺗﺪﻋﻢ ﳕﺎذج ﺑﺮﳎﻴﺔ ﻋﻨﺪ‬
‫ﻣﺴﺘﻮﻳﺎت ﻣﺘﻌﺪدة ﻣﻦ اﻟﺘﺠﺮﻳﺪ )‪ (levels of Abstraction‬ﻛﻤﺎ ﻫﻮ ﻣﻮﺿﺢ ﻋﻠﻰ اﻟﺸﻜﻞ‪.23-3‬‬

‫اﻟﺸﻜﻞ‪ 23-3‬ﻫﻴﻜﻠﻴﺔ اﻟﱪﳎﻴﺔ ﰲ ﻟﻐﺔ اﻟـ‪Spec-C‬‬

‫اﻟﻠﻐﺔ ‪:(SystemC: C-based Hardware Programming Language) SystemC‬‬ ‫‪8-3-3-3‬‬

‫ﰎ اﻻﻋﱰاف ﻬﺑﺎ رﲰﻴﺎً ﻣﻦ ﻗﺒﻞ ﻫﻴﺌﺔ‬ ‫]‪[408‬‬

‫ﰎ ﺗﻄﻮﻳﺮ ﻟﻐﺔ اﻟـ‪ SystemC‬ﻣﻦ ﻗﺒﻞ ﻣﺆﺳﺴﺔ ‪(Open SystemC Initiative) OSCI‬‬
‫اﻟـ‪ IEEE‬ﰲ ﻋﺎم ‪ 2005‬ﲢﺖ اﳌﻌﻴﺎر ‪ .[409] IEEE-1666‬ﺗﺘﻀﻤﻦ ﻫﺬﻩ اﻟﻠﻐﺔ ﻣﻦ ﻣﻜﺘﺒﺎت ‪ C++‬ﻣﻜﻮﻧﺔ ﻣﻦ أﺻﻨﺎف )‪(Classes‬‬
‫ووﺣﺪات ﻣﺎﻛﺮو )‪ (Macros‬اﻟﱵ ﺗﻌﻄﻲ إﻣﻜﺎﻧﻴﺔ ﺑﺮﳎﺔ اﻟﻜﻴﺎن اﻟﺼﻠﺐ وﳏﺎﻛﺎﺗﻪ ﺑﻠﻐﺔ اﻟـ‪ C++‬وﻓﻘﺎً ﳋﺎﺻﻴﺔ اﻟﱪﳎﺔ اﳌﻘﺎدة ﺑﺎﻷﺣﺪاث‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪156‬‬
‫‪23‬‬ ‫اﻟﻔﺼﻞ اﻟﺜﺎﻟﺚ | ‪Chapter 3‬‬

‫)‪ .Event-driven‬إن ﻫﺬﻩ اﳌﻜﺘﺒﺎت ﺗﺘﻴﺢ إﻣﻜﺎﻧﻴﺔ ﺗﺮﲨﺔ اﻟﱪاﻣﺞ وﳏﺎﻛﺎﻬﺗﺎ ﺑﺎﺳﺘﺨﺪام أي ﻣﱰﺟﻢ ‪ ،C++‬ﻛﻤﺎ ﺗﺘﻴﺢ ﻟﻐﺔ اﻟـ‪SystemC‬‬

‫ﻣﺴﺘﻮﻳﺎت ﻣﺘﻌﺪدة ﻣﻦ ﳕﺎذج اﻟﺘﺠﺮﻳﺪ اﻟﱪﳎﻴﺔ )‪.[410,411] (abstraction-levels‬‬

‫ﲤﻠﻚ ﻟﻐﺔ اﻟـ‪ SystemC‬ﺗﻌﻠﻴﻤﺎت ﺗﺸﺎﺑﻪ اﻟﺘﻌﻠﻴﻤﺎت ﰲ ﻟﻐﺔ اﻟـ‪ VHDL‬إﻻ أن اﻟﺒﻨﻴﺔ اﻟﻌﺎﻣﺔ ﻫﻲ ‪ ،C++‬ﻛﻤﺎ أ�ﺎ ﲤﻠﻚ ﳎﺎل ﻛﺒﲑ ﺟﺪاً ﻣﻦ‬
‫اﻟﺘﻌﺎﺑﲑ واﻷﺻﻨﺎف ‪ -‬ﳌﺸﺎﻬﺑﺔ ﳌﻌﻈﻢ اﻟﻠﻐﺎت ﻏﺮﺿﻴﺔ اﻟﺘﻮﺟﻪ ‪ -‬اﳌﺨﺼﺼﺔ ﻟﻠﻜﻴﺎن اﻟﺼﻠﺐ‪ .‬اﻟﺸﻜﻞ‪ 24-3‬ﻳﺒﲔ ﻣﺜﺎﻻً ﺑﺮﳎﻴﺎً ﻟﺪارة ﺟﺎﻣﻊ‬
‫)‪ (Adder‬ﺑﻠﻐﺔ اﻟـ‪SystemC‬‬

‫"‪#include "systemc.h‬‬

‫)‪SC_MODULE(adder‬‬ ‫‪// module (class) declaration‬‬

‫{‬
‫;‪sc_in<int> a, b‬‬ ‫‪// ports‬‬
‫;‪sc_out<int> sum‬‬

‫)(‪void do_add‬‬ ‫‪// process‬‬

‫{‬
‫;))(‪sum.write(a.read() + b.read‬‬ ‫‪//or just sum = a + b‬‬
‫}‬

‫)‪SC_CTOR(adder‬‬ ‫‪// constructor‬‬

‫{‬
‫;)‪SC_METHOD(do_add‬‬ ‫‪// register do_add to kernel‬‬
‫;‪sensitive << a << b‬‬ ‫‪// sensitivity list of do_add‬‬
‫;}}‬

‫اﻟﺸﻜﻞ‪ 24-3‬ﺑﺮﻧﺎﻣﺞ ﻟﺪارة ﺟﺎﻣﻊ )‪ (Adder‬ﺑﻠﻐﺔ اﻟـ‪SystemC‬‬

‫ﲟﺎ أن ﻟﻐﺔ اﻟـ‪ C++‬ﻫﻲ ﻣﻦ اﻟﻠﻐﺎت اﻟﻘﻮﻳﺔ ﺟﺪاً وﺗﺘﻴﺢ ﻟﻠﻤﱪﻣﺞ إﻣﻜﺎﻧﻴﺔ ﺑﻨﺎء ﺑﺮاﻣﺞ ﺳﻠﻮﻛﻴﺔ ﻗﻮﻳﺔ‪ ،‬ﻓﺈن ﻫﺬﻩ اﻟﱪاﻣﺞ ﺳﻴﻜﻮن ﻣﻦ اﻟﺼﻌﺐ ﺟﺪاً‬
‫ﲢﻮﻳﻠﻬﺎ إﱃ ﻟﻐﺔ وﺻﻒ اﻟﻜﻴﺎن اﻟﺼﻠﺐ ﻣﻘﺎرﻧﺔ ﻣﻊ اﳌﻮارد اﶈﺪودة ﻟﻠﻜﻴﺎن اﻟﺼﻠﺐ ﻟﺸﺮاﺋﺢ اﻟـ‪ ،FPGA‬ﻟﺬا ﻓﺈن ﻟﻐﺔ اﻟـ‪ SystemC‬ﲤﻠﻚ‬
‫ﳎﻤﻮﻋﺔ ﺟﺰﺋﻴﺔ وﺳﻴﻄﺔ ﻣﻦ اﻷواﻣﺮ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱰﲨﺔ )ﺗﻌﺮف ﺑـ‪ (SystemC-RTL‬ﺷﺒﻴﻬﺔ إﱃ ﺣﺪ ﻣﺎ ﺑﻠﻐﺔ وﺻﻒ اﻟﻜﻴﺎن اﻟﺼﻠﺐ ﻣﻦ أﺟﻞ‬
‫ﺗﺮﲨﺔ اﻟﱪﻧﺎﻣﺞ‪.‬‬

‫أدوات وﺑﻴﺌﺎت ﺑﺮﳎﻴﺔ أﺧﺮى )‪:(Other Hardware Programming Languages & Tools‬‬ ‫‪9-3-3-3‬‬

‫ﻳﺴﺘﻌﺮض اﳉﺪول‪ 1-3‬اﻟﺒﻴﺌﺎت اﻟﱪﳎﻴﺔ واﻷدوات ﻋﺎﻟﻴﺔ اﳌﺴﺘﻮى واﳌﺨﺼﺼﺔ ﻟﱪﳎﺔ اﻟﻜﻴﺎن اﻟﺼﻠﺐ‪.‬‬

‫‪Synthesizer/Tool Name‬‬ ‫‪Company Name‬‬

‫]‪[412‬‬
‫‪Carte‬‬ ‫‪SRC Computers‬‬
‫]‪SA-C[413‬‬ ‫‪Colorado State University‬‬
‫]‪[414‬‬
‫‪Cobble‬‬ ‫‪Imperative Language‬‬
‫]‪CoreFire[415‬‬ ‫‪Annapolis Micro Systems‬‬
‫]‪[416‬‬
‫‪CHiMPS‬‬ ‫‪Xilinx Research Labs‬‬
‫]‪Join-Java[417‬‬ ‫‪Hardware Join Java‬‬
‫]‪[418‬‬
‫‪NAPA-C‬‬ ‫‪National Semiconductor‬‬
‫]‪Streams-C[419,420‬‬ ‫‪Los Alamos National Laboratory‬‬

‫‪157‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 Hardware Programming Languages | ‫ﻟﻐﺎت ﺑﺮﳎﺔ أﻧﻈﻤﺔ اﻟﻜﻴﺎن اﻟﺼﻠﺐ‬

Mitrion-C[421] Mitrionics
[422]
Starbridge VIVA
AccelChip[423] MATLAB DSP Synthesis
[424]
A|RT Builder Adelante
Trident compiler[425,426] Los Alamos National Laboratory
[427]
RC Toolbox DSPlogic

‫ أدوات وﺑﻴﺌﺎت ﺑﺮﳎﻴﺔ ﻋﺎﻟﻴﺔ اﳌﺴﺘﻮى ﻟﱪﳎﺔ ﺗﻄﺒﻴﻘﺎت اﻟﻜﻴﺎن اﻟﺼﻠﺐ‬1-3‫اﳉﺪول‬

:(Hardware Tools: Comparisons & Classifications) ‫ ﻣﻘﺎرﻧﺔ وﺗﺼﻨﻴﻒ‬10-3-3-3

‫ اﻟﺘﻌﻠﻴﻤﺎت‬.ANSI-C ‫ ﻳﺒﲔ ﻣﻘﺎرﻧﺔ ﻟﱪﻧﺎﻣﺞ وﻇﻴﻔﻲ ﺑﲔ اﻟﻠﻐﺎت اﻟﱪﳎﻴﺔ ﻋﺎﻟﻴﺔ اﳌﺴﺘﻮى اﻷﻛﺜﺮ ﺷﻬﺮة واﻟﱵ ﺗﻌﺘﻤﺪ اﳌﻌﻴﺎر‬25-3‫اﻟﺸﻜﻞ‬
.‫ﺑﺎﻟﻠﻮن اﻷﺧﻀﺮ ﲤﺜﻞ اﻟﻌﻤﻠﻴﺎت واﳌﻌﺎﳉﺔ اﳊﺴﺎﺑﻴﺔ – اﻟﺘﻌﻠﻴﻤﺎت ﺑﺎﻟﻠﻮن اﻷزرق ﲤﺜﻞ اﻻﺗﺼﺎل ﻣﻊ اﳌﻨﺎﻓﺬ‬

DIME-C IMPULSE C HANDEL C

void Kern el(int a[50], int b[50], int answer) void Kerne11(co_stream a1, co_stream b1, co_stream z1){ int 32 Kernel1(int 32 a[50], int 32 b[50])
{ int a[50], b[50], answer=0; {
int i, temp = 0; co_stream_open(a1,O_RDONLY,INT_TYPE(32)); /*etc*/ static int 32 i, temp[i], answer;
for(i=0;i<50;i++) for(i=0;i<50;i++) par(i=0;i<50;i++)
{ { {
temp += a[i] * b[i]; co_stream_read(a1, &a[i], sizeof(int32)); temp[i] = a[i] * b[i];
} co_stream_read(b1, &b[i], sizeof(int32)); }
answer = temp; } for(i=0;i<50;i++)
} for(i=0;i<50;i++) {
void dot_product(int a1[50], int b1[50], { answer += temp[i];
int a2[50], int b2[50], int answer) #pragma CO UNROLL }
{ answer += a[i] * b[i]; return answer;
int answer1, answer2; } }
#pragma genusc instance Kernel1 co_stream_write(z1, &answer, sizeof(int32)); int 32 Kernel2(int 32 a[50], int 32 b[50])
Kernel(a1,b1,answer1); co_stream_close(a1); /*etc*/ /* SAME AS IN Kernel1 */
#pragma genusc instance Kernel2 } }
Kernel(a2,b2,answer2); void Kernel2(co_stream a2, co_stream b2, co_stream z2){ void main() //dot_product
answer = answer1 + answer2 /* SAME AS IN Kernel1 */ {
} } int 32 a1[50]; int 32 b1[50];
void dot_product(co_stream z1, co_stream z2, co_stream ans){ int 32 a2[50]; int 32 b2[50];
int i, answer1, answer2, answer; int 32 temp1, temp2;
co_stream_open(z1,O_RDONLY,INT_TYPE(32)); /*etc*/ int 32 answer;
co_stream_read(z1, &answer1, INT_TYPE(32)); interface bus_out() OutputResult(answer);
co_stream_read(z2, &answer2, INT_TYPE(32)); par
answer = answer1 + answer2; {
co_stream_write(ans, &answer, INT_TYPE(32)); ans1 = Kernel1(int 32 a1[50],int 32 b[50]);
co_stream_close(z1); /*etc*/ ans2 = Kernel2(int 32 a2[50],int 32 b[50]);
} }
answer = ans1 + ans2; }

‫ ﻣﻘﺎرﻧﺔ ﺑﲔ اﻟﻠﻐﺎت اﻟﱪﳎﻴﺔ ﻋﺎﻟﻴﺔ اﳌﺴﺘﻮى اﻷﻛﺜﺮ ﺷﻬﺮة‬25-3‫اﻟﺸﻜﻞ‬

27-3‫ اﻟﺸﻜﻞ‬.‫ ﻳﺒﲔ اﻟﻌﻼﻗﺔ ﺑﲔ اﳉﻬﺪ اﳌﺒﺬول ﻟﻜﺘﺎﺑﺔ ﺑﺮﻧﺎﻣﺞ ﻧﺴﺒﺔً إﱃ ﻓﻌﺎﻟﻴﺔ اﻟﱪﻧﺎﻣﺞ ﻟﻠﻐﺎت وﺻﻒ وﺑﺮﳎﺔ اﻟﻜﻴﺎن اﻟﺼﻠﺐ‬26-3‫اﻟﺸﻜﻞ‬

.‫ وﻓﻘﺎً ﻟﻠﺘﻄﺒﻴﻖ اﻟﻮﻇﻴﻔﻲ ﻟﻠﻤﱰﺟﻢ‬ANSI-C ‫ﻳﺒﲔ ﺗﺼﻨﻴﻒ ﻟﻐﺎت ﺑﺮﳎﺔ اﻟﻜﻴﺎن اﻟﺼﻠﺐ ﻋﺎﻟﻴﺔ اﳌﺴﺘﻮى‬

Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages 158
‫‪23‬‬ ‫اﻟﻔﺼﻞ اﻟﺜﺎﻟﺚ | ‪Chapter 3‬‬

‫‪High‬‬
‫‪VHDL‬‬
‫‪System Verilog‬‬
‫‪Verilog‬‬

‫‪Handel-C‬‬ ‫‪SystemC‬‬
‫‪Efficiency‬‬

‫‪CatapultC‬‬
‫‪DIME-C‬‬

‫‪ImpulsC‬‬

‫‪ANSI-C‬‬
‫‪Low‬‬

‫‪Low‬‬ ‫‪Effort‬‬ ‫‪High‬‬

‫اﻟﺸﻜﻞ‪ 26-3‬اﻟﻌﻼﻗﺔ ﺑﲔ اﳉﻬﺪ اﳌﺒﺬول ﻟﻜﺘﺎﺑﺔ ﺑﺮﻧﺎﻣﺞ وﻓﻌﺎﻟﻴﺔ اﻟﱪﻧﺎﻣﺞ ﻟﻠﻐﺎت وﺻﻒ وﺑﺮﳎﺔ اﻟﻜﻴﺎن اﻟﺼﻠﺐ‬

‫‪C-based HLLs‬‬

‫‪Generic HDL‬‬ ‫‪Generic HDL‬‬ ‫‪Target Specific‬‬

‫‪RISC/FPGA‬‬
‫‪Open Standard‬‬ ‫‪Multiple‬‬ ‫‪Optimized for HW‬‬ ‫‪Platform/‬‬
‫‪Hybrid Only‬‬
‫‪Platforms‬‬ ‫‪Manufacturer‬‬ ‫‪Configuration‬‬

‫‪Cataput-C‬‬ ‫‪Carte‬‬
‫‪SystemC‬‬ ‫‪DIME-C‬‬ ‫‪NAPA-C‬‬
‫‪Impulse-C‬‬ ‫‪SA-C‬‬
‫‪Handel-C‬‬
‫‪Mitrion-C‬‬ ‫‪Stream-C‬‬

‫اﻟﺸﻜﻞ‪ 27-3‬ﺗﺼﻨﻴﻒ وﻇﻴﻔﻲ ﻟﻠﻐﺎت ﺑﺮﳎﺔ اﻟﻜﻴﺎن اﻟﺼﻠﺐ ﻋﺎﻟﻴﺔ اﳌﺴﺘﻮى‬

‫‪ 4-3-3‬ﻟﻐﺎت ﺑﺮﳎﺔ اﻟﻜﻴﺎن اﻟﺼﻠﺐ اﻟﺮﺳﻮﻣﻴﺔ )‪:(Graphical Hardware Programming Language‬‬

‫ﻋﻠﻰ ﻣﺪى ﺳﻨﻮات ﻋﺪﻳﺪة ﺗﻄﻮرت ﻟﻐﺎت اﻟﱪﳎﺔ اﻟﺮﺳﻮﻣﻴﺔ واﺗﺴﻌﺖ داﺋﺮة اﻟﺘﻄﺒﻴﻘﺎت اﻟﱵ ﺗﺸﻤﻠﻬﺎ ﻟﺘﻐﻄﻲ اﻟﺘﻄﺒﻴﻘﺎت اﻟﱪﳎﻴﺔ اﳊﺎﺳﻮﺑﻴﺔ‬
‫وﺗﻄﺒﻴﻘﺎت اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ وﻏﲑﻫﺎ‪ .‬ﺣﺎﻟﻴﺎً ﻳﻮﺟﺪ اﻟﻌﺪﻳﺪ ﻣﻦ ﻟﻐﺎت اﻟﱪﳎﺔ اﻟﺮﺳﻮﻣﻴﺔ؛ ﻣﻦ أﺷﻬﺮﻫﺎ‪:‬‬
‫‪.[428]Agilent VEE -‬‬
‫‪.[429]National Instruments LabVIEW -‬‬
‫‪.[430]Microsoft Visual Programming Language (MVPL) -‬‬

‫‪159‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Hardware Programming Languages‬‬ ‫ﻟﻐﺎت ﺑﺮﳎﺔ أﻧﻈﻤﺔ اﻟﻜﻴﺎن اﻟﺼﻠﺐ |‬

‫ﺗﻌﺘﱪ اﻟﺒﻴﺌﺔ "‪ "Agilent VEE‬ﻣﻦ ﻟﻐﺎت اﻟﱪﳎﺔ اﻟﺮﺳﻮﻣﻴﺔ اﻟﺘﺪﻓﻘﻴﺔ اﻟﱵ ﺗﺴﺘﺨﺪم ﰲ ﺗﺼﻤﻴﻢ ﺗﻄﺒﻴﻘﺎت اﻟﻘﻴﺎﺳﺎت واﻻﺧﺘﺒﺎرات اﳌﺆﲤﺘﺔ وﲢﻠﻴﻞ‬
‫اﻟﺒﻴﺎﻧﺎت‪ ،‬وﻫﻲ ﺗﻌﺘﱪ ﻟﻐﺔ ﺑﺮﳎﻴﺔ رﺳﻮﻣﻴﺔ ﻣﻮﺟﻬﺔ ﻟﻠﺘﻄﺒﻴﻘﺎت اﻟﺼﻨﺎﻋﻴﺔ‪ .‬اﻟﺸﻜﻞ‪ 28-3‬ﻳﺒﲔ أﺣﺪ اﻟﺘﻄﺒﻴﻘﺎت اﻟﱪﳎﻴﺔ ﺑﺎﺳﺘﺨﺪام ‪Agilent‬‬

‫‪.VEE Pro 9.2‬‬

‫‪Agilent VEE Pro 9.2‬‬ ‫اﻟﺸﻜﻞ‪ 28-3‬ﳐﻄﻂ ﺑﺮﳎﻲ ﺑﺎﺳﺘﺨﺪام اﻟﺒﻴﺌﺔ‬

‫اﻟﺒﻴﺌﺔ اﻟﱪﳎﻴﺔ "‪ "Microsoft Visual Programming Language‬ﺗﻌﺘﱪ أﻳﻀﺎً ﻣﻦ ﻟﻐﺎت اﻟﱪﳎﺔ اﻟﺮﺳﻮﻣﻴﺔ اﻟﺘﺪﻓﻘﻴﺔ‪ ،‬إﻻ أ�ﺎ ﻣﻮﺟﻬﺔ‬
‫ﺑﺸﻜﻞ ﺧﺎص ﻟﱪﳎﺔ ﺗﻄﺒﻴﻘﺎت اﻟﺮوﺑﻮت‪ .‬اﻟﺸﻜﻞ‪ 29-3‬ﻳﺒﲔ أﺣﺪ ﺗﻄﺒﻴﻘﺎت اﻷواﻣﺮ اﻟﺼﻮﺗﻴﺔ ﰲ اﻟﺒﻴﺌﺔ ‪.MVPL‬‬

‫‪MVPL‬‬ ‫اﻟﺸﻜﻞ‪ 29-3‬ﲢﻮﻳﻞ اﻟﻨﺺ إﱃ اﻟﺼﻮت ﰲ اﻟﺒﻴﺌﺔ اﻟﱪﳎﻴﺔ‬

‫اﻟﺒﻴﺌﺔ اﻟﱪﳎﻴﺔ ‪ LabVIEW‬ﺗﻌﺘﱪ ﻣﻦ أﻗﻮى وأﻛﺜﺮ اﻟﺒﻴﺌﺎت اﻟﱪﳎﻴﺔ اﻟﺮﺳﻮﻣﻴﺔ اﺳﺘﺨﺪاﻣﺎً واﻧﺘﺸﺎراً وﺗﻄﺒﻴﻘﺎً‪ ،‬وﻫﻲ ﻧﻘﻄﺔ ﳏﻮرﻳﺔ ﰲ ﻫﺬا اﻟﺒﺤﺚ‬
‫ﺳﻨﻔﺼﻞ ﻓﻴﻬﺎ ﰲ ﻣﺎ ﻳﺄﰐ ﰲ ﻫﺬا اﻟﻔﺼﻞ‪.‬‬

‫أﳘﻴﺔ ﻟﻐﺎت اﻟﱪﳎﺔ اﻟﺮﺳﻮﻣﻴﺔ )‪:(The Importance of Graphical Programming‬‬ ‫‪1-4-3-3‬‬

‫ﻟﻜﻲ ﺗﻜﻮن ﻧﺎﺟﺤﺎً ﰲ اﻻﻗﺘﺼﺎد اﻟﻌﺎﳌﻲ اﻟﻴﻮم‪ ،‬ﻓﺈن ﻣﺴﺄﻟﺔ وﺻﻮل اﳌﻨﺘﺞ إﱃ اﻟﺴﻮق ﳚﺐ أن ﺗﺘﻢ ﺑﺸﻜﻞ أﺳﺮع ﻣﻦ اﻟﺴﺎﺑﻖ‪ ،‬وﺑﺎﻟﺘﺎﱄ ﻓﺈن دورة‬
‫ﺗﺼﻤﻴﻢ اﳌﻨﺘﺞ ﳚﺐ أن ﺗﻜﻮن أﻗﺼﺮ ﻣﺎ ﳝﻜﻦ‪ .‬ﻣﻦ ﺟﺎﻧﺐ آﺧﺮ ﻓﺈﻧﻪ ﰲ اﻟﻮﻗﺖ اﻟﺬي ﺗﺰداد ﻓﻴﻪ ﻛﺜﺎﻓﺔ اﻟﱰاﻧﺰﺳﺘﻮرات ﻋﻠﻰ ﺷﺮﳛﺔ ﺳﻴﻠﻴﻜﻮﻧﻴﺔ‬
‫وﺣﻴﺪة – وﻓﻘﺎً ﻟﻘﺎﻧﻮن ‪ ،Moor‬ﻓﺈن ﻛﻠﻔﺔ اﻟﱰاﻧﺰﺳﺘﻮرات ﻋﻠﻰ اﳌﺴﺘﻮى اﻟﺴﻴﻠﻴﻜﻮﱐ ﺑﺎﳓﺪار‪ ،‬وﺑﺎﻟﺘﺎﱄ ﻓﺈن اﻟﻌﻨﺎﺻﺮ اﳌﺘﻜﺎﻣﻠﺔ اﳌﻌﻘﺪة اﻟﺒﻨﻴﺔ‬
‫)‪ (FPGAs, Multi-core MPUs, SoCs‬أﺻﺒﺤﺖ أﻛﺜﺮ اﺳﺘﺨﺪاﻣﺎً وﺷﻴﻮﻋﺎً ﰲ اﻟﺘﻄﺒﻴﻘﺎت‪ ،‬وﻫﺬا ﺑﺪورﻩ أدى إﱃ ﺣﺠﻢ ﺗﻌﻘﻴﺪ ﺑﺮﳎﻲ‬
‫أﻛﱪ ﺑﻜﺜﲑ ودورة ﺗﺼﻤﻴﻢ أﻃﻮل ﺑﻜﺜﲑ‪ .‬اﻟﺸﻜﻞ‪ 30-3‬ﻳﺒﲔ ﻣﻨﺤﲏ ﺗﻄﻮر اﻟﻌﻨﺎﺻﺮ اﳌﺘﻜﺎﻣﻠﺔ ودرﺟﺔ ﺗﻌﻘﻴﺪ اﻟﻨﻈﺎم‪.‬‬
‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪160‬‬
‫‪23‬‬ ‫اﻟﻔﺼﻞ اﻟﺜﺎﻟﺚ | ‪Chapter 3‬‬

‫اﻟﺸﻜﻞ‪ 30-3‬درﺟﺔ اﻟﺘﻌﻘﻴﺪ ﻟﻠﻨﻈﺎم وﻣﺴﺘﻮى اﻟﺘﺠﺮﻳﺪ ﻟﺘﻄﻮر ﺗﻘﻨﻴﺎت اﻟﺪارات اﳌﺘﻜﺎﻣﻠﺔ‬

‫ﻋﻨﺪ اﺳﺘﺨﺪام ﻟﻐﺎت اﻟﱪﳎﺔ اﻟﺘﻘﻠﻴﺪﻳﺔ اﻟﻨﺼﻴﺔ وﺑﻌﺪ اﻻﻧﺘﻬﺎء ﻣﻦ ﻛﺘﺎﺑﺔ اﻟﱪﻧﺎﻣﺞ‪ ،‬ﻓﺈن ﻋﻠﻰ اﳌﻬﻨﺪﺳﲔ اﳌﺼﻤﻤﲔ أو اﻟﺪارﺳﲔ )اﻟﻄﻼب( اﳌﺮور‬
‫ﺑﺎﻟﻌﺪﻳﺪ ﻣﻦ اﳌﺮاﺣﻞ اﳌﺮﻫﻘﺔ ﻗﺒﻞ ﺗﻮﻟﻴﺪ اﳌﻠﻒ اﻟﱪﳎﻲ اﻟﻨﻬﺎﺋﻲ اﻟﺬي ﻳﺘﻢ ﺑﺮﳎﺘﻪ ﻋﻠﻰ ﺷﺮﳛﺔ اﻟـ‪ ،FPAG‬ﻓﻴﺠﺐ إﻋﺎدة ﻛﺘﺎﺑﺔ أو ﺗﻌﺪﻳﻞ اﻟﱪﻧﺎﻣﺞ‬
‫ﲝﻴﺚ ﻳﻜﻮن ﻗﺎﺑﻼً ﻟﻠﱰﲨﺔ )‪ (Synthesizable‬ﻣﻦ ﻗﺒﻞ اﳌﱰﺟﻢ اﶈﺪد‪ .‬أﺿﻒ إﱃ ذﻟﻚ أن ﻟﻜﻞ ﻣﱰﺟﻢ ﻣﺘﻄﻠﺒﺎت ﺧﺎﺻﺔ ﲣﺘﻠﻒ ﻋﻦ ﻏﲑﻩ‬
‫ﻣﻦ اﳌﱰﲨﺎت اﻷﺧﺮى ﺗﺒﻌﺎً ﻟﻠﺸﺮﻛﺔ اﳌﻄﻮرة ﻟﻠﻤﱰﺟﻢ‪ ،‬ﳍﺬا اﻟﺴﺒﺐ ﻓﺈن اﳌﺼﻤﻤﲔ أو اﻟﺒﺎﺣﺜﲔ ﻳﺼﺮﻓﻮن وﻗﺘﺎً ﻛﺒﲑاً ﰲ دراﺳﺔ اﳌﺘﻄﻠﺒﺎت اﳋﺎﺻﺔ‬
‫ﻟﻸدوات اﻟﱪﳎﻴﺔ اﻟﱵ ﺳﻴﻌﻤﻠﻮن ﻋﻠﻴﻬﺎ ﺑﺪﻻً ﻣﻦ ﺻﺮف اﻟﻮﻗﺖ ﻋﻠﻰ ﻣﺘﻄﻠﺒﺎت اﻟﺘﺼﻤﻴﻢ ﻧﻔﺴﻪ‪.‬‬

‫ﺗﺆﻛﺪ اﻷﲝﺎث ﻋﻠﻰ ﺿﺮورة ﺗﻄﻮﻳﺮ وﺗﺒﲏ ﺑﻴﺌﺎت ﺑﺮﳎﻴﺔ ﺟﺪﻳﺪة ﻋﻠﻰ ﻣﺴﺘﻮى ﺟﺪﻳﺪ‪ ،‬وذﻟﻚ ﺑﻌﻴﺪاً ﻋﻦ اﻟﻠﻐﺎت اﻟﻨﺼﻴﺔ ﻷن ﺣﺠﻢ اﻟﱪﻧﺎﻣﺞ ﻳﺰداد‬
‫ﻃﻮﻻً وﺗﻌﻘﻴﺪاً – ﻣﺜﻞ‪ :‬اﻟﺒﻴﺌﺎت اﻟﺮﺳﻮﻣﻴﺔ – إﺿﺎﻓﺔً إﱃ اﻟﺒﻴﺌﺔ اﻷﺳﺎﺳﻴﺔ ﺑﻠﻐﺔ اﻟـ‪ C‬ﲝﻴﺚ ﳝﻜﻦ اﻟﱪﳎﺔ ﺑﻜﻼ اﳌﻨﺤﻴﲔ ﺑﻨﻔﺲ اﻟﻮﻗﺖ وﺿﻤﻦ ﺑﻴﺌﺔ‬
‫ﺑﺮﳎﻴﺔ واﺣﺪة‪ ،‬ﲟﺎ ﰲ ذﻟﻚ ﻣﺮاﺣﻞ اﻟﺘﺤﻠﻴﻞ واﻟﻔﺤﺺ واﻟﺘﻨﻔﻴﺬ]‪.[431,432‬‬

‫اﻟﺒﺤﺚ]‪ [433‬ﻳﺸﲑ إﱃ أﻧﻪ ﻣﻦ أﺟﻞ ﺑﺮﳎﺔ اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ ﻋﻤﻮﻣﺎً‪ ،‬وﺗﻘﻨﻴﺔ اﻟـ‪ FPGA‬ﻋﻠﻰ ﳓﻮ ﺧﺎص‪ ،‬ﻓﺈﻧﻪ ﻣﻦ اﻟﻀﺮوري ﺟﺪاً وﺟﻮد ﲢﻮل أو‬
‫اﻧﺘﻘﺎل ﺟﺬري ﰲ اﳌﻨﻬﺠﻴﺔ اﻟﱪﳎﻴﺔ اﳌﺘﺒﻌﺔ‪ .‬ﻛﻤﺎ ﺗﺆﻛﺪ اﻷﲝﺎث]‪ [434-436‬ﻋﻠﻰ أن ﻟﻐﺎت اﻟﱪﳎﻴﺔ اﻟﺮﺳﻮﻣﻴﺔ ﻣﻨﺎﺳﺒﺔ ﺑﺸﻜﻞ ﻛﺒﲑ ﻟﺘﺼﻤﻴﻢ وﺑﺮﳎﺔ‬
‫اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ؛ ﻧﻈﺮاً ﻻرﺗﻜﺎزﻫﺎ ﻋﻠﻰ ﻣﻨﻬﺠﻴﺔ ﺗﺪﻓﻴﻖ اﻟﺒﻴﺎﻧﺎت )‪ .(Dataflow‬اﻟﺸﻜﻞ‪ 31-3‬ﻳﺒﲔ ﻣﻨﺤﲎ ﺗﻄﻮر اﻷﻧﻈﻤﺔ اﻟﱪﳎﻴﺔ ﻋﻠﻰ‬
‫اﳌﺴﺘﻮى اﻟﺒﻨﻴﻮي‪ .‬اﻟﺸﻜﻞ‪ 32-3‬ﻳﺒﲔ ﳐﻄﻂ ﺗﻄﻮر اﻟﻠﻐﺎت اﻟﱪﳎﻴﺔ اﳌﺨﺼﺼﺔ ﻟﱪﳎﺔ اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ‪.‬‬

‫اﻟﺸﻜﻞ‪ 31-3‬ﳐﻄﻂ ﺗﻄﻮر اﻟﱪﳎﺔ اﳊﺎﺳﻮﺑﻴﺔ اﳌﻮاﻓﻖ ﻟﺘﻄﻮر اﻟﻜﻴﺎن اﻟﺼﻠﺐ‬

‫اﻟﺸﻜﻞ‪ 32-3‬ﳐﻄﻂ ﺗﻄﻮر اﻟﻠﻐﺎت اﻟﱪﳎﻴﺔ اﳌﻮاﻓﻖ ﻟﺪرﺟﺔ ﺗﻌﻘﻴﺪ اﻟﻜﻴﺎن اﻟﺼﻠﺐ‬

‫‪161‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Hardware Programming Languages‬‬ ‫ﻟﻐﺎت ﺑﺮﳎﺔ أﻧﻈﻤﺔ اﻟﻜﻴﺎن اﻟﺼﻠﺐ |‬

‫ﻟﻘﺪ أﺛﺒﺘﺖ ﻟﻐﺎت اﻟﱪﳎﺔ اﻟﺮﺳﻮﻣﻴﺔ ﻓﻌﺎﻟﻴﺘﻬﺎ ﻋﻠﻰ ﻟﻐﺎت اﻟﱪﳎﺔ اﻟﻨﺼﻴﺔ‪ ،‬ﻛﻤﺎ أ�ﺎ أﺳﺮع ﲞﻤﺲ ﻣﺮات ﻣﻦ اﻟﻠﻐﺎت اﻟﻨﺼﻴﺔ ﰲ ﺗﻄﻮﻳﺮ‬
‫اﻟﺘﻄﺒﻴﻘﺎت]‪ .[437‬ﻋﻼوةً ﻋﻠﻰ ذﻟﻚ ﻓﺈن ﻟﻐﺎت اﻟﱪﳎﺔ اﻟﺮﺳﻮﻣﻴﺔ ﺗﻌﺰز اﻹﻧﺘﺎﺟﻴﺔ ﻟﺪى اﻟﺒﺎﺣﺜﲔ وﻣﻄﻮري اﻟﺘﻄﺒﻴﻘﺎت ﺑﻐﺾ اﻟﻨﻈﺮ ﻋﻦ ﻣﺴﺘﻮى‬
‫ﱪﻬﺗﻢ اﻟﱪﳎﻴﺔ]‪ ،[438‬وذﻟﻚ ﻷن اﻟﻠﻐﺎت اﻟﺮﺳﻮﻣﻴﺔ ﺗﻌﻄﻲ ﺗﻨﻈﻴﻤﺎً ﺑﺪﻫﻴﺎً‪ ،‬وﲡﻌﻞ اﳌﻌﻠﻮﻣﺎت واﺿﺤﺔ وﻣﺮﺋﻴﺔ]‪ ،[439‬اﻷﻣﺮ اﻟﺬي ﳚﻌﻞ ﻋﻤﻠﻴﺔ‬
‫ﻛﺘﺎﺑﺔ أو ﲢﻮﻳﻞ اﳋﻮارزﻣﻴﺔ اﻟﱪﳎﻴﺔ ﻣﻦ ﳐﻄﻂ ﺗﺪﻓﻘﻲ )‪ (Flowchart‬إﱃ ﺑﺮﻧﺎﻣﺞ أﻣﺮاً ﺑﺪﻫﻴﺎً‪.‬‬

‫ﻟﻐﺎت اﻟﱪﳎﺔ اﻟﺮﺳﻮﻣﻴﺔ ﰲ اﳌﻨﺎﻫﺞ اﻟﺘﻌﻠﻴﻤﻴﺔ )‪:(Graphical Programming in Curriculums‬‬ ‫‪2-4-3-3‬‬

‫إن ﺗﺼﻤﻴﻢ اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ أﺻﺒﺢ ﰲ ﻫﺬا اﻟﻮﻗﺖ أﻣﺮاً أﺳﺎﺳﻴﺎً ﰲ اﳌﻨﺎﻫﺞ اﻟﺘﻌﻠﻴﻤﻴﺔ اﳍﻨﺪﺳﻴﺔ‪ ،‬وإن اﺳﺘﺨﺪام ﻟﻐﺎت اﻟﱪﳎﺔ اﻟﺘﻘﻠﻴﺪﻳﺔ اﻟﻨﺼﻴﺔ‬
‫ﻳﻌﻴﻖ اﻟﻄﻼب واﻟﺒﺎﺣﺜﲔ ﻣﻦ اﻻﺳﺘﻔﺎدة ﻣﻦ اﻟﻌﺪﻳﺪ ﺣﻠﻮل اﻟﻜﻴﺎن اﻟﺼﻠﺐ اﳌﺘﻮﻓﺮة )ﻣﺜﻞ‪ :‬اﻟـ‪ (FPGAs‬واﻟﱵ ﳝﻜﻦ أن ﲡﻌﻞ اﻟﻌﻤﻠﻴﺔ اﻟﺘﻌﻠﻴﻤﻴﺔ‬
‫أﻛﺜﺮ ﻓﻌﺎﻟﻴﺔ وواﻗﻌﻴﺔ‪ .‬إن ﻫﺬا اﻷﻣﺮ ﻳﺒﺪو ﺟﻠﻴﺎً وواﺿﺤﺎً ﰲ اﻟﻔﺮوع اﳍﻨﺪﺳﻴﺔ اﻟﱵ ﻻ ﺗﺮﻛﺰ ﻋﻠﻰ اﻟﱪﳎﻴﺎت )ﻣﺜﻞ‪ :‬اﻟﻔﺮوع اﳍﻨﺪﺳﻴﺔ ﻛﺎﻓﺔً ﻋﺪا‬
‫اﳍﻨﺪﺳﺔ اﳌﻌﻠﻮﻣﺎﺗﻴﺔ وﻫﻨﺪﺳﺔ اﳊﻮاﺳﻴﺐ(‪ ،‬ﺣﻴﺚ أن اﻟﻄﻼب ﻻ ﳝﻠﻜﻮن اﳋﱪة اﻟﻮاﻓﻴﺔ واﻟﻜﺎﻓﻴﺔ ﰲ ﻟﻐﺎت اﻟﱪﳎﺔ اﻟﻨﺼﻴﺔ‪.‬‬

‫ﻣﻊ ﺗﻄﻮر ﻟﻐﺎت وأدوات اﻟﱪﳎﺔ اﻟﺮﺳﻮﻣﻴﺔ أﺻﺒﺢ ﻣﻦ اﳌﻤﻜﻦ ﺗﻌﻠﻴﻢ ﺑﺮﳎﺔ اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ وﺧﺎﺻﺔً اﻟﻜﻴﺎن اﻟﺼﻠﺐ ﻟﻜﺎﻓﺔ اﻟﺘﺨﺼﺼﺎت ﺑﻐﺾ‬
‫اﻟﻨﻈﺮ ﻋﻦ اﳋﱪة اﻟﱪﳎﻴﺔ اﻟﺴﺎﺑﻘﺔ]‪ .[440‬وﺑﺎﻟﺘﺎﱄ ﻓﺈﻧﻪ وﻣﻦ ﺧﻼل اﺳﺘﺨﺪام ﻟﻐﺎت اﻟﱪﳎﺔ اﻟﺮﺳﻮﻣﻴﺔ‪ ،‬ﻓﺈن اﻟﻄﻼب ﻟﺪﻳﻬﻢ اﻟﻔﺮﺻﺔ ﻟﻠﱰﻛﻴﺰ ﻋﻠﻰ‬
‫ﻣﺴﺎﺋﻞ اﻟﺘﺼﻤﻴﻢ واﻟﻨﻤﺬﺟﺔ ﻟﻠﺨﻮارزﻣﻴﺎت اﻟﱪﳎﻴﺔ‪ ،‬ﺣﻴﺚ أن ﺗﻔﺎﺻﻴﻞ ﺗﺮﲨﺔ اﻟﺘﺼﻤﻴﻢ وﻣﺘﻄﻠﺒﺎﺗﻪ ﻳﺘﻢ إﳒﺎزﻫﺎ ﺑﺸﻜﻞ ﻣﺆﲤﺖ ﻣﻦ ﻗﺒﻞ اﻟﺒﻴﺌﺔ‬
‫اﻟﱪﳎﻴﺔ‪ ،‬اﻷﻣﺮ اﻟﺬي ﻳﻌﻄﻲ إﻣﻜﺎﻧﻴﺔ ﺑﻨﺎء اﻟﻨﻤﻮذج اﻟﺘﺼﻤﻴﻤﻲ اﻷوﱄ ﺑﺄﻗﺼﺮ زﻣﻦ وأﻋﻠﻰ ﻛﻔﺎءة‪ ،‬وﻫﺬا اﻟﺴﺒﺐ ﻳﺸﻜﻞ ﻣﺆﺧﺮاً داﻓﻌﺎً ﻛﺒﲑاً‬
‫ﻟﺘﺪرﻳﺲ ﻣﻘﺮرات ﺗﺼﻤﻴﻢ أﻧﻈﻤﺔ اﻟـ‪ FPGA‬ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﻟﱪﳎﻴﺔ اﻟﺮﺳﻮﻣﻴﺔ‪.‬‬

‫اﻟﻨﺘﺎﺋﺞ ﰲ اﻟﻮرﻗﺔ اﻟﺒﺤﺜﻴﺔ]‪ [441‬ﺗﺸﲑ إﱃ أﻧﻪ ﰲ اﳌﻘﺮرات اﻟﺘﺄﺳﻴﺴﻴﺔ اﳍﻨﺪﺳﻴﺔ ﳝﻴﻞ اﻟﻄﻼب ﺑﺸﻜﻞ أﻛﱪ إﱃ اﺳﺘﺨﺪام اﻟﻠﻐﺎت اﻟﱪﳎﺔ اﻟﺮﺳﻮﻣﻴﺔ‪،‬‬
‫وذﻟﻚ ﻷ�ﺎ ﺗﻌﻄﻴﻬﻢ دﻓﻌﺎً وﺛﻘﺔً ﺑﺎﻟﻨﻔﺲ ﺑﺸﻜﻞ أﻛﱪ ﺑﻜﺜﲑ ﻣﻦ ﻟﻐﺎت اﻟﱪﳎﺔ اﻟﻨﺼﻴﺔ‪.‬‬

‫اﻟﺒﻴﺌﺔ اﻟﱪﳎﻴﺔ ‪:(LabVIEW Programming Environment) LabVIEW‬‬ ‫‪3-4-3-3‬‬

‫اﻟﺒﻴﺌﺔ ‪ – LabVIEW‬اﺧﺘﺼﺎراً ﻟــ"‪ – "Laboratory Virtual Instrumentation Engineering Workbench‬ﻋﺒﺎرة ﻋﻦ ﻟﻐﺔ‬

‫ﰲ ﺑﺪاﻳﺎت اﻟـ‪ 1980s‬ﺑﺪف إﳚﺎد أداة ﺑﺮﳎﻴﺔ ﻓﻌﺎﻟﺔ وﺗﻔﺎﻋﻠﻴﺔ‬ ‫]‪[428‬‬
‫ﺑﺮﳎﻴﺔ رﺳﻮﻣﻴﺔ ﰎ ﺗﻄﻮﻳﺮﻫﺎ ﻣﻦ ﻗﺒﻞ ﺷﺮﻛﺔ ‪National Instruments‬‬

‫ﻟﺘﻄﻮﻳﺮ اﻟﱪاﻣﺞ اﳋﺎﺻﺔ ﺑﺄﻧﻈﻤﺔ اﺳﺘﺤﺼﺎل اﻟﺒﻴﺎﻧﺎت وﲡﻬﻴﺰات اﻟﻘﻴﺎﺳﺎت]‪.[422‬‬

‫ﲤﻜﻦ ﻫﺬﻩ اﻟﺒﻴﺌﺔ اﻟﱪﳎﻴﺔ اﻟﻄﻼب واﳌﻬﻨﺪﺳﲔ واﻟﺒﺎﺣﺜﲔ ﰲ ﳐﺘﻠﻒ اﻟﻔﺮوع اﳍﻨﺪﺳﻴﺔ واﳌﺨﺘﺼﲔ ﰲ ﻓﺮوع اﻟﻌﻠﻮم‪ ،‬ﻣﻦ اﻟﺘﺼﻤﻴﻢ اﻟﺘﻔﺎﻋﻠﻲ‬
‫)‪ (Design‬وﺑﻨﺎء اﻟﻨﻤﺎذج اﻷوﻟﻴﺔ )‪ (Prototype‬واﻟﺘﻄﺒﻴﻖ اﻟﻌﻤﻠﻲ )‪Deploy‬ﻟﻸﻧﻈﻤﺔ اﳌﺪﳎﺔ ﲟﺨﺘﻠﻒ ﺗﻘﻨﻴﺎﻬﺗﺎ وﺗﻄﺒﻴﻘﺎﻬﺗﺎ ) ‪MCUs,‬‬

‫‪PLC,‬‬ ‫) ‪Vision,‬‬ ‫…‪ MPUs, Multi-core, FPGAs, DSPs,‬واﻷﻧﻈﻤﺔ اﻟﺼﻨﺎﻋﻴﺔ واﻟﻘﻴﺎﺳﺎت وﺗﻄﺒﻴﻘﺎﻬﺗﺎ‬
‫‪ (Communications, Control, Measurements, Mechatronics‬ﺧﻼل زﻣﻦ ﻗﺼﲑ‪ ،‬وذﻟﻚ ﺑﺎﺳﺘﺨﺪام ﻣﻜﺘﺒﺎت رﺳﻮﻣﻴﺔ‬
‫ﳕﻮذﺟﻴﺔ إﺿﺎﻓﺔً إﱃ ﺗﻀﻤﲔ ﻣﻜﺘﺒﺎت أو ﺑﺮاﻣﺞ ﺧﺎرﺟﻴﺔ ﺟﺎﻫﺰة )‪ (C, HDL, .m file‬ﻟﺒﻨﺎء ﺗﻄﺒﻴﻖ ﻣﻮﺛﻮق ﻳﺘﻢ ﺑﺮﳎﺘﻪ ﻋﻠﻰ اﻟﻜﻴﺎن اﻟﺼﻠﺐ‬
‫ﻣﺒﺎﺷﺮًة دون أي ﻣﺮاﺣﻞ ﺗﺼﻤﻴﻢ ﻛﻴﺎن ﺻﻠﺐ ﻣﺴﺒﻘﺔ‪ .‬اﻟﺸﻜﻞ‪ 33-3‬ﻳﺒﲔ ﺑﻌﺾ اﻟﺘﻄﺒﻴﻘﺎت اﻷﺳﺎﺳﻴﺔ ﻟﻠﺒﻴﺌﺔ اﻟﱪﳎﻴﺔ ‪.LabVIEW‬‬

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‫‪23‬‬ ‫اﻟﻔﺼﻞ اﻟﺜﺎﻟﺚ | ‪Chapter 3‬‬

‫اﻟﺸﻜﻞ‪ 33-3‬ﺑﻌﺾ اﻟﺘﻄﺒﻴﻘﺎت اﻷﺳﺎﺳﻴﺔ ﻟﻠﺒﻴﺌﺔ اﻟﱪﳎﻴﺔ ‪LabVIEW‬‬

‫ﻛﻤﺎ ﻫﻮ واﺿﺢ ﻋﻠﻰ اﻟﺸﻜﻞ‪ 33-3‬ﻓﺈن ﻫﻨﺎك ﻃﻴﻔﺎً واﺳﻌﺎً ﺟﺪاً ﻣﻦ اﻟﺘﻄﺒﻴﻘﺎت اﻟﱵ ﳝﻜﻦ ﻟﻠﺒﻴﺌﺔ ‪ LabVIEW‬اﻟﺘﻌﺎﻣﻞ ﻣﻌﻬﺎ‪ ،‬وﻫﻮ اﻟﺴﺒﺐ‬
‫ﰲ ﻛﻮن اﻟﺒﻴﺌﺔ ‪ LabVIEW‬ﻣﺴﺘﺨﺪﻣﺔ ﰲ أﻛﺜﺮ ﻣﻦ ‪ 30,000‬ﺷﺮﻛﺔ ﻋﺎﳌﻴﺔ ﺣﻮل اﻟﻌﺎﱂ‪.‬‬

‫‪ 1-3-4-3-3‬ﻋﻨﺎﺻﺮ اﻟﺒﻴﺌﺔ اﻟﱪﳎﻴﺔ ‪:(The LabVIEW Environment Parts) LabVIEW‬‬

‫ﺗﺘﺄﻟﻒ اﻟﺒﻴﺌﺔ اﻟﱪﳎﻴﺔ اﻷﺳﺎﺳﻴﺔ ﻟﻠﱪﻧﺎﻣﺞ ﻣﻦ‪:‬‬
‫‪ -1‬واﺟﻬﺔ اﳌﺴﺘﺨﺪم اﻟﺮﺳﻮﻣﻴﺔ )‪(Front Panel‬‬
‫‪ -2‬واﺟﻬﺔ اﻟﱪﳎﺔ اﻟﺮﺳﻮﻣﻴﺔ )‪(Block Diagram‬‬
‫‪ -3‬ﻣﺪﻳﺮ وﻣﺴﺘﻌﺮض اﳌﺸﺮوع )‪(Project Explorer‬‬

‫اﻟﺸﻜﻞ ‪ 34-3‬اﻟﻮﺟﻬﺎت اﻷﺳﺎﺳﻴﺔ واﳌﺴﺘﻌﺮض ﻟﻠﺒﻴﺌﺔ اﻟﱪﳎﻴﺔ ‪LabVIEW‬‬

‫‪163‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Hardware Programming Languages‬‬ ‫ﻟﻐﺎت ﺑﺮﳎﺔ أﻧﻈﻤﺔ اﻟﻜﻴﺎن اﻟﺼﻠﺐ |‬

‫اﻟﺸﻜﻞ‪ 35-3‬ﳎﻤﻮﻋﺔ ﻣﻨﺘﻘﺎة ﻣﻦ أﻛﱪ اﻟﺸﺮﻛﺎت اﻟﻌﺎﳌﻴﺔ اﻟﱵ ﺗﺴﺘﺨﺪم اﻟﺒﻴﺌﺔ ‪LabVIEW‬‬

‫واﺟﻬﺔ اﳌﺴﺘﺨﺪم اﻟﺮﺳﻮﻣﻴﺔ )‪(Front Panel‬‬ ‫‪1-1-3-4-3-3‬‬

‫وﻫﻲ واﺟﻬﺔ ﲢﻜﻢ ﺗﻔﺎﻋﻠﻴﺔ ﻣﺮﺋﻴﺔ ﻟﻠﻤﺴﺘﺨﺪم )‪ ،(GUI‬ﺗﻀﻢ ﳎﻤﻮﻋﺔ ﻋﻨﺎﺻﺮ ﲢﻜﻢ وإﻇﻬﺎر وﻇﻴﻔﻴﺔ ﺗﺪﻋﻰ ﺑـ"‪) "Controls‬ﻋﻨﺎﺻﺮ دﺧﻞ‬
‫وﺧﺮج وإﻇﻬﺎر ﻣﺮﺋﻴﺔ( ﻳﺘﻢ إﺿﺎﻓﺘﻬﺎ ﻣﻦ ﻟﻮﺣﺔ ﻋﻨﺎﺻﺮ اﻟﺘﺤﻜﻢ )‪ .(Controls Palette‬اﻟﺸﻜﻞ‪ 36-3‬ﻳﺒﲔ ﻣﺜﺎﻻً ﻟﻮاﺟﻬﺔ اﳌﺴﺘﺨﺪم‬
‫ﻟﻠﺘﻄﺒﻴﻘﺎت اﻟﱪﳎﻴﺔ ﰲ ﺑﻴﺌﺔ ‪.LabVIEW‬‬

‫اﻟﺸﻜﻞ‪ 36-3‬واﺟﻬﺔ اﳌﺴﺘﺨﺪم ﻟﻠﺘﻄﺒﻴﻘﺎت اﻟﱪﳎﻴﺔ ﰲ اﻟﺒﻴﺌﺔ ‪LabVIEW‬‬

‫إن ﻋﻨﺎﺻﺮ اﻟﺘﺤﻜﻢ ﰲ واﺟﻬﺔ اﳌﺴﺘﺨﺪم ﻣﺮﺗﺒﻄﺔ ﺑﺸﻜﻞ ﻣﺒﺎﺷﺮ ﺑﺎﻟﻌﻨﺎﺻﺮ اﻟﻮﻇﻴﻔﻴﺔ ﰲ اﻟﻮاﺟﻬﺔ اﻟﱪﳎﻴﺔ‪ ،‬ﺣﻴﺚ أﻧﻪ ﺑﺈﺿﺎﻓﺔ أي ﻋﻨﺼﺮ ﰲ‬
‫واﺟﻬﺔ اﻟﺘﺤﻜﻢ‪ ،‬ﺳﻴﺘﻢ إﺿﺎﻓﺔ اﻟﻌﻨﺼﺮ اﻟﻮﻇﻴﻔﻲ ﻟﻪ ﰲ اﻟﻮاﺟﻬﺔ اﻟﱪﳎﻴﺔ آﻧﻴﺎً‪ ،‬وﺑﺎﻟﺘﺎﱄ ﳝﻜﻦ ﺑﻨﺎء واﺟﻬﺔ اﳌﺴﺘﺨﺪم ﺑﺎﻟﻜﺎﻣﻞ ﰒ ﺗﻮﺻﻴﻞ ﻋﻨﺎﺻﺮ‬
‫اﻟﺘﺤﻜﻢ اﻟﻮﻇﻴﻔﻴﺔ ﰲ اﻟﻮاﺟﻬﺔ اﻟﱪﳎﻴﺔ‪ .‬اﻟﺸﻜﻞ‪ 37-3‬ﻳﺒﲔ ﻟﻮﺣﺔ "‪."Controls Palette‬‬

‫اﻟﺸﻜﻞ‪ 37-3‬ﻟﻮﺣﺔ ﻋﻨﺎﺻﺮ اﻟﺘﺤﻜﻢ "‪ "Controls Palette‬ﰲ واﺟﻬﺔ اﳌﺴﺘﺨﺪم ﰲ اﻟﺒﻴﺌﺔ ‪LabVIEW‬‬

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‫‪23‬‬ ‫اﻟﻔﺼﻞ اﻟﺜﺎﻟﺚ | ‪Chapter 3‬‬

‫واﺟﻬﺔ اﻟﱪﳎﺔ اﻟﺮﺳﻮﻣﻴﺔ )‪:(Block Diagram‬‬ ‫‪2-1-3-4-3-3‬‬

‫ﻫﻲ اﻟﻮاﺟﻬﺔ اﻟﱪﳎﻴﺔ اﻟﺮﺳﻮﻣﻴﺔ )ﻣﺸﺎﻬﺑﺔ ﻟﻠﻤﺤﺮر اﻟﱪﳎﻲ اﻟﻨﺼﻲ ﰲ ﻟﻐﺎت اﻟﱪﳎﻴﺔ اﻟﺘﻘﻠﻴﺪﻳﺔ ‪ ،(C, C++, Jave‬ﺗﻀﻢ اﻟﻌﻨﺎﺻﺮ واﳌﻜﺘﺒﺎت‬
‫اﻟﱪﳎﻴﺔ اﻟﻮﻇﻴﻔﻴﺔ اﻟﱵ ﻳﺘﻢ إﺿﺎﻓﺘﻬﺎ ﻣﻦ ﻟﻮﺣﺔ اﻟﻌﻨﺎﺻﺮ اﻟﻮﻇﻴﻔﻴﺔ )‪ ،(Functions Palette‬ﻫﺬﻩ اﻟﻌﻨﺎﺻﺮ واﳌﻜﺘﺒﺎت ﰎ ﺑﻨﺎؤﻫﺎ ﺑﺎﺳﺘﺨﺪام‬
‫اﻟﻌﻨﺎﺻﺮ اﻟﺮﺳﻮﻣﻴﺔ وﻟﻜﻦ ﻋﻨﺪ ﻣﺴﺘﻮى ﺑﺮﳎﻲ أﺧﻔﺾ‪ .‬اﻟﺸﻜﻞ‪ 38-3‬ﻳﺒﲔ ﻣﺜﺎﻻً ﻟﻮاﺟﻬﺔ اﻟﱪﻧﺎﻣﺞ ﻟﻠﺘﻄﺒﻴﻘﺎت اﻟﱪﳎﻴﺔ ﰲ ﺑﻴﺌﺔ ‪.LabVIEW‬‬
‫اﻟﺸﻜﻞ‪ 39-3‬ﻳﺒﲔ ﻟﻮﺣﺔ اﻟﻌﻨﺎﺻﺮ اﻟﻮﻇﻴﻔﻴﺔ "‪."Functions Palette‬‬

‫اﻟﺸﻜﻞ‪ 38-3‬واﺟﻬﺔ اﻟﱪﻧﺎﻣﺞ ﻟﻠﺘﻄﺒﻴﻘﺎت اﻟﱪﳎﻴﺔ ﰲ اﻟﺒﻴﺌﺔ ‪LabVIEW‬‬

‫اﻟﺸﻜﻞ‪ 39-3‬ﻟﻮﺣﺔ اﻟﻌﻨﺎﺻﺮ اﻟﻮﻇﻴﻔﻴﺔ "‪ "Functions Palette‬ﰲ اﻟﻮاﺟﻬﺔ اﻟﱪﳎﻴﺔ ﰲ اﻟﺒﻴﺌﺔ ‪LabVIEW‬‬

‫ﺑﺸﻜﻞ ﻣﺸﺎﺑﻪ ﻟﻠﻐﺎت اﻟﻨﺼﻴﺔ ﻓﺈن اﻟﺒﻴﺌﺔ ‪ LabVIEW‬ﺗﺴﺘﺨﺪم اﳊﻠﻘﺎت )ﻣﺜﻞ‪ (For..Next, Do..While :‬ﺑﺸﻜﻞ رﺳﻮﻣﻲ ﻟﻠﺘﺤﻜﻢ‬
‫ﺑﺎﻟﻌﻤﻠﻴﺎت اﻟﺘﻜﺮارﻳﺔ‪ ،‬ﻛﻤﺎ ﺗﺴﺘﺨﺪم اﻟﺘﻮاﺑﻊ اﻟﺸﺮﻃﻴﺔ )ﻣﺜﻞ‪ (If…Then :‬ﳌﻘﺎرﻧﺔ اﻟﺸﺮوط‪ ،‬إﺿﺎﻓﺔً إﱃ اﻟﻌﺪﻳﺪ ﻣﻦ اﳊﻠﻘﺎت اﳌﺘﺰاﻣﻨﺔ وﻋﻨﺎﺻﺮ‬
‫ﺗﻨﻔﻴﺬ ﻣﺘﺴﻠﺴﻞ واﻟﻌﺪﻳﺪ ﻣﻦ اﻟﻌﻨﺎﺻﺮ اﻷﺧﺮى‪ .‬اﻟﺸﻜﻞ‪ 40-3‬ﻳﺒﲔ أﻛﺜﺮ اﻟﻌﻨﺎﺻﺮ اﻟﻮﻇﻴﻔﻴﺔ اﻟﺸﺮﻃﻴﺔ واﳊﻠﻘﺎت اﺳﺘﺨﺪاﻣﺎً ﰲ اﻟﺒﻴﺌﺔ‬
‫‪.LabVIEW‬‬

‫‪165‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Hardware Programming Languages‬‬ ‫ﻟﻐﺎت ﺑﺮﳎﺔ أﻧﻈﻤﺔ اﻟﻜﻴﺎن اﻟﺼﻠﺐ |‬

‫اﻟﺸﻜﻞ ‪ 40-3‬اﻟﻌﻨﺎﺻﺮ اﻟﻮﻇﻴﻔﻴﺔ ﻟﻠﺤﻠﻘﺎت اﻟﺸﺮﻃﻴﺔ ﰲ اﻟﺒﻴﺌﺔ ‪LabVIEW‬‬

‫إن اﻟﺘﺼﻤﻴﻢ واﻟﱪﳎﺔ ﰲ اﻟﺒﻴﺌﺔ ‪ LabVIEW‬ﻻ ﻳﻘﺘﺼﺮ ﻓﻘﻂ ﻋﻠﻰ اﺳﺘﺨﺪام ﻟﻐﺔ اﻟـ‪ G‬اﻟﺮﺳﻮﻣﻴﺔ‪ ،‬وإﳕﺎ ﻳﻮﺟﺪ اﻟﻌﺪﻳﺪ ﻣﻦ اﻟﻄﺮق ﻋﺎﻟﻴﺔ اﳌﺴﺘﻮى‬
‫ﻟﺒﻨﺎء اﻟﺘﺼﻤﻴﻢ )‪ ،(High-level Design Models‬ﺣﻴﺚ ﳝﻜﻦ ﺑﻨﺎء اﻟﺘﻄﺒﻴﻖ ﺑﺎﺳﺘﺨﺪام ‪ Simulation-Module‬اﳌﺸﺎﺑﻪ ﻟﺒﻴﺌﺔ‬
‫اﻟﱪﻧﺎﻣﺞ ‪ ،Matlab-Simulink‬ﻛﻤﺎ ﳝﻜﻦ اﺳﺘﺨﺪام ‪ ،StateChart Module‬أو ﺗﻀﻤﲔ ﻣﻠﻔﺎت ﺑﺮﳎﻴﺔ ﻧﺼﻴﺔ ﺧﺎرﺟﻴﺔ ) ‪HDL,‬‬

‫‪ (C/C++, .m file‬ﺑﺎﺳﺘﺨﺪام اﻟﻌﻘﺪ اﳌﺨﺼﺼﺔ ﻟﺬﻟﻚ‪ .‬اﻟﺸﻜﻞ‪ 41-3‬ﻳﺒﲔ ﻃﻴﻔﺎً واﺳﻌﺎً ﻣﻦ اﻟﻄﺮق اﻟﱪﳎﻴﺔ اﻟﱵ ﳝﻜﻦ اﺳﺘﺨﺪاﻣﻬﺎ ﰲ‬
‫ﺗﺼﻤﻴﻢ وﺑﺮﳎﺔ ﺣﻠﻮل اﻟﻜﻴﺎن اﻟﺼﻠﺐ اﳌﺒﻴﻨﺔ ﻋﻠﻰ اﻟﺸﻜﻞ‪.‬‬

‫اﻟﺸﻜﻞ‪ 41-3‬اﳊﻠﻮل اﻟﱪﳎﻴﺔ وﺣﻠﻮل اﻟﻜﻴﺎن اﻟﺼﻠﺐ ﰲ اﻟﺒﻴﺌﺔ ‪LabVIEW‬‬

‫‪ LabVIEW 2-3-4-3-3‬واﻟﱪﳎﺔ اﻟﺮﺳﻮﻣﻴﺔ اﻟﺘﺪﻓﻘﻴﺔ )‪:(LabVIEW, "G" Dataflow Programming‬‬

‫ﲣﺘﻠﻒ ﺑﻴﺌﺔ ‪ LabVIEW‬ﻋﻦ ﻣﻌﻈﻢ ﻟﻐﺎت اﻟﱪﳎﺔ اﻷﺧﺮى ﰲ ﻛﻮ�ﺎ ﺗﺴﺘﺨﺪم ﻟﻐﺔ ﺑﺮﳎﺔ رﺳﻮﻣﻴﺔ ﺗﺪﻋﻰ ﺑ ـ"‪ (Graphical) "G‬ﺗﻘﻮم ﻋﻠﻰ‬
‫ﻣﺒﺪأ ﺗﻮﺻﻴﻞ أﻳﻘﻮﻧﺎت رﺳﻮﻣﻴﺔ ﻋﻠﻰ ﺷﻜﻞ ﳐﻄﻂ‪ ،‬اﻟﺬي ﻳُﱰﺟﻢ ﻣﺒﺎﺷﺮةً إﱃ ﻟﻐﺔ اﻵﻟﺔ ﺣﱴ ﺗﺴﺘﻄﻴﻊ اﳌﻌﺎﳉﺎت اﳌﻮﺟﻮدة ﰲ اﳊﺎﺳﺐ ﺗﻨﻔﻴﺬﻩ‪،‬‬
‫وﻋﻠﻰ اﻟﺮﻏﻢ ﻣﻦ ﻛﻮ�ﺎ ُﲤﺜﱠﻞ ﺑﺸﻜﻞ رﺳﻮﻣﻲ ﻋﻮﺿﺎً ﻋﻦ اﻟﺸﻜﻞ اﻟﻨﺼﻲ؛ ﻓﺈ ﱠن ﻟﻐﺔ "‪ "G‬ﲤﺘﻠﻚ ﻧﻔﺲ اﳌﺒﺎدئ اﻟﱪﳎﻴﺔ اﳌﺘﱠﺒﻌﺔ ﰲ ﻣﻌﻈﻢ ﻟﻐﺎت‬
‫اﻟﱪﳎﺔ اﻟﺘﻘﻠﻴﺪﻳﺔ‪ .‬ﻋﻠﻰ ﺳﺒﻴﻞ اﳌﺜﺎل‪ ،‬ﲤﺘﻠﻚ ﻟﻐﺔ اﻟﱪﳎﺔ "‪ "G‬ﲨﻴﻊ اﻟﺒُﲎ اﻟﻨﻈﺎﻣﻴﺔ اﻟﱵ ﲢﺘﻮﻳﻬﺎ ﻟﻐﺎت اﻟﱪﳎﺔ ﻣﺜﻞ‪ :‬أﳕﺎط اﻟﺒﻴﺎﻧﺎت‪ ،‬اﳊﻠﻘﺎت‪،‬‬
‫اﻟﻌﻮدﻳﺔ )‪ ،(recursion‬إدارة اﻷﺣﺪاث )‪ ،(event handling‬واﻟﱪﳎﺔ ﻏﺮﺿﻴﺔ اﻟﺘﻮ ﱡ‬
‫ﺟﻪ ) ‪object-oriented‬‬ ‫اﳌﺘﺤﻮﻻت‪ُ ،‬‬
‫‪.(programming‬‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪166‬‬
‫‪23‬‬ ‫اﻟﻔﺼﻞ اﻟﺜﺎﻟﺚ | ‪Chapter 3‬‬

‫اﻟﺼﻔﺔ اﳌﻬﻤﺔ اﻷﺧﺮى اﻟﱵ ﲤﻴﱢﺰ اﻟﺒﻴﺌﺔ اﻟﱪﳎﻴﺔ ‪ LabVIEW‬ﻋﻦ ﻏﲑﻫﺎ ﻣﻦ ﻟﻐﺎت اﻟﱪﳎﺔ اﻟﺘﻘﻠﻴﺪﻳﺔ‪ ،‬ﻫﻲ ﻛﻮن ﻟﻐﺔ اﻟـ‪ G‬اﳌﻄ ﱠﻮرة ﻓﻴﻬﺎ ﺗُﻨ ﱠﻔﺬ وﻓﻘﺎً‬
‫ﻋﺪد ﻣﻦ اﻷواﻣﺮ )اﻹﺟﺮاءات( اﳌﺘﺴﻠﺴﻠﺔ‬ ‫ﻟﻘﻮاﻋﺪ ﺗﺪﻓﱡﻖ اﳌﻌﻄﻴﺎت )‪ (Dataflow‬ﻋﻮﺿﺎً ﻋﻦ اﻟﻄﺮﻳﻘﺔ اﻟﺘﻘﻠﻴﺪﻳﺔ اﻹﺟﺮاﺋﻴﺔ اﻟﱵ ﺗﻌﺘﻤﺪ ﻋﻠﻰ ﺗﻨﻔﻴﺬ ٍ‬

‫ﻛﻤﺎ ﰲ ﻣﻌﻈﻢ ﻟﻐﺎت اﻟﱪﳎﺔ اﻟﻨﺼﻴﺔ ‪ -‬ﻛﻠﻐﺔ ‪.C++ & C‬‬

‫ﺗﻌﺘﻤﺪ ﻟﻐﺔ اﻟﱪﳎﺔ ‪ G‬ﻋﻠﻰ ﻣﻨﻬﺠﻴﺔ اﻟﱪﳎﺔ اﻟﺘﺪﻓﻘﻴﺔ )‪ (Dataflow‬اﻟﱵ ﻓﻴﻬﺎ ﻳﻜﻮن ﺧﺮج ﻛﻞ ﻋﻘﺪة ﺑﺮﳎﻴﺔ ﺣﺴﺎﺑﻴﺔ ﳏﺴﻮب ﻋﻨﺪﻣﺎ ﺗﻜﻮن‬
‫ﲨﻴﻊ اﻟﻘﻴﻢ ﳏﺪدة ﻋﻠﻰ ﻣﺪاﺧﻞ اﻟﻌﻘﺪة؛ ﺣﻴﺚ أن ﺗﺪﻓﱡﻖ اﻟﺒﻴﺎﻧﺎت ﺑﲔ ﻋُﻘﺪ اﻟﱪﻧﺎﻣﺞ ‪-‬وﻟﻴﺲ أﺳﻄﺮ اﻟﺘﻌﻠﻴﻤﺎت اﳌﺘﺴﻠﺴﻠﺔ‪ -‬ﻫﻮ ﻣﺎ ﳛﺪﱢد أوﻟﻮﻳﺔ‬
‫اﻟﺘﻨﻔﻴﺬ‪ ،‬ﻛﻤﺎ أن اﻟﻌﻤﻠﻴﺎت اﳊﺴﺎﺑﻴﺔ ﳝﻜﻦ أن ﺗﻜﻮن ﻣﺰاﻣﻨﺔ ﻟﻠﻌﻘﺪ اﻟﱵ ﻻ ﺗﻜﻮن ﻣﺪاﺧﻠﻬﺎ ﻣﺘﻌﻠﻘﺔ ﲟﺨﺎرج ﻋﻘﺪ أﺧﺮى؛ رﲟﺎ ﺗﺒﺪو ﻫﺬﻩ اﻟﺼﻔﺔ‬
‫ﺿﺌﻴﻠﺔ اﻷﺛﺮ ﻟﻠﻮﻫﻠﺔ اﻷوﱃ‪ ،‬وﻟﻜﻨﱠﻬﺎ ﰲ اﳊﻘﻴﻘﺔ ذات ﺗﺄﺛﲑ اﺳﺘﺜﻨﺎﺋﻲ؛ ﻷ�ﺎ ﲡﻌﻞ ﻣﻦ اﳌﺴﺎرات اﻟﱵ ﺗﺴﻠﻜﻬﺎ اﻟﺒﻴﺎﻧﺎت ﺑﲔ أﺟﺰاء اﻟﱪﻧﺎﻣﺞ‬
‫اﳌﺨﺘﻠﻔﺔ ﻣﻮﺿﻊ اﻻﻫﺘﻤﺎم اﻷول ﻟﻠﻤﱪﻣﺞ‪.‬‬

‫ﲤﺘﻠﻚ اﻟﻌﻘﺪ )اﻟﺘﻮاﺑﻊ‪ ،‬اﻟﺒُﲎ ﻛﺎﳊﻠﻘﺎت‪ ،‬اﻟﱪاﻣﺞ اﻟﻔﺮﻋﻴﺔ‪ ،‬وﻏﲑﻫﺎ( ﰲ ﺑﻴﺌﺔ ‪ LabVIEW‬ﻣﺪاﺧﻼً ﻟﻘﺮاءة اﻟﺒﻴﺎﻧﺎت‪ ،‬وﺣﺎﳌﺎ ﲢﺘﻮي ﲨﻴﻊ ﻣﺪاﺧﻞ‬
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‫ﺑﻴﺎﻧﺎت ﻣﻨﺎﺒﺔ‪ ،‬ﺗﻘﻮم ﻫﺬﻩ اﻟﻌﻘﺪة ﺑﺘﻨﻔﻴﺬ اﻟﻌﻤﻠﻴﺎت اﳌﻨﻄﻘﻴﺔ اﳌﻨﺎﻃﺔ ﻬﺑﺎ‪ ،‬ﰒﱠ ﺗﻮﻟﱢﺪ اﻟﺒﻴﺎﻧﺎت اﳌﻨﺎﺳﺒﺔ ﻋﻠﻰ ﳐﺎرﺟﻬﺎ‪ ،‬وﲤﱢﺮر ﻫﺬﻩ‬ ‫ﻋﻘﺪةٍ ﻣﺎ ﻋﻠﻰ‬
‫ﻟﺒﻴﺎﻧﺎت إﱃ اﻟﻌﻘﺪة اﻟﺘﺎﻟﻴﺔ ﰲ ﻣﺴﺎر ﺗﺪﻓﱡﻖ اﻟﺒﻴﺎﻧﺎت؛ إنﱠ اﻟﻌﻘﺪة اﻟﱵ ﺗﺴﺘﻘﺒﻞ ﺑﻴﺎﻧﺎت ﻣﺎ ﻣﻦ ﻋﻘﺪة أﺧﺮى‪ ،‬ﺗﺴﺘﻄﻴﻊ ﺗﻨﻔﻴﺬ ﺗﻌﻠﻴﻤﺎﻬﺗﺎ ﻓﻘﻂ ﺑﻌﺪ‬
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‫ﺑﺸﻜﻞ ﻛﺎﻣﻞ‪.‬‬ ‫أن ﺗُﻨﻬﻲ ﺗﻠﻚ اﻟﻌﻘﺪة ﻨﻔﻴﺬ ﺗﻌﻠﻴﻤﺎﻬﺗﺎ‬

‫‪ 3-3-4-3-3‬ﻓﻮاﺋﺪ ﻟﻐﺔ اﻟﱪﳎﺔ اﻟﺮﺳﻮﻣﻴﺔ ”‪:(Benefits of G Programming) “G‬‬

‫ﻓﻴﻤﺎ ﻳﻠﻲ ﻧﻠﺨﺺ ﺑﺈﳚﺎز اﳌﻴﺰات واﻟﻔﻮاﺋﺪ اﳍﺎﻣﺔ ﻟﻠﻐﺎت اﻟﱪﳎﻴﺔ اﻟﺮﺳﻮﻣﻴﺔ‪.‬‬

‫اﻟﱪﳎﺔ اﻟﺮﺳﻮﻣﻴﺔ ﺣﺪﺳﻴﺔ ﺑﺪﻳﻬﻴﺔ )‪:(Intuitive Graphical Programming‬‬ ‫‪1-3-3-4-3-3‬‬

‫ﻛﻤﺎ ﻫﻮ اﳊﺎل ﻟﺪى ﻣﻌﻈﻢ اﻟﻨﺎس‪ ،‬ﻳﺘﻌﻠﻢ اﳌﻬﻨﺪﺳﻮن واﻟﻌﻠﻤﺎء ﻋﻦ ﻃﺮﻳﻖ ﻣﺸﺎﻫﺪة وﻣﻌﺎﳉﺔ اﻟﺼﻮر ﺑﺪون اﳊﺎﺟﺔ إﱃ ﺗﺄﻣﻞ دﻗﻴﻖ ﻟﻠﻤﻮﺿﻮع؛‬
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‫ﺑﺸﻜﻞ ﺧﺎص ﰲ‬ ‫ﳝﻜﻨﻨﺎ أﻳﻀﺎً وﺻﻒ اﻟﻌﺪﻳﺪ ﻣﻦ اﳌﻬﻨﺪﺳﲔ واﻟﻌﻠﻤﺎء "ﻛﻤﻔﻜﺮﻳﻦ ﺑﺼﺮﻳﲔ" )‪ ،(Visual Thinkers‬ﳑﺎ ﻳﻌﲏ أ�ﻢ ﻣﺎﻫﺮون‬
‫اﺳﺘﺨﺪام اﻟﻄﺮق اﻟﺮﺳﻮﻣﻴﺔ ﻟﺘﻮﺻﻴﻒ وﺗﻨﻈﻴﻢ اﳌﻌﻠﻮﻣﺎت‪ .‬إن ﻫﺬﻩ اﳌﻴﺰة ﻳﺘﻢ ﺗﻨﻤﻴﺘﻬﺎ ﻏﺎﻟﺒﺎً ﰲ اﳌﺪارس واﳉﺎﻣﻌﺎت‪ ،‬ﺣﻴﺚ ﻳﺘﻢ ﺗﺸﺠﻴﻊ اﻟﻄﻼب‬
‫ﻋﻠﻰ إﳚﺎد ﺣﻠﻮل ﳌﺴﺎﺋﻞ ﳐﺘﻠﻔﺔ ﺑﺸﻜﻞ ﳐﻄﻄﺎت وﻇﻴﻔﻴﺔ‪ .‬ﺑﺎﻟﺮﻏﻢ ﻣﻦ ذﻟﻚ‪ ،‬ﻓﺈن ﻣﻌﻈﻢ ﻟﻐﺎت اﻟﱪﳎﺔ ﻋﺎﻣﺔ اﻻﺳﺘﺨﺪام ﺗﺘﻄﻠﺐ ﻣﻦ اﳌﱪﻣﺞ‬
‫ﺟﻬﺪاً إﺿﺎﻓﻴﺎً ﻟﻴﺘﻌﻠﻢ اﻟﺘﻌﻠﻴﻤﺎت اﻟﻨﺼﻴﺔ اﶈﺪدة اﳋﺎﺻﺔ ﺑﺬﻩ اﻟﻠﻐﺔ‪ ،‬وﻣﻦ ﰒﱠ ﻋﻠﻴﻪ إﺳﻘﺎط ﺑﻨﻴﺔ ﻫﺬﻩ اﻟﻠﻐﺔ ﻋﻠﻰ اﳌﺴﺄﻟﺔ اﳌﺪروﺳﺔ‪.‬‬

‫إن اﻟﱪﳎﺔ اﻟﺮﺳﻮﻣﻴﺔ ﺑﺎﺳﺘﺨﺪام ﻟﻐﺔ ‪ G‬ﺗﺘﻴﺢ ﻟﻠﻤﱪﻣﺞ ﲡﺮﺑﺔ أﻛﺜﺮ ﺑﺪﻳﻬﻴﺔ وأﻛﺜﺮ اﻧﺴﺠﺎﻣﺎً ﻣﻊ ﺗﻔﻜﲑﻩ اﻟﻔﻄﺮي‪ ،‬ذﻟﻚ ﻷ�ﺎ ﺗﻌﺘﱪ أﻛﺜﺮ ﺳﻬﻮﻟﺔً‬
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‫ﻣﻨﻬﺠﻴﺔ أو ﺗﺪﻓﻘﻴﺔ )واﻟﱵ ﺗﺘﱠﺒﻊ‬ ‫ﻟﻠﻔﻬﻢ واﻻﺳﺘﻴﻌﺎب ﻋﻠﻰ اﻋﺘﺒﺎر أﻧﻪ ﻣﺘﺂﻟﻒ ﻛﻠﻴﺎً ﻣﻊ اﻟﺘﻤﺜﻴﻞ اﻟﺮﺳﻮﻣﻲ وﳕﺬﺟﺔ اﻟﻌﻤﻠﻴﺎت ﺑﺸﻜﻞ ﳐﻄﻄﺎت‬
‫ﻗﻮاﻋﺪ ﺗﺪﻓﱡﻖ اﻟﺒﻴﺎﻧﺎت(‪ ،‬ﺑﺎﻹﺿﺎﻓﺔ إﱃ ذﻟﻚ‪ ،‬وﲟﺎ أ ﱠن ﻟﻐﺎت اﻟﱪﳎﺔ اﳌﻘﺎدة ﺑﺎﻟﺒﻴﺎﻧﺎت ﺗﺘﻄﻠﺐ ﻣﻦ اﳌﱪﻣﺞ أن ﳚﻌﻞ ﺗﺪﻓﱡﻖ ﻫﺬﻩ اﻟﺒﻴﺎﻧﺎت اﶈﻮر‬
‫اﻟﺮﺋﻴﺲ ﰲ اﻟﱪﻧﺎﻣﺞ‪ ،‬ﻓﺈ ﱠن ﻫﺬا ﻳﺸ ﱢﺠﻊ اﳌﱪﻣﺞ ﺑﺎﻟﺘﻔﻜﲑ ﰲ اﳌﺴﺎﻟﺔ اﻟﱵ ﳛﻠﱡﻬﺎ ﻋﻮﺿﺎً ﻋﻦ اﻟﺘﻔﻜﲑ ﰲ أﺳﻠﻮب ﺑﺮﳎﺘﻬﺎ؛ ﻋﻠﻰ ﺳﺒﻴﻞ اﳌﺜﺎل‪ ،‬ﻗﺪ ﻳﺒﺪأ‬
‫ﳕﻮذﺟﻲ ﻣﻜﺘﻮب ﺑﻠﻐﺔ ‪ G‬ﺑﺘﺤﺼﻴﻞ ﻋﺪة ﻗﻨﻮات ﲢﻤﻞ ﺑﻴﺎﻧﺎت ﻋﻦ درﺟﺔ اﳊﺮارة‪ ،‬ﰒﱠ ﻳﻘﻮم ﺑﺘﻤﺮﻳﺮ ﻫﺬﻩ اﻟﺒﻴﺎﻧﺎت إﱃ ﺗﺎﺑﻊ ﻣﻌﺎﳉﺔ‬ ‫ٌ‬ ‫ﻧﺎﻣﺞ‬
‫ﺑﺮ ٌ‬
‫وﺣﺴﺎب‪ ،‬وأﺧﲑاً ﻳﻘﻮم ﺑﺘﺨﺰﻳﻦ اﻟﺒﻴﺎﻧﺎت اﳌﻌﺎﳉﺔ ﻋﻠﻰ اﻟﻘﺮص‪ ،‬ﻛﻤﺎ ﻫﻮ ﻣﺒﲔ ﻋﻠﻰ اﻟﺸﻜﻞ‪ 42-3‬ﻓﺈن ﺗﺪﻓﱡﻖ اﻟﺒﻴﺎﻧﺎت واﳋﻄﻮات اﻟﱵ ﻳﺘﻀ ﱠﻤﻨﻬﺎ‬
‫ﻫﺬا اﻟﱪﻧﺎﻣﺞ ﺗُﻌﺘﱪ ﺳﻬﻠﺔ اﻟﻔﻬﻢ إﲨﺎﻻً ﺿﻤﻦ ﳐﻄﻂ ﺑﻴﺌﺔ ‪.LabVIEW‬‬

‫‪167‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Hardware Programming Languages‬‬ ‫ﻟﻐﺎت ﺑﺮﳎﺔ أﻧﻈﻤﺔ اﻟﻜﻴﺎن اﻟﺼﻠﺐ |‬

‫‪LabVIEW‬‬ ‫اﻟﺸﻜﻞ‪ 42-3‬ﳌﺨﻄﻂ اﻟﱪﳎﻲ ﻻﺳﺘﺤﺼﺎل ﺑﻴﺎﻧﺎت وﻣﻌﺎﳉﺎﻬﺗﺎ وﲣﺰﻳﻨﻬﺎ ﰲ اﻟﱪﻧﺎﻣﺞ‬

‫أدوات اﻟﺘﻨﻘﻴﺢ واﻟﻔﺤﺺ اﻟﺘﻔﺎﻋﻠﻴﺔ )‪:(Interactive Debugging Tools‬‬ ‫‪2-3-3-4-3-3‬‬

‫ﲟﺎ أن ﻟﻐﺔ اﻟﱪﳎﺔ اﻟﺮﺳﻮﻣﻴﺔ ‪ G‬ﰲ ﺑﻴﺌﺔ ‪ LabVIEW‬ﺳﻬﻠﺔ اﻟﻔﻬﻢ‪ ،‬ﻓﺈ ﱠن ﻫﺬا ﳚﻌﻞ ﻣﻦ اﳌﻬﺎم اﻟﱪﳎﻴﺔ اﻟﺸﺎﺋﻌﺔ ﻛﺘﻨﻘﻴﺢ اﻷﺧﻄﺎء أﻣﺮاً روﺗﻴﻨﻴﺎً‬
‫ﺑﺸﻜﻞ ﺗﻔﺎﻋﻠﻲ‬‫ٍ‬ ‫وﺑﺪﻳﻬﻴﺎً أﻳﻀﺎً‪ .‬ﻋﻠﻰ ﺳﺒﻴﻞ اﳌﺜﺎل‪ ،‬ﺗﻘﺪم ﺑﻴﺌﺔ ‪ LabVIEW‬أدوات ﺗﻨﻘﻴﺢ ﻓﺮﻳﺪة ﻣﻦ ﻧﻮﻋﻬﺎ ﺗﺘﻴﺢ ﻟﻠﻤﱪﻣﺞ ﻣﺸﺎﻫﺪة اﻟﺒﻴﺎﻧﺎت‬
‫وﻫﻲ ﺗﻨﺘﻘﻞ ﻋﱪ اﻷﺳﻼك ﻣﻦ ﻋﻘﺪةٍ ﻷﺧﺮى )ـ‪.(Execution Highlighting‬‬

‫‪LabVIEW‬‬ ‫اﻟﺸﻜﻞ‪ 43-3‬اﺳﺘﺨﺪام ﺧﺎﺻﻴﺔ اﻟﺘﻨﻘﻴﺢ "‪ "Execution Highlighting‬ﳌﺮاﻗﺒﺔ ﺗﺪﻓﻖ اﻟﺒﻴﺎﻧﺎت ﺑﲔ اﻟﻌﻘﺪ ﰲ اﻟﺒﻴﺌﺔ‬

‫ﲢﺘﻮي اﻟﺒﻴﺌﺔ ‪ LabVIEW‬أﻳﻀﺎً ﻋﻠﻰ أدوات ﺗﻨﻘﻴﺢ ﻟﻠﻐﺔ ‪ G‬ﳑﺎﺛﻠﺔ ﻟﺘﻠﻚ اﳌﻮﺟﻮدة ﰲ ﺑﻴﺌﺎت اﻟﱪﳎﺔ اﻟﺘﻘﻠﻴﺪﻳﺔ اﻷﺧﺮى‪ ،‬ﺗﺘﻀ ﱠﻤﻦ اﻷدوات‪:‬‬
‫ﻧﻘﺎط ﻣﺮاﻗﺒﺔ )‪ ،(Probes‬ﻧﻘﺎط ﺗﻮﻗﱡﻒ )‪ ،(Break Points‬ﺗﺸﻐﻴﻞ ﺧﻄﻮة ﲞﻄﻮة )‪.(Step-by-Step‬‬

‫ُﲤ ﱢﻜﻦ أدوات اﻟﺘﻨﻘﻴﺢ اﳋﺎﺻﺔ ﺑﻠﻐﺔ ‪ G‬اﳌﱪﻣﺞ ﻣﻦ اﺳﺘﺤﺼﺎل اﻟﺒﻴﺎﻧﺎت ﻣﻦ ﻋﺪﱠة أﺟﺰاء ﰲ اﻟﱪﻧﺎﻣﺞ ﺑﻨﻔﺲ اﻟﻮﻗﺖ‪ ،‬ﻛﻤﺎ ﺗﻌﻄﻴﻪ إﻣﻜﺎﻧﻴﺔ اﻹﻳﻘﺎف‬
‫اﻵﱐ واﻟﺪﺧﻮل إﱃ ﺑﺮﻧﺎﻣﺞ ﻓﺮﻋﻲ ﺑﺪون اﳊﺎﺟﺔ إﱃ ﺗﻌﻠﻴﻤﺎت ﺑﺮﳎﻴﺔ ﻣﻌﻘﱠﺪة؛ ورﻏﻢ أ ﱠن ﻫﺬﻩ اﻹﻣﻜﺎﻧﻴﺎت ﻣﺘﻮﻓﱢﺮة ﰲ ﻟﻐﺎت اﻟﱪﳎﺔ اﻷﺧﺮى‪ ،‬إﻻﱠ‬
‫أ ﱠن ﺑﻴﺌﺔ ‪ LabVIEW‬ﲡﻌﻞ ﻣﻦ اﻟﺴﻬﻞ ﺟﺪاً ﺗﺼ ﱡﻮر ﺣﺎﻟﺔ اﻟﱪﻧﺎﻣﺞ واﻟﻌﻼﻗﺎت ﺑﲔ اﻷﺟﺰاء اﻟﺘﻔﺮﻋﻴﺔ ﻓﻴﻪ ﺑﺴﺒﺐ اﻟﻄﺒﻴﻌﺔ اﻟﺮﺳﻮﻣﻴﺔ‪ ،‬ﻛﻤﺎ ﺗُﻌﺘﱪ‬
‫أداة اﳌﱰﺟﻢ اﻵﱐ إﺣﺪى أﺑﺮز أدوات ﺗﻨﻘﻴﺢ اﻷﺧﻄﺎء اﳌﺴﺘﺨﺪﻣﺔ ﰲ ﺑﻴﺌﺔ ‪ ،LabVIEW‬ﺣﻴﺚ أﻧﻪ أﺛﻨﺎء ﻗﻴﺎم اﳌﱪﻣﺞ ﺑﺘﻄﻮﻳﺮ اﻟﱪﻧﺎﻣﺞ‪ ،‬ﺗﻘﻮم‬
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‫ﺑﺸﻜﻞ آﱐ‪ ،‬وﺗﻘﺪﱢم اﻗﱰاﺣﺎت ﻟﻠﻤﱪﻣﺞ ﺣﻮل اﻷﺧﻄﺎء اﻟﱪﳎﻴﺔ وﻃﺮﻳﻘﺔ ﺣﻠﻬﺎ‪.‬‬ ‫ﻫﺬﻩ اﻷداة ﺑﺘﻔ ﱡﺤﺺ اﻷﺧﻄﺎء‬

‫اﻟﺘﻮزﻳﻊ اﻟﺘﻠﻘﺎﺋﻲ ﳌﻬﺎم اﻟﺘﻨﻔﻴﺬ واﻷداء )‪:(Automatic Parallelism and Performance‬‬ ‫‪3-3-3-4-3-3‬‬
‫ٍ‬
‫ﺑﺸﻜﻞ ﺗﻠﻘﺎﺋﻲ ﻋﻠﻰ ﺗﻔﱡﺮعٍ ﰲ اﻟﺘﻨﻔﻴﺬ‪ .‬وﺑﻌﻜﺲ ﻟﻐﺎت اﻟﱪﳎﺔ‬ ‫ﺗﺴﻤﺢ ﻟﻐﺎت اﻟﱪﳎﺔ اﳌﻘﺎدة ﺑﺎﻟﺒﻴﺎﻧﺎت ﻛﻤﺎ ﰲ ﺑﻴﺌﺔ ‪ LabVIEW‬ﺑﺎﳊﺼﻮل‬
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‫ﺑﺸﻜﻞ أﺳﺎﺳﻲ ﻋﻠﻰ ﻣﻌﻠﻮﻣﺎت ﻋﻦ أﺟﺰاء اﻟﱪﻧﺎﻣﺞ اﻟﱵ ﲢﺘﺎج إﱃ اﻟﺘﻨﻔﻴﺬ ﻋﻠﻰ‬ ‫اﻟﺘﺴﻠﺴﻠﻴﺔ ﻛﻠﻐﺔ ‪ C‬وﻟﻐﺔ ‪ ،C++‬ﻓﺈ ﱠن اﻟﱪاﻣﺞ اﻟﺮﺳﻮﻣﻴﺔ ﲢﺘﻮي‬
‫اﻟﺘﻮازي ﻣﻊ أﺟﺰاء أﺧﺮى‪ .‬ﻋﻠﻰ ﺳﺒﻴﻞ اﳌﺜﺎل‪ ،‬ﻳﺘﻌﱪ ﳕﻂ اﳌﻨﺘﺞ‪/‬اﳌﺴﺘﻬﻠﻚ )‪ (Producer/Consumer‬أﺣﺪ أﺳﺎﻟﻴﺐ اﻟﺘﺼﻤﻴﻢ اﻟﺸﺎﺋﻌﺔ ﰲ‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪168‬‬
‫‪23‬‬ ‫اﻟﻔﺼﻞ اﻟﺜﺎﻟﺚ | ‪Chapter 3‬‬

‫ﻟﻐﺔ اﻟﱪﳎﺔ ‪ ،G‬ﻓﻔﻲ ﻫﺬا اﻷﺳﻠﻮب ﺗﻌﻤﻞ ﺣﻠﻘﺘﺎ ‪ While‬ﻋﻠﻰ اﻟﺘﻮازي وﺑﺸﻜﻞ ﻣﺴﺘﻘﻞ‪ ،‬ﲝﻴﺚ ﺗﻜﻮن اﳊﻠﻘﺔ اﻷوﱃ ﻣﺴﺆوﻟﺔً ﻋﻦ ﺗﻮﻟﻴﺪ‬
‫اﻟﺒﻴﺎﻧﺎت واﳊﻠﻘﺔ اﻟﺜﺎﻧﻴﺔ ﻣﺴﺆوﻟﺔٌ ﻋﻦ ﻣﻌﺎﳉﺘﻬﺎ‪ ،‬وﻳﺘﻢ ﺗﺒﺎدل اﻟﺒﻴﺎﻧﺎت ﺑﲔ اﳊﻠﻘﺘﲔ ﺑﺎﺳﺘﺨﺪام أدوات ﺗﺪﻋﻰ ﺑـ‪ ،Queues‬وﻫﻲ ﻣﻦ أﳕﺎط‬
‫اﻟﺒﻴﺎﻧﺎت اﻟﺘﻘﻠﻴﺪﻳﺔ ﰲ ﻟﻐﺎت اﻟﱪﳎﺔ ﻋﺎﻣﺔ اﻻﺳﺘﺨﺪام‪ .‬اﻟﺸﻜﻞ‪ 44-3‬ﻳﻮﺿﺢ اﻟﻨﻤﻂ اﻟﱪﳎﻲ ‪.Producer/Consumer‬‬

‫اﻟﺸﻜﻞ‪ 44-3‬ﺗﻨﻔﻴﺬ اﳌﻬﺎم اﻟﺘﻔﺮﻋﻴﺔ ﰲ اﻟﺒﻴﺌﺔ ‪ LabVIEW‬ﺑﺎﺳﺘﺨﺪام اﻟﻨﻤﻂ ‪Producer/Consumer‬‬

‫إن ﺧﺎﺻﻴﺔ اﻟﺘﻔﺮﻋﻴﺔ ﺗُﻌﺘﱪ أﻣﺮاً ﺑﺎﻟﻎ اﻷﳘﻴﺔ ﰲ ﺑﺮاﻣﺞ اﳊﺎﺳﺐ‪ ،‬وذﻟﻚ ﻟﻜﻮ�ﺎ ﻗﺎدرة ﻋﻠﻰ ﲣﻄﻲ ﺣﺪود اﻷداء اﻟﻨﺎﲡﺔ ﻋﻦ ﺿﻌﻒ اﻟﱪاﻣﺞ‬
‫اﻟﺘﺴﻠﺴﻠﻴﺔ ﰲ اﻟﺘﻌﺎﻣﻞ ﻣﻊ اﻟﺘﻄﻮرات اﻷﺧﲑة ﰲ ﺗﺼﺎﻣﻴﻢ ﻣﻌﺎﳉﺎت اﳊﻮاﺳﻴﺐ‪ .‬ﻋﻠﻰ ﻣﺪى أﻛﺜﺮ ﻣﻦ ‪ 40‬ﻋﺎم‪ ،‬ﻗﺎم ﻣﺼﻨﻌﻮ اﳌﻌﺎﳉﺎت اﳊﺎﺳﻮﺑﻴﺔ‬
‫ﺑﺰﻳﺎدة ﺗﺮدد ﻋﻤﻞ اﳌﻌﺎﰿ ﻟﺰﻳﺎدة أداﺋﻪ‪ ،‬ﰲ أﻳﺎﻣﻨﺎ ﻫﺬﻩ ﱂ ﻳﻌﺪ ﻫﺬا اﻷﻣﺮ ﳑﻜﻨﺎً ﻧﺘﻴﺠﺔً ﻟﻠﻀﻮاﺑﻂ اﻟﱵ ﲢ ﱡﺪ ﻣﻦ اﻻﺳﺘﻄﺎﻋﺔ اﳌﺴﺘﻬﻠﻜﺔ واﻟﻄﺎﻗﺔ‬
‫اﳊﺮارﻳﺔ اﳌﺒﺪﱠدة ﰲ ﻫﺬﻩ اﳌﻌﺎﳉﺎت‪ ،‬وﻧﺘﻴﺠﺔً ﳍﺬا ﻗﺎم ﻣﺼﻨﻌﻮ اﳌﻌﺎﳉﺎت ﺑﺎﻻﻧﺘﻘﺎل إﱃ ﺗﺼﺎﻣﻴﻢٍ ﺟﺪﻳﺪة ﺗﺴﺘﺨﺪم ﻋﺪة ﻧﻮى ﻣﻌﺎﳉﺔ ﻋﻠﻰ ﺷﺮﳛﺔ‬
‫واﺣﺪة‪.‬‬

‫ﺣﱴ ﻳﺴﺘﻔﻴﺪ اﳌﱪﻣﺞ ﻣﻦ اﻷداء اﻟﻜﺒﲑ اﻟﺬي ﺗﻘﺪﻣﻪ اﳌﻌﺎﳉﺎت ﻣﺘﻌﺪدة اﻟﻨﻮى‪ ،‬ﳚﺐ أن ﻳﻜﻮن ﻗﺎدراً ﻋﻠﻰ اﺳﺘﺨﺪام اﻟﺘﻘﻨﻴﺎت اﻟﱪﳎﻴﺔ اﳌﺘﻘﺪﻣﺔ‬
‫)‪ (Pipelining, Task and Data Parallelism‬وﺗﻮزﻳﻊ اﳌﻬﺎم )‪ (Multithreading‬ﰲ ﺑﺮﻧﺎﳎﻪ )أي ﲟﻌﲎ آﺧﺮ ﺗﻘﺴﻴﻢ اﻟﱪﻧﺎﻣﺞ إﱃ‬
‫ﻣﺴﺘﻘﻞ ﻋﻦ ﺑﻌﻀﻬﺎ اﻟﺒﻌﺾ(‪ .‬وﺑﺎﻟﺘﺎﱄ ﻓﺈﻧﻪ ﻋﻨﺪ اﺳﺘﺨﺪام ﻟﻐﺎت اﻟﱪﳎﺔ اﻟﻨﺼﻴﺔ اﻟﺘﻘﻠﻴﺪﻳﺔ‪ ،‬ﺳﻴﺼﺒﺢ‬‫ٍ‬ ‫ٍ‬
‫ﺑﺸﻜﻞ‬ ‫ﻣﻘﺎﻃﻊ ﻣﻨﻔﺼﻠﺔ ﳝﻜﻦ أن ﺗُﻨﻔﱠﺬ‬
‫اﳌﱪﻣﺞ ﻣﺴﺌﻮﻻً ٍ‬
‫ﺑﺸﻜﻞ ﻣﺒﺎﺷﺮ ﻋﻦ إﻧﺸﺎء اﳌﺴﺎرات إدارﻬﺗﺎ ﻣﻦ أﺟﻞ اﳊﺼﻮل ﻋﻠﻰ ﻣﺰاﻳﺎ اﻟﺘﻔﺮﻋﻴﺔ‪ ،‬وﻫﻮ ﻣﺎ ﻳُﻌﺘﱪ ﲢﺪﱢﻳﺎً ﻛﺒﲑاً ﻟﻠﻤﱪﳎﲔ اﶈﱰﻓﲔ‬
‫وﻏﲑ اﶈﱰﻓﲔ‪.‬‬

‫ﻋﻠﻰ اﻟﻌﻜﺲ ﲤﺎﻣﺎً‪ ،‬ﻓﺈن ﺧﻮاص اﻟﺘﻔﺮﻋﻴﺔ اﻟﻄﺒﻴﻌﻴﺔ ﰲ ﻟﻐﺔ اﻟﱪﳎﺔ ‪ G‬ﺗﺒﺴﻂ اﺳﺘﺨﺪام ﺗﻌﺪد اﳌﻬﺎم )‪ (Multitasking‬ﰲ اﻟﱪاﻣﺞ‪ ،‬ﺣﻴﺚ ﺗُﻘ ﱢﻮم‬
‫اﻟﺒﻴﺌﺔ ‪ LabVIEW‬آﻧﻴﺎً أﺛﻨﺎء اﻟﺘﻨﻔﻴﺬ اﻷﺟﺰاءَ اﻟﺘﻔﺮﻋﻴﺔ ﻣﻦ اﻟﱪﻧﺎﻣﺞ‪ ،‬وﻛﻠﻤﺎ ﺻﺎدﻓﺖ ﺗﻔﱡﺮﻋﺎً ﰲ أﺣﺪ اﻷﺳﻼك‪ ،‬أو ﺗﻮﺿﱡﻌﺎً ﻣﺘﻮازﻳﺎً ﻟﻠﻌﻘﺪ‪ ،‬ﺗُﻨﻔﺬ‬
‫ﻋﺪد ﻣﻦ اﳌﺴﺎرات اﻟﱵ ﺗﺤﻜﻢ ﻬﺑﺎ‪ .‬ﺗُﺪﻋﻰ ﻫﺬﻩ اﻟﻄﺮﻳﻘﺔ ﰲ اﻻﺻﻄﻼﺣﺎت اﻟﻌﻠﻤﻴﺔ اﳊﺎﺳﻮﺑﻴﺔ ﺑﺎﻟﺘﻮازي‬ ‫ﺑﺸﻜﻞ ﺗﻔﺮﻋﻲ ﻋﱪ اﺳﺘﺨﺪام ٍ‬ ‫ٍ‬ ‫اﻟﱪﻧﺎﻣﺞ‬
‫ﺑﺸﻜﻞ ﺗﻔﺮﻋﻲ‪ ،‬وإﱠﳕﺎ ﺗﻘﻮم ﻟﻐﺔ ‪ G‬ﺑﺘﻨﻔﻴﺬ اﻟﺘﻔﺮﻋﻴﺔ‬
‫ٍ‬ ‫اﻟﻀﻤﲏ "‪ ،Implicit Parallelism‬ﺣﻴﺚ أنﱠ اﳌﺴﺘﺨﺪم ﻻ ﻳﻜﺘﺐ ﺑﺮﻧﺎﳎﻪ ﻬﺑﺪف ﺗﻨﻔﻴﺬﻩ‬
‫ﺗﻠﻘﺎﺋﻴﺎً ﻣﻦ ﺧﻼل ﺗﻘﺴﻴﻢ اﻟﺘﻄﺒﻴﻖ إﱃ ﻣﺴﺎرات ﺗﻨﻔﻴﺬ ﻣﺴﺘﻘﻠﺔ ﻣﻮزﻋﺔ‪ .‬اﻟﺸﻜﻞ‪ 45-3‬ﻳﺒﲔ اﻟﺘﻔﺮﻋﻴﺔ اﻟﻄﺒﻴﻌﻴﺔ ﻟﺘﻨﻔﻴﺬ اﳌﻬﺎم ﰲ اﻟﺒﻴﺌﺔ‬
‫‪.LabVIEW‬‬
‫‪169‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Hardware Programming Languages‬‬ ‫ﻟﻐﺎت ﺑﺮﳎﺔ أﻧﻈﻤﺔ اﻟﻜﻴﺎن اﻟﺼﻠﺐ |‬

‫‪LabVIEW‬‬ ‫اﻟﺸﻜﻞ‪ 45-3‬ﺗﻮزﻳﻊ اﳌﻬﺎم اﻟﺘﻠﻘﺎﺋﻲ )‪ (Automatic Multithreading‬ﰲ اﻟﺒﻴﺌﺔ‬

‫اﻟﺸﻜﻞ‪ 46-3‬ﻳﺒﲔ ﻣﺒﺪأ ﺗﻮزﻳﻊ اﻟﺒﻴﺎﻧﺎت اﳌﺘﻮازي ﻋﻠﻰ ﻧﻮى اﳌﻌﺎﳉﺎت وﻫﺬا اﳌﺒﺪأ ﻳﺴﺘﺨﺪم ﻋﻨﺪﻣﺎ ﻳﺮاد ﻣﻌﺎﳉﺔ وﻧﻘﻞ ﻛﻤﻴﺎت ﻛﺒﲑة ﻣﻦ‬
‫اﻟﺒﻴﺎﻧﺎت‪ .‬اﻟﺸﻜﻞ‪ 47-3‬ﻳﺒﲔ ﺗﻄﺒﻴﻖ "‪ "Data Parallelism‬ﻋﻠﻰ ﻣﻌﺎﰿ ‪ Quad-core‬ﰲ ‪.LabVIEW‬‬

‫اﻟﺸﻜﻞ ‪ 46-3‬ﻣﺒﺪأ "‪ "Data Parallelism‬ﻋﻠﻰ ﻣﻌﺎﰿ ‪Quad-core‬‬

‫‪LabVIEW‬‬ ‫اﻟﺸﻜﻞ‪ 47-3‬ﺗﻄﺒﻴﻖ "‪ "Data Parallelism‬ﻋﻠﻰ ﻣﻌﺎﰿ ‪ Quad-core‬ﰲ‬

‫اﻟﺸﻜﻞ‪ 48-3‬ﻳﺒﲔ ﻣﺒﺪأ اﳌﻌﺎﳉﺔ اﳌﺘﺰاﻣﻨﺔ "‪ "Pipelining‬ﰲ ﺗﻮزﻳﻊ اﳌﻬﺎم اﻟﱪﳎﻴﺔ ﻋﻠﻰ ﻣﻌﺎﰿ ذو ﻧﻮاة وﺣﻴﺪة ﺗﺪﻋﻢ أرﺑﻊ ﻣﺴﺘﻮﻳﺎت ﻣﺘﺰاﻣﻨﺔ‪.‬‬
‫اﻟﺸﻜﻞ‪ 49-3‬ﻳﺒﲔ ﺗﻄﺒﻴﻖ ﻣﺒﺪأ "‪ "Pipelining‬ﺑﺄرﺑﻊ ﻣﺴﺘﻮﻳﺎت ﰲ ﺑﻴﺌﺔ اﻟﱪﻧﺎﻣﺞ ‪.LabVIEW‬‬

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‫‪23‬‬ ‫اﻟﻔﺼﻞ اﻟﺜﺎﻟﺚ | ‪Chapter 3‬‬

‫اﻟﺸﻜﻞ‪ 48-3‬ﲤﺜﻴﻞ اﳌﺒﺪأ اﻟﻌﺎم ﻟﻠﻤﻌﺎﳉﺔ اﳌﺘﺰاﻣﻨﺔ "‪ "Pipelining‬ﺑﺄرﺑﻊ ﻣﺴﺘﻮﻳﺎت‬

‫‪Sequential‬‬

‫‪Pipelining‬‬
‫‪4-Channels‬‬

‫‪LabVIEW‬‬ ‫اﻟﺸﻜﻞ‪ 49-3‬ﻣﻘﺎرﻧﺔ ﺑﲔ اﳌﻌﺎﳉﺔ اﻟﺘﺴﻠﺴﻠﻴﺔ )‪ (Sequential‬واﳌﻌﺎﳉﺔ اﳌﺘﺰاﻣﻨﺔ )‪ (4L.Pipelining‬ﰲ ﺑﻴﺌﺔ اﻟﱪﻧﺎﻣﺞ‬

‫اﻟﺸﻜﻞ‪ 50-3‬ﻳﺒﲔ اﻟﱪﳎﺔ واﻟﺘﻮزﻳﻊ اﳌﺘﻮازي ﰲ اﻟﺰﻣﻦ اﳊﻘﻴﻘﻲ )‪ (Real-time‬ﻟﻠﻤﻌﺎﳉﺎت ﻣﺘﻌﺪدة اﻟﻨﻮى ﺑﺎﺳﺘﺨﺪام اﳊﻠﻘﺎت اﳌﺘﺰاﻣﻨﺔ‪ ،‬وﻓﻴﻬﺎ‬
‫ﳝﻜﻦ ﲢﺪﻳﺪ ﻧﻮاة اﳌﻌﺎﳉﺔ اﳌﻌﻨﻴﺔ ﺑﺘﻨﻔﻴﺬ اﳊﻠﻘﺔ ﰲ إﻋﺪادات اﳊﻠﻘﺔ ﺑﺈﺳﻨﺎد رﻗﻢ اﻟﻨﻮاة )‪.(1,2,…n‬‬

‫‪Core-1‬‬

‫‪Core-2‬‬
‫اﻟﺸﻜﻞ‪ 50-3‬اﻟﱪﳎﺔ ﰲ اﻟﺰﻣﻦ اﳊﻘﻴﻘﻲ ﻟﻠﻤﻌﺎﳉﺎت ﻣﺘﻌﺪدة اﻟﻨﻮى ﰲ اﻟﺒﻴﺌﺔ ‪LabVIEW‬‬

‫اﻟﱪﳎﺔ اﻟﺘﻔﺮﻋﻴﺔ ﻋﻠﻰ ﺷﺮاﺋﺢ ‪:(Parallelism on FPGA Chips) FPGA‬‬ ‫‪4-3-3-4-3-3‬‬

‫ﻗﺒﻴﻞ ﺳﻨﻮات ﻛﺎﻧﺖ ﻣﻬﻤﺔ ﺑﺮﳎﺔ ﺷﺮاﺋﺢ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ )‪ (FPGAs‬ﺳﺎﺑﻘﺎً ﻣﻨﻮﻃﺔ ﻓﻘﻂ ﺑﺎﳋﱪاء اﳌﺨﺘ ﱢ‬
‫ﺼﲔ اﻟﺬﻳﻦ ﻳﺘﻤﺘﱠﻌﻮن‬
‫ٍ‬
‫وﺑﺸﻜﻞ ﻣﺘﺰاﻳﺪ‪ ،‬أﺻﺒﺢ ﻟﺪى اﳌﻬﻨﺪﺳﲔ اﻟﺬﻳﻦ ﻳﻌﻤﻠﻮن ﰲ ﳎﺎل ﺑﺮﳎﺔ اﳌﺘﺤﻜﻤﺎت اﳌﺼﻐﺮة ﻫﺎﺟﺲ‬ ‫ٍ‬
‫ﺑﺈﳌﺎم ﻛﺒ ٍﲑ ﺑﻠﻐﺎت ﺗﺼﻤﻴﻢ اﻟﻜﻴﺎن اﻟﺼﻠﺐ‪.‬‬

‫‪171‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Hardware Programming Languages‬‬ ‫ﻟﻐﺎت ﺑﺮﳎﺔ أﻧﻈﻤﺔ اﻟﻜﻴﺎن اﻟﺼﻠﺐ |‬

‫ﻟﺘﻌﻠﻢ ﺑﺮﳎﺔ ﺗﻘﻨﻴﺔ اﻟـ‪ FPGA‬ﻬﺑﺪف اﺳﺘﺨﺪام ﻫﺬﻩ اﻟﺘﻘﻨﻴﺔ ﰲ اﳌﺸﺎرﻳﻊ اﻟﱵ ﺗﺘﻄﻠﱠﺐ إﻣﻜﺎﻧﻴﺎت وﻣﺘﻄﻠﺒﺎت ﺧﺎﺻﺔ‪ ،‬وﲢﺘﺎج دﻗﺔ ﺣﺘﻤﻴﺔ ﰲ‬
‫اﻟﺘﻨﻔﻴﺬ‪ ،‬ﻏﲑ أن ﺑﺮﳎﺔ اﻟـ‪ FPGA‬ﲣﺘﻠﻒ ﻛﻠﻴﺎً ﻋﻦ ﺑﺮﳎﺔ اﳌﻌﺎﳉﺎت اﳌﺼﻐﺮة‪ ،‬ﻓﻤﻦ أﺟﻞ ﺗﺼﻤﻴﻢ ﺧﻮارزﻣﻴﺔ ﻣﻌﻴﻨﺔ ﺑﺎﺳﺘﺨﺪام اﻟـ‪FPGA‬؛ ﻓﺈﻧﻪ ﻣﻦ‬
‫اﻟﻀﺮوري ﻋﻨﺪ ﻛﺘﺎﺑﺔ اﻟﱪﻧﺎﻣﺞ أﺧﺬ اﻟﺘﻨﻔﻴﺬ اﳌﺘﺰاﻣﻦ ﻟﻠﻌﻤﻠﻴﺎت‪ ،‬واﻟﺘﻨﻔﻴﺬ اﻟﺘﻔﺮﻋﻲ‪ ،‬وﳏﺪودﻳﺔ ﻣﺼﺎدر اﻟﺘﺨﺰﻳﻦ وﻏﲑﻫﺎ ﺑﻌﲔ اﻻﻋﺘﺒﺎر]‪.[433‬‬

‫ﻳﺢ وواﺿﺢ ﻋﻦ ﻣﺒﺪأ اﻟﺘﻔﺮﻋﻴﺔ وﺗﺪﻓﱡﻖ اﻟﺒﻴﺎﻧﺎت‪ ،‬ﺣﻴﺚ‬ ‫ﺗُﻌﺘﱪ ﻟﻐﺔ ‪ G‬ﻣﻨﺎﺳﺒﺔ ﺑﺸﻜﻞ ﻓﺮﻳﺪ ﻟﱪﳎﺔ ﺷﺮاﺋﺢ اﻟـ‪ ،FPGA‬وذﻟﻚ ﻷ�ﺎ ﱢ‬
‫ﺗﻌﱪ ﺑﺸﻜﻞ ﺻﺮ ٍ‬
‫ﺼﺺ‬ ‫ﲤ ﱢﻜﻦ ﻟﻐﺔ ‪ G‬اﳌﺴﺘﺨﺪم ﻣﻦ اﳊﺼﻮل ﻋﻠﻰ ٍ‬
‫ﺗﻨﻔﻴﺬ ﺗﻔﺮﻋﻲ ﺣﻘﻴﻘﻲ ﻏﲑ ﳏﺪود )‪ ، (Parallelism‬ﺣﻴﺚ ﻳﺘﻢ إﺳﻨﺎد ﻛﻞ ﻣﻬﻤﺔ إﱃ ﻗﺴﻢ ﳐ ﱠ‬
‫ﻣﻦ اﻟﺸﺮﳛﺔ اﻟﺴﻴﻠﻴﻜﻮﻧﻴﺔ‪ ،‬وﻟﻜﻦ ﰲ ﻫﺬﻩ اﳊﺎﻟﺔ ﻻ ﻳﻮﺟﺪ ﳏﺪودﻳﺔ ﰲ اﻷداء وﻓﻘﺎً ﻟﻌﺪد ﻧﻮى اﳌﻌﺎﳉﺔ اﳌﺘ ﱢﻮﻓﺮة‪ ،‬وإﳕﺎ ﳝﻜﻦ ﺑﻨﺎء ﻋﺪد ﻛﺒﲑ ﻣﻦ‬
‫اﳌﺴﺎرات اﳌﺘﻮازﻳﺔ ﻛﻜﻴﺎن ﺻﻠﺐ‪ ،‬ﻛﻤﺎ أن اﻷداء ﰲ أﺣﺪ أﺟﺰاء اﻟﱪﻧﺎﻣﺞ ﻻ ﻳﺘﺄﺛﺮ ﺳﻠﺒﺎً ﺑﺈﺿﺎﻓﺔ اﳌﺰﻳﺪ ﻣﻦ ﻣﻬﻤﺎت اﳌﻌﺎﳉﺔ‪ .‬اﻟﺸﻜﻞ‪ 51-3‬ﻳﺒﲔ‬
‫ﺑﺮﻧﺎﳎﺎً ﺑﺎﺳﺘﺨﺪام اﻟﺒﻴﺌﺔ ‪ LabVIEW FPGA‬ﻣﻜﻮن ﻣﻦ ﲬﺲ ﺣﻠﻘﺎت ﺗﻨﻔﻴﺬ ﺗﻌﻤﻞ ﻋﻠﻰ اﻟﺘﻮازي‪.‬‬

‫اﻟﺸﻜﻞ‪ 51-3‬ﺑﺮﻧﺎﻣﺞ ﺑﺎﺳﺘﺨﺪام اﻟﺒﻴﺌﺔ ‪LabVIEW FPGA‬‬

‫اﺧﺘﺼﺎر اﳌﻬﻤﺎت واﻟﻌﻤﻠﻴﺎت ﻣﻨﺨﻔﻀﺔ اﳌﺴﺘﻮى )‪:(Abstraction of Low-Level Tasks‬‬ ‫‪5-3-3-4-3-3‬‬

‫ﺗُﻌ ﱡﺪ ﻋﻤﻠﻴﺔ اﻻﺧﺘﺼﺎر واﻟﺘﺠﺮﻳﺪ إﺣﺪى اﳌﺰاﻳﺎ اﻷﺳﺎﺳﻴﺔ ﰲ اﻟﻠﻐﺎت ﻋﺎﻟﻴﺔ اﳌﺴﺘﻮى‪ ،‬ﺣﻴﺚ ﱠأ�ﺎ ﱢ‬
‫ﺗﻌﱪ ﻋﻦ اﻟﱪاﻣﺞ ﺑﻄﺮق أﺧﺮى أﻛﺜﺮ ﻋﻔﻮﻳﺔ‬
‫وأﻗﺮب إﱃ ﻓﻄﺮة اﳌﱪﻣﺞ وﺗﻔﻜﲑﻩ‪ .‬ﺗﻘﻮم ﻟﻐﺔ اﻟﱪﳎﺔ ‪ G‬ﺗﻠﻘﺎﺋﻴﺎً ﺑﺄداء اﻟﻜﺜﲑ ﻣﻦ اﳌﻬﺎم اﻟﱵ ﻳﺘﻮﺟﺐ ﻋﻰ اﳌﱪﻣﺞ اﻟﻘﻴﺎم ﻬﺑﺎ ﰲ ﻟﻐﺎت اﻟﱪﳎﺔ‬
‫اﻟﻨﺼﻴﺔ )ﻛﺎﻟﺘﻌﺎﻣﻞ ﻣﻊ اﻟﺬاﻛﺮة ﻣﺜﻼً(‪ ،‬ﺣﻴﺚ ﻳﺘﻮﺟﺐ ﻋﻠﻰ اﳌﱪﻣﺞ ﰲ ﻟﻐﺎت اﻟﱪﳎﺔ اﻟﻨﺼﻴﺔ ﺣﺠﺰ اﳌﻮاﻗﻊ اﻟﺬاﻛﺮﻳﺔ ﻗﺒﻞ اﻟﺘﻌﺎﻣﻞ ﻣﻌﻬﺎ‪ ،‬ﻛﻤﺎ‬
‫ﻳﺘﻮﺟﺐ ﻋﻠﻴﻪ إ�ﺎء ﺣﺠﺰ ﻫﺬﻩ اﳌﻮاﻗﻊ ﻋﻨﺪﻣﺎ ﺗﻨﺘﻬﻲ اﳊﺎﺟﺔ إﻟﻴﻬﺎ‪ .‬ﻋﻠﻰ اﳌﱪﻣﺞ أﻳﻀﺎً أن ﻳﻜﻮن ﺣﺬراً ﲝﻴﺚ ﻻ ﻳﺘﺠﺎوز اﳌﻮاﻗﻊ اﻟﺬاﻛﺮﻳﺔ اﶈﺠﻮزة‬
‫ﻋﻨﺪ اﻟﻜﺘﺎﺑﺔ ﻋﻠﻰ اﻟﺬاﻛﺮة‪ .‬إن اﻟﻔﺸﻞ ﰲ ﺣﺠﺰ اﳌﻮاﻗﻊ اﳌﻄﻠﻮﺑﺔ ﰲ اﻟﺬاﻛﺮة‪ ،‬أو ﺣﺠﺰ ﻣﺴﺎﺣﺔ ﻏﲑ ﻛﺎﻓﻴﺔ‪ ،‬ﻳُﻌ ﱡﺪ ﻣﻦ أﻛﱪ اﻷﺧﻄﺎء اﻟﺸﺎﺋﻌﺔ‬
‫واﻟﺼﻌﺒﺔ اﻟﺘﻨﻘﻴﺢ ﰲ ﻟﻐﺎت اﻟﱪﳎﺔ اﻟﻨﺼﻴﺔ‪.‬‬

‫ﺗُﻌﺘﱪ ﺧﺎﺻﻴﺔ اﻟﺘﻌﺎﻣﻞ اﻵﱄ ﻣﻊ اﻟﺬاﻛﺮة ﻣﻦ أﻫﻢ ﻣﺰاﻳﺎ اﻟﱪﳎﺔ ﺑﺎﻟﻠﻐﺔ ‪ ،G‬ﺣﻴﺚ ﻻ ﳛﺘﺎج اﳌﱪﻣﺞ إﱃ ﺣﺠﺰ اﳌﺘﺤﻮﻻت أو اﻟﺘﺼﺮﻳﺢ ﻋﻨﻬﺎ‪ ،‬ﻛﻤﺎ‬
‫ﻻ ﳛﺘﺎج إﱃ اﻟﻜﺘﺎﺑﺔ إﱃ ﻫﺬﻩ اﳌﺘﺤﻮﻻت أو اﻟﻘﺮاءة ﻣﻨﻬﺎ‪ ،‬وإﳕﺎ ﺗﻘﻮم اﻟﻌﻘﺪ اﻟﱵ ﺗﻮﻟﱢﺪ اﻟﺒﻴﺎﻧﺎت ﰲ ﺑﻴﺌﺔ ‪ LabVIEW‬ﺗﻠﻘﺎﺋﻴﺎً ﲝﺠﺰ اﻷﻣﺎﻛﻦ‬

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‫‪23‬‬ ‫اﻟﻔﺼﻞ اﻟﺜﺎﻟﺚ | ‪Chapter 3‬‬

‫اﻟﺬاﻛﺮﻳﺔ ﳍﺬﻩ اﻟﺒﻴﺎﻧﺎت‪ ،‬وﻋﻨﺪﻣﺎ ﺗﻨﺘﻬﻲ اﳊﺎﺟﺔ إﱃ اﺳﺘﺨﺪاﻣﻬﺎ ﻳﺘﻢ إﻟﻐﺎء ﺣﺠﺰ اﳌﻮاﻗﻊ اﻟﺬاﻛﺮﻳﺔ ﺑﺸﻜﻞ آﱄ‪ .‬ﻛﺬﻟﻚ ﻋﻨﺪ إﺿﺎﻓﺔ ﻣﻌﻠﻮﻣﺎت‬
‫ٍ‬
‫ﺑﺸﻜﻞ ﺗﻠﻘﺎﺋﻲ ﻟﻴﺘﺴﻊ ﳍﺬﻩ اﳌﻌﻠﻮﻣﺎت اﳌﻀﺎﻓﺔ‪.‬‬ ‫ﺟﺪﻳﺪة إﱃ ﻣﺼﻔﻮﻓﺔ أو ﺳﻠﺴﻠﺔ ﻣﻌﺮﻓﻴﺔ‪ ،‬ﻳﺘﻢ ﺣﺠﺰ ﻣﻘﺪار إﺿﺎﰲ ﻣﻦ اﻟﺬاﻛﺮة‬

‫إن رﻓﻊ ﻣﻬﺎم وﻣﺴﺎﺋﻞ إدارة اﻟﺬاﻛﺮة ﻣﻨﺨﻔﻀﺔ اﳌﺴﺘﻮى ﻋﻦ ﻋﺎﺗﻖ اﳌﱪﻣﺞ‪ ،‬ﳛﱢﺮرﻩ ﻣﻦ دراﺳﺔ اﻟﻘﻮاﻋﺪ اﳌﻌﻘﱠﺪة اﻟﻼزﻣﺔ ﳌﻨﻊ ﺣﺪوث أﺧﻄﺎء ﺗﺸﻐﻴﻞ‬
‫ﰲ اﻟﱪﻧﺎﻣﺞ‪ ،‬ﻣﻦ أﺟﻞ أن ﻳﺮﱢﻛﺰ اﻫﺘﻤﺎﻣﻪ ﻋﻠﻰ اﳌﺴﺄﻟﺔ اﻟﱵ ﻳﻘﻮم ﲝﻠﱢﻬﺎ‪.‬‬

‫ﻋﻠﻰ اﻟﺮﻏﻢ ﻣﻦ ذﻟﻚ‪ ،‬ﻓﺈن اﳌﱪﻣﺞ ﻳﺴﺘﻄﻴﻊ اﻟﻮﺻﻮل إﱃ ﲢﻜﻢ دﻗﻴﻖ ﺑﺎﺳﺘﺨﺪام اﻟﺬاﻛﺮة ﰲ اﻟﻠﻐﺔ ‪ G‬ﻋﻨﺪ اﳌﺴﺘﻮى اﻷدﱏ ﺑﺎﺳﺘﺨﺪام أدوات‬
‫إدارة اﻟﺬاﻛﺮة "‪ "Profile Performance & Memory‬اﳌﺪﳎﺔ ﺿﻤﻦ ﺑﻴﺌﺔ ‪LabVIEW‬؛ ﻓﺈذا ﻗﱠﺮر اﳌﱪﻣﺞ أ ﱠن اﺳﺘﻬﻼك اﻟﺬاﻛﺮة ﻳﺸ ﱢﻜﻞ‬
‫ﻋﺎﻣﻼً ﻣﻬﻤﺎً ﰲ ﺑﻴﺌﺔ ‪ ،LabVIEW‬ﳝﻜﻨﻪ أن ﻳﺘﺪ ﱠﺧﻞ ﻟﻴﺨﻔﱢﺾ ﻛﻤﻴﺔ اﻟﺬاﻛﺮة اﳌﺴﺘﻬﻠﻜﺔ ﻋﱪ اﺳﺘﺨﺪام ﻋﺪة ﺗﻘﻨﻴﺎت ﺑﺮﳎﻴﺔ ﻣﺘﻘﺪﱢﻣﺔ‪.‬‬
‫اﻟﺸﻜﻞ‪ 52-3‬ﻟﻮﺣﺔ اﻟﺘﺤﻜﻢ ﺑﺎﻷداء وﻣﻮارد اﻟﺬاﻛﺮة ﰲ اﻟﺒﻴﺌﺔ ‪.LabVIEW‬‬

‫‪LabVIEW‬‬ ‫اﻟﺸﻜﻞ ‪ 52-3‬ﻟﻮﺣﺔ اﻟﺘﺤﻜﻢ ﺑﺎﻷداء وﻣﻮارد اﻟﺬاﻛﺮة ﰲ اﻟﺒﻴﺌﺔ‬

‫ﻋﻨﺪﻣﺎ ﺗُﻈﻬﺮ ﻟﻐﺔ اﻟﱪﳎﺔ ‪ G‬ﺳﻠﻮﻛﺎً ﻏﲑ ﻣﺘﻮﻗﻊ ﻻ ﳝﻜﻦ ﺣﻠﱡﻪ ﺑﺴﻬﻮﻟﺔ ﺑﺎﺳﺘﺨﺪام أدوات اﻟﺘﻨﻘﻴﺢ اﳌﺬﻛﻮرة ﺳﺎﺑﻘﺎً‪ ،‬ﻓﻌﻨﺪﻫﺎ ﺑﺈﻣﻜﺎن اﳌﱪﻣﺞ‬
‫اﺳﺘﺨﺪام أدوات ﺗﻨﻘﻴﺢ أﻛﺜﺮ ﺗﻄ ﱡﻮراً "‪ ."LabVIEW Desktop Execution Trace Toolkit‬ﺗﻘﺪم ﻫﺬﻩ اﻷدوات إﻣﻜﺎﻧﻴﺎت أﻗﻮى‬
‫ﻟﻠﻤﱪﳎﲔ اﶈﱰﻓﲔ اﻟﺬﻳﻦ ﳛﺘﺎﺟﻮن ﲢﻠﻴﻼً دﻳﻨﺎﻣﻴﻜﻴﺎً ﻟﻠﱪﻧﺎﻣﺞ ﻋﻨﺪ ﻣﺴﺘﻮﻳﺎت ﻣﻨﺨﻔﻀﺔ‪ ،‬ﻣﺜﻞ‪ :‬ﻛﺸﻒ اﻟﺘﺴﺮﻳﺒﺎت ﰲ اﻟﺬاﻛﺮة‪ ،‬ﻋﺰل اﳌﺼﺪر‬
‫ﻣﻌﲔ أو ﺳﻠﻮك ﻏﲑ ﻣﺮﻏﻮب‪ ،‬ﺗﻔ ﱡﺤﺺ اﻟﱪاﻣﺞ ﲝﺜﺎً ﻋﻦ اﳌﻮاﺿﻊ اﻟﱵ ُﲤ ﱢﻜﻦ ﻣﻦ ﺗﻄﻮﻳﺮ اﻷداء‪ ،‬إﳚﺎد آﺧﺮ ﻋﻤﻠﻴﺔ ﻧﺪاء ﺣﺼﻠﺖ‬
‫اﳌﺴﺒﱢﺐ ﳊﺪث ﱠ‬
‫ﻗﺒﻞ وﻗﻮع ﺧﻄﺄ ﻣﻌﲔ‪ ،‬اﻟﺘﺄ ﱡﻛﺪ ﻣﻦ ﻛﻮن أداء ﺑﺮﻧﺎﻣﺞ ﻣﻌ ﱠ‬
‫ﲔ ﻫﻮ ﻧﻔﺴﻪ ﻋﻠﻰ أﻧﻈﻤﺔ ﺗﺸﻐﻴﻞ وﻣﻨﺼﺎت ﻋﻤﻞ ﳐﺘﻠﻔﺔ‪ .‬اﻟﺸﻜﻞ‪ 53-3‬ﻟﻮﺣﺔ اﻷداة‬
‫"‪."Execution Trace‬‬

‫اﻟﺸﻜﻞ ‪ 53-3‬أداة ﻣﺘﻘﺪﻣﺔ ﻟﻠﻔﺤﺺ وﺗﺘﺒﻊ اﻷﺧﻄﺎء "‪ "Execution Trace‬ﰲ اﻟﺒﻴﺌﺔ ‪LabVIEW‬‬

‫‪173‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Hardware Programming Languages‬‬ ‫ﻟﻐﺎت ﺑﺮﳎﺔ أﻧﻈﻤﺔ اﻟﻜﻴﺎن اﻟﺼﻠﺐ |‬

‫‪ 4-3-4-3-3‬اﳉﻤﻊ ﺑﲔ ﻟﻐﺔ ‪ G‬وﻟﻐﺎت اﻟﱪﳎﺔ اﻷﺧﺮى )‪:(Combining G with Other Languages‬‬

‫ﺑﺎﻟﺮﻏﻢ ﻣﻦ أ ﱠن ﻟﻐﺔ اﻟﱪﳎﺔ ‪ G‬ﺗﻘﺪﱢم ﲤﺜﻴﻼً ﳑﺘﺎزاً ﻟﻠﻌﻤﻠﻴﺎت اﻟﺘﻔﺮﻋﻴﺔ‪ ،‬وﲢﱢﺮر اﳌﱪﻣﺞ ﻣﻦ ﺗﻌﻘﻴﺪات ﻓﻬﻢ ذاﻛﺮة اﳊﺎﺳﺐ واﻟﺘﻌﺎﻣﻞ ﻣﻌﻬﺎ‪ ،‬إﻻ ﱠأ�ﺎ‬
‫ﺑﺸﻜﻞ ﺧﺎص‪ ،‬ﳝﻜﻦ ﻟﻠﻌﻼﻗﺎت واﻟﺼﻴﻎ اﻟﺮﻳﺎﺿﻴﺔ أن ﲤﺜﱠﻞ ﻧﺼﻴﱠﺎً ﺑﺈﳚﺎ ٍز وﺳﻬﻮﻟﺔ أﻛﱪ ﰲ ﺑﻌﺾ‬
‫ٍ‬ ‫ﻏﲑ ﻣﻨﺎﺳﺒﺔ ﺑﺎﻟﻀﺮورة ﻷداء ﲨﻴﻊ اﳌﻬﺎم‪.‬‬
‫اﻷﺣﻴﺎن‪ ،‬ﳍﺬا اﻟﺴﺒﺐ‪ ،‬ﺗﺘﻴﺢ ﺑﻴﺌﺔ ‪ LabVIEW‬إﻣﻜﺎﻧﻴﺔ اﳉﻤﻊ ﺑﲔ اﻟﱪﳎﺔ اﻟﺮﺳﻮﻣﻴﺔ وﺑﲔ ﻋﺪة أﻧﻮاع ﻣﻦ ﻟﻐﺎت اﻟﱪﳎﺔ اﻟﻨﺼﻴﺔ‪ ،‬إذ ﻳﺴﺘﻄﻴﻊ‬
‫اﳌﱪﻣﺞ ﰲ ﺑﻴﺌﺔ ‪ LabVIEW‬اﻻﺧﺘﻴﺎر ﺑﲔ اﻟﱪﳎﺔ اﻟﻨﺼﻴﺔ واﻟﱪﳎﺔ اﻟﺮﺳﻮﻣﻴﺔ أو اﳉﻤﻊ ﺑﻴﻨﻬﻤﺎ‪.‬‬

‫ﻋﻠﻰ ﺳﺒﻴﻞ اﳌﺜﺎل‪ ،‬ﺗﺘﻴﺢ ﺑﻴﺌﺔ ‪ LabVIEW‬اﺳﺘﺨﺪام ﻣﺎ ﻳُﺴ ﱠﻤﻰ ﺑﻌﻘﺪ اﻟﺼﻴﻎ اﻟﺮﻳﺎﺿﻴﺔ )‪ ،(Formula Node‬واﻟﱵ ﲤ ﱢﻜﻦ اﳌﱪﻣﺞ ﻣﻦ ﻛﺘﺎﺑﺔ‬
‫ﺻﻴﻎ رﻳﺎﺿﻴﺔ ﻧﺼﻴﺔ ﺷﺒﻴﻬﺔ ﺑﺘﻠﻚ اﳌﺴﺘﺨﺪﻣﺔ ﰲ ﻟﻐﺔ ‪ C‬ﺿﻤﻦ اﳌﺨﻄﻂ اﻟﺼﻨﺪوﻗﻲ ﻟﻠﱪﻧﺎﻣﺞ‪ ،‬ﺑﺈﻣﻜﺎن ﺗﻠﻚ اﻟﺼﻴﻎ اﻟﺮﻳﺎﺿﻴﺔ أن ﺗُﻨﻔﱠﺬ ﺟﻨﺒﺎً إﱃ‬
‫ﺟﻨﺐ وﺑﺸﻜﻞ ﻣﺘﻜﺎﻣﻞ ﻣﻊ اﻟﻮﺣﺪات اﻟﱪﳎﻴﺔ )اﻟﺮﺳﻮﻣﻴﺔ( ﰲ ﺑﻴﺌﺔ ‪ .LabVIEW‬اﻟﺸﻜﻞ‪ 54-3‬ﻳﺒﲔ اﻟﻌﻨﺼﺮ ‪ C-node‬اﳌﺨﺼﺼﺔ ﻟﻜﺘﺎﺑﺔ‬
‫ﺑﺮاﻣﺞ ﺑﻠﻐﺔ اﻟـ‪ C/C++‬ﺿﻤﻦ ﺑﻴﺌﺔ ‪.LabVIEW‬‬

‫‪C-node‬‬ ‫اﻟﺸﻜﻞ‪ 54-3‬ﻛﺘﺎﺑﺔ ﺑﺮاﻣﺞ ﺑﻠﻐﺔ اﻟـ‪ C‬ﺿﻤﻦ ﺑﻴﺌﺔ ‪ LabVIEW‬ﺑﺎﺳﺘﺨﺪام اﻟﻌﻨﺼﺮ اﻟﱪﳎﻲ‬

‫ٍ‬
‫ﺑﺸﻜﻞ ﻣﺸﺎﺑﻪ‪ ،‬ﺗﻀﻴﻒ ﻋﻘﺪة اﻟﻨﺼﻮص اﻟﺮﻳﺎﺿﻴﺔ )‪ (MathScript Node‬اﻟﱪﳎﺔ اﻟﻨﺼﻴﺔ اﻟﺮﻳﺎﺿﻴﺔ إﱃ ﺑﻴﺌﺔ ‪ ،LabVIEW‬وﻫﻲ ﻣﺘﻮاﻓﻘﺔ‬
‫ﺑﺸﻜﻞ ﻋﺎم ﻣﻊ ﺻﻴﻐﺔ اﳌﻠﻔﺎت "‪ (Matlab) ".m file‬ﺷﺎﺋﻌﺔ اﻻﺳﺘﺨﺪام‪ .‬اﻟﺸﻜﻞ‪ 55-3‬ﻳﺒﲔ اﻟﻌﻨﺼﺮ ‪ MathScript-Node‬اﳌﺨﺼﺼﺔ‬
‫ﻟﻠﺘﻌﺎﻣﻞ ﻣﻊ ﺻﻴﻎ اﳌﻠﻔﺎت ﻣﻦ اﻟﻨﻮع "‪ ".m file‬ﺿﻤﻦ ﺑﻴﺌﺔ ‪ .LabVIEW‬إﺿﺎﻓﺔً إﱃ ذﻟﻚ ﳝﻜﻦ ﺗﻀﻤﲔ ﺑﺮﻧﺎﻣﺞ وﺻﻒ ﻛﻴﺎن ﺻﻠﺐ‬
‫‪ HDL‬ﺑﺎﺳﺘﺨﺪام اﻟﻌﻘﺪة اﻟﱪﳎﻴﺔ ‪.HDL-Node‬‬

‫اﻟﺸﻜﻞ ‪ 55-3‬اﻟﺘﻌﺎﻣﻞ ﻣﻊ اﳌﻠﻔﺎت "‪ ".m file‬ﺿﻤﻦ ﺑﻴﺌﺔ ‪ LabVIEW‬ﺑﺎﺳﺘﺨﺪام اﻟﻌﻨﺼﺮ ‪MathScript-Node‬‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪174‬‬
‫‪23‬‬ ‫اﻟﻔﺼﻞ اﻟﺜﺎﻟﺚ | ‪Chapter 3‬‬

‫‪ 5-3-4-3-3‬ﻣﻘﺎرﻧﺔ ﺑﲔ ﻟﻐﺎت اﻟﱪﳎﺔ اﻟﺮﺳﻮﻣﻴﺔ واﻟﻨﺼﻴﺔ )‪:(Textual vs. Graphical Programming‬‬

‫ﻛﻤﺎ ﻫﻮ ﻣﺒﲔ ﻋﻠﻰ اﻟﺸﻜﻞ‪ 56-3‬ﻓﺈن ﻋﻠﻰ اﳌﱪﻣﺞ اﳋﻮض ﰲ اﻟﻌﺪﻳﺪ ﻣﻦ اﳌﺮاﺣﻞ ﻟﻠﻮﺻﻮل إﱃ ﻣﺮﺣﻠﺔ ﺗﺸﻐﻴﻞ اﻟﱪﻧﺎﻣﺞ ﻋﻠﻰ اﻟﻜﻴﺎن اﻟﺼﻠﺐ‪،‬‬
‫وﻫﺬﻩ اﳌﺮاﺣﻞ ﺗﺘﻀﻤﻦ ﻛﻞ ﻣﻨﻬﺎ ﻣﻨﺼﺔ ﻋﻤﻞ ﻣﺴﺘﻘﻠﺔ ﲢﺘﺎج إﱃ ﺧﱪة ﻣﺮﺗﺒﻄﺔ ﺑﺎﻟﻮﻇﻴﻔﻴﺔ اﻟﱪﳎﻴﺔ‪ .‬ﰲ ﺣﲔ أﻧﻪ وﺑﺎﺳﺘﺨﺪام اﻟﺒﻴﺌﺔ ‪LabVIEW‬‬

‫ﻓﺈن ﻛﺎﻣﻞ ﻋﻤﻠﻴﺔ اﻟﱪﳎﺔ واﻟﺘﺤﻠﻴﻞ واﻟﺘﻄﻮﻳﺮ ﺗﺘﻢ ﻋﻠﻰ ﻣﻨﺼﺔ ﻋﻤﻞ وﺣﻴﺪة‪ ،‬وأﻣﺎ ﺗﻔﺎﺻﻴﻞ وﻣﺮاﺣﻞ ﺗﻮﻟﻴﺪ اﳌﻠﻒ اﻟﱪﳎﻲ ﻟﻠﻜﻴﺎن اﻟﺼﻠﺐ‪ ،‬ﻓﺘﺘﻢ‬
‫ﺑﺸﻜﻞ ﻣﺆﲤﺖ ﻣﻦ ﺧﻼل ﲡﺮﻳﺪﻫﺎ إﱃ ﻣﺴﺘﻮى اﻟﺒﻨﺎء اﻷﺧﻔﺾ – اﻟﺬي ﻳﺘﻢ آﻟﻴﺎً]‪ .[444‬إن ﻫﺬﻩ اﳌﻴﺰة ﺗﺘﻴﺢ ﻟﻠﻄﻼب ﰲ اﻟﻔﺮوع اﳍﻨﺪﺳﻴﺔ‬
‫إﻣﻜﺎﻧﻴﺔ ﺗﺼﻤﻴﻢ اﻟﻨﻤﺎذج وﺗﻨﻔﻴﺬﻫﺎ ﻣﺒﺎﺷﺮة ﻋﻠﻰ اﻟﻜﻴﺎن اﻟﺼﻠﺐ ﻣﻦ ﺧﻼل ﻣﺴﺘﻮى أﻋﻠﻰ ﻣﻦ اﻟﺘﺠﺮﻳﺪ ﻟﺒﻴﺌﺔ اﻟﺘﺼﻤﻴﻢ‪.‬‬
‫‪Design Algorithm‬‬
‫‪Traditional Languages‬‬

‫‪Simulate Algorithm‬‬
‫‪Graphical‬‬
‫‪Programming‬‬
‫‪Make Algorithm Compatible‬‬
‫‪1.‬‬ ‫‪Simulate Program‬‬
‫‪2.‬‬ ‫‪Test System‬‬
‫‪Optimize Algorithm‬‬ ‫‪3.‬‬ ‫‪Target Hardware‬‬

‫‪Download and Deploy‬‬

‫اﻟﺸﻜﻞ‪ 56-3‬ﻣﻘﺎرﻧﺔ اﳋﻄﻮات اﻟﱪﳎﻴﺔ ﺑﲔ ﻟﻐﺎت اﻟﱪﳎﺔ اﻟﻨﺼﻴﺔ واﻟﻠﻐﺎت اﻟﺮﺳﻮﻣﻴﺔ ‪ -‬ﻣﺴﺘﻮى ﲡﺮﻳﺪ أﻋﻠﻰ ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﻟﱪﳎﺔ اﻟﺮﺳﻮﻣﻴﺔ‬

‫اﻟﺸﻜﻞ‪ 57-3‬ﻳﺒﲔ ﻣﻘﺎرﻧﺔً ﻟﻠﺨﻄﻮات اﻟﱪﳎﻴﺔ ﺑﲔ ﻟﻐﺎت اﻟﱪﳎﺔ اﻟﺮﺳﻮﻣﻴﺔ واﻟﻠﻐﺎت اﻟﻨﺼﻴﺔ ﻟﱪﳎﺔ ﺷﺮﳛﺔ ‪.DSP‬‬

‫اﻟﺸﻜﻞ‪ 57-3‬ﻳﺒﲔ ﻣﻘﺎرﻧﺔً ﺑﲔ اﻟﺒﻴﺌﺔ ‪ LabVIEW-DSP‬واﻟﻠﻐﺎت اﻟﺘﻘﻠﻴﺪﻳﺔ اﻟﻨﺼﻴﺔ ﻟﻠﺨﻄﻮات اﳌﻄﻠﻮﺑﺔ ﻟﱪﳎﺔ ﺗﻄﺒﻴﻖ ﻋﻤﻠﻲ ﻟﺸﺮاﺋﺢ‬
‫ﻣﻌﺎﳉﺎت اﻹﺷﺎرة اﻟﺮﻗﻤﻴﺔ‪ ،‬ﺑﺎﺳﺘﺨﺪام اﻟﺒﻴﺌﺔ ‪ LabVIEW‬ﳝﻜﻦ ﺗﺼﻤﻴﻢ اﻟﺘﻄﺒﻴﻖ ﺑﺪون اﳊﺎﺟﺔ إﱃ ﻛﻮن اﳌﺼﻤﻢ ﻣﺘﺨﺼﺺ ﰲ ﺧﻮارزﻣﻴﺎت‬
‫ﻣﻌﺎﳉﺔ وﲢﻠﻴﻞ اﻹﺷﺎرة اﻟﺮﻗﻤﻴﺔ؛ وذﻟﻚ ﻷن ﻣﻌﻈﻢ ﻫﺬﻩ اﳋﻮارزﻣﻴﺎت ﺳﺘﻜﻮن ﻣﺒﻨﻴﺔ ﺑﺎﻟﻜﺎﻣﻞ ﻋﻠﻰ ﺷﻜﻞ ﺻﻨﺎدﻳﻖ وﻇﻴﻔﻴﺔ ﰲ ﺑﻴﺌﺔ‬
‫‪175‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Hardware Programming Languages‬‬ ‫ﻟﻐﺎت ﺑﺮﳎﺔ أﻧﻈﻤﺔ اﻟﻜﻴﺎن اﻟﺼﻠﺐ |‬

‫‪ ،LabVIEW‬وﻛﻞ ﻣﺎ ﺳﻴﺤﺘﺎﺟﻪ اﳌﺼﻤﻢ ﻫﻮ ﺿﺒﻂ اﻟﺒﺎراﻣﱰات اﻟﻮﻇﻴﻔﻴﺔ ﳍﺬﻩ اﻟﻌﻨﺎﺻﺮ‪ ،‬ﻛﻤﺎ ﻟﻦ ﳛﺘﺎج اﳌﺼﻤﻢ اﳋﻮض ﰲ ﺗﻌﻘﻴﺪات ﺗﻮﻟﻴﺪ‬
‫اﳌﻠﻒ اﻟﱪﳎﻲ ﻟﻠﻜﻴﺎن اﻟﺼﻠﺐ وﻣﺴﺎﺋﻞ ﺗﺒﻊ اﻷﺧﻄﺎء‪.‬‬

‫اﻟﺸﻜﻞ‪ 58-3‬ﻳﺒﲔ ﺗﻄﺒﻴﻘﺎً ﻻﺳﺘﺤﺼﺎل اﻟﺒﻴﺎﻧﺎت )‪ (DAQ‬ﻳﻘﻮم ﻋﻠﻰ ﻗﺮاءة اﻟﺒﻴﺎﻧﺎت ﻣﻦ ﺟﻬﺎز اﻟﻘﻴﺎس اﳌﻮﺻﻮل ﻣﻊ اﳊﺎﺳﺐ ﻋﱪ أﺣﺪ‬
‫ﻣﻨﺎﻓﺬ اﻻﺗﺼﺎل اﻟﺘﺴﻠﺴﻠﻲ وﻳﻌﺮض اﻟﻨﺘﺎﺋﺞ ﻋﻠﻰ راﺳﻢ إﺷﺎرة ﻋﻠﻰ ﺷﺎﺷﺔ اﳊﺎﺳﺐ‪ .‬إن ﺑﻨﺎء ﻣﺜﻞ ﻫﺬا اﻟﺘﻄﺒﻴﻖ ﺑﺎﺳﺘﺨﺪام ﺑﺮﻧﺎﻣﺞ‬
‫‪ LabVIEW‬ﺳﻴﺴﺘﻐﺮق أﻗﻞ ﻣﻦ ﻋﺸﺮ دﻗﺎﺋﻖ وﺳﻴﻜﻮن ﻣﺆﻟﻔﺎً ﻣﻦ ﻋﻨﺼﺮ اﻟﺘﺨﺎﻃﺐ ﻣﻊ اﳉﻬﺎز وﻋﻨﺼﺮ رﺳﻢ اﻹﺷﺎرة وﺣﻠﻘﺔ ﺗﻨﻔﻴﺬ ﺗﻜﺮارﻳﺔ‬
‫)‪ .(58-3a‬ﰲ ﺣﲔ أﻧﻪ وﺑﺎﺳﺘﺨﺪام اﻟﻠﻐﺎت اﻟﻨﺼﻴﺔ ﻓﺈن اﻷﻣﺮ ﺳﻴﺘﻄﻠﺐ ﻛﺘﺎﺑﺔ ﺑﺮﻧﺎﻣﺞ ﻣﺆﻟﻒ ﻣﻦ ‪ 50‬ﺳﻄﺮاً ﻣﻦ اﻟﺘﻌﻠﻴﻤﺎت اﻟﱪﳎﻴﺔ ﻻ‬
‫ﻳﺘﻀﻤﻨﻬﺎ ﺑﺮﻧﺎﻣﺞ رﺳﻢ اﻹﺷﺎرات ﻋﻠﻰ اﻟﺸﺎﺷﺔ )‪.(58-3b‬‬

‫)‪(b‬‬ ‫)‪(a‬‬

‫اﻟﺸﻜﻞ‪ 58-3‬ﻣﻘﺎرﻧﺔ ﺑﲔ اﻟﻠﻐﺎت اﻟﻨﺼﻴﺔ واﻟﺮﺳﻮﻣﻴﺔ ﻟﱪﳎﺔ ﺣﻠﻘﺔ اﺳﺘﺤﺼﺎل ﺑﻴﺎﻧﺎت ﻣﻦ ﺟﻬﺎز ﻗﻴﺎس وﻋﺮﺿﻬﺎ ﻋﻠﻰ راﺳﻢ إﺷﺎرة‬

‫ﻣﻦ أﺟﻞ ﺗﻄﻮﻳﺮ اﻟﺘﻄﺒﻴﻖ اﳌﺒﲔ ﻋﻠﻰ اﻟﺸﻜﻞ‪ 58-3‬ﻻﺳﺘﺤﺼﺎل اﻟﺒﻴﺎﻧﺎت ﻣﻦ ﺣﻠﻘﺘﲔ ﻋﻠﻰ اﻟﺘﻮازي – ﻛﻤﺎ ﻫﻮ ﻣﺒﲔ ﻋﻠﻰ اﻟﺸﻜﻞ‪-59-3‬‬
‫ﻓﺈﻧﻪ ﻳﻜﻔﻲ ﺗﻜﺮار اﳊﻠﻘﺔ اﻟﺮﺳﻮﻣﻴﺔ اﻷوﱃ ﰲ ﺑﻴﺌﺔ ‪ LabVIEW‬وﺳﻴﻘﻮم اﻟﱪﻧﺎﻣﺞ ﺑﺘﻨﻈﻴﻢ اﻟﺘﻨﻔﻴﺬ اﻟﺘﻔﺮﻋﻲ وﻓﻘﺎً ﻟﻌﺪد ﻧﻮى اﳌﻌﺎﰿ‪ .‬أﻣﺎ‬
‫ﺑﺎﺳﺘﺨﺪام اﻟﻠﻐﺔ اﻟﻨﺼﻴﺔ ﻓﺈن اﻷﻣﺮ ﺳﻴﺘﻄﻠﺐ إﻋﺎدة ﺑﻨﺎء وﺗﻨﻈﻴﻢ اﻟﱪﻧﺎﻣﺞ وﺳﻴﺘﻀﺎﻋﻒ ﺣﺠﻤﻪ ﲬﺲ ﻣﺮات‪.‬‬

‫اﻟﺸﻜﻞ‪ 59-3‬ﻣﻘﺎرﻧﺔ ﺑﲔ اﻟﻠﻐﺎت اﻟﻨﺼﻴﺔ واﻟﺮﺳﻮﻣﻴﺔ ﻟﱪﳎﺔ ﺣﻠﻘﱵ اﺳﺘﺤﺼﺎل ﺑﻴﺎﻧﺎت ﻣﻦ ﺟﻬﺎزي ﻗﻴﺎس ﻋﻠﻰ اﻟﺘﻮا ِز وﻋﺮﺿﻬﺎ‬

‫ﺑﻔﺮض أﻧﻨﺎ ﻧﺮﻳﺪ ﺗﻄﻮﻳﺮ اﻟﺘﻄﺒﻴﻖ اﳌﺒﲔ ﰲ اﻟﺸﻜﻞ‪ 59-3‬ﻻﺳﺘﺤﺼﺎل اﻟﺒﻴﺎﻧﺎت ﻋﻨﺪ ﻣﻌﺪﻻت ﳐﺘﻠﻔﺔ‪ ،‬ﻓﺈﻧﻨﺎ ﺳﻮف ﳓﺘﺎج إﱃ ﺣﻠﻘﺔ ﺗﻜﺮارﻳﺔ‬
‫زﻣﻨﻴﺔ ﻟﻜﻞ ﺟﻬﺎز ﺘﻢ ﻣﻌﺎﻳﺮﻬﺗﺎ )زﻣﻦ اﻟﺘﻜﺮار( وﻓﻘﺎً ﳌﻌﺪل اﻟﻘﺮاءة اﳌﻄﻠﻮب – اﻟﺸﻜﻞ‪ .60-3‬إن ﻫﺬا اﻟﺘﻌﺪﻳﻞ ﳝﻜﻦ أن ﻳﺘﻢ ﺑﻠﻐﺎت اﻟﱪﳎﺔ‬
‫اﻟﺮﺳﻮﻣﻴﺔ ﺑﺸﻜﻞ ﺑﺴﻴﻂ ﺟﺪاً وذﻟﻚ ﺑﺘﻐﻴﲑ اﳊﻠﻘﺔ ”‪ “Do-while‬إﱃ ﺣﻠﻘﺔ زﻣﻨﻴﺔ ”‪ ،“Times-loop‬ﰲ ﺣﲔ أن اﻷﻣﺮ ﺳﻴﺼﺒﻊ ﻣﻌﻘﺪاً‬
‫ﺟﺪاً ﺑﺎﻟﻨﺴﺒﺔ ﻟﻠﻐﺎت اﻹﺟﺮاﺋﻴﺔ اﻟﻨﺼﻴﺔ‪.‬‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪176‬‬
‫‪23‬‬ ‫اﻟﻔﺼﻞ اﻟﺜﺎﻟﺚ | ‪Chapter 3‬‬

‫اﻟﺸﻜﻞ‪ 60-3‬ﻣﻘﺎرﻧﺔ ﺑﲔ اﻟﻠﻐﺎت اﻟﻨﺼﻴﺔ واﻟﺮﺳﻮﻣﻴﺔ ﻟﱪﳎﺔ ﺣﻠﻘﱵ اﺳﺘﺤﺼﺎل ﺑﻴﺎﻧﺎت ﻋﻠﻰ اﻟﺘﻮا ِز وﲟﻌﺪﻻت اﺳﺘﺤﺼﺎل ﳐﺘﻠﻔﺔ‬

‫ﺑﺎﻻﻧﺘﻘﺎل إﱃ ﺑﺮﳎﺔ ﺷﺮاﺋﺢ اﻟـ‪ ،FPGA‬وﺑﻔﺮض أﻧﻪ ﻳﺮاد ﻗﺮاءة ﺑﻴﺎﻧﺎت ﻣﻦ ﻗﻄﺐ رﻗﻤﻲ )‪ (DIO: Data In/out‬ﻟﺸﺮﳛﺔ اﻟـ‪ ،FPGA‬ﻓﺈن‬
‫اﻟﺸﻜﻞ‪ 61-3b‬ﳝﺜﻞ اﻟﺘﻄﺒﻴﻖ اﳌﻄﻠﻮب‪ .‬أﻣﺎ ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﻟﱪﳎﺔ اﻟﻨﺼﻴﺔ ﻋﺎﻟﻴﺔ اﳌﺴﺘﻮى ﻓﺈن اﳌﺴﺄﻟﺔ ﺳﺘﺤﺘﺎج إﱃ ﻛﺘﺎﺑﺔ ﺑﺮﻧﺎﻣﺞ ﻣﺆﻟﻒ ﻣﻦ‬
‫‪ 60‬ﺳﻄﺮاً‪ ،‬أﺿﻒ إﱃ ذﻟﻚ ﺗﻌﻘﻴﺪات ﺗﻮﻟﻴﺪ اﳌﻠﻒ اﻟﱪﳎﻲ اﻟﻼزم ﺑﺮﳎﺔ ﻋﻠﻰ اﻟﺸﺮﳛﺔ‪.‬‬

‫)‪(b‬‬ ‫)‪(a‬‬

‫‪FPGA‬‬ ‫اﻟﺸﻜﻞ‪ 61-3‬ﻣﻘﺎرﻧﺔ ﺑﲔ اﻟﻠﻐﺎت اﻟﻨﺼﻴﺔ واﻟﺮﺳﻮﻣﻴﺔ ﻟﻘﺮاءة ﺑﻴﺎﻧﺎت رﻗﻤﻴﺔ ﻣﻦ ﻗﻄﺐ ﺷﺮﳛﺔ‬

‫ﻣﻦ أﺟﻞ ﺗﻄﻮﻳﺮ اﻟﺘﻄﺒﻴﻖ اﳌﺒﲔ ﰲ اﻟﺸﻜﻞ‪ 61-3‬ﻴﺘﻢ اﻟﻘﺮاءة ﻣﻦ ﻗﻄﺐ ﺗﺸﺎﻬﺑﻲ‪ ،‬ﻓﺈن اﻟﺘﻌﺪﻳﻞ ﺳﻴﻜﻮن ﺑﺴﻴﻄﺎً ﺟﺪاً ﻣﻦ ﺧﻼل ﺗﻌﺪﻳﻞ ﻋﻨﺼﺮ‬
‫ﻟﺪﺧﻞ اﻟﺮﺳﻮﻣﻲ إﱃ ﻗﻄﺐ ﺗﺸﺎﻬﺑﻲ – اﻟﺸﻜﻞ‪62-3‬؛ ﰲ ﺣﲔ أﻧﻪ ﰲ اﻟﻠﻐﺎت اﻟﻨﺼﻴﺔ ﺳﻴﺘﻄﻠﺐ اﻷﻣﺮ ﺗﻌﻘﻴﺪاً ﻛﺒﲑاً ﺣﻮل ﻣﺴﺎﺋﻞ اﻟﺘﻌﺎﻣﻞ ﻣﻊ‬
‫اﻟﻔﻮاﺻﻞ اﻟﻌﺸﺮﻳﺔ )‪ (Floating point‬وﺳﻴﻤﺘﺪ اﻟﱪﻧﺎﻣﺞ اﻟﻨﺼﻲ إﱃ ﻣﺌﺎت اﻷﺳﻄﺮ ﻣﻦ اﻟﺘﻌﻠﻴﻤﺎت‪ ،‬ﻛﻤﺎ أن ﺗﺘﺒﻊ اﻷﺧﻄﺎء ﰲ اﻟﱪﻧﺎﻣﺞ‬
‫ﺳﻴﺘﻄﻠﺐ وﻗﺘﺎ أﻛﱪ‪.‬‬

‫‪FPGA‬‬ ‫اﻟﺸﻜﻞ‪ 62-3‬ﻘﺎرﻧﺔ ﺑﲔ اﻟﻠﻐﺎت اﻟﻨﺼﻴﺔ واﻟﺮﺳﻮﻣﻴﺔ ﻟﻘﺮاءة ﺑﻴﺎﻧﺎت ﺗﺸﺎﻬﺑﻴﺔ ﻣﻦ ﻗﻄﺐ ﺷﺮﳛﺔ‬

‫‪177‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Hardware Programming Languages‬‬ ‫ﻟﻐﺎت ﺑﺮﳎﺔ أﻧﻈﻤﺔ اﻟﻜﻴﺎن اﻟﺼﻠﺐ |‬

‫ﻟﺘﻄﻮﻳﺮ اﻟﺘﻄﺒﻴﻖ اﳌﺒﲔ ﰲ اﻟﺸﻜﻞ‪ 62-3‬ﲝﻴﺚ ﻳﺘﻢ ﺰﻳﻦ اﻟﺒﻴﺎﻧﺎت اﳌﺴﺘﺤﺼﻠﺔ ﻣﻦ اﻟﻘﻄﺐ اﻟﺘﺸﺎﻬﺑﻲ ﰲ ﺧﻼﻳﺎ ذاﻛﺮﻳﺔ ‪ SRAM‬ﻋﻠﻰ ﺷﺮﳛﺔ‬
‫اﻟـ‪ ،FPGA‬ﻓﺈن اﻟﺘﻌﺪﻳﻞ ﰲ ﺑﻴﺌﺔ ‪ LabVIEW‬ﺳﻴﻜﻮن ﺑﺈﺿﺎﻓﺔ ﻋﻨﺼﺮ ‪ – DMA-FIFO‬اﻟﺸﻜﻞ‪ ،63-3‬ﰲ ﺣﲔ أﻧﻪ ﺑﺎﺳﺘﺨﺪام اﻟﻠﻐﺎت‬
‫اﻟﻨﺼﻴﺔ ﺳﻴﻤﺘﺪ اﻟﱪﻧﺎﻣﺞ إﱃ أﻛﺜﺮ ﻣﻦ ‪ 66‬ﺻﻔﺤﺔ ﳛﻮي ﻋﻠﻰ ‪ 4000‬ﺳﻄﺮ ﻣﻦ اﻟﺘﻌﻠﻴﻤﺎت!‬

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‫اﻟﺸﻜﻞ‪ 63-3‬ﻘﺎرﻧﺔ ﺑﲔ اﻟﻠﻐﺎت اﻟﻨﺼﻴﺔ واﻟﺮﺳﻮﻣﻴﺔ ﻟﻘﺮاءة ﺑﻴﺎﻧﺎت ﺗﺸﺎﻬﺑﻴﺔ ﻣﻦ ﻗﻄﺐ ﺷﺮﳛﺔ ‪ FPGA‬وﲣﺰﻳﻨﻬﺎ‬

‫‪ 6-3-4-3-3‬اﺳﺘﺨﺪام اﻟﺒﻴﺌﺔ ‪ LabVIEW‬ﰲ اﳌﻨﺎﻫﺞ اﻟﺘﻌﻠﻴﻤﻴﺔ )‪:(Using LabVIEW in Curriculums‬‬

‫ﰲ اﻟﻘﻄﺎع اﻷﻛﺎدﳝﻲ اﻟﺬي ﺗﻀﻤﻦ اﳌﺨﺘﱪات‬ ‫ﺧﻼل اﻟﺴﻨﻮات اﻷﺧﲑة ازداد اﺳﺘﺨﺪام اﻟﺒﻴﺌﺔ اﻟﱪﳎﻴﺔ ‪ LabVIEW‬ﺑﺸﻜﻞ ﻛﺒﲑ ﺟﺪاً‬
‫]‪[445‬‬

‫واﶈﺎﻛﺎة )‪ ،[447](Simulation‬وﰲ اﻟﻘﻄﺎع اﻟﺼﻨﺎﻋﻲ‪ ،‬ﺣﻴﺚ ﺗﺸﲑ اﻟﺴﻮق اﻟﺘﺠﺎرﻳﺔ ﰲ اﺳﺘﺠﺎﺑﺘﻬﺎ إﱃ أن‬ ‫اﻟﻌﻤﻠﻴﺔ )‪(Hands-on‬‬
‫]‪[446‬‬

‫اﻟﺒﻴﺌﺔ ‪ LabVIEW‬ﺗﻌﺘﱪ ﻣﻦ اﻻﺧﺘﻴﺎرات اﻟﺮﺋﻴﺴﻴﺔ ﰲ ﺗﺼﻤﻴﻢ ﺗﻄﺒﻴﻘﺎت اﻟﺘﺤﻜﻢ واﻟﺘﺤﻠﻴﻞ ﻟﻠﻨﻈﻢ ﰲ ﻛﻼ اﶈﻮرﻳﻦ اﻟﺘﻜﻨﻮﻟﻮﺟﻲ اﻟﺼﻨﺎﻋﻲ‬
‫واﻷﻛﺎدﳝﻲ اﻟﺘﻌﻠﻴﻤﻲ]‪.[448‬‬

‫اﻟﺒﻴﺌﺔ ‪ LabVIEW‬ﰎ اﻹﻗﺮار ﻋﻠﻰ أ�ﺎ ﺑﻴﺌﺔ ﺑﺮﳎﻴﺔ ﻣﻨﺎﺳﺒﺔ ﺑﺸﻜﻞ أﻛﱪ ﻣﻦ اﻟﻠﻐﺎت اﻟﻨﺼﻴﺔ )‪ (C, Java‬ﺑﺎﻟﻨﺴﺒﺔ ﻟﻠﻄﻼب ﰲ اﻟﻔﺮوع‬
‫ﻣﺪى ﻃﻮﻳﻞ أﻛﺪت اﻷﲝﺎث ﻋﻠﻰ أن اﻟﺒﻴﺌﺔ ‪ LabVIEW‬ﳝﻜﻦ أن ﺗﺴﺘﺨﺪم ﻟﺘﻌﺎﰿ اﳊﺎﺟﺔ اﳌﻠﺤﺔ‬ ‫‪ .‬ﻛﻤﺎ أﻧﻪ وﻋﻠﻰ ً‬
‫]‪[448-457‬‬
‫اﳍﻨﺪﺳﻴﺔ‬
‫ﳌﻘﺮرات ﺗﻄﺒﻴﻘﻴﺔ ﻣﺘﻌﺪدة ﰲ اﻟﻌﻠﻮم اﻟﺘﻜﻨﻠﻮﺟﻴﺔ]‪.[458-462‬‬

‫اﻟﺒﻴﺌﺔ اﻟﱪﳎﻴﺔ ‪ LabVIEW‬ﰎ اﺳﺘﺨﺪاﻣﻬﺎ ﰲ اﻟﻌﺪﻳﺪ ﻣﻦ اﳌﻘﺮرات اﳉﺎﻣﻌﻴﺔ واﳌﺨﱪﻳﺔ ﻟﺘﺰوﻳﺪ اﻟﻄﻼب ﲞﱪة أﻗﺮب ﻣﺎ ﺗﻜﻮن إﱃ اﻟﺘﻄﺒﻴﻖ ﰲ‬
‫اﻟﻮاﻗﻊ اﻟﻌﻤﻠﻲ]‪ ،[463‬وذﻟﻚ ﻷ�ﺎ ﺗﻌﺘﱪ أداة ﻣﻨﺎﺳﺒﺔ ﺟﺪاً ﻟﺒﻨﺎء ﺗﻄﺒﻴﻘﺎت اﳌﺨﺘﱪات]‪ ،[449,450,464‬ﻓﻘﺪ اﺳﺘﺨﺪﻣﺖ ﰲ ﺗﺪرﻳﺲ اﳌﻌﺎدﻻت‬
‫اﻟﺘﻔﺎﺿﻠﻴﺔ]‪ ،[465‬اﻹﻟﻜﱰوﻧﻴﺎت]‪ ،[466‬اﻟﺘﺤﻜﻢ]‪ ،[467‬اﳌﺨﺘﱪات ﻋﻠﻰ ﺷﺒﻜﺔ اﻻﻧﱰﻧﺖ]‪ ،[468‬اﳌﻴﻜﺎﺗﺮوﻧﻴﻜﺲ واﻟﺮوﺑﻮت]‪ ،[450,469-471‬وﰲ ﻣﻘﺮر‬
‫ﻣﺘﻌﺪد اﻻﺧﺘﺼﺎﺻﺎت ﺣﻮل أﻧﻈﻤﺔ اﺳﺘﺤﺼﺎل اﻟﺒﻴﺎﻧﺎت]‪ ،[472‬ﻛﻤﺎ ﰎ اﺳﺘﺨﺪاﻣﻬﺎ ﰲ اﳌﻨﺎﻫﺞ اﳍﻨﺪﺳﻴﺔ ﻟﻠﻄﻼب ﰲ اﻟﺴﻨﻮات اﻷوﱃ]‪ [473‬ﰲ‬
‫ﺗﻌﻠﻴﻢ ﻣﺒﺎدئ ﻫﻨﺪﺳﺔ اﻟﺘﺤﻜﻢ واﻟﺘﻐﺬﻳﺔ اﻟﻌﻜﺴﻴﺔ]‪ ،[474‬وﻛﺬﻟﻚ اﺳﺘﺨﺪﻣﺖ ﰲ ﺗﻄﻮﻳﺮ اﳌﺘﺤﻜﻤﺎت ‪ PID‬ﰲ ﳐﺘﱪات ﻫﻨﺪﺳﺔ اﻟﺘﺤﻜﻢ‬
‫اﻵﱄ]‪ [464‬وأﺛﺮ ﻫﺬا ﰎ ﻣﻨﺎﻗﺸﺘﻪ ﰲ اﻟﻮرﻗﺔ اﻟﺒﺤﺜﻴﺔ]‪.[475‬‬

‫اﻟﻮرﻗﺔ اﻟﺒﺤﺜﻴﺔ]‪ [451‬ﺗﺴﺮد اﻟﻌﺪﻳﺪ ﻣﻦ اﻷﻣﺜﻠﺔ ﺣﻮل اﺳﺘﺨﺪام اﻟﱪﻧﺎﻣﺞ ﻛﺄداة ﲢﻠﻴﻞ وﳏﺎﻛﺎة ﻓﻌﺎﻟﺔ ﰲ ﺗﺪرﻳﺲ ﻣﻘﺮر اﻟﻔﻴﺰﻳﺎء ﰲ اﻟﺼﻔﻮف اﻟﻨﻈﺮﻳﺔ‬
‫واﳌﺨﺘﱪات اﻟﻌﻤﻠﻴﺔ‪ .‬اﻟﻌﺪﻳﺪ ﻣﻦ اﻷﻣﺜﻠﺔ اﻷﺧﺮى اﺳﺘﺨﺪﻣﺖ اﻟﱪﻧﺎﻣﺞ ﰲ ﳐﺘﱪات اﻟﺘﻌﻠﻴﻢ اﳍﻨﺪﺳﻲ ﳝﻜﻦ اﻻﻃﻼع ﻋﻠﻴﻬﺎ ﰲ]‪.[448,449,452-456‬‬
‫اﻟﻮرﻗﺔ اﻟﺒﺤﺜﻴﺔ]‪ [476‬ﺗﺼﺮح ﻋﻠﻰ أن اﻟﱪﻧﺎﻣﺞ ﻳﻌﺘﱪ اﳋﻴﺎر اﻟﻔﺮﻳﺪ ﻋﻠﻰ ﳓﻮ ﺧﺎص ﻹﻧﺸﺎء اﳌﺨﺘﱪات ‪.Remote-Labs‬‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪178‬‬
‫‪23‬‬ ‫اﻟﻔﺼﻞ اﻟﺜﺎﻟﺚ | ‪Chapter 3‬‬

‫اﻟﺒﻴﺌﺔ ‪ LabVIEW‬اﺳﺘﺨﺪﻣﺖ أﻳﻀﺎً ﰲ ﳎﺎل واﺳﻊ ﻣﻦ اﻟﺘﻄﺒﻴﻘﺎت ﰲ اﳍﻨﺪﺳﺔ اﻟﻜﻬﺮﺑﺎﺋﻴﺔ واﳌﻴﻜﺎﻧﻴﻜﻴﺔ]‪ ،[477‬واﺳﺘﺤﺼﺎل اﻟﺒﻴﺎﻧﺎت ﰲ‬
‫أﻧﻈﻤﺔ ﻣﺮاﻗﺒﺔ ﻣﺼﺎدر ﺗﻮﻟﻴﺪ اﻟﻄﺎﻗﺔ اﻟﻨﻈﻴﻔﺔ]‪ ،[478‬وﰲ اﻟﺘﻄﺒﻴﻘﺎت اﻟﺼﻨﺎﻋﻴﺔ اﻟﱵ ﺗﺘﻄﻠﺐ اﻟﺘﺤﻜﻢ وﻓﻖ اﳌﻨﻄﻖ اﻟﻐﺎﻣﺾ]‪ ،[479‬وﰲ اﻟﺘﺤﻜﻢ‬
‫وﻣﺮاﻗﺒﺔ ﻋﻤﻠﻴﺎت اﻟﺘﻘﻄﲑ]‪ ،[480‬ﻛﻤﺎ ﰎ ﺗﻄﺒﻴﻘﻬﺎ ﰲ ﳐﺘﱪات اﻟﺘﺼﻤﻴﻢ ﻟﺘﺤﺴﲔ اﳌﺨﺘﱪات]‪ ،[481‬وﰲ ﳏﻄﺎت ﺗﻮﻟﻴﺪ اﻟﻄﺎﻗﺔ اﳍﺠﻴﻨﻴﺔ اﻟﻨﻈﻴﻔﺔ اﻟﱵ‬
‫ﺗﻌﺘﻤﺪ ﻋﻠﻰ ﻃﺎﻗﺔ اﻟﺮﻳﺎح واﳋﻼﻳﺎ اﻟﺸﻤﺴﻴﺔ]‪ ،[482‬ﰲ ﳏﺎﻛﺎة وﲢﻠﻴﻞ اﻟﻨﺸﺎﻃﺎت اﻹﺷﻌﺎﻋﻴﺔ]‪ ،[483‬ﰲ ﲢﻠﻴﻞ أﻣﻮاج اﻟﻀﺠﻴﺞ واﻻﻫﺘﺰاز اﻟﻨﺎﺗﺞ ﻋﻦ‬
‫اﻟﺒﻴﺌﺎت اﻟﺼﻨﺎﻋﻴﺔ]‪ ،[484‬ﰲ أﻧﻈﻤﺔ اﻟﺘﺤﻜﻢ ﺑﺎﳌﻮﺿﻊ]‪ [485‬ﰲ ﻫﻨﺪﺳﺔ ﻧﻈﻢ اﻟﺘﺤﻜﻢ‪ ،‬ﰲ ﻣﻌﺎﳉﺔ اﻹﺷﺎرة اﻟﺮﻗﻤﻴﺔ]‪ [486‬وﰲ اﻟﻌﺪﻳﺪ ﻣﻦ اﻟﺘﻄﺒﻴﻘﺎت‬
‫اﻟﺘﻜﻨﻮﻟﻮﺟﻴﺔ اﻟﱵ ﻻ ﺣﺼﺮ ﳍﺎ‪.‬‬

‫ﻧﻈﺮاً ﻟﻠﻤﻴﺰات اﳌﺘﻜﺎﻣﻠﺔ ﻟﻠﱪﻧﺎﻣﺞ ‪ ،LabVIEW‬ﻓﻘﺪ أﺻﺒﺢ أﻛﺎدﳝﻴﺎً وﺻﻨﺎﻋﻴﺎً ﻣﻔﻀﻼً ﻋﻠﻰ اﻟﱪﻧﺎﻣﺞ ‪ MATLAB‬ﰲ اﻟﻌﺪﻳﺪ ﻣﻦ اﻷﻧﻈﻤﺔ‪،‬‬
‫ﻋﻠﻰ ﺳﺒﻴﻞ اﻟﺬﻛﺮ ﻻ اﳊﺼﺮ‪ :‬ﲢﻠﻴﻞ وﳕﺬﺟﺔ اﻵﻻت]‪.[487‬‬

‫ﺗﺒﲔ ﻣﻘﺎرﻧﺔ ﺑﲔ ﻟﻐﺎت اﻟﱪﳎﺔ اﻟﻨﺼﻴﺔ ”‪ “Matlab‬وﻟﻐﺎت اﻟﱪﳎﺔ اﻟﺮﺳﻮﻣﻴﺔ ”‪ “LabVIEW‬ﰲ ﻣﻘﺮر ﻣﻌﺎﳉﺔ اﻹﺷﺎرة‬ ‫]‪[488‬‬
‫اﻟﻮرﻗﺔ اﻟﺒﺤﺜﻴﺔ‬
‫اﻟﺮﻗﻤﻴﺔ؛ اﻟﻨﺘﺎﺋﺞ ﺗﻀﻤﻨﺖ ﺗﺼﻮﻳﺘﺎً ﻟـ‪ 64‬ﻃﺎﻟﺒﺎً‪ ،‬ﺛﻼث ﻣﻨﻬﻢ ﻓﻘﻂ ﻟﻪ ﻣﻌﺮﻓﺔ ﻣﺴﺒﻘﺔ ﺑﺎﻟﱪﻧﺎﻣﺞ ‪ LabVIEW‬واﻟﺒﺎﻗﻲ ﺗﻌﻠﻢ اﻟﱪﻧﺎﻣﺞ ‪Matlab‬‬

‫ﻣﺴﺒﻘﺎً‪ .‬اﺳﺘﺠﺎﺑﺔ اﻟﻄﻼب ﺑﻌﺪ ا�ﺎء اﳌﻘﺮر أﻇﻬﺮت أن ‪ 75%‬ﻣﻦ اﻟﻄﻼب ﻳﻮاﻓﻖ ﻋﻠﻰ أن اﻟﱪﻧﺎﻣﺞ ‪ LabVIEW‬ﻫﻮ اﳊﻞ اﻷﻣﺜﻞ‪.‬‬
‫اﳉﺪول‪ 2-3‬ﻳﺒﲔ ﺑﻌﺾ اﻻﺳﺘﻔﺴﺎرات اﻟﱵ ﻃﺮﺣﺖ واﻟﻨﺘﺎﺋﺞ ﻋﻠﻴﻬﺎ]‪.[475‬‬

‫‪Matlab‬‬ ‫‪Either‬‬ ‫‪LabVIEW‬‬ ‫اﻟﺴﺆال‬

‫‪60‬‬ ‫‪-‬‬ ‫‪3‬‬ ‫أي اﻟﻠﻐﺎت ﺗﻌﻠﻤﺘﻬﺎ أوﻻً؟‬
‫‪11‬‬ ‫‪12‬‬ ‫‪40‬‬ ‫أي اﻟﻠﻐﺎت ﻛﺎﻧﺖ أﺳﻬﻞ ﻟﻠﺘﻌﻠﻢ؟‬
‫‪9‬‬ ‫‪8‬‬ ‫‪47‬‬ ‫أي ﻟﻐﺔ ﺗﻌﺘﻘﺪ أ�ﺎ أﺳﺮع ﻹﳒﺎز ﳎﻤﻮﻋﺔ ﻣﻦ اﳌﻬﺎم اﻟﺒﺴﻴﻄﺔ؟‬
‫‪14‬‬ ‫‪6‬‬ ‫‪44‬‬ ‫أي ﻟﻐﺔ ﻫﻲ أﻓﻀﻞ ﳊﻞ ﻣﺸﺎﻛﻞ ﻣﻌﺎﳉﺔ اﻹﺷﺎرة؟‬
‫‪15‬‬ ‫‪7‬‬ ‫‪41‬‬ ‫أي ﻟﻐﺔ ﺗﻔﻀﻞ اﻟﺘﻌﺎﻣﻞ ﻣﻌﻬﺎ؟‬

‫اﳉﺪول‪ 2-3‬ﺑﻌﺾ ﻧﺘﺎﺋﺞ إﺟﺎﺑﺎت اﻟﻄﻼب ﺣﻮل اﻟﻠﻐﺔ اﻟﱪﳎﻴﺔ اﳌﻔﻀﻠﺔ ﳌﻌﺎﳉﺔ اﻹﺷﺎرة اﻟﺮﻗﻤﻴﺔ‬

‫اﻹﺣﺼﺎﺋﻴﺎت ﻟﻌﺎم ‪ 2006‬اﳌﺒﻴﻨﺔ ﻋﻠﻰ اﻟﺸﻜﻞ‪ 64-3‬ﺗﺸﲑ إﱃ أن ‪ 29.30%‬ﻣﻦ ﲡﻬﻴﺰات اﻟﺘﺤﻜﻢ واﺳﺘﺤﺼﺎل اﻟﺒﻴﺎﻧﺎت )‪ (DAQ‬ﺗﻌﺘﻤﺪ‬
‫اﻟﺒﻴﺌﺔ ‪ LabVIEW‬ﰲ اﻟﺘﺼﻤﻴﻢ‪.‬‬

‫‪LabVIEW‬‬ ‫‪29.30%‬‬

‫‪MS Visual Basic‬‬ ‫‪14.00%‬‬

‫‪MS Visual C++‬‬ ‫‪12.30%‬‬

‫‪MATLAB‬‬ ‫‪5.90%‬‬

‫‪LabWindows CVI‬‬ ‫‪4.7%‬‬

‫‪Agilent VEE‬‬ ‫‪4.30%‬‬

‫اﻟﺸﻜﻞ‪ 64-3‬ﻧﺴﺒﺔ اﺳﺘﺨﺪام اﻟﺒﻴﺌﺔ ‪ LabVIEW‬ﰲ ﲡﻬﻴﺰات اﻟﺘﺤﻜﻢ واﺳﺘﺤﺼﺎل اﻟﺒﻴﺎﻧﺎت ﻟﻌﺎم ‪2006‬‬

‫‪179‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Hardware Programming Languages‬‬ ‫ﻟﻐﺎت ﺑﺮﳎﺔ أﻧﻈﻤﺔ اﻟﻜﻴﺎن اﻟﺼﻠﺐ |‬

‫إن اﳌﻮﻗﻒ اﻹﳚﺎﰊ اﻟﻮاﺿﺢ ﰲ اﻷوراق اﻟﺒﺤﺜﻴﺔ ﺣﻮل اﺳﺘﺨﺪام اﻟﱪﻧﺎﻣﺞ ﰲ اﻟﺘﻌﻠﻴﻢ اﳍﻨﺪﺳﻲ واﳌﺨﱪي ﳝﻜﻦ إرﺟﺎءﻩ إﱃ اﻟﻌﻮاﻣﻞ اﻟﺘﺎﻟﻴﺔ‪:‬‬
‫‪ -‬اﻻﻧﻄﻼﻗﺔ اﻷوﱃ ﻟﻠﱪﻧﺎﻣﺞ ﻛﺎﻧﺖ ﻛﻤﻨﺼﺔ ﺑﺮﳎﻴﺔ ﻋﺎﻟﻴﺔ اﻷداء ﻟﺘﻄﻮﻳﺮ ﺗﻄﺒﻴﻘﺎت اﺳﺘﺤﺼﺎل اﻟﺒﻴﺎﻧﺎت‪.‬‬
‫اﻟﱪﻧﺎﻣﺞ ﺑﺸﻜﻞ ﺟﻮﻫﺮي ﻋﺒﺎرة ﻋﻦ ﺑﻴﺌﺔ ﺗﻄﻮﻳﺮ ﻣﺮﺋﻴﺔ ﻟﺘﺠﻬﻴﺰات اﻟﻜﻴﺎن اﻟﺼﻠﺐ )‪ (Virtual Instruments‬ﺗﺪﻋﻰ ﻓﻴﻬﺎ اﻟﱪاﻣﺞ‬ ‫‪-‬‬

‫ﺑـ‪ ،VIs‬ﺣﻴﺚ أن ﻣﻔﻬﻮم "‪ (VIs) "Virtual Instruments‬ﻳﺴﺎﻋﺪ وﻳﺒﺴﻂ ﺑﻨﺎء واﺟﻬﺎت ﻟﺘﺠﺎرب ﳐﱪﻳﺔ ﻓﻌﺎﻟﺔ وﻣﺘﻜﺎﻣﻠﺔ‪.‬‬
‫‪ -‬ﳝﻠﻚ اﻟﱪﻧﺎﻣﺞ ﻣﻜﺘﺒﺎت ﺷﺎﻣﻠﺔ وواﺳﻌﺔ ﻟﺘﻄﺒﻴﻘﺎت اﻟﻘﻴﺎﺳﺎت واﻟﱰﺷﻴﺢ وﻣﻌﺎﳉﺔ وﲢﻠﻴﻞ اﻟﺒﻴﺎﻧﺎت واﻹﺷﺎرات‪.‬‬
‫‪ -‬ﻳﺘﻴﺢ اﻟﱪﻧﺎﻣﺞ إﻣﻜﺎﻧﻴﺔ اﶈﺎﻛﺎة ﻟﻄﻴﻒ واﺳﻊ ﻣﻦ اﳌﺸﺎﻛﻞ اﳍﻨﺪﺳﻴﺔ ﳑﺎ ﻳﺴﺎﻋﺪ ﰲ ﲢﻠﻴﻠﻬﺎ وﺣﻠﻬﺎ‪.‬‬
‫‪ -‬ﳝﻠﻚ اﻟﱪﻧﺎﻣﺞ ﳎﻤﻮﻋﺔ واﺳﻌﺔ وﺷﺎﻣﻠﺔ ﻣﻦ أدوات اﻟﺘﻄﻮﻳﺮ )‪ (toolkits‬اﻟﱵ ﳝﻜﻦ إﺿﺎﻓﺘﻬﺎ ﻛﻤﻮدﻳﻼت ﺑﺮﳎﻴﺔ ﺟﺎﻫﺰة )‪.(add-on‬‬
‫‪ -‬ﳝﻠﻚ اﻟﱪﻧﺎﻣﺞ أدوات اﺗﺼﺎل ﻣﻊ اﻹﻧﱰﻧﺖ )‪ (Internet connectivity‬ﲤﻜﻦ ﻣﻦ ﺗﻄﻮﻳﺮ واﺟﻬﺎت اﻟﺘﻄﺒﻴﻘﺎت ﻋﻠﻰ ﻣﺴﺘﻌﺮض‬
‫اﻹﻧﱰﻧﺖ ﺑﺸﻜﻞ ﻣﺒﺎﺷﺮ )‪.(web-based‬‬
‫‪ -‬ﳝﻠﻚ اﻟﱪﻧﺎﻣﺞ ﳎﻤﻮﻋﺔ ﻛﺒﲑة ﻣﻦ اﻷدوات اﻟﱵ ﺗﺘﻴﺢ إﻣﻜﺎﻧﻴﺔ ﺗﻀﻤﲔ ﻣﻜﺘﺒﺎت ﺧﺎرﺟﻴﺔ ﻟﱪاﻣﺞ أﺧﺮى ﻣﺜﻞ‪Matlab/Simulink, :‬‬

‫‪.SolidWork 3D, C++, HDL‬‬

‫‪ -‬ﳝﻠﻚ اﻟﱪﻧﺎﻣﺞ ﳎﻤﻮﻋﺔ ﻣﻦ اﻷدوات اﻟﺘﻔﺎﻋﻠﻴﺔ ﻟﻠﺮﺑﻂ ﻣﻊ اﻟﱪاﻣﺞ اﳌﻜﺘﺒﻴﺔ )‪ (MS Office‬وﻗﻮاﻋﺪ اﻟﺒﻴﺎﻧﺎت )‪.(MySQL‬‬
‫‪ -‬اﻟﱪاﻣﺞ ﰲ اﻟﺒﻴﺌﺔ ‪ LabVIEW‬ﺗﺪﻋﻰ أﻳﻀﺎً ﺑ ـ"‪ "G-code‬واﻟﱵ ﻫﻲ أﻛﺜﺮ ﺟﺬﺑﺎً ﻟﻠﻤﻬﻨﺪﺳﲔ ﻣﻦ ﻟﻐﺎت اﻟﱪﳎﺔ اﻟﻨﺼﻴﺔ‪ ،‬ﺣﻴﺚ‬
‫ﳝﻜﻦ ﺑﻨﺎء أي ﺗﻄﺒﻴﻖ ﻣﻦ ﺧﻼل ﻋﻤﻠﻴﺔ ‪) drag-and-drop‬ﺳﺤﺐ وإﻓﻼت اﻟﻌﻨﺎﺻﺮ اﻟﱪﳎﻴﺔ( ﺑﺪﻻً ﻣﻦ ﻛﺘﺎﺑﺔ ﻣﺌﺎت ﺑﻞ آﻻف‬
‫اﻷﺳﻄﺮ ﻣﻦ اﻟﺘﻌﻠﻴﻤﺎت اﻟﻨﺼﻴﺔ‪.‬‬
‫‪ -‬ﳝﻠﻚ اﻟﱪﻧﺎﻣﺞ أدوات ﺗﻄﻮﻳﺮ ﺗﻄﺒﻴﻘﺎت ﺑﺮﳎﻴﺔ ﺣﺎﺳﻮﺑﻴﺔ ﺗﻨﻔﻴﺬﻳﺔ ﺗﻌﻤﻞ ﻋﻠﻰ اﳊﺎﺳﺐ ﺑﺸﻜﻞ ﻣﺴﺘﻘﻞ ﻛﺘﻠﻚ اﻟﱪاﻣﺞ اﻟﱵ ﻳﺘﻢ ﺗﻄﻮﻳﺮﻫﺎ‬
‫ﺑﻠﻐﺔ اﻟـ‪.C, VB‬‬
‫‪ -‬إن اﻟﺘﻔﺎﻋﻞ ﻣﻊ اﻟﺒﻴﺎﻧﺎت ﰲ اﻟﱪﻧﺎﻣﺞ ‪ LabVIEW‬ﻳﺘﻢ ﻣﻦ ﺧﻼل واﺟﻬﺔ ﻣﺮﺋﻴﺔ ﳝﻜﻦ أن ﺗﻀﻢ أدوات رﺳﻮﻣﻴﺔ ﻣﺘﻘﺪﻣﺔ ) ‪Logic‬‬

‫‪.(analyzer, Graph, Oscilloscope, Data Locator, 3D Visualization‬‬

‫‪ -‬ﳝﻠﻚ اﻟﱪﻧﺎﻣﺞ ﻛﻢ ﻫﺎﺋﻞ ﺟﺪاً ﻣﻦ اﻟﱪاﻣﺞ اﳉﺎﻫﺰة اﻟﱵ ﳝﻜﻦ اﺳﺘﺨﺪاﻣﻬﺎ ﻣﺒﺎﺷﺮة ﻣﻊ ﺑﻌﺾ اﻟﺘﻌﺪﻳﻼت‪.‬‬
‫‪ -‬ﻚ اﻟﱪﻧﺎﻣﺞ اﻟﻌﺪﻳﺪ ﻣﻦ اﺠﻤﻟﺘﻤﻌﺎت اﻟﺘﻌﺎوﻧﻴﺔ ﻋﻠﻰ اﻹﻧﱰﻧﺖ واﻟﱵ ﺗﻘﺪم اﻟﺪﻋﻢ اﻟﻜﺒﲑ ﳌﻄﻮري اﻟﱪاﻣﺞ ﺑﺎﺳﺘﺨﺪام اﻟﺒﻴﺌﺔ‬
‫‪.LabVIEW‬‬
‫‪ -‬ﻳﺴﺘﺨﺪم اﻟﱪﻧﺎﻣﺞ ﻣﻦ ﻗﺒﻞ أﻛﺜﺮ ﻣﻦ ‪ 5000‬ﺟﺎﻣﻌﺔ ﺣﻮل اﻟﻌﺎﱂ‪ ،‬وﻣﻦ ﻗﺒﻞ اﻟﻌﺪﻳﺪ ﻣﻦ اﳌﺆﺳﺴﺎت اﻟﺼﻨﺎﻋﻴﺔ اﻟﻌﻤﻼﻗﺔ ﻳﺒﻠﻎ ﻋﺪدﻫﺎ‬
‫‪ 30000‬ﺷﺮﻛﺔ‪.‬‬

‫‪ 7-3-4-3-3‬أدوات اﻟﺘﺼﻤﻴﻢ اﻟﱪﳎﻴﺔ اﻹﺿﺎﻓﻴﺔ )‪:[60,61](Add-On Modules and Toolkits‬‬

‫ﲤﻠﻚ اﻟﺒﻴﺌﺔ اﻟﱪﳎﻴﺔ ‪ LabVIEW‬اﻟﻌﺪﻳﺪ ﻣﻦ اﻷدوات اﻟﱪﳎﻴﺔ‪ ،‬واﻟﱵ ﻲ ﻋﺒﺎرة ﻋﻦ ﻣﻜﺘﺒﺎت ﲣﺼﺼﻴﺔ إﺿﺎﻓﻴﺔ ﻣﺼﻨﻔﺔ وﻓﻘﺎً ﺠﻤﻟﺎﻻت‬
‫اﻟﺘﻄﺒﻴﻘﺎت اﳌﺒﻴﻨﺔ ﻋﻠﻰ اﻟﺸﻜﻞ‪ .65-3‬اﳉﺪول‪ 3-3‬ﻳﻌﺮض ﺗﺼﻨﻴﻔﺎت اﻟﻮﺣﺪات اﻟﱪﳎﻴﺔ اﻹﺿﺎﻓﻴﺔ ﰲ اﻟﺒﻴﺌﺔ ‪ LabVIEW‬وﻓﻘﺎً‬
‫ﺘﻄﺒﻴﻘﺎﻬﺗﺎ]‪.[489,490‬‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪180‬‬
‫‪23‬‬ ‫اﻟﻔﺼﻞ اﻟﺜﺎﻟﺚ | ‪Chapter 3‬‬

‫اﻟﺸﻜﻞ‪ 65-3‬ﳎﺎﻻت اﻟﺘﻄﺒﻴﻘﺎت ﻟﻸدوات اﻟﱪﳎﻴﺔ ﻟﻠﺒﻴﺌﺔ ‪LabVIEW‬‬

‫أدوات ﺗﺼﻤﻴﻢ اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ )‪:(Embedded Design Modules/Toolkits‬‬ ‫‪1-7-3-4-3-3‬‬

‫ﺘﻜﻮن ﻣﻦ أﺣﺪ ﻋﺸﺮ وﺣﺪة ﺑﺮﳎﻴﺔ ﳐﺘﻠﻔﺔ ﺗﺴﺘﺨﺪم ﻟﺘﻄﻮﻳﺮ اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ ﲟﺨﺘﻠﻒ ﺗﻄﺒﻴﻘﺎﻬﺗﺎ وﺣﻠﻮﳍﺎ اﻟﺘﻜﻨﻮﻟﻮﺟﻴﺔ ) ‪MCUs, MPUs,‬‬

‫‪ ،(FPGAs, DSPs,‬وﻫﻲ ﺗﻀﻤﻦ ﻣﻜﺎﺗﺐ ﳕﻮذﺟﻴﺔ ﺟﺎﻫﺰة )‪ (off-the-shelf‬ﻟﺒﻨﺎء ﺗﻄﺒﻴﻘﺎت اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ‪.‬‬

‫وﺣﺪة اﻟﱪﳎﺔ ﰲ اﻟﺰﻣﻦ اﳊﻘﻴﻘﻲ )‪:(LabVIEW Real-Time Module‬‬ ‫‪1-1-7-3-4-3-3‬‬

‫ﺗُﻌﺘﱪ وﺣﺪة اﻟﺰﻣﻦ اﳊﻘﻴﻘﻲ إﺿﺎﻓﺔ ﺑﺮﳎﻴﺔ إﱃ ﺑﻴﺌﺔ ﺗﻄﻮﻳﺮ ﺑﺮﻧﺎﻣﺞ ‪ ،LabVIEW‬ﺣﻴﺚ ﺗﻘﻮم ﻫﺬﻩ اﻟﻮﺣﺪة ﻋﻨﺪ ﺗﻨﺼﻴﺒﻬﺎ ﺑﱰﲨﺔ اﻟﱪاﻣﺞ اﻟﺮﺳﻮﻣﻴﺔ‬
‫ٍ‬
‫ﺑﺸﻜﻞ أﻣﺜﻠﻲ ﲝﻴﺚ ﺗﻌﻤﻞ ﰲ اﻟﺰﻣﻦ اﳊﻘﻴﻘﻲ ﻋﻠﻰ اﻟﻜﻴﺎن اﻟﺼﻠﺐ اﶈﺪد‪.‬‬ ‫اﳌﻄﻮرة ﰲ ﺑﻴﺌﺔ ‪LabVIEW‬‬

‫وﺣﺪة ﺑﺮﳎﺔ ﺗﻄﺒﻴﻘﺎت اﻟـ‪:(LabVIEW FPGA Module) FPGA‬‬ ‫‪2-1-7-3-4-3-3‬‬

‫ﺗﺘﻴﺢ ﻫﺬﻩ اﻟﻮﺣﺪة اﺳﺘﺨﺪام اﻟﱪﳎﺔ اﻟﺮﺳﻮﻣﻴﺔ ﻟﺘﺼﻤﻴﻢ ﺗﻄﺒﻴﻘﺎت ﺷﺮاﺋﺢ اﻟـ‪ ،FPGA‬ﺣﻴﺚ ﻳﺴﺘﻄﻴﻊ اﳌﱪﻣﺞ إﻧﺸﺎء وﺣﺪات ﺧﺎﺻﺔ ﺑﺸﺮاﺋﺢ‬
‫اﻟـ‪ FPGAs‬وﻗﺎدرة ﻋﻠﻰ اﻟﺘﻌﺎﻣﻞ ﻣﺒﺎﺷﺮة ﻣﻊ ﺑﻮاﺑﺎت اﻟﺪﺧﻞ‪/‬اﳋﺮج‪ ،‬ﻛﻤﺎ ﺗﺘﻴﺢ إﻧﺸﺎء ﻛﺘﻞ ﻣﻨﻄﻘﻴﺔ ﻋﻠﻰ اﻟﻜﻴﺎن اﻟﺼﻠﺐ ﺧﺎﺻﺔ ﺑﺄداء ﻣﻬﺎم‬
‫ﳏﺪدة ﻣﺜﻞ‪ :‬ﺑﺮوﺗﻮﻛﻮﻻت اﻻﺗﺼﺎل اﻟﺮﻗﻤﻴﺔ‪ ،‬ﳏﺎﻛﺎة أداء اﻟﻜﻴﺎن اﻟﺼﻠﺐ ﰲ اﳊﻠﻘﺎت اﻟﱪﳎﻴﺔ‪ ،‬واﻟﻨﻤﺬﺟﺔ اﻟﺴﺮﻳﻌﺔ ﳋﻮارزﻣﻴﺎت اﻟﺘﺤﻜﻢ‪.‬‬

‫وﺣﺪة اﻟﺘﺤﻜﻢ ﺑﺎﳌﻨﻄﻖ اﻟﻐﺎﻣﺾ )‪:(LabVIEW PID and Fuzzy Logic Toolkit‬‬ ‫‪3-1-7-3-4-3-3‬‬

‫ﺗﺴﻤﺢ ﻫﺬﻩ اﻟﻮﺣﺪة ﻟﻠﻤﱪﳎﲔ ﺈﺿﺎﻓﺔ ﺧﻮارزﻣﻴﺎت ﲢﻜﻢ ﻣﻌﻘﱠﺪة إﱃ ﺗﻄﺒﻴﻘﺎﻬﺗﻢ‪ ،‬إذ ﺗﺘﻴﺢ ﻫﺬﻩ اﻟﻮﺣﺪة ﺗﻄﺒﻴﻖ ﻧﻈﺮﻳﺎت اﻟﺘﺤﻜﻢ اﻵﱄ ﺑﺴﻬﻮﻟﺔ‬
‫ﺑﺎﺳﺘﺨﺪام اﻟﺘﻮاﺑﻊ اﳌﺨﺼﺼﺔ ﳌﻨﻈﻤﺎت اﻟـ‪ PID‬وﺗﻮاﺑﻊ اﻟـ‪.Fuzzy Control‬‬

‫وﺣﺪة ﲢﺪﻳﺪ ﻫﻮﻳﺔ اﻷﻧﻈﻤﺔ )‪:(LabVIEW System Identification Toolkit‬‬ ‫‪4-1-7-3-4-3-3‬‬

‫ﲡﻤﻊ ﻫﺬﻩ اﻟﻮﺣﺪة ﺑﲔ ﲢﺼﻴﻞ اﳌﻌﻄﻴﺎت وﺧﻮارزﻣﻴﺎت ﲢﺪﻳﺪ ﻫﻮﻳﺔ اﻟﻨﻈﻢ ﻣﻦ أﺟﻞ اﳊﺼﻮل ﻋﻠﻰ ﳕﺎذج رﻳﺎﺿﻴﺔ أﻛﺜﺮ دﻗﺔ‪ ،‬ﲝﻴﺚ ﺗﺴﻤﺢ‬
‫ﻟﻠﻤﺴﺘﺨﺪم ﺑﺘﺤﺼﻴﻞ اﳌﻌﻄﻴﺎت ﻣﻦ اﻟﻨﻈﺎم‪ ،‬وﻣﻦ ﰒﱠ اﺳﺘﻨﺘﺎج اﻟﻨﻤﻮذج اﻟﺮﻳﺎﺿﻲ اﻟﺪﻳﻨﺎﻣﻴﻜﻲ ﻟﻪ ﺑﺸﻜﻞ آﱄ‪.‬‬

‫وﺣﺪة ﳏﺎﻛﺎة ﻧﻈﻢ اﻟﺘﺤﻜﻢ )‪:(LabVIEW Control Design & Simulation‬‬ ‫‪5-1-7-3-4-3-3‬‬

‫ﲤﻜﻦ ﻫﺬﻩ اﻟﻮﺣﺪة ﻣﻦ ﲢﻠﻴﻞ ﺳﻠﻮك اﻷﻧﻈﻤﺔ ﰲ اﳊﻠﻘﺔ اﳌﻔﺘﻮﺣﺔ‪ ،‬ﺗﺼﻤﻴﻢ اﳌﺘﺤﻜﻤﺎت ﰲ اﳊﻠﻘﺔ اﳌﻐﻠﻘﺔ‪ ،‬ﳏﺎﻛﺎة أداء اﻟﻨﻈﻢ أﺛﻨﺎء ﻋﻤﻠﻬﺎ‬
‫)‪ (online‬أو أﺛﻨﺎء ﺗﻮﻗﻔﻬﺎ ﻋﻦ اﻟﻌﻤﻞ )‪ ،(offline‬ﺑﺎﻹﺿﺎﻓﺔ إﱃ ﺑﺮﳎﺔ ﻫﺬﻩ اﻟﻨﻈﻢ‪ .‬ﺗﺘﻴﺢ ﻫﺬﻩ اﻟﻮﺣﺪة اﺳﺘﲑاد ﺧﻮارزﻣﻴﺎت اﻟﺘﺤﻜﻢ ﻣﻦ‬
‫ﺑﻴﺌﺎت ﺑﺮﳎﻴﺔ أﺧﺮى‪ ،‬ﻛﺎﺳﺘﲑاد ﻣﻮدﻳﻞ رﻳﺎﺿﻲ ﰎ ﺗﺼﻤﻴﻤﻪ ﰲ ﺑﺮﻧﺎﻣﺞ ‪.Matlab-Simulink‬‬

‫‪181‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Hardware Programming Languages‬‬ ‫ﻟﻐﺎت ﺑﺮﳎﺔ أﻧﻈﻤﺔ اﻟﻜﻴﺎن اﻟﺼﻠﺐ |‬

‫وﺣﺪة اﻟﺮﺑﻂ ‪:(LabVIEW Simulation Interface Toolkit) Matlab-Simulink‬‬ ‫‪6-1-7-3-4-3-3‬‬

‫ﺗﺴﻤﺢ ﻫﺬﻩ اﻟﻮﺣﺪة ﺑﺎﻟﺮﺑﻂ ﺑﲔ ﺑﻴﺌﺔ ‪ LabVIEW‬واﻟﱪﻧﺎﻣﺞ ‪ ،Matlab-Simulink‬وﺑﺎﻟﺘﺎﱄ ﻳﺴﺘﻄﻴﻊ اﳌﺼﻤﻢ رﺑﻂ اﻟﻨﻤﻮذج اﻟﺬي ﻗﺎم‬
‫ﺑﺘﻄﻮﻳﺮﻩ ﰲ ﺑﺮﻧﺎﻣﺞ ‪ Matlab-Simulink‬ﻣﻊ اﻟﻌﺪﻳﺪ ﻣﻦ ﻣﻨﺼﺎت اﻟﺪﺧﻞ‪/‬اﳋﺮج ﰲ اﻟﺰﻣﻦ اﳊﻘﻴﻘﻲ واﻟﱵ ﺗﻮﻓﺮﻫﺎ ﺑﻴﺌﺔ ‪.LabVIEW‬‬

‫وﺣﺪة ﻣﺘﺤﻜﻤﺎت ‪:(LabVIEW Embedded Module ARM MCUs) ARM‬‬ ‫‪7-1-7-3-4-3-3‬‬

‫إن ﻫﺬﻩ اﻟﻮﺣﺪة ﺗﺴﻤﺢ ﺑﺎﺳﺘﺨﺪام اﻟﱪﳎﺔ اﻟﺮﺳﻮﻣﻴﺔ ﻣﻊ ﻣﻌﺎﳉﺎت ‪ 32-bit‬اﻟﺸﻬﲑة ذات اﻟﺒﻨﻴﺔ ‪ .ARM‬ﺗﻘﺪﱢم ﻫﺬﻩ اﻟﻮﺣﺪة ﻟﻠﻤﱪﻣﺞ ﺑﻴﺌﺔ‬
‫ﺗﻄﻮﻳﺮ ﻣﺘﻜﺎﻣﻠﺔ ﻟﻠﻤﻌﺎﳉﺎت ذات اﻟﻨﻮى ‪.ARM7, ARM9, and Cortex-M3‬‬

‫وﺣﺪة ﺗﻄﺒﻴﻘﺎت اﻟﺮوﺑﻮﺗﺎت )‪:(LabVIEW Robotics Module‬‬ ‫‪8-1-7-3-4-3-3‬‬

‫ﺗﻘﺪﱢم ﻫﺬﻩ اﻟﻮﺣﺪة ﺑﻴﺌﺔ ﻣﻌﻴﺎرﻳﺔ ﻟﺘﻄﻮﻳﺮ اﻟﻜﻴﺎن اﻟﺼﻠﺐ واﻟﱪﳎﻴﺎت اﻟﻼزﻣﺔ ﻟﻨﻈﻢ اﻟﺘﺤﻜﻢ ﺑﺎﻟﺮوﺑﻮﺗﺎت‪ .‬ﲢﺘﻮي ﻫﺬﻩ اﻟﻮﺣﺪة ﻋﻠﻰ ﻣﻜﺘﺒﺔ ﻛﺒﲑة‬
‫ﻣﻦ اﻟﺘﻮاﺑﻊ اﻟﻼزﻣﺔ ﻟﻠﺘﺤﻜﻢ ﺑﺎﻟﺮوﺑﻮﺗﺎت اﳌﺨﺘﻠﻔﺔ‪ ،‬ﻛﻤﺎ ﺗﺘﻀﻤﻦ وﺻﻼً ﻣﺒﺎﺷﺮاً ﻣﻊ اﳊﺴﺎﺳﺎت واﳌﺸﻐﻼت اﳌﺨﺘﻠﻔﺔ‪ ،‬ﺑﺎﻹﺿﺎﻓﺔ إﱃ ﺧﻮارزﻣﻴﺎت‬
‫ﻋﺪﻳﺪة ﰲ اﻟﺬﻛﺎء اﻻﺻﻄﻨﺎﻋﻲ واﳊﺮﻛﺔ واﻹﺑﺼﺎر‪.‬‬

‫وﺣﺪة اﻟﱪﳎﺔ ﻋﻦ ﻃﺮﻳﻖ ﳐﻄﻂ اﳊﺎﻟﺔ )‪:(LabVIEW Statechart Module‬‬ ‫‪9-1-7-3-4-3-3‬‬

‫ﻛﻞ ﻣﺎ ﰎﱠ ﺗﻘﺪﳝﻪ ﺳﺎﺑﻘﺎً‪ ،‬ﺣﻴﺚ ﻳﺴﺘﻄﻴﻊ اﳌﱪﻣﺞ ﺑﻨﺎء ﳐﻄﻄﺎت اﳊﺎﻟﺔ‬

‫ﺗﻘﺪم ﻫﺬﻩ اﻟﻮﺣﺪة ﻟﻠﻤﱪﻣﺞ أﺳﻠﻮﺑﺎً آﺧﺮ ﰲ اﻟﱪﳎﺔ أﻋﻠﻰ ﻣﻦ ﱢ‬
‫)‪ ،(Statecharts‬ﲢﺪﻳﺪ اﳊﺎﻻت اﳌﺨﺘﻠﻔﺔ‪ ،‬وﺗﻨﻔﻴﺬ ﻫﺬﻩ اﳌﺨﻄﻄﺎت ﻋﻠﻰ اﳊﻮاﺳﻴﺐ اﻟﺸﺨﺼﻴﺔ‪ ،‬ﻣﺘﺤﻜﻤﺎت اﻟﺰﻣﻦ اﳊﻘﻴﻘﻲ‪ ،‬ﻣﺼﻔﻮﻓﺎت‬
‫اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ )‪ ،(FPGAs‬وﻣﻨﺼﺎت اﻟﻜﻴﺎن اﻟﺼﻠﺐ اﻷﺧﺮى‪.‬‬

‫دوات ﺗﺼﻤﻴﻢ أﻧﻈﻤﺔ اﻟﺘﺤﻜﻢ وﳏﺎﻛﺎﻬﺗﺎ )‪:(Control Design and Simulation‬‬ ‫‪2-7-3-4-3-3‬‬

‫ﺗﺘﻀﻤﻦ ﳎﻤﻮﻋﺔ ﻣﻦ أدوات اﻟﺘﺼﻤﻴﻢ )‪ (Design‬واﻟﺘﻄﻮﻳﺮ )‪ (Development‬واﻟﻨﻤﺬﺟﺔ )‪ (Modeling‬واﻟﺘﺤﻠﻴﻞ )‪(Analysis‬‬

‫واﶈﺎﻛﺎة )‪Simulation‬إﺿﺎﻓﺔً إﱃ أدوات ﲢﺪﻳﺪ ﻫﻮﻳﺔ اﻷﻧﻈﻤﺔ اﺠﻤﻟﻬﻮﻟﺔ )‪.(System Identification‬‬

‫أدوات ﻣﻌﺎﳉﺔ وﲣﺰﻳﻦ اﻟﺒﻴﺎﻧﺎت وﻋﺮض اﻟﺘﻘﺎرﻳﺮ )‪:(Report Generation and Data Storage‬‬ ‫‪3-7-3-4-3-3‬‬

‫ﳎﻤﻮﻋﺔ ﻣﻦ اﻷدوات ﲤﻜﻦ اﳌﺴﺘﺨﺪم ﻣﻦ رﺑﻂ اﻟﺒﻴﺌﺔ ‪ LabVIEW‬ﻣﻊ ﳎﻤﻮﻋﺔ أدوات ‪ MS-Office‬وﻗﻮاﻋﺪ ﺑﻴﺎﻧﺎت ‪ .My-SQL‬إﺿﺎﻓﺔً‬
‫إﱃ إﻣﻜﺎﻧﻴﺔ ﺑﻨﺎء واﺟﻬﺎت اﻟﺘﻄﺒﻴﻘﺎت ﻋﻠﻰ ﺻﻔﺤﺎت اﻹﻧﱰﻧﺖ ﳑﺎ ﻳﺴﻤﺢ ﺑﺎﻟﺘﺤﻜﻢ واﳌﺮﻗﺒﺔ ﻋﻦ ﺑﻌﺪ‪.‬‬

‫أدوات ﻣﻌﺎﳉﺔ اﻹﺷﺎرة اﻟﺮﻗﻤﻴﺔ واﻟﺼﻮر )‪:(Image and Signal Processing‬‬ ‫‪4-7-3-4-3-3‬‬

‫ﲤﻠﻚ آﻻف اﳌﻜﺘﺒﺎت اﳉﺎﻫﺰة واﳋﺎﺻﺔ ﰲ ﻣﻌﺎﳉﺔ وﺗﺼﺤﻴﺢ وﺗﺮﺷﻴﺢ اﻟﺼﻮر واﻹﺷﺎرة اﻟﺮﻗﻤﻴﺔ اﻟﺼﻮﺗﻴﺔ واﳌﺮﺋﻴﺔ إﺿﺎﻓﺔً إﱃ اﻟﻌﺪﻳﺪ ﻣﻦ اﻟﻮﻇﺎﺋﻒ‬
‫اﳋﺎﺻﺔ ﰲ ﺗﻄﺒﻴﻘﺎت أﻧﻈﻤﺔ اﻟﺮؤﻳﺔ )‪.(Vision Systems‬‬

‫أدوات ﺑﻨﺎء اﻟﺘﻄﺒﻴﻘﺎت اﻟﱪﳎﻴﺔ اﳊﺎﺳﻮﺑﻴﺔ )‪:(Software Development and Deployment‬‬ ‫‪5-7-3-4-3-3‬‬

‫ﺗﺰود ﳎﻤﻮﻋﺔ ﻣﻦ اﻷدوات اﻻﺣﱰاﻓﻴﺔ ﻋﺎﻟﻴﺔ اﳌﺴﺘﻮى ﻟﺒﻨﺎء اﻟﺘﻄﺒﻴﻘﺎت اﻟﱪﳎﻴﺔ اﳊﺎﺳﻮﺑﻴﺔ‪.‬‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪182‬‬
23 Chapter 3 | ‫اﻟﻔﺼﻞ اﻟﺜﺎﻟﺚ‬

:(Industrial Monitoring and Control) ‫اﻟﺘﺤﻜﻢ واﻷﲤﺘﺔ واﳌﺮاﻗﺒﺔ اﻟﺼﻨﺎﻋﻴﺔ‬ 6-7-3-4-3-3

.(Scada) ‫ ﻟﺼﻨﺎﻋﻴﺔ ﲟﺨﺘﻠﻒ ﺗﻄﺒﻴﻘﺎﻬﺗﺎ وﺗﺼﻤﻴﻢ واﺟﻬﺎت اﻟﺘﺤﻜﻢ واﳌﺮاﻗﺒﺔ‬PLC‫ﻫﺬﻩ اﻷدوات ﳐﺼﺼﺔ ﻟﱪﳎﺔ اﻟـ‬

Software Report
Control Image Industrial
Embedded Development Generation
Design and &Signal Monitoring
Design & and Data
Simulation Processing and Control
Deployment Storage
Real-Time Module ok ok
Real-Time Execution Trace Toolkit ok ok ok
FPGA Module ok ok ok
Microprocessor SDK
Statechart Module ok ok ok ok
Mobile Module ok
DSP Module ok
Embedded Module for ARM ok
C-code Generator ok
FPGA Compile Farm Toolkit ok
Robotics Module ok
Control Design and Simulation Module ok
PID and Fuzzy Logic Toolkit ok
Simulation Interface Toolkit ok
System Identification Toolkit ok
Vision Development Module ok
MathScript RT Module ok
Advanced Signal Processing Toolkit ok
Digital Filter Design Toolkit ok
Adaptive Filter Toolkit ok
Sound and Vibration Measurement Suite ok
Sound and Vibration Toolkit ok
Spectral Measurements Toolkit ok
Modulation Toolkit ok
Vision Builder for Automated Inspection ok
Math Interface Toolkit ok
Real-Time Vision Development Bundle ok
Datalogging and Supervisory Control ok
Wireless Sensor Network Module ok
Touch Panel Module ok
Motion Assistant ok
SoftMotion Module ok
OPC Servers ok
Instrument Control ok
Test Automation and Validation ok
Application Builder for Windows ok
VI Analyzer Toolkit ok
Desktop Execution Trace Toolkit ok
Remote Panels ok
Requirements Gateway ok
Unit Test Framework Toolkit ok
SignalExpress ok
Report Generation Toolkit for MS Office ok
Database Connectivity Toolkit ok
DataFinder Toolkit ok
Internet Toolkit ok
Acquiring Data and Processing Signals ok

‫ ﻓﻘﺎً ﻟﺘﻄﺒﻴﻘﺎﻬﺗﺎ‬LabVIEW ‫ ﺗﺼﻨﻴﻔﺎت اﻟﻮﺣﺪات اﻟﱪﳎﻴﺔ اﻹﺿﺎﻓﻴﺔ ﰲ اﻟﺒﻴﺌﺔ‬3-3‫اﳉﺪول‬

183 ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Hardware Programming Languages‬‬ ‫ﻟﻐﺎت ﺑﺮﳎﺔ أﻧﻈﻤﺔ اﻟﻜﻴﺎن اﻟﺼﻠﺐ |‬

‫اﻟﺨﻼﺻﺔ )‪:(Conclusion‬‬ ‫‪4-3‬‬

‫ﰲ اﻟﻮﻗﺖ اﻟﺬي ﺗﺰداد ﻓﻴﻪ ﻛﺜﺎﻓﺔ اﻟﱰاﻧﺰﺳﺘﻮرات ﻋﻠﻰ ﺷﺮﳛﺔ ﺳﻴﻠﻴﻜﻮﻧﻴﺔ وﺣﻴﺪة – وﻓﻘﺎً ﻟﻘﺎﻧﻮن ‪ ،Moor‬ﻓﺈن ﻛﻠﻔﺔ اﻟﱰاﻧﺰﺳﺘﻮرات ﻋﻠﻰ اﳌﺴﺘﻮى‬
‫اﻟﺴﻴﻠﻴﻜﻮﱐ ﺑﺎﳓﺪار‪ ،‬وﺑﺎﻟﺘﺎﱄ ﻓﺈن اﻟﻌﻨﺎﺻﺮ اﳌﺘﻜﺎﻣﻠﺔ اﳌﻌﻘﺪة اﻟﺒﻨﻴﺔ )‪ (FPGAs, Multi-core MPUs, SoCs‬أﺻﺒﺤﺖ أﻛﺜﺮ اﺳﺘﺨﺪاﻣﺎً‬
‫وﺷﻴﻮﻋﺎً ﰲ اﻟﺘﻄﺒﻴﻘﺎت‪ ،‬وﻫﺬا ﺑﺪورﻩ أدى إﱃ ﺣﺠﻢ ﺗﻌﻘﻴﺪ ﺑﺮﳎﻲ أﻛﱪ ﺑﻜﺜﲑ ودورة ﺗﺼﻤﻴﻢ أﻃﻮل ﺑﻜﺜﲑ‪.‬‬

‫إن ﺗﺼﻤﻴﻢ اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ أﺻﺒﺢ ﰲ ﻫﺬا اﻟﻮﻗﺖ أﻣﺮاً أﺳﺎﺳﻴﺎً ﰲ اﳌﻨﺎﻫﺞ اﻟﺘﻌﻠﻴﻤﻴﺔ اﳍﻨﺪﺳﻴﺔ‪ ،‬وإن اﺳﺘﺨﺪام ﻟﻐﺎت اﻟﱪﳎﺔ اﻟﺘﻘﻠﻴﺪﻳﺔ اﻟﻨﺼﻴﺔ‬
‫ﻳﻌﻴﻖ اﻟﻄﻼب واﻟﺒﺎﺣﺜﲔ ﻣﻦ اﻻﺳﺘﻔﺎدة ﻣﻦ اﻟﻌﺪﻳﺪ ﺣﻠﻮل اﻟﻜﻴﺎن اﻟﺼﻠﺐ اﳌﺘﻮﻓﺮة )ﻣﺜﻞ‪ :‬اﻟـ‪ (FPGAs‬واﻟﱵ ﳝﻜﻦ أن ﲡﻌﻞ اﻟﻌﻤﻠﻴﺔ اﻟﺘﻌﻠﻴﻤﻴﺔ‬
‫أﻛﺜﺮ ﻓﻌﺎﻟﻴﺔ وواﻗﻌﻴﺔ‪ .‬إن ﻫﺬا اﻷﻣﺮ ﻳﺒﺪو ﺟﻠﻴﺎً وواﺿﺤﺎً ﰲ اﻟﻔﺮوع اﳍﻨﺪﺳﻴﺔ اﻟﱵ ﻻ ﺗﺮﻛﺰ ﻋﻠﻰ اﻟﱪﳎﻴﺎت )ﻣﺜﻞ‪ :‬اﻟﻔﺮوع اﳍﻨﺪﺳﻴﺔ ﻛﺎﻓﺔً ﻋﺪا‬
‫اﳍﻨﺪﺳﺔ اﳌﻌﻠﻮﻣﺎﺗﻴﺔ وﻫﻨﺪﺳﺔ اﳊﻮاﺳﻴﺐ(‪ ،‬ﺣﻴﺚ أن اﻟﻄﻼب ﻻ ﳝﻠﻜﻮن اﳋﱪة اﻟﻮاﻓﻴﺔ واﻟﻜﺎﻓﻴﺔ ﰲ ﻟﻐﺎت اﻟﱪﳎﺔ اﻟﻨﺼﻴﺔ‪.‬‬

‫إن ﻟﻐﺎت وﺻﻒ اﻟﻜﻴﺎن اﻟﺼﻠﺐ )‪ ،(HDLs‬ﻣﺜﻞ‪ ،VHDL, Verilog :‬ﻫﻲ أﻛﺜﺮ ﻓﻌﺎﻟﻴﺔ ﻣﻦ ﻏﲑﻫﺎ ﻣﻦ اﻟﻠﻐﺎت ﻋﻨﺪﻣﺎ ﻳﺘﻌﻠﻖ اﻷﻣﺮ‬
‫ﺑﻮﺻﻒ وﻇﺎﺋﻒ وﺳﻠﻮك اﻟﻜﻴﺎن اﻟﺼﻠﺐ‪ ،‬وﻟﻜﻦ ﻫﺬا ﻣﻦ ﺟﺎﻧﺐ آﺧﺮ ﻓﺈﻧﻪ ﳛﺘﺎج إﱃ ﻣﺴﺘﻮى ٍ‬
‫ﻋﺎل ﻣﻦ اﳋﱪة ﰲ اﻟﻜﻴﺎن اﻟﺼﻠﺐ ﻟﺘﻮﻇﻴﻒ‬
‫ﻟﻐﺎت وﺻﻒ اﻟﻜﻴﺎن اﻟﺼﻠﺐ ﺑﺸﻜﻞ ﻓﻌﺎل؛ اﻟﺴﺒﺐ اﻟﺬي ﳚﻌﻞ ﻣﻄﻮري اﻟﱪاﻣﺞ اﳊﺎﺳﻮﺑﻴﺔ ﻳﻌﺎﻧﻮن ﻣﻦ ﻧﻘﺺ اﳋﱪة ﺣﻮل ﺗﻔﺎﺻﻴﻞ وﺗﻌﻘﻴﺪات‬
‫ﺗﻄﻮﻳﺮ اﻟﻜﻴﺎن اﻟﺼﻠﺐ؛ ﺎ ﳛﺪ ﻣﻦ ﻣﻘﺪرﻬﺗﻢ ﻋﻠﻰ ﺗﺼﻤﻴﻢ وﺗﻄﻮﻳﺮ ﺗﻄﺒﻴﻘﺎت اﻟﻜﻴﺎن اﻟﺼﻠﺐ‪.‬‬

‫وﻋﻠﻴﻪ ﻓﺈن اﻷﲝﺎث ﻋﻠﻰ ﺗﺆﻛﺪ ﺿﺮورة ﺗﻄﻮﻳﺮ وﺗﺒﲏ ﺑﻴﺌﺎت ﺑﺮﳎﻴﺔ ﺟﺪﻳﺪة ﻋﻠﻰ ﻣﺴﺘﻮى ﺟﺪﻳﺪ‪ ،‬وذﻟﻚ ﺑﻌﻴﺪاً ﻋﻦ اﻟﻠﻐﺎت اﻟﻨﺼﻴﺔ ﻷن ﺣﺠﻢ‬
‫اﻟﱪﻧﺎﻣﺞ ﻳﺰداد ﻃﻮﻻً وﺗﻌﻘﻴﺪاً – ﻣﺜﻞ‪ :‬اﻟﺒﻴﺌﺎت اﻟﺮﺳﻮﻣﻴﺔ – إﺿﺎﻓﺔً إﱃ اﻟﺒﻴﺌﺔ اﻷﺳﺎﺳﻴﺔ ﺑﻠﻐﺔ اﻟـ‪ C‬ﲝﻴﺚ ﳝﻜﻦ اﻟﱪﳎﺔ ﺑﻜﻼ اﳌﻨﺤﻴﲔ ﺑﻨﻔﺲ‬
‫اﻟﻮﻗﺖ وﺿﻤﻦ ﺑﻴﺌﺔ ﺑﺮﳎﻴﺔ واﺣﺪة‪ ،‬ﲟﺎ ﰲ ذﻟﻚ ﻣﺮاﺣﻞ اﻟﺘﺤﻠﻴﻞ واﻟﻔﺤﺺ واﻟﺘﻨﻔﻴﺬ‪ .‬ﻛﻤﺎ أﻧﻪ ﻣﻦ أﺟﻞ ﺑﺮﳎﺔ اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ ﻋﻤﻮﻣﺎً‪ ،‬وﺗﻘﻨﻴﺔ‬
‫اﻟـ‪ FPGA‬ﻋﻠﻰ ﳓﻮ ﺧﺎص‪ ،‬ﻓﺈﻧﻪ ﻣﻦ اﻟﻀﺮوري ﺟﺪاً وﺟﻮد ﲢﻮل أو اﻧﺘﻘﺎل ﺟﺬري ﰲ اﳌﻨﻬﺠﻴﺔ اﻟﱪﳎﻴﺔ اﳌﺘﺒﻌﺔ ﻣﻦ ﺧﻼل ﻟﻐﺎت اﻟﱪﳎﻴﺔ‬
‫اﻟﺮﺳﻮﻣﻴﺔ وذﻟﻚ ﻧﻈﺮاً ﻻرﺗﻜﺎزﻫﺎ ﻋﻠﻰ ﻣﻨﻬﺠﻴﺔ ﺗﺪﻓﻴﻖ اﻟﺒﻴﺎﻧﺎت )‪ .(Dataflow‬ﻟﻘﺪ أﺛﺒﺘﺖ ﻟﻐﺎت اﻟﱪﳎﺔ اﻟﺮﺳﻮﻣﻴﺔ )‪ (LabVIEW‬ﻓﻌﺎﻟﻴﺘﻬﺎ‬
‫ﻋﻠﻰ ﻟﻐﺎت اﻟﱪﳎﺔ اﻟﻨﺼﻴﺔ‪ ،‬ﻛﻤﺎ أ�ﺎ أﺳﺮع ﲞﻤﺲ ﻣﺮات ﻣﻦ اﻟﻠﻐﺎت اﻟﻨﺼﻴﺔ ﰲ ﺗﻄﻮﻳﺮ اﻟﺘﻄﺒﻴﻘﺎت‪ .‬ﻋﻼوةً ﻋﻠﻰ ذﻟﻚ ﻓﺈن ﻟﻐﺎت اﻟﱪﳎﺔ‬
‫ﻟﺮﺳﻮﻣﻴﺔ ﺗﻌﺰز اﻹﻧﺘﺎﺟﻴﺔ ﻟﺪى اﻟﺒﺎﺣﺜﲔ وﻣﻄﻮري اﻟﺘﻄﺒﻴﻘﺎت ﺑﻐﺾ اﻟﻨﻈﺮ ﻋﻦ ﻣﺴﺘﻮى ﺧﱪﻬﺗﻢ اﻟﱪﳎﻴﺔ‪ ،‬وذﻟﻚ ﻷن اﻟﻠﻐﺎت اﻟﺮﺳﻮﻣﻴﺔ ﺗﻌﻄﻲ‬
‫ﺗﻨﻈﻴﻤﺎً ﺑﺪﻫﻴﺎً‪ ،‬وﲡﻌﻞ اﳌﻌﻠﻮﻣﺎت واﺿﺤﺔ وﻣﺮﺋﻴﺔ‪ ،‬وﻫﻮ اﻟﺴﺒﺐ اﻟﺬي ﳚﻌﻠﻬﺎ ﳏﻂ اﻻﻫﺘﻤﺎم ﰲ آﻻف اﳉﺎﻣﻌﺎت ﺣﻮل اﻟﻌﺎﱂ‪.‬‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪184‬‬
 ‫اﻟﻔﺼﻞ اﻟﺮاﺑﻊ‬ ‫‪Chapter 4‬‬

‫‪@Ôéá‰:a@·Ó‹»n€a@pbÓvˉfl‬‬

‫‪ENGINEERING EDUCATION METHODOLOGIES‬‬

‫ﻧﻈﺮة ﻋﺎﻣﺔ )‪:(Overview‬‬

‫ﻫﺬا اﻟﻔﺼﻞ ﻳﻄﺮح وﺑﺸﻜﻞ ﳐﺘﺼﺮ اﻟﻨﻈﺮﻳﺎت واﻟﺘﻮﺟﻬﺎت اﻟﺴﺎﺋﺪة ﰲ ﻋﻠﻢ أﺻﻮل اﻟﺘﺪرﻳﺲ ﻣﺜـﻞ‪ :‬اﻟﻨﻈﺮﻳـﺔ اﻟﺴـﻠﻮﻛﻴﺔ واﻹدراﻛﻴـﺔ واﻻﺗﺼـﺎﻟﻴﺔ واﻟﺒﻨﺎﺋﻴـﺔ‪،‬‬
‫وﻫﺬﻩ اﻷﺧﲑة ﻫﻲ أﻛﺜـﺮ اﳌـﺪارس اﳊﺪﻳﺜـﺔ ﺗﻄـﻮراً‪ ،‬واﻟﻌﺪﻳـﺪ ﻣـﻦ اﻟﺪراﺳـﺎت اﳊﺪﻳﺜـﺔ أﻇﻬـﺮت ﺗﺄﺛﲑﻫـﺎ اﻹﳚـﺎﰊ ﰲ اﻟﺘﻌﻠـﻴﻢ اﳍﻨﺪﺳـﻲ‪ .‬ﻳﻔﺼـﻞ اﻟﻔﺼـﻞ ﰲ‬
‫ﳕــﻮذج اﻟــﺘﻌﻠﻢ اﻟﺒﻨــﺎﺋﻲ ﰒ ﻳﺘﻔــﺮع إﱃ اﻟــﺘﻌﻠﻢ اﻟﺘﺠ ـﺮﻳﱯ اﻟــﺬي ﻫــﻮ أﺣــﺪ أﳕــﺎط اﻟــﺘﻌﻠﻢ اﻟــﱵ ﺗﻌﺘﻤــﺪ ﻋﻠــﻰ اﻟﻨﻈﺮﻳــﺔ اﻟﺒﻨﺎﺋﻴــﺔ وﻫــﻮ ﻣــﻦ اﻷﺳــﺎﻟﻴﺐ اﳌﻄﺮوﻗــﺔ‬
‫ﺑﺎﺳﺘﻤﺮار ﺧﻼل ﻋﻤﻠﻴﺎت اﻟﺘﻌﻠﻴﻢ واﻟﺘﻌﻠﻢ ﺿﻤﻦ ﳏﺎﺿﺮات اﻟﺘﻌﻠﻴﻢ اﳍﻨﺪﺳﻲ‪ ،‬ﻓﻨﺘﻌﻤﻖ ﻓﻴﻪ وﻧﻔﺼﻞ ﰲ ﻧﻈﺮﻳﺔ ‪ Kolb‬اﻟﱵ ﰎ اﻋﺘﻤﺎدﻫﺎ ﻛﺨﻠﻔﻴـﺔ ﺗﺮﺑﻮﻳـﺔ‬
‫وأﺳــﺎس ﻟﺸــﺮح ﻧﺘــﺎﺋﺞ ﻋﻤﻠﻴــﺎت اﻟﺘﻌﻠــﻴﻢ ﺿــﻤﻦ اﳌﺨــﺎﺑﺮ وﻛﺄﺳــﺎس ﻟﻌــﺮض اﳌﻘﱰﺣــﺎت اﳋﺎﺻــﺔ ﺑﺎﻟﻨﻤــﺎذج اﻟﱰﺑﻮﻳــﺔ اﳊﺪﻳﺜــﺔ‪ .‬ﺗﻌــﺪ أﳕــﺎط اﻟــﺘﻌﻠﻢ ﻣﻮﺿــﻮﻋﺎً‬
‫ﺗﺮﺑﻮﻳـﺎً ﻧﺎﲡـﺎً ﻳﻌــﲎ ﺑﺪراﺳــﺔ ﺗﻔﻀــﻴﻼت اﻟــﺘﻌﻠﻢ اﳋﺎﺻــﺔ ﺑــﺎﻷﻓﺮاد‪ ،‬وﻗــﺪ ﰎ ﲣﺼــﻴﺺ ﻗﺴــﻢ ﺿــﻤﻦ ﻫــﺬا اﻟﻔﺼــﻞ ﻟﻌــﺮض ﳕــﺎذج ﳐﺘﻠﻔــﺔ ﻣــﻦ أﳕــﺎط اﻟــﺘﻌﻠﻢ‪،‬‬
‫وﻧﻔﺼــﻞ ﰲ اﻟــﺘﻌﻠﻢ اﻟﻘــﺎﺋﻢ ﻋﻠــﻰ ﺣــﻞ اﳌﺸــﻜﻼت‪ .‬ﻧﻨﺘﻘــﻞ ﺑﻌــﺪﻫﺎ ﻟـﺮﺑﻂ اﻷﲝــﺎث اﻟﱰﺑﻮﻳــﺔ ﺑﺎﳌﺒــﺎدئ اﳍﻨﺪﺳــﻴﺔ‪ ،‬وﲢﺪﻳــﺪاً أﻧﻈﻤــﺔ اﻟــﺘﺤﻜﻢ ذات اﻟﺘﻐﺬﻳــﺔ‬
‫اﻟﻌﻜﺴــﻴﺔ‪ ،‬وﻧﻨــﺎﻗﺶ ﻣﻮﺿــﻮﻋﺎت اﻟﺘﻘﻴــﻴﻢ اﻟﺒﻨــﺎﺋﻲ واﻟــﺘﻌﻠﻢ ذاﰐ اﻟﺘﻨﻈــﻴﻢ واﻟﺘﺼــﻤﻴﻢ اﻟﺘﻌﻠﻴﻤــﻲ‪ .‬ﻧﻘــﺪم ﺑﻌــﺪ ذﻟــﻚ اﺳﺘﻌﺮاﺿـﺎً ﻟﻠﺪراﺳــﺎت اﳌﺘﻌﻠﻘــﺔ ﺑــﺎﻟﺘﻌﻠﻴﻢ‬
‫اﳋــﱪي ودور اﳌﺨــﺎﺑﺮ ﰲ ﳎــﺎﻻت اﳍﻨﺪﺳــﺔ واﻟﻌﻠــﻮم‪ .‬ﻳﻠﻴــﻪ ﺷــﺮح ﻷﻫــﺪاف اﳌﺨــﺎﺑﺮ واﻷﺳــﺎﻟﻴﺐ اﳌﺘﺒﻌــﺔ ﻓﻴــﻪ‪ .‬ﰒ ﻧﺘﻄــﺮق إﱃ أﻧ ـﻮاع اﳌﺨــﺎﺑﺮ ﻓﻨﺴــﺘﻌﺮض‬
‫اﻟﺘﺼﻨﻴﻔﺎت اﻟﺮﺋﻴﺴﻴﺔ واﻟﻔﺮﻋﻴﺔ‪ ،‬ﻣﺜﻞ‪ :‬اﳌﺨﺎﺑﺮ اﻟﺘﻄﺒﻴﻘﻴﺔ واﳌﺨﺎﺑﺮ اﻻﻓﱰاﺿﻴﺔ وﻛﺬﻟﻚ اﳌﺨﺎﺑﺮ ﻋﻦ ﺑﻌﺪ‪ ،‬وﻳﺘﻢ ﲢﻠﻴﻞ ﻣﺰاﻳﺎ وﻣﺴﺎوئ ﻛﻞ ﻣﻨﻬﺎ ﻣﻦ وﺟﻬﺔ‬
‫ﻧﻈﺮ اﻟﺪراﺳﺎت واﻷﲝﺎث اﳌﻮﺟﻮدة وﺻﻮﻻً إﱃ �ﺎﻳﺔ اﻟﻔﺼﻞ ﺣﻴﺚ ﳜﺘﻢ ﻫﺬا اﻟﻔﺼﻞ ﺟﻮﻟﺘﻪ ﺑﺘﻘﺪﱘ ﺧﻼﺻﺔ اﻟﻔﺼﻞ‪.‬‬

‫ﺗﻤﻬﻴﺪ )‪:(Preface‬‬ ‫‪1-4‬‬

‫ﻳﻌﺘﱪ اﻟﺘﻌﻠﻢ ﻣﻔﻬﻮم رﺋﻴﺲ ﻣﻦ ﻣﻔﺎﻫﻴﻢ ﻋﻠﻢ اﻟﻨﻔﺲ ﻇﻞ ﳛﻈﻰ ﺑﺎﻫﺘﻤﺎم اﻟﻌﻠﻤﺎء واﳌﻔﻜﺮﻳﻦ ﻣﻨﺬ ﻋﻬﺪ اﻟﻔﻼﺳﻔﺔ اﻹﻏﺮﻳﻖ ﺣﱴ ﻋﻬﺪﻧﺎ اﻟﺮاﻫﻦ‬
‫اﳊﺎﻓﻞ ﺑﺸﱴ ﺻﻨﻮف اﻟﻌﻠﻢ واﳌﻌﺮﻓﺔ ﺗﻄﺒﻴﻘﺎﻬﺗﺎ اﻟﺘﻘﻨﻴﺔ واﻟﻌﻤﻠﻴﺔ‪ .‬وﻣﻔﻬﻮم اﻟﺘﻌﻠﻢ ﻳﺸﻜﻞ إﺣﺪى اﻟﻘﻀﺎﻳﺎ اﶈﻮرﻳﺔ وﻣﺎ ﻳﻨﺒﺜﻖ ﻋﻨﻬﺎ ﻣﻦ ﲝﻮث‬
‫وﲡﺎرب ودراﺳﺎت وﺗﻌﻠﻴﻢ وﺗﺪرﻳﺐ وﺗﻄﺒﻴﻖ‪ .‬ﻣﻦ أﺟﻞ ذﻟﻚ؛ ﺗﻨﻔﻖ اﻟﻴﻮم ﰲ ﳎﺘﻤﻌﻨﺎ اﳌﻌﺎﺻﺮ اﻷﻣﻮال اﻟﻄﺎﺋﻠﺔ ﻋﻠﻰ أﺟﻬﺰة اﻟﺘﻌﻠﻴﻢ اﻟﱵ ﺗﺘﻤﺜﻞ ﰲ‬
‫اﳌﺪارس واﳉﺎﻣﻌﺎت واﳌﻌﺎﻫﺪ وﳓﻮﻫﺎ‪.‬‬

‫إذا ﻛﺎن ﻫﻨﺎك اﺗﻔﺎق ﻛﺒﲑ ﺣﻮل أﳘﻴﺔ اﻟﺘﻌﻠﻢ ودورﻩ ﰲ ﺣﻴﺎة ﻛﻞ ﻣﻨﺎ‪ ،‬وإذا ﻛﺎن ﻫﻨﺎك اﺗﻔﺎق ﺣﻮل ﺗﻌﺮﻳﻒ اﻟﺘﻌﻠﻢ ﺑﺄﻧﻪ ﻧﻮع ﻣﻦ ﺗﻌﺪﻳﻞ‬
‫اﻟﺴﻠﻮك‪ ،‬ﻓﺈﻧﻪ ﻻ ﻳﻮﺟﺪ ﰲ ﻋﻠﻢ اﻟﻨﻔﺲ ﻣﻮﺿﻮع أﺳﺎﺳﻲ أﻛﺜﺮ أﳘﻴﺔ ﰲ ﻓﻬﻤﻨﺎ ﻟﻠﺴﻠﻮك ﻣﻦ ﻣﻮﺿﻮع اﻟﺘﻌﻠﻢ‪ ،‬ﻓﻬﻮ اﻟﺼﺨﺮة اﻟﺼﻠﺪة اﻟﱵ ﺗﺮﺗﻜﺰ‬
‫ﻋﻠﻴﻬﺎ ﻧﻈﺮﻳﺎت ﻋﻠﻢ اﻟﻨﻔﺲ‪ .‬وﻣﻦ اﻟﻨﺎﺣﻴﺔ اﻟﻌﻤﻠﻴﺔ‪ ،‬ﻓﻼ ﻏﲎ ﻷي ﳎﺎل ﻣﻦ ﻤﻟﺎﻻت اﻟﺘﻄﺒﻴﻘﻴﺔ ﰲ ﻋﻠﻢ اﻟﻨﻔﺲ ﻋﻦ ﻓﻬﻢ ﻧﻈﺮﻳﺔ اﻟﺘﻌﻠﻢ‪ ،‬ﻓﺎﻟﻌﻼج‬
‫اﻟﻨﻔﺴﻲ‪ ،‬ﻋﻠﻰ ﺳﺒﻴﻞ اﳌﺜﺎل‪ ،‬ﻫﻮ ﰲ ﺟﻮﻫﺮﻩ ﺷﻜﻞ ﻣﻦ أﺷﻜﺎل اﻟﺘﻌﻠﻢ‪ ،‬ﻛﻤﺎ أن ﻛﻞ ﺗﻄﻮر إﻧﺴﺎﱐ ﻳﻨﺤﺼﺮ ﰲ وﻇﻴﻔﺘﲔ ﳘﺎ‪ :‬اﻟﻨﻀﺞ )اﻟﻨﻤﻮ‬
‫واﻟﺘﻄﻮر اﻟﻔﺴﻴﻮﻟﻮﺟﻲ( واﻟﺘﻌﻠﻢ )اﻟﺘﻄﻮر اﻟﻨﻔﺴﻲ(‪.‬‬
 ‫‪Engineering Education Methodologies‬‬ ‫ﻣﻨﻬﺠﻴﺎت اﻟﺘﻌﻠﻴﻢ اﳍﻨﺪﺳﻲ |‬

‫إن ﺗﻄﻮر اﻷﲝﺎث اﻟﱰﺑﻮﻳﺔ ﰲ ﳎﺎل ﺳﻴﻜﻮﻟﻮﺟﻴﺎ اﻟﺘﻌﻠﻴﻢ واﻟﺘﺪرﻳﺲ أدى إﱃ ﺿﺮورة اﻟﺒﺤﺚ ﻋﻦ ﳕﻮذج ﺟﺪﻳﺪ‪ ،‬واﻛﺘﺸﺎف اﳌﺰﻳﺪ ﻣﻦ اﳊﻘﺎﺋﻖ ﻋﻦ‬
‫اﻟﻄﻼب‪ ،‬وﻋﻦ دواﻓﻌﻬﻢ ﻣﺸﻜﻼﻬﺗﻢ‪ ،‬وأﺳﺎﻟﻴﺐ ﺗﻌﻠﻤﻬﻢ‪ ،‬واﻟﻌﻮاﻣﻞ اﳌﺨﺘﻠﻔﺔ اﳌﺆﺛﺮة ﰲ ﺗﻌﻠﻤﻬﻢ‪ ،‬وﻣﺎ ﺗﺆدي إﻟﻴﻪ ﻣﻦ ﺗﻐﲑ ﰲ اﳊﺎﺟﺎت اﻟﻨﻤﺎﺋﻴﺔ‬
‫ﻟﻠﻤﺘﻌﻠﻢ‪ ،‬وﻋﻦ ﻤﻟﺘﻤﻊ وﻛﻴﻔﻴﺔ إﺳﻬﺎم اﻟﱰﺑﻴﺔ ﰲ ﺗﻄﻮرﻩ وﺗﻮﺻﻠﻪ إﱃ أﺳﺎﻟﻴﺐ وﻃﺮق أﻛﺜﺮ ﻓﺎﻋﻠﻴﺔ ﰲ اﻟﺘﻌﻠﻴﻢ‪ ،‬وﻣﻦ اﻟﻮاﺿﺢ أن ﻫﺬا ﻳﻘﺘﻀﻲ أن‬
‫ﻳﺘﻌﺮف اﳌﻌﻠﻢ ﺑﺸﻜﻞ ﻣﺘﺠﺪد ﻋﻠﻰ ﻧﺘﺎﺋﺞ اﻟﺪراﺳﺎت واﻷﲝﺎث اﻟﱰﺑﻮﻳﺔ‪ ،‬وأن ﻳﺘﺪرب ﻋﻠﻰ ﻛﻴﻔﻴﺔ ﺗﻄﺒﻴﻘﻬﺎ‪.‬‬

‫ﻟﻘﺪ ﻛﺎن ﺗﺮﻛﻴﺰ اﻟﺘﻌﻠﻴﻢ ﰲ اﳌﺎﺿﻲ ﻋﻠﻰ ﲢﺼﻴﻞ اﳌﻌﻠﻮﻣﺎت اﺳﺘﻴﻌﺎﻬﺑﺎ واﺳﺘﻈﻬﺎرﻫﺎ‪ ،‬وﻗﺪ ﻛﺎن ذﻟﻚ ﳑﻜﻨﺎً ﻣﻨﺬ ﺑﻀﻌﺔ ﻋﻘﻮد‪ ،‬ﻓﻘﺪ ﻛﺎن اﻟﻨﻤﻮ‬
‫اﳌﻌﺮﰲ ﻓﻴﻤﺎ ﻣﻀﻰ ﺑﻄﻴﺌﺎً ﻧﺴﺒﻴﺎً‪ ،‬وﻗﺪ ﺗﺄﺛﺮت ﻣﻌﺪﻻت ﳕﻮ اﳌﻌﺮﻓﺔ ﻋﻠﻰ ﻣﺮ اﻟﻌﺼﻮر ﺑﺎﻟﺘﻄﻮر اﻟﺬي ﺣﺪث ﰲ وﺳﺎﺋﻞ ﻧﺸﺮ اﳌﻌﻠﻮﻣﺎت وﻧﻘﻠﻬﺎ‪.‬‬
‫وﻣﻊ ﻗﺪوم ﺗﻜﻨﻮﻟﻮﺟﻴﺎ اﻹﻟﻜﱰوﻧﻴﺎت‪ ،‬أﺻﺒﺢ ﻫﻨﺎك ﺗﺰاﻳﺪ ﻣﺘﺴﺎرع ﰲ اﻧﺘﺸﺎر اﳌﻌﻠﻮﻣﺎت‪ ،‬ﺣﻴﺚ أن اﻟﻌﺼﺮ اﻟﺬي ﻧﻌﻴﺶ ﻓﻴﻪ اﻟﻴﻮم‪ ،‬ﻳﺸﻬﺪ ازدﻳﺎداً‬
‫ﰲ ﺻﻨﻊ اﳌﻌﺮﻓﺔ ﲟﻌﺪﻻت ﱂ ﻳﺴﺒﻖ ﳍﺎ ﻣﺜﻴﻞ‪ ،‬اﻷﻣﺮ اﻟﺬي ﺟﻌﻞ اﻹﺣﺎﻃﺔ ﲟﺎ ﻳﺴﺘﺠﺪ ﻣﻦ ﻣﻌﻠﻮﻣﺎت ﰲ ﻣﻴﺎدﻳﻦ اﻟﺘﺨﺼﺺ أﻣﺮاً ﻳﻜﺎد أن ﻳﻜﻮن‬
‫ﻣﺴﺘﺒﻌﺪاً‪ ،‬إﻻ ﻣﻦ ﺧﻼل اﳌﺘﺎﺑﻌﺔ ﺑﺎﻟﺘﺪرﻳﺐ اﳌﺴﺘﻤﺮ اﻟﺬي ﻳﻌﺪ ﻣﻦ أﻫﻢ اﻟﺴﺒﻞ ﳌﺘﺎﺑﻌﺔ ﺗﻠﻚ اﻟﺘﻄﻮرات ﰲ ﻋﺼﺮ اﻟﺘﻔﺠﺮ اﳌﻌﺮﰲ اﳌﺘﻨﺎﻣﻲ‬
‫واﻧﻌﻜﺎﺳﺎﺗﻪ اﻟﱰﺑﻮﻳﺔ اﻟﱵ ﻧﺬﻛﺮ ﻣﻨﻬﺎ‪:‬‬

‫إن ﳏﺘﻮى اﻟﺘﻌﻠﻴﻢ ﺳﺮﻳﻊ اﻟﺘﻐﲑ‪ ،‬وأن اﳌﻨﺎﻫﺞ اﻟﺪراﺳﻴﺔ ﻻ ﳝﻜﻦ أن ﺗﺒﻘﻰ ﺛﺎﺑﺘﺔ ﻣﺴﺘﻘﺮة‪ ،‬وأن ﺳﺮﻋﺔ ﺗﻐﲑ اﳌﻌﺮﻓﺔ ﲡﻌﻞ ﻣﻦ اﻟﺼﻌﺐ‬ ‫‹‬
‫ﻋﻠﻰ اﻟﻔﺮد أن ﻳﻼﺣﻘﻬﺎ وأن ﻳﻀﺒﻄﻬﺎ‪ ،‬وﻟﺬﻟﻚ ﳛﺎول أن ﻳﺘﻜﻴﻒ ﻣﻌﻬﺎ‪.‬‬

‫إن ﺗﻜﻴﻒ اﻟﻔﺮد ﻣﻊ اﳌﻌﺮﻓﺔ اﳌﺘﻔﺠﺮة ﻟﻦ ﻳﺄﰐ ﲝﻔﻈﻪ ﻟﻠﻤﻌﻠﻮﻣﺎت واﺳﺘﻈﻬﺎرﻫﺎ‪ ،‬وﻟﻜﻦ ﺑﺈﺗﻘﺎﻧﻪ ﻃﺮﻳﻘﺔ اﻟﻮﺻﻮل إﱃ اﳌﻌﺮﻓﺔ؛ ﻷن ﻛﻴﻔﻴﺔ‬ ‫‹‬
‫اﻟﺘﻌﻠﻢ أﻫﻢ ﻣﻦ ﻣﺎدﺗﻪ‪ ،‬ﻛﻤﺎ أن اﺧﺘﺰان اﳌﻌﻠﻮﻣﺎت واﺳﺘﺪﻋﺎﺋﻬﺎ أﺻﺒﺤﺖ ﻟﻪ أوﻋﻴﺔ أﺧﺮى‪.‬‬

‫إن أﺳﺎﻟﻴﺐ اﻟﺘﻌﻠﻴﻢ ﻻﺑﺪ أن ﺗﺘﺄﺛﺮ ﺑﺎﻟﺘﻜﻨﻮﻟﻮﺟﻴﺎ اﻟﱵ ﺻﺎﺣﺒﺖ اﻻﻧﻔﺠﺎر اﳌﻌﺮﰲ‪ ،‬وﻻﺑﺪ ﻣﻦ اﺳﺘﺤﺪاث ﺗﻜﻨﻮﻟﻮﺟﻴﺎ ﺗﻌﻠﻴﻤﻴﺔ ﺗﺮﻓﻊ ﻣﻦ‬ ‫‹‬
‫اﻟﻜﻔﺎءة اﻹﻧﺘﺎﺟﻴﺔ ﻟﻠﻤﻌﻠﻢ وﲤﻜﻨﻪ ﻣﻦ ﲢﻘﻴﻖ اﳌﺰﻳﺪ ﻣﻦ اﻷﻫﺪاف اﻟﺘﻌﻠﻴﻤﻴﺔ ﰲ وﻗﺖ أﻗﺼﺮ‪.‬‬

‫إن اﻻﻧﻔﺠﺎر اﳌﻌﺮﰲ اﻟﺬي ﻳﺸﻬﺪﻩ ﻋﺼﺮﻧﺎ‪ ،‬وﲞﺎﺻﺔ ﰲ ﳎﺎﱄ اﻟﻌﻠﻮم واﻟﺘﻜﻨﻮﻟﻮﺟﻴﺎ‪ ،‬ﻳﻔﺮض ﻋﻠﻰ اﳌﻌﻠﻢ أن ﻳﺒﻘﻰ ﻋﻠﻰ اﻃﻼع داﺋﻢ‬ ‫‹‬
‫ﺑﺎﳌﺴﺘﺠﺪات ﰲ ﳎﺎل ﲣﺼﺼﻪ‪ ،‬وﻣﻦ ﰒ ﻓﺈن ﻋﺪم ﻣﻮاﻛﺒﺔ اﳌﻌﻠﻢ ﳍﺬﻩ اﳌﺴﺘﺠﺪات ﳚﻌﻠﻪ ﻏﲑ ﻗﺎدر ﻋﻠﻰ ﻣﻮاﺟﻬﺔ اﻟﺘﺤﺪﻳﺎت‪ ،‬ﻷﻧﻪ‬
‫ﰲ ﻫﺬﻩ اﳊﺎﻟﺔ ﺳﻮف ﻳﺰود اﻟﻄﻼب ﲟﻌﻠﻮﻣﺎت وﻣﻌﺎرف ﻗﺪﳝﺔ‪ ،‬وﻳﻜﺴﺒﻬﻢ ﻣﻬﺎرات ﻏﲑ ﻗﺎﺑﻠﺔ ﻟﻼﻧﺘﻘﺎل واﻟﺘﻄﺒﻴﻖ ﰲ اﻟﻮاﻗﻊ اﻟﻌﻤﻠﻲ‪.‬‬

‫ﻟﻘﺪ أﺳﻔﺮ اﻟﺘﻘﺪم اﻟﻌﻠﻤﻲ واﻟﺘﻜﻨﻮﻟﻮﺟﻲ اﳍﺎﺋﻞ اﻟﺬي ﻧﻮاﺟﻬﻪ اﻟﻴﻮم ﻋﻦ ﺑﺰوغ ﺛﻮرة ﰲ اﻟﺒﺤﺚ اﻟﻌﻠﻤﻲ وأدواﺗﻪ وﳎﺎﻻﺗﻪ‪ ،‬وﺗﺼﺎﻋﺪت أﻋﺪاد‬
‫اﳌﺸﺘﻐﻠﲔ ﺑﻪ‪ ،‬وﻛﺎن ﻟﻪ أﺛﺮ ﻣﻠﻤﻮس ﻋﻠﻰ ﻋﻤﻠﻴﱵ اﻟﺘﻌﻠﻴﻢ واﻟﺘﻌﻠﻢ‪ ،‬وﻟﻪ اﻧﻌﻜﺎﺳﺎﺗﻪ اﻟﱰﺑﻮﻳﺔ اﻟﱵ ﻧﺬﻛﺮ ﻣﻨﻬﺎ‪:‬‬

‫ﺗﻄﻮر اﻟﱰﺑﻴﺔ ﰲ ﻣﻔﻬﻮﻣﻬﺎ وﳏﺘﻮاﻫﺎ وﻃﺮﻗﻬﺎ وأﺳﺎﻟﻴﺒﻬﺎ أدواﻬﺗﺎ‪ ،‬ﳑﺎ ﺟﻌﻠﻬﺎ ﻋﻠﻤﺎً ﻗﺎﺋﻤﺎً ﺑﺬاﺗﻪ‪ ،‬ﺗﺘﺨﺬ اﻟﺒﺤﺚ اﻟﻌﻠﻤﻲ أﺳﻠﻮﺑﺎً وأداة رﺋﻴﺴﺔ‬ ‫‹‬
‫ﻟﺘﻄﻮرﻫﺎ‪ ،‬وأﺻﺒﺢ اﻟﻌﻤﻞ اﻟﱰﺑﻮي ﻻ ﻳﻘﺘﺼﺮ ﻓﻘﻂ ﻋﻠﻰ ﻧﻘﻞ اﳌﻌﻠﻮﻣﺎت‪ ،‬ﺑﻞ ﴰﻠﺖ اﻟﻄﺮق واﻷﺳﺎﻟﻴﺐ اﻟﱵ ﲤﻜﻦ اﻟﻔﺮد ﻣﻦ اﻛﺘﺴﺎب اﳌﻌﺮﻓﺔ‬
‫ﺑﺎﻻﻋﺘﻤﺎد ﻋﻠﻰ ﻧﺸﺎﻃﻪ اﻟﺬاﰐ‪.‬‬

‫ﺗﻄﻮرت اﳌﺴﺘﺤﺪﺛﺎت ﰲ ﳎﺎل ﺗﻜﻨﻮﻟﻮﺟﻴﺎ اﻟﺘﻌﻠﻴﻢ‪ ،‬وازدادت أﳘﻴﺘﻬﺎ‪ ،‬وﲞﺎﺻﺔ اﳊﺪﻳﺜﺔ ﻣﻨﻬﺎ ﻟﻜﻮ�ﺎ أداة ﻤﻟﺘﻤﻊ ﻟﺘﺤﻘﻴﻖ اﻟﺘﻨﻤﻴﺔ ﰲ ﻋﻤﻠﻴﱵ‬ ‫‹‬
‫اﻟﺘﻌﻠﻴﻢ واﻟﺘﻌﻠﻢ‪.‬‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪186‬‬
‫‪24‬‬ ‫اﻟﻔﺼﻞ اﻟﺮاﺑﻊ | ‪Chapter 4‬‬

‫ﻇﻬﺮت أﳕﺎط وﺳﻴﺎﺳﺎت ﺟﺪﻳﺪة ﻟﻠﺘﻌﻠﻴﻢ‪ ،‬ﻓﻈﻬﺮ اﻟﺘﻌﻠﻴﻢ اﳌﻔﺘﻮح‪ ،‬واﻟﺘﻌﻠﻴﻢ ﻣﻦ ﺑﻌﺪ واﻟﺘﻌﻠﻢ اﳌﺴﺘﻤﺮ ﻣﺪى اﳊﻴﺎة‪.‬‬ ‫‹‬

‫ﺗﻀﺎﻋﻔﺖ ﻣﺴﺆوﻟﻴﺎت اﳌﻌﻠﻤﲔ اﻟﺬﻳﻦ أﺻﺒﺢ ﻟﺰاﻣﺎً ﻋﻠﻴﻬﻢ اﻟﺘﻌﺎﻣﻞ ﻣﻊ ﻛﻞ ﻫﺬا اﻟﺘﻄﻮر اﻟﻌﻠﻤﻲ اﻟﺘﻜﻨﻮﻟﻮﺟﻲ اﳍﺎﺋﻞ‪ ،‬وﻟﺘﺤﻘﻴﻖ ﻫﺬا أﺻﺒﺢ‬ ‫‹‬
‫اﳌﻌﻠﻢ ﰲ ﺳﺒﺎق ﻣﻊ اﻟﺰﻣﻦ‪ ،‬وﻣﻦ ﻫﻨﺎ ﻧﺒﻊ اﺣﺘﻴﺎﺟﻪ اﻟﺸﺪﻳﺪ ﻻﺳﺘﺨﺪام ﺗﻜﻨﻮﻟﻮﺟﻴﺎ اﻟﺘﻌﻠﻴﻢ اﳊﺪﻳﺜﺔ‪ ،‬اﻟﱵ ﺳﻮف ﻳﻮﻇﻔﻬﺎ ﺿﻤﻦ اﻟﻨﻈﺎم‬
‫اﻟﺘﻌﻠﻴﻤﻲ اﻟﺸﺎﻣﻞ ﻟﺘﺤﻘﻴﻖ أﻫﺪاﻓﻪ اﻟﱰﺑﻮﻳﺔ ﰲ أﻗﺼﺮ وﻗﺖ وﺑﺄﻓﻀﻞ اﻟﺴﺒﻞ‪.‬‬

‫إن اﻟﺜﻮرة اﻟﺘﻜﻨﻮﻟﻮﺟﻴﺔ أﺣﺪﺛﺖ ﺗﻐﻴﲑات ﺟﺬرﻳﺔ ﰲ اﻟﻌﺎﱂ‪ ،‬ﺣﻴﺚ ﺗﻨﺪﺛﺮ ﻣﻬﻦ وﲣﺼﺼﺎت ﻗﺪﳝﺔ وﺗﻨﺸﺄ ﻣﻬﻦ وﲣﺼﺼﺎت ﺟﺪﻳﺪة ﻳﻮﻣﻴﺎً‪،‬‬ ‫‹‬
‫وﻣﻦ ﻫﻨﺎ ﻳﺄﰐ ﺗﻄﻮﻳﺮ اﻟﺘﻌﻠﻴﻢ ﻛﻀﺮورة ﺣﺘﻤﻴﺔ ﻟﻜﻮﻧﻪ اﻷداة اﻟﻘﺎدرة ﻋﻠﻰ ﺗﻄﻮﻳﺮ إﻣﻜﺎﻧﺎت اﻟﻔﺮد ﲟﺎ ﳝﻜﻨﻪ ﻣﻦ اﻟﺘﻔﺎﻋﻞ ﻣﻊ ﺗﻜﻨﻮﻟﻮﺟﻴﺎ‬
‫اﻟﻌﺼﺮ‪.‬‬

‫إن ﻣﺜﻞ ﻫﺬﻩ اﻟﺘﺤﺪﻳﺎت ﲢﺘﺎج إﱃ ﻧﻮﻋﻴﺔ ﺟﺪﻳﺪة ﻣﻦ اﻟﺘﻌﻠﻴﻢ‪ ،‬ﺗﻌﻠﻴﻢ ﺷﺎﻣﻞ وﻣﺘﻜﺎﻣﻞ‪ ،‬ﻗﺎدر ﻋﻠﻰ ﺗﻴﺌﺔ اﻷﻓﺮاد ﻟﻠﻤﺸﺎرﻛﺔ اﻟﻌﻘﻠﻴﺔ ﰲ ﻋﺎﱂ ﻳﺘﺰاﻳﺪ‬
‫ﻓﻴﻪ ﺗﺄﺛﲑ اﻟﻌﻠﻢ واﻟﺘﻜﻨﻮﻟﻮﺟﻴﺎ‪ ،‬ﻛﻤﺎ ﻳﺘﺤﺘﻢ ﻋﻠﻰ اﻟﺘﻌﻠﻴﻢ اﳌﺴﺘﻘﺒﻠﻲ أن ﻳﺴﺎﻫﻢ ﰲ إﻧﺸﺎء ﻗﻮاﻋﺪ ﻋﻠﻤﻴﺔ وﺗﻜﻨﻮﻟﻮﺟﻴﺔ‪ ،‬وإﻋﺪاد اﻟﻜﻔﺎءات اﻟﻌﻠﻤﻴﺔ‬
‫واﻟﺘﻘﻨﻴﺔ اﻟﻜﺎﻓﻴﺔ ﻣﻦ أﺟﻞ اﻟﺘﻨﻤﻴﺔ اﻻﺟﺘﻤﺎﻋﻴﺔ‪ ،‬ﻛﻤﺎ أن اﻟﺘﻄﻮر اﳌﻌﺮﰲ واﻟﺘﻜﻨﻮﻟﻮﺟﻲ اﳌﺘﺴﺎرع ﻳﺴﺘﺪﻋﻲ اﻻﻋﺘﻤﺎد ﻋﻠﻰ ﻣﺒﺪأ اﻟﺘﻌﻠﻢ اﻟﺬاﰐ‬
‫ﻛﻬﺪف أﺳﺎﺳﻲ ﰲ ﻋﻤﻠﻴﺔ اﻟﺘﻌﻠﻢ‪ ،‬واﻻﻋﺘﻤﺎد ﻋﻠﻰ اﻟﻌﻤﻞ اﳉﻤﺎﻋﻲ‪ ،‬وﺗﺒﺎدل اﻷﻓﻜﺎر‪ ،‬واﻟﺘﺨﻄﻴﻂ اﳌﺸﱰك‪ ،‬واﳊﺮﻳﺔ ﰲ اﲣﺎذ اﻟﻘﺮار‪ ،‬واﻟﺘﻮﺟﻪ‬
‫ﻟﺘﺸﺠﻴﻊ اﻟﻄﻼب ﻋﻠﻰ اﻹﺑﺪاع واﻟﺘﻤﻴﺰ‪.‬‬

‫إﻧﻨﺎ ﰲ ﻇﻞ ﻫﺬﻩ اﻟﺘﺤﺪﻳﺎت وﻫﺬﻩ اﳌﺘﻐﲑات ﲝﺎﺟﺔ ﻣﺎﺳﺔ إﱃ ﲢﺴﲔ ﻣﺆﺳﺴﺎﺗﻨﺎ اﻟﺘﻌﻠﻴﻤﻴﺔ وﲢﻘﻴﻖ ﻣﻌﺎﻳﲑ اﳉﻮدة داﺧﻠﻬﺎ‪ ،‬ﺣﻴﺚ إن ﻣﻔﻬﻮم‬
‫اﳉﻮدة ﰲ ﻤﻟﺎل اﻟﺘﻌﻠﻴﻤﻲ ﻳﻌﲏ اﳊﻜﻢ ﻋﻠﻰ ﻣﺴﺘﻮى ﲢﻘﻴﻖ اﻷﻫﺪاف‪ ،‬ﻛﻤﺎ ان ﻗﻴﻤﺔ ﻫﺬا اﻹﳒﺎز وﻫﺬا اﳊﻜﻢ ﻳﺮﺗﺒﻂ ﺑﺎﻷﻧﺸﻄﺔ أو اﳌﺨﺮﺟﺎت‬
‫اﻟﱵ ﺗﺘﺴﻢ ﺑﺒﻌﺾ اﳌﻼﻣﺢ واﳋﺼﺎﺋﺺ ﰲ ﺿﻮء ﺑﻌﺾ اﳌﻌﺎﻳﲑ واﻷﻫﺪاف اﳌﺘﻔﻖ ﻋﻠﻴﻬﺎ‪.‬‬

‫ﻓﺈﱃ ﻣﱴ ﺗﻨﺎدي ﻛﺜﲑ ﻣﻦ اﳌﺆﺳﺴﺎت اﻟﺘﻌﻠﻴﻤﻴﺔ ﲟﻔﻬﻮم اﳉﻮدة‪ ،‬ﰲ ﺣﲔ ﳒﺪ ﻫﺬﻩ اﳌﺆﺳﺴﺎت ﲟﻨﺄى ﻋﻦ ﺣﻘﻴﻘﺔ ﻫﺬا اﳌﻔﻬﻮم اﻟﺬي أﺻﺒﺢ‬
‫ﺿﺮورة ﺣﻀﺎرﻳﺔ ﻣﻠﺤﺔ؛ وﻣﻦ ﻫﻨﺎ ﻓﺈﻧﻪ ﳚﺐ اﻟﻘﻴﺎم ﺑﻌﻤﻞ ﻣﺆﺳﺴﻲ ﻳﻀﻤﻦ ﻟﻨﺎ ﻣﻌﺎﻳﲑ ﻣﻘﻨﻨﺔ ﻟﻀﻤﺎن اﳉﻮدة ﰲ ﻣﺆﺳﺴﺎﺗﻨﺎ اﻟﺘﻌﻠﻴﻤﻴﺔ‪ .‬وﺑﺎﻟﻨﻈﺮ إﱃ‬
‫واﻗﻊ ﻣﺆﺳﺴﺎﺗﻨﺎ اﻟﺘﻌﻠﻴﻤﻴﺔ ﰲ اﻟﻮﻃﻦ اﻟﻌﺮﰊ‪ ،‬إرﻫﺎﺻﺎﻬﺗﺎ اﳌﺴﺘﻘﺒﻠﻴﺔ‪ ،‬ﳒﺪ أﻧﻪ ﻋﻠﻰ اﻟﺮﻏﻢ ﳑﺎ ﺣﻘﻘﺘﻪ ﻣﻦ إﳒﺎزات‪ ،‬ﻏﻠﺐ اﻟﻄﺎﺑﻊ اﻟﻜﻤﻲ ﻋﻠﻰ‬
‫ﻣﻌﻈﻤﻬﺎ ﰲ أﻛﺜﺮ اﻷﺣﻴﺎن‪ ،‬ﻛﻤﺎ أ�ﺎ ﻻ ﺗﺰال ﻗﺎﺻﺮة ﻋﻦ ﲢﻘﻴﻖ اﻟﻄﻤﻮﺣﺎت ﺗﺎرة‪ ،‬وﳐﻴﺒﺔ ﻟﻠﺘﻮﻗﻌﺎت ﺗﺎرة أﺧﺮى‪ ،‬وﻳﻜﺎد ﻳﻨﺒﺊ ذﻟﻚ ﻛﻠﻪ ﺑﻌﻤﻖ‬
‫اﻷزﻣﺔ اﻟﱵ ﺗﻮاﺟﻪ ﺗﻠﻚ اﳌﺆﺳﺴﺎت‪ ،‬وﻳﱪر اﳊﺎﺟﺔ اﳌﻠﺤﺔ ﻟﻠﺘﻄﻮﻳﺮ اﻟﺸﺎﻣﻞ ﻟﻜﺎﻓﺔ ﻋﻨﺎﺻﺮﻫﺎ ﺑﺪءاً ﺪﺧﻼﻬﺗﺎ وﻣﺮوراً ﻌﻤﻠﻴﺎﻬﺗﺎ واﻧﺘﻬﺎءً ﺑﻨﻮاﲡﻬﺎ‬
‫اﻟﺘﻌﻠﻴﻤﻴﺔ‪ .‬وﻟﺴﻨﺎ ﲝﺎﺟﺔ إﱃ ﺗﻜﺮار إﺷﻜﺎﻟﻴﺎت وﻗﻀﺎﻳﺎ اﻷﻧﻈﻤﺔ اﻟﺘﻌﻠﻴﻤﻴﺔ ﰲ اﻟﻮﻃﻦ اﻟﻌﺮﰊ‪ ،‬ﺣﻴﺚ إن ﻋﺪﻳﺪاً ﻣﻦ اﻟﺪراﺳﺎت واﻟﺒﺤﻮث ذات‬
‫اﻟﻌﻼﻗﺔ ﺑﺎﻟﻮﺿﻊ اﻟﺮاﻫﻦ أو اﻟﺮؤى اﻻﺳﺘﺸﺮاﻓﻴﺔ ﻗﺪ أﺳﻬﺒﺖ ﰲ ﻫﺬا اﻷﻣﺮ ﺳﻮاء أﻛﺎن ﻋﻠﻰ ﻣﺴﺘﻮى اﳌﻨﻈﻤﺎت واﳍﻴﺌﺎت واﻷﺟﻬﺰة اﻟﱰﺑﻮﻳﺔ‪ ،‬أم‬
‫ﻋﻠﻰ ﻣﺴﺘﻮى اﳌﺒﺎدرات اﻟﻔﺮدﻳﺔ ﻟﻌﺪﻳﺪ ﻣﻦ اﳌﺘﺨﺼﺼﲔ وأﺳﺎﺗﺬة اﳉﺎﻣﻌﺎت ﰲ ﳎﺎﻻت اﻟﱰﺑﻴﺔ ﰲ ﺳﺎﺋﺮ اﻟﺒﻠﺪان اﻟﻌﺮﺑﻴﺔ‪.‬‬

‫ﻣﻘﺪﻣﺔ ﺣﻮل اﻟﺘﻌﻠﻴﻢ اﻟﻬﻨﺪﺳﻲ )‪:(Introduction to Engineering Education‬‬ ‫‪2-4‬‬

‫ﻳﻌﺘﱪ اﻟﺘﻌﻠﻴﻢ اﳍﻨﺪﺳﻲ ﻣﻮﺿﻮﻋﺎً ﻣﺘﻌﺪد اﻻﺧﺘﺼﺎﺻﺎت‪ ،‬ﻳﺘﻌﻠﻖ ﺑﺎﻟﻌﺪﻳﺪ ﻣﻦ اﳊﻘﻮل اﳌﻌﺮﻓﻴﺔ اﳌﺨﺘﻠﻔﺔ]‪ ،[491,492‬وﲢﺪﻳﺪاً ﻣﻨﻬﺠﻴﺎت اﻟﺒﺤﺚ‬
‫اﻟﻌﻠﻤﻲ اﻻﺟﺘﻤﺎﻋﻲ ”‪ ،(Social Science Research Methods) “SSRM‬وﻧﻈﺮﻳﺎت ﻋﻠﻮم أﺻﻮل اﻟﺘﺪرﻳﺲ أو اﻟﻨﻈﺮﻳﺎت‬
‫اﻟﺒﻴﺪاﻏﻮﺟﻴﺔ )‪ ،(Pedagogical Theories‬اﻟﱵ ﺗﺘﺤﺪ ﻣﻊ ﺑﻌﻀﻬﺎ ﻟﺘﺸﻜﻞ ﻣﻮﺿﻮﻋﺎت أﲝﺎث اﻟﺘﻌﻠﻴﻢ اﳍﻨﺪﺳﻲ‪ .‬اﻟﺸﻜﻞ‪ 1-4‬ﻳﺒﲔ اﳌﺨﻄﻂ‬

‫‪187‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Engineering Education Methodologies‬‬ ‫ﻣﻨﻬﺠﻴﺎت اﻟﺘﻌﻠﻴﻢ اﳍﻨﺪﺳﻲ |‬

‫اﻟﺘﻤﺜﻴﻠﻲ ﳌﻮﺿﻮع ﻣﺒﺤﺚ اﻟﺘﻌﻠﻴﻢ اﳍﻨﺪﺳﻲ‪ ،‬ﺣﻴﺚ أن اﻟﻨﻈﺮﻳﺎت اﻟﺘﻌﻠﻴﻤﻴﺔ وﻣﻨﻬﺠﻴﺎت اﻟﺒﺤﺚ اﻟﺘﻌﻠﻴﻤﻲ ﻳﺘﻢ ﺗﻄﺒﻴﻘﻬﺎ ﻋﻠﻰ اﳌﻨﻬﺞ اﻟﺪراﺳﻲ‬
‫اﳍﻨﺪﺳﻲ ﻋﻠﻰ ﳏﻮري اﻟﺘﻌﻠﻢ واﻟﺘﻌﻠﻴﻢ وﻳﻨﺘﺞ اﻟﺘﻌﻠﻴﻢ اﳍﻨﺪﺳﻲ‪.‬‬

‫‪Pedagogical Theories‬‬
‫‪Curricula‬‬
‫‪Engineering‬‬
‫‪Apply‬‬ ‫‪Engineering‬‬ ‫‪Results‬‬
‫‪Education‬‬
‫‪Educational Research‬‬ ‫‪Teaching & Learning‬‬
‫‪Methods‬‬

‫اﻟﺸﻜﻞ ‪ 1-4‬اﳌﺨﻄﻂ اﻟﺘﻤﺜﻴﻠﻲ ﳌﺒﺤﺚ اﻟﺘﻌﻠﻴﻢ اﳍﻨﺪﺳﻲ‬

‫ﻳﻌﺘﱪ ﻣﺒﺤﺚ اﻟﺘﻌﻠﻴﻤﻲ اﳍﻨﺪﺳﻲ ﻓﺮع ﺟﺪﻳﺪ ﻣﻦ ﻓﺮوع اﻟﻌﻠﻢ اﻟﺬي ﻣﺎزال ﰲ ﻃﻮر اﻟﺘﺄﺳﻴﺲ]‪ ،[491‬وﻻ ﻳﺰال اﳉﺪل ﻗﺎﺋﻤﺎً ﺣﻮل إﻣﻜﺎﻧﻴﺔ اﻋﺘﺒﺎر‬
‫ٍ‬
‫ﺑﺸﻜﻞ ﳚﻌﻞ ﻣﻨﻪ ﻋﻠﻤﺎً ﻗﺎﺋﻤﺎً ﲝﺪ ذاﺗﻪ ﻣﻦ ﺑﲔ اﻟﻌﻠﻮم واﳌﻌﺎرف]‪.[493‬‬ ‫اﻟﺘﻌﻠﻴﻢ اﳍﻨﺪﺳﻲ ﺗﻄﻮر‬

‫ﻳﺼﻒ]‪ [494‬اﻟﺒﺤﺚ ﰲ اﳌﻤﺎرﺳﺎت اﻻﺑﺘﻜﺎرﻳﺔ اﻟﺘﺪرﻳﺒﻴﺔ ﰲ اﻟﺘﻌﻠﻴﻢ اﳍﻨﺪﺳﻲ ﰲ اﻟﻔﱰة ﺣﱴ ﻣﻨﺘﺼﻒ اﻟﺜﻤﺎﻧﻴﻨﺎت ﺑﺎﳌﻘﻮﻟﺔ اﻟﺸﻬﲑة "ﳓﻦ ﺟﺮﺑﻨﺎﻫﺎ‬
‫وأﺣﺒﺒﻨﺎﻫﺎ وﻛﺬﻟﻚ أﺣﺒﻬﺎ اﻟﻄﻼب"‪.‬‬

‫إن ﻣﺒﺤﺚ اﻟﺘﻌﻠﻴﻢ اﳍﻨﺪﺳﻲ ﳏﺪود‪ ،‬إﻣﺎ ﻛﻤﻴﺎً أو ﻧﻮﻋﻴﺎً وذﻟﻚ ﺑﺴﺒﺐ اﻟﻌﺪﻳﺪ ﻣﻦ اﻟﻌﻮاﻣﻞ‪ ،‬ﻓﻌﻠﻰ ﺳﺒﻴﻞ اﳌﺜﺎل‪ :‬ﳛﺘﺎج ﻣﺒﺤﺚ اﻟﺘﻌﻠﻴﻢ اﳍﻨﺪﺳﻲ‬
‫اﻟﻔﻌﺎل واﺎﺷﺮ ﻣﻌﺮﻓﺔ ﲟﺨﺘﻠﻒ اﻟﻨﻈﺮﻳﺎت واﻷﲝﺎث اﻟﻘﺎﺋﻤﺔ ﰲ اﺠﻤﻟﺎﻻت اﳍﻨﺪﺳﻴﺔ]‪ ،[494‬إﺿﺎﻓﺔً إﱃ ذﻟﻚ‪ ،‬ﻳﺘﻢ ﺗﻘﻴﻴﻢ اﳌﺪرﺳﲔ واﶈﺎﺿﺮﻳﻦ ﰲ‬
‫ﻟﺎل اﳍﻨﺪﺳﻲ اﻋﺘﻤﺎداً ﻋﻠﻰ دﻗﺔ أﲝﺎﺛﻬﻢ وﺟﻮدﻬﺗﺎ‪ ،‬واﻟﻘﻠﻴﻞ ﻣﻦ ﻳﻜﺎﻓﺄ ﻻﻣﺘﻴﺎزﻩ أو ﳉﺪارﺗﻪ ﰲ ﺗﻘﺪﱘ ﲝﺚ ﰲ اﻟﺘﻌﻠﻴﻢ واﻟﺘﻌﻠﻢ]‪.[493-495‬‬

‫ﻳﻠﻌﺐ ﺗﻮﻓﺮ اﻟﺘﻤﻮﻳﻞ وﻛﺬﻟﻚ ﺗﻐﻴﲑ ﻧﻈﺎم اﳌﻜﺎﻓﺂت اﳋﺎص ﺑﺎﻟﱰﻗﻲ اﻟﻮﻇﻴﻔﻲ ﺿﻤﻦ اﳌﺆﺳﺴﺎت اﻟﺘﻌﻠﻴﻤﻴﺔ اﳍﻨﺪﺳﻴﺔ‪ ،‬وإﳚﺎد ﺗﻌﺎون ﻣﻊ ﺧﱪاء ﰲ‬
‫ﻋﻠﻢ اﻟﻨﻔﺲ وﻋﻠﻮم اﻟﱰﺑﻴﺔ واﻟﻌﻠﻮم اﻻﺟﺘﻤﺎﻋﻴﺔ‪ ،‬دوراً أﺳﺎﺳﻴﺎً ﰲ ﺗﻘﺪﱘ ﻣﻨﺢ ﺗﻌﻠﻴﻤﻴﺔ ﰲ اﻟﺘﻌﻠﻴﻢ اﳍﻨﺪﺳﻲ]‪ .[491,494,496‬ﻓﻤﺜﻼً‪ ،‬إن ﺗﻮﻓﺮ اﻟﺘﻤﻮﻳﻞ‬
‫ﰲ اﳌﻤﻠﻜﺔ اﳌﺘﺤﺪة ﻟﺘﺄﺳﻴﺲ ﻣﺮﻛﺰ اﻷﲝﺎث اﳍﻨﺪﺳﻴﺔ]‪ [497‬واﳌﺮﻛﺰ اﳍﻨﺪﺳﻲ ﻟﻺﺑﺪاع ﰲ اﻟﺘﻌﻠﻴﻢ واﻟﺘﻌﻠﻢ]‪ [498‬أﻋﻄﻰ دﻓﻌﺎً ﻫﺎﺋﻼً ﻟﻠﺘﻌﻠﻴﻢ اﳍﻨﺪﺳﻲ‬
‫ﰲ ﻛﺎﻓﺔ أﳓﺎء اﳌﻤﻠﻜﺔ اﳌﺘﺤﺪة‪ ،‬ﻓﻘﺪ ﺣﺎزت ﻋﻠﻰ اﻟﺼﺪارة ﰲ أورﺑﺎ ﰲ ﳎﺎﻻت اﻷﲝﺎث اﻟﺘﻌﻠﻴﻤﻴﺔ اﳍﻨﺪﺳﻴﺔ‪ ،‬وﻫﻨﺎك اﻟﻌﺪﻳﺪ ﻣﻦ ﻤﻟﻼت اﻟﺒﺤﺜﻴﺔ‬
‫اﻟﱪﻳﻄﺎﻧﻴﺔ اﻷﻛﺎدﳝﻴﺔ اﳌﺘﺨﺼﺼﺔ ﰲ اﻟﺘﻌﻠﻴﻢ اﳍﻨﺪﺳﻲ ﻣﺜﻞ‪:‬‬

‫”‪ :“Engineering Education‬ﳎﻠﺔ أﲝﺎث اﻟﺘﻌﻠﻴﻢ اﳍﻨﺪﺳﻲ )‪.(EE‬‬ ‫‹‬

‫”‪ :“International Journal of Electrical Engineering Education‬ﳎﻠﺔ اﻷﲝﺎث اﻟﻌﺎﳌﻴﺔ ﻟﻠﺘﻌﻠﻴﻢ اﳍﻨﺪﺳﻲ ﰲ‬ ‫‹‬
‫اﳍﻨﺪﺳﺔ اﻟﻜﻬﺮﺑﺎﺋﻴﺔ )‪.(IJEEE‬‬
‫”‪ :“International Journal of Mechanical Engineering Education‬ﳎﻠﺔ اﻷﲝﺎث اﻟﻌﺎﳌﻴﺔ ﻟﻠﺘﻌﻠﻴﻢ اﳍﻨﺪﺳﻲ ﰲ‬ ‫‹‬
‫اﳍﻨﺪﺳﺔ اﳌﻴﻜﺎﻧﻴﻜﻴﺔ )‪.(IJMEE‬‬
‫ﻛﻤﺎ أن ‪ IJMEE & IJEEE‬ﲤﺜﻼن اﻟﻨﻮاة اﻷوﱃ ﻟﻠﻤﺠﻠﺔ ”‪“European Journal of Engineering Education‬‬ ‫‹‬
‫)‪ (EJEE‬واﻟﱵ ﺗﻌﺪ اﻟﻮﺣﻴﺪة ﰲ ﳎﺎﳍﺎ ﻋﻠﻰ ﻣﺴﺘﻮى اﻟﻘﺎرة اﻷورﺑﻴﺔ‪.‬‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪188‬‬
‫‪24‬‬ ‫اﻟﻔﺼﻞ اﻟﺮاﺑﻊ | ‪Chapter 4‬‬

‫ﻋﻠﻰ ﻣﺴﺘﻮى اﻟﻮﻻﻳﺎت اﳌﺘﺤﺪة اﻷﻣﺮﻳﻜﻴﺔ‪ ،‬ﻓﻘﺪ ﰎ ﺗﺄﺳﻴﺲ اﳉﻤﻌﻴﺔ اﻷﻣﺮﻳﻜﻴﺔ ﻟﻠﺘﻌﻠﻴﻢ اﳍﻨﺪﺳﻲ )‪ (ASEE‬ﻋﺎم ‪ 1893‬ﻛﻤﺆﺳﺴﺔ ﻏﲑ رﲝﻴﺔ‬
‫ﻟﺪﻋﻢ اﻟﺘﻌﻠﻴﻢ اﳍﻨﺪﺳﻲ ﰲ أﻣﺮﻳﻜﺎ]‪ ،[499‬وﺗﻨﺸﺮ اﳉﻤﻌﻴﺔ ﳎﻠﺔ أﲝﺎث ﻋﺎﳌﻴﺔ ذات رﺗﺒﺔ ﻣﺮﻣﻮﻗﺔ ﺗﺪﻋﻰ ﺑـ ‪“Journal of Engineering‬‬

‫”‪ ،(JEE) Education‬ﻛﻤﺎ ﺧﺼﺺ ﻋﺪد ﻣﻦ اﳉﺎﻣﻌﺎت اﻷﻣﺮﻳﻜﻴﺔ اﳌﻌﺮوﻓﺔ ﻣﺜﻞ‪ Purdue, Virginia Tech. University :‬أﻗﺴﺎﻣﺎً‬
‫ﺴﺘﻘﻠﺔ ﻟﻠﺘﻌﻠﻴﻢ اﳍﻨﺪﺳﻲ‪ ،‬واﻟﱵ ﺗﺸﺒﻪ ﰲ ﻣﻮﺿﻮﻋﺎﻬﺗﺎ وﺑﻨﻴﺘﻬﺎ اﻷﻗﺴﺎم اﳍﻨﺪﺳﻴﺔ اﻷﺧﺮى )ﻛﺎﳍﻨﺪﺳﺔ اﻹﻟﻜﱰوﻧﻴﺔ واﳌﻴﻜﺎﻧﻴﻜﻴﺔ واﳌﻌﻠﻮﻣﺎﺗﻴﺔ‬
‫واﻟﻜﻴﻤﻴﺎﺋﻴﺔ وﻏﲑﻫﺎ(‪ ،‬وﻗﺪ أﻃﻠﻘﺖ اﳉﺎﻣﻌﺎت اﳌﺬﻛﻮرة ﺑﺮاﻣﺞ ﻟﻠﻤﺎﺟﺴﺘﲑ واﻟﺪﻛﺘﻮراﻩ ﰲ اﻟﺘﻌﻠﻴﻢ اﳍﻨﺪﺳﻲ]‪.[500‬‬

‫أﺳﱰاﻟﻴﺎ ﲤﻴﺰت ﰲ ﳎﺎل أﲝﺎث اﻟﺘﻌﻠﻴﻢ اﳍﻨﺪﺳﻲ ﺑﺎﻟﺼﺪارة ﺑﲔ دول ﻣﻨﻄﻘﺔ آﺳﻴﺎ وﺟﻨﻮب اﶈﻴﻂ اﳍﺎدي‪ ،‬ﺣﻴﺚ ﻳﻌﻮد ﺗﺎرﻳﺦ ﺗﺄﺳﻴﺲ اﻟﺘﺨﺼﺺ‬
‫ﰲ اﻟﺘﻌﻠﻴﻢ اﳍﻨﺪﺳﻲ ﰲ أﺳﱰاﻟﻴﺎ إﱃ اﻟﻌﺎم ‪ ،1989‬وﺗﻌﺘﱪ ﳎﻠﺔ أﲝﺎث اﻟﺘﻌﻠﻴﻢ اﳍﻨﺪﺳﻲ اﻻﺳﱰاﻟﻴﺔ ‪Australasian Journal of ) AAEE‬‬

‫‪ (Engineering Education‬اﺠﻤﻟﺎﻻت اﳌﺮﻣﻮﻗﺔ‪ ،‬ﻛﻤﺎ أن ﻫﻨﺎك ﻣﺮﻛﺰ ﻣﺘﺨﺼﺺ ﰲ اﻟﺘﻌﻠﻴﻢ اﳍﻨﺪﺳﻲ ﰲ ﺟﺎﻣﻌﺔ ‪.Melbourne‬‬

‫أﻫﻢ اﳌﺆﲤﺮات ﰲ ﳎﺎل اﻟﺘﻌﻠﻴﻢ اﳍﻨﺪﺳﻲ ﻫﻲ‪ :‬ﻣﺆﲤﺮ اﳉﻤﻌﻴﺔ اﻷﻣﺮﻳﻜﻴﺔ ﻟﻠﺘﻌﻠﻴﻢ اﳍﻨﺪﺳﻲ ‪ ،ASEE‬وﻣﺆﲤﺮ ‪ ،FIE‬واﳌﺆﲤﺮ اﻟﺪوﱄ اﻟﺴﻨﻮي ﻟﻠﺘﻌﻠﻴﻢ‬
‫اﳍﻨﺪﺳﻲ ‪ ،ICEE‬واﳌﺆﲤﺮ اﻟﺪوﱄ ‪ ،IEEE-EDUCON‬وأﺧﲑاً ﻣﺆﲤﺮ اﳉﻤﻌﻴﺔ اﻷﺳﱰاﻟﻴﺔ ﻟﻠﺘﻌﻠﻴﻢ اﳍﻨﺪﺳﻲ ‪.AAEE‬‬

‫ﻋﻠﻢ أﺻﻮل اﻟﺘﺪرﻳﺲ "اﻟﺒﻴﺪاﻏﻮﺟﻴﺎ" )‪:(The Pedagogy‬‬ ‫‪3-4‬‬

‫إن ﻣﺼﻄﻠﺢ ﺑﻴﺪاﻏﻮﺟﻴﺎ ﻳﺮﺟﻊ إﱃ ﻛﻠﻤﺔ ﻣﻦ أﺻﻞ ﻳﻮﻧﺎﱐ ﻣﻜﻮﻧﺔ‪ ،‬ﻣﻦ ﺣﻴﺚ اﻻﺷﺘﻘﺎق اﻟﻠﻐﻮي‪ ،‬ﻣﻦ ﺷﻘﲔ‪ :“Péda” :‬وﺗﻌﲏ اﻟﻄﻔﻞ‪،‬‬
‫”‪ :“Agôgé‬وﺗﻌﲏ اﻟﻘﻴﺎدة واﻟﺘﻮﺟﻴﻪ‪ .‬وﺑﻨﺎءً ﻋﻠﻰ ﻫﺬا‪ ،‬ﻛﺎن اﻟﺒﻴﺪاﻏﻮﺟﻲ ﻫﻮ اﻟﺸﺨﺺ اﳌﻜﻠﻒ ﲟﺮاﻗﺒﺔ اﻷﻃﻔﺎل وﻣﺮاﻓﻘﺘﻬﻢ ﰲ ﺧﺮوﺟﻬﻢ‬
‫ﻟﻠﺘﻜﻮﻳﻦ أو اﻟﻨﺰﻫﺔ‪ ،‬واﻷﺧﺬ ﺑﻴﺪﻫﻢ وﻣﺼﺎﺣﺒﺘﻬﻢ ‪ -‬ﻛﺎﻧﺖ وﻇﻴﻔﺔ اﻟﻌﺒﻴﺪ ﰲ اﻟﻌﻬﺪ اﻟﻴﻮﻧﺎﱐ اﻟﻘﺪﱘ‪.‬‬

‫ﻟﻘﺪ أﺧﺬت ﻛﻠﻤﺔ "ﺑﻴﺪاﻏﻮﺟﻴﺎ" ﲟﻌﺎن ﻋﺪة ﻣﻦ ﺣﻴﺚ اﻻﺻﻄﻼح‪ ،‬ﺣﻴﺚ اﻋﺘﱪﻫﺎ ”‪ “E. Durkheim‬ﻧﻈﺮﻳﺔ ﺗﻄﺒﻴﻘﻴﺔ ﺗﺮﺑﻮﻳﺔ ﺗﺴﺘﻌﲑ‬
‫ﻣﻔﺎﻫﻴﻤﻬﺎ ﻣﻦ ﻋﻠﻢ اﻟﻨﻔﺲ وﻋﻠﻢ اﻻﺟﺘﻤﺎع؛ اﻟﺒﺎﺣﺚ ”‪ “A. Makarenko‬اﻋﺘﱪﻫﺎ اﻟﻌﻠﻢ اﻷﻛﺜﺮ ﺟﺪﻟﻴﺔ اﻟﺬي ﻳﺮﻣﻲ إﱃ ﻫﺪف ﻋﻤﻠﻲ؛‬
‫وذﻫﺐ اﻟﺒﺎﺣﺚ ”‪ “R. Hubert‬إﱃ أ�ﺎ ﻟﻴﺴﺖ ﻋﻠﻤﺎً وﻻ ﺗﻘﻨﻴﺔً وﻻ ﻓﻠﺴﻔﺔً وﻻ ﻓﻨﺎً‪ ،‬ﺑﻞ ﻫﻲ ﻫﺬا ﻛﻠﻪ ﻣﻨﻈﻢ وﻓﻖ ﺗﻔﺼﻴﻼت‬
‫ﻣﻨﻄﻘﻴﺔ]‪.[501,502‬‬

‫واﳌﻼﺣﻆ أن ﻫﺬﻩ اﻟﺘﻌﺎرﻳﻒ‪ ،‬وﻛﺜﲑ ﻏﲑﻫﺎ‪ ،‬ﺗﻘﻴﻢ دﻟﻴﻼ ﻗﻮﻳﺎً ﻋﻠﻰ ﺗﻌﻘﻴﺪ اﻟﺒﻴﺪاﻏﻮﺟﻴﺎ وﺻﻌﻮﺑﺔ ﺿﺒﻂ ﻣﻔﻬﻮﻣﻬﺎ‪ ،‬ﳑﺎ ﻳﺪﻓﻊ إﱃ اﻻﻋﺘﻘﺎد أن ﺗﻠﻚ‬
‫اﻟﺘﻌﺎرﻳﻒ وﻏﲑﻫﺎ‪ ،‬ﻟﻴﺴﺖ ﰲ واﻗﻊ اﻷﻣﺮ ﺳﻮى وﺟﻬﺎت ﻧﻈﺮ ﰲ ﲢﺪﻳﺪ ﻣﻔﻬﻮم "اﻟﺒﻴﺪاﻏﻮﺟﻴﺎ"‪ ،‬ﻟﺬا ﻓﺈﻧﻪ ﻣﻦ اﻟﺼﻌﺐ ﺗﻌﺮﻳﻒ "اﻟﺒﻴﺪاﻏﻮﺟﻴﺎ"‬
‫ﺗﻌﺮﻳﻔﺎ ﺟﺎﻣﻌﺎً ﻣﺎﻧﻌﺎً‪ ،‬وذﻟﻚ ﺴﺒﺐ ﺗﻌﺪد واﺧﺘﻼف دﻻﻻﻬﺗﺎ اﻻﺻﻄﻼﺣﻴﺔ ﻣﻦ ﺟﻬﺔ‪ ،‬وﺑﺴﺒﺐ ﺗﺸﺎﺑﻜﻬﺎ وﺗﺪاﺧﻠﻬﺎ ﻣﻊ ﻣﻔﺎﻫﻴﻢ وﺣﻘﻮل ﻣﻌﺮﻓﻴﺔ‬
‫أﺧﺮى ﳎﺎورة ﳍﺎ ﻣﻦ ﺟﻬﺔ أﺧﺮى‪ ،‬اﻷﻣﺮ اﻟﺬي ﻳﺆﻛﺪ ﻋﻠﻰ أن ﻋﻠﻮم اﻟﱰﺑﻴﺔ واﻟﺘﻌﻠﻴﻢ ﻻ ﺗﺰال ﻗﺎﺋﻤﺘﻬﺎ ﻣﻔﺘﻮﺣﺔ ﻻﺳﺘﻘﺒﺎل ﻋﻠﻮم أﺧﺮى‪.‬‬

‫وﺑﺎﻟﺘﺎﱄ ﳝﻜﻨﻨﺎ أن ﻧﻠﺨﺺ ﻣﻔﻬﻮم اﻟﺒﻴﺪاﻏﻮﺟﻴﺎ ﻋﻠﻰ أ�ﺎ‪:‬‬

‫‪ -‬ﺣﻘﻞ ﻣﻌﺮﰲ‪ ،‬ﻗﻮاﻣﻪ اﻟﺘﻔﻜﲑ اﻟﻔﻠﺴﻔﻲ واﻟﺴﻴﻜﻮﻟﻮﺟﻲ‪ ،‬ﰲ ﻏﺎﻳﺎت وﺗﻮﺟﻬﺎت اﻷﻓﻌﺎل واﻷﻧﺸﻄﺔ اﳌﻄﻠﻮب ﳑﺎرﺳﺘﻬﺎ ﰲ وﺿﻌﻴﺔ اﻟﱰﺑﻴﺔ‬
‫واﻟﺘﻌﻠﻴﻢ‪ ،‬ﻋﻠﻰ ﻛﻞ ﻣﻦ اﻟﻄﻔﻞ واﻟﺮاﺷﺪ – وﻫﻲ اﻟﺒﻴﺪاﻏﻮﺟﻴﺎ اﻟﻨﻈﺮﻳﺔ‪.‬‬

‫‪ -‬ﻧﺸﺎط ﻋﻤﻠﻲ‪ ،‬ﻳﺘﻜﻮن ﻣﻦ ﳎﻤﻮع اﳌﻤﺎرﺳﺎت واﻷﻓﻌﺎل اﻟﱵ ﻳﻨﺠﺰﻫﺎ ﻛﻞ ﻣﻦ اﳌﻌﻠﻢ واﳌﺘﻌﻠﻤﲔ – وﻫﻲ اﻟﺒﻴﺪاﻏﻮﺟﻴﺎ اﻟﺘﻄﺒﻴﻘﻴﺔ‪.‬‬

‫‪189‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Engineering Education Methodologies‬‬ ‫ﻣﻨﻬﺠﻴﺎت اﻟﺘﻌﻠﻴﻢ اﳍﻨﺪﺳﻲ |‬

‫إن اﳌﺒﺪأ واﳍﺪف اﻷﺳﺎﺳﻲ ﻟﻠﺒﻴﺪاﻏﻮﺟﻴﺎ ﻫﻮ اﻟﺒﺤﺚ ﰲ اﳌﺸﻜﻼت اﻟﱰﺑﻮﻳﺔ واﻷﺑﻌﺎد اﳌﻌﺮﻓﻴﺔ ﻟﻠﺘﻌﻠﻢ‪ ،‬إﺿﺎﻓﺔً إﱃ أﺑﻌﺎد أﺧﺮى ﻧﻔﺴﻴﺔ اﺟﺘﻤﺎﻋﻴﺔ‪.‬‬
‫ﻟﻘﺪ ﻧﺸﺄ ﻋﻦ اﳌﺪارس اﻟﻔﻠﺴﻔﻴﺔ وﻣﺪارس ﻋﻠﻮم اﻟﻨﻔﺲ اﳌﺨﺘﻠﻔﺔ ﻣﻈﺎﻫﺮ وﻣﻘﺎرﺑﺎت ﳐﺘﻠﻔﺔ ﻟﻠﺒﻴﺪاﻏﻮﺟﻴﺎ‪ ،‬ﻛﻤﺎ وﺿﻌﺖ ﻃﺮق وأﳕﺎط ﳐﺘﻠﻔﺔ‬
‫ﻟﺘﺤﻘﻴﻘﻬﺎ‪.‬‬

‫إن ﲨﻴﻊ أﳕﺎط وﳕﺎذج اﻟﺘﻌﻠﻴﻢ واﻟﺘﻌﻠﻢ ﻳﺘﻢ ﺗﺼﻤﻴﻤﻬﺎ وﻓﻘﺎً ﳌﺒﺎدئ اﻟﺒﻴﺪاﻏﻮﺟﻴﺎ‪ ،‬وﺗﺼﻨﻒ ﻫﺬﻩ اﻟﻨﻤﺎذج وﻓﻘﺎً ﻷﺳﺎﺳﻬﺎ اﻟﻔﻠﺴﻔﻲ واﻟﻨﻈﺮي‪ ،‬ﻓﻤﻦ‬
‫ﻫﺬﻩ اﻟﻨﻤﺎذج ﻣﻦ ﻳﻨﻄﻠﻖ ﻣﻦ اﻟﻔﻠﺴﻔﺔ اﳌﻮﺿﻮﻋﻴﺔ )‪ ،(Objectivism‬ﻣﺜﻞ اﻟﻨﻈﺮﻳﺔ اﻟﺴﻠﻮﻛﻴﺔ )‪ ،(Behaviourism‬وﻣﻨﻬﺎ ﻣﻦ ﻳﻨﻄﻠﻖ ﻣﻦ‬
‫اﻟﻔﻠﺴﻔﺔ اﻟﺬاﺗﻴﺔ )‪ ،(Subjectivism‬ﻣﺜﻞ اﻟﻨﻈﺮﻳﺔ اﻟﺒﻨﺎﺋﻴﺔ )‪ ،(Constructivism‬وﻣﻨﻬﺎ ﻣﻦ ﻳﻨﻄﻠﻖ ﻣﻦ اﻟﻔﻠﺴﻔﺔ اﻹدراﻛﻴﺔ‪ ،‬ﻣﺜﻞ اﻟﻨﻈﺮﻳﺔ‬
‫اﳌﻌﺮﻓﻴﺔ )‪ .(Congnitivisim‬ﻓﻴﻤﺎ ﻳﻠﻲ ﻧﻘﺪم ﻣﻮﺟﺰاً ﳐﺘﺼﺮاً ﻟﻠﻨﻈﺮﻳﺎت واﻟﺘﻮﺟﻬﺎت اﻟﺴﺎﺋﺪة ﰲ اﻟﺒﻴﺪاﻏﻮﺟﻴﺎ‪.‬‬

‫ﻧﻈﺮﻳﺎت اﻟﺘﻌﻠﻢ )‪:(Learning Theories‬‬ ‫‪4-4‬‬

‫ﻳﻌﺮف اﻟﺘﻌﻠﻢ ﻋﻠﻰ أﻧﻪ اﻟﻌﻤﻠﻴﺔ اﳊﻴﻮﻳﺔ اﻟﺪﻳﻨﺎﻣﻴﻜﻴﺔ اﻟﱵ ﺗﺘﺠﻠﻰ ﰲ ﲨﻴﻊ اﻟﺘﻐﲑات اﻟﺜﺎﺑﺘﺔ ﻧﺴﺒﻴﺎً ﰲ اﻷﳕﺎط اﻟﺴﻠﻮﻛﻴﺔ واﻟﻌﻤﻠﻴﺎت اﳌﻌﺮﻓﻴﺔ اﻟﱵ‬
‫ﲢﺪث ﻟﺪى اﻷﻓﺮاد ﻧﺘﻴﺠﺔ ﻟﺘﻔﺎﻋﻠﻬﻢ ﻣﻊ اﻟﺒﻴﺌﺔ اﳌﺎدﻳﺔ واﻻﺟﺘﻤﺎﻋﻴﺔ‪.‬‬

‫ﳝﻜﻦ اﻟﻨﻈﺮ إﱃ ﻧﻈﺮﻳﺎت اﻟﺘﻌﻠﻢ ﻋﻠﻰ أ�ﺎ ﳏﺎوﻻت ﻣﻨﻈﻤﺔ ﻟﺘﻮﻟﻴﺪ اﳌﻌﺮﻓﺔ ﺣﻮل اﻟﺴﻠﻮك اﻹﻧﺴﺎﱐ وﺗﻨﻈﻴﻤﻬﺎ وﲡﻤﻴﻌﻬﺎ ﰲ أﻃﺮ ﻣﻦ اﳊﻘﺎﺋﻖ‬
‫ﳌﺒﺎدئ واﻟﻘﻮاﻧﲔ ﻬﺑﺪف ﺗﻔﺴﲑ اﻟﻈﺎﻫﺮة اﻟﺴﻠﻮﻛﻴﺔ واﻟﺘﻨﺒﺆ ﻬﺑﺎ وﺿﺒﻄﻬﺎ‪.‬‬

‫ﻫﺬا وﲢﺪد ﻗﻴﻤﺔ اﻟﻨﻈﺮﻳﺔ ﲟﺪى اﻻﺧﺘﺒﺎر اﻟﺘﺠﺮﻳﱯ وﻟﻴﺲ ﻣﻦ ﺧﻼل اﻟﱪﻫﺎن اﳉﺪﱄ‪ ،‬وﻫﻨﺎك ﻋﺪة ﻣﻌﺎﻳﲑ ﺗﺴﺘﺨﺪم ﻟﻠﺤﻜﻢ ﻋﻠﻰ اﻟﻘﻴﻤﺔ اﻟﻌﻠﻤﻴﺔ‬
‫ﻟﻠﻨﻈﺮﻳﺔ‪ ،‬ﻣﻨﻬﺎ‪ :‬اﻷﳘﻴﺔ )‪ ،(Importance‬اﻟﺪﻗﺔ واﻟﻮﺿﻮح )‪ ،(Preciseness & Clarity‬اﻻﻗﺘﺼﺎدﻳﺔ واﻟﺒﺴﺎﻃﺔ ) & ‪Parsimony‬‬

‫‪ ،(Simplicity‬اﻟﺸﻤﻮﻟﻴﺔ )‪ ،(Comprehensiveness‬اﻹﺟﺮاﺋﻴﺔ )‪ ،(Operationality‬اﻟﻨﻔﻌﻴﺔ )‪ ،(Fruitfulness‬اﻟﺼﺪق اﻟﺘﺠﺮﻳﱯ‬

‫)‪ ،(Empirical validity‬اﻟﻌﻤﻠﻴﺔ )‪.(Practicality‬‬

‫ﻳﻮﺟﺪ أرﺑﻊ ﻧﻈﺮﻳﺎت أﺳﺎﺳﻴﺔ ﻟﻠﺘﻌﻠﻢ‪ ،‬ﺗﻨﻄﻠﻖ ﻛﻞ ﳎﻤﻮﻋﺔ ﻣﻨﻬﺎ ﰲ ﺗﻔﺴﲑﻫﺎ ﻟﻌﻤﻠﻴﺔ اﻟﺘﻌﻠﻢ ﻣﻦ ﲨﻠﺔ اﻓﱰاﺿﺎت ﳐﺘﻠﻔﺔ‪ ،‬وﻫﻲ‪:‬‬

‫• اﻟﻨﻈﺮﻳﺔ اﻟﺴﻠﻮﻛﻴﺔ ‪ Behaviorism‬وﻬﺗﺘﻢ ﺑﺪراﺳﺔ اﻟﺘﻐﲑ اﻟﻈﺎﻫﺮ ﰲ اﻟﺴﻠﻮك‪ ،‬وﻫﻲ ﺗﺮﻛﺰ ﻋﻠﻰ ﺗﻜﺮار اﻟﺴﻠﻮك اﳉﺪﻳﺪ إﱃ أن ﻳﺼﺒﺢ ﺳﻠﻮﻛﺎ‬
‫ﻔﻮﻳﺎ )آﻟﻴﺎ(‪ .‬ﻳﻘﺪم اﶈﺘﻮى اﻟﻌﻠﻤﻲ ﻋﻠﻰ ﺣﺴﺐ ﺧﺼﺎﺋﺺ اﳌﺘﻌﻠﻤﲔ وﺣﺎﺟﺎﻬﺗﻢ‪.‬‬

‫• اﻟﻨﻈﺮﻳﺔ اﳌﻌﺮﻓﻴﺔ ‪ Cognitivism‬وﻬﺗﺘﻢ ﺑﺎﻟﻌﻤﻠﻴﺎت اﻟﻌﻘﻠﻴﺔ‪ ،‬وﺗﻨﻈﺮ إﱃ اﻟﺘﻐﲑ اﳌﺸﺎﻫﺪ ﰲ اﻟﺴﻠﻮك ﻛﻤﺆﺷﺮ ﻋﻠﻰ ﻣﺎ ﳛﺪث داﺧﻞ ﻋﻘﻞ‬
‫اﳌﺘﻌﻠﻢ‪ .‬ﻳﻘﺪم اﶈﺘﻮى اﻟﻌﻠﻤﻲ ﻋﻠﻰ ﺣﺴﺐ اﻟﺘﺴﺴﻞ اﳌﻨﻄﻘﻲ ﻟﻠﻤﺎدة اﻟﻌﻠﻤﻴﺔ ﺑﻐﺾ اﻟﻨﻈﺮ ﻋﻦ ﺧﺼﺎﺋﺺ اﳌﺘﻌﻠﻤﲔ وﺣﺎﺟﺎﻬﺗﻢ‪.‬‬

‫• اﻟﻨﻈﺮﻳﺔ اﻟﺒﻨﺎﺋﻴﺔ ‪ :Constructivism‬ﺗﺮﻛﺰ ﻋﻠﻰ أﻧﻨﺎ ﻧﺒﲏ رؤﻳﺔ ﺷﺨﺼﻴﺔ ﻟﻠﻌﺎﱂ ﻣﻦ ﺣﻮﻟﻨﺎ ﺑﺎﻻﺳﺘﻨﺎد إﱃ ﺧﱪاﺗﻨﺎ اﳋﺎﺻﺔ‪ ،‬وﻟﺬﻟﻚ ﻓﻬﻲ‬
‫ﺗُﻌﲎ ﺑﺈﻋﺪاد اﳌﺘﻌﻠﻢ ﳊﻞ اﳌﺸﻜﻼت ﰲ ﻣﻮاﻗﻒ ﺟﺪﻳﺪة‪ .‬أي أن اﳌﺘﻌﻠﻢ ﻳﺒﲏ ﻣﻌﺮﻓﺘﻪ اﻟﻌﻠﻤﻴﺔ ﺑﻨﺎءً ﻋﻠﻰ ﺧﱪاﺗﻪ وﻣﻌﻠﻮﻣﺎﺗﻪ اﻟﺴﺎﺑﻘﺔ‪.‬‬

‫• اﻟﻨﻈﺮﻳﺔ اﻻرﺗﺒﺎﻃﻴﺔ ‪ :Connectivism‬ﻧﻈﺮﻳﺔ ﺗﻌﻠﻢ ﻟﻠﻌﺼﺮ اﻟﺮﻗﻤﻲ‪ ،‬ﺗﺮﻛﺰ ﻋﻠﻰ ﺗﺄﺛﲑ اﻟﺘﻜﻨﻮﻟﻮﺟﻴﺎ ﻋﻠﻰ ﻃﺮﻳﻘﺔ ﻋﻴﺸﻨﺎ وﺣﻴﺎﺗﻨﺎ وﺗﻮاﺻﻠﻨﺎ‪.‬‬
‫ﲡﻤﻊ ﺑﲔ اﻟﻌﻨﺎﺻﺮ ذات اﻻرﺗﺒﺎط ﻟﻠﻌﺪﻳﺪ ﻣﻦ ﻧﻈﺮﻳﺎت اﻟﺘﻌﻠﻢ‪ ،‬اﻟﺒﲎ اﻻﺟﺘﻤﺎﻋﻴﺔ‪ ،‬واﻟﺘﻜﻨﻮﻟﻮﺟﻴﺎ‪ ،‬ﺑﺪف إﳚﺎد ﻧﻈﺮﻳﺔ ﺗﻌﻠﻤﻴﺔ ﻗﻮﻳﺔ وﻓﻌﺎﻟﺔ‬
‫ﻟﻌﺼﺮ اﻟﺘﻜﻨﻮﻟﻮﺟﻴﺎ اﻟﺮﻗﻤﻲ‪.‬‬
‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪190‬‬
‫‪24‬‬ ‫اﻟﻔﺼﻞ اﻟﺮاﺑﻊ | ‪Chapter 4‬‬

‫‪ 1-4-4‬اﻟﻨﻈﺮﻳﺔ اﻟﺴﻠﻮﻛﻴﺔ )‪:(Behaviourism‬‬

‫ﻫﺬﻩ اﻟﻨﻈﺮﻳﺔ ﻧﺸﺄت ﻛﻨﺘﻴﺠﺔ ﻟﻠﻌﻤﻞ اﻟﺬي ﻗﺎم ﺑﻪ ﻛﻞ ﻣﻦ اﻟﺒﺎﺣﺜﲔ]‪ ،[503-505‬واﻋﺘﻤﺎداً ﻋﻠﻰ اﳌﻨﻬﺠﻴﺔ اﻟﺴﻠﻮﻛﻴﺔ ﺻﻤﻤﺖ اﻷﻧﻈﻤﺔ اﻟﱰﺑﻮﻳﺔ‬
‫اﻟﺘﻌﻠﻴﻤﻴﺔ اﻷوﱃ‪ .‬إن ﳏﻮر اﻟﱰﻛﻴﺰ اﻷﺳﺎﺳﻲ ﻟﻠﻨﻈﺮﻳﺔ اﻟﺴﻠﻮﻛﻴﺔ ﻫﻮ ﻋﻠﻰ ﺳﻠﻮك اﻟﻔﺮد ﺧﻼل ﻋﻤﻠﻴﺔ اﻟﺘﻌﻠﻢ ﰲ اﻻﺳﺘﺠﺎﺑﺔ ﳊﺎﻓﺰ ﻣﻌﲔ]‪ ،[506‬ﺣﻴﺚ‬
‫ﻳﺮى أﺻﺤﺎب ﻫﺬﻩ اﻟﻨﻈﺮﻳﺔ ﺑﺄن اﻟﺴﻠﻮك اﻹﻧﺴﺎﱐ ﻋﺒﺎرة ﻋﻦ ﳎﻤﻮﻋﺔ ﻣﻦ اﻟﻌﺎدات اﻟﱵ ﻳﺘﻌﻠﻤﻬﺎ اﻟﻔﺮد وﻳﻜﺘﺴﺒﻬﺎ أﺛﻨﺎء ﻣﺮاﺣﻞ ﳕﻮﻩ اﳌﺨﺘﻠﻔﺔ‪،‬‬
‫ﺗﺴﲑان ﳎﻤﻮﻋﺔ اﻻﺳﺘﺠﺎﺑﺎت اﻟﺸﺮﻃﻴﺔ‪ ،‬وﻳﺮﺟﻌﻮن ذﻟﻚ إﱃ‬ ‫وﻳﺘﺤﻜﻢ ﰲ ﺗﻜﻮﻳﻨﻬﺎ ﻗﻮاﻧﲔ اﻟﺪﻣﺎغ وﻫﻲ‪ :‬ﻗﻮى اﻟﻜﻒ وﻗﻮى اﻻﺳﺘﺜﺎرة اﻟﻠﺘﺎن ّ‬
‫اﻟﻌﻮاﻣﻞ اﻟﺒﻴﺌﺔ اﻟﱵ ﻳﺘﻌﺮض ﳍﺎ اﻟﻔﺮد‪ ،‬وﳍﺬا ﻓﺎن أﻛﺜﺮ اﻟﺴﻠﻮك اﻹﻧﺴﺎﱐ ﻣﻜﺘﺴﺐ ﻋﻦ ﻃﺮﻳﻖ اﻟﺘﻌﻠﻢ‪ ،‬وإن ﺳﻠﻮك اﻟﻔﺮد ﻗﺎﺑﻞ ﻟﻠﺘﻌﺪﻳﻞ أو اﻟﺘﻐﻴﲑ‬
‫ﺑﺈﳚﺎد ﻇﺮوف وأﺟﻮاء ﺗﻌﻠﻴﻤﻴﺔ ﻣﻌﻴﻨﺔ‪ .‬ﻛﻤﺎ ﺗﺆﻛﺪ اﻟﻨﻈﺮﻳﺔ اﻟﺴﻠﻮﻛﻴﺔ أﻳﻀﺎً أن ﻋﻤﻠﻴﺔ اﻟﺘﻌﻠﻢ ﳝﻜﻦ أن ﲢﺪث ﻣﻦ ﺧﻼل ﻣﺮاﻗﺒﺔ ﺳﻠﻮك‬
‫اﻵﺧﺮﻳﻦ]‪.[507‬‬

‫ﺗﺸﻤﻞ اﻟﻨﻈﺮﻳﺎت اﻟﺴﻠﻮﻛﻴﺔ ﻓﺌﺘﲔ ﻣﻦ اﻟﻨﻈﺮﻳﺎت ﳘﺎ]‪:[508‬‬

‫اﻟﻔﺌﺔ اﻷوﱃ‪ :‬اﻟﻨﻈﺮﻳﺎت اﻻرﺗﺒﺎﻃﻴﺔ وﺗﻀﻢ ﻧﻈﺮﻳﺔ "‪ "Ivan Pavlov‬ﰲ اﻻﺷﺮاط اﻟﻜﻼﺳﻴﻜﻲ‪ ،‬وآراء ”‪ “John Watson‬ﰲ اﻻرﺗﺒﺎط‪،‬‬
‫وﻧﻈﺮﻳﺔ ”‪ “Aden Jethry‬ﰲ اﻻﻗﱰان‪ ،‬وﻧﻈﺮﻳﺔ ”‪“William Estes‬؛ وﺗﺆﻛﺪ ﲨﻴﻌﻬﺎ ﻋﻠﻰ أن اﻟﺘﻌﻠﻢ ﻫﻮ ﲟﺜﺎﺑﺔ ﺗﺸﻜﻴﻞ ارﺗﺒﺎﻃﺎت ﺑﲔ‬
‫ﻣﺜﲑات ﺑﻴﺌﻴﺔ واﺳﺘﺠﺎﺑﺎت ﻣﻌﻴﻨﺔ‪ ،‬وﲣﺘﻠﻒ ﻓﻴﻤﺎ ﺑﻴﻨﻬﺎ ﰲ ﺗﻔﺴﲑ ﻃﺒﻴﻌﺔ اﻻرﺗﺒﺎﻃﺎت وﻛﻴﻔﻴﺔ ﺗﺸﻜﻠﻬﺎ‪.‬‬

‫اﻟﻔﺌﺔ اﻟﺜﺎﻧﻴﺔ‪ :‬اﻟﻨﻈﺮﻳﺎت اﻟﻮﻇﻴﻔﻴﺔ وﺗﻀﻢ ﻧﻈﺮﻳﺔ ”‪) “Edward Thorndike‬ﳕﻮذج اﶈﺎوﻟﺔ واﳋﻄﺄ(‪) “Clark Hull” ،‬ﻧﻈﺮﻳﺔ اﳊﺎﻓﺰ(‪،‬‬
‫وﻧﻈﺮﻳﺔ ”‪) “Burrhus Frederic Skinner‬اﻟﺘﻌﻠﻢ اﻹﺟﺮاﺋﻲ(‪ ،‬إذ ﺗﺆﻛﺪ ﻋﻠﻰ اﻟﻮﻇﺎﺋﻒ اﻟﱵ ﻳﺆدﻳﻬﺎ اﻟﺴﻠﻮك ﻣﻊ اﻻﻫﺘﻤﺎم ﺑﻌﻤﻠﻴﺎت‬
‫اﻻرﺗﺒﺎط اﻟﱵ ﺗﺘﺸﻜﻞ ﺑﲔ اﳌﺜﲑات واﻟﺴﻠﻮك‪.‬‬

‫‪ 1-1-4-4‬أﻫﻢ ﺧﺼﺎﺋﺺ اﻟﺘﻌﻠﻢ ﻣﻦ اﳌﺪﺧﻞ اﻟﺴﻠﻮﻛﻲ )‪:(Benefits of Behaviourism‬‬

‫ﻟﻠﻤﺪرﺳﺔ اﻟﺴﻠﻮﻛﻴﺔ ﺧﺼﺎﺋﺺ ﲤﻴﺰﻫﺎ ﻋﻦ ﻏﲑﻫﺎ ﰲ ﺗﻔﺴﲑﻫﺎ ﻟﻠﺘﻌﻠﻢ وﻣﻦ أﺑﺮز ﺧﺼﺎﺋﺼﻬﺎ ﻣﺎ ﻳﻠﻲ‪:‬‬
‫‪ ‬ﳛﺪث اﻟﺘﻌﻠﻢ ﻋﻨﺪ اﻻﺳﺘﺠﺎﺑﺔ اﻟﺼﺤﻴﺤﺔ اﻟﱵ ﺗﺘﺒﻊ ﻣﺜﲑ ﻣﻌﲔ‪.‬‬
‫‪ ‬ﳝﻜﻦ اﻟﺘﺤﻘﻖ ﻣﻦ ﺣﺪوث اﻟﺘﻌﻠﻢ ﺑﺎﳌﻼﺣﻈﺔ اﳊﺴﻴﻪ ﻟﻠﻤﺘﻌﻠﻢ ﻋﻠﻰ ﻓﱰات زﻣﻨﻴﻪ‪.‬‬
‫‪ ‬ﻳﺮﻛﺰ ﻋﻠﻰ اﻟﻘﻴﺎﺳﺎت واﳌﻼﺣﻈﺎت اﻟﺴﻠﻮﻛﻴﺔ‪.‬‬
‫‪ ‬ﻳﺴﺘﺨﺪم ﻣﺒﺪأ‪ :‬إن اﳌﺘﻌﻠﻢ ﺻﻨﺪوق ﻣﺎ ﳛﺪث ﺑﺪاﺧﻠﻪ ﻏﲑ ﻣﻌﻠﻮم‪.‬‬
‫‪ ‬ﻳﺮﻛﺰ ﻋﻠﻰ اﻟﻌﻼﻗﺔ ﺑﲔ ﻣﺘﻐﲑات اﻟﺒﻴﺌﻴﺔ واﻟﺴﻠﻮك‪.‬‬
‫‪ ‬اﻟﺘﻌﻠﻴﻢ ﻳﻌﺘﻤﺪ ﻋﻠﻰ اﺳﺘﺨﺪام اﻟﺘﻌﺰﻳﺰ واﳌﺘﺎﺑﻌﺔ ﻟﺴﻠﻮك اﳌﺘﻌﻠﻢ‪.‬‬
‫‪ ‬اﻟﺴﻠﻮك ﻳﻮﺟﻪ ﺑﺎﻷﻏﺮاض واﻟﻐﺎﻳﺎت‪.‬‬
‫‪ ‬اﻷﺳﺒﺎب ﺗﻌﺰى ﻟﻠﺴﻠﻮك‪.‬‬
‫‪ ‬ﻳﺘﻢ اﻟﺘﺤﺪﻳﺪ اﳌﺴﺒﻖ ﻟﻠﺸﺮوط اﻟﱵ ﲢﻘﻖ ﺣﺪوث اﻟﺴﻠﻮك‪.‬‬

‫‪191‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Engineering Education Methodologies‬‬ ‫ﻣﻨﻬﺠﻴﺎت اﻟﺘﻌﻠﻴﻢ اﳍﻨﺪﺳﻲ |‬

‫‪ 2-1-4-4‬ﻣﺒﺎدئ اﻟﻨﻈﺮﻳﺔ اﻟﺴﻠﻮﻛﻴﺔ )‪:(Behaviorism Theory Principles‬‬

‫إن اﳌﺒﺎدئ اﳋﺎﺻﺔ ﺑﺎﻟﻨﻈﺮﻳﺔ اﻟﺴﻠﻮﻛﻴﺔ واﻟﱵ ﺗﺸﻜﻞ ﲟﺠﻤﻮﻋﻬﺎ ﻋﻤﻠﻴﺔ اﻟﺘﻌﻠﻴﻢ ﻫﻲ]‪:[509-511‬‬

‫‪ -1‬اﻟﻌﻮاﻗﺐ )‪ :(Consequences‬ﻳﺘﻀﻤﻦ أن اﻟﻌﻮاﻗﺐ اﻹﳚﺎﺑﻴﺔ ﺗﻘﻮي اﻟﺴﻠﻮك ﺑﻴﻨﻤﺎ ﺗﻌﻤﻞ اﻟﻌﻮاﻗﺐ اﻟﺴﻠﺒﻴﺔ ﻋﻠﻰ إﺿﻌﺎﻓﻪ‪ ،‬ﻓﺎﳊﺎﻓﺰ اﳌﱰاﻓﻖ‬
‫ﻣﻊ ﻋﻮاﻗﺐ إﳚﺎﺑﻴﺔ ﻳﻌﺰز ﻋﻤﻠﻴﺔ اﻟﺘﻌﻠﻢ )وﻳﻜﻮن ذﻟﻚ ﻋﻠﻰ ﺷﻜﻞ زﻳﺎدة ﰲ ﺗﻜﺮار اﻟﺴﻠﻮك(‪.‬‬

‫‪ -2‬اﻟﺘﻌﺰﻳﺰ )‪ :(Reinforcers‬ﻳﻌﻤﻞ ﻋﻠﻰ ﺗﻘﻮﻳﺔ اﻟﻨﺘﺎﺋﺞ ﺑﺘﻄﺒﻴﻖ ﻣﻌﺰزات ﺗﺰﻳﺪ ﻣﻦ ﺗﻜﺮار اﻟﺴﻠﻮك‪ ،‬ﻋﻠﻰ ﺳﺒﻴﻞ اﳌﺜﺎل اﳉﻮاﺋﺰ اﳌﻤﻨﻮﺣﺔ‬
‫ﻟﻺﳒﺎزات ﰲ ﻋﻤﻠﻴﺔ اﻟﺘﻌﻠﻢ ﳝﻜﻦ اﻋﺘﺒﺎرﻫﺎ ﻣﻌﺰز إﳚﺎﰊ‪ ،‬وﻣﻦ ﻧﺎﺣﻴﺔ أﺧﺮى اﻟﻌﻘﻮﺑﺎت ﻫﻲ ﻣﻌﺰز ﺳﻠﱯ ﻳﻀﻌﻒ اﻟﺴﻠﻮك‪.‬‬

‫‪ -3‬اﻻﺳﺘﺠﺎﺑﺔ اﻟﻔﻮرﻳﺔ ﻟﻠﻌﻮاﻗﺐ )‪ :(Immediacy of Consequences‬ﻳﺘﻀﻤﻦ أن اﻟﻌﻮاﻗﺐ اﳌﺘﺄﺧﺮة ﺗﻜﻮن أﻗﻞ ﺗﺄﺛﲑاً ﻋﻠﻰ اﻟﺴﻠﻮك ﻣﻦ‬
‫اﻟﻌﻮاﻗﺐ اﻟﻔﻮرﻳﺔ‪ ،‬وﻟﺬﻟﻚ ﻓﺎﻟﺪﻋﻢ اﻟﻘﻠﻴﻞ اﻟﻔﻮري ﻳﻜﻮن ﺗﺄﺛﲑﻩ أﻛﱪ ﻣﻦ اﻟﺪﻋﻢ اﻟﻜﺒﲑ اﳌﺘﺄﺧﺮ]‪.[512‬‬

‫‪ -4‬اﻟﻌﻘﺎب )‪ :(Punishers‬وﻳﺘﻤﺜﻞ ﰲ اﳊﺪث اﻟﺬي ﻳﻌﻘﺐ اﻻﺳﺘﺠﺎﺑﺔ واﻟﺬي ﻳﺆدي إﱃ إﺿﻌﺎف اﻻﺳﺘﺠﺎﺑﺔ اﻟﱵ ﺗﻌﻘﺐ ﻇﻬﻮر اﻟﻌﻘﻮﺑﺔ‪،‬‬
‫أو اﻟﺘﻮﻗﻒ ﻋﻦ ﻫﺬﻩ اﻻﺳﺘﺠﺎﺑﺔ‪ ،‬وﻳﻨﻘﺴﻢ اﻟﻌﻘﺎب إﱃ ﻗﺴﻤﲔ ﳘﺎ‪ :‬اﻟﻌﻘﺎب اﻹﳚﺎﰊ‪ ،‬واﻟﻌﻘﺎب اﻟﺴﻠﱯ‪.‬‬

‫‪ -5‬اﻟﺘﺸﻜﻴﻞ )‪ :(Shaping‬ﻳﺘﻀﻤﻦ أن ﺗﻄﺒﻴﻖ اﻟﻌﻮاﻗﺐ ﻳﻘﻮم ﺑﺘﺸﻜﻴﻞ اﻟﺴﻠﻮك ﺑﻄﺮﻳﻘﺔ ﻣﻌﻴﻨﺔ‪.‬‬

‫‪ -6‬اﻟﺘﺨﺎﻣﺪ )‪ :(Extinction‬ﻳﺘﻀﻤﻦ أن اﻟﺴﻠﻮك ﻳﺘﺨﺎﻣﺪ ﰲ ﺣﺎﻟﺔ اﻧﻌﺪام اﻟﺪﻋﻢ أو ﺗﻮﻗﻔﻪ‪ ،‬ﻓﻤﺜﻼً‪ :‬إذا ﰎ ﺳﺤﺐ أو إﻳﻘﺎف ﺟﺎﺋﺰة ﺧﺎﺻﺔ‬
‫ﺑﺎﻟﻨﺠﺎح ﻓﺈن اﳊﺎﻓﺰ ﻟﺘﺤﻘﻴﻖ درﺟﺎت ﻋﻠﻴﺎ ﻳﺘﻨﺎﻗﺺ‪.‬‬

‫‪ -7‬ﺟﺪوﻟﺔ اﻟﺪﻋﻢ )‪ :(Schedule of Reinforcement‬ﻳﺘﻀﻤﻦ ﻋﺪد ﻣﺮات ﺗﻘﺪﱘ اﻟﺪﻋﻢ واﻟﻔﱰات اﻟﺰﻣﻨﻴﺔ اﻟﱵ ﺗﺘﺨﻠﻠﻬﺎ وﻃﺒﻴﻌﺔ اﻟﺴﻠﻮك‬
‫اﻟﻜﺎﻣﻦ اﻟﺬي ﺳﻴﻨﺘﺞ ﻋﻦ ذﻟﻚ‪.‬‬

‫‪ -8‬اﻻﺳﺘﻤﺮارﻳﺔ )‪ :(Maintenance‬ﻳﺸﲑ إﱃ اﻟﺴﻠﻮﻛﻴﺎت اﻟﱵ ﺗﺴﺘﻤﺮ وﺗﺒﻘﻰ ﺑﻌﺪ ﻏﻴﺎب اﻟﺪﻋﻢ‪.‬‬

‫اﺳﺘﻨﺎداً إﱃ اﳌﺒﺎدئ اﳋﺎﺻﺔ ﺑﺎﻟﻨﻈﺮﻳﺔ اﻟﺴﻠﻮﻛﻴﺔ ﻓﻴﻤﻜﻨﻨﺎ اﻟﻘﻮل أن اﻟﻨﻈﺮﻳﺔ اﻟﺴﻠﻮﻛﻴﺔ ﺗﻌﺘﱪ ﻋﻤﻠﻴﺔ اﻟﺘﻌﻠﻢ ﻋﻤﻠﻴﺔ ﻣﺘﺄﺛﺮة ﺑﺎﳊﻮاﻓﺰ اﳌﻮﺟﻮدة ﰲ اﻟﺒﻴﺌﺔ‬
‫اﶈﻴﻄﺔ‪.‬‬

‫‪ 2-4-4‬اﻟﻨﻈﺮﻳﺔ اﻹدراﻛﻴﺔ )‪:(Cognitivism‬‬

‫ﻳﻨﺸﺄ اﻹدراك ﻣﻦ ﻋﻠﻢ اﻟﻨﻔﺲ اﳌﻌﺮﰲ‪ ،‬واﻟﺬي ﻳﺪرس اﻵﻟﻴﺎت اﻟﺬﻫﻨﻴﺔ ﻟﻠﺘﻌﻠﻢ‪ ،‬ﺣﻞ اﻟﻘﻀﺎﻳﺎ واﳌﺴﺎﺋﻞ‪ ،‬ﺗﻠﻘﻲ اﳌﻌﻠﻮﻣﺎت وﻣﻌﺎﳉﺘﻬﺎ‪ ،‬اﻟﺬاﻛﺮة‪،‬‬
‫اﻟﺬﻛﺎء‪ ،‬اﻟﻠﻐﺔ واﻟﺘﻄﻮر اﻟﺬﻫﲏ اﻟﺒﺸﺮي‪.‬‬

‫ﺗﻄﻮرت اﻟﻨﻈﺮﻳﺔ اﻹدراﻛﻴﺔ ﻛﺎﺳﺘﺠﺎﺑﺔ ﻟﻠﻨﻤﻮذج اﻟﻐﲑ ﻓﻌﺎل اﳌﺘﻤﺜﻞ ﺑﺎﻟﻨﻈﺮﻳﺔ اﻟﺴﻠﻮﻛﻴﺔ‪ ،‬وﻫﻲ ﲢﺎول أن ﺗﻔﻬﻢ اﻟﻌﻤﻠﻴﺎت اﻟﺪاﺧﻠﻴﺔ اﻟﻜﺎﻣﻨﺔ‪ ،‬اﻟﱵ‬
‫ﲢﺪث ﰲ اﻟﻌﻘﻞ ﺑﺎﻻﺷﱰاك ﻣﻊ اﻟﺬاﻛﺮة‪ ،‬وذﻟﻚ ﺧﻼل ﻋﻤﻠﻴﺔ اﻟﺘﻌﻠﻢ واﻛﺘﺴﺎب اﳌﻌﻠﻮﻣﺎت]‪.[513-517‬‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪192‬‬
‫‪24‬‬ ‫اﻟﻔﺼﻞ اﻟﺮاﺑﻊ | ‪Chapter 4‬‬

‫ﺗﻌﺘﱪ اﻟﻨﻈﺮﻳﺔ اﻹدراﻛﻴﺔ أن اﻟﺘﻌﻠﻢ ﻋﺒﺎرة ﻋﻦ ﳎﻤﻮﻋﺔ ﻋﻤﻠﻴﺎت ﲢﺪث داﺧﻞ ﻋﻘﻞ اﻹﻧﺴﺎن ﺗﺸﻤﻞ اﻟﺘﺬﻛﺮ‪ ،‬اﻟﺘﻔﻜﲑ‪ ،‬اﻟﺘﺄﻣﻞ‪ ،‬اﻟﺘﺠﺮﺑﺔ‪ ،‬اﻟﺘﺤﻔﻴﺰ‪.‬‬
‫وﻳﻨﻈﺮ ﻣﺆﻳﺪو اﻟﻨﻈﺮﻳﺔ اﻹدراﻛﻴﺔ إﱃ اﻟﺘﻌﻠﻴﻢ ﻋﻠﻰ أﻧﻪ ﻧﻮع ﻣﻦ أﻧﻮاع ﻣﻌﺎﳉﺔ اﻟﺒﻴﺎﻧﺎت‪.‬‬

‫ﺗﺸﱰك اﻟﻨﻈﺮﻳﺔ اﻹدراﻛﻴﺔ ﻣﻊ اﻟﻨﻈﺮﻳﺔ اﻟﺴﻠﻮﻛﻴﺔ ﰲ اﻟﻌﺪﻳﺪ ﻣﻦ اﻷﻓﻜﺎر وﲣﺘﻠﻔﺎن ﰲ ﺑﻌﺾ اﳉﻮاﻧﺐ‪ ،‬ﻓﺎﻟﻨﻈﺮﻳﺔ اﻟﺴﻠﻮﻛﻴﺔ ﺗﺮﻛﺰ ﻋﻠﻰ اﻟﺴﻠﻮك ﺑﺸﻜﻞ‬
‫أﺳﺎﺳﻲ‪ ،‬واﻟﻨﻈﺮﻳﺔ اﻹدراﻛﻴﺔ ﺗﺮﻛﺰ ﻋﻠﻰ اﻟﻌﻘﻞ اﻟﺒﺸﺮي واﻵﻟﻴﺔ اﻟﱵ ﻳﻌﺎﰿ ﺑﺎ اﻟﻌﻘﻞ اﳌﻌﻄﻴﺎت اﻟﻘﺎدﻣﺔ ﻣﻦ اﳊﺲ‪ ،‬ﻛﻤﺎ ﺗﺪف اﻟﻨﻈﺮﻳﺔ اﻹدراﻛﻴﺔ‬
‫إﱃ ﻓﻬﻢ اﻟﻌﻤﻠﻴﺎت اﻟﱵ ﲢﺪث داﺧﻞ ﻣﺦ اﻹﻧﺴﺎن ﺑﻮﺟﻮد اﶈﻔﺰ واﻟﺬي ﻳﺘﻤﺜﻞ ﺑﺎﳌﺪﺧﻼت‪ ،‬ﻓﻴﻤﺮ ﺑﻌﻤﻠﻴﺎت اﳌﻌﺎﳉﺔ اﻟﱵ ﻳﻘﻮم ﺑﺎ اﻟﻌﻘﻞ ﳍﺬﻩ‬
‫اﳌﺪﺧﻼت‪ ،‬وﺗﻨﺘﻬﻲ ﺑﺮد اﻟﻔﻌﻞ وﻳﺘﻤﺜﻞ ﺑﺎﳌﺨﺮﺟﺎت‪.‬‬

‫‪ 1-2-4-4‬أﻫﻢ ﺧﺼﺎﺋﺺ اﻟﺘﻌﻠﻢ ﻣﻦ اﳌﺪﺧﻞ اﻹدراﻛﻲ )‪:(Benefits of Cognitivism‬‬

‫ﺗﺘﻤﻴﺰ اﳌﺪرﺳﺔ اﻹدراﻛﻴﺔ ﰲ اﻟﺘﻌﻠﻢ ﺑﺎﳋﺼﺎﺋﺺ اﻟﺘﺎﻟﻴﺔ‪:‬‬

‫‪ ‬اﻟﺘﻌﻠﻢ ﻫﻮ ﺗﻐﲑ ﰲ ﺣﺎﻟﺔ اﻹدراك واﳌﻌﺮﻓﺔ‪.‬‬
‫‪ ‬ﲢﻘﻖ اﳌﻌﺮﻓﺔ ﻳﻮﺻﻒ ﺑﺄﻧﻪ ﻧﺸﺎط ﻋﻘﻠﻲ ﻳﺴﺘﻠﺰم اﻟﱰﻣﻴﺰ واﻟﺒﻨﻴﺔ اﻟﻌﻘﻠﻴﺔ اﻟﺪاﺧﻠﻴﺔ ﻋﻨﺪ اﳌﺘﻌﻠﻢ‪.‬‬
‫‪ ‬اﳌﺘﻌﻠﻢ ﻳﻨﻈﺮ إﻟﻴﻪ ﻛﻤﺸﺎرك ﻧﺸﻂ ﰲ ﻋﻤﻠﻴﺔ اﻟﺘﻌﻠﻢ‪.‬‬
‫‪ ‬اﻟﱰﻛﻴﺰ ﰲ ﺑﻨﺎء ﻗﻮاﻟﺐ اﳌﻌﺮﻓﺔ ‪ -‬أي اﻟﺘﻌﺮف ﻋﻠﻰ اﳌﺘﻄﻠﺒﺎت اﻟﺴﺎﺑﻘﺔ ﻟﻠﻤﺤﺘﻮى اﻟﺬي ﻳﺘﻢ ﺗﻌﻠﻤﻪ‪.‬‬
‫‪ ‬اﻟﱰﻛﻴﺰ ﻋﻠﻰ اﻟﺒﻨﺎء واﻟﺘﻨﻈﻴﻢ واﻟﱰﺗﻴﺐ ﻟﺘﺴﻬﻴﻞ اﳌﻌﺎﳉﺔ اﳌﺜﻠﻰ ﻟﻠﻤﻌﻠﻮﻣﺎت‪.‬‬
‫‪ ‬اﻟﱰﻛﻴﺰ ﻋﻠﻰ ﻛﻴﻔﻴﺔ اﻟﺘﺬﻛﺮ‪ ،‬واﻻﺳﱰﺟﺎع‪ ،‬واﻟﺘﺨﺰﻳﻦ ﻟﻠﻤﻌﻠﻮﻣﺎت ﰲ اﻟﺬاﻛﺮة‪.‬‬
‫‪ ‬اﻟﺘﻌﻠﻢ ﻳﺮى ﻋﻠﻰ أﻧﻪ ﻋﻤﻠﻴﻪ ﻧﺸﻄﺔ واﻟﱵ ﺗﺘﻢ ﻣﻦ ﺧﻼل اﳌﺘﻌﻠﻢ واﻟﱵ ﳝﻜﻦ أن ﺗﺘﺄﺛﺮ ﺑﺎﳌﺘﻌﻠﻢ‪.‬‬
‫‪ ‬ﳐﺮﺟﺎت اﻟﺘﻌﻠﻢ ﻻ ﺗﻌﺘﻤﺪ ﻓﻘﻂ ﻋﻠﻰ ﻣﺎ ﻳﻘﺪم اﳌﻌﻠﻢ وﻟﻜﻦ ﻋﻠﻰ ﻣﺎ ﻳﻔﻌﻠﻪ اﳌﺘﻌﻠﻢ ﻣﻦ أﺟﻞ ﻣﻌﺎﳉﺔ اﳌﻌﻠﻮﻣﺎت‪.‬‬

‫‪ 2-2-4-4‬ﻋﻨﺎﺻﺮ اﻟﻨﻈﺮﻳﺔ اﻹدراﻛﻴﺔ )‪:(Elements of Cognitivism‬‬

‫ﻋﻨﺎﺻﺮ اﻹدراك ﻫﻲ‪ :‬ﻧﻈﺮﻳﺔ اﻟﺘﺸﻔﲑ اﳌﺰدوﺟﺔ )‪ ،(Dual Coding Theory‬وﻋﺎﻣﻞ اﻟﻨﺴﻴﺎن )‪ ،(Forgetting Factor‬وﳕﻮذج ﻣﻌﺎﳉﺔ‬
‫اﳌﻌﻠﻮﻣﺎت )‪ ،(Information Processing Model‬واﻟﱵ ﺳﺘﺴﺘﺨﺪم ﻻﺣﻘﺎً ﰲ اﻷﻃﺮوﺣﺔ ﻟﺸﺮح اﻟﻨﺘﺎﺋﺞ اﻟﺘﺠﺮﻳﺒﻴﺔ أو ﻟﻠﻨﻤﺬﺟﺔ‬
‫)‪.(Modeling‬‬

‫‪ 1-2-2-4-4‬ﻋﺎﻣﻞ اﻟﻨﺴﻴﺎن )‪:(The Forgetting Factor‬‬

‫ﻟﻘﺪ ﰎ ﻋﻠﻰ ﻣﺪى ﻃﻮﻳﻞ ﻣﻦ اﻟﺰﻣﻦ وﺑﺸﻤﻮﻟﻴﺔ دراﺳﺔ ﺗﺄﺛﲑ ﻋﺎﻣﻞ اﻟﻨﺴﻴﺎن ﻋﻠﻰ ﺗﺬﻛﺮ اﳌﻌﻠﻮﻣﺎت‪ ،‬وﻗﺪ ﻃﺮح ﻋﺎﻣﻞ اﻟﻨﺴﻴﺎن ﻷول ﻣﺮة ﻣﻦ ﻗﺒﻞ‬
‫ﻋﺎﱂ اﻟﻨﻔﺲ اﻷﳌﺎﱐ ‪ Herman Ebbinghaus‬ﻋﺎم ‪ 1913‬واﻟﺬي وﺟﺪ أن ﻋﻤﻠﻴﺔ ﻧﺴﻴﺎن اﳌﻌﻠﻮﻣﺎت ﻋﻨﺪ اﻹﻧﺴﺎن ﺗﺘﻢ ﺑﺸﻜﻞ أﺳﻲ‪ .‬ﻛﻤﺎ‬
‫ﻫﻮ ﻣﺒﲔ ﻋﻠﻰ اﻟﺸﻜﻞ‪ 2-5‬ﻓﺈن ﻣﻌﺪل اﻟﻨﺴﻴﺎن ﻟﻠﻤﻌﻠﻮﻣﺎت ﳝﻜﻦ أن ﻳﺼﻞ إﱃ ‪ 40%‬ﻣﻦ ﻛﻤﻴﺔ اﳌﻌﻠﻮﻣﺎت اﶈﻔﻮﻇﺔ ﺧﻼل ﺛﻼث أﻳﺎم ﻓﻘﻂ‪،‬‬
‫ﰲ ﺣﲔ أﻧﻪ ﺑﺎﻟﺘﺬﻛﲑ اﳌﺘﻘﻄﻊ ﻟﻠﻤﻌﻠﻮﻣﺎت ﻓﺈﻧﻪ ﳝﻜﻦ اﳊﻔﺎظ ﻋﻠﻴﻬﺎ ﺑﺸﻜﻞ داﺋﻢ‪ .‬وﻗﺪ ﰎ ﻻﺣﻘﺎً ﺗﻘﺪﱘ اﻟﻌﺪﻳﺪ ﻣﻦ اﻟﻨﻤﺎذج اﻟﺮﻳﺎﺿﻴﺔ اﻟﱵ ﺗﻌﺘﻤﺪ‬
‫ﺑﺸﻜﻞ أﺳﺎﺳﻲ ﻋﻠﻰ اﻷس‪ ،‬أﻣﺜﻠﺔ ﻋﻠﻰ ﻫﺬﻩ اﻟﻨﻤﺎذج ﳝﻜﻦ أن ﳒﺪﻫﺎ ﰲ اﻷﲝﺎث]‪ ،[518-525‬وﲨﻴﻊ اﻟﻨﻤﺎذج اﳌﺬﻛﻮرة ﺗﺸﱰك ﰲ ﺧﺼﺎﺋﺺ‬

‫‪193‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Engineering Education Methodologies‬‬ ‫ﻣﻨﻬﺠﻴﺎت اﻟﺘﻌﻠﻴﻢ اﳍﻨﺪﺳﻲ |‬

‫ﺗﻘﺪم‬ ‫ﻋﺎﻣﺔ ﺑﺄن ﻣﻌﺪل اﻟﻨﺴﻴﺎن ﻳﻜﻮن أﻋﻠﻰ ﺑﺎﻟﻨﺴﺒﺔ ﻟﻜﻢ ﻟﻠﻤﻌﻠﻮﻣﺎت اﳌﺘﻌﻠﻤﺔ ﺣﺪﻳﺜﺎً‪ ،‬وﻳﺘﻨﺎﻗﺺ اﳌﻌﺪل ﻣﻊ ﻣﺮور اﻟﺰﻣﻦ‪ ،‬اﻟﻮرﻗﺔ اﻟﺒﺤﺜﻴﺔ‬
‫]‪[526‬‬

‫ﻣﻘﺎرﻧﺔ ﲡﺮﻳﺒﻴﺔ ﻏﻨﻴﺔ ﻟﻸﺷﻜﺎل اﳌﺨﺘﻠﻔﺔ ﻟﻌﻮاﻣﻞ اﻟﻨﺴﻴﺎن‪.‬‬

‫إن ﻣﻌﺪل اﻟﻨﺴﻴﺎن ﳝﻜﻦ أن ﻳﺰداد ﺗﺒﻌﺎً ﻟﻌﺪة أﺳﺒﺎب‪ :‬ﻋﻨﺪ دراﺳﺔ اﳌﺴﺎﺋﻞ اﳌﻌﻘﺪة]‪ ،[527‬ﻋﻨﺪﻣﺎ ﻳﻜﻮن اﳌﺘﻌﻠﻢ ﰲ ﻣﺰاج ﺳﻲء]‪ ،[528‬ﻗﻠﺔ اﻟﻮﻇﺎﺋﻒ‬
‫واﻻﺧﺘﺒﺎرات واﻟﺘﻘﻴﻴﻤﺎت]‪ ،[529‬ﻗﻠﺔ اﻟﻨﻮم]‪ ،[530‬ﺷﺮب اﻟﻜﺤﻮل ﰲ ﻓﱰة اﻟﺘﻌﻠﻢ]‪.[531‬‬

‫اﻟﺸﻜﻞ‪ 2-4‬ﻣﻨﺤﲏ ﻣﻌﺎﻣﻞ اﻟﻨﺴﻴﺎن ﻟﻠﻤﻌﻠﻮﻣﺎت‬

‫‪ 2-2-2-4-4‬ﳕﻮذج ﻣﻌﺎﳉﺔ اﳌﻌﻠﻮﻣﺎت )‪:(Information Processing Model‬‬

‫ﻧﻈﺮﻳﺔ ﻣﻌﺎﳉﺔ اﳌﻌﻠﻮﻣﺎت ﰲ اﻟﺘﻌﻠﻢ وآﻟﻴﺔ ﻋﻤﻞ اﻟﺬاﻛﺮة ﻇﻬﺮت ﰲ ﻋﺎم ‪ 1968‬ﻦ ﺧﻼل اﻻﲝﺎث اﻟﱵ ﻗﺎم ﻬﺑﺎ ﻛﻞ ﻣﻦ & ‪Atkinson‬‬

‫‪ Shiffrin‬ﻋﻠﻰ اﻟﺬاﻛﺮة اﻟﺒﺸﺮﻳﺔ]‪ ،[514‬وﻗﺪ ﻻﻗﺖ ﻫﺬﻩ اﻟﻨﻈﺮﻳﺔ رواﺟﺎً واﺳﻌﺎً ﺧﻼل اﻟﻌﻘﻮد اﻟﻘﻠﻴﻠﺔ اﳌﺎﺿﻴﺔ]‪ ،[532‬وﺗﺸﺮح ﻫﺬﻩ اﻟﻨﻈﺮﻳﺔ آﻟﻴﺔ ﺗﻠﻘﻲ‬
‫اﳌﻌﻠﻮﻣﺔ واﺧﺘﺰا�ﺎ ﰲ اﻟﻌﻘﻞ اﻟﺒﺸﺮي‪ ،‬ﺣﻴﺚ ﻳﺘﻢ اﺳﺘﻘﺒﺎل اﳌﻌﻠﻮﻣﺔ ﻋﻦ ﻃﺮﻳﻖ اﳊﻮاس إﱃ ﻣﺎ ﻳﺴﻤﻰ ﺑـﺎﳌﺴﺠﻞ اﳊﺴﻲ )‪(Sensory Register‬‬
‫ﰲ اﻟﺪﻣﺎغ اﻟﺒﺸﺮي‪ ،‬ﻣﻌﻈﻢ ﻫﺬﻩ اﳌﻌﻠﻮﻣﺎت ﻳﺘﻢ ﲡﺎﻫﻠﻬﺎ إذا ﱂ ﺗﻜﻦ ﻣﻬﻤﺔ‪ ،‬ﺑﻌﺾ اﳌﻌﻠﻮﻣﺎت ﲢﻔﻆ ﻟﻔﱰة ﻗﺼﲑة ﰲ ﻣﺎ ﻳﺴﻤﻰ ﺑﺎﻟﺬاﻛﺮة ﻗﺼﲑة‬
‫اﻷﻣﺪ )‪ (Short-term Memory‬وﻳﺘﻢ ﻧﺴﻴﺎ�ﺎ ﺑﻌﺪ ذﻟﻚ‪ ،‬ﺟﺰء أﺧﺮ ﻣﻦ اﳌﻌﻠﻮﻣﺎت ﻳﺘﻢ ﲣﺰﻳﻨﻬﺎ ﰲ ﻣﺎ ﻳﺴﻤﻰ ﺑﺎﻟﺬاﻛﺮة ﻃﻮﻳﻠﺔ اﻷﻣﺪ‬
‫)‪ (Long-term Memory‬ﻴﺚ ﻳﺘﻢ اﻻﺣﺘﻔﺎظ ﻬﺑﺎ ﻟﻔﱰات ﻃﻮﻳﻠﺔ‪.‬‬

‫اﻟﺸﻜﻞ‪ 3-4‬ﻳﻮﺿﺢ آﻟﻴﺔ ﲣﺰﻳﻦ اﳌﻌﻠﻮﻣﺎت ﰲ اﻟﺬاﻛﺮة اﻟﺒﺸﺮﻳﺔ‪ ،‬ﺣﻴﺚ ﺗﺼﻞ اﳌﻌﻠﻮﻣﺎت ﰲ اﻟﺒﺪاﻳﺔ إﱃ ﺣﻮاس اﻹﻧﺴﺎن ﻛﺘﻨﺒﻴﻪ ﺧﺎرﺟﻲ‪ ،‬وﻣﻦ ﰒ‬
‫ﺗﻌﱪ إﱃ اﳌﺴﺠﻞ اﳊﺴﻲ ﺣﻴﺚ ﻳﺘﻢ ﲡﺎﻫﻞ ﺟﺰء ﻣﻨﻬﺎ ﻣﺒﺎﺷﺮة‪ ،‬واﳉﺰء اﻵﺧﺮ ﻳﻌﱪ ﺑﺎﲡﺎﻩ ﻓﻀﺎء اﻟﺬاﻛﺮة ﻗﺼﲑة اﻷﻣﺪ‪ ،‬وﻫﻨﺎ ﺳﻴﺘﻢ ﻧﺴﻴﺎن ﺑﻌﺾ‬
‫اﳌﻌﻠﻮﻣﺎت واﻟﺒﻌﺾ اﻵﺧﺮ ﺳﺘﺘﻢ ﻋﻤﻠﻴﺔ إﻋﺎدة ﻣﻌﺎﳉﺘﻪ ﻟﻴﺼﺒﺢ ﺟﺎﻫﺰاً ﻟﻠﺘﺨﺰﻳﻦ ﰲ اﻟﺬاﻛﺮة ﻃﻮﻳﻠﺔ اﻷﻣﺪ‪.‬‬

‫‪Long Term‬‬
‫‪Memory‬‬
‫‪Retrieval‬‬

‫‪Rehearsal & Coding‬‬

‫‪Information‬‬
‫‪External‬‬ ‫‪Sensory‬‬ ‫‪Initial‬‬ ‫‪Short Term‬‬
‫‪Stimulus‬‬ ‫‪Register‬‬ ‫‪Processing‬‬ ‫‪Memory‬‬

‫‪Forgotten‬‬ ‫‪Forgotten‬‬ ‫‪Repetition‬‬

‫اﻟﺸﻜﻞ‪ 3-4‬آﻟﻴﺔ ﲣﺰﻳﻦ اﳌﻌﻠﻮﻣﺎت ﰲ اﻟﺬاﻛﺮة اﻟﺒﺸﺮﻳﺔ‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪194‬‬
‫‪24‬‬ ‫اﻟﻔﺼﻞ اﻟﺮاﺑﻊ | ‪Chapter 4‬‬

‫ﻓﻴﻤﺎ ﻳﻠﻲ ﻧﻮﺿﺢ أﻫﻢ ﻋﻨﺎﺻﺮ ﻧﻈﺮﻳﺔ ﻣﻌﺎﳉﺔ اﻟﺒﻴﺎﻧﺎت اﳋﺎﺻﺔ ﺑﺎﻟﺬاﻛﺮة‪.‬‬

‫‪ 1-2-2-2-4-4‬اﳌﺴﺠﻞ اﳊﺴﻲ )‪:(Sensory Register‬‬

‫ﻳﺘﻠﻘﻰ اﳌﺴﺠﻞ اﳊﺴﻲ ﻛﻤﺎً ﻫﺎﺋﻼً ﻣﻦ اﳌﻌﻠﻮﻣﺎت ﻋﻦ ﻃﺮﻳﻖ اﳊﻮاس‪ ،‬ﻛﺎﻟﺒﺼﺮ واﻟﺴﻤﻊ واﻟﺸﻢ واﻟﺬوق‪ ،‬وﲣﺘﻠﻒ ﻓﱰة اﻻﺣﺘﻔﺎظ ﺑﺎﳌﻌﻠﻮﻣﺎت ﺗﺒﻌﺎً‬
‫ﻟﻨﻮع اﳌﻨﺒﻪ‪ ،‬ﻓﻴﺘﻢ اﻻﺣﺘﻔﺎظ ﺑﺎﳌﻨﺒﻪ اﻟﺒﺼﺮي ﻣﺜﻼً ﳌﺪة ﻧﺼﻒ ﺛﺎﻧﻴﺔ ﺑﻴﻨﻤﺎ ﳛﺘﻔﻆ ﺑﺎﳌﻨﺒﻪ اﻟﺴﻤﻌﻲ ﳌﺪة ﺛﻼث ﺛﻮان]‪ ،[533‬وﳜﺘﻔﻲ اﳌﻨﺒﻪ ﺑﻌﺪﺋﺬ إذا ﱂ‬
‫ﺗﺘﻢ ﻣﻌﺎﳉﺘﻪ‪ .‬وﻣﻦ أﺟﻞ ﻣﻌﺎﳉﺔ أﻓﻀﻞ ﻟﻠﻤﻌﻠﻮﻣﺎت ﳚﺐ أن ﻳﺘﻢ ﺗﺮﻛﻴﺰ اﻻﻧﺘﺒﺎﻩ إﱃ اﳌﻌﻠﻮﻣﺎت اﳌﺘﻠﻘﺎة‪ ،‬وﳍﺬا ﺗﺄﺛﲑ ﻣﺒﺎﺷﺮ ﻋﻠﻰ ﻋﻤﻠﻴﱵ اﻟﺘﻌﻠﻴﻢ‬
‫اﻟﺘﻌﻠﻢ إذ ﳚﺐ أن ﻳﺘﻢ ﺗﻨﺒﻴﻪ اﻟﻄﻼب إﱃ اﳌﻌﻠﻮﻣﺎت اﳌﻬﻤﺔ اﻟﱵ ﳚﺐ ﻋﻠﻴﻬﻢ اﻻﺣﺘﻔﺎظ ﻬﺑﺎ دوﻧﺎً ﻋﻦ ﻏﲑﻫﺎ‪.‬‬

‫‪ 2-2-2-2-4-4‬اﻟﺬاﻛﺮة ﻗﺼﲑة اﻷﻣﺪ أو ذاﻛﺮة اﻟﻌﻤﻞ )‪:(Short-term or Working Memory‬‬

‫ﻋﻨﺪﻣﺎ ﻳﻌﻄﻲ اﻹﻧﺴﺎن اﻧﺘﺒﺎﻫﺎً إﱃ اﳌﻌﻠﻮﻣﺎت اﳌﺘﻠﻘﺎة ﰲ اﳌﺴﺠﻞ اﳊﺴﻲ‪ ،‬ﻳﺘﻢ ﻧﻘﻠﻬﺎ ﻣﺒﺎﺷﺮة إﱃ ذاﻛﺮة اﻟﻌﻤﻞ]‪ ،[534‬واﻟﱵ ﺗﻌﺮف أﻳﻀﺎً ﺑﺎﻟﺬاﻛﺮة‬
‫ﻗﺼﲑة اﻷﻣﺪ]‪ ،[515‬وﻫﻲ اﳌﻜﺎن اﻟﺬي ﻳﺘﻢ ﻓﻴﻪ ﻣﻌﺎﳉﺔ اﳌﻌﻠﻮﻣﺎت اﻟﱵ ﻳﺘﻢ ﺗﻠﻘﻴﻬﺎ آﻧﻴﺎً‪ ،‬وﻓﻴﻬﺎ ﻳﻘﻮم اﻟﺪﻣﺎغ ﺑﺘﻨﻈﻴﻢ اﳌﻌﻠﻮﻣﺎت وﲡﻬﻴﺰﻫﺎ إﻣﺎ‬
‫ﻟﻠﺘﺨﺰﻳﻦ ﻃﻮﻳﻞ اﻷﻣﺪ أو ﻟﻴﺘﻢ ﻧﺴﻴﺎ�ﺎ‪ ،‬ﻛﻤﺎ ﻳﻘﻮم ﺑﺮﺑﻄﻬﺎ ﻣﻊ ﻣﻌﻠﻮﻣﺎت أﺧﺮى‪.‬‬

‫ﻟﻠﺬاﻛﺮة ﻗﺼﲑة اﻷﻣﺪ ﺳﻌﺔ ﳏﺪدة‪ ،‬وﻻ ﳝﻜﻦ اﻻﺣﺘﻔﺎظ ﺑﺎﳌﻌﻠﻮﻣﺔ ﻓﻴﻬﺎ ﻷﻛﺜﺮ ﻣﻦ ‪ 30‬ﺛﺎﻧﻴﺔ‪ ،‬اﻟﺴﻌﺔ اﻟﻄﺒﻴﻌﻴﺔ ﳍﺬﻩ اﻟﺬاﻛﺮة ﻫﻲ ﻣﻦ ‪ 5~9‬ﺑﺘﺎت‬
‫ﻣﻦ اﳌﻌﻠﻮﻣﺎت‪ ،‬ﲟﻌﲎ آﺧﺮ‪ ،‬ﻳﺴﺘﻄﻴﻊ اﻹﻧﺴﺎن أن ﻳﻔﻜﺮ ﲞﻤﺴﺔ إﱃ ﺗﺴﻌﺔ أﺷﻴﺎء ﻓﻘﻂ ﰲ ٍ‬
‫آن واﺣﺪ‪ ،‬وﺑﺎﻟﺘﺎﱄ ﻓﺈن اﻟﺬاﻛﺮة ﻗﺼﲑة اﻷﻣﺪ ﻫﻲ‬
‫اﻟﻘﻨﺎة اﻟﱵ ﺗﻨﻘﻞ اﳌﻌﻠﻮﻣﺎت ﻣﻦ اﳌﺴﺠﻞ اﳊﺴﻲ إﱃ اﻟﺬاﻛﺮة ﻃﻮﻳﻠﺔ اﻷﻣﺪ‪.‬‬

‫إن ﳏﺪودﻳﺔ ﺳﻌﺔ ذاﻛﺮة اﻟﻌﻤﻞ ﺗﻌﲏ أن ﻫﻨﺎك ﻧﻘﻄﺔ ﺣﺮﺟﺔ ﰲ ﻫﺬﻩ اﻟﻌﻤﻠﻴﺔ‪ ،‬أي أن اﳌﻌﻠﻮﻣﺎت اﻟﱵ ﺗﺪوم ﻟﻔﱰة أﻃﻮل ﰲ ذاﻛﺮة اﻟﻌﻤﻞ ﺗﻜﻮن‬
‫ﻟﺪﻳﻬﺎ ﻓﺮﺻﺔ أﻛﱪ ﻟﻴﺘﻢ ﻧﻘﻠﻬﺎ إﱃ اﻟﺬاﻛﺮة ﻃﻮﻳﻠﺔ اﻷﻣﺪ‪ ،‬وﻋﻠﻰ ﻛﻞ ﺣﺎل ﻓﺎﳊﺪ اﻷﻋﻈﻤﻲ ﻟﺒﻘﺎء اﳌﻌﻠﻮﻣﺔ ﰲ ذاﻛﺮة اﻟﻌﻤﻞ ﻫﻮ ‪ 30‬ﺛﺎﻧﻴﺔ ﻛﻤﺎ‬
‫ذﻛﺮﻧﺎ ﺳﺎﺑﻘﺎً‪.‬‬

‫ﻫﻨﺎك ﻃﺮﻳﻘﺔ ﻹﻋﺎدة ﲣﺰﻳﻦ اﳌﻌﻠﻮﻣﺎت ﰲ ذاﻛﺮة اﻟﻌﻤﻞ وﻫﻲ إﻋﺎدة اﻟﺘﻔﻜﲑ ﰲ اﳌﻌﻠﻮﻣﺔ ﻣﺮة ﺑﻌﺪ ﻣﺮة‪ ،‬وﻫﺬﻩ اﻟﻌﻤﻠﻴﺔ ﺗﺪﻋﻰ "اﻟﺘﻜﺮار أو إﻋﺎدة‬
‫اﻟﺴﺮد" )‪ ،(Rehearsal‬ﺣﻴﺚ ﺗﻘﻮم ذاﻛﺮة اﻟﻌﻤﻞ ﺑﺎﺳﺘﺪﻋﺎء اﳌﻌﻠﻮﻣﺎت ﳎﺪداً ﻣﻦ اﻟﺬاﻛﺮة ﻃﻮﻳﻠﺔ اﻷﻣﺪ ﻟﻴﺘﻢ اﻟﻌﻤﻞ ﻋﻠﻴﻬﺎ وﻣﻌﺎﳉﺘﻬﺎ‪ .‬ﺗﺸﺒﻪ‬
‫ذاﻛﺮة اﻟﻌﻤﻞ ﰲ ﻋﻤﻠﻴﺎت ﻣﻌﺎﳉﺔ اﳌﻌﻠﻮﻣﺎت اﻟﺬاﻛﺮة اﻟﻌﺸﻮاﺋﻴﺔ ‪ RAM‬ﰲ اﳊﻮاﺳﻴﺐ اﻟﺸﺨﺼﻴﺔ )‪.(PCs‬‬

‫‪ 3-2-2-2-4-4‬اﻟﺬاﻛﺮة ﻃﻮﻳﻠﺔ اﻷﻣﺪ )‪:(Long-term Memory‬‬

‫ﻳﺘﻢ ﰲ ﻫﺬﻩ اﻟﺬاﻛﺮة اﻻﺣﺘﻔﺎظ ﺑﺎﳌﻌﻠﻮﻣﺎت ﻟﻔﱰة أﻃﻮل‪ ،‬وﻳﺘﻢ ﻓﻴﻬﺎ أﻳﻀﺎً ﲣﺰﻳﻦ ﻣﻨﻬﺠﻴﺎت اﻟﺘﻌﻠﻢ]‪ ،[534‬وﻫﻨﺎك ﺛﻼﺛﺔ أﻧﻮاع ﳐﺘﻠﻔﺔ ﻣﻦ اﻟﺬواﻛﺮ‬
‫اﻟﻌَﺮﺿﻴﺔ]‪ ،[516,535‬اﻟﺬاﻛﺮة اﻟﺪﻻﻟﻴﺔ]‪ ،[536‬واﻟﺬاﻛﺮة اﻹﺟﺮاﺋﻴﺔ]‪.[537‬‬
‫ﰲ اﻟﺬاﻛﺮة ﻃﻮﻳﻠﺔ اﻷﻣﺪ‪ :‬اﻟﺬاﻛﺮة َ‬

‫اﻟﻌَﺮﺿﻴﺔ )‪ (Episodic Memory‬ﺎﻷﺣﺪاث اﳊﺮﻛﻴﺔ واﻟﺴﻤﻌﻴﺔ واﻟﺒﺼﺮﻳﺔ اﻟﱵ ﳝﺮ ﻬﺑﺎ اﻹﻧﺴﺎن‪ ،‬أي أن اﻟﺬاﻛﺮة َ‬
‫اﻟﻌَﺮﺿﻴﺔ ﲢﻮي‬ ‫ﲣﺘﺺ اﻟﺬاﻛﺮة َ‬
‫أﺷﻜﺎﻻً ﻣﻦ اﳋﱪات واﻟﺘﺠﺎرب اﳌﺨﺘﻠﻔﺔ ﻣﺮﺗﺒﺔ ﲝﺴﺐ ﻣﻜﺎن وزﻣﺎن ﺣﺪوﺛﻬﺎ‪.‬‬

‫اﻟﺬاﻛﺮة اﻟﺪﻻﻟﻴﺔ )‪ (Semantic Memory‬ﲣﺘﺺ ﺑﺎﻷﻣﻮر اﻟﱵ ﺗﻌﻮد ﻟﺼﻔﺎت اﻋﺘﺒﺎرﻳﺔ وﺣﻘﺎﺋﻖ وﻣﻌﻠﻮﻣﺎت ﻋﺎﻣﺔ‪ ،‬واﻟﱵ ﻳﺘﻢ ﺗﻨﻈﻴﻤﻬﺎ ﲨﻴﻌﺎً‬
‫ﻛﺸﺒﻜﺔ ﻣﻦ اﻷﻓﻜﺎر اﳌﱰاﺑﻄﺔ ﻣﻊ ﺑﻌﻀﻬﺎ أو اﻟﻌﻼﻗﺎت وﻳﻄﻠﻖ ﻋﻠﻴﻬﺎ ﺑ ـ‪.[538]Schemata‬‬

‫‪195‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Engineering Education Methodologies‬‬ ‫ﻣﻨﻬﺠﻴﺎت اﻟﺘﻌﻠﻴﻢ اﳍﻨﺪﺳﻲ |‬

‫أﻣﺎ اﻟﺬاﻛﺮة اﻹﺟﺮاﺋﻴﺔ )‪ (Procedural Memory‬ﻓﻬﻲ اﳌﻜﺎن اﻟﺬي ﻳﻘﻮم اﻹﻧﺴﺎن ﻓﻴﻪ ﺑﺘﺨﺰﻳﻦ اﳋﻮارزﻣﻴﺎت اﻟﻼزﻣﺔ ﻟﺘﻨﻔﻴﺬ ﻣﻬﻤﺎت ﻣﻌﻴﻨﺔ‪،‬‬
‫وﻫﺬﻩ اﻹﺟﺮاءات ﻳﺘﻢ ﲣﺰﻳﻨﻬﺎ ﻋﻠﻰ ﺷﻜﻞ ﺛﻨﺎﺋﻴﺎت ﻣﺆﻟﻔﺔ ﻣﻦ "اﳌﺜﲑ‪-‬اﻻﺳﺘﺠﺎﺑﺔ" )‪.(stimuli-response‬‬

‫واﻟﱵ ﺗﻘﱰح أن‬ ‫اﻟﻌَﺮﺿﻴﺔ واﻟﺬاﻛﺮة اﻹﺟﺮاﺋﻴﺔ ﻗﺎدا إﱃ إﳚﺎد ﻧﻈﺮﻳﺔ اﻟﺘﺸﻔﲑ اﳌﺰدوج )‪(Dual Coding Theory‬‬
‫]‪[539‬‬
‫إن ﻣﺒﺪأي اﻟﺬاﻛﺮة َ‬
‫اﻟﻌَﺮﺿﻴﺔ‪ ،‬وﺑﺸﻜﻞ ﻟﻔﻈﻲ )‪ (Verbally‬ﻣﺮﺗﺒﻂ ﺑﺎﻟﺬاﻛﺮة اﻟﺪﻻﻟﻴﺔ وﻬﺑﺬا‬
‫اﳌﻌﻠﻮﻣﺎت ﻳﺘﻢ ﲣﺰﻳﻨﻬﺎ ﺑﺸﻜﻞ ﻣﺮﺋﻲ )‪ (Visually‬ﻣﺮﺗﺒﻂ ﺑﺎﻟﺬاﻛﺮة َ‬
‫اﻟﺸﻜﻞ ﻳﺘﻢ اﺳﺘﻌﺎدة اﳌﻌﻠﻮﻣﺔ ﺑﺸﻜﻞ أﻓﻀﻞ ﻣﻦ اﻟﱵ ﰎ ﲣﺰﻳﻨﻬﺎ ﺑﻄﺮﻳﻘﺔ واﺣﺪة‪.‬‬

‫‪ 3-2-2-4-4‬آﺛﺎر ﻧﻈﺮﻳﺔ ﻣﻌﺎﳉﺔ اﳌﻌﻠﻮﻣﺎت ﻋﻠﻰ ﻋﻤﻠﻴﺔ اﻟﺘﻌﻠﻴﻢ )‪:(Implications of the IPT on Education‬‬
‫إن ﻓﻬﻢ آﻟﻴﺔ ﻋﻤﻞ اﻟﺬاﻛﺮة اﻟﺒﺸﺮﻳﺔ واﻟﻔﺮﺿﻴﺎت اﻟﱵ ﺗﻘﺴﻢ ﻫﺬﻩ اﻟﺬاﻛﺮة إﱃ ﻋﺪة أﻧﻮاع ﳐﺘﻠﻔﺔ ﳝﻜﻦ أن ﻳﺆﺛﺮ ﻋﻠﻰ اﻟﺘﺼﻤﻴﻢ اﻟﺘﻌﻠﻴﻤﻲ‬
‫)‪ (Educational Design‬ﻣﻦ ﺟﻮاﻧﺐ ﳐﺘﻠﻔﺔ ﻛﻤﺎ ﺳﻨﺒﲔ ﻓﻴﻤﺎ ﻳﻠﻲ‪...‬‬

‫‪ 1-3-2-2-4-4‬أﺛﺮ اﻟﺬاﻛﺮة ﻗﺼﲑة اﻷﻣﺪ ﰲ اﻟﺘﻌﻠﻴﻢ )‪:(Impact of Short-term Memory on Education‬‬

‫ﰲ ﺿﻮء ﻣﺎ ذﻛﺮﻧﺎ ﺳﺎﺑﻘﺎً ﻋﻦ اﻟﺬاﻛﺮة ﻗﺼﲑة اﻷﻣﺪ‪ ،‬وﻟﺘﺴﻬﻴﻞ ﻋﻤﻠﻴﺔ ﺗﺜﺒﻴﺖ اﳌﻌﻠﻮﻣﺎت‪ ،‬ﻳﻨﺒﻐﻲ ﻋﻠﻰ اﳌﻌﻠﻢ أن ﳜﺼﺺ وﻗﺘﺎً ﻟﻠﻤﺮاﺟﻌﺔ أﺛﻨﺎء‬
‫اﻟﺪرس‪ ،‬وﻛﻤﺎ رأﻳﻨﺎ ﺳﺎﺑﻘﺎً‪ ،‬ﻓﻤﺤﺪودﻳﺔ ﺳﻌﺔ اﻟﺬاﻛﺮة ﻗﺼﲑة اﻷﻣﺪ ﺗﻔﺮض ﻋﺪم ﻃﺮح اﻟﻌﺪﻳﺪ ﻣﻦ اﻷﻓﻜﺎر اﳉﺪﻳﺪة ﻋﻠﻰ اﻟﻄﻼب ﰲ وﻗﺖ‬
‫واﺣﺪ‪ ،‬وإﻻ ﺳﻴﺆدي ذﻟﻚ إﱃ ﻓﺮط ﲢﻤﻴﻞ اﻟﺬاﻛﺮة ﻗﺼﲑة اﻷﻣﺪ]‪ .[540‬ﻓﺈذا ﻛﺎﻧﺖ اﻷﻓﻜﺎر اﳉﺪﻳﺪة ﻣﺮﺗﺒﻄﺔ ﲟﻌﺮﻓﺔ ﺳﺎﺑﻘﺔ ﻣﻮﺟﻮدة ﻟﺪى‬
‫اﻟﻄﺎﻟﺐ‪ ،‬أي ﻣﺮﺗﺒﻄﺔ ﲟﻌﻠﻮﻣﺎت ﳐﺰﻧﺔ ﺳﺎﺑﻘﺎً ﰲ اﻟﺬاﻛﺮة ﻃﻮﻳﻠﺔ اﻷﻣﺪ‪ ،‬ﻓﺈن ﻫﺬا َﺳﻴُﺤﺪث ﻋﻤﻠﻴﺎت اﺗﺼﺎل ﻣﺘﺒﺎدﻟﺔ ﺑﲔ اﻟﺬاﻛﺮﺗﲔ ﻗﺼﲑة اﻷﻣﺪ‬
‫وﻃﻮﻳﻠﺔ اﻷﻣﺪ‪ ،‬اﻷﻣﺮ اﻟﺬي ﻳﻨﺘﺞ ﻋﻨﻪ ﲣﺰﻳﻦ ذاﰐ ﻟﻸﻓﻜﺎر اﳉﺪﻳﺪة ﰲ اﻟﺬاﻛﺮة ﻃﻮﻳﻠﺔ اﻷﻣﺪ‪ ،‬ﳑﺎ ﳜﻠﻖ ﻣﺴﺎﺣﺔ ﻓﺎرﻏﺔ ﰲ اﻟﺬاﻛﺮة ﻗﺼﲑة اﻷﻣﺪ‬
‫ﻟﺘﺨﺰﻳﻦ أﻓﻜﺎر ﺟﺪﻳﺪة إﺿﺎﻓﻴﺔ‪.‬‬

‫‪ 2-3-2-2-4-4‬أﺛﺮ اﻟﺬاﻛﺮة ﻃﻮﻳﻠﺔ اﻷﻣﺪ ﰲ اﻟﺘﻌﻠﻴﻢ )‪:(Impact of Long-term Memory on Education‬‬

‫إن إﺿﺎﻓﺔ اﳌﺆﺛﺮات اﻟﺴﻤﻌﻴﺔ أو اﻟﺒﺼﺮﻳﺔ ﰲ ﻋﻤﻠﻴﺔ اﻟﺘﻌﻠﻴﻢ ﺳﻮف ﺗﻌﺰز ﻣﻦ اﻟﺘﺨﺰﻳﻦ اﻟﻔﻌﺎل ﰲ اﻟﺬاﻛﺮة ا َﻟﻌَﺮﺿﻴﺔ‪ ،‬وﺑﺎﻟﺘﺎﱄ ﺗﻌﺰﻳﺰ ﻋﻤﻠﻴﺔ‬
‫اﻟﺘﻌﻠﻢ]‪.[516‬‬

‫ﻣﻦ ﺧﻼل اﺳﺘﺨﺪام اﻷﻧﺸﻄﺔ اﻟﻔﻌﺎﻟﺔ اﻷﺧﺮى اﳌﺮﺗﺒﻄﺔ ﺑﺎﻟﺬاﻛﺮة اﻟﻌﺮﺿﻴﺔ )ﻛﺎﳌﺸﺎرﻳﻊ وﻋﻤﻠﻴﺎت اﶈﺎﻛﺎة واﻟﻌﻤﻞ اﳉﻤﺎﻋﻲ( وذﻟﻚ ﺧﻼل ﻛﺎﻣﻞ‬
‫ﻓﱰة اﻟﺘﻌﻠﻢ‪ ،‬ﻳﻨﺘﺞ ﻋﻨﻪ أﻳﻀﺎً ﺗﻌﺰﻳﺰ ﰲ اﻟﺘﻌﻠﻢ واﳋﱪات اﳌﻜﺘﺴﺒﺔ‪.‬‬

‫أﻣﺎ ﺑﺎﻟﻨﺴﺒﺔ ﻷﺛﺮ ﻣﺒﺪأ ‪ schemata‬ﻋﻠﻰ اﻟﺘﻌﻠﻴﻢ‪ ،‬ﻓﻴﺘﻤﺜﻞ ﺑﺄن اﳌﻌﻠﻮﻣﺎت ﳝﻜﻦ ﺗﺜﺒﻴﺘﻬﺎ ﺑﺸﻜﻞ أﻓﻀﻞ ﰲ اﻟﺬاﻛﺮة إذا ﻛﺎﻧﺖ ﻣﺮﺗﺒﺔ ﻣﺴﺒﻘﺎً وﻓﻖ‬
‫أن ﻣﻌﺪل اﺳﺘﻌﺎدة اﳌﻌﻠﻮﻣﺎت ﻳﺘﻨﺎﻗﺺ ﺑﺸﻜﻞ ﻛﺒﲑ ﰲ اﻷﺳﺎﺑﻴﻊ اﻟﻘﻠﻴﻠﺔ اﻷوﱃ ﻣﻦ‬ ‫]‪[542‬‬
‫ﺧﻄﺔ ﻣﻌﻴﻨﺔ أو وﻓﻖ ﻣﻨﻬﺞ ﳏﺪد]‪ .[541‬وﻗﺪ وﺟﺪ‬
‫ﺗﻠﻘﻴﻬﺎ‪ ،‬وﻟﻜﻦ اﳌﻌﻠﻮﻣﺎت اﳌﺜﺒﺘﺔ ﺑﻌﺪ ذﻟﻚ ﺗﺪوم ﻟﻔﱰات ﻃﻮﻳﻠﺔ ‪ -‬ﻫﺬا ﻳﺒﲔ أن ﻋﻤﻠﻴﺔ إﻋﺎدة ﲣﺰﻳﻦ اﳌﻌﻠﻮﻣﺔ ﺑﻌﺪ ﻋﺪة أﺳﺎﺑﻴﻊ ﳝﻜﻦ أن ﺗﺴﺘﺨﺪم‬
‫ﻟﺘﺜﺒﻴﺖ اﳌﻌﻠﻮﻣﺎت ﰲ اﻟﺬاﻛﺮة ﻃﻮﻳﻠﺔ اﻷﻣﺪ‪.‬‬

‫‪ 3-4-4‬اﻟﻨﻈﺮﻳﺔ اﻻﺗﺼﺎﻟﻴﺔ )‪:(Connectivism‬‬

‫ﰲ زﻣﻦ ﻏﺪت ﰲ اﻟﺘﻜﻨﻮﻟﻮﺟﻴﺎ أداةً ﰲ ﺗﺸﻜﻴﻞ ﺣﻴﺎﺗﻨﺎ اﳌﻌﺎﺻﺮة‪ :‬ﺣﻮل ﻛﻴﻒ ﻧﻌﻴﺶ؟ ﻛﻴﻒ ﻧﺘﻜﻠﻢ؟ ﻛﻴﻒ ﻧﺘﻮاﺻﻞ ﻣﻊ اﻵﺧﺮﻳﻦ؟‪ .‬ﻓﺈن اﻟﺘﻌﻠﻢ‬
‫ﺻﺎر ﲝﺎﺟﺔ ﻣﺎﺳﺔ إﱃ ﻧﻈﺮﻳﺔ ﺗﺼﻒ ﻣﺒﺎدﺋﻪ وﺗﻄﺒﻴﻘﺎﺗﻪ ﺑﺎﻋﺘﺒﺎرﻩ اﻧﻌﻜﺎﺳﺎً ﻟﻠﺒﻴﺌﺔ اﻻﺟﺘﻤﺎﻋﻴﺔ ﻟﻠﻤﺘﻌﻠﻤﲔ‪ .‬ﻟﺬا ﻛﺎن اﻟﻌﻤﻞ ﺟﺎداً ﻋﻠﻰ إﻃﻼق ﻧﻈﺮﻳﺔ‬
‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪196‬‬
‫‪24‬‬ ‫اﻟﻔﺼﻞ اﻟﺮاﺑﻊ | ‪Chapter 4‬‬

‫ﺗﺮﺑﻮﻳﺔ ﺟﺪة ﺗﺴﺘﻄﻴﻊ أن ﺗﺪرس اﻟﻨﻤﻮ اﻻﺟﺘﻤﺎﻋﻲ ﻟﻠﻤﻌﺮﻓﺔ ﻋﱪ اﻟﺘﻘﻨﻴﺎت اﳊﺪﻳﺜﺔ وﻫﻮ ﻣﺎ ﻧﻄﻠﻖ ﻋﻠﻴﻪ "اﳌﻌﺮﻓﺔ اﺠﻤﻟﺘﻤﻌﻴﺔ اﳌﺴﺘﺪاﻣﺔ"‪ ،‬وﲢﻤﻞ‬
‫ﻫﺬﻩ اﻟﻨﻈﺮﻳﺔ ﺻﻔﺔ "اﻻﺗﺼﺎﻟﻴﺔ" )‪ Connectivism‬وﺗﻨﺎﻗﺶ اﻟﺘﻌﻠﻢ ﺑﻮﺻﻔﻪ ﺷﺒﻜﺔ ﻣﻦ اﳌﻌﺎرف اﻟﺸﺨﺼﻴﺔ اﻟﱵ ﻳﺘﻢ إﻧﺸﺎؤﻫﺎ ﻬﺑﺪف ﻣﺸﺎرﻛﺔ‬
‫اﻟﻨﺎس ﰲ اﻟﺘﻨﺸﺌﺔ اﻻﺟﺘﻤﺎﻋﻴﺔ واﻟﺘﻔﺎﻋﻞ ﻋﻠﻰ ﺷﺒﻜﺔ اﻟﻮﻳﺐ‪ ،‬ﻛﻤﺎ أ�ﺎ ﺗﺴﻌﻰ ﺟﺎﻫﺪة ﻟﻠﺘﻐﻠﺐ ﻋﻠﻰ اﻟﻘﻴﻮد اﳌﻔﺮوﺿﺔ ﻋﻠﻰ اﻟﻨﻈﺮﻳﺎت اﻟﺴﻠﻮﻛﻴﺔ‬
‫اﻹدراﻛﻴﺔ اﻟﺒﻨﺎﺋﻴﺔ ﻋﻦ ﻃﺮﻳﻖ ﲡﻤﻴﻊ اﻟﻌﻨﺎﺻﺮ اﻟﺒﺎرزة ﻣﻦ اﻷﻃﺮ اﻟﺜﻼث‪ :‬اﻻﺟﺘﻤﺎﻋﻴﺔ واﳌﻌﺮﻓﻴﺔ واﻟﺘﻜﻨﻮﻟﻮﺟﻴﺔ‪ ،‬ﻬﺑﺪف اﺳﺘﺤﺼﺎل ﻧﻈﺮﻳﺎت ﺟﺪﻳﺪة‬
‫ودﻳﻨﺎﻣﻴﻜﻴﺔ ﻟﺒﻨﺎء ﻧﻈﺮﻳﺔ اﻟﺘﻌﻠﻢ ﰲ اﻟﻌﺼﺮ اﻟﺮﻗﻤﻲ]‪ .[543‬ﻋﻠﻰ ﻛﻞ ﺣﺎل ﻣﺎ ﺗﺰال ﻫﺬﻩ اﻟﻨﻈﺮﻳﺔ ﰲ ﻃﻮر اﻷﲝﺎث وﱂ ﻳﺜﺒﺖ ﳍﺎ أي ﺗﻄﺒﻴﻖ ﺣﻘﻴﻘﻲ‪.‬‬

‫‪ 4-4-4‬اﻟﻨﻈﺮﻳﺔ اﻟﺒﻨﺎﺋﻴﺔ )‪:(Constructivism‬‬

‫اﻟﺒﻴﺪاﻏﻮﺟﻴﺎ اﻟﺒﻨﺎﺋﻴﺔ )‪ (Constructivist pedagogy‬ﺗﻌﺪ ﻣﻦ أﻫﻢ وأﻛﺜﺮ اﳌﺪاﺧﻞ واﻻﲡﺎﻫﺎت اﻟﱰﺑﻮﻳﺔ اﳊﺪﻳﺜﺔ اﻟﱵ ﺗﻠﻘﻰ رواﺟﺎً واﺳﻌﺎً‬
‫واﻫﺘﻤﺎﻣﺎً ﻣﺘﺰاﻳﺪاً ﰲ اﻟﻔﻜﺮ اﻟﱰﺑﻮي واﻟﺘﺪرﻳﺴﻲ اﳌﻌﺎﺻﺮ‪ ،‬وﻫﻲ ﺗﺘﺪاﺧﻞ ﻣﻊ اﻟﻨﻈﺮﻳﺔ اﻹدراﻛﻴﺔ ﰲ ﻛﺜﲑ ﻣﻦ اﻟﻨﻘﺎط ‪ ،‬إﻻ أ�ﺎ ﲢﻮي ﳕﻮذﺟﺎً‬
‫]‪[544‬‬

‫ﴰﻮﻟﻴﺎً ﻟﻠﱰﺑﻴﺔ واﻟﺘﻌﻠﻢ‪ ،‬وﻫﻲ ﲢﺎول أن ﺗﺜﺒﺖ أن اﻟﻮاﻗﻊ ﻻ ﳝﻜﻦ أن ﻳﺒﲎ ﰲ اﻟﺪﻣﺎغ اﻟﺒﺸﺮﻳﺔ دون ﺧﻮض ﻫﺬا اﻟﻮاﻗﻊ واﻟﺘﻌﺮض ﻟﻠﺨﱪات اﳌﻮﺟﻮدة‬
‫ﻓﻴﻪ]‪.[545‬‬

‫ﻋﻠﻰ ﻋﻜﺲ اﻟﱰﻛﻴﺰ اﻟﺪﻗﻴﻖ ﻟﻠﻨﻈﺮﻳﺔ اﻹدراﻛﻴﺔ ﻋﻠﻰ اﻵﻟﻴﺎت اﻟﺪاﺧﻠﻴﺔ اﻟﱵ ﺗﺮاﻓﻖ ﻋﻤﻠﻴﺎت اﻟﺘﻌﻠﻢ‪ ،‬ﻓﺈن اﻟﻨﻈﺮﻳﺔ اﻟﺒﻨﺎﺋﻴﺔ ﺗﻔﻬﻢ اﻟﺘﻌﻠﻢ ﻋﻠﻰ أﻧﻪ‬
‫ﻋﻤﻠﻴﺔ ﻣﻌﺮﻓﻴﺔ ﺑﻨﺎﺋﻴﺔ ﺗﺘﻢ ﻣﻦ ﻗﺒﻞ اﻷﻓﺮاد أﻧﻔﺴﻬﻢ]‪ ،[545-553‬ﻓﺎﻟﺘﻌﻠﻢ ﳚﺐ أن ﻳﺮﺗﻜﺰ ﻋﻠﻰ اﳌﺒﺎدئ واﳌﻔﺎﻫﻴﻢ اﳌﺴﺘﻨﺪة إﱃ ﻗﺮاﺋﻦ ﺑﺪﻻً ﻣﻦ إﻣﻼء‬
‫ﻘﺎﺋﻖ اﺠﻤﻟﺮدة]‪[554‬؛ ﰲ ﻫﺬا اﻟﻨﻮع ﻣﻦ اﻛﺘﺴﺎب اﳌﻌﺮﻓﺔ ﻳﻘﻮم اﻟﻄﻼب ﺑﺮﺑﻂ اﳌﻌﺎرف اﳉﺪﻳﺪة ﲟﻌﺎرف ﻣﻮﺟﻮدة ﻟﺪﻳﻬﻢ ﺑﺸﻜﻞ ﻣﺴﺒﻖ‪ .‬ﻛﺬا‬
‫ﺗﺆﻛﺪ اﻟﺒﻴﺪاﻏﻮﺟﻴﺎ اﻟﺒﻨﺎﺋﻴﺔ ﻋﻠﻰ اﻟﺘﻔﺎﻋﻞ اﻻﺟﺘﻤﺎﻋﻲ ﻟﻠﻄﺎﻟﺐ ﻣﻊ زﻣﻼﺋﻪ وﻣﻊ ﻣﻌﻠﻤﻪ]‪ ،[555‬وﳚﺐ اﻷﺧﺬ ﺑﻌﲔ اﻻﻋﺘﺒﺎر أﺳﻠﻮب اﻟﺘﻌﻠﻢ اﳌﻔﻀﻞ‬
‫ﻟﺪى اﻟﻄﺎﻟﺐ]‪.[556‬‬

‫إن اﳌﺪرﺳﺔ اﻟﺒﻨﺎﺋﻴﺔ ﳍﺎ أﻛﺜﺮ ﻣﻦ ﻣﻨﻈﻮر ﰲ اﻟﺘﻌﻠﻢ‪ ،‬ﻓﻬﻲ ﺑﺸﻜﻞ ﻋﺎم ﺗﺆﻛﺪ ﻋﻠﻰ أن اﻟﻔﺮد ﻳﻔﺴﺮ اﳌﻌﻠﻮﻣﺎت واﻟﻌﺎﱂ ﻣﻦ ﺣﻮﻟﻪ ﺑﻨﺎءً ﻋﻠﻰ رؤﻳﺘﻪ‬
‫اﻟﺸﺨﺼﻴﺔ‪ ،‬وأن اﻟﺘﻌﻠﻢ ﻳﺘﻢ ﻣﻦ ﺧﻼل اﳌﻼﺣﻈﺔ واﳌﻌﺎﳉﺔ واﻟﺘﻔﺴﲑ أو اﻟﺘﺄوﻳﻞ‪ ،‬وﻣﻦ ﰒ ﻳﺘﻢ اﳌﻮاﺋﻤﺔ أو اﻟﺘﻜﻴﻴﻒ ﻟﻠﻤﻌﻠﻮﻣﺎت ﺑﻨﺎء ﻋﻠﻰ اﻟﺒﻨﻴﺔ‬
‫اﳌﻌﺮﻓﻴﺔ ﻟﺪى اﻟﻔﺮد‪ ،‬وإن ﺗﻌﻠﻢ اﻟﻔﺮد ﻳﺘﻢ ﻋﻨﺪﻣﺎ ﻳﻜﻮن ﰲ ﺳﻴﺎﻗﺎت ﺣﻘﻴﻘﻴﺔ واﻗﻌﻴﺔ وﺗﻄﺒﻴﻘﺎت ﻣﺒﺎﺷﺮة ﻟﺘﺤﻘﻴﻖ اﳌﻌﺎﱐ ﻟﺪﻳﻪ‪.‬‬

‫اﻟﻨﻈﺮﻳﺔ اﻟﺒﻨﺎﺋﻴﺔ ﺗﻨﻈﺮ إﱃ اﻟﺘﻌﻠﻢ ﻋﻠﻰ أﻧﻪ ﻋﻤﻠﻴﺔ ﺑﻨﺎء ﻣﺴﺘﻤﺮة وﻧﺸﻄﺔ وﻏﺮﺿﻴﺔ‪ ،‬أي أ�ﺎ ﺗﻘﻮم ﻋﻠﻰ اﺧﱰاع اﳌﺘﻌﻠﻢ ﻟﱰاﻛﻴﺐ ﻣﻌﺮﻓﻴﺔ ﺟﺪﻳﺪة أو‬
‫إﻋﺎدة ﺑﻨﺎء ﺗﺮاﻛﻴﺒﻪ أو ﻣﻨﻈﻮﻣﺘﻪ اﳌﻌﺮﻓﻴﺔ اﻋﺘﻤﺎداً ﻋﻠﻰ ﻧﻈﺮﺗﻪ إﱃ اﻟﻌﺎﱂ‪ ،‬واﻟﺘﻌﻠﻴﻢ ﻟﻴﺲ ﻋﻤﻠﻴﺔ ﺗﺮاﻛﻤﻴﺔ ﻟﻠﻤﻌﺮﻓﺔ‪ ،‬ﺑﻞ ﻋﻤﻠﻴﺔ إﺑﺪاع ﲢﺪث ﺗﻐﻴﲑات‬
‫ﺛﻮرﻳﺔ ﰲ اﻟﱰاﻛﻴﺐ اﳌﻌﺮﻓﻴﺔ اﳌﻮﺟﻮدة ﻟﺪى اﳌﺘﻌﻠﻢ‪ ،‬ﺣﻴﺚ ﺗﺒﲎ اﳌﻌﺮﻓـﺔ ﺑﻨﺸﺎط اﳌﺘﻌﻠﻤﲔ ﺑﻮاﺳﻄﺔ ﺗﻜﺎﻣﻞ اﳌﻌﻠﻮﻣﺎت واﳋﱪات اﳉﺪﻳﺪة ﻣﻊ ﻓﻬﻤﻬـﻢ‬
‫اﻟﺴﺎﺑـﻖ‪.‬‬

‫وﳝﺜﻞ اﻟﻔﻜﺮ اﻟﺒﻨﺎﺋﻲ ﺗﻮﻟﻴﻔﺎً أو ﺗﺰاوﺟﺎً ﺑﲔ ﺛﻼﺛﺔ ﳎﺎﻻت ﻫﻲ‪ :‬ﻋﻠﻢ اﻟﻨﻔﺲ اﳌﻌﺮﰲ )‪ ،(Cognitive Psychology‬وﻋﻠﻢ اﻟﻨﻔﺲ اﻟﻨﻤﻮ‬
‫)‪ ،(Developmental Psychology‬واﻷﻧﺜﺮوﺑﻮﻟﻮﺟﻴﺎ )‪(Anthropology‬ﻓﻘﺪ أﺳﻬﻢ اﺠﻤﻟﺎل اﻷول ﺑﻔﻜﺮة أن اﻟﻌﻘﻞ ﻳﻜﻮن ﻧﺸﻄﺎً ﰲ‬
‫ﺑﻨﺎء ﺗﻔﺴﲑاﺗﻪ ﻟﻠﻤﻌﺮﻓﺔ وﺗﻜﻮﻳﻦ اﺳﺘﺪﻻﻻﺗﻪ ﻣﻨﻬﺎ؛ ﺎ أﺳﻬﻢ اﺠﻤﻟﺎل اﻟﺜﺎﱐ ﺑﻔﻜﺮة ﺗﺒﺎﻳﻦ ﺗﺮﻛﻴﺒﺎت اﻟﻔﺮد ﰲ ﻣﻘﺪرﺗﻪ ﻋﻠﻰ اﻟﺘﻨﺒﺆ ﺗﺒﻌﺎً ﻟﻨﻤﻮﻩ اﳌﻌﺮﰲ؛‬
‫ﺎ اﺠﻤﻟﺎل اﻟﺜﺎﻟﺚ ﻓﻘﺪ أﺳﻬﻢ ﺑﻔﻜﺮة أن اﻟﺘﻌﻠﻢ ﳛﺪث ﺑﺼﻮرة ﻃﺒﻴﻌﻴﺔ ﺑﺎﻋﺘﺒﺎرﻩ ﻋﻤﻠﻴﺔ ﺛﻘﺎﻓﻴﺔ اﺟﺘﻤﺎﻋﻴﺔ ﻳﺪﺧﻞ ﻓﻴﻬﺎ اﻷﻓﺮاد ﻛﻤﻤﺎرﺳﲔ اﺟﺘﻤﺎﻋﲔ‬
‫ﻣﻌﲎ‪ ،‬وﺣﻞ ﺸﻜﻼﻬﺗﻢ ﺑﺼﻮرة ذات ﻣﻐﺰى‪.‬‬ ‫ٍ‬
‫ﻳﻌﻤﻠﻮن ﺳﻮﻳﺎً ﻹﳒﺎز ﻣﻬﺎم ذات ً‬

‫‪197‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Engineering Education Methodologies‬‬ ‫ﻣﻨﻬﺠﻴﺎت اﻟﺘﻌﻠﻴﻢ اﳍﻨﺪﺳﻲ |‬

‫إن أﻓﻜﺎر اﻟﻨﻈﺮﻳﺔ اﻟﺒﻨﺎﺋﻴﺔ ﱂ ﺗﺒﺪأ ﻣﻦ ﻓﺮاغ أو ﻣﻦ ﻧﻘﻄﺔ اﻟﺼﻔﺮ‪ ،‬ﻓﻬﻲ ﻟﻴﺲ ﻧﺒﺘﺎً ﳕﺎ ﻓﺠﺄ ًة ﰲ ﳎﺎل اﳌﻌﺮﻓﺔ‪ ،‬وإﳕﺎ ﺗﻌﻮد ﺟﺬورﻫﺎ إﱃ ﻋﺪة ﻋﻘﻮد‬
‫ﻣﺎﺿﻴﺔ‪ ،‬ﺣﻴﺚ ﳍﺎ ﺟﺬور ﺗﺎرﳜﻴﺔ ﻗﺪﳝﺔ ﲤﺘﺪ إﱃ ﻋﻬﺪ ﺳﻘﺮاط‪ ،‬ﻟﻜﻨﻬﺎ ﺗﺒﻠﻮرت ﰲ ﺻﻴﻐﺘﻬﺎ اﳊﺎﻟﻴﺔ ﻋﻠﻰ ﺿﻮء ﻧﻈﺮﻳﺎت وأﻓﻜﺎر اﻟﻌﺪﻳﺪ ﻣﻦ‬
‫اﻟﺒﺎﺣﺜﲔ اﻟﱰﺑﻮﻳﲔ )‪ ،(Glassersfeld, Piaget, Vico, Dewey, Vygotsky‬إﻻ أن اﻷﲝﺎث اﻟﺘﻄﺒﻴﻘﻴﺔ واﻟﺘﺠﺎرب ﻋﻠﻰ ﻫﺬﻩ اﻟﻨﻈﺮﻳﺔ‬
‫ﺑﺪأت ﰲ ﺑﺪاﻳﺔ اﻟﺘﺴﻌﻴﻨﺎت]‪.[548‬‬

‫ﻳﻌﺘﱪ ﻋﺎﱂ اﻟﻨﻔﺲ واﻟﻔﻴﻠﺴﻮف واﳌﺼﻠﺢ اﻟﱰﺑﻮي اﻷﻣﺮﻳﻜﻲ ”‪ [545,556] “John Dewey‬ﻣﻦ أﻫﻢ رواد اﻟﺘﻌﻠﻴﻢ اﻟﺒﻨﺎﺋﻲ‪ ،‬وﻗﺪ ﺷﺪد ﻋﻠﻰ اﳊﺎﺟﺔ‬
‫إﱃ إﺻﻼح اﻟﻌﻤﻠﻴﺔ اﻟﺘﻌﻠﻴﻤﻴﺔ‪ ،‬وأن ﻳﺘﻌﻠﻢ اﻟﻄﻼب اﻟﺘﻔﻜﲑ اﻟﻨﻘﺪي )‪ – (Critical Thinking‬اﻟﺬي ﻫﻮ أﻋﻠﻰ ﻣﺴﺘﻮﻳﺎت اﻟﺘﻔﻜﲑ اﻟﱵ‬
‫ﺗﺪف إﱃ ﻗﺮع رﻛﻴﺰة ﻣﺸﻜﻠﺔ ﻣﺎ‪ ،‬ﰒ ﲢﻠﻴﻠﻬﺎ ﻣﻨﻄﻘﻴﺎً ﻟﻠﻮﺻﻮل إﱃ اﳊﻞ اﳌﺒﺘﻐﻰ‪ ،‬وذﻟﻚ ﻣﻦ ﺧﻼل اﺳﺘﺨﺪام ﻣﻬﺎرات اﻟﺘﻔﻜﲑ اﻟﻨﻘﺪي )ﲤﻴﻴﺰ‬
‫اﳊﻘﺎﺋﻖ‪ ،‬اﻟﺘﻔﺮﻳﻖ ﺑﲔ اﳌﻌﻠﻮﻣﺎت اﳌﺘﻌﻠﻘﺔ ﺑﺎﳌﻮﺿﻮع‪ ،‬اﳌﺮوﻧﺔ‪ ،‬اﳌﻼﺣﻈﺔ‪ ،‬ﺻﻴﺎﻏﺔ اﻷﺳﺌﻠﺔ‪ ،‬اﻟﺘﻤﻴﻴﺰ ﺑﲔ اﻻﻓﱰاﺿﺎت اﻟﺼﺤﻴﺤﺔ واﳋﺎﻃﺌﺔ( وﻣﻌﺎﻳﲑﻩ‬
‫)اﻟﻮﺿﻮح‪ ،‬اﻟﺼﺤﺔ‪ ،‬اﻟﺪﻗﺔ‪ ،‬اﻻﺗﺴﺎع‪ ،‬اﳌﻨﻄﻖ( – ﺑﺪﻻً ﻣﻦ اﻟﺪروس اﳊﻔﻈﻴﺔ ﻤﻟﺮدة‪.‬‬

‫ﺗﻼ ”‪ “John Dewey‬ﻇﻬﻮر اﻟﻌﺎﱂ اﻟﺴﻮﻳﺴﺮي ”‪ ،[549]“Jean Piaget‬اﻟﺬي ﻳﻌﺘﱪ ﻣﻦ أﻋﻈﻢ رواد اﻟﻨﻈﺮﻳﺔ اﳌﻌﺮﻓﻴﺔ اﻟﺒﻨﺎﺋﻴﺔ‪ ،‬وﻳﻌﺘﱪ أول‬
‫ﺑﻨﺎﺋﻲ ﻷﻧﻪ ﻗﺎل‪ :‬إن اﳌﻌﺮﻓﺔ ﺗﺒﲎ ﰲ ﻋﻘﻞ اﳌﺘﻌﻠﻢ وﺗﺘﻄﻮر ﺑﻨﻔﺲ اﻟﻄﺮﻳﻘﺔ اﻟﱵ ﺗﺘﻄﻮر ﺑﺎ اﻟﺒﻴﻮﻟﻮﺟﻴﺔ؛ وﻟﺬﻟﻚ اﺳﺘﺨﺪم ﺑﻌﺾ اﳌﺼﻄﻠﺤﺎت‬
‫اﻟﺒﻴﻮﻟﻮﺟﻴﺔ ﻣﺜﻞ اﻟﺘﻤﺜﻞ واﳌﻮاءﻣﺔ ﻋﻨﺪ ﺗﻔﺴﲑﻩ ﻟﻠﺘﻌﻠﻢ اﻹﻧﺴﺎﱐ‪.‬‬

‫أﻃﻠﻖ ‪ Piaget‬ﻣﺼﻄﻠﺢ ”‪) “Constructivist Epistemology‬ﻋﻠﻢ اﳌﻌﺮﻓﻴﺎت اﻟﺒﻨﺎﺋﻲ( ﻟﻠﺘﻌﺒﲑ ﻋﻦ ﻧﻈﺮﻳﺘﻪ ﰲ اﻟﺘﻌﻠﻢ‪ ،‬اﻟﱵ ﻳﺮى ﻓﻴﻬﺎ أن‬
‫اﻟﺘﻌﻠﻢ ﻋﻤﻠﻴﺔ ﻣﺴﺘﻤﺮة ﻣﻦ زﻋﺰﻋﺔ اﺳﺘﻘﺮار اﻟﺘﻮازن اﻟﻌﻘﻠﻲ )‪ ،(Destabilizing Mental Equilibrium‬وذﻟﻚ ﻋﻨﺪﻣﺎ ﺗﺘﺼﺎدم اﳊﻘﺎﺋﻖ‬
‫اﳉﺪﻳﺪة‪ ،‬ﰒ ﻳﺘﻢ اﺳﺘﻌﺎدة اﻟﺘﻮازن إﻣﺎ ﺑﺎﺳﺘﻴﻌﺎب ﺗﻠﻚ اﳊﻘﺎﺋﻖ أو ﺑﺎﻟﺘﻜﻴﻒ ﻣﻌﻬﺎ‪ ،‬وﻫﺬا ﺑﺪورﻩ ﻳﺮﻓﻊ ﻣﻦ ﺳﻮﻳﺔ اﻟﺘﻔﻜﲑ ‪ .‬وﻋﻠﻴﻪ أﻛﺪ أﻳﻀﺎً‬
‫]‪[549‬‬

‫ﻋﺎﱂ اﻟﻨﻔﺲ اﻟﺮوﺳﻲ ”‪ “Vygotsky‬ﻋﻠﻰ أن ﺗﻜﻮﻳﻦ اﳌﻌﺮﻓﺔ ﳛﺪث ﺑﻌﺪ ﻋﻤﻠﻴﺔ اﺧﺘﻼل اﻟﺘﻮازن )‪.[557](Disequilibrium‬‬

‫ﲤﺜﻞ ﻧﻈﺮﻳﺔ ‪ Piaget‬اﻟﺘﻌﻠﻢ اﳌﻌﺮﰲ اﳌﻼﻣﺢ اﻟﻌﺎﻣﺔ ﳌﻨﻈﻮر اﻟﺒﻨﺎﺋﻴﺔ اﻟﺴﻴﻜﻮﻟﻮﺟﻲ ﻋﻦ اﳌﻌﺮﻓﺔ واﻛﺘﺴﺎﻬﺑﺎ‪ ،‬وﻣﻮﺟﺰ ﻫﺬﻩ اﻟﻨﻈﺮﻳﺔ‪" :‬إن ﻋﻤﻠﻴﺔ‬
‫اﻛﺘﺴﺎب اﳌﻌﺮﻓﺔ ﺗﻌﺪ ﻋﻤﻠﻴﺔ ﺑﻨﺎﺋﻴﺔ ﻧﺸﻄﺔ وﻣﺴﺘﻤﺮة ﺗﺘﻢ ﻣﻦ ﺧﻼل اﻟﺘﻌﺪﻳﻞ ﰲ اﳌﻨﻈﻮﻣﺎت أو اﻟﱰاﻛﻴﺐ اﳌﻌﺮﻓﻴﺔ ﻟﻠﻔﺮد ﻣﻦ ﺧﻼل آﻟﻴﺎت ﻋﻤﻠﻴﺎت‬
‫اﻟﺘﻌﻠﻢ اﻟﺬاﰐ )اﻟﺘﻤﺜﻴﻞ واﳌﻮاءﻣﺔ( وﺗﺴﺘﻬﺪف ﺗﻜﻴﻔﻪ ﻣﻊ اﻟﻀﻐﻮط اﳌﻌﺮﻓﻴﺔ اﻟﺒﻴﺌﻴﺔ"‪.‬‬

‫وﺑﺎﻟﺘﺎﱄ ﻓﺈن ﻟﺘﻌﻠﻢ اﳌﻌﺮﰲ ﻫﻮ ﺑﺎﻟﺪرﺟﺔ اﻷوﱃ ﻋﻤﻠﻴﺔ ﺗﻨﻈﻴﻢ ذاﺗﻴﺔ ﻟﻠﱰاﻛﻴﺐ اﳌﻌﺮﻓﻴﺔ ﻟﻠﻔﺮد ﻬﺗﺪف إﱃ ﻣﺴﺎﻋﺪﺗﻪ ﻋﻠﻰ اﻟﺘﻜﻴﻒ‪ ،‬ﲟﻌﲎ أن اﻟﻜﺎﺋﻦ‬
‫اﳊﻲ ﻳﺴﻌﻰ ﻟﻠﺘﻌﻠﻢ ﻣﻦ أﺟﻞ اﻟﺘﻜﻴﻒ ﻣﻊ اﻟﻀﻐﻮط اﳌﻌﺮﻓﻴﺔ اﳌﻤﺎرﺳﺔ ﻋﻠﻰ ﺧﱪة اﻟﻔﺮد ﺧﻼل ﺗﻔﺎﻋﻠﻪ ﻣﻊ ﻣﻌﻄﻴﺎت اﻟﻌﺎﱂ اﻟﺘﺠﺮﻳﱯ‪ ،‬وﻫﺬﻩ‬
‫اﻟﻀﻐﻮط ﻏﺎﻟﺒﺎً ﻣﺎ ﺗﺆدي إﱃ ﺣﺎﻟﺔ ﻣﻦ اﻻﺿﻄﺮاب أو اﻟﺘﻨﺎﻗﻀﺎت اﳌﻌﺮﻓﻴﺔ ﻟﺪى اﻟﻔﺮد‪ ،‬وﻣﻦ ﰒ ﳛﺎول اﻟﻔﺮد ﻣﻦ ﺧﻼل ﻋﻤﻠﻴﺔ اﻟﺘﻨﻈﻴﻢ اﻟﺬاﰐ ﲟﺎ‬
‫ﺗﺸﻤﻠﻪ ﻣﻦ ﻋﻤﻠﻴﱵ اﳌﻤﺎﺛﻠﺔ واﳌﻮاءﻣﺔ اﺳﺘﻌﺎدة ﺣﺎﻟﺔ اﻟﺘﻮازن اﳌﻌﺮﰲ‪ ،‬وﻣﻦ ﰒ ﲢﻘﻴﻖ اﻟﺘﻜﻴﻒ ﻣﻊ اﻟﻀﻐﻮط اﳌﻌﺮﻓﻴﺔ‪.‬‬

‫ﻟﻘﺪ أﻋﺎد ”‪ [561]“Von Glasersfeld‬ﺗﻌﺮﻳﻒ ﻣﻔﻬﻮم اﳌﻌﺮﻓﺔ اﻟﺒﻨﺎﺋﻴﺔ وذﻟﻚ ﺑﺎﻋﺘﺒﺎرﻫﺎ ذات وﻇﻴﻔﺔ ﺗﻜﻴﻔﻴﺔ ﲤﻴﻞ إﱃ أن ﺗﻜﻮن ﻧﻔﻌﻴﺔ‪ ،‬وﺑﺬﻟﻚ‬
‫ﻓﺎﳌﻌﺮﻓﺔ ﻳﺘﻢ ﺑﻨﺎؤﻫﺎ ﺑﺼﻮرة ﻧﺸﻄﺔ ﺑﻮاﺳﻄﺔ اﳌﺘﻌﻠﻢ‪ ،‬ﻓﻬﻲ ﻟﻴﺴﺖ اﻛﺘﺸﺎﻓﺎً ﻟﻮاﻗﻊ ﻣﺴﺘﻘﻞ ﻋﻦ اﻟﺸﺨﺺ‪ ،‬وﻳﺘﻢ ﺗﺄﻛﻴﺪ ﻫﺬﻩ اﳌﻌﺮﻓﺔ وﺗﺄﻳﻴﺪﻫﺎ ﺑﻮاﺳﻄﺔ‬
‫ﻛﻞ ﻣﻦ اﻟﻌﻤﻞ اﻟﻨﻈﺮي واﻟﺘﻄﺒﻴﻘﻲ‪.‬‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪198‬‬
‫‪24‬‬ ‫اﻟﻔﺼﻞ اﻟﺮاﺑﻊ | ‪Chapter 4‬‬

‫وﻣﻦ ﻫﻨﺎ ﻧﺸﺄت اﻟﺒﻨﺎﺋﻴﺔ وأﺻﺒﺢ ﻫﻨﺎك اﻫﺘﻤﺎم واﺳﻊ ﺑﺎﻟﺘﻌﻠﻢ اﻟﺒﻨﺎﺋﻲ‪ ،‬ﺣﻴﺚ ﺗﺆﻛﺪ اﻟﻌﺪﻳﺪ ﻣﻦ اﻟﺪراﺳﺎت ﰲ ﺗﺪرﻳﺲ اﻟﻌﻠﻮم ﻋﻠﻰ اﻟﻨﻈﺮﻳﺔ اﻟﺒﻨﺎﺋﻴﺔ‬
‫وﳕﺎذﺟﻬﺎ اﻟﺘﺪرﻳﺴﻴﺔ]‪.[562,563‬‬

‫‪ 1-4-4-4‬ﻣﺮﺗﻜﺰات اﻟﺘﻌﻠﻢ اﻟﺒﻨﺎﺋﻲ )‪:(Constructivist Learning Stanchions‬‬

‫إن اﻟﺮﻛﺎﺋﺰ اﻷﺳﺎﺳﻴﺔ اﻟﱵ ﻳﻘﻮم ﻋﻠﻴﻬﺎ اﻟﺘﻌﻠﻢ اﻟﺒﻨﺎﺋﻲ]‪ [548,558‬ﳝﻜﻦ ﺗﻠﺨﻴﺼﻬﺎ ﲟﺎﻳﻠﻲ‪:‬‬
‫‪ -‬ﳚﺐ أن ﻳﺮﺗﺒﻂ اﻟﺘﻌﻠﻢ ﺑﺒﻴﺌﺔ اﻟﻌﺎﱂ اﳊﻘﻴﻘﻲ‪.‬‬
‫‪ -‬اﻟﺘﻔﺎﻋﻞ اﻻﺟﺘﻤﺎﻋﻲ ﺟﺰء ﻫﺎم ﻣﻦ اﻟﺘﻌﻠﻢ‪.‬‬
‫‪ -‬اﺧﺘﻴﺎر اﻟﻌﻨﺎﺻﺮ اﳌﻘﺮر ﺗﻌﻠﻴﻤﻬﺎ ﲝﻴﺚ ﺗﻜﻮن ذات ﺻﻠﺔ ﺑﺎﳌﺘﻌﻠﻢ‪.‬‬
‫‪ -‬اﺧﺘﻴﺎر اﻟﻌﻨﺎﺻﺮ اﳌﻘﺮر ﺗﻌﻠﻴﻤﻬﺎ ﲝﻴﺚ ﺗﻜﻮن ﻣﺮﺗﺒﻄﺔ ﲟﻌﺎرف ﺳﺎﺑﻘﺔ ﻟﺪى اﳌﺘﻌﻠﻢ‪.‬‬
‫‪ -‬ﻣﻦ اﳌﻬﻢ ﺗﻮﻓﲑ آﻟﻴﺎت ﺗﻘﻴﻴﻢ ﻣﺴﺘﻤﺮة وﻣﻴﺴﺮة‪.‬‬
‫‪ -‬ﳚﺐ ﺗﻨﻤﻴﺔ وﺗﻌﺰﻳﺰ اﻻﺳﺘﻘﻼﻟﻴﺔ ﻋﻨﺪ اﻟﻄﻼب ﻣﻦ ﺧﻼل ﺗﺸﺠﻴﻊ اﻟﺘﻌﻠﻢ اﻟﺬاﰐ اﳌﻨﻈﻢ‪ ،‬اﺣﱰام اﻟﺬات‪ ،‬اﻟﺘﺤﻔﻴﺰ‪.‬‬
‫‪ -‬ﳚﺐ أن ﻳﻠﻌﺐ اﳌﻌﻠﻢ دور ﻗﺎﺋﺪ اﻷورﻛﺴﱰا وﻻ ﻳﻜﻮن ﻛﻤﻦ ﻳﻠﻘﻲ اﳋﻄﺎﺑﺎت‪.‬‬
‫‪ -‬ﳚﺐ أن ﻳﻀﻊ اﳌﻌﻠﻤﻮن ﺗﺼﻮرات ﳐﺘﻠﻔﺔ وأﺷﻜﺎﻻً ﺟﺪﻳﺪة ﻟﻠﻤﻮاد اﻟﱵ ﻳﻘﻮﻣﻮن ﺑﺘﺪرﻳﺴﻬﺎ‪.‬‬

‫ﻣﻦ اﻟﻀﺮوري أﻳﻀﺎً اﺳﺘﺨﺪام ﻣﺎ ﻳﺴﻤﻲ ﺑﺎﻟﺘﻌﻠﻴﻢ اﻟﻮاﻗﻌﻲ )‪ (Authentic teaching‬واﻟﺬي ﻳﻌﲏ ﻋﺮض ﻣﺸﻜﻼت وﻗﻀﺎﻳﺎ ﻣﻦ اﻟﻮاﻗﻊ؛‬
‫ﻟﻴﻘﻮم اﻟﻄﻼب ﺑﺘﻘﺪﱘ اﳊﻠﻮل ﳍﺎ‪ ،‬ﻓﻌﻠﻰ ﺳﺒﻴﻞ اﳌﺜﺎل‪ ،‬إدﺧﺎل ﲡﺎرب ﺣﻘﻴﻘﻴﺔ ﻛﺘﻠﻚ اﳌﻮﺿﺤﺔ ﰲ اﻟﻔﺼﻞ اﻟﺴﺎدس ﺿﻤﻦ اﶈﺎﺿﺮات اﻟﻨﻈﺮﻳﺔ‬
‫وإﻋﻄﺎء اﻟﻄﻼب اﻟﻮﻗﺖ ﻻﺧﺘﺒﺎرﻫﺎ وﺗﻘﺪﱘ اﻟﻨﺘﺎﺋﺞ ﻳﻌﺪ ﻣﻦ ﳕﺎذج ﻋﻠﻢ اﻟﱰﺑﻴﺔ اﻟﺒﻨﺎﺋﻲ‪.‬‬

‫‪ 2-4-4-4‬ﻣﻘﺘﻀﻴﺎت ﺗﺼﻤﻴﻢ اﻟﺘﻌﻠﻴﻢ اﻟﺒﻨﺎﺋﻲ )‪:(Implications of Constructivist Instructional Design‬‬

‫ﻳﻬﺘﻢ اﻟﺘﻌﻠﻢ اﻟﺒﻨﺎﺋﻲ اﳌﻌﺮﰲ ﲜﻤﻴﻊ أوﺟﻪ اﻟﺘﻌﻠﻴﻢ وﺑﻌﻨﺎﺻﺮﻩ اﳌﺨﺘﻠﻔﺔ اﳌﻮﺿﺤﺔ ﻓﻴﻤﺎ ﻳﺄﰐ ﻣﻦ اﻟﻔﻘﺮات‪.‬‬

‫‪ 1-2-4-4-4‬اﻷﻫﺪاف اﻟﺘﻌﻠﻴﻤﻴﺔ )‪:(Educational Objectives‬‬

‫ﺗﺼﺎغ اﻷﻫﺪاف اﻟﺘﻌﻠﻴﻤﻴﺔ وﻓﻘﺎً ﻟﻠﻨﻤﻮذج اﻟﺒﻨﺎﺋﻲ ﰲ ﺻﻮرة أﻫﺪاف ﻋﺎﻣﺔ ﲢﺪد ﻣﻦ ﺧﻼل ﻣﻔﺎوﺿﺔ اﺟﺘﻤﺎﻋﻴﺔ ﺑﲔ اﳌﻌﻠﻢ واﻟﻄﻼب ﲝﻴﺚ‬
‫ﺗﺘﻀﻤﻦ ﻫﺪﻓﺎً ﻋﺎﻣﺎً ﳌﻬﻤﺔ اﻟﺘﻌﻠﻴﻢ ﻳﺴﻌﻰ ﲨﻴﻊ اﻟﻄﻼب ﻟﺘﺤﻘﻴﻘﻪ‪ ،‬ﺑﺎﻹﺿﺎﻓﺔ إﱃ أﻫﺪاف ذاﺗﻴﺔ ﲣﺺ ﻛﻞ ﻃﺎﻟﺐ أو ﻛﻞ ﳎﻤﻮﻋﺔ ﻃﻼب‪ .‬ﺗﻜﻤﻦ‬
‫أﳘﻴﺔ ﲢﺪﻳﺪ اﻷﻫﺪاف اﻟﺘﻌﻠﻴﻤﻴﺔ ﰲ اﻋﺘﺒﺎرﻫﺎ دﻟﻴﻞ ﻟﻌﻤﻠﻴﺔ ﺗﺼﻤﻴﻢ اﻟﺪروس‪ ،‬ﻛﻤﺎ أ�ﺎ ﺗﻌﲔ اﲡﺎﻩ اﻟﺘﻌﻠﻢ وﻧﺘﺎﺋﺠﻪ‪ .‬ﺗﻘﺴﻢ اﻷﻫﺪاف اﻟﺘﻌﻠﻴﻤﻴﺔ إﱃ‬
‫ﺛﻼﺛﺔ ﻧﻄﺎﻗﺎت‪ :‬اﳊﺮﻛﻲ اﻟﻨﻔﺴﻲ )‪ ،(Psychomotor‬اﻟﻮﺟﺪاﱐ )‪ ،(Affective‬اﻹدراﻛﻲ )‪.(Cognitive‬‬

‫‪ 2-2-4-4-4‬ﳏﺘﻮى اﻟﺘﻌﻠﻴﻢ )‪:(Education Contents‬‬

‫ﻳﺘﻢ ﺗﻌﻴﲔ ﳏﺘﻮى اﻟﺘﻌﻠﻴﻢ ﰲ ﺻﻮرة ﻣﻬﺎم أو ﻣﺸﻜﻼت ذات ﺻﻠﺔ ﺑﺎﻟﻮاﻗﻊ اﻟﺘﻄﺒﻴﻘﻲ‪ ،‬وﻛﻠﻤﺎ ارﺗﺒﻄﺖ ﻫﺬﻩ اﳌﺸﻜﻼت ﺑﻮاﻗﻊ ﻋﻤﻠﻲ‪ ،‬ﻛﺎن اﶈﺘﻮى‬
‫أﻛﺜﺮ ﻓﻌﺎﻟﻴﺔ وأﺗﺎح اﻟﻔﺮﺻﺔ ﻟﻠﺒﺤﺚ ﻋﻦ اﳌﻌﺮﻓﺔ ﰲ ﺻﻮرة ﺣﻠﻮل ﻟﻠﻤﺸﻜﻼت‪.‬‬

‫‪199‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Engineering Education Methodologies‬‬ ‫ﻣﻨﻬﺠﻴﺎت اﻟﺘﻌﻠﻴﻢ اﳍﻨﺪﺳﻲ |‬

‫‪ 3-2-4-4-4‬دور اﳌﺘﻌﻠﻢ )‪:(Learner Role‬‬

‫اﳌﺘﻌﻠﻢ ﻣﻜﺘﺸﻒ ﳌﺎ ﻳﺘﻌﻠﻤﻪ ﻣﻦ ﺧﻼل ﳑﺎرﺳﺘﻪ ﻟﻠﺘﻔﻜﲑ اﻟﻌﻠﻤﻲ‪ ،‬وﻫﻮ ﺑﺎﺣﺚ ﻋﻦ اﳌﻌﲎ ﳋﱪﺗﻪ ﻣﻊ ﻣﻬﺎم اﻟﺘﻌﻠﻢ‪ ،‬وﻫﻮ ﻣﺸﺎرك ﰲ ﻣﺴﺆوﻟﻴﺔ إدارة‬
‫اﻟﺘﻌﻠﻴﻢ وﺗﻘﻮﳝﻪ‪.‬‬

‫إن اﳌﺘﻌﻠﻢ ﰲ اﻟﻨﻤﻮذج اﻟﺒﻨﺎﺋﻲ أﻛﺜﺮ ﻧﺸﺎﻃﺎً‪ ،‬وﻳﺆدي دور اﻟﻌﺎﱂ ﰲ اﻟﺒﺤﺚ واﻟﺘﻨﻘﻴﺐ ﻻﻛﺘﺸﺎف اﳊﻠﻮل اﳌﻨﺎﺳﺒﺔ ﻟﻠﻤﺸﻜﻼت اﻟﱵ ﺗﻮاﺟﻬﻪ‪ ،‬ﻓﻬﻮ‬
‫ﻳُﻌﺪ ﳏﻮر ﻫﺬا اﻟﻨﻤﻮذج وﻣﺮﻛﺰ اﻫﺘﻤﺎﻣﻪ‪ .‬وﺑﻨﺎء ﻋﻠﻰ ذﻟﻚ‪ ،‬ﻓﺎﳌﺘﻌﻠﻢ ﻳﺆدي دوراً ﻧﺸﻄﺎً ﰲ ﻋﻤﻠﻴﺔ ﺗﻌﻠﻤﻪ‪ ،‬وﳝﺘﺪ ﻧﺸﺎﻃﻪ ﺣﱴ ﺑﻌﺪ اﻟﺘﻌﻠﻢ ﳌﺮﺣﻠﺔ‬
‫ﺗﻘﻮﱘ ﺗﻌﻠﻤﻪ ذاﺗﻴﺎً؛ وﺗﺄﻛﻴﺪاً ﻋﻠﻰ ذﻟﻚ ﻳﻘﻮل ‪" :Piaget‬ﺣﱴ ﺗﻔﻬﻢ؛ ﻻﺑﺪ ﻟﻚ أن ﺗﻜﺘﺸﻒ‪ ،‬وﺗﻌﻴﺪ ﺑﻨﺎء ﻣﺎ ﺗﻌﻠﻤﺖ‪ ،‬وﻳﺼﺒﺢ ذﻟﻚ ﻣﺘﺎﺣﺎً‪،‬‬
‫ﻋﻨﺪﻣﺎ ﺗﺆﻫﻞ اﳌﺘﻌﻠﻢ ﻟﻺﺑﺪاع واﻹﻧﺘﺎج‪ ،‬وﻟﻴﺲ اﻟﺘﻜﺮار"‪.‬‬

‫‪ 4-2-4-4-4‬دور اﳌﻌﻠﻢ )‪:(Teacher Role‬‬

‫اﳌﻌﻠﻢ وﻓﻘﺎً ﻟﻠﻨﻈﺮﻳﺔ اﻟﺒﻨﺎﺋﻴﺔ ﳝﺎرس ﻋﺪة أدوار ﺗﺘﻤﺜﻞ ﰲ اﻟﺘﺎﱄ]‪:[561‬‬
‫‪ ‬ﻣﻘﺪم‪ :‬ﻟﻴﺲ ﳏﺎﺿﺮاً!! وإﳕﺎ ﻳﻮﺿﺢ اﻟﻔﻜﺮة‪ ،‬وﻳﻘﺪم ﳕﺎذج وأﻣﺜﻠﺔً واﻗﻌﻴﺔً‪ ،‬وﻳﻨﻈﻢ اﻷﻧﺸﻄﺔ اﻟﺘﻌﻠﻴﻤﻴﺔ؛ وﺑﺬﻟﻚ ﻳﺘﻢ ﺗﺸﺠﻴﻊ اﳋﱪات‬
‫اﳌﺒﺎﺷﺮة ﻟﻠﺘﻼﻣﻴﺬ‪.‬‬
‫‪ ‬ﻣﻼﺣﻆ‪ :‬ﺷﺨﺺ ﻳﻌﻤﻞ ﺑﻄﺮﻳﻘﺔ ﺷﻜﻠﻴﺔ وﻏﲑ ﺷﻜﻠﻴﺔ ﻟﻴﻮﺿﺢ اﻷﻓﻜﺎر ﻟﻠﻄﻼب ﻟﻜﻲ ﻳﺘﻔﺎﻋﻠﻮا ﺑﻄﺮﻳﻘﺔ ﻣﻨﺎﺳﺒﺔ‪ ،‬ﻬﺑﺪف إﻋﻄﺎء ﺑﺪاﺋﻞ‬
‫اﻟﺘﻌﻠﻴﻢ اﳌﻨﺎﺳﺒﺔ‪.‬‬
‫‪ ‬ﻳﻄﺮح أﺳﺌﻠﺔ وﻣﺸﻜﻼت‪ :‬ﻳﺜﲑ ﺗﻜﻮﻳﻦ اﻷﻓﻜﺎر واﺧﺘﺒﺎرﻫﺎ وﺑﻨﺎء اﳌﻔﺎﻫﻴﻢ ﻋﻦ ﻃﺮﻳﻖ اﻷﺳﺌﻠﺔ وإﺛﺎرة اﳌﺸﻜﻼت اﻟﱵ ﺗﻨﺘﺞ ﻣﻦ‬
‫اﳌﻼﺣﻈﺔ‪.‬‬
‫‪ ‬ﻣﻨﻈﻢ ﻟﺒﻴﺌﺔ اﻟﺘﻌﻠﻢ‪ :‬ﻳﻨﻈﻢ ﺑﻌﻨﺎﻳﺔ ﻓﺎﺋﻘﺔ ودﻗﺔ ﻣﺎ ﻳﻔﻌﻠﻪ اﻟﺘﻼﻣﻴﺬ‪ ،‬ﺑﻴﻨﻤﺎ ﻳﺴﻤﺢ ﲝﺮﻳﺔ ﻛﺎﻓﻴﺔ ﻻﻛﺘﺸﺎف ﺣﻘﻴﻘﻲ‪.‬‬
‫‪ ‬ﻣﺴﺎﻋﺪ ﻋﻠﻰ ﺣﺪوث ﺗﻌﺎون‪ :‬ﻳﺸﺠﻊ اﻟﺘﻌﺎون ﺑﲔ اﻟﻄﻼب‪.‬‬
‫‪ ‬ﻣﺮﺟﻊ‪ :‬ذو ﺧﱪة ‪ -‬ﻣﺼﺪر اﺣﺘﻴﺎﻃﻲ ﻟﻠﻤﻌﻠﻮﻣﺎت إذا ﻟﺰم اﻷﻣﺮ‪ -‬ﳕﻮذج ﻳﻜﺘﺴﺐ ﻣﻨﻪ اﻟﻄﻼب اﳋﱪة‪.‬‬
‫‪ ‬ﺑﺎﱐ ﻟﻠﻨﻈﺮﻳﺎت‪ :‬ﻳﺴﺎﻋﺪ اﻟﺘﻼﻣﻴﺬ ﻋﻠﻰ إﻧﺸﺎء رواﺑﻂ ﺑﲔ أﻓﻜﺎرﻫﻢ وﻳﺒﻨﻮن أﳕﺎﻃﺎً ﻣﻌﺮﻓﻴﺔ ﲤﺜﻞ ﻌﻠﻮﻣﺎﻬﺗﻢ اﻟﺒﻴﺌﻴﺔ‪.‬‬

‫وﻫﻜﺬا ﳒﺪ أن أدوار اﳌﻌﻠﻢ ﻣﺘﻌﺪدة‪ ،‬ﺣﻴﺚ ﻳﻘﻊ ﻋﻠﻰ ﻋﺎﺗﻘﻪ ﺗﻮﻓﲑ ﺑﻴﺌﺔ ﺗﻌﻠﻴﻤﻴﺔ ﺗﱪز اﻻﺧﺘﻼف ﺑﲔ اﳋﱪات اﳊﺎﻟﻴﺔ ﻟﻠﻄﻼب واﳋﱪات اﳉﺪﻳﺪة‬
‫اﻟﱵ ﻳﺘﻌﺮﺿﻮن ﳍﺎ و ﳝﺮون ﻬﺑﺎ‪ ،‬وﲤﺜﻞ ﻫﺬﻩ اﻟﺒﻴﺌﺔ ﲢﺪﻳﺎً ﻟﻠﻤﺘﻌﻠﻢ ﺗﺪﻓﻌﻪ ﻟﻠﺘﻌﻠﻢ وﲢﺜﻪ ﻋﻠﻴﻪ‪ ،‬ﻛﻤﺎ ﻳﺮاﻋﻲ اﳌﻌﻠﻢ ﲣﺼﻴﺺ وﻗﺖ ٍ‬
‫ﻛﺎف ﻟﻠﺘﻌﻠﻢ ﲝﻴﺚ‬
‫ﻳﺴﻤﺢ ﻟﻠﻄﻼب ﺑﺎﻟﺘﻔﻜﲑ ﰲ اﳋﱪات اﳉﺪﻳﺪة ﺑﺸﻜﻞ أﻛﺜﺮ ﻋﻤﻘﺎً وﺗﺄﻣﻼً ووﺿﻌﻬﺎ ﰲ ﻧﺴﻖ واﺣﺪ ﻣﻊ اﳋﱪات اﻟﺴﺎﺑﻘﺔ‪ ،‬واﳍﺪف ﻣﻦ ﻫﺬﻩ‬
‫اﻷدوار ﲨﻴﻌﺎً وﻓﻘﺎً ﻟﻠﻨﻤﻮذج اﻟﺒﻨﺎﺋﻲ ﻫﻮ ﲤﻜﲔ اﳌﺘﻌﻠﻢ ﻣﻦ ﺑﻨﺎء ﻣﻌﺮﻓﺘﻪ وﻣﺸﺎرﻛﺘﻪ ﰲ ﻣﺴﺆوﻟﻴﺔ إدارة اﻟﺘﻌﻠﻢ وﺗﻘﻮﳝﻪ؛ ﻓﻬﻮ اﻟﺬي ﻳﺘﻮﺻﻞ ﺑﻨﻔﺴﻪ‬
‫إﱃ ﺑﻨﺎء اﳌﻔﺎﻫﻴﻢ اﻟﱵ ﺗﺘﻌﻠﻖ ﲟﻮﺿﻮع اﻟﺘﻌﻠﻢ؛ وﻫﻮ اﻟﺬي ﻳﻘﻮم ﲟﻤﺎرﺳﺔ اﻟﺘﺠﺮﺑﺔ ﻓﻴﺤﺎول اﻟﺘﻌﺎﻣﻞ ﻣﻊ اﳌﻔﺎﻫﻴﻢ وﻃﺮح اﻷﺳﺌﻠﺔ واﻟﺒﺤﺚ ﻋﻦ‬
‫اﻷﺟﻮﺑﺔ وﻣﻘﺎرﻧﺘﻬﺎ‪.‬‬

‫واﳌﻌﻠﻢ ﻋﻨﺪﻣﺎ ﳜﻄﻂ ﻟﺘﻨﻔﻴﺬ أﺣﺪ اﻟﺪروس ﺑﺎﺳﺘﺨﺪام ﳕﻮذج اﻟﺘﻌﻠﻢ اﻟﺒﻨﺎﺋﻲ ﻋﻠﻴﻪ أن ﻳﺮاﻋﻲ اﳌﺒﺎدئ اﻟﺘﺎﻟﻴﺔ اﻟﱵ‪:‬‬
‫‪ ‬ﳛﺪد اﳌﻔﻬﻮم اﳌﺮاد اﻟﻄﻼب‪.‬‬
‫‪ ‬ﻳﻘﻮم ﺑﺼﻴﺎﻏﺔ ﺑﻌﺾ اﳌﺸﻜﻼت واﻟﺼﻌﻮﺑﺎت اﻟﱵ ﻗﺪ ﻳﻘﺎﺑﻠﻬﺎ اﻟﻄﻼب ﰲ ﻛﻞ ﻣﺮﺣﻠﺔ ﻣﻦ ﻣﺮاﺣﻞ اﻟﺘﻌﻠﻢ اﻟﺒﻨﺎﺋﻲ‪.‬‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪200‬‬
‫‪24‬‬ ‫اﻟﻔﺼﻞ اﻟﺮاﺑﻊ | ‪Chapter 4‬‬

‫‪ ‬ﻛﺘﺎﺑﺔ ﻗﺎﺋﻤﺔ ﺑﻜﻞ ﻣﺎ ﳝﻜﻦ ﺗﻮﻓﲑﻩ ﻣﻦ اﳋﱪات اﳊﺴﻴﺔ وﺛﻴﻘﺔ اﻟﺼﻠﺔ ﺑﺎﳌﻔﻬﻮم اﳌﺮاد ﺗﻌﻠﻤﻪ‪.‬‬
‫‪ ‬ﳛﺪد اﻷﺳﺌﻠﺔ اﻟﱵ ﺗﻌﺮض ﻋﻠﻰ اﻟﻄﻼب واﻟﱵ ﺗﺆدي إﱃ ﺷﻌﻮرﻫﻢ ﺑﺎﳊﺎﺟﺔ إﱃ اﻟﺒﺤﺚ واﻟﺘﻨﻘﻴﺐ ﻟﻠﻮﺻﻮل ﻟﻠﺤﻞ‪.‬‬
‫‪ ‬ﻳﺸﺠﻊ ﻃﻼﺑﻪ ﻋﻠﻰ اﻟﺘﻌﺎون واﻟﻌﻤﻞ اﳉﻤﺎﻋﻲ ﻣﻦ ﺧﻼل ﺗﻘﺴﻴﻢ اﻟﻄﻼب إﱃ ﳎﻤﻮﻋﺎت ﻣﺘﻨﺎﻇﺮة‪.‬‬
‫‪ ‬ﳜﻄﻂ ﳌﺮﺣﻠﺔ اﻻﺳﺘﻜﺸﺎف واﻻﺑﺘﻜﺎر ﺑﺎﺧﺘﻴﺎر ﻋﺪد ﻣﻦ اﳋﱪات اﳊﺴﻴﺔ اﳌﺘﺒﺎﻳﻨﺔ ﻣﻦ ﺣﻴﺚ اﻟﺸﻜﻞ واﳌﺮﺗﺒﻄﺔ ﺑﺎﶈﺘﻮى اﻟﺘﻌﻠﻴﻤﻲ‪،‬‬
‫وإﻋﻄﺎء اﻟﻄﻼب اﻟﻮﻗﺖ اﳌﻨﺎﺳﺐ ﻟﻠﻘﻴﺎم ﺑﺄﻧﺸﻄﺔ ﻫﺬﻩ اﳌﺮﺣﻠﺔ وﲢﻘﻴﻖ اﻷﻫﺪاف ﻣﻨﻬﺎ‪.‬‬
‫‪ ‬ﳜﻄﻂ ﳌﺮﺣﻠﺔ اﻗﱰاح اﻟﺘﻔﺴﲑات واﳊﻠﻮل ﻣﻦ ﺧﻼل ﺟﻠﺴﺎت اﳊﻮار ﺑﲔ اﳌﻌﻠﻢ واﻟﻄﻼب‪.‬‬
‫‪ ‬ﳜﻄﻂ ﳌﺮﺣﻠﺔ اﲣﺎذ اﻹﺟﺮاء ﺑﺘﻮﺟﻴﻪ ﻃﻼﺑﻪ ﱃ ﺗﻄﺒﻴﻖ ﻣﺎ ﺗﻌﻠﻤﻮﻩ ﻣﻦ ﺧﱪات ﰲ ﺣﻴﺎﻬﺗﻢ اﻟﻌﻤﻠﻴﺔ‪.‬‬
‫‪ ‬ﻳﺘﻘﺒﻞ أﺧﻄﺎء ﻃﻼﺑﻪ وﻻ ﻳﻌﻨﻔﻬﻢ ﻋﻠﻴﻬﺎ‪ ،‬وﻳﻘﻮم ﺑﺘﻮﺟﻴﻪ اﻟﺘﻼﻣﻴﺬ إﱃ ﺗﺼﺤﻴﺢ اﻷﺧﻄﺎء ﲢﺖ ﺗﻮﺟﻴﻬﻪ وإرﺷﺎدﻩ‪.‬‬

‫‪ 5-2-4-4-4‬ﺑﻴﺌﺔ اﻟﺘﻌﻠﻢ اﻟﺒﻨﺎﺋﻲ )‪:(Constructivist Learning Environment‬‬

‫ﺗﻌﺪ ﺑﻴﺌﺔ اﻟﺘﻌﻠﻢ اﻟﺒﻨﺎﺋﻲ اﳌﻜﺎن اﻟﺬي ﻳﻌﻤﻞ ﻓﻴﻪ اﳌﺘﻌﻠﻤﻮن ﻣﻌـﺎً‪ ،‬وﻫـﻲ ﺑﻴﺌﺔ ﻣﺮﻧﺔ ﺗﺴﺎﻋﺪ اﳌﺘﻌﻠﻢ ﻋﻠﻰ اﻟﺘﻌﻠﻢ اﻟﻘﺎﺋـﻢ ﻋﻠﻰ أﻧﺸﻄـﺔ ﺣﻘﻴﻘﻴـﺔ وواﻗﻌﻴﺔ‪.‬‬
‫وﺗﺘﻤﻴﺰ ﺑﻴﺌﺔ اﻟﺘﻌﻠﻢ ﺑﺎﺳﺘﺨﺪام ﳕﻮذج اﻟﺘﻌﻠﻢ اﻟﺒﻨﺎﺋﻲ ﺑﺎﳌﻼﻣﺢ اﻟﺘﺎﻟﻴﺔ]‪:[564‬‬

‫‪ ‬ﺑﻴﺌﺔ ﻣﻨﻔﺘﺤﺔ ﺗﺘﺴﻢ ﺑﻄﺎﺑﻊ ﻣﻦ اﳊﺮﻳﺔ واﻟﺪﳝﻘﺮاﻃﻴﺔ ﰲ اﳊﻮار وﻋﺮض اﻷﻓﻜﺎر‪.‬‬

‫‪ ‬ﺗﺴﻤﺢ ﺑﺈﺷﺮاك ﻛﻞ ﻣﻦ اﳌﻌﻠﻢ واﳌﺘﻌﻠﻢ ﰲ ﺻﻨﻊ اﻟﻘﺮار وﺣﻞ اﳌﺸﻜﻼت‪.‬‬
‫‪ ‬ﺑﻴﺌﺔ ﳏﻔﺰة ﻟﻠﺘﻔﻜﲑ وﺗﻘﻮد إﱃ اﻟﺘﺤﺪي‪.‬‬
‫‪ ‬ﺗﺘﻤﺮﻛﺰ ﺣﻮل اﳌﺘﻌﻠﻢ وﻟﻴﺲ اﳌﻌﻠﻢ‪.‬‬
‫‪ ‬ﲢﱰم اﻫﺘﻤﺎﻣﺎت وﻗﺪرات اﻟﻄﻼب‪.‬‬
‫‪ ‬ﻳﺘﻢ ﻓﻴﻬﺎ ﺗﺸﺠﻴﻊ اﻟﻄﻼب ﻟﺒﻨﺎء ﻃﺮﻗﻬﻢ اﳋﺎﺻﺔ ﰲ اﻟﺘﻌﻠﻢ‪.‬‬
‫‪ ‬ﻏﻨﻴﺔ ﲟﺼﺎدر وأدوات اﻟﺘﻌﻠﻢ اﳌﺨﺘﻠﻔﺔ واﳌﺴﺘﺨﺪﻣﺔ ﰲ ﺣﻞ اﳌﺸﻜﻼت‪.‬‬
‫‪ ‬اﻟﺘﻌﻠﻢ ﻓﻴﻬﺎ ﻟﻪ ﻣﻌﲎ وﻇﻴﻔﻲ ﻋﻨﺪ اﻟﻄﻼب‪.‬‬
‫‪ ‬ﺗﺴﺎﻋﺪ ﻋﻠﻰ اﻻﺳﺘﻘﻼل اﻟﺬاﰐ ﻟﻠﻄﻼب ﺑﺪﻻً ﻣﻦ اﻻﻋﺘﻤﺎد ﻋﻠﻰ اﳌﻌﻠﻢ‪.‬‬
‫‪ ‬ﺗﺴﺎﻋﺪ ﻋﻠﻰ اﻟﻮﻋﻲ اﻟﺘﻘﲏ اﻟﻌﻤﻠﻲ وﺧﺼﻮﺻﺎً اﻟﻌﻠﻮم اﳌﺮﺗﺒﻄﺔ ﺑﺎﻟﺘﻘﺎﻧﺔ‪.‬‬

‫‪ 6-2-4-4-4‬اﺳﱰاﺗﻴﺠﻴﺎت اﻟﺘﻌﻠﻴﻢ اﻟﺒﻨﺎﺋﻲ )‪:(Constructivist Teaching Methodologies‬‬

‫ﰲ اﻟﻨﻤﻮذج اﻟﺴﻠﻮﻛﻲ ﺗﻘﻮم اﺳﱰاﺗﻴﺠﻴﺎت اﻟﺘﺪرﻳﺲ ﻋﻠﻰ اﻟﺘﻌﻠﻴﻢ اﻟﻔﺮدي‪ ،‬ﻣﺜﻞ اﻟﺘﻌﻠﻢ ﻣﻦ اﻟﻜﺘﺐ واﻟﺘﻌﻠﻴﻢ ﺑﺎﳊﺎﺳﻮب‪ ،‬ﺑﻴﻨﻤﺎ ﺗﻌﺘﻤﺪ ﻃﺮق‬
‫اﻟﺘﺪرﻳﺲ وﻓﻖ اﻟﻄﺮﻳﻘﺔ اﻟﺒﻨﺎﺋﻴﺔ ﻋﻠﻰ ﻣﻮاﺟﻬﺔ اﻟﻄﻼب ﲟﺸﻜﻠﺔ ﺣﻘﻴﻘﻴﺔ ﳛﺎوﻟﻮن إﳚﺎد ﺣﻠﻮل ﳍﺎ ﻣﻦ ﺧﻼل اﻟﺒﺤﺚ واﻟﺘﻨﻘﻴﺐ واﳌﻔﺎوﺿﺔ‬
‫اﻻﺟﺘﻤﺎﻋﻴﺔ ﳍﺬﻩ اﳊﻠﻮل‪.‬إن اﻟﻨﻈﺮﻳﺔ اﻟﺒﻨﺎﺋﻴﺔ ﺗﺮﻛﺰ ﻋﻠﻰ اﳌﻌﺮﻓﺔ اﳌﺴﺒﻘﺔ اﳌﻮﺟﻮدة ﰲ ﺑﻴﺌﺔ اﳌﺘﻌﻠﻢ‪ ،‬وإن ﻫﺬﻩ اﳌﻌﺮﻓﺔ ﳍﺎ ﻗﻴﻤﺔ ﻛﺒﲑة‪ ،‬ﻓﺎﻟﺘﻌﻠﻴﻢ ﳚﺐ‬
‫أن ﻳﺒﺪأ ﺑﺎﺳﺘﺨﺪام أﻓﻜﺎر اﻟﻄﻼب اﻟﱵ ﺗﺆدي دوراً أﺳﺎﺳﻴﺎً ﰲ اﻛﺘﺴﺎب ﺧﱪات اﻟﺘﻌﻠﻢ اﳉﺪﻳﺪة‪ ،‬ﻟﺬﻟﻚ ﻳﻨﺒﻐﻲ ﻋﻠﻰ اﳌﻌﻠﻤﲔ ن ﻳﻌﻄﻮا ﻃﻼﻬﺑﻢ‬
‫ﻓﺮﺻﺎً ﻻﺳﺘﺨﺪام اﻟﺘﺼﻮرات اﳊﺎﻟﻴﺔ ﻟﻠﻤﻌﺮﻓﺔ اﳌﻮﺟﻮدة ﻟﺪﻳﻬﻢ‪ ،‬وﻫﺬﻩ اﻟﻔﺮص ﺗﻌﻤﻞ ﻋﻠﻰ ﺗﻔﺎﻋﻞ اﻟﻄﻼب ﻓﻴﻤﺎ ﺑﻴﻨﻬﻢ‪ .‬وﳝﻜﻦ إﺟﺮاء ﻣﻘﺎرﻧﺔ ﺑﲔ‬
‫اﻟﺘﻌﻠﻴﻢ اﻟﺘﻘﻠﻴﺪي واﻟﺘﻌﻠﻴﻢ اﻟﺒﻨﺎﺋﻲ ﻛﻤﺎ ﰲ اﳉﺪول‪1-4‬‬

‫‪201‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Engineering Education Methodologies‬‬ ‫ﻣﻨﻬﺠﻴﺎت اﻟﺘﻌﻠﻴﻢ اﳍﻨﺪﺳﻲ |‬

‫اﻟﺘﻌﻠﻴﻢ اﻟﺒﻨﺎﺋﻲ‬ ‫اﻟﺘﻌﻠﻴﻢ اﻟﺘﻘﻠﻴﺪي‬ ‫أوﺟﻪ اﳌﻮازﻧﺔ‬

‫أﻧﺸﻄﺔ ﻣﺘﺘﺎﻟﻴﺔ ﺑﺪﻧﻴﺔ وذﻫﻨﻴﺔ أي أ�ﺎ ﺳﻴﺎﻗﻴﺔ‪،‬‬ ‫‪-‬‬ ‫ﳎﻤﻮﻋﺔ ﻣﻦ اﳌﻌﻠﻮﻣﺎت اﻟﱵ ﻳﺘﻢ وﺻﻔﻬﺎ‪،‬‬ ‫‪-‬‬
‫وﺑﺎﻟﺘﺎﱄ ﻳﺘﻢ ﺑﻨﺎؤﻫﺎ‪.‬‬ ‫ﻬﻲ ﻬﺗﺘﻢ ﺑﺎﻟﺘﺬﻛﺮ واﳊﻔﻆ واﻟﺘﻠﻘﲔ‪.‬‬ ‫اﳌﻌﺮﻓﺔ‬
‫ﺗﺒﲎ اﳌﻌﺮﻓﺔ ﻋﻠﻰ ﺣﻞ اﳌﺸﻜﻼت اﻟﻌﻠﻤﻴﺔ‪.‬‬ ‫‪-‬‬ ‫ﻻ ﺗﻮﺿﻊ ﻣﺸﻜﻼت ﻋﻠﻤﻴﺔ‪.‬‬ ‫‪-‬‬
‫ﻳﻘﻮم ﺑﺒﻨﺎء ﻣﻌﺮﻓﺘﻪ وﻟﺪﻳﺔ ﺗﺼﻮر ﻗﺒﻞ اﻟﺘﻌﻠﻢ‪.‬‬ ‫‪-‬‬ ‫ﻳﺘﻌﻠﻢ ﻋﻦ ﻃﺮﻳﻖ اﻹرﺳﺎل واﻻﺳﺘﻘﺒﺎل‬ ‫‪-‬‬
‫اﳋﻄﺄ ﺟﺰء ﻣﻦ اﻟﺘﻌﻠﻴﻢ وﻟﻪ دور إﳚﺎﰊ ﰲ‬ ‫‪-‬‬ ‫وﻳﻘﻮم ﺑﺎﳊﻔﻆ واﻟﺘﺬﻛﺮ‪.‬‬ ‫اﳌﺘﻌﻠﻢ‬
‫ﺑﻨﺎء اﳌﻌﲎ وﺑﺪوﻧﻪ ﻻ ﳛﺪث اﻟﺘﻌﻠﻢ‪.‬‬ ‫ﳛﺎول ﺗﻼﰲ اﳋﻄﺄ‪.‬‬ ‫‪-‬‬

‫ﻳﺪرس ﻟﻜﻞ ﺗﻠﻤﻴﺬ ﺑﻨﻔﺲ اﻟﻄﺮﻳﻘﺔ‪.‬‬ ‫‪-‬‬

‫ﳛﺎول ﺗﻨﻮﻳﻊ أﺳﻠﻮﺑﻪ اﻟﺘﻌﻠﻴﻤﻲ‪.‬‬ ‫‪-‬‬
‫ﻳﻌﺮض وﻳﻌﻄﻲ اﻹﺟﺎﺑﺎت اﻟﺼﺤﻴﺤﺔ‬ ‫‪-‬‬ ‫اﳌﻌﻠﻢ‬
‫ﻳﻘﱰح أﻧﺸﻄﺔ ﻟﻠﺘﻼﻣﻴﺬ وﻳﻨﻈﻢ اﳌﻨﺎﻗﺸﺎت‪.‬‬ ‫‪-‬‬
‫ﻟﻠﺘﻼﻣﻴﺬ‪.‬‬

‫اﳉﺪول‪ 1-4‬ﻣﻘﺎرﻧﺔ ﺑﲔ اﻟﺘﻌﻠﻴﻢ اﻟﺘﻘﻠﻴﺪي واﻟﺘﻌﻠﻴﻢ اﻟﺒﻨﺎﺋﻲ‬

‫ﻳﻮﺟﺪ اﻟﻌﺪﻳﺪ ﻣﻦ اﺳﱰاﺗﻴﺠﻴﺎت اﻟﺘﻌﻠﻴﻢ اﻟﻘﺎﺋﻤﺔ ﻋﻠﻰ اﳌﻨﻬﺞ اﻟﺒﻨﺎﺋﻲ وﻫﻲ‪:‬‬

‫‪ -‬اﺳﱰاﺗﻴﺠﻴﺔ دورة اﻟﺘﻌﻠﻢ )‪(Learning Cycle Strategy‬‬
‫‪ -‬ﳕﻮذج اﻟﺘﻌﻠﻢ اﻟﺒﻨﺎﺋﻲ )‪(Constructivist Learning Model‬‬
‫‪ -‬ﳕﻮذج اﻟﺸﻜﻞ ‪(Vee shape Model) V‬‬
‫‪ -‬ﳕﻮذج اﻟﺘﻐﻴﲑ اﳌﻔﻬﻮﻣﻲ )‪(Conceptual change Nodel‬‬
‫‪ -‬اﺳﱰاﺗﻴﺠﻴﺔ اﻟﺘﻌﻠﻢ اﳌﺮﺗﻜﺰ ﻋﻠﻰ اﳌﺸﻜﻠﺔ )‪(Problem centered learning Strategy‬‬

‫إن ﻣﻦ أﻫﻢ اﺳﱰاﺗﻴﺠﻴﺎت اﻟﺘﻌﻠﻴﻢ اﻟﱵ ﺗﻘﻮم ﻋﻠﻰ اﻟﺒﻨﺎﺋﻴﺔ ﳕﻮذج اﻟﺘﻌﻠﻢ اﻟﺒﻨﺎﺋﻲ‪.‬‬

‫‪ 1-6-2-4-4-4‬ﳕﻮذج اﻟﺘﻌﻠﻢ اﻟﺒﻨﺎﺋﻲ )‪:(Constructivist Learning Model‬‬

‫ﻛﺪ ﳕﻮذج اﻟﺘﻌﻠﻢ اﻟﺒﻨﺎﺋﻲ ﻋﻠﻰ رﺑﻂ اﻟﻌﻠﻢ ﺑﺎﻟﺘﻘﺎﻧﺔ واﺠﻤﻟﺘﻤﻊ‪ ،‬وﻳﺴﻌﻰ إﱃ ﻣﺴﺎﻋﺪة اﻟﻄﻼب ﻋﻠﻰ ﺑﻨﺎء ﻣﻔﺎﻫﻴﻤﻬﻢ اﻟﻌﻠﻤﻴﺔ وﻣﻌﺎرﻓﻬﻢ ﻣﻦ ﺧﻼل‬
‫أرﺑﻊ ﻣﺮاﺣﻞ ﻫﻲ‪ :‬ﻣﺮﺣﻠﺔ اﻟﺪﻋﻮة )‪ ،(Invite Stage‬ﻣﺮﺣﻠﺔ اﻻﺳﺘﻜﺸﺎف واﻻﻛﺘﺸﺎف واﻻﺑﺘﻜﺎر )‪،(Discover, Create, Explore‬‬
‫ﻣﺮﺣﻠﺔ اﻗﱰاح اﻟﺘﻔﺴﲑات واﳊﻠﻮل )‪ ،(Propose Explanations & Solutions‬وﻣﺮﺣﻠﺔ اﲣﺎذ اﻟﻘﺮار )‪ ،(Take Action Stage‬وﻟﻜﻞ‬
‫ﻣﻨﻬﺎ ﺟﺎﻧﺒﺎن اﻟﻌﻠﻢ واﻟﺘﻘﺎﻧﺔ]‪ .[564,565‬ﻓﺎﳌﺘﻌﻠﻢ ﻳﺒﺤﺚ ﻋﻦ اﳌﻌﺮﻓﺔ ﻣﺴﺘﺨﺪﻣﺎً ﻗﺪراﺗﻪ اﻟﻌﻘﻠﻴﺔ اﳋﺎﺻﺔ ﺑﻄﺮﻳﻘﺔ ﻛﺒﲑة‪ ،‬وﻫﺬا ﻳﺴﺎﻋﺪ ﻋﻠﻰ ﺗﻨﻤﻴﺔ‬
‫اﻟﺘﻔﻜﲑ اﻻﺑﺘﻜﺎري ﻟﺪى اﳌﺘﻌﻠﻢ‪ .‬ﻟﻘﺪ أﺛﺒﺘﺖ اﻟﻌﺪﻳﺪ ﻣﻦ اﻟﺪراﺳﺎت واﻟﺒﺤﻮث]‪ [548,562‬أن ﻫﺬا اﻟﻨﻤﻮذج أﻛﺜﺮ ﻓﺎﻋﻠﻴﺔ ﰲ ﺗﻨﻤﻴﺔ اﳌﻔﺎﻫﻴﻢ واﻟﻮﻋﻲ‬
‫ﻟﺪى اﻟﻄﻼب‪.‬‬

‫ﳑﻴﺰات ﳕﻮذج اﻟﺘﻌﻠﻢ اﻟﺒﻨﺎﺋﻲ )‪:(Constructivist Learning Model‬‬ ‫‪1-1-6-2-4-4-4‬‬

‫ﻟﻨﺠﺎح ﳕﻮذج اﻟﺘﻌﻠﻢ اﻟﺒﻨﺎﺋﻲ ﰲ اﻟﻌﻤﻠﻴﺔ اﻟﺘﻌﻠﻴﻤﻴﺔ ﲟﺎ ﻳﻨﻌﻜﺲ إﳚﺎﺑﺎً ﻋﻠﻰ اﳌﺘﻌﻠﻤﲔ؛ ﻓﺈن ﻫﻨﺎك ﳑﻴﺰات ﳍﺬا اﻟﻨﻤﻮذج ﻳﻨﺒﻐﻲ ﺗﻮﻇﻴﻔﻬﺎ ﺑﺸﻜﻞ ﺟﻴﺪ‬
‫ﰲ اﻟﻌﻤﻠﻴﺔ اﻟﺘﻌﻠﻴﻤﻴﺔ‪ ،‬ﺣﻴﺚ ﻳﺘﻤﻴﺰ ﳕﻮذج اﻟﺘﻌﻠﻢ اﻟﺒﻨﺎﺋﻲ ﺑﻌﺪة ﻣﻴﺰات ﻛﻤﺎ ﻳﻠﻲ‪:‬‬
‫‪ ‬ﳚﻌﻞ ﻣﻦ اﳌﺘﻌﻠﻢ ﻣﺮﻛﺰاً ﻟﻠﻌﻤﻠﻴﺔ اﻟﺘﻌﻠﻴﻤﻴﺔ‪ ،‬ﻓﻬﻮ ﻣﻄﺎﻟﺐ ﺑﺎﻟﺒﺤﺚ واﻟﺘﻘﺼﻲ ﻟﻜﻲ ﻳﺼﻞ إﱃ اﳌﻔﺎﻫﻴﻢ ﺑﻨﻔﺴﻪ‪.‬‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪202‬‬
‫‪24‬‬ ‫اﻟﻔﺼﻞ اﻟﺮاﺑﻊ | ‪Chapter 4‬‬

‫‪ ‬ﻳﺘﻴﺢ ﻓﺮﺻﺔ ﻟﻠﻤﺘﻌﻠﻤﲔ ﻟﻠﺘﻔﺎﻋﻞ اﻹﳚﺎﰊ ﻣﻊ ﻗﻀﺎﻳﺎ ﺸﻜﻼت اﺠﻤﻟﺘﻤﻊ اﻟﺬي ﻳﻌﻴﺶ ﻓﻴﻪ‪.‬‬
‫‪ ‬ﻳﺘﻴﺢ ﻓﺮﺻﺔ أﻣﺎم اﳌﺘﻌﻠﻤﲔ ﳌﻤﺎرﺳﺔ ﻋﻤﻠﻴﺎت اﻟﻌﻠﻢ اﳌﺨﺘﻠﻔﺔ ﻣﺜﻞ اﳌﻼﺣﻈﺔ واﻻﺳﺘﻨﺘﺎج وﻓﺮض اﻟﻔﺮوض واﺧﺘﺒﺎر ﺻﺤﺘﻬﺎ وﻏﲑﻫﺎ ﻣﻦ‬
‫ﻋﻤﻠﻴﺎت اﻟﻌﻠﻢ‪.‬‬
‫‪ ‬ﻳﺘﻢ اﻟﺘﻌﻠﻢ ﻣﻦ ﺧﻼﻟﻪ ﰲ ﺟﻮ دﳝﻘﺮاﻃﻲ ﻳﺘﻴﺢ اﻟﻔﺮﺻﺔ ﻟﻠﺘﻔﺎﻋﻞ اﻟﻨﺸﻂ ﺑﲔ اﻟﺘﻼﻣﻴﺬ وﺑﻌﻀﻬﻢ ﺑﻌﻀﺎً وﺑﲔ اﻟﺘﻼﻣﻴﺬ واﳌﻌﻠﻢ‪.‬‬
‫‪ ‬ﺑﻂ اﻟﻨﻤﻮذج ﺑﲔ اﻟﻌﻠﻢ واﻟﺘﻜﻨﻮﻟﻮﺟﻴﺎ؛ ﳑﺎ ﻳﻮﺿﺢ اﻟﺮؤﻳﺔ أﻣﺎم اﳌﺘﻌﻠﻤﲔ إﱃ دور اﻟﻌﻠﻢ ﰲ ﺣﻞ ﻣﺸﻜﻼت اﺠﻤﻟﺘﻤﻊ‪.‬‬
‫‪ ‬ﻳﺘﻢ اﻟﻌﻤﻞ ﻣﻦ ﺧﻼﻟﻪ ﰲ ﳎﻤﻮﻋﺎت؛ ﳑﺎ ﻳﻨﻤﻲ روح اﻟﺘﻌﺎون واﻟﻌﻤﻞ اﻟﺘﻌﺎوﱐ اﻹﳚﺎﰊ‪.‬‬
‫‪ ‬ﻳﺘﻄﻠﺐ ﻣﻦ اﳌﺘﻌﻠﻤﲔ إﻋﻄﺎء أﻛﱪ ﻗﺪر ﻣﻦ اﳊﻠﻮل ﻟﻠﻤﺸﻜﻠﺔ اﻟﻮاﺣﺪة؛ ﳑﺎ ﳚﻌﻞ اﳌﺘﻌﻠﻤﻮن ﰲ ﺣﺎﻟﺔ ﺗﻔﻜﲑ ﻣﺴﺘﻤﺮ؛ ﳑﺎ ﻳﺆدي إﱃ ﺗﻨﻤﻴﺔ‬
‫اﻟﺘﻔﻜﲑ ﺑﺄﻧﻮاﻋﻪ ﻟﺪى اﳌﺘﻌﻠﻤﻮن‪.‬‬
‫‪ ‬ﻳﺘﻴﺢ اﻟﻔﺮﺻﺔ أﻣﺎم اﳌﺘﻌﻠﻤﲔ ﻟﺘﺼﺤﻴﺢ اﳌﻔﺎﻫﻴﻢ اﳋﺎﻃﺌﺔ اﻟﱵ ﻗﺪ ﻳﺼﻠﻮن إﻟﻴﻬﺎ ﻣﻦ ﺧﻼل ﺟﻠﺴﺎت اﳊﻮار‪.‬‬
‫‪ ‬ﺗﺘﻮﻓﺮ ﻣﻦ ﺧﻼﻟﻪ اﻷﺳﺌﻠﺔ اﻟﱵ ﲢﻔﺰ اﳌﺘﻌﻠﻤﲔ ﻟﻠﺮﺟﻮع إﱃ اﳌﺼﺎدر اﳌﺘﻨﻮﻋﺔ ﻟﻠﻤﻌﻠﻮﻣﺎت ﻟﻠﻮﺻﻮل إﱃ ﺗﺪﻋﻴﻢ ﻟﻠﺘﻔﺴﲑات اﻟﱵ ﺗﻮﺻﻠﻮا إﻟﻴﻬﺎ‬
‫ﻟﻈﺎﻫﺮة أو ﻣﺸﻜﻠﺔ ﻣﻌﻴﻨﺔ‪.‬‬
‫‪ ‬ﻳﻘﺘﺼﺮ دور اﳌﻌﻠﻢ ﻋﻠﻰ ﺗﻨﻈﻴﻢ ﺑﻴﺌﺔ اﻟﺘﻌﻠﻢ واﻟﺘﻮﺟﻴﻪ واﻹرﺷﺎد وﻣﻨﺴﻖ ﳉﻠﺴﺎت اﳊﻮار‪.‬‬
‫‪ ‬ﻳﺰود ﻫﺬا اﻟﻨﻤﻮذج اﻟﺘﻼﻣﻴﺬ ﺑﻮﺳﺎﺋﻞ اﻟﺘﻘﻮﱘ اﳌﺨﺘﻠﻔﺔ ﻣﻦ ﺧﻼل ﻣﺮﺣﻠﺔ اﻟﺘﻘﻮﱘ‪ ،‬وذﻟﻚ ﺑﺎﺳﺘﺨﺪام اﺧﺘﺒﺎرات ﻣﻘﻨﻨﺔ‪.‬‬
‫‪ ‬ﻳﺴﻤﺢ ﻫﺬا اﻟﻨﻤﻮذج ﻻﺳﺘﺨﺪام اﻟﻌﺪﻳﺪ ﻣﻦ اﳌﻨﺎﺷﻂ واﻟﺘﺠﺎرب وﻋﺮض اﻷﻓﻼم اﻟﺘﻌﻠﻴﻤﻴﺔ واﺳﺘﺨﺪام اﻟﻮﺳﺎﺋﻞ اﳌﺨﺘﻠﻔﺔ اﻟﱵ ﺗﺴﺎﻋﺪ ﰲ‬
‫ﺗﻌﻠﻢ اﻟﺘﻼﻣﻴﺬ‪.‬‬
‫‪ ‬ﻳﻌﺘﱪ ﻫﺬا اﻟﻨﻤﻮذج ﺷﺎﻣﻼً ﻟﻠﺘﻌﻠﻢ اﻟﺒﻨﺎﺋﻲ ﻣﻦ ﺧﻼل ﺑﻨﺎء اﻟﺘﻼﻣﻴﺬ ﻟﻠﻤﻌﺮﻓﺔ ﺑﺄﻧﻔﺴﻬﻢ‪ ،‬وذﻟﻚ ﻣﻦ ﺧﻼل ﻣﺮاﺣﻠﻪ اﳌﺨﺘﻠﻔﺔ‪.‬‬

‫‪ 3-4-4-4‬أﺷﻜﺎل وﺻﻴﻎ اﻟﺘﻌﻠﻢ اﻟﺒﻨﺎﺋﻲ )‪:(Constructivist Learning Methods‬‬

‫إن أﺷﻜﺎل وﺻﻴﻎ اﻟﺘﻌﻠﻢ اﻟﺒﻨﺎﺋﻲ ﻣﺘﻌﺪدة‪ ،‬ﺣﻴﺚ ﺗﺘﻀﻤﻦ‪ :‬اﻟﻔﱰات اﻟﺘﺪرﻳﺒﻴﺔ )‪ ،(Internships‬اﻷﻟﻌﺎب )‪ ،(Games‬اﻟﺘﻮﻇﻴﻒ اﳌﻴﺪاﱐ‬
‫)‪ ،(Field Placements‬اﳌﻬﻤﺎت )‪ ،(Assignments‬ﲤﺜﻴﻞ اﻷدوار )‪ ،(Role Playing‬اﻟﺘﻌﺎون ﰲ ﺣﻞ اﳌﺴﺎﺋﻞ ) ‪Cooperative‬‬

‫‪ ،(Problem Solving‬اﻟﺘﻌﻠﻢ اﳌﺮﺗﻜﺰ ﻋﻠﻰ اﳌﺸﺎرﻳﻊ )‪ ،(Project-based Learning‬ﺗﻌﻠﻢ اﳋﺪﻣﺎت )‪،(Service Learning‬‬
‫اﻟﺪراﺳﺎت اﳌﺨﱪﻳﺔ )‪ ،(Laboratory Studies‬اﳌﺸﺎرﻳﻊ اﳌﻴﺪاﻧﻴﺔ )‪ ،(Field Projects‬اﻟﺘﻌﻠﻢ اﻟﺘﺠﺮﻳﱯ )‪،(Experiential Learning‬‬
‫وأﺷﻜﺎل أﺧﺮى ﻛﺜﲑة ﳝﻜﻦ أن ﺗﺼﻨﻒ ﺿﻤﻦ اﻟﺘﻌﻠﻢ اﻟﺒﻨﺎﺋﻲ‪.‬‬

‫إﱃ اﳌﺰﻳﺪ ﻣﻦ اﻷﲝﺎث اﻻﺧﺘﺒﺎرﻳﺔ ﻋﻠﻰ ﻣﻨﻬﺠﻴﺎت اﻟﺘﻌﻠﻢ اﻟﺒﻨﺎﺋﻲ اﻟﱵ ﲡﺬب اﻟﻄﻼب ﺧﻼل اﻟﻌﻤﻠﻴﺔ‬ ‫]‪[548‬‬
‫ﻳﺪﻋﻮ اﻟﺒﺎﺣﺚ ‪Richardson‬‬

‫اﻟﺘﻌﻠﻴﻤﻴﺔ‪ ،‬ﺣﻴﺚ أن ﻣﺜﻞ ﻫﺬﻩ اﻷﲝﺎث ﺳﻮف ﺗﺴﺎﻋﺪ ﻋﻠﻰ ﺻﻮغ ﻧﻈﺮﻳﺔ ﺗﻘﺪم ﺑﺪورﻫﺎ ﻓﻬﻤﺎً ووﺻﻔﺎً ﻟﻠﺘﺪرﻳﺒﺎت اﻟﻔﻌﺎﻟﺔ ﰲ اﻟﺘﻌﻠﻢ اﻟﺒﻨﺎﺋﻲ‪.‬‬
‫اﻟﻘﺴﻢ اﻟﺘﺎﱄ ﻳﻘﺪم اﻟﻨﻤﻮذج اﻟﺘﻌﻠﻴﻤﻲ اﻟﺒﻨﺎﺋﻲ اﻟﺘﺠﺮﻳﱯ اﻟﺬي ﻫﻮ ﻣﻦ أﺷﻬﺮ وأﻗﻮى اﻟﻨﻤﺎذج اﳌﺬﻛﻮرة‪.‬‬

‫‪ 1-3-4-4-4‬اﻟﺘﻌﻠﻢ اﻟﺘﺠﺮﻳﱯ )‪:(Experiential Learning‬‬

‫ﻳﻌﺪ اﻟﺘﻌﻠﻢ اﻟﺘﺠﺮﻳﱯ )‪ (Experiential Learning‬أﺣﺪ أﺷﻬﺮ ﳕﺎذج اﻟﺘﻌﻠﻴﻢ اﻟﺒﻨﺎﺋﻲ‪ ،‬واﻟﺘﻌﻠﻢ اﻟﺘﺠﺮﻳﱯ ﳑﺎرﺳﺔ ﻗﺪﳝﺔ ﲢﺘﻀﻦ ﻓﻠﺴﻔﺔ‬
‫”‪) “Learning by Doing‬اﻟﺘﻌﻠﻢ ﺑﺎﳌﻤﺎرﺳﺔ أو اﻟﺘﻄﺒﻴﻖ(‪ ،‬وﳝﻜﻦ اﻟﻘﻮل أن اﻟﻨﻤﻮذج اﻟﺘﺠﺮﻳﱯ ﻫﻮ اﻟﺸﻜﻞ اﻷﻗﺪم ﻣﻦ أﺷﻜﺎل اﻟﺘﻌﻠﻢ وﻳﻌﺪ‬

‫‪203‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Engineering Education Methodologies‬‬ ‫ﻣﻨﻬﺠﻴﺎت اﻟﺘﻌﻠﻴﻢ اﳍﻨﺪﺳﻲ |‬

‫ﻣﻨﺸﺄ اﻟﻌﻠﻮم اﳌﺘﻘﺪﻣﺔ‪ ،‬ذﻟﻚ أن اﻻﺧﱰاﻋﺎت واﻻﻛﺘﺸﺎﻓﺎت اﻟﺒﺸﺮﻳﺔ اﻷوﱃ ﻛﺎﻧﺖ ﺣﺼﻴﻠﺔ اﻟﺘﺠﺎرب أﻛﺜﺮ ﻣﻦ ﻛﻮ�ﺎ ﻧﺎﲡﺔ ﻋﻦ ﻧﻈﺮﻳﺎت‪ .‬وﻣﻊ‬
‫ﻋﻠﻰ دور اﻟﺘﺠﺎرب‬ ‫]‪[556‬‬
‫ذﻟﻚ ﱂ ﻳﻌﺘﱪ اﻟﺘﻌﻠﻢ اﻟﺘﺠﺮﻳﱯ ﻛﻤﻨﻬﺠﻴﺔ ﺑﻴﺪاﻏﻮﺟﻴﺔ )ﺗﺮﺑﻮﻳﺔ( ﺑﻨﺎﺋﻴﺔ ﺣﱴ اﻟﻘﺮن اﻟﻌﺸﺮﻳﻦ]‪ ،[545‬ﺣﻴﺚ أﻛﺪ اﻟﺒﺎﺣﺚ‬
‫اﳊﻘﻴﻘﻴﺔ واﻟﻮاﻗﻌﻴﺔ ﰲ اﻟﺘﻌﻠﻴﻢ ﺧﻼل اﻟﻌﺸﺮﻳﻨﻴﺎت واﻟﺜﻼﺛﻴﻨﻴﺎت ﻣﻦ اﻟﻘﺮن اﳌﺎﺿﻲ‪ ،‬وﻻﺣﻘﺎً ﺧﻼل ﻓﱰﰐ اﻟﺴﺘﻴﻨﺎت واﻟﺴﺒﻌﻴﻨﺎت ازدﻫﺮت ﻧﻈﺮﻳﺔ‬
‫اﻟﺘﻌﻠﻢ اﻟﺘﺠﺮﻳﱯ ﻛﻨﺘﻴﺠﺔ ﻟﺘﻀﺎﻓﺮ ﺟﻬﻮد اﻟﻌﺪﻳﺪ ﻣﻦ ﻋﻠﻤﺎء اﻟﻨﻔﺲ وﻋﻠﻤﺎء اﻻﺟﺘﻤﺎع واﻟﱰﺑﻮﻳﲔ واﻟﺬﻳﻦ ﻣﻦ أﳘﻬﻢ]‪Piaget, Hahn, :[545‬‬

‫‪.Lewin, Chickering, Tumin, Bloom, Friere, Gardner‬‬

‫إن اﻟﺘﻌﻠﻢ اﻟﺘﺠﺮﻳﱯ ﺑﺄﺑﺴﻂ ﺗﻌﺎرﻳﻔﻪ ﳝﻜﻦ أن ﻳﻔﻬﻢ ﻋﻠﻰ أﻧﻪ ﲢﺼﻴﻞ اﳌﻌﺮﻓﺔ ﻣﻦ ﺧﻼل اﻟﺘﺠﺮﺑﺔ‪ ،‬وﻣﺼﻄﻠﺢ اﻟﺘﻌﻠﻢ اﻟﺘﺠﺮﻳﱯ ﻣﺼﻄﻠﺢ ﻋﺎم ﳝﻜﻦ‬
‫أن ﻳﻨﺪرج ﲢﺘﻪ ﻃﻴﻒ واﺳﻊ ﻣﻦ اﻟﻨﺸﺎﻃﺎت‪ ،‬وﻗﺪ ﻗﺪﻣﺖ ﺧﻼل اﻟﻌﻘﻮد اﻷرﺑﻌﺔ اﳌﺎﺿﻴﺔ اﻟﻌﺪﻳﺪ ﻣﻦ ﳕﺎذج اﻟﺘﻌﻠﻢ اﻟﺘﺠﺮﻳﱯ ) ‪Experiential‬‬

‫‪ (Learning Models‬واﻟﱵ ﺗﻨﻘﺴﻢ ﻓﻴﻬﺎ ﻋﻤﻠﻴﺔ اﻟﺘﻌﻠﻢ إﱃ ﻣﺮاﺣﻞ ﻣﺘﻤﺎﻳﺰة]‪ ،[545,559,560‬وﻧﻘﺪم ﰲ ﻣﺎ ﻳﻠﻲ ﶈﺔ ﻣﻮﺟﺰة ﻋﻦ ﳕﺎذج اﻟﺘﻌﻠﻢ‬
‫اﻟﺘﺠﺮﻳﱯ‪.‬‬

‫‪ 2-3-4-4-4‬ﳕﺎذج اﻟﺘﻌﻠﻢ اﻟﺘﺠﺮﻳﱯ )‪:(Experiential Learning Models‬‬

‫إن ﳕﺎذج اﻟﺘﻌﻠﻢ اﻟﺘﺠﺮﻳﱯ ﻋﺪﻳﺪة وﻣﺘﺒﺎﻳﻨﺔ ﻣﻦ ﺣﻴﺚ اﻵﻟﻴﺎت‪ ،‬وﻧﺴﺘﻌﺮض ﻫﻨﺎ ﻋﺪة ﳕﺎذج ﺷﺎﺋﻌﺔ ﻟﻠﺘﻌﻠﻢ اﻟﺘﺠﺮﻳﱯ‪.‬‬

‫‪ ‬ﳕﻮذج اﻟﺘﻌﻠﻢ اﻟﺘﺠﺮﻳﱯ اﳌﻜﻮن ﻣﻦ ﻣﺮﺣﻠﺘﲔ واﻟﺬي ﻳﺆﻛﺪ ﻋﻠﻰ اﻟﺘﻔﺎﻋﻞ ﺑﲔ اﻟﺘﺠﺮﺑﺔ )‪ (Experience‬واﻧﻌﻜﺎﺳﻬﺎ‬
‫)‪.[559](Reflection‬‬

‫‪ ‬ﳕﻮذج اﻟﺘﻌﻠﻢ اﻟﺘﺠﺮﻳﱯ ﺛﻼﺛﻲ اﳌﺮاﺣﻞ‪ :‬اﻟﺘﺠﺮﺑﺔ‪ ،‬اﻧﻌﻜﺎﺳﻬﺎ‪ ،‬اﻟﺘﺨﻄﻴﻂ اﳌﺴﺘﻘﺒﻠﻲ ﰲ ﺿﻮء ﻧﺘﺎﺋﺞ اﻟﺘﺠﺮﺑﺔ‪ ،‬واﻟﺬي ﻳﺸﲑ إﱃ أن‬
‫اﻟﺘﺨﻄﻴﻂ اﳌﺴﺘﻘﺒﻠﻲ ﻟﻠﺘﺠﺎرب ﺳﻮف ﻳﺴﺎﻋﺪ ﰲ زﻳﺎدة ﻧﺎﺗﺞ وﺣﺼﻴﻠﺔ اﻟﺘﻌﻠﻢ]‪.[566‬‬

‫ﺑﲎ ﻋﻠﻰ ﻧﻈﺮﻳﺔ‬ ‫‪ ‬اﻟﻌﺎﱂ ‪ Kolb‬ﰲ ﻛﺘﺎﺑﻪ ﻋﻦ اﻟﺘﻌﻠﻢ اﻟﺘﺠﺮﻳﱯ‪ ،‬واﻟﺬي اﻗﺘُﺒﺲ ﻋﻨﻪ ﰲ اﻷوراق اﻟﺒﺤﺜﻴﺔ ﻣﺎ ﻳﺰﻳﺪ ﻋﻦ ‪ 6000‬ﻣﺮة‬
‫]‪[545‬‬

‫‪ Dewey‬ﰲ اﻟﺘﻌﻠﻴﻢ]‪ [556‬ودراﺳﺎت ‪ Lewin‬ﰲ ﻋﻠﻢ اﻟﻨﻔﺲ اﻻﺟﺘﻤﺎﻋﻲ]‪ [567‬ﻟﻴﻄﻮر ﳕﻮذﺟﺎً ﻟﻠﺘﻌﻠﻢ اﻟﺘﺠﺮﻳﱯ ﺑﺄرﺑﻌﺔ ﻣﺮاﺣﻞ ﻫﻲ‪:‬‬
‫اﳋﱪات اﳌﻠﻤﻮﺳﺔ )‪ ،(Concrete Experience‬اﳌﻼﺣﻈﺔ اﻟﺘﺄﻣﻠﻴﺔ )‪ ،(Reflective Observation‬ﻔﺎﻫﻴﻢ اﺠﻤﻟﺮدة‬
‫)‪ ،(Abstract Conceptualization‬اﻟﺘﺠﺮﻳﺐ اﻟﻔﻌﺎل )‪.(Active Experimentation‬‬

‫‪ Pfeiffer and Jons‬ﻗﺪﻣﺎ ﳕﻮذﺟﺎً ﻟﻠﺘﻌﻠﻢ اﻟﺘﺠﺮﻳﱯ ﲞﻤﺴﺔ ﻣﺮاﺣﻞ ﻫﻲ]‪ :[568‬اﻟﺘﺠﺮﻳﺐ )‪ ،(Experiencing‬اﻟﻨﺸﺮ‬ ‫‪‬‬

‫)‪ ،(Publishing‬اﳌﻌﺎﳉﺔ )‪ ،(Processing‬اﻟﺘﻌﻤﻴﻢ )‪ ،(Generalizing‬اﻟﺘﻄﺒﻴﻖ )‪.(Applying‬‬

‫‪ Joplin ‬اﻗﱰح ﳕﻮذﺟﺎً ﻟﻠﺘﻌﻠﻢ اﻟﺘﺠﺮﻳﱯ ﲞﻤﺴﺔ ﻣﺮاﺣﻞ ﻣﺘﻀﻤﻨﺎً اﻟﻨﻮاﺣﻲ اﻟﺘﺎﻟﻴﺔ]‪ :[569‬اﻟﱰﻛﻴﺰ )‪ ،(Focus‬اﻹﺟﺮاء )‪،(Action‬‬
‫اﻟﺪﻋﻢ )‪ ،(Support‬اﻟﺘﻐﺬﻳﺔ اﻟﻌﻜﺴﻴﺔ )‪ ،(Feedback‬اﺳﺘﺨﻼص اﳌﻌﻠﻮﻣﺎت )‪.(Debriefing‬‬

‫‪ ‬ﻗﺪم اﻟﺒﺎﺣﺜﺎن ‪ Priest & Grass‬ﳕﻮذﺟﺎً ﻟﻠﺘﻌﻠﻢ اﻟﺘﺠﺮﻳﱯ ﺑﺴﺘﺔ ﻣﺮاﺣﻞ ﻫﻲ]‪ :[560‬اﻻﺧﺘﺒﺎر )‪ ،(Experience‬اﺳﺘﻘﺮاء اﻟﻨﺘﺎﺋﺞ‬
‫)‪ ،(Induce‬اﻟﺘﻌﻤﻴﻢ )‪ ،(Generalize‬اﻟﺘﻄﺒﻴﻖ )‪ ،(Apply‬اﻟﺘﻘﻴﻴﻢ )‪.(Evaluate‬‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪204‬‬
‫‪24‬‬ ‫اﻟﻔﺼﻞ اﻟﺮاﺑﻊ | ‪Chapter 4‬‬

‫‪ 1-2-3-4-4-4‬ﳕﻮج ﻛﻮﻟﺐ ﰲ اﻟﺘﻌﻠﻢ اﻟﺘﺠﺮﻳﱯ )‪:(Kolb’s Experiential Learning Model‬‬

‫إن ﻧﻈﺮﻳﺔ ‪ Kolb‬ﰲ اﻟﺘﻌﻠﻢ اﻟﺘﺠﺮﻳﱯ ﺗﻌﺪ أﻓﻀﻞ اﻟﻨﻈﺮﻳﺎت ﰲ ﻫﺬا اﺠﻤﻟﺎل]‪ ،[570‬ﺣﻴﺚ ﻳﺘﻢ ﻋﺮض اﻟﺒﻴﺪاﻏﻮﺟﻴﺔ اﻟﺒﻨﺎﺋﻴﺔ ﻋﻠﻰ ﺷﻜﻞ إﻃﺎر‬
‫ﻣﻔﻬﻮﻣﻲ ﺑﻴﺪاﻏﻮﺟﻲ )‪ (Pedagogical Framework‬أو ﻋﻠﻰ ﺷﻜﻞ ﻣﺪرﺳﺔ ﻓﻜﺮﻳﺔ أﻛﺜﺮ ﻣﻦ ﻛﻮﻧﻪ ﻧﻈﺮﻳﺔ ﳎﺮدة]‪ .[548‬ﻣﻦ ﺟﺎﻧﺐ آﺧﺮ‬
‫ﺗﻘﺪم ﻧﻈﺮﻳﺔ ‪ Kolb‬آﻟﻴﺎت أﻛﺜﺮ وﺿﻮﺣﺎً ﻟﻠﺘﻌﻠﻴﻢ اﻟﺒﻨﺎﺋﻲ واﻟﺘﺼﻤﻴﻢ اﻟﺘﻌﻠﻴﻤﻲ )‪ (Learning Design‬وﺗﻌﺮض ﳕﻮذﺟﺎً ﻟﺘﻄﺒﻴﻘﻬﺎ اﻟﻌﻤﻠﻲ‪ ،‬ﻛﻤﺎ‬
‫ﺗﺆﻛﺪ ﻧﻈﺮﻳﺔ ‪ Kolb‬ﻋﻠﻰ دور اﻟﺘﺠﺮﺑﺔ ﰲ اﻟﺘﻌﻠﻢ ﻣﻮﺿﺤﺎً أن "اﻟﺘﺠﺮﺑﺔ ﻫﻲ ﻣﺼﺪر اﻟﺘﻌﻠﻢ واﻟﺘﻄﻮر"‪ ،‬وﻋﻠﻰ أﳘﻴﺔ ﺗﻄﻮﻳﺮ ارﺗﺒﺎط ﺑﲔ اﻟﻨﺸﺎﻃﺎت‬
‫اﻟﻨﻈﺮﻳﺔ وﺑﲔ اﻟﻌﺎﱂ اﳊﻘﻴﻘﻲ]‪ ،[545‬واﻟﺬي ﻳﺘﻮاﻓﻖ ﻣﻊ ﺗﺄﻛﻴﺪ اﻟﺒﻴﺪاﻏﻮﺟﻴﺔ اﻟﺒﻨﺎﺋﻴﺔ ﻋﻠﻰ اﻟﺘﻌﻠﻢ اﻟﻮاﻗﻌﻲ )‪.[558](Authentic Learning‬‬

‫ﻋﺮف ‪ Kolb‬اﻟﺘﻌﻠﻢ ﻋﻠﻰ أﻧﻪ "اﻟﻌﻤﻠﻴﺔ اﻟﱵ ﻳﺘﻢ ﻣﻦ ﺧﻼﳍﺎ ﺗﻜﻮﻳﻦ اﳌﻌﺮﻓﺔ ﻣﻦ ﺧﻼل ﺗﻨﺎﻗﻞ اﳋﱪات"]‪ ،[545‬واﻋﺘﻤﺪ ﻋﻠﻰ أﲝﺎث ﻛﻞ ﻣﻦ‬
‫)أﳘﻴﺔ ﻧﺸﺎط اﻟﺸﺨﺺ أﺛﻨﺎء ﻋﻤﻠﻴﺔ اﻟﺘﻌﻠﻢ(‪)[549]Piaget ،‬اﻟﺬﻛﺎء‬ ‫]‪[567‬‬
‫‪)[556]Dewey‬ﺿﺮورة ﺑﻨﺎء اﻟﺘﻌﻠﻢ ﻋﻠﻰ أﺳﺎس اﻟﺘﺠﺮﺑﺔ(‪Lewin ،‬‬
‫ﻫﻮ ﻧﺘﻴﺠﺔ اﻟﺘﻔﺎﻋﻞ ﺑﲔ اﻟﺸﺨﺺ واﻟﺒﻴﺌﺔ(‪ ،‬واﻗﱰح أن اﻟﺘﻌﻠﻢ اﻟﻔﻌﺎل ﳚﺐ أن ﳝﺮ ﺑﺄرﺑﻌﺔ أﻃﻮار‪:‬‬

‫‪ .A‬اﳋﱪات اﳌﻠﻤﻮﺳﺔ ”‪ :(Concrete Experience) “CE‬اﻟﺒﺤﺚ ﻋﻦ ﲡﺮﺑﺔ ﺟﺪﻳﺪة واﳋﻮض ﻓﻴﻬﺎ‪.‬‬

‫‪ .B‬اﳌﻼﺣﻈﺔ اﻟﺘﺄﻣﻠﻴﺔ ”‪ :(Reflective Observation) “RO‬ﻣﺮاﻗﺒﺔ وﻣﻼﺣﻈﺔ ﲡﺮﺑﺘﻚ اﳉﺪﻳﺪة‪.‬‬
‫‪ .C‬ﻔﺎﻫﻴﻢ اﺠﻤﻟﺮدة ”‪ :(Abstract Conceptualization) “AC‬اﻟﻮﺻﻮل ﻟﻨﻈﺮﻳﺎت ﺗﺸﺮح اﳌﻼﺣﻈﺎت اﻟﺘﺄﻣﻠﻴﺔ‪.‬‬
‫‪ .D‬اﻟﺘﺠﺮﻳﺐ اﻟﻔﻌﺎل ”‪ :(Active Experimentation) “AE‬اﺳﺘﺨﺪام اﻟﻨﻈﺮﻳﺎت ﰲ ﺣﻞ اﳌﺸﺎﻛﻞ واﲣﺎذ اﻟﻘﺮارات‪.‬‬

‫اﻟﺸﻜﻞ‪ 4-4‬ﳕﻮذج ‪ Kolb‬ﰲ اﻟﺘﻌﻠﻢ اﻟﺘﺠﺮﻳﱯ اﻟﺒﻨﺎﺋﻲ‬

‫‪205‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Engineering Education Methodologies‬‬ ‫ﻣﻨﻬﺠﻴﺎت اﻟﺘﻌﻠﻴﻢ اﳍﻨﺪﺳﻲ |‬

‫ﻃﺒﻘﺎً ﻟﻨﻈﺮﻳﺔ ‪ Kolb‬ﰲ اﻟﺘﻌﻠﻢ اﻟﺘﺠﺮﻳﱯ‪ ،‬ﻓﺎﻟﺘﻌﻠﻢ اﻷﻣﺜﻞ ﳛﺪث ﻋﻨﺪﻣﺎ ﻳﺘﻮﻓﺮ ﻟﻠﻤﺘﻌﻠﻢ ﺗﻮزان ﻣﻼﺋﻢ ﻟﻤﺮاﺣﻞ اﻟﺴﺎﺑﻘﺔ‪ ،‬وﻬﺑﺬﻩ اﳌﺮاﺣﻞ ﺗﺘﻢ ﻋﻤﻠﻴﺔ‬
‫ﺗﻜﻮﻳﻦ اﳌﻌﺮﻓﺔ ﻣﻦ ﺧﻼل ﻧﻘﻞ اﳋﱪات‪ ،‬وﻫﺬا ﻳﺘﻄﻠﺐ ﻣﻦ اﻷﻓﺮاد أوﻻً اﻛﺘﺸﺎف أو ﺗﺼﻮر أو إدراك اﳌﻌﺮﻓﺔ‪ ،‬وﺑﻌﺪﺋﺬ ﻳﻨﺒﻐﻲ ﺣﺪوث ﻣﺮﺣﻠﺔ اﻟﺒﻨﺎء‬
‫ﻹﻛﻤﺎل ﻋﻤﻠﻴﺔ اﻟﺘﻌﻠﻢ‪ .‬ﺗﺪﻋﻰ ﻋﻤﻠﻴﺔ دﻣﺞ اﳌﺮاﺣﻞ اﻷرﺑﻌﺔ اﻟﺴﺎﺑﻘﺔ ﺑﺪورة ‪ Kolb‬ﰲ اﻟﺘﻌﻠﻢ اﻟﺘﺠﺮﻳﱯ ) ‪Kolb’s Experiential Learning‬‬

‫‪ (Cycle‬واﳌﻮﺿﺤﺔ ﻋﻠﻰ اﻟﺸﻜﻞ‪.4-4‬‬

‫ﺗﻌﺘﻤﺪ ﻧﻈﺮﻳﺔ ﻛﻮﻟﺐ ذات اﻷﻃﻮار اﻷرﺑﻌﺔ ﳕﻮذﺟﺎً ﺑﺒﻌﺪﻳﻦ‪ :‬ﺑﻌﺪ إدراك اﳌﻌﺮﻓﺔ‪ ،‬وﺑﻌﺪ ﻧﻘﻞ اﳌﻌﺮﻓﺔ‪.‬‬

‫اﶈﻮر اﻟﻌﻤﻮدي ﳝﺜﻞ ﺑﻌﺪ إدراك اﳌﻌﺮﻓﺔ )‪ – (Knowledge-grasping‬ﻛﻴﻒ ﳓﺲ )‪ (Felling‬وﻧﻔﻜﺮ )‪ ،(Thinking‬واﻟﺬي ﻣﻦ ﺧﻼﻟﻪ‬
‫ﳝﻜﻦ ﲢﺼﻴﻞ اﳌﻌﺮﻓﺔ‪:‬‬

‫‪ ‬إﻣﺎ ﻋﱪ اﻹدراك )‪ :(Apprehension‬وﻫﻮ اﳊﺪ اﻷﻗﺼﻰ ﻟﻠﺘﺠﺮﺑﺔ اﳊﺴﻴﺔ‪ ،‬أي أ�ﺎ ﺗﻌﺘﻤﺪ ﻋﻠﻰ اﻷﺣﻜﺎم اﻟﺼﺎدرة ﻋﻦ اﻟﺸﻌﻮر‪،‬‬
‫ﻓﻘﺪ وﺟﺪ اﳌﺘﻌﻠﻤﻮن ﻋﻤﻮﻣﺎً أن اﻟﻄﺮق اﻟﻨﻈﺮﻳﺔ ﻏﲑ ﳎﺪﻳﺔ‪ ،‬وﻟﺬﻟﻚ ﻓﻬﻢ ﻳﻔﻀﻠﻮن ﻣﻌﺎﳉﺔ ﻛﻞ ﺣﺎﻟﺔ ﻋﻠﻰ اﻧﻔﺮاد‪ ،‬وﻳﺘﻌﻠﻤﻮن ﺑﺸﻜﻞ‬
‫أﻓﻀﻞ ﻣﻦ ﺧﻼل أﻣﺜﻠﺔ ﻣﻌﻴﻨﺔ‪ ،‬وذﻟﻚ ﻋﻦ ﻃﺮﻳﻖ اﻻﺗﺼﺎل ﻣﻊ اﻟﻨﻈﺎﺋﺮ وﻟﻴﺲ ﻋﻦ ﻃﺮﻳﻖ اﳌﺮاﺟﻊ‪ ،‬ﻓﺎﻟﻘﺮاءات اﻟﻨﻈﺮﻳﺔ ﻟﻴﺴﺖ ﳎﺪﻳﺔ‬
‫داﺋﻤﺎً‪ ،‬ﺑﻴﻨﻤﺎ اﻟﻌﻤﻣﻊ اﺠﻤﻟﻤﻮﻋﺔ واﻟﺘﻐﺬﻳﺔ اﻻﺳﱰﺟﺎﻋﻴﺔ ﻣﻦ اﻟﻨﻈﲑ ﺗﺆدي ﻏﺎﻟﺒﺎً إﱃ اﻟﻨﺠﺎح‪.‬‬

‫‪ ‬أو ﻋﱪ اﻟﻔﻬﻢ اﻟﺸﻤﻮﱄ )‪ :(Comprehension‬ﻮ اﳊﺪ اﻷﻗﺼﻰ ﻟﻠﻤﻔﺎﻫﻴﻢ اﺠﻤﻟﺮدة وﻛﻴﻒ أ�ﺎ ﺗﺘﻨﺎﺳﺐ ﻣﻊ ﲡﺎرﺑﻨﺎ اﳋﺎﺻﺔ‪،‬‬
‫وﳝﻴﻞ ﻫﺆﻻء اﻷﻓﺮاد ﻛﺜﲑاً ﻟﻠﺘﻜﻴﻒ ﻣﻊ اﻷﺷﻴﺎء واﻟﺮﻣﻮز ﰲ ﺣﲔ أن ﻟﺪﻳﻬﻢ َﻣﻴﻼً ﺿﻌﻴﻔﺎً ﳓﻮ اﻟﺘﻜﻴﻒ ﻣﻊ أﺷﺨﺎص آﺧﺮﻳﻦ‪ ،‬ﻓﻬﻢ‬
‫ﻳﺘﻌﻠﻤﻮن ﺑﺸﻜﻞ أﻓﻀﻞ ﻣﻦ ﺧﻼل اﳌﺮاﺟﻊ واﳊﺎﻻت اﻟﺘﻌﻠﻴﻤﻴﺔ ﻏﲑ اﻟﺸﺨﺼﻴﺔ واﻟﱵ ﺗﺆﻛﺪ ﻋﻠﻰ اﻟﻨﻈﺮﻳﺔ واﻟﺘﺤﻠﻴﻞ اﻟﺘﻨﻈﻴﻤﻲ‪ ،‬ﻛﻤﺎ‬
‫أ�ﻢ ﻗﻠﻴﻠﻮ اﻻﺳﺘﻔﺎدة ﻣﻦ ﻃﺮق اﻟﺘﻌﻠﻢ ﺑﺎﻻﻛﺘﺸﺎف ‪ -‬أي اﳌﻤﺎرﺳﺔ اﻟﻌﻤﻠﻴﺔ ﰒ اﻟﻨﻈﺮﻳﺔ ‪ -‬ﻏﲑ اﳌﻨﻈﻤﺔ ﻛﺎﻟﺘﻤﺎرﻳﻦ‪ ،‬وﺗﺴﺎﻋﺪ ﻛﻞ ﻣﻦ‬
‫دراﺳﺎت اﳊﺎﻟﺔ واﻟﻘﺮاءات اﻟﻨﻈﺮﻳﺔ وﲤﺎرﻳﻦ اﻟﺘﻔﻜﲑ اﻻﻧﻌﻜﺎﺳﻲ ﻫﺬا اﻟﻨﻮع ﻣﻦ اﳌﺘﻌﻠﻤﲔ‪.‬‬

‫اﶈﻮر اﻷﻓﻘﻲ ﳝﺜﻞ ﳏﻮر ﻧﻘﻞ أو ﺑﻨﺎء اﳌﻌﺮﻓﺔ )‪ – (Knowledge Transformation/Construction‬ﻛﻴﻒ ﻧﺘﺄﻣﻞ )‪(Watching‬‬
‫وﻛﻴﻒ ﻧﻔﻌﻞ )‪ ،(Doing‬واﻟﺬي ﻣﻦ ﺧﻼﻟﻪ ﻳﺘﻢ ﻧﻘﻞ أو ﺑﻨﺎء اﳌﻌﺮﻓﺔ‪:‬‬

‫‪ ‬إﻣﺎ ﻣﻦ ﺧﻼل اﻟﻌﺰم )‪ :(Intention‬وﻫﻮ اﳊﺪ اﻷﻗﺼﻰ ﻟﻠﻤﻼﺣﻈﺔ اﻟﺘﺄﻣﻠﻴﺔ وﻛﻴﻒ ﺳﺘﺆﺛﺮ ﻋﻠﻰ ﺑﻌﺾ ﻣﻈﺎﻫﺮ ﺣﻴﺎﺗﻨﺎ‪ ،‬وﻳﻌﺘﻤﺪ‬
‫ﻫﺆﻻء اﻷﻓﺮاد ﻛﺜﲑاً ﻋﻠﻰ اﳌﻼﺣﻈﺔ أﺛﻨﺎء إﺻﺪار اﻷﺣﻜﺎم‪ ،‬وﻫﻢ ﻳﻔﻀﻠﻮن اﳊﺎﻻت اﻟﺘﻌﻠﻴﻤﻴﺔ اﻟﱵ ﺗﺄﺧﺬ ﺷﻜﻞ اﶈﺎﺿﺮات‪ ،‬واﻟﱵ‬
‫ﺗﺴﻤﺢ ﻟﻠﻤﺮاﻗﺒﲔ اﳌﻮﺿﻮﻋﻴﲔ وﻏﲑ اﳌﺘﺤﻴﺰﻳﻦ ﺑﺄن ﻳﺄﺧﺬوا أدوارﻫﻢ‪ ،‬وﻳﺘﺼﻒ ﻫﺆﻻء اﻷﻓﺮاد ﺑﺄ�ﻢ اﻧﻄﻮاﺋﻴﻮن‪ ،‬ﻟﺬا ﻓﺈن اﶈﺎﺿﺮات‬
‫ﺗﺴﺎﻋﺪ ﻫﺆﻻء اﳌﺘﻌﻠﻤﲔ )ﻓﻬﻢ ﺑﺼﺮﻳﻮن وﲰﻌﻴﻮن(‪ ،‬وﳛﺘﺎج ﻫﺆﻻء اﳌﺘﻌﻠﻤﲔ ﻟﺘﻘﻴﻴﻢ أداﺋﻬﻢ وﻓﻘﺎً ﳌﻌﺎﻳﲑ ﺧﺎرﺟﻴﺔ‪.‬‬

‫‪ ‬أو ﻣﻦ ﺧﻼل اﻟﺘﻮﺳﻊ )‪ :(Extension‬وﻫﻮ اﻻﺧﺘﺒﺎر اﻟﻔﻌﺎل ﰲ ﺣﺎﻟﺔ ﺟﺪﻳﺪة وﻛﻴﻒ ﺗﻘﺪم ﻟﻨﺎ ﻫﺬﻩ اﳌﻌﻠﻮﻣﺎت ﻃﺮﻗﺎً ﺟﺪﻳﺪة ﻟﻠﻌﻤﻞ‬
‫ﺑﺎ‪ ،‬وﻳﺘﻌﻠﻢ ﻫﺆﻻء اﻷﻓﺮاد ﺑﺸﻜﻞ أﻓﻀﻞ ﻋﻨﺪ ﲤﻜﻨﻬﻢ ﻣﻦ اﻻﻧﺸﻐﺎل ﺑﺄﺷﻴﺎء ﻛﺎﳌﺸﺎرﻳﻊ أو اﳌﻨﺎﻗﺸﺎت ﰲ ﳎﻤﻮﻋﺔ‪ ،‬ﻓﻬﻢ ﻳﻜﺮﻫﻮن‬
‫اﳊﺎﻻت اﻟﺘﻌﻠﻴﻤﻴﺔ اﳋﺎﻣﻠﺔ ﻛﺎﶈﺎﺿﺮات‪ ،‬ﺣﻴﺚ ﳝﻴﻞ ﻫﺆﻻء اﻷﺷﺨﺎص ﻟﻴﻜﻮﻧﻮا ﻣﺘﺸﻮﻗﲔ‪ ،‬ﻓﻬﻢ ﻳﺮﻏﺒﻮن ﺑﺘﺠﺮﻳﺐ ﻛﻞ ﺷﻲء‪،‬‬
‫وﻳﺴﺎﻋﺪ ﻫﺆﻻء اﳌﺘﻌﻠﻤﲔ ﻛﻞ ﻣﻦ ﺣﻞ اﳌﺸﻜﻠﺔ واﳌﻨﺎﻗﺸﺎت ﺿﻤﻦ ﳎﻤﻮﻋﺔ ﺻﻐﲑة واﻟﺘﻐﺬﻳﺔ اﻻﺳﱰﺟﺎﻋﻴﺔ ﻣﻦ اﻟﻨﻈﲑ واﻟﻮاﺟﺒﺎت‬
‫اﻟﺸﺨﺼﻴﺔ‪ ،‬وﻳﺮﻏﺐ ﻫﺬا اﳌﺘﻌﻠﻢ ﺑﺮؤﻳﺔ ﻛﻞ ﺷﻲء وﲢﺪﻳﺪ ﻣﻌﺎﻳﲑﻩ اﳋﺎﺻﺔ ﺣﻮل اﻟﻌﻼﻗﺔ ﺑﺎﳌﻮﺿﻮع‪.‬‬
‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪206‬‬
‫‪24‬‬ ‫اﻟﻔﺼﻞ اﻟﺮاﺑﻊ | ‪Chapter 4‬‬

‫إن ﻓﺮﺿﻴﺔ ‪ Kolb‬ﺣﻮل اﻟﻄﺒﻴﻌﺔ ﺛﻨﺎﺋﻴﺔ اﻟﺒﻌﺪ ﻟﻌﻤﻠﻴﺔ ﺑﻨﺎء اﳌﻌﺮﻓﺔ ﺑﻨﻴﺖ اﻋﺘﻤﺎداً ﻋﻠﻰ اﻷدﻟﺔ اﳌﺘﻘﺎرﺑﺔ ﻣﻦ اﻟﻔﻠﺴﻔﺔ )‪ (Philosophy‬وﻋﻠﻢ‬
‫اﻟﻨﻔﺲ ‪ -‬اﻟﺴﻴﻜﻮﻟﻮﺟﻴﺎ )‪ (Psychology‬وﻋﻠﻢ اﻟﻮﻇﺎﺋﻒ ‪ -‬اﻟﻔﺴﻴﻮﻟﻮﺟﻴﺎ )‪ ،[545](Physiology‬وﻗﺒﻞ ﻫﺬﻩ اﻟﻔﺮﺿﻴﺔ ﱂ ﺗﺴﺘﻄﻊ اﻷﲝﺎث‬
‫اﻟﺘﻔﺮﻳﻖ ﺑﲔ ﻋﻤﻠﻴﺔ اﻛﺘﺴﺎب اﳌﻌﺮﻓﺔ وﻋﻤﻠﻴﺔ ﻧﻘﻞ اﳌﻌﺮﻓﺔ‪ ،‬وإﳕﺎ دﳎﺘﻬﻤﺎ ﰲ ﳏﻮر واﺣﺪ‪.‬‬

‫ﻟﻘﺪ ﻣﻴﺰ ‪ Kolb‬ﺑﲔ اﻹدراك )‪ (Apprehension‬واﻟﻔﻬﻢ اﻟﺸﻤﻮﱄ )‪ (Comprehension‬ﻛﻨﻤﻮذﺟﲔ ﻣﺴﺘﻘﻠﲔ ﻟﺘﺤﺼﻴﻞ اﳌﻌﺮﻓﺔ‪ ،‬وﺑﲔ‬
‫اﻟﻌﺰم )‪ (Intention‬واﻟﺘﻮﺳﻊ )‪ (Extension‬ﻛﻨﻤﻮذﺟﲔ ﻣﺴﺘﻘﻠﲔ ﻟﻨﻘﻞ اﳌﻌﺮﻓﺔ‪ ،‬ﺑﻞ إﻧﻪ ﺻﺮح ﺑﺄن ﻟﻠﻤﺮاﺣﻞ اﻷرﺑﻌﺔ اﻟﺴﺎﺑﻘﺔ ﻧﻔﺲ اﻟﺪور‬
‫اﳍﺎم ﺟﺪاً ﰲ اﳌﺴﺎﳘﺔ ﰲ ﻋﻤﻠﻴﺔ اﻟﺘﻌﻠﻢ‪ ،‬وﻫﺬا اﻟﺘﺼﺮﻳﺢ ﻳﻌﺎرض ﻣﺒﺪأ ‪ Piaget‬اﻟﺬي ﻳﻌﺘﱪ اﻟﻔﻬﻢ اﻟﺸﻤﻮﱄ واﻟﻌﺰم ﻋﻠﻰ أ�ﻤﺎ ﻋﺎﻣﻼن أﺳﺎﺳﻴﺎن‬
‫واﻟﺒﺎﻗﻲ ﻋﻮاﻣﻞ داﻋﻤﺔ]‪.[549‬‬

‫ﺑﺎﻟﻨﻈﺮ إﱃ ﻃﺮق اﻟﺘﻌﻠﻴﻢ اﻟﺘﻘﻠﻴﺪﻳﺔ اﻟﺴﺎﺋﺪة ﰲ اﻟﺘﻌﻠﻴﻢ اﻟﻌﺎﱄ‪ ،‬ﳝﻜﻦ أن ﻧﺮى ﺑﻮﺿﻮح أن ﳕﻮذج ‪ Piaget‬اﳋﺎص ﺑﺎﻟﻔﻬﻢ اﻟﺸﻤﻮﱄ‪-‬اﻟﻌﺰم‬
‫)‪ (Comprehension-Intention‬ﻫﻮ اﻷﻛﺜﺮ ﺷﻴﻮﻋﺎً‪ ،‬إذ أن ﻃﺮاﺋﻖ اﻟﺘﻌﻠﻴﻢ اﻟﺘﻘﻠﻴﺪﻳﺔ ﻻ ﺗﺰال ﺗﺮﻛﺰ ﻋﻠﻰ ﺗﻠﻘﲔ اﻟﻌﻠﻢ اﻟﻨﻈﺮي ﺿﻤﻦ‬
‫اﻟﺼﻔﻮف ﺑﺎﻟﺸﻜﻞ اﻟﺘﻘﻠﻴﺪي وﺗﺮﻛﺰ أﻳﻀﺎً ﻋﻠﻰ ﻧﺘﺎﺋﺞ ﻫﺬا اﻟﺘﻠﻘﲔ ﻣﻦ ﺧﻼل اﻻﻣﺘﺤﺎﻧﺎت اﻟﻜﺘﺎﺑﻴﺔ‪.‬‬

‫وﻋﻠﻰ اﻟﻌﻜﺲ ﻣﻦ ذﻟﻚ‪ ،‬ﺗﺆﻛﺪ ﻧﻈﺮﻳﺔ ‪ Kolb‬ﰲ اﻟﺘﻌﻠﻢ اﻟﺘﺠﺮﻳﱯ ﺑﺸﺪة ﻋﻠﻰ ﲣﺼﻴﺺ أوﻗﺎت ﻣﺘﻮازﻧﺔ ﺿﻤﻦ اﻟﺼﻒ ﻟﻜﻞ ﻃﻮر ﻣﻦ أﻃﻮار‬
‫ﻋﻤﻠﻴﺔ اﻟﺘﻌﻠﻢ‪ :‬اﻹدراك )‪ ،(Apprehension‬اﻟﻔﻬﻢ اﻟﺸﻤﻮﱄ )‪ ،(Comprehension‬اﻟﻌﺰم واﻟﺘﺼﻤﻴﻢ )‪ ،(Intention‬اﻟﺘﻮﺳﻊ‬
‫)‪.(Extension‬‬

‫إن ﻧﻈﺮﻳﺔ ‪ Kolb‬ﰲ اﻟﺘﻌﻠﻢ اﻟﺘﺠﺮﻳﱯ ﺗﻘﺪم إﻃﺎراً ﻧﻈﺮﻳﺎً ﳝﻜﻦ اﺳﺘﺨﺪاﻣﻪ ﻟﺘﺼﻤﻴﻢ اﺳﱰاﺗﻴﺠﻴﺎت ﺗﻌﻠﻢ وﺗﻌﻠﻴﻢ ﺗﺘﻼءم ﺑﺎﻟﺸﻜﻞ اﻷﻣﺜﻞ ﻣﻊ‬
‫ﻋﻤﻠﻴﺎت ﲢﺼﻴﻞ وﺗﻜﻮﻳﻦ اﳌﻌﺮﻓﺔ ﰲ اﻟﻌﻘﻞ اﻟﺒﺸﺮي – أي أن اﳌﺰج ﺑﲔ اﻟﻌﻨﺎﺻﺮ اﳌﺬﻛﻮرة ﺳﺎﺑﻘﺎً وإدﺧﺎﳍﺎ إﱃ اﻟﻌﻤﻠﻴﺔ اﻟﺘﻌﻠﻴﻤﻴﺔ ﻳﻌﻄﻴﻨﺎ‬
‫ﻣﺴﺘﻮﻳﺎت أﻓﻀﻞ ﻟﻠﺘﻌﻠﻢ‪.‬‬

‫ﺑﻨﺎءً ﻋﻠﻴﻪ‪ ،‬ﺳﻨﺴﺘﺨﺪم ﻧﻈﺮﻳﺔ ‪ Kolb‬ﰲ اﻟﺘﻌﻠﻢ اﻟﺘﺠﺮﻳﱯ ﻛﻨﻤﻮذج ﺗﻌﻠﻴﻤﻲ ﻳﺸﺮح ﺿﻌﻒ اﻟﻨﺘﺎﺋﺞ اﻟﱵ ﻳﻘﺪﻣﻬﺎ اﻟﺘﻌﻠﻴﻢ اﻟﻘﺎﺋﻢ ﺣﺎﻟﻴﺎً‪ ،‬وﻧﺴﺘﻔﻴﺪ ﻣﻨﻪ‬
‫أﻳﻀﺎً ﰲ ﺗﻄﻮﻳﺮ ﳕﻮذج ﺗﻌﻠﻴﻤﻲ ﺟﺪﻳﺪ وﻣﺒﺘﻜﺮ ﻻﺣﻘﺎً ﰲ ﻫﺬا اﻟﻔﺼﻞ‪.‬‬

‫دور اﻟﻄﺎﻟﺐ‬ ‫دور اﻟﻤﻌﻠّﻢ‬ ‫اﻟﻤﺮﺣﻠﺔ‬

‫ﻳﻌﻴﺶ اﻟﻄﺎﻟﺐ اﳌﻮﻗﻒ وﳝﺎرس اﻟﻨﺸﺎط اﻟﺘﻌﻠﻴﻤﻲ اﳌﺼﻤﻢ‬ ‫ﻳﺘﻀﻤﻦ ﻧﺸﺎﻃﺎً ﳝﺎرﺳﻪ اﻟﻄﺎﻟﺐ‬
‫ﺗﺼﻤﻴﻢ ﻣﻮﻗﻒ ﺗﻌﻠﻴﻤﻲ ّ‬ ‫اﳊﺴﻴﺔ‬
‫اﻟﺘﺠﺮﺑﺔ ّ‬
‫ﺗﺼﻤﻴﻢ ورﻗﺔ ﻋﻤﻞ أو وﺳﻴﻠﺔ ﺗﺴﺎﻋﺪ اﻟﻄﺎﻟﺐ ﻋﻠﻰ ﺗﺪوﻳﻦ‬
‫ﻳﺪون ﻣﻼﺣﻈﺎﺗﻪ‪ ،‬وﻳﻨﻈّﻢ اﻟﺒﻴﺎﻧﺎت اﻟﱵ ﳛﺼﻞ ﻋﻠﻴﻬﺎ‪.‬‬
‫ّ‬ ‫اﳌﺘﺄﻣﻠﺔ‬
‫اﳌﻼﺣﻈﺔ ّ‬
‫ﻣﻼﺣﻈﺘﻪ ﺑﺸﻜﻞ ﻋﻠﻤﻲ‪.‬‬

‫ﻳﻠﺨﺺ اﳌﻌﺮﻓﺔ اﳉﺪﻳﺪة وﻳﺮﺑﻂ ﺑﲔ اﳌﻔﺎﻫﻴﻢ اﻟﺴﺎﺑﻘﺔ واﳌﻔﺎﻫﻴﻢ‬ ‫ّ‬ ‫وﻣﻴﺴﺮ‪ ،‬وﻳﺴﺎﻋﺪ اﻟﻄﺎﻟﺐ ﻋﻠﻰ رﺑﻂ ﻣﻼﺣﻈﺎﺗﻪ‬
‫وﻣﻮﺟﻪ‪ّ ،‬‬‫ﻣﺮﺷﺪ‪ّ ،‬‬ ‫ﻔﺎﻫﻴﻢ اﺠﻤﻟﺮدة‬
‫ّ‬
‫اﳉﺪﻳﺪة اﻟﱵ ﺗﻌﻠّﻤﻬﺎ‪ ،‬وﳛﺎول ﺻﻴﺎﻏﺔ ﻣﺒﺪأ أو ﻧﻈﺮﻳﺔ‪.‬‬ ‫ﺑﻴﺎﻧﺎﺗﻪ ﺑﺎﳋﱪات اﻟﺴﺎﺑﻘﺔ اﻟﱵ ﻣﺮّ ﻬﺑﺎ‪.‬‬

‫ﺗﻮﺻﻞ‬
‫ﻳﻌﻤﻢ اﻟﻨﺘﺎﺋﺞ اﻟﱵ ّ‬
‫وﻳﻘﻮم أﻋﻤﺎل اﻟﻄﻼّب وﻧﺘﺎﺋﺠﻬﻢ‪ ،‬ﻳﻄﺒّﻖ ﻣﺎ ﺗﻌﻠّﻤﻪ ﰲ ﻣﻮاﻗﻒ ﺟﺪﻳﺪة‪ ،‬وﻣﻦ ﰒّ ّ‬
‫وﻣﻴﺴﺮ‪ّ ،‬‬
‫ّ‬ ‫وﻣﻮﺟﻪ‪،‬‬
‫ّ‬ ‫ﻣﺮﺷﺪ‪،‬‬
‫اﻟﺘﺠﺮﻳﺐ اﻟﻨﺸﻂ‬
‫إﻟﻴﻬﺎ‪.‬‬ ‫وﻳﺰودﻫﻢ ﺑﺎﻟﺘﻐﺬﻳﺔ اﻻﺳﱰﺟﺎﻋﻴﺔ )‪.(Feedback‬‬
‫ّ‬

‫اﳉﺪول‪ 2-4‬دور ﻛﻞ ﻣﻦ اﳌﻌﻠّﻢ اﻟﻄﺎﻟﺐ ﰲ دورة ‪ Kolb‬ﻟﻠﺘﻌﻠّﻢ اﻟﺘﺠﺮﻳﱯ‬

‫‪207‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Engineering Education Methodologies‬‬ ‫ﻣﻨﻬﺠﻴﺎت اﻟﺘﻌﻠﻴﻢ اﳍﻨﺪﺳﻲ |‬

‫‪ 2-2-3-4-4-4‬ﳕﻮذج ﻛﻮﻟﺐ ﰲ اﻟﺘﻌﻠﻴﻢ اﳍﻨﺪﺳﻲ )‪:(Kolb’s Theory in Engineering Education‬‬

‫إن اﻻﺧﺘﺒﺎر واﻟﺘﺠﺮﻳﺐ ﻳﻌﺘﱪان ﻋﻨﺼﺮاً ﻫﺎﻣﺎً ﺟﺪاً ﰲ اﻻﺧﺘﺼﺎﺻﺎت اﳍﻨﺪﺳﻴﺔ‪ ،‬وﻣﻊ ذﻟﻚ ﻓﺈﻧﻪ ﰲ أﻏﻠﺐ اﳊﺎﻻت ﻳﺘﻢ اﻻﻋﺘﻤﺎد ﻋﻠﻰ ﻣﺒﺎدئ‬
‫رﻳﺎﺿﻴﺔ وﻓﻴﺰﻳﺎﺋﻴﺔ ﻣﻌﻘﺪة‪ ،‬واﻟﱵ ﲢﺘﺎج إﱃ اﻟﺘﻜﺮار ﻋﺪداً ﻣﻦ اﳌﺮات ﻟﺘﺤﻘﻴﻖ اﻟﻔﻬﻢ‪.‬‬

‫إن اﻟﻄﺒﻴﻌﺔ اﻟﺪورﻳﺔ ﻟﻨﻤﻮذج ‪ Kolb‬ﰲ اﻟﺘﻌﻠﻢ اﻟﺘﺠﺮﻳﱯ‪ ،‬وﺗﺄﻛﻴﺪﻩ ﻋﻠﻰ ﻃﻮرﻳﻦ ﻣﻦ أﻃﻮار ﲢﻘﻴﻖ اﳋﱪة واﻟﻠﺬان ﳘﺎ‪ :‬ﻃﻮر اﻟﺘﺠﺮﺑﺔ اﳌﻠﻤﻮﺳﺔ‬
‫”‪ ،“CE‬وﻃﻮر اﻟﺘﺠﺮﻳﺐ اﻟﻔﻌﺎل ”‪ ،“AE‬ﺟﻌﻠﺖ ﻣﻨﻪ ﻣﻨﺎﺳﺒﺎً ﺑﺸﻜﻞ ﻛﺒﲑ ﻟﻠﺘﻌﻠﻴﻢ اﳍﻨﺪﺳﻲ]‪ ،[571,572‬وﺑﺬﻟﻚ ﻳﺸﲑ ‪ [494]Wankat‬إﱃ أﻧﻪ‬
‫ﰲ اﳌﻘﺎﻻت اﳌﻨﺸﻮرة ﰲ ﳎﻼت أﲝﺎث اﻟﺘﻌﻠﻴﻢ اﳍﻨﺪﺳﻲ؛ ﻣﻦ اﻷﲝﺎث اﳍﺎﻣﺔ اﳌﺘﻌﻠﻘﺔ ﺑﺎﻟﺘﻌﻠﻴﻢ‬ ‫]‪[545‬‬
‫ﻛﺜﲑاً ﻣﺎ ﻳﺘﻢ اﻻﺳﺘﺸﻬﺎد ﺑﻨﻈﺮﻳﺔ ‪Kolb‬‬

‫اﳍﻨﺪﺳﻲ واﻟﱵ أﺟﺮﻳﺖ ﻣﺆﺧﺮاً واﺳﺘﺨﺪﻣﺖ ﻧﻈﺮﻳﺔ ‪ Kolb‬ﳝﻜﻦ أن ﳒﺪ اﻷﲝﺎث]‪ ،[572-578‬وﰲ ﻣﻌﻈﻢ اﳊﺎﻻت ﻛﺎﻧﺖ ﻧﺘﺎﺋﺞ اﻟﺒﺤﺚ إﳚﺎﺑﻴﺔ‪.‬‬

‫ﻣﺰاﻳﺎ دﻣﺞ اﻟﺘﺠﺎرب اﻟﻌﻤﻠﻴﺔ ﺑﺎﻟﺘﻌﻠﻴﻢ اﻟﻨﻈﺮي ﺿﻤﻦ‬ ‫]‪[573‬‬

‫‪ ‬ﻓﺒﺎﻻﻋﺘﻤﺎد ﻋﻠﻰ ﻧﻈﺮﻳﺔ ‪ Kolb‬ﻗﺪم اﻟﺒﺎﺣﺜﺎن ‪Moor & Piergiovanni‬‬

‫اﶈﺎﺿﺮات اﻟﻨﻈﺮﻳﺔ )‪.(Experiments in the Classroom‬‬

‫‪ ‬وأوﺟﺪ ‪ [574]Kamis & Topi‬ﻃﺮﻳﻘﺔ ﺗﻌﺘﻤﺪ ﻋﻠﻰ ﻧﻈﺮﻳﺔ ‪ Kolb‬ﰲ ﺣﻞ اﳌﺴﺎﺋﻞ واﳌﺸﺎﻛﻞ وأوﺿﺤﺎ ﺑﺄ�ﺎ ﻓﻌﺎﻟﺔ‪.‬‬

‫‪ ‬أﻣﺎ ‪ [572]Bender‬ﻓﺸﺮح اﻟﺪور اﻷﺳﺎﺳﻲ ﻟﻨﻈﺮﻳﺔ ‪ Kolb‬ﰲ إﻋﺎدة ﺻﻴﺎﻏﺔ اﻷﺳﺎﻟﻴﺐ اﻟﺘﻌﻠﻴﻤﻴﺔ ﰲ ﻗﺴﻢ اﻟﺘﺼﻤﻴﻢ اﳍﻨﺪﺳﻲ اﻟﺘﺎﺑﻊ ﳉﺎﻣﻌﺔ‬
‫ﺑﺮﻟﲔ اﻟﺘﻘﻨﻴﺔ )‪ (Technical University of Berlin‬وﺳﻠﻂ اﻟﻀﻮء ﻋﻠﻰ أﳘﻴﺔ أﺧﺬ اﻷﺑﻌﺎد اﻷرﺑﻌﺔ ﻟﻠﻌﻤﻠﻴﺔ اﻟﺘﻌﻠﻴﻤﻴﺔ ﻟﻨﻈﺮﻳﺔ ‪Kolb‬‬

‫ﺑﻌﲔ اﻻﻋﺘﺒﺎر أﺛﻨﺎء وﺿﻊ وﲢﻀﲑ اﶈﺎﺿﺮات‪.‬‬

‫ﺑﺈﻋﺎدة ﺑﻨﺎء ﲬﺴﺔ ﻣﻘﺮرات ﰲ اﻟﻌﻠﻮم اﳍﻨﺪﺳﻴﺔ اﻷﺳﺎﺳﻴﺔ واﺳﺘﺨﺪﻣﻮا ﻧﻈﺮﻳﺔ ‪ Kolb‬ﻛﺨﻠﻔﻴﺔ ﺑﻴﺪاﻏﻮﺟﻴﺔ‬ ‫]‪[575‬‬
‫‪ ‬ﻛﻤﺎ ﻗﺎم ‪Lagoudas‬‬

‫ﻟﻌﻤﻠﻴﺔ إﻋﺎدة اﻟﺒﻨﺎء‪ ،‬وﻗﺪ اﻋﺘﻤﺪوا ﻋﻠﻰ ﺑﺮاﻣﺞ اﻟﻜﻮﻣﺒﻴﻮﺗﺮ وﻋﻤﻠﻴﺎت اﶈﺎﻛﺎة ﻟﺘﻄﺒﻴﻖ اﻟﻨﻈﺮﻳﺔ‪.‬‬

‫‪ ‬أﻣﺎ ‪ Plett‬ﻓﺄﻋﺎدوا ﺗﺼﻤﻴﻢ ﺛﻼﺛﺔ ﻣﻘﺮرات ﻫﻨﺪﺳﻴﺔ ﺑﻨﺎء ﻋﻠﻰ ﻧﻈﺮﻳﺎت ‪ Kolb‬وﻋﻠﻰ ﻧﻈﺎم اﻟـ‪ 4-MAT‬وﻛﺎن اﻟﺘﺼﻤﻴﻢ ﻧﺎﺟﺤﺎً‬
‫]‪[579‬‬ ‫]‪[576‬‬

‫ﳑﺎ أدى إﱃ ﻣﻨﺤﻪ درﺟﺔ اﻻﻣﺘﻴﺎز ﰲ ﺗﺼﻤﻴﻢ اﳌﻨﺎﻫﺞ اﻟﺪراﺳﻴﺔ‪.‬‬

‫ﻧﻈﺮﻳﺔ ‪ Kolb‬أﻳﻀﺎً ﻛﺄﺳﺎس ﺗﺮﺑﻮي ﻟﺘﺼﻤﻴﻢ اﻟﺘﺠﺎرب اﻟﺘﻌﻠﻴﻤﻴﺔ ﻟﻠﻄﻼب‪ ،‬وﰲ أﺣﺪ اﻟﻨﺘﺎﺋﺞ اﻷﺳﺎﺳﻴﺔ ﰲ‬ ‫]‪[577‬‬
‫‪ ‬واﺳﺘﺨﺪم ‪David‬‬

‫اﻟﺪراﺳﺔ وﺟﺪوا أن إﻋﻄﺎء اﻟﺘﺠﺎرب اﻟﺘﻌﻠﻴﻤﻴﺔ ﻟﻠﻄﻼب ﺑﺸﻜﻞ ﻣﺘﻮازن اﻋﺘﻤﺎداً ﻋﻠﻰ اﳌﺮاﺣﻞ اﻷرﺑﻌﺔ ﻟﻨﻈﺮﻳﺔ ‪ Kolb‬أدى إﱃ ﺗﻌﻠﻴﻢ أﻋﻤﻖ‬
‫واﺣﺘﻔﺎظ أﻃﻮل ﺑﺎﳌﻌﻠﻮﻣﺎت ﻋﻨﺪ اﻟﻄﻼب‪.‬‬

‫‪ ‬وﻗﺎم ‪ [578]Stice‬أﻳﻀﺎً ﺑﻮﺿﻊ ﻃﺮاﺋﻖ ﺗﻌﻠﻴﻤﻴﺔ ﺿﻤﻦ اﻟﺼﻒ ﺗﺘﻼءم ﻣﻊ اﳌﺮاﺣﻞ اﻷرﺑﻌﺔ ﻟﻨﻈﺮﻳﺔ ‪ Kolb‬ﻟﺘﺤﺴﲔ ﻋﻤﻠﻴﺔ اﻟﺘﻌﻠﻢ ﻟﺪى ﻃﻼب‬
‫اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ‪.‬‬

‫‪ 3-2-3-4-4-4‬أﳕﺎط اﻟﺘﻌﻠﻢ اﻷﺳﺎﺳﻴﺔ ﻟﻨﻈﺮﻳﺔ ‪:(Kolb’s Learning Styles) Kolb‬‬

‫ﻳﺴﺘﺨﺪم ﻋﻠﻤﺎء اﻟﻨﻔﺲ اﻟﱰﺑﻮي ﻣﻔﻬﻮم أﺳﻠﻮب أو ﳕﻂ اﻟﺘﻌﻠﻢ ﻟﻮﺻﻒ اﻟﻌﻤﻠﻴﺎت اﻟﻮﺳﻴﻄﻴﺔ اﳌﺘﻨﻮﻋﺔ اﻟﱵ ﻳﺴﺘﺨﺪﻣﻬﺎ اﳌﺘﻌﻠﻢ أﺛﻨﺎء ﺗﻔﺎﻋﻠﻪ ﻣﻊ‬
‫ﻣﻮاﻗﻒ اﻟﺘﻌﻠﻢ‪ ،‬واﻟﱵ ﺗﻮﺻﻠﻪ ﰲ اﻟﻨﻬﺎﻳﺔ إﱄ ﺗﻄﻮﻳﺮ ﺧﱪات ﺗﻌﻠﻤﻴﺔ ﺟﺪﻳﺪة ﺗﻀﺎف إﱄ ﳐﺰون اﳌﺘﻌﻠﻢ اﳌﻌﺮﰲ‪ ،‬وﻫﺬا ﻳﺸﲑ إﱄ أن أﺳﻠﻮب اﻟﺘﻌﻠﻢ‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪208‬‬
‫‪24‬‬ ‫اﻟﻔﺼﻞ اﻟﺮاﺑﻊ | ‪Chapter 4‬‬

‫ﻳﻌﺘﱪ وﺻﻔﺎً ﻟﻠﻌﻤﻠﻴﺎت اﻟﺘﻜﻴﻔﻴﺔ اﳌﻨﺎﺳﺒﺔ واﻟﱵ ﲡﻌﻞ ﻣﻦ اﻟﺮد ﻣﺴﺘﺠﻴﺒﺎً ﳌﺜﲑات اﻟﺒﻴﺌﺔ اﳌﺘﻨﻮﻋﺔ ﲟﺎ ﻳﺘﻼءم ﻣﻊ ﺧﺼﺎﺋﺼﻪ اﻻﻧﻔﻌﺎﻟﻴﺔ واﻻﺟﺘﻤﺎﻋﻴﺔ‬
‫واﳉﺴﻤﻴﺔ]‪.[587‬‬

‫ﺑﺸﻜﻞ ﻋﺎم ﺘﻌﻠﻢ اﻷﻓﺮاد وﻓﻘﺎً ﻟﺘﻔﻀﻴﻼﻬﺗﻢ وﻃﺮﻗﻬﻢ اﳋﺎﺻﺔ‪ ،‬وﻋﻠﻢ اﻟﺘﻌﻠﻴﻢ اﻟﺒﻨﺎﺋﻲ ﻳﻘﺮ ﺑﺎﻻﺧﺘﻼﻓﺎت اﳌﻮﺟﻮدة ﺑﲔ اﳌﺘﻌﻠﻤﲔ‪ ،‬وﻳﺆﻛﺪ ﻋﻠﻰ أﳘﻴﺔ‬
‫أﺧﺬ ﻫﺬﻩ اﻻﺧﺘﻼﻓﺎت ﺑﻌﲔ اﻻﻋﺘﺒﺎر ﻋﻨﺪ ﺗﺼﻤﻴﻢ اﳌﻨﺎﻫﺞ واﻟﻨﺸﺎﻃﺎت اﻟﺘﻌﻠﻴﻤﻴﺔ‪.‬‬

‫ﰲ ﺿﻮء ﻧﻈﺮﻳﺔ ‪ Kolb‬اﻟﱵ ﻧﺎﻗﺸﻨﺎﻫﺎ ﺳﺎﺑﻘﺎً ﻟﺪﻳﻨﺎ ﻃﺮﻳﻘﺘﲔ ﻟﺘﺤﺼﻴﻞ أو اﻛﺘﺴﺎب اﳌﻌﺮﻓﺔ‪ :‬اﻹدراك )‪ ،(Apprehension‬اﻟﻔﻬﻢ اﻟﺸﻤﻮﱄ‬
‫)‪ ،(Comprehension‬وﻃﺮﻳﻘﺘﲔ أﻳﻀﺎً ﻟﻨﻘﻞ اﳌﻌﺮﻓﺔ‪ :‬اﻟﻌﺰم )‪ ،(Intention‬اﻟﺘﻮﺳﻊ )‪ ،(Extension‬وﳍﺬا ﳒﺪ أن اﻷﻓﺮاد ﳝﻴﻠﻮن إﱃ‬
‫اﻛﺘﺴﺎب اﳌﻌﺮﻓﺔ وﻓﻘﺎً ﻟﺘﻮازﻧﺎت ﳐﺘﻠﻔﺔ ﺿﻤﻦ اﶈﻮر اﳌﻤﺜﻞ ﻟﻠﺘﺤﺼﻴﻞ اﳌﻌﺮﰲ )‪ ،(Prehension‬وﺑﺎﳌﺜﻞ أﻳﻀﺎً ﻳﻨﺰﻋﻮن إﱃ ﻧﻘﻞ اﳌﻌﺮﻓﺔ ﺑﺘﻮازﻧﺎت‬
‫ﳐﺘﻠﻔﺔ ﻣﻦ اﻟﻌﺰم )‪ (Intention‬واﻟﺘﻮﺳﻊ )‪.(Extension‬‬

‫ﻟﻘﺪ وﺟﺪ ‪ Kolb‬أن آﻟﻴﺔ اﳉﻤﻊ ﻣﺎ ﺑﲔ اﻟﻄﺮﻳﻘﺔ اﻟﱵ ﻳﺪرك ﺑﺎ اﻟﻨﺎس واﻟﻄﺮﻳﻘﺔ اﻟﱵ ﻳﻌﺎﳉﻮن ﺑﺎ ﻫﻲ اﻟﱵ ّ‬
‫ﺗﻜﻮن اﻟﺸﻜﻞ اﳌﺘﻮازن اﻷﻣﺜﻞ ﻟﻨﻤﻂ‬
‫اﻟﺘﻌﻠﻢ‪ ،‬ﻓﻌﻠﻰ ﺳﺒﻴﻞ اﳌﺜﺎل‪ :‬ﻗﺪ ﺗﺒﺪأ دورة اﻟﺘﻌﻠﻢ ﺑﺎﻻﻧﺸﻐﺎل اﻟﺸﺨﺼﻲ ﻟﻠﻤﺘﻌﻠﻢ ﺑﺎﻟﺘﺠﺎرب اﳌﺎدﻳﺔ‪ ،‬ﰒ ﻳﺮاﻗﺐ اﳌﺘﻌﻠﻢ ﻫﺬﻩ اﻟﺘﺠﺮﺑﺔ ﺑﺎﺣﺜﺎً ﻋﻦ‬
‫اﳌﻌﲎ‪ ،‬وﻣﻦ ﰒ ﻳﻄﺒﻖ اﳌﺘﻌﻠﻢ ﻫﺬﻩ اﻟﻨﺘﻴﺠﺔ ﻣﻊ ﻣﺸﻜﻼت أﺧﺮى ﺸﺎﻬﺑﺔ واﻟﱵ ﺗﻨﺘﻬﻲ ﺑﺘﺠﺎرب ﻣﺎدﻳﺔ ﺟﺪﻳﺪة‪ ،‬وﻗﺪ ﺗﺒﺪأ دورة اﻟﺘﻌﻠﻢ ﻣﻦ ﺟﺪﻳﺪ‬
‫ﺑﺘﺠﺎرب ﺟﺪﻳﺪة وﳐﺘﻠﻔﺔ‪ ،‬ورﻏﻢ أن ‪ Kolb‬ﻗﺪ ﻓﻜﺮ ﺑﺬﻩ اﻷﳕﺎط ﻋﻠﻰ أ�ﺎ ﺳﻠﺴﻠﺔ ﻣﺘﺼﻠﺔ ﳝﺮ ﺑﺎ اﻟﺸﺨﺺ ﻣﻊ اﻟﻮﻗﺖ ﺧﻼل اﻟﺘﻌﻠﻢ‪ ،‬إﻻ أن‬
‫ﻫﻨﺎك أﺷﺨﺎﺻﺎً ﻳﻔﻀﻠﻮن وﻳﻌﺘﻤﺪون ﳕﻄﺎً واﺣﺪاً دون اﻟﺒﻘﻴﺔ‪.‬‬

‫وﻋﻠﻴﻪ ﻳﻌﺮف ‪ Kolb‬أﺳﻠﻮب اﻟﺘﻌﻠﻢ ﺑﺄﻧﻪ اﻟﻄﺮﻳﻘﺔ اﻟﱵ ﻳﺴﺘﺨﺪﻣﻬﺎ اﻟﻄﺎﻟﺐ ﰲ إدراك وﻣﻌﺎﳉﺔ اﳌﻌﻠﻮﻣﺎت أﺛﻨﺎء ﻋﻤﻠﻴﺔ اﻟﺘﻌﻠﻢ‪ ،‬وﻳﻘﺴﻤﻬﺎ إﱄ‬
‫أرﺑﻌﺔ أﳕﺎط]‪:[545, 584-586‬‬

‫‪ -‬ﳕﻂ اﻟﺘﻌﻠﻢ اﻟﺘﺒﺎﻋﺪي )‪ :(Divergent Learning Style‬وﻫﻮ اﻛﺘﺴﺎب اﳌﻌﻠﻮﻣﺔ ﻣﻦ ﺧﻼل اﻹدراك واﻟﻔﻬﻢ )‪ (CE‬وﲢﻮﻳﻠﻬﺎ إﱃ‬
‫ﻣﻌﺮﻓﺔ ﻣﻦ ﺧﻼل اﻟﻌﺰم )‪ – (RO‬أي ﻳﻀﻢ ﺧﻄﻮات اﻟﺘﻌﻠﻢ ﻣﻦ اﳋﱪات اﳌﻠﻤﻮﺳﺔ واﳌﻼﺣﻈﺔ اﻟﺘﺄﻣﻠﻴﺔ‪ .‬ﻳﻌﺘﱪ ﻫﺆﻻء اﻷﺷﺨﺎص‬
‫"ﻣﺘﺄﻣﻠﻮن" وﻟﺪﻳﻬﻢ اﻟﻘﺪرة ﻋﻠﻰ ﻳﺔ اﳊﺎﻻت اﺠﻤﻟﺮدة ﻣﻦ زواﻳﺎ ﻧﻈﺮ ﳐﺘﻠﻔﺔ وﻛﺜﲑة‪ ،‬ﻓﻬﻢ ﻳﻬﺘﻤﻮن ﺑﺎﻛﺘﺸﺎف ﺳﺒﺐ اﳊﺎﻟﺔ "ﳌﺎذا؟"‪،‬‬
‫اﻗﱰاﻬﺑﻢ ﻣﻦ أي ﺣﺎﻟﺔ ﻳﻜﻮن ﻟﻠﻤﺮاﻗﺒﺔ أﻛﺜﺮ ﻣﻦ اﻟﺘﻄﺒﻴﻖ‪ ،‬وﻳﻔﻀﻠﻮن أن ﻳﺄﺧﺬوا اﳌﻌﻠﻮﻣﺎت اﻟﱵ ﺗﻘﺪم إﻟﻴﻬﻢ ﺑﻄﺮﻳﻘﺔ ﺗﻔﺼﻴﻠﻴﺔ ﺗﻨﻈﻴﻤﻴﺔ‬
‫وﺑﺄﺳﻠﻮب ﻣﻨﻄﻘﻲ‪ ،‬ﺬﻟﻚ ﻫﻢ ﲝﺎﺟﺔ ﻟﻠﻮﻗﺖ ﻣﻦ أﺟﻞ اﻟﺘﻔﻜﲑ ﺑﺎﳌﻮﺿﻮع‪ ،‬وﺗﻜﻤﻦ ﻧﻘﺎط ﻗﻮﻬﺗﻢ ﺑﺎﻟﻘﺪرة ﻋﻠﻰ اﻟﺘﺨﻴﻞ‪ ،‬وﺗﺘﻀﻤﻦ‬
‫اﻟﻄﺮق اﻟﺘﻌﻠﻴﻤﻴﺔ ﻟﻠﻨﻤﻂ اﻟﺘﻜﻴﻔﻲ‪ :‬ﻃﺮﻳﻘﺔ اﶈﺎﺿﺮة اﻟﱵ ﺗﺮﻛﺰ ﻋﻠﻰ أﺷﻴﺎء ﻣﻌﻴﻨﺔ ﻛﻨﻘﺎط اﻟﻘﻮة واﻟﻀﻌﻒ واﺳﺘﺨﺪاﻣﺎت اﻟﻨﻈﺎم‪ ،‬اﳊﺎﻻت‬
‫اﻟﱵ ﺗﺴﺘﺪﻋﻲ ﺗﻮﻟﻴﺪ اﻟﻜﺜﲑ ﻣﻦ اﻷﻓﻜﺎر ﻣﺜﻞ ﺟﻠﺴﺎت اﻟﻌﺼﻒ اﻟﺬﻫﲏ‪ ،‬اﻟﻌﻤﻞ ﰲ ﳎﻤﻮﻋﺔ ﳉﻤﻊ اﳌﻌﻠﻮﻣﺎت‪.‬‬

‫ﻳﻌﺘﱪ اﳌﺘﻌﻠّﻤﻮن ﻣﻦ اﻟﻨﻤﻂ اﻟﺘﺒﺎﻋﺪي‪:‬‬

‫ﻣﺘﺄﻣﻠﻮن‪ ،‬ﳝﻴﻠﻮن ﻟﻠﺘﻌﻠّﻢ ﻋﻦ ﻃﺮﻳﻖ اﻟﺘﻔﻜﲑ واﻟﺘﺨﻴّﻞ‪.‬‬
‫‪ّ ‬‬
‫وﺣﺴﺎﺳﻮن‪.‬‬‫‪ ‬ﻋﺎﻃﻔﻴﻮن ّ‬
‫‪ ‬ﻣﺒﺪﻋﻮن وﳝﻴﻠﻮن ﻟﻠﻔﻨﻮن‪.‬‬
‫‪ ‬ﳍﻢ ﻗﺪرة ﻋﻠﻰ اﻟﻨﻈﺮ إﱃ اﻷﻣﻮر ﻣﻦ زواﻳﺎ ﳐﺘﻠﻔﺔ‪.‬‬

‫‪209‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Engineering Education Methodologies‬‬ ‫ﻣﻨﻬﺠﻴﺎت اﻟﺘﻌﻠﻴﻢ اﳍﻨﺪﺳﻲ |‬

‫ﺣﻞ اﳌﺸﻜﻼت‪.‬‬
‫‪ ‬ﳝﻴﻠﻮن ﳉﻤﻊ اﳌﻌﻠﻮﻣﺎت ﺑﺄﻧﻔﺴﻬﻢ واﺳﺘﺨﺪام اﳋﻴﺎل ﰲ ّ‬
‫‪ ‬ﻗﺎدرﻳﻦ ﻋﻠﻰ ﺗﻮﻟﻴﺪ اﻷﻓﻜﺎر وﻣﻨﺎﻗﺸﺘﻬﺎ‪.‬‬
‫‪ ‬ﻳﻔﻀﻠّﻮن اﻟﻌﻤﻞ ﰲ ﳎﻤﻮﻋﺎت وﳛﺮﺻﻮن ﻋﻠﻰ اﻟﺘﻐﺬﻳﺔ اﻟﺮاﺟﻌﺔ‪.‬‬

‫‪ -‬ﳕﻂ اﻟﺘﻌﻠﻢ اﻟﺘﻜﻴﻔﻲ )‪ :(Accommodative Learning Style‬وﻫﻮ اﻛﺘﺴﺎب اﳌﻌﻠﻮﻣﺔ ﻣﻦ ﺧﻼل اﻹدراك أو اﻟﻔﻬﻢ )‪(CE‬‬

‫وﲢﻮﻳﻠﻬﺎ إﱃ ﻣﻌﺮﻓﺔ ﻣﻦ ﺧﻼل اﻟﺘﻮﺳﻊ )‪ – (AE‬أي ﻳﻀﻢ ﺧﻄﻮات اﻟﺘﻌﻠﻢ ﻣﻦ اﻟﺘﺠﺮﻳﺐ اﻟﻔﻌﺎل واﳋﱪات اﳌﻠﻤﻮﺳﺔ‪ .‬ﻳﻌﺘﱪ ﻫﺆﻻء‬
‫اﻷﺷﺨﺎص "ﻋﻤﻠﻴﻮن" وﻟﺪﻳﻬﻢ اﻟﻘﺪرة ﻋﻠﻰ اﻟﺘﻌﻠﻢ ﻣﻦ اﻟﺘﺠﺎرب اﻟﺸﺨﺼﻴﺔ ﺑﺸﻜﻞ أﺳﺎﺳﻲ وﻳﻬﺘﻤﻮن ﺑﺎﻟﺴﺆال‪" :‬ﻣﺎذا ﺳﻴﺤﺪث ﻟﻮ‬
‫ﻤﺖ ﻬﺑﺬا؟"‪ ،‬وﻫﻢ ﳚﻴﺒﻮن أﻧﻔﺴﻬﻢ ﺑ ــ‪":‬أﻧﺎ ﻣﺼﻤﻢ ﻋﻠﻰ اﻟﻘﻴﺎم ﺑﺄي ﺷﻲء" ‪ -‬أي أ�ﻢ ﻣﺘﻔﻮﻗﻮن ﰲ اﻟﺘﻜﻴﻒ ﻣﻊ ﻇﺮوف ﺣﺎﻟﻴﺔ‬
‫ﻣﻌﻴﻨﺔ وﻳﺒﺤﺜﻮن ﻋﻦ ﻣﻌﲎ ﻟﻠﺘﺠﺮﺑﺔ اﻟﺘﻌﻠﻴﻤﻴﺔ وﻳﻔﻜﺮون ﻓﻴﻤﺎ ﻳﺴﺘﻄﻴﻌﻮن اﻟﻘﻴﺎم ﺑﻪ‪ ،‬ﲤﺎﻣﺎً ﻛﻤﺎ ﻗﺎم ﺑﻪ أﺷﺨﺎص آﺧﺮﻳﻦ‪ ،‬وﻳﻌﺘﱪ ﻫﺆﻻء‬
‫اﳌﺘﻌﻠﻤﻮن ﺟﻴﺪﻳﻦ ﰲ اﻷﻣﻮر اﳌﻌﻘﺪة وﻗﺎدرﻳﻦ ﻋﻠﻰ ﻣﻼﺣﻈﺔ اﻟﻌﻼﻗﺎت ﺑﲔ ﻣﻈﺎﻫﺮ اﻟﻨﻈﺎم اﳌﺘﻌﺪدة‪ ،‬وﻫﻢ ﳝﻴﻠﻮن ﳊﻞ اﳌﺸﺎﻛﻞ ﺑﺪﻳﻬﻴﺎً‬
‫ﺑﺎﻻﻋﺘﻤﺎد ﻋﻠﻰ ﻣﻌﻠﻮﻣﺎت اﻵﺧﺮﻳﻦ‪ ،‬وﻫﻨﺎك ﳎﻤﻮﻋﺔ ﻣﺘﻨﻮﻋﺔ ﻣﻦ اﻟﻄﺮق اﻟﱵ ﺗﻨﺎﺳﺐ ﻫﺬا اﻷﺳﻠﻮب اﻟﺘﻌﻠﻴﻤﻲ‪ ،‬وﻟﻜﻦ ﻣﻦ اﶈﺘﻤﻞ أن‬
‫ﻳﻜﻮن أي ﺷﻲء ﻳﻌﺰز اﻻﻛﺘﺸﺎف اﳌﺴﺘﻘﻞ ﻫﻮ اﻷﻛﺜﺮ ﺗﻔﻀﻴﻼً‪.‬‬

‫ﻳﻌﺘﱪ اﳌﺘﻌﻠّﻤﻮن ﻣﻦ اﻟﻨﻤﻂ اﻟﺘﻜﻴﻔﻲ‪:‬‬

‫‪ ‬ﻋﻤﻠّﻴﻮن‪ ،‬ﻳﻨﺘﻬﺠﻮن اﻟﻨﻬﺞ اﻟﺘﻄﺒﻴﻘﻲ اﻟﺘﺠﺮﻳﱯ ﰲ أﻋﻤﺎﳍﻢ‪.‬‬
‫‪ ‬ﻳﻨﺠﺬﺑﻮن ﻟﻠﺘﺤﺪﻳﺎت واﳋﱪات اﳉﺪﻳﺪة‪.‬‬
‫ﻳﻔﻀﻠﻮن اﻟﻌﻤﻞ ﺿﻤﻦ ﻓﺮﻳﻖ‪.‬‬
‫‪ّ ‬‬
‫‪ ‬ﻳﺘﻌﻠّﻤﻮن ﻣﻦ ﺧﻼل اﻻﻛﺘﺸﺎف واﻟﺘﺠﺮﻳﺐ‪.‬‬

‫‪ -‬ﳕﻂ اﻟﺘﻌﻠﻢ اﻻﺳﺘﻴﻌﺎﰊ )‪ :(Assimilative Learning Style‬وﻫﻮ اﻛﺘﺴﺎب اﳌﻌﻠﻮﻣﺔ ﻣﻦ ﺧﻼل اﻻﺳﺘﻴﻌﺎب )‪ (AC‬وﲢﻮﻳﻠﻬﺎ إﱃ‬
‫ﻣﻌﺮﻓﺔ ﻣﻦ ﺧﻼل اﻟﻌﺰم )‪ – (RO‬أي ﻳﻀﻢ ﺧﻄﻮات اﻟﺘﻌﻠﻢ ﻣﻦ اﳌﻼﺣﻈﺔ اﻟﺘﺄﻣﻠﻴﺔ وﲢﺪﻳﺪ ﻔﺎﻫﻴﻢ اﺠﻤﻟﺮدة‪ .‬ﻳﻌﺘﱪ ﻫﺆﻻء اﻷﺷﺨﺎص‬
‫"ﻧﻈﺮﻳﻮن" ﻷ�ﻢ أﻛﺜﺮ اﻫﺘﻤﺎﻣﺎً ﺑﺎﳌﻔﺎﻫﻴﻢ واﻷﻓﻜﺎر ﻤﻟﺮدة‪ ،‬وﻳﻬﺘﻤﻮن ﺑﺎﻹﺟﺎﺑﺔ ﻋﻦ اﻟﺴﺆال‪" :‬ﻣﺎذا ﻟﻮ؟"‪ ،‬ﻓﻬﻢ اﻷﻓﻀﻞ ﰲ ﻓﻬﻢ ﻧﻄﺎق‬
‫واﺳﻊ ﻣﻦ اﳌﻌﻠﻮﻣﺎت ووﺿﻌﻬﺎ ﰲ ﳕﺎذج ﻧﻈﺮﻳﺔ ﻣﻨﻄﻘﻴﺔ ﳐﺘﺼﺮة‪ ،‬ﻓﻬﻢ ﻻ ﻳﻜﺘﺸﻔﻮن اﻟﻨﻈﺎم ﺑﺸﻜﻞ ﻋﺸﻮاﺋﻲ‪ ،‬وإﳕﺎ ﻳﺮﻏﺒﻮن ﺑﺎﳊﺼﻮل‬
‫ﻋﻠﻰ اﳊﻞ اﻟﺼﺤﻴﺢ ﳌﺸﻜﻠﺘﻬﻢ‪ ،‬وﻫﻢ ﳛﺒﻮن اﻹﻟﻘﺎء اﻟﺪﻗﻴﻖ واﳌﻨﻈﻢ ﻟﻠﻤﻌﻠﻮﻣﺎت‪ ،‬وﳝﻴﻠﻮن ﻻﺣﱰام ﻣﻌﺮﻓﺔ اﳋﺒﲑ‪ ،‬وﺗﺘﻀﻤﻦ اﻟﻄﺮق‬
‫اﻟﺘﻌﻠﻴﻤﻴﺔ اﻟﱵ ﺗﻨﺎﺳﺐ اﻻﺳﺘﻴﻌﺎﰊ‪ :‬اﶈﺎﺿﺮات‪ ،‬اﺳﺘﻜﺸﺎف اﻟﻨﻤﺎذج اﻟﺘﺤﻠﻴﻠﻴﺔ‪ ،‬وأﺧﺬ اﻟﻮﻗﺖ ﻟﻠﺘﻔﻜﲑ ﰲ اﻷﺷﻴﺎء‪.‬‬

‫ﻳﻌﺘﱪ اﳌﺘﻌﻠّﻤﻮن ﻣﻦ اﻟﻨﻤﻂ اﻻﺳﺘﻴﻌﺎﰊ‪:‬‬

‫‪ ‬ﻧﻈﺮﻳﻮن ﻣﻨﻄﻘﻴﻮن ﳝﻴﻠﻮن ﻟﻠﺘﻔﺴﲑ واﻟﺘﺤﻠﻴﻞ‪.‬‬
‫‪ ‬ﳝﻴﻠﻮن إﱃ اﻟﻌﺮوض اﻟﺴﻤﻌﻴﺔ واﻟﺒﺼﺮﻳﺔ‪.‬‬
‫ﺘﻤّﻮن ﺑﺎﻷﻓﻜﺎر واﳌﻔﺎﻫﻴﻢ اﺠﻤﻟﺮدة أﻛﺜﺮ ﻣﻦ اﻫﺘﻤﺎﻣﻬﻢ ﺑﺎﻟﻌﻼﻗﺎت اﻻﺟﺘﻤﺎﻋﻴﺔ‪.‬‬
‫ّ‬ ‫‪‬‬

‫ﻳﻔﻀﻠﻮن اﻟﺘﻌﻠّﻢ ﻋﻦ ﻃﺮﻳﻖ اﻟﻘﺮاءة واﶈﺎﺿﺮات‪.‬‬

‫‪ّ ‬‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪210‬‬
‫‪24‬‬ ‫اﻟﻔﺼﻞ اﻟﺮاﺑﻊ | ‪Chapter 4‬‬

‫‪ -‬ﳕﻂ اﻟﺘﻌﻠﻢ اﻟﺘﻘﺎرﰊ )‪ :(Convergent Learning Style‬وﻫﻮ اﻛﺘﺴﺎب اﳌﻌﻠﻮﻣﺔ ﻣﻦ ﺧﻼل اﻻﺳﺘﻴﻌﺎب )‪ (AC‬وﲢﻮﻳﻠﻬﺎ إﱃ‬
‫ﻣﻌﺮﻓﺔ ﻣﻦ ﺧﻼل اﻟﺘﻮﺳﻊ )‪ – (AE‬أي ﻳﻀﻢ ﺧﻄﻮات اﻟﺘﻌﻠﻢ ﻣﻦ ﻔﺎﻫﻴﻢ اﺠﻤﻟﺮدة واﻟﺘﺠﺮﻳﺐ اﻟﻔﻌﺎل‪ .‬ﻳﻌﺘﱪ ﻫﺆﻻء اﻷﺷﺨﺎص‬
‫"واﻗﻌﻴﲔ" ﻳﻬﺘﻤﻮن ﺑﺈﳚﺎد اﺳﺘﺨﺪاﻣﺎت ﺧﺎﺻﺔ ﻟﻸﻓﻜﺎر واﻟﻨﻈﺮﻳﺎت‪ ،‬ﻓﻬﻢ ﻳﺴﺄﻟﻮن‪" :‬ﻛﻴﻒ ﳝﻜﻨﲏ ﺗﻄﺒﻴﻖ ﻫﺬا واﻗﻌﻴﺎً؟"‪ ،‬وﻳﺘﺰاﻳﺪ‬
‫اﻟﺘﻄﺒﻴﻖ واﻻﺳﺘﻔﺎدة ﻣﻦ اﳌﻌﻠﻮﻣﺎت ﻋﻦ ﻃﺮﻳﻖ ﻓﻬﻢ ﻣﻌﻠﻮﻣﺎت ﺗﻔﺼﻴﻠﻴﺔ ﺣﻮل ﻋﻤﻞ اﻟﻨﻈﺎم‪ ،‬وﺗﻜﻤﻦ ﻗﻮﺗﻢ اﻟﻌﻈﻤﻰ ﺑﺎﻟﺘﻄﺒﻴﻖ اﻟﻌﻤﻠﻲ‬
‫ﻟﻠﻔﻜﺮة‪ ،‬وﺗﺘﻀﻤﻦ اﻟﻄﺮق اﻟﺘﻌﻠﻴﻤﻴﺔ اﳌﻨﺎﺳﺒﺔ ﻟﻠﻨﻤﻂ اﻟﺘﻘﺎرﰊ‪ :‬اﻟﺘﻌﻠﻢ اﻟﺘﻔﺎﻋﻠﻲ‪ ،‬اﻟﺘﻌﻠﻢ ﺑﺎﺳﺘﺨﺪام اﳊﺎﺳﺐ‪ ،‬اﳌﻬﺎم اﳌﺨﱪﻳﺔ واﻟﺘﻄﺒﻴﻘﺎت‬
‫اﻟﻌﻤﻠﻴﺔ‪.‬‬

‫ﻳﻌﺘﱪ اﳌﺘﻌﻠّﻤﻮن ﻣﻦ اﻟﻨﻤﻂ اﻟﺘﻘﺎرﰊ‪:‬‬

‫وﺣﻞ اﳌﺸﻜﻼت‪.‬‬
‫‪ ‬ﳝﻴﻠﻮن إﱃ اﻻﻛﺘﺸﺎف واﻻﺳﺘﻘﺼﺎء ّ‬
‫‪ ‬ﻗﺎدرون ﻋﻠﻰ ّاﲣﺎذ اﻟﻘﺮارات‪.‬‬
‫‪ ‬ﻣﻐﺮﻣﻮن ﺑﺘﺠﺮﺑﺔ اﻷﻓﻜﺎر اﳉﺪﻳﺪة‪.‬‬
‫‪ ‬ﻳﺘﻌﻠّﻤﻮن ﻣﻦ ﺧﻼل اﶈﺎﻛﺎة واﻟﺘﻄﺒﻴﻘﺎت اﻟﻌﻤﻠﻴﺔ‪.‬‬

‫ﻟﻘﺪ ﻗﺪم ‪ Kolb‬أﺳﻠﻮﺑﺎً ﻟﻠﺘﻌﻠﻢ ﻣﺆﻟﻔﺎً ﻣﻦ اﻷﳕﺎط اﻷرﺑﻌﺔ اﻟﺮﺋﻴﺴﻴﺔ اﻟﺴﺎﺑﻘﺔ]‪ ،[545‬ﻛﻤﺎ ﻃﻮر ﻗﺎﺋﻤﺔ اﺳﺘﻄﻼﻋﻴﺔ ﻟﺘﻘﻴﻴﻢ وﲢﺪﻳﺪ أﳕﺎط اﻟﺘﻌﻠﻢ ﻟﻜﻞ‬
‫ﻓﺮد]‪.[580‬‬

‫‪ 4-2-3-4-4-4‬أﳕﺎط اﻟﺘﻌﻠﻢ اﻷﺧﺮى ذات اﻟﺼﻠﺔ ﺑﻨﻤﻮذج ‪:(Other Relevant Learning Styles) Kolb‬‬
‫ﻳﻌﺮف اﻟﺒﺎﺣﺜﺎن ”‪ [581,582]“Felder & Silverman‬أﺳﺎﻟﻴﺐ اﻟﺘﻌﻠﻢ ﻋﻠﻰ أ�ﺎ ﳎﻤﻮﻋﺔ ﻣﻦ اﻟﺴﻠﻮﻛﻴﺎت اﳌﻌﺮﻓﻴﺔ واﻟﻮﺟﺪاﻧﻴﺔ واﻟﻨﻔﺴﻴﺔ‪ ،‬واﻟﱵ‬
‫ﺗﻌﻤﻞ ﻣﻌﺎً ﻛﻤﺆﺷﺮات ﺛﺎﺑﺘﺔ ﻧﺴﺒﻴﺎً ﻟﻜﻴﻔﻴﺔ إدراك وﺗﻔﺎﻋﻞ واﺳﺘﺠﺎﺑﺔ اﻟﻄﺎﻟﺐ ﻣﻊ ﺑﻴﺌﺔ اﻟﺘﻌﻠﻢ‪ ،‬وﻳﺸﺘﻤﻞ ﻫﺬا اﻟﻨﻤﻮذج ﻋﻠﻲ أرﺑﻌﺔ أﺳﺎﻟﻴﺐ ﺛﻨﺎﺋﻴﺔ‪:‬‬

‫‪ ‬اﻷﺳﻠﻮب اﻟﻌﻤﻠﻲ – اﻟﺘﺄﻣﻠﻲ )‪ :(Active – Reflective‬ﺣﻴﺚ أن أﺻﺤﺎب ﻫﺬا اﻷﺳﻠﻮب ﻳﺘﻌﻠﻤﻮن ﻣﻦ ﺧﻼل اﻟﺘﺠﺮﻳﺐ‬
‫واﻟﻌﻤﻞ ﰲ ﳎﻤﻮﻋﺎت ﰲ ﻣﻘﺎﺑﻞ اﻟﺘﻌﻠﻢ ﺑﺎﻟﺘﻔﻜﲑ ﻤﻟﺮد واﻟﻌﻤﻞ اﻟﻔﺮدي‪.‬‬

‫‪ ‬اﻷﺳﻠﻮب اﳊﺴﻲ – اﳊﺪﺳﻲ )‪ :(Sensing – Intuitive‬واﻟﺘﻌﻠﻢ ﻫﻨﺎ ﻣﻦ ﺧﻼل اﻟﺘﻔﻜﲑ اﳊﺴﻲ أو اﻟﻌﻴﺎﱐ ﻣﻊ اﻟﺘﻮﺟﻪ ﳓﻮ‬
‫اﳊﻘﺎﺋﻖ واﳌﻔﺎﻫﻴﻢ ﰲ ﻣﻘﺎﺑﻞ اﻟﺘﻔﻜﲑ اﻟﺘﺠﺮﻳﺪي واﻟﺘﻮﺟﻪ ﳓﻮ اﻟﻨﻈﺮﻳﺎت وﻣﺎ وراء اﳌﻌﲎ‪.‬‬

‫‪ ‬اﻷﺳﻠﻮب اﻟﻠﻔﻈﻲ – اﻟﺒﺼﺮي )‪ :(Visual – Verbal‬وأﺻﺤﺎب ﻫﺬا اﻷﺳﻠﻮب ﳝﻴﻠﻮن إﱃ اﻷﺷﻜﺎل اﻟﺒﺼﺮﻳﺔ ﻟﻠﻤﺎدة ﻣﻦ ﺻﻮر‬
‫ورﺳﻮم ﺑﻴﺎﻧﻴﺔ ﻣﻘﺎﺑﻞ اﻟﺘﻔﺴﲑات اﻟﺸﻔﻬﻴﺔ واﳌﻜﺘﻮﺑﺔ‪.‬‬

‫‪ ‬اﻷﺳﻠﻮب اﻟﺘﺘﺎﺑﻌﻲ – اﻟﻜﻠﻲ )‪ :(Sequential – Global‬واﻟﺘﻌﻠﻢ ﻫﻨﺎ ﻣﻦ ﺧﻼل ﺧﻄﻮات دﻗﻴﻘﺔ ﺗﺘﺎﺑﻌﻴﺔ ﻣﻘﺎﺑﻞ اﻟﺘﻔﻜﲑ اﻟﻜﻠﻲ أو‬
‫اﻟﺸﻤﻮﱄ ﻟﻠﻤﻮﻗﻒ‪.‬‬

‫‪211‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Engineering Education Methodologies‬‬ ‫ﻣﻨﻬﺠﻴﺎت اﻟﺘﻌﻠﻴﻢ اﳍﻨﺪﺳﻲ |‬

‫‪Felder-Silverman Index of Learning Styles‬‬ ‫اﻟﺸﻜﻞ‪5-4‬‬

‫وﻳﺮى اﻟﺒﺎﺣﺜﺎن ﺗﺸﺎﺑﻪ ﻫﺬا اﻟﻨﻤﻮذج ﻣﻊ ﳕﻮذج ﻛﻮﻟﺐ وﲞﺎﺻﺔ ﰲ اﳌﺮاﺣﻞ اﻷرﺑﻌﺔ )اﳋﱪات اﳊﺴﻴﺔ‪ ،‬اﳌﻼﺣﻈﺔ اﻟﺘﺄﻣﻠﻴﺔ‪ ،‬اﻟﺘﺠﺮﻳﺐ اﻟﻔﻌﺎل‪،‬‬
‫اﳌﻔﺎﻫﻴﻢ ﻤﻟـﺮدة( اﻟﱵ اﻋﺘﻤﺪ ﻋﻠﻴﻬﺎ ‪ Kolb‬ﰲ اﺳﺘﻨﺘﺎج أﺳﺎﻟﻴﺐ اﻟﺘﻌﻠﻢ‪ ،‬وﻳﺆﻛﺪ ذﻟﻚ اﻟﺪراﺳﺔ]‪ [588‬ﺣﻴﺚ أﻇﻬﺮت ﻧﺘﺎﺋﺠﻬﺎ وﺟﻮد ارﺗﺒﺎط إﳚﺎﰊ‬
‫وﺗﺪاﺧﻞ ﺑﲔ أﺳﺎﻟﻴﺐ اﻟﺘﻌﻠﻢ ﰲ اﻟﻨﻤﻮذﺟﲔ‪ ،‬وﻛﺬﻟﻚ ﺪرﻬﺗﻢ ﻋﻠﻰ اﻟﺘﻨﺒﺆ ﺑﺎﻷداء اﻷﻛﺎدﳝﻲ ﻟﻄﻼب اﻟﻜﻠﻴﺎت اﳍﻨﺪﺳﻴﺔ‪ ،‬إﺿﺎﻓﺔً إﱃ وﺟﻮد ﻓﺮوق‬
‫ﰲ أﺳﺎﻟﻴﺐ اﻟﺘﻌﻠﻢ ﺑﲔ اﻟﺬﻛﻮر واﻹﻧﺎث‪ ،‬وﻗﺪ ﻃﻮر اﻟﺒﺎﺣﺜﺎن أداة ﳎﺎﻧﻴﺔ ﻋﻠﻰ اﻹﻧﱰﻧﺖ ﺗﺴﺎﻋﺪ ﻋﻠﻰ ﲢﺪﻳﺪ أﺳﻠﻮب اﻟﺘﻌﻠﻢ اﳌﻔﻀﻞ ﻟﻜﻞ‬
‫ﻓﺮد]‪.[582‬‬

‫وﺿﻊ أﻳﻀﺎً ﳕﻮذج اﻟﺘﻌﻠﻢ ‪ ،4-MAT‬وﻫﻮ ﻋﺒﺎرة ﻋﻦ ﳕﻮذج ﻳﻘﺪم أرﺑﻌﺔ أﺳﺎﻟﻴﺐ ﻟﻠﺘﻌﻠﻴﻢ وﻫﻲ‪ :‬اﻹﺑﺪاﻋﻲ‬ ‫]‪[579‬‬
‫اﻟﺒﺎﺣﺚ ‪McCarthy‬‬

‫)‪ ،(Innovative‬اﻟﺘﺤﻠﻴﻠﻲ )‪ ،(Analytic‬اﶈﺴﻮس )‪ ،(Common Sense‬اﻟﺪﻳﻨﺎﻣﻴﻜﻲ )‪.(Dynamic‬‬

‫ﻛﻤﺎ وﺿﻊ اﻟﺒﺎﺣﺜﺎن ‪ [583]Fleming & Mills‬ﳕﻮذج اﻟﺘﻌﻠﻢ ‪ VARK‬اﳌﺴﺘﻮﺣﻰ ﻣﻦ اﻟﻨﻈﺮﻳﺔ اﻹدراﻛﻴﺔ‪ ،‬وﻳﻌﺘﱪ ﻫﺬا اﻟﻨﻤﻮذج ﻣﻦ اﻟﻨﻤﺎذج‬
‫اﻟﺸﺎﺋﻌﺔ اﻻﺳﺘﺨﺪام وﳝﻴﺰ ﺑﲔ أﺳﺎﻟﻴﺐ اﻟﺘﻌﻠﻴﻢ اﻟﺘﺎﻟﻴﺔ]‪:[621,622‬‬
‫‪ ‬اﻟﺒﺼﺮي )‪ :(Visual‬ﻳﻔﻀﻠﻪ اﳌﺘﻌﻠﻤﻮن اﻟﺒﺼﺮﻳﻮن )‪.(Visual Learners‬‬
‫‪ ‬اﻟﺴﻤﻌﻲ )‪ :(Aural‬ﻳﻔﻀﻠﻪ اﳌﺘﻌﻠﻤﻮن اﻟﺴﻤﻌﻴﻮن )‪.(Auditory Learners‬‬
‫‪ ‬اﳌﻘﺮوء اﳌﻜﺘﻮب )‪ :(Read/Write‬ﻳﻔﻀﻠﻪ اﳌﺘﻌﻠﻤﻮن اﻟﻨﺼﻴﻮن )‪.(Textual Learners‬‬
‫‪ ‬اﳊﺴﻲ ﺣﺮﻛﻲ )‪ :(Kinaesthetic‬ﻳﻔﻀﻠﻪ اﳌﺘﻌﻠﻤﻮن اﻟﻌﻤﻠﻴﻮن )‪.(Kinesthetic or Tactile Learners‬‬

‫ﻳﺼﺮح ‪ Fleming‬ﻋﻠﻰ أن اﳌﺘﻌﻠﻤﲔ اﻟﺒﺼﺮﻳﲔ ﳝﻠﻜﻮن ﻣﻴﺰة وأﻓﻀﻠﻴﺔ ﻟﻠﻔﻬﻢ ﻣﻦ ﺧﻼل اﻟﺮؤﻳﺔ )ﻣﺜﻞ‪ :‬وﺳﺎﺋﻞ اﳌﺴﺎﻋﺪة واﻹﻳﻀﺎح اﳌﺮﺋﻴﺔ –‬
‫اﳌﺨﻄﻄﺎت‪ ،‬اﻟﺼﻮر‪ ،‬اﻟﻌﺮوض(؛ ﻛﻤﺎ أن اﳌﺘﻌﻠﻤﲔ اﻟﺴﻤﻌﻴﲔ ﻟﺪﻳﻬﻢ أﻓﻀﻠﻴﺔ ﻟﻠﺘﻌﻠﻢ ﻣﻦ ﺧﻼل اﻟﺴﻤﺎع )ﻣﺜﻞ‪ :‬اﶈﺎﺿﺮات‪ ،‬اﳌﻨﺎﻗﺸﺎت‪،‬‬
‫اﻟﺘﺴﺠﻴﻼت اﳌﺴﻤﻮﻋﺔ(؛ ﺑﺎﻟﻨﺴﺒﺔ اﻟﻨﺼﻴﲔ ﻳﻔﻀﻠﻮن اﻟﺘﻌﻠﻢ ﻣﻦ ﺧﻼل اﻟﻘﺮاءة واﻟﻜﺘﺎﺑﺔ )ﻣﺜﻞ‪ :‬ﻗﺮاءة اﻟﻜﺘﺐ‪ ،‬اﳌﻘﺎﻻت‪ ،‬دﻻﺋﻞ اﻟﺘﺠﺎرب‪،‬‬
‫اﻟﺸﺮوح(؛ وأﻣﺎ اﻟﻮﺳﻴﻠﺔ اﻷﻓﻀﻞ ﻟﻠﺘﻌﻠﻢ ﺑﺎﻟﻨﺴﺒﺔ ﻟﻠﻤﺘﻌﻠﻤﲔ اﻟﻌﻤﻠﻴﲔ ﻓﻬﻲ اﻟﺘﺠﺮﺑﺔ واﻟﻔﻌﻞ )اﻟﺘﺠﺎرب اﻟﻌﻤﻠﻴﺔ‪ ،‬اﳌﺸﺎرﻳﻊ‪ ،‬اﻻﻛﺘﺸﺎف اﻟﻔﻌﺎل(‪.‬‬

‫‪ 5-2-3-4-4-4‬ﳌﺎذا ﻧﺴﺘﺨﺪم أﳕﺎط اﻟﺘﻌﻠﻢ )?‪:(Learning Stiles – So Why‬‬

‫إن ﻣﺒﺪأ أﺳﺎﻟﻴﺐ اﻟﺘﻌﻠﻢ ﻳﺘﻀﻤﻦ أن ﻋﻤﻠﻴﱵ اﻟﺘﻌﻠﻴﻢ واﻟﺘﻌﻠﻢ ﳚﺐ أن ﻳﻨﻔﺬا ﺑﻄﺮﻳﻘﺔ ﺗﺘﻼءم ﻗﺪر اﻹﻣﻜﺎن ﻣﻊ ﳐﺘﻠﻒ اﻟﻄﺮق اﻟﱵ ﳝﻴﻞ إﻟﻴﻬﺎ‬
‫اﳌﺘﻌﻠﻢ ﰲ ﺑﻨﺎء اﳌﻌﺮﻓﺔ‪ ،‬ﻓﻤﻌﺮﻓﺔ ﳕﻂ اﻟﺘﻌﻠﻢ اﳋﺎص ﺑﺎﻟﻄﻼب‪:‬‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪212‬‬
‫‪24‬‬ ‫اﻟﻔﺼﻞ اﻟﺮاﺑﻊ | ‪Chapter 4‬‬

‫‪ ‬ﳚﻌﻠﻨﺎ ﻧﻔﻬﻢ ﻛﻴﻒ ﳝﻜﻦ أن ﻧﺘﻔﺎﻋﻞ ﻣﻊ اﻟﻄﺎﻟﺐ ﰲ اﻟﺼﻒ ﲝﻴﺚ ﻳﻜﻮن ﻧﺎﺗﺞ اﻟﺘﻌﻠﻢ أﻓﻀﻞ ﻣﺎ ﳝﻜﻦ‪.‬‬
‫‪ ‬ﻛﻤﺪرﺳﲔ ﳝﻜﻨﻨﺎ ﺗﻔﺼﻴﻞ اﺳﱰاﺗﻴﺠﻴﺔ اﻟﺘﺪرﻳﺲ ﻟﻠﺘﻮاﻓﻖ ﻣﻊ ﳕﻂ اﻟﺘﻌﻠﻢ اﳋﺎص ﺑﺎﻟﻄﻼب‪.‬‬
‫‪ ‬إن اﳍﺪف اﳉﻮﻫﺮي ﻣﻦ اﻟﺘﻌﻠﻴﻢ اﳉﺎﻣﻌﻲ ﻫﻮ إﳚﺎد ﻃﻼب ﻗﺎدرﻳﻦ ﻋﻠﻰ اﻟﺘﻔﻜﲑ ﻷﻧﻔﺴﻬﻢ‪.‬‬
‫‪ ‬إن ﺗﺪرﻳﺲ اﻟﻄﻼب وﻓﻘﺎً ﻷﳕﺎط اﻟﺘﻌﻠﻢ اﳌﺘﻮاﻓﻘﺔ ﻣﻌﻬﻢ وﻣﻦ ﰒ إﺟﺒﺎرﻫﻢ ﻋﻠﻰ ﺗﻌﻠﻢ أﳕﺎط ﻏﲑ ﻣﻔﻀﻠﺔ ﺑﺎﻟﻨﺴﺒﺔ ﳍﻢ ﺳﻮف ﻳﻄﻮر ﺧﱪة‬
‫أﻛﺜﺮ ﻓﺎﻋﻠﻴﺔ ﻟﺪﻳﻬﻢ‪.‬‬

‫ﻳﺮﺗﺒﻂ ﺗﻘﻴﻴﻢ أﺳﻠﻮب اﻟﺘﻌﻠﻢ ﺑﻨﻤﻮذج ﻛﻮﻟﺐ‪ ،‬وﻳﺴﺘﺨﺪم ﻟﺘﺤﺪﻳﺪ أﺳﻠﻮب اﻟﺘﻌﻠﻢ اﳋﺎص ﺑﺎﻟﻄﺎﻟﺐ‪ ،‬وﻳُﻘﻴﱢﻢ ﻫﺬا اﻷﺳﻠﻮب ﻣﺎ ﻳﻔﻀﻠﻪ اﻟﻔﺮد‬
‫وﳛﺘﺎﺟﻪ ﰲ ﻋﻤﻠﻴﺔ اﻟﺘﻌﻠﻢ‪ ،‬ﻓﻬﻮ ﻳﻘﻮم ﲟﺎ ﻳﻠﻲ‪:‬‬

‫‪ ‬ﻳﺴﻤﺢ ﻟﻠﻄﺎﻟﺐ ﺑﺎﺧﺘﻴﺎر وﺳﻴﻠﺔ اﻟﺘﻌﻠﻢ اﻟﱵ ﻳﻔﻀﻠﻬﺎ وﻣﺪى اﺗﺴﺎق ردود ﻓﻌﻠﻪ‪.‬‬
‫‪ ‬ﻳﻘﺪم ﻧﺘﺎﺋﺞ ﳏﻮﺳﺒﺔ ﻟﺘﺒﲔ ﳕﻂ اﻟﺘﻌﻠﻢ اﳌﻔﻀﻞ ﻟﻠﻄﺎﻟﺐ‪.‬‬
‫‪ ‬ﻳﻮﻓﺮ أﺳﺎس ﻳﻌﺘﻤﺪ ﻋﻠﻴﻪ اﳌﻌﻠﻤﻮن ﰲ اﻟﺘﻔﺎﻋﻞ ﻣﻊ اﻟﻄﻼب‪.‬‬
‫‪ ‬ﻳﻮﻓﺮ اﻻﺳﱰاﺗﻴﺠﻴﺎت اﳌﻤﻜﻨﺔ ﻻﺳﺘﻴﻌﺎب أﳕﺎط اﻟﺘﻌﻠﻢ‪.‬‬
‫‪ ‬ﻳﻮﻓﺮ ﻣﺸﺎرﻛﺔ اﻟﻄﻼب ﰲ ﻋﻤﻠﻴﺔ اﻟﺘﻌﻠﻢ‪.‬‬
‫‪ ‬ﻳﻮﻓﺮ ﻣﻠﺨﺼﺎً ﻋﻦ ﻛﻴﻔﻴﺔ ﲡﻤﻴﻊ اﻟﻄﻼب ذات أﳕﺎط اﻟﺘﻌﻠﻢ اﳌﻤﺎﺛﻠﺔ ﻣﻌﺎً ﰲ ﻓﺼﻞ دراﺳﻲ واﺣﺪ‪.‬‬

‫‪ 3-3-4-4-4‬اﻟﺘﻌﻠﻢ ﺑﺎﻻﻋﺘﻤﺎد ﻋﻠﻰ ﺣﻞ اﳌﺸﻜﻼت ”‪:(Problem-based Learning) “PBL‬‬

‫إن اﳌﺸﻜﻼت واﻟﻌﻘﺒﺎت اﻟﱵ ﻧﻮاﺟﻬﻬﺎ ﰲ اﳊﻴﺎة ﺗﺸﻜﻞ ﻓﺮﺻﺎً ﺟﻴﺪة ﻟﻠﺘﻌﻠﻢ واﻟﻔﻬﻢ‪ ،‬واﻟﺘﻐﻠﺐ ﻋﻠﻰ ﻫﺬﻩ اﳌﺸﻜﻼت ﻳﻌﲏ اﻟﻨﺠﺎح وﲢﻘﻴﻖ‬
‫اﻷﻫﺪاف‪ ،‬وﻗﺪ ﻳﻜﻮن ﻣﻦ اﳌﻤﻜﻦ ﺗﺼﻤﻴﻢ ﳕﻮذج ﻟﻠﺘﻌﻠﻢ ﻳﺸﺎﺑﻪ ﻣﺎ ﳛﺼﻞ ﰲ اﳊﻴﺎة واﻟﻮاﻗﻊ‪ ،‬وﻫﺬا ﻫﻮ أﺳﺎس اﻟﺘﻌﻠﻢ ﺑﺎﻻﻋﺘﻤﺎد ﻋﻠﻰ ﺣﻞ‬
‫اﳌﺸﻜﻼت‪ .‬ﻓﻔﻲ اﻟﺘﻌﻠﻢ اﻟﺘﻘﻠﻴﺪي ﻳﻘﺪم اﳌﻌﻠﻢ اﳊﻘﺎﺋﻖ ﻟﻠﻄﻼب‪ ،‬وﻳﺴﺄل اﻷﺳﺌﻠﺔ ﻟﻔﺤﺺ ﻓﻬﻤﻬﻢ اﺳﺘﻴﻌﺎﻬﺑﻢ‪ ،‬وﻣﻦ ﰒ ﻳﻨﺎﻗﺶ ﺗﻀﻤﻴﻨﺎت اﳌﺎدة‬
‫دﻻﻻﻬﺗﺎ‪ ،‬وأﺧﲑاً ﳝﺘﺤﻨﻬﻢ ﻣﻦ ﺧﻼل اﺧﺘﺒﺎر أو ﻣﻦ ﺧﻼل ﻧﺸﺎط ﻟﻴﺘﺄﻛﺪ ﻣﻦ "إﺗﻘﺎن" اﻟﻄﻠﺒﺔ ﳌﺎ ﺗﻌﻠﻤﻮﻩ؛ ﻗﺪ ﻳﻜﻮن ﻫﺬا اﻟﻨﻬﺞ ﺳﻬﻼً‪ ،‬وﳝﻜﻦ‬
‫اﻟﺘﺤﻜﻢ ﺑﻪ‪ ،‬وﻗﺪ ﻳﺒﺪو ﻓﻌﺎﻻً إﻻ أﻧﻪ ﳜﺘﻠﻒ ﲤﺎﻣﺎً ﻋﻦ اﻟﺘﻌﻠﻢ اﻟﺬي ﳛﺼﻞ ﰲ اﻟﻮاﻗﻊ‪ ،‬ﻓﺎﻟﺘﻌﻠﻢ اﳊﻘﻴﻘﻲ أﻛﺜﺮ ﺑﻜﺜﲑ ﻣﻦ ﳎﺮد ﺣﻔﻆ اﳌﻌﻠﻮﻣﺎت‬
‫واﺳﱰﺟﺎﻋﻬﺎ‪ ،‬إذ إﻧﻪ ﻳﻌﺘﻤﺪ ﻋﻠﻰ ﻃﺮح ﺗﺴﺎؤﻻت رﺋﻴﺴﻴﺔ ﻣﻦ أﺟﻞ ﺑﻨﺎء اﳌﻌﺮﻓﺔ‪ ،‬وﻫﻮ ﻳﺒﺪأ ﺑﺸﻌﻮرﻧﺎ ﺑﺎﳊﺎﺟﺔ إﱃ اﻟﺘﻌﻠﻢ‪ ،‬وﻫﺬا اﻟﺸﻌﻮر ﻏﺎﻟﺒﺎً ﻣﺎ‬
‫ﺗﻌﲔ ﻋﻠﻰ اﳊﻞ‪ ،‬ﻛﻤﺎ أ�ﺎ ﻣﻮاﻗﻒ دﻳﻨﺎﻣﻴﻜﻴﺔ‬
‫ﻳﺮﺗﺒﻂ ﲟﻮاﻗﻒ ﺻﻌﺒﺔ ﺗﻈﻬﺮ ﻓﻴﻬﺎ اﳌﺸﻜﻼت‪ .‬إن ﻫﺬﻩ اﳌﻮاﻗﻒ ﻻ ﺗﺘﻀﻤﻦ اﳌﻌﻠﻮﻣﺎت ﻛﺎﻓﺔ اﻟﱵ ْ‬
‫وﻏﲑ ﺛﺎﺑﺘﺔ‪ ،‬ﺑﻞ إن ﻧﻈﺮﺗﻨﺎ ﻟﻠﻤﺸﻜﻠﺔ ﺗﺘﻐﲑ أﺛﻨﺎء ﳏﺎوﻟﺘﻨﺎ ﻟﻔﻬﻤﻬﺎ‪ ،‬وﻫﻨﺎك داﺋﻤﺎً أﻛﺜﺮ ﻣﻦ ﻃﺮﻳﻘﺔ واﺣﺪة ﻟﻠﺘﻌﺎﻣﻞ ﻣﻌﻬﺎ أو ﳊﻠّﻬﺎ‪.‬‬

‫وﻫﻜﺬا‪ ،‬ﻓﺈن اﻟﺘﻌﻠﻢ اﳌﺘﻤﺤﻮر ﺣﻮل اﳌﺸﻜﻼت ﻳﻘﺪم ﺧﱪات أﺻﻴﻠﺔ‪ ،‬وﳛﺚ ﻋﻠﻰ اﻟﺘﻌﻠﻢ اﻟﻨﺸﻂ‪ ،‬وﻳﺴﺎﻋﺪ ﰲ ﺑﻨﺎء اﳌﻌﺮﻓﺔ‪ ،‬وﻳﺪﻣﺞ اﳋﱪات‬
‫اﻟﺘﻌﻠﻴﻤﻴﺔ واﳋﱪات اﻟﺘﻄﺒﻴﻘﻴﺔ ﺑﺸﻜﻞ ﺣﻘﻴﻘﻲ‪ ،‬ﻛﻤﺎ أن ﻫﺬﻩ اﻟﻄﺮﻳﻘﺔ ﰲ اﻟﺘﻌﻠﻢ ﺗﺮﺑﻂ اﳌﻮاﺿﻴﻊ اﻟﺘﻌﻠﻴﻤﻴﺔ اﳌﺨﺘﻠﻔﺔ ﺑﻌﻀﻬﺎ ﺑﺒﻌﺾ‪ .‬ﻓﺎﳌﺸﻜﻠﺔ اﻟﱵ‬
‫ﺗﻘﻮد اﻟﺘﻌﻠﻢ ﰲ ﻫﺬﻩ اﳊﺎﻟﺔ ﲤﺜﻞ اﳌﺮﻛﺰ اﻟﺬي ﻳﺘﻤﺤﻮر ﺣﻮﻟﻪ اﳌﻨﻬﺞ اﻟﺘﻌﻠﻴﻤﻲ‪ ،‬ﻣﺎ ﻳﺜﲑ ﻓﻀﻮل اﻟﻄﻼب وداﻓﻌﻴﺘﻬﻢ ﳊﻞ اﳌﺸﻜﻠﺔ‪ ،‬وﳜﻠﻖ ﺑﻴﺌﺔ‬
‫ﺗﻌﻠﻴﻤﻴﺔ ﻳﺴﺎﻧﺪ ﻓﻴﻬﺎ اﳌﻌﻠﻤﻮن اﻟﻄﻼب وﻳﺸﺠﻌﻮ�ﻢ ﻋﻠﻰ اﻟﺘﻔﻜﲑ‪ ،‬وﻳﺮﺷﺪو�ﻢ أﺛﻨﺎء اﻻﺳﺘﻘﺼﺎء‪ ،‬وﻳﺴﻬﻠّﻮن اﻟﻔﻬﻢ اﻟﻌﻤﻴﻖ ﻟﻠﻤﻮﺿﻮع‪.‬‬

‫‪213‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Engineering Education Methodologies‬‬ ‫ﻣﻨﻬﺠﻴﺎت اﻟﺘﻌﻠﻴﻢ اﳍﻨﺪﺳﻲ |‬

‫‪ 1-3-3-4-4-4‬ﺑﻴﺪاﻏﻮﺟﻴﺎ اﻟﺘﻌﻠﻢ ﺑﺎﻻﻋﺘﻤﺎد ﻋﻠﻰ ﺣﻞ اﳌﺸﻜﻼت )‪:(Problem-based Learning Pedagogy‬‬

‫إن ﺗﻌﺮﻳﻒ اﻟﺘﻌﻠﻢ ﺑﺎﻻﻋﺘﻤﺎد ﻋﻠﻰ ﺣﻞ اﳌﺸﻜﻼت ﻣﻦ وﺟﻬﺔ ﻧﻈﺮ ﺑﻴﺪاﻏﻮﺟﻴﺔ ﻫﻮ‪ :‬اﺳﱰاﺗﻴﺠﻴﺔ ﺗﻌﻠﻴﻤﻴﺔ ﺗﺴﺘﻤﺪ ﻣﻔﻬﻮﻣﻬﺎ ﻣﻦ اﻟﺒﻴﺪاﻏﻮﺟﻴﺔ‬
‫اﻟﺒﻨﺎﺋﻴﺔ‪ ،‬وﺗﻌﺘﱪ ﻣﻦ أﺑﺮز ﻋﻠﻮم اﻟﺘﺪرﻳﺲ اﻟﺒﻨﺎﺋﻴﺔ اﳌﻤﺎرﺳﺔ ﻣﺆﺧﺮاً‪ ،‬وﺗﻘﻮم ﻋﻠﻰ ﲢﻮﻳﻞ اﳌﻨﻬﺠﻴﺔ اﻟﺘﺪرﻳﺴﻴﺔ ﻣﻦ ﻛﻮن اﳌﻌﻠﻢ ﳏﻮر اﻟﻌﻤﻠﻴﺔ اﻟﺘﻌﻠﻴﻤﻴﺔ‬
‫)‪ (Teacher-centered Approach‬إﱃ ﺟﻌﻞ اﻟﻄﺎﻟﺐ ﳏﻮراً ﻟﻠﻌﻤﻠﻴﺔ اﻟﺘﻌﻠﻴﻤﻴﺔ )‪ (Student-centered Approach‬وذﻟﻚ ﻣﻦ‬
‫ﺧﻼل ﺗﺼﻤﻴﻢ ﻣﻨﺎﻫﺞ ﺗﻌﻠﻴﻤﻴﺔ ﺗﺆﻛﺪ ﺑﺸﻜﻞ أﻛﱪ ﻋﻠﻰ اﻻﻋﺘﻤﺎد ﻋﻠﻰ اﺳﺘﺨﺪام اﳌﺸﺎرﻳﻊ ﺑﺪﻻً ﻣﻦ اﶈﺎﺿﺮة ﰲ اﻟﺼﻔﻮف اﻟﺘﺪرﻳﺴﻴﺔ‪ ،‬اﻷﻣﺮ‬
‫اﻟﺬي ﻳﺴﺎﻋﺪ اﻟﻄﻼب ﻋﻠﻰ ﺑﻨﺎء اﻟﻘﺎﻋﺪة اﻟﻌﻠﻤﻴﺔ اﻟﻌﻤﻠﻴﺔ اﳌﻌﺮﻓﻴﺔ ﻟﺪﻳﻬﻢ‪ ،‬وﻳﺰودﻫﻢ ﲞﱪة وﲡﺮﺑﺔ واﻗﻌﻴﺔ ﺣﻘﻴﻘﻴﺔ ﻣﻮﺛﻮﻗﺔ‪ ،‬وﻳﻌﺰز اﻟﺘﻌﻠﻴﻢ اﳌﻨﻈﻢ‬
‫ﺑﺸﻜﻞ ﻣﺴﺘﻘﻞ‪ .‬اﻟﺸﻜﻞ‪ 6-4‬ﻳﺒﲔ ﻣﻘﺎرﻧﺔ ﺑﲔ ﻣﻨﻬﺠﻴﺔ اﻟﺘﻌﻠﻴﻢ اﻟﺘﻘﻠﻴﺪي )اﳌﻌﻠﻢ ﳏﻮر اﻟﻌﻤﻠﻴﺔ اﻟﺘﻌﻠﻴﻤﻴﺔ( وﻣﻨﻬﺠﻴﺔ اﻟﺘﻌﻠﻴﻢ اﳊﺪﻳﺚ )اﻟﻄﺎﻟﺐ‬
‫ﳏﻮر اﻟﻌﻤﻠﻴﺔ اﻟﺘﻌﻠﻴﻤﻴﺔ(‪.‬‬

‫‪Student-centered Learning vs. Teacher-centered Learning‬‬ ‫اﻟﺸﻜﻞ‪6-4‬‬

‫إن اﻟﺘﻌﻠﻢ اﻟﻘﺎﺋﻢ ﻋﻠﻰ ﺣﻞ اﳌﺸﻜﻼت ﻳﻀﻢ ﻛﻞ ﻣﻦ اﻟﺘﻌﻠﻢ واﻟﺘﻌﻠﻴﻢ اﻹدراﻛﻲ‪-‬اﳌﻌﺮﰲ )‪ (Metacognitive‬واﻹدراﻛﻲ )‪،(Cognitive‬‬
‫وﻗﺪ ﻇﻬﺮ ﻫﺬا اﳌﻨﻬﺞ ﰲ أواﺧﺮ اﻟﺴﺘﻴﻨﻴﺎت ﻣﻦ اﻟﻘﺮن اﻟﻌﺸﺮﻳﻦ]‪ ،[608‬وﻳﺸﲑ]‪ [609‬إﱃ أن اﻟﺘﻌﻠﻢ اﻟﻘﺎﺋﻢ ﻋﻠﻰ ﺣﻞ اﳌﺸﻜﻼت ﺗﻌﻮد ﺟﺰورﻩ إﱃ‬
‫ﻣﻨﻬﺠﻴﺔ اﻟﺘﻌﻠﻢ اﻟﻘﺎﺋﻢ ﻋﻠﻰ اﳌﺸﺎرﻳﻊ )‪ (Project-based Pedagogy‬ﻟﻠﺒﺎﺣﺚ ‪ Dewey‬ﰲ أواﺋﻞ اﻟﻘﺮن اﻟﻌﺸﺮﻳﻦ‪.‬‬

‫ﻳﻮﺟﺪ ﺎﻻت أﺧﺮى ﻣﺸﺎﻬﺑﺔ ﰲ اﳌﺒﺪأ ﺗﺘﻀﻤﻦ‪ :‬اﻟﺘﻌﻠﻢ اﻟﻘﺎﺋﻢ ﻋﻠﻰ اﳌﻬﺎم )‪ ،[120-122](Task-based Learning‬اﻟﺘﻌﻠﻢ اﻟﻘﺎﺋﻢ ﻋﻠﻰ اﶈﺘﻮى‬
‫)‪ ،[613,614](Content-based Learning‬اﻟﺘﻌﻠﻢ اﻟﻘﺎﺋﻢ ﻋﻠﻰ اﳌﺸﺎرﻳﻊ )‪.[619,620](Project-based Learning‬‬

‫اﻷﻣﺮ اﻟﺬي ﳚﻌﻞ اﻟﺘﻌﻠﻢ اﻟﻘﺎﺋﻢ ﻋﻠﻰ ﺣﻞ اﳌﺸﻜﻼت أﻣﺮاً ﻓﺮﻳﺪاً ﻫﻮ ﺗﺮﻛﻴﺰﻫﺎ اﳉﻮﻫﺮي ﻋﻠﻰ اﻟﺘﻌﻠﻢ ﻣﻦ ﺧﻼل ﺣﻞ اﳌﺸﺎﻛﻞ اﳊﻘﻴﻘﻴﺔ اﻟﻐﲑ ﺑﺪﻫﻴﺔ‬
‫)‪ (open-ended problems‬اﻟﱵ ﻟﻴﺲ ﳍﺎ ﺣﻞ ﺛﺎﺑﺖ]‪.[615‬‬

‫ﻟﻘﺪ ﰎ ﺗﻄﺒﻴﻖ ﻣﻨﻬﺠﻴﺔ اﻟﺘﻌﻠﻢ ﺑﺎﻻﻋﺘﻤﺎد ﻋﻠﻰ ﺣﻞ اﳌﺸﻜﻼت )‪ (PBL‬ﰲ اﻟﻌﺪﻳﺪ ﻣﻦ أﲝﺎث اﻟﺘﻌﻠﻴﻢ اﳍﻨﺪﺳﻲ وﻛﺎن أﺛﺮ ﻫﺬﻩ اﳌﻨﻬﺠﻴﺔ ﻓﻴﻬﺎ‬
‫إﳚﺎﰊ إﱃ ﺣﺪ ﻛﺒﲑ‪ ،‬ﻣﻦ ﻫﺬﻩ اﻟﺪراﺳﺎت ﻧﻘﺘﺼﺮ ﻋﻠﻰ]‪ ،[595,602-605‬ﺣﻴﺚ ﻳﻌﺘﱪ اﻟﺘﻌﻠﻢ ﺑﺎﻻﻋﺘﻤﺎد ﻋﻠﻰ ﺣﻞ اﳌﺸﻜﻼت ﻣﺜﺎﻟﻴﺎً ﻟﻠﺘﻌﻠﻴﻢ‬
‫اﳍﻨﺪﺳﻲ‪ ،‬وذﻟﻚ ﻷن اﻟﺘﺨﺼﺼﺎت اﳍﻨﺪﺳﻴﺔ ﻗﺎﺋﻤﺔ إﱃ ﺣﺪ ﻛﺒﲑ ﻋﻠﻰ اﳌﺸﺎرﻳﻊ‪ ،‬وﺑﺎﻟﺘﺎﱄ ﻓﺈن ﻣﺮﺣﻠﺔ اﻟﺘﺪرﻳﺐ اﳌﺒﻜﺮ ﻋﻠﻰ ﻣﺜﻞ ﻫﺬﻩ‬
‫اﻟﻨﺸﺎﻃﺎت ﺧﻼل اﻟﺪراﺳﺔ اﳉﺎﻣﻌﻴﺔ‪ ،‬ﺳﻮف ﻳﻨﺘﺞ ﻋﻨﻬﺎ ﻣﻬﻨﺪﺳﲔ ﻣﺴﺘﻘﺒﻠﻴﲔ ﻓﻌﺎﻟﲔ ﺑﺸﻜﻞ أﻛﱪ‪ ،‬أﺻﺤﺎب اﺳﺘﻘﻼل ذاﰐ‪ ،‬ﳏﻠﻠﲔ ﻟﻠﻤﺸﺎﻛﻞ‪،‬‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪214‬‬
‫‪24‬‬ ‫اﻟﻔﺼﻞ اﻟﺮاﺑﻊ | ‪Chapter 4‬‬

‫وﳎﻬﺰﻳﻦ ﲟﻬﺎرات ﻋﺎﻟﻴﺔ )ﻓﺮﻳﻖ اﻟﻌﻤﻞ‪ ،‬اﲣﺎذ اﻟﻘﺮارات‪ ،‬اﻟﺘﺼﻤﻴﻢ‪ ،‬اﻹﺑﺪاع( ﻣﻄﻠﻮﺑﺔ ﳊﻞ ﻣﺸﺎﻛﻞ ﺣﻘﻴﻘﻴﺔ ﻣﻌﻘﺪة‪ ،‬وإﻟﻴﻪ أﺷﺎر اﻟﻌﺪﻳﺪ ﻣﻦ‬
‫اﻟﺒﺎﺣﺜﲔ إﱃ أن اﻟﺘﺤﺪﻳﺎت اﻻﺟﺘﻤﺎﻋﻴﺔ اﳊﻀﺎرﻳﺔ اﳊﺪﻳﺜﺔ ﺗﺘﻄﻠﺐ ﺧﺮﳚﲔ ﻳﺴﺘﻄﻴﻌﻮن ﺣﻞ اﳌﺸﻜﻞ اﳌﻌﻘﺪة ﺑﻄﺮﻳﻘﺔ ﻓﻌﺎﻟﺔ]‪.[598-601‬‬

‫إن اﻟﺘﻌﻠﻢ ﺑﺎﻻﻋﺘﻤﺎد ﻋﻠﻰ ﺣﻞ اﳌﺸﻜﻼت )‪ (PBL‬ﻳﺘﺸﻜﻞ ﻣﻦ ﻣﺸﺎرﻳﻊ ﺗﺘﻜﻮن ﻣﻦ ﻣﻬﺎم ﺗﻌﺘﻤﺪ ﻋﻠﻰ ﲢﺪي اﳌﺸﺎﻛﻞ اﻟﺼﻌﺒﺔ‪ ،‬واﻟﱵ ﺗﺴﺘﻠﺰم‬
‫إﺷﺮاك اﻟﻄﻼب ﰲ ﻋﻤﻠﻴﺔ اﻟﺘﺼﻤﻴﻢ‪ ،‬ﺣﻞ اﳌﺸﻜﻼت‪ ،‬اﲣﺎذ اﻟﻘﺮارات‪ ،‬إﻋﻄﺎء اﻟﻔﺮﺻﺔ ﻟﻠﻄﻼب ﻟﻠﻌﻤﻞ ﺑﻄﺮﻳﻘﺔ ﻣﺴﺘﻘﻠﺔ‪ ،‬واﻟﻨﺘﻴﺠﺔ ﺳﻮف ﺗﺆدي‬
‫إﱃ ﻣﻨﺘﺞ ﺣﻘﻴﻘﻲ ﺗﻄﺒﻴﻘﻲ]‪ [589,590‬واﻟﺬي ﻟﻪ ﺗﺄﺛﲑ ﻣﺒﺎﺷﺮ ﻋﻠﻰ زﻳﺎدة ﺣﺎﻓﺰ وﺗﻔﺎﻋﻞ اﻟﻄﻼب ﲡﺎﻩ اﳌﻮﺿﻮع اﳌﺪروس]‪[593‬؛ اﳌﺸﺎرﻳﻊ ﳚﺐ أن‬
‫ﺗﺘﻀﻤﻦ ﳏﺘﻮى ﺣﻘﻴﻘﻲ أﺻﻴﻞ‪ ،‬ﺗﻘﻴﻴﻢ ﻓﻌﺎل‪ ،‬أﻫﺪاف واﺿﺤﺔ‪ ،‬ودور اﳌﻌﻠﻢ ﻛﻤﻮﺟﻪ]‪ .[591‬ﻛﻤﺎ ﻳﺆّﻛﺪ اﻟﻌﺪﻳﺪ ﻣﻦ اﻟﺒﺎﺣﺜﲔ ﻋﻠﻰ أن اﳌﺸﺎرﻳﻊ‬
‫ﳚﺐ أن ﺗﺘﻀﻤﻦ ﻋﻨﺎﺻﺮ ﻟﻠﺘﻔﻜﲑ واﻟﺘﺄﻣﻞ‪ ،‬اﻟﺘﻌﻠﻢ اﻟﺘﻌﺎوﱐ‪ ،‬وﻣﻬﺎرات ﺧﺎﺻﺔ ﺑﺎﻟﺒﺎﻟﻐﲔ]‪.[592‬‬

‫ﺑﺄن ﻣﻬﺎم ‪ PBL‬ﳚﺐ أن ﺗﻘﺤﻢ اﻟﻄﻼب ﰲ ﻋﻤﻞ ﺑﻨﺎﺋﻲ‪ ،‬وﻫﺬﻩ اﳌﻬﺎم ﳚﺐ أن ﻳﻜﻮن اﻟﻄﻼب اﶈﻮر اﻷﺳﺎﺳﻲ ﻓﻴﻬﺎ ﺑﺸﻜﻞ‬ ‫]‪[593‬‬
‫ﻳﺆﻛﺪ‬
‫ﻃﺒﻴﻌﻲ‪ .‬ﻋﻠﻰ اﻟﺮﻏﻢ ﻣﻦ أﻧﻪ ﻟﻴﺲ ﻫﻨﺎك ﳕﻮذج ﻓﺮﻳﺪ واﺣﺪ ﻟﻠ ـ‪ ،PBL‬ﻛﻤﺎ أن اﻟﺘﻌﺮﻳﻒ ﺣﻮل ﻫﺬا اﳌﻮﺿﻮع ﻳﺘﻔﺎوت إﱃ ﺣﺪ ﻛﺒﲑ‪ ،‬إﻻ أن ﻫﻨﺎك‬
‫ﺑﻌﺾ اﻟﻌﻤﻮﻣﻴﺎت‪ ،‬ﻋﻠﻰ ﺳﺒﻴﻞ اﳌﺜﺎل‪ :‬إن اﻟـ‪ PBL‬ﻟﻴﺲ ﻫﻮ ﻋﺒﺎرة ﻣﻬﺎم ﺑﺪﻳﻬﻴﺔ ﻋﺎدﻳﺔ]‪ ،[593‬إن اﳌﺸﺮوع ﳚﺐ أن ﻳﻜﻮن ﻟﻪ ﻫﺪف واﺿﺢ]‪،[591‬‬
‫ﳚﺐ أن ﳛﺴﻦ اﺳﺘﻘﻼﻟﻴﺔ اﻟﻄﺎﻟﺐ وﻳﻘﻮي وﻳﻌﺰز ﻣﻬﺎرات اﻟﺘﻌﻠﻢ اﻟﺘﺠﺮﻳﺒﻴﺔ ﻟﺪﻳﻬﻢ]‪ ،[594‬ﻳﻄﻮرون ﻣﻬﺎرات ﺣﻞ اﳌﺸﺎﻛﻞ واﻟﱵ ﺗﻌﺘﱪ ﺿﺮورﻳﺔ‬
‫ﻟﻠﺘﻌﻠﻢ ﻃﻮﻳﻞ اﻷﻣﺪ]‪ ،[593‬اﳌﺸﺎرﻳﻊ ﻣﻌﻘﺪة ﺑﺎﻟﻔﻄﺮة وﻫﻢ ﻳﺆﻛﺪون ﻋﻠﻰ وﺟﻮد اﻟﺘﺤﺪﻳﺎت اﻟﻐﲑ ﺑﺪﻳﻬﻴﺔ]‪ ،[589‬واﻟﺘﻌﻠﻢ ﺑﺎﻻﻋﺘﻤﺎد ﻋﻠﻰ ﺣﻞ‬
‫اﳌﺸﺎﻛﻞ]‪.[597‬‬

‫إن اﻟﻮﻇﺎﺋﻒ واﻟﺘﻘﻴﻴﻤﺎت ﻳﻠﻌﺒﺎن دوراً ﻫﺎﻣﺎً ﺟﺪاً ﰲ ﳕﻮذج اﻟﺘﻌﻠﻢ اﻟﻘﺎﺋﻢ ﻋﻠﻰ ﺣﻞ اﳌﺸﻜﻼت‪ ،‬وذﻟﻚ ﻧﻈﺮاً ﳊﻘﻴﻘﺔ أن ﺑﻴﺌﺔ اﻟﺘﻌﻠﻢ اﻟﻘﺎﺋﻢ ﻋﻠﻰ‬
‫ﺣﻞ اﳌﺸﻜﻼت ﻫﻲ ﺗﺴﺘﻨﺪ ﻋﻠﻰ ﻣﺒﺎدئ وأﺳﺲ اﻟﻨﻈﺮﻳﺔ اﻟﺒﻨﺎﺋﻴﺔ]‪.[596‬‬

‫اﻟﺸﻜﻞ‪Problem-based Learning Concept-Map 7-4‬‬

‫‪ 2-3-3-4-4-4‬اﳌﻼﻣﺢ اﻟﺮﺋﻴﺴﻴﺔ ﻟﻠﺘﻌﻠﻢ اﻟﻘﺎﺋﻢ ﻋﻠﻰ ﺣﻞ اﳌﺸﻜﻼت )‪:(The Main Characteristics of PBL‬‬
‫ﻳﺘﻀﻤﻦ اﻟﺘﻌﻠﻢ اﻟﻘﺎﺋﻢ ﻋﻠﻰ ﺣﻞ اﳌﺸﻜﻼت ﺛﻼث ﻣﻼﻣﺢ رﺋﻴﺴﻴﺔ‪:‬‬

‫‪ ‬أوﻻً‪ :‬إن اﻟـ‪ PBL‬ﻳﺘﺄﻟﻒ ﻣﻦ ﻣﺸﻜﻠﺔ ﻳﺘﻢ ﺗﺼﻤﻴﻤﻬﺎ ﺑﺪﻗﺔ ﲝﺚ ﺗﻜﻮن ذات ﺻﻠﺔ ﲟﻮﺿﻮع اﺧﺘﺼﺎص اﻟﻄﺎﻟﺐ‪ ،‬ﻫﺬﻩ اﳌﺸﻜﻠﺔ ﳚﺐ‬
‫أن ﺗﻜﻮن ﳏﻔﺰة‪ ،‬وﺗﻔﺮض ﻋﻠﻰ اﻟﻄﻼب اﺳﺘﺨﺪام اﻟﻌﺪﻳﺪ ﻣﻦ اﻻﺳﱰاﺗﻴﺠﻴﺎت ﺣﻞ اﳌﺸﻜﻼت‪.‬‬
‫‪ ‬ﺛﺎﻧﻴﺎً‪ :‬ﻳﺘﻌﻠﻢ اﻟﻄﻼب ﰲ ﺑﻴﺌﺔ ﺗﺴﺘﻠﺰم ﻛﻼً ﻣﻦ اﻻﺳﺘﻘﻼل اﻟﺬاﰐ واﳌﺸﺎرﻛﺔ ﰲ ﳎﻤﻮﻋﺎت ﻋﻤﻞ ﻣﺼﻐﺮة‪.‬‬

‫‪215‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Engineering Education Methodologies‬‬ ‫ﻣﻨﻬﺠﻴﺎت اﻟﺘﻌﻠﻴﻢ اﳍﻨﺪﺳﻲ |‬

‫‪ ‬ﺛﺎﻟﺜﺎً‪ :‬دور ٍ‬
‫ﻛﻞ ﻣﻦ اﳌﻌﻠﻢ واﻟﻄﻼب ﳐﺘﻠﻒ ﻋﻦ اﻟﺘﻌﻠﻴﻢ اﻟﺘﻘﻠﻴﺪي‪ ،‬ﺣﻴﺚ ﻳﺄﺧﺬ اﻟﻄﻼب ﻣﺴﺆوﻟﻴﺔ أﻛﱪ ﰲ ﺑﻴﺌﺔ اﻟﺘﻌﻠﻢ اﻟﻔﻌﺎل اﻟﱵ‬
‫ﻳﻜﻮن ﻓﻴﻬﺎ اﳌﻌﻠﻢ ﻛﻤﺮﺷﺪ ﻟﻠﻌﻤﻠﻴﺔ اﻟﺘﻌﻠﻴﻤﻴﺔ‪.‬‬

‫‪ 3-3-3-4-4-4‬ﳑﻴﺰات اﺳﱰاﺗﻴﺠﻴﺔ اﻟﺘﻌﻠﻢ اﻟﻘﺎﺋﻢ ﻋﻠﻰ ﺣﻞ اﳌﺸﻜﻼت )‪:(Benefits of PBL Strategy‬‬

‫ﻳﺘﻤﻴﺰ اﻟﺘﻌﻠﻢ اﻟﻘﺎﺋﻢ ﻋﻠﻰ ﺣﻞ اﳌﺸﻜﻼت ﲟﺎ ﻳﻠﻲ‪:‬‬
‫‪ ‬ﺒﺪأ اﻟﺘﻌﻠﻢ ﲟﺸﻜﻠﺔ ﺗﻘﻮد اﻟﺒﺤﺚ واﻻﺳﺘﻘﺼﺎء‪ ،‬وﺗﻜﻮن ﻫﺬﻩ اﳌﺸﻜﻠﺔ ﻣﺸﺎﻬﺑﺔ ﻟﻠﻤﺸﻜﻼت اﳊﻘﻴﻘﻴﺔ‪.‬‬
‫‪ ‬ﻜﻮن اﳌﺘﻌﻠﻢ ﻃﺮﻓﺎً ذا ﻋﻼﻗﺔ أﺳﺎﺳﻴﺔ ﺑﺎﳌﺸﻜﻠﺔ‪ ،‬وﻳﻜﻮن دورﻫﻢ أن ﻳﻘﺪﻣﻮا اﳊﻞ ﺑﺸﻜﻞ ﻳﺘﻄﻠﺐ ﻣﻨﻬﻢ أﳕﺎط ﺗﻔﻜﲑ ﻣﺸﺎﻬﺑﺔ ﻷﳕﺎط‬
‫ﺘﻔﻜﲑ ﻟﺪى اﳋﱪاء ﰲ ﺷﱴ اﳊﻘﻮل واﺠﻤﻟﺎﻻت اﳌﻌﺮﻓﻴﺔ‪.‬‬
‫‪ ‬ﲢﻔﻴﺰ اﳌﺘﻌﻠﻢ ﻋﻠﻰ اﻟﺘﻌﻠﻢ ﻧﻈﺮاً ﻟﺸﻌﻮرﻫﻢ ﺑﺄن اﻟﻌﻤﻠﻴﺔ اﻟﺘﻌﻠﻴﻤﻴﺔ ﺳﺘﻘﺪم ﺣﻠﻮﻻ ﻹﺷﻜﺎﻻت ﻣﻌﺮﻓﻴﺔ أو ﺳﻠﻮﻛﻴﺔ أو وﺟﺪاﻧﻴﺔ‪ ،‬وذﻟﻚ ﻣﻦ‬
‫ﺧﻼل اﻻﻧﺪﻣﺎج ﰲ ﻣﺸﺎﻛﻞ ﺣﻘﻴﻘﻴﺔ‪ ،‬وﻣﻦ ﺧﻼل اﻟﻌﻤﻞ اﻟﺘﻌﺎوﱐ‪.‬‬
‫‪ ‬ﺗﻨﻤﻲ ﻟﺪى اﳌﺘﻌﻠﻢ ﺣﺐ اﻟﺒﺤﺚ واﻟﺘﻌﻠﻢ اﳉﻤﺎﻋﻲ )داﺧﻞ اﻟﺒﻴﺌﺔ اﻟﺘﻌﻠﻴﻤﻴﺔ( واﻟﺘﻌﻠﻢ اﻟﺬاﰐ )ﺧﺎرج اﻟﺒﻴﺌﺔ اﻟﺘﻌﻠﻴﻤﻴﺔ(‪.‬‬
‫‪ ‬ﻳﺒﺪأ اﳌﻌﻠﻢ ﺑﻨﻤﺬﺟﺔ ﻃﺮق اﻟﺘﻌﻠﻢ‪ ،‬وﻣﻦ ﰒ ﻳﻘﺪم اﻹرﺷﺎدات وﻳﺸﺠﻊ اﻟﻄﻼب ﻋﻠﻰ اﻟﺘﻔﻜﲑ اﻟﻨﺎﻗﺪ‪ ،‬ﰒ ﻳﻀﻌﻒ دورﻩ ﻛﻤﺴﺎﻧﺪ ﻟﻠﺘﻌﻠﻢ ﺣﱴ‬
‫ﳜﺘﻔﻲ ﺗﺪرﳚﻴﺎً‪ ،‬وﻳﺼﺒﺢ اﻟﻄﻠﺒﺔ ﻣﺘﻌﻠﻤﲔ ﻣﺴﺘﻘﻠﲔ وﻳﻮﺟﻬﻮن ﺗﻌﻠﻤﻬﻢ ﺑﺄﻧﻔﺴﻬﻢ‪.‬‬
‫‪ ‬ﲤ ّﻜﻦ اﳌﺘﻌﻠﻢ ﻣﻦ ﻧﻘﻞ ﻣﻬﺎرات اﻟﺘﻔﻜﲑ وأﺳﺎﻟﻴﺐ ﺣﻞ اﳌﺸﻜﻼت ﻣﻦ ﻣﻮﺿﻮع ﻵﺧﺮ وﻣﻦ اﳌﻮاﻗﻒ اﳌﺪرﺳﻴﺔ إﱃ اﳊﻴﺎة ﻋﻨﺪﻣﺎ ﻳﻄﺒﻖ اﻟﺘﻌﻠﻢ‬
‫اﻟﻘﺎﺋﻢ ﻋﻠﻰ ﺣﻞ اﳌﺸﻜﻼت ﺑﺸﻜﻞ ﻣﺘﻜﺮر‪.‬‬
‫‪ ‬إﻣﻜﺎﻧﻴﺔ اﺳﺘﺜﻤﺎر ﲨﻴﻊ اﳌﻬﺎرات واﻟﻘﺪرات اﻟﱵ ﳝﺘﻠﻜﻬﺎ اﳌﺘﻌﻠﻢ ﰲ اﻟﺒﺤﺚ ﻋﻦ ﺣﻞ ﻟﻠﻤﺸﻜﻠﺔ‪ ،‬وﻫﺬا ﻳﺪﻋﻢ ﻗﻮة اﻻﻗﱰاح واﻻﺑﺘﻜﺎر‬
‫واﻟﺘﺤﻠﻴﻞ واﻟﺒﻨﺎء ﻟﺪﻳﻪ‪.‬‬
‫‪ ‬ﻳﺮﺑﻂ ﺑﲔ اﳉﺎﻧﺒﲔ اﻟﻨﻈﺮي واﻟﺘﻄﺒﻴﻘﻲ ﰲ ذﻫﻦ اﳌﺘﻌﻠﻢ‪ ،‬وﻫﺬا ﻣﻦ ﺷﺄﻧﻪ أن ﻳﺮﺑﻂ اﳌﺆﺳﺴﺔ اﻟﺘﻌﻠﻴﻤﻴﺔ ﲟﺤﻴﻄﻬﺎ وﻳﻔﻌﻞ رﺳﺎﻟﺔ اﻟﺘﻌﻠﻴﻢ ﰲ‬
‫ﺟﺎﺑﺔ ﻋﻦ اﻷﺳﺌﻠﺔ اﳌﻠﺤﺔ ﰲ اﺠﻤﻟﺘﻤﻊ‪.‬‬
‫‪ ‬ن اﻟﺘﻌﻠﻢ اﻟﺬي ﺗﻘﻮدﻩ اﳌﺸﻜﻼت ﻳﺸﻜﻞ ﳕﻮذﺟﺎً ﻣﺸﺎﻬﺑﺎً ﳌﺎ ﳛﺼﻞ ﰲ اﻟﻮاﻗﻊ‪ ،‬وﳛﻔﺰ اﳌﺘﻌﻠﻤﲔ ﻋﻠﻰ أن ﻳﻜﻮﻧﻮا ﻣﺒﺪﻋﲔ وﻗﺎدرﻳﻦ ﻋﻠﻰ‬
‫ﺣﻞ ﻣﺸﻜﻼت ﺣﻘﻴﻘﻴﺔ‪ ،‬وأن ﻳﺘﻐﻠﺒﻮا ﻋﻠﻰ اﻟﻌﻘﺒﺎت اﻟﱵ ﺗﻮاﺟﻬﻬﻢ‪.‬‬

‫‪ 4-3-3-4-4-4‬اﳌﺒﺎدئ اﻟﺘﻮﺟﻴﻬﻴﺔ ﻟﺘﺼﻤﻴﻢ ﻣﺸﻜﻠﺔ )‪:(Guidelines for the PBL Problem Design‬‬
‫إن ﻣﺴﺄﻟﺔ ﺗﺼﻤﻴﻢ اﳌﺸﻜﻠﺔ ﰲ اﻟﺘﻌﻠﻢ اﻟﻘﺎﺋﻢ ﻋﻠﻰ ﺣﻞ اﳌﺸﻜﻼت ﻳﻌﺘﱪ أﻣﺮاً ﺑﺎﻟﻎ اﻷﳘﻴﺔ ﻟﻨﺠﺎح ﻫﺬﻩ اﻻﺳﱰاﺗﻴﺠﻴﺔ‪ ،‬ﺣﻴﺚ ﻳﻮﺟﺪ ﺑﻌﺾ اﳌﺒﺎدئ‬
‫اﻟﺘﻮﺟﻴﻬﻴﺔ اﻷﺳﺎﺳﻴﺔ اﻟﱵ ﳚﺐ اﺗﺒﺎﻋﻬﺎ ﻋﻨﺪ ﺗﺼﻤﻴﻢ اﳌﺸﻜﻠﺔ وﻫﻲ‪:‬‬
‫‪ -‬إن اﳌﺸﺎﻛﻞ ﳚﺐ أن ﺗﺘﻤﺤﻮر ﺣﻮل ﻣﻮﺿﻮع ﺷﺎﺋﻊ وﺿﻤﻦ ﺣﻘﻞ ﺗﻌﻠﻢ اﻟﻄﻼب‪ ،‬ﻛﻤﺎ أن اﳌﻌﻠﻮﻣﺎت واﳌﻮارد اﻷﺳﺎﺳﻴﺔ واﻟﻼزﻣﺔ‬
‫ﳌﻮﺿﻮع اﳌﺸﻜﻠﺔ ﳚﺐ أن ﺗﻜﻮن ﻣﺘﺎﺣﺔ ﻟﻠﻄﻼب أﻳﻀﺎً‪.‬‬
‫‪ -‬إن اﳌﺸﺎﻛﻞ ﳚﺐ أن ﺗﺼﻤﻢ ﺑﺸﻜﻞ ﻫﺮﻣﻲ ﲝﻴﺚ أن ﻛﻞ ﻣﺸﻜﻠﺔ ﻫﻲ دﻋﺎﻣﺔ أﺳﺎﺳﻴﺔ وﻣﺮﺗﻜﺰ ﳊﻞ اﳌﺸﻜﻠﺔ اﻟﺘﺎﻟﻴﺔ‪ ،‬وﻟﻜﻦ ﻛﻞ‬
‫ﻣﺸﻜﻠﺔ ﺗﺒﲎ ﻋﻠﻰ ﳎﻤﻮﻋﺔ ﳐﺘﻠﻔﺔ ﻣﻦ اﳌﻬﺎرات‪.‬‬
‫‪ -‬ن اﳌﺸﺎﻛﻞ ﳚﺐ أن ﺗﺼﻤﻢ ﻬﺑﺪف اﻻرﺗﻘﺎء ﲟﻮﺿﻮﻋﺎت اﻟﺘﺴﺎؤﻻت ﲝﻴﺚ ﺗﺸﻤﻞ ﻣﺴﺘﻮﻳﺎت اﻹدراك اﳌﻌﺮﰲ ﻛﺎﻓﺔ‪.‬‬
‫‪ -‬ﳚﺐ ﺗﺰوﻳﺪ اﻟﻄﻼب ﲟﻌﻠﻮﻣﺎت إﺿﺎﻓﻴﺔ )ﻣﺜﻼً‪ :‬ﻧﺘﺎﺋﺞ أوﻟﻴﺔ( ﺑﻌﺪ اﻛﺘﻤﺎل أول ﳎﻤﻮﻋﺔ ﻣﻦ أﻫﺪاف اﻟﺘﻌﻠﻢ‪.‬‬
‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪216‬‬
‫‪24‬‬ ‫اﻟﻔﺼﻞ اﻟﺮاﺑﻊ | ‪Chapter 4‬‬

‫‪ -‬ﻣﺪرس اﳌﻘﺮر ﻻ ﳛﺘﺎج أن ﻳﻜﻮن ﺧﺒﲑاً‪ ،‬وإﳕﺎ ﳛﺘﺎج ﻓﻘﻂ إﱃ ﻳﻌﲔ اﳌﻮﺿﻮﻋﺎت اﻟﱵ ﻳﻨﺒﻐﻲ ﻋﻠﻰ اﻟﻄﻼب ﻣﻨﺎﻗﺸﺘﻬﺎ ﺿﻤﻦ ﻓﺮﻳﻖ‬
‫وﻳﻘﻮم ﻋﻠﻰ إرﺷﺎدﻫﻢ ﺧﻼل اﳌﻨﺎﻗﺸﺔ‪.‬‬
‫‪ -‬ﳝﻜﻦ اﻻﺳﺘﻌﺎﻧﺔ ﺑﻮﺳﺎﺋﻞ اﻟﺘﻮﺿﻴﺢ اﳌﺮﺋﻴﺔ ﻟﻌﺮض اﳌﺸﻜﻠﺔ إذا اﺣﺘﺎج اﻷﻣﺮ‪.‬‬
‫‪ -‬اﳌﺸﺎﻛﻞ اﳌﻄﺮوﺣﺔ ﳚﺐ أن ﺗﻌﺎﰿ اﻟﻘﻀﺎﻳﺎ اﳊﻘﻴﻘﻴﺔ‪ ،‬وذﻟﻚ ﻷﻧﻪ ﻣﻦ اﻟﺼﻌﺐ ﺟﺪاً ﻋﻠﻰ اﻟﻄﻼب إﻧﺸﺎء ﻣﺸﻜﻠﺔ ﳍﺎ ﳎﻤﻮﻋﺔ ﻣﺘﻨﺎﺳﻘﺔ‬
‫ﻣﻦ اﳌﻌﻠﻮﻣﺎت‪ ،‬ﻛﻤﺎ أن اﳌﺸﺎﻛﻞ اﳊﻘﻴﻘﻴﺔ اﻟﻮاﻗﻌﻴﺔ ﺗﻌﺰز دواﻓﻊ اﻟﺘﻌﻠﻢ ﻟﻠﻄﻼب‪ ،‬وذﻟﻚ ﻷ�ﻢ ﻳﺴﻌﻮن ﳌﻌﺮﻓﺔ ﻧﺘﺎﺋﺞ وﺣﻠﻮل ﻫﺬﻩ‬
‫اﳌﺴﺎﺋﻞ اﻟﻮاﻗﻌﻴﺔ‪.‬‬
‫‪ -‬إن ﺗﺼﻤﻴﻢ ﻣﺸﻜﻠﺔ ﳍﺎ ﺣﻞ ﺑﺪﻳﻬﻲ ﻳﻌﺘﱪ أﻣﺮاً ﻏﲑ ﻓﻌﺎل ﻟﺘﻄﻮﻳﺮ ﺗﻔﻜﲑ وﻣﻨﻄﻖ اﻻﺳﺘﻨﺘﺎج واﻟﺘﻮﺟﻴﻪ اﻟﺬاﰐ ﳌﻬﺎرات اﻟﺘﻌﻠﻢ ﻟﻠﻄﻼب‪،‬‬
‫وﺑﺎﻟﺘﺎﱄ ﻓﺈن اﳌﺸﺎﻛﻞ ﳚﺐ أن ﺗﻜﻮن ﻏﲑ ﻣﺄﻟﻮﻓﺔ‪ ،‬ﺟﺪﻳﺪة‪ ،‬وﻣﻌﻘﺪة ﲟﺎ ﻓﻴﻪ اﻟﻜﻔﺎﻳﺔ ﺑﺎﻟﻨﺴﺒﺔ ﳍﻢ‪.‬‬
‫‪ -‬ﳚﺐ أن ﺗﺼﻤﻢ اﳌﺸﺎﻛﻞ ﲝﻴﺚ ﻳﻜﻮن ﻟﻠﻄﻼب ﻣﻌﺮﻓﺔ ﻣﺴﺒﻘﺔ ﲟﻮﺿﻮﻋﻬﺎ‪ ،‬ذﻟﻚ ﻬﺑﺪف ﲢﻔﻴﺰ اﻟﻄﻼب ﺑﺸﻜﻞ ﻓﻌﺎل ﳊﻞ اﳌﺸﻜﻠﺔ‪.‬‬
‫‪ -‬إن ﻋﻤﻠﻴﺔ اﻟﺘﻌﻠﻢ وﺣﻞ اﳌﺸﻜﻼت ﳚﺐ أن ﺗﺘﻢ ﰲ ﳎﻤﻮﻋﺎت ﺻﻐﲑة )ﻣﺆﻟﻔﺔ ﻣﻦ ﺛﻼث إﱃ ﲬﺲ ﻃﻼب( ﻷ�ﺎ اﻟﻄﺮﻳﻘﺔ اﻷﻣﺜﻞ‬
‫واﻷﻛﺜﺮ ﻓﺎﺋﺪة ﻟﻌﻤﻠﻴﺔ اﻟﺘﻌﻠﻢ ﺿﻤﻦ ﻓﺮﻳﻖ ﻋﻤﻞ‪.‬‬

‫‪ 5-3-3-4-4-4‬ﻣﻨﻬﺠﻴﺔ ﺗﻄﺒﻴﻖ اﻟﺘﻌﻠﻢ اﻟﻘﺎﺋﻢ ﻋﻠﻰ ﺣﻞ اﳌﺸﻜﻼت )‪:(The Process of PBL‬‬

‫ﺗﻌﺘﱪ ﻣﻨﻬﺠﻴﺔ اﻟﺘﻌﻠﻢ اﻟﻘﺎﺋﻢ ﻋﻠﻰ ﺣﻞ اﳌﺸﻜﻼت ﻣﻨﻬﺠﻴﺔ دورﻳﺔ )‪ (Cycle‬ﺗﺘﺄﻟﻒ دورة ﺣﻞ اﳌﺸﻜﻠﺔ ﻓﻴﻬﺎ ﻣﻦ ﲬﺴﺔ ﻣﺮاﺣﻞ ‪ -‬اﻟﺸﻜﻞ‪.8-4‬‬

‫‪Problem‬‬

‫‪Solution‬‬ ‫‪Ideas‬‬

‫‪Resources‬‬ ‫‪Knowledge‬‬

‫اﻟﺸﻜﻞ‪ 8-4‬ﻣﺮاﺣﻞ دورة اﻟﻌﻠﻢ اﻟﻘﺎﺋﻢ ﻋﻠﻰ ﺣﻞ اﳌﺸﻜﻼت‬

‫اﻟﻌﻤﻠﻴﺎت‬ ‫اﻟﻤﺮﺣﻠﺔ‬
‫ﺘﻢ ﻓﻴﻬﺎ ﲢﺪﻳﺪ اﳌﺸﻜﻠﺔ وﻋﻨﺎﺻﺮﻫﺎ اﻷﺳﺎﺳﻴﺔ وﲨﻴﻊ اﻷﻣﻮر اﳌﺮﺗﺒﻄﺔ ﻬﺑﺎ‪.‬‬ ‫‪Problem‬‬
‫ﻣﻨﺎﻗﺸﺔ اﻷﻓﻜﺎر اﳌﺮﺗﺒﻄﺔ وﲢﺪﻳﺪ ﻣﺎ ﻳﻌﺮﻓﻪ اﻟﻄﻼب ﻣﺴﺒﻘﺎً )‪ (prior-knowledge‬ﻋﻦ اﳌﻮﺿﻮﻋﺎت اﳌﺮﺗﺒﻄﺔ ﺑﺎﳌﺸﻜﻠﺔ‬ ‫‪Ideas‬‬
‫‪ Knowledge‬ﻣﻨﺎﻗﺸﺔ ﻋﻦ أي ﺷﻲء ﳚﺐ أن ﻧﺒﺤﺚ وﻣﻦ أﻳﻦ ﻧﺒﺪأ ﳊﻞ اﳌﺸﻜﻠﺔ‪.‬‬
‫ﻣﺎﻫﻲ اﳌﺼﺎدر اﻷﺳﺎﺳﻴﺔ اﻟﱵ ﺳﻮف ﻧﺴﺘﺨﺪﻣﻬﺎ ﰲ ﺣﻞ اﳌﺸﻜﻠﺔ وﻛﻴﻒ ﻧﺼﻞ إﻟﻴﻬﺎ وﻧﺴﺘﻔﻴﺪ ﻣﻨﻬﺎ‪ ،‬اﳌﺼﺎدر ﻗﺪ ﺗﻜﻮن‪ :‬اﻟﻜﺘﺐ‪ ،‬اﳌﻘﺎﻻت‪،‬‬
‫‪Resources‬‬
‫اﻟﺘﻘﺎرﻳﺮ‪ ،‬ﻣﻮاﻗﻊ اﻹﻧﱰﻧﺖ‪ ،‬أو ﺣﱴ اﺳﺘﺸﺎرة اﳌﺨﺘﺼﲔ ﻣﻦ ﺣﻘﻮل ﻣﻌﺮﻓﻴﺔ ﳐﺘﻠﻔﺔ‪... ،‬‬
‫ﻣﻨﺎﻗﺸﺔ اﳊﻠﻮل اﳌﺜﻠﻰ ﻟﻠﻤﺸﻜﻠﺔ‪ ،‬وﳌﺎذا؟ ﻣﻨﺎﻗﺸﺔ اﻹﳚﺎﺑﻴﺎت واﻟﺴﻠﺒﻴﺎت ﻟﻠﺤﻠﻮل اﳌﻘﱰﺣﺔ‪.‬‬ ‫‪Solutions‬‬

‫اﳉﺪول‪ 3-4‬اﻟﻌﻤﻠﻴﺎت ﺿﻤﻦ ﻣﺮاﺣﻞ دورة اﻟﻌﻠﻢ اﻟﻘﺎﺋﻢ ﻋﻠﻰ ﺣﻞ اﳌﺸﻜﻼت‬

‫‪217‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Engineering Education Methodologies‬‬ ‫ﻣﻨﻬﺠﻴﺎت اﻟﺘﻌﻠﻴﻢ اﳍﻨﺪﺳﻲ |‬

‫ﻳﻮﺟﺪ اﻟﻌﺪﻳﺪ ﻣﻦ اﻷﲝﺎث اﻟﱵ ﺗﺼﻒ ﺳﲑ ﻋﻤﻞ ﻣﻨﻬﺠﻴﺔ اﻟﺘﻌﻠﻢ اﻟﻘﺎﺋﻢ ﻋﻠﻰ ﺣﻞ اﳌﺸﻜﻼت]‪ .[616-618‬ﺑﺸﻜﻞ ﻋﺎم ﺗﺘﻀﻤﻦ ﻣﻨﻬﺠﻴﺔ اﻟﺘﻌﻠﻢ‬
‫اﻟﻘﺎﺋﻢ ﻋﻠﻰ ﺣﻞ اﳌﺸﻜﻼت اﳋﻄﻮات اﳌﻮﺿﺤﺔ ﻋﻠﻰ اﳌﺨﻄﻂ اﻟﺘﺪﻓﻘﻲ اﳌﻨﻬﺠﻲ ﰲ اﻟﺸﻜﻞ‪.9-4‬‬

‫إن ﻋﻤﻠﻴﺔ ﺗﻨﻈﻴﻢ اﻷﻓﻜﺎر واﻟﻔﺮﺿﻴﺎت )‪ (Organizing the Ideas‬ﺗﺘﻢ ﻣﻦ ﺧﻼل اﻟﺘﻮاﺻﻞ واﻟﺘﺤﺎور وﺗﻘﻴﻢ اﳌﻔﺎﻫﻴﻢ ﺑﻨﺎءً ﻋﻠﻰ اﳌﻌﻠﻮﻣﺎت‬
‫اﻷوﻟﻴﺔ اﳌﺘﻮﻓﺮة ﻟﺪى أﻓﺮاد اﻟﻔﺮﻳﻖ‪.‬‬

‫إن ﻋﻤﻠﻴﺔ اﻟﺘﻘﻴﻴﻢ )‪ Evaluation‬ﻬﺗﺪف إﱃ ﲢﺪﻳﺪ اﻟﻨﺎﺗﺞ اﳌﻌﺮﰲ واﻟﻔﻬﻢ ﻟﻠﻄﻼب ﻣﻦ ﻫﺬﻩ اﻟﻌﻤﻠﻴﺔ‪ ،‬وﲢﺪﻳﺪ ﻓﻴﻤﺎ إذا ﻛﺎن اﻟﻄﻼب ﻣﺎ‬
‫ﻳﺰاﻟﻮن ﳛﺘﺎﺟﻮن إﱃ ﺗﻌﻠﻢ ﻣﻮﺿﻮﻋﺎت أﺧﺮى ﻣﺮﺗﺒﻄﺔ ﻻﺳﺘﻜﻤﺎل ﻋﻤﻠﻴﺔ اﻟﺘﻌﻠﻢ‪.‬‬

‫‪Identifying the Problem‬‬

‫ﲢﺪﻳﺪ ﻫﻮﻳﺔ اﳌﺸﻜﻠﺔ‬
‫]‪The Problem [Data‬‬

‫‪Generating Ideas‬‬ ‫‪Re-generating Ideas‬‬

‫ﻃﺮح اﻷﻓﻜﺎر واﳊﻠﻮل‬ ‫ﻃﺮح اﻷﻓﻜﺎر واﳊﻠﻮل‬

‫‪Organizing Ideas‬‬ ‫‪Re-organizing Ideas‬‬

‫ﺗﻨﻈﻴﻢ اﻷﻓﻜﺎر واﳊﻠﻮل‬ ‫إﻋﺎدة ﺗﻨﻈﻴﻢ اﻷﻓﻜﺎر‬
‫]‪The Ideas [Hypotheses‬‬

‫‪Deriving Learning Needs‬‬

‫ﺗﻌﻴﲔ ﻣﺎ ﳛﺘﺎج ﻟﺘﻌﻠﻤﻪ‬

‫‪Re-organizing Learning Needs‬‬ ‫‪Organizing Learning Needs‬‬

‫إﻋﺎدة ﺗﻨﻈﻴﻢ ﻣﺎ ﳛﺘﺎج ﻟﺘﻌﻠﻤﻪ‬ ‫ﺗﻨﻈﻴﻢ ﻣﺎ ﳛﺘﺎج ﻟﺘﻌﻠﻤﻪ‬

‫‪Learning Resources‬‬ ‫‪Test the Ideas‬‬ ‫‪Revise the Ideas‬‬

‫‪New Knowledge‬‬
‫ﻣﺼﺎدر اﻟﺘﻌﻠﻢ‬ ‫اﺧﺘﺒﺎر اﻷﻓﻜﺎر واﳊﻠﻮل‬ ‫ﺗﻌﺪﻳﻞ اﻷﻓﻜﺎر واﳊﻠﻮل‬

‫‪Knowledge & Resources‬‬

‫‪Build Solution‬‬ ‫‪Reject‬‬

‫?‪OK‬‬
‫ﺑﻨﺎء اﻟﺘﻄﺒﻴﻖ‬ ‫رﻓﺾ‬

‫‪Evaluation-Conclusion‬‬
‫ﺗﻘﻴﻴﻢ وﻧﺘﻴﺠﺔ‬

‫اﻟﺸﻜﻞ‪ 9-4‬اﳌﺨﻄﻂ اﳌﻨﻬﺠﻲ ﻟﻌﻤﻠﻴﺔ اﻟﺘﻌﻠﻢ اﻟﻘﺎﺋﻢ ﻋﻠﻰ ﺣﻞ اﳌﺸﻜﻼت‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪218‬‬
‫‪24‬‬ ‫اﻟﻔﺼﻞ اﻟﺮاﺑﻊ | ‪Chapter 4‬‬

‫إن ﻣﺮﺣﻠﺔ ﺑﻨﺎء اﻟﺘﻄﺒﻴﻖ ﳚﺐ أن ﺗﺮﺗﺒﻂ ﲟﻨﻬﺠﻴﺔ ﺗﺪﻋﻰ ”‪ “Hands-on Learning‬واﻟﱵ ﺳﻮف ﻧﻘﺪﻣﻬﺎ ﻓﻴﻤﺎ ﻳﺄﰐ‪.‬‬

‫‪ 6-3-3-4-4-4‬دور اﳌﻌﻠﻢ ﰲ ﻣﻨﻬﺠﻴﺔ اﻟﺘﻌﻠﻢ اﻟﻘﺎﺋﻢ ﻋﻠﻰ ﺣﻞ اﳌﺸﻜﻼت )‪:(Teacher Role in PBL Process‬‬
‫ﻣﻦ اﳌﻬﻢ ﺟﺪاً ﻗﺒﻞ اﻟﺒﺪء ﰲ اﳌﻘﺮر اﻟﺘﻌﻠﻴﻤﻲ اﳌﺴﺘﻨﺪ إﱃ ﻣﻨﻬﺠﻴﺔ اﻟﺘﻌﻠﻢ اﻟﻘﺎﺋﻢ ﻋﻠﻰ ﺣﻞ اﳌﺸﻜﻼت ﺗﻮﺿﻴﺢ ﻣﻔﻬﻮم ﻫﺬﻩ اﻻﺳﱰاﺗﻴﺠﻴﺔ واﻟﻔﺎﺋﺪة‬
‫ﻣﻨﻬﺎ ﻟﻠﻄﻼب‪ .‬اﳉﺪول‪ 4-4‬ﻳﺒﲔ دور اﳌﻌﻠﻢ ﺧﻼل ﻋﻤﻠﻴﺔ اﻟﺘﻌﻠﻢ ﻣﻦ أﺟﻞ ﻛﻞ ﻣﺮﺣﻠﺔ ﻣﻦ ﻣﺮاﺣﻞ ﳕﻮذج اﻟﺘﻌﻠﻢ اﻟﻘﺎﺋﻢ ﻋﻠﻰ ﺣﻞ اﳌﺸﻜﻼت‪.‬‬

‫دو اﻟﻤﻌﻠﻢ‬ ‫اﻟﻤﺮﺣﻠﺔ‬

‫ﺗﻘﺪﱘ اﳌﺸﻜﻠﺔ واﳌﻔﺎﻫﻴﻢ اﻟﻌﺎﻣﺔ اﳌﺮﺗﺒﻄﺔ ﺑﺎﺳﺘﺨﺪام وﺳﺎﺋﻞ اﻹﻳﻀﺎح اﳌﺨﺘﻠﻔﺔ )رﺳﻮﻣﺎت‪ ،‬ﳐﻄﻄﺎت‪ ،‬ﻋﺮوض(‪.‬‬ ‫‹‬
‫ﲢﺪﻳﺪ ﻫﻮﻳﺔ اﳌﺸﻜﻠﺔ‬
‫اﻻﺳﺘﻌﻼم ﻣﻦ اﻟﻄﻼب ﻓﻴﻤﺎ إذا ﻛﺎن ﻟﺪﻳﻬﻢ ﻣﻌﺮﻓﺔ أو ﺧﱪة ﺳﺎﺑﻘﺔ ﲟﻮﺿﻮع اﳌﺸﻜﻠﺔ اﳌﻄﺮوﺣﺔ‪.‬‬ ‫‹‬

‫ﺗﻘﺴﻴﻢ اﻟﻄﻼب إﱃ ﳎﻤﻮﻋﺎت ﻣﻜﻮﻧﺔ ﻣﻦ ‪ 5~10‬ﻼب‪ ،‬وﻳﻔﻀﻞ أن ﺗﻜﻮن ﻣﺴﺘﻮﻳﺎﻬﺗﻢ ﳐﺘﻠﻔﺔ‪.‬‬ ‫‹‬
‫اﻟﺘﺄﻛﺪ ﻣﻦ أن اﻟﻄﻼب ﻳﻔﻬﻤﻮن اﳌﺸﻜﻠﺔ‬ ‫‹‬ ‫ﻃﺮح اﻷﻓﻜﺎر‬
‫اﻟﺘﺄﻛﻴﺪ ﻋﻠﻰ أﻧﻪ داﺋﻤﺎً ﻳﻮﺟﺪ أﻛﺜﺮ ﻣﻦ ﺣﻞ ﻟﻠﻤﺸﻜﻠﺔ‪ ،‬وﻟﻜﻦ ﳚﺐ ﲢﺪﻳﺪ اﳊﻞ اﻷﻧﺴﺐ وﺗﻮﺿﻴﺢ ﳌﺎذا؟‬ ‫‹‬ ‫&‬
‫ﻳﺘﻴﺢ ﻟﻠﻄﻼب اﺳﺘﺨﺪام ﻣﺼﺎدر اﻟﺘﻌﻠﻢ )اﻷﻧﱰﻧﺖ‪ ،‬اﻟﻜﺘﺐ‪ ،‬اﻷوراق اﻟﺒﺤﺜﻴﺔ‪.(... ،‬‬ ‫‹‬ ‫ﺣﺎﺟﺎت اﻟﺘﻌﻠﻢ‬
‫اﻟﺘﺄﻛﺪ ﻣﻦ أن اﻟﻄﻼب ﻣﺪرﻛﲔ ﻟﻠﻤﺼﺎدر اﻟﺘﻌﻠﻴﻤﻴﺔ اﳌﺘﻮﻓﺔ ﻟﺪﻳﻬﻢ واﺳﺘﺜﻤﺎرﻫﺎ ﺑﺎﻟﺸﻜﻞ اﻟﺼﺤﻴﺢ‪.‬‬ ‫‹‬

‫ﻣﺮاﻗﺒﺔ اﻟﻄﻼب وﺗﺰوﻳﺪﻫﻢ ﺑﺎﻟﺪﻋﻢ ﻋﻨﺪ اﳊﺎﺟﺔ )ﺑﺪون اﻟﺘﺄﺛﲑ أو اﻟﺘﺤﻜﻢ ﰲ ﻧﺸﺎﻃﻬﻢ ﰲ ﺣﻞ اﳌﺸﻜﻠﺔ(‪.‬‬ ‫‹‬
‫اﺧﺘﺒﺎر اﻷﻓﻜﺎر‬
‫ﻳﺪﻗﻖ‪ ،‬ﻳﺄﺧﺬ ﻣﻼﺣﻈﺎت ﺧﻼل ﻋﻤﻠﻴﺔ اﳌﺸﺎرﻛﺔ‪.‬‬ ‫‹‬

‫ﻳﺰود اﻟﻄﻼب ﺑﺎﻟﻔﺮﺻﺔ ﻟﻌﺮض وﻣﺸﺎرﻛﺔ وﻣﻨﺎﻗﺸﺔ اﻟﻨﺘﺎﺋﺞ وﻳﺪﻳﺮ ﻫﺬﻩ اﳌﻨﺎﻗﺸﺔ‪.‬‬ ‫‹‬
‫ﻳﻘﻴﻢ ﻧﺸﺎط اﻟﻄﻼب ﺧﻼل ﻋﻤﻠﻴﺔ اﻟﺘﻌﻠﻢ وﻳﻘﺪم ﺑﻨﺎءً ﻋﻠﻰ اﻟﺘﻘﻴﻴﻢ واﳌﺮاﻗﺒﺔ ﻧﺸﺎﻃﺎت أﺧﺮى ﻻﺣﻘﺔ وﻣﺮﺗﺒﻄﺔ‬ ‫‹‬ ‫اﻟﺘﻘﻴﻴﻢ واﻟﻨﺘﺎﺋﺞ‬
‫ﺗﻌﺰز ﻋﻤﻠﻴﺔ اﻟﺘﻌﻠﻢ ﻟﻠﻄﻼب ﰲ ﺑﻌﺾ اﻟﻨﻘﺎط‪.‬‬

‫اﳉﺪول‪ 4-4‬دور اﳌﻌﻠﻢ ﺧﻼل ﻋﻤﻠﻴﺔ اﻟﺘﻌﻠﻢ اﻟﻘﺎﺋﻢ ﻋﻠﻰ ﺣﻞ اﳌﺸﻜﻼت‬

‫إن ﺗﻄﺒﻴﻖ ﻧﻈﺮﻳﺎت ﺗﺮﺑﻮﻳﺔ ﻓﻌﺎﻟﺔ ﰲ ﺗﻌﻠﻢ وﺗﻌﻠﻴﻢ اﳌﻨﺎﻫﺞ اﳍﻨﺪﺳﻴﺔ ﺳﻴﻨﺘﺞ ﺗﻌﻠﻴﻤﺎً ﻫﻨﺪﺳﻴﺎً ﻋﺎﱄ اﳉﻮدة‪ ،‬وﻟﻜﻦ ﻫﻨﺎك ﺳﺆال ﻣﻬﻢ ﳚﺐ ﻃﺮﺣﻪ‪:‬‬
‫ﻫﻞ ﻫﻨﺎك أﻳﺔ ﻋﻼﻗﺔ ﺑﲔ اﻟﻨﻈﺮﻳﺎت اﳍﻨﺪﺳﻴﺔ واﻟﻨﻈﺮﻳﺎت اﻟﱰﺑﻮﻳﺔ؟‬

‫اﻟﻔﻘﺮات اﻟﺘﺎﻟﻴﺔ ﺗﻮﺿﺢ اﻟﺼﻠﺔ ﺑﲔ أﺟﺰاء ﻣﻦ أﲝﺎث ﻋﻠﻢ اﻟﱰﺑﻴﺔ ﻣﻊ ﳎﺎل أﻧﻈﻤﺔ اﻟﺘﺤﻜﻢ ﰲ اﳍﻨﺪﺳﺔ‪.‬‬

‫ﻫﻨﺪﺳﺔ أﻧﻈﻤﺔ اﻟﺘﺤﻜﻢ ﻓﻲ اﻟﺒﻴﺪاﻏﻮﺟﻴﺎ )‪:(Control Systems Engineering in Pedagogy‬‬ ‫‪5-4‬‬

‫ﻋﻠﻰ اﻟﺮﻏﻢ ﻣﻦ اﻻﺳﺘﺨﺪام اﻟﻀﺌﻴﻞ ﳍﻨﺪﺳﺔ ﻧﻈﻢ اﻟﺘﺤﻜﻢ ﰲ اﻟﺒﻴﺪاﻏﻮﺟﻴﺎ]‪ ،[623,624‬إﻻ أﻧﻪ ﳝﻜﻦ ﻣﻼﺣﻈﺔ ﺑﻌﺾ اﻟﺘﻄﺮق ﻟﺘﻠﻚ اﻟﻄﺮق ﰲ‬
‫اﻟﻌﺪﻳﺪ ﻣﻦ اﻷوراق اﻟﺒﺤﺜﻴﺔ اﻟﱰﺑﻮﻳﺔ اﻟﺘﻌﺮﻳﻔﻴﺔ‪ ،‬ﺑﻞ ﳝﻜﻦ اﻟﻘﻮل أن ﻫﻨﺎك إﲨﺎع ﻧﺴﱯ ﺣﻮل اﳌﻮﺿﻮع‪.‬‬

‫وﻟﺘﻮﺿﻴﺢ ذﻟﻚ‪ ،‬ﺳﻨﻮﺿﺢ اﻟﻌﻼﻗﺔ ﺑﲔ اﻷﲝﺎث اﻟﱰﺑﻮﻳﺔ وﻧﻈﻢ اﻟﺘﺤﻜﻢ )‪ ،(Control Systems‬ﺣﻴﺚ ﺗﺒﻨﺖ ﳎﻤﻮﻋﺔ ﻛﺒﲑة ﻣﻦ أﲝﺎث‬
‫اﻟﺒﻴﺪاﻏﻮﺟﻴﺎ اﻟﻌﺪﻳﺪ ﻣﻦ ﻣﺒﺎدئ ﻫﻨﺪﺳﺔ ﺗﺼﻤﻴﻢ ﻧﻈﻢ اﻟﺘﺤﻜﻢ‪ ،‬وﺑﺸﻜﻞ ﺧﺎص اﻟﺘﻐﺬﻳﺔ اﻟﻌﻜﺴﻴﺔ اﻟﺘﻌﻠﻴﻤﻴﺔ )‪،(Educational Feedback‬‬
‫اﻟﺘﻘﻴﻴﻢ اﻟﺒﻨﺎﺋﻲ أو اﻟﺘﻜﻮﻳﲏ )‪ ،[625,626](Formative Assessment‬اﻟﺘﻌﻠﻢ ذاﰐ اﻟﺘﻨﻈﻴﻢ )‪،[627,628](Self-regulated Learning‬‬
‫اﻟﺘﺼﻤﻴﻢ اﻟﺘﻌﻠﻴﻤﻲ )‪.[629,630](Instructional Design‬‬
‫‪219‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Engineering Education Methodologies‬‬ ‫ﻣﻨﻬﺠﻴﺎت اﻟﺘﻌﻠﻴﻢ اﳍﻨﺪﺳﻲ |‬

‫ﺳﻨﻌﺮض ﰲ ﻣﺎ ﻳﺄﰐ ﻣﻦ اﻟﻔﻘﺮات ﻣﻘﺪﻣﺔ ﻣﻘﺘﻀﺒﺔ ﻋﻦ اﻟﺘﻐﺬﻳﺔ اﻟﻌﻜﺴﻴﺔ ﰲ ﻧﻈﻢ اﻟﺘﺤﻜﻢ‪ ،‬وﺳﻨﺘﺒﻌﻬﺎ ﺑﻨﻈﺮة ﻋﺎﻣﺔ إﱃ اﻷﲝﺎث اﻟﱰﺑﻮﻳﺔ اﳌﺮﺗﺒﻄﺔ‬
‫ﺑﻨﺪﺳﺔ ﻧﻈﻢ اﻟﺘﺤﻜﻢ‪.‬‬

‫‪ 1-5-4‬ﻣﻘﺪﻣﺔ ﻋﻦ اﻟﺘﻐﺬﻳﺔ اﻟﻌﻜﺴﻴﺔ ﰲ ﻧﻈﻢ اﻟﺘﺤﻜﻢ )‪:(Introduction to Control Systems Feedback‬‬

‫ﺗﻌﺮف ﻧﻈﻢ اﻟﺘﺤﻜﻢ ﻣﻦ ﺣﻴﺚ اﳌﺒﺪأ ﺑﺄ�ﺎ‪ :‬ﺗﻘﻨﻴﺎت وآﻟﻴﺎت ﻳﺘﻢ ﻓﻴﻬﺎ اﺳﺘﺨﺪام ﺳﻠﻮك ﻣﻘﺎس ﻟﻨﻈﺎم ﻣﺎ ﻟﻠﺘﻌﺪﻳﻞ ﻋﻠﻰ ﻫﺬا اﻟﻨﻈﺎم ﺑﺎﺳﺘﺨﺪام‬
‫ﻣﺘﺤﻜﻤﺎت]‪ .[631‬ﺗﻌﺪ اﻟﺘﻐﺬﻳﺔ اﻟﻌﻜﺴﻴﺔ ﻣﺒﺪأً ﺟﻮﻫﺮﻳﺎً ﻣﻦ ﻣﺒﺎدئ ﻫﻨﺪﺳﺔ ﻧﻈﻢ اﻟﺘﺤﻜﻢ‪ ،‬وﺗﺴﺘﺨﺪم ﻛﻮﺳﻴﻠﺔ أﺳﺎﺳﻴﺔ ﻟﺘﺤﻘﻴﻖ اﻟﺘﻨﻈﻴﻢ واﻟﺘﺤﻜﻢ‬
‫ﺑﺎﻻرﺗﻴﺎب ﰲ اﻷﻧﻈﻤﺔ اﻟﺘﻜﻨﻮﻟﻮﺟﻴﺔ]‪ .[632‬ﰲ ﻫﺬا اﳌﺒﺪأ ﻳﺘﻢ ﻗﻴﺎس أداء اﻟﻨﻈﺎم أﺛﻨﺎء ﻋﻤﻠﻪ‪ ،‬وﺗﻘﺎرن اﻹﺷﺎرة اﳌﻘﺎﺳﺔ ﻣﻊ إﺷﺎرة ﻣﺮﺟﻌﻴﺔ وﻳﺘﻢ‬
‫ﲢﺪﻳﺪ إﺷﺎرة اﳋﻄﺄ اﻟﱵ ﺗﺴﺘﺨﺪم ﻟﺘﺸﻐﻴﻞ اﻟﻨﻈﺎم ﺑﻄﺮﻳﻘﺔ ﺗﻨﻘﺺ ﻣﻦ ﻗﻴﻤﺔ اﳋﻄﺄ‪ ،‬ﻛﻤﺎ ﻫﻮ ﻣﺒﲔ ﺑﺎﻟﺸﻜﻞ‪.10-4‬‬

‫‪Comparison‬‬

‫‪Reference‬‬ ‫‪+‬‬ ‫‪Controller‬‬ ‫‪Process‬‬ ‫‪Output‬‬

‫‪-‬‬

‫‪Feedback‬‬

‫اﻟﺸﻜﻞ‪ 10-4‬اﳌﺨﻄﻂ اﻟﺼﻨﺪوﻗﻲ ﻟﻨﻈﺎم ﲢﻜﻢ ذو ﺗﻐﺬﻳﺔ ﻋﻜﺴﻴﺔ‬

‫‪ 2-5-4‬اﻟﺘﻐﺬﻳﺔ اﻟﻌﻜﺴﻴﺔ وأﲝﺎث اﻟﺘﻘﻴﻴﻢ اﻟﺒﻨﺎﺋﻲ )‪:(Feedback and Formative Assessment Research‬‬
‫ﺗﻌﺮف اﻟﺘﻐﺬﻳﺔ اﻟﻌﻜﺴﻴﺔ ﰲ اﻷﲝﺎث اﻟﱰﺑﻮﻳﺔ واﻟﺘﻌﻠﻴﻤﻴﺔ ﻋﻠﻰ أ�ﺎ‪ :‬اﳌﻌﻠﻮﻣﺎت اﳌﻘﺪﻣﺔ ﻣﻦ ﻗﺒﻞ ﻋﺎﻣﻞ ﻣﺎ )اﳌﻌﻠﻢ‪ ،‬اﻟﺰﻣﻼء‪ ،‬اﻟﻜﺘﺐ‪ ،‬اﳋﱪات(‬
‫ﻓﻴﻤﺎ ﻳﺘﻌﻠﻖ ﺑﺄداء اﻟﻔﺮد وﻓﻬﻤﻪ]‪ ،[625‬وﻗﺪم ‪[633]Johnson‬أﻳﻀﺎً ﻌﺮﻳﻔﺎً ﻣﺸﺎﻬﺑﺎً ﻟﻠﺘﻌﺮﻳﻒ اﻟﺴﺎﺑﻖ‪.‬‬

‫ﺗﻌﺘﱪ اﻟﺘﻐﺬﻳﺔ اﻟﻌﻜﺴﻴﺔ ﻋﻨﺼﺮاً أﺳﺎﺳﻴﺎً ﰲ ﻧﻈﺮﻳﺎت اﻟﺘﻌﻠﻴﻢ اﻟﱰﺑﻮﻳﺔ اﻟﺴﺎﺋﺪة ﻛﺎﻟﻨﻈﺮﻳﺔ اﻟﺴﻠﻮﻛﻴﺔ]‪ [505‬واﻹدراﻛﻴﺔ]‪ [513‬واﻟﺒﻨﺎﺋﻴﺔ]‪،[545,553,634,635‬‬
‫وﻗﺪ ﰎ اﻟﺘﺄﻛﻴﺪ ﰲ اﻟﻌﺪﻳﺪ ﻣﻦ اﻷﲝﺎث ﻋﻠﻰ اﻟﺪور اﳍﺎم ﻟﻠﺘﻐﺬﻳﺔ اﻟﻌﻜﺴﻴﺔ ﰲ ﲢﻘﻴﻖ اﻟﺘﻌﻠﻴﻢ اﻟﻔﻌﺎل]‪ ،[630,636,637‬ﻛﻤﺎ ﰎ اﻟﺘﺄﻛﻴﺪ ﻣﺮاراً ﻋﻠﻰ‬
‫إدﺧﺎل اﻟﺘﻐﺬﻳﺔ اﻟﻌﻜﺴﻴﺔ ﰲ ﻋﻤﻠﻴﺎت اﻟﺘﻌﻠﻴﻢ واﻟﺘﻌﻠﻢ وإﺟﺮاء اﳌﻘﺎرﻧﺔ ﻣﻊ اﳊﺎﻻت اﻟﱵ ﻻ ﻳﻜﻮن ﻓﻴﻬﺎ ﺗﻐﺬﻳﺔ ﻋﻜﺴﻴﺔ]‪ ،[638,639‬ﺣﻴﺚ إن وﺟﻮد‬
‫اﻟﺘﻐﺬﻳﺔ اﻟﻌﻜﺴﻴﺔ ﳝﻜﻦ أن ﻳﻘﻠﻞ ﻣﻦ اﻟﻌﺐء اﳌﻌﺮﰲ )‪ ،(Cognitive Load‬وﺧﺼﻮﺻﺎً ﻋﻨﺪ اﳌﺘﻌﻠﻤﲔ اﳌﺒﺘﺪﺋﲔ]‪ ،[540‬وﻫﻨﺎك ﻣﻦ ﻳﺆﻛﺪ ﻋﻠﻰ‬
‫وﺟﻮب ﺗﻮﻓﺮ اﻟﺘﻐﺬﻳﺔ اﻟﻌﻜﺴﻴﺔ ﰲ أي ﻋﻤﻠﻴﺔ ﺗﻌﻠﻴﻢ]‪.[640‬‬

‫وﻓﻘﺎً ﻟـ‪ Krause‬ﺗﻌﺘﱪ ﻣﻌﺮﻓﺔ اﻟﻨﺘﺎﺋﺞ أو ﻣﻌﺮﻓﺔ ﻣﺎ ﻫﻮ اﳉﻮاب اﻟﺼﺤﻴﺢ أﺣﺪ أﺷﻜﺎل اﻟﺘﻐﺬﻳﺔ اﻟﻌﻜﺴﻴﺔ]‪ ،[639‬وﻟﻜﻦ اﻟﺘﻐﺬﻳﺔ اﻟﻌﻜﺴﻴﺔ اﻷﻛﺜﺮ‬
‫ﻓﻌﺎﻟﻴﺔ ﻫﻲ اﻟﺘﻐﺬﻳﺔ اﻟﻌﻜﺴﻴﺔ اﳌﻔﺼﻠﺔ اﻟﱵ ﲢﺘﻮي ﻣﻌﻠﻮﻣﺎت ﻋﻦ ﻛﻴﻔﻴﺔ ﲢﺴﲔ اﳉﻮاب]‪.[641,642‬‬

‫ﻟﻘﺪ ﻗﺎم ‪ [626]Shute‬ﺑﻮﺿﻊ اﳌﺒﺎدئ اﻟﺘﻮﺟﻴﻬﻴﺔ اﻟﺸﺎﻣﻠﺔ ﻟﺘﻮﺻﻴﻞ ﺗﻐﺬﻳﺔ ﻋﻜﺴﻴﺔ ﺑﻨﺎﺋﻴﺔ ﺑﺪف ﺗﻌﺰﻳﺰ ﻋﻤﻠﻴﺔ اﻟﺘﻌﻠﻢ‪ ،‬وﺗﻘﻠﻴﻞ اﻟﻔﺠﻮة ﺑﲔ اﻟﻔﻬﻢ‬
‫اﳊﺎﱄ واﻟﻔﻬﻢ اﳌﺮﻏﻮب ﻓﻴﻪ ﻟﻌﻤﻠﻴﺔ اﻟﺘﻌﻠﻢ‪ ،‬وﻛﺬﻟﻚ اﳊﺼﻮل ﻋﻠﻰ ﺗﻐﺬﻳﺔ ﻋﻜﺴﻴﺔ ﺑﻨﺎﺋﻴﺔ ﺗﺘﻌﻠﻖ ﺑﺎﻟﺼﻔﺎت اﳋﺎﺻﺔ ﺑﺎﳌﺘﻌﻠﻤﲔ‪.‬‬

‫ﻳﻘﱰح ﳕﻮذج ‪[625]Hattie‬اﳋﺎص ﺑﺎﻟﺘﻐﺬﻳﺔ اﻟﻌﻜﺴﻴﺔ اﻟﻔﻌﺎﻟﺔ أﻧﻪ ﳚﺐ ﺗﺴﻠﻴﻂ اﻟﻀﻮء ﻋﻠﻰ ﺛﻼﺛﺔ أﺳﺌﻠﺔ رﺋﻴﺴﺔ‪ :‬ﻣﺎ ﻫﻲ اﻷﻫﺪاف؟ ﻣﺎ ﻫﻲ آﻟﻴﺔ‬
‫اﻟﻌﻤﻞ اﻟﱵ اﲣﺬت ﻟﺘﺤﻘﻴﻖ اﳍﺪف؟ ﻣﺎ ﻫﻲ اﻷﻧﺸﻄﺔ اﳌﻄﻠﻮﺑﺔ ﻟﺘﺤﻘﻴﻖ ﺗﻘﺪم ﻟﻠﻬﺪف ﺑﺸﻜﻞ أﻓﻀﻞ؟‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪220‬‬
‫‪24‬‬ ‫اﻟﻔﺼﻞ اﻟﺮاﺑﻊ | ‪Chapter 4‬‬

‫اﻷﺳﺌﻠﺔ اﻟﺜﻼﺛﺔ اﻟﱵ وﺿﻌﻬﺎ ‪ [625]Hattie‬ذات ﺻﻠﺔ ﺑﻨﻤﻮذج ﺣﻠﻘﺔ اﻟﺘﻐﺬﻳﺔ اﻟﻌﻜﺴﻴﺔ اﳌﻮﺿﺤﺔ ﺑﺎﻟﺸﻜﻞ‪ 10-4‬ﺣﻴﺚ أن‪ :‬اﻟﺴﺆال اﻷول ﳝﺜﻞ‬
‫اﻹﺷﺎرة اﳌﺮﺟﻌﻴﺔ )‪ (Reference‬أو ﻧﻘﻄﺔ اﻟﻀﺒﻂ )‪ ،(Set-point‬وﺑﺪون ﻧﻘﻄﺔ ﻣﺮﺟﻌﻴﺔ واﺿﺤﺔ ﺳﻴﻔﻘﺪ ﻧﻈﺎم اﻟﺘﺤﻜﻢ ﻫﺪﻓﻪ اﻷﺳﺎﺳﻲ‪،‬‬
‫وﻗﺪ ﰎ اﻟﺘﺄﻛﻴﺪ ﰲ اﻟﻌﺪﻳﺪ ﻣﻦ اﻷوراق اﻟﺒﺤﺜﻴﺔ اﻟﱰﺑﻮﻳﺔ ﻋﻠﻰ أﳘﻴﺔ وﺿﻊ أﻫﺪاف واﺿﺤﺔ ﻟﻠﺘﻌﻠﻴﻢ )‪ (e.g. Set-point‬ﺑﺪف اﳊﺼﻮل ﻋﻠﻰ‬
‫ﺗﻐﺬﻳﺔ ﻋﻜﺴﻴﺔ ﻓﻌﺎﻟﺔ]‪[643,644‬؛ ﻛﻤﺎ أن اﻟﺴﺆال اﻟﺜﺎﱐ ﳝﺜﻞ اﻟﺘﻐﺬﻳﺔ اﻟﻌﻜﺴﻴﺔ )‪(Measurements & Feedback‬؛ أﻣﺎ اﻟﺴﺆال اﻟﺜﺎﻟﺚ‬
‫ﻓﻴﻤﺜﻞ اﳌﺘﺤﻜﻢ )‪ (Controller‬اﻟﺬي ﻳﻘﻮد اﻟﻌﻤﻠﻴﺔ ﻟﺘﺤﻘﻴﻖ اﻷﻫﺪاف اﳌﺮﻏﻮﺑﺔ‪.‬‬

‫ﻳﻌﺪ اﻟﺘﻘﻴﻴﻢ اﻟﺒﻨﺎﺋﻲ )‪ (Formative Assessment‬ﻧﻮﻋﺎً أﺳﺎﺳﻴﺎً ﻣﻦ أﻧﻮاع اﻟﺘﻐﺬﻳﺔ اﻟﻌﻜﺴﻴﺔ ﰲ اﻷﲝﺎث اﻟﱰﺑﻮﻳﺔ‪ ،‬وﻳﻌﺮف ﻋﻠﻰ أﻧﻪ اﻟﻌﻤﻠﻴﺔ‬
‫اﻟﱵ ﺗﻘﻮم ﺑﺘﻘﻴﻴﻢ ﻧﺘﺎﺋﺞ اﻟﻌﻤﻠﻴﺔ اﻟﺘﻌﻠﻴﻤﻴﺔ اﻟﱵ ﳜﻀﻊ ﳍﺎ اﳌﺘﻌﻠﻢ‪ ،‬وﺗﻘﺪﱘ اﻟﻨﺘﺎﺋﺞ اﻟﺘﻘﻴﻴﻤﻴﺔ ﻟﻠﻤﺘﻌﻠﻢ‪.‬‬

‫إن اﻟﺘﻘﻴﻴﻢ اﻟﺒﻨﺎﺋﻲ ﳝﻜﻦ أن ﻳﺘﻀﻤﻦ ﻧﺸﺎﻃﺎت ﻣﺜﻞ اﻷﺳﺌﻠﺔ ﺿﻤﻦ اﻟﺼﻒ‪ ،‬اﻟﺘﻘﻴﻴﻢ اﻟﺬاﰐ )‪ ،(Self-assessment‬وﺗﻘﻴﻴﻢ اﻟﺰﻣﻼء )‪Peer-‬‬

‫‪ ،(assessment‬واﻻﺧﺘﺒﺎرات]‪ .[645,646‬وﻣﻦ ﻣﻨﻈﻮر أﺿﻴﻖ‪ ،‬ﻓﺎﻟﺘﻘﻴﻴﻢ اﻟﺒﻨﺎﺋﻲ ﻳﻌﺘﱪ أداة ﻣﻬﻤﺔ ﰲ اﻟﺘﻌﻠﻴﻢ ﻟﺘﻨﻈﻴﻢ ﻋﻤﻠﻴﺔ ﺗﻌﻠﻢ اﻟﻄﻼب]‪،[647‬‬
‫وﻫﻮ ﳝﻜﻦ أن ﻳﺴﺎﻋﺪ اﻟﻄﻼب ﻟﻠﺘﻜﻴﻒ ﻣﻊ اﻟﻌﻤﻠﻴﺔ اﻟﺘﻌﻠﻴﻤﻴﺔ ﺑﺎﻟﺸﻜﻞ اﻷﻣﺜﻞ]‪.[649‬‬

‫وﻗﺪ ﰎ اﻻﺳﺘﺸﻬﺎد ﺑﻪ أﻛﺜﺮ ﻣﻦ ‪ 600‬ﻣﺮة‬ ‫]‪[649,650‬‬

‫ﻟﻠﺘﻐﺬﻳﺔ اﻟﻌﻜﺴﻴﺔ أﺳﺎﺳﺎً ﻟﻠﻌﺪﻳﺪ ﻣﻦ اﻷﲝﺎث‬ ‫]‪[628‬‬
‫ﻳﻌﺪ ﳕﻮذج ‪Butler & Winne’s‬‬

‫اﳌﺸﺘﻖ ﻣﻦ ﳕﻮذج & ‪Butler‬‬

‫]‪[628‬‬ ‫]‪[649‬‬
‫ﺣﱴ �ﺎﻳﺔ ‪ 2009‬اﻷﻣﺮ اﻟﺬي ﻳﻌﻜﺲ أﳘﻴﺔ ﻫﺬا اﻟﻨﻤﻮذج‪ .‬اﻟﺸﻜﻞ‪ 11-4‬ﻳﻮﺿﺢ ﳕﻮذج ‪Juwah‬‬

‫‪ ،Winne‬وﺑﺎﻟﻨﻈﺮ إﱃ ﻫﺬا اﻟﻨﻤﻮذج ﳒﺪ ﺻﻠﺔً ﺑﻴﻨﻪ وﺑﲔ ﻧﻈﺎم اﻟﺘﺤﻜﻢ ذو اﻟﺘﻐﺬﻳﺔ اﻟﻌﻜﺴﻴﺔ اﳌﻮﺿﺢ ﻋﻠﻰ اﻟﺸﻜﻞ‪ ،10-4‬وﻳﻌﺘﱪ ‪Juwah‬‬

‫إﺣﺪى أﻗﻮى اﻟﺪراﺳﺎت اﻟﱵ ﺗﺪﻋﻢ أﳘﻴﺔ اﻟﺘﻘﻴﻴﻢ اﻟﺒﻨﺎﺋﻲ واﻟﺘﻐﺬﻳﺔ اﻟﻌﻜﺴﻴﺔ‪ ،‬وﻗﺪ ﺷﺮح ‪ Sadler‬ﺛﻼﺛﺔ ﻋﻮاﻣﻞ‬ ‫]‪[651‬‬
‫اﻟﻮرﻗﺔ اﻟﺒﺤﺜﻴﺔ ﻟ ـ‪Sadler‬‬
‫ﻫﺎﻣﺔ )ﲤﺜﻞ ﺣﻠﻘﺔ اﻟﺘﻐﺬﻳﺔ اﻟﻌﻜﺴﻴﺔ ﰲ ﻧﻈﺎم اﻟﺘﺤﻜﻢ ذو اﳊﻠﻘﺔ اﳌﻐﻠﻘﺔ( ﳚﺐ ﻋﻠﻰ اﻟﻄﻼب أﺧﺬﻫﺎ ﺑﻌﲔ اﻻﻋﺘﺒﺎر ﻟﻼﺳﺘﻔﺎدة ﻣﻦ اﻟﺘﻐﺬﻳﺔ‬
‫اﻟﻌﻜﺴﻴﺔ‪ ،‬وﻫﻲ أﻧﻪ ﳚﺐ ﻋﻠﻰ اﻟﻄﻼب‪:‬‬
‫‪ -1‬اﻣﺘﻼك ﻓﻜﺮة ﻋﻦ اﳍﺪف أو اﳌﺴﺘﻮى اﻟﺬي ﻳﻄﻤﺤﻮن إﻟﻴﻪ‪.‬‬
‫‪ -2‬ﻣﻘﺎرﻧﺔ ﻣﺴﺘﻮى أداﺋﻬﻢ اﳊﺎﱄ ﻣﻊ ذﻟﻚ اﳍﺪف أو اﳌﺴﺘﻮى‪.‬‬
‫‪ -3‬اﲣﺎذ اﻟﺘﺪﺑﲑ اﻷﻧﺴﺐ اﻟﺬي ﻳﺆدي إﱃ ﺗﻘﻠﻴﺺ اﳍﻮة ﺑﲔ اﳌﺴﺘﻮى اﳊﺎﱄ وﺑﲔ ﻣﺎ ﻳﻄﻤﺤﻮن إﻟﻴﻪ‪.‬‬

‫إن اﻷﲝﺎث اﻟﱰﺑﻮﻳﺔ اﳊﺪﻳﺜﺔ ﺗﺆﻛﺪ ﺑﺸﻜﻞ ﻣﺘﺰاﻳﺪ ﻋﻠﻰ أﳘﻴﺔ دور إﻏﻨﺎء اﻟﺘﻌﻠﻴﻢ ﻣﻦ ﺧﻼل ﺗﻄﺒﻴﻖ اﻟﺘﻘﻴﻴﻢ اﻟﺒﻨﺎﺋﻲ وﺗﺰوﻳﺪ اﻟﻄﻼب ﺑﺎﳌﺰﻳﺪ ﻣﻦ‬
‫اﻟﺘﻐﺬﻳﺔ اﻟﻌﻜﺴﻴﺔ‪.‬‬

‫اﻷﲝﺎث اﻟﱰﺑﻮﻳﺔ ﺗﺸﲑ إﱃ أن ﺗﻘﺪﱘ اﻟﺘﻐﺬﻳﺔ اﻟﻌﻜﺴﻴﺔ ﳝﺜﻞ اﻟﻄﺮﻳﻘﺔ اﻷﻛﺜﺮ ﻓﻌﺎﻟﻴﺔ اﻟﱵ ﳝﻜﻦ ﻟﻠﻤﻌﻠﻤﲔ اﺳﺘﺨﺪاﻣﻬﺎ ﻟﺘﻌﺰﻳﺰ وزﻳﺎدة ﺗﻌﻠﻢ اﻟﻄﻼب‪،‬‬
‫ﻛﻤﺎ ﺗﺆﻛﺪ اﻷﲝﺎث ﻋﻠﻰ أن ﺗﻠﻚ اﻟﺘﻐﺬﻳﺔ اﻟﻌﻜﺴﻴﺔ ﳚﺐ أن ﺗﻘﺪم ﻓﻮراً وﺑﺪون أي ﺗﺄﺧﲑ]‪ ،[637‬وﻫﺬا ﻳﺸﺒﻪ إﱃ ﺣﺪ ﻛﺒﲑ أﻧﻈﻤﺔ اﻟﺘﺤﻜﻢ‬
‫ﺣﻴﺚ ﻳﻜﻮن ﺗﻮﻓﲑ ﺗﻐﺬﻳﺔ ﻋﻜﺴﻴﺔ ﻣﺴﺘﻘﺮة ﺿﺮورﻳﺎً ﻟﺒﻨﺎء أﻧﻈﻤﺔ ﻣﺴﺘﻘﺮة ﲢﻘﻖ اﻷﻏﺮاض اﳌﺼﻤﻤﺔ ﻣﻦ أﺟﻠﻬﺎ]‪.[631,632‬‬

‫‪221‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Engineering Education Methodologies‬‬ ‫ﻣﻨﻬﺠﻴﺎت اﻟﺘﻌﻠﻴﻢ اﳍﻨﺪﺳﻲ |‬

‫‪Process Internal to the Student‬‬

‫‪Domain Knowledge‬‬
‫‪Teacher‬‬ ‫‪Internal‬‬
‫‪Student‬‬ ‫‪Tactics‬‬
‫‪Set Task‬‬ ‫‪Strategy Knowledge‬‬ ‫‪Learning‬‬
‫‪Goals‬‬ ‫‪Strategies‬‬
‫)‪(Goals-Criteria‬‬ ‫‪Outcomes‬‬

‫‪Performance‬‬
‫‪Motivational Believe‬‬

‫‪STUDENT‬‬
‫‪Monitoring Gap‬‬
‫)‪(Self .Assessment‬‬

‫‪External‬‬
‫‪External‬‬ ‫‪External Feedback‬‬
‫‪Observable‬‬
‫)‪(Teacher/Peers/Employers‬‬
‫‪Outcomes‬‬

‫]‪[649‬‬
‫اﻟﺸﻜﻞ‪ 11-4‬ﳕﻮذج اﻟﺘﻘﻴﻴﻢ اﻟﺒﻨﺎﺋﻲ واﻟﺘﻐﺬﻳﺔ اﻟﻌﻜﺴﻴﺔ ﻟ ـ‪Juwah‬‬

‫‪ 3-5-4‬أﲝﺎث اﻟﺘﻌﻠﻢ ذاﰐ اﻟﺘﻨﻈﻴﻢ ”‪:(Self-Regulated Learning Research) “SRL‬‬

‫ﻳﻌﺘﱪ اﻟﺘﻌﻠﻢ ذاﰐ اﻟﺘﻨﻈﻴﻢ )‪ (SRL‬ﳎﺎﻻً ﺗﺮﺑﻮﻳﺎً ﺟﺪﻳﺪاً ﻧﺴﺒﻴﺎً‪ ،‬ﻫﺎﻣﺎً ﺟﺪاً ﰲ ﺗﻌﻠﻴﻢ اﻟﻄﻼب ﻛﻴﻔﻴﺔ اﻟﺘﻌﻠﻢ واﻟﺘﻄﻮﻳﺮ اﻟﺬاﰐ‪ ،‬وﻫﻮ ﻳﺮﺗﺒﻂ إﱃ ﺣﺪ‬
‫ﻛﺒﲑ ﺑﺄﻧﻈﻤﺔ اﻟﺘﺤﻜﻢ‪ .‬إن ﻣﻌﻈﻢ ﳕﺎذج ودراﺳﺎت اﻟﺘﻌﻠﻢ ذاﰐ اﻟﺘﻨﻈﻴﻢ اﻧﺒﺜﻘﺖ ﰲ ﻃﻮرﻫﺎ اﻷول ﻣﻦ ﳎﺘﻤﻊ ﻋﻠﻢ اﻟﻨﻔﺲ اﳌﻌﺮﰲ وﻋﻠﻢ اﻟﻨﻔﺲ‬
‫اﻟﱰﺑﻮي ﺑﺪون أي ﺻﻠﺔ واﺿﺤﺔ ﲟﺠﺘﻤﻊ ﻫﻨﺪﺳﺔ أﻧﻈﻤﺔ اﻟﺘﺤﻜﻢ‪.‬‬

‫ﻟﻘﺪ أﻃﻠﻖ ﻣﺼﻄﻠﺢ اﻟﺘﻌﻠﻢ واﻟﺘﻨﻈﻴﻢ اﻟﺬاﰐ )‪ (SRL‬ﻷول ﻣﺮة ﰲ ﻣﻨﺘﺼﻒ اﻟﺜﻤﺎﻧﻴﻨﺎت]‪ ،[652‬ﰒ ﻧﺸﺮت اﻟﻌﺪﻳﺪ ﻣﻦ اﻟﺪراﺳﺎت‬
‫اﻟﺒﺤﺜﻴﺔ]‪ [627,628,653-657‬ﺮّف وﺗﺒﲔ ﻫﺬا اﺠﻤﻟﺎل ﺑﺸﻜﻞ أوﺳﻊ‪ ،‬وﺗﻘﱰح ﳕﺎذج وأدوات ﺗﻘﻴﻴﻢ وﲢﻘﻖ ﻣﻦ ﺧﻼل اﻻﺧﺘﺒﺎرات اﻟﺘﺠﺮﻳﺒﻴﺔ‪.‬‬

‫ﻳﻌﺮف ‪ [652]Zimmerman‬اﻟﺘﻌﻠﻢ ذاﰐ اﻟﺘﻨﻈﻴﻢ ﺑﺄﻧﻪ‪ :‬ﻋﻤﻠﻴﺔ اﺳﺘﺒﺎﻗﻴﺔ ﻳﺴﺘﺨﺪﻣﻬﺎ اﻟﻄﻼب ﻻﻛﺘﺴﺎب اﳌﻬﺎرات اﻷﻛﺎدﳝﻴﺔ ‪ -‬ﻣﺜﻞ‪ :‬ﲢﺪﻳﺪ‬
‫اﻷﻫﺪاف‪ ،‬اﺧﺘﻴﺎر وﺗﻄﺒﻴﻖ اﻻﺳﱰاﺗﻴﺠﻴﺎت‪ ،‬اﳌﺮاﻗﺒﺔ اﻟﺬاﺗﻴﺔ ﻟﻠﻔﺎﻋﻠﻴﺔ واﻷداء اﻟﺬاﰐ ‪ -‬ﺑﺪﻻً ﻣﻦ أن ﻳﻜﻮن اﻟﻄﺎﻟﺐ داﺋﻤﺎً ﰲ ﻣﻮﻗﻊ ردود اﻟﻔﻌﻞ‬
‫ﻟﻘﻮى وأﺣﺪاث ﺧﺎرﺟﻴﺔ‪.‬‬

‫اﻟﺘﻌﻠﻢ ذاﰐ اﻟﺘﻨﻈﻴﻢ ﺑﺄﻧﻪ‪ :‬ﻋﻤﻠﻴﺔ ﺑﻨﺎﺋﻴﺔ ﻓﻌﺎﻟﺔ ﺣﻴﺚ ﻳﻀﻊ اﳌﺘﻌﻠﻤﻮن أﻫﺪاﻓﻬﻢ ﻟﻠﺘﻌﻠﻢ وﻳﺮاﻗﺒﻮن‬ ‫]‪[658‬‬
‫ﻛﻤﺎ ﻋﺮف ‪Pintrich & Zusho‬‬

‫وﻳﻨﻈﻤﻮن وﻳﺘﺤﻜﻤﻮن ﺑﺈدراﻛﻬﻢ اﳌﻌﺮﰲ ودواﻓﻌﻬﻢ وﺳﻠﻮﻛﻬﻢ‪ ،‬ﻣﺴﱰﺷﺪﻳﻦ وﻣﺪﻓﻮﻋﲔ ﺑﺄﻫﺪاﻓﻬﻢ وﻣﻼﻣﺢ اﻟﻈﺮوف ﻟﺒﻴﺌﺔ اﶈﻴﻄﺔ ﻬﺑﻢ‪.‬‬

‫وﻳﻌﺮف ‪ [625]Hattie & Timperley‬اﻟﺘﻌﻠﻢ ذاﰐ اﻟﺘﻨﻈﻴﻢ ﻋﻠﻰ أﻧﻪ‪ :‬اﻷﺳﻠﻮب اﻟﺬي ﻣﻦ ﺧﻼﻟﻪ ﻳﻘﻮم اﻟﻄﻠﺒﺔ ﲟﺮاﻗﺒﺔ وﺗﻮﺟﻴﻪ وﺗﻨﻈﻴﻢ أﻓﻌﺎﳍﻢ‬
‫ﻟﺘﺤﻘﻴﻖ ﻫﺪف اﻟﺘﻌﻠﻢ‪.‬‬

‫وﻳﻌﺮف ‪ [659]Paris & Byrnes‬اﻟﺘﻌﻠﻢ ذاﰐ اﻟﺘﻨﻈﻴﻢ ﺑﺄﻧﻪ‪ :‬ﻋﻤﻠﻴﺔ ﺑﻨﺎﺋﻴﺔ ﻳﻘﻮم اﻟﻄﻼب ﲟﻮﺟﺒﻬﺎ ﺑﺒﻨﺎء اﳌﻌﺮﻓﺔ ﺑﻄﺮق ﻣﺴﺘﻘﻠﺔ‪.‬‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪222‬‬
‫‪24‬‬ ‫اﻟﻔﺼﻞ اﻟﺮاﺑﻊ | ‪Chapter 4‬‬

‫إن اﻟﺘﻌﻠﻢ واﻟﺘﻨﻈﻴﻢ اﻟﺬاﰐ ﳝﺜﻞ ﺑﻄﺒﻴﻌﺘﻪ ﻋﻤﻠﻴﺔ دورﻳﺔ )‪ ،[660](Cyclic Process‬وﻫﻮ ﻣﺸﺎﺑﻪ إﱃ ﺣﺪ ﻛﺒﲑ ﻟﻨﻈﺎم ﲢﻜﻢ ذو ﺣﻠﻘﺔ ﻣﻐﻠﻘﺔ‪،‬‬
‫ووﻓﻘﺎً ﻟـ‪ [661]Borkowski‬ﻓﺈن ﻧﺸﻮء اﻟﺘﻌﻠﻢ ذاﰐ اﻟﺘﻨﻈﻴﻢ ﻳﺒﺪأ ﻋﻨﺪﻣﺎ ﻳﺘﻢ ﺗﻮﺟﻴﻪ اﻟﻄﻼب إﱃ اﺳﺘﺨﺪام اﺳﱰاﺗﻴﺠﻴﺎت اﻟﺘﻌﻠﻢ‪ ،‬وﻳﻨﻀﺞ ﻋﻨﺪﻣﺎ‬
‫ﻳﺴﺘﻄﻴﻌﻮن اﺧﺘﻴﺎر اﺳﱰاﺗﻴﺠﻴﺔ ﺗﻌﻠﻢ ﻣﻨﺎﺳﺒﺔ إﺿﺎﻓﺔً إﱃ ﻣﺮاﻗﺒﺔ وﺗﻘﻴﻴﻢ ﻋﻤﻠﻴﺔ ﺗﻌﻠﻤﻬﻢ‪.‬‬

‫ﻟﻘﺪ أﻇﻬﺮت اﻟﺪراﺳﺎت ﺣﻮل اﺳﺘﺨﺪام اﺳﱰاﺗﻴﺠﻴﺎت اﻟﺘﻌﻠﻢ ﺗﺄﺛﲑﻫﺎ ﰲ ﲢﻘﻴﻖ ﻧﺘﺎﺋﺞ ﺗﻌﻠﻴﻢ أﻓﻀﻞ]‪ .[652‬ﻛﻤﺎ أن اﻟﻌﺪﻳﺪ ﻣﻦ اﻟﺪراﺳﺎت‬
‫واﻷﲝﺎث أﻇﻬﺮت أن اﳌﺘﻌﻠﻤﲔ اﻟﺬﻳﻦ ﻟﺪﻳﻬﻢ ﻗﺪر أﻛﱪ ﻣﻦ اﻟﺘﻨﻈﻴﻢ اﻟﺬاﰐ‪ ،‬ﻗﺪ اﺳﺘﺨﺪﻣﻮا اﻟﺘﻐﺬﻳﺔ اﻟﻌﻜﺴﻴﺔ ﺑﺸﻜﻞ ﻣﺘﻜﺮر‪ ،‬اﻷﻣﺮ اﻟﺬي أدى‬
‫إﱃ ﻧﺘﺎﺋﺞ ﺗﻌﻠﻢ أﻓﻀﻞ]‪.[653,655‬‬

‫ﻟﻘﺪ ﺷﺪد ‪ [628]Butler & Winne‬ﻋﻠﻰ أن اﻟﺘﻐﺬﻳﺔ اﻟﻌﻜﺴﻴﺔ ﻋﻨﺼﺮ أﺳﺎﺳﻲ وﻣﺘﺄﺻﻞ ﰲ اﻟﻌﻤﻠﻴﺎت اﻟﻔﺮﻋﻴﺔ اﻟﱵ ﺗﺘﺄﻟﻒ ﻣﻨﻬﺎ ﻋﻤﻠﻴﺔ اﻟﺘﻌﻠﻢ‬
‫ذاﰐ اﻟﺘﻨﻈﻴﻢ‪ ،‬ﻛﻤﺎ أن اﻟﺘﻐﺬﻳﺔ اﻟﻌﻜﺴﻴﺔ ﻳﻨﺒﻐﻲ أن ﺗﺴﺎﻋﺪ ﻋﻠﻰ ﲢﻘﻴﻖ أﻫﺪاف اﻟﺘﻌﻠﻢ واﻟﺘﻨﻈﻴﻢ اﻟﺬاﰐ‪.‬‬

‫أن ﻳﱪﻫﻦ أن اﻟﺘﻘﻴﻴﻢ اﻟﺒﻨﺎﺋﻲ )‪ (Formative Assessment‬ﳝﻜﻦ أن ﻳﺴﺎﻋﺪ اﻟﻄﻼب‬ ‫]‪[650‬‬

‫ﳛﺎول ‪Nicol & Macfarlane-Dick‬‬

‫ﻟﻴﺼﺒﺤﻮا ﻣﺘﻌﻠﻤﲔ ذاﺗﻴﻲ اﻟﺘﻨﻈﻴﻢ )‪ ،(Self-regulated‬وﻛﻠﻤﺎ ﻛﺎن اﻟﻄﺎﻟﺐ ذاﰐ اﻟﺘﻨﻈﻴﻢ‪ ،‬ﻛﻠﻤﺎ ﻗﻞ اﻟﻄﻠﺐ ﻋﻠﻰ دﻋﻢ اﳌﻌﻠﻢ ﻟﻪ]‪ ،[662‬وﻗﺪ‬
‫وﺟﺪ أن ﻣﻬﺎرات اﻟﺘﻌﻠﻢ ذاﰐ اﻟﺘﻨﻈﻴﻢ ﳝﻜﻦ ﺗﻌﻠﻤﻬﺎ ﻋﻤﻮﻣﺎً‪ ،‬ﺣﱴ ﻣﻦ ﻗﺒﻞ اﻟﻄﻼب ذوي اﻟﻘﺪرات اﳌﻨﺨﻔﻀﺔ]‪.[658‬‬

‫إن اﻟﻌﻨﺎﺻﺮ اﻟﺸﺎﺋﻌﺔ واﳌﻤﻴﺰة ﻟﻨﻤﺎذج اﻟﺘﻌﻠﻢ واﻟﺘﻨﻈﻴﻢ اﻟﺬاﰐ ﺗﻌﺘﱪ ﻗﻠﻴﻠﺔ ﻧﺴﺒﻴﺎً وﻫﻲ‪ :‬ﲢﺪﻳﺪ اﻷﻫﺪاف )‪ ،(Goals Setting‬وﺿﻊ‬
‫اﺳﱰاﺗﻴﺠﻴﺎت اﻟﺘﻌﻠﻢ )‪ ،(Learning Strategies‬اﳌﺮاﻗﺒﺔ واﻟﺘﻐﺬﻳﺔ اﻟﻌﻜﺴﻴﺔ )‪(Monitoring & Feedback‬؛ ﺑﺎﳌﻘﺎرﻧﺔ ﻣﻊ أﻧﻈﻤﺔ‬
‫اﻟﺘﺤﻜﻢ ذات اﻟﺘﻐﺬﻳﺔ اﻟﻌﻜﺴﻴﺔ‪ ،‬ﺑﺎﻟﻌﻮدة إﱃ اﻟﺸﻜﻞ‪ ،10-4‬ﻓﺈن اﻷﻫﺪاف ﲤﺜﻞ اﻹﺷﺎرات اﳌﺮﺟﻌﻴﺔ أو ﻧﻘﻄﺔ اﻟﻀﺒﻂ )‪،(Set-point‬‬
‫واﺳﱰاﺗﻴﺠﻴﺎت اﻟﺘﻌﻠﻢ ﲤﺜﻞ اﳌﺘﺤﻜﻢ )‪ ،(Controller‬أﻣﺎ اﳌﺮاﻗﺒﺔ واﻟﺘﻐﺬﻳﺔ اﻟﻌﻜﺴﻴﺔ ﻓﺘﻤﺜﻞ اﻟﻘﻴﺎﺳﺎت واﻟﺘﻐﺬﻳﺔ اﻟﻌﻜﺴﻴﺔ اﳌﻘﺎﺑﻠﺔ‬
‫)‪.[656](Measurements and Feedback‬‬

‫ﻟﻘﺪ ﻗﺎم ﻛﻼً ﻣﻦ ‪ [663]Puustinen & Pulkkinen‬ﺑﺈﺟﺮاء اﺳﺘﻌﺮاض ﻟﻨﻤﺎذج اﻟﺘﻌﻠﻢ ذاﰐ اﻟﺘﻨﻈﻴﻢ اﻟﱵ ﻇﻬﺮت وﺟﺮﺑﺖ‪ ،‬وﻻﺣﻈﺎ أن ﳕﺎذج‬
‫اﻟﺘﻌﻠﻢ ذاﰐ اﻟﺘﻨﻈﻴﻢ ﺗﺼﻨﻒ إﻣﺎ ﻛﻌﻤﻠﻴﺎت ﻣﻮﺟﻬﺔ ﳓﻮ ﻫﺪف ﻣﻌﲔ ﻛﻤﺎ ﰲ أﲝﺎث]‪ ،[656,657,662‬أو ﻌﻤﻠﻴﺔ ﻬﺗﻴﻤﻦ ﻋﻠﻴﻬﺎ ﺣﺎﻟﺔ اﻹدراك اﳌﻌﺮﰲ‬
‫)‪ (Metacognition‬ﻛﻤﺎ ﰲ أﲝﺎث]‪.[628,661‬‬

‫ﰲ اﻟﻮاﻗﻊ‪ ،‬إذا ﻣﺎ ﻧﻈﺮﻧﺎ إﱃ اﻟﺘﻌﻠﻢ ذاﰐ اﻟﺘﻨﻈﻴﻢ ﻣﻦ ﻣﻨﻈﻮر ﻧﻈﻢ اﻟﺘﺤﻜﻢ‪ ،‬ﻓﺈن ﻛﻼ اﳊﺎﻟﺘﲔ‪ ،‬ﺳﻮاءً اﻟﻌﻤﻠﻴﺎت اﳌﻮﺟﻬﺔ ﳓﻮ ﻫﺪف ﻣﻌﲔ‪ ،‬أو‬
‫ﻋﻤﻠﻴﺎت اﻹدراك اﳌﻌﺮﰲ‪ ،‬ﻣﻬﻤﺔ ﻟﺘﺤﻘﻴﻖ اﳍﺪف اﳌﺮﺟﻮ ﻣﻦ اﻟﻌﻤﻠﻴﺔ اﻟﺘﻌﻠﻴﻤﻴﺔ‪.‬‬

‫إن اﻹدراك اﳌﻌﺮﰲ ﻳﺸﲑ إﱃ ﻗﺪرة اﳌﺘﻌﻠﻤﲔ ﻋﻠﻰ اﻟﺘﻘﻴﻴﻢ اﻟﺬاﰐ ﻟﺘﻘﺪﻣﻬﻢ‪ ،‬وأﻳﻀﺎً ﺪرﻬﺗﻢ ﻋﻠﻰ اﺧﺘﻴﺎر اﻷﺳﺎﻟﻴﺐ واﻻﺳﱰاﺗﻴﺠﻴﺎت اﻟﱵ ﺗﻨﺎﺳﺐ‬
‫ﻃﻮر اﻟﺘﻌﻠﻢ أو اﻛﺘﺴﺎب اﳌﻬﺎرات‪ ،‬وﻫﺬا ﻳﺸﺎﺑﻪ أدوات اﻟﻘﻴﺎس واﳌﻘﺎرﻧﺔ وﻋﻨﺎﺻﺮ اﻟﺘﺤﻜﻢ ﰲ ﻧﻈﺎم اﻟﺘﺤﻜﻢ ﰲ اﳊﻠﻘﺔ اﳌﻐﻠﻘﺔ ذو اﻟﺘﻐﺬﻳﺔ‬
‫اﻟﻌﻜﺴﻴﺔ اﳌﻮﺿﺢ ﻋﻠﻰ اﻟﺸﻜﻞ‪ ،10-4‬وإن ﻓﺸﻞ أي ﻣﻦ ﻫﺬﻩ اﻷدوات أو اﻟﻌﻨﺎﺻﺮ ﰲ أداء ﻣﻬﻤﺘﻪ ﻳﺆدي إﱃ ﻓﺸﻞ اﻟﻨﻈﺎم ﻛﻜﻞ‪ ،‬وﺑﺪون‬
‫وﺟﻮد إﺷﺎرة ﻣﺮﺟﻌﻴﺔ )‪ (Goal‬ﻓﺈن اﻟﻨﻈﺎم ﺳﻴﻔﻘﺪ ﺗﻮﺟﻬﻪ‪ ،‬ﺣﱴ وإن ﻛﺎﻧﺖ ﲨﻴﻊ اﳌﻜﻮﻧﺎت اﻷﺧﺮى ﻟﻠﻨﻈﺎم ﺗﻌﻤﻞ ﺑﺸﻜﻞ ﺻﺤﻴﺢ‪.‬‬

‫‪223‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Engineering Education Methodologies‬‬ ‫ﻣﻨﻬﺠﻴﺎت اﻟﺘﻌﻠﻴﻢ اﳍﻨﺪﺳﻲ |‬

‫ﻣﻦ ﺣﻴﺚ اﳌﺒﺪأ‪ ،‬ﳝﻜﻦ أن ﻳﻨﻈﺮ إﱃ اﻟﺘﻌﻠﻢ ذاﰐ اﻟﺘﻨﻈﻴﻢ ﻛﻨﻈﺎم ﲢﻜﻢ ذو ﺣﻠﻘﺔ ﺗﻐﺬﻳﺔ ﻋﻜﺴﻴﺔ ﻳﻜﻮن ﻓﻴﻪ اﻟﻄﺎﻟﺐ ﻣﺴﺆوﻻً ﻋﻦ ﺗﻌﻴﲔ ﲨﻴﻊ‬
‫ﻂ ﺑﺎﳍﻨﺪﺳﺔ‪ ،‬وﻳﺘﻨﺎول اﻟﺘﺼﻤﻴﻢ اﻟﺘﻌﻠﻴﻤﻲ‪.‬‬
‫ﻣﻜﻮﻧﺎت وإﺷﺎرات اﻟﻨﻈﺎم‪ .‬ﰲ اﻟﻘﺴﻢ اﻟﺘﺎﱄ ﺳﻨﻌﺮض ﳎﺎﻻً ﺗﺮﺑﻮﻳﺎً ﲝﺜﻴﺎً ﺛﺎﻟﺜﺎً‪ ،‬ﻣﺮﺗﺒ ٌ‬

‫‪ 4-5-4‬أﲝﺎث اﻟﺘﺼﻤﻴﻢ اﻟﺘﻌﻠﻴﻤﻲ )‪:(Instructional Design Research‬‬

‫ﳝﻜﻦ ﻣﻼﺣﻈﺔ أوﺟﻪ اﻟﺘﺸﺎﺑﻪ ﺑﲔ اﻟﺘﺼﻤﻴﻢ اﻟﺘﻌﻠﻴﻤﻲ )‪ (Instructional Design‬واﻟﺘﺼﻤﻴﻢ اﳍﻨﺪﺳﻲ ﰲ اﻟﻌﺪﻳﺪ ﻣﻦ اﻟﻨﻤﺎذج‪ ،‬ﻓﺎﻟﺘﺼﻤﻴﻢ‬
‫اﻟﺘﻌﻠﻴﻤﻲ ﳝﺜﻞ ﻓﺮﻋﺎً ﻣﻦ ﻓﺮوع اﻟﻌﻠﻮم اﻟﺘﻌﻠﻴﻤﻴﺔ]‪ [664‬اﳌﻮﺟﻬﺔ ﻟﺘﺼﻤﻴﻢ اﳌﺒﺎدئ اﻟﺘﻮﺟﻴﻬﻴﺔ اﳌﺴﺎﻋﺪة ﻟﻠﻨﺎس ﻋﻠﻰ اﻟﺘﻌﻠﻢ]‪.[665‬‬

‫ﻳﻌﺮض ﻛﻼً ﻣﻦ ‪ ،[629]Gustafson & Branch‬ﰲ اﺳﺘﻌﺮاﺿﻬﻤﺎ ﻟﻨﻤﺎذج اﻟﺘﺼﻤﻴﻢ اﻟﺘﻌﻠﻴﻤﻲ‪ ،‬ﲬﺴﺔ ﻋﻨﺎﺻﺮ ﺟﻮﻫﺮﻳﺔ ﻟﻨﻤﻮذج اﻟﺘﺼﻤﻴﻢ‬
‫اﻟﺘﻌﻠﻴﻤﻲ ﻟﻴﻜﻮن ﻛﺎﻣﻼً‪ ،‬وﻳﺘﻢ إﳒﺎز ﳕﻮذج اﻟﺘﺼﻤﻴﻢ اﻟﺘﻌﻠﻴﻤﻲ ﻣﻦ ﺧﻼل اﳌﺮاﺣﻞ اﻟﺘﺎﻟﻴﺔ‪ :‬اﻟﺘﺤﻠﻴﻞ )‪ ،(Analyze‬اﻟﺘﺼﻤﻴﻢ )‪،(Design‬‬
‫اﻟﺘﻄﻮﻳﺮ )‪ ،(Develop‬اﻟﺘﻘﻴﻴﻢ )‪ ،(Evaluate‬اﳌﺮاﺟﻌﺔ )‪(Revision‬؛ ﻫﺬﻩ اﻟﻌﻨﺎﺻﺮ ﻣﱰاﺑﻄﺔ وﺗﻌﻤﻞ ﺿﻤﻦ دورة دﻳﻨﺎﻣﻴﻜﻴﺔ ﺗﻜﺮارﻳﺔ ﻛﻤﺎ‬
‫ﻳﻈﻬﺮ اﻟﺸﻜﻞ‪ ،12-4‬وﻫﻲ ﺷﺒﻴﻬﺔ إﱃ ﺣﺪ ﻛﺒﲑ ﺑﻌﻤﻠﻴﺔ اﻟﺘﺼﻤﻴﻢ ﰲ ﻫﻨﺪﺳﺔ ﻧﻈﻢ اﻟﺘﺤﻜﻢ‪.‬‬

‫‪Analyse‬‬
‫‪Revision‬‬ ‫‪Revision‬‬

‫‪Evaluate‬‬ ‫‪Implement‬‬ ‫‪Design‬‬

‫‪Revision‬‬ ‫‪Revision‬‬
‫‪Develop‬‬

‫اﻟﺸﻜﻞ‪ 12-4‬ﳕﻮذج ‪ Gustafson‬ﻟﻠﺘﺼﻤﻴﻢ اﻟﺘﻌﻠﻴﻤﻲ )‪(Instructional design cycle model‬‬

‫اﻟﺪراﺳﺎت اﻷوﱃ ﺣﻮل اﻟﺘﺼﻤﻴﻢ اﻟﺘﻌﻠﻴﻤﻲ ﻟ ـ‪ [666]Silvern‬اﻋﺘﻤﺪت ﻋﻠﻰ ﻧﻈﺮﻳﺔ اﻷﻧﻈﻤﺔ )‪ (Systems Theory‬ﰲ اﻗﱰاح أﻧﻈﻤﺔ ﺗﻌﻠﻴﻤﻴﺔ‬
‫ﻓﻌﺎﻟﺔ‪ ،‬وﳝﻜﻦ ﻣﻼﺣﻈﺔ اﺳﺘﺨﺪام ﻣﺒﺎدئ ﻫﻨﺪﺳﺔ أﻧﻈﻤﺔ اﻟﺘﺤﻜﻢ ﻟﺘﻄﻮﻳﺮ ﳕﺎذج أﻧﻈﻤﺔ ﺗﻌﻠﻴﻤﻴﺔ ﺷﺎﻣﻠﺔ أو ﲣﺼﺼﻴﺔ ﰲ اﻟﺪراﺳﺎت اﻷوﱃ اﻟﱵ‬
‫ﻗﺪﻣﻬﺎ ﻛﻞ ﻣﻦ]‪ ،[556,567‬وﻗﺪ ﺗﻄﻮرت ﻧﺘﻴﺠﺔ ﻟﻼﻋﺘﻤﺎد ﻋﻠﻰ ﻣﺒﺎدئ ﻫﻨﺪﺳﺔ أﻧﻈﻤﺔ اﻟﺘﺤﻜﻢ ﰲ اﻟﺘﺼﻤﻴﻢ اﻟﺘﻌﻠﻴﻤﻲ ﻫﻴﺌﺔ ﻣﺘﻜﺎﻣﻠﺔ ﻟﻸﲝﺎث‬
‫ﺗﺪﻋﻰ ﺑﻴﺌﺔ ﺗﻄﻮﻳﺮ اﻷﻧﻈﻤﺔ اﻟﺘﻌﻠﻴﻤﻴﺔ )‪.[630](ISD‬‬

‫ﳕﻮذﺟﺎً ﻣﻨﻬﺠﻴﺎً‬ ‫إن اﻟﺘﺼﻤﻴﻢ اﳌﻨﻬﺠﻲ اﻟﺘﻨﻈﻴﻤﻲ ﻟﻠﺘﻌﻠﻴﻢ ﻛﺜﲑاً ﻣﺎ ﻳﻌﺘﱪ اﻟﻄﺮﻳﻘﺔ اﻟﻔﻌﺎﻟﺔ ﻟﺘﻌﺰﻳﺰ اﻟﻨﺘﺎج اﻟﺘﻌﻠﻴﻤﻲ]‪ ،[667,668‬وﻗﺪ ﻗﺪم ‪Dick‬‬
‫]‪[630‬‬

‫ﺗﻨﻈﻴﻤﻴﺎً ﰲ اﻟﺘﺼﻤﻴﻢ اﻟﺘﻌﻠﻴﻤﻲ ﰲ ﻛﺘﺎﺑﻪ اﻟﺬي ﻛﺜﲑاً ﻣﺎ ﻳﺴﺘﺸﻬﺪ ﺑﻪ ﰲ اﻷﲝﺎث ﻫﺬا اﺠﻤﻟﺎل‪ ،‬اﻟﻨﻤﻮذج ﻳﺼﻮر اﻟﺘﻌﻠﻴﻢ ﻛﻌﻤﻠﻴﺔ ﻣﺮﻛﺒﺔ ﻣﻦ ﻋﺪة‬
‫أﻧﻈﻤﺔ ﻓﺮﻋﻴﺔ ﺗﻔﺎﻋﻠﻴﺔ‪ ،‬وﻳﺸﺪد اﻟﻨﻤﻮذج ﻋﻠﻰ أﳘﻴﺔ اﻟﺘﻘﻴﻴﻢ اﻟﺒﻨﺎﺋﻲ ﻟﻜﻞ ﻋﻨﺼﺮ ﻣﻦ ﻋﻨﺎﺻﺮ اﻟﻨﻈﺎم‪ .‬ﳝﻜﻦ اﻻﻃﻼع ﻋﻠﻰ ﳕﻮذج ﻟﻠﺘﺼﻤﻴﻢ‬
‫اﻟﺘﻌﻠﻴﻤﻲ اﳊﺪﻳﺚ‪ ،‬واﻟﺬي ﻳﺘﺒﲎ اﻟﺒﻨﻴﺔ اﳌﻨﻬﺠﻴﺔ اﻟﺘﻨﻈﻴﻤﻴﺔ اﻟﺪورﻳﺔ )‪ (The Cyclic Systemic Structure‬ﰲ اﻟﺒﺤﺚ]‪.[669‬‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪224‬‬
‫‪24‬‬ ‫اﻟﻔﺼﻞ اﻟﺮاﺑﻊ | ‪Chapter 4‬‬

‫أﺧﲑاً‪ ،‬ﻳﻮﺟﺪ ﰲ اﻷﲝﺎث اﻟﱰﺑﻮﻳﺔ اﻟﻌﺪﻳﺪ ﻣﻦ ﳕﺎذج اﻟﺘﺼﻤﻴﻢ اﻟﺘﻌﻠﻴﻤﻲ اﳌﺴﺘﻮﺣﺎة ﻣﻦ ﻧﻈﺮﻳﺔ اﻷﻧﻈﻤﺔ‪ ،‬وﻟﻜﻦ اﻟﻘﻠﻴﻞ ﻣﻨﻬﺎ ﰎ ﺗﻘﺪﳝﻪ ﻣﻦ ﻗﺒﻞ‬
‫ﺑﺎﺣﺜﲔ ﻣﻦ ﻤﻟﺘﻤﻊ اﳍﻨﺪﺳﻲ أو ﻣﻦ اﳌﺘﺨﺼﺼﲔ ﰲ ﻋﻠﻮم أﻧﻈﻤﺔ اﻟﺘﺤﻜﻢ]‪.[623‬‬

‫اﻟﺘﻌﻠﻴﻢ اﻟﻤﺨﺒﺮي )‪:(Laboratory Education‬‬ ‫‪6-4‬‬

‫إن اﻟﺪور اﳍﺎم ﻟﻠﺘﺠﺎرب اﻟﻌﻤﻠﻴﺔ اﳌﺨﱪﻳﺔ ﰲ ﻣﻨﺎﻫﺞ اﻟﺘﻌﻠﻴﻢ اﳍﻨﺪﺳﻲ )‪ (Engineering Education Curricula‬ﻗﺪ ﰎ اﻟﺘﺄﻛﻴﺪ ﻋﻠﻴﻪ ﰲ‬
‫ﻋﺪد ﻛﺒﲑ ﻣﻦ اﳌﻘﺎﻻت اﻟﻌﻠﻤﻴﺔ واﳍﻨﺪﺳﻴﺔ]‪.[677-685‬‬

‫ﻟﻘﺪ ﻛﺎﻧﺖ اﻟﻌﻠﻮم اﳍﻨﺪﺳﻴﺔ ﺣﱴ اﻟﻘﺮن اﻟﺜﺎﻣﻦ ﻋﺸﺮ ﺗﺪرس ﻋﻠﻰ أ�ﺎ ﻣﻮﺿﻮﻋﺎت ﻋﻤﻠﻴﺔ ﺗﻄﺒﻴﻘﻴﺔ )‪ (Hands-on Subjects‬ﳎﺮدة‪ ،‬وﻣﻊ‬
‫ذﻟﻚ ﻓﻘﺪ اﺳﺘﻔﺎد اﻟﺘﻌﻠﻴﻢ اﳍﻨﺪﺳﻲ ﻣﻦ اﻟﺘﻘﺪم اﻟﻌﻠﻤﻲ وﺑﺪأت ﻋﻤﻠﻴﺎت ﺗﺮﺳﻴﺦ ﻟﻠﻤﻔﺎﻫﻴﻢ اﻟﻨﻈﺮﻳﺔ ﺑﺸﻜﻞ أﻛﺜﺮ ﻋﻤﻘﺎً ﰲ أواﺧﺮ اﻟﻘﺮن اﻟﺘﺎﺳﻊ‬
‫ﻋﺸﺮ‪ ،‬ﻻﺳﻴﻤﺎ ﰲ ﻣﺪارس اﻟﺘﻌﻠﻴﻢ اﻟﻌﺎﱄ ﰲ اﻟﻮﻻﻳﺎت اﳌﺘﺤﺪة]‪ ،[680‬وﻋﻠﻰ اﻟﺮﻏﻢ ﻣﻦ ذﻟﻚ‪ ،‬ﺣﻈﻴﺖ ﺟﻠﺴﺎت اﻟﺘﻌﻠﻴﻢ اﳌﺨﱪي واﻟﺘﻄﺒﻴﻖ‬
‫اﻟﻌﻤﻠﻲ )‪ (Hands-on‬أﳘﻴﺔ أﻛﱪ ﻣﻦ اﳌﻔﺎﻫﻴﻢ اﻟﻨﻈﺮﻳﺔ واﳌﺒﺎدئ اﻟﺮﻳﺎﺿﻴﺔ ﺣﱴ اﳊﺮب اﻟﻌﺎﳌﻴﺔ اﻷوﱃ]‪ ،[494‬وﻣﻨﺬ ذﻟﻚ اﳊﲔ ﲢﻮل اﻟﱰﻛﻴﺰ‬
‫اﻟﱰﺑﻮي ﰲ اﻟﺘﻌﻠﻴﻢ اﳍﻨﺪﺳﻲ ﳓﻮ اﳌﺰﻳﺪ ﻣﻦ اﳊﺼﺺ اﻟﻨﻈﺮﻳﺔ )‪ (Classroom‬اﻟﻘﺎﺋﻤﺔ ﻋﻠﻰ اﶈﺎﺿﺮات‪ ،‬وﲢﻮل اﻻﻧﺘﺒﺎﻩ ﺗﺪرﳚﻴﺎً ﻋﻦ اﻟﺘﻌﻠﻴﻢ‬
‫اﳌﺨﱪي‪ ،‬وﻻ ﺳﻴﻤﺎ ﺧﻼل اﻟﺴﻨﻮات اﻟﺜﻼﺛﲔ اﳌﺎﺿﻴﺔ]‪ ،[679,686,687‬وﻗﺪ ﻻﺣﻆ ‪ [688]Wankat‬أن ‪ 6%‬ﻓﻘﻂ ﻣﻦ اﳌﻘﺎﻻت اﳌﻨﺸﻮرة ﰲ ﳎﻠﺔ‬
‫أﲝﺎث اﻟﺘﻌﻠﻴﻢ اﳍﻨﺪﺳﻲ ﰲ اﻟﻔﱰة ‪ 1993-2002‬ﻛﺎﻧﺖ ﻓﻴﻬﺎ ﻛﻠﻤﺔ ”‪ “Laboratory‬ﻛﻜﻠﻤﺔ ﻣﻔﺘﺎﺣﻴﺔ‪.‬‬

‫ﻟﻘﺪ ﰎ ﻣﺆﺧﺮاً اﻹﻗﺮار ﻋﻠﻰ أن أﳘﻴﺔ ﻋﻠﻢ اﻟﱰﺑﻴﺔ اﳌﺨﱪي أو اﻟﺒﻴﺪاﻏﻮﺟﻴﺎ اﳌﺨﱪﻳﺔ )‪ (Laboratory Pedagogy‬ﻛﺴﺎﺣﺔ ﺧﺼﺒﺔ ﻟﻠﺒﺤﺚ‬
‫ﺧﻼل اﻟﺴﻨﻮات اﳌﻘﺒﻠﺔ]‪ [679,680‬وﻻ ﺳﻴﻤﺎ ﰲ ﻇﻞ اﺳﺘﺜﻤﺎر اﳌﺰﻳﺪ ﻣﻦ اﻟﺘﻄﻮرات اﳉﺪﻳﺪة ﰲ ﺗﻜﻨﻮﻟﻮﺟﻴﺎ اﳌﻌﻠﻮﻣﺎت واﻻﺗﺼﺎﻻت ﰲ ﺗﻌﺰﻳﺰ اﻟﺘﻌﻠﻴﻢ‬
‫اﳌﺨﱪي‪.‬‬

‫‪ 1-6-4‬أﻫﺪاف اﻟﺘﻌﻠﻴﻢ اﳌﺨﱪي )‪:(Laboratory Education Objectives‬‬

‫ﺑﻮﺿﻊ ﻗﺎﺋﻤﺔ ﻟﻸﻫﺪاف‬ ‫]‪[680‬‬
‫ﻟﻘﺪ أﻇﻬﺮت اﻟﺪراﺳﺎت اﳌﺘﻌﻠﻘﺔ ﺑﺎﻟﺘﻌﻠﻴﻢ اﳌﺨﱪي ﺗﻮاﻓﻘﺎً وﺗﻘﺎرﺑﺎً ﰲ اﻵراء ﺣﻮل أﻫﺪاف ﻫﺬا اﻟﺘﻌﻠﻴﻢ‪ ،‬وﻗﺪ ﻗﺎم‬
‫اﻟﻌﺎﻣﺔ ﻟﻠﺘﻌﻠﻴﻢ اﳌﺨﱪي ﻣﺜﻞ‪ :‬رﺑﻂ اﻟﻌﻠﻢ اﻟﻨﻈﺮي ﺑﺎﻟﺘﺪرﻳﺐ اﻟﻌﻤﻠﻲ‪ ،‬ﺗﺸﺠﻴﻊ اﻟﻄﻼب وﺗﻨﻤﻴﺔ اﳊﺲ اﳍﻨﺪﺳﻲ‪ .‬ﻛﻤﺎ ﻗﺎم ‪Hofestein‬‬
‫]‪[679‬‬

‫ﺑﻮﺿﻊ اﻷﻫﺪاف اﻟﺘﺎﻟﻴﺔ ﻟﻠﺘﻌﻠﻴﻢ اﳌﺨﱪي‪:‬‬

‫‪ ‬اﳌﺴﺎﻋﺪة ﻋﻠﻰ ﻓﻬﻢ اﳌﺒﺎدئ اﻟﻌﻠﻤﻴﺔ‪.‬‬

‫‪ ‬زﻳﺎدة اﻟﺘﺤﻔﻴﺰ واﻻﻫﺘﻤﺎم‪.‬‬
‫‪ ‬اﻟﺘﺰوﻳﺪ ﲟﻬﺎرات ﻋﻠﻤﻴﺔ ﻋﻤﻠﻴﺔ‪.‬‬
‫‪ ‬إﻛﺴﺎب اﳌﻘﺪرة ﻋﻠﻰ ﺣﻞ اﳌﺸﻜﻼت‪.‬‬
‫‪ ‬ﺗﻄﻮﻳﺮ اﻟﻌﺎدات اﻟﻌﻠﻤﻴﺔ‪.‬‬
‫‪ ‬اﳌﺴﺎﻋﺪة ﻋﻠﻰ ﻓﻬﻢ ﻃﺒﻴﻌﺔ اﻟﻌﻠﻢ‪.‬‬
‫‪ ‬ﺗﻄﻮﻳﺮ أﺳﺎﻟﻴﺐ اﻟﺒﺤﺚ اﻟﻌﻠﻤﻲ واﻻﺳﺘﻨﺘﺎج‪.‬‬
‫‪ ‬اﳌﺴﺎﻋﺪة ﰲ ﺗﻮﺿﻴﺢ آﻟﻴﺎت ﺗﻄﺒﻴﻖ اﳌﻌﺎرف اﻟﻌﻠﻤﻴﺔ ﰲ اﳊﻴﺎة اﻟﻴﻮﻣﻴﺔ‪.‬‬

‫‪225‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Engineering Education Methodologies‬‬ ‫ﻣﻨﻬﺠﻴﺎت اﻟﺘﻌﻠﻴﻢ اﳍﻨﺪﺳﻲ |‬

‫ﻛﻤﺎ وﺿﻊ ﳎﻠﺲ اﻋﺘﻤﺎد اﳍﻨﺪﺳﺔ واﻟﺘﻜﻨﻮﻟﻮﺟﻴﺎ ”‪ - (Accreditation Board for Engineering & Technology) “ABET‬اﻟﺬي ﳝﺜﻞ‬
‫اﳍﻴﺌﺔ اﻟﺮﺋﻴﺴﻴﺔ ﻻﻋﺘﻤﺎد اﳌﻮﺿﻮﻋﺎت اﳍﻨﺪﺳﻴﺔ ﰲ اﻟﻮﻻﻳﺎت اﳌﺘﺤﺪة ‪ -‬ﺛﻼﺛﺔ ﻋﺸﺮ ﻫﺪﻓﺎً ﻟﻠﺘﻌﻠﻴﻢ اﳌﺨﱪي‪ ،‬وﻫﻲ‪:‬‬

‫اﻷدوات )‪ ،(Instrumentation‬اﻟﻨﻤﺎذج )‪ ،(Models‬اﻟﺘﺠﺎرب )‪ ،(Experiments‬اﻟﺘﺼﻤﻴﻢ )‪ ،(Design‬اﻟﺘﻌﻠﻢ ﻣﻦ اﳋﻄﺄ ) ‪Learn‬‬

‫‪ ،(from Failure‬اﻹﺑﺪاع )‪ ،(Creativity‬اﻷﺛﺮ اﻟﻨﻔﺴﻲ )‪ ،(Psychomotor‬اﻷﻣﺎن )‪ ،(Safety‬اﻟﺘﻮاﺻﻞ )‪،(Communication‬‬

‫اﻟﻌﻤﻞ اﳉﻤﺎﻋﻲ )‪ ،(Teamwork‬اﻷﺧﻼق ﺿﻤﻦ اﳌﺨﱪ )‪ ،(Ethics in the Lab‬ﲢﻠﻴﻞ اﻟﺒﻴﺎﻧﺎت )‪ ،(Data Analysis‬اﻟﻮﻋﻲ اﳊﺴﻲ‬
‫)‪.[687](Sensory Awareness‬‬

‫اﻟﺒﺎﺣﺜﺎن ‪ [681]Kirschener & Meester‬ﻗﺎﻣﺎ ﺑﺘﻠﺨﻴﺺ أﻛﺜﺮ ﻣﻦ ‪ 100‬ﻫﺪف ﻟﻠﺘﻌﻠﻴﻢ اﳌﺨﱪي – واﻟﱵ وﺟﺪوﻫﺎ ﰲ اﻟﺪراﺳﺎت اﳌﻮﺟﻮدة‬
‫ﺣﱴ ﻣﻨﺘﺼﻒ اﻟﺜﻤﺎﻧﻴﻨﺎت ‪ -‬ﰲ ﲦﺎﻧﻴﺔ أﻫﺪاف رﺋﻴﺴﻴﺔ‪:‬‬

‫‪ -1‬وﺿﻊ اﻟﻔﺮﺿﻴﺎت )‪.(Formulate Hypotheses‬‬

‫‪ -2‬ﺣﻞ اﳌﺸﺎﻛﻞ )‪.(Solve Problems‬‬
‫‪ -3‬اﺳﺘﺨﺪام اﳌﻌﺎرف واﳌﻬﺎرات ﻟﻠﺘﻌﺎﻣﻞ ﻣﻊ أوﺿﺎع وﺣﺎﻻت ﻏﲑ ﻣﺄﻟﻮﻓﺔ‪.‬‬
‫‪ -4‬ﺗﺼﻤﻴﻢ ﲡﺎرب ﺑﺴﻴﻄﺔ ﻻﺧﺘﺒﺎر اﻟﻔﺮﺿﻴﺎت‪.‬‬
‫‪ -5‬اﺳﺘﺨﺪام اﳌﻬﺎرات اﳌﺨﱪﻳﺔ ﻹﳒﺎز ﲡﺎرب ﻋﻤﻠﻴﺔ‪.‬‬
‫‪ -6‬ﺗﻔﺴﲑ ﻧﺘﺎﺋﺞ اﻟﺘﺠﺎرب‪.‬‬
‫‪ -7‬وﺻﻒ اﻟﺘﺠﺎرب ﺑﺸﻜﻞ واﺿﺢ‪.‬‬
‫‪ -8‬ﺗﺬﻛﺮ اﳍﺪف اﻟﺮﺋﻴﺴﻲ ﻣﻦ اﻟﺘﺠﺮﺑﺔ وذﻟﻚ ﻟﻔﱰات زﻣﻨﻴﺔ ﻃﻮﻳﻠﺔ وﺑﺸﻜﻞ ﻣﻠﺤﻮظ‪.‬‬

‫ﻣﻦ ﺧﻼل أﻫﺪاف اﻟﺘﻌﻠﻴﻢ اﳌﺨﱪي اﳌﺬﻛﻮرة‪ ،‬واﻟﱵ ﺗﻌﺘﱪ أﺳﺎﺳﻴﺔ وﺿﺮورﻳﺔ ﻟﺘﺰوﻳﺪ اﳌﻬﻨﺪﺳﲔ ﺑﺎﳌﻬﺎرات اﻟﻼزﻣﺔ ﰲ ﻣﺴﺘﻘﺒﻠﻬﻢ اﳌﻬﲏ‪ ،‬ﳝﻜﻦ أن‬
‫ﻧﺪرك اﻷﳘﻴﺔ اﳊﺎﲰﺔ ﻟﻠﺘﻌﻠﻴﻢ اﳌﺨﱪي‪.‬‬

‫‪ 2-6-4‬ﺗﺼﻨﻴﻔﺎت اﳌﺨﺎﺑﺮ ”‪:(Laboratories Styles) “LSs‬‬

‫ﳝﻜﻦ ﺗﺼﻨﻴﻒ اﳌﺨﺎﺑﺮ ﰲ ﻓﺌﺘﲔ رﺋﻴﺴﻴﺘﲔ‪ :‬اﻟﻔﺌﺔ اﻷوﱃ ﲣﺘﺺ ﺑﺒﻨﻴﺔ اﳌﺨﱪ وﺑﺎﻟﻨﺘﺎﺋﺞ اﳌﺮﺟﻮة ﻣﻦ ﻋﻤﻠﻴﺔ اﻟﺘﻌﻠﻢ ﻓﻴﻪ‪ ،‬وﻣﺜﺎل ذﻟﻚ‪ :‬اﳌﺨﱪ‬
‫اﻹﻳﻀﺎﺣﻲ )‪ ،[689](Expository Laboratory‬أﻣﺎ اﻟﻔﺌﺔ اﻟﺜﺎﻧﻴﺔ ﻓﺘﺴﺘﻨﺪ ﻋﻠﻰ اﻟﻨﻤﻂ اﻟﺬي ﲡﺮى وﻓﻘﻪ اﻟﺘﺠﺎرب‪ ،‬ﻣﺜﻼً‪ :‬ﻫﻞ اﻟﺘﺠﺎرب‬
‫ﻋﻤﻠﻴﺔ ﺗﻄﺒﻴﻘﻴﺔ )‪[690](Hands-on‬؟ أم ﳝﻜﻦ ﺗﺸﻐﻴﻠﻬﺎ ﻋﻦ ﺑﻌﺪ )‪[691](Remote‬؟ أم ﻫﻲ اﻓﱰاﺿﻴﺔ )‪[692](Virtual‬؟‬

‫‪ 1-2-6-4‬ﺗﺼﻨﻴﻒ اﳌﺨﺎﺑﺮ ﻣﻦ ﻣﻨﻈﻮر اﳍﻴﻜﻠﻴﺔ )‪:(LSs from the Structure Perspective‬‬

‫ﺑﲔ أرﺑﻌﺔ أﻧﻮاع رﺋﻴﺴﻴﺔ ﻟﻠﻤﺨﺎﺑﺮ وﻫﻲ‪ :‬اﳌﺨﱪ اﻹﻳﻀﺎﺣﻲ )‪ ،(Expository Lab‬اﳌﺨﱪ اﻟﺘﺠﺮﻳﱯ‬ ‫]‪[681‬‬
‫ﻟﻘﺪ ﻣﻴﺰ اﻟﺒﺎﺣﺚ ‪Kirschener‬‬

‫)‪ ،(Experimental Lab‬اﳌﺨﱪ اﻟﺘﺸﻌﱯ )‪ ،(Divergent Lab‬اﳌﺨﱪ اﳌﺴﺘﻘﻞ )‪.(Standalone Lab‬‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪226‬‬
‫‪24‬‬ ‫اﻟﻔﺼﻞ اﻟﺮاﺑﻊ | ‪Chapter 4‬‬

‫‪ ‬اﳌﺨﱪ اﻹﻳﻀﺎﺣﻲ أو اﻟﺘﻔﺴﲑي ﻳﻘﻮم ﻋﻠﻰ اﺳﺘﺨﺪام دﻟﻴﻞ اﻟﺘﺠﺎرب )‪ (Lab Manual‬اﻟﺬي ﺗﻨﻔﺬ وﻓﻘﻪ ﲨﻴﻊ اﻹﺟﺮاءات‪ ،‬وﺗﻜﻮن‬
‫ﻧﺘﻴﺠﺔ اﻟﺘﺠﺮﺑﺔ ﳏﺪدة ﻣﺴﺒﻘﺎً وﻣﻌﺮوﻓﺔ‪ ،‬وﻋﻠﻰ اﻟﻄﻼب اﺗﺒﺎع ﻃﺮﻳﻘﺔ اﺳﺘﻨﺘﺎﺟﻴﺔ ﳏﺪدة ﻟﻠﺤﺼﻮل ﻋﻠﻰ ﺗﻠﻚ اﻟﻨﺘﻴﺠﺔ‪ ،‬ﻳﻌﺘﱪ اﳌﺨﱪ اﻟﺘﻔﺴﲑي‬
‫ﻣﻦ أﻛﺜﺮ اﻷﻧﻮاع اﺳﺘﺨﺪاﻣﺎً ﰲ ﻣﺮﺣﻠﺔ اﻟﺪراﺳﺔ اﳉﺎﻣﻌﻴﺔ ﰲ اﻟﻌﻠﻮم واﳍﻨﺪﺳﺔ]‪.[678‬‬

‫‪ -‬ﻫﻮ ﳕﻮذج اﺳﺘﻘﺮاﺋﻲ‪ ،‬ذو ﻣﻨﺤﻰ‬ ‫]‪[689‬‬

‫‪ ‬اﳌﺨﱪ اﻟﺘﺠﺮﻳﱯ ‪ -‬أو ﻣﺎ ﻳﻌﺮف ﺑﺎﻟﻨﻤﻮذج ذو اﻟﻨﻬﺎﻳﺔ اﳌﻔﺘﻮﺣﺔ )‪(Open-ended Form‬‬
‫اﺳﺘﻜﺸﺎﰲ‪ ،‬ﻟﻴﺲ ﻟﻪ ﺑﻨﻴﺔ ﳏﺪدة‪ ،‬وﻳﻌﺘﱪ ﳐﱪاً ﳌﺸﺎرﻳﻊ اﻟﺒﺤﺚ ﰲ ﻣﺮﺣﻠﺔ اﻟﺪراﺳﺔ اﳉﺎﻣﻌﻴﺔ‪ ،‬ﻫﺬا اﻟﻨﻮع ﻣﻦ اﳌﺨﺎﺑﺮ ﻳﻜﻮن ذا ﻣﻨﺤﻰ ﲝﺜﻲ‬
‫أﻛﺜﺮ ﻣﻦ ﻛﻮ�ﺎ ذات ﻃﺎﺑﻊ ﺗﻌﻠﻴﻤﻲ‪ ،‬وﻳﺘﻢ ﻓﻴﻬﺎ ﺗﻨﻔﻴﺬ اﻟﻌﺪﻳﺪ ﻣﻦ ﻣﻬﺎم اﻟﺘﻌﻠﻢ اﻟﻘﺎﺋﻢ ﻋﻠﻰ اﳌﺸﺎرﻳﻊ ) ‪Project Based‬‬

‫‪.[683](Learning‬‬

‫‪ ‬ﺗﻌﺘﱪ اﳌﺨﺎﺑﺮ اﻟﺘﺸﻌﺒﻴﺔ ﻣﺰﻳﺞ ﻣﻦ اﳌﺨﺎﺑﺮ اﻟﺘﻔﺴﲑﻳﺔ واﳌﺨﺎﺑﺮ اﻟﺘﺠﺮﻳﺒﻴﺔ‪.‬‬

‫‪ ‬أﻣﺎ اﳌﺨﺎﺑﺮ اﳌﺴﺘﻘﻠﺔ ﻓﻬﻲ اﻟﱵ ﻳﻜﻮن ﻓﻴﻬﺎ اﻟﻌﻤﻞ اﳌﺨﱪي ﻣﺴﺘﻘﻼً وﻏﲑ ﻣﺮﺗﺒﻂ ﺑﻨﻤﻮذج دراﺳﻲ ﻧﻈﺮي ﳏﺪد‪.‬‬

‫‪ 2-2-6-4‬ﺗﺼﻨﻴﻒ اﳌﺨﺎﺑﺮ ﻣﻦ ﻣﻨﻈﻮر ﳕﻂ اﻟﻮﺻﻮل إﻟﻴﻬﺎ )‪:(LSs from the Access Mode Perspective‬‬

‫ﻳﻌﺘﻤﺪ اﻟﻨﻤﻮذج اﻟﻜﻼﺳﻴﻜﻲ ﻟﻠﺘﻌﻠﻴﻢ اﳌﺨﱪي اﻟﺘﻄﺒﻴﻘﻲ ﻋﻠﻰ اﳊﻀﻮر اﻟﻔﻌﻠﻲ ﻟﻸﻓﺮاد وﻋﻠﻰ أدوات اﻟﺘﺠﺮﺑﺔ‪ ،‬وﻫﺬا ﻣﺎ ﻳﻌﺮف ﰲ اﻷﲝﺎث ﺑﺎﺳﻢ‬
‫اﳌﺨﺘﱪ اﻟﻌﻤﻠﻲ اﻟﺘﻄﺒﻴﻘﻲ )‪ [682](Hands-on Lab‬اﻟﺬي ﻳﺴﺘﻠﺰم أن ﻳﻜﻮن اﻟﻄﻼب ﻋﻠﻰ ﲤﺎس ﻣﺒﺎﺷﺮ ﻣﻊ اﻟﺘﺠﺮﺑﺔ وأدواﻬﺗﺎ اﳊﻘﻴﻘﻴﺔ‪ .‬ﻛﻤﺎ‬
‫ﻳﻄﻠﻖ ﻋﻠﻰ اﳌﺨﺎﺑﺮ اﻟﺘﻄﺒﻴﻘﻴﺔ )‪ (Hands-on‬أﺣﻴﺎﻧﺎً ﺑـ ـ”‪.[693]“Proximal Labs‬‬

‫ﻟﻘﺪ أدت اﻟﺘﻄﻮرات اﳊﺪﻳﺜﺔ ﰲ ﺗﻜﻨﻮﻟﻮﺟﻴﺎ اﳌﻌﻠﻮﻣﺎت واﻻﺗﺼﺎﻻت ﺧﻼل اﻟﻌﻘﻮد اﻟﺜﻼﺛﺔ اﳌﺎﺿﻴﺔ إﱃ ﻇﻬﻮر ﻧﻮﻋﲔ ﺟﺪﻳﺪﻳﻦ ﻣﻦ اﳌﺨﺘﱪات‬
‫إﺿﺎﻓﺔً إﱃ اﳌﺨﺎﺑﺮ اﻟﺘﻄﺒﻴﻘﻴﺔ وﻫﻲ‪:‬‬

‫‪ -1‬اﳌﺨﺎﺑﺮ اﻻﻓﱰاﺿﻴﺔ – اﶈﺎﻛﺎة )‪ :(Virtual Labs - Simulation‬وﻫﻲ ﺗﻌﺘﻤﺪ ﻋﻠﻰ ﻋﻤﻠﻴﺎت ﳏﺎﻛﺎة ﺗﻘﺮﻳﺒﻴﺔ ﻟﻠﺘﺠﺎرب اﻟﱵ ﲡﺮي‬
‫ﰲ اﳌﺨﺎﺑﺮ اﳊﻘﻴﻘﻴﺔ‪ ،‬وﳝﻜﻦ إﳚﺎد أﻣﺜﻠﺔ ﻋﻦ ﻣﺜﻞ ﺗﻠﻚ اﻟﻌﻤﻠﻴﺎت ﰲ اﻷﲝﺎث]‪.[692,694‬‬

‫‪ -2‬ﳐﺎﺑﺮ اﻟﺘﻌﻠﻢ ﻋﻦ ﺑﻌﺪ )‪ :(Remote Labs‬ﺗﺴﻤﺢ ﺑﺎﻟﺪﺧﻮل إﱃ اﻟﺘﺠﺎرب ﻋﻦ ﺑﻌﺪ ﻣﻦ ﺧﻼل ﺷﺒﻜﺔ اﻹﻧﱰﻧﺖ‪ ،‬وﳝﻜﻦ إﳚﺎد أﻣﺜﻠﺔ‬
‫ﻋﻦ ﻣﺜﻞ ﻫﺬﻩ اﳊﺎﻻت ﰲ اﻷﲝﺎث]‪.[691,695-698‬‬

‫‪ 1-2-2-6-4‬اﳌﺨﺘﱪ اﻟﻌﻤﻠﻲ اﻟﺘﻄﺒﻴﻘﻲ )‪:(Hands-on Lab‬‬

‫ﺳﻨﻘﺪم ﰲ ﻣﺎﻳﻠﻲ ﻧﻈﺮة ﻋﺎﻣﺔ ﻋﻠﻰ أﻫﻢ اﻟﺘﻘﺎرﻳﺮ اﻟﱵ ﻗﺪﻣﺘﻬﺎ اﻷﲝﺎث ﺣﻮل أﳘﻴﺔ اﳌﺨﺎﺑﺮ اﻟﺘﻄﺒﻴﻘﻴﺔ واﻟﻘﻴﻮد اﻟﱵ ﲢﺪ ﻋﻤﻠﻬﺎ‪.‬‬

‫‪ 1-1-2-2-6-4‬أﳘﻴﺔ اﳌﺨﺎﺑﺮ اﻟﺘﻄﺒﻴﻘﻴﺔ )‪:(Hands-on Laboratories Important‬‬

‫ﺗﻌﺰز اﳌﺨﺎﺑﺮ اﻟﺘﻄﺒﻴﻘﻴﺔ أﻫﻢ أﻫﺪاف اﺳﺘﺨﺪام اﻟﺘﺠﺎرب ﰲ اﻟﻌﻤﻠﻴﺔ اﻟﺘﻌﻠﻴﻤﻴﺔ‪ ،‬واﻟﺬي ﻫﻮ ﺗﺄﻣﲔ اﻟﺸﻌﻮر ﺑﺎﻟﻮاﻗﻌﻴﺔ اﻟﺘﻄﺒﻴﻘﻴﺔ‪ ،‬أي اﻟﺘﻌﺎﻣﻞ ﻣﻊ‬
‫ﲡﺎرب ﺣﻘﻴﻘﻴﺔ ﻻﻛﺘﺴﺎب ﻣﻬﺎرات ﻋﻤﻠﻴﺔ ﻣﻦ ﺧﻼل اﻟﻠﻤﺲ واﻟﺸﻌﻮر ﺑﺎﻷدوات واﳌﻌﺪات واﻟﺘﻌﺎﻣﻞ ﻣﻌﻬﺎ‪ ،‬ﺣﻴﺚ أﻧﻪ ﻣﻦ اﳌﺴﺘﺤﻴﻞ أو ﻣﻦ‬
‫اﻟﺼﻌﺐ ﺟﺪاً اﳊﺼﻮل ﻋﻠﻰ ﻣﺜﻞ ﺗﻠﻚ اﳌﻬﺎرات ﻋﻦ ﻃﺮﻳﻖ اﳌﺨﺎﺑﺮ اﻻﻓﱰاﺿﻴﺔ أو اﳌﺨﺎﺑﺮ ﻋﻦ ﺑﻌﺪ‪.‬‬

‫‪227‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Engineering Education Methodologies‬‬ ‫ﻣﻨﻬﺠﻴﺎت اﻟﺘﻌﻠﻴﻢ اﳍﻨﺪﺳﻲ |‬

‫ﻟﻘﺪ أﻛﺪت اﻟﺪراﺳﺎت ﰲ اﻟﺒﻴﺪاﻏﻮﺟﻴﺎ اﻟﺒﻨﺎﺋﻴﺔ ﻣﺮاراً ﻋﻠﻰ أﳘﻴﺔ وﺟﻮد ﺑﻴﺌﺔ ﺣﻘﻴﻘﻴﺔ أﺻﻠﻴﺔ‪ ،‬أو ﺑﻴﺌﺔ ﺸﺎﻬﺑﺔ ﻟﻠﺒﻴﺌﺔ اﳊﻘﻴﻘﻴﺔ ﰲ ﻋﻤﻠﻴﺔ اﻟﺘﻌﻠﻢ]‪،[548‬‬
‫ﺣﻴﺚ أن اﻟﻌﻮاﻣﻞ اﻟﻌﺎﻃﻔﻴﺔ ﺗﻠﻌﺐ دوراً ﻫﺎﻣﺎً ﰲ ﻋﻤﻠﻴﺔ اﻟﺘﻌﻠﻢ‪ ،‬وﻏﻴﺎب اﻟﺸﻌﻮر ﺑﺎﻟﻮاﻗﻌﻴﺔ ﳝﻜﻦ أن ﻳﻜﻮن ﲟﺜﺎﺑﺔ ﻋﺎﻣﻞ ﳏﺒﻂ ﰲ ﻋﻤﻠﻴﺔ اﻟﺘﻌﻠﻢ‪،‬‬
‫اﻟﻌﺪﻳﺪ ﻣﻦ اﻷﲝﺎث واﻟﺪراﺳﺎت ﺗﺮﺑﻂ ﺗﻔﻮق ﻧﺘﺎﺋﺞ ﻋﻤﻠﻴﺎت اﻟﺘﻌﻠﻢ ﰲ اﻟﻈﺮوف اﳊﻘﻴﻘﻴﺔ ﻋﻦ ﻘﺎﺑﻼﻬﺗﺎ ﰲ اﻟﻈﺮوف اﻻﻓﱰاﺿﻴﺔ )ﻣﺜﻞ اﶈﺎﻛﺎة(‬
‫ﺑﻌﺎﻣﻞ اﻟﻮاﻗﻌﻴﺔ )‪ ،[690,699](Realism Factor‬وﻳﻘﻮل]‪ [700‬أن اﻟﺘﻌﻠﻢ واﻟﺘﺪرﻳﺐ اﻷﻓﻀﻞ ﻳﺘﻄﻠﺐ ﻣﺴﺘﻮى أﻋﻠﻰ ﻣﻦ اﻟﻮاﻗﻌﻴﺔ‪.‬‬

‫‪ 2-1-2-2-6-4‬ﻗﻴﻮد ﻋﻤﻞ اﳌﺨﺎﺑﺮ اﻟﺘﻄﺒﻴﻘﻴﺔ )‪:(Constraints of Hands-on Laboratories‬‬

‫ﺗﻌﺘﱪ ﻋﻤﻠﻴﺔ ﺑﻨﺎء اﳌﻌﺮﻓﺔ ﻋﻤﻠﻴﺔ ﻣﻌﻘﺪة ﳝﻜﻦ أن ﺗﻜﻮن ﺧﺎرج اﻹﻃﺎر اﻟﺰﻣﲏ اﳌﻘﺮر ﳉﻠﺴﺎت اﻟﺘﺪرﻳﺐ ﺿﻤﻦ اﳌﺨﺎﺑﺮ اﻟﺘﻄﺒﻴﻘﻴﺔ اﳊﻘﻴﻘﻴﺔ‪ ،‬ﻓﻌﻠﻰ‬
‫ﺳﺒﻴﻞ اﳌﺜﺎل‪ ،‬وﻓﻘﺎً ﻟﻨﻈﺮﻳﺔ ‪ Kolb‬ﰲ اﻟﺘﻌﻠﻢ اﻟﺘﺠﺮﻳﱯ ﻳﺘﻢ ﺑﻨﺎء اﳌﻌﺮﻓﺔ ﻋﱪ أرﺑﻌﺔ أﻃﻮار أﺳﺎﺳﻴﺔ ﺗﺸﻤﻞ‪ :‬اﻟﺘﺤﻔﻴﺰ )‪ ،(Stimulation‬اﻟﺘﺄﻣﻞ‬
‫)‪ ،(Reflection‬اﻻﺳﺘﺨﻼص )‪ ،(Abstraction‬اﻟﺘﺠﺮﻳﺐ )‪.[545](Experimentation‬‬

‫وﻳﻌﺘﱪ اﻟﱰﺑﻮﻳﻮن اﻟﺘﻌﻠﻢ ﻋﻤﻠﻴﺔ ﺗﻜﺮارﻳﺔ)‪ ،[545,701,702](Iterative Process‬ﻛﻤﺎ أن اﻟﺘﻌﻠﻢ اﻟﻔﻌﺎل ﰲ اﳌﺨﺎﺑﺮ ﳛﺘﺎج إﱃ‬
‫اﳌﺴﻠﱠﻤﺎت ﻋﻤﻮﻣﺎً ﻏﺎﺋﺒﺔ ﰲ اﻟﺘﻌﻠﻴﻢ اﻟﻜﻼﺳﻴﻜﻲ ﻟﻠﻤﺨﺎﺑﺮ اﻟﺘﻄﺒﻴﻘﻴﺔ‪ ،‬وﻳﻌﻮد ذﻟﻚ ﺑﺸﻜﻞ أﺳﺎﺳﻲ إﱃ‬
‫اﻟﺘﺄﻣﻞ)‪ ، (Reflection‬وﻫﺬﻩ َ‬
‫]‪[679‬‬

‫ﺿﻴﻖ اﻟﻮﻗﺖ‪.‬‬

‫اﳉﻠﺴﺎت ﰲ اﳌﺨﺎﺑﺮ اﻟﺘﻄﺒﻴﻘﻴﺔ ﺗﺪرس ﻋﺎدة ﻋﻠﻰ ﺷﻜﻞ ﺷﺮوح ذات إﺛﺒﺎت أو ﺑﺮﻫﺎن وﺣﻴﺪ‪ ،‬وذﻟﻚ ﻳﻌﻮد ﻷﺳﺒﺎب اﻗﺘﺼﺎدﻳﺔ وﻟﻮﺟﺴﺘﻴﺔ‪ ،‬وﻟﻜﻦ‬
‫ﺗﺸﻜﻴﻞ وﻓﻬﻢ اﳌﺒﺎدئ أﺛﻨﺎء اﻟﺘﻌﻠﻢ ﳛﺘﺎج إﱃ أﻛﺜﺮ ﻣﻦ ﺷﺮح ﻣﻊ إﺛﺒﺎت وﺣﻴﺪ]‪ ،[545‬وﻟﺬﻟﻚ ﱂ ﻳﺘﺤﻘﻖ اﻷﺛﺮ اﳌﻄﻠﻮب ﻟﻠﺘﻌﻠﻴﻢ اﳌﺨﱪي ﻋﻠﻰ‬
‫ﺗﻌﻠﻢ اﻟﻄﻼب ﰲ ﻛﺜﲑ ﻣﻦ اﻷﺣﻴﺎن]‪.[703‬‬

‫اﳌﺨﺎﺑﺮ اﻟﺘﻄﺒﻴﻘﻴﺔ ﻣﻨﺼﺎت ﻋﻤﻞ ﺿﻌﻴﻔﺔ ﻟﺒﻨﺎء اﳌﻌﺮﻓﺔ‪ ،‬وﻳﺮﺟﻊ ذﻟﻚ أﺳﺎﺳﺎً إﱃ أن اﻟﻄﻼب ﻟﻴﺲ ﻟﺪﻳﻬﻢ اﻟﻮﻗﺖ اﻟﻜﺎﰲ ﻟﻠﺘﻔﺎﻋﻞ‬ ‫ﻳﻌﺘﱪ‬
‫]‪[704‬‬

‫ﺿﻌﻒ اﻟﺒﻨﺎء اﳌﻌﺮﰲ ﺧﻼل‬ ‫]‪[681‬‬

‫واﻟﺘﺄﻣﻞ‪ ،‬إذ ﻫﻢ ﻣﺸﻐﻮﻟﻮن ﺑﺎﳉﻮاﻧﺐ اﻟﻌﻤﻠﻴﺔ واﻟﺘﻘﻨﻴﺔ ﻣﻦ اﻟﺘﺠﺮﺑﺔ ﺧﻼل اﳉﻠﺴﺔ اﳌﺨﱪﻳﺔ اﻟﺘﻄﺒﻴﻘﻴﺔ‪ .‬وﻳﻌﺰو‬
‫اﳉﻠﺴﺎت اﳌﺨﱪﻳﺔ اﻟﺘﻄﺒﻴﻘﻴﺔ إﱃ اﻹرﻫﺎق اﳌﻌﺮﰲ )‪ - (Cognitive Overload‬اﻟﺬي ﻫﻮ اﻹﺟﻬﺎد اﻟﺰاﺋﺪ ﻋﻠﻰ اﻟﺬاﻛﺮة‪ ،‬إﺿﺎﻓﺔ إﱃ أﻧﻪ‬
‫ﻳُﻔﺮض ﻋﻠﻰ اﻟﻄﻼب اﻻﻟﺘﺰام ﺑﺎﻟﻔﱰات اﻟﺰﻣﻨﻴﺔ اﻟﻘﺼﲑة اﳌﻘﺮرة ﻟﻠﻌﻤﻞ اﳌﺨﱪي‪.‬‬

‫ﻳﻌﺮض]‪ [681‬ﺗﻘﺮﻳﺮاً ﻣﻔﺎدﻩ أن ﻫﻨﺎك ﺗﻮاﻓﻖ ﻋﺎم ﰲ اﻵراء ﻋﻠﻰ أن ﻧﺎﺗﺞ اﻟﺘﺤﺼﻴﻞ اﻟﻌﻠﻤﻲ ﻟﻠﻌﻤﻞ اﻟﺘﻄﺒﻴﻘﻲ اﳌﺨﱪي ﺿﻌﻴﻒ ﻣﻘﺎرﻧﺔ ﻣﻊ اﻟﻮﻗﺖ‬
‫واﳉﻬﺪ واﻟﺘﻜﺎﻟﻴﻒ اﳌﺨﺼﺼﺔ ﻟﻪ‪ ،‬وﻗﺪ ذﻛﺮت ﻧﻘﻄﺔ اﻟﻀﻌﻒ ﻫﺬﻩ ﻣﺮاراً ﰲ ﺗﻘﺎرﻳﺮ اﻷﲝﺎث]‪.[678,679,682‬‬

‫وإﲨﺎﻻً‪ ،‬ﺗﻌﺎﱐ اﳌﺨﺎﺑﺮ اﻟﺘﻄﺒﻴﻘﻴﺔ ﻣﻦ اﻟﻌﺪﻳﺪ ﻣﻦ اﻟﻘﻴﻮد‪ ،‬ﻛﻤﺤﺪودﻳﺔ اﻟﻮﻗﺖ وﺿﻌﻒ اﳊﺼﻴﻠﺔ اﳌﻌﺮﻓﻴﺔ اﳌﻜﺘﺴﺒﺔ ﻣﻨﻬﺎ]‪ [681,703,704‬ﻓﻀﻼً ﻋﻦ‬
‫اﻻﻛﺘﻔﺎء ﺑﱪﻫﺎن أو إﺛﺒﺎت واﺣﺪ ﻟﻠﺘﺠﺮﺑﺔ ﰲ ﻣﻌﻈﻢ اﳊﺎﻻت‪ ،‬واﺳﺘﻬﻼك اﳌﻮاد‪ ،‬اﻟﻌﻴﻮب اﻟﻔﻨﻴﺔ‪ ،‬ﻏﻼء اﳌﻌﺪات‪ ،‬ﺧﻄﻮرة ﺑﻌﺾ اﻟﺘﺠﺎرب )ﻛﻤﺎ‬
‫ﰲ ﳐﺎﺑﺮ اﻟﺘﻮﺗﺮ اﻟﻌﺎﱄ ﻣﺜﻼً(‪ ،‬اﳊﺎﺟﺔ إﱃ وﺟﻮد ﻣﻌﻠﻢ و‪/‬أو ﺗﻘﲏ‪.‬‬

‫‪ 2-2-2-6-4‬اﳌﺨﺎﺑﺮ اﻻﻓﱰاﺿﻴﺔ )‪:(Virtual (Simulated) Laboratories‬‬

‫اﳌﺨﺎﺑﺮ اﻻﻓﱰاﺿﻴﺔ ﺗﺘﻤﺜﻞ ﺑﻌﻤﻠﻴﺎت ﳏﺎﻛﺎة )‪ (Simulation‬ﺑﺎﺳﺘﺨﺪام اﳊﺎﺳﺐ ﻟﻠﺘﺠﺎرب اﳌﺨﱪﻳﺔ‪ .‬وﰲ اﻷﲝﺎث‪ ،‬ﻳﺸﲑ ﻫﺬا اﳌﺼﻄﻠﺢ أﺣﻴﺎﻧﺎً‬
‫إﱃ اﳌﺨﺎﺑﺮ ﻋﻦ ﺑﻌﺪ )‪ ،[705](Remote Labs‬وﻟﻜﻦ ﰲ ﻫﺬﻩ اﻷﻃﺮوﺣﺔ ﻳﻘﺼﺪ ﺑﺎﳌﺨﺎﺑﺮ اﻻﻓﱰاﺿﻴﺔ ﲢﺪﻳﺪاً ﻋﻤﻠﻴﺎت اﶈﺎﻛﺎة‪ ،‬ﰲ ﺣﲔ‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪228‬‬
‫‪24‬‬ ‫اﻟﻔﺼﻞ اﻟﺮاﺑﻊ | ‪Chapter 4‬‬

‫ﻧﺴﺘﺨﺪم ﻣﺼﻄﻠﺢ "اﳌﺨﺎﺑﺮ ﻋﻦ ﺑﻌﺪ" )‪ (Remote Labs‬أو "اﳌﺨﺎﺑﺮ ﻋﱪ اﻹﻧﱰﻧﺖ" )‪ (Online Lab‬ﻟﻠﺪﻻﻟﺔ ﻋﻠﻰ اﻟﺘﺠﻬﻴﺰات واﻟﺘﺠﺎرب‬
‫اﳌﺨﱪﻳﺔ اﻟﱵ ﻳﺘﻢ اﻟﺘﺤﻜﻢ ﺑﺎ واﻟﺘﻌﺎﻣﻞ ﻣﻌﻬﺎ ﻋﻦ ﺑﻌﺪ‪.‬‬

‫‪ 1-2-2-2-6-4‬ﶈﺔ ﺗﺎرﳜﻴﺔ ﻋﻦ اﳌﺨﺎﺑﺮ اﻻﻓﱰاﺿﻴﺔ )‪:(Virtual Labs Historical Perspective‬‬

‫ﻟﻘﺪ أدرك اﻟﱰﺑﻮﻳﻮن اﻟﺪور اﳍﺎم اﻟﺬي ﺗﻠﻌﺒﻪ اﶈﺎﻛﺎة ﺑﺎﺳﺘﺨﺪام اﳊﺎﺳﺐ )‪ (Computer Simulation‬أو اﻟﺘﺠﺎرب اﻻﻓﱰاﺿﻴﺔ اﻟﱵ ﺗﻌﺘﻤﺪ‬
‫ﻋﻠﻰ اﳊﺎﺳﺐ )‪ (PC-based Virtual Experiments‬ﰲ ﲢﺴﲔ وﺗﻌﺰﻳﺰ اﻟﻌﻤﻠﻴﺔ اﻟﺘﻌﻠﻴﻤﻴﺔ‪ ،‬وذﻟﻚ ﻣﻨﺬ اﻷﻳﺎم اﻷوﱃ ﻟﻈﻬﻮر اﳊﻮاﺳﺐ‪.‬‬

‫ﻳﻌﻮد ﺗﺎرﻳﺦ أول اﺳﺘﺨﺪام ﻟﻠﻤﺤﺎﻛﺎة ﰲ ﺑﻴﺌﺔ ﺗﻌﻠﻴﻤﻴﺔ إﱃ ﻋﺎم ‪ ،1962‬وذﻟﻚ ﻋﻨﺪﻣﺎ ﰎ اﺳﺘﺨﺪام اﶈﺎﻛﺎة ﻟﺘﻮﺿﻴﺢ ﳏﺎﺿﺮات ﻟﻄﻼب اﻟﺴﻨﺔ‬
‫اﳉﺎﻣﻌﻴﺔ اﻷوﱃ ﰲ اﳍﻨﺪﺳﺔ اﻟﻨﻮوﻳﺔ ﰲ اﳌﻤﻠﻜﺔ اﳌﺘﺤﺪة]‪ [706‬واﻟﻮﻻﻳﺎت اﳌﺘﺤﺪة]‪.[707‬‬

‫ﻻﺣﻘﺎً ﺧﻼل ﻋﺎم ‪ 1968‬ﰎ ﺗﻄﻮﻳﺮ ﻧﻈﺎم ﳏﺎﻛﺎة ﺗﻔﺎﻋﻠﻲ ﻟﻺدارة اﻟﻄﺒﻴﺔ ﳌﺮﺿﻰ ارﺗﻔﺎع ﺿﻐﻂ اﻟﺪم ﰲ ﺟﺎﻣﻌﺔ ‪ Alberta‬ﰲ ﻛﻨﺪا]‪ ،[708‬وﻛﺎن‬
‫ﻫﻨﺎك ﻋﺪد ﻣﺘﺰاﻳﺪ ﻣﻦ اﳌﻌﺎﻫﺪ اﻟﱵ اﺳﺘﺨﺪﻣﺖ ﻓﻴﻬﺎ ﲡﺎرب اﶈﺎﻛﺎة ﰲ اﳌﻤﻠﻜﺔ اﳌﺘﺤﺪة‪ ،‬ﰒ ﰲ أواﺋﻞ اﻟﺴﺒﻌﻴﻨﺎت ﰎ ﺗﻄﻮﻳﺮ ﺑﺮاﻣﺞ ﳏﺎﻛﺎة‬
‫ﺣﺎﺳﻮﺑﻴﺔ ﳍﻨﺪﺳﺔ اﻟﻄﺎﻗﺔ اﻟﻜﻬﺮﺑﺎﺋﻴﺔ ﰲ ﻛﻠﻴﺔ اﳌﻠﻜﺔ ‪ ،[709]Mary‬واﺳﺘﺨﺪﻣﺖ ﻋﻤﻠﻴﺎت اﶈﺎﻛﺎة أﻳﻀﺎً ﻟﻄﻼب اﳍﻨﺪﺳﺔ اﻟﻨﻮوﻳﺔ ﰲ ﻧﻔﺲ‬
‫اﳉﺎﻣﻌﺔ ﰲ أواﺋﻞ اﻟﻌﺎم ‪ ،[710]1971‬وﻛﺬﻟﻚ اﺳﺘﺨﺪﻣﺖ اﶈﺎﻛﺎة ﰲ ﳏﺎﺿﺮات ﻣﻴﻜﺎﻧﻴﻚ اﻟﺴﻮاﺋﻞ واﻧﺘﻘﺎل اﳊﺮارة ﺧﻼل ﻋﺎم ‪،[711]1974‬‬
‫وﻗﺪ أﻇﻬﺮت اﻟﺪراﺳﺎت واﻷﲝﺎث ﻣﻨﺬ ذﻟﻚ اﳊﲔ اﻵﺛﺎر اﻹﳚﺎﺑﻴﺔ ﻻﺳﺘﺨﺪام ﻋﻤﻠﻴﺎت اﶈﺎﻛﺎة ﺑﺎﺳﺘﺨﺪام اﳊﺎﺳﺐ ﰲ اﻟﻌﻤﻠﻴﺎت اﻟﺘﻌﻠﻴﻤﻴﺔ‪.‬‬

‫‪ 2-2-2-2-6-4‬أﺛﺮ اﶈﺎﻛﺎة ﺑﺎﺳﺘﺨﺪام اﳊﺎﺳﺐ ﻋﻠﻰ ﺗﻌﻠﻢ اﻟﻄﻼب‬

‫‪(Impact of Computer Simulations on Students’ Learning):‬‬
‫إن ﻋﻤﻠﻴﺎت اﶈﺎﻛﺎة ﺑﺎﺳﺘﺨﺪام اﳊﺎﺳﺐ ﻏﺪت ﺟﺰءاً ﻻ ﻳﺘﺠﺰأ ﻣﻦ اﻟﺘﻌﻠﻴﻢ اﳍﻨﺪﺳﻲ ﻣﻨﺬ أواﺋﻞ اﻟﺴﺒﻌﻴﻨﺎت]‪[709,711-720‬؛ اﻟﻌﺪﻳﺪ ﻣﻦ اﻷﲝﺎث‬
‫أﻇﻬﺮت اﻷﺛﺮ اﻹﳚﺎﰊ ﻟﻌﻤﻠﻴﺎت اﶈﺎﻛﺎة ﻋﻠﻰ ﺗﻌﻠﻢ اﻟﻄﻼب]‪ ،[714,717,718,721-724‬ﺣﱴ أﻧﻪ ﰲ ﺑﻌﺾ اﻷﺣﻴﺎن‪ ،‬ﺣﻠﺖ اﳌﺨﺎﺑﺮ اﻻﻓﱰاﺿﻴﺔ‬
‫ﻣﻜﺎن اﳌﺨﺎﺑﺮ اﻟﺘﻄﺒﻴﻘﻴﺔ]‪.[604‬‬

‫ﰲ ﻋﺎم ‪ 1977‬ﰎ إدﺧﺎل اﻟﺘﺼﻤﻴﻢ ﺑﺎﺳﺘﺨﺪام اﳊﺎﺳﺐ )‪ (CAD: Computer Aided Design‬ﺿﻤﻦ ﻣﻨﺎﻫﺞ اﻟﺘﺼﻤﻴﻢ ﰲ ﺟﺎﻣﻌﺔ‬
‫وﻻﻳﺔ أوﻫﺎﻳﻮ‪ ،‬اﻷﻣﺮ اﻟﺬي أدى إﱃ ﻋﺐء ﻋﻤﻞ أﻛﱪ ﻋﻠﻰ اﻟﻄﻼب‪ ،‬وﻟﻜﻦ اﻷﻣﺮ اﳌﻔﺎﺟﺊ ﻛﺎن ﻣﻮﻗﻒ اﻟﻄﻼب اﻹﳚﺎﰊ ﲡﺎﻩ ذﻟﻚ اﻟﻌﺐء‬
‫اﻹﺿﺎﰲ]‪ .[717‬ﻛﻤﺎ ﰎ اﺳﺘﺨﺪام اﶈﺎﻛﺎة ﺑﺎﺳﺘﺨﺪام اﳊﺎﺳﺐ ﰲ ﻣﻘﺮر ﻋﻠﻢ اﳊﺮﻛﺔ )‪ (Kinematics‬ﻟﻄﻼب اﳍﻨﺪﺳﺔ اﳌﻴﻜﺎﻧﻴﻜﻴﺔ وﻗﺪ ﻧﺘﺞ‬
‫ﻋﻨﻪ أﺛﺮ إﳚﺎﰊ ﻛﺒﲑ ﰲ ﺗﻌﻤﻴﻖ ﻓﻬﻢ اﻟﻄﻼب ﻟﻠﻤﺒﺎدئ اﻷﺳﺎﺳﻴﺔ ﻟﻠﻤﻨﻬﺞ]‪ .[721‬أﻳﻀﺎً اﺳﺘﺨﺪﻣﺖ ﺑﺮاﻣﺞ اﶈﺎﻛﺎة اﻟﺘﻔﺎﻋﻠﻴﺔ ﺑﺎﺳﺘﺨﺪام اﳊﺎﺳﺐ‬
‫ﰲ ﳏﺎﺿﺮات ﻣﻌﺎﳉﺔ اﻹﺷﺎرة اﻟﺮﻗﻤﻴﺔ ﰲ ﻣﻌﻬﺪ ‪ Paisley‬ﻟﻠﺘﻜﻨﻮﻟﻮﺟﻴﺎ ﰲ اﺳﻜﻮﺗﻠﻨﺪا‪ ،‬وﻗﺪ ﻛﺎﻧﺖ ﻫﺬﻩ اﻟﱪاﻣﺞ ﻣﻔﻴﺪة ﺟﺪاً ﻟﻠﻄﻼب ﻛﻤﺎ‬
‫ﺑﻴﻨﺖ اﻟﺘﻘﺎرﻳﺮ]‪.[714‬‬

‫ﻋﻠﻰ ﻣﻨﺎﻫﺞ اﻹﺣﺼﺎء‪ ،‬ﻓﺈن اﻟﺘﻌﻠﻢ ﺑﺎﺳﺘﺨﺪام اﳊﺎﺳﺐ أﻋﻄﻰ ﻓﻬﻤﺎً أﻓﻀﻞ ﻟﻠﻤﻨﻬﺞ ﻣﻦ اﻟﺘﻌﻠﻢ اﻟﺘﻘﻠﻴﺪي اﻟﺬي‬ ‫]‪[722‬‬
‫ﻃﺒﻘﺎً ﻟﺪراﺳﺔ ﻗﺎم ﺑﺎ‬
‫ﻳﻌﺘﻤﺪ ﻋﻠﻰ اﻟﻜﺘﺐ‪ ،‬وﻗﺪ ﺣﺼﻞ]‪ [723‬أﻳﻀﺎً ﻋﻠﻰ ﻧﺘﺎﺋﺞ ﺸﺎﻬﺑﺔ ﳍﺬﻩ اﻟﻨﺘﺎﺋﺞ‪ ،‬ﺣﻴﺚ وﺟﺪ أن ﻻﺳﺘﺨﺪام اﶈﺎﻛﺎة اﳊﺎﺳﻮﺑﻴﺔ ﰲ ﻣﻘﺮر اﻟﻔﻴﺰﻳﺎء أﺛﺮ‬
‫إﳚﺎﰊ ﰲ ﻓﻬﻢ اﳌﻌﻤﻖ ﻟﻠﻤﻘﺮر]‪.[724‬‬

‫‪229‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Engineering Education Methodologies‬‬ ‫ﻣﻨﻬﺠﻴﺎت اﻟﺘﻌﻠﻴﻢ اﳍﻨﺪﺳﻲ |‬

‫‪ 3-2-2-2-6-4‬ﻣﺰاﻳﺎ اﶈﺎﻛﺎة ﺑﺎﺳﺘﺨﺪام اﳊﺎﺳﺐ واﳌﺨﺎﺑﺮ اﻻﻓﱰاﺿﻴﺔ‬

‫‪(Advantages of Computer Simulations and Virtual Labs):‬‬
‫ﻟﻘﺪ ﻗﺪﻣﺖ اﶈﺎﻛﺎة ﺑﺎﺳﺘﺨﺪام اﳊﺎﺳﺐ أو اﳌﺨﺎﺑﺮ اﻻﻓﱰاﺿﻴﺔ اﻟﻌﺪﻳﺪ ﻣﻦ اﻟﻔﻮاﺋﺪ ﻟﻠﺘﻌﻠﻴﻢ اﻟﻌﻠﻤﻲ واﳍﻨﺪﺳﻲ‪ ،‬وﻗﺪ أورد]‪ [715‬ﰲ اﺳﺘﻘﺼﺎء ﻗﺎﻣﻮا‬
‫ﺑﻪ اﻟﻌﺪﻳﺪ ﻣﻦ ﻓﻮاﺋﺪ اﺳﺘﺨﺪام اﶈﺎﻛﺎة ﰲ ﳎﺎل اﻟﻜﻴﻤﻴﺎء ﻣﺜﻞ‪ :‬ﻋﻨﺪﻣﺎ ﺗﻜﻮن اﳌﻮاد اﻟﻜﻴﻤﻴﺎﺋﻴﺔ ﻣﻔﻘﻮدة‪ ،‬ﻣﻮﻗﻒ اﻟﻄﻼب اﻹﳚﺎﰊ ﻣﻦ اﺳﺘﺨﺪام‬
‫اﶈﺎﻛﺎة‪ ،‬اﻷﺛﺮ اﳌﺘﺰاﻳﺪ ﻟﻠﺘﺪرﻳﺐ ﺧﻼل اﻟﻔﱰة اﳉﺎﻣﻌﻴﺔ ﻋﻠﻰ ﻋﻤﻞ اﻟﻄﻼب ﺑﻌﺪ اﻟﺘﺨﺮج‪.‬‬

‫إن اﶈﺎﻛﺎة ﺑﺎﺳﺘﺨﺪام اﳊﺎﺳﺐ ﳝﻜﻦ أن ﺗﺘﻼءم ﻣﻊ أﺳﺎﻟﻴﺐ اﻟﺘﻌﻠﻴﻢ اﳌﺨﺘﻠﻔﺔ‪ ،‬وﳝﻜﻦ إﻋﺎدة اﻟﺘﺠﺎرب ﻣﺮاراً‪ ،‬اﻷﻣﺮ اﻟﺬي ﻳﻌﻄﻲ ﻓﺮﺻﺔ ﺗﻌﻠﻢ‬
‫ﺗﻔﺎﻋﻠﻲ أﻛﱪ‪ ،‬ﻓﻀﻼً ﻋﻦ أن اﻟﻄﻼب ﳝﻜﻦ أن ﻳﻘﻮﻣﻮا ﺑﺎﻟﺘﺠﺎرب ﺧﺎرج اﳌﺨﱪ وﰲ ﻏﲑ أوﻗﺎت اﻟﺪوام‪ ،‬اﻷﻣﺮ اﻟﺬي ﻳﺘﻴﺢ اﻻﺧﺘﺒﺎر اﻟﺬاﰐ‬
‫ﻟﻠﺘﺠﺮﺑﺔ واﻟﻮﻗﺖ اﻟﻜﺎﰲ ﻟﻠﺘﻔﻜﲑ]‪ ،[725‬وﻫﺬا ﻳﺮﺗﺒﻂ ﲢﺪﻳﺪاً ﻣﻊ ﻧﻈﺮﻳﺔ ‪ Kolb‬ﻟﻠﺘﻌﻠﻢ اﻟﺘﺠﺮﻳﱯ اﻟﱵ ﺗﻌﺘﱪ أن ﺗﻜﻮﻳﻦ اﳌﻌﺮﻓﺔ ﻳﺘﻢ ﻋﻠﻰ ﳓﻮ دوري‪.‬‬

‫إن اﳌﺨﺎﺑﺮ اﻻﻓﱰاﺿﻴﺔ ﺗﺘﻴﺢ ﻟﻠﻄﻼب اﺧﺘﺒﺎر اﻟﻔﺮﺿﻴﺎت واﻟﺘﺤﻘﻖ ﻣﻦ اﻟﻨﺘﺎﺋﺞ ﻟﺒﻌﺾ اﻟﺘﺠﺎرب اﻟﱵ ﳝﻜﻦ أن ﻳﻜﻮن ﲢﻘﻴﻘﻬﺎ ﺻﻌﺒﺎً أو ﺣﱴ‬
‫ﺗﻘﺮﻳﺮاً ﻋﻦ ﻣﺪى ﺗﻮﻓﺮ ﻋﻮاﻣﻞ اﻟﺼﺤﺔ‬ ‫]‪[718‬‬
‫ﻣﺴﺘﺤﻴﻼً ﰲ اﳌﺨﺎﺑﺮ اﻟﺘﻄﺒﻴﻘﻴﺔ ﻛﻤﺤﻄﺎت ﺗﻮﻟﻴﺪ اﻟﻜﻬﺮﺑﺎء ذات اﻟﺘﻮﺗﺮ اﻟﻌﺎﱄ]‪ ،[713,726‬وﻗﺪ ﻗﺪم‬
‫واﻷﻣﺎن اﳌﺮﺗﺒﻄﺔ ﺑﺎﺳﺘﺨﺪام ﺑﺮاﻣﺞ اﶈﺎﻛﺎة ﰲ ﺑﻨﺎء اﻟﺪارات اﻟﻜﻬﺮﺑﺎﺋﻴﺔ ﻣﻘﺎرﻧﺔ ﺑﺎﻻﺧﺘﺒﺎر اﳊﻘﻴﻘﻲ ﳍﺬﻩ اﻟﺪارات ﰲ اﳌﺨﺎﺑﺮ اﻟﺘﻄﺒﻴﻘﻴﺔ‪ ،‬ﺣﻴﺚ‬
‫ﺳﺎﻋﺪت ﺑﺮاﻣﺞ اﶈﺎﻛﺎة ﻋﻠﻰ اﳊﺪ ﻣﻦ زﻣﻦ ﺗﻌﺮض اﻟﻄﻼب واﳌﺪرﺑﲔ ﻟﻠﺘﻮﺗﺮات اﻟﻌﺎﻟﻴﺔ‪ .‬ﻛﺬﻟﻚ ﺗﺴﻤﺞ اﳌﺨﺎﺑﺮ اﻻﻓﱰاﺿﻴﺔ ﻟﻠﻄﻼب إﺟﺮاء‬
‫ﲡﺎرب دﻗﻴﻘﺔ وﻣﺘﻄﻮرة‪ ،‬ﰲ ﺣﲔ أن إﺟﺮاءﻫﺎ ﻋﻠﻰ أرض اﻟﻮاﻗﻊ ﳛﺘﺎج إﱃ ﺗﻘﻨﻴﺎت وﻛﻠﻒ ﻣﺎدﻳﺔ ﻋﺎﻟﻴﺔ‪ ،‬ﻓﻀﻼً ﻋﻦ أن اﻟﺘﺠﺮﺑﺔ ﻫﻨﺎ ﳝﻜﻦ أن‬
‫ﺗﺴﲑ وﻓﻖ وﺗﲑة ﺗﺘﻼءم ﻣﻊ اﻟﻄﺎﻟﺐ]‪.[727‬‬

‫إن اﳌﺨﺎﺑﺮ اﻻﻓﱰاﺿﻴﺔ ﻣﺘﻮﻓﺮة ﰲ أي وﻗﺖ]‪ ،[726,727‬ﻛﻤﺎ أن اﳌﻌﻠﻢ ﳝﻜﻦ أن ﻳﻮﻓﺮ اﻟﻮﻗﺖ ﻣﻦ ﺧﻼل ﺗﻘﻠﻴﻞ زﻣﻦ اﻟﺘﻮاﺻﻞ ﻣﻊ اﻟﻄﻼب ﻣﻦ‬
‫ﺧﻼل اﺳﺘﺨﺪام اﶈﺎﻛﺎة]‪ .[726‬إن اﳌﺨﺎﺑﺮ اﻻﻓﱰاﺿﻴﺔ ﺳﺮﻳﻌﺔ وﻧﻈﻴﻔﺔ وآﻣﻨﺔ وﻏﲑ ﻣﻜﻠﻔﺔ]‪ ،[604,725,726‬واﻟﻀﻐﻮﻃﺎت اﻟﻨﺎﲡﺔ ﻋﻦ ﺗﻜﺎﻟﻴﻒ‬
‫اﳌﺨﺎﺑﺮ اﻟﺘﻄﺒﻴﻘﻴﺔ أدت ﰲ ﻣﻌﻈﻢ اﻷﺣﻴﺎن إﱃ اﺳﺘﺒﺪاﳍﺎ ﲟﺨﺎﺑﺮ اﻓﱰاﺿﻴﺔ]‪.[728‬‬

‫ﰲ اﳌﺨﺎﺑﺮ اﻻﻓﱰاﺿﻴﺔ ﻻ ﻳﻜﻮن اﻟﻄﺎﻟﺐ ﻣﻘﻴﺪاً ﺑﺄي ﻣﺸﺎﻋﺮ ﻋﺎﻃﻔﻴﺔ‪ ،‬ﻛﺎﳋﻮف ﻣﻦ ﲣﺮﻳﺐ أو إﺗﻼف اﳌﻌﺪات واﳌﻜﻮﻧﺎت‪ ،‬وﻗﺪ وﺟﺪ أن‬
‫اﳌﺨﺎﺑﺮ اﻻﻓﱰاﺿﻴﺔ ﺗﺸﺠﻊ اﻟﺘﺠﺮﻳﺐ ﺑﺸﻜﻞ ﻻ ﻳﺘﻮﻓﺮ ﰲ اﳌﺨﺎﺑﺮ اﻟﺘﻄﺒﻴﻘﻴﺔ ﻋﻨﺪ اﺳﺘﺨﺪام ﻋﻨﺎﺻﺮ ﺣﻘﻴﻘﻴﺔ]‪.[727‬‬

‫ﻣﻦ ﺧﻼل اﻻﻋﺘﻤﺎد ﻋﻠﻰ اﳌﺨﺎﺑﺮ اﻻﻓﱰاﺿﻴﺔ ﰲ اﻟﻌﻠﻮم اﳊﻴﻮﻳﺔ‪ ،‬ﻓﺈﻧﻪ ﳝﻜﻦ ﲡﻨﺐ اﺳﺘﺨﺪام اﳊﻴﻮاﻧﺎت اﻻﺧﺘﺒﺎرﻳﺔ]‪ ،[726‬ﻛﻤﺎ ﳝﻜﻦ اﻻﺳﺘﻔﺎدة‬
‫ﻣﻦ اﳌﺨﺎﺑﺮ اﻻﻓﱰاﺿﻴﺔ ﰲ اﻟﺘﻌﻠﻢ ﻋﻦ ﺑﻌﺪ]‪.[692,725‬‬

‫‪ 4-2-2-2-6-4‬ﻣﺴﺎوئ ﻋﻤﻠﻴﺎت اﶈﺎﻛﺎة ﺑﺎﺳﺘﺨﺪام اﳊﺎﺳﺐ واﳌﺨﺎﺑﺮ اﻻﻓﱰاﺿﻴﺔ‬

‫‪(Disadvantages of Computer Simulations and Virtual Labs):‬‬
‫ﳛﺎول اﻟﺒﺎﺣﺚ]‪ [713‬أن ﻳﺜﺒﺖ ﺑﺄن أﻓﻀﻞ اﻟﱪاﻣﺞ ﺗﺼﻤﻴﻤﺎً ﻻ ﳝﻜﻨﻬﺎ أن ﺗﻘﺪم ﳕﻮذﺟﺎً ﻛﺎﻣﻼً ﻟﻠﺘﺠﺮﺑﺔ اﻟﻔﻴﺰﻳﺎﺋﻴﺔ اﳊﻘﻴﻘﻴﺔ‪ ،‬اﻷﻣﺮ اﻟﺬي ﻳﻘﻠﻞ ﻣﻦ‬
‫أن اﻻﺳﺘﺨﺪام اﳌﻔﺮط ﻟﻠﻤﺤﺎﻛﺎة ﳝﻜﻦ أن ﻳﺆدي إﱃ ﻋﺪم ﻗﺪرة ﻃﻼب اﳍﻨﺪﺳﺔ ﻋﻠﻰ‬ ‫]‪[728‬‬
‫ﺻﺤﺔ ﻣﻘﺎرﺑﺔ اﳌﺨﺎﺑﺮ اﻻﻓﱰاﺿﻴﺔ ﻟﻠﻮاﻗﻊ‪ .‬وﻳﺬﻛﺮ‬
‫اﻟﺘﻌﺮف ﻋﻠﻰ اﳌﻮاﻗﻒ ﺑﺸﻜﻞ ﺻﺤﻴﺢ‪ ،‬وذﻟﻚ ﻷن اﻟﻨﻤﺎذج اﻟﺮﻳﺎﺿﻴﺔ ﳝﻜﻦ أن ﺗﺆدي إﱃ أﺧﻄﺎء ﻛﺒﲑة ﺗﺘﻄﻠﺐ اﻟﺘﺤﻘﻖ ﻣﻦ ﺻﺤﺔ اﻟﻌﻤﻠﻴﺔ‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪230‬‬
‫‪24‬‬ ‫اﻟﻔﺼﻞ اﻟﺮاﺑﻊ | ‪Chapter 4‬‬

‫ﺗﻄﺒﻴﻘﻴﺎً‪ .‬ﻛﻤﺎ أن ﺿﻌﻒ اﻟﺘﻐﺬﻳﺔ اﻟﻌﻜﺴﻴﺔ اﻟﱵ ﻳﻘﺪﻣﻬﺎ اﳌﻌﻠﻢ ﺗﻌﺘﱪ ﺳﻴﺌﺔ أﺧﺮى ﻟﻠﻤﺨﺎﺑﺮ اﻻﻓﱰاﺿﻴﺔ]‪ ،[727‬أﺿﻒ إﱃ ذﻟﻚ ﻧﻘﺺ اﳌﻬﺎرات ﰲ‬
‫اﻟﺘﺸﻐﻴﻞ واﻟﺘﻌﺎﻣﻞ ﻣﻊ اﻷﺟﻬﺰة واﻷدوات]‪.[726‬‬

‫إﻧﻪ وﻋﻠﻰ اﻟﺮﻏﻢ ﻣﻦ اﳌﺰاﻳﺎ اﳌﺘﻌﺪدة ﻟﻌﻤﻠﻴﺎت اﶈﺎﻛﺎة ﺑﻮاﺳﻄﺔ اﳊﺎﺳﺐ واﳌﺨﺎﺑﺮ اﻻﻓﱰاﺿﻴﺔ‪ ،‬ﻫﻨﺎك ﺗﻮاﻓﻖ ﻋﺎم‪ ،‬ﺳﻮاء ﻣﻦ وﺟﻬﺔ ﻧﻈﺮ اﻟﻄﻼب‬
‫أو اﳌﻌﻠﻤﲔ‪ ،‬ﻋﻠﻰ أن ﻋﻤﻠﻴﺎت اﶈﺎﻛﺎة ﻻ ﳝﻜﻦ وﻻ ﻳﻨﺒﻐﻲ أن ﲢﻞ داﺋﻤﺎً ﳏﻞ اﳌﺨﺎﺑﺮ اﳊﻘﻴﻘﻴﺔ]‪.[682,726,728-732‬‬

‫‪ 3-2-2-6-4‬ﳐﺎﺑﺮ اﻟﺘﻌﻠﻢ ﻋﻦ ﺑﻌﺪ )‪:(Remote Labs‬‬

‫إن ﺗﻄﻮر اﻹﻧﱰﻧﺖ وﺗﻘﻨﻴﺎت اﻟﺸﺒﻜﺎت ﺗﺮك ﺗﺄﺛﲑاً ﻛﺒﲑاً ﻋﻠﻰ ﻓﻠﺴﻔﺔ ﺗﻄﻮر اﳌﺨﺘﱪات؛ ﻓﻴﻤﺎ ﻳﻠﻲ ﶈﺔ ﻋﺎﻣﺔ ﻋﻦ ﺷﻜﻞ ﺟﺪﻳﺪ ﻣﺘﻄﻮر ﻣﻦ اﻟﺘﻌﻠﻴﻢ‬
‫اﳌﺨﺘﱪي ﻳﺪﻋﻰ ﺑﺎﻟﺘﻌﻠﻢ ﻋﻦ ﺑﻌﺪ )‪.(Online or Remote Laboratory‬‬

‫‪ 1-3-2-2-6-4‬ﶈﺔ ﺗﺎرﳜﻴﺔ ﻋﻦ ﳐﺎﺑﺮ اﻟﺘﻌﻠﻢ ﻋﻦ ﺑﻌﺪ )‪:(Remote Labs Historical Perspective‬‬

‫ﺗﻌﻮد ﻓﻜﺮة إﻧﺸﺎء ﳐﺎﺑﺮ ﺗﻌﻠﻴﻤﻴﺔ ﻋﻦ ﻃﺮﻳﻖ ﺷﺒﻜﺔ اﻹﻧﱰﻧﺖ إﱃ أواﺋﻞ ﻋﺎم ‪ 1990‬ﺣﻴﺚ اﻗﱰح]‪ [736‬ﺣﻞ ﻣﺴﺘﻘﺒﻠﻲ ﳌﺸﺎرﻛﺔ اﻟﺘﺠﻬﻴﺰات اﳌﺨﱪﻳﺔ‬
‫ﻋﱪ اﻹﻧﱰﻧﺖ‪ ،‬وﺗﻮﻗﻊ أن ﻳﺘﻢ اﺳﺘﺨﺪام ﻫﺬا اﻟﻨﻤﻮذج ﻟﺘﺸﻐﻴﻞ اﻟﺘﺠﺎرب ﰲ اﶈﺎﺿﺮات اﻟﻨﻈﺮﻳﺔ‪ .‬ﻟﻘﺪ وﺿﻌﺖ ﺗﺼﻮرات ﺣﻮل ﻫﺬا اﻷﺳﻠﻮب‬
‫اﻟﺘﻌﻠﻴﻤﻲ اﳌﺨﱪي وﺗﻮﻗﻊ أﻧﻪ ﺳﻮف ﻳﻄﻠﻖ ﻓﺮص وأﲝﺎث ﺗﻌﻠﻴﻤﻴﺔ ﺟﺪﻳﺪة وﻳﻌﺰز اﻟﺘﻌﺎون ﺑﲔ اﳌﻌﺎﻫﺪ واﳉﺎﻣﻌﺎت؛ ﻣﻌﻈﻢ اﻟﺘﺼﻮرات اﻟﱵ وﺿﻌﺖ‬
‫ﰎ ﺗﻨﻔﻴﺬﻫﺎ ﰲ ﻏﻀﻮن ﺳﻨﻮات ﻗﻠﻴﻠﺔ‪.‬‬

‫إن اﻟﻨﻤﻮذج اﻟﺘﺠﺮﻳﱯ اﻷوﱄ ﰎ ﺗﻄﺒﻴﻘﻪ ﻟﺘﺸﻐﻴﻞ ﻧﻈﺎم ﲢﻜﻢ ﻋﻦ ﺑﻌﺪ ﺑﺮوﺑﻮﺗﺎت ﻣﻮزﻋﺔ ﰲ أرﺑﻊ ﺟﺎﻣﻌﺎت ووﻛﺎﻟﺔ ‪ NASA‬ﰲ اﻟﻮﻻﻳﺎت‬
‫اﳌﺘﺤﺪة]‪ ،[737‬وﻣﻨﺬ ذﻟﻚ اﳊﲔ‪ ،‬ازداد ﺑﺸﻜﻞ ﻛﺒﲑ‪ ،‬ﻋﺎﻣﺎً ﺑﻌﺪ ﻋﺎم‪ ،‬ﻋﺪد اﳌﺨﺘﱪات اﻟﱵ ﺗﻌﺘﻤﺪ ﻋﻠﻰ اﻹﻧﱰﻧﺖ ) ‪Internet-based‬‬

‫‪(Laboratories‬؛ اﻟﺘﻮزﻳﻊ اﳉﻐﺮاﰲ اﻣﺘﺪ اﱃ أوروﺑﺎ واﺳﱰاﻟﻴﺎ وﺷﺮق آﺳﻴﺎ؛ اﳉﺪول‪ 5-4‬ﻳﺘﻀﻤﻦ ﳕﺎذج ﳌﺨﺘﱪات ﻋﻦ ﺑﻌﺪ ﻣﻦ ﻛﻞ ﻗﺎرة‪.‬‬

‫‪Online Lab‬‬ ‫‪Brief Description‬‬ ‫‪Country‬‬

‫‪The remote lab hub of Massachusetts Institute of Technology.‬‬

‫‪MIT iLab‬‬ ‫‪USA‬‬
‫‪http://ilab.mit.edu/ServiceBroker/‬‬

‫‪NUS Internet Remote‬‬ ‫‪Remote laboratories from the National University of Singapore.‬‬
‫‪Singapore‬‬
‫‪Experimentation‬‬ ‫‪vlab.ee.nus.edu.sg/intr.html#robot‬‬

‫‪Remote labs in power and energy from the Royal Institute of‬‬
‫‪KTH Online Remote‬‬
‫‪Technology in Sweden.‬‬ ‫‪Sweden‬‬
‫‪Laboratories‬‬
‫‪http://www.energy.kth.se/proj/projects/remote_labs/‬‬

‫‪Remote labs from the University of Technology, Sydney.‬‬

‫‪UTS Remote Labs‬‬ ‫‪Australia‬‬
‫‪http://remotelabs.eng.uts.edu.au/‬‬

‫اﳉﺪول‪ 5-4‬ﳎﻤﻮﻋﺔ ﳐﺘﺎرة ﻣﻦ اﳌﺨﺎﺑﺮ ﻋﻦ ﺑﻌﺪ ﰲ ﻗﺎرات ﳐﺘﻠﻔﺔ‬

‫‪ 2-3-2-2-6-4‬ﻣﻴﺰات اﳌﺨﺎﺑﺮ ﻋﻦ ﺑﻌﺪ )‪:(Advantages of Remote Laboratories‬‬

‫إن ﻛﻠﻔﺔ ﲡﻬﻴﺰات ﳐﱪﻳﺔ ﺟﺪﻳﺪة ﻳﺴﺘﻬﻠﻚ ﻗﺪراً ﻛﺒﲑاً ﻣﻦ ﻣﻴﺰاﻧﻴﺔ ﻣﻌﺎﻫﺪ اﻟﺘﻌﻠﻴﻢ اﻟﻌﺎﱄ‪ ،‬اﻷﻣﺮ اﻟﺬي دﻓﻊ اﻟﻌﺪﻳﺪ ﻣﻦ اﳌﻌﺎﻫﺪ واﳉﺎﻣﻌﺎت ﰲ‬
‫اﻟﺴﺒﻌﻴﻨﺎت واﻟﺜﻤﺎﻧﻴﻨﺎت ﻣﻦ اﻟﻘﺮن اﻟﻌﺸﺮﻳﻦ إﱃ ﲣﻔﻴﺾ اﻟﻌﻤﻞ اﳌﺨﱪي ﰲ اﳌﻨﺎﻫﺞ اﳉﺎﻣﻌﻴﺔ]‪.[680‬‬

‫‪231‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Engineering Education Methodologies‬‬ ‫ﻣﻨﻬﺠﻴﺎت اﻟﺘﻌﻠﻴﻢ اﳍﻨﺪﺳﻲ |‬

‫أﺣﺪ اﳌﺰاﻳﺎ اﻟﺮﺋﻴﺴﻴﺔ ﻻﺳﺘﺨﺪام اﳌﺨﺘﱪات ﻋﱪ اﻹﻧﱰﻧﺖ ﻫﻮ اﳌﻘﺪرة ﻋﻠﻰ ﺗﻘﺎﺳﻢ اﳌﻮارد ﻣﻊ اﳉﺎﻣﻌﺎت اﻷﺧﺮى‪ ،‬وﺑﺎﻟﺘﺎﱄ ﺧﻔﺾ اﻟﺘﻜﻠﻔﺔ‬
‫اﻻﻗﺘﺼﺎدﻳﺔ ﻟﺘﻨﻔﻴﺬ وﺗﻮﻓﲑ ﲡﻬﻴﺰات ﳐﱪﻳﺔ ﺟﺪﻳﺪة]‪ ،[725‬ﻛﻤﺎ أن ﻣﺸﺎرﻛﺔ اﻟﺘﺠﺎرب ﻋﻦ ﺑﻌﺪ ﺑﲔ اﳉﺎﻣﻌﺎت ﻳﺜﺮي اﻟﺘﻌﻠﻴﻢ اﻟﺘﺠﺮﻳﱯ‬
‫ﻟﻠﻄﻼب]‪ ،[738‬وﺗﻌﻮد ﻓﻜﺮة ﻣﺸﺎرﻛﺔ ﻟﺘﺠﻬﻴﺰات واﳌﻮارد اﳌﺨﱪﻳﺔ ﻬﺑﺪف ﺗﻘﻠﻴﻞ اﻟﺘﻜﺎﻟﻴﻒ إﱃ ﺑﺪاﻳﺎت اﻟﺘﺴﻌﻴﻨﺎت ﻣﻦ اﻟﻘﺮن‬
‫اﻟﻌﺸﺮﻳﻦ]‪.[682,698,737,738‬‬

‫اﻵن ﻳﻮﺟﺪ ﻣﺸﺮوع ﰲ اﺳﱰاﻟﻴﺎ ﻗﻴﺪ اﻟﺘﻄﻮﻳﺮ ﻳﻬﺪف إﱃ ﻣﺸﺎرﻛﺔ ﲡﺎرب ﳐﱪﻳﺔ ﻋﻠﻰ ﻧﻄﺎق اﻟﻘﺎرة]‪ ،[739‬اﻷﻣﺮ اﻟﺬي ﺳﻴﺘﻴﺢ ﻟﻠﻄﻼب اﻻﺳﺘﻔﺎدة‬
‫ﻣﻦ ﺗﻨﻮع ﻛﺒﲑ ﺟﺪاً ﻣﻦ اﳌﺨﺘﱪات اﳌﻨﺘﺸﺮة ﻋﻠﻰ ﻣﺴﺘﻮى ﻗﺎرة اﺳﱰاﻟﻴﺎ‪.‬‬

‫ﻟﻘﺪ ﰎ اﻹﺷﺎدة ﰲ اﻟﻌﺪﻳﺪ ﻣﻦ اﻷوراق اﻟﺒﺤﺜﻴﺔ إﱃ دور اﳌﺨﺘﱪات ﻋﱪ اﻹﻧﱰﻧﺖ ﰲ زﻳﺪ ﲪﺎﺳﺔ اﻟﻄﻼب ﳓﻮ اﳌﻮﺿﻮع اﳌﺪروس]‪ ،[682,695‬ﻛﻤﺎ‬
‫أن ﻫﺬﻩ اﳌﺨﺘﱪات ﳝﻜﻦ أن ﺗﺘﻀﻤﻦ أﳕﺎط ﺗﻌﻠﻢ ﳐﺘﻠﻔﺔ]‪ ،[725‬ﻛﻤﺎ ﳝﻜﻨﻬﺎ ﺗﻌﺰﻳﺰ اﻻﺗﺴﺎع ﰲ اﻟﺘﻌﻠﻢ ﻋﻦ ﺑﻌﺪ )‪ (Distance Learning‬ﰲ‬
‫اﳌﻨﺎﻫﺞ اﳍﻨﺪﺳﻴﺔ]‪.[725,738,740‬‬

‫إن اﳌﺨﺘﱪات ﻋﱪ اﻹﻧﱰﻧﺖ ﺗﺴﺎﻋﺪ ﰲ ﺗﻔﻌﻴﻞ اﻟﺒﻨﺎﺋﻴﺔ اﻻﺟﺘﻤﺎﻋﻴﺔ )‪ (Social Constructivism‬ﻣﻦ ﺧﻼل ﻣﺸﺎرﻛﺔ أو إﺟﺮاء ﲡﺎرب ﺑﲔ‬
‫اﻟﻄﻼب ﻣﻦ ﺟﺎﻣﻌﺎت ودول ﳐﺘﻠﻔﺔ‪ ،‬ﻛﻤﺎ أ�ﺎ ﺗﻮﻓﺮ اﳋﱪة اﻟﻌﻤﻠﻴﺔ ﻋﻦ ﻃﺮﻳﻖ اﻟﻮﺻﻮل اﻟﺒﻌﻴﺪ إﱃ ﲡﻬﻴﺰات ﺣﻘﻴﻘﻴﺔ‪ ،‬ﻛﻤﺎ ﺗﺘﻴﺢ إﻣﻜﺎﻧﻴﺔ اﻟﻮﺻﻮل‬
‫إﱃ اﻷﻣﺎﻛﻦ اﳋﻄﺮة‪.‬‬

‫‪ 3-3-2-2-6-4‬ﻣﺴﺎوئ اﳌﺨﺎﺑﺮ ﻋﻦ ﺑﻌﺪ )‪:(Disadvantages of Remote Laboratories‬‬

‫ﻋﻠﻰ اﻟﺮﻏﻢ ﻣﻦ وﺟﻮد اﻟﻌﺪﻳﺪ ﻣﻦ اﳌﺰاﻳﺎ ﰲ اﳌﺨﺘﱪات اﻟﱵ ﺗﺸﻐﻞ ﻋﱪ اﻹﻧﱰﻧﺖ‪ ،‬إﻻ أ�ﺎ أﻳﻀﺎً ﺗﻌﺎﱐ ﻣﻦ ﺑﻌﺾ اﻟﻌﻴﻮب‪ ،‬ﺣﻴﺚ أن اﻟﻄﻼب‬
‫اﻟﺬﻳﻦ ﻳﻘﻮﻣﻮن ﺑﺘﺸﻐﻴﻞ اﻟﺘﺠﺮﺑﺔ ﻋﻦ ﺑﻌﺪ ﻻ ﻳﺘﻌﺮﺿﻮن اﺠﻤﻟﻤﻮﻋﺔ اﻟﻜﺎﻣﻠﺔ ﻟﻠﺨﱪات اﻟﺘﺸﻐﻴﻠﻴﺔ ﻟﻠﺘﺠﺮﺑﺔ )ﻣﺜﻼً‪ :‬اﻟﺘﻮﺻﻴﻼت واﻟﱰﻛﻴﺒﺎت‬
‫اﻟﻔﻴﺰﻳﺎﺋﻴﺔ(]‪.[738,741‬‬

‫ﻟﻘﺪ ﰎ اﻹﻗﺮار ﻋﻠﻰ أن ﻏﻴﺎب اﳌﻌﻠﻤﲔ‪ ،‬وﻋﺰل اﻟﻄﻼب ﻋﻦ ﻣﻮﻗﻊ اﻟﺘﺠﺮﺑﺔ‪ ،‬وﻋﺪم وﺟﻮد ﺗﻌﻠﻴﻤﺎت ﳐﱪﻳﺔ ﻣﻔﺼﻠﺔ ﺣﻮل اﻟﺘﺠﺮﺑﺔ‪ ،‬إﺿﺎﻓﺔً إﱃ‬
‫ﻧﻮﻋﻴﺔ اﻟﺘﻐﺬﻳﺔ اﻟﻌﻜﺴﻴﺔ اﳌﺮﺋﻴﺔ )اﻟﺼﻮت واﻟﺼﻮرة( ﻟﻠﺘﺠﺮﺑﺔ‪ ،‬ﺗﻌﺘﱪ ﲨﻴﻌﻬﺎ ﻣﻦ ﻣﺴﺎوئ اﳌﺨﺘﱪات ﻋﻦ ﺑﻌﺪ]‪ ،[742‬ﻛﻤﺎ أن ﺗﻄﻮﻳﺮ ﳐﺘﱪ ﻋﻦ ﺑﻌﺪ‬
‫ﻳﺘﻄﻠﺐ ﺗﻜﻠﻔﺔ إﺿﺎﻓﻴﺔ ﳝﻜﻦ أن ﺗﻜﻮن ﻣﻨﺨﻔﻀﺔ أو ﻋﺎﻟﻴﺔ ﺗﺒﻌﺎً ﻟﻄﺒﻴﻌﺔ اﻟﺘﺠﺮﺑﺔ‪ ،‬وﻫﻮ أﻳﻀﺎً ﳛﺘﺎج إﱃ ﺷﺒﻜﺔ إﻧﱰﻧﺖ ذات ﺳﺮﻋﺔ وﻋﺮض ﺣﺰﻣﺔ‬
‫ﻛﺒﲑ ﻧﺴﺒﻴﺎً‪.‬‬

‫ﳑﺎ ﳚﺐ ذﻛﺮﻩ أﻳﻀﺎً أن اﻟﻌﺪﻳﺪ ﻣﻦ اﻟﺘﺠﺎرب ﻻ ﳝﻜﻦ أﲤﺘﺘﻬﺎ ﺑﺎﻟﻜﺎﻣﻞ ﻟﻴﺘﻢ ﺗﺸﻐﻴﻠﻬﺎ ﻋﻦ ﺑﻌﺪ‪ ،‬ﻓﻬﻲ ﲢﺘﺎج إﱃ ﺷﺨﺺ ﻳﻘﻮم ﺑﺎﻟﺘﺸﻐﻴﻞ اﳉﺰﺋﻲ‬
‫ﻣﻦ ﻣﻮﻗﻊ اﻟﺘﺠﺮﺑﺔ‪ ،‬ﻛﻤﺎ أن ﺑﻌﺾ اﻟﺘﺠﺎرب اﻷﺧﺮى ﻣﻦ اﳌﺴﺘﺤﻴﻞ ﺗﻨﻔﻴﺬﻫﺎ ﻛﺘﺠﺎرب ﻳﺘﻢ ﺗﺸﻐﻴﻠﻬﺎ ﻋﻦ ﺑﻌﺪ‪.‬‬

‫‪ 4-2-2-6-4‬اﳌﺨﺎﺑﺮ اﻟﺘﻄﺒﻴﻘﻴﺔ أم اﻻﻓﱰاﺿﻴﺔ أم اﳌﺨﺎﺑﺮ ﻋﻦ ﺑﻌﺪ؟ )?‪:(Hands-on, Simulated or Remote‬‬

‫ﳝﻜﻦ أن ﳒﺪ ﺗﺒﺎﻳﻨﺎً ﰲ ﻧﺘﺎﺋﺞ اﻟﺪراﺳﺎت اﻟﱵ أﺟﺮﻳﺖ ﻟﺘﺤﺪﻳﺪ ﻓﻌﺎﻟﻴﺔ ﻧﻮع ﻣﻦ اﳌﺨﺎﺑﺮ ﻧﺴﺒﺔ ﻟﻨﻮع آﺧﺮ‪ ،‬ﻓﻌﻠﻰ ﺳﺒﻴﻞ اﳌﺜﺎل‪ :‬ﰲ دراﺳﺔ ﺣﻮل‬
‫ﻓﻌﺎﻟﻴﺔ اﳌﺨﺎﺑﺮ ﻋﻦ ﺑﻌﺪ ﻛﺎﻧﺖ اﻟﻨﺘﺎﺋﺞ اﻟﻜﻤﻴﺔ ﺗﺪل ﻋﻠﻰ أن اﻟﻄﻼب اﻟﺬﻳﻦ اﺳﺘﺨﺪﻣﻮا اﳌﺨﺎﺑﺮ ﻋﻦ ﺑﻌﺪ ﻛﺎﻧﺖ ﻧﺘﺎﺋﺠﻬﻢ أﻗﻞ ﺑﻨﺴﺒﺔ ﺗﱰاوح ﺑﲔ‬
‫‪ 5~8%‬ﻣﻦ اﻟﻄﻼب اﻟﺬﻳﻦ ﻧﻔﺬوا اﻟﺘﺠﺎرب ﰲ ﳐﺎﺑﺮ ﺗﻄﺒﻴﻘﻴﺔ‪ ،‬ﻛﻤﺎ أن ﻃﻼب اﳌﺨﺎﺑﺮ ﻋﻦ ﺑﻌﺪ اﺣﺘﺎﺟﻮا زﻣﻨﺎً أﻛﱪ ﻹ�ﺎء اﻟﺘﺠﺎرب]‪.[733‬‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪232‬‬
‫‪24‬‬ ‫اﻟﻔﺼﻞ اﻟﺮاﺑﻊ | ‪Chapter 4‬‬

‫ﰲ دراﺳﺔ ﻗﺎرن ﻓﻴﻬﺎ ﻧﺘﺎﺋﺞ اﳌﺨﺎﺑﺮ ﻋﻦ ﺑﻌﺪ ﻣﻊ‬ ‫]‪[685‬‬

‫ﻣﻦ ﻧﺎﺣﻴﺔ أﺧﺮى‪ ،‬ﻫﻨﺎك ﺑﺎﺣﺜﻮن ﻗﺪﻣﻮا ﻧﺘﺎﺋﺞ ﻣﻌﺎﻛﺴﺔ ﻟﺬﻟﻚ]‪ ،[685,734‬ﺣﻴﺚ وﺟﺪ‬
‫اﳌﺨﺎﺑﺮ اﻟﺘﻄﺒﻴﻘﻴﺔ أن ﻣﻌﻈﻢ ﻣﻌﺪﻻت اﻟﻄﻼب اﻟﺬﻳﻦ اﺳﺘﺨﺪﻣﻮا اﳌﺨﺎﺑﺮ ﻋﻦ ﺑﻌﺪ ﻛﺎﻧﺖ ﻣﺴﺎوﻳﺔ ورﲟﺎ أﻓﻀﻞ ﻣﻨﻬﺎ ﰲ ﺣﺎﻟﺔ اﳌﺨﺎﺑﺮ اﻟﺘﻄﺒﻴﻘﻴﺔ‪،‬‬
‫وﻛﺬﻟﻚ اﻷﻣﺮ ﰲ اﻟﻨﺘﺎﺋﺞ اﻻﻣﺘﺤﺎﻧﻴﺔ‪ ،‬ﻓﻘﺪ أﻇﻬﺮت اﻷﲝﺎث اﻟﻜﻤﻴﺔ ﻋﻠﻰ اﻟﻄﻠﺒﺔ ﰲ اﳌﺨﺎﺑﺮ أن ﻧﺘﺎﺋﺞ ﻃﻼب اﳌﺨﺎﺑﺮ ﻋﻦ ﺑﻌﺪ ﻛﺎﻧﺖ ﻣﺴﺎوﻳﺔ‪،‬‬
‫وﺣﱴ أﻓﻀﻞ ﻣﻦ ﻧﺘﺎﺋﺞ ﻃﻼب اﳌﺨﺎﺑﺮ اﻟﺘﻄﺒﻴﻘﻴﺔ‪ .‬وﻗﺪ وﺟﺪ]‪ [734‬أن إﺟﺮاء اﻟﺘﺠﺎرب ﻋﻠﻰ اﻹﻧﱰﻧﺖ ﻧﺎﺟﺢ ﲤﺎﻣﺎً ﻛﻤﺎ ﰲ ﺣﺎﻟﺔ إﺟﺮاﺋﻬﺎ ﺿﻤﻦ‬
‫ﳐﺎﺑﺮ ﺗﻄﺒﻴﻘﻴﺔ ﻋﻠﻰ أرض اﻟﻮاﻗﻊ‪.‬‬

‫دراﺳﺔ ﺗﻔﻀﻴﻠﻴﺔ ﻷداء اﻟﻄﻼب ﰲ ﳐﱪ اﻟﺪارات اﳌﻨﻄﻘﻴﺔ اﻟﺬي ﻛﺎن ﻣﻮﺟﻮداً ﻛﻤﺨﱪ ﺗﻄﺒﻴﻘﻲ وﳐﱪ اﻓﱰاﺿﻲ‪،‬‬ ‫]‪[690‬‬
‫اﻟﺒﺎﺣﺚ ‪ Heise‬أﺟﺮى‬
‫وﻗﺪ وﺟﺪ أن ﳏﻔﺰات اﻟﻄﻼب اﻫﺘﻤﺎﻣﺎﻬﺗﻢ وﻧﺘﺎﺋﺠﻬﻢ ﻛﺎﻧﺖ أﻛﱪ ﺑﺸﻜﻞ ﻣﻠﺤﻮظ ﰲ اﳌﺨﱪ اﻟﺘﻄﺒﻴﻘﻲ ﻣﻘﺎرﻧﺔ ﺑﺎﳌﺨﱪ اﻻﻓﱰاﺿﻲ‪ ،‬وذﻛﺮ أن‬
‫زﻣﻼءﻩ ﰲ اﳌﻌﺎﻫﺪ اﻻﺧﺮى ﻗﺎﻣﻮا ﲟﻘﺎرﻧﺎت ﺸﺎﻬﺑﺔ ووﺟﺪوا أﻳﻀﺎً ﺗﻔﻮق اﻟﺘﺠﺎرب اﻟﺘﻄﺒﻴﻘﻴﺔ ﻋﻠﻰ ﻗﺮاﺋﻨﻬﺎ ﻣﻦ اﻟﺘﺠﺎرب اﻻﻓﱰاﺿﻴﺔ‪.‬‬

‫ﺻﻤﻢ ﻣﻨﺼﺔ ﳐﱪﻳﺔ اﻓﱰاﺿﻴﺔ ﻋﻠﻰ اﻟﺸﺒﻜﺔ )‪ (e-platform‬ﲡﻤﻊ ﺑﲔ اﳌﺨﺎﺑﺮ اﻻﻓﱰاﺿﻴﺔ واﳌﺨﺎﺑﺮ ﻋﻦ ﺑﻌﺪ ﰲ‬ ‫]‪[735‬‬
‫اﻟﺒﺎﺣﺚ ‪Tzafestas‬‬
‫ﺣﺰﻣﺔ واﺣﺪة ﻟﺘﺤﻞ ﳏﻞ اﳌﺨﺎﺑﺮ اﳊﻘﻴﻘﻴﺔ ﰲ ﺣﺎﻻت اﻟﺘﻌﻠﻢ ﻋﻦ ﺑﻌﺪ‪ ،‬وﻗﺪ وﺟﺪ أن ﻫﺬﻩ اﳌﻨﺼﺔ ﳝﻜﻦ أن ﺗﻘﺪم ﻧﺘﺎﺋﺞ ﺗﻌﻠﻴﻤﻴﺔ ﻗﺮﻳﺒﺔ ﻟﻨﺘﺎﺋﺞ‬
‫اﳌﺨﺎﺑﺮ اﳊﻘﻴﻘﻴﺔ ﰲ ﻣﺎ ﻳﺘﻌﻠﻖ ﺑﺄﻫﺪاف اﳌﺨﺘﱪ ﻋﺎﻟﻴﺔ اﳌﺴﺘﻮى‪.‬‬

‫ﻫﻨﺎك ﺗﻮاﻓﻖ ﻋﺎم ﺑﲔ اﻟﻌﺪﻳﺪ ﻣﻦ اﻟﺒﺎﺣﺜﲔ ﻋﻠﻰ أن اﳌﺨﺎﺑﺮ اﻻﻓﱰاﺿﻴﺔ ﳚﺐ أن ﺗﺴﺘﺨﺪم ﻛﻨﺸﺎط داﻋﻢ وﻟﻴﺲ ﻛﺒﺪﻳﻞ ﻟﻠﻤﺨﺎﺑﺮ‬
‫اﳊﻘﻴﻘﻴﺔ]‪.[726,729-732‬‬

‫دراﺳﺔ ﻣﻘﺎرﻧﺔ ﺑﲔ ﳐﺘﱪ ‪ Catheter‬اﻓﱰاﺿﻲ وآﺧﺮ ﺗﻄﺒﻴﻘﻲ‪ ،‬وﻗﺪ أﻇﻬﺮت اﻟﺪراﺳﺔ أن ﻛﻼ اﻟﻔﺮﻳﻘﲔ ﺣﺼﻠﻮا ﻋﻠﻰ‬ ‫]‪[729‬‬
‫أﺟﺮى ‪Engum‬‬

‫اﳌﻬﺎرات اﳌﺮﺟﻮة ﻣﻦ اﳌﺨﺘﱪ‪ ،‬وﻟﻜﻦ اﻟﻄﻼب ﻛﺎﻧﻮا ﻳﻔﻀﻠﻮن اﻟﻌﻤﻞ ﺿﻤﻦ اﳌﺨﱪ اﳊﻘﻴﻘﻲ ﻋﻠﻰ اﻟﻌﻤﻞ ﺿﻤﻦ اﳌﺨﱪ اﻻﻓﱰاﺿﻲ‪ ،‬وﻗﺪ أﺷﺎر إﱃ‬
‫أن اﳉﻤﻊ ﺑﲔ اﳌﻨﻬﺠﻴﺘﲔ اﳊﻘﻴﻘﻴﺔ واﻻﻓﱰاﺿﻴﺔ ﳝﻜﻦ أن ﻳﻌﺰز ﻣﺴﺘﻮى رﺿﺎ اﻟﻄﻼب وﻳﺰﻳﺪ ﻣﻦ ﻣﺴﺘﻮى اﳌﻬﺎرات اﳌﻜﺘﺴﺒﺔ‪.‬‬

‫اﻟﺒﺎﺣﺜﺔ ‪ [730]Raineri‬اﺳﺘﺒﺪﻟﺖ ﳐﺘﱪﻫﺎ اﻟﺘﻄﺒﻴﻘﻲ ﻟﻠﺒﻴﻮﻟﻮﺟﻴﺎ اﳉﺰﻳﺌﻴﺔ ﺑﺂﺧﺮ اﻓﱰاﺿﻲ ﻳﻌﻤﻞ ﻣﻦ ﺧﻼل اﻹﻧﱰﻧﺖ‪ ،‬واﳍﺪف اﻷﺳﺎﺳﻲ ﻫﻮ‬
‫ﲤﻜﲔ اﻟﻄﻼب ﻣﻦ ﺗﻜﺮار اﻟﺘﺠﺎرب ﻣﺮات ﻋﺪﻳﺪة ﲝﻴﺚ ﳛﺼﻠﻮن ﻋﻠﻰ اﳌﻬﺎرات ﰲ ﳎﺎل ﺗﻘﻨﻴﺎت اﻟﺘﻌﺎﻣﻞ ﻣﻊ اﻟﺒﻴﺎﻧﺎت وﲢﻠﻴﻠﻬﺎ‪ ،‬ﺣﻴﺚ ﻳﻜﻮن‬
‫ﻛﻞ ذﻟﻚ ﺻﻌﺐ ﲢﻘﻴﻘﻪ ﺧﻼل ﺛﻼث ﺳﺎﻋﺎت ﻓﻘﻂ ﰲ اﳉﻠﺴﺔ اﻟﻜﻼﺳﻴﻜﻴﺔ اﳌﻌﺘﺎدة ﰲ اﳌﺨﱪ اﻟﺘﻄﺒﻴﻘﻲ‪ .‬إن ﻧﺘﺎﺋﺞ اﺳﺘﺨﺪام اﳌﺨﱪ‬
‫اﻻﻓﱰاﺿﻲ ﻟﻠﺒﻴﻮﻟﻮﺟﻴﺎ اﳉﺰﻳﺌﻴﺔ ﻋﻠﻰ ﻣﺪى ﲬﺲ ﺳﻨﻮات أدى إﱃ زﻳﺎدة ﲟﻘﺪار ‪ 5%‬ﰲ ﻧﺘﺎﺋﺞ اﻻﻣﺘﺤﺎﻧﺎت اﻟﻨﻬﺎﺋﻴﺔ‪ ،‬وإﱃ ﺗﺮاﺟﻊ ﻛﺒﲑ ﰲ ﻋﺪد‬
‫اﻟﻄﻼب اﻟﺬﻳﻦ رﺳﺒﻮا أو ﺣﺼﻠﻮا ﻋﻠﻰ ﺣﺪ أدﱏ ﻣﻦ اﻟﻨﺘﻴﺠﺔ‪ ،‬اﻷﻣﺮ اﻟﺬي ﳚﻌﻞ اﻟﺒﺎﺣﺜﺔ ‪ Raineri‬ﺗﺸﺪد ﻋﻠﻰ أﳘﻴﺔ اﳌﺨﺎﺑﺮ اﻟﺘﻄﺒﻴﻘﻴﺔ‪ ،‬وﻋﻠﻰ‬
‫أن اﳌﺨﺎﺑﺮ اﻻﻓﱰاﺿﻴﺔ ﻫﻲ ﺑﺎﻷﺣﺮى إﺿﺎﻓﺔ ﺗﻜﻤﻴﻠﻴﺔ ﻫﺎﻣﺔ وﻟﻴﺴﺖ ﺑﺪﻳﻼً‪.‬‬

‫واﺳﺘﺨﺪﻣﺎ ﻓﻴﻬﺎ ﺑﺮاﻣﺞ ﳏﺎﻛﺎة ﺑﺎﺳﺘﺨﺪام اﳊﺎﺳﺐ ﻟﺪﻋﻢ ﲡﺎرب‬ ‫]‪[731‬‬

‫ﳝﻜﻦ أن ﳒﺪ ﻧﺘﺎﺋﺞ واﺳﺘﻨﺘﺎﺟﺎت ﳑﺎﺛﻠﺔ ﰲ دراﺳﺔ ﻗﺪﻣﻬﺎ اﻟﺒﺎﺣﺜﺎن‬
‫ﺗﺼﻤﻴﻢ اﻟﺪارات اﻟﻜﻬﺮﺑﺎﺋﻴﺔ‪ ،‬وﻗﺪ وﺟﺪا أن ‪ 70%‬ﻣﻦ اﻟﻄﻼب اﺳﺘﻔﺎدوا ﻣﻦ اﺳﺘﺨﺪام اﶈﺎﻛﺎة‪ ،‬ﺣﻴﺚ أن اﳌﺨﺘﱪ اﻻﻓﱰاﺿﻲ زاد ﻣﻦ ﺛﻘﺘﻬﻢ‬
‫ﺑﺄﻧﻔﺴﻬﻢ وﺳﺎﻋﺪﻫﻢ ﻋﻠﻰ اﳊﻔﺎظ ﻋﻠﻰ ﺻﱪﻫﻢ ﻋﻨﺪ ﺗﻨﻔﻴﺬ اﳌﻬﻤﺎت اﳌﻮﻛﻠﺔ إﻟﻴﻬﻢ‪ ،‬وﻟﻌﺐ دوراً ﻣﻬﻤﺎً ﻛﺄداة ﻟﻠﺘﻐﺬﻳﺔ اﻟﻌﻜﺴﻴﺔ اﻟﺒﻨﺎﺋﻴﺔ‪ .‬ﻳﻌﻠﻖ‬
‫اﻟﺒﺎﺣﺜﺎن ﻋﻠﻰ أن اﻟﻄﻼب اﻟﺬﻳﻦ ﱂ ﻳﺴﺘﻔﻴﺪوا ﻣﻦ اﶈﺎﻛﺎة ﻛﺎﻧﻮا إﻣﺎ ﻣﻦ اﻟﺬﻳﻦ ﻳﺘﻤﺘﻌﻮن ﺑﻘﺪرات ﻓﻬﻢ ﻋﺎﻟﻴﺔ ﺟﺪاً‪ ،‬وﱂ ﺗﻘﺪم ﳍﻢ اﶈﺎﻛﺎة أي‬

‫‪233‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Engineering Education Methodologies‬‬ ‫ﻣﻨﻬﺠﻴﺎت اﻟﺘﻌﻠﻴﻢ اﳍﻨﺪﺳﻲ |‬

‫ﻣﺴﺎﻋﺪة إﺿﺎﻓﻴﺔ ﰲ ﻣﻬﻤﺘﻬﻢ‪ ،‬أو ﻣﻦ اﻟﺬﻳﻦ ﻫﻢ ذوو ﻣﺴﺘﻮى ﻓﻬﻢ ﻣﺘﺪﱐ ﰲ ﻫﺬا ﻤﻟﺎل‪ ،‬وﻟﻴﺲ ﻟﺪﻳﻬﻢ أي ﻧﻴﺔ ﻟﺘﺤﺴﲔ ﻣﺴﺘﻮاﻫﻢ‪ ،‬وﻗﺪ أﺷﺎر‬
‫اﻟﺒﺎﺣﺜﺎن إﱃ أن اﶈﺎﻛﺎة أداة داﻋﻤﺔ ﻣﻬﻤﺔ وﻟﻜﻨﻬﺎ ﻟﻴﺴﺖ ﺑﺄي ﺣﺎل ﺑﺪﻳﻼً ﻟﻠﻤﺨﺎﺑﺮ اﻟﺘﻄﺒﻴﻘﻴﺔ‪.‬‬

‫ﺑﺪراﺳﺔ ﻧﻮﻋﻴﺔ )‪ (Qualitative Study‬ﻋﻦ آراء اﻟﻄﻼب ﰲ اﺳﺘﺒﺪال اﻟﺮﺣﻼت اﳌﻴﺪاﻧﻴﺔ اﳊﻘﻴﻘﻴﺔ ﺑﺄﺧﺮى اﻓﱰاﺿﻴﺔ‪ ،‬وﻗﺪ أﻇﻬﺮ‬ ‫]‪[732‬‬
‫ﻗﺎم‬
‫اﻟﻄﻼب ﻣﻮﻗﻔﺎً إﳚﺎﺑﻴﺎً ﺟﺪاً ﻻﺳﺘﺨﺪام ﳏﺎﻛﺎة ﻟﺮﺣﻠﺔ ﻣﻴﺪاﻧﻴﺔ‪ ،‬وﻟﻜﻨﻬﻢ ﺑﻨﻔﺲ اﻟﻮﻗﺖ اﻋﱰﺿﻮا ﻋﻠﻰ ﻣﺴﺄﻟﺔ اﺳﺘﺒﺪال اﻟﺮﺣﻼت اﳊﻘﻴﻘﻴﺔ‪ ،‬واﻋﺘﱪوا‬
‫اﻟﺮﺣﻠﺔ اﻻﻓﱰاﺿﻴﺔ ﲟﺜﺎﺑﺔ ﻣﺮﺣﻠﺔ إﺿﺎﻓﻴﺔ داﻋﻤﺔ ﺗﻜﻮن إﻣﺎ ﻗﺒﻞ أو ﺑﻌﺪ اﻟﺮﺣﻠﺔ اﳌﻴﺪاﻧﻴﺔ اﳊﻘﻴﻘﻴﺔ‪.‬‬

‫ﺑﻌﺪ ﻋﺎﻣﲔ ﻣﻦ اﳉﻤﻊ ﺑﲔ اﶈﺎﻛﺎة وﳐﺘﻠﻒ أﻧﺸﻄﺔ اﳌﺨﺎﺑﺮ اﳊﻘﻴﻘﻴﺔ ﰲ ﳐﺘﱪات ﻋﻠﻮم اﻷﺣﻴﺎء )‪ ،(Life Science‬اﺳﺘﺨﻠﺺ]‪ [726‬أن اﶈﺎﻛﺎة‬
‫وﻓﺮت ﻓﺮﺻﺔ أﻓﻀﻞ ﻟﻠﻄﻼب ﻟﻔﻬﻢ اﳌﺒﺎدئ‪ ،‬وﻟﻜﻦ ﺗﺒﻘﻰ اﳊﺎﺟﺔ ﻣﻮﺟﻮدة ﻟﻠﻤﻬﺎرات اﻟﻌﻤﻠﻴﺔ اﻟﱵ ﻻ ﺗﻜﺘﺴﺐ إﻻ ﺑﺈﺟﺮاء اﻟﺘﺠﺎرب اﻟﺘﻄﺒﻴﻘﻴﺔ‪،‬‬
‫إذ أن ﻛﻼ اﻷﺳﻠﻮﺑﲔ ﻣﻬﻢ ووﺟﻮد أﺣﺪﳘﺎ ﻻ ﻳﻠﻐﻲ ﺑﺎﻟﻀﺮورة وﺟﻮد اﻵﺧﺮ‪.‬‬

‫أن ﻛﻞ ﻧﻮع ﻣﻦ اﳌﺨﺎﺑﺮ )اﻟﺘﻄﺒﻴﻘﻲ‪ ،‬اﻻﻓﱰاﺿﻲ‪ ،‬ﻋﻦ ﺑﻌﺪ( ﻳﻌﻄﻲ ﻧﺘﺎﺋﺞ ﺗﻌﻠﻴﻤﻴﺔ ﳐﺘﻠﻔﺔ‪ ،‬وإن ﺗﻘﺪﱘ ﳕﺎذج ﻫﺠﻴﻨﺔ )اﻟﺪﻣﺞ ﺑﲔ‬ ‫اﺳﺘﻨﺘﺞ‬
‫]‪[692‬‬

‫أﻛﺜﺮ ﻣﻦ ﻧﻮع ﻣﻦ اﳌﺨﺎﺑﺮ( ﻣﻦ ﺷﺄﻧﻪ إﺛﺮاء اﻟﺘﺠﺮﺑﺔ اﻟﺘﻌﻠﻴﻤﻴﺔ ﻟﻠﻄﻼب‪ .‬ﺑﺎﳌﺜﻞ أﻛﺪ]‪ [682‬ﻋﻠﻰ أﳘﻴﺔ ﻣﻨﺢ اﻟﻄﻼب إﻣﻜﺎﻧﻴﺔ اﻟﻮﺻﻮل إﱃ ﳐﺘﻠﻒ‬
‫أﻧﻮاع اﳌﺨﺎﺑﺮ ﺑﺪف إﺛﺮاء اﻟﺘﻌﻠﻴﻢ اﳌﺨﱪي‪.‬‬

‫ﻋﻠﻰ اﻟﺮﻏﻢ ﻣﻦ وﺟﻮد اﻟﻌﺪﻳﺪ ﻣﻦ اﻟﺘﺠﺎرب ﻟﺪﻣﺞ ﻧﻮﻋﲔ ﻣﻦ أﻧﻮاع اﳌﺨﺎﺑﺮ ﻣﻊ ﺑﻌﻀﻬﻤﺎ ﰲ ﻋﻤﻠﻴﺔ ﺗﻌﻠﻴﻤﻴﺔ واﺣﺪة وﻧﺘﺎﺋﺠﻬﺎ أﺷﺎدت ﲟﺰاﻳﺎ ذﻟﻚ‬
‫اﻟﺪﻣﺞ]‪ ،[729,730,735‬إﻻ أﻧﻪ ﻣﺎ ﻳﺰال ﻧﺎدراً ﰲ اﻟﺪراﺳﺎت اﻟﻘﺎﺋﻤﺔ وﺟﻮد ﺣﺰﻣﺔ ﺗﻌﻠﻴﻤﻴﺔ ﻣﺘﻜﺎﻣﻠﺔ ﺗﻀﻢ اﻷﺳﺎﻟﻴﺐ اﻟﺜﻼﺛﺔ ) ‪Hands-on,‬‬

‫‪.(Simulation, Remote‬‬

‫ﰲ اﻟﻔﺼﻞ اﻟﺴﺎدس ﺳﻮف ﻧﻘﺪم ﳕﻮذﺟﺎً ﻣﻘﱰﺣﺎً ﻟﻠﺘﻌﻠﻴﻢ اﳌﺨﱪي ﻳﻀﻢ اﻷﺳﺎﻟﻴﺐ اﻟﺜﻼﺛﺔ‪ .‬اﻟﺸﻜﻞ‪ 13-4‬ﻳﺒﲔ ﳐﻄﻄﺎً ﻷﻧﻮاع اﳌﺨﺎﺑﺮ اﻟﺮﺋﻴﺴﻴﺔ‬
‫ﺗﺼﻨﻴﻔﺎﻬﺗﺎ اﻟﻔﺮﻋﻴﺔ‪.‬‬

‫‪Laboratory Style‬‬

‫‪Structure‬‬ ‫‪Access Mode‬‬

‫‪Standalone‬‬ ‫‪Hands-on‬‬

‫‪Experimental‬‬ ‫‪Expository‬‬ ‫‪Virtual‬‬

‫‪Divergent‬‬ ‫‪Remote‬‬

‫اﻟﺸﻜﻞ‪ 13-4‬ﻧﻮاع اﳌﺨﺎﺑﺮ وﺗﺼﻨﻴﻔﺎﻬﺗﺎ‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪234‬‬
‫‪24‬‬ ‫اﻟﻔﺼﻞ اﻟﺮاﺑﻊ | ‪Chapter 4‬‬

‫ﻣﻨﺎﻗﺸﺔ اﻟﻨﻈﺮﻳﺎت اﻟﺘﻌﻠﻴﻤﻴﺔ )‪:(Educational Theories Discussion‬‬ ‫‪7-4‬‬

‫إن اﻟﻨﻈﺮﻳﺔ اﻟﺴﻠﻮﻛﻴﺔ )‪ (Behaviourism‬ﺗﺸﺪد ﻋﻠﻰ اﻟﻄﺎﺑﻊ اﳌﻠﺤﻮظ واﳌﺪرك ﻟﻠﺘﻌﻠﻢ‪ ،‬ﻛﻤﺎ ﻟﻮ أﻧﻪ ﻋﻤﻠﻴﺔ ﻣﻨﻔﻌﻠﺔ ﺗﺘﺸﻜﻞ ﻋﻦ ﻃﺮﻳﻖ‬
‫اﶈﻔﺰات]‪.[532‬‬

‫اﻟﻨﻈﺮﻳﺔ اﻹدراﻛﻴﺔ )‪ (Cognitivism‬ﻧﺸﺄت ﻛﺎﺳﺘﺠﺎﺑﺔ ﻟﻠﻨﻈﺮﻳﺔ اﻟﺴﻠﻮﻛﻴﺔ‪ ،‬وﺗﺆﻛﺪ ﻋﻠﻰ أن اﻟﺘﻌﻠﻢ ﻋﻤﻠﻴﺔ داﺧﻠﻴﺔ ﺗﺴﺘﺨﺪم اﻟﺬاﻛﺮة واﻟﺘﺤﻔﻴﺰ‬
‫واﻟﺘﻔﻜﲑ واﻟﺘﺄﻣﻞ‪ .‬واﻟﻨﻈﺮﻳﺔ اﻹدراﻛﻴﺔ ﺗﺮى أن وﺗﲑة اﻟﺘﻌﻠﻢ وﻣﺴﺘﻮى اﻟﺘﺤﺼﻴﻞ اﳌﻌﺮﰲ ﻳﻌﺘﻤﺪان ﻋﻠﻰ‪ :‬ﻗﺪرة اﳌﺘﻌﻠﻢ ﻋﻠﻰ اﳌﻌﺎﳉﺔ‪ ،‬وﻋﻤﻖ اﳌﻌﺎﳉﺔ‬
‫ﻗﻨﻮاﻬﺗﺎ‪ ،‬واﻻﺳﺘﻨﺘﺎﺟﺎت اﳌﺴﺘﺨﻠﺼﺔ ﻣﻦ اﳌﻌﻠﻮﻣﺎت‪ ،‬وﻋﻠﻰ اﻟﺒﻨﻴﺔ اﳌﻌﺮﻓﻴﺔ اﳌﻮﺟﻮدة ﺳﺎﺑﻘﺎً ﻟﺪى اﳌﺘﻌﻠﻢ‪ ،‬وﻳﺸﺎر إﻟﻴﻬﺎ ﻛ ـ‬
‫‪[535,539,670-‬‬

‫‪.672]Schema‬‬

‫ﻣﻨﺬ ﻋﻘﺪﻳﻦ أو ﺛﻼﺛﺔ ﺑﺪأت اﻟﻨﻈﺮﻳﺔ اﻟﺒﻨﺎﺋﻴﺔ )‪ (Constructivism‬ﺗﺄﺧﺬ ﺣﻴﺰاً ﻛﺒﲑاً ﰲ اﳌﻤﺎرﺳﺎت اﻟﺘﻌﻠﻴﻤﻴﺔ اﳌﻄﺒﻘﺔ]‪ ،[548‬ﺣﻴﺚ ﺗﺆﻛﺪ اﻟﻨﻈﺮﻳﺔ‬
‫اﻟﺒﻨﺎﺋﻴﺔ ﻋﻠﻰ اﻟﺘﻌﻠﻢ اﻟﺘﺠﺮﻳﱯ اﳊﻘﻴﻘﻲ )‪ ،(Experiential & Authentic Learning‬وﺗﻌﺘﱪ أن اﻟﺘﻌﻠﻢ ﻫﻮ اﻟﻌﻤﻠﻴﺔ اﻟﱵ ﻳﻘﻮم ﻣﻦ ﺧﻼﳍﺎ‬
‫اﳌﺘﻌﻠﻤﻮن ﺑﻨﻘﻞ ﻣﻌﻠﻮﻣﺎت ﻣﻌﻘﺪة واﺳﺘﺨﺪاﻣﻬﺎ ﰲ ﺑﻨﺎء ﳕﺎذﺟﻬﻢ اﳋﺎﺻﺔ]‪ ،[545‬وﲤﻴﺰ اﻟﻨﻈﺮﻳﺔ اﻟﺒﻨﺎﺋﻴﺔ ﻧﻔﺴﻬﺎ ﻋﻦ اﻟﻨﻈﺮﻳﺔ اﻟﺴﻠﻮﻛﻴﺔ ﺑﺘﺄﻛﻴﺪﻫﺎ ﻋﻠﻰ‬
‫ﻋﻤﻠﻴﺎت اﻟﺘﻌﻠﻢ‪ ،‬وﻋﻠﻰ ﻃﺒﻴﻌﺘﻬﺎ اﳌﺘﻤﺤﻮرة ﺣﻮل اﻟﻄﺎﻟﺐ )‪.(Student-centered‬‬

‫ﻟﻘﺪ ﺗﺄﺛﺮت اﻟﻨﻈﺮﻳﺔ اﻟﺒﻨﺎﺋﻴﺔ ﺑﺎﻟﻨﻈﺮﻳﺔ اﻹدراﻛﻴﺔ]‪ ،[544‬وﻟﻜﻦ اﻟﺒﻨﺎﺋﻴﺔ ﺗﺘﻤﻴﺰ ﺑﻨﻬﺞ ﴰﻮﱄ أﻛﱪ ﺑﻜﺜﲑ‪ ،‬وذﻟﻚ ﻋﻠﻰ ﺧﻼف اﻟﻨﻈﺮﻳﺔ اﻹدراﻛﻴﺔ اﻟﱵ‬
‫ﺗﺆﻛﺪ ﻋﻠﻰ اﻵﻟﻴﺎت اﻟﺪاﺧﻠﻴﺔ ﻟﻠﺘﻌﻠﻢ‪ ،‬اﻟﺒﻨﺎﺋﻴﻮن ﻳﻔﻬﻤﻮن اﻟﺘﻌﻠﻢ ﻋﻠﻰ أﻧﻪ ﻋﻤﻠﻴﺔ ﻧﺸﻄﺔ وﻣﺘﺄﺻﻠﺔ ﰲ اﻟﻄﺒﻴﻌﺔ‪ ،‬ﺑﻴﻨﻤﺎ ﻳﺮاﻫﺎ اﻟﺴﻠﻮﻛﻴﻮن ﻛﺮد ﻓﻌﻞ‬
‫ﻟﻠﻤﺤﻔﺰات‪.‬‬

‫إن اﻟﻨﻈﺮﻳﺎت اﻟﺘﻌﻠﻴﻤﻴﺔ وﲢﺪﻳﺪاً اﻟﻨﻈﺮﻳﺎت اﻟﺒﻨﺎﺋﻴﺔ واﻹدراﻛﻴﺔ أدت إﱃ ﺗﻄﻮﻳﺮ ﳕﺎذج ﳐﺘﻠﻔﺔ ﻣﻦ اﻷﺳﺎﻟﻴﺐ اﻟﺘﻌﻠﻴﻤﻴﺔ‪ ،‬ﺣﻴﺚ ﻳﻌﺘﱪ ﳕﻮذج‬
‫‪ [545]Kolb‬ﰲ اﻟﺘﻌﻠﻢ اﻟﺘﺠﺮﻳﱯ ﻣﻦ أﻫﻢ اﻷﻣﺜﻠﺔ اﻟﱵ ﺗﺒﲔ ﻗﺪرة اﻟﻨﻈﺮﻳﺔ اﻟﺒﻨﺎﺋﻴﺔ ﻋﻠﻰ ﻋﺮض اﻟﺘﻌﻠﻢ ﻛﻌﻤﻠﻴﺔ‪.‬‬

‫ﻳﺘﻢ اﻟﺘﻌﺒﲑ ﻋﻦ اﻷﺳﺎﻟﻴﺐ اﻟﺴﺎﺋﺪة ﰲ اﻟﺘﻌﻠﻴﻢ واﻟﺘﻌﻠﻢ ﺿﻤﻦ اﻟﺘﻌﻠﻴﻢ اﳍﻨﺪﺳﻲ ﺑﺎﳌﺼﻄﻠﺢ ”‪ ،[672]“Chalk and Talk‬إن ﻫﺬا اﳌﺼﻄﻠﺢ‬
‫ﻳﺸﲑ إﱃ أﺳﺎﻟﻴﺐ اﻟﺘﻌﻠﻴﻢ واﻟﺘﻌﻠﻢ اﻟﱵ ﳍﺎ ﺧﻠﻔﻴﺔ ﺗﺮﺑﻮﻳﺔ ﺑﺴﻴﻄﺔوﻫﺬا ﳝﻜﻦ أن ﻳﻌﺰى إﱃ ﺣﻘﻴﻘﺔ أن اﶈﺎﺿﺮﻳﻦ واﳌﺪرﺳﲔ ﰲ اﺠﻤﻟﺎﻻت اﳍﻨﺪﺳﻴﺔ‬
‫اﻟﻌﻠﻤﻴﺔ ﻣﺪرﺑﻮن ﺑﺸﻜﻞ ﺟﻴﺪ ﺿﻤﻦ اﺧﺘﺼﺎﺻﺎﻬﺗﻢ‪ ،‬إﻻ أ�ﻢ ﻧﺎدراً ﻣﺎ ﻳﺘﻠﻘﻮن أي ﺗﺪرﻳﺒﺎت ﺗﺮﺑﻮﻳﺔ]‪ .[494,673‬ﻟﺬﻟﻚ ﻓﺈن اﳍﺪف ﻣﻦ ﻧﻈﺮﻳﺎت‬
‫اﻟﺘﻌﻠﻢ ﻫﻮ ﺗﻘﺪﱘ اﳌﻌﻠﻮﻣﺎت اﻟﻼزﻣﺔ واﻟﻀﺮورﻳﺔ ﻟﺘﺼﻤﻴﻢ ﳕﺎذج ﺗﻌﻠﻴﻤﻴﺔ ﻫﻨﺪﺳﻴﺔ ﳏﺴﻨﺔ ﺗﻌﺰز اﻟﺘﻌﻠﻴﻢ اﳍﻨﺪﺳﻲ وﺗﻄﻮرﻩ‪.‬‬

‫اﳌﺪارس اﻟﱰﺑﻮﻳﺔ اﻟﺴﻠﻮﻛﻴﺔ واﻹدراﻛﻴﺔ واﻟﺒﻨﺎﺋﻴﺔ ﳐﺘﻠﻔﺔ ﻋﻦ ﺑﻌﻀﻬﺎ‪ ،‬إﻻ أن ﻫﻨﺎك ﻋﻼﻗﺎت ﺗﺮﺑﻂ ﺑﻴﻨﻬﺎ ﰲ اﻟﻌﺪﻳﺪ ﻣﻦ اﳉﻮاﻧﺐ]‪ .[532‬ﻓﻤﺜﻼً‪:‬‬
‫اﻟﺘﺼﻤﻴﻢ اﻟﺘﻌﻠﻴﻤﻲ اﳍﻨﺪﺳﻲ ﳝﻜﻦ أن ﻳﺴﺘﻔﻴﺪ ﻣﻦ ﻛﻞ ﻣﻦ ﺗﻠﻚ اﳌﺪارس‪ ،‬وﻣﻊ ذﻟﻚ ﻳﺒﺪو أن اﻟﻨﻈﺮﻳﺔ اﻟﺒﻨﺎﺋﻴﺔ ﻫﻲ اﻷﻛﺜﺮ ﻗﺎﺑﻠﻴﺔ ﻟﻠﺘﻄﺒﻴﻖ ﰲ‬
‫اﻟﺘﺼﻤﻴﻢ اﻟﺘﻌﻠﻴﻤﻲ اﳍﻨﺪﺳﻲ‪ ،‬وذﻟﻚ ﻟﺘﺄﻛﻴﺪﻫﺎ ﻋﻠﻰ اﳉﻮاﻧﺐ اﻟﱵ ﺗﻌﺘﱪ أﺳﺎﺳﻴﺔ ﳋﺮﳚﻲ اﳍﻨﺪﺳﺔ ﰲ اﳌﺴﺘﻘﺒﻞ‪ ،‬وﺗﺸﻤﻞ ﻫﺬﻩ اﳉﻮاﻧﺐ‪ :‬ﻣﻬﺎرات‬
‫اﻟﺘﻮاﺻﻞ )‪ ،(Communication Skills‬اﻟﺘﻌﻠﻢ ﻣﺪى اﳊﻴﺎة )‪ ،(Lifelong Learning‬ﺣﻞ اﳌﺸﻜﻼت )‪،(Problems-solving‬‬
‫اﳋﱪة اﻟﻌﻤﻠﻴﺔ )‪ ،(Practical Experience‬اﻟﺘﻔﻜﲑ اﻟﺸﻤﻮﱄ )‪ ،(Holistic Thinking‬وﻏﲑﻫﺎ ﻣﻦ اﳉﻮاﻧﺐ اﻟﻌﺪﻳﺪة‪.‬‬

‫‪235‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Engineering Education Methodologies‬‬ ‫ﻣﻨﻬﺠﻴﺎت اﻟﺘﻌﻠﻴﻢ اﳍﻨﺪﺳﻲ |‬

‫ﺗﻌﺘﱪ اﻟﻨﻤﺎذج اﻟﺒﻨﺎﺋﻴﺔ اﻟﺘﻌﻠﻴﻤﻴﺔ ﻣﻔﻴﺪة ﺟﺪاً ﰲ ﺗﺄﻣﲔ اﳌﻬﺎرات اﳌﻄﻠﻮﺑﺔ ﳋﺮﳚﻲ ﻓﺮوع اﳍﻨﺪﺳﺔ ﰲ اﳌﺴﺘﻘﺒﻞ‪ ،‬ﳝﻜﻦ أن ﻧﻌﺪد ﻣﻦ ﻫﺬﻩ اﻟﻨﻤﺎذج‪:‬‬
‫اﻟﺘﻌﻠﻢ اﻟﻘﺎﺋﻢ ﻋﻠﻰ ﺣﻞ اﳌﺸﻜﻼت واﳌﺸﺎرﻳﻊ )‪ [184-186](Problem/Project-based Learning‬اﻟﺘﻌﻠﻢ ذاﰐ اﻟﺘﻨﻈﻴﻢ )‪Self-‬‬

‫‪ ،[652](regulated Learning‬اﻟﺘﻌﻠﻢ اﻟﺘﺠﺮﻳﱯ]‪.[545‬‬

‫وﻣﻦ ﻧﺎﺣﻴﺔ أﺧﺮى‪ ،‬ﳝﻜﻦ ﻟﻠﻬﻨﺪﺳﺔ أن ﻳﻜﻮن ﳍﺎ ﺗﺄﺛﲑ ﻛﺒﲑ ﰲ ﻋﻠﻢ اﻟﱰﺑﻴﺔ واﻟﺘﻌﻠﻴﻢ )‪ ،(Pedagogy‬وﻗﺪ ﻗﺪﻣﻨﺎ ﻓﻴﻤﺎ ﺳﺒﻖ ﻋﺪداً ﻣﻦ ﳎﺎﻻت‬
‫اﻟﺒﺤﺚ اﻟﱰﺑﻮﻳﺔ اﻟﱵ ﺗﺴﺘﻨﺪ إﱃ ﻣﺒﺎدئ ﻫﻨﺪﺳﻴﺔ ﻣﺜﻞ‪ :‬اﻟﺘﻐﺬﻳﺔ اﻟﻌﻜﺴﻴﺔ )‪ ،(Feedback‬اﻟﺘﻘﻴﻴﻢ اﻟﺒﻨﺎﺋﻲ )‪،(Formative Assessment‬‬
‫اﻟﺘﻌﻠﻢ ذاﰐ اﻟﺘﻨﻈﻴﻢ )‪ ،(Self-regulated Learning‬ﺑﺎﻹﺿﺎﻓﺔ إﱃ اﻟﺘﺼﻤﻴﻢ اﻟﺘﻌﻠﻴﻤﻲ )‪ .(Instructional Design‬اﻟﺸﻜﻞ‪14-4‬‬
‫ﻳﻌﺮض ﳐﻄﻄﺎً ﻟﻠﻌﻼﻗﺔ اﳌﺘﺒﺎدﻟﺔ ﺑﲔ اﳉﻮاﻧﺐ اﻟﱰﺑﻮﻳﺔ اﳌﻌﺮوﺿﺔ ﰲ ﻫﺬا اﻟﻔﺼﻞ‪.‬‬

‫وﻋﻠﻴﻪ ﻓﺈﻧﻨﺎ ﻣﻦ ﺧﻼل ﲝﺜﻨﺎ ﻫﺬا ﻧﺮى أن ﻧﻈﺮﻳﺔ اﻟﺘﻌﻠﻢ اﻟﺸﻤﻮﻟﻴﺔ ﻫﻲ اﻟﱵ ﺗﻮﺣﺪ أﻓﻜﺎر ﻛﻞ اﳌﺪارس اﻟﱰﺑﻮﻳﺔ وذﻟﻚ ﻣﻦ ﺧﻼل‪:‬‬
‫‪ ‬ﺗﺒﲏ اﻟﻨﻈﺮﻳﺔ اﻟﺒﻨﺎﺋﻴﺔ ﺑﻮﺻﻔﻬﺎ اﻹﻃﺎر اﳋﺎرﺟﻲ ﻟﺘﻄﻮﻳﺮ اﻟﻨﻤﺎذج اﳌﺘﻤﺤﻮرة ﺣﻮل اﻟﻄﺎﻟﺐ ﰲ ﻋﻤﻠﻴﺎت اﻟﺘﻌﻠﻢ‪.‬‬
‫‪ ‬اﻻﺳﺘﻔﺎدة ﻣﻦ ﻋﻨﺎﺻﺮ اﻟﻨﻈﺮﻳﺔ اﻟﺴﻠﻮﻛﻴﺔ ﻛﺄداة ﻟﺘﻌﺰﻳﺰ ﺗﻨﻈﻴﻢ ﺗﻠﻚ اﻟﻌﻤﻠﻴﺎت‪.‬‬
‫‪ ‬اﻟﻌﻮدة إﱃ اﻟﻨﻈﺮﻳﺔ اﻹدراﻛﻴﺔ اﻟﱵ ﺗﻌﻄﻲ ﻋﻤﻠﻴﺔ اﻟﺘﺼﻤﻴﻢ اﻟﺘﻌﻠﻴﻤﻲ ﺷﻜﻠﻬﺎ وﺟﻮﻫﺮﻫﺎ ﻣﻦ ﺧﻼل ﻓﻬﻢ ﻣﻀﻤﻮﻧﺎت اﳉﻮاﻧﺐ اﳌﻌﺮﻓﻴﺔ‬
‫واﻻﻋﺘﺒﺎرات اﻟﻌﻘﻠﻴﺔ اﻟﺪاﺧﻠﻴﺔ اﳌﺘﻌﻠﻘﺔ ﻬﺑﺎ‪.‬‬
‫‪ ‬اﻻﺳﺘﻔﺎدة ﻣﻦ ﺗﺄﺛﺮ اﻟﻨﻈﺮﻳﺔ اﻻﺗﺼﺎﻟﻴﺔ ﺑﺘﻜﻨﻮﻟﻮﺟﻴﺎ اﻟﻌﺼﺮ اﻟﺮﻗﻤﻲ‪ ،‬واﻟﺘﺄﻛﻴﺪ ﻋﻠﻰ رﺑﻂ اﳌﻌﺎرف اﳌﺘﺠﺪدة أﻳﻨﻤﺎ وﺟﺪت‪.‬‬

‫‪Pedagogical Theories‬‬

‫‪Behaviourism‬‬ ‫‪Cognitivism‬‬ ‫‪Constructivism‬‬ ‫‪Connectivism‬‬

‫‪Instructional‬‬ ‫‪Experiential‬‬
‫‪Design‬‬ ‫‪Learning‬‬

‫‪Self-regulated‬‬ ‫‪Models of‬‬

‫‪Learning‬‬ ‫‪Learning Styles‬‬

‫‪Formative‬‬
‫‪Feedback‬‬
‫‪Assessment‬‬

‫اﻟﺸﻜﻞ‪ 14-4‬اﻟﻨﻈﺮﻳﺎت اﻟﺘﻌﻠﻴﻤﻴﺔ واﻟﻌﻼﻗﺔ اﳌﺘﺒﺎدﻟﺔ ﺑﲔ اﳉﻮاﻧﺐ اﻟﺘﻌﻠﻴﻤﻴﺔ اﳌﺮﺗﺒﻄﺔ‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪236‬‬
‫‪24‬‬ ‫اﻟﻔﺼﻞ اﻟﺮاﺑﻊ | ‪Chapter 4‬‬

‫اﻟﺨﻼﺻﺔ )‪:(Conclusion‬‬ ‫‪8-4‬‬

‫ﻗﺪم ﻫﺬا اﻟﻔﺼﻞ ﻋﺮﺿﺎً ﻣﻮﺟﺰاً ﻟﻼﲡﺎﻫﺎت اﻟﺴﺎﺋﺪة ﰲ اﳌﺪارس اﻟﱰﺑﻮﻳﺔ‪ ،‬ﻛﺎﻟﻨﻈﺮﻳﺔ اﻟﺴﻠﻮﻛﻴﺔ واﻟﻨﻈﺮﻳﺔ اﻹدراﻛﻴﺔ واﻟﻨﻈﺮﻳﺔ اﻟﺒﻨﺎﺋﻴﺔ‪ ،‬وذﻟﻚ ﻋﻠﻰ‬
‫اﻋﺘﺒﺎر أن اﻟﻨﻈﺮﻳﺎت اﻟﱰﺑﻮﻳﺔ ﺗﻠﻌﺐ دوراً ﻫﺎﻣﺎً ﰲ ﻋﻤﻠﻴﱵ ﺗﺼﻤﻴﻢ اﻟﺘﻌﻠﻴﻢ واﻟﺘﻌﻠﻢ اﳍﻨﺪﺳﻲ‪.‬‬

‫اﳌﺪرﺳﺔ اﻟﺒﻨﺎﺋﻴﺔ ﻫﻲ أﺣﺪث اﳌﺪارس اﻟﱰﺑﻮﻳﺔ وﻫﻲ ﺗﺆﻛﺪ ﻋﻠﻰ اﻟﻌﺪﻳﺪ ﻣﻦ اﳉﻮاﻧﺐ ذات اﻟﺼﻠﺔ ﺑﺎﻟﺘﻌﻠﻴﻢ اﳍﻨﺪﺳﻲ‪ ،‬وﲢﺪﻳﺪاً ﻧﻈﺮﻳﺔ اﻟﺘﻌﻠﻢ‬
‫اﻟﺘﺠﺮﻳﱯ اﻟﺒﻨﺎﺋﻴﺔ ذات اﻟﺼﻠﺔ اﻟﻮﺛﻴﻘﺔ ﺑﺎﻟﺘﻌﻠﻴﻢ اﳍﻨﺪﺳﻲ واﳌﺨﱪي ‪ -‬ﻧﻈﺮاً ﻟﻠﻄﺒﻴﻌﺔ اﻟﺘﺠﺮﻳﺒﻴﺔ اﻟﱵ ﺗﺴﻮد ﰲ ﻫﺬﻩ اﳌﺨﺎﺑﺮ‪.‬‬

‫ﰎ ﺷﺮح ﻧﻈﺮﻳﺔ ‪ Kolb‬ﰲ اﻟﺘﻌﻠﻢ اﻟﺘﺠﺮﻳﱯ ﺑﺸﻜﻞ ﻣﻔﺼﻞ‪ ،‬ﺣﻴﺚ ﺳﻨﺴﺘﺨﺪﻣﻬﺎ ﻛﺄﺳﺎس ﻟﺘﺼﻤﻴﻢ ﳕﻮذج ﺟﺪﻳﺪ ﻟﻠﺘﻌﻠﻴﻢ اﳌﺨﱪي‪ ،‬واﻟﺬي ﺳﻴﺘﻢ‬
‫ﺗﻘﺪﳝﻪ ﻣﻔﺼﻼً ﰲ اﻟﻔﺼﻞ اﳋﺎﻣﺲ‪.‬‬

‫ﰎ اﺳﺘﺨﺪام ﻋﻨﺎﺻﺮ اﻟﻨﻈﺮﻳﺔ اﻹدراﻛﻴﺔ ﰲ ﻫﺬا اﻟﻔﺼﻞ ﻟﺸﺮح وﺗﻔﺴﲑ ﺑﻌﺾ اﻟﻨﺘﺎﺋﺞ ﰲ اﻟﻔﺼﻞ اﻟﺴﺎﺑﻊ ﺧﻼل ﺗﻄﻮﻳﺮ اﻟﻨﻤﺎذج اﻟﺮﻳﺎﺿﻴﺔ ﻟﻠﺘﻌﻠﻢ‪،‬‬
‫وﻗﺪ أوﺿﺤﻨﺎ أن اﻟﻌﺪﻳﺪ ﻣﻦ ﺟﻮاﻧﺐ اﻷﲝﺎث اﻟﱰﺑﻮﻳﺔ‪ :‬ﻛﺎﻟﺘﻐﺬﻳﺔ اﻟﻌﻜﺴﻴﺔ واﻟﺘﻘﻴﻴﻢ اﻟﺒﻨﺎﺋﻲ واﻟﺘﻌﻠﻢ ذاﰐ اﻟﺘﻨﻈﻴﻢ‪ ،‬وﻛﺬﻟﻚ ﺗﺼﻤﻴﻢ اﳌﻨﺎﻫﺞ‬
‫اﻟﺘﻌﻠﻴﻤﻴﺔ ﺗﺮﺗﺒﻂ ﲟﻔﺎﻫﻴﻢ وﻣﺒﺎدئ ﻫﻨﺪﺳﻴﺔ )وﲢﺪﻳﺪاً ﲟﺒﺎدئ ﻣﻦ ﻫﻨﺪﺳﺔ أﻧﻈﻤﺔ اﻟﺘﺤﻜﻢ(‪.‬‬

‫اﳉﺪﻳﺮ ﺑﺎﻟﺬﻛﺮ أن ﺗﺪاﺧﻞ ﻧﻈﺮﻳﺎت اﳌﺪارس اﻟﱰﺑﻮﻳﺔ‪ ،‬إﺿﺎﻓﺔً إﱃ اﳉﻮاﻧﺐ اﳌﺨﺘﻠﻔﺔ ﻟﻜﻞ ﻣﺪرﺳﺔ‪ ،‬ﳝﻜﻦ أن ﻳﻜﻮن ﻣﻔﻴﺪاً ﻟﻔﻬﻢ اﻟﻨﺘﺎﺋﺞ اﻟﺘﺠﺮﻳﺒﻴﺔ‬
‫اﳋﺎﺻﺔ ﺑﺘﺼﻤﻴﻢ ﳕﺎذج اﻟﺘﻌﻠﻴﻢ واﻟﺘﻌﻠﻢ‪ ،‬وﲢﻠﻴﻞ اﻟﻌﻤﻠﻴﺎت اﻟﺘﻌﻠﻴﻤﻴﺔ‪ ،‬وﻗﺪ ﲤﺖ ﻣﻨﺎﻗﺸﺔ اﻟﻌﻼﻗﺎت اﳌﺘﺒﺎدﻟﺔ ﺑﲔ اﻟﻨﻈﺮﻳﺎت اﻟﱰﺑﻮﻳﺔ‪.‬‬

‫ﻟﻘﺪ أﻛﺪت اﻷﲝﺎث واﻟﺪراﺳﺎت ﻣﺮاراً وﺗﻜﺮاراً ﻋﻠﻰ أﳘﻴﺔ دور اﳌﺨﺎﺑﺮ ﰲ اﻟﻌﻠﻮم واﳍﻨﺪﺳﺔ‪ ،‬ﺣﻴﺚ ﺗﻌﺘﱪ اﳌﺨﺎﺑﺮ اﻟﺘﻄﺒﻴﻘﻴﺔ ) ‪Hands-on‬‬

‫‪ (Labs‬اﻟﻨﻮع اﻷﻛﺜﺮ ﺷﻴﻮﻋﺎً‪ ،‬وﻟﻜﻦ اﻟﺘﻄﻮرات اﳊﺪﻳﺜﺔ ﰲ ﺗﻜﻨﻮﻟﻮﺟﻴﺎ اﳌﻌﻠﻮﻣﺎت واﻻﺗﺼﺎﻻت أدت إﱃ ﻇﻬﻮر ﻧﻮﻋﲔ ﺟﺪﻳﺪﻳﻦ ﻣﻦ اﻟﺘﻌﻠﻴﻢ‬
‫اﳌﺨﱪي ﳘﺎ‪ :‬اﳌﺨﺎﺑﺮ اﻻﻓﱰاﺿﻴﺔ )‪ ،(Virtual Labs‬واﳌﺨﺎﺑﺮ ﻋﻦ ﺑﻌﺪ )‪ ،(Remote Lab‬وﻗﺪ ﻗﻤﻨﺎ ﺑﺎﺳﺘﻌﺮاض اﻟﺪراﺳﺎت اﻟﱵ ﻗﺎﻣﺖ ﻋﻠﻰ‬
‫ﳐﺘﻠﻒ أﻧﻮاع اﻟﺘﻌﻠﻴﻢ اﳌﺨﱪي واﻟﱵ أﻋﻄﺖ اﻟﺘﻔﺎﺻﻴﻞ ﻋﻦ ﻣﺰاﻳﺎ وﻋﻴﻮب ﻛﻞ ﻧﻮع ﻣﻦ ﺗﻠﻚ اﻷﻧﻮاع‪.‬‬

‫ﺑﻴﻨّﺎ أﻳﻀﺎً أن ﻫﻨﺎك ﻧﻘﺼﺎً ﰲ اﻟﺪراﺳﺎت اﻟﺘﺠﺮﻳﺒﻴﺔ ﺣﻮل أﲝﺎث اﻟﺘﻌﻠﻴﻢ اﳌﺨﱪي‪ ،‬وﻛﺬﻟﻚ ﺑﻴﻨﺎ أن اﻟﺪراﺳﺎت ﻻ ﺗﺆﻛﺪ ﺑﺸﻜﻞ داﺋﻢ ﻋﻠﻰ ﺗﻔﻮق‬
‫ﻧﻮع واﺣﺪ ﻣﻦ أﻧﻮاع اﻟﺘﻌﻠﻴﻢ اﳌﺨﱪي‪ ،‬وﻟﻜﻦ اﻟﺪراﺳﺎت أﻇﻬﺮت ﺗﻮاﻓﻘﺎً ﻋﺎﻣﺎً ﻋﻠﻰ ﺧﻼﺻﺔ واﺣﺪة وﻫﻲ اﳊﺎﺟﺔ إﱃ اﺳﺘﺨﺪام اﻟﻨﻤﻮذج اﳌﺨﺘﻠﻂ‬
‫ﻟﻠﻤﺨﺎﺑﺮ‪ .‬ﻋﻠﻰ اﻟﺮﻏﻢ ﻣﻦ ﺣﻘﻴﻘﺔ أن اﳌﺨﺎﺑﺮ اﻟﺘﻄﺒﻴﻘﻴﺔ ﻻ زاﻟﺖ ﺗﻠﻌﺐ دوراً ﳏﻮرﻳﺎً ﰲ اﻟﺘﻌﻠﻴﻢ اﳌﺨﱪي‪ ،‬إﻻ أن اﳉﻤﻊ ﺑﻴﻨﻬﺎ وﺑﲔ اﻷﻧﻮاع اﻷﺧﺮى‬
‫وﲢﻘﻴﻖ ﳕﻮذج ﻣﺘﻜﺎﻣﻞ وﺗﻄﺒﻴﻘﻪ ﳝﻜﻦ أن ﻳﻌﻄﻲ ﻧﺘﺎﺋﺞ ﺗﻌﻠﻴﻤﻴﺔ أﻓﻀﻞ‪ .‬ﺳﻮف ﻧﻔﺼﻞ ﰲ اﻟﻔﺼﻞ اﳋﺎﻣﺲ ﺗﺼﻤﻴﻤﺎً ﳐﺘﻠﻄﺎً ﻟﻠﺘﻌﻠﻴﻢ اﳌﺨﱪي‪.‬‬

‫‪237‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 Engineering Education Methodologies | ‫ﻣﻨﻬﺠﻴﺎت اﻟﺘﻌﻠﻴﻢ اﳍﻨﺪﺳﻲ‬

Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages 238
 ‫اﻟﻔﺼﻞ اﻟﺨﺎﻣﺲ‬ ‫‪Chapter 5‬‬

‫‪@5Éæa@·Ó‹»n‹€@Ôˆb‰i@xàÏπ@ÏÆ‬‬

‫‪TOWARD A CONSTRUCTIVIST LABORATORY EDUCATION MODEL‬‬

‫ﻧﻈﺮة ﻋﺎﻣﺔ )‪:(Overview‬‬

‫ﻫ ـ ــﺬا اﻟﻔﺼ ـ ــﻞ ﻳﻌ ـ ــﺎﰿ اﻷﺳ ـ ــﺲ اﻟﱰﺑﻮﻳ ـ ــﺔ اﻟ ـ ــﱵ ﺗﻘ ـ ــﺪم ذﻛﺮﻫ ـ ــﺎ ﰲ اﻟﻔﺼ ـ ــﻞ اﳋ ـ ــﺎﻣﺲ‪ ،‬ﺣﻴ ـ ــﺚ ﻳﻘـ ــﺪم ﳕﻮذﺟ ـ ـﺎً ﺗﺮﺑﻮﻳ ـ ـﺎً ﻓﺮﻳـ ــﺪاً ﻟﻠﺘﻌﻠـ ــﻴﻢ اﳍﻨﺪﺳـ ــﻲ ﻳﻌﺘﻤـ ــﺪ‬
‫ﻋﻠ ـ ــﻰ ﻧﻈﺮﻳ ـ ــﺔ ‪ Kolb‬ﰲ اﻟ ـ ــﺘﻌﻠﻢ اﻟﺘﺠـ ـ ـﺮﻳﱯ ﺟﻨﺒـ ـ ـﺎً إﱃ ﺟﻨ ـ ــﺐ ﻣ ـ ــﻊ اﻟﺘﺤﻠﻴ ـ ــﻞ اﻟﺘﺠـ ـ ـﺮﻳﱯ وﻳﻌﺘـ ــﱪ ﻫـ ــﺬا اﻟﻨﻤـ ــﻮذج اﻷول ﻣـ ــﻦ ﻧﻮﻋـ ــﻪ‪ .‬ﻳﺴـ ــﺘﻬﻞ اﻟﻔﺼـ ــﻞ‬
‫ﺑﺪاﻳﺘ ـ ـ ـ ــﻪ ﲟ ـ ـ ـ ــﺪﺧﻞ إﱃ اﻟﻄ ـ ـ ـ ــﺮق اﻹﺣﺼ ـ ـ ـ ــﺎﺋﻴﺔ اﳌﺴ ـ ـ ـ ــﺘﺨﺪﻣﺔ ﰲ اﻷﲝ ـ ـ ـ ــﺎث اﻟﱰﺑﻮﻳ ـ ـ ـ ــﺔ‪ ،‬واﻟ ـ ـ ـ ــﱵ ﺳﺘﺴ ـ ـ ــﺘﺨﺪم ﻻﺣﻘـ ـ ـ ـﺎً ﻟﺘﺤﻠﻴ ـ ـ ــﻞ ﻧﺘ ـ ـ ــﺎﺋﺞ اﻻﺧﺘﺒ ـ ـ ــﺎرات‬
‫اﻹﺣﺼـ ـ ــﺎﺋﻴﺔ‪ ،‬وﻣﻨﺎﻗﺸـ ـ ــﺔ اﻟﻨﺘـ ـ ــﺎﺋﺞ اﻟﺘﺠﺮﻳﺒﻴـ ـ ــﺔ‪ .‬ﻳﻨﺘﻘـ ـ ــﻞ اﻟﻔﺼـ ـ ــﻞ ﰲ ﻗﺴـ ـ ــﻤﻪ اﻟﺜـ ـ ــﺎﱐ إﱃ ﺳـ ـ ــﺮد ﻣﻘﺘﻀ ـ ــﺐ ﻟﻌﻨﺎﺻ ـ ــﺮ ﳐﺘ ـ ــﱪ اﻷﻧﻈﻤ ـ ــﺔ اﳌﺪﳎ ـ ــﺔ اﻟ ـ ــﺬي ﰎ‬
‫ﺗﺼـ ــﻤﻴﻤﻪ ﺑﺸـ ــﻜﻞ ﺧـ ــﺎص ﳍـ ــﺬﻩ اﻟﺪراﺳـ ــﺔ‪ .‬اﻟﻘﺴـ ــﻢ اﻟﺜﺎﻟـ ــﺚ ﻳﺸـ ــﺮح أﺳـ ــﺒﺎب ﺿـ ــﻌﻒ ﻧﺘـ ــﺎﺋﺞ اﻟﺘﻌﻠـ ــﻴﻢ اﳌﺨـ ــﱪي وﳛـ ــﺎول أن ﻳﻌـ ــﺎﰿ ﻫـ ــﺬﻩ اﻷﺳـ ــﺒﺎب‬
‫ﻣ ـ ــﻦ ﺧ ـ ــﻼل دراﺳ ـ ــﺔ ﺗﻄﺒﻴﻘﻴ ـ ــﺔ ﻟﻠﻤﺨﺘ ـ ــﱪ اﻻﻓﱰاﺿ ـ ــﻲ‪ ،‬وﻳ ـ ــﺘﻢ ﲢﻠﻴ ـ ــﻞ ﻧﺘ ـ ــﺎﺋﺞ ﻫ ـ ــﺬﻩ اﻟﺪراﺳـ ــﺔ إﺣﺼـ ــﺎﺋﻴﺎً‪ .‬ﳜـ ــﺘﻢ اﻟﻘﺴـ ــﻢ اﻟﺜﺎﻟـ ــﺚ ﻣﻮﺿـ ــﻮﻋﻪ ﺑﻨﻤـ ــﻮذج‬
‫ﻫﺠ ـ ــﲔ ﻣﻘ ـ ــﱰح ﻟﻠﺘﻌﻠ ـ ــﻴﻢ اﳌﺨ ـ ــﱪي‪ .‬ﻧﻨﺘﻘ ـ ــﻞ ﰲ اﻟﻘﺴ ـ ــﻢ اﻟﺮاﺑ ـ ــﻊ ﻣ ـ ــﻦ ﻫ ـ ــﺬ اﻟﻔﺼ ـ ــﻞ إﱃ اﻟﺘﻤﺜﻴـ ــﻞ اﻟﺮﻳﺎﺿـ ــﻲ اﳍﻨﺪﺳـ ــﻲ ﻟﻨﻤـ ــﻮذﺟﻲ اﻟﺘﻌﻠـ ــﻴﻢ ﰲ اﳊﻠﻘـ ــﺔ‬
‫اﳌﻔﺘﻮﺣ ـ ــﺔ واﳌﻐﻠﻘ ـ ــﺔ‪ ،‬وﻧﻘ ـ ــﺪم دراﺳ ـ ــﺔ ﺗﻄﺒﻴﻘﻴ ـ ــﺔ ﺗﻔﺼ ـ ــﻴﻠﻴﺔ ﲢﻠﻴﻠﻴ ـ ــﺔ ﻟﻠﻤﻨﻬﺠﻴ ـ ــﺔ اﳌﺘﺒﻌ ـ ــﺔ ﰲ ﻫـ ــﺬﻳﻦ اﻟﻨﻤـ ــﻮذﺟﲔ‪ .‬اﻟﻘﺴـ ــﻢ اﳋـ ــﺎﻣﺲ واﻷﺧـ ــﲑ ﻣـ ــﻦ ﻫـ ــﺬا‬
‫اﻟﻔﺼـ ـ ــﻞ ﻳـ ـ ــﺄﰐ ﻛﻌﺼـ ـ ــﺎرة ﻟﻸﺳـ ـ ــﺲ اﻟﱰﺑﻮﻳـ ـ ــﺔ اﻟـ ـ ــﱵ ﺧﻄّـ ـ ــﺖ ﰲ اﻟﻔﺼـ ـ ــﻞ اﻟﺮاﺑـ ـ ــﻊ‪ ،‬واﻵﻟﻴـ ـ ــﺎت اﻟﻌﻤﻠﻴ ـ ــﺔ ﻟﻸﺳ ـ ــﺲ اﻟ ـ ــﱵ ﺳ ـ ــﻴﺘﻢ ﻣﻨﺎﻗﺸـ ـ ــﺘﻬﺎ وﺗﻄﺒﻴﻘﻬ ـ ــﺎ‬
‫وﲢﻠﻴﻠﻬـ ــﺎ ﰲ ﻫـ ــﺬا اﻟﻔﺼـ ــﻞ‪ ،‬ﻓﻴﻘـ ــﺪم ﳕﻮذﺟ ـ ـﺎً ﺗﻌﻠﻴﻤﻴ ـ ـﺎً ﺷـ ــﺎﻣﻼً ﻟﻠﺘﻌﻠـ ــﻴﻢ اﳍﻨﺪﺳـ ــﻲ ﺑﻜﺎﻓـ ــﺔ أﺑﻌـ ــﺎدﻩ‪ .‬اﻟﺪراﺳـ ــﺔ ﻃﺒﻘـ ــﺖ ﻋﻠـ ــﻰ ﻣـ ــﺪى ﻓﺼـ ــﻠﲔ دراﺳـ ــﻴﲔ‬
‫‪ 2009-2010‬ﺧـ ـ ــﻼل ﺗ ـ ـ ــﺪرﻳﺲ اﳌﻘ ـ ـ ــﺮ اﻟﻌﻤﻠ ـ ـ ــﻲ اﳌﺨ ـ ـ ــﱪي ﳌﻘ ـ ـ ــﺮر اﻟﺘﺼ ـ ـ ــﻤﻴﻢ ﺑﺎﺳ ـ ـ ــﺘﺨﺪام اﳊﺎﺳ ـ ــﺐ – اﻟﺴ ـ ــﻨﺔ اﻟﺮاﺑﻌ ـ ــﺔ ﻗﺴ ـ ــﻢ ﻫﻨﺪﺳ ـ ــﺔ اﻟ ـ ــﺘﺤﻜﻢ‬
‫اﻵﱄ واﻷﲤﺘ ـ ـ ـ ــﺔ‪ 2008-2009 ،‬وﻣﻘ ـ ـ ـ ــﺮر اﳌﻌﺎﳉ ـ ـ ـ ــﺎت ﰲ ﻧﻈ ـ ـ ـ ــﻢ اﻟ ـ ـ ـ ــﺘﺤﻜﻢ – اﻟﺴ ـ ـ ـ ــﻨﺔ اﻟﺜﺎﻟﺜ ـ ـ ــﺔ ﻗﺴ ـ ـ ــﻢ ﻫﻨﺪﺳ ـ ـ ــﺔ اﻟ ـ ـ ــﺘﺤﻜﻢ اﻵﱄ واﻷﲤﺘ ـ ـ ــﺔ‪ ،‬وﻛ ـ ـ ــﻼ‬
‫اﳌﻘﺮرﻳﻦ ﻋﻘﺪا ﰲ ﻛﻠﻴﺔ اﳍﻨﺪﺳﺔ اﻟﻜﻬﺮﺑﺎﺋﻴﺔ اﻹﻟﻜﱰوﻧﻴﺔ ﲜﺎﻣﻌﺔ ﺣﻠﺐ‪.‬‬

‫ﺗﻤﻬﻴﺪ )‪:(Preface‬‬ ‫‪1-5‬‬

‫ﺗﻔﺘﻘﺮ اﻷﲝﺎث اﻟﻘﺎﺋﻤﺔ ﰲ ﳎﺎل اﻟﺘﻌﻠﻴﻢ اﳍﻨﺪﺳﻲ ﻋﻤﻮﻣﺎً واﻟﺘﻌﻠﻴﻢ اﳌﺨﱪي ﺧﺼﻮﺻﺎً إﱃ اﻟﺪراﺳﺎت اﻟﻜﻤﻴﺔ اﻟﺘﺠﺮﻳﺒﻴﺔ]‪ ،[682‬وﻫﺬا ﻣﺎ ﰎ ﻣﻨﺎﻗﺸﺘﻪ‬
‫ﺑﺸﻜﻞ واﺳﻊ ﰲ اﻟﻔﺼﻞ اﳋﺎﻣﺲ‪ .‬ﺑﺎﻹﺿﺎﻓﺔ إﱃ ذﻟﻚ‪ ،‬ﻓﺈﻧﻪ ﻧﺎدراً ﻣﺎ ﳒﺪ ﳕﻮذﺟﺎً ﻟﻠﺘﻌﻠﻴﻢ اﳌﺨﱪي ﻳﻘﻮم ﻋﻠﻰ أﺳﺲ ﺗﺮﺑﻮﻳﺔ ﺻﺤﻴﺤﺔ‪ ،‬وﻻ ﺳﻴﻤﺎ‬
‫ﰲ ﺣﺎﻟﺔ دﻣﺞ اﳌﺨﺎﺑﺮ اﻻﻓﱰاﺿﻴﺔ وﳐﺎﺑﺮ اﻟﺘﻌﻠﻢ ﻋﻦ ﺑﻌﺪ ﻣﻊ اﳌﺨﺎﺑﺮ اﻟﺘﻄﺒﻴﻘﻴﺔ‪.‬‬

‫ﻳﻘﺪم ﻫﺬا اﻟﻔﺼﻞ ﲢﻘﻴﻘﺎً ﰲ ﺿﻌﻒ اﳊﺼﻴﻠﺔ اﻟﺘﻌﻠﻴﻤﻴﺔ ﻟﻠﺘﻌﻠﻴﻢ اﳌﺨﱪي‪ ،‬وﳛﺎول أن ﻳﻠﺘﻤﺲ ﺗﻔﺴﲑاً ﺗﺮﺑﻮﻳﺎً ﻟﺬﻟﻚ ﰲ ﺿﻮء ﻧﻈﺮﻳﺔ ‪ Kolb‬ﰲ‬
‫اﻟﺘﻌﻠﻢ اﻟﺘﺠﺮﻳﱯ‪ ،‬وﲢﻠﻴﻞ اﻟﺒﻴﺎﻧﺎت اﻟﺘﺠﺮﻳﺒﻴﺔ ﻟﻨﺘﺎﺋﺞ ﻋﻤﻠﻴﺔ اﻟﺘﻌﻠﻴﻢ اﳌﺨﱪي‪.‬‬

‫اﺳﺘﻨﺎداً إﱃ اﻟﻨﺘﺎﺋﺞ اﻟﺘﺤﻠﻴﻠﻴﺔ ﺳﻴﺘﻢ ﺗﻘﺪﱘ ﳕﻮذج ﺟﺪﻳﺪ ﻟﻠﺘﻌﻠﻴﻢ اﳌﺨﱪي‪ ،‬ﻳﻌﺘﻤﺪ ﺑﺸﻜﻞ أﺳﺎﺳﻲ ﻋﻠﻰ ﻧﻈﺮﻳﺔ ‪ Kolb‬ﰲ اﻟﺘﻌﻠﻢ اﻟﺘﺠﺮﻳﱯ]‪،[545‬‬
‫وﻳﺘﻢ ﺿﻤﻦ اﻟﻨﻤﻮذج دﻣﺞ اﳌﺨﺎﺑﺮ اﻻﻓﱰاﺿﻴﺔ )‪ (Virtual Labs‬واﳌﺨﺎﺑﺮ اﻟﺘﻄﺒﻴﻘﻴﺔ )‪ (Hands-on Labs‬ﻣﻊ اﳌﺨﺎﺑﺮ ﻋﻦ ﺑﻌﺪ ) ‪Remote‬‬

‫‪ ،(Labs‬وذﻟﻚ ﺑﺪف ﲢﺴﲔ ﻋﻤﻠﻴﺔ ﻓﻬﻢ وﺗﺜﺒﻴﺖ اﻟﻄﻼب ﻟﻠﻤﻌﻠﻮﻣﺎت‪.‬‬

 ‫‪Toward a Constructivist Laboratory Education Model‬‬ ‫ﳓﻮ ﳕﻮذج ﺑﻨﺎﺋﻲ ﻟﻠﺘﻌﻠﻴﻢ اﳌﺨﱪي |‬

‫ﻳﺴﺘﻨﺪ ﻫﺬا اﻟﻨﻤﻮذج إﱃ اﻟﺘﺤﻠﻴﻞ اﻟﺘﺠﺮﻳﱯ اﻟﺸﺎﻣﻞ ﻟﻠﺒﻴﺎﻧﺎت )‪ (Empirical Analysis‬ﻣﻦ ﺧﻼل اﺳﺘﺨﺪام اﻷﺳﺎﻟﻴﺐ اﻹﺣﺼﺎﺋﻴﺔ‬
‫)‪ (Statistical Methods‬واﻟﱵ ﺗﺴﺘﺨﺪم ﰲ اﻷﲝﺎث اﻟﱰﺑﻮﻳﺔ اﻟﻜﻤﻴﺔ )‪ (Quantitative Educational Research‬واﳌﻮﺿﺤﺔ ﰲ‬
‫اﻟﻔﻘﺮات اﻟﺘﺎﻟﻴﺔ‪.‬‬

‫اﻟﻄﺮق اﻹﺣﺼﺎﺋﻴﺔ ﻓﻲ اﻷﺑﺤﺎث اﻟﺘﺮﺑﻮﻳﺔ )‪:(Statistical Methods in Educational Research‬‬ ‫‪2-5‬‬

‫ﻳﻬﺪف ﻫﺬا اﻟﻘﺴﻢ إﱃ ﺗﻌﺮﻳﻒ اﻟﻄﺮاﺋﻖ اﻹﺣﺼﺎﺋﻴﺔ )‪ (Statistical Methods‬اﻟﱵ ﺗﺴﺘﺨﺪم ﻷﻏﺮاض ﲢﻠﻴﻞ اﻟﺒﻴﺎﻧﺎت‪ ،‬ﺣﻴﺚ أن ﻣﻌﻈﻢ‬
‫اﻟﺒﻴﺎﻧﺎت ﰲ ﻫﺬا اﻟﻔﺼﻞ )ﻛﻨﺘﺎﺋﺞ اﻻﺧﺘﺒﺎرات واﻟﻔﺮﺿﻴﺎت( ﰎ ﲢﻠﻴﻠﻬﺎ ﺑﻮاﺳﻄﺔ اﺧﺘﺒﺎرات إﺣﺼﺎﺋﻴﺔ اﺳﺘﻨﺘﺎﺟﻴﺔ )‪.(Inferential Statistics‬‬

‫ﰲ اﻷﲝﺎث اﻟﱰﺑﻮﻳﺔ اﻟﻜﻤﻴﺔ )‪ ،[749](Quantitative Educational Research‬ﻻ ﳝﻜﻦ إﺟﺮاء اﳌﻘﺎرﻧﺔ ﺑﲔ اﳌﺘﻮﺳﻄﺎت اﳊﺴﺎﺑﻴﺔ‬
‫)‪ (Means‬ﺑﺒﺴﺎﻃﺔ ﻣﻦ ﺧﻼل ﻣﻌﺮﻓﺔ ﻣﻦ ﻫﻮ اﻷﻛﱪ ﻣﻦ اﻷﺻﻐﺮ‪ ،‬ﻓﻌﻠﻰ ﺳﺒﻴﻞ اﳌﺜﺎل‪ :‬ﻟﻨﻔﺮض ﺗﻄﺒﻴﻖ ﻣﻨﻬﺠﻴﺔ ﺗﻌﻠﻴﻤﻴﺔ ﺟﺪﻳﺪة ﻋﻠﻰ ﻋﻴﻨﺔ ﻣﻦ‬
‫اﻟﻄﻼب )ﻤﻟﻤﻮﻋﺔ اﻻﺧﺘﺒﺎرﻳﺔ ﻣﺸﺎﻬﺑﺔ ﻟﻌﻴﻨﺔ أﺧﺮى )ﻤﻟﻤﻮﻋﺔ اﻟﻘﻴﺎﺳﻴﺔ(‪ ،‬وﻫﺬﻩ اﻷﺧﲑة ﺗﺘﺒﻊ ﻣﻨﻬﺠﻴﺔ ﺗﻌﻠﻴﻤﻴﺔ ﺗﻘﻠﻴﺪﻳﺔ؛ وﺑﺎﻟﺘﺎﱄ ﻓﺈﻧﻪ ﻻ ﳝﻜﻦ‬
‫اﳉﺰم ﻓﻴﻤﺎ إذا ﻛﺎن اﻟﻔﺮق ﻧﺎﺗﺞ ﻋﻦ اﻻﺧﺘﻼف ﰲ ﻣﻨﻬﺠﻴﺔ اﻟﺘﻌﻠﻴﻢ أو أﻧﻪ ﻧﺎﺗﺞ ﻓﻘﻂ ﻋﻦ اﻟﺼﺪﻓﺔ‪ ،‬ﻣﻦ ﺧﻼل اﻻﻗﺘﺼﺎر ﻋﻠﻰ اﻟﻨﻈﺮ إﱃ‬
‫اﻻﺧﺘﻼف ﺑﲔ اﳌﺘﻮﺳﻂ اﳊﺴﺎﰊ ﻟﻠﻤﺠﻤﻮﻋﺘﲔ‪.‬‬

‫إن أدوات اﻟﺘﺤﻠﻴﻞ اﻹﺣﺼﺎﺋﻲ ﺗﻮﻓﺮ ﻟﻠﺒﺎﺣﺜﲔ ﰲ اﻟﻌﻠﻮم اﻻﺟﺘﻤﺎﻋﻴﺔ وﺳﺎﺋﻞ ﲢﻠﻴﻞ ﻣﺘﻌﻤﻖ وﺷﺎﻣﻞ ﻟﻠﺒﻴﺎﻧﺎت‪ ،‬وﺑﺸﻜﻞ ﺧﺎص ﺗﺴﺘﺨﺪم‬
‫اﻻﺧﺘﺒﺎرات اﻟﺒﺎراﻣﱰﻳﺔ ”‪ “Parametric Tests‬واﻻﺧﺘﺒﺎرات اﻟﻼﺑﺎراﻣﱰﻳﺔ ”‪ “Non-Parametric Tests‬ﳌﻘﺎرﻧﺔ اﳌﺘﻮﺳﻄﺎت اﳊﺴﺎﺑﻴﺔ‬
‫ﻋﻠﻰ ﻧﻄﺎق واﺳﻊ ﰲ اﻷﲝﺎث اﻟﺘﻌﻠﻴﻤﻴﺔ]‪.[745‬‬

‫‪ 1-2-5‬اﺧﺘﺒﺎرات اﻟﻔﺮوض اﻹﺣﺼﺎﺋﻴﺔ )‪:(Statistical Hypothesis Testing‬‬

‫ﺗﻌﺘﱪ اﺧﺘﺒﺎرات اﻟﻔﺮوض اﻹﺣﺼﺎﺋﻴﺔ واﺣﺪة ﻣﻦ أﻫﻢ اﻟﺘﻄﺒﻴﻘﺎت اﻟﱵ ﻗﺪﻣﻬﺎ ﻋﻠﻢ اﻹﺣﺼﺎء ﻛﺤﻞ ﻟﻠﻤﺸﺎﻛﻞ اﻟﻌﻠﻤﻴﺔ اﳌﺨﺘﻠﻔﺔ ﺑﺸﱴ ﻓﺮوع‬
‫اﻟﻌﻠﻢ‪ ،‬ﻓﺒﺎﺳﺘﺨﺪام ﻧﻈﺮﻳﺔ اﻻﺣﺘﻤﺎﻻت وﺧﺼﺎﺋﺺ ﺗﻮزﻳﻌﺎت اﻟﻌﻴﻨﺔ‪ ،‬أﻣﻜﻦ اﻟﺘﻌﺮف إﱃ ﻣﺎ ﻳﺴﻤﻰ ﺑﺎﺧﺘﺒﺎرات اﻟﻔﺮوض اﻹﺣﺼﺎﺋﻴﺔ – أي‬
‫اﻟﻔﺮوض اﻟﱵ ﺗﺘﻌﻠﻖ ﺠﻤﻟﺘﻤﻊ اﻹﺣﺼﺎﺋﻲ ﻟﻠﻌﻴﻨﺔ اﳌﺴﺤﻮﺑﺔ – واﻟﱵ ﻣﻦ ﺧﻼﳍﺎ ﳝﻜﻦ ﻷي ﺷﺨﺺ أن ﻳﺘﺨﺬ ﻗﺮاراً ﺑﺮﻓﺾ أو ﻗﺒﻮل ﻓﺮض ﻣﻌﲔ أو‬
‫ﳎﻤﻮﻋﺔ ﻣﻦ اﻟﻔﺮوض اﳌﺘﻌﻠﻘﺔ ﲟﺸﻜﻠﺔ ﻣﻌﻴﻨﺔ‪.‬‬

‫ﻣﻦ اﳌﻌﺮوف أن اﲣﺎذ أي ﻗﺮار ﻻ ﻳﺘﻢ إﻻ ﻣﻦ ﺧﻼل اﺧﺘﺒﺎرات اﻟﻔﺮوض اﻹﺣﺼﺎﺋﻴﺔ اﻟﱵ ﺗﻌﺘﻤﺪ ﺑﺪورﻫﺎ ﻛﻤﺎ ﺳﺒﻖ ﻋﻠﻰ اﻻﺣﺘﻤﺎﻻت وﺗﻮزﻳﻌﺎت‬
‫اﻟﻌﻴﻨﺔ‪ ،‬وﻫﺬا ﻳﺆﻛﺪ أﳘﻴﺔ اﻟﺪور اﻟﺬى ﺗﻠﻌﺒﻪ ﻧﻈﺮﻳﻪ اﻻﺣﺘﻤﺎﻻت ﰲ اﻟﺘﻨﺒﺆ واﻟﺘﺨﻄﻴﻂ واﲣﺎذ اﻟﻘﺮارات‪ ،‬إﺿﺎﻓﺔ إﱃ أﳘﻴﺘﻬﺎ ﰲ ﺗﻘﺪﻳﺮ ﻋﻴﻨﺔ ﻤﻟﺘﻤﻊ‬
‫ﻤﻟﻬﻮﻟﺔ واﻟﱵ ﺗﻌﺘﱪ أﺣﺪ اﻫﺘﻤﺎﻣﺎت اﻟﺒﺎﺣﺜﲔ‪.‬‬

‫واﻟﻔﺮض‪ :‬ﻣﺎ ﻫﻮ إﻻ ﲣﻤﲔ أو ادﻋﺎء )ﻗﺪ ﻳﻜﻮن ﺻﺎﺋﺒﺎً أو ﺧﺎﻃﺌﺎً( أو اﺳﺘﻨﺘﺎج ذﻛﻲ ﻣﺒﲏ ﻋﻠﻰ ﺣﻴﺜﻴﺎت ﻣﻌﻘﻮﻟﺔ أو ﻣﻨﻄﻘﻴﺔ‪ ،‬وﻟﻜﻨﻪ ﻟﻴﺲ ﻣﺒﻨﻴﺎً‬
‫ﻋﻠﻰ ﺣﺴﺎﺑﺎت دﻗﻴﻘﺔ ﺧﺎﺻﺔ ﺑﻌﻴﻨﺔ ﻤﻟﺘﻤﻊ‪ ،‬ﻷﻧﻨﺎ ﻧﻔﱰض أﻧﻪ ﻻ ﳝﻜﻦ دراﺳﺔ ﻤﻟﺘﻤﻊ ﺑﺎﻟﻜﺎﻣﻞ ﻋﻦ ﻃﺮﻳﻖ اﳊﺼﺮ اﻟﺸﺎﻣﻞ‪ ،‬وإﳕﺎ ﳓﺎول‬
‫اﻻﺳﺘﻨﺘﺎج أو اﻻﺳﺘﺪﻻل ﻋﻠﻰ ﻣﻘﺎﻳﻴﺲ ﻤﻟﺘﻤﻊ ﺑﺎﺳﺘﺨﺪام ﺑﻴﺎﻧﺎت وﻧﺘﺎﺋﺞ اﻟﻌﻴﻨﺔ‪ ،‬واﳌﻄﻠﻮب ﻫﻮ اﺧﺘﻴﺎر ﻣﺪى ﺻﺤﺔ ﻫﺬﻩ اﻟﻔﺮوض؛ ﺣﻴﺚ ﺗﺒﺪأ‬
‫ﻣﺸﻜﻠﺔ اﻟﺘﻌﺮف ﻋﻠﻰ ﻣﻌﻠﻤﺔ ﻤﻟﺘﻤﻊ ﻤﻟﻬﻮﻟﺔ ﲟﺎ ﻳﺴﻤﻰ ﺑﺎﻻﺳﺘﺪﻻل اﻹﺣﺼﺎﺋﻲ )‪ (Statistical Inferences‬واﻟﺬي ﻳﻨﻘﺴﻢ اﱃ ﻓﺮﻋﲔ‪:‬‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪240‬‬
‫‪25‬‬ ‫اﻟﻔﺼﻞ اﳋﺎﻣﺲ | ‪Chapter 5‬‬

‫اﻟﻔﺮع اﻷول ﻳﻬﺘﻢ ﺑﺘﻘﺪﻳﺮ )‪ (Estimation‬ﻋﻴﻨﺔ ﻤﻟﺘﻤﻊ اﻹﺣﺼﺎﺋﻲ‪ ،‬واﻟﻔﺮع اﻟﺜﺎﱐ ﳜﺘﺺ ﺑﺈﺟﺮاء اﺧﺘﺒﺎرات ﻓﺮﺿﻴﺔ ) ‪Testing‬‬

‫‪ (Hypothesis‬ﺗﺪور ﺣﻮل ﻋﻴﻨﺔ ﻤﻟﺘﻤﻊ ﻤﻟﻬﻮﻟﺔ‪.‬‬

‫‪ 2-2-5‬أﻧﻮاع اﻟﻔﺮض )‪:(The Hypothesis Types‬‬

‫ﻳﻌﺮف اﻟﻔﺮض ﻋﻠﻰ أﻧﻪ ادﻋﺎء ﺣﻮل ﺻﺤﺔ ﺷﻲء ﻣﺎ‪ ،‬وﻳﻨﻘﺴﻢ إﱃ‪ :‬ﻓﺮض ﺻﻔﺮي ‪ ،H0‬وﻓﺮض ﺑﺪﻳﻞ ‪.H1‬‬

‫‪ 1-2-2-5‬اﻟﻔﺮض اﻟﺼﻔﺮي ‪:(The Null-Hypothesis) H0‬‬

‫ﻫﻮ اﻟﻔﺮض اﻷﺳﺎﺳﻲ اﳌﺮاد اﺧﺘﺒﺎرﻩ ﺣﻮل ﻋﻴﻨﺔ ﻤﻟﺘﻤﻊ اﻟﱵ ﳚﺮى ﻋﻠﻴﻬﺎ اﻻﺧﺘﺒﺎر‪ ،‬وﻳﺸﲑ إﱃ وﺟﻮد ﻓﺮوق ﺑﲔ ﻋﻴﻨﺎت ﻤﻟﺘﻤﻊ اﻹﺣﺼﺎﺋﻲ‪ ،‬وﻫﻮ‬
‫اﻟﻔﺮﺿﻴﺔ اﻟﱵ ﻧﻨﻄﻠﻖ ﻣﻨﻬﺎ وﻧﺮﻓﻀﻬﺎ ﻋﻨﺪﻣﺎ ﺗﺘﻮﻓﺮ اﻟﺪﻻﺋﻞ ﻋﻠﻰ ﻋﺪم ﺻﺤﺘﻬﺎ‪ ،‬وﺧﻼف ذﻟﻚ ﻧﻘﺒﻠﻬﺎ‪ ،‬وﺗﻌﲏ ﻛﻠﻤﺔ ‪ Null‬أﻧﻪ ﻻ ﻳﻮﺟﺪ ﻓﺮق ﺑﲔ‬
‫ﻋﻴﻨﺔ ﻤﻟﺘﻤﻊ واﻟﻘﻴﻤﺔ اﻹﺣﺼﺎﺋﻴﺔ ﻟﻠﻌﻴﻨﺔ ‪. Ho : μ = Means‬‬

‫‪ 2-2-2-5‬اﻟﻔﺮض اﻟﺒﺪﻳﻞ ‪:(The Alternative Hypothesis) H1‬‬

‫ﻫﻮ اﻟﻔﺮض اﻟﺬي ﻳﻀﻌﻪ اﻟﺒﺎﺣﺚ ﻛﺒﺪﻳﻞ ﻋﻦ اﻟﻔﺮض اﻟﺼﻔﺮي اﳌﺮاد اﺧﺘﺒﺎرﻩ‪ ،‬ﻫﺬا اﻟﻔﺮض ﻫﻮ اﻟﺬي ﺳﻴﻘﺒﻞ ﰲ ﺣﺎﻟﺔ رﻓﺾ اﻟﻔﺮض اﻟﺼﻔﺮي‬
‫ﺑﻨﺎء ﻋﻠﻰ اﳌﻌﻠﻮﻣﺎت اﳌﺄﺧﻮذة ﻣﻦ اﻟﻌﻴﻨﺔ اﳌﺨﺘﱪة ‪. H1 : μ ≠ Means‬‬

‫‪ 3-2-5‬أﻧﻮاع اﻻﺧﺘﺒﺎرات اﻹﺣﺼﺎﺋﻴﺔ ﻟﻠﻔﺮض )‪:(The Hypothesis Statistical Tests Types‬‬

‫ﺗﺼﻨﻒ اﺧﺘﺒﺎرات اﻟﻔﺮﺿﻴﺔ )‪ (Hypothesis Tests‬ﰲ ﻋﻠﻢ اﻹﺣﺼﺎء ﰲ ﻓﺌﺘﲔ‪:‬‬

‫‪ ‬اﻻﺧﺘﺒﺎرات اﻟﺒﺎراﻣﱰﻳﺔ )‪ :(Parametric‬ﻛﺎﻻﺧﺘﺒﺎر ”‪ “t-test‬واﻻﺧﺘﺒﺎر ”‪.“z-test‬‬

‫‪ ‬اﻻﺧﺘﺒﺎرات اﻟﻼﺑﺎراﻣﱰﻳﺔ )‪ :(non-Parametric‬ﻛﺎﻻﺧﺘﺒﺎر ”‪.“Mann-Whitney U‬‬

‫اﻻﺧﺘﺒﺎرات اﻟﺒﺎراﻣﱰﻳﺔ ﺗﺘﻄﻠﺐ اﻓﱰاض ﺻﺤﺔ اﻟﺒﻴﺎﻧﺎت اﻟﱵ ﻳﺘﻢ اﺧﺘﺒﺎرﻫﺎ‪ ،‬وﲢﺪﻳﺪاً‪ ،‬ﺗﻔﱰض ﻫﺬﻩ اﻻﺧﺘﺒﺎرات أن اﻟﺒﻴﺎﻧﺎت ﻣﻮزﻋﺔ ﻃﺒﻴﻌﻴﺎً‬
‫)‪.[745](Normally Distributed‬‬

‫ﻣﻦ ﺟﺎﻧﺐ آﺧﺮ ﻓﺈن اﻻﺧﺘﺒﺎرات اﻟﻼﺑﺎراﻣﱰﻳﺔ ﻻ ﺗﺘﻄﻠﺐ اﻓﱰاض ﺻﺤﺔ اﻟﺒﻴﺎﻧﺎت اﻟﱵ ﻳﺘﻢ اﺧﺘﺒﺎرﻫﺎ‪ ،‬وﻻ ﺣﱴ اﻟﺘﻮزﻳﻊ اﻟﻄﺒﻴﻌﻲ ﻟﻠﺒﻴﺎﻧﺎت‪ ،‬وﳍﺬا‬
‫اﻟﺴﺒﺐ ﺗﻌﺘﱪ اﻻﺧﺘﺒﺎرات اﻟﻼﺑﺎراﻣﱰﻳﺔ أﻛﺜﺮ ﻣﻼﺋﻤﺔ ﻋﻨﺪﻣﺎ ﻻ ﺗﺘﻮﻓﺮ اﳌﻌﻠﻮﻣﺎت ﻋﻦ ﺗﻮزع اﻟﺒﻴﺎﻧﺎت أو ﻋﻨﺪﻣﺎ ﻻ ﺗﻜﻮن اﳌﻌﻠﻮﻣﺎت ﻣﻮزﻋﺔ‬
‫ﻃﺒﻴﻌﻴﺎً]‪ ،[745‬وﻳﻨﺼﺢ ﺑﺎﺳﺘﺨﺪام اﻻﺧﺘﺒﺎرات اﻟﻼﺑﺎراﻣﱰﻳﺔ ﻛﺒﺪﻳﻞ ﻋﻦ اﻻﺧﺘﺒﺎرات اﻟﺒﺎراﻣﱰﻳﺔ ﰲ ﺣﺎل ﻛﻮن ﻋﺪد اﻟﻌﻴﻨﺎت ﺻﻐﲑاً]‪.[747‬‬

‫ﻳﺘﻢ ﻋﺎدةً رﻓﺾ اﻟﻔﺮض اﻟﺼﻔﺮي إذا ﻛﺎﻧﺖ ﻧﺘﻴﺠﺔ اﻻﺧﺘﺒﺎر اﻹﺣﺼﺎﺋﻲ ﺗﺘﻤﺜﻞ ﺑﻮﺟﻮد اﺣﺘﻤﺎل ”‪ “95%‬أو أﻛﺜﺮ ﻋﻠﻰ أن اﻻﺧﺘﻼف ﻟﻴﺲ‬
‫ﻧﺎﲡﺎً ﻋﻦ ﺻﺪﻓﺔ ﻋﺸﻮاﺋﻴﺔ‪ ،‬وﻫﺬا ﻣﺎ ﻳﻌﱪ ﻋﻨﻪ ﺑﻘﻴﻤﺔ دﻻﻟﻴﺔ )‪ (=95%) “0.05” (Significance Value‬أو أﻗﻞ )‪ (>95%‬وﺗﻌﺮف ﻋﺎدة‬
‫ﺿﻤﻦ اﻟﺪراﺳﺎت اﻟﺒﺤﺜﻴﺔ ﺑ ـ ـ”‪.“p-value‬‬

‫ﻟﻘﺪ ﰎ اﻗﱰاح اﻟﻘﻴﻤﺔ ‪ 0.05‬ﺑﺸﻜﻞ اﻋﺘﺒﺎﻃﻲ‪ ،‬إﻻ أ�ﺎ ﺗﻌﺘﱪ ﻣﻦ اﳌﺴﻠﻤﺎت ﻌﻴﺎرﻳﺔ ﰲ اﺠﻤﻟﺘﻤﻌﺎت اﻹﺣﺼﺎﺋﻴﺔ‪ ،‬ﻟﻘﺪ ﻗﺎﻣﺖ دراﺳﺔ ﺗﺎرﳜﻴﺔ ﺣﻮل‬
‫ﻫﺬﻩ اﳌﺴﺄﻟﺔ ﳝﻜﻦ اﻻﻃﻼع ﻋﻠﻴﻬﺎ ﰲ اﻟﻮرﻗﺔ اﻟﺒﺤﺜﻴﺔ]‪.[748‬‬

‫‪241‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Toward a Constructivist Laboratory Education Model‬‬ ‫ﳓﻮ ﳕﻮذج ﺑﻨﺎﺋﻲ ﻟﻠﺘﻌﻠﻴﻢ اﳌﺨﱪي |‬

‫وﺑﺎﻟﺘﺎﱄ ﻓﺈﻧﻪ إذا ﻛﺎﻧﺖ ﻧﺘﻴﺠﺔ اﻻﺧﺘﺒﺎر اﻹﺣﺼﺎﺋﻲ )‪ (p-value‬أﺧﻔﺾ )ﻣﺜﻼً‪ ،(p=0.02 :‬ﻓﺈن ﻫﺬا ﺳﻴﺴﻔﺮ ﻋﻦ درﺟﺔ ﺛﻘﺔ أﻛﱪ ﺑﻜﺜﲑ ﰲ‬
‫ﻗﺒﻮل أو رﻓﺾ ﻧﺘﺎﺋﺞ اﺧﺘﺒﺎرات اﻟﻔﺮض اﻟﺼﻔﺮي‪.‬‬

‫إن ﻣﺜﻞ ﻫﺬﻩ اﻟﻘﻴﻤﺔ اﳌﻨﺨﻔﻀﺔ ﻟ ـ‪ p-value‬ﺗﻘﻠﻞ ﻣﺎ ﻳﺪﻋﻰ ﺑـ”‪) “Type-I Error‬ﻳﺮﻣﺰ ﻟﻪ ﺑﺎﻟﺮﻣﺰ ‪ ،(α‬ﺣﻴﺚ ﻳﺘﻢ رﻓﺾ اﻟﻔﺮض اﻟﺼﻔﺮي ﰲ‬
‫ﺣﲔ أﻧﻪ ﰲ اﳊﻘﻴﻘﺔ ﺻﺤﻴﺢ – أي أﻧﻪ ﻋﻠﻰ اﻟﺮﻏﻢ ﻣﻦ أن اﻟﻔﺮض اﻟﺼﻔﺮي ﰲ اﻟﻮاﻗﻊ ﺻﺤﻴﺢ وﻛﺎن ﻣﻦ اﻟﻮاﺟﺐ ﻗﺒﻮﻟﻪ ﻓﻘﺪ ﰎ أﺧﺬ ﻗﺮار‬
‫ﺧﺎﻃﺊ ﺑﺮﻓﻀﻪ‪.‬‬

‫ﻣﻦ ﺟﺎﻧﺐ آﺧﺮ ﻓﺈن اﻟﻘﻴﻤﺔ اﳌﻨﺨﻔﻀﺔ ﻟ ـ‪ p-value‬ﳝﻜﻦ أن ﺗﺆدي أﻳﻀﺎً إﱃ ﻣﺎ ﻳﺪﻋﻰ ﺑـ”‪) “Type-II Error‬ﻳﺮﻣﺰ ﻟﻪ ﺑﺎﻟﺮﻣﺰ ‪1- = β‬‬

‫‪ ،(α‬ﺣﻴﺚ ﻳﺘﻢ ﻗﺒﻮل اﻟﻔﺮض اﻟﺼﻔﺮي ﻣﻊ أﻧﻪ ﰲ اﳊﻘﻴﻘﺔ ﺧﺎﻃﺊ – أي أﻧﻪ ﻋﻠﻰ اﻟﺮﻏﻢ ﻣﻦ أن اﻟﻔﺮض اﻟﺼﻔﺮي ﺧﺎﻃﺊ وﻛﺎن ﻣﻦ اﻟﻮاﺟﺐ‬
‫رﻓﻀﻪ ﻓﻘﺪ ﰎ أﺧﺬ ﻗﺮار ﺧﺎﻃﺊ ﺑﻘﺒﻮﻟﻪ‪.‬‬

‫ﻟﺬﻟﻚ ﻓﺈﻧﻪ ﻣﻦ اﳌﻔﻀﻞ اﻋﺘﺒﺎر ﻗﻴﻤﺔ اﻟﻌﺘﺒﺔ ‪ p-value=0.10‬ﻋﻨﺪﻣﺎ ﻳﻜﻮن ﻋﺪد اﻟﻌﻴﻨﺎت ﺻﻐﲑاً )‪ ،(N=15‬وذﻟﻚ ﻟﺘﻔﺎدي اﻟﻮﻗﻮع ﰲ أﺧﻄﺎء‬
‫ﻣﻦ اﻟﻨﻮع ”‪ .[745]“Type-II Error‬اﻟﺸﻜﻞ‪ 3-5‬ﻳﺒﲔ اﳊﺎﻻت اﻟﱵ ﺗﻘﻊ ﻓﻴﻬﺎ اﻷﺧﻄﺎء ﻣﻦ اﻟﻨﻮﻋﲔ‪.‬‬

‫اﻟﺸﻜﻞ‪Type II Error 2-5‬‬ ‫اﻟﺸﻜﻞ‪Type I Error 1-5‬‬

‫إن ﻋﺪد اﻟﻌﻴﻨﺎت ﰲ دراﺳﺘﻨﺎ ﻫﺬﻩ ﻛﺒﲑ ﻧﺴﺒﻴﺎً )‪ ،(N>30‬ﻟﺬﻟﻚ اﻋﺘﻤﺪﻧﺎ ﻗﻴﻤﺔ اﻟﻌﺘﺒﺔ اﻻﻓﱰاﺿﻴﺔ )‪.(p-value=0.05‬‬

‫‪ 4-2-5‬ﻣﺴﺘﻮى اﻷﳘﻴﺔ )‪:(Level of Significance‬‬

‫ﻳﻄﻠﻖ ﻋﻠﻴﻪ أﺣﻴﺎﻧﺎً ﻣﺴﺘﻮى اﻟﺪﻻﻟﺔ أو ﻣﺴﺘﻮى اﳌﻌﻨﻮﻳﺔ وﻳﻌﺘﱪ أﺣﺪ أﻫﻢ اﳌﺼﻄﻠﺤﺎت اﳌﺴﺘﺨﺪﻣﺔ ﰲ دراﺳﺔ ﻧﻈﺮﻳﺔ اﺧﺘﺒﺎرات اﻟﻔﺮوض‪،‬‬
‫واﳌﻘﺼﻮد ﲟﺴﺘﻮى اﻷﳘﻴﺔ ﻫﻮ اﺣﺘﻤﺎل ﺣﺪوث اﳋﻄﺄ ﻣﻦ اﻟﻨﻮع اﻷول )‪ ،(Type-I Error‬أو ﻧﺴﺒﺔ ﺣﺪوﺛﻪ‪ ،‬أي اﺣﺘﻤﺎل رﻓﺾ اﻟﻔﺮض‬
‫اﻟﺼﻔﺮي ﺑﻴﻨﻤﺎ ﻫﻮ ﺻﺤﻴﺢ؛ ﻋﺎدة ﻳﺮﻣﺰ إﱃ ﻣﺴﺘﻮى اﻷﳘﻴﺔ ﺑﺎﻟﺮﻣﺰ ”‪ “α‬وأﺷﻬﺮ ﻗﻴﻤﺘﲔ ﳌﺴﺘﻮى اﻷﳘﻴﺔ ﳘﺎ ‪ ،1% | 5%‬وﻟﻜﻦ ﻟﻴﺲ ﻫﻨﺎك ﻣﺎ‬
‫ﳝﻨﻊ ﻣﻦ أن ﻳﺘﻢ أﺧﺬ ﻗﻴﻢ أﺧﺮى‪.‬‬

‫إن ﻣﺴﺘﻮى اﻷﳘﻴﺔ ﻣﻜﻤﻞ ﻟﺪرﺟﺔ اﻟﺜﻘﺔ‪ ،‬ﲟﻌﲎ أن ﳎﻤﻮﻋﻬﻤﺎ ﻳﺴﺎوي ‪ 100%‬أو واﺣﺪ؛ ﻓﺈذا ﻛﺎﻧﺖ درﺟﺔ اﻟﺜﻘﺔ ‪ ،(0.95) 95%‬ﻓﺈن ﻣﺴﺘﻮى‬
‫اﻷﳘﻴﺔ ﻳﺴﺎوي ‪ ،(0.05) 5%‬واﻟﻌﻜﺲ ﺻﺤﻴﺢ‪ ،‬وﻟﻌﻞ ﻣﻦ أﻫﻢ اﳌﻼﺣﻈﺎت ﻫﻨﺎ ﻫﻮ اﺳﺘﺨﺪام ﺗﻌﺒﲑ "ﻣﺴﺘﻮى اﻷﳘﻴﺔ" ﰲ ﺣﺎﻻت اﺧﺘﺒﺎرات‬
‫اﻟﻔﺮوض‪ ،‬ﺑﻴﻨﻤﺎ ﻳﺴﺘﺨﺪم ﻣﺼﻄﻠﺢ "درﺟﺔ أو ﻣﺴﺘﻮى اﻟﺜﻘﺔ" ﰲ ﺣﺎﻻت اﻟﺘﻘﺪﻳﺮ‪.‬‬

‫اﻟﻔﻜﺮة اﻷﺳﺎﺳﻴﺔ ﰲ اﺧﺘﺒﺎر اﻟﻔﺮوض ﻫﻲ ﺗﻘﺴﻴﻢ اﳌﺴﺎﺣﺔ ﲢﺖ اﳌﻨﺤﲎ إﱃ ﻣﻨﻄﻘﺘﲔ‪ :‬إﺣﺪاﳘﺎ ﺗﺴﻤﻰ "ﻣﻨﻄﻘﺔ اﻟﻘﺒﻮل" ‪ -‬أي ﻣﻨﻄﻘﺔ ﻗﺒﻮل‬
‫اﻟﻔﺮض اﻟﺼﻔﺮي‪ ،‬واﻷﺧﺮى ﺗﺴﻤﻰ "ﻣﻨﻄﻘﺔ اﻟﺮﻓﺾ" ‪ -‬أي ﻣﻨﻄﻘﺔ رﻓﺾ اﻟﻔﺮض اﻟﺼﻔﺮي‪ ،‬ﻛﻤﺎ ﺗﺴﻤﻰ أﺣﻴﺎﻧﺎً ﺑﺎﳌﻨﻄﻘﺔ اﳊﺮﺟﺔ ) ‪Critical‬‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪242‬‬
‫‪25‬‬ ‫اﻟﻔﺼﻞ اﳋﺎﻣﺲ | ‪Chapter 5‬‬

‫‪ - (Region‬واﻟﻨﻘﻄﺔ اﳉﺪﻳﺮة ﺑﺎﳌﻼﺣﻈﺔ ﻫﻨﺎ ﻫﻲ أن ﻣﻨﻄﻘﺔ اﻟﻘﺒﻮل ﲤﺜﻞ درﺟﺔ اﻟﺜﻘﺔ‪ ،‬ﺑﻴﻨﻤﺎ ﲤﺜﻞ ﻣﻨﻄﻘﺔ اﻟﺮﻓﺾ ﻣﺴﺘﻮى اﻷﳘﻴﺔ‪ ،‬وﺗﻜﻮن‬
‫ﻣﻨﻄﻘﺔ اﻟﺮﻓﺾ ﻣﻮزﻋﺔ ﻋﻠﻰ ﻃﺮﰲ اﳌﻨﺤﲎ ﺑﺎﻟﺘﺴﺎوي ﻛﻤﺎ ﻫﻮ ﻣﺒﲔ ﻋﻠﻰ اﻟﺸﻜﻞ‪.4-5‬‬

‫اﻟﺸﻜﻞ‪ 3-5‬اﻟﻌﻼﻗﺔ ﺑﲔ اﻟﻔﺮﺿﻴﺔ اﻟﺼﻔﺮﻳﺔ واﻟﺒﺪﻳﻠﺔ واﻷﺧﻄﺎء ﻣﻦ اﻟﻨﻮع اﻷول )‪ (Type-I Error‬واﻟﺜﺎﱐ )‪(Type-II Error‬‬

‫اﻟﺸﻜﻞ‪ 4-5‬ﺗﻮزع ﻣﻨﻄﻘﱵ اﻟﺮﻓﺾ واﻟﻘﺒﻮل ﻋﻠﻰ ﻃﺮﰲ ﻣﻨﺤﲏ اﻟﺘﻮزﻳﻊ اﻹﺣﺼﺎﺋﻲ اﻟﻄﺒﻴﻌﻲ‬

‫ﲤﺜﻞ اﳌﻨﻄﻘﺔ اﻟﺒﻴﻀﺎء ﻏﲑ اﳌﻈﻠﻠﺔ ﻣﻨﻄﻘﺔ اﻟﻘﺒﻮل واﻟﱵ ﻗﺪ ﺗﺴﺎوي ‪ 95%‬وﺑﺎﻟﺘﺎﱄ ﻓﻤﻨﻄﻘﺔ اﻟﺮﻓﺾ ﻣﻘﺴﻤﺔ ﺑﺎﻟﺘﺴﺎوي ﻋﻠﻰ ﻃﺮﰲ اﳌﻨﺤﲎ ﰲ ﻫﺬﻩ‬
‫اﳊﺎﻟﺔ ﺗﻜﻮن ﻗﻴﻤﺔ ﻛﻞ ﻣﻨﻬﻤﺎ ‪ .2.5 %‬اﻟﻨﺘﻴﺠﺔ ﻫﻮ أن اﻟﻘﺮار أﻳﺎ ﻛﺎن ﻧﻮﻋﻪ ﺳﻴﻜﻮن ﲟﺴﺘﻮى ﻣﻌﻨﻮﻳﺔ ‪ 5%‬ﲟﻌﲎ أن اﺣﺘﻤﺎل أو ﻧﺴﺒﺔ اﳋﻄﺄ ﻓﻴﻪ‬
‫ﻣﻦ اﻟﻨﻮع اﻷول ﺗﺴﺎوي ‪.5%‬‬

‫‪ 5-2-5‬اﺧﺘﺒﺎر )‪:(The Mann-Whitney U Test & Wilcoxon Test‬‬

‫ﻳﻌﺘﱪ اﻻﺧﺘﺒﺎر ‪ Mann-Whitney U‬ﻣﻦ اﻻﺧﺘﺒﺎرات اﻟﻼﺑﺎراﻣﱰﻳﺔ اﻟﱵ ﳝﻜﻦ أن ﺗﺴﺘﺨﺪم ﻟﺘﺤﺪﻳﺪ ﻓﻴﻤﺎ إذا ﻛﺎﻧﺖ ﳎﻤﻮﻋﺘﲔ ﻣﺴﺘﻘﻠﺘﲔ‬
‫ﻣﻦ ﻋﻴﻨﺎت اﻟﺒﻴﺎﻧﺎت ﳐﺘﻠﻔﺔ ﻋﻦ ﺑﻌﻀﻬﺎ أم ﻻ‪ ،‬ﻓﻌﻠﻰ ﺳﺒﻴﻞ اﳌﺜﺎل ﳝﻜﻦ أن ﻳﺴﺘﺨﺪم ﻫﺬا اﻻﺧﺘﺒﺎر ﻹﳚﺎد اﻟﺪﻻﻟﺔ اﻹﺣﺼﺎﺋﻴﺔ ) ‪Statistical‬‬

‫‪ (Significance‬ﻟﻼﺧﺘﻼف ﺑﲔ أﺟﻮﺑﺔ ﳎﻤﻮﻋﺘﲔ ﻋﻦ ﺳﺆال ﻣﺎ‪.‬‬

‫‪243‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Toward a Constructivist Laboratory Education Model‬‬ ‫ﳓﻮ ﳕﻮذج ﺑﻨﺎﺋﻲ ﻟﻠﺘﻌﻠﻴﻢ اﳌﺨﱪي |‬

‫ﻳﻌﺘﱪ اﻻﺧﺘﺒﺎر ‪ Wilcoxon‬ﻣﻦ اﻻﺧﺘﺒﺎرات اﻟﻼﺑﺎراﻣﱰﻳﺔ أﻳﻀﺎً وﻳﺸﺎﺑﻪ اﻻﺧﺘﺒﺎر ‪ ،Mann-Whitney U‬إﻻ أﻧﻪ ﻳﻄﺒﻖ ﻋﻠﻰ اﻟﺒﻴﺎﻧﺎت اﻟﱵ‬
‫ﻳﺘﻢ اﳊﺼﻮل ﻋﻠﻴﻬﺎ ﻣﻦ ﳎﻤﻮﻋﺔ واﺣﺪة‪ ،‬ﻓﻌﻠﻰ ﺳﺒﻴﻞ اﳌﺜﺎل ﳝﻜﻦ اﺳﺘﺨﺪام اﺧﺘﺒﺎر ‪ Wilcoxon‬ﻹﳚﺎد اﻟﺪﻻﻟﺔ اﻹﺣﺼﺎﺋﻴﺔ ) ‪Statistical‬‬

‫‪ (Significance‬ﻟﻼﺧﺘﻼف ﺑﲔ أﺟﻮﺑﺔ ﳎﻤﻮﻋﺔ وﺣﻴﺪة ﻋﻠﻰ ﻋﺪة أﺳﺌﻠﺔ ﳐﺘﻠﻔﺔ‪.‬‬

‫ﳝﻜﻦ اﻻﻃﻼع ﻋﻠﻰ ﻣﻨﻬﺠﻴﺔ ﺣﺴﺎب وﺗﻄﺒﻴﻖ اﻻﺧﺘﺒﺎرات اﻟﻼﺑﺎراﻣﱰﻳﺔ ‪ Mann-Whitney U; Wilcoxon‬ﰲ ﻛﺘﺐ اﻹﺣﺼﺎء‬
‫اﻟﻜﻼﺳﻴﻜﻴﺔ]‪[747‬؛ إن اﻹﺟﺮاءات اﻟﻌﺪدﻳﺔ ﰲ ﺗﻨﻔﻴﺬ اﻻﺧﺘﺒﺎرات اﻹﺣﺼﺎﺋﻴﺔ ﳝﻜﻦ أن ﺗﻜﻮن ﻣﺮﻫﻘﺔ وﺗﺴﺘﻐﺮق وﻗﺘﺎً ﻃﻮﻳﻼً‪ ،‬وﻟﻜﻦ اﻟﱪاﻣﺞ‬
‫اﻹﺣﺼﺎﺋﻴﺔ ﻣﺜﻞ اﻟﱪﻧﺎﻣﺞ ‪ SPSS‬ﲢﺘﻮي ﺧﻮارزﻣﻴﺎت ﻣﺒﻨﻴﺔ ﻣﺴﺒﻘﺎً ﻟﺘﺴﻬﻴﻞ ﻣﺜﻞ ﻫﺬﻩ اﳊﺴﺎﺑﺎت]‪.[745‬‬

‫‪ 6-2-5‬ﻣﻘﺎرﻧﺔ اﳌﺘﻮﺳﻄﺎت )‪:(Comparing Means‬‬

‫ﺗﻌﺘﱪ ﻣﻘﺎرﻧﺔ اﳌﺘﻮﺳﻄﺎت اﳊﺴﺎﺑﻴﺔ ﻟﻠﻤﺘﻐﲑات إﺣﺪى اﻟﻄﺮق اﻟﺒﺎراﻣﱰﻳﺔ‪ ،‬وﺗﺴﺘﺨﺪم اﺧﺘﺒﺎرات ﻣﻘﺎرﻧﺔ اﳌﺘﻮﺳﻄﺎت ﻋﻨﺪﻣﺎ ﻳﺮﻳﺪ اﻟﺒﺎﺣﺚ أن ﻳﻄﺒﻖ‬
‫ﲝﺜﻪ ﻋﻠﻰ أﻛﺜﺮ ﻣﻦ ﺣﺎﻟﺔ‪ ،‬وﻟﻜﻲ ﻧﻘﻮل أن ﻫﻨﺎك ﻓﺮق ﰲ ﻣﺘﻐﲑ ﻣﺎ ﻓﻼ ﻳﻜﻔﻲ أن ﻧﺄﺧﺬ ﻧﺘﻴﺠﺔ ﺣﺎﻟﺔ واﺣﺪة ﺑﻞ ﻻﺑﺪ ﻣﻦ أﺧﺬ ﻧﺘﺎﺋﺞ ﲨﻴﻊ‬
‫اﳊﺎﻻت‪ ،‬وﻣﻦ ﰒ ﻧﺄﺧﺬ اﳌﺘﻮﺳﻂ اﳊﺴﺎﰊ ﻟﻜﻞ ﺣﺎﻟﺔ وﻧﻘﺎرن ﺑﻴﻨﻬﺎ‪.‬‬

‫إن ﻣﻘﺎرﻧﺔ اﳌﺘﻮﺳﻂ اﳊﺴﺎﰊ ﻟﻌﻴﻨﺘﲔ ﻣﺴﺘﻘﻠﺘﲔ ﻳﺒﺪأ ﺑﺎﻓﱰاض ﻣﻔﺎدﻩ أﻧﻪ ﻻ ﺗﻮﺟﺪ ﻓﺮوﻗﺎت ذات دﻻﻟﺔ إﺣﺼﺎﺋﻴﺔ ﰲ اﻟﻨﺘﺎﺋﺞ‪ ،‬ﺣﻴﺚ أﻧﻪ ﰲ ﻋﻠﻮم‬
‫اﻹﺣﺼﺎء ﻣﻦ أﺟﻞ إﺛﺒﺎت ﻓﺮﺿﻴﺔ ﻣﺎ ﻋﻠﻰ أ�ﺎ ﺻﺤﻴﺤﺔ‪ ،‬ﻓﺈن اﻟﻄﺮﻳﻘﺔ اﻟﻮﺣﻴﺪة ﺗﻜﻮن ﺑﺮﻓﺾ ﻧﻘﻴﻀﻬﺎ – أي رﻓﺾ أ�ﺎ ﻏﲑ ﺻﺤﻴﺤﺔ‪ ،‬وﻣﻦ‬
‫اﳌﺘﻔﻖ ﻋﻠﻴﻪ ﻋﻤﻮﻣﺎً أوﺳﺎط اﺠﻤﻟﺘﻤﻌﺎت اﻹﺣﺼﺎﺋﻴﺔ أﻧﻪ ﻣﻦ اﳌﺴﺘﺤﻴﻞ إﺛﺒﺎت ﺷﻲء ﻣﺎ ﻋﻠﻰ أﻧﻪ ﺻﺤﻴﺢ‪ ،‬وﻟﻜﻦ ﻣﻦ اﳌﻤﻜﻦ إﺛﺒﺎت أن ﺷﻲء‬
‫ﻣﺎ ﻋﻠﻰ أﻧﻪ ﺧﺎﻃﺊ]‪[746‬؛ ﳍﺬا اﻟﺴﺒﺐ ﳒﺪ أن اﺧﺘﺒﺎر اﻟﻔﺮﺿﻴﺎت إﺣﺼﺎﺋﻴﺎً ﻳﺘﻢ إﳒﺎزﻩ ﻋﺎدة ﺑﺈﺛﺒﺎت ﺑﻄﻼن اﻟﻔﺮض اﻟﺼﻔﺮي ‪“Null-‬‬

‫”‪ hypothesis‬واﻟﺬي ﻫﻮ ﲤﺎﻣﺎً اﳌﻌﲎ اﳌﺨﺎﻟﻒ ﻟﻠﻔﺮﺿﻴﺔ اﳌﺮاد اﺧﺘﺒﺎرﻫﺎ‪.‬‬

‫ﻳﺪﻋﻰ ﻫﺬا اﳌﺒﺪأ ﲟﺒﺪأ اﻟﻔﺮض اﻟﺼﻔﺮي ’‪ ‘Null Hypothesis‬ﻷﻧﻪ ﻳﻨﺺ ﻋﺎدة ﻋﻠﻰ أﻧﻪ‪" :‬ﻻ ﻳﻮﺟﺪ ﻓﺮق إﺣﺼﺎﺋﻲ )ﺪوم( ﺑﲔ اﺠﻤﻟﻤﻮﻋﺔ‬
‫ﻘﻴﺎﺳﻴﺔ واﺠﻤﻟﻤﻮﻋﺔ اﻻﺧﺘﺒﺎرﻳﺔ‪"...‬؛ وﻋﻨﺪﻣﺎ ﻳﺘﻢ إﺛﺒﺎت أن اﻟﻔﺮض اﻟﺼﻔﺮي ﻏﲑ ﳏﻘﻖ – أي أن ﻋﻜﺲ اﻟﻔﺮض ﺧﺎﻃﺊ‪ ،‬ﺳﻴﺘﻢ ﻋﻨﺪﻫﺎ اﻟﻨﻈﺮ‬
‫إﱃ اﻟﻔﺮﺿﻴﺔ اﳌﺪروﺳﺔ ﻋﻠﻰ أ�ﺎ ﻓﺮﺿﻴﺔ ﺻﺤﻴﺤﺔ]‪.[747‬‬

‫ﻳﻮﺟﺪ اﻟﻌﺪﻳﺪ ﻣﻦ اﻟﻄﺮق اﻹﺣﺼﺎﺋﻴﺔ ﻻﺧﺘﺒﺎر ﲢﻘﻖ أو ﻋﺪم ﲢﻘﻖ اﻟﻔﺮض اﻟﺼﻔﺮي‪ ،‬ﻫﺬا اﻷﺳﻠﻮب ﻳﺮﺟﻊ ﺑﺸﻜﻞ أﺳﺎﺳﻲ إﱃ ﻋﻠﻢ اﻹﺣﺼﺎء‬
‫اﻻﺳﺘﻨﺘﺎﺟﻲ )‪.(Inferential Statistics‬‬

‫‪ 7-2-5‬ﺧﻄﻮات إﺟﺮاء اﻻﺧﺘﺒﺎر اﻹﺣﺼﺎﺋﻲ )‪:(Statistical Test Process‬‬

‫إن اﻻﺧﺘﺒﺎر اﻹﺣﺼﺎﺋﻲ ﻗﺪ ﻳﻜﻮن ﻣﺘﻌﻠﻘﺎ ﺑﻌﻴﻨﺔ واﺣﺪة أو ﻋﻴﻨﺘﲔ أو أﻛﺜﺮ‪ ،‬وﻗﺪ ﻳﻜﻮن اﺧﺘﺒﺎراً ﺑﺎراﻣﱰﻳﺎً أو ﻻﺑﺎراﻣﱰي‪ ،‬وﳚﺐ أن ﳝﺮ اﻻﺧﺘﺒﺎر‬
‫أﻳﺎً ﻛﺎن ﻧﻮﻋﻪ ﺑﻌﺪة ﺧﻄﻮات ﳝﻜﻦ ﺗﻠﺨﻴﺼﻬﺎ ﰲ اﳋﻄﻮات اﻟﺘﺎﻟﻴﺔ‪:‬‬

‫أوﻻً‪ :‬ﻳﺒﺪأ اﻻﺧﺘﺒﺎر ﺑﺘﻔﻬﻢ أﻫﺪاف اﻟﺒﺤﺚ ﰒ اﻋﺎدة ﺻﻴﺎﻏﺔ ﻫﺬﻩ اﻷﻫﺪاف ﰲ ﻓﺮﺿﲔ‪:‬‬

‫‪ .1‬وﺿﻊ اﻟﻔﺮض اﻟﺼﻔﺮي )‪ ،Ho (Null Hypothesis‬واﻟﺬي ﻳﺄﺧﺬ اﻟﺸﻜﻞ‪:‬‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪244‬‬
‫‪25‬‬ ‫اﻟﻔﺼﻞ اﳋﺎﻣﺲ | ‪Chapter 5‬‬

‫‪H 0 : µ1 = µ 2‬‬

‫‪ .2‬وﺿﻊ اﻟﻔﺮض اﻟﺒﺪﻳﻞ )‪ ،H1 (Alternative Hypothesis‬واﻟﺬي ﻳﺄﺧﺬ أﺣﺪ اﻷﺷﻜﺎل اﻟﺘﺎﻟﻴﺔ‪:‬‬

‫‪H1 : µ1 < µ 2‬‬ ‫‪H1 : µ1 > µ 2‬‬ ‫‪H1 : µ1 ≠ µ 2‬‬

‫اﻟﺬي ﳛﺪد ﺷﻜﻞ اﻟﻔﺮض اﻟﺒﺪﻳﻞ ﻫﻮ ﻣﺪى اﻗﺘﻨﺎع اﻟﺒﺎﺣﺚ ﺑﺬﻟﻚ أو ﻣﺪى ﺗﻮﻓﺮ اﳌﻌﻠﻮﻣﺎت اﻷوﻟﻴﺔ‪ ،‬ﻓﻤﺜﻼً إذا ﻛﺎﻧﺖ وﺟﻬﺔ ﻧﻈﺮ اﻟﺒﺎﺣﺚ أن‬
‫اﳌﺘﻮﺳﻂ اﳊﺴﺎﰊ ﻻ ﳝﻜﻦ أن ﻳﻘﻞ ﻛﺬا‪ ،‬ﻓﺈﻧﻪ ﳜﺘﺎر اﻟﻔﺮض اﻟﺒﺪﻳﻞ ”>“‪ ،‬واﻟﻌﻜﺲ ﺻﺤﻴﺢ‪ ،‬أﻣﺎ إذا ﱂ ﻳﻜﻦ ﻟﺪﻳﻪ أي ﺗﺼﻮر أو أي ﻣﻌﻠﻮﻣﺎت‬
‫ﻓﺈﻧﻪ ﳜﺘﺎر اﻟﻔﺮض اﻟﺒﺪﻳﻞ ”≠“‪.‬‬

‫ﺛﺎﻧﻴﺎً‪ :‬ﳛﺪد اﺣﺘﻤﺎل اﳋﻄﺄ وﳝﺜﻞ اﳋﻄﺄ ﻣﻦ اﻟﻨﻮع اﻷول )‪ (Type-I Error‬وﻳﺮﻣﺰ ﻟﻪ ﺑﺎﻟﺮﻣﺰ ‪ α‬وﻏﺎﻟﺒﺎً ‪.α = 5%‬‬

‫ﺛﺎﻟﺜﺎً‪ :‬ﲢﺪﻳﺪ إﺣﺼﺎﺋﻴﺔ اﻻﺧﺘﺒﺎر‪ :‬ﻲ اﻹﺣﺼﺎﺋﻴﺔ اﻟﱵ ﻳﺘﻢ ﺣﺴﺎﻬﺑﺎ ﻣﻦ ﺑﻴﺎﻧﺎت اﻟﻌﻴﻨﺔ ﺑﺎﻓﱰاض أن اﻟﻔﺮض اﻟﺼﻔﺮي ﺻﺤﻴﺢ‪ ،‬وﻳﺘﻮﻗﻒ ﺷﻜﻞ‬
‫اﻹﺣﺼﺎﺋﻴﺔ ﻋﻠﻰ اﻟﻌﻮاﻣﻞ اﻟﺘﺎﻟﻴﺔ‪:‬‬
‫زﻳﻊ اﺠﻤﻟﺘﻤﻊ‪ ،‬وﻫﻞ ﻫﻮ ﻃﺒﻴﻌﻲ أم ﻻ‪ ،‬وﻫﻞ ﺗﺒﺎﻳﻨﻪ ﻣﻌﺮوف أم ﻻ‪.‬‬ ‫‹‬
‫ﺣﺠﻢ اﻟﻌﻴﻨﺔ‪ ،‬وﻫﻞ ﻫﻮ ﻛﺒﲑ أم ﺻﻐﲑ‪.‬‬ ‫‹‬
‫اﻟﻔﺮض اﻟﺼﻔﺮي اﳌﺮاد اﺧﺘﺒﺎرﻩ‪ ،‬وﻫﻞ ﻫﻮ ﻋﻦ اﻟﻮﺳﻂ أو اﻟﻨﺴﺒﺔ أو اﻟﺘﺒﺎﻳﻦ أو اﻻرﺗﺒﺎط‪...‬اﱁ‪.‬‬ ‫‹‬

‫اﻟﻔﻜﺮة اﻷﺳﺎﺳﻴﺔ ﰲ إﺣﺼﺎﺋﻴﺔ اﻻﺧﺘﺒﺎر ﻫﻲ ﺣﺴﺎب اﻟﻔﺮق ﺑﲔ ﻗﻴﻤﺔ اﳌﻌﻠﻤﺔ اﻟﱵ ﻧﻔﱰﺿﻬﺎ ﻟﻠﻤﺠﺘﻤﻊ )ﰲ اﻟﻔﺮض اﻟﺼﻔﺮي( واﻟﻘﻴﻤﺔ اﳌﻘﺎﺑﻠﺔ ﳍﺎ‬
‫ﰲ اﻟﻌﻴﻨﺔ أي اﻟﺘﺎﺑﻊ اﻹﺣﺼﺎﺋﻲ‪ ،‬ﰒ ﻧﻘﺴﻢ ﻫﺬا اﻟﻔﺮق إﱃ اﳋﻄﺄ اﳌﻌﻴﺎري ﻟﻠﺘﺎﺑﻊ اﻹﺣﺼﺎﺋﻲ؛ ﻓﻤﺜﻼً‪ :‬إذا ﻛﺎن اﻻﺧﺘﺒﺎر ﻋﻦ اﻟﻮﺳﻂ اﳊﺴﺎﰊ ﻓﺈﻧﻪ‬
‫ﻳﺘﻢ ﺣﺴﺎب اﻟﻔﺮق ﺑﲔ ﻗﻴﻤﺔ اﻟﻮﺳﻂ اﳊﺴﺎﰊ ﻟﻠﻤﺠﺘﻤﻊ اﻟﱵ ﻧﻔﱰﺿﻬﺎ وﻗﻴﻤﺔ اﻟﻮﺳﻂ اﳊﺴﺎﰊ ﻟﻠﻌﻴﻨﺔ‪ ،‬ﰒ ﻧﻘﺴﻢ ﻫﺬا اﻟﻔﺮق ﻋﻠﻰ اﳋﻄﺄ اﳌﻌﻴﺎري‬
‫ﻟﻠﻮﺳﻂ‪ ،‬وﻫﻜﺬا ﻣﻊ ﺑﺎﻗﻲ اﻹﺣﺼﺎﺋﻴﺎت‪.‬‬

‫راﺑﻌﺎً‪ :‬ﺗﺴﺘﺨﺪم اﳌﻌﻠﻮﻣﺎت اﳌﺘﺎﺣﺔ ﻣﻦ اﻟﻌﻴﻨﺔ ﺠﻤﻟﺘﻤﻊ وﺗﻮزﻳﻊ اﳌﻌﺎﻳﻨﺔ ﻻﲣﺎذ ﻗﺮار ﻣﻌﲔ إﻣﺎ ﺑﻘﺒﻮل أو رﻓﺾ اﻟﻔﺮض اﻟﺼﻔﺮي ﻣﻦ ﺧﻼل ﲢﺪﻳﺪ‬
‫ﻣﻨﻄﻘﱵ اﻟﻘﺒﻮل واﻟﺮﻓﺾ‪ ،‬وذﻟﻚ ﺑﻨﺎءً ﻋﻠﻰ اﳉﺪاول اﻹﺣﺼﺎﺋﻴﺔ واﻟﱵ ﺗﻌﺘﻤﺪ ﻋﻠﻰ اﻟﺘﻮزﻳﻊ وﻧﻮﻋﻪ وﻋﻠﻰ اﻟﻔﺮض اﻟﺒﺪﻳﻞ وﻋﻠﻰ ﻣﺴﺘﻮى اﻷﳘﻴﺔ‪،‬‬
‫وﻻﲣﺎذ ﻗﺮار ﰲ اﻻﺧﺘﺒﺎرات اﻹﺣﺼﺎﺋﻴﺔ ﻳﺘﻢ ﺣﺴﺎب اﻟﻘﻴﻤﺔ اﻻﺣﺘﻤﺎﻟﻴﺔ )‪ ،(P-value‬ﻓﺈذا ﻛﺎن اﻻﺧﺘﺒﺎر ذو ﻃﺮف واﺣﺪ‪ ،‬ﺗﻘﺎرن ﻗﻴﻤﺔ ‪p-‬‬

‫‪ value‬ﺑﺎﻟﻘﻴﻤﺔ ‪ ،α‬أﻣﺎ إذا ﻛﺎن ذو ﻃﺮﻓﲔ‪ ،‬ﻓﺘﻘﺎرن ﺑﺎﻟﻘﻴﻤﺔ ‪.α/2‬‬

‫ﺧﺎﻣﺴﺎً‪ :‬ﻧﻘﺎرن ﻗﻴﻤﺔ إﺣﺼﺎﺋﻴﺔ اﻻﺧﺘﺒﺎر اﶈﺴﻮﺑﺔ ﻣﻦ اﳋﻄﻮة اﻟﺜﺎﻟﺜﺔ ﲝﺪود ﻣﻨﻄﻘﱵ اﻟﻘﺒﻮل واﻟﺮﻓﺾ اﻟﱵ ﺣﺪدﻧﺎﻫﺎ ﰲ اﳋﻄﻮة اﻟﺮاﺑﻌﺔ‪ ،‬ﻓﺈذا‬
‫وﻗﻌﺖ ﻗﻴﻤﺔ إﺣﺼﺎﺋﻴﺔ اﻻﺧﺘﺒﺎر اﶈﺴﻮﺑﺔ داﺧﻞ ﻣﻨﻄﻘﺔ اﻟﻘﺒﻮل؛ ﻓﺈن اﻟﻘﺮار ﻫﻮ ﻗﺒﻮل اﻟﻔﺮض اﻟﺼﻔﺮي‪ ،‬أﻣﺎ إذا وﻗﻌﺖ ﻗﻴﻤﺔ إﺣﺼﺎﺋﻴﺔ اﻻﺧﺘﺒﺎر‬
‫ﰲ ﻣﻨﻄﻘﺔ اﻟﺮﻓﺾ؛ ﻓﺈن اﻟﻘﺮار ﻫﻮ رﻓﺾ اﻟﻔﺮض اﻟﺼﻔﺮي‪ ،‬وﰲ ﻫﺬﻩ اﳊﺎﻟﺔ ﻧﻘﺒﻞ اﻟﻔﺮض اﻟﺒﺪﻳﻞ ﻣﻊ ﻣﻼﺣﻈﺔ أن اﻟﻘﺮار ﻣﺮﺗﺒﻂ ﲟﺴﺘﻮى اﻷﳘﻴﺔ‬
‫اﶈﺪد‪.‬‬

‫‪245‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Toward a Constructivist Laboratory Education Model‬‬ ‫ﳓﻮ ﳕﻮذج ﺑﻨﺎﺋﻲ ﻟﻠﺘﻌﻠﻴﻢ اﳌﺨﱪي |‬

‫‪ 8-2-5‬ﻃﺮق ﺣﺴﺎب إﺣﺼﺎﺋﻴﺔ اﻻﺧﺘﺒﺎر )‪:(Calculating the Test Statistic‬‬

‫ﻳﻌﺘﱪ اﻻﺧﺘﺒﺎر ‪ t-Test‬واﻻﺧﺘﺒﺎر ‪ z-test‬ﻣﻦ أﺷﻬﺮ اﻻﺧﺘﺒﺎرات اﻟﻼﺑﺎراﻣﱰﻳﺔ اﻟﱵ ﺗﺴﺘﺨﺪم ﳌﻘﺎرﻧﺔ اﻟﻔﺮوق ﺑﲔ ﻣﺘﻮﺳﻄﻲ ﻋﻴﻨﺘﲔ ﻣﺴﺘﻘﻠﺘﲔ‪.‬‬
‫إن اﺧﺘﻴﺎر ﻧﻮع اﻻﺧﺘﺒﺎر ﻳﻌﺘﻤﺪ ﺑﺸﻜﻞ أﺳﺎﺳﻲ ﻋﻠﻰ ﻋﺪد اﻟﻌﻴﻨﺎت وﺗﻮزﻋﻬﺎ‪ .‬اﻟﺸﻜﻞ‪ 5-5‬ﻳﺒﲔ ﳐﻄﻄﺎً ﻣﺴﺎﻋﺪاً ﻟﺘﺤﺪﻳﺪ اﻻﺧﺘﺒﺎر اﻷﻣﺜﻞ‬
‫ﳌﻘﺎرﻧﺔ اﳌﺘﻮﺳﻄﺎت‪.‬‬

‫اﻟﺸﻜﻞ‪ 5-5‬ﳐﻄﻂ ﲢﺪﻳﺪ اﻻﺧﺘﺒﺎر اﻷﻣﺜﻞ ﳌﻘﺎرﻧﺔ اﳌﺘﻮﺳﻄﺎت‬

‫‪ 9-2-5‬اﳊﺰﻣﺔ اﻹﺣﺼﺎﺋﻴﺔ ‪:(Statistical Package for the Social Sciences) SPSS‬‬

‫اﻟﺸﻜﻞ‪ 6-5‬واﺟﻬﺔ اﻟﱪﻧﺎﻣﺞ اﻹﺣﺼﺎﺋﻲ ‪SPSS‬‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪246‬‬
‫‪25‬‬ ‫اﻟﻔﺼﻞ اﳋﺎﻣﺲ | ‪Chapter 5‬‬

‫اﺧﺘﺼﺎر ﻟ ـ "اﳊﺰم اﻹﺣﺼﺎﺋﻴﺔ ﻟﻠﻌﻠﻮم اﻻﺟﺘﻤﺎﻋﻴﺔ"]‪ ،[750‬وﻫﻲ ﻋﺒﺎرة ﻋﻦ ﺣﺰم رﻳﺎﺿﻴﺔ إﺣﺼﺎﺋﻴﺔ ﻣﺘﻜﺎﻣﻠﺔ ﻹدﺧﺎل‬
‫ٌ‬ ‫اﳌﺼﻄﻠﺢ ‪ SPSS‬ﻫﻮ‬
‫اﻟﺒﻴﺎﻧﺎت وﲢﻠﻴﻠﻬﺎ‪ ،‬ﺗﺴﺘﺨﺪم ﻋﺎدة ﰲ ﲨﻴﻊ اﻟﺒﺤﻮث اﻟﻌﻠﻤﻴﺔ اﻟﱵ ﺗﺸﺘﻤﻞ ﻋﻠﻰ اﻟﻌﺪﻳﺪ ﻣﻦ اﻟﺒﻴﺎﻧﺎت اﻟﺮﻗﻤﻴﺔ‪ ،‬وﻻ ﺗﻘﺘﺼﺮ ﻋﻠﻰ اﻟﺒﺤﻮث‬
‫اﻻﺟﺘﻤﺎﻋﻴﺔ ﻓﻘﻂ ﺑﺎﻟﺮﻏﻢ ﻣﻦ أ�ﺎ أﻧﺸﺄت أﺻﻼً ﳍﺬا اﻟﻐﺮض‪ ،‬وإن اﺷﺘﻤﺎﳍﺎ ﻋﻠﻰ ﻣﻌﻈﻢ اﻻﺧﺘﺒﺎرات اﻹﺣﺼﺎﺋﻴﺔ ﻗﺪرﻬﺗﺎ اﻟﻔﺎﺋﻘﺔ ﰲ ﻣﻌﺎﳉﺔ‬
‫اﻟﺒﻴﺎﻧﺎت وﺗﻮاﻓﻘﻬﺎ ﻣﻊ ﻣﻌﻈﻢ اﻟﱪﳎﻴﺎت اﳌﺸﻬﻮرة ﺟﻌﻞ ﻣﻨﻬﺎ أداة ﻓﺎﻋﻠﺔ ﻟﺘﺤﻠﻴﻞ ﺷﱴ أﻧﻮاع اﻷﲝﺎث اﻟﻌﻠﻤﻴﺔ‪.‬‬

‫ﺗﺴﺘﻄﻴﻊ اﳊﺰﻣﺔ اﻹﺣﺼﺎﺋﻴﺔ ‪ SPSS‬ﻗﺮاءة اﻟﺒﻴﺎﻧﺎت ﻣﻦ ﻣﻌﻈﻢ أﻧﻮاع اﳌﻠﻔﺎت ﻟﺘﺴﺘﺨﺪﻣﻬﺎ ﻻﺳﺘﺨﺮاج اﻟﻨﺘﺎﺋﺞ ﻋﻠﻰ ﻫﻴﺌﺔ ﺗﻘﺎرﻳﺮ إﺣﺼﺎﺋﻴﺔ أو‬
‫أﺷﻜﺎل ﺑﻴﺎﻧﻴﺔ أو ﺑﺸﻜﻞ ﺗﻮزﻳﻊ اﻋﺘﺪاﱄ أو إﺣﺼﺎء وﺻﻔﻲ ﺑﺴﻴﻂ أو ﻣﺮﻛﺐ‪ ،‬ﻛﻤﺎ ﺗﺴﺘﻄﻴﻊ اﳊﺰم ﺟﻌﻞ اﻟﺘﺤﻠﻴﻞ اﻹﺣﺼﺎﺋﻲ ﻣﻨﺎﺳﺒﺎً ﻟﻠﺒﺎﺣﺚ‬
‫اﳌﺒﺘﺪئ واﳋﺒﲑ ﻋﻠﻰ ﺣﺪ ﺳﻮاء‪.‬‬

‫وﻳﻌﺘﱪ ﳏﺮر ﺑﻴﺎﻧﺎت اﻟـ‪ SPSS‬اﻟﻮاﺟﻬﺔ اﻷوﻟﻴﺔ ﻟﻠﺤﺰم‪ ،‬وﻫﻲ واﺟﻬﺔ ﺗﺸﺒﻪ اﳉﺪاول اﻹﻟﻜﱰوﻧﻴﺔ وﺗﺴﺘﺨﺪم ﻹدﺧﺎل اﻟﺒﻴﺎﻧﺎت‪ ،‬وﻣﻦ ﺧﻼل اﶈﺮر‬
‫ﳝﻜﻦ ﻗﺮاءة اﻟﺒﻴﺎﻧﺎت وﺗﻌﺪﻳﻠﻬﺎ وﺣﻔﻈﻬﺎ ﰲ ﻣﻠﻔﺎت اﻟﺒﻴﺎﻧﺎت )‪ ،(Data Files‬ﻛﻤﺎ ﺗﺮﺳﻞ اﻟﻨﺘﺎﺋﺞ إﱃ ﻣﻠﻔﺎت اﳋﺮج )‪ (Output files‬اﻟﱵ‬
‫ﲢﻮي ﻋﻠﻰ ﲨﻴﻊ اﻟﻨﺘﺎﺋﺞ اﻟﱵ ﺗﺘﻢ ﺑﻌﺪ أي ﻋﻤﻠﻴﺔ إﺣﺼﺎﺋﻴﺔ‪.‬‬

‫ﺑﻌﺪ ﺗﻘﺪﱘ اﳌﺒﺎدئ اﻹﺣﺼﺎﺋﻴﺔ اﻟﱵ ﺳﻮف ﺗﺴﺘﺨﺪم ﰲ ﲢﻠﻴﻞ اﻟﻨﺘﺎﺋﺞ ﰲ ﻫﺬا اﻟﻔﺼﻞ‪ ،‬وﻗﺒﻞ اﻟﺪﺧﻮل ﰲ اﳌﻨﻬﺠﻴﺎت اﻟﺘﻄﺒﻴﻘﻴﺔ وﻧﺘﺎﺋﺠﻬﺎ‪ ،‬ﻧﻘﺪم‬
‫ﻣﻦ ﺧﻼل اﻟﻔﻘﺮات اﻟﺘﺎﻟﻴﺔ ﳎﻤﻼً ﳐﺘﺼﺮاً ﻋﻦ ﺗﺼﻤﻴﻢ اﳌﺨﱪ اﻟﺬي اﺳﺘﺨﺪام ﰲ اﻟﺘﺠﺎرب‪.‬‬

‫ﺗﺼﻤﻴﻢ وﺑﻨﺎء ﻣﺨﺒﺮ اﻷﻧﻈﻤﺔ اﻟﻤﺪﻣﺠﺔ )‪:(Implementation of Embedded Systems Lab‬‬ ‫‪3-5‬‬

‫إن اﳍﺪف اﻷﺳﺎﺳﻲ ﳍﺬا اﻟﺒﺤﺚ ﻫﻮ رﺑﻂ ﺗﺼﻤﻴﻢ اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ ﲟﺨﺘﻠﻒ أﻧﻮاﻋﻬﺎ ﻋﻤﻮﻣﺎً وﺑﺎﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ اﻟﱵ ﺗﻌﺘﻤﺪ ﻋﻠﻰ ﻣﺼﻔﻮﻓﺎت‬
‫اﻟﺒﻮاﺑﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺧﺼﻮﺻﺎً ﺑﺎﳌﻨﺎﻫﺞ اﻟﺘﻌﻠﻴﻤﻴﺔ اﳌﻮﺟﻮدة ﰲ ﺟﺎﻣﻌﺎﺗﻨﺎ‪ ،‬وﻟﺬﻟﻚ ﳌﺎ ﳍﺎ ﻣﻦ اﻷﳘﻴﺔ اﻟﻜﺒﲑة اﻟﱵ أﺳﻠﻔﻨﺎ ﰲ ذﻛﺮﻫﺎ ﰲ‬
‫اﻟﻔﺼﻞ اﻟﺜﺎﱐ ﻣﻦ ﻫﺬﻩ اﻷﻃﺮوﺣﺔ‪.‬‬

‫ﺑﺸﻜﻞ ﻋﺎم ﺗﻔﺘﻘﺮ ﺟﺎﻣﻌﺎﺗﻨﺎ إﱃ ﳐﺎﺑﺮ اﻟﺘﻄﻮﻳﺮ اﻟﺬاﰐ‪ ،‬ﻛﻤﺎ ﺗﻔﺘﻘﺮ ﳐﺎﺑﺮ ﻛﻠﻴﺔ اﳍﻨﺪﺳﺔ اﻟﻜﻬﺮﺑﺎﺋﻴﺔ واﻹﻟﻜﱰوﻧﻴﺔ إﱃ ﻟﻮﺣﺎت ﺗﻄﻮﻳﺮ اﻷﻧﻈﻤﺔ‬
‫اﳌﺪﳎﺔ‪ ،‬وﺑﺪون ﻫﺬﻩ اﳌﺨﺎﺑﺮ ﻻ ﻗﻴﺎم ﳌﻨﻬﺠﻴﺔ اﻟﺘﻌﻠﻢ اﻟﺘﻄﺒﻴﻘﻲ )‪ (Learning by Doing‬واﳌﺨﺎﺑﺮ اﻟﺘﻄﺒﻴﻘﻴﺔ اﻟﻮاﻗﻌﻴﺔ ) ‪Hands-on‬‬

‫‪(Labs‬؛ ﻣﻦ ﻫﺬا اﳌﻨﻄﻠﻖ ﰎ إﺟﺮاء دراﺳﺔ ﺷﺎﻣﻠﺔ ﻟﻠﻮﺣﺎت اﻟﺘﻄﻮﻳﺮ اﻟﺘﺠﺎرﻳﺔ اﳌﺘﻮﻓﺮة ﻋﺎﳌﻴﺎً‪ ،‬وﰎ ﺗﺼﻨﻴﻔﻬﺎ وﺗﻘﻴﻴﻤﻬﺎ وﻓﻘﺎً ﻟﻌﺪة ﳏﺎور‪ ،‬وﺑﻨﺎءً ﻋﻠﻴﻪ‬
‫ﰎ ﺗﺼﻤﻴﻢ ﻟﻮﺣﺔ ﺗﻄﻮﻳﺮ ﺗﻔﺎﻋﻠﻴﺔ ﺷﺎﻣﻠﺔ اﺳﺘﺨﺪﻣﺖ ﰲ ﻫﺬﻩ اﻟﺪراﺳﺔ‪ .‬ﻣﻘﺎرﻧﺔ ﻣﻔﺼﻠﺔ ﺣﻮل ﻟﻮﺣﺎت اﻟﺘﻄﻮﻳﺮ اﳌﺘﻮﻓﺮة ﲡﺎرﻳﺎً وﻣﻨﻬﺠﻴﺔ ﺗﺼﻤﻴﻢ‬
‫ﻟﻮﺣﺔ اﻟﺘﻄﻮﻳﺮ واﳌﺨﻄﻄﺎت اﻟﺘﺼﻤﻴﻤﻴﺔ ﻛﺎﻣﻠﺔ ﳝﻜﻦ اﻻﻃﻼع ﻋﻠﻴﻬﺎ ﰲ اﻟﺒﺤﺚ]‪ .[801,803‬ﻓﻴﻤﺎ ﻳﻠﻲ ﻣﻮﺟﺰ ﳐﺘﺼﺮ ﺣﻮل ﻟﻮﺣﺔ اﻟﺘﻄﻮﻳﺮ واﻟﺒﻴﺌﺎت‬
‫اﻟﱪﳎﻴﺔ اﻟﱵ اﺳﺘﺨﺪﻣﺖ ﰲ اﻟﺪراﺳﺔ‪.‬‬

‫‪ 1-3-5‬ﺗﺼﻤﻴﻢ ﻟﻮﺣﺔ اﻟﺘﻄﻮﻳﺮ اﳌﺨﱪﻳﺔ )‪:(Designing The Laboratory Development Board‬‬

‫إن اﻟﺴﺆال اﻟﺬي ﻃﺮﺣﺘﻪ ﻋﻠﻰ ﻣﺴﻤﻌﻲ ﻋﻠﻰ ﻗﺒﻞ اﻟﺸﺮوع ﰲ ﺑﻨﺎء ﻟﻮﺣﺔ اﻟﺘﻄﻮﻳﺮ ﻫﻮ‪" :‬ﻫﻞ ﻧﺴﺘﻄﻴﻊ أن ﳓﻘﻖ اﻛﺘﻔﺎءً ذاﺗﻴﺎً ﻋﻠﻰ ﺻﻌﻴﺪ ﺗﻄﻮﻳﺮ‬
‫اﳌﺨﺎﺑﺮ اﻟﻌﻤﻠﻴﺔ وﳐﺘﱪات اﻷﲝﺎث ﰲ ﺟﺎﻣﻌﺎﺗﻨﺎ؟"‬

‫‪247‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Toward a Constructivist Laboratory Education Model‬‬ ‫ﳓﻮ ﳕﻮذج ﺑﻨﺎﺋﻲ ﻟﻠﺘﻌﻠﻴﻢ اﳌﺨﱪي |‬

‫إن اﳍﺪف اﻟﺮﺋﻴﺴﻲ ﻟﺒﻨﺎء ﻟﻮﺣﺔ اﻟﺘﻄﻮﻳﺮ ﻋﻠﻰ اﻟﺮﻏﻢ ﻣﻦ وﺟﻮد اﻟﻌﺪﻳﺪ ﻣﻦ ﻟﻮﺣﺎت اﻟﺘﻄﻮﻳﺮ اﻟﺘﺠﺎرﻳﺔ اﳌﺘﻮﻓﺮة ﻋﺎﳌﻴﺎً ﻫﻮ اﺳﺘﺜﻤﺎر اﻷﲝﺎث‬
‫اﻟﺘﻄﺒﻴﻘﻴﺔ اﳌﻄﺮوﺣﺔ ﰲ ﺗﻄﻮﻳﺮ ﳐﺘﱪاﺗﻨﺎ اﳉﺎﻣﻌﻴﺔ وﻓﻘﺎً ﻟﻠﺘﻘﻨﻴﺎت اﻟﺘﻜﻨﻮﻟﻮﺟﻴﺔ اﳊﺪﻳﺜﺔ‪ ،‬وذﻟﻚ ﻣﻦ ﺧﻼل ﺗﻮﻓﲑ ﻣﻮارد ﻋﻤﻠﻴﺔ ﺗﻄﺒﻴﻘﻴﺔ ﺗﺮاﻓﻖ وﺗﻌﺰز‬
‫اﻷﺳﺲ اﻟﻨﻈﺮﻳﺔ – ﻋﻠﻰ ﻛﻞ ﺣﺎل ﻓﺈن اﻟﺪراﺳﺔ اﳌﻨﺸﻮرة ﰲ اﻟﺒﺤﺚ]‪ [801,803‬ﺗﺒﲔ اﳌﻴﺰات اﻟﻔﺎﺋﻘﺔ ﻟﻠﻮﺣﺔ اﻟﺘﻄﻮﻳﺮ اﳌﺼﻤﻤﺔ ﻋﻠﻰ ﻟﻮﺣﺎت اﻟﺘﻄﻮﻳﺮ‬
‫اﳌﺘﻮﻓﺮة ﲡﺎرﻳﺎً‪ .‬اﻟﺸﻜﻞ‪ 7-5‬ﻳﺒﲔ ﳐﻄﻂ ﺗﻮزع اﶈﻴﻄﻴﺎت ﻋﻠﻰ ﻟﻮﺣﺔ اﻟﺘﻄﻮﻳﺮ‪ .‬اﻟﺸﻜﻞ‪ 8-5‬ﻳﺒﲔ ﺻﻮرة اﻟﻨﻤﻮذج اﻷوﱄ ﻟﻠﻮﺣﺔ اﻟﺘﻄﻮﻳﺮ‪.‬‬

‫اﻟﺸﻜﻞ‪ 7-5‬ﺗﻮزع اﶈﻴﻄﻴﺎت ﻋﻠﻰ ﻟﻮﺣﺔ اﻟﺘﻄﻮﻳﺮ‬

‫ﻟﻘﺪ ﰎ ﺗﺼﻤﻴﻢ ﻫﺬﻩ اﻟﻠﻮﺣﺔ ﲝﻴﺚ ﲣﺪم اﳌﺒﺘﺪئ واﳌﺘﻘﺪم ﰲ ﺗﻌﻠﻢ ﺑﺮﳎﺔ اﳌﺘﺤﻜﻤﺎت اﳌﺼﻐﺮة )‪ ،(MCUs‬ﺣﻴﺚ أ�ﺎ ﺗﻀﻢ أﻛﺜﺮ ﻣﻦ ‪50‬‬

‫وﺣﺪة ﳏﻴﻄﻴﺔ ﻋﻠﻰ ﻧﻔﺲ اﻟﻠﻮﺣﺔ ﻟﺘﻐﻄﻲ ﻣﺎ ﻳﻘﺎرب ‪ 70‬ﲡﺮﺑﺔ أﺳﺎﺳﻴﺔ‪ ،‬وﻗﺪ ﺗﺼﻞ إﱃ أﻛﺜﺮ ﻣﻦ ‪ 100‬ﲡﺮﺑﺔ ﺑﺎﻟﺪﻣﺞ ﺑﲔ اﻟﻮﻇﺎﺋﻒ اﶈﻴﻄﻴﺔ ﻋﻠﻰ‬
‫اﻟﻠﻮﺣﺔ‪ ،‬ﺑﺎﻹﺿﺎﻓﺔ إﱃ إﻣﻜﺎﻧﻴﺔ رﺑﻂ وﺣﺪات ﺧﺎرﺟﻴﺔ )‪ (External Models‬ﻋﻦ ﻃﺮﻳﻖ وﺣﺪات اﻟﺘﻮﺳﻌﺔ اﶈﻴﻄﻴﺔ؛ ﳝﻜﻦ اﻻﻃﻼع ﻋﻠﻰ‬
‫ﻗﺎﺋﻤﺔ اﻟﺘﺠﺎرب واﻟﻮﺣﺪات اﶈﻴﻄﻴﺔ اﳌﺘﻮﻓﺮة ﰲ اﻟﺒﺤﺚ]‪ .[801,803‬ﳝﺜﻞ اﳌﺘﺤﻜﻢ اﳌﺼﻐﺮ ‪ ATmega128‬ﻗﻠﺐ اﻟﻨﻈﺎم وﻳﺮﺗﺒﻂ ﻣﻊ ﺑﺎﻗﻲ‬
‫اﶈﻴﻄﻴﺎت اﳌﻮزﻋﺔ إﻣﺎ ﻋﻦ ﻃﺮﻳﻖ ﺑﻮاﺑﺎت اﻟﺪﺧﻞ واﳋﺮج‪ ،‬ﻛﺎرﺗﺒﺎﻃﻪ ﻣﻊ ﺷﺎﺷﺎت اﻹﻇﻬﺎر اﶈﺮﻓﻴﺔ واﻟﺮﺳﻮﻣﻴﺔ ووﺣﺪات اﻟﺘﻮﺳﻌﺔ اﳋﺎرﺟﻴﺔ‪ ،‬أو ﻋﻦ‬
‫ﻃﺮﻳﻖ ﻧﻮاﻓﺬ اﻻﺗﺼﺎل اﻟﺘﺴﻠﺴﻠﻲ )‪RS232, USB, RS485, CAN, PS2, I2C‬؛ أو ﻋﻦ ﻃﺮﻳﻖ أﻗﻄﺎب اﳌﺒﺪﻻت اﻟﺘﺸﺎﻬﺑﻴﺔ اﻟﺮﻗﻤﻴﺔ‬
‫)‪ - (ADCs‬ﻛﺎرﺗﺒﺎﻃﻪ ﻣﻊ ﺣﺴﺎﺳﺎت اﳊﺮارة واﻟﺮﻃﻮﺑﺔ واﻟﻀﻐﻂ واﻟﻀﻮء وﺗﻮﻟﻴﺪ اﳉﻬﺪ اﳋﻄﻲ؛ أو ﻋﻦ ﻃﺮﻳﻖ أﻗﻄﺎب اﳌﻘﺎﻃﻌﺎت اﳋﺎرﺟﻴﺔ ‪-‬‬
‫ﻛﺎرﺗﺒﺎﻃﻪ ﻣﻊ اﳌﻔﺎﺗﻴﺢ اﻟﻠﺤﻈﻴﺔ وﺣﺴﺎس اﻟﺪوران؛ أو ﻋﻦ ﻃﺮﻳﻖ أﻗﻄﺎب ﺗﻮﻟﻴﺪ إﺷﺎرة ﺗﻌﺪﻳﻞ ﻋﺮض اﻟﻨﺒﻀﺔ )‪ (PWM‬ﻣﻦ أﺟﻞ اﻟﺘﺤﻜﻢ‬
‫ﺑﺎﻟﺘﻄﺒﻴﻘﺎت اﻟﱵ ﲢﺘﺎج إﱃ ﺟﻬﺪ ﺧﺮج ﻣﺴﺘﻤﺮ ذو ﻗﻴﻤﺔ وﺳﻄﻴﺔ ﻣﺘﻐﲑة‪.‬‬

‫اﻟﺸﻜﻞ‪ 9-5‬ﻳﺒﲔ اﳌﺨﻄﻂ اﻟﺼﻨﺪوﻗﻲ ﻟﻠﻨﻈﺎم ﺣﻴﺚ أن ﲨﻴﻊ اﶈﻴﻄﻴﺎت اﻟﱵ ﳍﺎ اﺗﺼﺎل ﻣﻊ اﻟﻌﺎﱂ اﳋﺎرﺟﻲ ﺗﺮﺗﺒﻂ ﻣﻊ اﻟﺼﻨﺎدﻳﻖ اﳌﻈﻠﻠﺔ ﺑﺎﻟﻠﻮن‬
‫اﻟﺮﻣﺎدي‪.‬‬
‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪248‬‬
25 Chapter 5 | ‫اﻟﻔﺼﻞ اﳋﺎﻣﺲ‬

‫ اﻟﻨﻤﻮذج اﻷوﱄ ﻟﻠﻮﺣﺔ اﻟﺘﻄﻮﻳﺮ اﳌﺼﻤﻤﺔ‬8-5‫اﻟﺸﻜﻞ‬

PS2 PS2 I/O PORTF

PORTF FE08
AT Keyboard Interface Input/Output Port Interface
Pull up/down

USB USB2.0 I/O

Keypad Resistors

FT232<>UART Interface 4x4 Matrix Keypad

UART0

COM RS232A 7-Segment LED-Matrix

MAX232<>UART Interface
Quad 7-Segment Display 16x8 Pixel Matrix

COM RS232B Output

MAX232<>UART Interface

GLCD LCD
UART1

AK500 RS485
MAX485<>UART Interface GLCD 128x64 Interface LCD 20x4 Interface

RJ11 CAN2.0 UART2 RC5-RE RC5-TR FSK-RE FSK-TR

Industrial CAN Interface IR>38KHz IR>38KHz RF>433MHz RF>433MHz

LPT STK300 SPI Data BUS

In System Programming

FE08 PORTE PORTE PORTA

PORTA FE08
Input/Output Port Interface Input/Output Port Interface
Pull up/down Pull up/down
Resistors Resistors

MIC Microphone RTC

Amplified MIC Interface
ATmega I2C BUS
DS1307 I2C RTC Chip

AK500 Speaker 128 EEPROM

Sound Output Interface 24C512 I2C EPROM Chip

Pull up/down Pull up/down

Resistors Resistors

FE08 PORTB PORTB PORTC

PORTC FE08
Input/Output Port Interface Input/Output Port Interface

CARDP MMC/SD SPI LM35 NTC LDR MPXA

Multimedia card Interface Temp Sens Temp Sens Light Sens Pressure

SOCK SmartCard I/O ADC BUS

Basic Card Interface
LM317
AK500 8-Bit DAC PORTE
Pot-R1 Pot-R2 Switch Reference
DAC Ladder Network Liner Volt Liner Volt Multi-SW Voltage

AK500 10-Bit DAC OC3A DS1820 Encoder RC-H

DAC Interface using PWM 1-Wire Sen Rotary.E Sens INT
0~7
AK500 DC Motor OC1A Data BUS 8 Switchs
PWM Drive Interface 8 LEDs

AK500 Isolated HV T1/ICP1 SPI

DataFlash
HighVoltage Isolated Interface AT25/AT26 Flash Memory Pull up/down
Resistors

AK500 2-Relay Output PORTD

PORTD FE08
Relays output interface Input/Output Port Interface

‫ اﳌﺨﻄﻂ اﻟﺼﻨﺪوﻗﻲ ﻟﻌﻨﺎﺻﺮ ﻟﻮﺣﺔ اﻟﺘﻄﻮﻳﺮ‬9-5‫اﻟﺸﻜﻞ‬

249 ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Toward a Constructivist Laboratory Education Model‬‬ ‫ﳓﻮ ﳕﻮذج ﺑﻨﺎﺋﻲ ﻟﻠﺘﻌﻠﻴﻢ اﳌﺨﱪي |‬

‫‪ 2-3-5‬ﺑﻴﺌﺔ اﻟﺘﻄﻮﻳﺮ اﻟﱪﳎﻴﺔ )‪:(Integrated Development Environment‬‬

‫ﻋﻤﻠﻴﺎً ﻳﻌﺘﱪ اﺧﺘﻴﺎر اﻷدوات اﻟﱪﳎﻴﺔ ﻣﻦ اﻻﻋﺘﺒﺎرات اﳍﺎﻣﺔ ﺟﺪاً ﰲ ﺗﺼﻤﻴﻢ اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ‪ ،‬وأﻣﺎ أﻛﺎدﳝﻴﺎً ﻓﺈﻧﻪ ﰲ أﻏﻠﺐ اﻷﺣﻴﺎن ﻳﺘﻢ اﺧﺘﻴﺎر‬
‫أدوت اﻟﺘﻄﻮﻳﺮ واﻟﺒﻴﺌﺎت اﻟﱪﳎﻴﺔ ﺑﺸﻜﻞ ﻏﲑ ﻣﺪروس‪ ،‬وﻏﺎﻟﺒﺎً ﻣﺎ ﻳﻜﻮن اﻷﻣﺮ ﻋﺎﺋﺪاً إﱃ اﳌﻌﻠﻢ‪.‬‬

‫إن ﺗﻘﺪﱘ اﻟﻄﻼب إﱃ ﻣﻨﻬﺞ ﺗﺼﻤﻴﻢ اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ اﻟﺘﻄﺒﻴﻘﻲ ﻟﻠﻤﺮة اﻷوﱃ ﻗﺪ ﻳﻀﻊ ﻋﻠﻰ ﻋﺎﺗﻘﻬﻢ ﲪﻼً ﻣﻌﺮﻓﻴﺎً ﻛﺒﲑاً‪ ،‬ﺣﻴﺚ أن ﻃﺒﻴﻌﺔ ﺗﺼﻤﻴﻢ‬
‫اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ ﺗﺘﻄﻠﺐ ﻣﻌﺮﻓﺔ ﺟﻴﺪة ﻋﻠﻰ ﻋﺪة ﳏﺎور ﻣﺜﻞ‪ :‬اﻹﻟﻜﱰوﻧﻴﺎت اﻟﻌﻤﻠﻴﺔ‪ ،‬ﻗﺮاءة اﻟﻮﺛﺎﺋﻖ اﻟﻔﻨﻴﺔ ﻟﻠﻜﻴﺎن اﻟﺼﻠﺐ‪ ،‬اﳋﻮارزﻣﻴﺎت اﻟﱪﳎﻴﺔ‪،‬‬
‫ﺑﻨﻴﺔ اﳊﺎﺳﺐ‪ ،‬وﻏﲑﻫﺎ]‪[795,796‬؛ وﻋﻠﻴﻪ ﻓﺈن اﺧﺘﻴﺎر ﻟﻐﺎت اﻟﱪﳎﻴﺔ ﻋﺎﻟﻴﺔ اﳌﺴﺘﻮى ﻣﺜﻞ‪ BASIC:‬ﻳﺴﺎﻫﻢ ﺑﺸﻜﻞ ﻛﺒﲑ ﺟﺪاً ﰲ ﲣﻔﻴﺾ اﻟﻌﺐء‬
‫اﻹدراﻛﻲ ﻋﻠﻰ اﻟﻄﻼب‪.‬‬

‫ﰎ اﺧﺘﻴﺎرﻫﺎ ﻟﱪﳎﺔ ﲨﻴﻊ اﻟﺘﺠﺎرب وذﻟﻚ ﺑﻌﺪ إﺟﺮاء ﻣﻘﺎرﻧﺔ ﺷﺎﻣﻠﺔ ﻟﺒﻴﺌﺎت اﻟﺘﻄﻮﻳﺮ‬ ‫]‪[797‬‬
‫ﺑﻴﺌﺔ اﻟﺘﻄﻮﻳﺮ اﳌﺘﻜﺎﻣﻠﺔ ‪Bascom-AVR‬‬

‫اﳌﺘﻮﻓﺮة]‪ .[801,803‬ﺗﻌﺘﻤﺪ ﻫﺬﻩ اﻟﺒﻴﺌﺔ ﻋﻠﻰ ﻟﻐﺔ اﻟﱪﳎﺔ ‪ BASIC‬وﲤﺘﻠﻚ ﻣﻜﺘﺒﺎت ﺑﺮﳎﻴﺔ ﻣﺘﻘﺪﻣﺔ وﺷﺎﻣﻠﺔ وﺗﻌﺘﱪ ﻣﻦ اﻟﺒﻴﺌﺎت اﻟﱪﳎﻴﺔ اﳌﺸﻬﻮرة‬
‫واﳌﺨﺼﺼﺔ ﳌﺘﺤﻜﻤﺎت اﻟﻌﺎﺋﻠﺔ ‪ .AVR‬اﻟﺸﻜﻞ‪ 10-5‬ﻳﺒﲔ اﻟﻮاﺟﻬﺎت اﻟﺮﺋﻴﺴﻴﺔ ﻟﻠﱪﻧﺎﻣﺞ‪.‬‬

‫اﻟﺸﻜﻞ‪ 10-5‬ﺑﻴﺌﺔ اﻟﺘﻄﻮﻳﺮ اﻟﱪﳎﻴﺔ ‪Bascom-AVR‬‬

‫ﲤﻠﻚ ﺑﻴﺌﺔ اﻟﺘﻄﻮﻳﺮ ‪ Bascom-AVR‬اﻟﻌﺪﻳﺪ ﻣﻦ واﺟﻬﺎت اﻟﺘﻄﺒﻴﻘﺎت واﻷدوات اﻟﱵ ﺗﺴﺎﻋﺪ اﳌﱪﻣﺞ ﻋﻠﻰ ﺑﺮﳎﺔ اﻟﻨﻈﺎم ﲟﺮوﻧﺔ وﺳﺮﻋﺔ ﻛﺒﲑة‪،‬‬
‫ﻫﺬﻩ اﻟﻮاﺟﻬﺎت ﻫﻲ‪:‬‬

‫• واﺟﻬﺔ اﶈﺮر اﻟﱪﳎﻲ‪ :‬وﻫﻲ ﳏﺮر اﻟﺘﻌﻠﻴﻤﺎت واﻷواﻣﺮ اﻟﱪﳎﻴﺔ‪.‬‬

‫• واﺟﻬﺔ اﶈﺎﻛﺎة‪ :‬وﻓﻴﻬﺎ ﻳﺘﻢ ﺗﺸﻐﻴﻞ اﻟﱪﻧﺎﻣﺞ ﺧﻄﻮة‪-‬ﺧﻄﻮة وﻣﺮاﻗﺒﺔ ﺣﺎﻟﺔ اﳌﺴﺠﻼت اﻟﺪاﺧﻠﻴﺔ واﻟﺬواﻛﺮ‪.‬‬
‫• واﺟﻬﺔ اﳌﱪﳎﺔ‪ :‬وﻓﻴﻬﺎ ﻳﺘﻢ ﺑﺮﳎﺔ اﳌﻌﺎﰿ ﺑﻌﺪ إﺟﺮاء ﻋﻤﻠﻴﺔ ﺗﻮﻟﻴﺪ اﳌﻠﻒ اﻟﱪﳎﻲ ﺑﺎﻷﻣﺮ ‪.Compile‬‬

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‫‪25‬‬ ‫اﻟﻔﺼﻞ اﳋﺎﻣﺲ | ‪Chapter 5‬‬

‫• واﺟﻬﺔ اﻟﺮﺑﻂ اﻟﺒﻴﲏ‪ :‬وﻓﻴﻬﺎ ﻳﺘﻢ ﻋﺮض ﻣﻌﻠﻮﻣﺎت اﻟﺘﺨﺎﻃﺐ ﺑﲔ اﳌﻌﺎﰿ واﳊﺎﺳﺐ‪.‬‬
‫• واﺟﻬﺎت اﻷدوات اﳌﺴﺎﻋﺪة وﻫﻲ ﻛﺜﲑة‪.‬‬

‫ﺑﺪف ﲢﻀﲑ اﻟﻄﻼب ﻟﺒﻨﺎء ﺗﻄﺒﻴﻘﺎت أﻗﺮب ﻣﺎ ﻳﻜﻮن إﱃ اﻟﻮاﻗﻊ‪ ،‬ﰎ وﺿﻊ ﺧﻄﻮات ﻣﻨﻬﺠﻴﺔ ﻟﺘﺸﻜﻴﻞ اﻟﱪاﻣﺞ ﰲ اﻟﺒﻴﺌﺔ ‪،Bascom-AVR‬‬
‫واﳍﺪف ﻣﻦ ﻫﺬﻩ اﳌﻨﻬﺠﻴﺔ ﻫﻮ ﻛﺘﺎﺑﺔ اﻟﱪاﻣﺞ ﺑﻄﺮﻳﻘﺔ اﺣﱰاﻓﻴﺔ ﻣﺆﺳﺴﺎﺗﻴﺔ‪ ،‬ﲝﻴﺚ ﳝﻜﻦ ﺗﻄﻮﻳﺮﻫﺎ وﻣﺮاﺟﻌﺘﻬﺎ ﻣﺴﺘﻘﺒﻼً ﺑﻜﻞ ﺳﻬﻮﻟﺔ ﻣﻦ ﺧﻼل‬
‫ﻛﺘﺎﺑﺘﻬﺎ ﺑﺎﺳﺘﺨﺪام ﻣﻨﻬﺠﻴﺔ اﻟﻜﺘﻞ اﳌﺴﺘﻘﻠﺔ‪ ،‬ﲝﻴﺚ ﳝﻜﻦ ﻓﻬﻤﻬﺎ واﺳﺘﺜﻤﺎرﻫﺎ ﰲ ﺗﻄﺒﻴﻘﺎت ﺑﺮﳎﻴﺔ أﺧﺮى ذات ﺻﻠﺔ‪ .‬اﳍﻴﻜﻠﻴﺔ اﻟﱪﳎﻴﺔ اﻟﻌﺎﻣﺔ‬
‫ﻣﻮﺿﺤﺔ ﻋﻠﻰ اﻟﺸﻜﻞ‪.11-5‬‬

‫‪ 3-3-5‬ﺑﻴﺌﺔ اﶈﺎﻛﺎة )‪:(The Simulation Environment‬‬

‫إﺿﺎﻓﺔً إﱃ اﻟﺘﻄﺒﻴﻖ اﻟﻌﻤﻠﻲ ﻟﻸﻣﺜﻠﺔ واﻟﺘﻤﺎرﻳﻦ ﻋﻠﻰ ﻟﻮﺣﺔ اﻟﺘﻄﻮﻳﺮ‪ ،‬ﻓﻘﺪ ﰎ ﺗﺰوﻳﺪ اﳌﻨﻬﺞ اﻟﺘﻌﻠﻴﻤﻲ ﲟﻠﻔﺎت ﳏﺎﻛﺎة ﺑﺮاﻣﺞ اﻟﻮﺣﺪات اﶈﻴﻄﻴﺔ ﻟﻠﻮﺣﺔ‬
‫اﻟﺘﻄﻮﻳﺮ ﰲ ﺑﻴﺌﺔ اﻟﱪﻧﺎﻣﺞ ‪ [798]PROTEUS‬واﻟﺬي ﻫﻮ ﻋﺒﺎرة ﻋﻦ ﺑﻴﺌﺔ ﳐﺼﺼﺔ ﻷﻏﺮاض ﳏﺎﻛﺎة اﻷﻧﻈﻤﺔ اﻟﺮﻗﻤﻴﺔ واﳌﻌﺎﳉﺎت اﳌﺼﻐﺮة‪ ،‬إن‬
‫اﳍﺪف اﻷﺳﺎﺳﻲ ﻣﻦ ﻫﺬﻩ اﻟﻌﻤﻠﻴﺔ ﻫﻮ إﺗﺎﺣﺔ اﻟﻔﺮﺻﺔ ﻟﻠﻄﻼب اﻟﻠﺬﻳﻦ ﻻ ﺗﺘﻮﻓﺮ ﻟﺪﻳﻬﻢ إﻣﻜﺎﻧﻴﺔ ﺷﺮاء ﻟﻮﺣﺔ اﻟﺘﻄﻮﻳﺮ ﻣﻦ ﳏﺎﻛﺎة اﻟﺘﺼﻤﻴﻢ اﻟﻨﻈﺮي‬
‫ﻟﻠﻨﻈﺎم‪.‬‬

‫‪1- Directives‬‬
‫‪Directives are special instructions for the compiler. They can override a setting from the IDE.‬‬

‫‪2- Configuration‬‬
‫‪Configuration commands initialize the hardware to the desired state.‬‬

‫‪3- Variables‬‬
‫‪Dimension all required variables.‬‬

‫‪4- Main Program‬‬

‫‪Contains all executive instructions such as: Mathematical Instruction.‬‬

‫‪5- Sub Routines‬‬

‫‪They are sub programs or sub procedures, call from the main program‬‬

‫اﻟﺸﻜﻞ‪ 11-5‬ﻣﻨﻬﺠﻴﺔ ﻛﺘﺎﺑﺔ اﻟﱪاﻣﺞ ﰲ اﻟﺒﻴﺌﺔ ‪Bascom-AVR‬‬

‫ﻳﻌﺘﱪ ﺑﺮﻧﺎﻣﺞ ‪ PROTEUS‬ﻣﻦ أﻗﻮى ﺑﺮاﻣﺞ اﶈﺎﻛﺎة ﻟﻠﻤﺘﺤﻜﻤﺎت اﳌﺼﻐﺮة‪ ،‬وﻫﻮ ﳝﻠﻚ اﻟﻌﺪﻳﺪ ﻣﻦ اﳌﻜﺘﺒﺎت اﻟﱵ ﺗﻐﻄﻲ ﲨﻴﻊ أﻧﻮاع‬
‫اﶈﻴﻄﻴﺎت اﻟﱵ ﳝﻜﻦ وﺻﻠﻬﺎ ﻣﻊ اﳌﺘﺤﻜﻢ اﳌﺼﻐﺮ ﺑﺎﻹﺿﺎﻓﺔ إﱃ أدوات اﻟﻘﻴﺎس اﻟﻌﺪﻳﺪة‪ ،‬وﺳﻮف ﻧﺴﺘﺨﺪم ﻫﺬا اﻟﱪﻧﺎﻣﺞ ﶈﺎﻛﺎة ﲨﻴﻊ اﻟﺘﺠﺎب‬
‫اﻟﱵ ﺳﻮف ﻧﺘﻄﺮق إﻟﻴﻬﺎ ﻻﺣﻘﺎً‪ ،‬ﻛﻤﺎ ﺳﻴﺘﻢ اﺳﺘﺨﺪاﻣﻪ ﺑﺸﻜﻞ أﺳﺎﺳﻲ ﰲ اﳌﺨﺘﱪ اﻻﻓﱰاﺿﻲ‪.‬‬

‫‪251‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Toward a Constructivist Laboratory Education Model‬‬ ‫ﳓﻮ ﳕﻮذج ﺑﻨﺎﺋﻲ ﻟﻠﺘﻌﻠﻴﻢ اﳌﺨﱪي |‬

‫اﻟﺸﻜﻞ‪ 12-5‬اﺳﺘﺨﺪام ﺑﻴﺌﺔ اﶈﺎﻛﺎة ‪ PROTEUS‬ﶈﺎﻛﺎة ﺑﺮﻧﺎﻣﺞ ﻟﻠﺘﺤﻜﻢ ﲟﺤﺮك ﺗﻴﺎر ﻣﺴﺘﻤﺮ‬

‫اﻟﺸﻜﻞ‪ 12-5‬ﻳﺒﲔ إﺣﺪى اﳌﺸﺎرﻳﻊ اﻟﱵ ﻗﻤﻨﺎ ﺑﺪراﺳﺘﻬﺎ ﰲ ﺑﻴﺌﺔ اﶈﺎﻛﺎة‪ ،‬وﻣﻦ ﰒ ﺗﻄﺒﻴﻘﻬﺎ ﻋﻠﻰ ﻟﻮﺣﺔ اﻟﺘﻄﻮﻳﺮ ﻫﻲ اﻟﺘﺤﻜﻢ ﺑﺴﺮﻋﺔ ﳏﺮك ﺗﻴﺎر‬
‫ﻣﺴﺘﻤﺮ ﺑﺎﺳﺘﺨﺪام ﺗﻘﻨﻴﺔ ﺗﻌﺪﻳﻞ ﻋﺮض اﻟﻨﺒﻀﺔ )‪ ،(PWM‬ﺣﻴﺚ ﻳﺘﻢ ﲢﺪﻳﺪ اﻟﺴﺮﻋﺔ اﳌﺮﺟﻌﻴﺔ اﳌﻄﻠﻮﺑﺔ ﻋﻦ ﻃﺮﻳﻖ إدﺧﺎﳍﺎ ﻣﻦ ﺧﻼل ﻟﻮﺣﺔ‬
‫ﻣﻔﺎﺗﻴﺢ ﺳﺖ ﻋﺸﺮﻳﺔ أو ﻋﻦ ﻃﺮﻳﻖ ﻣﻘﺎوﻣﺔ ﻣﺘﻐﲑة ﺧﻄﻴﺔ‪ ،‬وﻳﺘﻢ ﺣﺴﺎب اﻟﺴﺮﻋﺔ وﻋﺮﺿﻬﺎ ﻋﻠﻰ ﺷﺎﺷﺔ إﻇﻬﺎر ﻛﺮﻳﺴﺘﺎﻟﻴﺔ وإرﺳﺎﳍﺎ إﱃ اﳊﺎﺳﺐ‬
‫)‪ (RS232‬ﻋﱪ ﻧﺎﻓﺬة اﻻﺗﺼﺎل اﻟﺘﺴﻠﺴﻠﻴﺔ )‪ ،(UART‬ﻛﻤﺎ أن اﻟﻨﻈﺎم ﻣﺰود ﺑﻜﻠﻤﺔ ﻣﺮور ﻷﻏﺮاض اﳊﻤﺎﻳﺔ‪.‬‬

‫ﻳﺒﲔ اﻟﺸﻜﻞ‪ 13-5‬ﻣﺜﺎﻻً ﺗﻄﺒﻴﻘﻴﺎً ﻋﻦ اﺳﺘﺨﺪام ﺑﻴﺌﺔ اﶈﺎﻛﺎة ‪ PROTEUS‬ﻟﺘﺤﻠﻴﻞ دارة ﻋﺪاد ﺗﺼﺎﻋﺪي ﺗﻨﺎزﱄ ﻗﺎﺑﻞ ﻟﻠﻀﺒﻂ ﲝﻴﺚ ﻳﺘﻢ‬
‫ﻋﺮض اﻟﻘﻴﻢ ﻋﻠﻰ ﻟﻮﺣﺎت إﻇﻬﺎر رﻗﻤﻴﺔ ﰲ ﳕﻂ اﳌﺴﺢ‪.‬‬

‫اﻟﺸﻜﻞ‪ 13-5‬اﺳﺘﺨﺪام ﺑﻴﺌﺔ اﶈﺎﻛﺎة ‪ PROTEUS‬ﻟﺘﺤﻠﻴﻞ دارة ﻋﺪاد ﺗﺼﺎﻋﺪي ﺗﻨﺎزﱄ ﻗﺎﺑﻞ ﻟﻠﻀﺒﻂ‬

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‫‪25‬‬ ‫اﻟﻔﺼﻞ اﳋﺎﻣﺲ | ‪Chapter 5‬‬

‫‪ 4-3-5‬ﻣﻨﻬﺠﻴﺔ إﻋﺪاد دﻟﻴﻞ اﻟﺘﺠﺎرب اﻟﻌﻤﻠﻴﺔ )‪:(Experiments Manual Preparing Methodology‬‬

‫ﻟﻘﺪ ﰎ إﻋﺪاد دﻟﻴﻞ اﻟﺘﺠﺎرب اﻟﻌﻤﻠﻴﺔ ﻟﻠﻮﺣﺔ اﻟﺘﻄﻮﻳﺮ اﻋﺘﻤﺎداً ﻋﻠﻰ ﻣﻨﻬﺠﻴﺎت واﺳﱰاﺗﻴﺠﻴﺎت اﻟﺘﻌﻠﻴﻢ اﳍﻨﺪﺳﻲ اﳊﺪﻳﺚ واﳌﻨﻬﺠﻴﺎت اﻟﺘﻔﺎﻋﻠﻴﺔ‬
‫ﺑﲔ اﳌﺘﻌﻠﻢ واﳊﺎﺳﺐ ﲝﻴﺚ ﻳﺴﺘﻄﻴﻊ اﻟﻄﺎﻟﺐ ﺗﻨﻔﻴﺬ ﲨﻴﻊ اﻟﺘﺠﺎرب واﻛﺘﺴﺎب اﳌﻌﺮﻓﺔ واﳌﻬﺎرات ﺑﺪون اﳊﺎﺟﺔ ﻟﺘﺪﺧﻞ ﻣﺒﺎﺷﺮ ﻣﻦ اﳌﻌﻠﻢ‪ ،‬ﺣﻴﺚ‬
‫أن ﻛﻞ ﻣﺎ ﳛﺘﺎﺟﻪ اﻟﻄﺎﻟﺐ ﻫﻮ اﺗﺒﺎع اﳋﻄﻮات اﳌﺸﺮوﺣﺔ ﰲ دﻟﻴﻞ اﻟﺘﺠﺎرب‪ ،‬وﰲ ﺣﺎل وﺟﻮد ﺗﺴﺎؤل ﻳﻘﻮم اﳌﻌﻠﻢ ﺑﺘﻮﺟﻴﻪ اﻟﻄﺎﻟﺐ ﺑﺸﻜﻞ ﻏﲑ‬
‫ﻣﺒﺎﺷﺮ‪ .‬ﻛﺬﻟﻚ ﰎ إﻋﺪاد ﺷح ﻣﻔﺼﻞ ﳛﻮي اﳌﺨﻄﻄﺎت اﻟﺘﺼﻤﻴﻤﻴﺔ اﻟﻨﻈﺮﻳﺔ واﻟﻌﻤﻠﻴﺔ وﻃﺮﻳﻘﺔ إﻋﺪاد ﻧﻈﺎم ﻣﺸﺎﺑﻪ‪ ،‬وذﻟﻚ ﻬﺑﺪف ﺟﻌﻞ ﻫﺬا‬
‫ﻟﻨﻈﺎم ﻣﻔﺘﻮح اﳌﺼﺪر ﺑﲔ ﻳﺪي اﻟﻄﻼب ﻟﺘﻤﻜﻴﻨﻬﻢ ﻣﻦ ﺑﻨﺎء ﻟﻮﺣﺎت اﻟﺘﻄﻮﻳﺮ اﳋﺎﺻﺔ ﻬﺑﻢ‪ ،‬وﺑﺎﻟﺘﺎﱄ إﻋﻄﺎء دور ﻣﺮﻛﺰي أﻋﻤﻖ ﻟﻠﺠﺎﻧﺐ اﻟﻌﻤﻠﻲ‬
‫اﳍﻨﺪﺳﻲ‪ ،‬وﰎ ﻧﺸﺮ دﻟﻴﻞ اﻟﺘﺠﺎرب واﳌﻠﻔﺎت اﻟﺘﺼﻤﻴﻤﺔ ﻋﻠﻰ ﺷﺒﻜﺔ اﻹﻧﱰﻧﺖ ﻛﻤﻨﺘﺞ ﻣﺘﻜﺎﻣﻞ ﻣﻔﺘﻮح اﳌﺼﺪر ﻷﻏﺮاض ﺗﻌﻠﻴﻤﻴﺔ]‪.[799,800‬‬

‫اﻟﺸﻜﻞ‪ 14-5‬اﳌﺨﻄﻂ اﻟﻨﻈﺮي واﻟﱪﻧﺎﻣﺞ ﻹﺣﺪى اﻷﻣﺜﻠﺔ اﻟﻌﻤﻠﻴﺔ ﰲ دﻟﻴﻞ اﻟﺘﺠﺎرب اﻟﻌﻤﻠﻴﺔ‬

‫‪ 5-3-5‬اﺳﺘﻄﻼع رأي وﺗﻘﻴﻴﻢ ﻟﻠﻨﻈﺎم اﻟﺘﻌﻠﻴﻤﻲ )‪:(Survey and Evaluation of the Educational System‬‬
‫ﺑﺪف ﺗﻘﻴﻴﻢ ﺟﻮدة ﻫﺬا اﻟﻨﻈﺎم وﻣﺪى ﻣﻼﺋﻤﺘﻪ‪ ،‬ﰎ ﺗﻘﺪﱘ ﲨﻠﺔ ﻣﻦ اﳉﻠﺴﺎت اﳌﺨﱪﻳﺔ ﻟ ـ‪ 64‬ﻃﺎﻟﺐ ﻣﻦ ﻃﻼب اﻟﺴﻨﺔ اﻟﺮاﺑﻌﺔ ﰲ ﻗﺴﻢ ﻫﻨﺪﺳﺔ‬
‫اﻟﺘﺤﻜﻢ اﻵﱄ واﻷﲤﺘﺔ ﰲ ﻛﻠﻴﺔ اﳍﻨﺪﺳﺔ اﻹﻟﻜﱰوﻧﻴﺔ‪ ،‬ﺿﻤﻦ ﻣﻘﺮر ﺗﺼﻤﻴﻢ ﻧﻈﻢ اﻟﺘﺤﻜﻢ ﺑﺎﺳﺘﺨﺪام اﳊﺎﺳﺐ ‪ -‬اﻟﻔﺼﻞ اﻟﺜﺎﱐ؛ ﺑﻨﺎءً ﻋﻠﻴﻪ ﰎ‬
‫إﺟﺮاء اﺳﺘﻄﻼع رأي ﻣﺪروس ﻟﻠﻄﻼب ﺣﻮل اﻟﻨﻈﺎم واﳌﻨﻬﺠﻴﺔ‪ ،‬وأﻇﻬﺮت اﻟﻨﺘﺎﺋﺞ اﻧﻄﺒﺎﻋﺎً ﺟﻴﺪاً ﳍﺬا اﻟﻨﻈﺎم ﻋﻠﻰ ﻣﺴﺘﻮى اﳌﻨﻬﺠﻴﺔ واﻟﻔﺎﺋﺪة‬
‫اﻟﻌﻠﻤﻴﺔ واﻟﻌﻤﻠﻴﺔ اﶈﺼﻠﺔ‪ ،‬ﻛﻤﺎ ﻇﻬﺮ أﺛﺮﻩ واﺿﺤﺎً ﻋﻠﻰ ﻣﺴﺘﻮى اﳌﺸﺎرﻳﻊ اﻟﻔﺼﻠﻴﺔ اﻟﱵ ﻋﻤﻞ ﻋﻠﻴﻬﺎ اﻟﻄﻼب‪ ،‬وأﻫﻢ ﻧﺘﺎﺋﺞ اﻻﺳﺘﻄﻼع ﻣﺒﻴﻨﺔ ﻋﻠﻰ‬
‫اﻟﺸﻜﻞ‪ 15-5‬وﻧﺬﻛﺮﻫﺎ ﻓﻴﻤﺎ ﻳﻠﻲ‪:‬‬

‫‪ -‬ﰎ إﺟﺮاء اﻣﺘﺤﺎن أوﱄ ﻟﺘﺤﺪﻳﺪ ﻣﺴﺘﻮى ﻣﻌﺮﻓﺔ اﻟﻄﻼب ﰲ ﺑﺮﳎﺔ اﳌﺘﺤﻜﻤﺎت اﳌﺼﻐﺮة ﻗﺒﻞ اﻟﺒﺪء ﺑﺘﻄﺒﻴﻖ ﻫﺬا اﻟﻨﻈﺎم‪ ،‬وﻛﺎن اﳌﻌﺪل‬
‫اﻟﻮﺳﻄﻲ ﻟﻠﻨﺘﺎﺋﺞ‪ - 5% :‬ﳝﻜﻦ اﻻﻃﻼع ﻋﻠﻰ ﳕﻮذج اﻻﻣﺘﺤﺎن ﰲ اﳌﻠﺤﻖ‪.2-‬‬
‫‪ -‬ﰎ إﺟﺮاء اﻣﺘﺤﺎن �ﺎﺋﻲ أﻇﻬﺮ أن اﻟﺰﻳﺎدة ﰲ ﻣﺴﺘﻮى ﻣﻌﺮﻓﺔ اﻟﻄﻼب ﺑﱪﳎﺔ اﳌﺘﺤﻜﻤﺎت ﺑﻌﺪ اﻧﺘﻬﺎء اﻟﺘﺠﺎرب ‪.85%‬‬

‫‪253‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 Toward a Constructivist Laboratory Education Model | ‫ﳓﻮ ﳕﻮذج ﺑﻨﺎﺋﻲ ﻟﻠﺘﻌﻠﻴﻢ اﳌﺨﱪي‬

.90% :‫ ﻛﺎن ﺗﻘﻴﻴﻢ اﻟﻄﻼب ﻟﻠﺪرﺟﺔ اﻟﱵ ﺳﺎﻫﻢ ﻓﻴﻬﺎ ﻫﺬا اﻟﻨﻈﺎم ﰲ إﻏﻨﺎء ﻣﻌﺮﻓﺘﻬﻢ ﺑﱪﳎﺔ اﳌﺘﺤﻜﻤﺎت اﳌﺼﻐﺮة ﺑﻨﺴﺒﺔ‬-
.96% :‫ ﺎن ﺗﻘﻴﻴﻢ اﻟﻄﻼب ﻟﺪرﺟﺔ اﺳﺘﻔﺎدﻬﺗﻢ ﻣﻦ اﶈﺎﺿﺮات واﻟﺘﺠﺎرب ﺑﻨﺴﺒﺔ‬-
.98% :‫ ﻛﺎن ﺗﻘﻴﻴﻢ اﻟﻄﻼب ﳌﺮوﻧﺔ اﻟﺘﻌﺎﻣﻞ ﻣﻊ ﻟﻮﺣﺔ اﻻﺧﺘﺒﺎر واﻟﺘﺠﺎرب ﺑﻨﺴﺒﺔ‬-
.55% ‫ﻟﻄﻼب اﻟﺬﻳﻦ رﻏﺒﻮا ﰲ اﳊﺼﻮل ﻋﻠﻰ ﻟﻮﺣﺔ اﻟﺘﺠﺎرب اﳋﺎﺻﺔ ﻬﺑﻢ ﻣﻦ ﺧﻼل اﻻﺳﺘﻔﺎدة ﻣﻦ ﻣﻠﻔﺎت اﻟﺘﺼﻤﻴﻢ‬

(N=64) ‫ ﻧﺘﺎﺋﺞ ﺗﻘﻴﻴﻢ اﻟﻨﻈﺎم اﻟﺘﻌﻠﻴﻤﻲ ﻣﻦ ﻗﺒﻞ اﻟﻄﻼب‬15-5‫اﻟﺸﻜﻞ‬

‫ﺗﻘﻴﻴﻤﺎت أﺧﺮى وردت ﻣﻦ اﳌﺼﺎدر اﻟﱵ ﰎ ﻓﻴﻬﺎ ﻧﺸﺮ اﳌﻨﻬﺞ واﳌﻠﻔﺎت اﻟﺘﺼﻤﻴﻤﻴﺔ ﻛﻨﻈﺎم ﻣﻔﺘﻮح اﳌﺼﺪر ﻧﻮرد ﻣﻨﻬﺎ ﺗﻘﻴﻴﻢ اﳌﺪﻳﺮ اﳌﺎﻟﻚ ﻟﺸﺮﻛﺔ‬
:‫( وﻫﻮ ﺑﻨﺼﻪ اﻵﰐ‬Mr. Mark Albert; mark@mcselec.com) MCS Electronic Inc.

«There are a number of courses and books available in various languages at MCS website. However,
the best course is “Programming Embedded Systems Microcontroller” by Walid Balid (R&D
Engineer at AL-AWAIL CO.), because it scores on all points:

 It is well-written and organized into chapters with experiments.

 Very-extensive; the course does not only cover all the AVR hardware options, but it also
covers all relevant basic electronics.
 Dedicated open source hardware was designed along with a great number of experiments
which cover about all the interfaces an engineer could come across, such as: (LCD, I2C, SPI,
keyboard, IR, stepper motors, UART, ADC, 1wire, EEPROM, relays, switches, sound,
DAC, clocks, etc.)
 High quality illustrations of circuits, experiment setup, hardware and software, which make
the theory very clear and simpler to be clearly understood.
 It is free and open source, while such courses could cost thousands of dollars »

Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages 254
‫‪25‬‬ ‫اﻟﻔﺼﻞ اﳋﺎﻣﺲ | ‪Chapter 5‬‬

‫ﺷﺮح ﺿﻌﻒ ﻧﺘﺎﺋﺞ اﻟﻤﺨﺎﺑﺮ اﻟﺘﻄﺒﻴﻘﻴﺔ اﻟﻤﺴﺘﻨﺪة إﻟﻰ ﻧﻈﺮﻳﺔ ﻛﻮﻟﺐ ﻣﻦ وﺟﻬﺔ ﻧﻈﺮ ﺑﻴﺪاﻏﻮﺟﻴﺔ ) ‪Pedagogically‬‬ ‫‪4-5‬‬
‫‪:(Explaining Poor Outcome of Kolb-based Hands-on Lab‬‬
‫ﰲ ﻇﻞ ﺿﻮء ﻧﻈﺮﻳﺔ ‪ Kolb‬ﰲ اﻟﺘﻌﻠﻢ اﻟﺘﺠﺮﻳﱯ]‪ -[545‬اﻟﱵ ﺗﻘﺪم ﺷﺮﺣﻬﺎ ﰲ اﻟﻔﺼﻞ اﳋﺎﻣﺲ‪ ،‬ﻧﺴﺘﻄﻴﻊ أن ﻧﻔﱰض أن ﺿﻌﻒ اﳊﺼﻴﻠﺔ اﻟﺘﻌﻠﻴﻤﻴﺔ‬
‫ﳉﻠﺴﺎت اﻟﺘﻌﻠﻴﻢ اﳌﺨﱪي ‪ -‬اﻟﺬي أﺷﺎرت إﻟﻴﻪ اﻟﺘﻘﺎرﻳﺮ واﻟﺪراﺳﺎت ﺑﺎﺳﺘﻤﺮار ‪ -‬ﳝﻜﻦ أن ﻳﻌﺰى إﱃ ﺿﻌﻒ ﺗﻔﻌﻴﻞ اﻟﺒﻌﺪ ”‪“Prehension‬‬

‫ﻟﻚ ﻗﺒﻞ اﺠﻤﻟﻲء إﱃ اﳌﺨﱪ‪ ،‬وﻟﺬﻟﻚ ﺗﺘﺤﻮل اﳉﻠﺴﺔ اﳌﺨﱪﻳﺔ إﱃ ﻋﻤﻠﻴﺔ ﺗﻨﻔﻴﺬ ﳋﻮارزﻣﻴﺔ ﳏﺪدة ﻣﻦ اﳋﻄﻮات اﳌﻌﺪة ﻣﺴﺒﻘﺎً ﺿﻤﻦ دﻟﻴﻞ اﻟﻌﻤﻞ‬
‫ﻣﻐﺰى وﻫﺪف ﳏﺪد‪.‬‬
‫اﳌﺨﱪي‪ ،‬ﺑﺪﻻً ﻣﻦ أن ﺗﻜﻮن ﺑﻨﺎءً ﻟﻠﻤﻌﺮﻓﺔ ﻣﻦ ﺧﻼل ﻧﺸﺎﻃﺎت ذات ً‬

‫ﻧﻘﺪم ﰲ ﻫﺬا اﻟﻔﺼﻞ ﻃﺮﺣﺎً ﻣﻔﺎدﻩ أن اﺳﺘﺨﺪام اﳌﺨﺎﺑﺮ اﻻﻓﱰاﺿﻴﺔ ﰲ ﻋﻤﻠﻴﺔ اﻟﺘﺤﻀﲑ ﻟﻠﺠﻠﺴﺎت اﳌﺨﱪﻳﺔ ﳝﻜﻦ أن ﻳﺆدي إﱃ ﺗﻨﺸﻴﻂ أﻓﻀﻞ‬
‫ﻟﻠﺒﻌﺪ ”‪ “Prehension‬ﻣﻦ دورة ‪ ،Kolb‬اﻷﻣﺮ اﻟﺬي ﻳﻌﻄﻲ ﺑﺪورﻩ ﺗﻔﻌﻴﻼً أﻓﻀﻞ ﻟﺒﻌﺪ ﻧﻘﻞ اﳌﻌﺮﻓﺔ ”‪ .“Transformation‬ﻟﻠﺘﺤﻘﻖ ﻣﻦ‬
‫ﻫﺬﻩ اﻟﻔﺮﺿﻴﺔ‪ ،‬ﰎ ﺗﺼﻤﻴﻢ اﳋﻄﻮات واﻹﺟﺮاءات اﻟﱰﺑﻮﻳﺔ اﻟﺘﺠﺮﻳﺒﻴﺔ وﺗﻄﺒﻴﻘﻬﺎ ﺑﺎﺳﺘﺨﺪام ﻧﻈﺎم ﻟﻮﺣﺔ اﻟﺘﻄﻮﻳﺮ اﳌﻔﺼﻞ أﻋﻼﻩ ﺿﻤﻦ ﺑﻨﻮد اﻟﻔﻘﺮة‬
‫‪ ،3-6‬وﻗﺪ ﺿﻤﺖ إﺟﺮاءات اﻟﺘﺤﻘﻖ ﻣﺮﺣﻠﺘﲔ أﺳﺎﺳﻴﺘﲔ‪:‬‬

‫اﳌﺮﺣﻠﺔ اﻷوﱃ‪ :‬اﻟﺘﺤﻘﻖ ﻓﻴﻤﺎ إذا ﻛﺎن اﻟﺘﺤﻀﲑ اﳌﺴﺒﻖ ﻟﻠﺘﺠﺮﺑﺔ ﺑﺎﺳﺘﺨﺪام ﳐﱪ اﻓﱰاﺿﻲ )‪ (Virtual Lab‬ﻗﺪ ﻳﺆدي إﱃ ﺗﻔﻌﻴﻞ أﻓﻀﻞ ﻟﻠﺒﻌﺪ‬
‫”‪ “Prehension‬ﻣﻦ دورة ‪.Kolb‬‬

‫اﳌﺮﺣﻠﺔ اﻟﺜﺎﻧﻴﺔ‪ :‬اﻟﺘﺤﻘﻖ ﻣﻦ أن ﳒﺎح اﳌﺮﺣﻠﺔ اﻷوﱃ ﺳﻮف ﻳﺆدي إﱃ ٍ‬

‫ﺗﻔﻌﻴﻞ أﻓﻀﻞ ﻟﻠﺒﻌﺪ ”‪.“Transformation‬‬

‫‪ 1-4-5‬اﳌﺨﱪ اﻻﻓﱰاﺿﻲ ﰲ اﳉﻠﺴﺔ اﻟﺘﺤﻀﲑﻳﺔ )‪:(The Virtual Lab in a Preparation Session‬‬

‫ﳝﻜﻦ إﺟﺮاء اﻟﺘﺤﻀﲑ ﻟﻠﻤﺨﱪ وﻓﻖ ﻃﺮق ﻋﺪﻳﺪة‪ ،‬ﻓﻌﻠﻰ ﺳﺒﻴﻞ اﳌﺜﺎل‪ ،‬ﳝﻜﻦ أن ﻳﻄﻠﺐ ﻣﻦ اﻟﻄﻼب اﻟﺘﺤﻀﲑ ﻋﱪ ﻗﺮاءة اﻟﺘﻌﻠﻴﻤﺎت اﳌﻮﺟﻮدة ﰲ‬
‫دﻟﻴﻞ ﻋﻤﻞ اﳌﺨﱪ‪ ،‬وﳏﺎوﻟﺔ ﺗﻨﻔﻴﺬ ﺑﻌﺾ اﻹﺟﺮاءات اﻟﺘﺠﺮﻳﺒﻴﺔ؛ وﻟﻜﻦ ﻋﻮﺿﺎً ﻋﻦ ذﻟﻚ‪ ،‬ﳝﻜﻦ دﻣﺞ ﻧﻮع ﻣﻦ أﻧﻮاع اﶈﺎﻛﺎة وﻫﻮ اﳌﺨﱪ‬
‫اﻻﻓﱰاﺿﻲ )‪ (Virtual Lab‬ﻣﻊ دﻟﻴﻞ ﻋﻤﻞ اﳌﺨﱪ‪ ،‬إن ﻋﻤﻠﻴﺔ اﻟﺪﻣﺞ اﳌﺬﻛﻮرة ﳝﻜﻦ أن ﺗﻌﻄﻲ ﲢﻀﲑاً أﻓﻀﻞ وذﻟﻚ ﻷﺳﺒﺎب ﻋﺪﻳﺪة‪.‬‬

‫وﻓﻘﺎً ﻟﻨﻈﺮﻳﺔ اﻟﺘﺸﻔﲑ اﳌﺰدوج ﻹدراك اﳌﻌﻠﻮﻣﺎت )‪ – (Dual Coding Theory of Information Cognition‬ﺗﻘﺪم ﺷﺮﺣﻬﺎ ﰲ‬
‫اﻟﻔﺼﻞ اﳋﺎﻣﺲ – ﻓﺈن اﻟﻌﻘﻞ اﻟﺒﺸﺮي ﻳﺪرك وﳜﺰن اﳌﻌﻠﻮﻣﺎت اﻟﻠﻔﻈﻴﺔ واﻟﺒﺼﺮﻳﺔ ﰲ ﻗﻨﺎﺗﲔ ﻣﻨﻔﺼﻠﺘﲔ]‪ ،[539‬واﻻﺳﺘﻔﺎدة ﻣﻦ ﻫﺬا ﰲ اﻟﻌﻤﻠﻴﺎت‬
‫اﻟﺘﻌﻠﻴﻤﻴﺔ ﻫﻮ أن ﻋﻤﻠﻴﺔ دﻣﺞ اﻟﻌﻨﺎﺻﺮ اﳌﺮﺋﻴﺔ ﻣﻊ اﻟﻨﺼﻮص اﳌﻜﺘﻮﺑﺔ )ﻛﺪﻟﻴﻞ ﻋﻤﻞ اﳌﺨﱪ ﻣﺜﻼً( ﳝﻜﻦ أن ﺗﺆدي إﱃ ﺗﻌﻠﻢ أﻓﻀﻞ]‪ ،[532‬ﻛﻤﺎ أن‬
‫اﳌﺨﱪ اﻻﻓﱰاﺿﻲ ﳝﻜﻦ أن ﻳﻜﻮن اﻷداة اﳌﻨﺎﺳﺒﺔ ﻟﻌﺮض ﻣﻜﻮﻧﺎت وﻋﻨﺎﺻﺮ اﻟﺘﺠﺎرب ﺑﺸﻜﻞ ﻣﺮﺋﻲ‪ ،‬وﳝﻜﻦ أﻳﻀﺎً ﻋﺮض ﻣﻌﻠﻮﻣﺎت اﻟﺘﺠﺮﺑﺔ‬
‫ﺑﺮﺳﻮم ﺗﻮﺿﻴﺤﻴﺔ ﻣﺒﺴﻄﺔ‪.‬‬

‫ﺑﺎﻟﻌﻮدة إﱃ ﳕﻮذج ‪ ،VARK‬ﻓﺈن أﺳﺎﻟﻴﺐ ‪ VARK‬اﻟﺘﻌﻠﻴﻤﻴﺔ ﺗﻘﱰح أن ﻫﻨﺎك أرﺑﻊ أﳕﺎط رﺋﻴﺴﻴﺔ ﻟﻠﺘﻌﻠﻢ]‪:[743‬‬
‫اﻟﻘﺮاءة‪/‬اﻟﻜﺘﺎﺑﺔ )‪.(Read/Write‬‬ ‫‹‬
‫اﻟﺘﻌﻠﻢ اﻟﺒﺼﺮي أو اﳌﺮﺋﻲ )‪.(Visual‬‬ ‫‹‬
‫اﻟﺘﻌﻠﻢ اﻟﺸﻔﻬﻲ )‪.(Aural‬‬ ‫‹‬
‫اﻟﺘﻌﻠﻢ اﳊﺮﻛﻲ أو اﻟﺘﻌﻠﻢ اﻟﺘﻔﺎﻋﻠﻲ )‪.(Kinesthetic‬‬ ‫‹‬

‫‪255‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Toward a Constructivist Laboratory Education Model‬‬ ‫ﳓﻮ ﳕﻮذج ﺑﻨﺎﺋﻲ ﻟﻠﺘﻌﻠﻴﻢ اﳌﺨﱪي |‬

‫إن اﻟﺘﺤﻀﲑ ﻣﻦ دﻟﻴﻞ ﻋﻤﻞ اﳌﺨﱪ ﳝﻜﻦ أن ﻳﻨﺎﺳﺐ اﻟﻄﻼب اﻟﺬﻳﻦ ﻳﺘﻤﺘﻌﻮن ﲟﺴﺘﻮى ﻋﺎﱄ ﻣﻦ ﳕﻂ اﻟﺘﻌﻠﻢ ﻗﺮاءة‪-‬ﻛﺘﺎﺑﺔ )‪،(Read/Write‬‬
‫أﻣﺎ إدﺧﺎل اﳌﺨﺎﺑﺮ اﻻﻓﱰاﺿﻴﺔ ﻣﻊ دﻟﻴﻞ ﻋﻤﻞ اﳌﺨﱪ ﰲ ﻋﻤﻠﻴﺔ اﻟﺘﺤﻀﲑ ﻓﻬﻮ ﻳﻨﺎﺳﺐ اﻟﻄﻼب اﻟﺬﻳﻦ ﺗﻜﻮن أﳕﺎط ﺗﻌﻠﻤﻬﻢ ﺑﺼﺮﻳﺔ )‪(Visual‬‬
‫وﺣﺮﻛﻴﺔ )‪ ،(Kinesthetic‬وﻫﺬا ﻳﻌﻮد إﱃ أن اﳌﺨﱪ اﻻﻓﱰاﺿﻲ ﳚﻌﻞ اﻟﺘﺠﺮﺑﺔ ﻣﺮﺋﻴﺔ )‪ ،(Visual style‬وﻛﺬﻟﻚ ﻳﻌﻄﻲ اﻟﻔﺮﺻﺔ ﻟﻠﻄﻼب‬
‫ﻹﺟﺮاء اﻟﺘﺠﺮﺑﺔ ﺑﺸﻜﻞ ﻓﻌﻠﻲ )‪.(Kinesthetic‬‬

‫اﳌﺒﲔ ﻋﻠﻰ اﻟﺸﻜﻞ‪ 16-5‬ﻳﻘﱰح أن ﻣﻌﺪﻻت اﻻﺣﺘﻔﺎظ ﺑﺎﳌﻌﻠﻮﻣﺎت‬ ‫]‪[744‬‬

‫ﳕﻮذج ﻫﺮم اﻟﺘﻌﻠﻢ )‪(The Learning Pyramid Model‬‬
‫ﲣﺘﻠﻒ ﺗﺒﻌﺎً ﻟﻄﺮﻳﻘﺔ اﻟﺘﻌﻠﻢ )ﳏﺎﺿﺮة‪ ،5% :‬ﻗﺮاءة‪ ،10% :‬ﲰﻌﻴﺔ‪-‬ﺑﺼﺮﻳﺔ‪ ،20% :‬اﻟﻌﺮض ﺑﺎﻷﻣﺜﻠﺔ‪ ،30% :‬اﳌﻨﺎﻗﺸﺔ ﺿﻤﻦ ﳎﻤﻮﻋﺔ‪،50% :‬‬
‫اﻟﺘﻌﻠﻢ ﺑﺎﳌﻤﺎرﺳﺔ‪ ،75% :‬ﺗﻌﻠﻴﻢ اﻵﺧﺮﻳﻦ‪.(90% :‬‬

‫اﻟﺸﻜﻞ‪ 16-5‬ﳕﻮذج ﻫﺮم اﻟﺘﻌﻠﻢ وﻣﻌﺪﻻت اﻻﺣﺘﻔﺎظ ﺑﺎﳌﻌﻠﻮﻣﺎت‬

‫وﺑﺎﻟﺘﺎﱄ ﻓﺈن اﳌﺨﱪ اﻻﻓﱰاﺿﻲ ﻳﻌﻄﻲ اﻟﻔﺮﺻﺔ ﻹﺟﺮاء اﻟﺘﺠﺮﺑﺔ واﻟﺘﻌﻠﻢ ﺑﺎﳌﻤﺎرﺳﺔ إﺿﺎﻓﺔً إﱃ اﻟﻘﺮاءة‪ ،‬وﳍﺬا اﻟﺴﺒﺐ ﻳﺆدي إﱃ ﻣﺴﺘﻮى أﻋﻠﻰ‬
‫ﻟﻼﺣﺘﻔﺎظ ﺑﺎﳌﻌﻠﻮﻣﺎت ﻣﻦ اﺳﺘﺨﺪام دﻟﻴﻞ ﻋﻤﻞ اﳌﺨﱪ ﻓﻘﻂ‪.‬‬

‫إن ﺗﻮﻓﲑ ﺟﻠﺴﺎت ﲢﻀﲑﻳﺔ ﻟﻠﻄﻼب ﺑﺎﺳﺘﺨﺪام دﻟﻴﻞ اﻟﺘﺠﺮﺑﺔ واﳌﺨﺎﺑﺮ اﻻﻓﱰاﺿﻴﺔ ﳝﻜﻦ أن ﻳﺴﺎﻋﺪ ﰲ اﻟﺘﻐﻠﺐ ﻋﻠﻰ ﺑﻌﺾ أوﺟﻪ اﻟﻘﺼﻮر‬
‫واﻟﻀﻌﻒ ﰲ اﳌﺨﺎﺑﺮ اﻟﺘﻄﺒﻴﻘﻴﺔ )‪ (Hands-on Labs‬ﻣﺜﻞ اﻹرﻫﺎق اﳌﻌﺮﰲ )‪ (Cognitive Overload‬وﳏﺪودﻳﺔ اﻟﻮﺻﻮل إﱃ ﻋﻨﺎﺻﺮ‬
‫اﻟﺘﺠﺮﺑﺔ ﻣﻜﻮﻧﺎﻬﺗﺎ واﻟﱵ ﻧﻮﻗﺸﺖ ﺳﺎﺑﻘﺎً ﰲ اﻟﻔﺼﻞ اﳋﺎﻣﺲ‪.‬‬

‫ﺑﺎﻹﺿﺎﻓﺔ إﱃ ذﻟﻚ‪ ،‬إن اﺳﺘﺨﺪام اﳌﺨﺎﺑﺮ اﻻﻓﱰاﺿﻴﺔ ﻳﺆﻣﻦ إﻃﺎر اﻟﻌﻤﻞ اﻷﻣﺜﻞ ﻟﺘﺤﻔﻴﺰ اﻟﺘﻔﻜﲑ واﻟﺘﺄﻣﻞ )‪ (Reflection‬ﺧﻼل ﻋﻤﻠﻴﺔ‬
‫اﻟﺘﺤﻀﲑ‪ ،‬وﺑﺎﻟﺘﺎﱄ ﻳﻌﺰز اﻟﺘﺼﻮر واﻟﻔﻬﻢ )‪ (Conceptualization‬وﳛﻘﻖ ﻟﻠﻄﺎﻟﺐ ﺑﻌﺾ ﻣﻦ ﻋﻤﻠﻴﺔ اﻟﺘﻌﻠﻢ ﻣﺴﺒﻘﺎً أﺛﻨﺎء اﳉﻠﺴﺔ اﻟﺘﺤﻀﲑﻳﺔ‬
‫– وذﻟﻚ وﻓﻘﺎً ﻟﻨﻤﻮذج ]‪.Kolb[545‬‬

‫‪ 2-4-5‬اﺳﱰاﺗﻴﺠﻴﺔ ﺗﻄﺒﻴﻖ اﳌﺨﺘﱪ اﻻﻓﱰاﺿﻲ اﻟﺘﺤﻀﲑي )‪:(Conducting the Virtual Pre-Lab Strategy‬‬
‫اﻟﻌﻴﻨﺔ اﻻﺧﺘﺒﺎرﻳﺔ اﻟﻜﻠﻴﺔ ﺿﻤﺖ ‪ 62‬ﻃﺎﻟﺒﺎً‪ ،‬ﰎ ﺗﻮزﻳﻌﻬﻢ ﻋﻠﻰ ﳎﻤﻮﻋﺘﲔ )‪ -1‬ﻤﻟﻤﻮﻋﺔ اﻻﺧﺘﺒﺎرﻳﺔ‪ -2 ،‬ﻤﻟﻤﻮﻋﺔ اﻟﻘﻴﺎﺳﻴﺔ( ﻣﺘﻨﺎﻇﺮﺗﲔ ﻣﻦ ﺣﻴﺚ‬
‫أﻋﻤﺎر اﻟﻄﻼب ﻣﻌﺪﻻﻬﺗوﺟﻨﺴﻬﻢ؛ ﺗﻀﻢ ﻛﻞ ﳎﻤﻮﻋﺔ ﻣﻦ ﻫﺬﻩ اﺠﻤﻟﻤﻮﻋﺎت ‪ 32‬ﻃﺎﻟﺒﺎً وﻃﺎﻟﺒﺔ‪.‬‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪256‬‬
‫‪25‬‬ ‫اﻟﻔﺼﻞ اﳋﺎﻣﺲ | ‪Chapter 5‬‬

‫اﻻﺳﱰاﺗﻴﺠﻴﺔ ﰲ ﺟﻠﺴﺔ اﳌﺨﱪ اﻟﺘﺤﻀﲑﻳﺔ ﳐﺘﻠﻔﺔ ﺑﺎﻟﻨﺴﺒﺔ ﻟﻜﻞ ﳎﻤﻮﻋﺔ‪ ،‬أﻣﺎ اﺳﱰاﺗﻴﺠﻴﺔ ﺟﻠﺴﺔ اﳌﺨﱪ اﻟﺮﺋﻴﺴﻴﺔ ﻓﻬﻲ ﻧﻔﺴﻬﺎ‪ .‬اﻟﺸﻜﻞ‪17-5‬‬
‫ﻳﺒﲔ ﳐﻄﻂ ﺳﲑ اﻟﻌﻤﻞ ﰲ ﻫﺬﻩ اﳌﻨﻬﺠﻴﺔ‪.‬‬

‫‪Classical Group‬‬
‫‪Hand-On‬‬
‫‪Pre-Test‬‬ ‫‪Post-Test‬‬
‫‪Preparing‬‬ ‫‪Lab Session‬‬
‫‪Manual Only‬‬
‫& ‪Simple‬‬ ‫& ‪Strait‬‬
‫‪Experimental Group‬‬ ‫‪General‬‬ ‫‪Deep‬‬
‫‪Quiz‬‬ ‫‪Quiz‬‬
‫‪Preparing‬‬
‫& ‪Manual‬‬

‫اﻟﺸﻜﻞ‪ 17-5‬ﻬﺠﻴﺔ ﻋﻤﻞ اﺠﻤﻟﻤﻮﻋﺔ اﻟﻘﻴﺎﺳﻴﺔ واﻻﺧﺘﺒﺎرﻳﺔ ﺧﻼل اﳌﺨﱪ‬

‫‪ 1-2-4-5‬ﻬﺠﻴﺔ اﺠﻤﻟﻤﻮﻋﺔ اﻟﻘﻴﺎﺳﻴﺔ )‪:(Classical Group Methodology‬‬

‫اﳉﻠﺴﺔ اﻟﺘﻤﻬﻴﺪﻳﺔ )‪ :(Pre-Lab‬ﲤﺘﺪ اﳉﻠﺴﺔ ﻋﻠﻰ ﻣﺪار ﺳﺎﻋﺔ واﺣﺪة ﻓﻘﻂ ﲣﺼﺺ ﺑﺎﻟﻜﺎﻣﻞ ﻟﻘﺮاءة اﻟﺘﺠﺮﺑﺔ ﻣﻦ اﻟﺪﻟﻴﻞ‪.‬‬

‫َﲢ اﺠﻤﻟﻤﻮﻋﺔ ﻗﺒﻞ ﻳﻮم ﻣﻦ اﳉﻠﺴﺔ اﳌﻘﺮرة إﱃ ﺟﻠﺴﺔ ﲤﻬﻴﺪﻳﺔ ﳌﺪة ﺳﺎﻋﺔ واﺣﺪة ﻓﻘﻂ‪.‬‬ ‫‹‬
‫ﻮم ﻫﺬﻩ اﺠﻤﻟﻤﻮﻋﺔ ﺧﻼل اﳉﻠﺴﺔ اﻟﺘﺤﻀﲑﻳﺔ ﺑﺘﺤﻀﲑ اﻟﺘﺠﺎرب اﳌﺘﻌﻠﻘﺔ ﺑﺎﳉﻠﺴﺔ ﻣﻦ ﺧﻼل ﻗﺮاءة دﻟﻴﻞ اﻟﺘﺠﺮﺑﺔ‪.‬‬ ‫‹‬
‫ﻳﻘﻮم اﳌﻌﻠﻢ ﺑﺎﻹﺟﺎﺑﺔ ﻋﻦ ﺗﺴﺎؤﻻت اﻟﻄﻼب ﲟﺎ ﻳﺘﻌﻠﻖ ﲟﻮﺿﻮع دﻟﻴﻞ اﻟﺘﺠﺎرب ﻓﻘﻂ‪.‬‬ ‫‹‬
‫ﻻ ﻳﻄﻠﺐ أي وﻇﺎﺋﻒ أو ﲢﻀﲑ إﺿﺎﰲ ﻣﻨﺰﱄ‪.‬‬ ‫‹‬

‫اﳉﻠﺴﺔ اﻷﺳﺎﺳﻴﺔ‪ :‬ﲤﺘﺪ اﳉﻠﺴﺔ اﻷﺳﺎﺳﻴﺔ ﻋﻠﻰ ﻣﺪار ‪ 120‬دﻗﻴﻘﺔ‪ 18 :‬دﻗﻴﻘﺔ ﻣﺬاﻛﺮة ﲤﻬﻴﺪﻳﺔ ‪ 35 +‬دﻗﻴﻘﺔ ﻣﺬاﻛﺮة أﺳﺎﺳﻴﺔ ‪ 67 +‬دﻗﻴﻘﺔ‬
‫ﺗﺸﻐﻴﻞ اﻟﺘﺠﺎرب ﻋﻠﻰ ﻟﻮﺣﺔ اﻟﺘﻄﻮﻳﺮ واﻹﺟﺎﺑﺔ ﻋﻦ اﻟﺘﺴﺎؤﻻت‪.‬‬

‫ﺮ ﻫﺬﻩ اﺠﻤﻟﻤﻮﻋﺔ إﱃ اﳉﻠﺴﺔ اﻷﺳﺎﺳﻴﺔ ﰲ ﻣﻮﻋﺪﻫﺎ‪.‬‬ ‫‹‬

‫ﻮم اﺠﻤﻟﻤﻮﻋﺔ ﺑﺈﺟﺮاء اﺧﺘﺒﺎر أوﱄ )‪ (Pre-Lab Test‬ﳌﺪة ‪ 18‬دﻗﻴﻘﺔ‪ ،‬ﻳﺘﺴﻢ اﻻﺧﺘﺒﺎر ﺑﻄﺎﺑﻊ ﻋﺎم وﺷﺎﻣﻞ‪.‬‬ ‫‹‬
‫ﻮم اﺠﻤﻟﻤﻮﻋﺔ ﺑﺘﻄﺒﻴﻖ وﺗﺸﻐﻴﻞ اﻟﺘﺠﺎرب ﻋﻠﻰ ﻟﻮﺣﺔ اﻟﺘﻄﻮﻳﺮ ﻣﺒﺎﺷﺮة‪.‬‬ ‫‹‬
‫‪257‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Toward a Constructivist Laboratory Education Model‬‬ ‫ﳓﻮ ﳕﻮذج ﺑﻨﺎﺋﻲ ﻟﻠﺘﻌﻠﻴﻢ اﳌﺨﱪي |‬

‫ﻳﺘﻢ اﻹﺟﺎﺑﺔ ﻋﻦ ﺗﺴﺎؤﻻت اﻟﻄﻼب‪.‬‬ ‫‹‬

‫ﻳﻘﻮم اﻟﻄﻼب ﺑﺈﺟﺮاء اﺧﺘﺒﺎر أﺳﺎﺳﻲ )‪ (Post-Lab Test‬ﳌﺪة ‪ 35‬دﻗﻴﻘﺔ‪ ،‬ﻳﺘﺴﻢ ﺑﻄﺎﺑﻊ ﲣﺼﺼﻲ وﺗﺼﻤﻴﻤﻲ‪.‬‬ ‫‹‬

‫‪ 2-2-4-5‬ﻤﻟﻤﻮﻋﺔ اﻻﺧﺘﺒﺎرﻳﺔ )‪:(Experimental Group Methodology‬‬

‫اﳉﻠﺴﺔ اﻟﺘﻤﻬﻴﺪﻳﺔ )‪ :(Pre-Lab‬ﲤﺘﺪ اﳉﻠﺴﺔ ﻋﻠﻰ ﻣﺪار ﺳﺎﻋﺔ واﺣﺪة ﻓﻘﻂ ﲣﺼﺺ ﺑﺎﻟﻜﺎﻣﻞ ﻟﻘﺮاءة اﻟﺘﺠﺮﺑﺔ ﻣﻦ اﻟﺪﻟﻴﻞ وﺗﻄﺒﻴﻘﻬﺎ ﻋﻠﻰ اﳌﺨﱪ‬
‫اﻻﻓﱰاﺿﻲ ﺑﺎﺳﺘﺨﺪام اﻟﱪﻧﺎﻣﺞ ‪ BASCOM‬ﺑﻴﺌﺔ اﶈﺎﻛﺎة ‪.PROTEUS‬‬

‫َﲢ اﺠﻤﻟﻤﻮﻋﺔ ﻗﺒﻞ ﻳﻮم ﻣﻦ اﳉﻠﺴﺔ اﳌﻘﺮرة إﱃ ﺟﻠﺴﺔ ﲤﻬﻴﺪﻳﺔ ﳌﺪة ﺳﺎﻋﺔ واﺣﺪة ﻓﻘﻂ‪.‬‬ ‫‹‬
‫ﺗﻘﻮم ﻫﺬﻩ ﻤﻟﻤﻮﻋﺔ ﺧﻼل اﳉﻠﺴﺔ اﻟﺘﺤﻀﲑﻳﺔ ﺑﺘﺤﻀﲑ اﻟﺘﺠﺎرب اﳌﺘﻌﻠﻘﺔ ﺑﺎﳉﻠﺴﺔ ﻣﻦ ﺧﻼل اﺗﺒﺎع اﳋﻄﻮات اﳌﺸﺮوﺣﺔ ﰲ اﻟﺪﻟﻴﻞ‬ ‫‹‬
‫وﺗﻨﻔﻴﺬﻫﺎ ﻋﻠﻰ ﺑﻴﺌﺔ اﶈﺎﻛﺎة ‪.Proteus‬‬
‫ﻳﻘﻮم اﻷﺳﺘﺎذ ﺑﺎﻹﺟﺎﺑﺔ ﻋﻦ ﺗﺴﺎؤﻻت اﻟﻄﻼب ﲟﺎ ﻳﺘﻌﻠﻖ ﺑﺪﻟﻴﻞ اﻟﺘﺠﺎرب أو ﺑﻴﺌﺔ اﶈﺎﻛﺎة دون اﻟﺘﻄﺮق إﱃ إﻋﻄﺎء ﺣﻞ ﻣﺒﺎﺷﺮ‬ ‫‹‬
‫ﳌﺸﻜﻠﺔ‪ ،‬وﻳﱰك ﻟﻠﻄﻼب ﺣﻠﻬﺎ‪.‬‬
‫ﻻ ﻳﻄﻠﺐ أي وﻇﺎﺋﻒ أو ﲢﻀﲑ إﺿﺎﰲ ﻣﻨﺰﱄ‪.‬‬ ‫‹‬

‫اﳉﻠﺴﺔ اﻷﺳﺎﺳﻴﺔ‪ :‬ﲤﺘﺪ اﳉﻠﺴﺔ اﻷﺳﺎﺳﻴﺔ ﻋﻠﻰ ﻣﺪار ‪ 120‬دﻗﻴﻘﺔ‪ 18 :‬دﻗﻴﻘﺔ ﻣﺬاﻛﺮة ﲤﻬﻴﺪﻳﺔ ‪ 35 +‬دﻗﻴﻘﺔ ﻣﺬاﻛﺮة أﺳﺎﺳﻴﺔ ‪ 67 +‬دﻗﻴﻘﺔ‬
‫ﺗﺸﻐﻴﻞ اﻟﺘﺠﺎرب ﻋﻠﻰ ﻟﻮﺣﺔ اﻟﺘﻄﻮﻳﺮ واﻹﺟﺎﺑﺔ ﻋﻦ اﻟﺘﺴﺎؤﻻت‪.‬‬

‫ﺮ ﻫﺬﻩ اﺠﻤﻟﻤﻮﻋﺔ إﱃ اﳉﻠﺴﺔ اﻷﺳﺎﺳﻴﺔ ﰲ ﻣﻮﻋﺪﻫﺎ‪.‬‬ ‫‹‬

‫ﻮم اﺠﻤﻟﻤﻮﻋﺔ ﺑﺈﺟﺮاء اﺧﺘﺒﺎر أوﱄ )‪ (Pre-Lab Test‬ﳌﺪة ‪ 18‬دﻗﻴﻘﺔ؛ ﻳﺘﺴﻢ اﻻﺧﺘﺒﺎر ﺑﻄﺎﺑﻊ ﻋﺎم وﺷﺎﻣﻞ‪.‬‬ ‫‹‬
‫ﻮم اﺠﻤﻟﻤﻮﻋﺔ ﺑﺘﻄﺒﻴﻖ وﺗﺸﻐﻴﻞ اﻟﺘﺠﺎرب ﻋﻠﻰ ﻟﻮﺣﺔ اﻟﺘﻄﻮﻳﺮ ﻣﺒﺎﺷﺮة وﻣﻘﺎرﻧﺔ اﻟﻨﺘﺎﺋﺞ ﻣﻊ اﻟﻨﺘﺎﺋﺞ اﻟﱵ ﺣﺼﻠﻮا ﻋﻠﻴﻬﺎ ﰲ اﳉﻠﺴﺔ‬ ‫‹‬
‫اﻟﺘﻤﻬﻴﺪﻳﺔ‪.‬‬
‫ﻳﺘﻢ اﻹﺟﺎﺑﺔ ﻋﻦ ﺗﺴﺎؤﻻت اﻟﻄﻼب )ﻏﺎﻟﺒﺎً ﺗﻜﻮن ﻋﻦ اﳉﺎﻧﺐ اﻟﻌﻤﻠﻲ واﳊﺴﺎﺳﺎت واﻟﻌﻨﺎﺻﺮ اﻟﻔﻴﺰﻳﺎﺋﻴﺔ ﻋﻠﻰ ﻟﻮﺣﺔ اﻟﺘﻄﻮﻳﺮ‪ ،‬ﻷ�ﻢ‬ ‫‹‬
‫ﻗﺎﻣﻮا ﺑﺘﻤﺜﻴﻞ ﻋﻤﻞ ﻫﺬﻩ اﳊﺴﺎﺳﺎت ﰲ ﺑﻴﺌﺔ اﶈﺎﻛﺎة(‪..‬‬
‫ﻳﻘﻮم اﻟﻄﻼب ﺑﺈﺟﺮاء اﺧﺘﺒﺎر أﺳﺎﺳﻲ )‪ (Post-Lab Test‬ﳌﺪة ‪ 35‬دﻗﻴﻘﺔ‪ ،‬ﻳﺘﺴﻢ ﺑﻄﺎﺑﻊ ﲣﺼﺼﻲ وﺗﺼﻤﻴﻤﻲ‪.‬‬ ‫‹‬

‫‪ 3-4-5‬اﻟﺘﺠﺎرب اﻻﺧﺘﺒﺎرﻳﺔ واﻷﻫﺪاف اﻟﺮﺋﻴﺴﻴﺔ ﳍﺎ )‪:(The Experiments and their Main Goals‬‬
‫ﻛﻤﺎ ذﻛﺮﻧﺎ أن اﻟﺪراﺳﺔ اﺷﺘﻤﻠﺖ ﻋﻠﻰ ﺟﻠﺴﺘﲔ ﻣﻦ ﺟﻠﺴﺎت اﳌﺨﱪ اﻟﺮﺋﻴﺴﻴﺔ اﻣﺘﺪت ﻛﻞ ﻣﻨﻬﻤﺎ ﻋﻠﻰ ﻣﺪى ﺳﺎﻋﺘﲔ ﻣﻦ اﻟﺰﻣﻦ‪ ،‬ﺗﻀﻤﻨﺖ‬
‫اﳉﻠﺴﺎت إﺟﺮاء اﻟﺘﺠﺮﺑﺔ اﻟﺴﺎﺑﻌﺔ واﻟﺜﺎﻣﻨﺔ ﻣﻦ دﻟﻴﻞ اﻟﺘﺠﺎرب اﳌﺼﻤﻢ ﻟﻠﻮﺣﺔ اﻟﺘﻄﻮﻳﺮ‪.‬‬

‫اﳉﻠﺴﺔ اﻷوﱃ )اﻟﺘﺠﺮﺑﺔ اﻟﺴﺎﺑﻌﺔ ﰲ اﻟﺪﻟﻴﻞ( ﺗﻀﻤﻨﺖ اﻟﺘﺠﺎرب اﻟﱪﳎﻴﺔ اﳉﺰﺋﻴﺔ اﻟﺘﺎﻟﻴﺔ‪:‬‬

‫‪ -‬ﻗﺮاءة ﺟﻬﺪ دﺧﻞ ﺧﻄﻲ ﺑﺎﺳﺘﺨﺪام اﳌﺪل اﻟﺘﺸﺎﻬﺑﻲ اﻟﺮﻗﻤﻲ )‪.(ADC‬‬

‫‪ -‬رﺑﻂ ﻋﺪة ﻣﻔﺎﺗﻴﺢ ﳊﻈﻴﺔ إﱃ ﻗﻄﺐ ﻣﺘﺤﻜﻢ وﺣﻴﺪ )ﳚﺐ أن ﻳﻜﻮن ﻗﻄﺐ ‪.(ADC‬‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪258‬‬
‫‪25‬‬ ‫اﻟﻔﺼﻞ اﳋﺎﻣﺲ | ‪Chapter 5‬‬

‫‪ -‬رﺑﻂ ﺣﺴﺎس ﻗﻴﺎس اﻟﻀﻐﻂ اﳉﻮي واﻻرﺗﻔﺎع ﻋﻦ ﺳﻄﺢ اﻟﺒﺤﺮ )‪ (Barometer‬إﱃ ﻣﺒﺪل ‪.ADC‬‬
‫‪ -‬رﺑﻂ ﻣﻘﺎوﻣﺔ ذات اﻟﻌﺎﻣﻞ اﳊﺮاري اﻟﺴﺎﻟﺐ ‪ NTC‬ﻣﻊ ﻣﺒﺪل ‪.ADC‬‬
‫‪ -‬ﺎس درﺟﺔ اﳊﺮارة ﰲ اﺠﻤﻟﺎل ‪ -45⁰C ~ +100⁰C‬ﺑﺎﺳﺘﺨﺪام اﳊﺴﺎس ‪.LM35DZ‬‬
‫‪ -‬ﻗﻴﺎس ﺷﺪة اﻹﺿﺎءة ﺑﺎﺳﺘﺨﺪام ﻣﻘﺎوﻣﺔ ﺿﻮﺋﻴﺔ ‪.LDR‬‬
‫‪ -‬ﻴﺎس اﻟﺮﻃﻮﺑﺔ اﻟﻨﺴﺒﻴﺔ ﺑﺎﺳﺘﺨﺪام ﺣﺴﺎس رﻃﻮﺑﺔ ﺗﺸﺎﻬﺑﻲ ﺳﻌﻮي‪.‬‬

‫اﳉﻠﺴﺔ اﻟﺜﺎﻧﻴﺔ )اﻟﺘﺠﺮﺑﺔ اﻟﺜﺎﻣﻨﺔ ﰲ اﻟﺪﻟﻴﻞ( ﺗﻀﻤﻨﺖ اﻟﺘﺠﺎرب اﻟﱪﳎﻴﺔ اﳉﺰﺋﻴﺔ اﻟﺘﺎﻟﻴﺔ‪:‬‬

‫‪ -‬ﻛﺸﻒ ﺟﺒﻬﺎت اﻟﻘﺪح اﳋﺎرﺟﻴﺔ ﻋﻠﻰ أﻗﻄﺎب اﳌﺘﺤﻜﻢ ﺑﺎﺳﺘﺨﺪام اﳌﻘﺎﻃﻌﺎت اﳋﺎرﺟﻴﺔ‪.‬‬
‫‪ -‬ﺗﻄﺒﻴﻘﺎت أﳕﺎط ﻋﻤﻞ اﳌﺆﻗﺘﺎت واﻟﻌﺪادات ﰲ اﳌﺘﺤﻜﻢ اﳌﺼﻐﺮ‪.‬‬
‫‪ -‬ﻣﻘﻴﺎس ﺗﺮددي ‪ 4MHz‬ﺑﺎﻻﻋﺘﻤﺎد ﻋﻠﻰ اﳌﺆﻗﺖ ‪ (8-bit) Time0‬واﻟﻌﺪاد ‪.(16-bit) Timer1‬‬
‫‪ -‬ﻣﻘﻴﺎس ﺳﻌﺎت ‪ 1nF~100uF‬ﺑﺎﻻﻋﺘﻤﺎد ﻋﻠﻰ اﳌﺆﻗﺖ ‪.Timer1‬‬

‫إن ﻛﻞ ﲡﺮﺑﺔ ﻣﻦ اﻟﺘﺠﺎرب اﳉﺰﺋﻴﺔ اﻟﺴﺒﻌﺔ ﰲ اﳉﻠﺴﺔ اﻷوﱃ )اﻟﺘﺠﺮﺑﺔ اﻟﺴﺎﺑﻌﺔ ﰲ اﻟﺪﻟﻴﻞ( واﻟﺘﺠﺎرب اﳉﺰﺋﻴﺔ اﻷرﺑﻌﺔ ﰲ اﳉﻠﺴﺔ اﻟﺜﺎﻧﻴﺔ )اﻟﺘﺠﺮﺑﺔ‬
‫اﻟﺜﺎﻣﻨﺔ ﰲ اﻟﺪﻟﻴﻞ( ﳍﺎ ﺗﻮﻇﻴﻒ ﻋﻤﻠﻲ ﻫﺎم ﺟﺪاً ﰲ اﻟﺘﻄﺒﻴﻘﺎت اﳍﻨﺪﺳﻴﺔ وﱂ ﺗﻮﺿﻊ ﺑﺸﻜﻞ اﻋﺘﺒﺎﻃﻲ‪.‬‬

‫ﺗﺘﻤﺜﻞ اﻷﻫﺪاف اﻟﺮﺋﻴﺴﻴﺔ ﻣﻦ اﳉﻠﺴﺔ اﻷوﱃ ﲟﺎ ﻳﻠﻲ‪:‬‬

‫ﰎ ﺗﻘﺴﻴﻢ اﳉﻠﺴﺔ اﻷوﱃ إﱃ ﺳﺒﻌﺔ ﲡﺎرب ﺟﺰﺋﻴﺔ ﲨﻴﻌﻬﺎ ﺗﺮﻛﺰ ﻋﻠﻰ اﺳﺘﺜﻤﺎر اﳌﺒﺪﻻت ﻟﺘﺸﺎﻬﺑﻴﺔ اﻟﺮﻗﻤﻴﺔ ﰲ اﳌﺘﺤﻜﻤﺎت اﳌﺼﻐﺮة ﻣﻦ اﻟﻌﺎﺋﻠﺔ‬
‫‪.AVR‬‬

‫اﻟﺘﺠﺮﺑﺔ اﻷوﱃ‪ :‬ﺣﻞ ﻣﺒﺘﻜﺮ ﻟﺮﺑﻂ ﻋﺪة ﻣﻔﺎﺗﻴﺢ ﻣﻊ ﻗﻄﺐ وﺣﻴﺪ ﺑﺸﺮط أن ﻳﻜﻮن ﻗﻄﺐ ‪ ،AD‬وﻫﺬا ﻣﻔﻴﺪ ﺟﺪاً ﰲ اﳊﺎﻻت اﻟﱵ ﳛﺘﺎج ﻓﻴﻬﺎ‬
‫إﱃ رﺑﻂ ﻣﻔﺎﺗﻴﺢ وﻻ ﻳﺘﻮﻓﺮ أﻗﻄﺎب ﻓﺎرﻏﺔ ﰲ اﳌﺘﺤﻜﻢ‪.‬‬

‫اﻟﺘﺠﺮﺑﺔ اﻟﺜﺎﻧﻴﺔ‪ :‬ﺗﻮﻟﻴﺪ ﺟﻬﺪ ﺸﺎﻬﺑﻲ ﺧﻄﻲ ﻋﻦ ﻃﺮﻳﻖ ﻣﻘﺎوﻣﺔ دوراﻧﻴﺔ ﻣﺘﻐﲑة‪ ،‬ﳝﻜﻦ أن ﻳﺴﺘﺨﺪم ﻛﺠﻬﺪ ﻣﺮﺟﻌﻲ ﻟﻠﺘﺤﻜﻢ ﺑﺴﺮﻋﺔ ﳏﺮك أو‬
‫اﻟﺘﺤﻜﻢ ﺑﺸﺪة إﺿﺎءة‪...‬‬

‫اﻟﺘﺠﺮﺑﺔ اﻟﺜﺎﻟﺜﺔ إﱃ اﻟﺴﺎﺑﻌﺔ‪ :‬اﻻﺳﺘﺜﻤﺎر اﻟﻌﻤﻠﻲ واﳌﺒﺎﺷﺮ ﳉﻤﻠﺔ ﻫﺬﻩ اﻟﺘﺠﺎرب ﻫﻮ ﻧﻈﺎم أرﺻﺎد ﺟﻮي ﻟﻘﻴﺎس اﳌﺘﻐﲑات اﳌﺘﻤﺜﻠﺔ ﺑﺎﳊﺮارة واﻟﺮﻃﻮﺑﺔ‬
‫واﻟﻀﻐﻂ واﻻرﺗﻔﺎع ﻋﻦ ﺳﻄﺢ اﻟﺒﺤﺮ )‪.(Weather Station‬‬

‫إن ﳎﻤﻞ اﻟﺘﺠﺎرب ﰲ ﻫﺬﻩ اﳉﻠﺴﺔ ﰎ ﺗﻮﻇﻴﻔﻪ ﲟﺸﺮوع ﻋﻤﻠﻲ ﺗﻄﺒﻴﻘﻲ ﻟﺒﻨﺎء ﳏﻄﺔ أرﺻﺎد ﺟﻮﻳﺔ ﻣﺼﻐﺮة وﻣﺰودة ﺑﻨﻈﺎم ﺗﻮﻗﻴﺖ ﰲ اﻟﺰﻣﻦ اﳊﻘﻴﻘﻲ‪،‬‬
‫ﺣﻴﺚ ﻳﺘﻢ إرﺳﺎل اﻟﻘﻴﻢ إﱃ اﳊﺎﺳﺐ ﻋﻦ ﻃﺮﻳﻖ اﻟﱪوﺗﻮﻛﻮل ‪ RS485‬وﲣﺰﻳﻦ اﻟﻘﻴﻢ ﻋﻨﺪ ﻛﻞ ﻗﻴﻤﺔ ﺗﻮﻗﻴﺖ ﰲ ﻧﻈﺎم ‪ .DAQ‬اﻟﺸﻜﻞ‪18-5‬‬
‫ﻳﺒﲔ ﺻﻮرة ﻣﺸﺮوع ﻣﺼﻐﺮ ﻟﻨﻈﺎم ﳏﻄﺔ أرﺻﺎد ﺟﻮﻳﺔ‪.‬‬

‫‪259‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Toward a Constructivist Laboratory Education Model‬‬ ‫ﳓﻮ ﳕﻮذج ﺑﻨﺎﺋﻲ ﻟﻠﺘﻌﻠﻴﻢ اﳌﺨﱪي |‬

‫اﻟﺸﻜﻞ‪ 18-5‬ﻣﺸﺮوع ﻧﻈﺎم ﳏﻄﺔ ارﺻﺎد ﺟﻮﻳﺔ ﻣﺼﻐﺮ‬

‫ﺗﺘﻤﺜﻞ اﻷﻫﺪاف اﻟﺮﺋﻴﺴﻴﺔ ﻣﻦ اﳉﻠﺴﺔ اﻟﺜﺎﻧﻴﺔ ﲟﺎ ﻳﻠﻲ‪:‬‬

‫ﰎ ﺗﻘﺴﻴﻢ اﳉﻠﺴﺔ اﻟﺜﺎﻧﻴﺔ إﱃ ﲬﺲ ﲡﺎرب ﺟﺰﺋﻴﺔ ﺗﺮﻛﺰ ﻋﻠﻰ اﺳﺘﺜﻤﺎر اﳌﻘﺎﻃﻌﺎت اﳋﺎرﺟﻴﺔ واﳌﺆﻗﺘﺎت واﻟﻌﺪادات ﰲ اﳌﺘﺤﻜﻤﺎت اﳌﺼﻐﺮة ﻣﻦ‬
‫اﻟﻌﺎﺋﻠﺔ ‪.AVR‬‬

‫اﻟﺘﺠﺮﺑﺔ اﻷوﱃ‪ :‬اﺳﺘﺜﻤﺎر اﳌﻘﺎﻃﻌﺎت اﳋﺎرﺟﻴﺔ )‪ (External Interrupts‬ﰲ ﻣﺘﺤﻜﻤﺎت اﻟﻌﺎﺋﻠﺔ ‪ AVR‬ﻬﺑﺪف رﺑﻂ ﻣﻔﺎﺗﻴﺢ‪ ،‬أو إدﺧﺎل‬
‫إﺷﺎرات‪ ،‬ﺣﻴﺚ أﻧﻪ ﰲ أﻧﻈﻤﺔ اﻟﺰﻣﻦ اﳊﻘﻴﻘﻲ )‪ (RTS‬ﳚﺐ أن ﻻ ﻳﻨﺸﻐﻞ اﳌﻌﺎﰿ ﺑﺎﻟﺘﻌﻠﻴﻤﺎت اﻟﺸﺮﻃﻴﺔ وﺗﻌﻠﻴﻤﺎت اﻟﺘﺄﺧﲑ اﻟﺰﻣﲏ‪ ،‬ﻟﺬﻟﻚ‬
‫ﺗﺴﺘﺨﺪم اﳌﻘﺎﻃﻌﺎت وﻫﻲ ﻣﻦ أﻫﻢ اﻋﺘﺒﺎرات أﻧﻈﻤﺔ اﻟﺰﻣﻦ اﳊﻘﻴﻘﻲ‪.‬‬

‫اﻟﺘﺠﺮﺑﺔ اﻟﺜﺎﻧﻴﺔ‪ :‬اﺳﺘﺜﻤﺎر وﺑﺮﳎﺔ اﳌﺆﻗﺘﺎت )‪ (Timers‬ﰲ ﻣﺘﺤﻜﻤﺎت اﻟﻌﺎﺋﻠﺔ ‪ ،AVR‬وﻓﻴﻬﺎ ﻳﺘﻢ دراﺳﺔ ﲨﻴﻊ أﳕﺎط ﻋﻤﻞ اﳌﺆﻗﺘﺎت وإﺟﺮاء‬
‫ﺗﻄﺒﻴﻖ )ﲡﺮﺑﺔ( ﻟﻜﻞ ﳕﻂ ﻣﻦ اﻷﳕﺎط ﻟﺘﺪﻋﻴﻢ ﻓﻜﺮة ﻋﻤﻞ اﳌﺆﻗﺖ ﻟﺪى اﻟﻄﺎﻟﺐ‪.‬‬

‫اﻟﺘﺠﺮﺑﺔ اﻟﺜﺎﻟﺜﺔ‪ :‬اﺳﺘﺜﻤﺎر وﺑﺮﳎﺔ اﻟﻌﺪادات )‪ (Counters‬ﰲ ﻣﺘﺤﻜﻤﺎت اﻟﻌﺎﺋﻠﺔ ‪ ،AVR‬وﻓﻴﻬﺎ ﻳﺘﻢ دراﺳﺔ ﲨﻴﻊ أﳕﺎط ﻋﻤﻞ اﳌﺆﻗﺘﺎت وإﺟﺮاء‬
‫ﺗﻄﺒﻴﻖ )ﲡﺮﺑﺔ( ﻟﻜﻞ ﳕﻂ ﻣﻦ اﻷﳕﺎط ﻟﺘﺪﻋﻴﻢ ﻓﻜﺮة ﻋﻤﻞ اﳌﺆﻗﺖ ﻟﺪى اﻟﻄﺎﻟﺐ‪.‬‬

‫اﻟﺘﺠﺮﺑﺔ اﻟﺮاﺑﻌﺔ‪ :‬ﻣﺸﺮوع ﻣﻘﻴﺎس ﺗﺮدد )‪ ،(1Hz~4MHz‬ﻳﺘﻢ ﻓﻴﻪ اﺳﺘﺨﺪام اﳌﺆﻗﺖ ‪ Timer0‬ﰲ ﳕﻂ ﻣﻘﺎﻃﻌﺔ اﻟﻄﻔﺤﺎن ﲝﻴﺚ ﻳﺘﻢ ﺗﻮﻟﻴﺪ‬
‫ﻣﻘﺎﻃﻌﺔ ﻃﻔﺤﺎن ﻛﻞ ‪ ،20uS‬ﺑﻴﻨﻤﺎ ﻳﺴﺘﺨﺪم اﻟﻌﺪاد ‪ Counter1‬ﻛﻌﺪاد أﺣﺪاث ﺧﺎرﺟﻴﺔ ﻋﻠﻰ اﻟﻘﻄﺐ ‪) T1‬ﻣﺪﺧﻞ اﻹﺷﺎرة اﳌﺮاد‬
‫ﻗﻴﺎﺳﻬﺎ(‪ ،‬ﳕﻮذج اﶈﺎﻛﺎة ﻣﺒﲔ ﻋﻠﻰ اﻟﺸﻜﻞ‪.19-5‬‬

‫اﻟﺘﺠﺮﺑﺔ اﳋﺎﻣﺴﺔ‪ :‬ﻣﺸﺮوع ﻣﻘﻴﺎس ﺳﻌﺎت )‪ (1nF~100uF‬ﺑﺎﻻﻋﺘﻤﺎد ﻋﻠﻰ اﳌﺆﻗﺖ ‪ Timer1‬ﰲ ﳕﻂ ﻣﻘﺎﻃﻌﺔ اﻟﻨﻈﲑ ﻟﻠﻤﺆﻗﺖ ‪Timer1‬؛‬
‫ﳕﻮذج اﶈﺎﻛﺎة ﻣﺒﲔ ﻋﻠﻰ اﻟﺸﻜﻞ‪.20-5‬‬

‫ﳑﺎ ﳚﺪر اﻹﺷﺎرة إﻟﻴﻪ ﰲ ﻫﺬا اﳌﻌﺮض أن ﺷﺮح اﻟﻮﺣﺪات اﶈﻴﻄﻴﺔ ﰲ اﳌﺘﺤﻜﻢ اﳌﺼﻐﺮ ﺟﺎء ﺿﻤﻦ ﺳﻴﺎق ﻣﻔﻬﻮﻣﻲ ﻣﺘﻤﺜﻼً ﲟﺜﺎل ﺗﻄﺒﻴﻘﻲ‪ ،‬ﰒ‬
‫ﻳﻠﺤﻖ ﺑﺬﻟﻚ ﺗﺜﺒﻴﺖ وﺗﻮﺿﻴﺢ اﻟﻨﻘﺎط اﻟﻨﻈﺮﻳﺔ اﻷﻋﻤﻖ‪ .‬ﺑﺸﻜﻞ ﻓﻌﻠﻲ ﻓﺈن ﳏﺘﻮى ﻛﻞ ﺟﻠﺴﺔ ﻣﻦ ﻫﺬﻩ اﳉﻠﺴﺎت ﻻ ﳝﻜﻦ اﺣﺘﻮاءﻩ ﰲ ﺟﻠﺴﺔ‬
‫ﳐﱪﻳﺔ وﺣﻴﺪة ﻛﻤﺎ ﻫﻮ اﳊﺎل ﻫﻬﻨﺎ‪ ،‬إﻻ أن اﳉﻠﺴﺔ اﳌﺨﱪﻳﺔ اﻟﺘﺤﻀﲑﻳﺔ ﺳﺎﳘﺖ ﺑﺸﻜﻞ ﻛﺒﲑ ﰲ ﲡﺎوز اﻟﻌﺪﻳﺪ ﻣﻦ اﻟﻌﻘﺒﺎت‪ ،‬وﰲ ﺗﺴﺮﻳﻊ وﲢﺴﲔ‬
‫ﻧﺎﺗﺞ اﻟﺘﻌﻠﻢ واﶈﻔﺰ واﻻﺳﺘﺠﺎﺑﺔ ﻟﻠﻄﻼب‪.‬‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪260‬‬
‫‪25‬‬ ‫اﻟﻔﺼﻞ اﳋﺎﻣﺲ | ‪Chapter 5‬‬

‫ﰲ ﺳﻨﺔ ﺳﺎﺑﻘﺔ ﰎ ﺗﻘﺪﱘ ﳏﺘﻮى اﳉﻠﺴﺔ اﻟﺜﺎﻣﻨﺔ إﱃ ﻃﻼب اﻟﺴﻨﺔ اﻟﺮاﺑﻌﺔ ﻣﻦ ﻧﻔﺲ اﻟﻘﺴﻢ واﻟﺴﻨﺔ‪ ،‬وﱂ ﺗﻄﺒﻖ وﻗﺘﻬﺎ أي ﻣﻨﻬﺠﻴﺔ ﻏﲑ اﳌﻨﻬﺠﻴﺔ‬
‫اﻟﺘﻘﻠﻴﺪﻳﺔ‪ ،‬واﺣﺘﺎج ﺗﻘﺪﱘ ﳏﺘﻮى ﻫﺬﻩ اﳉﻠﺴﺔ إﱃ ﺛﻼث ﺟﻠﺴﺎت ﻛﺎﻣﻠﺔ وﱂ ﺗﺘﻀﻤﻦ ﻣﺸﺎرﻳﻊ ﺣﻘﻴﻘﻴﺔ‪.‬‬

‫اﻟﺸﻜﻞ‪ 19-5‬ﳏﺎﻛﺎة ﻣﺸﺮوع ﻣﻘﻴﺎس اﻟﱰدد )‪(1Hz~4MHz‬‬

‫اﻟﺸﻜﻞ‪ 20-5‬ﳏﺎﻛﺎة ﻣﺸﺮوع ﻣﻘﻴﺎس اﻟﺴﻌﺎت )‪(1nF~100uF‬‬

‫‪ 4-4-5‬ﻣﻨﻬﺠﻴﺔ ﻗﻴﺎس اﻟﻔﻌﺎﻟﻴﺔ )‪:(The Pedagogical Effectiveness Measurement Methodology‬‬

‫إن اﳍﺪف ﻣﻦ ﺗﺼﻤﻴﻢ اﻻﺧﺘﺒﺎر اﻟﺘﻤﻬﻴﺪي )‪ (Pre-Lab Test‬اﻟﺬي ﻳﺘﻢ إﺟﺮاؤﻩ ﻗﺒﻞ اﻟﺒﺪء ﺑﺎﳉﻠﺴﺔ اﻟﺮﺋﻴﺴﻴﺔ اﻟﱵ ﺗﻀﻢ اﳌﺨﺘﱪ اﻟﺘﻄﺒﻴﻘﻲ‬
‫)‪ ،(Hands-on‬ﻫﻮ اﻟﺘﺤﻘﻖ ﻣﻦ ﺗﻔﻌﻴﻞ اﻟﺒﻌﺪ ‪.Prehension‬‬
‫‪261‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Toward a Constructivist Laboratory Education Model‬‬ ‫ﳓﻮ ﳕﻮذج ﺑﻨﺎﺋﻲ ﻟﻠﺘﻌﻠﻴﻢ اﳌﺨﱪي |‬

‫ﺑﺸﻜﻞ ﻣﺸﺎﺑﻪ ﻓﺈن اﳍﺪف ﻣﻦ ﺗﺼﻤﻴﻢ اﻻﺧﺘﺒﺎر اﻟﻼﺣﻖ ﻟﻠﺠﻠﺴﺔ )‪ (Pre-Lab Test‬اﻟﺬي ﻳﺘﻢ إﺟﺮاؤﻩ ﺑﻌﺪ اﻻﻧﺘﻬﺎء ﻣﻦ اﳉﻠﺴﺔ اﻟﺮﺋﻴﺴﻴﺔ ﻫﻮ‬
‫ﻣﻦ أﺟﻞ اﻟﺘﺤﻘﻖ ﻓﻴﻤﺎ إذا ﰎ ﺗﻔﻌﻴﻞ ﳏﻮر ﻧﻘﻞ اﳌﻌﺮﻓﺔ ﰲ دورة ﻛﻮﻟﺐ ﺑﺸﻜﻞ ﻓﻌﺎل‪.‬‬

‫ﺑﺎﳋﻼﺻﺔ ﻓﺈن اﻻﺧﺘﺒﺎر اﻟﺘﻤﻬﻴﺪي ﰎ ﺗﺼﻤﻴﻤﻪ أﺳﺎﺳﺎً ﻟﻘﻴﺎس ﻣﺴﺘﻮى ﲢﻀﲑ اﻟﻄﻼب ﻗﺒﻞ ﺟﻠﺴﺔ اﳌﺨﱪ‪ ،‬ﰲ ﺣﲔ أن اﻻﺧﺘﺒﺎر اﻟﻼﺣﻖ‬
‫ﻟﻠﺠﻠﺴﺔ ﰎ ﺗﺼﻤﻴﻤﻪ ﻟﻘﻴﺎس ﺣﺼﻴﻠﺔ اﻟﺘﻌﻠﻢ ﻟﻠﻄﻼب ﺑﻌﺪ ﺟﻠﺴﺔ اﳌﺨﺘﱪ‪ .‬ﳝﻜﻦ اﻻﻃﻼع ﳕﻮذج ﻋﻦ اﻻﺧﺘﺒﺎر اﻟﺘﻤﻬﻴﺪي واﻻﺧﺘﺒﺎر اﻟﻼﺣﻖ ﰲ‬
‫اﳌﻠﺤﻖ‪.3-‬‬

‫إن ﻣﻨﻬﺠﻴﺔ ﻗﻴﺎس ﻓﻌﺎﻟﻴﺔ أي ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﺗﺸﱰط أن ﺗﻜﻮن أﺎر وﻣﻌﺪﻻت اﻟﻄﻼب ﻣﺘﺴﺎوﻳﺔ ﻟﻜﻼ اﺠﻤﻟﻤﻮﻋﺘﲔ‪ ،‬ﻛﻤﺎ ﺗﺸﱰك أن ﻳﻜﻮن‬
‫اﻟﻄﻼب ﻣﻦ ﺧﻠﻔﻴﺔ ﺗﺮﺑﻮﻳﺔ ﻣﺸﱰﻛﺔ‪.‬‬

‫ ﻋﺪد اﻟﻄﻼب ﰲ اﺠﻤﻟﻤﻮﻋﺔ اﻟﻘﻴﺎﺳﻴﺔ )اﳌﻌﻴﺎرﻳﺔ( ﻫﻮ ‪ N=31‬ﻃﺎﻟﺒﺎً؛ وﻣﺘﻮﺳﻂ أﻋﻤﺎرﻫﻢ ‪ 22.47‬ﺳﻨﺔ؛ واﳌﻌﺪل اﻟﻮﺳﻄﻲ ﳌﻌﺪﻻﺗﻢ اﻟﺪراﺳﻴﺔ‬
‫ﺧﻼل اﻟﺴﻨﻮات اﻟﺪراﺳﻴﺔ اﻟﺜﻼث اﻷوﱃ ﻳﺴﺎوي ‪.66.45%‬‬

‫ ﻋﺪد اﻟﻄﻼب ﰲ اﺠﻤﻟﻤﻮﻋﺔ اﻟﺘﺠﺮﻳﺒﻴﺔ )اﻻﺧﺘﺒﺎرﻳﺔ( ﻫﻮ ‪ N=31‬ﻃﺎﻟﺒﺎً؛ وﻣﺘﻮﺳﻂ أﻋﻤﺎرﻫﻢ ‪ 22.65‬ﻨﺔ؛ واﳌﻌﺪل اﻟﻮﺳﻄﻲ ﳌﻌﺪﻻﻬﺗﻢ‬
‫اﻟﺪراﺳﻴﺔ ﺧﻼل اﻟﺴﻨﻮات اﻟﺪراﺳﻴﺔ اﻟﺜﻼث اﻷوﱃ ﻳﺴﺎوي ‪.67.89%‬‬

‫ﲨﻴﻊ اﻟﻄﻼب ﻣﻦ ﺧﻠﻔﻴﺔ ﺗﻌﻠﻴﻤﻴﺔ واﺣﺪة وﻣﺘﻤﺎﺛﻠﺔ – أي أن ﻟﻐﺔ اﳌﻘﺮر ﻫﻲ اﻟﻠﻐﺔ اﻷم ﻟﻠﻄﻼب واﻟﺴﻨﻮات اﻟﺪراﺳﻴﺔ اﻟﺜﺎﻧﻮﻳﺔ واﳉﺎﻣﻌﻴﺔ ﻣﺸﱰﻛﺔ‬
‫ﰲ ﻣﻨﻬﺎﺟﻬﺎ‪ .‬ﻌﺪل اﻟﻮﺳﻄﻲ ﻟﻨﺘﺎﺋﺞ اﻻﺧﺘﺒﺎرات اﻟﺴﺎﺑﻘﺔ واﻟﻼﺣﻘﺔ ﳉﻠﺴﺔ اﳌﺨﺘﱪ ﻟﻄﻼب اﺠﻤﻟﻤﻮﻋﺘﲔ ﻣﺒﻴﻨﺔ ﺑﺎﳉﺪول‪.1-5‬‬

‫‪Means‬‬ ‫‪Means‬‬
‫‪Variable‬‬
‫‪Classical Group‬‬ ‫‪Experimental Group‬‬
‫‪Students Age‬‬ ‫‪22.74‬‬ ‫‪22.65‬‬
‫‪Previous Years Average‬‬ ‫‪66.45‬‬ ‫‪67.98‬‬
‫‪Pre-Lab 1 Test‬‬ ‫‪79.29‬‬ ‫‪91.13‬‬
‫‪Pre-Lab 2 Test‬‬ ‫‪77.39‬‬ ‫‪91.61‬‬
‫‪Post-Lab 1 Test‬‬ ‫‪83.84‬‬ ‫‪94.74‬‬
‫‪Post-Lab 2 Test‬‬ ‫‪78.29‬‬ ‫‪94.03‬‬

‫اﳉﺪول‪ 1-5‬اﳌﻌﺪﻻت اﻟﻮﺳﻄﻴﺔ ﻷﻋﻤﺎر اﻟﻄﻼب وﻧﺘﺎﺋﺞ اﻻﺧﺘﺒﺎرات وﻣﻌﺪل اﻟﺴﻨﻮات اﻟﺪراﺳﻴﺔ اﻟﺴﺎﺑﻘﺔ )‪(N=31/31‬‬
‫‪Different Outcome‬‬
‫‪Equivalent Groups‬‬

‫‪X‬‬ ‫‪Manual‬‬ ‫‪Hands-on‬‬ ‫‪Y‬‬

‫‪Classical Group‬‬

‫‪Experimental Group‬‬

‫‪X‬‬ ‫‪Manual‬‬ ‫‪Virtual‬‬ ‫‪Hands-on‬‬ ‫‪Yt‬‬

‫اﻟﺸﻜﻞ‪ 21-5‬ﻣﻨﻬﺠﻴﺔ ﻗﻴﺎس اﻟﻔﻌﺎﻟﻴﺔ ﻟﻠﻤﺠﻤﻮﻋﺔ اﻟﻘﻴﺎﺳﻴﺔ واﻻﺧﺘﺒﺎرﻳﺔ ﰲ ﳕﻮذج اﳌﺨﱪ اﻻﻓﱰاﺿﻲ‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪262‬‬
‫‪25‬‬ ‫اﻟﻔﺼﻞ اﳋﺎﻣﺲ | ‪Chapter 5‬‬

‫ﳌﻘﺎرﻧﺔ اﻟﻨﺘﺎﺋﺞ ﻧﻄﺒﻖ اﻻﺧﺘﺒﺎر اﻹﺣﺼﺎﺋﻲ ﻟﻠﻔﺮﺿﻴﺔ ﺑﺎﺳﺘﺨﺪام اﻟﱪﻧﺎﻣﺞ ‪ SPSS‬ﳊﺴﺎب اﻟﻘﻴﻤﺔ اﻟﺪﻻﻟﻴﺔ ‪ p-value‬وﻓﻘﺎً ﻻﺧﺘﺒﺎر‪Mann-‬‬

‫‪Whiteny‬؛ إن ﻧﺘﺎﺋﺞ اﻻﺧﺘﺒﺎر اﻹﺣﺼﺎﺋﻲ ﻟﻠﻤﻨﻬﺠﻴﺔ اﳌﺒﻴﻨﺔ ﻋﻠﻰ اﻟﺸﻜﻞ‪ 21-5‬أﻇﻬﺮت اﻟﺘﺎﱄ‪:‬‬

‫‪ ‬ﺟﺪ ﻓﺮق دﻻﻟﺔ إﺣﺼﺎﺋﻴﺔ ﺑﲔ ﻣﺘﻮﺳﻂ أﻋﻤﺎر اﺠﻤﻟﻤﻮﻋﺔ اﻟﻘﻴﺎﺳﻴﺔ واﺠﻤﻟﻤﻮﻋﺔ اﻻﺧﺘﺒﺎرﻳﺔ )‪.(p=0.475>0.05‬‬

‫‪ ‬ﻻ ﻳﻮﺟﺪ ﻓﺮق دﻻﻟﺔ إﺣﺼﺎﺋﻴﺔ ﺑﲔ ﻣﺘﻮﺳﻂ ﻣﻌﺪﻻت اﻟﻄﻼب ﻟﻠﺴﻨﻮات ﺑﻘﺔ ﻣﻦ اﺠﻤﻟﻤﻮﻋﺔ اﻟﻘﻴﺎﺳﻴﺔ واﺠﻤﻟﻤﻮﻋﺔ اﻻﺧﺘﺒﺎرﻳﺔ‬
‫)‪ p=0.338>0.05‬ﳑﺎ ﻳﻌﲏ أن ﻛﻼ اﺠﻤﻟﻤﻮﻋﺘﲔ ﻣﻦ ﻧﻔﺲ ﻓﻀﺎء اﻟﻌﻴﻨﺔ‪.‬‬

‫‪ ‬ﳌﺘﻮﺳﻂ اﳊﺴﺎﰊ ﻟﻨﺘﺎﺋﺞ اﺠﻤﻟﻤﻮﻋﺔ اﻻﺧﺘﺒﺎرﻳﺔ ﻓﺎق ﺑﺸﻜﻞ واﺿﺢ اﳌﺘﻮﺳﻂ اﳊﺴﺎﰊ ﻟﻨﺘﺎﺋﺞ اﺠﻤﻟﻤﻮﻋﺔ اﻟﻘﻴﺎﺳﻴﺔ ﰲ ﲨﻴﻊ اﻻﺧﺘﺒﺎرات‬
‫اﻟﺴﺎﺑﻘﺔ واﻟﻼﺣﻘﺔ ﳉﻠﺴﺔ اﳌﺨﺘﱪ اﻷﺳﺎﺳﻴﺔ‪.‬‬

‫‪ ‬إن ﻗﻴﻤﺔ اﻟﺪاﻟﺔ ‪ p-value‬ﻟﻨﺘﺎﺋﺞ اﻻﺧﺘﺒﺎرات اﻟﺴﺎﺑﻘﺔ واﻟﻼﺣﻘﺔ ﳉﻠﺴﺔ اﳌﺨﺘﱪ اﻷﺳﺎﺳﻴﺔ أﻇﻬﺮت اﻟﻘﻴﻤﺔ ‪ p=0.00‬واﻟﱵ ﻫﻲ أﻗﻞ‬
‫ﺑﻜﺜﲑ ﻣﻦ ﻋﺘﺒﺔ اﻟﻘﺒﻮل واﻟﺮﻓﺾ اﻟﻘﻴﺎﺳﻴﺔ )‪ ،(p=0.05‬واﻟﺬي ﺑﺪورﻩ ﻳﺸﲑ إﱃ دﻟﻴﻞ ﺣﺘﻤﻲ ‪ 100%‬ﻋﻠﻰ رﻓﺾ اﻟﻔﺮض اﻟﺼﻔﺮي‬
‫وﻳﻘﻮد إﱃ اﻟﻨﺘﺎﺋﺞ اﻟﺘﺎﻟﻴﺔ‪:‬‬

‫‪ (1‬إن ﺟﻠﺴﺔ اﻟﺘﺤﻀﲑ اﳌﺨﱪﻳﺔ )‪ (Pre-Lab‬ﺗﻔﻌﻞ ﺑﺸﻜﻞ ﻛﺒﲑ ﺑُﻌﺪ اﻟﺘﺤﺼﻴﻞ ”‪ “Prehension‬واﻟﺬي ﺑﺪورﻩ ﻳﺆدي إﱃ‬
‫ﲢﺼﻴﻞ إدراﻛﻲ أﻛﱪ ﻟﻨﺎﺗﺞ اﻟﻌﻤﻠﻴﺔ اﻟﺘﻌﻠﻴﻤﻴﺔ‪.‬‬

‫‪ (2‬إن اﳉﻤﻊ ﺑﲔ ﻗﺮاءة دﻟﻴﻞ اﻟﺘﺠﺮﺑﺔ واﳌﺨﱪ اﻻﻓﱰاﺿﻲ )‪ (Virtual‬ﰲ ﺟﻠﺴﺔ اﻟﺘﺤﻀﲑ اﳌﺨﱪﻳﺔ ﻳﺆدي إﱃ ﺣﺼﻴﻠﺔ ﺗﻌﻠﻢ‬
‫أﻓﻀﻞ ﺑﻜﺜﲑ ﻣﻦ اﻻﻛﺘﻔﺎء ﺑﺪﻟﻴﻞ اﻟﺘﺠﺮﺑﺔ ﻓﻘﻂ‪.‬‬

‫‪ (3‬إن ﻟﻠﻤﺨﺘﱪ اﻻﻓﱰاﺿﻲ دور ﻫﺎم ﺟﺪاً ﰲ ﲢﻀﲑ اﻟﻄﻼب ﳉﻠﺴﺔ اﳌﺨﺘﱪ اﻟﺘﻄﺒﻴﻘﻲ )‪ ،(Hands-on‬وﻫﻮ ﻳﻌﺰز ﻣﻦ‬
‫ﺣﺼﻴﻠﺔ اﻟﺘﻌﻠﻢ وﻳﻌﻤﻖ اﻷﺛﺮ اﻹدراﻛﻲ ﳌﻀﻤﻮن اﻟﺘﺠﺮﺑﺔ ﻋﻠﻰ اﳌﺴﺘﻮى اﻟﻨﻈﺮي واﻟﺘﻄﺒﻴﻘﻲ‪.‬‬

‫ﳝﻜﻦ اﻻﻃﻼع ﻋﻠﻰ اﻟﺪراﺳﺔ وﻧﺘﺎﺋﺠﻬﺎ ﻣﻦ وﺟﻬﺔ ﻧﻈﺮ ﺗﺮﺑﻮﻳﺔ ﲝﺜﻴﺔ ﰲ اﻟﺒﺤﺚ]‪.[804‬‬

‫اﻟﺸﻜﻞ‪ 22-5‬ﻳﺒﲔ ﻧﺘﺎﺋﺞ اﻻﺧﺘﺒﺎر اﻹﺣﺼﺎﺋﻲ ﻟﻔﺮﺿﻴﺔ اﳌﺨﺘﱪ اﻻﻓﱰاﺿﻲ وﺟﻠﺴﺎت اﻟﺘﺤﻀﲑ اﳌﺨﱪي‪ ،‬ﺣﻴﺚ أن ﻋﺪد اﻟﻌﻴﻨﺎت ﻫﻮ‬
‫‪.N=31/31‬‬

‫‪263‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Toward a Constructivist Laboratory Education Model‬‬ ‫ﳓﻮ ﳕﻮذج ﺑﻨﺎﺋﻲ ﻟﻠﺘﻌﻠﻴﻢ اﳌﺨﱪي |‬

‫اﻟﺸﻜﻞ ‪ 22-5‬ﻧﺘﺎﺋﺞ اﻻﺧﺘﺒﺎر اﻹﺣﺼﺎﺋﻲ ﻟﻔﺮﺿﻴﺔ اﳌﺨﺘﱪ اﻻﻓﱰاﺿﻲ ودور ﺟﻠﺴﺎت اﻟﺘﺤﻀﲑ اﳌﺨﱪي )‪(N=31/31‬‬

‫ﻧﺤﻮ ﺑﻨﺎء ﻣﺨﺘﺒﺮ ﻫﺠﻴﻦ ﻣﺘﻌﺪد اﻷﻧﻤﺎط )”‪:(Toward a Multi-Style Lab - “Hybrid Lab‬‬ ‫‪5-5‬‬

‫ﻫﺬا اﻟﻨﻮع ﻣﻦ اﳌﺨﺎﺑﺮ ﻳﻀﻢ أﻛﺜﺮ ﻣﻦ ﳕﻂ ﻣﻦ أﳕﺎط اﳌﺨﺎﺑﺮ‪ ،‬وﻗﺪ ﻗﻤﻨﺎ ﺑﺘﺼﻤﻴﻢ اﻟﻨﻤﻮذج اﳋﺎص ﺑﻪ‪ ،‬ﺣﻴﺚ ﻳﻀﻢ ﻫﺬا اﻟﻨﻤﻮذج ﺛﻼث أﳕﺎط‬
‫ﳐﺘﻠﻔﺔ ﻟﻠﻤﺨﺘﱪات وﻫﻲ‪ :‬اﳌﺨﺘﱪ اﻻﻓﱰاﺿﻲ )‪ ،(Virtual Lab‬اﳌﺨﺘﱪ اﻟﺘﻄﺒﻴﻘﻲ )‪ ،(Hands-on‬ﳐﺘﱪ اﻟﺘﻌﻠﻢ ﻋﻦ ﺑﻌﺪ ) ‪Remote‬‬

‫‪ .(Lab‬اﻟﺸﻜﻞ‪ 23-5‬ﺒﲔ اﻟﻌﻼﻗﺔ ﺑﲔ أﻧﻮاع اﳌﺨﺎﺑﺮ وﺗﺼﻨﻴﻔﺎﻬﺗﺎ واﻻرﺗﺒﺎط ﻣﻊ اﻟﻨﻤﻮذج اﳌﻘﱰح ﻟﻠﻤﺨﱪ اﳍﺠﲔ ﻣﺘﻌﺪد اﻷﳕﺎط ‪“Multi-‬‬

‫”‪.mode Hybrid Lab‬‬

‫‪Laboratory Style‬‬

‫‪Structure‬‬ ‫‪Access Mode‬‬

‫‪Standalone‬‬ ‫‪Hands-on‬‬

‫‪Experimental‬‬ ‫‪Expository‬‬ ‫‪Virtual‬‬

‫‪Divergent‬‬ ‫‪Remote‬‬

‫‪Multi-mode Hybrid Lab‬‬

‫اﻟﺸﻜﻞ‪ 23-5‬ﻟﻌﻼﻗﺔ ﺑﲔ أﻧﻮاع اﳌﺨﺎﺑﺮ وﺗﺼﻨﻴﻔﺎﻬﺗﺎ واﻻرﺗﺒﺎط ﻣﻊ اﻟﻨﻤﻮذج اﳌﻘﱰح ﻟﻠﻤﺨﱪ اﳍﺠﲔ ﻣﺘﻌﺪد اﻷﳕﺎط‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪264‬‬
‫‪25‬‬ ‫اﻟﻔﺼﻞ اﳋﺎﻣﺲ | ‪Chapter 5‬‬

‫اﻟﺘﻤﺜﻴﻞ اﻟﺮﻳﺎﺿﻲ ﻟﻠﺤﻠﻘﺔ اﻟﻤﻔﺘﻮﺣﺔ واﻟﻤﻐﻠﻘﺔ )‪:(Open/Close Loop Mathematical Model‬‬ ‫‪6-5‬‬

‫ﻟﻘﺪ ﺗﻘﺪم ﰲ اﻟﻔﺼﻞ اﳋﺎﻣﺲ اﺳﺘﺨﺪام ﻣﻨﻬﺠﻴﺎت ﻫﻨﺪﺳﺔ ﻧﻈﻢ اﻟﺘﺤﻜﻢ )‪ (Control Systems Engineering‬ﰲ اﻟﻌﻠﻮم اﻟﱰﺑﻮﻳﺔ‬
‫واﻟﺘﻌﻠﻴﻤﻴﺔ]‪ ،[623,624‬وﰎ ﺗﻮﺿﻴﺢ اﻟﻌﻼﻗﺔ ﺑﲔ اﻷﲝﺎث اﻟﱰﺑﻮﻳﺔ وﻫﻨﺪﺳﺔ ﻧﻈﻢ اﻟﺘﺤﻜﻢ‪ ،‬ﺣﻴﺚ أن ﻫﻨﺪﺳﺔ ﻧﻈﻢ اﻟﺘﺤﻜﻢ ﺗﻄﺒﻖ ﰲ اﻟﻌﺪﻳﺪ ﻣﻦ‬
‫اﻟﺘﺨﺼﺼﺎت ﻏﲑ اﻟﺘﻘﻠﻴﺪﻳﺔ ﻣﺜﻞ‪ :‬اﻟﺒﻴﻮﻟﻮﺟﻴﺎ]‪ ،[751,752‬اﻻﻗﺘﺼﺎد]‪ ،[753‬اﳌﻮارد اﳌﺎﻟﻴﺔ]‪ ،[754‬اﻟﺴﻴﺎﺳﺔ]‪ ،[755‬اﻹدارة]‪ ،[756‬ﻫﻨﺪﺳﺔ اﻟﱪﳎﻴﺎت]‪،[757‬‬
‫ﻫﻨﺪﺳﺔ اﻷﻧﱰﻧﺖ]‪ ،[758‬اﻟﻌﻠﻮم اﻟﻔﻴﺰﻳﺎﺋﻴﺔ]‪ ،[759‬ﺑﺎﻹﺿﺎﻓﺔ إﱃ ﻋﻠﻮم اﻟﻨﻔﺲ اﻟﺴﻴﻜﻮﻟﻮﺟﻴﺔ]‪ ،[533‬إﻻ أن ﻫﺬﻩ اﳌﻨﻬﺠﻴﺎت ﻣﺎﺗﺰال ذات اﺳﺘﺨﺪام‬
‫ﻧﺎدر ﰲ اﻟﺘﺤﻠﻴﻞ اﻟﻜﻤﻲ ﰲ اﻟﻌﻠﻮم اﻟﺘﺪرﻳﺴﻴﺔ واﻟﺒﻴﺪاﻏﻮﺟﻴﺔ‪ ،‬وذﻟﻚ ﳝﻜﻦ ﻋﺰوﻩ إﱃ ﺗﺸﻜﻚ وإﺣﺠﺎم اﻟﻌﻠﻤﺎء واﻟﺒﺎﺣﺜﲔ اﻟﱰﺑﻮﻳﲔ ﻋﻦ اﺳﺘﺨﺪام‬
‫اﻟﻨﻤﺎذج اﻟﺮﻳﺎﺿﻴﺔ اﻟﺘﺤﻠﻴﻠﻴﺔ ﻟﻮﺻﻒ اﻟﻌﻤﻠﻴﺎت اﻟﺘﻌﻠﻴﻤﻴﺔ )‪.[760](Pedagogical Processes‬‬

‫إن ﻫﺬا اﻹﺣﺠﺎم ﻳﻌﻮد إﱃ ﻛﻮن ﻋﻠﻤﺎء اﻟﻨﻔﺲ‪ ،‬وﺧﺎﺻﺔ اﻟﱰﺑﻮﻳﻮن‪ ،‬ﳝﻴﻠﻮن إﱃ ﻛﻮ�ﻢ ذاﺗﻴﲔ ﻏﲑ ﻣﻮﺿﻮﻋﻴﲔ )‪ (Subjective‬ﻳﺘﺪﺧﻞ اﻟﻌﻨﺼﺮ‬
‫اﻟﺸﺨﺼﻲ ﰲ ﺗﻘﻴﻴﻤﻬﻢ ﻟﻸﺳﺲ واﳌﻨﻬﺠﻴﺎت‪ ،‬ﺣﻴﺚ ﻳﻌﺘﻤﺪون ﻋﻠﻰ اﻟﻄﺮق اﻟﻜﻴﻔﻴﺔ )‪ (Qualitative‬ﰲ اﻟﺘﺤﻠﻴﻞ‪ .‬ﻣﻦ ﺟﺎﻧﺐ آﺧﺮ ﻓﺈن‬
‫اﻟﺒﺎﺣﺜﲔ ﰲ اﻟﻌﻠﻮم اﳍﻨﺪﺳﻴﺔ ﻳﻌﺘﱪون ﻣﻮﺿﻮﻋﻴﲔ )‪ (Objective‬إﱃ ﺣﺪ ﻛﺒﲑ‪ ،‬وﻳﻌﺘﻤﺪون ﻋﻠﻰ اﻟﺘﺤﻠﻴﻞ اﻹﺣﺼﺎﺋﻲ ﺑﺎﺳﺘﺨﺪام اﻟﻄﺮق اﻟﻜﻤﻴﺔ‬
‫)‪ .(Quantitative‬وﻛﻤﺎ ﻫﻮ واﺿﺢ ﻓﺈن ﻫﻨﺎك ﺗﺒﺎﻳﻨﺎً ﻛﺒﲑاً ﺑﲔ ﻛﻼ اﳌﻨﻬﺠﻴﺘﲔ؛ ﻋﻠﻰ ﻛﻞ ﺣﺎل‪ ،‬ﻓﺈن اﻟﻨﻈﺮﻳﺎت اﻟﱰﺑﻮﻳﺔ ﱂ ﺗﻮﺿﻊ ﰲ اﻟﺘﻄﺒﻴﻖ‬
‫اﻟﻌﻤﻠﻲ إﻻ ﺑﻌﺪ دﺧﻮل اﻟﻌﻠﻮم اﻟﺮﻳﺎﺿﻴﺔ واﳍﻨﺪﺳﻴﺔ ﻋﻠﻴﻬﺎ‪ ،‬وﻫﺬا ﻣﺎ أﺻﺒﺢ ﻋﻠﻤﺎء اﻟﱰﺑﻴﺔ واﻟﺘﻌﻠﻴﻢ ﻳﻘﺮوﻧﻪ ﺣﺪﻳﺜﺎً‪.‬‬

‫‪Evaluation‬‬
‫‪Reference‬‬ ‫‪Controller‬‬ ‫‪Educational Process‬‬ ‫‪Outcome‬‬
‫‪+‬‬
‫)‪(Goals‬‬ ‫‪-‬‬ ‫)‪(Teacher‬‬ ‫)‪(Student Learning‬‬

‫‪Sensor‬‬
‫)‪(Assessment‬‬

‫اﻟﺸﻜﻞ‪ 24-5‬ﲤﺜﻴﻞ اﻟﻌﻤﻠﻴﺔ اﻟﺘﻌﻠﻴﻤﺔ ﻛﻨﻈﺎم ﲢﻜﻢ ﰲ اﳊﻠﻘﺔ اﳌﻐﻠﻘﺔ‬

‫‪ 1-6-5‬اﳍﺪف ﻣﻦ ﳕﺎذج ﺗﻌﻠﻢ ﻣﻨﻤﺬﺟﺔ ﻫﻨﺪﺳﻴﺎً )‪:(Why Engineering Models of Learning‬‬

‫إن اﻟﻌﺪﻳﺪ ﻣﻦ اﶈﺎﺿﺮﻳﻦ ﰲ اﻟﺘﻌﻠﻴﻢ اﻟﻌﺎﱄ ﻏﲑ ﻣﺪرﻛﲔ ﻷﳘﻴﺔ اﻟﺘﻐﺬﻳﺔ اﻟﻌﻜﺴﻴﺔ )‪ (Feedback‬واﻟﺘﻘﻴﻴﻢ اﻟﺒﻨﺎﺋﻲ ) ‪Formative‬‬

‫‪ (Assessment‬ﺧﻼل ﻋﻤﻠﻴﺔ اﻟﺘﻌﻠﻴﻢ واﻟﺘﻌﻠﻢ‪ .‬إن ذﻟﻚ ﳝﻜﻦ ﺗﻔﺴﲑﻩ ﻋﻤﻮﻣﺎً ﺑﻜﻮن ﻣﻌﻈﻢ اﶈﺎﺿﺮﻳﻦ ﻟﺪﻳﻬﻢ ﺿﻌﻒ ﰲ ﻓﻬﻢ اﻷﻧﻈﻤﺔ‬
‫اﻟﺪﻳﻨﺎﻣﻴﻜﻴﺔ]‪.[640,761-764‬‬

‫إن اﻟﻨﻤﺎذج اﻟﺮﻳﺎﺿﻴﺔ أﻛﺜﺮ دﻗﺔ ﻣﻦ اﻟﻨﻤﺎذج اﻟﻮﺻﻔﻴﺔ أو اﻟﺘﺼﻮرﻳﺔ اﳌﻔﻬﻮﻣﻴﺔ‪ ،‬وﺑﺎﻟﺘﺎﱄ ﻓﺈﻧﻪ ﻣﻦ ﺧﻼل اﺳﺘﺨﺪام ﻣﻨﻬﺠﻴﺎت ﻧﻈﺮﻳﺔ اﻟﺘﺤﻜﻢ‬
‫ﻟﻨﻤﺬﺟﺔ اﻟﺴﻠﻮك اﻟﻨﻔﺴﻲ اﻻﺟﺘﻤﺎﻋﻲ )‪ (Socio-psychological Behavior‬ﳝﻜﻦ أن ﻳﺆدي إﱃ اﻗﱰاح ﺗﻘﻨﻴﺎت ﲢﻜﻢ ﻋﻠﻰ ﳓﻮ ﻓﻌﺎل‬
‫ﻟﺘﻮﺟﻴﻪ ﻋﻤﻠﻴﺔ اﻟﺘﺤﺼﻴﻞ اﻟﻌﻠﻤﻲ ﳓﻮ ﲢﻘﻴﻖ اﻷﻫﺪاف اﳌﺮﺟﻮة‪.‬‬

‫اﻟﻨﻤﻮذج اﳌﻄﻮر ﰲ ﻫﺬا اﻟﻔﺼﻞ واﻟﺬي ﺳﻴﺘﻢ ﻣﻨﺎﻗﺸﺘﻪ ﻓﻴﻤﺎ ﻳﻠﻲ ﻳﺼﻒ ﺑﻄﺮﻳﻘﺔ رﻳﺎﺿﻴﺔ دﻳﻨﺎﻣﻴﻜﻴﺔ ﻋﻤﻠﻴﺔ اﻟﺘﻌﻠﻢ ﺿﻤﻦ ﳕﻮذﺟﲔ ﳐﺘﻠﻔﲔ ﻟﻠﺘﻌﻠﻴﻢ‬
‫واﻟﺘﻌﻠﻢ؛ ﳕﻮذج اﳊﻠﻘﺔ اﳌﻔﺘﻮﺣﺔ )‪ (Open-loop‬وﳕﻮذج اﳊﻠﻘﺔ اﳌﻐﻠﻘﺔ )‪.(Close-loop‬‬

‫‪265‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Toward a Constructivist Laboratory Education Model‬‬ ‫ﳓﻮ ﳕﻮذج ﺑﻨﺎﺋﻲ ﻟﻠﺘﻌﻠﻴﻢ اﳌﺨﱪي |‬

‫‪ 2-6-5‬ﳕﺬﺟﺔ ﻋﻤﻠﻴﺔ اﻟﺘﻌﻠﻢ ﻫﻨﺪﺳﻴﺎً )‪:(Engineering Modeling of Learning Process‬‬

‫ﻋﻠﻰ اﻟﺮﻏﻢ ﻣﻦ أن ﻋﻤﻠﻴﺔ اﻟﺘﻌﻠﻢ ﻣﻦ ﺣﻴﺚ اﳌﺒﺪأ ﺗﻌﺘﱪ ﻋﻤﻠﻴﺔ دﻳﻨﺎﻣﻴﻜﻴﺔ‪ ،‬إﻻ أن ﻣﻌﻈﻢ اﻟﻨﻤﺎذج اﻟﱰﺑﻮﻳﺔ ﻫﻲ ﳕﺎذج ﺳﺘﺎﺗﻴﻜﻴﺔ ﳎﺮدة‪ .‬إن ﺳﺒﺐ‬
‫ﻛﻮن اﻟﻨﻤﺎذج اﻟﺪﻳﻨﺎﻣﻴﻜﻴﺔ ﻣﺘﻔﻮﻗﺔ ﻋﻠﻰ اﻟﻨﻤﺎذج اﻟﺴﺘﺎﺗﻴﻜﻴﺔ ﻫﻮ أ�ﺎ ﺗﻈﻬﺮ اﻧﺘﻘﺎل اﳊﺎﻟﺔ ﻋﱪ اﻟﺰﻣﻦ وﺗﺘﻴﺢ اﻟﺘﻮﻗﻊ اﳌﺴﺘﻘﺒﻠﻲ ﻟﻠﺤﺎﻟﺔ‪ .‬ﻋﻼوة ﻋﻠﻰ‬
‫ذﻟﻚ ﻓﺈن اﻟﻨﻤﺎذج اﻟﺪﻳﻨﺎﻣﻴﻜﻴﺔ ﲤﻜﻦ ﻣﻦ اﻟﻮﺻﻮل إﱃ ﺗﻘﻨﻴﺎت اﻟﺘﺤﻜﻢ ﺑﺎﳊﺎﻟﺔ واﻟﱵ ﳝﻜﻦ أن ﺗﺆدي إﱃ ﲢﺴﲔ ﻛﺒﲑ ﰲ ﺳﻠﻮك اﻟﻌﻤﻠﻴﺔ‬
‫اﻟﺘﻌﻠﻴﻤﻴﺔ‪.‬‬

‫إن ﻣﻨﻬﺠﻴﺎت اﻟﺘﻌﻠﻢ واﻟﺘﻌﻠﻴﻢ ﳝﻜﻦ ﺑﻨﺎؤﻫﺎ ﰲ ﻃﻴﻒ واﺳﻊ ﻣﻦ اﻟﻄﺮاﺋﻖ واﻷﺳﺎﻟﻴﺐ اﻟﱵ ﺗﺘﻮزع وﻓﻘﺎً ﶈﻮر ذي ﻃﺮﻓﲔ‪:‬‬

‫‪ -‬اﻟﻄﺮف اﻷول ﳝﺜﻞ ﳕﻮذج اﻟﺘﻌﻠﻢ ﰲ اﳊﻠﻘﺔ اﳌﻔﺘﻮﺣﺔ )‪ (Open-loop Learning‬واﻟﺬي ﻳﻘﺎﺑﻞ ﻣﻨﻬﺠﻴﺔ اﻟﺘﻌﻠﻢ ﰲ ﺣﺎل ﻛﻮن‬
‫اﳌﻌﻠﻢ ﳏﻮر اﻟﻌﻤﻠﻴﺔ اﻟﺘﻌﻠﻴﻤﺔ )‪ – (Teacher-centered Approach‬اﳌﻨﻬﺠﻴﺔ اﻟﺘﻘﻠﻴﺪﻳﺔ‪.‬‬
‫‪ -‬اﻟﻄﺮف اﻟﻨﻘﻴﺾ ﳝﺜﻞ ﳕﻮذج اﻟﺘﻌﻠﻢ ﰲ اﳊﻠﻘﺔ اﳌﻐﻠﻘﺔ )‪ (Close-loop Learning‬واﻟﺬي ﻳﻜﻮن ﻓﻴﻪ اﻟﻄﺎﻟﺐ ﳏﻮراً ﻟﻠﻌﻤﻠﻴﺔ‬
‫اﻟﺘﻌﻠﻴﻤﻴﺔ )‪ – (Student-centered Approach‬اﳌﻨﻬﺠﻴﺔ اﻟﺒﻨﺎﺋﻴﺔ اﳊﺪﻳﺜﺔ‪.‬‬

‫إن ﳕﻮذج اﻟﺘﻌﻠﻢ ﰲ ﺣﺎل ﻛﻮن اﳌﻌﻠﻢ ﳏﻮر اﻟﻌﻤﻠﻴﺔ اﻟﺘﻌﻠﻴﻤﺔ ﳝﺜﻞ ﳕﻮذﺟﺎً ﺳﻠﺒﻴﺎً ﻟﻨﻘﻞ اﳌﻌﺮﻓﺔ ﻣﻦ اﳌﺮﺳﻞ )اﳌﻌﻠﻢ( إﱃ اﳌﺴﺘﻘﺒﻞ )اﻟﻄﺎﻟﺐ(‪ ،‬ﻣﺜﻞ‬
‫ﻫﺬا اﻟﻨﻤﻮذج ﻻ ﻳﻌﻄﻲ اﻟﻄﻼب اﻟﻔﺮﺻﺔ ﻟﺒﻨﺎء اﳌﻌﺮﻓﺔ‪ .‬ﻣﻦ ﺟﺎﻧﺐ آﺧﺮ ﻓﺈن اﻟﺘﻘﻴﻴﻢ اﻟﺒﻨﺎﺋﻲ واﻟﺘﻐﺬﻳﺔ اﻟﻌﻜﺴﻴﺔ ﺗﻌﺘﱪ ﺻﻔﺎت ﳑﻴﺰة ﻫﺎﻣﺔ ﻟﻠﺘﻌﻠﻢ‬
‫اﻟﺒﻨﺎﺋﻲ]‪ ،[545‬ﻛﻤﺎ أن ﻋﻤﻠﻴﺔ ﺑﻨﺎء اﳌﻌﺮﻓﺔ ﻫﻲ ﺑﺸﻜﻞ أﺳﺎﺳﻲ ﻣﺴﺆوﻟﻴﺔ اﻟﻄﺎﻟﺐ]‪.[545-551‬‬

‫‪ 1-2-6-5‬ﳕﺬﺟﺔ ﻋﻤﻠﻴﺔ اﻟﺘﻌﻠﻢ ﰲ اﳊﻠﻘﺔ اﳌﻔﺘﻮﺣﺔ )‪:(Modeling of Open-loop Learning Process‬‬

‫ﻗﺒﻞ ﻋﻘﺪﻳﻦ ﻣﻦ اﻟﺰﻣﻦ ﻛﺎن ﻣﻔﻬﻮم اﻟﺘﻌﻠﻢ ‪-‬ﻋﻠﻰ أﻧﻪ ﻋﻤﻠﻴﺔ ﻣﺮاﻛﻤﺔ ﺑﺴﻴﻄﺔ ﻟﻠﻤﻌﺮﻓﺔ ﻳﺘﻢ ﻧﻘﻠﻬﺎ ﻣﻦ اﳌﻌﻠﻢ إﱃ اﻟﻄﺎﻟﺐ‪ -‬ﻣﻬﻴﻤﻨﺎً ﰲ اﻷﲝﺎث‬
‫اﻟﱰﺑﻮﻳﺔ]‪ ،[650‬وﲟﺎ أن اﻟﺘﻌﻠﻢ ﻋﺒﺎرة ﻋﻦ ﻋﻤﻠﻴﺔ ﻣﺮاﻛﻤﺔ ﻟﻠﻤﻌﺮﻓﺔ‪ ،‬ﻓﺈن اﻟﻨﻤﺬﺟﺔ ﳝﻜﻦ أن ﺗﺘﻢ ﺑﺸﻜﻞ ﻣﺸﺎﺑﻪ ﻫﻨﺪﺳﻴﺎً؛ ﻋﻠﻰ ﺳﺒﻴﻞ اﳌﺜﺎل‪ :‬ﻋﻤﻠﻴﺔ‬
‫ﻣﻞء ﺧﺰان ﻛﻤﺎ ﻫﻮ ﻣﻮﺿﺢ ﻋﻠﻰ اﻟﺸﻜﻞ‪.25-5‬‬

‫إن اﳌﻀﺨﺔ ﺳﻮف ﺗﻘﻮم ﺑﻀﺦ اﻟﺴﺎﺋﻞ ﻣﻦ اﳌﺼﺪر إﱃ اﳋﺰان‪ ،‬وﺑﺎﻟﺘﺎﱄ ﻓﺈن إﺷﺎرة اﻟﺪﺧﻞ إﱃ اﳋﺰان ﲤﺜﻞ ﻣﻌﺪل ﺗﺪﻓﻖ اﻟﺴﺎﺋﻞ اﳋﺎرج ﻣﻦ‬
‫اﳌﻀﺨﺔ‪ ،‬ﻛﻤﺎ أن ارﺗﻔﺎع ﻣﺴﺘﻮى اﻟﺴﺎﺋﻞ ﰲ اﳋﺰان ﻫﻮ ﻋﻤﻠﻴﺔ ﻣﺮاﻛﻤﺔ ﺗﻜﺎﻣﻠﻴﺔ ﻟﻠﺘﺪﻓﻖ‪ ،‬وﺑﺎﻟﺘﺎﱄ ﻓﺈن ﺧﺮج اﻟﻨﻈﺎم ﻫﻮ ﻣﺴﺘﻮى اﻟﺴﺎﺋﻞ ﰲ‬
‫اﳋﺰان وﻫﻮ ﻳﻌﺘﻤﺪ ﻋﻠﻰ ﻋﺎﻣﻠﲔ رﺋﻴﺴﻴﲔ‪ :‬ﻣﻌﺪل ﺗﺪﻓﻖ اﻟﺴﺎﺋﻞ ﻣﻦ اﳌﻀﺨﺔ‪ ،‬وﺣﺠﻢ اﳋﺰان‪ .‬إذا اﻓﱰﺿﻨﺎ ﺷﻜﻼً اﺳﻄﻮاﻧﻴﺎً ﻟﻠﺨﺰان ﻓﺈن اﻟﻌﻼﻗﺔ‬
‫ﺑﲔ اﻟﺪﺧﻞ واﳋﺮج ﺗﻌﻄﻰ ﺑﺎﳌﻌﺎدﻟﺔ‪:1-5‬‬

‫𝑌𝑑‬ ‫‪1‬‬
‫=‬ ‫𝑋‬ ‫اﳌﻌﺎدﻟﺔ‪1-5‬‬
‫𝑑𝑑‬ ‫𝐴‬

‫ﺣﻴﺚ ”‪ :“Y‬ﻣﺴﺘﻮى اﻟﺴﺎﺋﻞ ﰲ اﳋﺰان‪ :“X” ،‬ﻣﻌﺪل ﺗﺪﻓﻖ اﻟﺴﺎﺋﻞ‪ :“A” ،‬ﻣﺴﺎﺣﺔ ﻣﻘﻄﻊ اﳋﺰان‪.‬‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪266‬‬
‫‪25‬‬ ‫اﻟﻔﺼﻞ اﳋﺎﻣﺲ | ‪Chapter 5‬‬

‫”‪“X‬‬
‫‪Flow Rate‬‬
‫‪Pump‬‬ ‫‪Input‬‬ ‫‪Output‬‬
‫‪X‬‬ ‫𝑑𝑑 ‪� 𝑋.‬‬ ‫‪Y‬‬
‫”‪“Y‬‬
‫‪Open-loop Process‬‬
‫‪Tank Level‬‬

‫اﻟﺸﻜﻞ‪ 25-5‬ﲤﺜﻴﻞ ﻧﻈﺎم ﺗﻌﺒﺌﺔ ﺧﺰان ﰲ اﳊﻠﻘﺔ اﳌﻔﺘﻮﺣﺔ‬

‫وﺑﺎﻟﺘﺎﱄ ﳝﻜﻦ إﳚﺎد ﻣﺴﺘﻮى اﻟﺴﺎﺋﻞ ﰲ اﳋﺰان ﻛﺘﺎﺑﻊ ﻟﻠﺰﻣﻦ ﲟﻜﺎﻣﻠﺔ اﻟﻄﺮﻓﲔ ﻛﻤﺎ ﻫﻮ ﻣﺒﲔ ﺑﺎﳌﻌﺎدﻟﺔ‪:2-5‬‬

‫𝑌𝑑‬ ‫‪1‬‬ ‫‪1‬‬

‫�‬ ‫= 𝑌 → 𝑑𝑑 ‪. 𝑑𝑑 = � 𝑋.‬‬ ‫𝑑𝑑 ‪� 𝑋 .‬‬ ‫اﳌﻌﺎدﻟﺔ‪2-5‬‬
‫𝑑𝑑‬ ‫𝐴‬ ‫𝐴‬

‫ﺑﻄﺮﻳﻘﺔ ﳑﺎﺛﻠﺔ ﲤﺎﻣﺎً ﳝﻜﻦ ﳕﺬﺟﺔ ﻋﻤﻠﻴﺔ اﻟﺘﻌﻠﻢ ﰲ اﳊﻠﻘﺔ اﳌﻔﺘﻮﺣﺔ ﺣﻴﺚ ﳝﺜﻞ اﳌﻌﻠﻢ ﻣﻀﺨﺔ اﻟﺘﻌﺒﺌﺔ وﻳﻘﻮم ﻋﻠﻰ ﻧﻘﻞ اﳌﻌﻠﻮﻣﺎت ﺧﻼل اﶈﺎﺿﺮات‬
‫ﲟﻌﺪل ﺗﺪﻓﻖ ”‪“X‬؛ ﻫﺬﻩ اﳌﻌﻠﻮﻣﺎت ﻣﻦ اﳌﻔﱰض ﺗﻜﺪﻳﺴﻬﺎ ﰲ ذﻫﻦ اﻟﻄﻼب اﳌﺘﻤﺜﻞ ﺑﺎﳋﺰان‪.‬‬

‫ﺑﺸﻜﻞ ﻋﺎم ﺳﻴﻘﻮم اﳌﻌﻠﻢ ﺑﺘﺼﻤﻴﻢ اﶈﺘﻮى اﻟﺘﻌﻠﻴﻤﻲ وﻣﻌﺪل ﺗﻮﺻﻴﻞ اﳌﻌﻠﻮﻣﺎت إﱃ اﻟﻄﻼب ﺑﻄﺮﻳﻘﺔ ﺗﻔﱰض وﺻﻮل اﻟﻄﻼب إﱃ ﻣﺴﺘﻮى ﳏﺪد‬
‫ﰲ �ﺎﻳﺔ اﳌﺮﺣﻠﺔ‪ ،‬إﻻ أﻧﻪ ﰲ اﻟﺘﻌﻠﻴﻢ اﻟﺘﻘﻠﻴﺪي ﻻ ﻳﻮﺟﺪ ﻧﻈﺎم اﳊﻠﻘﺔ اﳌﻐﻠﻘﺔ – ﻣﺜﻞ اﻟﺘﻘﺪﻳﺮ واﻟﺘﻘﻴﻴﻢ اﻟﻠﺬان ﻳﺸﲑان إﱃ ﻣﺴﺘﻮى اﻹﳒﺎز واﻟﺬي‬
‫ﻫﻮ اﳌﻌﻠﻮﻣﺎت اﻟﱵ ﰎ ﺗﻌﻠﻤﻬﺎ ﺣﻘﻴﻘﺔ ﺑﻨﺠﺎح‪ .‬اﻟﺸﻜﻞ‪ 26-5‬ﻳﺒﲔ ﲤﺜﻴﻼً ﻟﻠﺘﻨﺎﻇﺮ اﻟﻮﻇﻴﻔﻲ ﺑﲔ ﻧﻈﺎم ﻣﻞء اﳋﺰان ﰲ اﳊﻠﻘﺔ اﳌﻔﺘﻮﺣﺔ وﻧﻈﺎم‬
‫اﻟﺘﻌﻠﻴﻢ واﻟﺘﻌﻠﻢ اﻟﺘﻘﻠﻴﺪي‪.‬‬

‫‪Information‬‬

‫‪Teacher‬‬ ‫‪Learning Level‬‬

‫‪Teacher‬‬ ‫‪Information‬‬
‫‪Input‬‬ ‫‪Output‬‬
‫‪Transmission‬‬

‫‪Student‬‬ ‫‪Open-loop Process‬‬

‫اﻟﺸﻜﻞ‪ 26-5‬ﳕﻮذج ﻫﻨﺪﺳﻲ ﻟﺘﻤﺜﻴﻞ ﻧﻘﻞ اﳌﻌﻠﻮﻣﺎت ﰲ ﻧﻈﺎم ﺗﻌﻠﻴﻢ وﺗﻌﻠﻢ ﰲ اﳊﻠﻘﺔ اﳌﻔﺘﻮﺣﺔ‬

‫ﺑﺸﻜﻞ ﻣﺸﺎﺑﻪ ﻟﻠﻨﻤﻮذج ﰲ اﳌﻌﺎدﻟﺔ‪ 1-5‬ﻓﺈﻧﻪ ﳝﻜﻨﻨﺎ ﻛﺘﺎﺑﺔ اﻟﻨﻤﻮذج اﻟﺮﻳﺎﺿﻲ اﻟﺬي ﻳﺼﻒ اﻟﻌﻼﻗﺔ ﺑﲔ إﺷﺎرة اﻟﺪﺧﻞ )اﳌﻌﻠﻢ( واﳌﻌﻠﻮﻣﺎت‬
‫اﳌﻨﺘﻘﻠﺔ إﱃ اﻟﻄﺎﻟﺐ ﺑﺎﻟﻄﺮﻳﻘﺔ اﻟﻜﻼﺳﻴﻜﻴﺔ ﺑﺎﳌﻌﺎدﻟﺔ‪.3-5‬‬

‫𝑖𝑑‬
‫𝑇 ‪= 𝑎.‬‬ ‫اﳌﻌﺎدﻟﺔ‪3-5‬‬
‫𝑑𝑑‬

‫‪267‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Toward a Constructivist Laboratory Education Model‬‬ ‫ﳓﻮ ﳕﻮذج ﺑﻨﺎﺋﻲ ﻟﻠﺘﻌﻠﻴﻢ اﳌﺨﱪي |‬

‫ﺣﻴﺚ ”‪ :“i‬اﳌﻌﻠﻮﻣﺎت اﻟﱰاﻛﻤﻴﺔ ﰲ ذﻫﻦ اﻟﻄﺎﻟﺐ )ﺧﺮج(‪ :“T” ،‬ﻣﻌﺪل اﳌﻌﺮﻓﺔ اﳌﻨﺘﻘﻠﺔ ﻣﻦ اﳌﻌﻠﻢ )ﺳﺮﻋﺔ اﻟﺘﻌﻠﻴﻢ ‪-‬دﺧﻞ(‪ :“a” ،‬ﻣﺘﻐﲑ‬
‫ﳜﺘﻠﻒ ﻣﻦ ﻣﻬﻤﺔ ﺗﻌﻠﻢ ﻷﺧﺮى وﻣﻦ ﻃﺎﻟﺐ ﻵﺧﺮ‪.‬‬

‫ﰲ اﳊﺎﻟﺔ اﻟﻌﺎﻣﺔ ﻳﻌﺘﱪ اﳌﻌﺎﻣﻞ ‪ a‬ﻛﺜﺎﺑﺖ )ﻛﻤﺎ ﰲ اﳌﻌﺎدﻟﺔ‪ (1-5‬ﳝﺜﻞ ﻣﻌﺪل ﻗﺎﺑﻠﻴﺔ اﻟﺘﻌﻠﻢ اﳌﻔﱰض ﻟﻠﻄﻼب‪ .‬أﻣﺎ اﳌﺘﺤﻮل ‪ i‬ﻓﻴﻤﺜﻞ اﳌﻌﺮﻓﺔ‬
‫اﳌﻜﺎﻣﻠﺔ اﳌﻔﱰﺿﺔ ﰲ ذﻫﻦ اﻟﻄﺎﻟﺐ واﳌﻄﺎﺑﻘﺔ ﻟﻠﻜﻢ اﻟﺬي ﻳﻘﺪﻣﻪ اﳌﻌﻠﻢ دون أي ﺿﻴﺎﻋﺎت؛ وﺑﺎﻟﺘﺎﱄ ﻓﺈن ﻫﺬا اﻟﻨﻤﻮذج اﳌﺘﻤﺜﻞ ﺑﺎﳌﻌﺎدﻟﺔ‪3-5‬‬
‫ﳝﺜﻞ اﳌﻌﺮﻓﺔ اﳌﻨﺘﻘﻠﺔ ﻣﻦ اﳌﻌﻠﻢ واﻟﱵ ﻫﻲ ﻟﻴﺴﺖ ﺑﺎﻟﻀﺮورة ﻣﻘﺪار اﻟﺘﻌﻠﻢ اﻟﻔﻌﻠﻲ‪ ،‬ﻛﻤﺎ أﻧﻪ ﻣﻦ اﻟﻮاﺿﺢ أن اﳌﺘﺤﻜﻢ اﻟﺮﺋﻴﺴﻲ ﰲ ﻋﻤﻠﻴﺔ اﻟﺘﻌﻠﻢ ﰲ‬
‫ﻫﺬا اﻟﻨﻤﻮذج ﻫﻮ اﳌﻌﻠﻢ‪.‬‬

‫‪ 1-1-2-6-5‬ﲢﻠﻴﻞ ﳕﻮذج اﻟﺘﻌﻠﻢ ﰲ اﳊﻠﻘﺔ اﳌﻔﺘﻮﺣﺔ )‪:(Analyzing of Open-loop Learning Model‬‬

‫ﺳﻮف ﻧﻘﻮم ﻓﻴﻤﺎ ﻳﻠﻲ ﺑﺘﺤﻠﻴﻞ ﳕﻮذج اﻟﺘﻌﻠﻢ ﰲ اﳊﻠﻘﺔ اﳌﻔﺘﻮﺣﺔ ﺑﺎﺳﺘﺨﺪام اﶈﺎﻛﺎة‪ ،‬وﻳﻮﺟﺪ ﻟﺪﻳﻨﺎ ﻫﻨﺎ ﳕﻄﲔ‪:‬‬

‫‪ -‬ﲢﻠﻴﻞ ﺗﺄﺛﲑ اﻻﺧﺘﻼف ﰲ ﻣﻘﺪرة اﻟﻄﻼب ﻋﻠﻰ اﻟﺘﻌﻠﻢ‪.‬‬

‫‪ -‬ﲢﻠﻴﻞ ﺗﺄﺛﲑ ﻣﻌﺎﻣﻞ اﻟﻨﺴﻴﺎن ﻋﻠﻰ اﻻﺣﺘﻔﺎظ ﺑﺎﳌﻌﻠﻮﻣﺎت‪.‬‬

‫‪ 1-1-1-2-6-5‬ﲢﻠﻴﻞ أﺛﺮ اﻻﺧﺘﻼف ﰲ ﻗﺎﺑﻠﻴﺔ اﻟﺘﻌﻠﻢ ﻟﻠﻄﻼب‬

‫)‪:(The Impact of the Difference in Students’ Learning Capability‬‬
‫إذا اﻓﱰﺿﻨﺎ أن اﳌﻌﺪل اﻟﻮﺳﻄﻲ ﻗﺎﺑﻠﻴﺔ اﻟﺘﻌﻠﻢ اﻟﻔﻌﻠﻴﺔ )ﺗﺮاﻛﻢ اﳌﻌﻠﻮﻣﺎت ذﻫﻨﻴﺎً( ﻟﻠﻄﺎﻟﺐ ﰲ ﳕﻮذج ﺗﻌﻠﻴﻤﻲ ﺑﺎﳊﻠﻘﺔ اﳌﻔﺘﻮﺣﺔ ﻫﻮ ﲝﺪود ‪50%‬‬

‫ﻣﻦ اﳌﻌﺪل اﳌﻔﱰض اﻟﻜﻠﻲ‪ ،‬أي ‪ a = 0.5‬وﻓﻘﺎً ﻟﻠﻤﻌﺎدﻟﺔ‪3-5‬؛ وﺑﺎﻟﺘﺎﱄ ﰲ ﻫﺬﻩ اﳊﺎﻟﺔ ﺳﻴﻜﻮن اﻟﺘﻘﺪم ﰲ ﻋﻤﻠﻴﺔ ﻧﻘﻞ اﳌﻌﻠﻮﻣﺎت أﺑﻄﺄ ﲟﻌﺪل‬
‫‪ 50%‬إذا ﺗﻮﺟﺐ ﻋﻠﻰ اﳌﻌﻠﻢ ﻣﻼﺣﻈﺔ ﺗﺄﺧﺮ اﻟﻄﻼب ذوي اﳌﺴﺘﻮى اﻷﻗﻞ‪ ،‬اﻷﻣﺮ اﻟﺬي ﺳﻴﻌﻴﻖ اﻛﺘﻤﺎل اﳌﻘﺮر اﳌﺘﻮﺟﺐ إ�ﺎﺋﻪ وﻓﻖ اﳉﺪول‬
‫اﻟﺰﻣﲏ اﳌﻘﺮر ﻟﻪ؛ ﻣﻦ ﺟﺎﻧﺐ آﺧﺮ إذا ﲡﺎﻫﻞ اﳌﻌﻠﻢ ﻫﺬا اﳌﻘﺪار ﰲ ﺗﺄﺧﺮ اﻟﻄﻼب ذوي اﳌﺴﺘﻮى اﻷﻗﻞ وﺗﺎﺑﻊ وﻓﻘﺎً ﳌﺴﺘﻮى اﻟﻄﻼب ذوي‬
‫اﳌﻘﺪرة اﻷﻋﻠﻰ )‪ ،(100%‬ﻓﺈن ﻓﺎرﻗﺎً ﻛﺒﲑاً ﺳﻴﻼﺣﻆ ﰲ ﻣﺴﺘﻮى اﻟﻄﻼب – ﺳﻴﺤﺼﻞ اﻟﻄﻼب اﻷﺿﻌﻒ ﻧﺼﻒ اﳌﻌﺮﻓﺔ اﳌﻜﺘﺴﺒﺔ ﻓﻘﻂ‪ ،‬وﻟﻦ‬
‫ﺴﺘﻄﻴﻊ اﳌﻌﻠﻢ اﻟﺘﺤﻜﻢ ﻬﺑﺬا اﻟﺘﺄﺧﺮ‪ .‬اﻟﺸﻜﻞ‪ 27-5‬ﻳﺒﲔ ﻧﺘﺎﺋﺞ اﶈﺎﻛﺎة ﻟﻠﻨﻤﻮذج اﳌﺘﻤﺜﻞ ﺑﺎﳌﻌﺎدﻟﺔ‪ ،3-5‬ﺣﻴﺚ ﳝﺜﻞ اﳌﻨﺤﲏ ﺑﺎﻟﻠﻮن اﻷﲪﺮ‬
‫ﻣﻌﺪل اﻟﺘﻘﺪم اﳊﻘﻴﻘﻲ ﻟﻠﻄﻼب ﻣﻘﺎﺑﻞ اﳌﻌﺪل اﳌﻔﱰض ﲢﻘﻴﻘﻪ ﺑﺎﻟﻠﻮن اﻷزرق‪.‬‬

‫اﻟﺸﻜﻞ‪ 27-5‬ﳏﺎﻛﺎة أﺛﺮ اﻻﺧﺘﻼف ﰲ ﻗﺎﺑﻠﻴﺔ اﻟﺘﻌﻠﻢ ﻟﻠﻄﻼب ﻟﻨﻤﻮذج ﺗﻌﻠﻴﻤﻲ ﺑﺎﳊﻠﻘﺔ اﳌﻔﺘﻮﺣﺔ‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪268‬‬
‫‪25‬‬ ‫اﻟﻔﺼﻞ اﳋﺎﻣﺲ | ‪Chapter 5‬‬

‫‪ 2-1-1-2-6-5‬ﲢﻠﻴﻞ أﺛﺮ ﻣﻌﺎﻣﻞ اﻟﻨﺴﻴﺎن ﻋﻠﻰ اﻻﺣﺘﻔﺎظ ﺑﺎﳌﻌﻠﻮﻣﺎت‬

‫)‪:(The Impact of the Forgetting Factor on Information Retention‬‬
‫ﺗﻘﺪم ﰲ اﻟﻔﺼﻞ اﳋﺎﻣﺲ ﺿﻤﻦ ﻋﻨﺎﺻﺮ اﻟﻨﻈﺮﻳﺔ اﻹدراﻛﻴﺔ أﺛﺮ ﻣﻌﺎﻣﻞ اﻟﻨﺴﻴﺎن ﻋﻠﻰ اﻻﺣﺘﻔﺎظ ﺑﺎﳌﻌﻠﻮﻣﺎت‪ ،‬وﻋﻨﺎﺻﺮ ﻧﻈﺮﻳﺔ ﻣﻌﺎﳉﺔ اﻟﺒﻴﺎﻧﺎت‬
‫وآﻟﻴﺔ ﲣﺰﻳﻨﻬﺎ ﰲ اﻟﺬاﻛﺮة اﻟﺒﺸﺮﻳﺔ‪ ،‬وﻛﻴﻒ أن ﻋﻤﻠﻴﺔ ﻧﺴﻴﺎن اﳌﻌﻠﻮﻣﺎت وﺗﺬﻛﺮﻫﺎ ﺗﺘﻢ ﺑﺸﻜﻞ أﺳﻲ‪.‬‬

‫ﰲ دراﺳﺘﻨﺎ اﻟﺘﺤﻠﻴﻠﻴﺔ ﻫﺬﻩ ﺳﻨﺄﺧﺬ ﳕﻮذج ﻣﻌﺎﻣﻞ اﻟﻨﺴﻴﺎن اﻷﺳﻲ ﻟـ ـ‪[765] Ebbinghaus‬وﻳﻌﻄﻰ ﺑﺎﳌﻌﺎدﻟﺔ‪.4-5‬‬

‫𝑡𝑏‪𝑚(𝑑) = 𝑐 . 𝑒 −‬‬ ‫اﳌﻌﺎدﻟﺔ‪4-5‬‬

‫ﺣﻴﺚ أن‪ :“m” :‬اﳌﻌﻠﻮﻣﺎت اﳌﺴﺘﺬﻛﺮة ﺑﻌﺪ اﻧﻘﻀﺎء زﻣﻦ ‪t‬؛ ”‪ :“c‬ﻛﻤﻴﺔ اﳌﻌﻠﻮﻣﺎت اﳌﺴﺘﺬﻛﺮة ﰲ وﻗﺖ ﺣﻔﻈﻬﺎ ‪t=0‬؛ ”‪ :“b‬ﻣﻌﺪل اﳊﻔﻆ‬
‫وﻫﻮ ﻋﺎﻣﻞ ﻳﺘﺄﺛﺮ ﺑﺎﻟﻌﺪﻳﻞ ﻣﻦ اﻟﻌﻮاﻣﻞ اﻷﺧﺮى ﻣﺜﻞ‪ :‬درﺟﺔ ﺗﻌﻘﻴﺪ اﳌﻌﻠﻮﻣﺎت اﶈﻔﻮﻇﺔ‪ ،‬ﻗﻠﺔ اﻟﻨﻮم واﻹﺟﻬﺎد ﺧﻼل ﻣﺮاﺣﻞ ﻋﻤﻠﻴﺔ اﳊﻔﻆ‪،‬‬
‫اﻟﻌﻼﻗﺔ ﺑﲔ اﳌﻌﻠﻮﻣﺎت اﻟﱵ ﻳﺘﻢ ﺣﻔﻈﻬﺎ ﻣﻊ ﻣﻌﻠﻮﻣﺎت ﺳﺎﺑﻘﺔ ﳐﺰﻧﺔ ﰲ اﻟﺬاﻛﺮة ﻃﻮﻳﻠﺔ اﻷﻣﺪ )‪.(Long-term Memory‬‬

‫ﰲ ﺣﺎﻟﺔ ﳕﻮذج اﳊﻠﻘﺔ اﳌﻔﺘﻮﺣﺔ ﻳﺘﻢ ﺗﻠﻘﻲ اﳌﻌﻠﻮﻣﺎت ﻣﺮة واﺣﺪة ﻓﻘﻂ ﺧﻼل اﶈﺎﺿﺮة وﻻ ﻳﺘﻢ ﻣﺮاﺟﻌﺘﻬﺎ‪ ،‬وﺑﺎﻟﺘﺎﱄ ﻓﺈن اﳌﻌﻠﻮﻣﺎت اﶈﺘﻔﻈﺔ ﰲ‬
‫ذﻫﻦ اﻟﻄﺎﻟﺐ ﺗﺘﺄﺛﺮ واﻗﻌﻴﺎً ﺑﺸﻜﻞ ﻛﺒﲑ ﲟﻌﺎﻣﻞ اﻟﻨﺴﻴﺎن‪ ،‬وﻋﻠﻴﻪ ﻓﺈن ﻣﻌﺎدﻟﺔ ﻣﻨﺤﲏ اﻟﻨﺴﻴﺎن اﳌﻮﺻﻮف ﺑﺎﳌﻌﺎدﻟﺔ‪ 4-5‬ﳚﺐ ﻣﻜﺎﻣﻠﺘﻪ ﻣﻊ اﳌﻌﺎدﻟﺔ‬
‫اﻟﺘﻔﺎﺿﻠﻴﺔ ﻟﻨﻤﻮذج اﻟﺘﻌﻠﻢ ﰲ اﳊﻠﻘﺔ اﳌﻔﺘﻮﺣﺔ ﻟﻠﺤﺼﻮل ﻋﻠﻰ اﳌﻌﻠﻮﻣﺎت اﳌﺴﺘﺬﻛﺮة ﻓﻌﻠﻴﺎً ”‪ “y‬ﺑﻌﺪ زﻣﻦ ‪ – t‬اﳌﻌﺎدﻟﺔ‪.5-5‬‬

‫𝑡𝑏‪𝑦 = 𝑑 . 𝑚(𝑡) = 𝑑 . 𝑒 −‬‬ ‫اﳌﻌﺎدﻟﺔ‪5-5‬‬

‫ﻋﻤﻠﻴﺎً ﳝﻜﻦ ﲤﺜﻴﻞ ﻣﻌﺎﻣﻞ اﻟﻨﺴﻴﺎن ﰲ ﳕﻮذج اﳌﻀﺨﺔ واﳋﺰان ﺑﺘﺴﺮب ﳛﺼﻞ ﰲ اﳋﺰان ﳝﻜﻦ ﲤﺜﻴﻠﻪ ﺑﺎﳌﻌﺎدﻟﺔ‪.6-5‬‬

‫𝑌𝑑‬ ‫‪1‬‬
‫=‬ ‫;) 𝑡𝑢𝑜𝑋 ‪(𝑋 −‬‬ ‫𝑌√ ‪𝑋𝑜𝑢𝑡 = 𝑘 .‬‬ ‫اﳌﻌﺎدﻟﺔ‪6-5‬‬
‫𝑑𝑑‬ ‫𝑛𝑖 𝐴‬
‫ﺣﻴﺚ أن‪ :𝑋𝑖𝑛 :‬ﻣﻌﺪل ﺗﺪﻓﻖ اﳌﻌﻠﻮﻣﺎت؛ 𝑡𝑢𝑜𝑋‪ :‬ﻣﻌﺪل اﻻرﺗﺸﺎح؛ ‪ :k‬ﺛﺎﺑﺖ ﻳﻌﺘﻤﺪ ﻋﻠﻰ ﻃﺒﻴﻌﺔ ﻗﻴﻤﺔ اﻻرﺗﺸﺎح‪.‬‬

‫ﺑﻨﺎءً ﻋﻠﻴﻪ ﻓﺈن ﳕﻮذج اﻟﺘﻌﻠﻢ ﰲ اﳊﻠﻘﺔ اﳌﻔﺘﻮﺣﺔ اﻟﺬي ﻳﺄﺧﺬ ﺑﻌﲔ اﻻﻋﺘﺒﺎر ﻣﻌﺎﻣﻞ اﻟﻨﺴﻴﺎن ﳝﻜﻦ ﲤﺜﻴﻠﻪ ﺑﺎﳌﻌﺎدﻟﺔ‪.7-5‬‬

‫𝑑𝑑‬ ‫اﳌﻌﺎدﻟﺔ‪7-5‬‬
‫;)𝑓 ‪= 𝑎 (𝑇 −‬‬ ‫𝑑√ ‪𝑓 = 𝑘 .‬‬
‫𝑑𝑑‬
‫ﺣﻴﺚ أن‪ f :‬ﻣﻌﺎﻣﻞ اﻟﻨﺴﻴﺎن وﻫﻮ ﺗﺎﺑﻊ ﻟﻠﻤﻌﻠﻮﻣﺎت اﳌﺴﺘﺬﻛﺮة‪.‬‬

‫اﻟﺸﻜﻞ‪ 28-5‬ﻳﺒﲔ ﻧﺘﺎﺋﺞ اﶈﺎﻛﺎة ﻟﻠﻨﻤﻮذج اﳌﺘﻤﺜﻞ ﺑﺎﳌﻌﺎدﻟﺔ‪ 7-5‬ﺣﻴﺚ أﻇﻬﺮت ﻧﺘﺎﺋﺞ اﶈﺎﻛﺎة ﳌﻌﻠﻮﻣﺎت ﰎ ﳏﺎﺿﺮﻬﺗﺎ ﺧﻼل ﺳﺎﻋﺔ ﻣﻦ اﻟﺰﻣﻦ‬
‫اﺳﺘﻨﺰاﻓﺎً ﰲ اﻹﺑﻘﺎء ﻋﻠﻰ اﳌﻌﻠﻮﻣﺎت ﺧﻼل ﺳﺒﻌﺔ أﻳﺎم ﻓﻘﻂ‪ ،‬ﺣﻴﺚ ﳝﺜﻞ اﳌﻨﺤﲏ اﻷﲪﺮ واﻷزرق ﻗﻴﻤﺎً ﳐﺘﻠﻔﺔ ﻟﻜﻞ ﻣﻦ ‪ ،k, b‬ﻫﺬﻩ اﻟﻘﻴﻢ ﰎ‬
‫ﺧﺘﻴﺎرﻫﺎ اﻋﺘﺒﺎﻃﻴﺎً ﻬﺑﺪف اﶈﺎﻛﺎة‪ ،‬ﻧﺘﺎﺋﺞ وﺗﻘﻴﻴﻤﺎت ﻧﻮﻋﻴﺔ ﺗﻄﺒﻴﻘﻴﺔ ﰎ إﳒﺎزﻫﺎ ﺧﻼل ﻫﺬا اﻟﺒﺤﺚ )ﺳﻴﺘﻢ ﻣﻨﺎﻗﺸﺘﻬﺎ ﰲ اﻟﻔﻘﺮات اﻟﻼﺣﻘﺔ(‪.‬‬

‫ﻟﻘﺪ أﻇﻬﺮت ﻧﺘﺎﺋﺞ اﶈﺎﻛﺎة اﳌﺒﻴﻨﺔ ﻋﻠﻰ اﻟﺸﻜﻞ‪ 28-5‬ﻟﻨﻤﻮذج اﻟﺘﻌﻠﻴﻢ ﺑﺎﳊﻠﻘﺔ اﳌﻔﺘﻮﺣﺔ ﺗﺄﺛﲑاً ﺳﻠﺒﻴﺎً ﻛﺒﲑاً ﻋﻠﻰ ﻋﻤﻠﻴﺔ اﻻﺣﺘﻔﺎظ ﺑﺎﳌﻌﻠﻮﻣﺎت‬
‫ﻧﺘﻴﺠﺔ ﻟﺘﺄﺛﲑ ﻣﻌﺎﻣﻞ اﻟﻨﺴﻴﺎن‪ ،‬وأﻧﻪ ﺑﺪون ﻣﺮاﺟﻌﺔ ﻫﺬﻩ اﳌﻌﻠﻮﻣﺎت ﻓﺈ�ﺎ ﺗﻀﻤﺤﻞ ﺧﻼل وﻗﺖ ﻗﺼﲑ ﺟﺪاً‪.‬‬

‫‪269‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Toward a Constructivist Laboratory Education Model‬‬ ‫ﳓﻮ ﳕﻮذج ﺑﻨﺎﺋﻲ ﻟﻠﺘﻌﻠﻴﻢ اﳌﺨﱪي |‬

‫اﻟﺸﻜﻞ‪ 28-5‬ﳏﺎﻛﺎة أﺛﺮ ﻣﻌﺎﻣﻞ اﻟﻨﺴﻴﺎن ﻋﻠﻰ اﻻﺣﺘﻔﺎظ ﺑﺎﳌﻌﻠﻮﻣﺎت ﻟﻨﻤﻮذج ﺗﻌﻠﻴﻤﻲ ﺑﺎﳊﻠﻘﺔ اﳌﻔﺘﻮﺣﺔ‬

‫‪ 2-1-2-6-5‬ﳕﻮذج اﻟﺘﻌﻠﻴﻢ ﰲ اﳊﻠﻘﺔ اﳌﻔﺘﻮﺣﺔ ﻟﻌﺪة ﺟﻠﺴﺎت )‪:(Cascaded Open-loop Learning Model‬‬
‫ﰲ ﻫﺬﻩ اﻟﻔﻘﺮة ﻧﻌﺎﰿ اﻟﺘﺤﻠﻴﻞ واﶈﺎﻛﺎة ﻟﻨﻤﻮذج اﻟﺘﻌﻠﻴﻢ ﰲ اﳊﻠﻘﺔ اﳌﻔﺘﻮﺣﺔ ﻟﻌﺪة ﳏﺎﺿﺮات أو ﺟﻠﺴﺎت‪ ،‬اﻟﺸﻜﻞ‪ 29-5‬ﳝﺜﻞ ﺳﻠﺴﻠﺔ ﻟﻨﻤﻮذج‬
‫اﻟﺘﻌﻠﻴﻢ ﰲ اﳊﻠﻘﺔ اﳌﻔﺘﻮﺣﺔ‪.‬‬

‫‪Input‬‬ ‫‪Output‬‬ ‫‪Input‬‬ ‫‪Output‬‬ ‫‪Input‬‬ ‫‪Output‬‬

‫‪Session‬‬ ‫‪Session‬‬ ‫‪Session‬‬
‫‪X1‬‬ ‫‪Y1‬‬ ‫‪X2‬‬ ‫‪Y2‬‬ ‫‪Xn‬‬ ‫‪Yn‬‬
‫‪1‬‬ ‫‪-‬‬ ‫‪2‬‬ ‫‪-‬‬ ‫‪n‬‬ ‫‪-‬‬
‫‪Open-loop Process‬‬ ‫‪Open-loop Process‬‬ ‫‪Open-loop Process‬‬
‫‪Forgetting‬‬ ‫‪Forgetting‬‬ ‫‪Forgetting‬‬

‫اﻟﺸﻜﻞ ‪ 29-5‬ﳕﻮذج ﺗﻌﻠﻴﻢ ﺗﻌﺎﻗﱯ ﰲ اﳊﻠﻘﺔ اﳌﻔﺘﻮﺣﺔ‬

‫اﻟﻨﺘﺎﺋﺞ اﻟﺘﺤﻠﻴﻠﻴﺔ ﻟﻠﻤﺤﺎﻛﺎة ﰲ ﻫﺬﻩ اﳊﺎﻟﺔ ﲤﺖ ﺑﻨﻔﺲ اﻟﻄﺮﻳﻘﺔ وﻫﻲ ﻣﺒﻴﻨﺔ ﻋﻠﻰ اﻟﺸﻜﻞ‪.30-5‬‬

‫اﻟﺸﻜﻞ‪ 30-5‬ﳏﺎﻛﺎة ﳕﻮذج اﻟﺘﻌﻠﻴﻢ ﰲ اﳊﻠﻘﺔ اﳌﻔﺘﻮﺣﺔ ﻟﻌﺪة ﺟﻠﺴﺎت‬

‫ﳝﺜﻞ اﳌﻨﺤﲏ اﳌﺪرج ﺑﺎﻟﻠﻮن اﻷﺳﻮد اﳌﻌﺮﻓﺔ اﳌﱰاﻛﻤﺔ اﳌﻘﺪﻣﺔ ﻣﻦ ﻗﺒﻞ اﳌﻌﻠﻢ ﺧﻼل ‪ 12-week‬ﲟﻌﺪل ﺟﻠﺴﺔ ﳌﺪة ﺳﺎﻋﺔ ﻛﻞ أﺳﺒﻮع؛ اﳌﻨﺤﲏ‬
‫ﺑﺎﻟﻠﻮن اﻷزرق ﳝﺜﻞ اﳌﻌﻠﻮﻣﺎت اﶈﺘﻔﻈﺔ ﰲ ﻋﻘﻞ اﻟﻄﻼب )‪ 10~20%‬ﻓﻘﻂ( ﻣﻊ وﺟﻮد أﺛﺮ ﻣﻌﺎﻣﻞ ﻧﺴﻴﺎن )‪(b=0.005‬؛ ﳝﺜﻞ اﳌﻨﺤﲏ ﺑﺎﻟﻠﻮن‬
‫اﻷﺧﻀﺮ اﳌﻌﺮﻓﺔ اﳌﻘﺪﻣﺔ ﻣﻦ ﻗﺒﻞ اﳌﻌﻠﻢ واﻟﱵ ﻫﻲ ﻋﻠﻰ ﺷﻜﻞ ﻧﺒﻀﻲ ﻳﺴﺘﻤﺮ ﳌﺪة ﺳﺎﻋﺔ ﻓﻘﻂ وﻻ ﻳﻮﺟﺪ ﻟﻪ ﳕﻂ ﺗﻜﺮاري‪.‬‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪270‬‬
‫‪25‬‬ ‫اﻟﻔﺼﻞ اﳋﺎﻣﺲ | ‪Chapter 5‬‬

‫‪ 2-2-6-5‬ﳕﺬﺟﺔ ﻋﻤﻠﻴﺔ اﻟﺘﻌﻠﻢ ﰲ اﳊﻠﻘﺔ اﳌﻐﻠﻘﺔ )‪:(Modeling of Close-loop Learning Process‬‬

‫ﳝﺜﻞ ﳕﻮذج اﳊﻠﻘﺔ اﳌﻐﻠﻘﺔ ﻫﻨﺎ ﻣﻨﻬﺠﻴﺔ ﺑﻨﺎﺋﻴﺔ ﺗﻌﺘﻤﺪ ﻋﻠﻰ ﻣﺮﻛﺰﻳﺔ اﻟﻄﺎﻟﺐ ﰲ اﻟﺘﻌﻠﻢ‪ ،‬ﻛﻤﺎ ﺗﺴﺘﻠﺰم ﻧﺸﺎط اﳌﺘﻌﻠﻤﲔ ﰲ ﻋﻤﻠﻴﺔ اﻟﺘﻌﻠﻢ‪ ،‬وﺗﺘﻤﻴﺰ‬
‫ﺑﺎﻟﺘﻐﺬﻳﺔ اﻟﻌﻜﺴﻴﺔ اﻟﻔﻌﺎﻟﺔ واﳌﻤﺎرﺳﺎت اﳍﺎدﻓﺔ اﻟﱵ ﺗﻨﻌﻜﺲ إﳚﺎﺑﺎً ﻋﻠﻰ ﺑﻴﺌﺔ اﻟﺘﻌﻠﻢ واﻟﺘﻌﻠﻴﻢ‪.‬‬

‫ﻣﻦ اﻟﻨﺎﺣﻴﺔ اﻟﺮﻳﺎﺿﻴﺔ ﻓﺈن اﳌﻜﺎﻣﻞ ]𝑑 ∫[ ﰲ ﻣﻌﺎدﻟﺔ اﻟﺘﻜﺎﻣﻞ ﳝﺜﻞ ﺑﺎﱐ اﳌﻌﺮﻓﺔ واﻟﺬي ﻫﻮ اﳌﺘﻌﻠﻢ ﰲ ﻫﺬﻩ اﳊﺎﻟﺔ؛ ﺣﻴﺚ أﻧﻪ ﺣﺎﳌﺎ ﻳﻌﻄﻲ اﳌﻌﻠﻢ‬
‫أﻫﺪاف اﻟﺘﻌﻠﻢ )‪ (Learning Objectives‬اﻟﻮاﺿﺤﺔ واﶈﺪدة ﻟﻠﻄﺎﻟﺐ‪ ،‬ﻓﺈن اﻟﻄﺎﻟﺐ ﺳﻴﺸﺮع ﰲ اﻟﻌﻤﻞ ﻋﻠﻰ إﻧﺸﺎء اﻟﻨﻤﺎذج اﻟﺬﻫﻨﻴﺔ‬
‫)‪ (Mental Models‬اﻟﱵ ﺗﺒﲏ أﻫﺪاف اﻟﺘﻌﻠﻢ اﳌﻄﻠﻮﺑﺔ‪ .‬ﺑﻌﺪ ذﻟﻚ ﺳﻮف ﻳﺘﻢ ﺗﻮﺟﻴﻪ اﳌﺘﻌﻠﻢ )‪ (Feedback‬ﻣﺮة أﺧﺮى ﲟﻌﻠﻮﻣﺎت ﺣﻮل‬
‫اﻟﻨﻤﺎذج اﻟﺬﻫﻨﻴﺔ اﻟﱵ أﻧﺸﺄت ﺑﻌﺪ ﺗﻘﻴﻴﻤﻬﺎ ﻣﻦ ﻗﺒﻞ اﳌﻌﻠﻢ؛ وﺑﺎﻟﺘﺎﱄ ﻓﺈن اﳌﺘﻌﻠﻢ ﺳﻴﺘﻤﻜﻦ ﻣﻦ ﺗﻘﺪﻳﺮ اﻟﻔﺠﻮة ﺑﲔ ﻣﺎ ﰎ ﺗﻌﻠﻤﻪ ﻓﻌﻠﻴﺎً وﺑﲔ ﻣﺎ‬
‫ﳚﺐ ﺗﻌﻠﻤﻪ واﻗﻌﻴﺎً‪ ،‬إن ﻫﺬﻩ اﳌﻌﻠﻮﻣﺎت اﳌﺮﲡﻌﺔ ﺣﻮل اﻟﻔﺠﻮة ﺗﺸﻜﻞ ﻣﺪﺧﻞ اﻟﺘﻌﻠﻢ )‪ (Learning Input‬ﻟﻠﻤﺘﻌﻠﻢ‪ ،‬واﳌﺘﻌﻠﻢ ﻳﺴﺘﻤﺮ ﰲ ﻋﻤﻠﻴﺔ‬
‫ﺑﻨﺎء اﳌﻌﺮﻓﺔ ﺣﱴ اﻟﻮﺻﻮل إﱃ ﻣﺴﺘﻮى اﻟﺘﻌﻠﻢ اﳊﻘﻴﻘﻲ اﻟﻔﻌﻠﻲ اﳌﻄﺎﺑﻖ ﻷﻫﺪاف اﻟﺘﻌﻠﻢ‪ .‬اﻟﺸﻜﻞ‪ 31-5‬ﻳﺒﲔ ﳕﻮذج اﳊﻠﻘﺔ اﳌﻐﻠﻘﺔ‪.‬‬

‫)𝑡(𝑥‬
‫‪1‬‬ ‫‪Actual‬‬
‫‪k‬‬ ‫‪+‬‬
‫‪-‬‬
‫‪e‬‬ ‫𝑑𝑑 ‪. � 𝑥 .‬‬
‫𝑑𝑑‬ ‫𝑎‬ ‫‪Learning‬‬
‫‪Assessmen‬‬

‫𝑑𝑑‬
‫‪Close-loop Process‬‬

‫‪Feedback‬‬

‫‪Assessment‬‬
‫‪Process‬‬ ‫‪Actual‬‬
‫‪+‬‬
‫‪Learning‬‬ ‫)‪(Students’ Learning‬‬ ‫‪Learning‬‬
‫‪Objectives‬‬ ‫‪Constructor‬‬ ‫”‪“b‬‬
‫‪Close-loop Process‬‬ ‫‪Forgetting‬‬

‫‪Feedback‬‬

‫اﻟﺸﻜﻞ‪ 31-5‬ﳕﻮذج اﻟﺘﻐﺬﻳﺔ اﻟﻌﻜﺴﻴﺔ ﰲ اﻟﺘﻌﻠﻢ واﻟﺘﻌﻠﻴﻢ‬

‫إن اﻟﻌﻤﻠﻴﺔ اﳌﺒﻴﻨﺔ ﺑﺎﻟﺸﻜﻞ‪ 31-5‬ﳝﻜﻦ وﺻﻔﻬﺎ رﻳﺎﺿﻴﺎً ﺑﺎﳌﻌﺎدﻟﺔ‪ ،8-5‬ﺣﻴﺚ‪ “k” :‬ﻣﺘﺤﻮل ﺣﺎﻟﺔ داﺧﻠﻲ ﳝﺜﻞ ﻣﺴﺘﻮى اﻟﺘﻌﻠﻢ اﳊﻘﻴﻘﻲ )اﳌﻌﺮﻓﺔ‬
‫اﻟﱵ ﰎ ﻟﻠﺘﻮ ﺑﻨﺎؤﻫﺎ(؛ ”‪ :“r‬ﻫﺪف اﻟﺘﻌﻠﻢ )اﻹﺷﺎرة اﳌﺮﺟﻌﻴﺔ(؛ ́𝑎‪ :‬ﺛﺎﺑﺖ اﻟﺘﻌﻠﻢ وﳜﺘﻠﻒ ﻣﻦ ﻣﺘﻌﻠﻢ إﱃ آﺧﺮ‪.‬‬

‫𝑘𝑑‬ ‫اﳌﻌﺎدﻟﺔ‪8-5‬‬
‫𝑟 ‪= − 𝑎́ . 𝑘 +‬‬
‫𝑑𝑑‬
‫ﺑﺎﻟﻌﻮدة إﱃ ﻧﻈﺎم اﳌﻀﺨﺔ واﳋﺰان‪ ،‬ﻓﺈن اﳌﺘﻌﻠﻢ ﰲ ﻫﺬﻩ اﳊﺎﻟﺔ ﳝﺜﻞ اﳌﻀﺨﺔ‪ ،‬ﰲ ﺣﲔ أن اﳌﻌﻠﻢ ﻳﻠﻌﺐ دور ﲢﺪﻳﺪ أﻫﺪاف وﻣﺼﺎدر اﻟﺘﻌﻠﻢ‬
‫واﻟﺬي ﳝﻜﻦ ﺗﺸﺒﻴﻬﻪ ﺑﺈﺷﺎرة اﻟﺘﺤﻜﻢ ﺑﺎﳌﻨﺴﻮب واﳌﺼﺪر اﻟﺬي ﺳﻮف ﺗﻀﺦ ﻣﻨﻪ اﳌﻀﺨﺔ إﱃ اﳋﺰان‪ ،‬ﻛﺬﻟﻚ ﻓﺈن اﳌﻌﻠﻢ ﻳﺴﺎﻋﺪ ﰲ ﺗﻘﻴﻴﻢ‬
‫اﳌﺘﻌﻠﻢ وإﺑﺪاء اﳌﻼﺣﻈﺎت ﺣﻮل اﻟﻔﺠﻮة ﺑﲔ ﻣﺎ ﻫﻮ ﰲ ﻃﻮر ﺗﻌﻠﻤﻪ وﻣﺎ ﳚﺐ ﰲ اﳊﻘﻴﻘﺔ ﺗﻌﻠﻤﻪ‪ .‬إن اﳌﺘﺤﻜﻢ )‪ (Controller‬ﰲ ﻫﺬا‬
‫اﻟﻨﻤﻮذج ﻣﻦ اﻟﻨﻮع اﻟﺒﺴﻴﻂ‪ ،‬واﳌﺘﻌﻠﻢ ﻳﻠﻌﺐ اﻟﺪور اﻷﻛﱪ ﰲ اﻟﺘﺤﻜﻢ ﰲ ﻋﻤﻠﻴﺔ اﻟﺘﻌﻠﻢ‪ ،‬واﳌﺴﺘﻮى اﻷﻋﻠﻰ ﰲ اﻟﺘﻌﻠﻢ وﻓﻘﺎً ﻟﻨﻤﻮذج اﳊﻠﻘﺔ اﳌﻐﻠﻘﺔ‬

‫‪271‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Toward a Constructivist Laboratory Education Model‬‬ ‫ﳓﻮ ﳕﻮذج ﺑﻨﺎﺋﻲ ﻟﻠﺘﻌﻠﻴﻢ اﳌﺨﱪي |‬

‫ﻳﺘﻤﺜﻞ ﺑﺎﻟﺘﻌﻠﻢ ذاﰐ اﻟﺘﻨﻈﻴﻢ )‪ ،(Self-regulated Learning‬ﺣﻴﺚ ﻳﺄﺧﺬ اﳌﺘﻌﻠﻢ ﻋﻠﻰ ﻋﺎﺗﻘﻪ اﳌﺴﺆوﻟﻴﺔ اﻟﻜﺎﻣﻠﺔ ﰲ‪ :‬ﲢﺪﻳﺪ اﻷﻫﺪاف‪،‬‬
‫إﳚﺎد ﻣﺼﺎدر اﻟﺘﻌﻠﻢ‪ ،‬ﲢﺪﻳﺪ اﻻﺳﱰاﺗﻴﺠﻴﺎت اﻷﻧﺴﺐ‪ ،‬اﳌﺮاﻗﺒﺔ اﻟﺬاﺗﻴﺔ ﻟﻌﻤﻠﻴﺔ اﻟﺘﻌﻠﻢ‪ ،‬واﻟﺘﻘﻴﻴﻢ اﻟﺬاﰐ‪.‬‬

‫راﺳﺎت ﻣﺘﻘﺪﻣﺔ ﰲ ﻃﻮر اﻟﺒﺤﺚ ﱂ ﻳﺘﻢ ﻃﺮق ﻣﻮﺿﻮﻋﺎﻬﺗﺎ ﻣﻦ ﻗﺒﻞ ﺳﺘﻜﻮن ﳏﻮراً ﻟﺒﺤﺚ اﻟﺪﻛﺘﻮراﻩ اﻟﺬي ﻫﻮ اﻣﺘﺪاد ﲣﺼﺼﻲ ﳍﺬا اﻟﺒﺤﺚ‪،‬‬
‫ﻫﺬﻩ اﻟﺪراﺳﺎت ﺳﻮف ﺗﺸﺘﻤﻞ ﻋﻠﻰ اﺳﺘﺨﺪام ﻧﻈﺮﻳﺎت اﻟﺘﺤﻜﻢ اﳌﺘﻘﺪﻣﺔ ﰲ ﺗﺼﻤﻴﻢ اﳌﺘﺤﻜﻢ واﻟﻨﻤﺬﺟﺔ ﻣﺜﻞ‪ :‬ﺗﺼﻤﻴﻢ ﻣﺘﺤﻜﻢ رﻗﻤﻲ ‪،PID‬‬
‫اﳌﻨﻄﻖ اﻟﻐﺎﻣﺾ )‪ ،(Fuzzy Logic‬اﻟﺘﺤﻜﻢ اﻷﻣﺜﻠﻲ )‪ ،(Optimal Control‬اﻟﺘﺤﻜﻢ اﻟﺘﻜﻴﻔﻲ )‪ ،(Adaptive Control‬ﻛﺸﻒ ﻫﻮﻳﺔ‬
‫اﻟﻨﻈﻢ )‪...(System Identification‬‬

‫‪ 1-2-2-6-5‬ﲢﻠﻴﻞ ﳕﻮذج اﻟﺘﻌﻠﻢ ﰲ اﳊﻠﻘﺔ اﳌﻐﻠﻘﺔ )‪:(Analyzing of Close-loop Learning Model‬‬

‫ﺳﻮف ﻧﻘﻮم ﻓﻴﻤﺎ ﻳﻠﻲ ﺑﺘﺤﻠﻴﻞ ﳕﻮذج اﻟﺘﻌﻠﻢ ﰲ اﳊﻠﻘﺔ اﻟﻐﻠﻘﺔ ﺑﺎﺳﺘﺨﺪام اﶈﺎﻛﺎة‪ ،‬ﺣﻴﺚ ﻳﺘﻤﻴﺰ ﳕﻮذج اﻟﺘﻌﻠﻢ ﺑﺎﻟﺘﻐﺬﻳﺔ اﻟﻌﻜﺴﻴﺔ اﳌﺒﲔ ﻋﻠﻰ‬
‫اﻟﺸﻜﻞ‪ 31-5‬وﻓﻘﺎً ﻟﻠﻨﻤﻮذج اﻟﺮﻳﺎﺿﻲ اﳌﻮﺿﺢ ﺑﺎﳌﻌﺎدﻟﺔ‪ 8-5‬ﻣﻘﺎرﻧﺔً ﻣﻊ ﳕﻮذج اﳊﻠﻘﺔ اﳌﻔﺘﻮﺣﺔ ﲟﺎﻳﻠﻲ‪:‬‬

‫‪ ‬ﻳﻌﺘﱪ ﳕﻮذج اﻟﺘﻌﻠﻢ ﰲ اﳊﻠﻘﺔ اﳌﻐﻠﻘﺔ ﻟﻌﻤﻠﻴﺔ اﳌﺮاﻛﻤﺔ ﻟﻠﻤﻌﻠﻮﻣﺎت ﻧﻈﺎﻣﺎً ﺗﻘﺎرﺑﻴﺎً ﻣﺴﺘﻘﺮاً )‪ – [631](Asymptotically‬ﻫﺬا ﻳﻌﲏ أن‬
‫اﳌﺘﻌﻠﻢ ﺳﻴﺼﻞ إﱃ اﻷﻫﺪاف اﶈﺪدة ﻟﻌﻤﻠﻴﺔ اﻟﺘﻌﻠﻢ ﻋﻨﺪ ﺑﻨﺎء اﳌﻌﺮﻓﺔ‪ ،‬وﻫﺬا ﻳﺴﺘﻠﺰم أﻧﻪ ﰲ ﺣﺎل اﳓﺮاف اﻟﻨﻈﺎم ﻋﻠﻰ اﳍﺪف اﶈﺪد‪،‬‬
‫ﻓﺴﻮف ﻳﺘﻢ ﺗﺼﺤﻴﺢ اﳋﻄﺄ ذاﺗﻴﺎً ﻋﻦ ﻃﺮﻳﻖ اﻟﺘﻐﺬﻳﺔ ﻋﻜﺴﻴﺔ ﺣﱴ ﻳﻌﻮد إﱃ اﻷﻫﺪاف اﳌﺮﻏﻮﺑﺔ‪.‬‬

‫‪ ‬ﻳﻌﺘﱪ ﳕﻮذج اﻟﺘﻌﻠﻢ ﰲ اﳊﻠﻘﺔ اﳌﻐﻠﻘﺔ ﳕﻮذﺟﺎً ﻗﻮﻳﺎً )‪ – (Robust‬ﻫﺬا ﻳﻌﲏ أﻧﻪ ﻳﺴﺘﻄﻴﻊ اﻟﺘﻐﻠﺐ ﻋﻠﻰ ﺣﺎﻻت ﻋﺪم اﻻﺳﺘﻘﺮار‬
‫ﻤﻟﻬﻮﻟﺔ )‪ (Uncertainty‬ﻋﻦ ﻃﺮﻳﻖ اﻟﺘﻐﺬﻳﺔ اﻟﻌﻜﺴﻴﺔ‪ ،‬وﻫﺬا ﻳﺴﺘﻠﺰم ‪-‬ﻣﻦ ﻣﻴﺰة اﻟﻘﻮة ﻟﻠﻨﻤﻮذج‪ -‬ﺗﻘﻠﻴﺺ اﻟﻔﺠﻮة ﺑﲔ أداء اﻟﻄﻼب‬
‫ذوي اﳌﺴﺘﻮى اﳌﺘﺪﱐ ﻣﻊ اﻟﻄﻼب ﰲ اﳌﺴﺘﻮى اﻟﻄﺒﻴﻌﻲ‪.‬‬

‫‪ ‬إن أﺛﺮ ﻣﻌﺎﻣﻞ اﻟﻨﺴﻴﺎن ﳏﺪود أو ﻣﻬﻤﻞ ﰲ ﻧﻈﺎم اﻟﺘﻌﻠﻢ ﰲ اﳊﻠﻘﺔ اﳌﻐﻠﻘﺔ ﻣﻘﺎرﻧﺔً ﻣﻊ ﻧﻈﺎم اﳊﻠﻘﺔ اﳌﻔﺘﻮﺣﺔ‪.‬‬

‫‪ 1-1-2-2-6-5‬ﲢﻠﻴﻞ أﺛﺮ اﻻﺧﺘﻼف ﰲ ﻗﺎﺑﻠﻴﺔ اﻟﺘﻌﻠﻢ ﻟﻠﻄﻼب‬

‫)‪:(The Impact of the Difference in Students’ Learning Capability‬‬
‫إذا اﻓﱰﺿﻨﺎ أن اﳌﻌﺪل اﻟﻮﺳﻄﻲ ﻗﺎﺑﻠﻴﺔ اﻟﺘﻌﻠﻢ اﻟﻔﻌﻠﻴﺔ ﻟﻠﻄﺎﻟﺐ ﰲ ﳕﻮذج ﺗﻌﻠﻴﻤﻲ ﺑﺎﳊﻠﻘﺔ اﳌﻐﻠﻘﺔ ﻫﻮ ﲝﺪود ‪ 50%‬ﻣﻦ اﳌﻌﺪل اﳌﻔﱰض ﻟﻘﺎﺑﻠﻴﺔ‬
‫اﻟﺘﻌﻠﻢ ﻟﻠﻄﺎﻟﺐ اﻟﻄﺒﻴﻌﻲ‪ ،‬أي‪ 𝑎́ = 0.5 :‬وﻓﻘﺎً ﻟﻠﻤﻌﺎدﻟﺔ‪8-5‬؛ ﻓﺈن ﻧﺘﺎﺋﺞ اﶈﺎﻛﺎة اﳌﺒﻴﻨﺔ ﻋﻠﻰ اﻟﺸﻜﻞ‪ 32-5‬ﻟﻠﻨﻤﻮذج اﳌﺘﻤﺜﻞ ﺑﺎﳌﻌﺎدﻟﺔ‪8-5‬‬

‫ﺗﻈﻬﺮ أن اﻟﻄﺎﻟﺐ ذو ﻣﻘﺪرة ﺗﻌﻠﻢ ﻣﺘﻮﺳﻄﺔ )‪ – (50%‬اﳌﻨﺤﲏ ﺑﺎﻟﻠﻮن اﻷﲪﺮ – ﻳﺘﺄﺧﺮ ﺑﺄﻗﻞ ﻣﻦ ‪ 10%‬ﻓﻘﻂ ﻣﻦ ﻣﺴﺘﻮى اﻟﻄﺎﻟﺐ اﻟﻄﺒﻴﻌﻲ –‬
‫اﳌﻨﺤﲏ ﺑﺎﻟﻠﻮن اﻷزرق – ﻋﻨﺪ �ﺎﻳﺔ وﻗﺖ اﻟﺘﻌﻠﻢ اﳌﺨﺼﺺ ﳉﻠﺴﺔ واﺣﺪة‪ ،‬وﺑﺎﻟﺘﺎﱄ إذا ﰎ إﺗﺎﺣﺔ وﻗﺖ إﺿﺎﰲ‪ ،‬ﻓﺈن اﳌﻨﺤﲏ اﻷﲪﺮ ﺳﻴﻘﺎرب‬
‫اﳌﻨﺤﲏ ﺑﺎﻟﻠﻮن اﻷزرق وﺻﻮﻻً إﱃ ﻧﻘﻄﺔ اﻻﺳﺘﻘﺮار اﳌﺮﻏﻮﺑﺔ‪ .‬اﻟﺸﻜﻞ‪ 32-5‬ﻳﺒﲔ ﳏﺎﻛﺎة أﺛﺮ اﻻﺧﺘﻼف ﰲ ﻗﺎﺑﻠﻴﺔ اﻟﺘﻌﻠﻢ ﻟﻠﻄﻼب ﰲ ﳕﻮذج‬
‫ﺗﻌﻠﻴﻤﻲ ﺑﺎﳊﻠﻘﺔ اﳌﻐﻠﻘﺔ‪.‬‬

‫إن ﻫﺬا اﻟﻮﻗﺖ اﻹﺿﺎﰲ ﻳﻌﺘﱪ ﻋﺎﻣﻼً ﻫﺎﻣﺎً ﺟﺪاً ﰲ ﺗﻌﺰﻳﺰ ﻓﺠﻮة ﰲ ﻣﺴﺘﻮى اﻟﻄﻼب اﳌﺘﺄﺧﺮﻳﻦ ﰲ ﻓﻬﻢ ﺑﻌﺾ اﳌﻮﺿﻮﻋﺎت وﻫﻨﺎك اﻟﻌﺪﻳﺪ ﻣﻦ‬
‫اﻻﺳﱰاﺗﻴﺠﻴﺎت ﻟﺪﻋﻢ ﻫﺬﻩ اﻟﻔﺠﻮة ﻣﺜﻞ‪:‬‬
‫‪ -‬إﻧﺸﺎء ﺟﻠﺴﺎت ﳐﱪﻳﺔ ﲤﻬﻴﺪﻳﺔ )‪.(Pre-Lab Sessions‬‬
‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪272‬‬
‫‪25‬‬ ‫اﻟﻔﺼﻞ اﳋﺎﻣﺲ | ‪Chapter 5‬‬

‫‪ -‬اﳌﺨﺎﺑﺮ اﻻﻓﱰاﺿﻴﺔ واﳌﺨﺎﺑﺮ ﻋﻦ ﺑﻌﺪ )‪.(Virtual and Remote Labs‬‬

‫‪ -‬ﳎﻤﻮﻋﺎت اﻟﻌﻤﻞ واﻟﺪﻋﻢ اﻟﻄﻼﰊ )‪.(Working Groups and Peer-assessment‬‬

‫اﻟﺘﻔﺎﺻﻴﻞ ﺣﻮل ﻫﺬﻩ اﳌﻌﺰزات ﺳﻮف ﻳﺘﻢ ﻣﻨﺎﻗﺸﺘﻬﺎ ﺗﻄﺒﻴﻘﻴﺎً ﻻﺣﻘﺎً ﰲ ﻫﺬا اﻟﻔﺼﻞ‪.‬‬

‫اﻟﺸﻜﻞ‪ 32-5‬ﳏﺎﻛﺎة أﺛﺮ اﻻﺧﺘﻼف ﰲ ﻗﺎﺑﻠﻴﺔ اﻟﺘﻌﻠﻢ ﻟﻠﻄﻼب ﰲ ﳕﻮذج ﺗﻌﻠﻴﻤﻲ ﺑﺎﳊﻠﻘﺔ اﳌﻐﻠﻘﺔ‬

‫‪ 2-1-2-2-6-5‬ﲢﻠﻴﻞ أﺛﺮ ﻣﻌﺎﻣﻞ اﻟﻨﺴﻴﺎن ﻋﻠﻰ اﻻﺣﺘﻔﺎظ ﺑﺎﳌﻌﻠﻮﻣﺎت‬

‫)‪:(The Impact of the Forgetting Factor on Information Retention‬‬
‫إن اﳌﺘﻌﻠﻢ ﰲ ﳕﻮذج اﻟﺘﻌﻠﻢ ﺑﺎﳊﻠﻘﺔ اﳌﻐﻠﻘﺔ ﻣﻨﻐﻤﺲ ﺑﺸﻜﻞ ﻣﺴﺘﻤﺮ وﻟﻔﱰات أﻃﻮل ﰲ ﻋﻤﻠﻴﺔ ﺑﻨﺎء اﳌﻌﺮﻓﺔ‪ ،‬وﻫﺬﻩ اﻟﻌﻤﻠﻴﺔ ﻣﱰاﻓﻘﺔ ﲟﻤﺎرﺳﺎت‬
‫اﻟﺘﻐﺬﻳﺔ اﻟﻌﻜﺴﻴﺔ واﻟﺘﺄﻣﻞ اﳌﻼﺣﻆ واﻟﺘﻘﻴﻴﻢ واﻟﺪﻋﻢ اﳌﺘﻜﺮر‪ ،‬اﻷﻣﺮ اﻟﺬي ﻳﻘﻠﻞ ﺑﺸﻜﻞ ﻛﺒﲑ ﺟﺪاً اﻟﺘﺄﺛﲑ اﻟﺴﻠﱯ ﳌﻌﺎﻣﻞ اﻟﻨﺴﻴﺎن ﻋﻠﻰ اﻻﺣﺘﻔﺎظ‬
‫ﺑﺎﳌﻌﻠﻮﻣﺎت‪ ،‬وذﻟﻚ ﻷن اﳌﻌﻠﻮﻣﺎت ﻳﺘﻢ ﺗﻜﺮاراﻫﺎ ﺑﺎﺳﺘﻤﺮار وﻧﻘﻠﻬﺎ ﻣﻦ اﻟﺬاﻛﺮة ﻗﺼﲑة اﻷﻣﺪ إﱃ اﻟﺬاﻛﺮة ﻃﻮﻳﻠﺔ اﻷﻣﺪ ﰲ اﻟﺪﻣﺎغ‪.‬‬

‫ﻛﻤﺎ أن اﳌﻌﻠﻮﻣﺎت اﳉﺪﻳﺪة ﻳﺘﻢ ﺑﻨﺎؤﻫﺎ ﻋﻠﻰ ﻣﻌﻠﻮﻣﺎت ﳐﺰﻧﺔ ﻣﺴﺒﻘﺎً ﰲ اﻟﺬاﻛﺮة ﻃﻮﻳﻠﺔ اﻷﻣﺪ وﻳﺘﻢ رﺑﻄﻬﺎ ﺑﺒﻌﻀﻬﺎ‪ ،‬وﻛﻠﻤﺎ ﺗﻠﻘﻰ اﳌﺘﻌﻠﻢ إﺷﺎرة‬
‫ﻣﻦ اﻟﺘﻐﺬﻳﺔ اﻟﻌﻜﺴﻴﺔ )ذاﺗﺔ‪ ،‬زﻣﻴﻞ‪ ،‬ﻣﺪرس‪ ،‬ﻣﺼﺪر‪ (...‬ﺑﺄن ﺑﻌﺾ اﳌﻌﻠﻮﻣﺎت ﻧﺎﻗﺼﺔ )ﻣﻨﺴﻴﺔ(‪ ،‬ﻓﺈﻧﻪ ﻳﻌﻤﻞ ﻋﻠﻰ اﺳﺘﻌﺎدﻬﺗﺎ ﻣﺮة أﺧﺮى؛ وﻳﺸﺎر‬
‫إﱃ أن ﺗﻜﺮار اﳌﻌﻠﻮﻣﺎت اﳌﺨﺰﻧﺔ ﰲ اﻟﺬاﻛﺮة ﻃﻮﻳﻠﺔ اﻷﻣﺪ ﻋﻠﻰ ﻣﺪى ﻣﻦ اﻟﺰﻣﻦ ﻗﺪ ﻳﺴﺒﺐ ﰲ ﲣﺰﻳﻨﻬﺎ ﰲ اﻟﺬاﻛﺮة ﻟﻸﺑﺪ]‪.[532‬‬

‫اﻟﺸﻜﻞ‪ 33-5‬ﻳﺒﲔ أﺛﺮاً ﻃﻔﻴﻔﺎً ﻟﻨﺴﻴﺎن اﳌﻌﻠﻮﻣﺎت ﰲ ﳕﻮذج اﻟﺘﻐﺬﻳﺔ اﻟﻌﻜﺴﻴﺔ )اﳌﻨﺤﲏ اﻷﲪﺮ( ﻣﻘﺎرﻧﺔً ﻣﻊ اﳊﺎﻟﺔ اﳌﺜﺎﻟﻴﺔ اﻟﱵ ﻟﻴﺲ ﻓﻴﻬﺎ ﻧﺴﻴﺎن‬
‫ﻟﻠﻤﻌﻠﻮﻣﺎت )اﳌﻨﺤﲏ ﺑﺎﻟﻠﻮن اﻷزرق(؛ إن ﻗﻴﻢ ﻣﻌﺎﻣﻞ اﻟﻨﺴﻴﺎن اﻟﱵ ﰎ ﺗﻌﻮﻳﻀﻬﺎ ﰲ ﳕﻮذج اﶈﺎﻛﺎة ﻫﻲ ﻧﻔﺴﻬﺎ اﻟﱵ ﰎ اﺳﺘﺨﺪاﻣﻬﺎ ﰲ ﳕﻮذج‬
‫اﳊﻠﻘﺔ اﳌﻔﺘﻮﺣﺔ‪.‬‬

‫ﻓﻴﻤﺎ ﻳﺄﰐ ﰲ ﻫﺬا اﻟﺒﺤﺚ ﻧﻘﺪم ﻧﺘﺎﺋﺞ ﻋﻤﻠﻴﺔ ﻟﻘﻴﺎس ﻋﺎﻣﻞ اﻟﻨﺴﻴﺎن ﻟﻨﻤﻮذج ﺗﻌﻠﻴﻤﻲ ﺗﻄﺒﻴﻘﻲ ﰲ اﳊﻠﻘﺔ اﳌﻔﺘﻮﺣﺔ واﳌﻐﻠﻘﺔ‪.‬‬

‫إن ﳕﺎذج اﻟﺘﻌﻠﻢ ﰲ اﳊﻠﻘﺔ اﳌﻔﺘﻮﺣﺔ واﳌﻐﻠﻘﺔ ﺗﺴﺘﻄﻴﻊ وﺻﻒ اﻟﻌﺪﻳﺪ ﻣﻦ اﻟﻌﻤﻠﻴﺎت واﻷﻧﻈﻤﺔ اﻟﺘﻌﻠﻴﻤﻴﺔ ﻣﺜﻞ‪ :‬اﻟﺘﻌﻠﻢ ﺑﺎﻻﻋﺘﻤﺎد ﻋﻠﻰ‬
‫اﳌﺸﺎرﻳﻊ]‪ ،[802‬واﻟﺘﻌﻠﻢ ﺑﺎﻻﻋﺘﻤﺎد ﻋﻠﻰ ﺣﻞ اﳌﺸﻜﻼت]‪ ،[805,806‬واﻟﺘﻌﻠﻢ اﻟﺘﺠﺮﻳﱯ وﻓﻘﺎً ﻟﻨﻤﻮذج دورة ﻛﻮﻟﺐ‪.‬‬

‫‪273‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Toward a Constructivist Laboratory Education Model‬‬ ‫ﳓﻮ ﳕﻮذج ﺑﻨﺎﺋﻲ ﻟﻠﺘﻌﻠﻴﻢ اﳌﺨﱪي |‬

‫اﻟﺸﻜﻞ‪ 33-5‬ﳏﺎﻛﺎة أﺛﺮ ﻣﻌﺎﻣﻞ اﻟﻨﺴﻴﺎن ﻋﻠﻰ اﻻﺣﺘﻔﺎظ ﺑﺎﳌﻌﻠﻮﻣﺎت ﻟﻨﻤﻮذج ﺗﻌﻠﻴﻤﻲ ﺑﺎﳊﻠﻘﺔ اﳌﻐﻠﻘﺔ‬

‫‪ 2-2-2-6-5‬ﳕﻮذج اﻟﺘﻌﻠﻴﻢ ﰲ اﳊﻠﻘﺔ اﳌﻐﻠﻘﺔ ﻟﻌﺪة ﺟﻠﺴﺎت )‪:(Cascaded Close-loop Learning Model‬‬
‫ﰲ ﻫﺬﻩ اﻟﻔﻘﺮة ﻧﻌﺎﰿ اﻟﺘﺤﻠﻴﻞ واﶈﺎﻛﺎة ﻟﻨﻤﻮذج اﻟﺘﻌﻠﻴﻢ ﰲ اﳊﻠﻘﺔ اﳌﻐﻠﻘﺔ ﻟﻌﺪة ﳏﺎﺿﺮات أو ﺟﻠﺴﺎت؛ اﻟﺸﻜﻞ‪ 34-5‬ﳝﺜﻞ ﺳﻠﺴﻠﺔ ﻟﻨﻤﻮذج‬
‫اﻟﺘﻌﻠﻴﻢ ﰲ اﳊﻠﻘﺔ اﳌﻐﻠﻘﺔ‪.‬‬

‫‪Session 1‬‬ ‫‪Session 2‬‬ ‫‪Session n‬‬

‫‪Objectives‬‬ ‫‪Objectives‬‬ ‫‪Objectives‬‬

‫‪Session 1‬‬ ‫‪+‬‬ ‫‪Session 2‬‬ ‫‪+‬‬ ‫‪Session n‬‬

‫‪FB‬‬ ‫‪FB‬‬ ‫‪FB‬‬

‫اﻟﺸﻜﻞ‪ 34-5‬ﳕﻮذج ﺗﻌﻠﻴﻢ ﺗﻌﺎﻗﱯ ﰲ اﳊﻠﻘﺔ اﳌﻐﻠﻘﺔ‬

‫إن اﻟﻨﻤﻮذج ﰲ ﻫﺬﻩ اﳊﺎﻟﺔ ﻳﺘﻄﻠﺐ اﲣﺎذ وﺗﺰوﻳﺪ اﻟﺘﻘﻴﻴﻢ اﻟﺒﻨﺎﺋﻲ )‪ (Formative Assessment‬اﳌﺘﻜﺮر ﺧﻼل ﺟﻠﺴﺎت اﳌﻘﺮر اﳌﺮاد ﺗﻌﻠﻴﻤﻪ‪،‬‬
‫ﻛﻤﺎ ﻳﺘﻄﻠﺐ ﻣﻼﺣﻈﺔ اﻟﺘﻐﺬﻳﺔ اﻟﻌﻜﺴﻴﺔ ﻟﻠﻄﻼب ﺑﺸﻜﻞ ﻣﺴﺘﻤﺮ‪ ،‬إﺿﺎﻓﺔً إﱃ ذﻟﻚ ﻓﺈﻧﻪ ﻣﻦ اﳌﻬﻢ ﺟﺪاً ﰲ ﻫﺬا اﻟﻨﻤﻮذج أن ﻳـَ ْﻌﻠﻢ اﻟﻄﻼب‬
‫ﺑﺸﻜﻞ واﺿﺢ ﺟﺪاً أ�ﻢ ﻫﻢ ﻣﻦ ﺳﻴﻘﻮﻣﻮن ﺑﺒﻨﺎء ﻣﻌﺮﻓﺘﻬﻢ وأن دور اﳌﻌﻠﻢ ﻳﻘﺘﺼﺮ ﻋﻠﻰ ﺗﻨﺴﻴﻖ وﺗﻮﺟﻴﻪ ﻋﻤﻠﻴﺔ ﺗﻌﻠﻤﻬﻢ‪ .‬إن ﳕﻮذج اﳊﺎﻟﺔ‬
‫ﻟﻠﻤﺨﻄﻂ اﳌﺒﲔ ﻋﻠﻰ اﻟﺸﻜﻞ‪ 34-5‬ﳝﻜﻦ ﻛﺘﺎﺑﺘﻪ ﺑﺎﳌﻌﺎدﻟﺔ‪.9-5‬‬

‫𝑈 ‪𝑋̇ = 𝐴𝑐 . 𝑋. 𝑚(𝑡) + 𝐵𝑐 .‬‬ ‫𝑋 ‪𝑌 = 𝐶𝑐 .‬‬

‫̇‪𝑑1‬‬ ‫́‪−𝑎1‬‬ ‫‪0‬‬ ‫‪… 0‬‬ ‫‪𝑑1‬‬ ‫‪1‬‬ ‫‪0‬‬ ‫⋯‬ ‫‪0 𝑟1‬‬
‫‪𝑑̇ 2‬‬ ‫́‪−𝑎2‬‬ ‫‪… 0‬‬ ‫‪𝑑2‬‬ ‫� ‪0� . �𝑟2‬‬
‫… � =� �‬ ‫‪� . � ⋮ � . 𝑒 −𝑏𝑡 +‬‬ ‫‪�0‬‬ ‫‪1‬‬ ‫⋯‬
‫⋯‬ ‫⋮‬
‫⋮‬ ‫⋮‬ ‫⋮‬ ‫⋮ …‬ ‫⋮‬ ‫⋮‬ ‫⋮‬
‫̇𝑛𝑑‬ ‫‪0‬‬ ‫‪0‬‬ ‫́𝑛𝑎‪… −‬‬ ‫𝑛𝑑‬ ‫‪0‬‬ ‫‪0‬‬ ‫⋯‬ ‫𝑛𝑟 ‪1‬‬
‫‪𝑦1‬‬ ‫‪1‬‬ ‫‪0‬‬ ‫⋯‬ ‫‪0 𝑑1‬‬
‫‪𝑦2‬‬ ‫‪0‬‬ ‫‪1‬‬ ‫⋯‬ ‫� ‪0� . �𝑑2‬‬
‫�=�⋮�=𝑌‬ ‫⋯‬ ‫⋮‬
‫⋮‬ ‫⋮‬ ‫⋮‬
‫𝑛𝑦‬ ‫‪0‬‬ ‫‪0‬‬ ‫⋯‬ ‫‪1‬‬ ‫𝑑‬ ‫𝑛‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪274‬‬
‫‪25‬‬ ‫اﻟﻔﺼﻞ اﳋﺎﻣﺲ | ‪Chapter 5‬‬

‫ﺣﻴﺚ أن‪ i=1,2,…,n) 𝑑𝑖 :‬اﳊﺎﻟﺔ اﻟﺪﻳﻨﺎﻣﻴﻜﻴﺔ اﻟﺪاﺧﻠﻴﺔ اﻟﱵ ﲤﺜﻞ اﳌﻌﺮﻓﺔ اﻟﱵ ﻳﺘﻢ اﻛﺘﺴﺎﻬﺑﺎ ﰲ ﻛﻞ ﳏﺎﺿﺮة )‪(i‬؛ ‪ :Y‬ﻗﻴﺎﺳﺎت ﺗﺄﺧﺬ ﰲ‬
‫ﻛﻞ ﳏﺎﺿﺮة ﲤﺜﻞ ﻣﺴﺘﻮى اﻟﺘﻌﻠﻢ اﻟﻔﻌﻠﻲ ﻟﻠﻄﻼب؛ 𝑖𝑟 )‪ (i=1,2,…,n‬أﻫﺪاف اﻟﺘﻌﻠﻢ ﻟﻜﻞ ﳏﺎﺿﺮة )‪.(i‬‬

‫اﻟﻨﺘﺎﺋﺞ اﻟﺘﺤﻠﻴﻠﻴﺔ ﻟﻠﻤﺤﺎﻛﺎة ﰲ ﻫﺬﻩ اﳊﺎﻟﺔ واﳌﺒﻴﻨﺔ ﻋﻠﻰ اﻟﺸﻜﻞ‪ 35-5‬ﲤﺖ ﺑﻨﻔﺲ اﳌﻨﻬﺠﻴﺔ اﳌﺘﺒﻌﺔ؛ ﺣﻴﺚ ﳝﺜﻞ اﳌﻨﺤﲏ اﳌﺪرج ﺑﺎﻟﻠﻮن اﻷﺳﻮد‬
‫اﳌﻌﺮﻓﺔ اﳌﱰاﻛﻤﺔ اﳌﻘﺪﻣﺔ ﻣﻦ ﻗﺒﻞ اﳌﻌﻠﻢ ﺧﻼل ‪ 12-week‬ﲟﻌﺪل ﺟﻠﺴﺔ ﳌﺪة ﺳﺎﻋﺔ ﻛﻞ أﺳﺒﻮع؛ اﳌﻨﺤﲏ ﺑﺎﻟﻠﻮن اﻷزرق ﳝﺜﻞ أداء اﻟﻄﻼب‬
‫ذوي ﻣﻘﺪرة اﻟﺘﻌﻠﻢ اﻟﻄﺒﻴﻌﻴﺔ )‪ ،(100%‬ﺑﻴﻨﻤﺎ ﳝﺜﻞ اﳌﻨﺤﲏ ﺑﺎﻟﻠﻮن اﻷﲪﺮ أداء اﻟﻄﻼب ذوي ﻣﻘﺪرة اﻟﺘﻌﻠﻢ اﳌﺘﻮﺳﻄﺔ )‪ ،(50%‬وﰲ ﻛﻼ‬
‫اﳊﺎﻟﺘﲔ ﻳﺘﻢ ﺗﻀﻤﲔ أﺛﺮ ﻣﻌﺎﻣﻞ ﻧﺴﻴﺎن )‪(b=0.005‬؛ ﻧﻼﺣﻆ أن ﺧﺼﺎﺋﺺ اﻟﻘﻮة ﳍﺬا اﻟﻨﻤﻮذج ﺗﱪز واﺿﺤﺔ ﻣﻦ ﺧﻼل ﺗﻌﺰﻳﺰ أداء اﻟﻄﻼب‬
‫اﻷﺿﻌﻒ وﻣﻘﺎرﺑﺘﻬﻢ ﺑﺎﻷداء إﱃ اﻟﻄﻼب اﻟﻄﺒﻴﻌﻴﲔ‪ ،‬ﻛﻤﺎ أﻧﻪ ﻣﻊ �ﺎﻳﺔ اﳉﺪول اﻟﺰﻣﲏ ﻟﻠﻤﻘﺮر ﺳﻴﻜﻮن ﻛﻞ اﻟﻄﻼب ﻗﺪ ﺣﻘﻖ ﲨﻠﺔ أﻫﺪاف‬
‫اﻟﺘﻌﻠﻢ ﺑﺸﻜﻞ ﻛﺎﻣﻞ وذﻟﻚ ﻋﻠﻰ اﻟﺮﻏﻢ ﻣﻦ وﺟﻮد أﺛﺮ ﻣﻌﺎﻣﻞ اﻟﻨﺴﻴﺎن ﺑﺸﻜﻞ ﻃﻔﻴﻒ‪.‬‬

‫اﻟﺸﻜﻞ‪ 35-5‬ﳏﺎﻛﺎة ﳕﻮذج اﻟﺘﻌﻠﻴﻢ ﰲ اﳊﻠﻘﺔ اﳌﻐﻠﻘﺔ ﻟﻌﺪة ﺟﻠﺴﺎت‬

‫ﳑﺎ ﻻ ﺷﻚ ﻓﻴﻪ ‪ -‬وﻛﻤﺎ ﻫﻮ واﺿﺢ ﰲ ﻧﺘﺎﺋﺞ اﶈﺎﻛﺎة ‪ -‬أن ﳕﻮذج اﻟﺘﻌﻠﻴﻢ ﺑﺎﳊﻠﻘﺔ اﳌﻐﻠﻘﺔ أﻇﻬﺮ اﻓﻀﻠﻴﺔ ذات دﻻﻟﺔ ﻛﺒﲑة ﻋﻠﻰ اﻟﻨﻤﻮذج‬
‫اﻟﺘﻘﻠﻴﺪي ﰲ اﳊﻠﻘﺔ اﳌﻔﺘﻮﺣﺔ‪ ،‬إﻻ أن ﻫﺬﻩ اﳌﺴﺄﻟﺔ ﻟﻴﺴﺖ ﺳﻬﻠﺔ اﻟﺘﺤﻘﻴﻖ‪ ،‬وﻫﻲ ﲢﺘﺎج إﱃ ﺗﻄﺒﻴﻖ ﻣﻨﻬﺠﻴﺎت ﺗﻌﻠﻴﻢ وﺗﻌﻠﻢ ﺑﻨﺎﺋﻴﺔ ﻣﺒﺘﻜﺮة‪ ،‬ﻛﻤﺎ‬
‫أ�ﺎ ﲢﺘﺎج إﱃ ﺗﻘﻴﻴﻢ ﺷﺎﻣﻞ وﻣﺮاﻗﺒﺔ وﻣﻼﺣﻈﺔ ﻣﺴﺘﻤﺮﻳﻦ‪ ،‬اﻷﻣﺮ اﻟﺬي ﻳﺘﻄﻠﺐ ﺟﻬﺪ ﻛﺒﲑ ﻣﻦ اﳌﻌﻠﻢ‪.‬‬

‫‪ 3-2-2-6-5‬ﺗﻀﻤﲔ اﻟﺘﻜﻨﻠﻮﺟﻴﺎ اﳌﺴﺎﻋﺪة ﰲ ﺗﻌﺰﻳﺰ أداء اﻟﻨﻈﺎم اﻟﺘﻌﻠﻴﻤﻲ ﰲ اﳊﻠﻘﺔ اﳌﻐﻠﻘﺔ‬

‫)‪:(Implication of Aid Technology to Assist in Closing the Loop‬‬
‫إن ﻣﻦ أﻫﻢ اﻷﻣﻮر اﻷﺳﺎﺳﻴﺔ ﺧﻼل اﶈﺎﺿﺮات ﻫﻲ اﳊﻔﺎظ ﻋﻠﻰ اﻧﺘﺒﺎﻩ اﻟﻄﻼب وﺗﻨﺸﻴﻂ ذﻫﻨﻬﻢ ﺑﺎﺳﺘﻤﺮار‪ .‬ﻳﻌﺘﱪ ﻧﻈﺎم ﺗﺼﻮﻳﺖ اﳉﻤﻬﻮر‬
‫’‪ (Audience Response System) ‘ARS‬ﻣﻦ أﻫﻢ اﻟﺘﻘﻨﻴﺎت اﳊﺪﻳﺜﺔ اﳌﻌﺰزة ﻟﻠﺘﻌﻠﻴﻢ اﻟﻔﻌﺎل‪.‬‬

‫ﻳﺘﻜﻮن اﻟﻨﻈﺎم ﻣﻦ أﺟﻬﺰة ﲢﻜﻢ ﻻﺳﻠﻜﻴﺔ ﺻﻐﲑة ﺗﺮﺳﻞ إﺟﺎﺑﺎت اﻟﻄﻼب ‪ -‬ﺑﺸﻜﻞ ﻋﺎم ﺗﻜﻮن اﻷﺳﺌﻠﺔ ذات ﳕﻂ ﻣﺘﻌﺪد اﻻﺧﺘﻴﺎرات‪ .‬ﻳﺘﻢ‬
‫ﲨﻊ ردود اﻟﻄﻼب ﻣﻦ ﺧﻼل ﺟﻬﺎز اﺳﺘﻘﺒﺎل ﻣﺮﺗﺒﻂ ﻣﻊ ﺑﺮﳎﻴﺎت ﺗﻘﻮم ﻋﻠﻰ ﲢﻠﻴﻞ اﻹﺟﺎﺑﺎت وﻋﺮﺿﻬﺎ ﻋﻠﻰ ﺷﻜﻞ ﳐﻄﻄﺎت‪.‬‬

‫ﻳﻄﻠﻖ ﻋﻠﻰ ﻫﺬﻩ اﻟﺘﻘﻨﻴﺔ أﲰﺎء ﳐﺘﻠﻔﺔ ﻣﺜﻞ‪ :‬ﻧﻈﺎم ﺗﺼﻮﻳﺖ اﳉﻤﻬﻮر )‪ ،[766,767](Audience Response System‬ﻧﻈﺎم إﺟﺎﺑﺔ اﻟﻄﻼب‬
‫)‪ ،[768-770](Student Response System‬ﻧﻈﺎم اﻹﺟﺎﺑﺔ ﰲ اﻟﺼﻔﻮف اﻟﺘﻌﻠﻴﻤﻴﺔ )‪،[771,772](Classroom Response System‬‬

‫‪275‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Toward a Constructivist Laboratory Education Model‬‬ ‫ﳓﻮ ﳕﻮذج ﺑﻨﺎﺋﻲ ﻟﻠﺘﻌﻠﻴﻢ اﳌﺨﱪي |‬

‫ﻧﻈﺎم اﻹﺟﺎﺑﺔ ﻟﻠﻤﺠﻤﻮﻋﺎت )‪ ،[773](Group Response System‬ﻧﻈﺎم اﻹﺟﺎﺑﺔ اﻟﺸﺨﺼﻲ )‪(Personal Response System‬‬
‫‪[774-‬‬

‫]‪ ،777‬وﻧﻈﺎم اﻟﺘﺤﻜﻢ ﺑﺎﻟﻨﻘﺮ )‪ ،[779-783](Clickers‬ﻧﻈﺎم اﻟﺘﺼﻮﻳﺖ اﻹﻟﻜﱰوﱐ )‪.[778](Electronic Voting System‬‬

‫ﻋﻠﻰ اﻟﺮﻏﻢ ﻣﻦ ﺣﻘﻴﻘﺔ أن ﻫﺬﻩ اﻟﺘﻜﻨﻮﻟﻮﺟﻴﺎ ﺟﺪﻳﺪة‪ ،‬إﻻ أن ﻫﻨﺎك اﻟﻌﺪﻳﺪ ﻣﻦ ﺗﻘﺎرﻳﺮ اﻷﲝﺎث اﻟﱵ ﺗﺸﲑ إﱃ اﺳﺘﺨﺪام ﻧﻈﺎم ‪ ARS‬ﰲ‬
‫اﻟﺘﺨﺼﺼﺎت اﻟﺘﻌﻠﻴﻤﻴﺔ اﳌﺨﺘﻠﻔﺔ ﲟﺎ ﰲ ذﻟﻚ ﳏﺎﺿﺮات اﻟﻌﻠﻮم واﳍﻨﺪﺳﺔ]‪.[774,777,784-787‬‬

‫إن ﺗﻘﻨﻴﺔ ‪ ARS‬ﺗﺴﺎﻋﺪ ﰲ اﻹﺑﻘﺎء ﻋﻠﻰ اﻧﺘﺒﺎﻩ اﻟﻄﻼب أﺛﻨﺎء اﶈﺎﺿﺮات‪ ،‬ﺣﻴﺚ ﺗﺸﲑ اﻷﲝﺎث إﱃ أن اﻧﺘﺒﺎﻩ اﻟﻄﻼب ﻳﻨﺨﻔﺾ ﺧﻼل اﶈﺎﺿﺮة‬
‫ﺑﺸﻜﻞ ﺗﺪرﳚﻲ إﱃ أن ﺗﺒﺪأ اﻟﻌﺪﻳﺪ ﻣﻦ دورات اﳔﻔﺎض ﺣﺎد ﰲ اﻻﻧﺘﺒﺎﻩ ﺑﻌﺪ ﻣﺮور ‪ 10‬إﱃ ‪ 18‬دﻗﻴﻘﺔ ﻣﻦ وﻗﺖ اﶈﺎﺿﺮة]‪ ،[788‬وﻗﺪ ﻳﻜﻮن ﻫﺬا‬
‫اﻟﺴﺒﺐ اﻟﺮﺋﻴﺴﻲ ﻟﻌﺪم ﺗﻠﻘﻲ اﳌﻌﻠﻮﻣﺎت ﻣﻦ ﻗﺒﻞ اﻟﻄﻼب ﻋﻠﻰ ﳓﻮ ﻓﻌﺎل؛ أﺣﺪ اﻟﻌﻼﺟﺎت ﳍﺬﻩ اﳌﺸﻜﻠﺔ ﻫﻲ ﺣﺚ اﻟﻄﻼب ﻋﻠﻰ اﻟﺘﻔﻜﲑ‬
‫ﺣﻮل أﺳﺌﻠﺔ واﻗﻌﻴﺔ ﺑﺸﻜﻞ ﻣﺘﻜﺮر ﻛﻞ ‪ 10‬دﻗﺎﺋﻖ ﺧﻼل اﶈﺎﺿﺮة]‪.[789‬‬

‫ﻟﻘﺪ وﺟﺪت اﻷﲝﺎث اﻟﺘﺠﺮﻳﺒﻴﺔ اﳊﺪﻳﺜﺔ ﺗﺄﺛﲑاً إﳚﺎﺑﻴﺎً ﻻﺳﺘﺨﺪام ﻧﻈﺎم ‪ ARS‬ﻋﻠﻰ ﻋﻤﻠﻴﺔ ﺗﻌﻠﻢ اﻟﻄﻼب]‪ ،[790‬ﺣﻴﺚ أن ﻧﻈﺎم ‪ ARS‬ﻳﻮﻓﺮ‬
‫اﻟﻔﺮﺻﺔ ﳉﻤﻴﻊ اﻟﻄﻼب ﻟﻠﻤﺸﺎرﻛﺔ ﺑﻄﺮﻳﻘﺔ ﻧﺸﻄﺔ ﺧﻼل اﶈﺎﺿﺮة‪ ،‬واﻟﱵ ﺛﺒﺖ ﻓﻌﺎﻟﻴﺘﻬﺎ ﰲ ﺣﺎﻟﺔ اﳋﺠﻞ ﻟﺪى ﺑﻌﺾ اﻟﻄﻼب أو اﻟﻄﻼب اﻟﺬﻳﻦ‬
‫ﻳﻌﺎﻧﻮن ﻣﻦ اﺿﻄﺮاب اﻟﻜﻼم‪.‬‬

‫ﲡﺎرﻳﺎً‪ ،‬ﻳﻮﺟﺪ اﻟﻌﺪﻳﺪ ﻣﻦ اﳊﻠﻮل اﻟﺘﻜﻨﻮﻟﻮﺟﻴﺔ اﻟﺘﺠﺎرﻳﺔ ﻷﻧﻈﻤﺔ اﻟـ‪ ARS‬ﻣﺜﻞ‪ ،[791]TurningPoint :‬ﻛﻤﺎ ﳝﻜﻦ اﻻﻃﻼع ﻋﻠﻰ ﻣﻘﺎرﻧﺔ ﺑﲔ‬
‫أﺷﻬﺮ ﺳﺘﺔ ﻣﻨﺘﺠﺎت ﲡﺎرﻳﺔ ﻷﻧﻈﻤﺔ اﻟـ‪ ARS‬ﰲ دراﺳﺔ]‪ .[779‬اﻟﺸﻜﻞ‪ 36-5‬ﻳﺒﲔ ﻣﻜﻮﻧﺎت ﻧﻈﺎم اﻟﺘﺼﻮﻳﺖ اﻹﻟﻜﱰوﱐ ‪.TurningPoint‬‬

‫‪TurningPoint‬‬ ‫اﻟﺸﻜﻞ‪ 36-5‬ﻧﻈﺎم اﻟﺘﺼﻮﻳﺖ اﻹﻟﻜﱰوﱐ )‪ (ARS‬ﻣﻦ ﺷﺮﻛﺔ‬

‫إن ﺗﻘﻨﻴﺔ اﻟـ‪ ARS‬ﳝﻜﻦ أن ﺗﻜﻮن أداة ﻓﻌﺎﻟﺔ ﻟﺪﻋﻢ ﳕﻮذج اﻟﺘﻌﻠﻴﻢ ﺑﺎﳊﻠﻘﺔ اﳌﻐﻠﻘﺔ أﺛﻨﺎء اﶈﺎﺿﺮات‪ ،‬ﺣﻴﺚ ﺑﻌﺪ ﺑﺪاﻳﺔ اﶈﺎﺿﺮة ﺑـ‪ 10~20‬دﻗﻴﻘﺔ‬
‫ﺳﻮف ﻳﻨﺨﻔﺾ اﻧﺘﺒﺎﻩ اﻟﻄﻼب ﺑﺸﻜﻞ ﻛﺒﲑ‪ ،‬وﻋﻨﺪﻫﺎ ﺳﻮف ﳛﺘﺎج ﻟﻠﻤﻌﻠﻢ دﻟﻴﻼً ﻋﻠﻰ ﻗﺪرة اﻟﻄﻼب ﻋﻠﻰ اﺳﺘﻴﻌﺎب اﳌﻌﻠﻮﻣﺎت اﻟﱵ ﰎ ﺗﻘﺪﳝﻬﺎ‬
‫إﱃ ﻫﺬا اﳊﺪ‪ ،‬وﻋﻨﺪﻫﺎ ﻗﺪ ﻳﻜﻮن اﻟﻮﻗﺖ ﻣﻨﺎﺳﺒﺎً ﻟﻠﺸﺮوع ﰲ اﻟﺘﺼﻮﻳﺖ ﺣﻮل ﺳﺆال ﳏﺪد ﺑﺎﺳﺘﺨﺪام ﺗﻘﻨﻴﺔ اﻟـ‪ ARS‬اﻷﻣﺮ اﻟﺬي ﻳﺸﺪ اﻧﺘﺒﺎﻩ‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪276‬‬
‫‪25‬‬ ‫اﻟﻔﺼﻞ اﳋﺎﻣﺲ | ‪Chapter 5‬‬

‫اﻟﻄﻼب وﳛﻔﺰﻫﻢ ﻋﻠﻰ اﻟﻨﻘﺎش‪ .‬ﺑﻌﺪ اﻟﺘﺼﻮﻳﺖ ﺗﻈﻬﺮ اﻟﻨﺘﺎﺋﺞ ﻋﻠﻰ ﺷﺎﺷﺔ اﻟﻌﺮض ﻣﺘﻀﻤﻨﺔً اﻹﺟﺎﺑﺎت واﻟﻨﺴﺐ واﻹﺟﺎﺑﺔ اﻟﺼﺤﻴﺤﺔ؛ ﳝﻜﻦ‬
‫ﻟﻠﻄﺎﻟﺐ ﻋﻨﺪﻫﺎ ﻣﻘﺎرﻧﺔ إﺟﺎﺑﺘﻪ ﻣﻊ اﻹﺟﺎﺑﺔ اﻟﺼﺤﻴﺤﺔ واﳊﺼﻮل ﻣﻦ اﳌﻌﻠﻢ ﻋﻠﻰ ﺗﻌﻠﻴﻖ ﺣﻮل اﻹﺟﺎﺑﺎت ﻣﻮﺿﺤﺎً اﻹﺟﺎﺑﺔ اﻟﺼﺤﻴﺤﺔ‪.‬‬

‫إﺿﺎﻓﺔ إﱃ ذﻟﻚ ﺳﻮف ﻳﺘﻠﻘﻰ اﳌﻌﻠﻢ ﺗﻌﻠﻴﻘﺎت ﻓﻮرﻳﺔ ﻣﻦ اﻟﱪﻧﺎﻣﺞ ﺣﻮل ﳐﻄﻂ اﻟﺘﻮزع اﻹﺣﺼﺎﺋﻲ ﻟﻺﺟﺎﺑﺎت ﻟﻴﻘﺮر ﻋﻨﺪﻫﺎ ﻓﻴﻤﺎ إذا ﻛﺎن ﻫﻨﺎك‬
‫ﺣﺎﺟﺔ ﻟﺘﻘﺪﱘ ﺷﺮح ﻣﻔﺼﻞ ﺣﻮل اﻟﻔﻜﺮة أو ﺗﻐﻴﲑ ﻣﺴﺎر اﶈﺎﺿﺮة أو اﻻﻧﺘﻘﺎل إﱃ اﻟﻔﻜﺮة اﻟﺘﺎﻟﻴﺔ؛ إن ﻫﺬﻩ اﳌﻨﻬﺠﻴﺔ ﺗﻌﺮف ﰲ اﻷﲝﺎث اﻟﱰﺑﻮﻳﺔ‬
‫ﺑﺎﻟﺘﻌﻠﻴﻢ اﳌﺸﱰط اﳌﺘﻮﻗﻒ ﻋﻠﻰ أﻣﻮر ﻣﺮﺗﺒﻄﺔ )‪.[792,793](Contingent Teaching‬‬

‫أﺧﲑاً ﻳﻮﺻﻰ ﻋﺎدة ﺑﻄﺮح ﺳﺆاﻟﲔ إﱃ ﲬﺲ أﺳﺌﻠﺔ ﺑﺎﺳﺘﺨﺪام ﻧﻈﺎم اﻟـ‪ ARS‬ﺧﻼل ﳏﺎﺿﺮة ﲤﺘﺪ ﻋﻠﻰ ﻣﺪى ﲬﺴﲔ دﻗﻴﻘﺔ]‪.[775,786,794‬‬

‫ﺑﺎﳋﻼﺻﺔ ﻓﺈن أﻫﺪاف اﺳﺘﺨﺪام ﻧﻈﺎم اﻟـ‪ ARS‬ﻫﻲ‪ :‬ﻗﻴﺎس ﻣﻌﺮﻓﺔ اﻟﻄﻼب ﲟﻮﺿﻮع اﳌﻘﺮر ﻗﺒﻞ اﻟﺒﺪء ﺑﺘﺪرﻳﺴﻪ )ﺗﻘﻴﻴﻢ أوﱄ(‪ ،‬ﻗﻴﺎس ﻣﻮﻗﻒ‬
‫اﻟﻄﻼب ﻣﻦ اﳌﻮﺿﻮع‪ ،‬ﲢﺪﻳﺪ ﻓﻴﻤﺎ إذا ﻗﺎم اﻟﻄﻼب ﺑﻘﺮاءة اﳌﻮﺿﻮﻋﺎت اﳌﺴﻨﺪة إﻟﻴﻬﻢ أم ﻻ‪ ،‬ﺗﻔﻌﻴﻞ دور اﻟﻄﻼب ﰲ ﻣﻮاﺟﻬﺔ اﻻﻋﺘﻘﺎدات‬
‫اﳋﺎﻃﺌﺔ اﻟﺸﺎﺋﻌﺔ‪ ،‬زﻳﺎدة ﲢﻔﻴﺰ اﻟﻄﻼب وﺷﺪ اﻧﺘﺒﺎﻫﻬﻢ إﱃ ﻣﻮﺿﻮع اﳌﻘﺮر‪ ،‬اﺧﺘﺒﺎر ﻣﺴﺘﻮى ﻓﻬﻢ اﻟﻄﻼب )ﺗﻘﻴﻴﻢ ﺑﻨﺎﺋﻲ( وﻣﺴﺘﻮى اﻟﻔﻬﻢ‬
‫اﻟﺘﺼﻮري‪ ،‬ﺗﺴﻬﻴﻞ اﳌﻨﺎﻗﺸﺔ وﺗﻮﺟﻴﻪ ﻤﻟﻤﻮﻋﺎت‪ ،‬زﻳﺎدة ﻧﺴﺒﺔ اﳊﻀﻮر‪.‬‬

‫ﺗﻄﺒﻴﻖ ﻧﻤﻮذج اﻟﺤﻠﻘﺔ اﻟﻤﻔﺘﻮﺣﺔ واﻟﻤﻐﻠﻘﺔ ﺗﺮﺑﻮﻳﺎً )‪:(Conducting Open-Close Loop Model‬‬ ‫‪7-5‬‬

‫ﻣﻦ أﺟﻞ ﺗﻄﺒﻴﻖ ﳕﻮذج اﻟﺘﺤﻜﻢ ﰲ اﳊﻠﻘﺔ اﳌﻔﺘﻮﺣﺔ واﳌﻐﻠﻘﺔ ﺗﺮﺑﻮﻳﺎً ﰎ ﺗﻮزﻳﻊ اﻟﻄﻼب ﻋﻠﻰ ﳎﻤﻮﻋﺘﲔ )‪ -1‬ﻤﻟﻤﻮﻋﺔ اﻻﺧﺘﺒﺎرﻳﺔ‪ -2 ،‬ﻤﻟﻤﻮﻋﺔ‬
‫اﻟﻘﻴﺎﺳﻴﺔ( ﻣﻨﻔﺼﻠﺘﲔ ﺑﺎﻟﻜﺎﻣﻞ وﻣﺘﻨﺎﻇﺮﺗﲔ ﻣﻦ ﺣﻴﺚ أﻋﻤﺎر اﻟﻄﻼب ﻣﻌﺪﻻﻬﺗﻢ وﺟﻨﺴﻬﻢ‪ ،‬ﻢ ﻛﻞ ﳎﻤﻮﻋﺔ ﻣﻦ ﻫﺬﻩ اﺠﻤﻟﻤﻮﻋﺎت ‪ 31‬ﻃﺎﻟﺒﺎً‪.‬‬
‫اﻻﺳﱰاﺗﻴﺠﻴﺔ اﳌﺘﺒﻌﺔ ﰲ ﺟﻠﺴﺔ اﳌﺨﱪ ﳐﺘﻠﻔﺔ ﺑﺎﻟﻨﺴﺒﺔ ﻟﻜﻞ ﳎﻤﻮﻋﺔ؛ ﻤﻟﻤﻮﻋﺔ اﻟﻘﻴﺎﺳﻴﺔ ﰎ ﺗﺪرﻳﺴﻬﺎ ﰲ اﳌﺨﱪ ﺑﺎﻟﻄﺮﻳﻘﺔ اﻟﺘﻘﻠﻴﺪﻳﺔ اﳌﺘﺒﻌﺔ )ﺣﻀﻮر‬
‫اﳉﻠﺴﺔ اﳌﺨﱪﻳﺔ ﻓﻘﻂ(‪ ،‬ﻨﻤﺎ اﺠﻤﻟﻤﻮﻋﺔ اﻻﺧﺘﺒﺎرﻳﺔ ﰎ ﺗﺪرﻳﺴﻬﺎ وﻓﻘﺎً ﻻﺳﱰاﺗﻴﺠﻴﺔ ﻣﻨﻬﺞ اﻟﺘﻌﻠﻴﻢ اﻟﱰﺑﻮي اﻟﺒﻨﺎﺋﻲ ﺑﺎﻻﻋﺘﻤﺎد ﻋﻠﻰ ﺣﻞ اﳌﺸﻜﻼت‬
‫)‪ (PrBL‬وإﳒﺎز اﳌﺸﺎرﻳﻊ )‪.(PjBL‬‬

‫‪ 1-7-5‬ﻬﺠﻴﺔ اﺠﻤﻟﻤﻮﻋﺔ اﻟﻘﻴﺎﺳﻴﺔ )‪:(Classical Group Methodology‬‬

‫إن ﻣﻨﻬﺞ اﳊﻠﻘﺔ اﳌﻔﺘﻮﺣﺔ ﻫﻮ ﺑﺎﻟﻄﺒﻊ اﳌﻨﻬﺞ اﻟﺴﺎﺋﺪ ﰲ ﻛﻠﻴﺔ اﳍﻨﺪﺳﺔ اﻟﻜﻬﺮﺑﺎﺋﻴﺔ واﻹﻟﻜﱰوﻧﻴﺔ‪ ،‬ﺣﻴﺚ ﻳﺪﺧﻞ اﻟﻄﺎﻟﺐ إﱃ اﳌﺨﱪ ﺧﻼل اﻟﺴﻨﺔ‬
‫‪ 6~10‬ﻣﺮات؛ ﻳﺸﺮح اﻷﺳﺘﺎذ اﻟﺘﺠﺮﺑﺔ‪ ،‬ﰒ ﻳﻘﻮم اﻷﺳﺘﺎذ ﺑﺘﻨﻔﻴﺬ اﻟﺘﺠﺮﺑﺔ ﺑﻨﻔﺴﻪ أﻣﺎم اﻟﻄﻼب‪ ،‬وﻳﺬﻫﺐ اﻷﻣﺮ ﺣﱴ اﳉﻠﺴﺔ اﻟﻼﺣﻘﺔ؛ ﰲ آﺧﺮ‬
‫اﻟﺴﻨﺔ ﳚﺮى اﻣﺘﺤﺎن ﻟﻠﻄﻼب‪.‬‬

‫اﳌﻨﻬﺞ اﻟﺬي ﺳﻠﻜﻨﺎﻩ ﰲ ﲝﺜﻨﺎ ﲝﻴﺚ ﻳﻜﻮن اﻷﻣﺮ ﻋﺎدﻻً ﻫﻮ‪:‬‬

‫‪ -‬ﻳﺘﻢ ﺗﺰوﻳﺪ اﻟﻄﻼب ﺑﺪﻟﻴﻞ اﻟﺘﺠﺮﺑﺔ ﻟﻜﻞ ﺟﻠﺴﺔ ﺧﻼل اﳉﻠﺴﺔ اﻟﻌﻤﻠﻴﺔ ﻧﻔﺴﻬﺎ وﻻ ﻳﻌﻄﺎﻫﺎ ﺑﺸﻜﻞ ﻣﺴﺒﻖ‪.‬‬
‫‪ -‬ﻳﺘﻢ ﺗﻘﺪﱘ ﻧﻔﺲ ﻣﻨﻬﺠﻴﺔ اﻟﺸﺮح ﻟﻠﻄﻼب ﻛﻼ اﺠﻤﻟﻤﻮﻋﺘﲔ وﻳﻄﻠﺐ ﻣﻨﻬﻢ ﺗﻨﻔﻴﺬ اﻟﺘﺠﺎرب ﻣﻦ دﻟﻴﻞ اﻟﺘﺠﺮﺑﺔ‪.‬‬
‫‪ -‬ﻻ ﻳﻄﻠﺐ ﻣﻦ اﻟﻄﻼب اﻟﺘﺤﻀﲑ اﳌﺴﺒﻖ ﻟﻠﺘﺠﺮﺑﺔ‪.‬‬
‫‪ -‬ﻻ ﲡﺮى ﻣﺬاﻛﺮات دورﻳﺔ ﻟﻠﻄﻼب وﻻ ﻳﻌﻄﻰ اﻟﻄﻼب ﻣﺸﺎرﻳﻊ ﻣﻨﺰﻟﻴﺔ‪.‬‬
‫‪ -‬اﻷﻣﺮ ﻣﱰوك ﻟﻠﻄﺎﻟﺐ ﺑﺸﻜﻞ ﻛﺎﻣﻞ ﰲ ﻣﻨﻬﺠﻴﺔ رﺑﻂ اﻟﺘﺠﺮﺑﺔ اﳌﺨﱪﻳﺔ ﺑﺎﻟﺘﻄﺒﻴﻖ ﺧﺎرج اﳌﺨﱪ‪.‬‬
‫‪ -‬ﰲ ﺣﺎل اﻟﺴﺆال ﻋﻦ ﻧﻘﺎط ﻣﺘﻘﺪﻣﺔ‪ ،‬ﻳﺘﻢ اﻹﺟﺎﺑﺔ ﻋﻠﻴﻬﺎ ﺑﺸﻜﻞ ﻛﺎﻣﻞ وﻳﺰود اﻟﻄﻼب ﺑﺎﳌﺮاﺟﻊ اﻟﻼزﻣﺔ‪.‬‬

‫‪277‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Toward a Constructivist Laboratory Education Model‬‬ ‫ﳓﻮ ﳕﻮذج ﺑﻨﺎﺋﻲ ﻟﻠﺘﻌﻠﻴﻢ اﳌﺨﱪي |‬

‫‪20min‬‬ ‫‪30min‬‬ ‫‪80min‬‬ ‫‪8min‬‬

‫‪Previous Lab‬‬ ‫‪Classical‬‬ ‫‪Hand-On‬‬ ‫‪Discussing New‬‬
‫‪Questions‬‬ ‫‪Lecturing‬‬ ‫‪Lab Session‬‬ ‫‪Ideas‬‬

‫اﻟﺸﻜﻞ‪ 37-5‬ﺗﻨﻈﻴﻢ ﺳﲑ اﳉﻠﺴﺎت اﳌﺨﱪﻳﺔ ﻟﻠﻤﺠﻤﻮﻋﺔ اﻟﻘﻴﺎﺳﻴﺔ‬

‫‪Embedded‬‬ ‫‪Hands-On‬‬
‫‪Systems‬‬ ‫‪Lab‬‬ ‫‪Outcome‬‬
‫‪Teacher‬‬ ‫‪Students‬‬
‫‪Design‬‬
‫‪Course‬‬ ‫‪Questions‬‬

‫اﻟﺸﻜﻞ‪ 38-5‬اﺳﱰاﺗﻴﺠﻴﺔ اﻟﺘﻌﻠﻴﻢ اﳌﺨﱪي ﻟﻠﻤﺠﻤﻮﻋﺔ اﻟﻘﻴﺎﺳﻴﺔ‬

‫‪ 2-7-5‬ﻬﺠﻴﺔ اﺠﻤﻟﻤﻮﻋﺔ اﻻﺧﺘﺒﺎرﻳﺔ )‪:(Experimental Group Methodology‬‬

‫ﻤﻟﻤﻮﻋﺔ اﻻﺧﺘﺒﺎرﻳﺔ ﰎ ﺗﺪرﻳﺴﻬﺎ وﻓﻘﺎً ﻻﺳﱰاﺗﻴﺠﻴﺔ ﻣﻨﻬﺞ اﻟﺘﻌﻠﻴﻢ اﻟﱰﺑﻮي اﻟﺒﻨﺎﺋﻲ ﺑﺎﻻﻋﺘﻤﺎد ﻋﻠﻰ ﺣﻞ اﳌﺸﻜﻼت ) ‪Problem-based‬‬

‫‪ (Learning‬وإﳒﺎز اﳌﺸﺎرﻳﻊ )‪ ،(Project-based Learning‬ﺣﻴﺚ ﰎ إﺳﻨﺎد ﻣﺸﻜﻠﺔ ﳏﺪدة ﺑﺸﻜﻞ أﺳﺒﻮﻋﻲ ﺧﻼل ﻛﻞ ﺟﻠﺴﺔ وﺑﻌﺪﻫﺎ‬
‫ﺘﻢ ﺣﻠﻬﺎ ﻣﻦ ﻗﺒﻞ اﺠﻤﻟﻤﻮﻋﺔ‪ ،‬اﳊﻠﻮل اﳌﻘﺪﻣﺔ ﻣﻦ ﻗﺒﻞ اﻟﻄﻼب ﻳﺘﻢ إرﺳﺎﳍﺎ ﻋﱪ اﻟﱪﻳﺪ اﻹﻟﻜﱰوﱐ وﻳﺘﻢ ﺗﺼﺤﻴﺤﻬﺎ ﻣﻦ ﻗﺒﻞ اﳌﺪرس وإرﺳﺎل‬
‫اﳌﻼﺣﻈﺎت ﻟﻠﻄﻼب‪ ،‬ﻛﻤﺎ ﻳﺘﻢ ﻣﻨﺎﻗﺸﺘﻬﺎ ﺧﻼل اﳉﻠﺴﺔ اﻟﻼﺣﻘﺔ‪ ،‬ﺑﺎﻹﺿﺎﻓﺔ إﱃ اﻟﻮﻇﺎﺋﻒ ﻳﻄﻠﺐ ﻣﻦ اﻟﻄﻼب اﻟﺘﺤﻀﲑ ﳌﺬاﻛﺮات أﺳﺒﻮﻋﻴﺔ‬
‫ﺸﻤﻞ ﻛﻞ ﻣﻨﻬﺎ ﻣﻌﻠﻮﻣﺎت اﳉﻠﺴﺔ اﻟﺴﺎﺑﻘﺔ وذﻟﻚ ﻬﺑﺪف ﺗﻘﻴﻴﻢ وﻗﻴﺎس اﻷﺛﺮ اﻟﻨﻔﻌﻲ‪ ،‬اﳌﻨﻬﺠﻴﺔ ﺧﻼل اﳉﻠﺴﺎت اﻟﻌﻤﻠﻴﺔ ﻫﻲ ﻛﻤﺎ اﻟﺘﺎﱄ‪:‬‬
‫‪ -‬ﰎ ﺗﺰوﻳﺪ اﻟﻄﻼب ﺑﺪﻟﻴﻞ اﻟﺘﺠﺮﺑﺔ اﻟﻌﻤﻠﻴﺔ ﻗﺒﻞ ﺣﻀﻮر اﻟﺘﺠﺮﺑﺔ‪.‬‬
‫‪ -‬ﻳﻄﻠﺐ ﻣﻦ اﻟﻄﻼب اﻟﺘﺤﻀﲑ اﳌﺴﺒﻖ ﻟﻠﺘﺠﺮﺑﺔ‪.‬‬
‫‪ -‬ﲡﺮى ﳍﻢ ﻣﺬاﻛﺮة ﻗﺒﻞ ﺑﺪاﻳﺔ ﻛﻞ ﺟﻠﺴﺔ ﻋﻤﻠﻴﺔ ﺗﺘﻀﻤﻦ ﻣﺎ ﰎ إﻋﻄﺎءﻩ ﰲ اﳉﻠﺴﺔ اﻟﺴﺎﺑﻘﺔ وﻣﺎ ﻃﻠﺐ ﻣﻨﻬﻢ ﲢﻀﲑﻩ‪ ،‬وﻳﺘﻢ اﻟﱰﻛﻴﺰ ﻋﻠﻰ‬
‫أ ّن اﻷﺳﺌﻠﺔ اﳌﺘﻌﻠﻘﺔ ﺑﺎﳉﻠﺴﺔ اﻟﺴﺎﺑﻘﺔ ﺗﻜﻮن أﻛﺜﺮ ﺻﻌﻮﺑﺔ وﲢﺘﺎج إﱃ ﺗﻔﻜﲑ دﻳﻨﺎﻣﻴﻜﻲ وﺗﺮﺗﻜﺰ ﻋﻠﻰ إﳚﺎد ﺣﻠﻮل ﺟﺪﻳﺪة‪ ،‬أﻣﺎ‬
‫اﻷﺳﺌﻠﺔ اﳌﺘﻌﻠﻘﺔ ﺑﺎﳉﻠﺴﺔ اﳊﺎﻟﻴﺔ اﻟﱵ ﻃﻠﺐ ﻣﻨﻬﻢ ﲢﻀﲑﻫﺎ ﻓﺘﻜﻮن ﻣﺒﺎﺷﺮة وذات ﻃﺎﺑﻊ واﺿﺢ‪.‬‬
‫‪ -‬ﻳﻘﻮم اﻷﺳﺘﺎذ أﺛﻨﺎء اﳉﻠﺴﺔ اﻟﻌﻤﻠﻴﺔ وﺧﻼل زﻣﻦ ﻻ ﻳﺘﺠﺎوز ‪ 20‬دﻗﻴﻘﺔ ﺑﺸﺮح ﻋﺎم ﻟﻠﻤﻔﺎﻫﻴﻢ واﻻﻋﺘﺒﺎرات اﳍﺎﻣﺔ ﻟﻠﻌﻨﺎﺻﺮ اﻟﱵ ﰎ‬
‫إﺿﺎﻓﺘﻬﺎ إﱃ اﻟﺘﺠﺎرب )‪.(Hardware‬‬
‫‪ -‬ﻳﻘﻮم اﻟﻄﻼب ﺑﺎﺗﺒﺎع ﺧﻄﻮات اﻟﺘﻨﻔﻴﺬ اﳌﻜﺘﻮﺑﺔ وﺗﺸﻐﻴﻞ اﻟﺘﺠﺮﺑﺔ‪.‬‬
‫‪ -‬ﻳﻘﻮم اﻷﺳﺘﺎذ أﺛﻨﺎء ﺗﻨﻔﻴﺬ اﻟﻄﻼب ﻟﻠﺘﺠﺎرب ﲟﺎﻳﻠﻲ‪:‬‬
‫ﻣﺮاﻗﺒﺔ أداء اﻟﻄﻼب وﺳﺮﻋﺔ اﺳﺘﺠﺎﺑﺘﻬﻢ‪.‬‬ ‫‹‬
‫اﻹﺟﺎﺑﺔ ﻋﻦ ﺗﺴﺎؤﻻت اﻟﻄﻼب اﳌﺒﻬﻤﺔ ووﺿﻊ ﻧﻘﺎط ﻣﺮﺟﻌﻴﺔ ﻷﺳﺒﺎب اﻟﺘﺴﺎؤﻻت‪ ،‬ﻓﺈذا ﻛﺎﻧﺖ ﻧﻘﺼﺎً ﰲ اﳌﻌﻠﻮﻣﺎت ﰲ دﻟﻴﻞ‬ ‫‹‬
‫اﻟﺘﺠﺮﺑﺔ‪ ،‬ﻓﺘﺘﻢ إﺿﺎﻓﺔ ﻫﺬﻩ اﳌﻌﻠﻮﻣﺎت‪ ،‬وإذا ﻛﺎﻧﺖ اﻟﺘﺴﺎؤﻻت ﻋﻦ ﻓﻜﺮة ﺟﺪﻳﺪة ﺧﻄﺮت ﻟﻠﻄﺎﻟﺐ‪ ،‬ﻓﻴﺘﻢ إﻋﻄﺎء ﺗﻘﻴﻴﻢ ﻟﻠﻔﻜﺮة‪،‬‬
‫وﻃﺮح اﻟﻔﻜﺮة ﻟﻠﻤﻨﺎﻗﺸﺔ ﻣﻊ ﺑﺎﻗﻲ اﻟﻄﻼب ﰲ اﻟﻔﱰة اﻷﺧﲑة ﻣﻦ اﳉﻠﺴﺔ‪.‬‬
‫ﺗﻘﻴﻴﻢ أداء اﻟﻄﻼب‪.‬‬ ‫‹‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪278‬‬
‫‪25‬‬ ‫اﻟﻔﺼﻞ اﳋﺎﻣﺲ | ‪Chapter 5‬‬

‫‪ -‬ﻣﺪة ﻛﻞ ﺟﻠﺴﺔ ﻋﻤﻠﻴﺔ ﺳﺎﻋﺘﲔ ﻣﺘﻮاﺻﻠﺘﲔ ﻣﻮزﻋﺔ ﻋﻠﻰ اﻟﺸﻜﻞ اﻟﺘﺎﱄ‪:‬‬

‫‪ 20‬دﻗﻴﻘﺔ ﻣﺬاﻛﺮة )ﻳﺘﻢ ﺗﺼﻤﻴﻢ ﳕﻮذج اﻷﺳﺌﻠﺔ ﲝﻴﺚ ﻳﺴﺎﻋﺪ اﻟﻄﺎﻟﺐ ﻋﻠﻰ ﻣﺮاﺟﻌﺔ ﻣﺎ أﺧﺬﻩ ﰲ اﳉﻠﺴﺔ اﻟﺴﺎﺑﻘﺔ وﺗﺮﺳﻴﺨﻪ‪،‬‬ ‫‹‬
‫وإﻋﻄﺎء ﻣﻔﻬﻮم ﻋﻦ ﻣﻮﺿﻮع اﳉﻠﺴﺔ اﳊﺎﻟﻴﺔ‪ ،‬ﻛﻤﺎ أن ﳕﻮذج اﻷﺳﺌﻠﺔ ﻻ ﳛﺘﺎج إﱃ أﺳﻠﻮب ﺣﻔﻈﻲ‪ ،‬ﺑﻞ ﻋﻠﻰ اﻟﻌﻜﺲ‪ ،‬ﻳﻜﻔﻲ‬
‫أن ﻳﻜﻮن اﻟﻄﺎﻟﺐ ﻗﺎم ﲝﻞ اﻟﻮﻇﻴﻔﺔ اﳌﺴﻨﺪة إﻟﻴﻪ ﻣﻦ اﳉﻠﺴﺔ اﻟﺴﺎﺑﻘﺔ وﻗﺮأ اﻟﺘﺠﺮﺑﺔ اﻟﻼﺣﻘﺔ وﻳﺴﺘﻄﻴﻊ أن ﳛﺼﻞ ﻋﻼﻣﺔ ﺗﺎﻣﺔ‪.‬‬
‫ﻛﻤﺎ أﻧﻪ ﰎ ﺣﺼﺮ زﻣﻦ اﳌﺬاﻛﺮة ﲝﻴﺚ أن اﻟﺰﻣﻦ اﶈﺪد ﻫﻮ اﻟﺰﻣﻦ اﻟﻼزم واﻟﻜﺎﰲ ﳊﻞ اﻷﺳﺌﻠﺔ ﻣﻦ ﻗﺒﻞ اﻟﻄﺎﻟﺐ اﻟﺬي اﺳﺘﻄﺎع‬
‫ﺣﻞ وﻇﻴﻔﺘﻪ وﻗﺮأ اﻟﺘﺠﺮﺑﺔ وﻟﻦ ﻳﻜﻮن ﻫﻨﺎك وﻗﺖ ﳌﺴﺎﻋﺪة ﻏﲑﻩ ﻋﻠﻰ اﳊﻞ(‪ .‬ﻃﺒﻌﺎً ﻫﺬا اﻟﻨﻤﻂ ﻣﻦ اﳌﺬاﻛﺮات رﻏﻢ ﺑﺴﺎﻃﺘﻪ‬
‫اﻟﺸﺪﻳﺪة وﻓﻌﺎﻟﻴﺘﻪ اﻟﻜﺒﲑة إﻻ أن اﻟﻄﻼب ﰲ اﻟﺒﺪاﻳﺔ وﺟﺪوا ﺻﻌﻮﺑﺔ ﰲ اﻟﺘﻌﺎﻣﻞ ﻣﻌﻪ ﻷ�ﻢ اﺧﺘﱪوﻩ ﰲ ﻫﺬﻩ اﻟﺘﺠﺮﺑﺔ ﻟﻠﻤﺮة اﻷوﱃ‬
‫ﻷ�ﻢ ﻗﺪ اﻋﺘﺎدوا ﻋﻠﻰ اﻣﺘﺤﺎن ﻓﺼﻠﻲ واﺣﺪ ﻳﻈﻬﺮ ﻣﺪى ﻗﻮة اﳊﻔﻆ ﻟﺪﻳﻬﻢ دون اﻟﻔﻬﻢ ﻟﻠﻔﻜﺮة!!! وﻟﻜﻦ ﺑﻌﺪ اﳌﺮة اﻷوﱃ‬
‫أﺻﺒﺢ ﻫﺬا اﻟﻨﻤﻮذج ﻣﻌﻴﻨﺎً ﳍﻢ ﻟﻜﻲ ﻳﻔﻬﻤﻮا اﻟﻔﻜﺮة ﺑﺸﻜﻞ أﻋﻤﻖ دون أن ﻳﺘﻮﺟﺐ ﻋﻠﻴﻬﻢ ﺣﺸﺮﻫﺎ ﰲ ﻋﻘﻮﳍﻢ دون ﻓﻬﻢ‬
‫ﻣﻀﻤﻮ�ﺎ!‬
‫‪ 10‬دﻗﺎﺋﻖ إﺟﺎﺑﺔ ﻋﻦ ﺗﺴﺎؤﻻت اﻟﻄﻼب ﻣﻦ اﳉﻠﺴﺎت اﻟﺴﺎﺑﻘﺔ‪.‬‬ ‫‹‬
‫‪ 15‬دﻗﻴﻘﺔ أو أﻛﺜﺮ ﺷﺮح ﻓﻜﺮة وﻣﻔﻬﻮم اﻟﺘﺠﺎرب اﳌﺘﻌﻠﻘﺔ ﺑﺎﳉﻠﺴﺔ ﻣﺘﻀﻤﻨﺔ ﺗﻔﺼﻴﻞ ﻋﻦ اﻟﻌﻨﺎﺻﺮ اﳉﺪﻳﺪة‪.‬‬ ‫‹‬
‫‪ 65‬دﻗﻴﻘﺔ ﺗﻨﻔﻴﺬ اﻟﺘﺠﺎرب ﻣﻦ ﻗﺒﻞ اﻟﻄﻼب واﻹﺷﺮاف ﻋﻠﻴﻬﻢ واﻹﺟﺎﺑﺔ ﻋﻦ اﻟﺘﺴﺎؤﻻت واﺳﺘﺤﺼﺎل اﻟﻘﻴﺎﺳﺎت ﻷداء اﻟﻄﻼب‬ ‫‹‬
‫ﻣﻦ ﻗﺒﻞ اﻷﺳﺘﺎذ‪.‬‬
‫‪ 10‬دﻗﺎﺋﻖ ﺗﺒﺎدل اﻷﻓﻜﺎر ﺑﲔ اﻟﻄﻼب وﺑﲔ اﻷﺳﺘﺎذ ﻓﻴﻤﺎ ﻳﺘﻌﻠﻖ ﲟﻮﺿﻮع اﳉﻠﺴﺔ وأﻓﻜﺎرﻫﺎ‪.‬‬ ‫‹‬

‫‪30min‬‬ ‫‪10min‬‬ ‫‪15min‬‬ ‫‪65min‬‬ ‫‪8min‬‬ ‫‪2min‬‬

‫‪Previous‬‬ ‫‪Prev. Lab‬‬ ‫‪Classical‬‬ ‫‪Hand-On‬‬ ‫‪Discussing‬‬ ‫‪Offering‬‬

‫‪Lab Test‬‬ ‫‪Questions‬‬ ‫‪Lecturing‬‬ ‫‪Lab Session‬‬ ‫‪New Ideas‬‬ ‫‪Assignment‬‬

‫اﻟﺸﻜﻞ ‪ 39-5‬ﺗﻨﻈﻴﻢ ﺳﲑ اﳉﻠﺴﺎت اﳌﺨﱪﻳﺔ ﻟﻠﻤﺠﻤﻮﻋﺔ اﻻﺧﺘﺒﺎرﻳﺔ‬

‫اﻟﺸﻜﻞ‪ 40-5‬اﺳﱰاﺗﻴﺠﻴﺔ اﻟﺘﻌﻠﻴﻢ اﳌﺨﱪي ﻟﻠﻤﺠﻤﻮﻋﺔ اﻻﺧﺘﺒﺎرﻳﺔ‬

‫‪279‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Toward a Constructivist Laboratory Education Model‬‬ ‫ﳓﻮ ﳕﻮذج ﺑﻨﺎﺋﻲ ﻟﻠﺘﻌﻠﻴﻢ اﳌﺨﱪي |‬

‫‪ 3-7-5‬اﻟﺘﺠﺎرب اﻻﺧﺘﺒﺎرﻳﺔ واﻷﻫﺪاف اﻟﺮﺋﻴﺴﻴﺔ ﳍﺎ )‪:(The Experiments and their Main Goals‬‬
‫اﺷﺘﻤﻠﺖ اﻟﺪراﺳﺔ ﻋﻠﻰ أرﺑﻊ ﺟﻠﺴﺎت ﻣﻄﻮﻟﺔ ﻣﻦ ﺟﻠﺴﺎت اﳌﺨﱪ اﻟﺮﺋﻴﺴﻴﺔ اﻣﺘﺪت ﻛﻞ ﻣﻨﻬﻤﺎ ﻋﻠﻰ ﻣﺪى ﺳﺎﻋﺘﲔ ﻣﻦ اﻟﺰﻣﻦ‪ ،‬ﺗﻀﻤﻨﺖ‬
‫اﳉﻠﺴﺎت إﺟﺮاء اﻟﺘﺠﺎرب اﳋﻤﺴﺔ اﻷول ﻣﻦ دﻟﻴﻞ اﻟﺘﺠﺎرب اﳌﺼﻤﻢ ﻟﻠﻮﺣﺔ اﻟﺘﻄﻮﻳﺮ‪.‬‬

‫اﳉﻠﺴﺔ اﻷوﱃ )اﻟﺘﺠﺮﺑﺔ اﻟﺜﺎﻧﻴﺔ ﰲ اﻟﺪﻟﻴﻞ( ﺗﻀﻤﻨﺖ اﻟﺘﺠﺎرب اﻟﱪﳎﻴﺔ اﳉﺰﺋﻴﺔ اﻟﺘﺎﻟﻴﺔ‪:‬‬

‫‪ -‬اﺳﺘﺜﻤﺎر ﺑﻮاﺑﺔ اﳌﺘﺤﻜﻢ ﻛﺒﻮاﺑﺔ ﺧﺮج ﻣﻦ أﺟﻞ ﺗﺸﻜﻴﻞ ﺣﺮﻛﺔ ﺿﻮﺋﻴﺔ ﺑﺎﺳﺘﺨﺪام اﻟﺜﻨﺎﺋﻴﺎت اﻟﻀﻮﺋﻴﺔ‪.‬‬
‫‪ -‬اﺳﺘﺜﻤﺎر ﺑﻮاﺑﺔ اﳌﺘﺤﻜﻢ ﻛﺒﻮاﺑﺔ دﺧﻞ ﻟﻘﺮاءة ﺣﺎﻟﺔ ﻣﻔﺎﺗﻴﺢ ﳊﻈﻴﺔ‪.‬‬
‫‪ -‬اﺳﺘﺜﻤﺎر ﺑﻮاﺑﺎت اﳌﺘﺤﻜﻢ ﻛﺒﻮاﺑﺎت دﺧﻞ‪/‬ﺧﺮج ﻷﻏﺮاض اﻟﺘﺤﻜﻢ‪.‬‬
‫‪ -‬ﺗﺸﻐﻴﻞ زﻣﲏ ﳌﺨﺎرج ﲢﻜﻢ اﺳﺘﻄﺎﻋﻴﺔ )رﻳﻠﻴﻪ(‪.‬‬

‫اﳉﻠﺴﺔ اﻟﺜﺎﻧﻴﺔ )اﻟﺘﺠﺮﺑﺔ اﻟﺜﺎﻣﻨﺔ ﰲ اﻟﺪﻟﻴﻞ( ﺗﻀﻤﻨﺖ اﻟﺘﺠﺎرب اﻟﱪﳎﻴﺔ اﳉﺰﺋﻴﺔ اﻟﺘﺎﻟﻴﺔ‪:‬‬

‫‪ -‬ﺑﺮﳎﺔ ﻟﻮﺣﺔ ﻣﻔﺎﺗﻴﺢ ﺳﺖ ﻋﺸﺮﻳﺔ ﻣﻮﺻﻠﺔ ﺑﻄﺮﻳﻘﺔ ﻣﺼﻔﻮﻓﺔ )‪.(Array Keypad; 4x4/16key‬‬
‫‪ -‬ﺑﺮﳎﺔ ﺷﺎﺷﺔ إﻇﻬﺎر ﻛﺮﻳﺴﺘﺎﻟﻴﺔ ﳏﺮﻓﻴﺔ ‪.LCD 20x4‬‬
‫‪ -‬ﺑﺮﳎﺔ ﺷﺎﺷﺔ إﻇﻬﺎر ﻛﺮﻳﺴﺘﺎﻟﻴﺔ رﺳﻮﻣﻴﺔ ‪.GLCD 128x64‬‬
‫‪ -‬ﺗﻮﻟﻴﺪ ﻧﻐﻤﺎت ﺻﻮﺗﻴﺔ )‪.(musical tones‬‬
‫‪ -‬ﺗﻮﻟﻴﺪ ﻧﻐﻤﺎت ‪.(Dual Tone Multi Frequency) DTMF‬‬

‫اﳉﻠﺴﺔ اﻟﺜﺎﻟﺜﺔ )اﻟﺘﺠﺮﺑﺔ اﻟﺮاﺑﻌﺔ ﰲ اﻟﺪﻟﻴﻞ( ﺗﻀﻤﻨﺖ اﻟﺘﺠﺎرب اﻟﱪﳎﻴﺔ اﳉﺰﺋﻴﺔ اﻟﺘﺎﻟﻴﺔ‪:‬‬

‫‪ -‬ﺗﻌﻠﻴﻤﺎت اﻹزاﺣﺔ واﻟﺪوران‪.‬‬

‫‪ -‬ﲢﻮﻳﻞ ﻗﻄﺐ رﻗﻤﻲ إﱃ ﻗﻄﺐ ﺸﺎﻬﺑﻲ ﻷﻏﺮاض ﻗﻴﺎس اﻟﺴﻌﺎت واﳌﻘﺎوﻣﺎت‪.‬‬
‫‪ -‬ﺑﺮﳎﺔ ﻣﺴﺘﻘﺒﻞ أﺷﻌﺔ ﲢﺖ اﳊﻤﺮاء )‪ (IR Receiver‬وﻓﻖ اﳌﻌﻴﺎر ‪.RC5‬‬
‫‪ -‬ﺑﺮﳎﺔ ﻣﺮﺳﻞ أﺷﻌﺔ ﲢﺖ اﳊﻤﺮاء )‪ (IR Transmitter‬ﻷﻏﺮاض اﻟﺘﺤﻜﻢ ﻋﻦ ﺑﻌﺪ وﻓﻖ اﳌﻌﻴﺎر ‪.RC5‬‬

‫اﳉﻠﺴﺔ اﻟﺮاﺑﻌﺔ )اﻟﺘﺠﺮﺑﺔ اﳋﺎﻣﺴﺔ ﰲ اﻟﺪﻟﻴﻞ( ﺗﻀﻤﻨﺖ اﻟﺘﺠﺎرب اﻟﱪﳎﻴﺔ اﳉﺰﺋﻴﺔ اﻟﺘﺎﻟﻴﺔ‪:‬‬

‫‪ -‬ﺗﺸﻐﻴﻞ ﻟﻮﺣﺔ إﻇﻬﺎر ﺳﺒﺎﻋﻴﺔ )‪ (Seven-segment displays‬ﻓﺮدﻳﺔ ﻛﻌﺪاد ﺗﺼﺎﻋﺪي‪/‬ﺗﻨﺎزﱄ ﻋﺸﺮي ‪.0-9‬‬
‫‪ -‬ﺗﺸﻐﻴﻞ أرﺑﻊ ﻟﻮﺣﺎت إﻇﻬﺎر ﺳﺒﺎﻋﻴﺔ ﻛﻌﺪاد ﻋﺸﺮي ‪ 0000-9999‬ﺑﻄﺮﻳﻘﺔ اﳌﺴﺢ )‪.(Scanning Method‬‬
‫‪ -‬ﺑﺮﳎﺔ وﺗﺸﻐﻴﻞ ﺳﺎﻋﺔ ﺗﻮﻗﻴﺖ وﺗﺎرﻳﺦ ﰲ اﻟﺰﻣﻦ اﳊﻘﻴﻘﻲ )‪ (RTC‬وﻋﺮض اﻟﻘﻢ ﻋﻠﻰ ﺷﺎﺷﺔ ‪.LCD‬‬
‫‪ -‬رﺑﻂ ﺷﺒﻜﺔ ‪ Ladder‬ﻏﺮاض ﲢﻮﻳﻞ اﻹﺷﺎرة اﻟﺮﻗﻤﻴﺔ إﱃ إﺷﺎرة ﺗﺸﺎﻬﺑﻴﺔ )‪.(DAC‬‬
‫‪ -‬اﺳﺘﺜﻤﺎر ﻘﺎرن اﻟﺘﺸﺎﻬﺑﻲ ﰲ اﳌﺘﺤﻜﻢ ﳌﻘﺎرﻧﺔ ﻗﻴﻢ دﺧﻞ ﺗﺸﺎﻬﺑﻴﺔ‪.‬‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪280‬‬
‫‪25‬‬ ‫اﻟﻔﺼﻞ اﳋﺎﻣﺲ | ‪Chapter 5‬‬

‫إن ﻛﻞ ﲡﺮﺑﺔ ﻣﻦ اﻟﺘﺠﺎرب اﻷرﺑﻌﺔ )اﻟﺘﺠﺮﺑﺔ اﻟﺜﺎﻧﻴﺔ إﱃ ﳋﺎﻣﺴﺔ ﰲ اﻟﺪﻟﻴﻞ( واﻟﺘﺠﺎرب اﳉﺰﺋﻴﺔ اﳌﻀﻤﻨﺔ ﻓﻴﻬﺎ ﳍﺎ ﺗﻮﻇﻴﻒ ﻋﻤﻠﻲ ﻫﺎم ﺟﺪاً ﰲ‬
‫اﻟﺘﻄﺒﻴﻘﺎت اﳍﻨﺪﺳﻴﺔ وﱂ ﺗﻮﺿﻊ ﺑﺸﻜﻞ اﻋﺘﺒﺎﻃﻲ‪ .‬اﻟﺸﻜﻞ‪ 41-5‬ﻳﺒﲔ اﳌﺨﻄﻂ اﻟﺘﺼﻤﻴﻤﻲ وﺑﺮﻧﺎﻣﺞ اﻟﺘﺸﻐﻴﻞ ﻟﺘﺠﺮﺑﺔ ﻋﺪاد ﺗﺼﺎﻋﺪي ﺑﺎﺳﺘﺨﺪام‬
‫ﻟﻮﺣﺎت إﻇﻬﺎر رﻗﻤﻴﺔ )اﻟﺘﺠﺮﺑﺔ اﳋﺎﻣﺴﺔ ﰲ دﻟﻴﻞ اﻟﺘﺠﺎرب اﻟﻌﻤﻠﻴﺔ(‪.‬‬

‫اﻟﺸﻜﻞ‪ 41-5‬اﳌﺨﻄﻂ اﻟﺘﺼﻤﻴﻤﻲ وﺑﺮﻧﺎﻣﺞ اﻟﺘﺸﻐﻴﻞ ﻟﺘﺠﺮﺑﺔ ﻋﺪاد ﺗﺼﺎﻋﺪي ﺑﺎﺳﺘﺨﺪام ﻟﻮﺣﺎت إﻇﻬﺎر رﻗﻤﻴﺔ‬

‫‪ 1-3-7-5‬ﺸﺎرﻳﻊ اﳌﺴﻨﺪة إﱃ اﺠﻤﻟﻤﻮﻋﺔ اﻻﺧﺘﺒﺎرﻳﺔ )‪:(Experimental Group Assignments‬‬

‫ﰲ ﻛﻞ ﺟﻠﺴﺔ ﻳﺘﻢ إﻋﻄﺎء اﻟﻄﻼب اﺠﻤﻟﻤﻮﻋﺔ اﻻﺧﺘﺒﺎرﻳﺔ اﳌﺘﻤﺜﻠﺔ ﺑﺎﳊﻠﻘﺔ اﳌﻐﻠﺔ ﻣﺸﺎرﻳﻊ ﻣﺘﻌﻠﻘﺔ ﲟﻮﺿﻮﻋﺎت ﻛﻞ ﺟﻠﺴﺔ‪ ،‬ﲝﻴﺚ ﻳﺘﻢ ﲨﻊ أﻓﻜﺎر‬
‫اﻟﺘﺠﺎرب ﰲ ﻣﺸﺎرﻳﻊ‪ ،‬ﻏﺎﻟﺒﺎً ﺗﻜﻮن ﺛﻼث ﻣﺸﺎرﻳﻊ‪ ،‬اﻷول ﻣﻨﻬﺎ ﺑﺴﻴﻂ‪ ،‬واﻟﺜﺎﱐ ﻣﺘﻮﺳﻂ‪ ،‬واﻟﺜﺎﻟﺚ ﻣﻌﻘﺪ‪ .‬ﺸﺎرﻳﻊ اﳌﺴﻨﺪة إﱃ اﺠﻤﻟﻤﻮﻋﺔ‬
‫اﻻﺧﺘﺒﺎرﻳﺔ ﺧﻼل اﳉﻠﺴﺎت اﻷرﺑﻌﺔ ﻫﻲ‪:‬‬

‫ﻣﺸﺎرﻳﻊ اﳉﻠﺴﺔ اﻟﻌﻤﻠﻴﺔ اﻷوﱃ‪:‬‬

‫‪ -1‬ﺗﻮﺻﻴﻞ وﺑﺮﳎﺔ ﳎﻤﻮﻋﺔ ﺛﻨﺎﺋﻴﺔ ﺿﻮﺋﻴﺔ ﻣﻊ ﻣﺘﺤﻜﻢ ﻣﺼﻐﺮ ﻟﺘﺸﻜﻴﻞ ﺷﺮﻳﻂ زﻳﻨﺔ ﺿﻮﺋﻲ‪.‬‬
‫‪ -2‬ﺗﺼﻤﻴﻢ ﻛﺮت ﲢﻜﻢ )‪ (Relays Card‬ﳛﻮي ﻋﻠﻰ ﳎﻤﻮﻋﺔ ﻣﺆﻟﻔﺔ ﻣﻦ ‪ 8-relays‬ﺗﻘﻮد أﲪﺎل ﻳﺘﻢ ﺗﺸﻐﻴﻠﻬﺎ وإﻳﻘﺎﻓﻬﺎ وﻓﻖ ﻓﱰات‬
‫زﻣﻨﻴﺔ ﻣﺘﺴﻠﺴﻠﺔ وﻣﱪﳎﺔ ﺑﺸﻜﻞ ﻣﺴﺒﻖ‪.‬‬
‫‪ -3‬ﺗﺼﻤﻴﻢ آﻟﺔ ﺣﺎﺳﺒﺔ رﻳﺎﺿﻴﺔ ﺑﺎﺳﺘﺨﺪام ﻣﺘﺤﻜﻢ ﻣﺼﻐﺮ وﺷﺎﺷﺔ ‪ LCD‬وﻟﻮﺣﺔ ﻣﻔﺎﺗﻴﺢ ﻣﺆﻟﻔﺔ ﻣﻦ ‪ 24‬ﻣﻔﺘﺎح ﳊﻈﻲ‪.‬‬

‫ﻣﺸﺎرﻳﻊ اﳉﻠﺴﺔ اﻟﻌﻤﻠﻴﺔ اﻟﺜﺎﻧﻴﺔ‪:‬‬

‫‪ -1‬ﺗﻮﻟﻴﺪ ﻧﻐﻤﺎت ﺻﻮﺗﻴﺔ وﻧﻐﻤﺎت ‪ DTMF‬ﻋﻦ ﻃﺮﻳﻖ ﻣﺘﺤﻜﻢ ﻣﺼﻐﺮ ﻣﻮﺻﻮل ﻣﻊ ﻟﻮﺣﺔ ﻣﻔﺎﺗﻴﺢ وﺷﺎﺷﺔ ‪.LCD‬‬
‫‪ -2‬رﺑﻂ ﺷﺎﺷﺔ إﻇﻬﺎر رﺳﻮﻣﻴﺔ )‪ (Graphic LCD‬ﻣﻊ ﻣﺘﺤﻜﻢ ﻣﺼﻐﺮ وﻣﻦ ﰒ ﺣﺴﺎب وﺗﻮﻟﻴﺪ إﺷﺎرة ‪.Sine‬‬

‫ﻣﺸﺎرﻳﻊ اﳉﻠﺴﺔ اﻟﻌﻤﻠﻴﺔ اﻟﺜﺎﻟﺜﺔ‪:‬‬

‫‪ -1‬ﺗﻮﺻﻴﻞ ‪ 4‬ﺷﺎﺷﺎت إﻇﻬﺎر رﻗﻤﻴﺔ )‪ (7-segment‬ﰲ ﻧﻈﺎم اﳌﺴﺢ ﻣﻊ ﻣﺘﺤﻜﻢ ﻣﺼﻐﺮ‪.‬‬

‫‪281‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Toward a Constructivist Laboratory Education Model‬‬ ‫ﳓﻮ ﳕﻮذج ﺑﻨﺎﺋﻲ ﻟﻠﺘﻌﻠﻴﻢ اﳌﺨﱪي |‬

‫‪ -2‬ﺗﻮﺻﻴﻞ ‪ 4‬ﺷﺎﺷﺎت إﻇﻬﺎر رﻗﻤﻴﺔ )‪ (7-segment‬ﺑﻮاﺳﻄﺔ ﻣﺴﺠﻼت إزاﺣﺔ )ﺗﺴﻠﺴﻠﻲ<ﺗﻔﺮﻋﻲ( وﻣﺎﺳﻜﺎت‪.‬‬

‫ﻣﺸﺎرﻳﻊ اﳉﻠﺴﺔ اﻟﻌﻤﻠﻴﺔ اﻟﺮاﺑﻌﺔ‪:‬‬

‫‪ -1‬ﺑﺮﳎﺔ ﺳﺎﻋﺔ رﻗﻤﻴﺔ ﺑﺎﺳﺘﺨﺪام ﺳﺘﺔ ﺷﺎﺷﺎت إﻇﻬﺎر رﻗﻤﻴﺔ )‪ (hh:mm:ss‬وﺑﺎﻻﻋﺘﻤﺎد ﻋﻠﻰ وﺣﺪة ﺗﻮﻟﻴﺪ اﻟﺰﻣﻦ اﳊﻘﻴﻘﻲ )‪(RTC‬‬
‫ﰲ ﻣﺘﺤﻜﻤﺎت اﻟﻌﺎﺋﻠﺔ ‪.AVR‬‬
‫‪ -2‬ﺑﺮﳎﺔ ﻣﻮﻟﺪ إﺷﺎرات )ﻣﺜﻠﺜﻴﺔ‪ ،‬ﻣﺮﺑﻌﺔ‪ ،‬ﺳﻦ ﻣﻨﺸﺎر‪ ،‬ﺟﻴﺒﻴﺔ( ﻋﻦ ﻃﺮﻳﻖ ﺗﻮﺻﻴﻞ وﺑﺮﳎﺔ ﺷﺒﻜﺔ ‪ Ladder‬ﻣﻊ ﻣﺘﺤﻜﻢ ﻣﺼﻐﺮ واﻟﺘﺤﻜﻢ‬
‫ﺑﻌﺮض دور وﺗﺮدد ﻫﺬﻩ اﻹﺷﺎرات‪.‬‬

‫ﻳﺘﻢ إرﺳﺎل اﳌﺸﺎرﻳﻊ ﻋﻦ ﻃﺮﻳﻖ اﻟﱪﻳﺪ اﻹﻟﻜﱰوﱐ ﺧﻼل ‪ 6‬أﻳﺎم‪ ،‬ﻳﻘﻮم اﻷﺳﺘﺎذ ﲟﺮاﺟﻌﺔ اﳌﺸﺎرﻳﻊ وإرﺳﺎل ﻣﻼﺣﻈﺎت ﻟﻜﻞ ﻃﺎﻟﺐ ﻟﺘﺤﺴﲔ ﻧﻘﺎط‬
‫ﳏﺪدة ﻟﻜﻞ ﻃﺎﻟﺐ‪ .‬ﻛﻤﺎ أﻧﻪ ﻳﺘﻢ ﲡﻤﻴﻊ اﻷﺧﻄﺎء وﻧﻘﺎط اﻟﻀﻌﻒ اﳌﺸﱰﻛﺔ ﻋﻨﺪ ﻣﻌﻈﻢ اﻟﻄﻼب )ﻣﺜﻞ اﻟﱪﳎﺔ اﳍﺮﻣﻴﺔ اﻟﺘﺴﻠﺴﻠﻴﺔ‪ ،‬ﻋﺪم ﺗﻘﺴﻴﻢ‬
‫اﻟﱪﻧﺎﻣﺞ إﱃ ﺑﺮاﻣﺞ وﻇﻴﻔﻴﺔ‪ ،‬ﺣﻠﻮل اﻟﱪﳎﺔ اﻟﺪﻳﻨﺎﻣﻴﻜﻴﺔ ﻟﻠﻤﻌﺎﳉﺎت‪ ،‬اﻟﱪﳎﺔ ﰲ اﻟﺰﻣﻦ اﳊﻘﻴﻘﻲ ﺑﺪﻻً ﻣﻦ إﺷﻐﺎل اﳌﻌﺎﰿ ﺑﺘﻌﻠﻴﻤﺎت اﻻﻧﺘﻈﺎر(‬
‫وﻣﻨﺎﻗﺸﺘﻬﺎ ﺧﻼل اﳉﻠﺴﺔ اﻟﻘﺎدﻣﺔ‪.‬‬

‫وﺑﺎﻟﺘﺎﱄ ﻓﺈن اﻟﻘﻴﺎﺳﺎت اﻟﱵ ﻳﺘﻢ أﺧﺬﻫﺎ ﰲ ﻛﻞ ﺟﻠﺴﺔ )ﻟﻜﻞ ﻃﺎﻟﺐ( ﺗﺘﻌﻠﻖ ﲜﻤﻴﻊ اﻟﻨﻘﺎط اﳌﺬﻛﻮرة أﻋﻼﻩ‪.‬‬

‫‪ 2-3-7-5‬ﺘﻄﻼع ﻣﺸﺎرﻳﻊ اﺠﻤﻟﻤﻮﻋﺔ اﻻﺧﺘﺒﺎرﻳﺔ )‪:(Experimental Group Assignments Observation‬‬

‫إن ﻣﻌﻈﻢ اﻟﻄﻼب اﺳﺘﻄﺎﻋﻮا إﳒﺎز اﳌﺸﺮوع اﻟﺒﺴﻴﻂ أو اﳌﺘﻮﺳﻂ اﻟﺘﻌﻘﻴﺪ‪ ،‬أﻣﺎ اﳌﺸﺮوع اﳌﻌﻘﺪ ﻓﻴﺸﻜﻞ ﻋﻮاﺋﻖ ﻋﺪﻳﺪة ﻋﻨﺪ ﻏﺎﻟﺒﻴﺔ ﻣﻦ اﻟﻄﻼب‬
‫ﺳﺒﺎب ﺗﺘﻌﻠﻖ ﲟﺪى ﺧﱪﻬﺗﻢ ﰲ اﳋﻮارزﻣﻴﺎت اﻟﱪﳎﻴﺔ واﻷﻣﻮر اﻷﺧﺮى‪ ،‬وﻫﻨﺎ ﻳﺄﰐ دور آﺧﺮ ﻟﻠﻤﻌﻠﻢ ﲜﻤﻊ ﻧﻘﺎط اﻟﻀﻌﻒ ﻫﺬﻩ واﻟﱵ ﻏﺎﻟﺒﺎً ﻣﺎ‬
‫ﺗﻜﻮن ﻣﺸﱰﻛﺔ‪ ،‬وﺗﻘﺪﱘ أﻓﻜﺎر ﻟﺸﺮوح وﺣﻠﻮل ﻋﺎﻣﺔ ﳍﺬﻩ اﳌﺸﺎﻛﻞ‪ ،‬وﺗﻮﺟﻴﻪ اﻟﻄﻼب إﱃ ﻣﺮاﺟﻊ ﺗﻔﻴﺪ ﰲ ﺗﻘﻮﻳﺔ اﻟﻨﻘﺎط اﻟﻀﻌﻴﻔﺔ ﻟﺪى ﻛﻞ واﺣﺪ‬
‫ﻣﻨﻬﻢ‪ .‬إن ﻧﺴﺒﺔ ﻇﻬﻮر اﳌﺸﺎﻛﻞ واﻟﻌﻮاﺋﻖ ﰲ ﺗﻨﻔﻴﺬ اﳌﺸﺎرﻳﻊ اﳌﻌﻘﺪة ﺗﺘﻀﺎءل ﺑﺸﻜﻞ ﻣﺘﺴﺎرع ﻣﻦ ﲡﺮﺑﺔ إﱃ أﺧﺮى‪ ،‬ﻓﺨﻼل اﻟﺒﺤﺚ اﳊﺎﱄ‪:‬‬

‫ﰲ اﻟﺘﺠﺮﺑﺔ اﻷوﱃ‪ ،‬اﺳﺘﻄﺎع ﲨﻴﻊ اﻟﻄﻼب ﺣﻞ اﳌﺸﺮوع اﻷول واﻟﺜﺎﱐ‪ ،‬ﺑﻴﻨﻤﺎ اﺳﺘﻄﺎع ‪ 50%‬ﻓﻘﻂ ﻣﻦ ﺣﻞ اﳌﺸﺮوع اﻟﺜﺎﻟﺚ ﺑﺸﻜﻞ ﻛﺎﻣﻞ‪،‬‬
‫ﺑﻴﻨﻤﺎ ﺑﺎﻗﻲ اﻟﻄﻼب اﺳﺘﻄﺎﻋﻮا اﻟﻮﺻﻮل إﱃ ﻣﺮاﺣﻞ ﻏﲑ ﻣﻜﺘﻤﻠﺔ ﻣﻦ اﳌﺸﺮوع ﺗﱰاوح ﻣﻦ ‪ ،30% ~ 80%‬وذﻟﻚ ﻟﺼﻌﻮﺑﺎت ﻧﺎﲡﺔ ﻋﻦ ﺿﻌﻒ‬
‫اﳋﱪة ﻟﺪﻳﻬﻢ ﻋﻨﺪ ﻫﺬﻩ اﻟﻨﻘﺎط‪.‬‬

‫ﺑﺎﻟﺮﻏﻢ ﻣﻦ ﺻﻌﻮﺑﺔ اﳌﺸﺮوع اﻟﺜﺎﻟﺚ‪ ،‬واﻟﺬي ﻫﻮ ﻋﺒﺎرة ﻋﻦ ﺗﺼﻤﻴﻢ آﻟﺔ ﺣﺎﺳﺒﺔ رﻳﺎﺿﻴﺔ ﺗﻀﻢ اﻟﻌﻤﻠﻴﺎت اﻟﺮﻳﺎﺿﻴﺔ اﻷﺳﺎﺳﻴﺔ ﺑﺸﺮط أن ﻳﺘﻢ‬
‫ﺣﺴﺎب اﻷرﻗﺎم ﻣﻬﻤﺎ ﺑﻠﻎ ﻃﻮل اﻟﺮﻗﻢ وﺑﻌﻤﻠﻴﺔ واﺣﺪة‪ ،‬وذﻟﻚ ﺑﺎﺳﺘﺨﺪام ﻣﺘﺤﻜﻢ ﻣﺼﻐﺮ وﺷﺎﺷﺔ إﻇﻬﺎر ‪ LCD‬وﻟﻮﺣﺔ ﻣﻔﺎﺗﻴﺢ ﻣﺆﻟﻔﺔ ﻣﻦ ‪24‬‬

‫ﻣﻔﺘﺎح ﳊﻈﻲ؛ إﻻ أن ‪ 20%‬ﻣﻦ اﻟﻄﻼب ﻗﺎﻣﻮا ﺑﺈﺿﺎﻓﺔ أﻓﻜﺎر ﺟﺪﻳﺪة إﱃ اﳌﺸﺮوع ﻣﺜﻞ إﺿﺎﻓﺔ اﻟﻌﻤﻠﻴﺎت اﳌﻨﻄﻘﻴﺔ واﳌﺜﻠﺜﻴﺔ‪.‬‬

‫‪ 3-3-7-5‬اﺧﺘﺒﺎر ﺎﺟﺊ ﻟﻜﻼ اﺠﻤﻟﻤﻮﻋﺘﲔ )‪:(Sudden Exam for Both Groups‬‬

‫اﻷﺳﺒﻮع اﻟﺬي ﺗﻼ اﳉﻠﺴﺔ اﻟﺮاﺑﻌﺔ ﰎ إﺟﺮاء اﺧﺘﺒﺎر ﻌﻠﻦ ﻟﻄﻼب اﺠﻤﻟﻤﻮﻋﺔ اﻻﺧﺘﺒﺎرﻳﺔ واﺠﻤﻟﻤﻮﻋﺔ اﻟﻘﻴﺎﺳﻴﺔ ﺧﻼل زﻣﻦ ‪ 90‬دﻗﻴﻘﺔ‪ ،‬وﰎ ﺗﻮزﻳﻊ‬
‫ﺳﺌﻠﺔ ﻋﻠﻰ ﻛﻼ اﺠﻤﻟﻤﻮﻋﺘﲔ ﲝﻴﺚ أن اﻷﺳﺌﻠﺔ ﴰﻠﺖ أﺳﺌﻠﺔ اﳌﺬاﻛﺮات اﻷرﺑﻌﺔ ﻟﻄﻼب ﻤﻟﻤﻮﻋﺔ اﻻﺧﺘﺒﺎرﻳﺔ ﺿﻤﻦ ﳕﻂ ﻋﺎم وﺷﺎﻣﻞ‪ ،‬وﺑﺎﻟﺘﺎﱄ‬
‫ﻋﻠﻰ اﻟﻄﺎﻟﺐ أن ﻳﻔﻬﻢ ﻛﻞ ﺷﻲء ﻟﻴﺠﻴﺐ ﻋﻠﻰ أي ﺷﻲء‪.‬‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪282‬‬
‫‪25‬‬ ‫اﻟﻔﺼﻞ اﳋﺎﻣﺲ | ‪Chapter 5‬‬

‫ﻰ اﻟﺮﻏﻢ ﻣﻦ أن ﻃﻼب اﺠﻤﻟﻤﻮﻋﺔ اﻻﺧﺘﺒﺎرﻳﺔ ﺧﺎﺿﻮا ﻫﺬا اﻻﺧﺘﺒﺎر ﻣﻔﺮﻗﺎً ﻋﻠﻰ أرﺑﻊ ﻣﺬاﻛﺮات‪ ،‬إﻻ أ�ﻢ ﻻ ﻳﻌﻠﻤﻮن اﻹﺟﺎﺑﺎت اﻟﺼﺤﻴﺤﺔ ﻋﻦ‬
‫أﺳﺌﻠﺔ اﳌﺬاﻛﺮات اﻷرﺑﻌﺔ اﻟﺴﺎﺑﻘﺔ ﻣﻦ ﻗﺒﻞ‪.‬‬

‫ ﻣﻦ ﻫﺬا اﻻﺧﺘﺒﺎر ﻫﻮ ﺗﻘﻴﻴﻢ اﻟﻌﺎﻣﻞ اﻟﻨﻔﻌﻲ وﻋﺎﻣﻞ اﻟﺘﺬﻛﺮ ﻟﻄﻼب اﺠﻤﻟﻤﻮﻋﺔ اﻟﻘﻴﺎﺳﻴﺔ‪ ،‬وﻛﺬﻟﻚ ﺗﻘﻴﻴﻢ ﻋﺎﻣﻞ اﻟﺘﺬﻛﺮ ﻟﻄﻼب اﺠﻤﻟﻤﻮﻋﺔ‬
‫اﻻﺧﺘﺒﺎرﻳﺔ‪ .‬ﳝﻜﻦ اﻻﻃﻼع ﻋﻠﻰ ﳕﻮذج اﻻﺧﺘﺒﺎرات اﻷرﺑﻌﺔ ﰲ اﳌﻠﺤﻖ‪ .4-‬ﻛﻤﺎ ﳝﻜﻦ اﻻﻃﻼع ﻋﻠﻰ ﳕﻮذج اﻻﺧﺘﺒﺎر ﺑﻌﺪ ﺳﻨﺔ ﰲ اﳌﻠﺤﻖ‪.5-‬‬
‫ﻧﺘﺎﺋﺞ اﻟﺘﺤﻠﻴﻞ اﻹﺣﺼﺎﺋﻲ ﻟﻼﺧﺘﺒﺎرات ﻧﺘﻌﺮض ﳍﺎ ﰲ اﻟﻔﻘﺮة اﻟﺘﺎﻟﻴﺔ‪.‬‬

‫‪ 4-7-5‬ﻣﻨﻬﺠﻴﺔ ﻗﻴﺎس اﻟﻔﻌﺎﻟﻴﺔ )‪:(The Pedagogical Effectiveness Measurement Methodology‬‬

‫إن ﻣﻨﻬﺠﻴﺔ ﻗﻴﺎس ﻓﻌﺎﻟﻴﺔ أي ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﺗﺸﱰط أن ﺗﻜﻮن ﻌﻴﻨﺎت ﻣﻦ ﻧﻔﺲ اﺠﻤﻟﺘﻤﻊ اﻹﺣﺼﺎﺋﻲ‪ ،‬أي ﳚﺐ أن ﺗﻜﻮن أﻋﻤﺎر وﻣﻌﺪﻻت‬
‫ﻄﻼب ﻣﺘﺴﺎوﻳﺔ ﻟﻜﻼ اﺠﻤﻟﻤﻮﻋﺘﲔ‪ ،‬ﻛﻤﺎ ﺗﺸﱰط أن ﻳﻜﻮن اﻟﻄﻼب ﻣﻦ ﺧﻠﻔﻴﺔ ﺗﺮﺑﻮﻳﺔ ﻣﺸﱰﻛﺔ‪.‬‬

‫ ﻋﺪد اﻟﻄﻼب ﰲ اﺠﻤﻟﻤﻮﻋﺔ اﻟﻘﻴﺎﺳﻴﺔ )اﳌﻌﻴﺎرﻳﺔ( ﻫﻮ ‪ N=31‬ﻃﺎﻟﺒﺎً؛ وﻣﺘﻮﺳﻂ أﻋﻤﺎرﻫﻢ ‪ 22.81‬ﻨﺔ؛ واﳌﻌﺪل اﻟﻮﺳﻄﻲ ﳌﻌﺪﻻﻬﺗﻢ اﻟﺪراﺳﻴﺔ‬
‫ﺧﻼل اﻟﺴﻨﻮات اﻟﺪراﺳﻴﺔ اﻟﺜﻼث اﻷوﱃ ﻳﺴﺎوي ‪.67.31%‬‬

‫ ﻋﺪد اﻟﻄﻼب ﰲ اﺠﻤﻟﻤﻮﻋﺔ اﻟﺘﺠﺮﻳﺒﻴﺔ )اﻻﺧﺘﺒﺎرﻳﺔ( ﻫﻮ ‪ N=31‬ﻃﺎﻟﺒﺎً؛ وﻣﺘﻮﺳﻂ أﻋﻤﺎرﻫﻢ ‪ 22.58‬ﻨﺔ؛ واﳌﻌﺪل اﻟﻮﺳﻄﻲ ﳌﻌﺪﻻﻬﺗﻢ‬
‫اﻟﺪراﺳﻴﺔ ﺧﻼل اﻟﺴﻨﻮات اﻟﺪراﺳﻴﺔ اﻟﺜﻼث اﻷوﱃ ﻳﺴﺎوي ‪.67.12%‬‬

‫ﲨﻴﻊ اﻟﻄﻼب ﻣﻦ ﺧﻠﻔﻴﺔ ﺗﻌﻠﻴﻤﻴﺔ واﺣﺪة وﻣﺘﻤﺎﺛﻠﺔ – أي أن ﻟﻐﺔ اﳌﻘﺮر ﻫﻲ اﻟﻠﻐﺔ اﻷم ﻟﻠﻄﻼب واﻟﺴﻨﻮات اﻟﺪراﺳﻴﺔ اﻟﺜﺎﻧﻮﻳﺔ واﳉﺎﻣﻌﻴﺔ ﻣﺸﱰﻛﺔ‬
‫ﰲ ﻣﻨﻬﺎﺟﻬﺎ‪.‬‬

‫‪Manual + Virtual‬‬ ‫‪Teacher-centric Approach‬‬

‫‪Different Outcome‬‬
‫‪Equivalent Groups‬‬

‫‪X‬‬ ‫‪Hands-on‬‬ ‫‪Open-loop Model‬‬

‫‪Y‬‬
‫‪Classical Group‬‬

‫‪Experimental Group‬‬
‫‪Manual + Virtual‬‬ ‫‪Student-centric Approach‬‬
‫‪X‬‬ ‫‪Hands-on‬‬ ‫‪Close-loop Model; PBL‬‬ ‫‪Yt‬‬

‫اﻟﺸﻜﻞ‪ 42-5‬ﻣﻨﻬﺠﻴﺔ ﻗﻴﺎس اﻟﻔﻌﺎﻟﻴﺔ ﻟﻠﻤﺠﻤﻮﻋﺔ اﻟﻘﻴﺎﺳﻴﺔ واﻻﺧﺘﺒﺎرﻳﺔ ﰲ ﳕﻮذج اﳊﻠﻘﺔ اﳌﻔﺘﻮﺣﺔ واﳌﻐﻠﻘﺔ‬

‫ اﻟﻘﻴﺎﺳﺎت اﻟﻜﻤﻴﺔ ﻟﻸداء واﻟﻔﻌﺎﻟﻴﺔ ﻟﻜﻼ اﺠﻤﻟﻤﻮﻋﺘﲔ ﰲ ﻫﺬﻩ اﳊﺎﻟﺔ ﺗﻌﺘﻤﺪ ﻋﻠﻰ ﲬﺲ اﺧﺘﺒﺎرات ﻣﻮﺿﺤﺔ ﻓﻴﻤﺎ ﻳﻠﻲ‪:‬‬

‫‪ ‬ﻘﻴﺎس اﻻﺧﺘﺒﺎري اﻷول‪ :‬ﻗﻴﺎس ﻛﻤﻲ ﻟﻠﺘﺄﻛﺪ ﻣﻦ ﺗﻜﺎﻓﺆ اﺠﻤﻟﻤﻮﻋﺘﲔ‪.‬‬

‫‪ ‬اﻟﻘﻴﺎس اﻻﺧﺘﺒﺎري اﻟﺜﺎﱐ‪ :‬اﻟﻘﻴﺎﺳﺎت اﻟﻜﻤﻴﺔ اﻟﱵ ﰎ اﺳﺘﺤﺼﺎﳍﺎ ﺧﻼل اﳉﻠﺴﺎت اﳌﺨﱪﻳﺔ ﺣﻮل أداء اﻟﻄﻼب‪.‬‬
‫‪ ‬ﻘﻴﺎس اﻻﺧﺘﺒﺎري اﻟﺜﺎﻟﺚ‪ :‬اﻣﺘﺤﺎن ﻓﺠﺎﺋﻲ ﻟﻜﻼ اﺠﻤﻟﻤﻮﻋﺘﲔ ﻓﻮر اﻧﺘﻬﺎء اﳉﻠﺴﺎت اﻻﺧﺘﺒﺎرﻳﺔ اﻷرﺑﻌﺔ‪.‬‬
‫‪ ‬اﻟﻘﻴﺎس اﻻﺧﺘﺒﺎري اﻟﺮاﺑﻊ‪ :‬اﻣﺘﺤﺎن ﳏﺪد ﻣﺴﺒﻘﺎً ﺑﻌﺪ اﻧﺘﻬﺎء ﺟﻠﺴﺎت اﳌﺨﺘﱪ اﻷرﺑﻌﺔ ﺑﺄﺳﺒﻮﻋﲔ‪.‬‬
‫‪ ‬اﻟﻘﻴﺎس اﻻﺧﺘﺒﺎري اﳋﺎﻣﺲ‪ :‬ﻣﻘﺎرﻧﺔ ﻣﺴﺘﻮى اﳌﻘﺎرﺑﺔ ﰲ ﺣﺼﻴﻠﺔ اﻟﺘﻌﻠﻢ ﺑﲔ اﻟﻄﻼب ذوي ﻗﺎﺑﻠﻴﺔ اﻟﺘﻌﻠﻢ اﳌﺘﻔﺎوﺗﺔ‪.‬‬

‫‪283‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Toward a Constructivist Laboratory Education Model‬‬ ‫ﳓﻮ ﳕﻮذج ﺑﻨﺎﺋﻲ ﻟﻠﺘﻌﻠﻴﻢ اﳌﺨﱪي |‬

‫‪ ‬اﻟﻘﻴﺎس اﻻﺧﺘﺒﺎري اﻟﺴﺎدس‪ :‬ﻗﻴﺎس ﻋﺎﻣﻞ اﻟﺘﺬﻛﺮ ﺑﻌﺪ ﻣﺮور ﺳﻨﺔ ﻣﻦ اﳉﻠﺴﺎت اﳌﺨﱪﻳﺔ‪.‬‬
‫‪ ‬اﻟﻘﻴﺎس اﻻﺧﺘﺒﺎري اﻟﺴﺎﺑﻊ‪ :‬اﻟﻘﻴﺎﺳﺎت اﻟﻨﻮﻋﻴﺔ )‪.(Qualitative observations‬‬

‫إن اﻟﻘﻴﺎﺳﺎت اﻟﻜﻤﻴﺔ اﻟﺴﺘﺔ اﻷوﱃ ﳝﻜﻦ أن ﲢﻠﻞ ﲡﺮﻳﺒﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻣﺴﺎﺋﻞ اﻟﺘﺤﻠﻴﻞ اﻹﺣﺼﺎﺋﻲ‪ ،‬ﰲ ﺣﲔ أن اﻟﻘﻴﺎس اﻟﺴﺎﺑﻊ اﻟﻨﻮﻋﻲ ﻳﺴﺘﻨﺪ‬
‫ﻋﻠﻰ ﻣﻼﺣﻈﺎت ﳏﺎﺿﺮ اﳌﺨﺘﱪ‪.‬‬

‫‪ 1-4-7-5‬اﻟﻘﻴﺎس اﻻﺧﺘﺒﺎري اﻷول )‪:(The 1st Evaluation Measure‬‬

‫ﰲ ﻫﺬا اﻟﻘﻴﺎس ﻳﺘﻢ اﻟﺘﺄﻛﺪ إﺣﺼﺎﺋﻴﺎً ﻣﻦ أن ﻤﻮﻋﺘﲔ ﻣﺘﻜﺎﻓﺌﺘﲔ وﻣﻦ ﻧﻔﺲ ﻋﻴﻨﺔ اﺠﻤﻟﺘﻤﻊ اﻹﺣﺼﺎﺋﻲ‪ ،‬ﻳﺘﻀﻤﻦ ﻫﺬا اﻟﻘﻴﺎس ﻣﺘﻮﺳﻂ اﻷﻋﻤﺎر‬
‫واﳌﻌﺪﻻت واﳌﻌﺮﻓﺔ اﻷوﻟﻴﺔ ﺣﻮل ﻣﻮﺿﻮع اﳌﻘﺮر ﻟﻜﻞ ﳎﻤﻮﻋﺔ‪.‬‬

‫ﳌﻘﺎرﻧﺔ اﻟﻨﺘﺎﺋﺞ ﻧﻄﺒﻖ اﻻﺧﺘﺒﺎر اﻹﺣﺼﺎﺋﻲ ﻟﻠﻔﺮﺿﻴﺔ ﺑﺎﺳﺘﺨﺪام اﻟﱪﻧﺎﻣﺞ ‪ SPSS‬ﳊﺴﺎب اﻟﻘﻴﻤﺔ اﻟﺪﻻﻟﻴﺔ ‪ p-value‬وﻓﻘﺎً ﻻﺧﺘﺒﺎر‪Mann-‬‬

‫‪ ،Whiteny‬إن ﻧﺘﺎﺋﺞ اﻻﺧﺘﺒﺎر اﻹﺣﺼﺎﺋﻲ ﻟﻠﻔﺮﺿﻴﺔ أﻇﻬﺮت اﻟﺘﺎﱄ‪:‬‬

‫‪ ‬ﻳﻮﺟﺪ اﺧﺘﻼف إﺣﺼﺎﺋﻲ ﻣﻌﺘﱪ ﺑﲔ ﻣﺘﻮﺳﻂ أﻋﻤﺎر اﺠﻤﻟﻤﻮﻋﺔ اﻟﻘﻴﺎﺳﻴﺔ واﻻﺧﺘﺒﺎرﻳﺔ )‪.(p-=0.899‬‬
‫‪ ‬ﻳﻮﺟﺪ اﺧﺘﻼف إﺣﺼﺎﺋﻲ ﻣﻌﺘﱪ ﺑﲔ ﻣﺘﻮﺳﻂ ﻣﻌﺪﻻت اﻟﻄﻼب ﻟﻠﺴﻨﻮات اﻟﺴﺎﺑﻘﺔ ﻣﻦ اﺠﻤﻟﻤﻮﻋﺔ اﻟﻘﻴﺎﺳﻴﺔ واﻻﺧﺘﺒﺎرﻳﺔ )‪p-‬‬

‫‪.(=0.314‬‬

‫ﻩ اﻟﻨﺘﺎﺋﺞ ﺗﻘﻮد إﱃ اﻻﺳﺘﻨﺘﺎج ﺑﺄن ﻛﻼ اﺠﻤﻟﻤﻮﻋﺘﲔ اﻟﻘﻴﺎﺳﻴﺔ واﻻﺧﺘﺒﺎرﻳﺔ ﻣﺘﻜﺎﻓﺌﺘﲔ وﻣﻦ ﻧﻔﺲ ﻓﻀﺎء اﻟﻌﻴﻨﺔ‪.‬‬

‫ﻣﻦ ﻧﺎﺣﻴﺔ ﺛﺎﻧﻴﺔ وﻣﻦ أﺟﻞ اﻟﺘﺄﻛﺪ ﻣﻦ وﺟﻮد اﻟﺘﻜﺎﻓﺆ‪ ،‬ﰎ إﺟﺮاء اﻣﺘﺤﺎن ﲤﻬﻴﺪي ﻘﻴﻴﻢ ﻣﺴﺘﻮى إﳌﺎم وﻣﻌﺮﻓﺔ اﻟﻄﻼب ﰲ ﻛﻼ اﺠﻤﻟﻤﻮﻋﺘﲔ‬
‫ﲟﻮﺿﻮﻋﺎت اﳌﻘﺮر‪ ،‬اﺠﻤﻟﻤﻮﻋﺘﲔ أدى اﻻﻣﺘﺤﺎن اﻷوﱄ ﺑﺸﻜﻞ ﺿﻌﻴﻒ ﺟﺪاً )‪ (~5%‬ﻛﻤﺎ ﻫﻮ ﻣﺘﻮﻗﻊ وﲟﻌﺎﻣﻞ ‪.p-=0.60‬‬

‫ﻨﺘﻴﺠﺔ ﺗﺸﲑ إﱃ ﻋﺪم وﺟﻮد اﺧﺘﻼف ﻣﻌﺘﱪ ﰲ اﳌﻌﺮﻓﺔ اﻟﺴﺎﺑﻘﺔ ﻟﻠﻄﻼب ﰲ ﻛﻼ اﺠﻤﻟﻤﻮﻋﺘﲔ‪ .‬اﳉﺪول‪ 2-5‬ﻳﺒﲔ إﺣﺼﺎﺋﻴﺎت اﻟﻘﻴﺎﺳﺎت‬
‫اﻹﺣﺼﺎﺋﻴﺔ ﻟﻠﺘﻜﺎﻓﺆ ﺑﲔ ﻤﻟﻤﻮﻋﺘﲔ‪.‬‬

‫‪Means‬‬ ‫‪Means‬‬ ‫‪Significance‬‬

‫‪Measure‬‬
‫‪Classical‬‬ ‫‪Experimental‬‬ ‫‪p-value‬‬
‫‪Previous Years‬‬ ‫‪22.81‬‬ ‫‪22.58‬‬ ‫‪0.899‬‬
‫‪Students Age‬‬ ‫‪67.31‬‬ ‫‪67.12‬‬ ‫‪0.314‬‬
‫‪Evaluation Exam‬‬ ‫‪5.51‬‬ ‫‪4.55‬‬ ‫‪0.600‬‬

‫اﳉﺪول‪ 2-5‬اﻟﻘﻴﺎﺳﺎت اﻹﺣﺼﺎﺋﻴﺔ ﺣﻮل اﻟﺘﻜﺎﻓﺆ ﺑﲔ ﻤﻟﻤﻮﻋﺘﲔ )‪(N=31/31‬‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪284‬‬
‫‪25‬‬ ‫اﻟﻔﺼﻞ اﳋﺎﻣﺲ | ‪Chapter 5‬‬

‫‪Classical‬‬ ‫‪Experimental‬‬ ‫‪67.31‬‬ ‫‪67.12‬‬

‫‪70‬‬
‫‪60‬‬ ‫‪p-value = 0.899‬‬
‫‪50‬‬ ‫‪> 0.05‬‬
‫‪40‬‬ ‫‪22.81 22.58‬‬ ‫‪p-value = 0.600‬‬
‫‪30‬‬ ‫‪> 0.05‬‬
‫‪20‬‬ ‫‪5.51‬‬ ‫‪4.55‬‬
‫‪10‬‬
‫‪0‬‬
‫‪Students Age‬‬ ‫‪Evaluation Exam‬‬ ‫‪Previous Years Avg‬‬

‫‪ 2-4-7-5‬اﻟﻘﻴﺎس اﻻﺧﺘﺒﺎري اﻟﺜﺎﱐ )‪:(The 2nd Evaluation Measure‬‬

‫ﻫﺬا اﻟﻘﻴﺎس ﻳﺘﻢ اﻟﺘﺄﻛﺪ إﺣﺼﺎﺋﻴﺎً ﻣﻦ وﺟﻮد ﻓﺮق ﰲ أداء ﻃﻼب اﺠﻤﻟﻤﻮﻋﺘﲔ ﺧﻼل اﳉﻠﺴﺎت اﳌﺨﱪﻳﺔ‪.‬‬

‫إن ﺟﻠﺴﺎت اﳌﺨﱪ ﰎ ﺗﻘﺪﳝﻬﺎ ﺑﻨﻤﻂ ﻳﺘﺒﻊ ﻓﻴﻊ اﻟﻄﻼب اﳋﻄﻮات اﳌﺸﺮوﺣﺔ ﰲ دﻟﻴﻞ اﻟﺘﺠﺮﺑﺔ وﺗﻄﺒﻴﻘﻬﺎ‪ ،‬وﻳﻘﻮم اﶈﺎﺿﺮ ﰲ اﳌﺨﱪ ﺑﺘﺴﺠﻴﻞ أداء‬
‫اﻟﻄﻼب ﺧﻼل اﳉﻠﺴﺔ‪.‬‬

‫ ﻋﺎم ﻗﺪم ﻃﻼب ﻛﻼ اﺠﻤﻟﻤﻮﻋﺘﲔ أداء ﻣﺘﻘﺎرب ﻣﻊ أداء أﻋﻠﻰ ﺑﻘﻠﻴﻞ ﻟﻄﻼب اﺠﻤﻟﻤﻮﻋﺔ اﻻﺧﺘﺒﺎرﻳﺔ‪ ،‬وﲟﺎ أن ﺗﻌﻘﻴﺪ وﻋﻤﻖ اﻟﺘﻄﺒﻴﻘﺎت ﰲ‬
‫اﳉﻠﺴﺎت اﳌﺨﱪﻳﺔ ازداد ﺑﺸﻜﻞ أﺳﺒﻮﻋﻲ‪ ،‬ﻓﻘﺪ ﺣﻆ أن اﻟﻔﺠﻮة ﰲ اﻷداء ﺑﲔ ﻛﻼ اﺠﻤﻟﻤﻮﻋﺘﲔ ﺑﺪأت ﺗﺰداد ﻛﻤﺎ ﻫﻮ ﻣﻮﺿﺢ ﰲ اﳉﺪول‪.3-5‬‬

‫ ﻗﻴﻤﺔ اﳌﻌﺪﻻت اﻟﻮﺳﻄﻴﺔ اﻟﻌﺎﻟﻴﺔ ﻟﻜﻼ اﺠﻤﻟﻤﻮﻋﺘﲔ ﺧﻼل اﳉﻠﺴﺎت اﳌﺨﱪﻳﺔ اﻷرﺑﻌﺔ ﻛﻤﺎ ﻫﻮ واﺿﺢ ﰲ اﳉﺪول‪ 3-5‬ﳝﻜﻦ ﻋﺰوﻩ إﱃ اﻟﺘﻔﺼﻴﻞ‬
‫واﻟﺘﻮﺿﻴﺢ اﳌﺘﻘﻦ ﰲ دﻟﻴﻞ اﻟﺘﺠﺎرب‪ ،‬ﻷن ﻛﻞ ﻣﺎ ﳛﺘﺎﺟﻪ اﻟﻄﻼب ﻫﻮ اﺗﺒﺎع دﻟﻴﻞ اﻟﺘﺠﺎرب وﺗﻄﺒﻴﻖ اﳋﻄﻮات اﳌﺬﻛﻮرة‪ ،‬وﺳﻮف ﳛﺼﻠﻮن ﻋﻠﻰ‬
‫ﺗﻠﻤﻴﺢ أو ﻣﺴﺎﻋﺪة ﻣﻦ اﶈﺎﺿﺮ إذا ﻣﺎ اﻋﱰﺿﺘﻬﻢ ﻣﺸﻜﻠﺔ‪.‬‬

‫إن اﻟﻘﻴﺎﺳﺎت اﻹﺣﺼﺎﺋﻴﺔ ﰲ اﳉﻠﺴﺎت اﻟﺜﻼﺛﺔ اﻷوﱃ ﱂ ﺗﻈﻬﺮ إﺣﺼﺎﺋﻴﺎً اﺧﺘﻼف ذو أﳘﻴﺔ‪ ،‬ﻋﻠﻰ اﻟﺮﻏﻢ أﻧﻪ ﻣﻦ اﳉﺪﻳﺮ ﺑﺎﻟﺬﻛﺮ ﻣﻼﺣﻈﺔ أن‬
‫اﻟـ‪ p-value‬ﺑﺪأت ﺑﺎﻟﻨﻘﺼﺎن ﻣﻊ ﺗﻘﺪم اﳉﻠﺴﺎت وازدﻳﺎد ﺗﻌﻘﻴﺪﻫﺎ ﺣﱴ اﳉﻠﺴﺔ اﻷﺧﲑة ﺣﻴﺚ ﲡﺎوزت اﻟﻌﺘﺒﺔ )‪ ،(p-=0.041<0.05‬وﻫﺬا‬
‫ل ﻋﻠﻰ أداء أﻓﻀﻞ ﺠﻤﻟﻤﻮﻋﺔ اﻟﻄﻼب اﻻﺧﺘﺒﺎرﻳﺔ ﺧﻼل ﺟﻠﺴﺎت اﳌﺨﺘﱪ واﻟﺬي ﺑﺪورﻩ ﻳﻮاﻓﻖ أﺳﺎﺳﺎً ﻣﺒﺪأ اﻟﺘﻌﻠﻢ اﻟﻘﺎﺋﻢ ﻋﻠﻰ اﳌﺸﺎرﻳﻊ‬
‫‪.PBL‬‬

‫‪Significance‬‬ ‫‪Means‬‬ ‫‪Means‬‬ ‫‪Means‬‬

‫‪Lab Session‬‬
‫‪p-value‬‬ ‫‪classical‬‬ ‫‪Experimental‬‬ ‫‪Difference‬‬
‫‪Session1‬‬ ‫‪0.960‬‬ ‫‪78.87‬‬ ‫‪80.16‬‬ ‫‪-1.29‬‬
‫‪Session2‬‬ ‫‪0.522‬‬ ‫‪85.48‬‬ ‫‪86.61‬‬ ‫‪-1.13‬‬
‫‪Session3‬‬ ‫‪0.050‬‬ ‫‪86.12‬‬ ‫‪90.97‬‬ ‫‪-4.84‬‬
‫‪Session4‬‬ ‫‪0.041‬‬ ‫‪88.23‬‬ ‫‪93.87‬‬ ‫‪-5.65‬‬

‫اﳉﺪول‪ 3-5‬اﻟﻘﻴﺎﺳﺎت اﻹﺣﺼﺎﺋﻴﺔ ﻷداء اﻟﻄﻼب ﺧﻼل ﺟﻠﺴﺎت اﳌﺨﺘﱪ )‪(N=31/31‬‬

‫‪285‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Toward a Constructivist Laboratory Education Model‬‬ ‫ﳓﻮ ﳕﻮذج ﺑﻨﺎﺋﻲ ﻟﻠﺘﻌﻠﻴﻢ اﳌﺨﱪي |‬

‫‪93.87‬‬
‫‪classical‬‬ ‫‪Experimental‬‬ ‫‪90.97‬‬
‫‪95‬‬
‫‪88.23‬‬
‫‪90‬‬ ‫‪85.48 86.61‬‬ ‫‪86.12‬‬

‫‪85‬‬ ‫‪80.16‬‬
‫‪78.87‬‬
‫‪80‬‬

‫‪75‬‬

‫‪70‬‬
‫‪Session1‬‬ ‫‪Session2‬‬ ‫‪Session3‬‬ ‫‪Session4‬‬

‫‪ 3-4-7-5‬اﻟﻘﻴﺎس اﻻﺧﺘﺒﺎري اﻟﺜﺎﻟﺚ )‪:(The 3rd Evaluation Measure‬‬

‫ﰎ إﺟﺮاء اﻣﺘﺤﺎن ﻏﲑ ﻣﻌﻠﻦ ﺑﻌﺪ أﺳﺒﻮع واﺣﺪ ﻣﻦ اﻧﺘﻬﺎء اﳉﻠﺴﺎت اﻷرﺑﻌﺔ‪ ،‬ﻟﻘﺪ ﰎ ﺗﺸﻜﻴﻞ أﺳﺌﻠﺔ اﻻﻣﺘﺤﺎن ﻣﻦ ﳎﻤﻮع اﳌﺬاﻛﺮات اﻷرﺑﻌﺔ اﻟﱵ‬
‫ﺗﻄﺒﻴﻘﻬﺎ ﻋﻠﻰ ﻃﻼب اﺠﻤﻟﻤﻮﻋﺔ اﻻﺧﺘﺒﺎرﻳﺔ‪.‬‬

‫ﻌﺪل اﻟﻮﺳﻄﻲ ﻟﻠﻤﺬاﻛﺮات اﻷرﺑﻌﺔ ﻋﻠﻰ ﻣﺪى اﳉﻠﺴﺎت اﳌﺨﱪﻳﺔ اﻷرﺑﻌﺔ ﻟﻄﻼب اﺠﻤﻟﻤﻮﻋﺔ اﻻﺧﺘﺒﺎرﻳﺔ ﻫﻮ ‪ ،89.27%‬وإن ﻣﻌﺪل ﻃﻼب‬
‫ﻤﻟﻤﻮﻋﺔ اﻟﻘﻴﺎﺳﻴﺔ ﰲ اﻻﻣﺘﺤﺎن اﻟﻐﲑ ﻣﻌﻠﻦ ﱂ ﻳﺘﺠﺎوز ‪ 40.77%‬وﻟﻪ ﻗﻴﻤﺔ أﳘﻴﺔ ‪ p-=0.000<0.05‬ﺎرة إﱃ أن ﻃﻼب اﺠﻤﻟﻤﻮﻋﺔ‬
‫اﻻﺧﺘﺒﺎرﻳﺔ ﻗﻮا أداءً أﻋﻠﻰ ﺑﻜﺜﲑ ﻣﻦ ﻃﻼب اﺠﻤﻟﻤﻮﻋﺔ اﻟﻘﻴﺎﺳﻴﺔ‪ ،‬وﻫﺬا ﻳﻌﻮد إﱃ ﻣﻨﻬﺠﻴﺔ اﻟﺘﻌﻠﻢ اﻟﻘﺎﺋﻢ ﻋﻠﻰ اﳌﺸﺎرﻳﻊ وﺣﻞ اﳌﺸﻜﻼت اﻟﺬي‬
‫ﰎ اﺗﺒﺎﻋﻪ‪ .‬اﳉﺪول‪ 4-5‬ﻳﺒﲔ ﻧﺘﺎﺋﺞ اﻟﺘﺤﻠﻴﻞ اﻹﺣﺼﺎﺋﻲ ﻟﻼﺧﺘﺒﺎر اﻟﻐﲑ ﻣﻌﻠﻦ‪.‬‬

‫‪Variable‬‬ ‫‪Means‬‬ ‫‪Means‬‬ ‫‪Significance‬‬

‫‪Classical vs. Experimental‬‬ ‫‪Classical‬‬ ‫‪Experimental‬‬ ‫‪p-value‬‬
‫‪Sub-Exam‬‬ ‫‪40.77‬‬ ‫‪89.27‬‬ ‫‪0.000‬‬

‫اﳉﺪول‪ 4-5‬اﻟﻘﻴﺎﺳﺎت اﻹﺣﺼﺎﺋﻴﺔ ﻟﻨﺘﺎﺋﺞ اﻟﻄﻼب ﰲ اﻻﺧﺘﺒﺎر اﻟﻐﲑ ﻣﻌﻠﻦ )‪(N=31/31‬‬

‫‪89.27‬‬

‫‪100‬‬
‫‪40.77‬‬
‫‪80‬‬
‫‪60‬‬
‫‪40‬‬
‫‪20‬‬
‫‪0‬‬
‫‪Classical‬‬ ‫‪Experimental‬‬

‫ﺘﺼﻨﻴﻒ اﻷﺳﺌﻠﺔ إﱃ ﳎﻤﻮﻋﺎﻬﺗﺎ اﻷﺳﺎﺳﻴﺔ – اﻷﺳﺌﻠﺔ اﳌﺘﻌﻠﻘﺔ ﺑﻜﻞ ﺟﻠﺴﺔ ﳐﺘﱪ – ﻓﺈﻧﻪ ﳝﻜﻦ ﻣﻘﺎرﻧﺔ اﳌﺘﻮﺳﻄﺎت اﳊﺴﺎﺑﻴﺔ ﻟﻜﻞ اﺧﺘﺒﺎر‪ ،‬ﲟﺎ أن‬
‫ﺧﺘﺒﺎر اﻟﻐﲑ ﻣﻌﻠﻦ ﻫﻮ ﳎﻤﻮع اﻻﺧﺘﺒﺎرات اﻷرﺑﻌﺔ اﻟﱵ ﰎ إﺟﺮاؤﻫﺎ ﻟﻄﻼب اﺠﻤﻟﻤﻮﻋﺔ اﻻﺧﺘﺒﺎرﻳﺔ‪ .‬اﳉﺪول‪ 5-5‬ﻳﻠﺨﺺ ﻧﺘﺎﺋﺞ اﻻﺧﺘﺒﺎر اﻟﻐﲑ‬
‫ﻣﻌﻠﻦ ﻣﻘﺴﻤﺎً إﱃ ﳎﻤﻮﻋﺎت وﻓﻘﺎً ﻟﺘﻌﻠﻘﻬﺎ ﲜﻠﺴﺎت اﳌﺨﺘﱪ‪.‬‬

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‫‪25‬‬ ‫اﻟﻔﺼﻞ اﳋﺎﻣﺲ | ‪Chapter 5‬‬

‫)‪Mean (%‬‬ ‫)‪Mean (%‬‬

‫‪Session Test‬‬
‫‪Classical Group‬‬ ‫‪Experimental Group‬‬
‫‪Session 1‬‬ ‫‪62.42‬‬ ‫‪86.39‬‬
‫‪Session 2‬‬ ‫‪38.68‬‬ ‫‪86.77‬‬
‫‪Session 3‬‬ ‫‪44.81‬‬ ‫‪92.77‬‬
‫‪Session 4‬‬ ‫‪17.19‬‬ ‫‪91.16‬‬

‫اﳉﺪول‪ 5-5‬اﻟﻘﻴﺎﺳﺎت اﻹﺣﺼﺎﺋﻴﺔ اﳌﻔﺼﻠﺔ ﻟﻨﺘﺎﺋﺞ اﻟﻄﻼب ﰲ اﻻﺧﺘﺒﺎر اﻟﻐﲑ ﻣﻌﻠﻦ )‪(N=31/31‬‬

‫إن اﳌﺘﻮﺳﻄﺎت اﳊﺴﺎﺑﻴﺔ ﻟﺪرﺟﺎت اﻷﻠﺔ اﳌﺘﻌﻠﻘﺔ ﺑﺎﺠﻤﻟﻤﻮﻋﺔ اﻷوﱃ )‪ (Session1‬ﻛﺎﻧﺖ اﻷﻋﻠﻰ‪ ،‬وﺗﻨﺎﻗﺼﺖ ﺑﺸﻜﻞ ﻣﻠﺤﻮظ ﻣﻊ اﻟﺘﻘﺪم‬
‫اﻷﺳﺒﻮﻋﻲ ﰲ ﺟﻠﺴﺎت اﳌﺨﱪ وﻛﺎن اﳌﻌﺪل اﻷﻛﱪ ﻟﻠﺘﻨﺎﻗﺺ ﻫﻮ ﰲ ﺟﻠﺴﺔ اﳌﺨﺘﱪ اﻷﺧﲑة )‪ (Session4‬ﻛﻤﺎ ﻫﻮ واﺿﺢ ﰲ اﳉﺪول‪.5-5‬‬

‫ﻧﻼﺣﻆ أن ب اﺠﻤﻟﻤﻮﻋﺔ اﻻﺧﺘﺒﺎرﻳﺔ ﺣﺎﻓﻈﻮا إﱃ ﺣﺪ ﻣﺎ ﻋﻠﻰ أداء ﻣﺘﻤﺎﺛﻞ‪ ،‬إﻻ أن ﻧﺘﺎﺋﺞ ﻤﻟﻤﻮﻋﺔ اﻟﻘﻴﺎﺳﻴﺔ ﺗﺸﲑ إﱃ ﺿﻌﻒ اﻟﻔﻬﻢ‬
‫ﺘﺼﻮري ﻣﻘﺎرﻧﺔ ﻣﻊ ﻃﻼب اﺠﻤﻟﻤﻮﻋﺔ اﻻﺧﺘﺒﺎرﻳﺔ‪ ،‬وذﻟﻚ ﻰ اﻟﺮﻏﻢ ﻣﻦ أن ﻛﻼ ﻃﻼب اﺠﻤﻟﻤﻮﻋﺘﲔ ﺗﺒﻊ دﻟﻴﻞ اﻟﺘﺠﺎرب ﺧﻼل ﺟﻠﺴﺎت اﳌﺨﱪ‬
‫ﺑﺎﻟﻄﺮﻳﻘﺔ ﻧﻔﺴﻬﺎ‪.‬‬

‫اﻟﺸﻜﻞ ‪ 43-5‬ﻣﻠﺨﺺ ﻧﺘﺎﺋﺞ اﻟﻘﻴﺎﺳﺎت اﻟﻜﻤﻴﺔ اﻹﺣﺼﺎﺋﻴﺔ ﻟﻠﻘﻴﺎﺳﺎت اﻻﺧﺘﺒﺎرﻳﺔ اﻟﺜﻼﺛﺔ اﻷوﱃ‬

‫‪ 4-4-7-5‬اﻟﻘﻴﺎس اﻻﺧﺘﺒﺎري اﻟﺮاﺑﻊ )‪:(The 4th Evaluation Measure‬‬

‫ﺻﻤﻢ ﻟﺘﻘﻴﻴﻢ اﻟﻔﻬﻢ اﻟﺘﺼﻮري اﳌﻔﱰض ﳊﺼﻴﻠﺔ اﻟﺘﻌﻠﻢ‬

‫ﻫﺬا اﻟﻘﻴﺎس ﻳﺘﻀﻤﻦ اﻣﺘﺤﺎﻧﺎً أُﻋﻠﻦ ﻋﻨﻪ ﺑﻌﺪ أﺳﺒﻮﻋﲔ ﻣﻦ اﻧﺘﻬﺎء اﳉﻠﺴﺎت اﻷرﺑﻌﺔ‪ ،‬وﻗﺪ ُ‬
‫ﺴﺎت اﳌﺨﺘﱪ ﻟﻄﻼب ﻛﻼ اﺠﻤﻟﻤﻮﻋﺘﲔ ﻋﻠﻰ ﻣﺴﺘﻮى اﻟﻜﻴﺎن اﻟﺼﻠﺐ واﳌﺴﺘﻮى اﻟﱪﳎﻲ‪ .‬اﻷﺳﺌﻠﺔ ﻛﺎﻧﺖ ﻋﺒﺎرة ﻋﻦ ﻣﺸﺮوع ﺗﻄﺒﻴﻘﻲ ﻣﺘﻌﺪد‬
‫اﻟﻄﻠﺒﺎت ﻟﻨﻈﺎم اﺳﺘﺤﺼﺎل ﻣﻌﻄﻴﺎت ﳛﺘﺎج إﱃ ﺗﻔﻜﲑ دﻳﻨﺎﻣﻴﻜﻲ وإﳚﺎد ﺣﻠﻮل ﺟﺪﻳﺪة‪.‬‬

‫‪287‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Toward a Constructivist Laboratory Education Model‬‬ ‫ﳓﻮ ﳕﻮذج ﺑﻨﺎﺋﻲ ﻟﻠﺘﻌﻠﻴﻢ اﳌﺨﱪي |‬

‫‪Variable‬‬ ‫‪Means‬‬ ‫‪Means‬‬ ‫‪Significance‬‬

‫‪Classical vs. Experimental‬‬ ‫‪Classical‬‬ ‫‪Experimental‬‬ ‫‪p-value‬‬
‫‪Project-Exam‬‬ ‫‪57.13‬‬ ‫‪93.35‬‬ ‫‪0.003‬‬

‫اﳉﺪول‪ 6-5‬اﻟﻘﻴﺎﺳﺎت اﻹﺣﺼﺎﺋﻴﺔ اﳌﻔﺼﻠﺔ ﻟﻨﺘﺎﺋﺞ اﻟﻄﻼب ﰲ اﻻﺧﺘﺒﺎر اﳌﻌﻠﻦ )‪(N=31/31‬‬

‫‪93.35‬‬
‫‪57.13‬‬
‫‪100‬‬

‫‪50‬‬

‫‪0‬‬
‫‪Classical‬‬ ‫‪Experimental‬‬

‫ﻣﻦ اﳉﺪول‪ 6-5‬ﻧﻼﺣﻆ أﻣﺘﻮﺳﻂ ﻣﻌﺪل ﻃﻼب اﺠﻤﻟﻢ وﻋﺔ اﻟﻘﻴﺎﺳﻴﺔ ﻛﺎن ‪ 57.13%‬ﺣﲔ أن ﻣﺘﻮﺳﻂ ﻣﻌﺪل ﻃﻼب اﺠﻤﻟﻤﻮﻋﺔ اﻻﺧﺘﺒﺎرﻳﺔ‬
‫ﻛﺎن ‪ ،93.35%‬وإن ﻗﻴﻤﺔ ‪ p-value‬ﻤﻘﺎرﻧﺔ ﺑﲔ ﻛﻼ اﺠﻤﻟﻤﻮﻋﺘﲔ ﻓﻴﻤﺎ ﻳﺘﻌﻠﻖ ﺑﺎﻣﺘﺤﺎن اﳌﺸﺮوع ﻛﺎﻧﺖ ‪ ،p-=0.000<0.05‬واﻟﱵ ﺗﺸﲑ‬
‫ دﻟﻴﻞ إﺣﺼﺎﺋﻲ ﻋﻠﻰ أداء أﻋﻠﻰ ﺑﻜﺜﲑ ﻟﻄﻼب اﺠﻤﻟﻤﻮﻋﺔ اﻻﺧﺘﺒﺎرﻳﺔ ﻧﻈﺮاً ﳌﻨﻬﺠﻴﺔ اﻟﺘﻌﻠﻢ اﻟﻘﺎﺋﻢ ﻋﻠﻰ اﳌﺸﺎرﻳﻊ‪.‬‬

‫ﻧﻼﺣﻆ أﻳﻀﺎً أن ﻃﻼب ﻤﻟﻤﻮﻋﺔ اﻻﺧﺘﺒﺎرﻳﺔ ﺣﺎﻓﻈﻮا ﻋﻠﻰ ﻣﺴﺘﻮى اﻷداء اﻟﻌﺎﱄ اﻟﺬي أﳒﺰوﻩ ﺳﺎﺑﻘﺎً‪ ،‬ﺑﻴﻨﻤﺎ زاد ﻃﻼب ﻤﻟﻤﻮﻋﺔ اﻟﻘﻴﺎﺳﻴﺔ‬
‫ﺑﺸﻜﻞ ﻧﺴﱯ ﻣﻌﺪﳍﻢ‪ ،‬وﻫﺬا راﺟﻊ أن ﻃﻼب ﻤﻟﻤﻮﻋﺔ اﻟﻘﻴﺎﺳﻴﺔ ﻗﺎﻣﻮا ﺑﺪراﺳﺔ دﻟﻴﻞ اﻟﺘﺠﺎرب ﺑﺸﻜﻞ أﻋﻤﻖ ﺑﻜﺜﲑ ﻣﻦ دراﺳﺘﻬﻢ إﻳﺎﻩ ﺧﻼل‬
‫اﳉﻠﺴﺎت اﻟﺴﺎﺑﻘﺔ ﺑﺴﺐ ﻗﺮب اﻻﻣﺘﺤﺎن اﻟﻌﻤﻠﻲ اﻟﻨﻬﺎﺋﻲ‪ ،‬إﻻ أن ﻓﺠﻮة ﻛﺒﲑة ﺟﺪاً ﰲ اﻷداء ﺑﲔ ﻤﻟﻤﻮﻋﺘﲔ ﻣﺎ ﺗﺰال واﺿﺤﺔ وﻗﺎﺋﻤﺔ‪.‬‬

‫‪ 5-4-7-5‬اﻟﻘﻴﺎس اﻻﺧﺘﺒﺎري اﳋﺎﻣﺲ )‪:(The 5th Evaluation Measure‬‬

‫ﻫﺬا اﻟﻘﻴﺎس ﻳﺘﻀﻤﻦ ﻣﻘﺎرﻧﺔ ﻣﺴﺘﻮى اﳌﻘﺎرﺑﺔ ﰲ ﺣﺼﻴﻠﺔ اﻟﺘﻌﻠﻢ ﰲ ﻛﻞ ﳎﻤﻮﻋﺔ ﺑﲔ اﻟﻄﻼب ذوي ﻗﺎﺑﻠﻴﺔ اﻟﺘﻌﻠﻢ اﳌﺘﻔﺎوﺗﺔ‪.‬‬

‫إن ﻣﻘﺎرﻧﺔ ﻗﻴﻤﺔ اﻻﳓﺮاف اﳌﻌﻴﺎري ‪ (Standard Deviation) SD‬ﻟﻠﻤﺠﻤﻮﻋﺔ اﻻﺧﺘﺒﺎرﻳﺔ ﻣﻊ ﻗﻴﻤﺔ اﻻﳓﺮاف اﳌﻌﻴﺎري ﻟﻠﻤﺠﻤﻮﻋﺔ اﻟﻘﻴﺎﺳﻴﺔ‬
‫ﻄﻲ ﻣﺆﺷﺮ دﻻﱄ ﻋﻠﻰ ﻧﺘﺎﺋﺞ ﺣﺼﻴﻠﺔ ﺗﻌﻠﻢ ﻣﻘﺎرﺑﺔ ﺑﲔ ﻃﻼب اﺠﻤﻟﻤﻮﻋﺔ اﻻﺧﺘﺒﺎرﻳﺔ ﻣﻦ ﻣﺴﺘﻮﻳﺎت ﺗﻌﻠﻢ ﳐﺘﻠﻔﺔ – ﻗﺪرة اﻟﺘﻌﻠﻢ ﻟﻜﻞ واﺣﺪ‬
‫ﲣﺘﻠﻒ ﻋﻦ اﻵﺧﺮ‪ ،‬ﻓﻤﻨﻬﻢ ﻗﺎﺑﻠﻴﺔ ﺗﻌﻠﻤﻬﻢ ﺑﻄﻴﺌﺔ وﻣﻨﻬﻢ ﻗﺎﺑﻠﻴﺔ ﺗﻌﻠﻤﻬﻢ ﻋﺎﻟﻴﺔ وﺳﺮﻳﻌﺔ – ﺣﻴﺚ ﻳﺘﻢ ﺣﺴﺎب ﻣﻌﺪل اﻟﺘﺒﺎﻳﻦ ﰲ ﻋﻼﻣﺎت‬
‫ﻟﻄﻼب وﺗﻘﻴﻴﻤﺎﻬﺗﻢ‪.‬‬

‫إن ﻗﻴﻤﺔ اﻻﳓﺮاف اﳌﻌﻴﺎري ﻟﻠﻤﺠﻤﻮﻋﺔ اﻻﺧﺘﺒﺎرﻳﺔ ﻟﻼﻣﺘﺤﺎن اﻟﻐﲑ ﻣﻌﻠﻦ ﻫﻲ ‪ 4.67‬وﻫﻲ ﺗﺪل ﻋﻠﻰ ﺗرب ﻛﺒﲑ ﰲ أداء اﻟﻄﻼب ﰲ اﺠﻤﻟﻤﻮﻋﺔ‬
‫اﻻﺧﺘﺒﺎرﻳﺔ؛ ﰲ ﺣﲔ أن ﻗﻴﻤﺔ اﻻﳓﺮاف اﳌﻌﻴﺎري ﻟﻠﻤﺠﻤﻮﻋﺔ اﻟﻘﻴﺎﺳﻴﺔ ‪ 20.73‬ﺬا ﻳﺪل ﻋﻠﻰ ﺗﺒﺎﻳﻦ ﻛﺒﲑ ﰲ أداء اﻟﻄﻼب ﻣﻦ ﻧﻔﺲ اﺠﻤﻟﻤﻮﻋﺔ‪.‬‬

‫إذا ﻗﻤﻨﺎ ﺑﺘﻘﺴﻴﻢ ﳎﻤﻮﻋﺔ اﻟﻄﻼب اﻟﻘﻴﺎﺳﻴﺔ )‪ SG‬إﱃ ﳎﻤﻮﻋﺘﲔ ﺟﺰﺋﻴﺘﲔ ﻣﺘﺴﺎوﻳﺘﲔ ﺑﻨﺎءً ﻋﻠﻰ ﻣﻌﺪﻻﻬﺗﻢ اﻟﺪراﺳﻴﺔ ﺧﻼل اﻟﺴﻨﻮات اﻟﺜﻼث‬
‫وﱃ‪ ،‬ﲝﻴﺚ ﺗﻀﻢ اﺠﻤﻟﻤﻮﻋﺔ اﻷوﱃ ”‪ “HASG‬اﻟﻄﻼب اﻷﻋﻠﻰ ﻣﻌﺪﻻً )‪ HA; Higher Ability‬وﺗﻀﻢ اﺠﻤﻟﻤﻮﻋﺔ اﻟﺜﺎﻧﻴﺔ ”‪“LASG‬‬

‫اﻟﻄﻼب اﻷﻗﻞ ﻣﻌﺪﻻً )‪ LA; Lower Ability‬وﺑﺎﳌﺜﻞ ﺑﺎﻟﻨﺴﺒﺔ ﻟﻄﻼب اﺠﻤﻟﻤﻮﻋﺔ اﻻﺧﺘﺒﺎرﻳﺔ )‪ “HAEG” ،(EG‬وﻛﺬﻟﻚ ”‪.“LAEG‬‬
‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪288‬‬
‫‪25‬‬ ‫اﻟﻔﺼﻞ اﳋﺎﻣﺲ | ‪Chapter 5‬‬

‫اﻵن ﻟﻨﻄﺒﻖ اﻟﺘﺤﻠﻴﻞ اﻹﺣﺼﺎﺋﻲ وﳓﺴﺐ اﳌﺘﻮﺳﻂ واﻻﳓﺮاف اﳌﻌﻴﺎري ﻟﻜﻞ ﻓﺌﺔ )‪ (N=15‬ﻛﻤﺎ ﻫﻮ ﻣﺒﲔ ﺑﺎﳉﺪول‪.7-5‬‬

‫‪Variable‬‬ ‫‪Classical Group‬‬ ‫‪Experimental Group‬‬

‫‪Category‬‬ ‫‪HASG‬‬ ‫‪LASG‬‬ ‫‪HAEG‬‬ ‫‪LAEG‬‬

‫‪Sun-Exam Means‬‬ ‫‪46.04%‬‬ ‫‪37.27%‬‬ ‫‪93.67‬‬ ‫‪93.06‬‬
‫‪Sun-Exam SD‬‬ ‫‪26.146‬‬ ‫‪12.120‬‬ ‫‪4.97‬‬ ‫‪4.45‬‬
‫‪Mean Difference‬‬ ‫‪8.77%‬‬ ‫‪0.61%‬‬
‫‪SD Difference‬‬ ‫‪14.026‬‬ ‫‪0.520‬‬

‫اﳉﺪول‪ 7-5‬ﻗﻴﻢ اﳌﺘﻮﺳﻄﺎت واﻻﳓﺮاف اﳌﻌﻴﺎري ﻟﻠﻔﺌﺎت اﳉﺰﺋﻴﺔ‬

‫‪Classical Group HASG‬‬ ‫‪93.06‬‬

‫‪93.67‬‬
‫‪Classical Group LASG‬‬
‫‪100‬‬ ‫‪Exper. Group HAEG‬‬
‫‪90‬‬ ‫‪Exper. Group LAEG‬‬
‫‪80‬‬
‫‪70‬‬ ‫‪46.04‬‬
‫‪60‬‬ ‫‪37.27‬‬
‫‪50‬‬
‫‪40‬‬
‫‪30‬‬
‫‪20‬‬
‫‪10‬‬
‫‪0‬‬
‫‪HASG‬‬ ‫‪LASG‬‬ ‫‪HAEG‬‬ ‫‪LAEG‬‬

‫‪Classical Group‬‬ ‫‪Exper. Group‬‬

‫ﺑﺎﻟﻨﻈﺮ إﱃ اﳉﺪول‪ 7-5‬أن اﻟﺘﺒﺎﻳﻦ ﰲ ﻧﺘﺎﺋﺞ اﺠﻤﻟﻤﻮﻋﺔ اﻟﻘﻴﺎﺳﻴﺔ وﺻﻞ إﱃ ‪ ،14.026%‬واﻻﺧﺘﻼف ﰲ اﳌﺘﻮﺳﻂ اﳊﺴﺎﰊ ﻫﻮ ‪8.77%‬‬

‫وﻫﻲ ﻧﺴﺒﻴﺔ ﻛﺒﲑة ﻣﻘﺎرﻧﺔً ﻣﻊ ﻓﺮق اﳌﺘﻮﺳﻂ اﳊﺴﺎﰊ ﻟﻠﻤﻌﺪﻻت ﺑﺸﻜﻞ ﻋﺎم‪ ،‬ﺣﻴﺚ أن ﻣﻌﺪﻻت اﻟﻄﻼب ﺗﱰاوح ﻋﻤﻮﻣﺎً ﺑﲔ ‪65~85‬‬

‫)‪ ،(20%‬ﻓﻬﻮ ﻳﺸﻜﻞ ﰲ ﻫﺬﻩ اﳊﺎﻟﺔ اﺧﺘﻼﻓﺎً ﻳﺼﻞ إﱃ ‪.40%‬‬

‫ﺑﺎﻟﻨﺴﺒﺔ ﻟﻠﻤﺠﻤﻮﻋﺔ اﻻﺧﺘﺒﺎرﻳﺔ ﳒﺪ ﺗﻘﺎرﺑﺎً ﻛﺒﲑاً ﺟﺪاً ﻻ ﻳﺘﺠﺎوز ﺗﺒﺎﻳﻨﻪ ‪ ،0.52‬ﻛﻤﺎ أن اﻟﻔﺮق ﰲ اﳌﺘﻮﺳﻂ اﳊﺴﺎﰊ ﻟﻠﻨﺘﺎﺋﺞ ﻣﻬﻤﻞ ﻧﺴﺒﻴﺎً‬
‫‪ ،0.61%‬وﻫﺬا ﺑﺪورﻩ ﻳﺆﻛﺪ ﻋﻠﻰ أن ﺗﻄﺒﻴﻖ ﻣﻨﻬﺠﻴﺔ اﻟﺘﻐﺬﻳﺔ اﻟﻌﻜﺴﻴﺔ اﻟﺒﻨﺎﺋﻴﺔ ﰲ اﻟﺘﻌﻠﻢ ﻳﻌﺰز وﻳﺮﻓﻊ ﻣﻦ ﻣﺴﺘﻮى اﻟﻄﻼب اﻷﻗﻞ )‪(LAEG‬‬
‫إﱃ ﻣﺴﺘﻮى ﻣﻘﺎرب ﺟﺪاً ﻟﻠﻄﻼب اﻷﻋﻠﻰ )‪ (HAEG‬وﻳﻠﻐﻲ اﻟﻔﺠﻮة اﳌﻌﺮﻓﻴﺔ واﻟﺘﻔﺎوت ﰲ اﳌﺴﺘﻮﻳﺎت ﺑﲔ اﻟﻄﻼب‪.‬‬

‫‪ 6-4-7-5‬اﻟﻘﻴﺎس اﻻﺧﺘﺒﺎري اﻟﺴﺎدس )‪:(The 6th Evaluation Measure‬‬

‫ﻳﺘﻀﻤﻦ ﻫﺬا اﻟﻘﻴﺎس اﺧﺘﺒﺎراً ﳌﻌﺎﻣﻞ اﻟﻨﺴﻴﺎن )‪ (Forgetting Factor‬ﻟﻜﻞ ﻣﻦ ب اﺠﻤﻟﻤﻮﻋﺔ اﻻﺧﺘﺒﺎرﻳﺔ )‪CLG‬واﺠﻤﻟﻤﻮﻋﺔ اﻟﻘﻴﺎﺳﻴﺔ‬
‫)‪ .(OLG‬ﰎ إﺟﺮاء اﻻﺧﺘﺒﺎر ﺑﻌﺪ ﺳﻨﺔ ﻛﺎﻣﻠﺔ ﻣﻦ ﳐﱪ اﻟﺘﺠﺎرب اﻟﻌﻤﻠﻴﺔ – ‪ – Thursday 4, March, 2010‬واﺷﺘﻤﻞ اﻻﺧﺘﺒﺎر ﻋﻠﻰ‬
‫اﺛﲏ ﻋﺸﺮ ﺳﺆاﻻً ﰎ إﻋﺪادﻫﺎ وﺟﺪوﻟﺘﻬﺎ زﻣﻨﻴﺎً )اﳉﺪول‪ (8-5‬وﻓﻘﺎً ﻟﺘﻌﻘﻴﺪ اﻹﺟﺎﺑﺔ ﲝﻴﺚ أﻧﻪ‪:‬‬
‫‪ -‬ﻋﻠﻰ اﻟﻄﺎﻟﺐ أن ﳚﺪ اﻹﺟﺎﺑﺔ ﻣﻦ ﺧﻼل ﻗﺮاءة اﻟﺴﺆال ﻣﺮة واﺣﺪة ﻓﻘﻂ‪.‬‬

‫‪289‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Toward a Constructivist Laboratory Education Model‬‬ ‫ﳓﻮ ﳕﻮذج ﺑﻨﺎﺋﻲ ﻟﻠﺘﻌﻠﻴﻢ اﳌﺨﱪي |‬

‫‪ -‬اﻷﺳﺌﻠﺔ ﺷﺎﻣﻠﺔ وﻋﺎﻣﺔ إﻻ أ�ﺎ ﻟﻴﺴﺖ ﻣﺒﺎﺷﺮة‪ ،‬ﻓﺎﻟﻐﺎﻳﺔ اﺧﺘﺒﺎر ﻣﺴﺘﻮى اﻟﻔﻬﻢ واﺧﺘﺒﺎر اﻟﺘﺬﻛﺮ ﻟﻠﻤﻌﻠﻮﻣﺎت ﻣﻌﺎً‪.‬‬
‫‪ -‬ﻣﺪة اﻹﺟﺎﺑﺔ ﻋﻠﻰ اﻷﺳﺌﻠﺔ ‪ 15‬دﻗﻴﻘﺔ ﻓﻘﻂ‪.‬‬
‫‪ -‬اﻷﺳﺌﻠﺔ اﺷﺘﻤﻠﺖ ﻋﻠﻰ اﻟﺘﺠﺎرب اﳋﻤﺴﺔ اﻷوﱃ اﳌﺘﻌﻠﻘﺔ ﺑﻨﻤﻮذج اﳊﻠﻘﺔ اﳌﻔﺘﻮﺣﺔ واﳌﻐﻠﻘﺔ إﺿﺎﻓﺔ إﱃ اﻟﺘﺠﺎرب اﻟﺴﺎﺑﻌﺔ واﻟﺜﺎﻣﻨﺔ‬
‫اﳌﺘﻌﻠﻘﺔ ﺑﻨﻤﻮذج اﳌﺨﱪ اﻻﻓﱰاﺿﻲ واﻟﺘﻄﺒﻴﻘﻲ إﺿﺎﻓﺔ ﻟﺒﻘﻴﺔ اﻟﺘﺠﺎرب اﳌﺘﻤﻤﺔ ﻟﻠﻤﻘﺮر‪.‬‬
‫‪ -‬ﻋﻼﻣﺔ اﻹﺟﺎﺑﺔ اﻟﻜﺎﻣﻠﺔ ﳉﻤﻴﻊ اﻷﺳﺌﻠﺔ ﻫﻲ ‪ 100‬درﺟﺔ ﰎ ﺗﻮزﻳﻌﻬﺎ ﻣﻦ أﺟﻞ ‪ 50‬درﺟﺔ ﻟﻠﺘﺠﺎرب اﻷرﺑﻌﺔ اﻷوﱃ‪.‬‬

‫‪Question‬‬ ‫‪Experiment‬‬ ‫‪Mark/Q‬‬ ‫‪Answer Time‬‬

‫‪Q01:‬‬ ‫‪1~5‬‬ ‫‪10‬‬ ‫‪60sec‬‬
‫‪Q02:‬‬ ‫‪1~5‬‬ ‫‪6‬‬ ‫‪60sec‬‬
‫‪Q03:‬‬ ‫‪1~5‬‬ ‫‪5‬‬ ‫‪60sec‬‬
‫‪Q04:‬‬ ‫‪1~5‬‬ ‫‪6‬‬ ‫‪60sec‬‬
‫‪Q05:‬‬ ‫‪6~10‬‬ ‫‪5‬‬ ‫‪30sec‬‬
‫‪Q06:‬‬ ‫‪1~10‬‬ ‫‪9+9‬‬ ‫‪180sec‬‬
‫‪Q07:‬‬ ‫‪1~5‬‬ ‫‪6‬‬ ‫‪60sec‬‬
‫‪Q08:‬‬ ‫‪1~5‬‬ ‫‪8‬‬ ‫‪60sec‬‬
‫‪Q09:‬‬ ‫‪6~10‬‬ ‫‪8‬‬ ‫‪120sec‬‬
‫‪Q10:‬‬ ‫‪6~10‬‬ ‫‪6‬‬ ‫‪60sec‬‬
‫‪Q11:‬‬ ‫‪6~10‬‬ ‫‪6‬‬ ‫‪30sec‬‬
‫‪Q12:‬‬ ‫‪6~10‬‬ ‫‪16‬‬ ‫‪120sec‬‬
‫‪100‬‬ ‫‪15min‬‬

‫اﳉﺪول‪ 8-5‬اﳉﺪوﻟﺔ اﻟﺰﻣﻨﻴﺔ وﺗﻮزع اﻟﻌﻼﻣﺎت ﻋﻠﻰ أﺳﺌﻠﺔ اﺧﺘﺒﺎر ﲢﺪﻳﺪ ﻣﻌﺎﻣﻞ اﻟﻨﺴﻴﺎن‬

‫اﳌﺘﻮﺳﻂ اﳊﺴﺎﰊ ﻟﻠﻤﺠﻤﻮﻋﺔ اﻟﻘﻴﺎﺳﻴﺔ ﻟﻨﺘﺎﺋﺞ اﻻﺧﺘﺒﺎر ﻳﺴﺎوي ‪ ،49.615‬ﰲ ﺣﲔ أن اﳌﺘﻮﺳﻂ اﳊﺴﺎﰊ ﻟﻠﻤﺠﻤﻮﻋﺔ اﻻﺧﺘﺒﺎرﻳﺔ ‪79.077‬؛‬
‫ﻧﺘﻴﺠﺔ اﻻﺧﺘﺒﺎر اﻹﺣﺼﺎﺋﻲ ﻟﻠﻔﺮض ﺣﻮل وﺟﻮد اﺧﺘﻼف ﺑﲔ اﳌﺘﻮﺳﻂ اﳊﺴﺎﰊ ﻟﻠﻤﺠﻤﻮﻋﺔ اﻟﻘﻴﺎﺳﻴﺔ واﻻﺧﺘﺒﺎرﻳﺔ أﻇﻬﺮت ﻣﺘﻮﺳﻄﺎً أﻋﻠﻰ ﺑﻜﺜﲑ‬
‫ﻟﻠﻤﺠﻤﻮﻋﺔ اﻻﺧﺘﺒﺎرﻳﺔ )‪30%‬ﻋﻠﻰ اﺠﻤﻟﻤﻮﻋﺔ اﻟﻘﻴﺎﺳﻴﺔ وﲟﻌﺎﻣﻞ أﳘﻴﺔ إﺣﺼﺎﺋﻴـ ـ ــﺔ ‪.p-value=0.000<0.05‬‬

‫‪Means‬‬ ‫‪Means‬‬ ‫‪Means‬‬

‫‪Variable‬‬
‫‪Classical‬‬ ‫‪Experimental‬‬ ‫‪Difference‬‬
‫‪Experiment 1~5‬‬ ‫‪49.615‬‬ ‫‪79.077‬‬ ‫‪29.462‬‬

‫‪Experiment 6~10‬‬ ‫‪30.076‬‬ ‫‪45.077‬‬ ‫‪15.001‬‬

‫‪p-value‬‬ ‫‪0.000‬‬ ‫‪0.000‬‬

‫‪Total Means‬‬ ‫‪36.846‬‬ ‫‪62.077‬‬ ‫‪25.231‬‬

‫اﳉﺪول‪ 9-5‬اﻟﻘﻴﺎﺳﺎت اﻹﺣﺼﺎﺋﻴﺔ ﻟﻨﺘﺎﺋﺞ اﻟﻄﻼب ﰲ اﺧﺘﺒﺎر ﻣﻌﺎﻣﻞ اﻟﻨﺴﻴﺎن ﺑﻌﺪ ﺳﻨﺔ‬
‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪290‬‬
‫‪25‬‬ ‫اﻟﻔﺼﻞ اﳋﺎﻣﺲ | ‪Chapter 5‬‬

‫إن ﺳﺒﺐ ﻛﻮن اﳌﺘﻮﺳﻂ اﳊﺴﺎﰊ ﻟﻠﺠﻠﺴﺎت اﻷوﱃ أﻛﱪ ﻣﻦ اﳌﺘﻮﺳﻂ اﳊﺴﺎﰊ ﻟﻠﺠﻠﺴﺎت اﻷﺧﲑة ﻫﻮ أن اﳉﻠﺴﺎت اﻷوﱃ ﲢﻮي ﻣﻌﻠﻮﻣﺎت‬
‫رﲟﺎ ﺗﺘﻜﺮر ﰲ اﳉﻠﺴﺎت اﻷﺧﲑة وﻛﺬﻟﻚ ﻟﻜﻮن ﻫﺬﻩ اﳌﻌﻠﻮﻣﺎت أﻗﻞ ﺗﻌﻘﻴﺪاً‪.‬‬

‫‪ 7-4-7-5‬اﻟﻘﻴﺎس اﻻﺧﺘﺒﺎري اﻟﺴﺎﺑﻊ )‪:(The 7th Evaluation Measure‬‬

‫ﻫﺬا اﻟﻘﻴﺎس ﻧﻮﻋﻲ وﻻ ﻳﺘﻌﻠﻖ ﺑﺎﻻﺧﺘﺒﺎر اﻹﺣﺼﺎﺋﻲ وإﳕﺎ ﻳﺴﺘﻨﺪ إﱃ ﻣﻼﺣﻈﺔ وﻣﺮاﻗﺒﺔ وﺗﻘﻴﻴﻢ اﶈﺎﺿﺮ ﻷداء اﻟﻄﻼب ﺧﻼل ﺟﻠﺴﺔ اﳌﺨﺘﱪ‪.‬‬

‫ﻟﻘﺪ ﻟﻮﺣﻆ ﺧﻼل اﳉﻠﺴﺎت اﳌﺨﱪﻳﺔ أداء ﻣﺘﺴﺎرع ﻟﻄﻼب ﻤﻟﻤﻮﻋﺔ اﻻﺧﺘﺒﺎرﻳﺔ )اﳊﻠﻘﺔ اﳌﻐﻠﻘﺔ( ﻧﻈﺮاً ﻟﻠﺘﺤﻀﲑ اﳌﺴﺒﻖ ﻟﻜﻞ ﺟﻠﺴﺔ‪ ،‬إﺿﺎﻓﺔ‬
‫ﻟﻌﻤﻠﻬﻢ ﻋﻠﻰ ﺣﻞ اﳌﺸﺎرﻳﻊ اﳌﻨﺰﻟﻴﺔ‪ ،‬ﻛﺬا ﻓﻬﻤﻬﻢ ﻟﻜﻞ ﻧﻘﻄﺔ ﻗﺒﻞ اﳋﻮض ﰲ اﻟﻨﻘﻄﺔ اﻟﻼﺣﻘﺔ‪.‬‬

‫ﰲ اﳉﻠﺴﺔ اﳌﺨﱪﻳﺔ اﻷوﱃ ﻛﺎن اﻟﺘﺴﺎرع ﰲ أداﺋﻬﻢ ﲝﻴﺚ أن ﻋﺪد اﻟﺘﺠﺎرب اﻟﱵ ﻗﺎم ﻃﻼب ﻤﻟﻤﻮﻋﺔ اﻻﺧﺘﺒﺎرﻳﺔ ﺑﺘﻨﻔﻴﺬﻫﺎ ﻛﺎﻧﺖ ‪ 5‬ﲡﺎرب‪،‬‬
‫ﺑﻴﻨﻤﺎ ﺗﺄﺧﺮ ﻃﻼب ﻤﻟﻤﻮﻋﺔ اﻟﻘﻴﺎﺳﻴﺔ )اﳊﻠﻘﺔ اﳌﻔﺘﻮﺣﺔ( ﲟﻘﺪار ﲡﺮﺑﺔ )زﻣﻦ ﺗﻨﻔﻴﺬﻫﺎ ﻳﺴﺘﻐﺮق ‪ 15‬دﻗﻴﻘﺔ(‪ ،‬وذﻟﻚ ﺑﺴﺒﺐ اﻷﺳﺌﻠﺔ اﻟﻜﺜﲑة اﻟﱵ‬
‫ﺣﻬﺎ ﻃﻼب اﺠﻤﻟﻤﻮﻋﺔ اﻟﻘﻴﺎﺳﻴﺔ‪ ،‬وﻛﺬﻟﻚ ﻇﻬﻮر ﺑﻌﺾ اﳌﺸﺎﻛﻞ أﺛﻨﺎء ﺗﻨﻔﻴﺬ ﻛﻞ ﲡﺮﺑﺔ وأﻳﻀﺎً ﳏﺎوﻟﺔ اﻟﻄﻼب ﻓﻬﻢ اﻟﻨﻘﺎط أﺛﻨﺎء اﻟﺘﺠﺮﺑﺔ‬
‫ﻧﻔﺴﻬﺎ‪ ،‬ﰎ ﺗﻌﻮﻳﺾ ﻫﺬا اﻟﺘﺄﺧﲑ ﺑﺎﻟﻨﺴﺒﺔ ﻟﻄﻼب ﻤﻟﻤﻮﻋﺔ اﻟﻘﻴﺎﺳﻴﺔ ﻣﻦ ﺧﻼل اﻟﺰﻣﻦ اﻟﻀﺎﺋﻊ ﰲ ﺑﺪاﻳﺔ اﳊﺼﺔ اﳌﺨﱪﻳﺔ ﻟﺘﻘﺪﱘ اﳌﺬاﻛﺮة ﻣﻦ ﻗﺒﻞ‬
‫ﻃﻼب اﳊﻠﻘﺔ اﳌﻐﻠﻘﺔ‪.‬‬

‫ﰲ اﳉﻠﺴﺔ اﻟﺜﺎﻧﻴﺔ دت أﺳﺌﻠﺔ ﻃﻼب اﺠﻤﻟﻤﻮﻋﺔ اﻟﻘﻴﺎﺳﻴﺔ واﺣﺘﺎﺟﺖ إﱃ زﻣﻦ إﺿﺎﰲ ﻟﻼﻧﺘﻬﺎء ﻣﻘﺎرﻧﺔ ﻣﻊ ﻃﻼب اﺠﻤﻟﻤﻮﻋﺔ اﻻﺧﺘﺒﺎرﻳﺔ‪ ،‬وذﻟﻚ‬
‫ﻷن ﳏﺘﻮى اﳉﻠﺴﺔ اﳌﺨﱪﻳﺔ أﺻﺒﺢ أﻋﻘﺪ ﻣﻘﺎرﻧﺔً ﻣﻊ ﳏﺘﻮى اﳉﻠﺴﺔ اﻷوﱃ‪.‬‬

‫ﰲ اﳉﻠﺴﺔ اﻟﺜﺎﻟﺜﺔ دادت اﻟﻔﺠﻮة ﺑﲔ ﻛﻼ اﺠﻤﻟﻤﻮﻋﺘﲔ ﰲ أداء اﻟﺘﺠﺎرب ﰲ اﳌﺨﱪ وﺳﺮﻋﺔ اﻟﻔﻬﻢ ﻟﻠﺘﺠﺎرب اﳌﺪﳎﺔ‪ ،‬ﺣﻴﺚ أن ﻃﻼب ﻤﻟﻤﻮﻋﺔ‬
‫اﻻﺧﺘﺒﺎرﻳﺔ ﻢ اﻟﻮﻗﺖ اﻟﻀﺎﺋﻊ ﰲ ﺑﺪاﻳﺔ ﻛﻞ ﺟﻠﺴﺔ ﰲ اﳌﺬاﻛﺮة‪ ،‬إﻻّ أ�ﻢ ﺳﺒﻘﻮا ﻃﻼب اﺠﻤﻟﻤﻮﻋﺔ اﻟﻘﻴﺎﺳﻴﺔ ﲟﻌﺪل ‪ 3‬ﲡﺎرب )‪ 60‬دﻗﻴﻘﺔ(‪ ،‬ﳑﺎ‬
‫اﺿﻄﺮﻧﺎ إﱃ إﺿﺎﻓﺔ ﺳﺎﻋﺔ ﺗﻌﻮﻳﻀﻴﺔ ﻟﻄﻼب ﻤﻟﻤﻮﻋﺔ اﻟﻘﻴﺎﺳﻴﺔ‪.‬‬

‫ﺑﻌﺪ ﺛﻼث ﺟﻠﺴﺎت ﻋﻤﻠﻴﺔ‪ ،‬أﺻﺒﺢ ﻟﺪى ﻃﻼب ﻤﻟﻤﻮﻋﺔ اﻻﺧﺘﺒﺎرﻳﺔ ﺧﱪة ﺑﺮﳎﻴﺔ أﻛﱪ‪ ،‬وازدادت ﻣﻌﺮﻓﺘﻬﻢ ﳑﺎ دﻓﻌﻬﻢ إﱃ ﺗﻄﻮﻳﺮ ﻣﺸﺎرﻳﻊ‬
‫اﳉﻠﺴﺎت اﻟﺴﺎﺑﻘﺔ وإﻋﺎدة إرﺳﺎﳍﺎ ﲝﻴﺚ أ�ﺎ أﺻﺒﺤﺖ ﲢﻮي ﻋﻠﻰ اﳊﻠﻮل اﻟﱪﳎﻴﺔ اﻟﱵ ﺗﻌﻠﻤﻬﺎ اﻟﻄﻼب ﰲ اﳉﻠﺴﺎت اﻷﺧﲑة‪ ،‬ﻓﻤﺜﻼً وﻇﻴﻔﺔ‬
‫اﳉﻠﺴﺔ اﻟﺜﺎﻧﻴﺔ اﳌﺘﻌﻠﻘﺔ ﲝﺴﺎب وﺗﻮﻟﻴﺪ ﺗﺎﺑﻊ اﻹﺷﺎرة اﳉﻴﱯ‪ ،‬ﰎ ﺗﻄﻮﻳﺮ اﳌﺸﺮوع ﻟﻴﻘﻮم ﺑﺘﻮﻟﻴﺪ ﲨﻴﻊ اﻹﺷﺎرات اﳌﺜﻠﺜﻴﺔ‪ ،‬ﻋﻠﻤﺎً أﻧﻪ ﱂ ﻳﻄﻠﺐ ذﻟﻚ‬
‫ﻣﻦ اﻟﻄﻼب؛ أﻳﻀﺎً ﻟﻮﺣﻆ أن اﳌﺴﺎﺋﻞ اﻟﺘﺼﻤﻴﻤﻴﺔ اﻟﻌﺎﻟﻘﺔ ﰲ إﳒﺎز اﳌﺸﺎرﻳﻊ اﳌﺴﻨﺪة ﺳﺎﺑﻘﺎً ﺗﻼﺷﺖ ﻣﻊ اﻟﻮﻗﺖ‪ ،‬وﻗﺪ ﻗﺎم اﻟﻄﻼب ﲝﻠﻬﺎ‬
‫ﻻﺣﻘﺎً‪.‬‬

‫ اﳉﺪﻳﺮ ذﻛﺮﻩ أﻳﻀﺎً ﻇﻬﻮر اﻟﺘﻨﺎﻓﺴﻴﺔ ﺑﲔ اﻟﻄﻼب ﰲ اﺠﻤﻟﻤﻮﻋﺔ اﻻﺧﺘﺒﺎرﻳﺔ‪ ،‬ﺣﻴﺚ أﻧﻪ ﻣﺎ أن ﻳﺴﻤﻊ اﻟﻄﺎﻟﺐ أن زﻣﻴﻠﻪ ﻗﺎم ﺑﺘﻄﻮﻳﺮ اﻟﻮﻇﻴﻔﺔ؛‬
‫ﺣﱴ ﻳﻘﻮم ﻫﻮ أﻳﻀﺎً ﺑﺘﻄﻮﻳﺮ وﻇﻴﻔﺘﻪ وإرﺳﺎﳍﺎ ﻣﻦ ﺟﺪﻳﺪ‪ ،‬وﻫﺬا ﻳﺪل ﻋﻠﻰ أن ﳕﻮذج اﻟﺘﻌﻠﻢ ﺑﺎﳊﻠﻘﺔ اﳌﻐﻠﻘﺔ ﻫﻮ ﳕﻮذج ﲢﻔﻴﺰي‪.‬‬

‫ﺳﺌﻠﺔ اﳌﻄﺮوﺣﺔ ﺧﻼل اﳉﻠﺴﺎت ﻣﻦ ﻗﺒﻞ اﺠﻤﻟﻤﻮﻋﺔ اﻟﻘﻴﺎﺳﻴﺔ ﻛﺎﻧﺖ ﻋﺎﻣﺔ وﺗﻄﺮح ﻟﻼﺳﺘﻔﺴﺎر ﻋﻦ ﻣﺴﺎﺋﻞ ﺗﺘﻌﻠﻖ ﲟﺸﺎﻛﻞ اﻟﺘﺸﻐﻴﻞ واﻟﺘﻨﻔﻴﺬ‪،‬‬
‫ﻨﻤﺎ اﻷﺳﺌﻠﺔ اﳌﻄﺮوﺣﺔ ﻣﻦ ﻗﺒﻞ ﻃﻼب اﺠﻤﻟﻤﻮﻋﺔ اﻻﺧﺘﺒﺎرﻳﺔ ﻛﺎﻧﺖ ﺗﺴﺘﻔﺴﺮ ﻋﻦ ﺗﻔﺎﺻﻴﻞ أﻋﻤﻖ وأدق‪.‬‬

‫‪291‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Toward a Constructivist Laboratory Education Model‬‬ ‫ﳓﻮ ﳕﻮذج ﺑﻨﺎﺋﻲ ﻟﻠﺘﻌﻠﻴﻢ اﳌﺨﱪي |‬

‫‪ 5-7-5‬ﻣﻨﺎﻗﺸﺔ اﻟﻨﺘﺎﺋﺞ اﻟﺘﺠﺮﻳﺒﻴﺔ )‪:(Discussing the Empirical Results‬‬

‫إن اﻟﺘﺤﻠﻴﻞ اﻹﺣﺼﺎﺋﻲ ﻟﻨﺘﺎﺋﺞ اﻟﻘﻴﺎﺳﺎت اﳌﺬﻛﻮرة أﻇﻬﺮ دﻟﻴﻼً إﺣﺼﺎﺋﻴﺎً ﻗﻮﻳﺎً ﻋﻠﻰ رﻓﺾ اﻟﻔﺮض اﻟﺼﻔﺮي؛ ﻧﺘﻴﺠﺔ اﻟﺘﺤﻠﻴﻞ اﻟﻨﻬﺎﺋﻴﺔ ﻧﺼﺖ ﻋﻠﻰ‬
‫أﻧﻪ "ﻻ ﻳﻮﺟﺪ اﺧﺘﻼف ﺼﺎﺋﻲ ﺑﲔ اﺠﻤﻟﻤﻮﻋﺔ اﻻﺧﺘﺒﺎرﻳﺔ واﻟﻘﻴﺎﺳﻴﺔ وأن ﻧﺘﺎﺋﺞ اﻟﺘﺤﻠﻴﻞ ﺣﻘﻴﻘﻴﺔ وﻧﺎﲡﺔ ﻋﻦ اﻟﺘﻘﻴﻴﻢ اﻟﺼﺤﻴﺢ ﻟﻠﻨﻈﺮﻳﺔ اﳌﻄﺒﻘﺔ‪،‬‬
‫وﱂ ﺗﻮﺟﺪ ﻫﺬﻩ اﻟﻨﺘﺎﺋﺞ ﻋﻦ ﻃﺮﻳﻖ اﻟﺼﺪﻓﺔ‪.‬‬

‫ أداء وﻧﺘﺎﺋﺞ ﻃﻼب اﺠﻤﻟﻤﻮﻋﺔ اﻻﺧﺘﺒﺎرﻳﺔ ﻗﺖ ﺑﺸﻜﻞ ﻛﺒﲑ وﻣﻠﺤﻮظ ﻧﺘﺎﺋﺞ ﻃﻼب اﺠﻤﻟﻤﻮﻋﺔ اﻟﻘﻴﺎﺳﻴﺔ‪ ،‬اﻟﻨﺘﺎﺋﺞ أﻇﻬﺮت أن اﻹﺻﻼح‬
‫ﻳﺆدي إﱃ اﻟﺘﺤﺴﲔ اﳉﺬري ﰲ ﺣﺼﻴﻠﺔ اﻟﺘﻌﻠّﻢ]‪.[802,805,806‬‬
‫اﻟﺘﻌﻠﻴﻤﻲ اﳉ ّﺬري ﳝﻜﻦ أن ّ‬

‫أﻇﻬﺮت اﻟﻨﺘﺎﺋﺞ اﻟﺘﺠﺮﻳﺒﻴﺔ دﻟﻴﻼً واﺿﺤﺎً ﻋﻠﻰ ﺗﻔﻮق ﳕﻮذج اﻟﺘﻌﻠﻢ اﻟﺒﻨﺎﺋﻲ اﻟﻘﺎﺋﻢ ﻋﻠﻰ ﺣﻞ اﳌﺸﻜﻼت واﳌﺸﺎرﻳﻊ ﻋﻠﻰ اﻟﻨﻤﻮذج اﻟﺘﻌﻠﻴﻤﻲ‬
‫اﻟﺘﻘﻠﻴﺪي؛ ﺣﻘﻖ ب اﺠﻤﻟﻤﻮﻋﺔ اﻻﺧﺘﺒﺎرﻳﺔ ﻧﺘﺎﺋﺞ وإﳒﺎزات ﺗﻌﻠﻢ راﺳﺨﺔ وﻣﺴﺘﻘﺮة ﺣﱴ اﻟﻨﻬﺎﻳﺔ ﲞﻼف ﻃﻼب ﻤﻟﻤﻮﻋﺔ اﻟﻘﻴﺎﺳﻴﺔ اﳌﻌﻴﺎرﻳﺔ‬
‫اﻟﺬﻳﻦ أﳒﺰوا ﺣﺼﻴﻠﺔ ﺗﻌﻠﻴﻤﻴﺔ أﻗﻞ ﺑﻜﺜﲑ‪.‬‬

‫‪[57,807-‬‬
‫ﻟﻘﺪ ذﻛﺮ ﻣﺮاراً وﺗﻜﺮاراً ﰲ اﻟﻌﺪﻳﺪ اﻷﲝﺎث اﻟﺘﻌﻠﻴﻤﻴﺔ أن اﻟﺘﻌﻠﻢ اﻟﻘﺎﺋﻢ ﻋﻠﻰ ﺣﻞ اﳌﺸﻜﻼت )‪ (PBL‬ﻳﺰﻳﺪ وﻳﻌﺰز اﳊﺎﻓﺰ اﻟﺬاﰐ ﻟﻠﻄﻼب‬
‫]‪ ،811‬وﻫﺬا ﻣﺎ أﻛﺪت ﻋﻠﻴﻪ اﻟﻨﺘﺎﺋﺞ ﰲ ﻫﺬا اﻟﺒﺤﺚ‪ ،‬ﺣﻴﺚ ﻟﻮﺣﻆ ﺣﺎﻓﺰ ذاﰐ ﺟﻮﻫﺮي ﻛﺒﲑ وواﺿﺢ ﻼب اﺠﻤﻟﻤﻮﻋﺔ اﻻﺧﺘﺒﺎرﻳﺔ‪ ،‬وﻇﻬﺮ‬
‫ﻟﺪﻳﻬﻢ أﻳﻀﺎً ﺳﻠﻮك ﺗﻨﺎﻓﺴﻲ ﻇﻬﺮ أﺛﺮﻩ ﻣﻦ ﺧﻼل ﺗﻄﻮﻳﺮ ﻣﺸﺎرﻳﻊ اﻟﻮﻇﺎﺋﻒ اﻟﺴﺎﺑﻘﺔ ﺑﺪون أي ﻃﻠﺐ ﻣﺴﺒﻖ‪ ،‬ﺑﺎﻹﺿﺎﻓﺔ إﱃ ﺗﻄﻮﻳﺮ أﻓﻜﺎر أﻛﺜﺮ‬
‫ﺗﻌﻘﻴﺪاً‪ ،‬ﻣﻦ ﺟﺎﻧﺐ آﺧﺮ‪ ،‬ﻳﻘﻢ أي ﻣﻦ ﻃﻼب اﺠﻤﻟﻤﻮﻋﺔ اﻟﻘﻴﺎﺳﻴﺔ ﺑﺘﻄﻮﻳﺮ أي ﻣﻦ ﻣﺸﺎرﻳﻊ اﳉﻠﺴﺎت أو إﺿﺎﻓﺔ أي أﻓﻜﺎر‪ .‬إن ﺳﺒﺐ ﻇﻬﻮر‬
‫ﻣﺜﻞ ﻫﺬا اﳊﺎﻓﺰ اﻟﺬاﰐ واﻟﺘﻔﺎﻋﻞ اﻹﳚﺎﰊ اﻟﻜﺒﲑ ﻗﺒﻞ ﻃﻼب اﺠﻤﻟﻤﻮﻋﺔ اﻻﺧﺘﺒﺎرﻳﺔ ﳝﻜﻦ أن ﻳﺮﺟﻊ إﱃ ﺣﻘﻴﻘﺔ أن اﻟﻄﻼب ﺗﻌﺮﺿﻮا ﻟﻠﻤﺮة‬
‫اﻷوﱃ إﱃ ﻫﺬﻩ اﳌﻨﻬﺠﻴﺔ اﳉﺪﻳﺪة وﻫﺬا اﻟﻨﻮع ﻣﻦ اﻟﺘﻌﻠﻢ‪ ،‬وﻋﻤﻠﻮا ﻋﻠﻰ ﻣﺸﺎرﻳﻊ وﺟﺪوﻫﺎ ذات ﺻﻠﺔ ﺣﻘﻴﻘﻴﺔ ﳌﺴﺘﻘﺒﻠﻬﻢ اﳌﻬﲏ‪ ،‬ﰲ ﺣﲔ أن‬
‫ﲨﻴﻊ ﻓﺼﻮﳍﻢ اﻟﺘﻌﻠﻴﻤﻴﺔ اﻟﺴﺎﺑﻘﺔ ﰎ ﺗﺪرﻳﺴﻬﺎ ﺑﺎﻟﻄﺮﻳﻘﺔ اﻟﻜﻼﺳﻴﻜﻴﺔ‪ ،‬وﱂ ﺗﺮﺗﺒﻂ ﺑﺄي ﻣﺸﺮوع ﻋﻤﻠﻲ واﻗﻌﻲ‪.‬‬

‫ﺑﺪف ﲢﻠﻴﻞ وﺟﻬﺔ ﻧﻈﺮ اﻟﻄﻼب ﰎاء اﺳﺘﻘﺼﺎء رأي ﻟﻜﻼ اﺠﻤﻟﻤﻮﻋﺘﲔ وﻓﻖ ﳕﻮذﺟﲔ ﻛﻞ ﻣﻨﻬﻤﺎ ﳐﺼﺺ ﺠﻤﻟﻤﻮﻋﺔ وﻓﻘﺎً ﻟﻠﻤﻨﻬﺠﻴﺔ اﻟﱵ ﰎ‬
‫اﺗﺒﺎﻋﻬﺎ ‪ -‬ﳝﻜﻦ اﻻﻃﻼع ﻋﻠﻰ ﳕﻮذج اﻻﺳﺘﻄﻼع ﰲ اﻟﻤﻠﺤﻖ‪ .6-‬ﺑﺸﻜﻞ ﻋﺎم ﻓ اﺳﺘﻄﻼع اﻟﺮأي اﻟﺬي ﻗﺪﻣﻪ ﻃﻼب اﺠﻤﻟﻤﻮﻋﺔ اﻻﺧﺘﺒﺎرﻳﺔ‬
‫أﻇﻬﺮ ﻣﻮﻗﻔﺎً إﳚﺎﺑﻴﺎً ﻀﻞ ﻣﻦ اﻻﺳﺘﻄﻼع اﻟﺬي ﻗﺪﻣﻪ ﻃﻼب اﺠﻤﻟﻤﻮﻋﺔ اﻟﻘﻴﺎﺳﻴﺔ‪.‬‬

‫إن اﻟﺘﻔﺴﲑ ﻣﻦ وﺟﻬﺔ ﻧﻈﺮ ﺗﺮﺑﻮﻳﺔ ﺗﻌﻠﻴﻤﻴﺔ ﺣﻮل ﻗﻮة اﻟﻨﻤﻮذج اﻟﺒﻨﺎﺋﻲ ﻟﻠﺘﻌﻠﻢ اﻟﻘﺎﺋﻢ ﻋﻠﻰ ﺣﻞ اﳌﺸﻜﻼت ﳝﻜﻦ اﺳﺘﻨﺒﺎﻃﻪ ﻣﻦ ﻧﻈﺮﻳﺔ ‪ Kolb‬ﰲ‬
‫اﻟﺘﻌﻠﻢ اﻟﺘﺠﺮﻳﱯ]‪ ،[545‬ﺣﻴﺚ ﻳﺸﲑ ‪ Kolb‬إﱃ أن اﻟﺘﻌﻠﻢ اﻷﻣﺜﻠﻲ ﻳﺘﻄﻠﺐ أرﺑﻊ أﻃﻮار ﻣﺘﻤﻴﺰة‪ :‬اﳋﱪات اﳌﻠﻤﻮﺳﺔ ”‪(Concrete “CE‬‬

‫‪(Abstract‬‬ ‫)‪ ،Experience‬اﳌﻼﺣﻈﺔ اﻟﺘﺄﻣﻠﻴﺔ ”‪ ،(Reflective Observation) “RO‬ﻔﺎﻫﻴﻢ اﺠﻤﻟﺮدة ”‪“AC‬‬

‫)‪ ،Conceptualization‬اﻟﺘﺠﺮﻳﺐ اﻟﻔﻌﺎل ”‪ .(Active Experimentation) “AE‬إن ﻣﻨﻬﺞ وأﺳﻠﻮب اﻟﺘﻌﻠﻴﻢ واﻟﺘﻌﻠﻢ اﻟﺘﻘﻠﻴﺪي ﻳﺮﺑﻂ‬
‫اﻟﻄﻼب ﺑﺎﻟﺪرﺟﺔ اﻷوﱃ ﲟﺮﺣﻠﺔ اﻟﺘﺠﺮﻳﺐ اﻟﻔﻌﺎل‪ ،‬وﻣﻊ ذﻟﻚ ﻓﺈن ﺑﻨﺎء اﳌﻌﺮﻓﺔ اﻟﺘﺠﺮﻳﺒﻴﺔ ﺑﻨﺠﺎح ﻳﺘﻄﻠﺐ ﻣﻦ اﻟﻄﻼب ﺗﺄدﻳﺔ اﳌﻜﻮﻧﺎت اﻟﺜﻼﺛﺔ‬
‫اﻷﺧﺮى ﻟﺪورة ‪ Kolb‬ﰲ اﻟﺘﻌﻠﻢ]‪.[545‬‬

‫وأﻣﺎ ﻣﻦ ﺧﻼل ﻣﻨﻬﺞ اﻟﺘﻌﻠﻢ اﻟﻘﺎﺋﻢ ﻋﻠﻰ ﺣﻞ اﳌﺸﻜﻼت‪ ،‬ﻓﺈن اﻟﻄﻼب ﳝﻠﻜﻮن وﺻﻮﻻً ﻓﻌﺎﻻً ﻟﺘﻄﺒﻴﻖ اﳋﱪات اﳌﻠﻤﻮﺳﺔ ”‪ ،“CE‬اﳌﻼﺣﻈﺔ‬
‫اﻟﺘﺄﻣﻠﻴﺔ ”‪ “RO‬وﺗﺸﻜﻴﻞ اﻟﻨﻤﺎذج اﻟﻌﻘﻠﻴﺔ ﻟﻠﻤﻔﺎﻫﻴﻢ اﻟﻨﻈﺮﻳﺔ‪ .‬إن ﺗﻔﺴﲑ اﻟﻨﺘﺎﺋﺞ ﻣﻦ ﺟﻬﺔ ﻧﻈﺮ اﻟﻌﻠﻮم اﳌﻌﺮﻓﻴﺔ اﻹدراﻛﻴﺔ ﻣﺜﻞ ﳕﻮذج ﻣﻌﺎﳉﺔ‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪292‬‬
‫‪25‬‬ ‫اﻟﻔﺼﻞ اﳋﺎﻣﺲ | ‪Chapter 5‬‬

‫ﻳﻘﺴﻢ اﻟﺬاﻛﺮة إﱃ ذاﻛﺮة ﲣﺰﻳﻦ ﻗﺼﲑة اﻷﻣﺪ وذاﻛﺮة ﲣﺰﻳﻦ ﻃﻮﻳﻠﺔ اﻷﻣﺪ‪،‬‬
‫اﳌﻌﻠﻮﻣﺎت ﳝﻜﻦ أن ﻳﻌﻄﻲ ﺗﻔﺴﲑاً ﻣﻘﻨﻌﺎً ﳍﺬﻩ اﻟﻨﺘﺎﺋﺞ؛ اﻟﻨﻤﻮذج ّ‬
‫]‪[514‬‬

‫إن ﲣﺰﻳﻦ اﳌﻬﺎرات واﳌﻌﻠﻮﻣﺎت واﳋﻮارزﻣﻴﺎت ﰲ اﻟﺬاﻛﺮة ﻃﻮﻳﻠﺔ اﻷﻣﺪ ﻳﺘﻄﻠّﺐ اﻟﺘﻜﺮار واﳌﺮاﺟﻌﺔ‪.‬‬

‫إن اﻟﻔﺠﻮة اﻟﻜﺒﲑة ﰲ ﻧﺘﺎﺋﺞ اﻻﺧﺘﺒﺎرات اﻟﻜﻤﻴﺔ واﻟﻨﻮﻋﻴﺔ ﺑﲔ اﻟﻄﻼب اﻟﺬﻳﻦ ﻃﺒﻘﺖ ﻋﻠﻴﻬﻢ اﳌﻨﻬﺠﻴﺔ اﻟﺘﻘﻠﻴﺪﻳﺔ‪ ،‬واﻟﻄﻼب اﻟﺬﻳﻦ ﺗﺎﺑﻌﻮا ﻣﻨﻬﺠﻴﺔ‬
‫اﻟﺘﻌﻠﻢ اﻟﺒﻨﺎﺋﻲ اﻟﻘﺎﺋﻢ ﻋﻠﻰ ﺣﻞ اﳌﺸﻜﻼت واﻟﺘﻐﺬﻳﺔ اﻟﻌﻜﺴﻴﺔ واﻟﺘﻘﻴﻴﻢ اﻟﺒﻨﺎﺋﻲ واﻟﺘﻨﻈﻴﻢ اﻟﺬاﰐ‪ ،‬ﻛﻞ ﻫﺬا ﳛﺚ ﻋﻠﻰ إﻋﺎدة ﻧﻈﺮ ﺟﻮﻫﺮﻳﺔ وﺣﺎﲰﺔ‬
‫ﻟﻠﻄﺮاز اﻟﻘﺪﱘ ﻟﻨﻤﺎذج اﻟﺘﻌﻠﻴﻢ واﻟﺘﻌﻠﻢ‪ ،‬وﺗﺒﲏ اﳌﺰﻳﺪ ﻣﻦ اﻷﺳﺎﻟﻴﺐ اﻟﺒﻨﺎﺋﻴﺔ‪.‬‬

‫ﻋﻠﻰ اﻟﺮﻏﻢ ﻣﻦ وﺟﻮد ﺳﻴﺌﺔ وﺣﻴﺪة ﻟﻠﻤﻨﻬﺠﻴﺔ اﻟﺒﻨﺎﺋﻴﺔ اﳌﺘﺒﻌﺔ ﰲ ﻫﺬا اﻟﻨﻤﻮذج‪ ،‬وﻫﻲ ﲪﻞ اﻟﻌﻤﻞ اﻹﺿﺎﰲ اﻟﻜﺒﲑ ﺟﺪاً اﻟﺬي ﻓﺮض ﻋﻠﻰ ﳏﺎﺿﺮ‬
‫ﺨﺘﱪ ﻋﻨﺪ اﻟﺘﻌﺎﻣﻞ ﻣﻊ ﻃﻼب اﺠﻤﻟﻤﻮﻋﺔ اﻻﺧﺘﺒﺎرﻳﺔ‪ ،‬ﺣﻴﺚ أن ﺗﻘﺪﱘ ﺗﻐﺬﻳﺔ ﻋﻜﺴﻴﺔ ﻫﺎدﻓﺔ وﻓﻌﺎﻟﺔ ﳛﺘﺎج إﱃ ﲢﻀﲑات ﻛﺒﲑة وﻣﺴﺒﻘﺔ‬
‫ﻟﻠﻤﻨﻬﺠﻴﺎت واﻻﺧﺘﺒﺎرات اﻟﻼزﻣﺔ‪ ،‬إﺿﺎﻓﺔً إﱃ اﳌﺮاﺟﻌﺎت ﻟﻠﻤﺸﺎرﻳﻊ واﻟﻮﻇﺎﺋﻒ‪ ،‬أﺿﻒ إﱃ ذﻟﻚ ﺗﺼﺤﻴﺢ اﻻﺧﺘﺒﺎرات وﻣﺮاﻗﺒﺔ اﻷداء‪.‬‬

‫ﻟﻠﺤﺪ ﻣﻦ ﻫﺬا اﻟﻌﺐء اﻹﺿﺎﰲ اﻟﻜﺒﲑ‪ ،‬ﻓﺈﻧﻪ ﻻﺑﺪ ﻣﻦ اﻗﱰاﺣﺎت ﻻﺣﻘﺔ ﻹﻋﺎدة ﻫﻴﻜﻠﺔ اﻟﻨﻤﻮذج ﻣﻦ وﺟﻬﺔ ﻧﻈﺮ ﺗﻌﻠﻴﻤﻴﺔ ﻣﺜﻞ ﺗﻄﺒﻴﻖ اﺳﱰاﺗﻴﺠﻴﺔ‬
‫”‪) “Peer-assessment‬ﺗﻘﻴﻴﻢ اﻟﺰﻣﻼء ودﻋﻤﻬﻢ ﻟﺒﻌﻀﻬﻢ اﻟﺒﻌﺾ( ﻟﻠﺘﺨﻠﺺ ﻣﻦ اﻟﺘﺄﺛﲑ اﻟﺴﻠﱯ اﻷﺧﲑ‪.‬‬

‫اﻟﺴﺆال اﻟﺬي ﻗﺪ ﻳﻄﺮح ﻣﻦ ﻗﺒﻞ اﻟﻌﺪﻳﺪ ﻣﻦ اﻷﺷﺨﺎص ﻗﺒﻞ اﳌﺮور ﻋﻠﻰ ﻫﺬا اﻟﻔﺼﻞ أو اﻟﺬي ﻗﺒﻠﻪ ﻫﻮ‪" :‬ﳌﺎذا ﻧﻨﺎدي ﺑﺎﺳﱰاﺗﻴﺠﻴﺎت اﻟﺘﻌﻠﻴﻢ‬
‫اﳊﺪﻳﺚ؟!" اﻹﺟﺎﺑﺔ ﻧﻮردﻫﺎ ﳎﻤﻠﺔ ﰲ اﳉﺪول‪ 10-5‬اﻟﺬي ﻳﺒﲔ ﻣﻘﺎرﻧﺔ ﺑﲔ اﻟﻄﺮق اﻟﺘﻘﻠﻴﺪﻳﺔ واﻻﺳﱰاﺗﻴﺠﻴﺎت اﳊﺪﻳﺜﺔ ﰲ اﻟﺘﻌﻠﻢ واﻟﺘﻌﻠﻴﻢ‪.‬‬

‫اﻻﺳﺘﺮاﺗﻴﺠﻴﺎت اﻟﺤﺪﻳﺜﺔ‬ ‫اﻟﻄﺮق اﻟﺘﻘﻠﻴﺪﻳﺔ‬

‫زﻣﻦ اﻟﺘﻌﻠﻢ اﻟﻔﻌﻠﻲ ﻳﺼﻞ اﱃ أﻛﺜﺮ ﻣﻦ ‪.85%‬‬ ‫‪‬‬ ‫زﻣﻦ اﻟﺘﻌﻠﻢ اﻟﻔﻌﻠﻲ ﻻ ﻳﺼﻞ اﱃ ‪.30%‬‬ ‫‪‬‬
‫ﻗﻠﺔ اﻟﻔﺎﻗﺪ ﰲ زﻣﻦ اﻟﺘﻌﻠﻢ‪.‬‬ ‫‪‬‬ ‫زﻳﺎدة ﻧﺴﺒﺔ اﻟﻔﺎﻗﺪ ﰲ زﻣﻦ اﻟﺘﻌﻠﻢ‪.‬‬ ‫‪‬‬
‫اﻟﻄﻼب اﳚﺎﺑﻴﲔ ﰲ اﳌﻮﻗﻒ اﻟﺘﻌﻠﻴﻤﻲ ‪.100%‬‬ ‫‪‬‬ ‫‪ 10%‬ﻣﻦ اﻟﻄﻼب اﳚﺎﺑﻴﲔ ﳌﺪة ﳏﺪدة )‪.(5min‬‬ ‫‪‬‬
‫اﻟﻄﺎﻟﺐ ﻳﺘﻌﻠﻢ ﻣﻬﺎرات اﻟﺘﻔﻜﲑ‪ ،‬ﻧﻘﻞ اﳋﱪة‪ ،‬روح اﳌﻨﺎﻓﺴﺔ‪ ،‬ﻟﻐﺔ اﳊﻮار‪،‬‬ ‫‪‬‬
‫اﻟﻄﺎﻟﺐ ﻳﺴﺘﺨﺪم ﻣﻬﺎرة اﳊﻔﻆ واﻟﺘﻠﻘﲔ واﻟﱰدﻳﺪ‪.‬‬ ‫‪‬‬
‫اﻟﻌﻤﻞ اﳉﻤﺎﻋﻲ‪ ،‬اﺣﱰام اﻟﺮأي اﻵﺧﺮ‪ ،‬ﲢﻤﻞ اﳌﺴﺆوﻟﻴﺔ‪.‬‬
‫اﳌﻨﺎخ اﻟﺘﻌﻠﻴﻤﻲ ﻣﺘﺠﺪد ﻣﺸﻮق ﻣﺜﲑ ﳏﻔﺰ‪.‬‬ ‫‪‬‬ ‫اﳌﻨﺎخ اﻟﺘﻌﻠﻴﻤﻲ أﻛﺜﺮ ﻣﻠﻞ ورﺗﺎﺑﺔ‪.‬‬ ‫‪‬‬
‫اﳌﻌﻠﻢ ﻳﻘﺘﺼﺮ دورﻩ ﻋﻠﻰ اﻟﺘﻮﺟﻴﻪ ﻣﺜﻞ رﺑﺎن اﻟﺴﻔﻴﻨﺔ وﻟﻜﻦ ﻟﻜﻞ ﻓﺮد دورﻩ‬ ‫‪‬‬ ‫ﻋﻤﻠﻴﺔ اﻟﺘﻌﻠﻢ ﻣﻜﻮﻧﺔ ﻣﻦ ﻣﺮﺳﻞ إﳚﺎﰊ وﻫﻮ اﳌﻌﻠﻢ وﻣﺴﺘﻘﺒﻞ ﺳﻠﱯ وﻫﻮ‬ ‫‪‬‬
‫اﶈﺪد ﳚﺐ اﻟﻘﻴﺎم ﺑﻪ‪.‬‬ ‫اﻟﻄﺎﻟﺐ‪.‬‬
‫ﻳﺴﻬﻞ ﻋﻠﻰ اﳌﻌﻠﻢ رؤﻳﺔ ورﺻﺪ أﻧﺸﻄﺔ اﻟﻄﻼب‪.‬‬ ‫‪‬‬ ‫ﻳﺼﻌﺐ ﻋﻠﻰ اﳌﻌﻠﻢ اﳊﻜﻢ ﻋﻠﻰ اﻟﻄﻼب ﰲ اﳌﻮﻗﻒ اﻟﺘﻌﻠﻴﻤﻲ‪.‬‬ ‫‪‬‬
‫ﺗﺮﻛﻴﺰ اﳌﺘﻌﻠﻢ ﻳﺼﻞ ﻷﻗﺼﻰ درﺟﺔ‪.‬‬ ‫‪‬‬ ‫ﳛﺪث ﻟﻠﻄﻼب ﺗﺸﺘﺖ ذﻫﲏ ﰲ اﻟﻌﺪﻳﺪ ﻣﻦ اﻷﺣﻴﺎن‪.‬‬ ‫‪‬‬
‫ﺗﺮاﻋﻲ ﻫﺬﻩ اﻟﻄﺮق اﻟﻔﺮوق اﻟﻔﺮدﻳﺔ ﺑﲔ اﳌﺘﻌﻠﻤﲔ ﻓﻀﻼً ﻋﻦ أ�ﺎ ﲢﱰم‬ ‫‪‬‬
‫ﻻ ﺗﺮاﻋﻲ ﻫﺬﻩ اﻟﻄﺮق اﻟﻔﺮوق اﻟﻔﺮدﻳﺔ‪.‬‬ ‫‪‬‬
‫ذاﺗﻴﺔ اﳌﺘﻌﻠﻢ وﻗﺪرﺗﻪ ﻋﻠﻰ اﻟﺘﻌﺒﲑ‪.‬‬

‫اﳉﺪول‪ 10-5‬ﻣﻘﺎرﻧﺔ ﺑﲔ اﻟﻄﺮق اﻟﺘﻘﻠﻴﺪﻳﺔ واﻻﺳﱰاﺗﻴﺠﻴﺎت اﳊﺪﻳﺜﺔ ﰲ اﻟﺘﻌﻠﻢ واﻟﺘﻌﻠﻴﻢ‬

‫‪ 6-7-5‬ﻧﺘﺎﺋﺞ ﺟﺪﻳﺮة ﺑﺎﳌﻼﺣﻈﺔ )‪:(Distinguished Notable Results‬‬

‫إن اﳌﻨﻬﺠﻴﺔ اﳌﺘﺒﻌﺔ ﺳﺒﺒﺖ اﻫﺘﻤﺎﻣﺎً زاﺋﺪاً ﻟﺪى اﻟﻄﻼب ﲟﻮﺿﻮع اﳌﻘﺮر‪ ،‬ﺣﻴﺚ ﻳﱪز اﻻﻫﺘﻤﺎم اﻟﻜﺒﲑ ﻟﻠﻄﻼب ﲟﻮﺿﻮع اﳌﻘﺮر ﻣﻦ ﺧﻼل ﻣﺸﺎرﻳﻊ‬
‫اﻟﺘﺨﺮج‪ ،‬ﺣﻴﺚ ازداد ﻋﺪد ﻣﺸﺎرﻳﻊ اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ ﺑﻨﺴﺒﺔ ‪ 75%‬ﻣﻘﺎرﻧﺔً ﻣﻊ اﻟﺴﻨﻮات اﻟﺴﺎﺑﻘﺔ‪.‬‬

‫‪293‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Toward a Constructivist Laboratory Education Model‬‬ ‫ﳓﻮ ﳕﻮذج ﺑﻨﺎﺋﻲ ﻟﻠﺘﻌﻠﻴﻢ اﳌﺨﱪي |‬

‫‪2007-2008‬‬ ‫‪2008-2009‬‬ ‫‪2009-2010‬‬ ‫دورة ﲣﺮج‬

‫‪32‬‬ ‫‪25‬‬ ‫‪34‬‬ ‫ﻋﺪد اﳌﺸﺎرﻳﻊ اﻟﻜﻠﻲ‬
‫‪60‬‬ ‫‪47‬‬ ‫‪63‬‬ ‫ﻋﺪد اﻟﻄﻼب اﻟﻜﻠﻲ‬
‫‪5‬‬ ‫‪4‬‬ ‫‪19‬‬ ‫ﻋﺪد اﳌﺸﺎرﻳﻊ اﻟﱵ ﺗﻌﺘﻤﺪ ﻋﻠﻰ اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ‬
‫‪10‬‬ ‫‪8‬‬ ‫‪37‬‬ ‫ﻋﺪد اﻟﻄﻼب اﻟﻠﺬﻳﻦ ﻋﻤﻠﻮا ﻋﻠﻰ ﻣﺸﺎرﻳﻊ أﻧﻈﻤﺔ ﻣﺪﳎﺔ‬

‫اﳉﺪول‪ 11-5‬ﻣﻘﺎرﻧﺔ ﺑﲔ ﻋﺪد ﻣﺸﺎرﻳﻊ اﻟﺘﺨﺮج اﻟﱵ ﺗﻌﺘﻤﺪ ﻋﻠﻰ اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ‬

‫‪19‬‬
‫‪2009-2010‬‬
‫‪34‬‬

‫‪4‬‬
‫‪2008-2009‬‬
‫‪25‬‬

‫‪5‬‬
‫‪2007-2008‬‬
‫‪32‬‬

‫‪0‬‬ ‫‪5‬‬ ‫‪10‬‬ ‫‪15‬‬ ‫‪20‬‬ ‫‪25‬‬ ‫‪30‬‬ ‫‪35‬‬ ‫‪40‬‬

‫ﻋﺪد اﳌﺸﺎرﻳﻊ اﻟﱵ ﺗﻌﺘﻤﺪ ﻋﻠﻰ اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ‬ ‫ﻋﺪد اﳌﺸﺎرﻳﻊ اﻟﻜﻠﻲ‬

‫ﻧﺤﻮ ﺗﻄﻮﻳﺮ ﻧﻤﻮذج ﺗﻌﻠﻴﻤﻲ ﺷﺎﻣﻞ )‪:(Toward a Comprehensive Educational Model‬‬ ‫‪8-5‬‬

‫ﰲ ﻫﺬﻩ اﻟﻔﻘﺮة ﻧﻀﻊ ﻋﺼﺎرة اﻷﺳﺲ اﻟﱰﺑﻮﻳﺔ اﻟﱵ ﺧﻄّﺖ ﰲ اﻟﻔﺼﻞ اﳋﺎﻣﺲ‪ ،‬وﲬﺮة اﻵﻟﻴﺎت اﻟﻌﻤﻠﻴﺔ ﻟﺘﻠﻚ اﻷﺳﺲ واﻟﱵ ﰎ ﻣﻨﺎﻗﺸﺘﻬﺎ‬
‫وﺗﻄﺒﻴﻘﻬﺎ وﲢﻠﻴﻠﻬﺎ ﰲ ﻫﺬا اﻟﻔﺼﻞ‪.‬‬

‫ﺑﺎﻟﻌﻮدة إﱃ ﳕﻮذج ‪ Kolb‬ﰲ اﻟﺘﻌﻠﻢ اﻟﺘﺠﺮﻳﱯ ﰲ اﻟﻔﺼﻞ اﻟﺮاﺑﻊ )اﻟﺸﻜﻞ‪ ،(4-4‬ﻓﻘﺪ اﻗﱰح ‪ Kolb‬أن اﻟﺘﻌﻠﻢ اﻟﺒﻨﺎﺋﻲ ﳚﺐ أن ﳝﺮ ﺧﻼل دورة‬
‫ﻛﺎﻣﻠﺔ ﻣﺸﻜﻼً أرﺑﻌﺔ أﻃﻮار‪ :‬اﳋﱪات اﳌﻠﻤﻮﺳﺔ ”‪ ،(Concrete Experience) “CE‬اﳌﻼﺣﻈﺔ اﻟﺘﺄﻣﻠﻴﺔ ”‪(Reflective “RO‬‬

‫‪(Active‬‬ ‫)‪ ،Observation‬ﻔﺎﻫﻴﻢ اﺠﻤﻟﺮدة ”‪ ،(Abstract Conceptualization) “AC‬اﻟﺘﺠﺮﻳﺐ اﻟﻔﻌﺎل ”‪“AE‬‬

‫)‪.Experimentation‬‬

‫ﻳﺸﻜﻞ ﻃﻮر اﳋﱪات اﳌﻠﻤﻮﺳﺔ ”‪ “CE‬اﳌﻨﻄﻠﻖ اﻷﺳﺎﺳﻲ ﻟﺘﺤﻔﻴﺰ اﻫﺘﻤﺎم اﳌﺘﻌﻠﻢ ﳓﻮ ﻧﺘﺎﺋﺞ اﻟﺘﻌﻠﻢ اﳌﻄﻠﻮﺑﺔ‪ ،‬وﳝﺜﻞ اﻟﺘﻌﺮض ﻟﻠﻤﺮة اﻷوﱃ إﱃ‬
‫اﳌﻌﺮﻓﺔ أو اﳋﱪة اﳉﺪﻳﺪة‪ ،‬وﻳﺴﺘﻠﺰم اﻟﺒﺤﺚ ﰒ اﳋﻮض ﰲ اﻟﺘﺠﺮﺑﺔ اﻟﺘﻌﻠﻴﻤﺔ اﳉﺪﻳﺪة ﺑﺎﻟﻜﺎﻣﻞ ﺑﺪون أي ﲢﻴﺰ‪ ،‬وﻫﺬا اﻟﻄﻮر ﻫﻮ اﻟﻘﺎﻋﺪة ﻟﻄﻮر‬
‫اﳌﻼﺣﻈﺔ اﻟﺘﺄﻣﻠﻴﺔ ”‪.“RO‬‬

‫ﻃﻮر اﳌﻼﺣﻈﺎت اﻟﺘﺄﻣﻠﻴﺔ ”‪ “RO‬ﻳﺴﺘﻠﺰم اﳌﻘﺪرة ﻋﻠﻰ اﻟﺘﻔﻜﲑ واﳌﻼﺣﻈﺔ ﻟﻠﺨﱪات اﳉﺪﻳﺪة ﻣﻦ أﻛﺜﺮ ﻣﻦ ﻣﻨﻈﻮر‪ ،‬وﻫﺬا ﻳﻘﻮد إﱃ اﳌﻔﺎﻫﻴﻢ‬
‫ﻤﻟﺮدة ”‪.“AC‬‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪294‬‬
‫‪25‬‬ ‫اﻟﻔﺼﻞ اﳋﺎﻣﺲ | ‪Chapter 5‬‬

‫ر اﳌﻔﺎﻫﻴﻢ اﺠﻤﻟﺮدة ”‪ “AC‬ﻳﺴﺘﻠﺰم اﳌﻘﺪرة ﻋﻠﻰ ﺧﻠﻖ ﻣﻔﺎﻫﻴﻢ ﺗﺪﻣﺞ ﺑﲔ اﳌﻼﺣﻈﺎت اﻟﺘﺄﻣﻠﻴﺔ واﻟﻨﻈﺮﻳﺎت اﻟﱵ ﺗﺸﺮح ﻫﺬﻩ اﳌﻼﺣﻈﺎت ﺑﺸﻜﻞ‬
‫ﻣﻨﻄﻘﻲ‪ ،‬وﻫﺬا ﻳﻘﻮد إﱃ اﻟﺘﺠﺮﻳﺐ اﻟﻔﻌﺎل ”‪.“AE‬‬

‫ﻃﻮر اﻟﺘﺠﺮﻳﺐ اﻟﻔﻌﺎل ”‪ “AE‬ﻳﺴﺘﻠﺰم اﳌﻘﺪرة ﻋﻠﻰ اﺳﺘﺨﺪام اﻟﻨﻈﺮﻳﺎت اﳌﺘﻮﻟﺪة ﰲ ﺣﻞ اﳌﺸﺎﻛﻞ واﲣﺎذ اﻟﻘﺮارات‪ ،‬اﻷﻣﺮ اﻟﺬي ﻳﺆدي إﱃ ﺧﱪة‬
‫ﺪﻳﺪة ﺗﻜﺘﻤﻞ ﻬﺑﺎ دورة ‪.Kolb‬‬

‫إن ﻋﻤﻠﻴﺔ ﺑﻨﺎء اﳌﻌﺮﻓﺔ اﳉﺪﻳﺪة )‪ (Knowledge Construction‬ﺗﺘﻢ ﻣﻦ ﺧﻼل ﻃﻮر اﻟﺘﺠﺮﻳﺐ اﻟﻔﻌﺎل ”‪ “AE‬واﳌﻼﺣﻈﺔ اﻟﺘﺄﻣﻠﻴﺔ‬
‫”‪ ،“RO‬و ﻫﺬا اﻟﺒﻨﺎء ﻳﺴﺒﺐ ﻇﻬﻮر اﳌﻔﺎﻫﻴﻢ اﺠﻤﻟﺮدة ”‪ “AC‬اﳉﺪﻳﺪة ﰲ ﻋﻘﻞ اﳌﺘﻌﻠﻢ واﻟﱵ ﺑﺪورﻫﺎ ﺗﺮﺑﻂ ﺑﲔ أﻫﺪاف اﻟﺘﻌﻠﻢ )اﻹﺷﺎرة‬
‫اﳌﺮﺟﻌﻴﺔ ﰲ اﻟﺪﺧﻞ( واﳌﻔﺎﻫﻴﻢ اﳋﺎرﺟﻴﺔ‪.‬‬

‫ﻮم ﻃﻮر اﳌﻼﺣﻈﺔ اﻟﺘﺄﻣﻠﻴﺔ ﺑﺘﻘﻴﻴﻢ اﳌﻔﺎﻫﻴﻢ اﺠﻤﻟﺮدة اﻟﱵ ﰎ ﺑﻨﺎؤﻫﺎ وﻳﺮﺟﻊ ﻫﺬا اﻟﺘﻘﻴﻴﻢ ﻛﺘﻐﺬﻳﺔ ﻋﻜﺴﻴﺔ إﱃ اﳌﺘﻌﻠﻢ ﻟﺘﺤﺪﻳﺪ ﻓﻴﻤﺎ إذا ﲤﺖ دورة‬
‫اﻟﺒﻨﺎء ﺑﺄﻃﻮارﻫﺎ اﻷرﺑﻌﺔ وﰎ ﲢﻘﻴﻖ اﻷﻫﺪاف أم ﻻ‪ ،‬وﻫﻜﺬا ﺣﱴ ﺗﻜﺘﻤﻞ ﲨﻠﺔ أﻫﺪاف اﻟﺘﻌﻠﻢ ﲨﻴﻌﻬﺎ‪.‬‬

‫اﻟﺸﻜﻞ‪ 45-5‬ﻳﺒﲔ اﳌﺨﻄﻂ اﻟﺘﺼﻤﻴﻤﻲ اﻟﻌﺎم ﻟﻠﻨﻤﻮذج اﻟﺘﻌﻠﻴﻤﻲ اﳌﻘﱰح واﻟﺬي ﰎ ﺗﺼﻤﻴﻪ ﺑﻨﺎءً ﻋﻠﻰ اﻷﺳﺲ اﻟﺒﻨﺎﺋﻴﺔ ﰲ اﻟﻔﺼﻞ اﳋﺎﻣﺲ وﻧﻈﺮﻳﺔ‬
‫‪ Kolb‬واﻟﺘﺠﺎرب اﻻﺧﺘﺒﺎرﻳﺔ ﰲ ﻫﺬا اﻟﻔﺼﻞ‪ .‬ﻛﻤﺎ ﻳﺒﲔ اﻟﺸﻜﻞ‪ 46-5‬اﳌﺨﻄﻂ اﻟﺘﺼﻤﻴﻤﻲ اﻟﺘﻔﺼﻴﻠﻲ اﳌﻨﻬﺠﻲ ﻟﻜﻞ ﺟﻠﺴﺔ ﻣﻦ ﺟﻠﺴﺎت‬
‫اﻟﻨﻤﻮذج اﻟﺘﻌﻠﻴﻤﻲ‪.‬‬

‫ﻫﺬا اﻟﻨﻤﻮذج ﺳﻴﺴﺘﺨﺪم ﻻﺣﻘﺎً ﻟﺒﻨﺎء اﳌﻨﻬﺞ اﻟﻌﻤﻠﻲ ﻟﺘﻌﻠﻴﻢ ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺎت اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً‪.‬‬

‫‪295‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 Course Learning Style Set Teaching Session Session Session
Goals Inventory Methodology + 1 + 2 + n +
Feed Forward
Feed Up
Feed Back
Course Evaluation Course Project
(Students & Teacher) Self-Directed, Team-based, PrBL, PjBL

‫ ﳐﻄﻂ اﻟﻨﻤﻮذج اﻟﺘﻌﻠﻴﻤﻲ اﳌﻘﱰح‬45-5‫اﻟﺸﻜﻞ‬

Pre-Lab Main-Lab Post-Lab
Classroom Session
Goals Goals Goals
Lecturing Stimulation
Session 10min ARS-Q Pre-Lab Main-Lab Post-Lab
Goals + + (Virtual) + (Hands-on) + (Remote)

Formative Students
Assessment Learning FA-TLE FA-TLE FA-TLE

Classroom Remote Lab

Students-self-
Class Evaluation A-D-E-M-O-R
Toward a Constructivist Laboratory Education Model

Observable Outcomes

Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages
‫( ﰲ اﻟﻨﻤﻮذج اﻟﺘﻌﻠﻴﻤﻲ اﳌﻘﱰح‬Session) ‫ ﳐﻄﻂ ﻛﻞ ﺟﻠﺴﺔ‬45-5‫اﻟﺸﻜﻞ‬
(FA-PLE)

296
| ‫ﳓﻮ ﳕﻮذج ﺑﻨﺎﺋﻲ ﻟﻠﺘﻌﻠﻴﻢ اﳌﺨﱪي‬
‫‪25‬‬ ‫اﻟﻔﺼﻞ اﳋﺎﻣﺲ | ‪Chapter 5‬‬

‫ﻓﻴﻤﺎ ﻳﻠﻲ ﻧﻮﺿﺢ ﻋﻨﺎﺻﺮ اﻟﻨﻤﻮذج اﻟﺘﻌﻠﻴﻤﻲ اﳌﺼﻤﻢ‪.‬‬

‫‪ 1-8-5‬أﻫﺪاف اﳌﻘﺮر )‪:(Course Goals‬‬

‫ﻗﺒﻞ اﳋﻮض ﰲ ﻣﻮﺿﻮﻋﺎت اﳌﻘﺮر ﻻﺑﺪ ﻣﻦ ﺗﻌﺮﻳﻒ اﻟﻄﻼب ﺑﺎﻷﻃﺮ اﻟﻌﺎﻣﺔ ﻟﻠﻤﻘﺮر وأﻫﺪﻓﻪ وارﺗﺒﺎﻃﻪ ﺑﺎﻟﺘﻄﺒﻴﻘﺎت اﻟﻮاﻗﻌﻴﺔ واﳌﻨﻬﺠﻴﺎت اﻟﱵ‬
‫ﺳﻮف ﻳﺘﻢ اﺗﺒﺎﻋﻬﺎ ﰲ ﺗﻘﺪﳝﻪ‪.‬‬

‫‪ 2-8-5‬اﺳﺘﺒﻴﺎن أﳕﺎط اﻟﺘﻌﻠﻢ )‪:(Learning Styles Inventory‬‬

‫ﻗﺒﻞ اﻟﺒﺪء ﰲ اﳌﻘﺮر ﻻ ﺑﺪ ﻣﻦ ﲢﺪﻳﺪ أﳕﺎط اﻟﺘﻌﻠﻢ ﻟﻠﻄﻼب‪ ،‬وﻫﻨﺎ ﳝﻜﻨﻨﺎ اﺳﺘﺨﺪام أﻛﺜﺮ اﻟﻨﻤﺎذج اﻧﺘﺸﺎراً وﻫﻲ‪ :‬ﳕﻮذج ‪ VARK‬وﳕﻮذج‬
‫‪ Kolb‬ﰲ ﲢﺪﻳﺪ ﳕﻂ اﻟﺘﻌﻠﻢ‪.‬‬

‫‪ 1-2-8-5‬اﺳﺘﺒﻴﺎن أﳕﺎط اﻟﺘﻌﻠﻢ ﻟ ـ‪:(VARK Learning Styles Questionary) VARK‬‬

‫ﻳﺴﺘﺨﺪم ﳕﻮذج ‪ VARK‬ﻟﺘﺤﺪﻳﺪ أﺳﻠﻮب اﻟﺘﻌﻠﻢ ﻟﻸﻓﺮاد‪ ،‬وﻗﺪ ﺗﻘﺪم ﰲ اﻟﻔﺼﻞ اﳋﺎﻣﺲ ﺗﻌﺮﻳﻒ اﻟﺒﺎﺣﺜﲔ & ‪“Felder‬‬
‫]‪[581,582‬‬

‫”‪ Silverman‬ﻷﺳﺎﻟﻴﺐ اﻟﺘﻌﻠﻢ ﻋﻠﻰ أ�ﺎ ﳎﻤﻮﻋﺔ ﻣﻦ اﻟﺴﻠﻮﻛﻴﺎت اﳌﻌﺮﻓﻴﺔ واﻟﻮﺟﺪاﻧﻴﺔ واﻟﻨﻔﺴﻴﺔ‪ ،‬اﻟﱵ ﺗﻌﻤﻞ ﻣﻌﺎً ﻛﻤﺆﺷﺮات ﺛﺎﺑﺘﺔ ﻧﺴﺒﻴﺎً ﻟﻜﻴﻔﻴﺔ‬
‫إدراك وﺗﻔﺎﻋﻞ واﺳﺘﺠﺎﺑﺔ اﻟﻄﺎﻟﺐ ﻣﻊ ﺑﻴﺌﺔ اﻟﺘﻌﻠﻢ‪.‬‬

‫اﳉﺪول‪ 12-5‬ﻳﺒﲔ ﳕﻮذج اﺳﺘﺒﻴﺎن ‪ ،VARK‬ﻗﻢ ﺑﺘﺤﺪﻳﺪ اﻹﺟﺎﺑﺔ اﻟﱵ ﺗﺸﺮح اﺧﺘﻴﺎرك اﻷﻓﻀﻞ‪ ،‬وﳝﻜﻨﻚ اﺧﺘﻴﺎر أﻛﺜﺮ ﻣﻦ إﺟﺎﺑﺔ إذا ﻛﺎن‬
‫اﳉﻮاب اﻟﻮاﺣﺪ ﻻ ﻳﻄﺎﺑﻖ إدراﻛﻚ اﳊﺴﻲ‪ ،‬وﻻ ﻣﺎﻧﻊ ﻣﻦ ﺗﺮك اﻟﺴﺆال اﻟﺬي ﻻ ﻳﻨﻄﺒﻖ ﻋﻠﻴﻚ دون إﺟﺎﺑﺔ‪.‬‬

‫‪The Questions‬‬ ‫اﻷﺳﺌﻠﺔ‬

‫أﻧﺖ ﺗﺴﺎﻋﺪ ﺷﺨﺼﺎً ﻳﺮﻳﺪ اﻟﻮﺻﻮل إﱃ اﳌﻄﺎر أو وﺳﻂ اﳌﺪﻳﻨﺔ‪ ،‬أو ﳏﻄﺔ‬ ‫‪(1‬‬
‫‪1) You are helping someone who wants to go to your‬‬
‫‪airport, town center or railway station. You would:‬‬ ‫اﻟﺴﻜﺔ اﳊﺪﻳﺪﻳﺔ‪ ،‬ﻓﺄﻧﺖ ﳝﻜﻦ أن‪:‬‬
‫‪A. Go with him.‬‬ ‫ﺗﺬﻫﺐ ﻣﻌﻪ‪.‬‬ ‫‪.A‬‬
‫‪B. Tell him the directions.‬‬ ‫ﲣﱪﻩ ﻋﻦ اﻻﲡﺎﻫﺎت‪.‬‬ ‫‪.B‬‬
‫‪C. Write down the directions (without a map).‬‬ ‫ﺗﻜﺘﺐ ﻟﻪ اﻻﲡﺎﻫﺎت )ﺑﺪون ﺧﺮﻳﻄﺔ(‪.‬‬ ‫‪.C‬‬
‫‪D. Draw, or give him a map.‬‬
‫ﺗﺮﺳﻢ أو ﺗﻌﻄﻴﻪ ﺧﺮﻳﻄﺔ‪.‬‬ ‫‪.D‬‬
‫‪2) You are not sure whether a word should be spelled‬‬
‫ﻧﺖ ﻏﲑ ﻣﺘﺄﻛﺪ ﻣﺎ إذا ﻛﺎﻧﺖ ﻬﺗﺠﺌﺔ اﻟﻜﻠﻤﺔ ”‪ “dependent‬أو‬ ‫‪(2‬‬
‫‪`dependent' or `dependant'. You:‬‬
‫‪A. See the words in your mind and choose by the way‬‬ ‫”‪“dependant‬ﳝﻜﻨﻚ أن‪:‬‬
‫‪they look.‬‬ ‫ﺗﺘﺨﻴﻞ اﻟﻜﻠﻤﺎت ﰲ ﻋﻘﻠﻚ وﲣﺘﺎر ﺣﺴﺐ اﻟﺸﻜﻞ اﻟﺬي ﺗﺮاﻩ‪.‬‬ ‫‪.A‬‬
‫‪B. Think about how each word sounds and choose‬‬ ‫ﺗﻔﻜﺮ ﺑﺼﻮت ﻛﻞ ﻛﻠﻤﺔ وﲣﺘﺎر واﺣﺪة‪.‬‬ ‫‪.B‬‬
‫‪one.‬‬ ‫ﺗﺒﺤﺚ ﻋﻨﻬﺎ ﰲ اﻟﻘﺎﻣﻮس‪.‬‬ ‫‪.C‬‬
‫‪C. Find it in a dictionary.‬‬
‫ﺗﻜﺘﺐ اﻟﻜﻠﻤﺘﲔ ﻋﻠﻰ اﻟﻮرﻗﺔ وﲣﺘﺎر واﺣﺪة‪.‬‬ ‫‪.D‬‬
‫‪D. Write both words on paper and choose one.‬‬
‫‪3) You are planning a holiday for a group. You want‬‬ ‫ﺖ ﲣﻄﻂ رﺣﻠﺔ ﺠﻤﻟﻤﻮﻋﺔ وﺗﺮﻳﺪ أن ﺗﻌﺮف رأﻳﻬﻢ ﺣﻮل اﳌﺨﻄﻂ‪ .‬ﻓﺄﻧﺖ‬ ‫‪(3‬‬
‫‪some feedback from them about the plan. You‬‬ ‫ﳝﻜﻦ أن‪:‬‬
‫‪would:‬‬
‫ﺗﺼﻒ اﻟﻨﻘﺎط اﳌﻬﻤﺔ ﻟﻠﻤﺨﻄﻂ‪.‬‬ ‫‪.A‬‬
‫‪A. Describe some of the highlights.‬‬
‫‪B. Use a map or website to show the places.‬‬ ‫ﺗﺴﺘﻌﻤﻞ ﺧﺮﻳﻄﺔ أو ﻣﻮﻗﻊ إﻧﱰﻧﺖ ﻟﱰﻳﻬﻢ اﻷﻣﻜﻨﺔ‪.‬‬ ‫‪.B‬‬
‫‪C. Give them a copy of the printed itinerary.‬‬ ‫ﺗﻌﻄﻴﻬﻢ ﻧﺴﺨﺔ ﻣﻦ دﻟﻴﻞ اﻟﺮﺣﻠﺔ‪.‬‬ ‫‪.C‬‬

‫‪297‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 Toward a Constructivist Laboratory Education Model | ‫ﳓﻮ ﳕﻮذج ﺑﻨﺎﺋﻲ ﻟﻠﺘﻌﻠﻴﻢ اﳌﺨﱪي‬

D. Phone, text or email them. .ً‫ ﺘﺼﻞ ﻬﺑﻢ ﻫﺎﺗﻔﻴﺎً أو ﺗﺮﺳﻞ رﺳﺎﻟﺔ ﻗﺼﲑة أو ﺑﺮﻳﺪاً إﻟﻜﱰوﻧﻴﺎ‬.D
4) You are going to cook something as a special treat
for your family. You would:
A. Cook something you know without the need for
:‫ ﻓﺄﻧﺖ ﳝﻜﻦ أن‬،‫أﻧﺖ ﺑﺼﺪد أن ﲢﻀﺮ وﻟﻴﻤﺔ ﳑﻴﺰة ﻟﻌﺎﺋﻠﺘﻚ‬ (4
instructions. .‫ﺗﻄﺒﺦ ﺷﻴﺌﺎً ﺗﻌﺮﻓﻪ دون اﳊﺎﺟﺔ إﱃ ﺗﻌﻠﻴﻤﺎت‬ .A
B. Ask friends for suggestions. .‫ﺗﺴﺄل اﻷﺻﺪﻗﺎء ﻟﺘﺰوﻳﺪك ﺑﺎﻗﱰاﺣﺎت‬ .B
C. Look through the cookbook for ideas from the .‫ﺗﻨﻈﺮ ﰲ ﻛﺘﺎب اﻟﻄﺒﺦ ﻟﺘﺄﺧﺬ أﻓﻜﺎراً ﻣﻦ اﻟﺼﻮر‬ .C
pictures.
.‫ﺗﺴﺘﺨﺪم ﻛﺘﺎب ﻓﻦ اﻟﻄﺒﺦ ﺣﻴﺚ ﺗﻌﻠﻢ أن ﻫﻨﺎك وﺻﻔﺎت ﺟﻴﺪة‬ .D
D. Use a cookbook where you know there is a good
recipe.
5) A group of tourists want to learn about the parks or
wildlife reserves in your area. You would:
‫( ﳎﻤﻮﻋﺔ ﻣﻦ اﻟﺴﻴﺎح ﺗﻮد اﻟﺘﻌﺮف ﻋﻠﻰ اﳌﻨﺘﺰﻫﺎت وﳏﻤﻴﺎت اﳊﻴﺎة اﻟﱪﻳﺔ ﰲ‬5
A. Talk about, or arrange a talk for them about parks
or wildlife reserves. :‫ ﻓﺄﻧﺖ ﳝﻜﻦ أن‬،‫ﻣﻨﻄﻘﺘﻚ‬
B. Show them internet pictures, photographs or .‫ﺗﺘﺤﺪث ﻋﻨﻬﺎ أو ﺗﻨﺴﻖ ﻟﺘﺤﻀﲑ ﻣﻦ ﻳﻠﻘﻲ ﻋﻠﻴﻬﻢ ﻛﻠﻤﺔ ﺣﻮل اﳌﻮﺿﻮع‬ .A
picture books. .‫ أو رﺳﻮﻣﺎً ﻣﻦ ﻛﺘﺎب اﻟﺼﻮر‬،‫ﺗﺮﻳﻬﻢ ﺻﻮراً ﻋﻠﻰ ﺷﺒﻜﺔ اﻹﻧﱰﻧﺖ‬ .B
C. Take them to a park or wildlife reserve and walk .‫ﺗﺄﺧﺬﻫﻢ إﱃ اﳌﻨﺘﺰﻩ وﳏﻤﻴﺎت اﳊﻴﺎة اﻟﱪﻳﺔ وﺗﺴﲑ ﻣﻌﻬﻢ‬ .C
with them.
.‫ﺗﻌﻄﻴﻬﻢ ﻛﺘﺎﺑﺎً ﻋﻦ اﳌﻨﺘﺰﻫﺎت وﳏﻤﻴﺎت اﳊﻴﺎة اﻟﱪﻳﺔ‬ .D
D. Give them a book or pamphlets about the parks or
wildlife reserves.
6) You are about to purchase a digital camera or ‫ ﺑﻌﻴﺪاً ﻋﻦ اﻟﺴﻌﺮ ﻣﺎ‬،ً‫أﻧﺖ ﺑﺼﺪد ﺷﺮاء آﻟﺔ ﺗﺼﻮﻳﺮ رﻗﻤﻴﺔ أو ﻫﺎﺗﻔﺎً ﺧﻠﻮﻳﺎ‬ (6
mobile phone. Other than price, what would most .‫اﻟﺬي ﻳﺆﺛﺮ ﻋﻠﻰ ﻗﺮارك‬
influence your decision?
.‫ﲡﺮﺑﺘﻪ واﺧﺘﺒﺎرﻩ‬ .A
A. Trying or testing it.
B. Reading the details about its features.
.‫ﻗﺮاءة ﺗﻔﺎﺻﻴﻞ ﻋﻦ ﻣﻮاﺻﻔﺎﺗﻪ‬ .B

C. It is a modern design and looks good. .‫ﻫﻮ ﺗﺼﻤﻴﻢ ﺣﺪﻳﺚ وﻣﻈﻬﺮﻩ ﺟﻴﺪ‬ .C
D. The salesperson telling me about its features. .‫اﻟﺒﺎﺋﻊ أﺧﱪﱐ ﻋﻦ ﻣﻮاﺻﻔﺎﺗﻪ‬ .D
7) Remember a time when you learned how to do
‫ ﺣﺎول ﻋﺪم اﺧﺘﻴﺎر ﻣﻬﺎرات‬.ً‫ﺗﺬﻛﺮ ﻣﺮة ﺗﻌﻠﻤﺖ ﻓﻴﻬﺎ ﺷﻴﺌﺎً ﺟﺪﻳﺪا‬ (7
something new. Try to avoid choosing a physical
skill, eg. Riding a bike. You learned best by: :‫ ﻓﺄﻧﺖ ﺗﻌﻠﻤﺖ أﻓﻀﻞ ﺑﻮاﺳﻄﺔ‬،‫ﺟﺴﺪﻳﺔ ﻛﺮﻛﻮب اﻟﺪراﺟﺔ‬
A. Watching a demonstration. .‫ﻣﺸﺎﻫﺪة ﻋﺮض‬ .A
B. Listening to somebody explaining it and asking .‫اﻻﺳﺘﻤﺎع إﱃ ﺷﺮح أﺣﺪﻫﻢ وﻃﺮح أﺳﺌﻠﺔ‬ .B
questions. .‫رﺳﻮم ﺑﻴﺎﻧﻴﺔ وﻣﺴﺎﻋﺪات ﻣﺮﺋﻴﺔ‬ .C
C. Diagrams and charts - visual clues.
.‫ ﻣﺜﻞ دﻟﻴﻞ اﻻﺳﺘﻌﻤﺎل أو ﻛﺘﺎب‬،‫ﺗﻌﻠﻴﻤﺎت ﻣﻜﺘﻮﺑﺔ‬ .D
D. Written instructions – manual or textbook.
8) You have a problem with your knee. You would
prefer that the doctor:
:‫ﻋﻨﺪك ﻣﺸﻜﻠﺔ ﰲ رﻛﺒﺘﻚ ﻓﺄﻧﺖ ﺗﻔﻀﻞ اﻟﻄﺒﻴﺐ اﻟﺬي‬ (8
A. Gave you a web or something to read about. .‫ﻳﻌﻄﻴﻚ اﺳﻢ ﻣﻮﻗﻊ ﻋﻠﻰ اﻹﻧﱰﻧﺖ أو ﺷﻴﺌﺎً ﻟﺘﻘﺮأﻩ ﻋﻦ اﳌﻮﺿﻮع‬ .A
B. Used a plastic model of a knee to show what was .‫ﻳﺴﺘﺨﺪم ﳕﻮذﺟﺎً ﺑﻼﺳﺘﻴﻜﻴﺎً ﻟﻴﺸﺮح ﻟﻚ اﳌﺸﻜﻠﺔ‬ .B
wrong. .‫ﻳﺼﻒ ﻟﻚ ﻣﺎ اﳌﺸﻜﻠﺔ‬ .C
C. Described what was wrong.
.‫ﻳﺮﻳﻚ رﲰﺎً ﻋﻦ اﳌﺸﻜﻠﺔ‬ .D
D. Showed you a diagram of what was wrong.
9) You want to learn a new program, skill or game on ،‫( أﻧﺖ ﺗﺮﻳﺪ أن ﺗﺘﻌﻠﻢ ﺑﺮﻧﺎﳎﺎً أو ﻣﻬﺎرة أو ﻟﻌﺒﺔ ﺟﺪﻳﺪة ﰲ اﳊﺎﺳﻮب‬9
a computer. You would:
:‫ﻓﺄﻧﺖ‬
A. Read the written instructions that came with the
program.
.‫ ﺗﻘﺮأ اﻟﺘﻌﻠﻴﻤﺎت اﳌﻜﺘﻮﺑﺔ اﳌﺮﻓﻘﺔ ﺑﺎﻟﱪﻧﺎﻣﺞ‬.A
B. Talk with people who know the program. .‫ ﺗﺘﺤﺪث ﻣﻊ أﻧﺎس ﻳﻌﺮﻓﻮن ﻫﺬا اﻟﱪﻧﺎﻣﺞ‬.B
Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages 298
25 Chapter 5 | ‫اﻟﻔﺼﻞ اﳋﺎﻣﺲ‬

C. Use the controls or keyboard. .‫ ﺗﺴﺘﺨﺪم ﻟﻮﺣﺔ اﳌﻔﺎﺗﻴﺢ‬.C

D. Follow the diagrams in the book that came with it.
.‫ ﺗﺘﺒﻊ اﻟﺮﺳﻢ اﳌﻮﺟﻮد ﰲ اﻟﻜﺘﺎب اﳌﺮﻓﻖ ﺑﻪ‬.D
10) I like websites that have: :‫أﻧﺎ أﺣﺐ اﳌﻮاﻗﻊ اﻹﻟﻜﱰوﻧﻴﺔ اﻟﱵ ﲢﺘﻮي ﻋﻠﻰ‬ (10
A. Things I can click on, shift or try. .‫ﺷﻴﺎء ﳝﻜﻦ أن أﺿﻐﻂ ﻋﻠﻴﻬﺎ وأﻧﻘﻠﻬﺎ و أﺟﺮﻬﺑﺎ‬ .A
B. Interesting design and visual features.
...‫ ﻣﻦ رﺳﻮﻣﺎت وأﻟﻮان‬،‫ﺗﺼﺎﻣﻴﻢ ﺷﺎﺋﻘﺔ وﻣﻮاﺻﻔﺎت ﻣﺮﺋﻴﺔ‬ .B
C. Interesting written descriptions, lists and
explanations.
.‫ﺗﻔﺴﲑات ﺷﻴﻘﺔ وﻟﻮاﺋﺢ وﺻﻔﻴﺔ ﻣﻜﺘﻮﺑﺔ‬ .C

D. Audio channels where I can hear music, radio ،‫ ﺣﻴﺚ ﳝﻜﻨﲏ اﻻﺳﺘﻤﺎع ﻟﻠﻤﻮﺳﻴﻘﻰ وﺑﺮاﻣﺞ اﻹذاﻋﺔ‬،‫ﻗﻨﻮات ﲰﻌﻴﺔ‬ .D
programs or interviews. .‫واﳌﻘﺎﺑﻼت‬
11) Other than price, what would most influence your .ً‫ﻣﺎ اﻟﺬي ﻳﺆﺛﺮ ﻓﻴﻚ أﻛﺜﺮ ﻋﻨﺪﻣﺎ ﺗﺸﱰي ﻛﺘﺎﺑﺎً واﻗﻌﻴﺎ‬ (11
decision to buy a new non-fiction book? .‫اﻟﺸﻜﻞ اﳋﺎرﺟﻲ ﻟﻠﻜﺘﺎب‬ .A
A. The way it looks is appealing.
.‫ﻗﺮاءة ﺳﺮﻳﻌﺔ ﻷﺟﺰاء ﻣﻨﻪ‬ .B
B. Quickly reading parts of it.
C. A friend talks about it and recommends it. .‫رﻓﻴﻖ ﲢﺪث ﻋﻨﻪ وأوﺻﻰ ﺑﻪ‬ .C
D. It has real-life stories, experiences and…. .‫ وﲡﺎرب وأﻣﺜﻠﺔ‬،‫ﳛﺘﻮي ﻋﻠﻰ ﻗﺼﺺ ﺣﻴﺎﺗﻴﺔ واﻗﻌﻴﺔ‬ .D
12) You are using a book, CD or website to learn how
to take photos with your new digital camera. You
‫ أو ﻣﻮﻗﻌﺎً إﻟﻜﱰوﻧﻴﺎً ﻟﺘﺘﻌﻠﻢ‬،‫ أو أﺳﻄﻮاﻧﺔ ﳑﻐﻨﻄﺔ‬،ً‫أﻧﺖ ﺗﺴﺘﺨﺪم ﻛﺘﺎﺑﺎ‬ (12
would like to have:
:‫ ﻓﺄﻧﺖ ﺗﻔﻀﻞ أن ﺗﻜﻮن ﻋﻨﺪك‬،‫ﻛﻴﻒ ﺗﺄﺧﺬ ﺻﻮراً ﺑﺂﻟﺔ ﺗﺼﻮﻳﺮك اﻟﺮﻗﻤﻴﺔ‬
A. A chance to ask questions and talk about the camera
and its features. .‫ﻟﻔﺮﺻﺔ ﻟﻄﺮح اﻷﺳﺌﻠﺔ واﻟﺘﺤﺪث ﻋﻦ آﻟﺔ اﻟﺘﺼﻮﻳﺮ وﻣﻮاﺻﻔﺎﻬﺗﺎ‬ .A
B. Clear written instructions with lists and bullet ‫اﻟﺘﻌﻠﻴﻤﺎت اﳌﻜﺘﻮﺑﺔ واﻟﻮاﺿﺤﺔ واﻟﻠﻮاﺋﺢ واﻟﻨﻘﺎط اﶈﺪدة ﻋﻤﺎ ﳚﺐ أن‬ .B
points about what to do. .‫ﺗﻔﻌﻠﻪ‬
C. Diagrams showing the camera and what each part
.‫اﻟﺮﺳﻮم اﻟﺒﻴﺎﻧﻴﺔ اﻟﱵ ﺗﻈﻬﺮ آﻟﺔ اﻟﺘﺼﻮﻳﺮ وﻛﻴﻔﻴﺔ ﻋﻤﻞ ﻛﻞ ﺟﺰء ﻣﻨﻬﺎ‬ .C
does.
D. Many examples of good and poor photos and how
.‫أﻣﺜﻠﺔ ﻛﺜﲑة ﻋﻦ ﺻﻮر ﺟﻴﺪة وأﺧﺮى ردﻳﺌﺔ واﻟﻄﺮﻳﻘﺔ ﻟﺘﺤﺴﻴﻨﻬﺎ‬ .D

to improve them.

13) Do you prefer a teacher or a presenter who uses:

:‫ﻣﻦ ﺗﻔﻀﻞ اﳌﺪرس أو اﳌﻘﺪم اﻟﺬي ﻳﺴﺘﺨﺪم‬ (13
A. Demonstrations, models or practical sessions. .‫ أو ﺟﻠﺴﺎت ﺗﻄﺒﻴﻘﻴﺔ‬،‫ﻋﺮوﺿﺎً وﳕﺎذج‬ .A
B. Question and answer, talk, group discussion. .‫ أو ﻣﻨﺎﻗﺸﺔ ﲨﺎﻋﻴﺔ‬،ً‫ ﺣﺪﻳﺜﺎ‬،‫أﺳﺌﻠﺔ وأﺟﻮﺑﺔ‬ .B
C. Handouts, books, or readings. .‫ أو ﻗﺮاءات‬،‫ أو ﻛﺘﺐ‬،‫أوراق ﻋﻤﻞ‬ .C
D. Diagrams, charts or graphs.
.ً‫ أو ﺧﺮاﺋﻂ ﺑﻴﺎﻧﻴﺔ وﺻﻮرا‬،‫ ﳐﻄﻄﺎت‬،‫رﺳﻮﻣﺎً ﺑﻴﺎﻧﻴﺔ‬ .D
‫ ﻓﺄﻧﺖ ﺗﻮد‬،‫ وﺗﺮﻳﺪ أن ﺗﻌﺮف ﺧﻠﻔﻴﺔ ﻋﻦ ذﻟﻚ‬،‫أ�ﻴﺖ اﺧﺘﺒﺎراً أو ﻣﻨﺎﻓﺴﺔ‬
14) You have finished a competition or test and would (14
like some feedback. You would like to have :‫أن ﺗﻜﻮن اﳋﻠﻔﻴﺔ‬
feedback:
.‫اﺳﺘﺨﺪام أﻣﺜﻠﺔ ﳑﺎ ﻓﻌﻠﺘﻪ‬ .A
A. Using examples from what you have done.
B. Using a written description of your results.
.‫اﺳﺘﺨﺪام وﺻﻒ ﺧﻄﻲ ﻋﻦ ﻧﺘﺎﺋﺠﻚ‬ .B

C. From somebody who talks it through to you. .‫ﻣﻦ ﺷﺨﺺ ﻳﺘﺤﺪث ﻣﻌﻚ ﻋﻨﻬﺎ‬ .C
D. Using graphs showing what you had done. .‫اﺳﺘﻌﻤﺎل رﺳﻮم ﺑﻴﺎﻧﻴﺔ وﺻﻮر ﻋﻦ ﻣﺎ أﳒﺰﺗﻪ‬ .D
15) You are going to choose food at a restaurant or
cafe. You would:
:‫ ﻓﺄﻧﺖ‬.‫ﻋﻠﻴﻚ اﺧﺘﻴﺎر ﻃﻌﺎم ﰲ ﻣﻄﻌﻢ أو ﻣﻘﻬﻰ‬ (15
A. Choose something that you have had before. .ً‫ﲣﺘﺎر ﺷﻴﺌﺎً أﻛﻠﺘﻪ ﺳﺎﺑﻘﺎ‬ .A
B. Listen to the waiter or ask friends to recommend. .‫ﺗﺴﺘﻤﻊ ﻟﻠﻨﺎدل أو ﺗﺴﺄل أﺻﺪﻗﺎءك ﻟﻄﺮح اﺧﺘﻴﺎرات‬ .B
C. Choose from the descriptions in the menu. .‫ﲣﺘﺎر ﻣﻦ اﻟﻮﺻﻒ اﳌﻮﺟﻮد ﰲ ﻗﺎﺋﻤﺔ اﻟﻮﺟﺒﺎت‬ .C
D. Look at what others are eating or look at pictures of
.‫ﺗﺘﻄﻠﻊ إﱃ ﻣﺎ ﻳﺄﻛﻠﻪ اﻵﺧﺮون أو ﺗﻨﻈﺮ إﱃ ﺻﻮر اﻟﻄﻌﺎم‬ .D
each dish.

299 ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 Toward a Constructivist Laboratory Education Model | ‫ﳓﻮ ﳕﻮذج ﺑﻨﺎﺋﻲ ﻟﻠﺘﻌﻠﻴﻢ اﳌﺨﱪي‬

16) You have to make an important speech at a

conference or special occasion. You would:
A. Make diagrams or get graphs to help explain things.
:‫ ﻓﺄﻧﺖ‬،‫ﻋﻠﻴﻚ إﻟﻘﺎء ﻛﻠﻤﺔ ﻣﻬﻤﺔ ﰲ ﻣﺆﲤﺮ أو ﻣﻨﺎﺳﺒﺔ ﺧﺎﺻﺔ‬ (16
B. Write a few key words and practice saying your .‫ﺗﺴﺘﺨﺪم رﺳﻮﻣﺎً ﺑﻴﺎﻧﻴﺔ وﺻﻮراً ﺗﺴﺎﻋﺪك ﻋﻠﻰ ﺷﺮح اﻷﺷﻴﺎء‬ .A
speech over and over. .‫ﺗﻜﺘﺐ رؤوس أﻗﻼم ﻋﻦ اﳌﻮﺿﻮع وﺗﺘﺪرب ﻋﻠﻰ ﻗﻮﳍﺎ ﻣﺮة ﺑﻌﺪ أﺧﺮى‬ .B
C. Write out your speech and learn from reading it .‫ﻜﺘﺐ اﻟﻜﻠﻤﺔ وﺗﺘﻌﻠﻤﻬﺎ ﻋﻦ ﻃﺮﻳﻖ ﻗﺮاءﻬﺗﺎ ﻋﺪة ﻣﺮات‬ .C
over several times.
.ً‫ﲡﻤﻊ اﻟﻌﺪﻳﺪ ﻣﻦ اﻷﻣﺜﻠﺔ واﻟﻘﺼﺺ ﻟﺘﺠﻌﻞ ﻛﻼﻣﻚ واﻗﻌﻴﺎً وﻋﻤﻠﻴﺎ‬ .D
D. Gather many examples and stories to make the talk
real and practical.

‫ ﻟﺘﺤﺪﻳﺪ ﳕﻂ اﻟﺘﻌﻠﻢ‬VARK ‫ ﳕﻮذج أﺳﺌﻠﺔ اﺳﺘﺒﻴﺎن‬12-5‫اﳉﺪول‬

.‫ وﲨﻊ اﻻﺧﺘﻴﺎرات ﲢﺖ ﻛﻞ ﺑﻨﺪ‬13-5‫ﺑﻌﺪ اﻻﻧﺘﻬﺎء ﻣﻦ اﻹﺟﺎﺑﺔ ﻋﻠﻰ اﻷﺳﺌﻠﺔ ﻗﻢ ﺑﺘﺪوﻳﻦ اﻻﺧﺘﻴﺎرات ﰲ اﳉﺪول‬

“V” “A” “R” “K”

Question
VISUAL AURAL READ/WRITE KINESTHETIC
1- D B C A
2- A B C D
3- B D C A
4- C B D A
5- B A D C
6- C D B A
7- C B D A
8- D C A B
9- D B A C
10- B D C A
11- A C B D
12- C A B D
13- D B C A
14- D C B A
15- D B C A
16- A B C D
Totals ------ ------ ------ ------

VARK ‫ ﺟﺪول ﲢﺪﻳﺪ ﻗﻴﻢ أﺳﺎﻟﻴﺐ اﻟﺘﻌﻠﻢ اﻷرﺑﻌﺔ‬13-5‫اﳉﺪول‬

:(Kolb Learning Styles Questionary) Kolb‫ ﳕﻮذج اﺳﺘﺒﻴﺎن أﳕﺎط اﻟﺘﻌﻠﻢ ﻟـ ـ‬2-2-8-5

ً‫ ﻓﻴﻤﺎ ﻳﻠﻲ ﳎﻤﻮﻋﺔ ﻣﺆﻟﻔﺔ ﻣﻦ اﺛﻨﺎ ﻋﺸﺮ ﺳﺆاﻻ‬،‫ ﳕﻮذﺟﺎً اﺳﺘﻘﺼﺎﺋﻴﺎً ﻟﺘﺤﺪﻳﺪ أﺳﻠﻮب اﻟﺘﻌﻠﻢ ﻟﻸﻓﺮاد ﻗﺒﻞ اﳋﻮض ﰲ دورة اﻟﺘﻌﻠﻢ‬Kolb ‫ﻟﻘﺪ وﺿﻊ‬
‫( ﻣﻦ ﺑﻨﺎءً ﻋﻠﻰ ﻣﺴﺘﻮى ﻣﻨﺎﺳﺒﺘﻪ ﻣﻊ اﻟﻄﺮﻳﻘﺔ‬1,2,3,4) ‫ ﺗﻘﻴﻴﻢ ﻛﻞ ﺳﺆال‬:‫ واﳌﻄﻠﻮب‬،ً‫ﻳﺘﻀﻤﻦ ﻛﻞ ﻣﻨﻬﺎ أرﺑﻊ أﺳﺌﻠﺔ واﶈﺼﻠﺔ ﻫﻲ أرﺑﻌﻮن ﺳﺆاﻻ‬
“4” = most like | “3” = second most ) ‫“ اﻷدﱏ‬1” ‫“ ﲤﺜﻞ أﻋﻠﻰ ﺗﻘﻴﻴﻢ واﻟﻘﻴﻤﺔ‬4” ‫ ﺣﻴﺚ أن اﻟﻘﻴﻤﺔ‬،‫ﻟﱵ ﺗﻮد ﻬﺑﺎ ﺗﻌﻠﻢ ﺷﻲء ﻣﺎ‬

.(like | “2” = third most like | “1” = least like

Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages 300
25 Chapter 5 | ‫اﻟﻔﺼﻞ اﳋﺎﻣﺲ‬

The Questions Rank (1~4) ‫اﻷﺳﺌﻠﺔ‬

1- When I learn: :‫ ﻋﻨﺪﻣﺎ أﺗﻌﻠﻢ‬-1
A. I like to deal with my feelings A. ____ .‫ أﻓﻀﻞ اﻟﺘﻌﺎﻣﻞ ﻣﻊ ﺷﻌﻮري‬.A
B. I like to think about ideas B. ____ .‫ أﻓﻀﻞ اﻟﺘﻔﻜﲑ ﺣﻮل اﻷﻓﻜﺎر‬.B
C. I like to be doing things C. ____ .‫ أﻓﻀﻞ اﻟﻘﻴﺎم ﺑﺎﻷﺷﻴﺎء‬.C
D. I like to watch and listen D. ____ .‫ أﻓﻀﻞ اﳌﺸﺎﻫﺪة واﻻﺳﺘﻤﺎع‬.D
2- I learn best: :‫ أﺗﻌﻠﻢ ﺑﺸﻜﻞ أﻓﻀﻞ ﻋﻨﺪﻣﺎ‬-2
A. I listen and watch carefully A. ____ .‫ أﺳﺘﻤﻊ وأراﻗﺐ ﺑﺎﻧﺘﺒﺎﻩ‬.A
B. I rely on logical thinking B. ____ .‫ اﻋﺘﻤﺪ ﻋﻠﻰ اﻟﺘﻔﻜﲑ اﳌﻨﻄﻘﻲ‬.B
C. I trust my hunches and feelings C. ____ .‫ أﺛﻖ ﲟﺸﺎﻋﺮي وﺣﺪﺳﻲ‬.C
D. I work hard to get things done D. ____ .‫ أﻋﻤﻞ ﺟﺎﻫﺪاً ﻹﳒﺎز اﻷﺷﻴﺎء‬.D
3- When I am learning: :‫ ﻋﻨﺪﻣﺎ أﻛﻮن ﰲ ﻋﻤﻠﻴﺔ اﻟﺘﻌﻠﻢ‬-3
A. I tend to reason things out A. ____ .‫ أﻣﻴﻞ إﱃ اﺳﺘﻨﺘﺎج اﻷﺷﻴﺎء‬.A
B. I am responsible about things B. ____ .‫ أﻧﺎ ﻣﺴﺆول ﻋﻦ اﻷﺷﻴﺎء‬.B
C. I am quiet and reserved C. ____ .‫ أﻧﺎ ﻫﺎدئ وﻣﺘﺤﻔﻆ‬.C
D. I have strong feelings and reactions D. ____ .ً‫ أﻣﻠﻚ ﺷﻌﻮراً وﺗﻔﺎﻋﻼً ﻗﻮﻳﺎ‬.D
4- I learn by: :‫ أﺗﻌﻠﻢ ﻣﻦ ﺧﻼل‬-4
A. Feeling A. ____ .‫ اﻟﺸﻌﻮر‬.A
B. Doing B. ____ .‫ اﻟﺘﻄﺒﻴﻖ‬.B
C. Watching C. ____ .‫ اﳌﺸﺎﻫﺪة‬.C
D. Thinking D. ____ .‫ اﻟﺘﻔﻜﲑ‬.D
5- When I learn: :‫ ﻋﻨﺪﻣﺎ أﺗﻌﻠﻢ‬-5
A. I am open to new experiences A. ____ .‫ أﻛﻮن ﻣﻨﻔﺘﺤﺎً ﻟﻠﺘﺠﺎرب اﳉﺪﻳﺪة‬.A
B. I look at all sides of issues B. ____ .‫ أﻧﻈﺮ إﱃ ﲨﻴﻊ ﺟﻮاﻧﺐ اﳌﺴﺄﻟﺔ‬.B
C. I like to analyze things, their parts C. ____ .ً‫ أﻓﻀﻞ ﲢﻠﻴﻞ اﻷﺷﻴﺎء ﻣﻔﺼﻠﺔ‬.C
D. I like to try things out D. ____ .‫ أﻓﻀﻞ اﺧﺘﺒﺎر اﻷﺷﻴﺎء‬.D
6- When I am learning: :‫ ﻋﻨﺪﻣﺎ أﻛﻮن ﰲ ﻋﻤﻠﻴﺔ اﻟﺘﻌﻠﻢ‬-6
A. I am an observing person A. ____ .‫ ﻓﺄﻧﺎ ﺷﺨﺺ ﻣﺮاﻗﺐ‬.A
B. I am an active person B. ____ .‫ ﻓﺄﻧﺎ ﺷﺨﺺ ﻧﺸﻴﻂ‬.B
C. I am an intuitive person C. ____ .‫ ﻓﺄﻧﺎ ﺷﺨﺺ ﺣﺪﺳﻲ‬.C
D. I am a logical person D. ____ .‫ ﻓﺄﻧﺎ ﺷﺨﺺ ﻣﻨﻄﻘﻲ‬.D
7- I learn best from: :‫ أﺗﻌﻠﻢ ﺑﺸﻜﻞ أﻓﻀﻞ ﻣﻦ‬-7
A. Observation A. ____ .‫ اﳌﺮﻗﺒﺔ‬.A
B. Personal relationships B. ____ .‫ اﻟﻌﻼﻗﺎت اﻟﺸﺨﺼﻴﺔ‬.B
C. Rational theories C. ____ .‫ اﻟﻨﻈﺮﻳﺎت اﳌﻨﻄﻘﻴﺔ‬.C
D. A chance to try out and practice D. ____ .‫ ﻓﺮﺻﺔ اﻟﺘﺠﺮﺑﺔ اﻟﺘﺪرﻳﺐ‬.D
8- When I learn: :‫ ﻋﻨﺪﻣﺎ أﺗﻌﻠﻢ‬-8
A. I like to see results from my work A. ____ .‫ أﻓﻀﻞ رؤﻳﺔ ﻧﺘﺎﺋﺞ ﻋﻤﻠﻲ‬.A
B. I like ideas and theories B. ____ .‫ أﻓﻀﻞ اﻷﻓﻜﺎر واﻟﻨﻈﺮﻳﺎت‬.B
C. I take my time before acting C. ____ .‫ آﺧﺬ وﻗﱵ ﻗﺒﻞ أن اﻟﺘﻨﻔﻴﺬ‬.C
D. I feel personally involved in things D. ____ .‫ أﺣﺲ ﺑﺸﺨﺼﻲ ﺧﺎﺋﺾ ﰲ اﻷﺷﻴﺎء‬.D
9- I learn best when: :‫ أﺗﻌﻠﻢ ﺑﺸﻜﻞ أﻓﻀﻞ ﻋﻨﺪﻣﺎ‬-9
A. I rely on my observations A. ____ .‫ أﻋﺘﻤﺪ ﻋﻠﻰ ﻣﺮاﻗﺒﱵ‬.A
B. I rely on my feelings B. ____ .‫ أﻋﺘﻤﺪ ﻋﻠﻰ ﺷﻌﻮري‬.B
C. I can try things out for myself C. ____ .‫ أﺳﺘﻄﻴﻊ ﲡﺮﺑﺔ اﻷﺷﻴﺎء ﺑﻨﻔﺴﻲ‬.C
D. I rely on my ideas D. ____ .‫ أﻋﺘﻤﺪ ﻋﻠﻰ أﻓﻜﺎري‬.D
10- When I am learning: :‫ ﻋﻨﺪﻣﺎ أﻛﻮن ﰲ ﻋﻤﻠﻴﺔ اﻟﺘﻌﻠﻢ‬-10

301 ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 Toward a Constructivist Laboratory Education Model | ‫ﳓﻮ ﳕﻮذج ﺑﻨﺎﺋﻲ ﻟﻠﺘﻌﻠﻴﻢ اﳌﺨﱪي‬

A. I am a reserved person A. ____ .‫ ﻓﺄﻧﺎ ﺷﺨﺺ ﻣﺘﺤﻔﻆ‬.A

B. I am an accepting person B. ____ .‫ ﻓﺄﻧﺎ ﺷﺨﺺ ﻣﺘﺠﺎوب‬.B
C. I am a responsible person C. ____ .‫ ﻓﺄﻧﺎ ﺷﺨﺺ ﻣﺴﺆول‬.C
D. I am a rational person D. ____ .‫ ﻓﺄﻧﺎ ﺷﺨﺺ ﻋﻘﻼﱐ‬.D
11- When I learn: :‫ ﻋﻨﺪﻣﺎ أﺗﻌﻠﻢ‬-11
A. I get involved A. ____ .‫ أﺧﻮض ﻏﻤﺎر اﻟﺘﺠﺮﺑﺔ‬.A
B. I like to observe B. ____ .‫ أﻓﻀﻞ اﳌﺮاﻗﺒﺔ‬.B
C. I evaluate things C. ____ .‫ أﻗﻴﻢ اﻷﺷﻴﺎء‬.C
D. I like to be active D. ____ .ً‫ أﻓﻀﻞ أن أﻛﻮن ﻓﺎﻋﻼ‬.D
12- I learn best when: :‫ أﺗﻌﻠﻢ ﺑﺸﻜﻞ أﻓﻀﻞ ﻋﻨﺪﻣﺎ‬-12
A. I analyze ideas A. ____ .‫ أﺣﻠﻞ اﻷﻓﻜﺎر‬.A
B. I am receptive and open-minded B. ____ .ً‫ أﻛﻮن ﻣﻨﻔﺘﺤﺎً وﻣﺘﻘﺒﻼ‬.B
C. I am careful C. ____ .ً‫ أﻛﻮن ﺣﺬرا‬.C
D. I am practical D. ____ .ً‫ أﻛﻮن ﻋﻤﻠﻴﺎ‬.D

‫ ﻟﺘﺤﺪﻳﺪ ﳕﻂ اﻟﺘﻌﻠﻢ‬Kolb ‫ ﳕﻮذج اﺳﺘﺒﻴﺎن‬14-5‫اﳉﺪول‬

“CE”: Concrete “RO”: Reflective “AC”: Abstract “AE”: Active

Question
Experience Observation Conceptualization Experimentation
1- A. ____ D. ____ B. ____ C. ____
2- C. ____ A. ____ B. ____ D. ____
3- D. ____ C. ____ A. ____ B. ____
4- A. ____ C. ____ D. ____ B. ____
5- A. ____ B. ____ C. ____ D. ____
6- C. ____ A. ____ D. ____ B. ____
7- B. ____ A. ____ C. ____ D. ____
8- D. ____ C. ____ B. ____ A. ____
9- B. ____ A. ____ D. ____ C. ____
10- B. ____ A. ____ D. ____ C. ____
11- A. ____ B. ____ C. ____ D. ____
12- B. ____ C. ____ A. ____ D. ____
Totals ________ ________ ________ ________

Kolb ‫ ﺟﺪول ﲢﺪﻳﺪ ﻗﻴﻢ أﺳﺎﻟﻴﺐ اﻟﺘﻌﻠﻢ اﻷرﺑﻌﺔ اﻷﺳﺎﺳﻴﺔ ﰲ دورة‬15-5‫اﳉﺪول‬

.Kolb ‫ ﻟﺘﺤﺪﻳﺪ ﻗﻴﻤﺔ ﻛﻞ أﺳﻠﻮب ﻣﻦ أﺳﺎﻟﻴﺐ اﻟﺘﻌﻠﻢ اﻷرﺑﻌﺔ ﰲ دورة‬15-5‫ﺑﻌﺪ اﻻﻧﺘﻬﺎء ﻣﻦ اﻟﺘﻘﻴﻴﻢ ﻗﻢ ﺑﺘﺴﺠﻴﻞ ﻗﻴﻢ اﻟﺘﻘﻴﻴﻤﺎت ﰲ اﳉﺪول‬
.64-5‫ﺑﻌﺪ ذﻟﻚ ﻗﻢ ﺑﺘﺪوﻳﻦ ﻧﺘﻴﺠﺔ ﻛﻞ ﳕﻂ ﻋﻠﻰ اﶈﻮر اﳌﻮاﻓﻖ ﻋﻠﻰ اﻟﺸﻜﻞ‬

:‫اﳌﻌﺪل اﻟﱰﻛﻴﱯ ﳝﻜﻦ اﳊﺼﻮل ﻋﻠﻴﻪ ﻣﻦ ﺧﻼل ﻃﺮح ﻛﻞ ﳕﻄﲔ ﻋﻠﻰ ﻧﻔﺲ اﶈﻮر ﻛﻤﺎ ﻳﻠﻲ‬

Y-axis = AC – CE = “AC-CE”

X-axis = AE – RO = “AE-RO”

Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages 302
‫‪25‬‬ ‫اﻟﻔﺼﻞ اﳋﺎﻣﺲ | ‪Chapter 5‬‬

‫ﳕﻂ اﳌﻌﺎﳉﺔ اﻟﺴﺎﺋﺪ )‪ :(Dominant Processing Mode‬اﻟﻘﻴﻤﺔ اﳌﻮﺟﺒﺔ ﻋﻠﻰ اﶈﻮر ‪ Y-axis‬ﺗﺸﲑ إﱃ أن اﳌﻌﺪل أﻛﺜﺮ ”‪،“Abstract‬‬
‫ﰲ ﺣﲔ أن اﻟﻘﻴﻤﺔ اﻟﺴﻠﺒﻴﺔ ﻋﻠﻰ اﶈﻮر ‪ Y-axis‬ﺗﺸﲑ إﱃ أن اﳌﻌﺪل أﻛﺜﺮ ”‪.“Concrete‬‬

‫ﳕﻂ اﻹدراك اﻟﺴﺎﺋﺪ )‪ :(Dominant Perceiving Mode‬اﻟﻘﻴﻤﺔ اﳌﻮﺟﺒﺔ ﻋﻠﻰ اﶈﻮر ‪ X-axis‬ﺗﺸﲑ إﱃ أن اﳌﻌﺪل أﻛﺜﺮ ”‪ ،“Active‬ﰲ‬
‫ﺣﲔ أن اﻟﻘﻴﻤﺔ اﻟﺴﻠﺒﻴﺔ ﻋﻠﻰ اﶈﻮر ‪ X-axis‬ﺗﺸﲑ إﱃ أن اﳌﻌﺪل أﻛﺜﺮ ”‪.“Reflective‬‬

‫ﻣﻦ ﺧﻼل وﺿﻊ ﻧﺘﺎﺋﺞ اﻟﻌﻤﻠﻴﺎت ﻋﻠﻰ اﶈﻮرﻳﻦ ‪ X,Y‬ورﺳﻢ ﻧﻘﻄﺔ اﻟﺘﻘﺎﻃﻊ‪ ،‬ﳝﻜﻦ إﳚﺎد ﳕﻂ اﻟﺘﻌﻠﻢ اﳌﻨﺎﺳﺐ ﻟﻠﻔﺮد‪ .‬ﻫﺬﻩ اﶈﺎور اﻷرﺑﻌﺔ‬
‫اﳌﺴﻤﺎة ﺑ ــ)‪ (Accomodator, Diverger, Converger, Assimilator‬ﲤﺜﻞ أرﺑﻊ أﳕﺎط ﺳﺎﺋﺪة ﻟﻠﺘﻌﻠﻢ‪.‬‬

‫‪Kolb‬‬ ‫اﻟﺸﻜﻞ‪ 46-5‬أﺳﺎﻟﻴﺐ اﻟﺘﻌﻠﻢ اﻷرﺑﻌﺔ ﰲ دورة‬

‫‪Accomodator‬‬ ‫‪Diverger‬‬ ‫‪Assimilator‬‬ ‫‪Converger‬‬

‫‪________%‬‬ ‫‪________%‬‬ ‫‪________%‬‬ ‫‪________%‬‬

‫‪Abstract‬‬ ‫‪Concrete‬‬

‫‪Converger + Assimilator = ________%‬‬ ‫‪Accomodator + Diverger = ________%‬‬

‫‪Active‬‬ ‫‪Reflective‬‬

‫‪Accomodator + Converger = ________%‬‬ ‫‪Diverger + Assimilator = ________%‬‬

‫اﳉﺪول‪ 16-5‬أﳕﺎط اﻟﺘﻌﻠﻢ اﻟﺴﺎﺋﺪة‬

‫‪303‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Toward a Constructivist Laboratory Education Model‬‬ ‫ﳓﻮ ﳕﻮذج ﺑﻨﺎﺋﻲ ﻟﻠﺘﻌﻠﻴﻢ اﳌﺨﱪي |‬

‫اﻟﺸﻜﻞ‪ 47-5‬ﳐﻄﻂ ﺗﻮزع أﳕﺎط اﻟﺘﻌﻠﻢ اﻟﺴﺎﺋﺪة‬

‫ﻧﻘﺎط اﻟﻀﻌﻒ‬ ‫ﻧﻘﺎط اﻟﻘﻮة‬ ‫ﳕﻂ اﻟﺘﻌﻠﻢ اﻟﺴﺎﺋﺪ‬

‫‪Converging‬‬
‫ﻣﻨﺪﻓﻊ ﰲ اﲣﺎذا اﻟﻘﺮارات‪ ،‬ﳛﻞ اﳌﺸﺎﻛﻞ اﳋﺎﻃﺌﺔ‬ ‫ﺣﻞ اﳌﺸﺎﻛﻞ‪ ،‬اﲣﺎذ اﻟﻘﺮارات‪ ،‬اﺳﺘﻨﺘﺎج اﺳﺘﺪﻻﱄ‬
‫ﺗﻄﺒﻴﻘﻲ‪ ،‬ﺗﻘﲏ‬
‫‪Diverging‬‬
‫ﻣﱰدد‪ ،‬ﻗﺪ ﻳﻌﺠﺰ ﻋﻨﺪ اﻟﺒﺪاﺋﻞ‬ ‫ﲣﻴﻠﻲ إﺑﺪاﻋﻲ‪ ،‬اﺳﺘﻴﻌﺎﰊ ﻟﻶﺧﺮﻳﻦ‪ ،‬ﺣﺴﺎس ﻟﻶﺧﺮﻳﻦ‬
‫إﺑﺪاﻋﻲ‪ ،‬ﲨﺎﻋﻲ‬
‫‪Assimilating‬‬
‫ﻣﻨﻬﺞ ﻣﻨﻌﺰل ﺗﺄﻣﻠﻲ‪ ،‬ﻻ ﻳﻮﺟﺪ ﺗﻄﺒﻴﻘﺎت ﻋﻤﻠﻴﺔ‬ ‫اﻟﺘﺨﻄﻴﻂ‪ ،‬ﺧﻠﻖ ﳕﺎذج وﻧﻈﺮﻳﺎت‪ ،‬اﺳﺘﻨﺘﺎج اﺳﺘﻘﺮاﺋﻲ‬
‫ﻧﻈﺮي‪ ،‬ﻣﻨﻄﻘﻲ‬
‫‪Accommodating‬‬
‫ﲢﺴﲔ ﻃﻔﻴﻒ‪ ،‬ﻧﺸﺎﻃﺎت ﻓﺎرﻏﺔ اﳌﻌﲎ‬ ‫إﳒﺎز اﳌﻬﺎم‪ ،‬اﻟﺮﻳﺎدة‪ ،‬ﺧﻮض اﳌﺨﺎﻃﺮة‬
‫ﺣﺪﺳﻲ‪ ،‬ﺑﺪﻳﻬﻲ‬

‫اﳉﺪول‪ 17-5‬ﻧﻘﺎط اﻟﻘﻮة واﻟﻀﻌﻒ ﻷﳕﺎط اﻟﺘﻌﻠﻢ اﻟﺴﺎﺋﺪة‬

‫‪ 1-2-2-8-5‬ﺗﻔﺴﲑ أﺑﻌﺎد ﻋﻤﻠﻴﺔ اﻟﺘﻌﻠﻢ )‪:(Explaining the Learning Process Dimensions‬‬

‫أوﻻً‪ :‬ﻛﻴﻒ ﻧﻘﻮم ﺑﺈدراك اﳌﻌﻠﻮﻣﺎت اﳉﺪﻳﺪة )‪ .(CE-AC‬ﰲ اﻟﺘﺠﺎرب واﳊﺎﻻت اﳉﺪﻳﺪة ﻳﻔﻀﻞ ﺑﻌﺾ اﻟﻨﺎس إﳚﺎد اﻟﻄﺮﻳﻖ ﻣﻦ ﺧﻼل‬
‫اﻹﺣﺴﺎس واﻟﺸﻌﻮر‪ ،‬ﻓﻴﻤﺎ ﻳﻔﻀﻞ آﺧﺮون اﻟﺘﻔﻜﲑ اﳌﻌﻤﻖ‪.‬‬

‫ﺛﺎﻧﻴﺎً‪ :‬ﻛﻴﻒ ﻧﻘﻮم ﲟﻌﺎﳉﺔ اﳌﻌﻠﻮﻣﺎت اﻟﱵ أدرﻛﻨﺎﻫﺎ )‪ .(AE-RO‬ﻫﺬا اﻟﺒﻌﺪ ﻳﺸﲑ إﱃ ﻃﺮﻳﻘﺔ ﻣﻌﺎﳉﺘﻨﺎ وﻧﻘﻠﻨﺎ ﻟﻠﻤﻌﻠﻮﻣﺎت واﳋﱪات اﳉﺪﻳﺪة‪.‬‬

‫‪ 1-1-2-2-8-5‬اﳋﱪات اﳌﻠﻤﻮﺳﺔ ”‪:(Concrete Experience) “CE‬‬

‫ﳚﺪ اﻷﻓﺮاد اﻟﺬﻳﻦ ﻳﺆﻛﺪون ﻋﻠﻰ ﻫﺬا اﻟﻨﻤﻂ ﰲ اﻟﺘﻌﻠﻢ اﻟﻌﻨﺎﺻﺮ اﳊﺴﻴﺔ اﳌﻠﻤﻮﺳﺔ ﰲ اﻟﻌﺎﱂ وﺳﺎﺋﻞ داﻋﻤﺔ ﻹدراك أو ﲢﺼﻴﻞ اﳌﻌﻠﻮﻣﺎت‬
‫اﳉﺪﻳﺪة‪ ،‬ﻓﻬﻢ ﻳﻔﻬﻤﻮن اﻟﻌﺎﱂ ﻣﻦ ﺧﻼل ﺣﻮاﺳﻬﻢ واﻧﻐﻤﺎﺳﻬﻢ ﰲ اﻟﻮاﻗﻌﻴﺔ اﳊﺴﻴﺔ‪ ،‬وﻳﻌﻮﻟﻮن ﺑﺸﻜﻞ ﻛﺒﲑ ﺟﺪاً ﻋﻠﻰ ﺣﺪﺳﻬﻢ ﺑﺪﻻً ﻣﻦ اﻟﺘﺄﱐ‬
‫واﻟﺘﻔﻜﲑ اﳌﻌﻤﻖ واﻟﺘﺤﻠﻴﻞ ﻟﻌﻨﺎﺻﺮ اﳊﺎﻟﺔ‪.‬‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪304‬‬
‫‪25‬‬ ‫اﻟﻔﺼﻞ اﳋﺎﻣﺲ | ‪Chapter 5‬‬

‫ﺣﻴﺚ ﺗﺆﻛﺪ ﻫﺬﻩ اﳌﺮﺣﻠﺔ ﻣﻦ دورة اﻟﺘﻌﻠﻢ ﻋﻠﻰ اﳌﺸﺎرﻛﺔ اﻟﺸﺨﺼﻴﺔ ﻣﻊ اﻟﻨﺎس ﰲ ﻣﻮاﻗﻒ اﳊﻴﺎة اﻟﻴﻮﻣﻴﺔ‪ ،‬وﳝﻴﻞ اﻷﻓﺮاد ﻓﻴﻬﺎ إﱃ اﻻﻋﺘﻤﺎد ﻋﻠﻰ‬
‫ﻣﺸﺎﻋﺮﻫﻢ ﺑﺸﻜﻞ أﻛﱪ ﻣﻦ اﻟﺘﻨﻈﻴﻢ اﳌﻨﻬﺠﻲ ﳌﻌﺎﳉﺔ اﳌﺸﺎﻛﻞ واﳊﺎﻻت‪ ،‬ﻋﻠﻰ ﻗﺪرﻬﺗﻢ ﻋﻠﻰ أن ﻳﻜﻮﻧﻮا ﻣﻨﻔﺘﺤﲔ وﻗﺎﺑﻠﲔ ﻟﻠﺘﻜﻴﻒ ﻣﻊ اﻵﺧﺮﻳﻦ‬
‫ﰲ ﻣﻮﻗﻒ اﻟﺘﻌﻠﻢ‪ .‬إﺣﺮاز ﻣﻌﺪل ٍ‬
‫ﻋﺎل ﻋﻠﻰ ﺑﻌﺪ اﻟﺘﺠﺮﺑﺔ اﳌﻠﻤﻮﺳﺔ ﻳﺸﲑ إﱃ‪:‬‬

‫‪ -‬ﻣﻨﻬﺞ ﻗﺎﺋﻢ ﻋﻠﻰ ﲡﺮﺑﺔ اﻟﺘﻌﻠﻢ اﻟﱵ ﺗﻌﺘﻤﺪ اﻋﺘﻤﺎداً ﻛﺒﲑاً ﻋﻠﻰ اﻷﺣﻜﺎم اﳌﺴﺘﻨﺪة إﱃ اﻟﺸﻌﻮر‪.‬‬
‫‪ -‬ﳝﻴﻞ اﻷﻓﺮاد إﱃ اﻟﺘﻌﺎﻃﻒ واﻟﺘﻮﺟﻪ اﻻﺟﺘﻤﺎﻋﻲ اﻹﳚﺎﰊ ﳓﻮ اﻵﺧﺮﻳﻦ‪.‬‬
‫‪ -‬ﳚﺪ اﻷﻓﺮاد اﻷﺳﺎﻟﻴﺐ اﻟﻨﻈﺮﻳﺔ ﰲ اﻟﺘﻌﻠﻢ ﻏﲑ ﻓﻌﺎﻟﺔ وﻳﻔﻀﻠﻮن ﻣﻌﺎﳉﺔ ﻛﻞ ﺣﺎﻟﺔ ﻛﺤﺎﻟﺔ ﻓﺮﻳﺪة ﻣﻦ ﻧﻮﻋﻬﺎ‪.‬‬
‫‪ -‬ﻳﺘﻌﻠﻢ اﻷﻓﺮاد ﺑﺸﻜﻞ أﻓﻀﻞ ﻣﻦ اﻷﻣﺜﻠﺔ اﶈﺪدة اﻟﱵ ﳝﻜﻦ اﳌﺸﺎرﻛﺔ ﻓﻴﻬﺎ‪.‬‬
‫‪ -‬ﳝﻴﻞ اﻷﻓﺮاد إﱃ ﻣﻨﺎﻗﺸﺔ زﻣﻼﺋﻬﻢ ﺑﺪﻻً ﻣﻦ اﻟﺴﻠﻄﺔ اﻟﱵ ﺗﺘﻤﺜﻞ ﰲ ﻣﻌﻠﻤﻴﻬﻢ أﺛﻨﺎء ﻋﻤﻠﻴﺔ اﻟﺘﻌﻠﻢ‪.‬‬
‫‪ -‬ﻳﺴﺘﻔﻴﺪ اﻷﻓﺮاد ﺑﺸﻜﻞ أﻛﱪ ﻣﻦ اﻟﺘﻐﺬﻳﺔ اﻟﻌﻜﺴﻴﺔ واﳌﻨﺎﻗﺸﺔ ﻣﻊ زﻣﻼﺋﻬﻢ اﳌﺘﻌﻠﻤﲔ‪.‬‬

‫‪ 2-1-2-2-8-5‬ﻔﺎﻫﻴﻢ اﺠﻤﻟﺮدة ”‪:(Abstract Conceptualization) “AC‬‬

‫ﻳﺴﺘﻠﺰم اﻟﺘﻌﻠﻢ ﰲ ﻫﺬﻩ اﳌﺮﺣﻠﺔ اﺳﺘﺨﺪام اﻷﻓﻜﺎر اﳌﻨﻄﻘﻴﺔ ﺑﺪﻻً ﻣﻦ اﳌﺸﺎﻋﺮ ﻟﻔﻬﻢ اﳌﺸﺎﻛﻞ أو اﳊﺎﻻت‪ ،‬وﻛﺬﻟﻚ اﻻﻋﺘﻤﺎد ﻋﻠﻰ اﻟﺘﻔﻜﲑ‬
‫واﻟﺘﺤﻠﻴﻞ واﻟﺘﺨﻄﻴﻂ اﳌﻨﻬﺠﻲ وﺗﻄﻮﻳﺮ اﻟﻨﻈﺮﻳﺎت واﻷﻓﻜﺎر ﳊﻞ اﳌﺸﺎﻛﻞ ﺑﺪﻻً ﻣﻦ اﺳﺘﺨﺪام اﳊﺪس أو اﻹﺣﺴﺎس ﻛﻤﻮﺟﻪ‪ .‬إﺣﺮاز ﻣﻌﺪل ٍ‬
‫ﻋﺎل‬
‫ﻋﻠﻰ ﺑﻌﺪ اﳌﻔﺎﻫﻴﻢ ﻤﻟﺮدة ﻳﺸﲑ إﱃ‪:‬‬

‫‪ -‬ﻣﻨﻬﺞ ﲢﻠﻴﻠﻲ ﺗﺼﻮري ﻟﻠﺘﻌﻠﻢ ﻳﻌﺘﻤﺪ ﺑﺸﻜﻞ ﻛﺒﲑ ﻋﻠﻰ اﻟﺘﻔﻜﲑ اﳌﻨﻄﻘﻲ واﻟﺘﻘﻴﻴﻢ اﻟﻌﻘﻼﱐ‪.‬‬
‫‪ -‬ﳝﻴﻞ اﻷﻓﺮاد إﱃ أن ﻳﻜﻮﻧﻮا ﻣﻮﺟﻬﲔ ﺑﺸﻜﻞ أﻛﱪ ﲡﺎﻩ اﻷﺷﻴﺎء واﻟﺮﻣﻮز وﺑﺸﻜﻞ أﻗﻞ ﳓﻮ اﻷﺷﺨﺎص‪.‬‬
‫‪ -‬ﻌﻠﻢ اﻷﻓﺮاد ﺑﺸﻜﻞ أﻓﻀﻞ ﰲ ﺳﻠﻄﺔ اﻟﺘﻮﺟﻴﻪ )ﻣﻌﻠﻢ(‪ ،‬وﻣﻮاﻗﻒ اﻟﺘﻌﻠﻢ اﺠﻤﻟﺮدة ﻋﻦ اﻟﺸﻌﻮر اﻟﺸﺨﺼﻲ واﻟﱵ ﺗﺸﺪد ﻋﻠﻰ اﻟﺘﺤﻠﻴﻞ‬
‫اﳌﻨﻬﺠﻲ واﻟﻨﻈﺮﻳﺎت‪.‬‬
‫‪ -‬ﻳﺸﻌﺮون ﺑﺎﻹﺣﺒﺎط وﻗﻠﺔ اﻻﺳﺘﻔﺎدة ﻣﻦ ﻣﻨﻬﺠﻴﺎت اﻟﺘﻌﻠﻢ اﻻﻛﺘﺸﺎﰲ اﻟﱵ ﻟﻴﺲ ﳍﺎ ﳕﻂ ﻣﺜﻞ اﻟﺘﻤﺎرﻳﻦ واﶈﺎﻛﺎة‪.‬‬

‫‪ 3-1-2-2-8-5‬اﻟﺘﺠﺮﻳﺐ اﻟﻔﻌﺎل ”‪:(Active Experimentation) “AE‬‬

‫ﻳﻔﻀﻞ ﺑﻌﺾ اﻟﻨﺎس ﰲ ﻣﻌﺎﳉﺔ اﳌﻌﻠﻮﻣﺎت اﳉﺪﻳﺪة اﻻﻧﺘﻘﺎل ﻣﺒﺎﺷﺮة إﱃ اﻟﺘﺠﺮﻳﺐ‪ ،‬ﺣﻴﺚ أن اﻟﺘﻌﻠﻢ ﰲ ﻫﺬﻩ اﳌﺮﺣﻠﺔ ﻳﺄﺧﺬ ﺷﻜﻼً ﻓﻌﺎﻻً ﻧﺸﻴﻄﺎً‪.‬‬
‫ﻛﻤﺎ أن اﳌﻨﻬﺞ اﻟﻌﻤﻠﻲ واﻻﻫﺘﻤﺎم ﻳﻜﻮن ﻣﻨﺼﺐ ﻋﻠﻰ "ﻣﺎ اﻟﺬي ﻳﻌﻤﻞ ﺣﻘﺎً"‪ ،‬ﺑﺪﻻً ﻣﻦ اﳌﺸﺎﻫﺪة ﻟﻠﻤﻮﻗﻒ‪ ،‬واﻟﻘﻴﻤﺔ اﳊﻘﻴﻘﻴﺔ ﻫﻲ ﻣﻦ ﺧﻼل‬
‫إﳒﺎز اﻷﻣﻮر ورؤﻳﺔ ﺘﺎﺋﺠﻬﺎ وﺗﺄﺛﲑاﻬﺗﺎ‪ .‬إﺣﺮاز ﻣﻌﺪل ٍ‬
‫ﻋﺎل ﻋﻠﻰ ﺑﻌﺪ اﻟﺘﺠﺮﻳﺐ اﻟﻔﻌﺎل ﻳﺸﲑ إﱃ‪:‬‬

‫‪ -‬ﺗﻌﻠﻢ ﻣﻮﺟﻪ ﺑﺸﻜﻞ ﻛﺒﲑ إﱃ اﻻﻋﺘﻤﺎد ﻋﻠﻰ اﻟﺘﺠﺮﺑﺔ‪.‬‬

‫‪ -‬اﻷﻓﺮاد ﻳﺘﻌﻠﻤﻮن ﺑﺸﻜﻞ أﻓﻀﻞ ﻋﻨﺪﻣﺎ ﻳﺴﺘﻄﻴﻌﻮن اﻻﳔﺮاط ﰲ أﺷﻴﺎء ﻣﺜﻞ‪ :‬اﳌﺸﺎرﻳﻊ‪ ،‬اﻟﻮﻇﺎﺋﻒ‪ ،‬اﳌﻨﺎﻗﺸﺎت ﺿﻤﻦ ﳎﻤﻮﻋﺔ ﺻﻐﲑة‪،‬‬
‫وﻻ ﻳﺮوق ﳍﻢ اﻟﺘﻌﻠﻢ اﻟﺴﻠﱯ ﻣﺜﻞ‪ :‬اﶈﺎﺿﺮات‪.‬‬
‫‪ -‬اﻷﻓﺮاد ﳝﻴﻠﻮن إﱃ أن ﻳﻜﻮﻧﻮا ﻣﻨﺒﺴﻄﲔ )ﻳﺘﺠﻬﻮن ﺑﺘﻔﻜﲑﻫﻢ اﲡﺎﻫﺎً ﻛﻠﻴّﺎً ﳓﻮ ﻣﺎ ﻫﻮ ﺧﺎرج ﻋﻦ اﻟﺬات(‪.‬‬

‫‪305‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Toward a Constructivist Laboratory Education Model‬‬ ‫ﳓﻮ ﳕﻮذج ﺑﻨﺎﺋﻲ ﻟﻠﺘﻌﻠﻴﻢ اﳌﺨﱪي |‬

‫‪ 4-1-2-2-8-5‬اﳌﻼﺣﻈﺔ اﻟﺘﺄﻣﻠﻴﺔ ”‪:(Reflective Observation) “RO‬‬

‫ﻳﻔﻀﻞ ﺑﻌﺾ اﻟﻨﺎس ﰲ ﻣﻌﺎﳉﺔ اﳌﻌﻠﻮﻣﺎت اﳉﺪﻳﺪة إﱃ اﳌﺮاﻗﺒﺔ اﻟﺪﻗﻴﻘﺔ ﻟﻶﺧﺮﻳﻦ اﻟﺬﻳﻦ ﻳﺸﺎرﻛﻮن ﰲ اﻟﺘﺠﺮﺑﺔ وﻣﻦ ﰒ ﻋﻜﺲ ذﻟﻚ ﰲ ﻣﺎ ﳛﺪث‪.‬‬
‫وﰲ ﻫﺬﻩ اﳌﺮﺣﻠﺔ ﻣﻦ دورة اﻟﺘﻌﻠﻢ ﻳﻔﻬﻢ اﻟﻨﺎس اﻷﻓﻜﺎر واﳌﻮاﻗﻒ ﻣﻦ وﺟﻬﺎت ﻧﻈﺮ ﳐﺘﻠﻔﺔ‪ .‬وﰲ ﻣﻮﻗﻒ اﻟﺘﻌﻠﻢ ﻳﻌﺘﻤﺪ اﻷﻓﺮاد ﻋﻠﻰ اﻟﺼﱪ‪،‬‬
‫اﳌﻮﺿﻮﻋﻴﺔ‪ ،‬اﻷﻓﻜﺎر واﳌﺸﺎﻋﺮ اﳋﺎﺻﺔ ﻟﺘﺸﻜﻴﻞ اﻵراء‪ ،‬اﳊﻜﻢ اﻟﺪﻗﻴﻖ‪ ،‬وﻟﻴﺲ ﺑﺎﻟﻀﺮورة أن ﻳﺘﻢ أﺧﺬ أي إﺟﺮاء‪ .‬إﺣﺮاز ﻣﻌﺪل ٍ‬
‫ﻋﺎل ﻋﻠﻰ ﺑﻌﺪ‬
‫اﳌﻼﺣﻈﺔ اﻟﺘﺄﻣﻠﻴﺔ ﻳﺸﲑ إﱃ‪:‬‬
‫‪ -‬ﻳﻌﺘﻤﺪ اﻷﻓﺮاد ﰲ إدراك وﻣﻌﺎﳉﺔ اﳌﻌﻠﻮﻣﺎت ﻋﻠﻰ اﻟﺘﺄﻣﻞ واﳌﻮﺿﻮﻋﻴﺔ واﳌﻼﺣﻈﺔ اﳌﺘﺄﻧﻴﺔ ﰲ ﲢﻠﻴﻞ ﻣﻮﻗﻒ اﻟﺘﻌﻠﻢ‪.‬‬
‫‪ -‬ﻳﻔﻀﻠﻮن اﳌﻮاﻗﻒ اﻟﺘﻌﻠﻴﻤﻴﺔ ﻣﺜﻞ اﶈﺎﺿﺮات اﻟﱵ ﺗﺘﻴﺢ ﳍﻢ اﻟﻔﺮﺻﺔ ﻟﻠﻘﻴﺎم ﺑﺪور اﳌﻼﺣﻆ اﳌﻮﺿﻮﻋﻲ اﻟﻐﲑ ﻣﺘﺤﻴﺰ‪.‬‬
‫‪ -‬ﻳﺘﺴﻢ اﻷﻓﺮاد ﺑﺎﻻﻧﻄﻮاء‪.‬‬

‫‪ 3-8-5‬وﺿﻊ اﳌﻨﻬﺠﻴﺔ اﻟﺘﺪرﻳﺴﻴﺔ )‪:(Set Teaching Methodology‬‬

‫ﺑﻌﺪ ﲢﺪﻳﺪ أﳕﺎط اﻟﺘﻌﻠﻢ اﳌﺨﺘﻠﻔﺔ ﻟﻠﻄﻼب‪ ،‬ﻳﺘﻢ ﺗﺼﻨﻴﻒ اﻟﻄﻼب وﻓﻘﺎً ﻷرﺑﻌﺔ ﳎﻤﻮﻋﺎت ﺗﻀﻢ ﻛﻞ ﻣﻨﻬﺎ اﻟﻄﻼب ﻣﻦ ﳕﻂ ﺗﻌﻠﻢ ﻣﺸﱰك‪ .‬ﺑﻌﺪ‬
‫ذﻟﻚ ﻳﺘﻢ ﺗﻮزﻳﻊ اﻟﻄﻼب ﻋﻠﻰ ﳎﻤﻮﻋﺎت ﺗﺘﺄﻟﻒ ﻣﻦ ‪ 5~7‬ب ﻓﻘﻂ‪ ،‬ﲝﻴﺚ ﺗﻜﻮن أﳕﺎط اﻟﺘﻌﻠﻢ ﻟﻠﻄﻼب ﰲ ﻧﻔﺲ اﺠﻤﻟﻤﻮﻋﺔ ﳐﺘﻠﻔﺔ‪.‬‬
‫اﳌﻨﻬﺠﻴﺔ اﻟﺘﺪرﻳﺴﻴﺔ واﳌﻮاد اﻟﺘﻌﻠﻴﻤﻴﺔ ﻳﺘﻢ وﺿﻌﻬﺎ وﻓﻘﺎً ﻟﻨﻤﻂ اﻟﺘﻌﻠﻢ اﻟﺴﺎﺋﺪ ﺑﲔ اﻟﻄﻼب‪.‬‬

‫‪ 4-8-5‬أﻫﺪاف اﳉﻠﺴﺎت )‪:(Sessions Goals‬‬

‫إن ﻛﻞ ﺟﻠﺴﺔ ﻣﻦ اﳉﻠﺴﺎت ﺗﻀﻢ ﺟﺎﻧﺒﲔ‪ :‬اﳉﺎﻧﺐ اﻟﻨﻈﺮي – اﳉﺎﻧﺐ اﻟﻌﻤﻠﻲ‪ .‬ﺑﺎﻹﺿﺎﻓﺔ إﱃ اﻷﻫﺪاف اﻟﻌﺎﻣﺔ واﳉﻮﻫﺮﻳﺔ ﻟﻠﻤﻘﺮر‪ ،‬ﻓﺈن ﻋﻠﻰ‬
‫ﳌﻌﻠﻢ وﺿﻊ أﻫﺪاف ﺗﻔﺼﻴﻠﻴﺔ ﻟﻜﻞ ﺟﻠﺴﺔ ﺗﻘﺪم ﻣﻦ ﺧﻼﳍﺎ ﻣﻮﺿﻮﻋﺎت اﳉﻠﺴﺔ واﻟﺘﻄﺒﻴﻘﺎت اﳌﺨﱪﻳﺔ واﻟﻮﻇﺎﺋﻒ واﳌﺸﺎرﻳﻊ اﳋﺎﺻﺔ ﻬﺑﺎ‪ .‬ﻫﺬﻩ‬
‫اﻷﻫﺪاف ﻫﻲ اﳌﺮﺟﻌﻴﺔ اﻟﱵ ﻳﻔﱰض ﲢﺼﻴﻠﻬﺎ ﻣﻊ �ﺎﻳﺔ ﻛﻞ ﺟﻠﺴﺔ‪.‬‬

‫‪ 1-4-8-5‬اﳉﺎﻧﺐ اﻟﻨﻈﺮي )‪:(Classroom Session‬‬

‫ﻛﻤﺎ ذﻛﺮﻧﺎ ﺳﺎﺑﻘﺎً ﻓﺈن اﺳﺘﻴﻌﺎب اﻟﻄﻼب وﺗﺮﻛﻴﺰﻫﻢ ﻳﺒﺪأ ﺑﺎﻟﺘﻼﺷﻲ ﺑﻌﺪ ‪ 10~15‬دﻗﻴﻘﺔ ﻣﻦ زﻣﻦ اﶈﺎﺿﺮة اﻟﻨﻈﺮﻳﺔ‪ ،‬ﻟﺬﻟﻚ ﻓﺈﻧﻪ ﻣﻦ اﳌﻬﻢ ﺗﻘﺴﻴﻢ‬
‫اﶈﺎﺿﺮة اﻟﱵ ﲤﺘﺪ ﻋﻠﻰ ﻣﺪى ﺳﺎﻋﺔ وﻧﺼﻒ أو ﺳﺎﻋﺘﲔ إﱃ ﻓﻘﺮات ﺟﺰﺋﻴﺔ ﻻ ﺗﺘﺠﺎوز ﻛﻞ ﻣﻨﻬﺎ اﻟﻌﺸﺮ دﻗﺎﺋﻖ‪ ،‬وﺧﻼل ﻫﺬﻩ اﻟﻔﻮاﺻﻞ ﻳﻘﻮم‬
‫اﳌﻌﻠﻢ ﺑﺈﺛﺎرة ﺣﻔﻴﻈﺔ اﻟﻄﻼب وﺗﻨﺒﻴﻬﻬﻢ ﻣﻦ ﺧﻼل ﻃﺮح ﺗﺴﺎؤل ﺗﻔﺎﻋﻠﻲ ﺑﺎﺳﺘﺨﺪام أدوات اﻟﺘﺼﻮﻳﺖ اﻹﻟﻜﱰوﱐ ‪) ARS‬إن ﺗﻮﻓﺮت( وﻣﻦ ﰒ‬
‫ﺮض اﻟﻨﺘﺎﺋﺞ وﻣﻨﺎﻗﺸﺘﻬﺎ وﺗﻮﺿﻴﺢ أﺳﺒﺎﻬﺑﺎ إن ﻟﺰم اﻷﻣﺮ‪.‬‬

‫ﰲ ﺣﺎل وﺟﻮد أﻓﻜﺎر ﻧﻈﺮﻳﺔ ﲢﺘﺎج إﱃ ﺗﻮﺿﻴﺢ ﻋﻤﻠﻲ ﺗﻄﺒﻴﻘﻲ‪ ،‬ﻓﺈﻧﻪ ﳝﻜﻦ اﺳﺘﺨﺪام اﳌﺨﱪ ﻋﻦ ﺑﻌﺪ )‪ (Remote Lab‬ﺿﻤﻦ اﳊﺼﺔ اﻟﻨﻈﺮﻳﺔ‬
‫ﻟﺘﻄﺒﻴﻖ اﻟﻔﻜﺮة وﺗﻮﺿﻴﺢ اﻟﻨﺘﺎﺋﺞ )ﻣﺜﻼً‪ :‬دراﺳﺔ اﺳﺘﻘﺮار ﻧﻈﺎم ﲢﻜﻢ ﻣﻦ ﺧﻼل ﻣﻌﺎﻳﺮة ﻣﺘﺤﻜﻢ ‪ PID‬ﻋﻠﻰ ﲡﺮﺑﺔ ﳏﺮك ﺗﻴﺎر ﻣﺴﺘﻤﺮ(‪.‬‬

‫ﺑﻌﺪ اﻧﺘﻬﺎء ﻛﻞ ﳏﺎﺿﺮة ﻧﻈﺮﻳﺔ ﻓﺈﻧﻪ ﻳﻄﻠﺐ ﻣﻦ اﻟﻄﻼب ﺗﻘﻴﻴﻢ ﻣﻮﺿﻮع اﶈﺎﺿﺮة وﻓﻖ ﳕﻮذج ﺗﻘﻴﻴﻢ ﻣﻌﺪ ﻣﺴﺒﻘﺎً ﻣﻦ ﻗﺒﻞ اﳌﻌﻠﻢ‪ ،‬ﻛﻤﺎ ﻳﻘﻮم اﳌﻌﻠﻢ‬
‫ﺑﺘﻘﻴﻴﻢ أداء اﻟﻄﻼب وﻓﻘﺎً ﻟﻨﺘﺎﺋﺞ اﻟﺘﺼﻮﻳﺖ اﻟﺬي ﻳﺘﻢ إﺟﺮاءﻩ ﲝﻴﺚ ﻳﺘﻢ ﺗﻼﰲ اﻟﻨﻘﺎط اﳌﺒﻬﻤﺔ ﻋﻨﺪ اﻟﻄﻼب‪.‬‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪306‬‬
‫‪25‬‬ ‫اﻟﻔﺼﻞ اﳋﺎﻣﺲ | ‪Chapter 5‬‬

‫‪ 2-4-8-5‬اﳉﺎﻧﺐ اﳌﺨﱪي اﻟﻌﻤﻠﻲ )‪:(Laboratory Sessions‬‬

‫ﺑﻨﺎءً ﻋﻠﻰ اﻟﻨﺘﺎﺋﺞ اﳌﺘﻌﻠﻘﺔ ﺑﺎﳉﻠﺴﺎت اﳌﺨﱪﻳﺔ ﰲ ﻫﺬا اﻟﻔﺼﻞ‪ ،‬ووﻓﻘﺎً ﻟﻨﻤﻮذج اﻟﺘﻌﻠﻴﻢ اﳌﺨﱪي اﳌﻘﱰح‪ ،‬ﻓﺈﻧﻪ ﻻﺑﺪ ﻣﻦ ﺗﻘﺴﻴﻢ اﳉﻠﺴﺎت اﳌﺨﱪﻳﺔ‬
‫إﱃ ﺛﻼث أﻗﺴﺎم‪:‬‬

‫‪ 1-2-4-8-5‬اﳌﺨﺘﱪ اﻟﺘﺤﻀﲑي )‪:(Pre-Lab‬‬

‫ﻗﺒﻞ اﻟﺒﺪء ﺑﺎﳌﺨﱪ اﻟﺘﺤﻀﲑي ﻓﺈﻧﻪ ﻻﺑﺪ ﻣﻦ ﲢﺪﻳﺪ أﻫﺪاف اﳌﺨﺘﱪ‪ ،‬واﻟﺘﺠﺎرب اﻟﱵ ﳚﺐ اﻟﻌﻤﻞ ﻋﻠﻴﻬﺎ‪ ،‬واﻟﻨﺘﺎﺋﺞ اﻟﱵ ﻳﺮاد اﻟﻮﺻﻮل إﻟﻴﻬﺎ‪.‬‬
‫ﻳﺘﻤﺜﻞ اﳌﺨﺘﱪ اﻟﺘﺤﻀﲑي ﺑﺎﺳﺘﺨﺪام ﺑﺮاﻣﺞ اﶈﺎﻛﺎة ﻟﺘﺤﻠﻴﻞ ﺳﻠﻮك اﻷﻧﻈﻤﺔ واﻟﺘﻄﺒﻴﻘﺎت‪ ،‬أو ﻟﺘﺸﻐﻴﻞ اﻟﺘﺠﺎرب اﳌﻔﱰض اﻟﻌﻤﻞ ﻋﻠﻴﻬﺎ ﰲ ﺟﻠﺴﺔ‬
‫اﳌﺨﺘﱪ اﻟﺮﺋﻴﺴﻴﺔ‪ ،‬وﻻ ﻳﺸﱰك ﻓﻴﻪ ﺣﻀﻮر اﳌﻌﻠﻢ وإﳕﺎ ﺗﺘﻢ اﻟﺘﻐﺬﻳﺔ اﻟﻌﻜﺴﻴﺔ ‪Formative Assessment-Task-level ) FA-TLE‬‬

‫‪Evaluation‬ﰲ ﻫﺬا اﳌﺨﺘﱪ ﻋﻠﻰ ﻣﺴﺘﻮى اﻹﺟﺮاء إﻣﺎ ﻋﻦ ﻃﺮﻳﻖ اﻟﺰﻣﻼء ﻣﻦ ﻧﻔﺲ اﺠﻤﻟﻤﻮﻋﺔ )‪ (Peers Assessment‬أو ﻣﻦ اﳌﺼﺎدر‬
‫اﳌﺘﻮﻓﺮة ﻋﻠﻰ اﻟﺸﺒﻜﺔ )…‪.(Books, Articles, etc‬‬

‫‪ 2-2-4-8-5‬اﳌﺨﺘﱪ اﻟﺘﻄﺒﻴﻘﻲ )‪:(Main-Lab‬‬

‫ﺟﻠﺴﺔ اﳌﺨﺘﱪ اﻟﺮﺋﻴﺴﻴﺔ ﺗﺄﰐ ﻻﺣﻘﺎً ﻛﺠﻠﺴﺔ ﻋﻤﻠﻴﺔ ﺗﻄﺒﻴﻘﻴﺔ ﻳﻌﻤﻞ ﻓﻴﻬﺎ اﻟﻄﻼب ﻋﻠﻰ ﺗﻄﺒﻴﻖ اﻷﺳﺲ اﻟﻨﻈﺮﻳﺔ واﻟﻨﻤﺎذج اﻟﺘﺤﻠﻴﻠﻴﺔ ﻋﻤﻠﻴﺎً؛‬
‫ﻟﻠﻮﺻﻮل إﱃ ﻧﺘﺎﺋﺞ ﺣﻘﻴﻘﻴﺔ ﻳﺘﻢ ﻣﻄﺎﺑﻘﺘﻬﺎ ﻣﻊ اﻟﻨﺘﺎﺋﺞ اﻟﺘﺤﻠﻴﻠﻴﺔ وﻧﺘﺎﺋﺞ اﶈﺎﻛﺎة‪ .‬ﺗﺘﻢ اﻟﺘﻐﺬﻳﺔ اﻟﻌﻜﺴﻴﺔ ﰲ ﻫﺬا اﳌﺨﺘﱪ ﻋﻦ ﻃﺮﻳﻖ اﳌﻌﻠﻢ أو‬
‫اﻟﺰﻣﻼء أو اﳌﺼﺎدر اﳌﺘﻮﻓﺮة‪.‬‬

‫‪ 3-2-4-8-5‬اﳌﺨﺘﱪ اﻟﺘﺪﻋﻴﻤﻲ )‪:(Post-Lab‬‬

‫ﻳﺄﰐ ﻫﺬا اﳌﺨﺘﱪ )‪ (Remote Lab‬ﻻﺣﻘﺎً ﺑﻌﺪ ﺟﻠﺴﺔ اﳌﺨﺘﱪ اﻟﺮﺋﻴﺴﻲ ﻛﻤﺪﻋﻢ ﻟﻠﻤﺨﺘﱪ اﻟﺘﻄﺒﻴﻘﻲ‪ ،‬ﺣﻴﺚ إﻧﻪ ﰲ ﺑﻌﺾ اﻷﺣﻴﺎن ﻻ ﺗﺘﻮﻓﺮ‬
‫اﻟﻔﺮﺻﺔ ﻟﻜﻞ ﻃﺎﻟﺐ ﻋﻠﻰ ﺣﺪى ﺑﺘﺸﻐﻴﻞ اﻟﺘﺠﺮﺑﺔ اﻟﻌﻤﻠﻴﺔ أو ﺗﻄﺒﻴﻖ اﻟﻨﺘﺎﺋﺞ ﲨﻴﻌﻬﺎ وذﻟﻚ ﶈﺪودﻳﺔ وﻗﺖ اﳌﺨﺘﱪ أو ﻟﻮﺟﻮد ﻋﺪد ﻛﺒﲑ ﻣﻦ‬
‫اﻟﻄﻼب وﻋﺪد ﻗﻠﻴﻞ ﻣﻦ اﻟﺘﺠﺎرب‪ ،‬وﺑﺎﻟﺘﺎﱄ ﻣﻦ ﺧﻼل اﳌﺨﺘﱪ ﻋﻦ ﺑﻌﺪ ﳝﻜﻦ ﻟﻠﻄﺎﻟﺐ أن ﳛﺪد وﻗﺘﺎً ﻟﻠﺪﺧﻮل إﱃ اﳌﺨﺘﱪ ﻋﻦ ﺑﻌﺪ وﺗﺸﻐﻴﻞ‬
‫اﻟﺘﺠﺮﺑﺔ وﺗﻄﺒﻴﻖ اﻟﻨﺘﺎﺋﺞ‪ .‬ﻛﻤﺎ ﳝﻜﻦ أن ﺗﻜﻮن اﳉﻠﺴﺔ اﻟﻼﺣﻘﺔ ﰲ ﺑﻌﺾ اﳊﺎﻻت ﺗﺘﻤﺜﻞ ﺑﺘﺴﺠﻴﻞ ﻣﺮﺋﻲ )‪ (Video materials‬ﻟﻠﺠﻠﺴﺔ‬
‫اﻟﻨﻈﺮﻳﺔ أو اﳉﻠﺴﺔ اﻟﻌﻤﻠﻴﺔ ﻳﻘﻮم اﻟﻄﺎﻟﺐ ﲟﺮاﺟﻌﺘﻬﺎ ﰲ أي وﻗﺖ ﺗﺜﺒﻴﺘﺎً ﻟﻠﻤﻌﻠﻮﻣﺎت‪.‬‬

‫‪ 5-8-5‬ﻧﺘﺎﺋﺞ اﳉﻠﺴﺎت )‪:(Sessions Outcomes‬‬

‫ﻳﺘﻢ ﻣﻼﺣﻈﺔ أداء اﻟﻄﻼب وﺗﻘﻴﻴﻤﻬﻢ وﻓﻘﺎً ﻟ ــ‪ :‬ﺟﻠﺴﺎت اﳊﺼﺔ اﻟﻨﻈﺮﻳﺔ‪ ،‬اﳌﺨﺘﱪ‪ ،‬اﻟﻮﻇﺎﺋﻒ‪ ،‬اﻻﺧﺘﺒﺎرات‪ ،‬اﻟﻨﺘﺎﺋﺞ‪ ،‬اﻟﺘﻔﺎﻋﻞ‪ ....،‬وﻳﺘﻢ ﻣﻘﺎرﻧﺔ‬
‫أﻫﺪاف اﳉﻠﺴﺔ )‪ (Session Goals‬ﻣﻊ اﻟﻨﺘﺎﺋﺞ اﶈﺼﻠﺔ )‪ (Observable Outcomes‬وﻳﺘﻢ ﺗﻘﺪﱘ ﺗﻐﺬﻳﺔ ﻋﻜﺴﻴﺔ ﺑﻨﺎﺋﻴﺔ ﻋﻠﻰ ﻣﺴﺘﻮى‬
‫اﻟﻌﻤﻠﻴﺔ )اﻟﻨﻈﺮي ‪ -‬اﻟﻌﻤﻠﻲ( ﻛﻜﻞ )‪ (Process-level Evaluation‬ﻳﺘﻢ ﻓﻴﻬﺎ ﻣﻘﺎرﻧﺔ اﻷداء واﻟﻔﻬﻢ ﻟﻠﻄﻼب ﻣﻊ اﻷﻫﺪاف اﻟﺮﺋﻴﺴﻴﺔ‬
‫ﻟﻠﺠﻠﺴﺔ اﳌﻘﺮرة ﲝﻴﺚ ﻳﺘﻢ ﻣﻌﺎﳉﺔ اﳌﺸﺎﻛﻞ وﻣﻨﺎﻗﺸﺘﻬﺎ ﰲ اﳉﻠﺴﺔ اﻟﻼﺣﻘﺔ‪ ،‬وﻫﻜﺬا‪...‬‬

‫‪ 6-8-5‬دور اﻟﻄﺎﻟﺐ )‪:(Student Role‬‬

‫ﲟﺎ أن ﳕﻮذج اﻟﺘﻌﻠﻢ ﻗﺎﺋﻢ ﻋﻠﻰ ﻣﺮﻛﺰﻳﺔ اﻟﻄﺎﻟﺐ ﰲ اﻟﺘﻌﻠﻢ‪ ،‬ﻓﺈن ﻟﻠﻄﺎﻟﺐ ﻣﺴﺆوﻟﻴﺔ ودور ﰲ ﻛﻞ ﻣﺮاﺣﻠﺔ ﻣﻦ ﻣﺮاﺣﻞ اﻟﻌﻤﻠﻴﺔ )‪Student-self-‬‬

‫‪.(Assessment; Directing; Evaluating; Monitoring; Observing; Regulating‬‬

‫‪307‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Toward a Constructivist Laboratory Education Model‬‬ ‫ﳓﻮ ﳕﻮذج ﺑﻨﺎﺋﻲ ﻟﻠﺘﻌﻠﻴﻢ اﳌﺨﱪي |‬

‫‪ 7-8-5‬ﻣﺸﺮوع اﳌﻘﺮر )‪:(Course Project‬‬

‫إﻧﻪ ﻣﻦ اﻟﻀﺮوري ﺟﺪاً ﺗﻮﻇﻴﻒ اﳌﻌﺮﻓﺔ واﳋﱪة اﶈﺼﻠﺔ ﻣﻦ ﻗﺒﻞ اﻟﻄﻼب ﰲ ﻣﺸﺮوع ﻋﻤﻠﻲ ﺗﻄﺒﻴﻘﻲ ﻣﺮﺗﺒﻂ ﲟﺸﻜﻠﺔ )اﻟﺘﻌﻠﻢ اﻟﻘﺎﺋﻢ ﻋﻠﻰ ﺣﻞ‬
‫اﳌﺸﻜﻼت ‪ (PrBL‬أو ﻣﺸﺮوع )اﻟﺘﻌﻠﻢ اﻟﻘﺎﺋﻢ ﻋﻠﻰ اﳌﺸﺎرﻳﻊ ‪ (PjBL‬ﺣﻘﻴﻘﻴﲔ )‪(Industry‬؛ ﻫﺬا اﳌﺸﺮوع ﳚﺐ أن ﻳﻜﻮن ﻣﻮﺟﻬﺎً ﺑﺎﻟﻜﺎﻣﻞ‬
‫ﻣﻦ ﻗﺒﻞ اﻟﻄﻼب )‪ (Self-Directed‬ﺿﻤﻦ ﳎﻤﻮﻋﺎت ﻋﻤﻞ )‪ (Team-based‬ﻣﺆﻟﻔﺔ ﻣﻦ ﲬﺲ ﻃﻼب ﻋﻠﻰ أﻛﺜﺮ ﺣﺪ‪ ،‬إن اﳍﺪف ﻣﻦ‬
‫ﻫﺬا اﳌﺸﺮوع ﺗﻌﺮض اﻟﻄﻼب ﳌﺸﺎرﻳﻊ أﻗﺮب ﻣﺎ ﺗﻜﻮن إﱃ اﳌﺸﺎرﻳﻊ اﳊﻘﻴﻘﻴﺔ اﻟﱵ ﳝﻜﻦ أن ﻳﺘﻌﺮﺿﻮا ﳍﺎ ﺑﻌﺪ ﲣﺮﺟﻬﻢ‪.‬‬

‫‪ 8-8-5‬ﺣﺴﺎب اﶈﺼﻠﺔ اﻟﻌﺎﻣﺔ )‪:(Calculating the Activities Average‬‬

‫ﳑﺎ ﻻ ﺷﻚ ﻓﻴﻪ أن اﻟﺴﺒﺐ ﰲ ﺿﻌﻒ ﻧﺘﺎﺋﺞ اﳌﺨﺎﺑﺮ اﻟﻌﻤﻠﻴﺔ ﰲ ﺟﺎﻣﻌﺎﺗﻨﺎ ﻟﻴﺲ ﰲ ﻗﻠﺔ اﻷدوات أو اﻟﻮﺳﺎﺋﻞ‪ ،‬وإﳕﺎ ﰲ اﳌﻨﻬﺠﻴﺔ اﳌﺘﺒﻌﺔ واﻟﱵ‬
‫ﺗﺪﻓﻊ اﻟﻄﻼب إﱃ إﳘﺎل اﳉﺎﻧﺐ اﻟﻌﻤﻠﻲ ذو اﳊﺼﻴﻠﺔ اﻷﻗﻞ ﺑﺎﻟﻌﻼﻣﺎت )‪ (30%‬واﻟﱰﻛﻴﺰ ﻋﻠﻰ ﲢﺼﻴﻞ اﻟﻌﻼﻣﺎت ﻣﻦ اﳉﺎﻧﺐ اﻟﻨﻈﺮي‬
‫)‪ .(70%‬إن ﺗﻄﺒﻴﻖ ﻣﺜﻞ ﻫﺬا اﻟﻨﻤﻮذج اﻟﺘﻌﻠﻴﻤﻲ اﳌﺼﻤﻢ ﰲ ﻫﺬا اﻟﻔﺼﻞ ﻳﻌﺘﻤﺪ ﺑﺸﻜﻞ ﻛﺒﲑ ﻋﻠﻰ وﺟﻮد ﺣﺎﻓﺰ ﻛﺒﲑ ﻟﺪى اﻟﻄﻼب ﻟﻠﺒﺤﺚ ﻋﻦ‬
‫اﳌﻌﺮف وﺗﻄﻮﻳﺮ اﳌﻬﺎرات‪ ،‬وﻟﺬﻟﻚ ﻻﺑﺪ ﻣﻦ اﻗﱰاح ﻣﻌﺎدﻟﺔ ﺟﺪﻳﺪة ﺗﻌﻴﺪ اﻟﺘﻮزان إﱃ ﳎﺮاﻩ وﲢﻔﺰ اﻟﻄﻼب ﻋﻠﻰ اﻻﻫﺘﻤﺎم ﺑﺎﳉﺎﻧﺐ اﻟﻌﻤﻠﻲ‬
‫واﻟﺒﺤﺜﻲ‪.‬إن اﳉﺎﻣﻌﺎت اﻷورﺑﻴﺔ واﻷﻣﺮﻳﻜﻴﺔ ﺗﻌﻄﻲ اﳊﺼﺔ اﻷﻛﱪ ﻣﻦ اﻟﻌﻼﻣﺎت واﻟﻨﺼﻴﺐ اﻷﻛﱪ ﻣﻦ اﻟﺴﺎﻋﺎت ﻟﻠﺠﺎﻧﺐ اﻟﻌﻤﻠﻲ واﳌﺨﱪي؛‬
‫ﺑﻨﺎءً ﻋﻠﻴﻪ ﻧﻘﱰح اﳌﻌﺎدﻟﺔ اﻟﺘﺎﻟﻴﺔ ﻟﻠﺘﻘﻴﻴﻢ‪:‬‬
‫𝑛‬ ‫𝑛‬ ‫𝑛‬
‫𝑖𝒛𝒊𝒖𝑸‬ ‫𝑖𝒕𝒏𝒆𝒎𝒏𝒈𝒊𝒔𝒔𝑨‬ ‫𝑖𝒏𝒐𝒊𝒕𝒄𝒂𝒓𝒆𝒕𝒏𝑰‬
‫� � = 𝒆𝒅𝒂𝒓𝑮‬ ‫� � ‪� × 0.2 +‬‬ ‫� � ‪� × 0.1 +‬‬ ‫‪� × 0.1‬‬
‫𝑛‬ ‫𝑛‬ ‫𝑛‬
‫‪𝑖=1‬‬ ‫‪𝑖=1‬‬ ‫‪𝑖=1‬‬

‫)‪+ (𝑪𝒐𝒖𝒓𝒔𝒆 𝑬𝒙𝒂𝒎 × 0.4) + (𝑪𝒐𝒖𝒓𝒔𝒆 𝑷𝒓𝒐𝒋𝒆𝒄𝒕 × 0.2‬‬

‫‪ 9-8-5‬رﺑﻂ اﻟﻨﻤﻮذج اﳉﺪﻳﺪ ﺑﻨﻤﻮذج دورة ‪:(Mapping the new Model to Kolb’s Cycle) Kolb‬‬
‫إن اﻟﻘﺮاءة ﻣﻦ دﻟﻴﻞ اﻟﺘﺠﺎرب )‪ (Manual‬ﳝﺜﻞ اﻟﺒﻌﺪ ”‪ “AC‬ﰲ دورة ‪ ،Kolb‬وﳝﺜﻞ اﻟﻨﻤﻂ ”‪ “R/W‬ﰲ أﳕﺎط اﻟﺘﻌﻠﻢ ‪ .VARK‬ﻛﻤﺎ‬
‫أن اﺳﺘﺨﺪام اﶈﺎﻛﺎة )‪ (Virtual‬ﳝﺜﻞ اﻟﺒﻌﺪﻳﻦ ”‪ “AE-RO‬ﰲ دورة ‪ ،Kolb‬وﳝﺜﻞ اﻟﻨﻤﻄﲔ ”‪ “V-K‬ﰲ أﳕﺎط اﻟﺘﻌﻠﻢ ‪.VARK‬‬
‫وﺑﺎﻟﻨﺘﻴﺠﺔ ﻓﺈن اﳌﺨﺘﱪ اﻻﻓﱰاﺿﻲ ﻫﻮ ﳏﺼﻠﺔ ”‪ “AC-AE-RO‬ﰲ دورة ‪ ،Kolb‬وﻫﻮ ﺑﺎﳌﺜﻞ ﳏﺼﻠﺔ أﳕﺎط اﻟﺘﻌﻠﻢ ”‪ “R-V-K‬ﺑﺎﻟﻨﺴﺒﺔ‬
‫ﻟﻨﻤﻮذج ‪ .VARK‬ﺑﺎﳌﺜﻞ ﳝﻜﻦ اﺳﺘﺨﻼص ﻣﻠﺨﺺ اﻟﻌﻼﻗﺎت اﳌﺒﻴﻨﺔ ﰲ اﳉﺪول‪ 18-5‬ﺑﲔ ﻣﺮاﺣﻞ دورة اﻟﺘﻌﻠﻢ ﻟـ‪ Kolb‬وأﳕﺎط اﻟﺘﻌﻠﻢ اﻷرﺑﻌﺔ‬
‫‪ VARK‬ﻣﻊ ﻛﻞ ﻣﺮﺣﻠﺔ ﻣﻦ ﻣﺮاﺣﻞ اﻟﻨﻤﻮذج اﻟﺒﻨﺎﺋﻲ اﳌﺼﻤﻢ ﰲ ﻫﺬا اﻟﻔﺼﻞ‪.‬‬

‫‪Task‬‬ ‫‪Kolb’s Cycle‬‬ ‫‪VARK-LS‬‬

‫)‪Classroom + ARS(RO‬‬ ‫‪AC-RO‬‬ ‫‪A-R/W‬‬
‫‪Remote-Lab in Classroom‬‬ ‫‪CE-AC‬‬ ‫‪V‬‬
‫)‪Pre-Lab Session (Virtual + Manual‬‬ ‫‪RO-AE-AC‬‬ ‫‪V-R/W‬‬
‫‪Pre-Lab Test‬‬ ‫‪CE-RO-AC‬‬ ‫‪R/W‬‬
‫)‪Main-Lab Session (Hands-on‬‬ ‫‪AE-RO‬‬ ‫‪V-K-R/W‬‬
‫‪Post-Lab Test‬‬ ‫‪RO-AC‬‬ ‫‪R/W‬‬
‫‪2‬‬
‫)‪Post-Lab (Remote/Virtual‬‬ ‫‪RO-AC-AE‬‬ ‫‪V-K‬‬
‫‪Video Materials‬‬ ‫‪AC-RO‬‬ ‫‪V-A‬‬

‫اﳉﺪول‪ 18-5‬اﻟﺮﺑﻂ ﺑﲔ ﻣﺮاﺣﻞ دورة اﻟﺘﻌﻠﻢ ﻟـ‪ Kolb‬وأﳕﺎط اﻟﺘﻌﻠﻢ ﻟـ‪ VARK‬واﻟﻨﻤﻮذج اﳌﻘﱰح ﰲ ﻫﺬا اﻟﻔﺼﻞ‬
‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪308‬‬
‫‪25‬‬ ‫اﻟﻔﺼﻞ اﳋﺎﻣﺲ | ‪Chapter 5‬‬

‫إن ﻣﻌﺪل اﻻﺣﺘﻔﺎظ ﺑﺎﳌﻌﻠﻮﻣﺎت ﻳﺮﺗﺒﻂ ﲟﺮاﺣﻞ دورة ‪ ،Kolb‬وإن اﻟﺘﻌﻠﻴﻢ اﻟﻔﻌﺎل اﻟﺬي ﻳﻨﺘﺞ ﻋﻨﻪ اﳌﻌﺪل اﻷﻋﻠﻰ ﻟﻼﺣﺘﻔﺎظ ﺑﺎﳌﻌﻠﻮﻣﺎت ﳛﺼﻞ‬
‫ﻋﻨﺪﻣﺎ ﺗﺘﺤﻘﻖ دورة ‪ Kolb‬ﲟﺮاﺣﻠﻬﺎ اﻷرﺑﻌﺔ ﻛﻤﺎ ﻫﻮ ﻣﺒﲔ ﰲ اﳉﺪول‪.19-5‬‬

‫ﻣﻌﺪل اﻻﺣﺘﻔﺎظ ﺑﺎﳌﻌﻠﻮﻣﺎت‬ ‫أﳕﺎط اﻟﺘﻌﻠﻢ ﰲ دورة ‪Kolb‬‬

‫‪20%‬‬ ‫‪AC‬‬
‫‪50%‬‬ ‫‪AC-RO‬‬
‫‪70%‬‬ ‫‪AC-RO-CE‬‬
‫‪90%‬‬ ‫‪AC-RO-CE-AE‬‬

‫اﳉﺪول‪ 19-5‬اﻟﻌﻼﻗﺔ ﺑﲔ ﻣﻌﺪل اﻻﺣﺘﻔﺎظ ﺑﺎﳌﻌﻠﻮﻣﺎت وﻣﺮاﺣﻞ دورة ‪Kolb‬‬

‫اﻟﺨﻼﺻﺔ )‪:(Conclusion‬‬ ‫‪9-5‬‬

‫ﻗﺪم ﻫﺬا اﻟﻔﺼﻞ ﲝﺜﺎً ﻣﻔﺼﻼً ﻋﻦ دراﺳﺔ ﺗﻌﻠﻴﻤﻴﺔ ﺗﺮﺑﻮﻳﺔ ﺗﺘﻌﻠﻖ ﺑﺎﻟﺘﻌﻠﻴﻢ اﳌﺨﱪي‪ ،‬اﺳﺘﺨﺪم ﻓﻴﻬﺎ ﻣﻨﻬﺠﻴﺎت وﻧﻈﺮﻳﺎت ﻫﻨﺪﺳﺔ اﻟﺘﺤﻜﻢ ﰲ‬
‫ﳕﺬﺟﺔ اﻟﻌﻤﻠﻴﺔ اﻟﺘﻌﻠﻴﻤﻴﺔ‪ ،‬وﻫﻮ ﳝﺜﻞ أول ﳕﻮذج ﺗﺮﺑﻮي ﺗﻄﺒﻴﻘﻲ ﻳﻌﺘﻤﺪ ﺑﺸﻜﻞ ﻛﺎﻣﻞ ﻋﻠﻰ ﻧﻈﺮﻳﺔ ‪ Kolb‬ﰲ اﻟﺘﻌﻠﻢ اﻟﺘﺠﺮﻳﱯ ﺟﻨﺒﺎً إﱃ ﺟﻨﺐ ﻣﻊ‬
‫اﻟﺘﺤﻠﻴﻞ اﻟﺘﺠﺮﻳﱯ‪ .‬اﳊﺎﻟﺔ ﻃﺒﻘﺖ ﻋﻠﻰ ﳐﺘﱪ اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ‪.‬‬

‫اﻟﺪراﺳﺔ اﻧﻄﻠﻘﺖ ﻣﻦ ﺗﺼﻤﻴﻢ ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ أوﱄ ﻟﱪﳎﺔ اﳌﺘﺤﻜﻤﺎت اﳌﺼﻐﺮة‪ ،‬ﺣﻴﺚ ﺗﻀﻤﻦ ﺗﺼﻤﻴﻢ اﻟﻨﻈﺎم اﻟﺘﻌﻠﻴﻤﻲ اﻷوﱄ ﺗﺼﻤﻴﻤﺎً ﻟﻠﻮﺣﺔ‬
‫ﺗﻄﻮﻳﺮ ﺗﻔﺎﻋﻠﻴﺔ ﻣﻦ ﺧﻼل إﺟﺮاء دراﺳﺔ ﻣﻘﺎرﻧﺔ ﺷﺎﻣﻠﺔ ﻟﻠﻮﺣﺎت اﻟﺘﻄﻮﻳﺮ اﳌﺘﻮﻓﺮة ﲡﺎرﻳﺎً‪ ،‬وﻣﻦ ﻫﺬﻩ اﻟﺪراﺳﺔ ﰎ ﺑﻨﺎء ﻟﻮﺣﺔ اﻟﺘﻄﻮﻳﺮ وﻓﻖ ﻣﻌﺎﻳﲑ‬
‫ﺗﺪف إﱃ زﻳﺎدة ﺗﻔﺎﻋﻞ اﻟﻄﺎﻟﺐ وﻓﺎﺋﺪﺗﻪ ﻣﻦ اﻟﺘﺠﺎرب ﰲ اﳌﺨﺘﱪ اﻟﺘﻄﺒﻴﻘﻲ‪ .‬ﻛﻤﺎ ﺗﻀﻤﻦ ﺑﻨﺎء دﻟﻴﻞ ﺷﺎﻣﻞ ﻟﻠﺘﺠﺎرب ﻳﺴﺘﻨﺪ إﱃ ﻣﻨﻬﺠﻴﺔ اﻟﺘﻌﻠﻢ‬
‫اﻟﺬاﰐ )‪ (Self-Learning‬وﻣﻨﻬﺠﻴﺎت اﻟﺘﻔﺎﻋﻞ ﺑﲔ اﳌﺴﺘﺨﺪم واﳊﺎﺳﺐ‪.‬‬

‫اﻟﺪراﺳﺔ اﻟﺘﻄﺒﻴﻘﻴﺔ ﺗﻀﻤﻨﺖ وﺿﻊ ﳕﻮذﺟﲔ‪ :‬اﻷول ﻳﻌﺎﰿ ﳕﻂ اﳌﺨﺘﱪ‪ ،‬واﻟﺜﺎﱐ ﻳﻌﺎﰿ ﻣﻨﻬﺠﻴﺔ ﻋﻤﻞ اﳌﺨﺘﱪ‪ ،‬وﻗﺪ ﰎ ﺗﻄﺒﻴﻖ اﻟﻨﻤﻮذﺟﲔ ﰲ‬
‫اﳉﻠﺴﺎت اﳌﺨﱪﻳﺔ ﳌﻘﺮر اﻟﺘﺼﻤﻴﻢ ﺑﺎﺳﺘﺨﺪام اﳊﺎﺳﺐ ﻋﻠﻰ ﻣﺪى ﻓﺼﻞ ﻛﺎﻣﻞ ﺑﺪف إﻇﻬﺎر اﳌﺴﺘﻠﺰﻣﺎت اﻟﻀﺮورﻳﺔ ﻟﺪﻳﻨﺎﻣﻴﻜﻴﺔ اﻟﺘﻌﻠﻢ‪ .‬اﻟﻨﻤﻮذج‬
‫ﻃﺒﻖ ﻋﻠﻰ ﻃﻼب اﻟﺴﻨﺔ اﻟﺮاﺑﻌﺔ ﻗﺴﻢ ﻫﻨﺪﺳﺔ اﻟﺘﺤﻜﻢ اﻵﱄ واﻷﲤﺘﺔ‪ ،‬وﻋﻘﺪ ﰲ ﻛﻠﻴﺔ اﳍﻨﺪﺳﺔ اﻟﻜﻬﺮﺑﺎﺋﻴﺔ اﻹﻟﻜﱰوﻧﻴﺔ ﲜﺎﻣﻌﺔ ﺣﻠﺐ ﰲ ﳐﱪ‬
‫اﻟﺘﺤﻜﻢ اﻵﱄ‪.‬‬

‫ﻟﻘﺪ اﻓﱰﺿﻨﺎ ﺟﺪﻻً ﰲ اﻟﺪراﺳﺔ أن ﺿﻌﻒ اﻟﻨﺘﺎﺋﺞ اﻟﺘﻌﻠﻴﻤﻴﺔ ﰲ اﳌﺨﺎﺑﺮ ﻳﻌﻮد إﱃ ﻧﻘﺺ ﺗﻔﻌﻴﻞ اﻟﺒﻌﺪ اﻟﺘﺤﺼﻴﻠﻲ ﻣﻦ ﻧﻈﺮﻳﺔ ‪ Kolb‬ﰲ اﻟﺘﻌﻠﻢ‬
‫اﻟﺘﺠﺮﻳﱯ‪ ،‬ﺣﻴﺚ أن اﻟﻨﻤﻮذج اﻟﺘﺠﺮﻳﱯ وﻧﺘﺎﺋﺞ ﲢﻠﻴﻞ اﻟﺒﻴﺎﻧﺎت اﳋﺎﺻﺔ ﲝﺼﻴﻠﺔ اﻟﺘﻌﻠﻴﻢ اﳌﺨﱪي أﻛﺪت اﻟﻔﺮﺿﻴﺔ اﳌﻄﺮوﺣﺔ اﻷﻣﺮ اﻟﺬي أﻋﻄﻰ‬
‫ﺗﻔﺴﲑاً ﺗﺮﺑﻮﻳﺎً ﻟﺘﻠﻚ اﻟﻨﺘﺎﺋﺞ‪.‬‬

‫ﻧﺘﺎﺋﺞ اﻟﺘﺤﻠﻴﻼت اﻻﺣﺼﺎﺋﻴﺔ أﻇﻬﺮت ﺧﺼﺎﺋﺺ اﻟﻘﻮة ﻟﻠﻨﻤﻮذج ﻣﺘﻤﺜﻼً ﺑﺎﻟﺘﻐﺬﻳﺔ اﻟﻌﻜﺴﻴﺔ اﻟﺒﻨﺎﺋﻴﺔ ﻣﻘﺎﺑﻞ اﻟﻨﻤﺎذج اﻟﻜﻼﺳﻴﻜﻴﺔ اﻟﺘﻘﻠﻴﺪﻳﺔ اﳌﺘﻤﺜﻠﺔ‬
‫ﺑﺎﳊﻠﻘﺔ اﳌﻔﺘﻮﺣﺔ‪ ،‬وﻗﺪ ﻇﻬﺮ أﺛﺮﻩ واﺿﺤﺎً ﻣﻦ ﺧﻼل اﻟﺘﺤﺴﻦ اﻟﻜﺒﲑ ﰲ اﶈﺼﻠﺔ اﻟﺘﻌﻠﻴﻤﻴﺔ ﻟﻠﻤﺠﻤﻮﻋﺔ اﻻﺧﺘﺒﺎرﻳﺔ ﻣﻘﺎرﻧﺔ اﺠﻤﻟﻤﻮﻋﺔ اﻟﻘﻴﺎﺳﻴﺔ‪.‬‬
‫ﻧﺘﺎﺋﺞ اﻟﻌﻤﻠﻴﺔ اﻟﺘﻌﻠﻴﻤﻴﺔ ﰎ ﻗﻴﺎﺳﻬﺎ ﻣﻦ ﺧﻼل اﺧﺘﺒﺎرات ﳐﱪﻳﺔ أﺟﺮﻳﺖ ﻗﺒﻞ وﺑﻌﺪ اﳉﻠﺴﺎت اﳌﺨﱪﻳﺔ‪ ،‬إﺿﺎﻓﺔ إﱃ ﻗﻴﺎﺳﺎت ﻧﻮﻋﻴﺔ ﰎ ﲢﺼﻴﻠﻬﺎ ﻣﻦ‬
‫ﺧﻼل ﻣﺮاﻗﺒﺔ أداء اﻟﻄﻼب أﺛﻨﺎء اﳌﺨﺘﱪ‪.‬‬

‫‪309‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Toward a Constructivist Laboratory Education Model‬‬ ‫ﳓﻮ ﳕﻮذج ﺑﻨﺎﺋﻲ ﻟﻠﺘﻌﻠﻴﻢ اﳌﺨﱪي |‬

‫أﻇﻬﺮت اﻟﻨﺘﺎﺋﺞ أﻳﻀﺎً أن اﻟﻨﻈﺎم اﻟﺘﻌﻠﻴﻤﻲ ﰲ اﳊﻠﻘﺔ اﳌﻐﻠﻘﺔ ﻣﺴﺘﻘﺮ وﺛﺎﺑﺖ‪ ،‬وﳝﻠﻚ ﻣﻨﻬﺠﻴﺔ ﻟﺮﻓﺾ اﻟﻀﺠﻴﺞ اﳌﺘﺄﺻﻞ )ﻣﺜﻞ ﻣﻌﺎﻣﻞ اﻟﻨﺴﻴﺎن(‪،‬‬
‫وﻫﻮ ﻳﺴﺎﻋﺪ ﻋﻠﻰ ﲢﻔﻴﺰ اﻟﻄﻼب ذوي ﻣﻬﺎرات اﻟﺘﻌﻠﻢ اﳌﻨﺨﻔﻀﺔ ورﻓﻊ ﻣﺴﺘﻮاﻫﻢ‪.‬‬

‫ﻛﻤﺎ أﻇﻬﺮ اﻟﺘﺤﻠﻴﻞ اﻟﺘﺠﺮﻳﱯ ﻟﻠﻘﻴﺎﺳﺎت اﻟﻜﻤﻴﺔ ﺑﺄﻧﻪ ﻋﻠﻰ اﻟﺮﻏﻢ ﻣﻦ ﺳﻠﻮك ﻗﺮﻳﺐ ﻧﺴﺒﻴﺎً اء ﻛﻼ اﺠﻤﻟﻤﻮﻋﺘﲔ )اﻟﻘﻴﺎﺳﻴﺔ واﻻﺧﺘﺒﺎرﻳﺔ( ﰲ ﻣﺘﺎﺑﻌﺔ‬
‫اﻟﺪﻟﻴﻞ اﻟﺘﻮﺿﻴﺤﻲ ﻟﻠﺘﺠﺎرب ﺧﻼل ﺟﻠﺴﺎت اﳌﺨﺘﱪ‪ ،‬ﺗﻔﺎوت ﺟﻮﻫﺮي ﻛﺒﲑ ﰲ اﻟﻔﻬﻢ اﻟﺘﺼﻮري‪ .‬ﻋﻼوة ﻋﻠﻰ ذﻟﻚ ﻓﺈﻧﻪ ﻇﻬﺮ ﺟﻠﻴﺎً ﰲ ﻃﻼب‬
‫ﻤﻟﻤﻮﻋﺔ اﻻﺧﺘﺒﺎرﻳﺔ ﺣﺎﻓﺰ ﺟﻮﻫﺮي ﳓﻮ ﺣﻞ ﻣﺸﺎﻛﻞ ﻣﻌﻘﺪة إﺿﺎﻓﻴﺔ وﱂ ﻳﻈﻬﺮ ﰲ ﻃﻼب ﻤﻟﻤﻮﻋﺔ اﻟﺘﻘﻠﻴﺪﻳﺔ‪.‬‬

‫إن اﻟﻨﻤﻮذج اﳌﻄﺮوح ﻳﺘﻀﻤﻦ ﻧﺸﺎﻃﺎت إﺿﺎﻓﻴﺔ ﻣﻊ اﻟﺘﺠﺎرب اﻟﻌﻤﻠﻴﺔ ﻛﺎﻻﺧﺘﺒﺎرات اﻟﱵ ﺗﺴﺒﻖ وﺗﻠﻲ اﳉﻠﺴﺔ اﳌﺨﱪﻳﺔ وﻛﺬﻟﻚ ﺟﻠﺴﺎت اﶈﺎﻛﺎة‬
‫ﺑﺎﺳﺘﺨﺪام اﳊﺎﺳﺐ‪ ،‬وﻫﺬﻩ اﻟﻨﺸﺎﻃﺎت ﻣﺮﺗﺒﻄﺔ ﺑﺪورة ‪ Kolb‬اﻟﱵ ﲢﻘﻖ اﻟﺘﻌﻠﻢ اﻟﺒﻨﺎﺋﻲ‪.‬‬

‫ﰎ أﻳﻀﺎً اﻟﺘﻄﺮق إﱃ دور اﻷدوات اﳌﺴﺎﻋﺪة ﰲ اﻟﻌﻤﻠﻴﺔ اﻟﺘﻌﻠﻴﻤﻴﺔ ﻣﺜﻞ ﺟﻬﺎز اﻟﺘﺼﻮﻳﺖ اﻟﺮﻗﻤﻲ ‪ .ARS‬ﻛﻤﺎ ﰎ إﺟﺮاء اﺳﺘﻄﻼع رأي ﻟﻠﻄﻼب‬
‫اﺠﻤﻟﻤﻮﻋﺘﲔ‪ ،‬وﻇﻬﺮ ﺟﻠﻴﺎً ﻣﻦ ﺗﻘﻴﻴﻢ ﻃﻼب اﺠﻤﻟﻤﻮﻋﺔ اﻻﺧﺘﺒﺎرﻳﺔ ﻣﻮﻗﻒ إﳚﺎﰊ أﻛﺒﲑ ﻣﻘﺎرﻧﺔ ﻣﻊ ﻃﻼب اﺠﻤﻟﻤﻮﻋﺔ اﻟﻘﻴﺎﺳﻴﺔ‪.‬‬

‫ﺑﻨﺎءً ﻋﻠﻰ اﻟﻨﺘﺎﺋﺞ‪ ،‬ﰎ ﺗﺼﻤﻴﻢ ﳕﻮذج ﺗﻌﻠﻴﻤﻲ ﺑﻨﺎﺋﻲ ﺷﺎﻣﻞ ﻣﺮﺗﺒﻂ ﺑﺪورة ﻛﻮﻟﺐ ﰲ اﻟﺘﻌﻠﻢ اﻟﺘﺠﺮﻳﱯ‪ ،‬ﻛﻤﺎ ﰎ ﺷﺮح أﺟﺰاءﻩ وﻋﻨﺎﺻﺮﻩ‪.‬‬

‫ﺑﻨﺎءً ﻋﻠﻴﻪ‪ ،‬ﻧﺆﻛﺪ ﻋﻠﻰ ﺿﺮورة وأﳘﻴﺔ إﻋﺎدة اﻟﻨﻈﺮ ﰲ ﺗﻌﺪﻳﻞ اﻟﻨﻤﺎذج اﻟﺘﻌﻠﻴﻤﻴﺔ اﻟﻜﻼﺳﻴﻜﻴﺔ اﳌﻬﻴﻤﻨﺔ ﰲ اﻟﻌﺪﻳﺪ ﻣﻦ اﻟﻜﻠﻴﺎت اﳍﻨﺪﺳﻴﺔ ﰲ‬
‫ﻣﻨﻄﻘﺘﻨﺎ‪ ،‬إﱃ ﻓﻜﺮة أﻗﺮب إﱃ اﻟﻨﻤﺎذج اﻟﺒﻨﺎﺋﻴﺔ ﻟﱵ ﻬﺗﺪف إﱃ ﺟﻌﻞ اﻟﺘﻌﻠﻢ ﻣﺘﻌﺔ ﰲ أﻋﲔ اﻟﻄﻼب‪.‬‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪310‬‬
 ‫اﻟﻔﺼﻞ اﻟﺴﺎدس‬ ‫‪Chapter 6‬‬

‫‪@ÚÌ5Éæa@läbvn€a@·Ó‡óm‬‬

‫‪DESIGNING THE LABORATORY EXPERIMENTS‬‬

‫ﻧﻈﺮة ﻋﺎﻣﺔ )‪:(Overview‬‬

‫ﻫــﺬا اﻟﻔﺼــﻞ ﻳﻌــﺮض اﻟﺪراﺳــﺔ اﻟﺘﻄﺒﻴﻘﻴــﺔ ﻟﻠﺒﺤــﺚ ﻣــﻦ ﺧــﻼل اﳍﻴﻜﻠﻴــﺔ اﻟﺒﻨﺎﺋﻴــﺔ ﻟﻠﺘﺠــﺎرب اﻟﻌﻤﻠﻴــﺔ اﻟــﱵ ﰎ ﺗﺴــﺘﻨﺪ إﱃ ﻣﻮﺿــﻮﻋﺎت اﻟﻔﺼــﻮل اﻟﺴــﺎﺑﻘﺔ‪.‬‬
‫ﻳﺴﺘﻌﺮض اﻟﻔﺼﻞ ﰲ ﺑﺪاﻳﺘﻪ ﻟﻮﺣﺔ اﻟﺘﻄﻮﻳﺮ اﻟﱵ اﻋﺘﻤﺪت ﰲ ﺗﺼﻤﻴﻢ اﻟﺘﺠﺎرب اﻟﺘﻌﻠﻴﻤﻴﺔ‪ ،‬ﰒ ﻳﻘﺪم ﺗﺼـﻤﻴﻤﺎً ﻟﻠﻮﺣـﺔ ﺗﻮﺳـﻌﺔ إﺿـﺎﻓﻴﺔ وﳏﻴﻄﻴـﺎت أﺧـﺮى‬
‫ﺗﺮﺑﻂ إﱃ ﻟﻮﺣﺔ اﻟﺘﻄﻮﻳﺮ ﻗﺪ ﰎ ﺗﺼﻤﻴﻤﻬﺎ ﺧﺼﻴﺼﺎً ﺑﺪف اﺳﺘﺜﻤﺎر اﻟﻨﻈﺎم ﰲ ﺑﻨﺎء ﺗﻄﺒﻴﻘﺎت ﻋﻤﻠﻴﺔ أﻛﺜﺮ ﴰﻮﻟﻴﺔ‪ .‬ﰒ ﻳﻌﺪد اﻟﻔﺼﻞ اﻟﺘﻄﺒﻴﻘﺎت اﻟﱵ ﰎ‬
‫ﺑﻨﺎؤﻫـﺎ ﻋﻤﻠﻴـﺎً وﻳﺸـﺮع ﰲ إﻳـﺮاد ﳕـﺎذج ﻣﻨﻬـﺎ‪ .‬ﻳﻠﻴـﻪ ﻣـﻮﺟﺰ ﳐﺘﺼـﺮ ﻋـﻦ اﳌﻜﺘﺒـﺎت اﻟﱪﳎﻴـﺔ ‪ LabVIEW FPGA Module‬اﻟـﱵ ﺳﺘﺴـﺘﺨﺪم ﰲ ﺑﻨـﺎء‬
‫اﻟﺘﻄﺒﻴﻘﺎت‪ ،‬وﻳﺘﻌﺮض اﻟﻔﺼﻞ إﱃ ﻃﺮﻳﻘﺔ اﻟﺮﺑﻂ ﺑﲔ اﻟﺒﻴﺌـﺔ ‪ LabVIEW-FPGA‬وﻟﻮﺣـﺔ اﻟﺘﻄـﻮﻳﺮ‪ .‬ﰒ ﻳﻘـﺪم اﻟﻔﺼـﻞ ﳕﻮذﺟـﺎً ﻣﻨﻬﺠﻴـﺎً ﺑﻨﺎﺋﻴـﺎً ﻟﺘﺼـﻤﻴﻢ‬
‫دﻟﻴﻞ اﻟﺘﺠﺎرب اﻟﻌﻤﻠﻴﺔ‪ .‬وأﺧﲑاً ﻳﻘﺪم اﻟﻔﺼﻞ ﳕﻮذﺟﺎً ﻫﻴﻜﻠﻴﺎً ﻣﺘﻜﺎﻣﻼً ﻟﺒﻨﺎء ﳐﺘﱪ ﻋﻦ ﺑﻌﺪ ﻳﻌﺎﰿ ﻣﺸﻜﻠﺔ ﻋﺪم ﺗﻮﻓﺮ ﻋﻨﺎوﻳﻦ ﺧﺎﺻﺔ )‪.(VPN‬‬

‫ﺗﻤﻬﻴﺪ )‪:(Preface‬‬ ‫‪1-6‬‬

‫ﲝﺜﻨﺎ ﰲ اﻟﻔﺼﻞ اﻷول ﻣﻦ ﻫﺬﻩ اﻷﻃﺮوﺣﺔ ﰲ ﻣﻮﺿﻮﻋﺎت اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ )‪ Embedded Systems‬وﻓﺮوﻋﻬﺎ وﺗﻄﺒﻴﻘﺎﻬﺗﺎ‪ ،‬وﻋﱠﺮﺟﻨﺎ ﰲ‬
‫ﺼﻠﻨﺎ ﰲ ﺑﲎ‬
‫اﻟﻔﺼﻞ اﻟﺜﺎﱐ إﱃ أﺣﺪ أﻫﻢ ﻓﺮوع اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ وﻫﻮ ﻣﺼﻔﻮﻓﺎت اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً )‪ ،(FPGAs‬ﻓﻔ ﱠ‬
‫ﻣﺼﻔﻮﻓﺎت اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً وﻣﻨﻬﺠﻴﺎت ﺗﺼﻤﻴﻤﻬﺎ‪ ،‬وﻋﻠﻴﻪ ﺟﺎء اﻟﻔﺼﻞ اﻟﺜﺎﻟﺚ ﻣﺴﺘﻌﺮﺿﺎً ﻟﺒﻴﺌﺎت ﺑﺮﳎﺔ اﻟﻜﻴﺎن اﻟﺼﻠﺐ‪،‬‬
‫ﻘﺎرﻧﺎً ﻷﺳﺎﻟﻴﺒﻬﺎ وﻣﻨﻬﺠﻴّﺎﻬﺗﺎ‪ ،‬ﻣﱪزاً أﳘﻴﺔ ودور اﻟﻠﻐﺎت اﻟﺮﺳﻮﻣﻴﺔ )‪ (Graphical Programming Languages‬ﰲ ﺑﻨﺎء ﺗﻄﺒﻴﻘﺎت ﺗﻘﻨﻴﺔ‬
‫اﻟـ‪ FPGA‬ﺑﺄﺳﺮع زﻣﻦ وأﻗﺼﺮ وﻗﺖ وأﻗﻞ ﺟﻬﺪ‪.‬‬

‫اﻟﻔﺼﻞ اﻟﺮاﺑﻊ اﲣﺬ ﻣﻨﺤﺎً آﺧﺮ‪ ،‬وﻃﺎف ﺑﻌﻴﺪاً ﻓﺠﺎل ﰲ ﻧﻈﺮﻳﺎت اﻟﺘﻌﻠﻴﻢ وﻣﻨﻬﺠﻴّﺎﺗﻪ‪ ،‬وﻓﺼﻞ ﰲ اﺳﱰاﺗﻴﺠﻴﺎت ﺗﺼﻤﻴﻢ اﳌﻨﺎﻫﺞ اﻟﺘﻌﻠﻴﻤﻴﺔ‬
‫اﳌﺨﱪﻳﺔ‪ ،‬واﺿﻌﺎً اﻷﺳﺲ اﻟﻨﻈﺮﻳﺔ ﳌﻨﻬﺠﻴﺎت اﻟﺒﺤﺚ اﻟﻼﺣﻘﺔ ﰲ اﻟﻔﺼﻞ اﳋﺎﻣﺲ اﻟﺬي ﻗﺪم اﻷﻃﺮ اﻟﻌﻤﻠﻴﺔ ﻟﻨﻤﻮذج ﺑﻨﺎﺋﻲ ﺷﺎﻣﻞ ﰲ اﻟﺘﻌﻠﻢ‬
‫واﻟﺘﻌﻠﻴﻢ اﳍﻨﺪﺳﻲ اﳌﺨﱪي‪.‬‬

‫وأﺧﲑاً ﰲ ﻫﺬا اﻟﻔﺼﻞ اﻟﺬي ﻧﻌﺪﻩ "ﺳﺎدﺳﺎً"‪ ،‬ﻧﻀﻊ اﻟﻠﺒﻨﺔ اﻷﺧﲑة ﰲ ﻫﺮم ﻫﺬا اﻟﺒﺤﺚ‪ ،‬واﻟﱵ ﺗﺘﻀﻤﻦ ﳕﻮذﺟﺎً ﺗﻌﻠﻴﻤﻴﺎً ﳐﱪﻳﺎً ﻟﱪﳎﺔ ﺗﻄﺒﻴﻘﺎت‬
‫اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ )اﻟﱵأﲝﺮﻧﺎ ﰲ ﻣﻮﺿﻮﻋﺎﻬﺗﺎ ﰲ اﻟﻔﺼﻞ اﻷول( اﻟﱵ ﺗﻌﺘﻤﺪ ﺗﻘﻨﻴﺔ اﻟـ‪ FPGA‬واﻟﱵ ﻓﺼﻞ ﻣﻮﺿﻮﻋﺎﻬﺗﺎ اﻟﻔﺼﻞ اﻟﺜﺎﱐ( ﺑﺎﺳﺘﺨﺪام‬
‫اﻟﻠﻐﺎت اﻟﱪﳎﻴﺔ اﻟﺮﺳﻮﻣﻴﺔ )اﻟﱵ ﻋﺎﳉﻨﺎﻫﺎ ﰲ اﻟﻔﺼﻞ اﻟﺜﺎﻟﺚ(‪ ،‬وﻛﻞ ذﻟﻚ ﰲ ﲨﻠﺔ اﻟﻨﻈﺮﻳﺎت اﻟﺘﻌﻠﻴﻤﻴﺔ اﳊﺪﻳﺜﺔ وﻓﻘﺎً ﻟﻠﻨﻤﻮذج اﳌﺨﱪي اﳌﺼﻤﻢ‬
‫)اﻟﻔﺼﻞ اﻟﺮاﺑﻊ واﳋﺎﻣﺲ(‪ .‬ﻓﻴﻤﺎ ﻳﻠﻲ ﶈﺔ ﻋﺎﻣﺔ ﻋﻦ ﻟﻮﺣﺔ اﻟﺘﻄﻮﻳﺮ ﻟﺘﻘﻨﻴﺔ اﻟـ‪ FPGA‬واﳌﺴﺘﺨﺪﻣﺔ ﰲ ﺑﻨﺎء اﳌﺸﺎرﻳﻊ اﻟﺘﻌﻠﻴﻤﻴﺔ‪.‬‬
 ‫‪Designing The Laboratory Experiments‬‬ ‫ﺗﺼﻤﻴﻢ اﻟﺘﺠﺎرب اﳌﺨﱪﻳﺔ |‬

‫ﻟﻮﺣﺔ اﻟﺘﻄﻮﻳﺮ ‪:(Spartan-3E Development Kit) Spartan-3E‬‬ ‫‪2-6‬‬

‫ﺗﻌﺘﱪ ﻟﻮﺣﺔ اﻟﺘﻄﻮﻳﺮ ‪ Spartan-3E Starter Kit‬اﻟﻨﻤﻮذج اﳌﺜﺎﱄ ﻟﻠﻮﺣﺔ ﺗﻄﻮﻳﺮ ﺷﺎﻣﻠﺔ اﻟﺘﻄﺒﻴﻘﺎت ﻋﺎﻟﻴﺔ اﻷداء ﻣﻨﺨﻔﻀﺔ اﻟﻜﻠﻔﺔ ﻣﻨﺎﺳﺒﺔ‬
‫ﻟﺘﺼﻤﻴﻢ ﻣﻌﻈﻢ اﻟﺘﻄﺒﻴﻘﺎت ﻣﺘﻮﺳﻄﺔ اﻟﺘﻌﻘﻴﺪ‪ .‬ﺗﺘﻀﻤﻦ ﻫﺬﻩ اﻟﻠﻮﺣﺔ ﺷﺮﳛﺔ ‪ FPGA‬ﻣﻦ ﺗﺼﻨﻴﻊ ﺷﺮﻛﺔ ‪ ،Xilinx‬وﻫﺬﻩ اﻟﺸﺮﳛﺔ ﻫﻲ ﻣﻦ اﻟﻌﺎﺋﻠﺔ‬
‫‪ Spartan-3E‬ﺑﺘﻘﻨﻴﺔ ﺗﺼﻨﻴﻊ ‪ ،90nm‬وﲤﻠﻚ ﻫﺬﻩ اﻟﻌﺎﺋﻠﺔ ﺷﺮاﺋﺢ ‪ FPGA‬ﲢﺘﻮي ﺣﱴ ‪ 1.6‬ﻣﻠﻴﻮن ﺑﻮاﺑﺔ ﻣﻨﻄﻘﻴﺔ وأﻛﺜﺮ ﻣﻦ ‪ 376‬ﻗﻄﺐ‬
‫‪ .I/O‬اﻟﺸﻜﻞ‪ 1-6‬ﻳﺒﲔ ﻟﻮﺣﺔ اﻟﺘﻄﻮﻳﺮ ‪.Spartan-3E Kit‬‬

‫اﻟﺸﻜﻞ‪ 1-6‬ﻟﻮﺣﺔ اﻟﺘﻄﻮﻳﺮ ‪ Spartan-3E‬اﳌﺴﺘﺨﺪﻣﺔ ﰲ ﺗﺼﻤﻴﻢ اﻟﺘﺠﺎرب‬

‫ﺳﻌﺮ ﻫﺬﻩ اﻟﻠﻮﺣﺔ ﻳﻌﺘﱪ ﻻ ﻣﺜﻴﻞ ﻟﻪ‪ ،‬ﺣﻴﺚ أن ﺳﻌﺮ اﻟﻠﻮﺣﺔ اﻟﻮاﺣﺪة ﻫﻮ ‪ USD149‬ﻓﻘﻂ‪ ،‬وﻫﺬا اﻟﺴﻌﺮ ﻫﻮ أﻗﻞ ﻣﻦ ﺳﻌﺮ اﻟﺘﻜﻠﻔﺔ اﻻﻓﱰاﺿﻲ‪،‬‬
‫ﺣﻴﺚ أن ﺷﺮﻛﺔ ‪ Xilinx‬وﺑﺎﻟﺘﻌﺎون ﻣﻊ اﻟﻌﺪﻳﺪ ﻣﻦ اﻟﺸﺮﻛﺎت اﻷﺧﺮى اﳌﺼﻨﻌﺔ ﻟﻠﻄﺮﻓﻴﺎت ﻗﺎﻣﻮا ﺑﻄﺮح ﻫﺬﻩ اﻟﻠﻮﺣﺔ ﰲ اﻷﺳﻮاق ﺑﺴﻌﺮ رﻣﺰي‬
‫دﻋﻤﺎً ﻟﻠﻄﻼب واﳉﺎﻣﻌﺎت اﻟﺮاﻏﺒﲔ ﺑﺘﻌﻠﻢ ﺗﻘﻨﻴﺔ اﻟـ‪.FPGA‬‬

‫اﳌﻴﺰات اﻟﻌﺎﻣﺔ ﳍﺬﻩ اﻟﻠﻮﺣﺔ ﻧﻮردﻫﺎ ﺑﺎﺧﺘﺼﺎر ﻓﻴﻤﺎ ﻳﻠﻲ‪:‬‬

‫‪ -‬اﻟﺸﺮﳛﺔ اﳌﺪﳎﺔ )‪:(FPGA Chip‬‬

‫‪Xilinx Spartan-3E XC3S500E-4FG320‬‬ ‫‪‬‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪312‬‬
26 Chapter 6 | ‫اﻟﻔﺼﻞ اﻟﺴﺎدس‬

Up to 232 user-I/O pins 

320-pin FBGA package 
Over 10,000 logic cells 
Embedded MicroBlaze 32-bit embedded RISC processor 
Embedded PicoBlaze 8-bit embedded controller 

XC2C64A Cool-Runner-II CPLD ‫ ﻋﻨﺼﺮ رﻗﻤﻲ ﻗﺎﺑﻞ ﻟﻠﱪﳎﺔ ﻣﺪﻣﺞ‬-

:(Memories) ‫ اﻟﺬواﻛﺮ اﳌﺪﳎﺔ‬-

.(Intel StrataFlash) 16MB parallel NOR Flash 

.(STM) 2MB SPI Flash 

64MB DDR SDRAM x16 data interface, 100+ MHz 
4Mbit Platform Flash configuration PROM 
DS2432 1-Wire SHA-1 EEPROM 

:(Peripheral Interfaces) ‫ اﻟﻮﺣﺪات اﶈﻴﻄﻴﺔ اﳌﺪﳎﺔ‬-

10/100 Ethernet PHY (requires Ethernet MAC in FPGA) 
On-board USB-based FPGA/CPLD download/debug interface 
VGA display port 
Two 9-pin RS-232 ports (DTE- and DCE-style) 
PS/2-style mouse/keyboard port 
Three expansion connection ports 
2-line, 16-character LCD screen 
50MHz clock oscillator 
SHA-1 1-wire serial EEPROM for Bitstream copy protection 
Four-output, SPI-based Digital-to-Analog Converter (DAC) 
Two-input, Analog-to-Digital Converter (ADC) with PG-amplifier 
Rotary-encoder with push-button shaft 
Eight discrete LEDs 
Four slide switches 
Four push-button switches 
Differential I/O 

.‫ﺳﻮف ﻧﺘﻄﺮق إﱃ ﻣﺒﺪأ ﻋﻤﻞ ﻛﻞ ﻣﻦ ﻫﺬﻩ اﻟﻮﺣﺪات ﰲ ﺣﻴﻨﻪ أﺛﻨﺎء ﺷﺮح اﻟﺘﺠﺮﺑﺔ اﳌﺨﺼﺼﺔ ﻟﻪ‬

313 ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Designing The Laboratory Experiments‬‬ ‫ﺗﺼﻤﻴﻢ اﻟﺘﺠﺎرب اﳌﺨﱪﻳﺔ |‬

‫ﺗﺼﻤﻴﻢ وﺣﺪات ﻣﺤﻴﻄﻴﺔ ﺷﻤﻮﻟﻴﺔ )‪(Designing a Comprehensive Peripheral Modules‬‬ ‫‪3-6‬‬

‫رﻏﻢ ﺗﻌﺪد وﺗﻨﻮع اﻟﻮﺣﺪات اﶈﻴﻄﻴﺔ اﳌﺪﳎﺔ ﻋﻠﻰ ﻟﻮﺣﺔ اﻟﺘﻄﻮﻳﺮ‪ ،‬إﻻ أ�ﺎ ﻋﻠﻰ ﻣﺴﺘﻮى ٍ‬
‫ﻋﺎل ﻣﻦ اﻟﺘﺨﺼﺼﻴﺔ ﻣﻘﺎرﻧﺔً ﻣﻊ ﻣﺴﺘﻮى اﻟﻄﻼب ﰲ‬
‫ﺟﺎﻣﻌﺎﺗﻨﺎ‪ ،‬ﻟﺬﻟﻚ ﻗﻤﻨﺎ ﺑﺘﺼﻤﻴﻢ ﻟﻮﺣﺔ ﺗﻮﺳﻌﺔ وﳎﻤﻮﻋﺔ ﻣﻦ اﻟﻮﺣﺪات اﶈﻴﻄﻴﺔ اﻹﺿﺎﻓﻴﺔ ﺗﺮﺑﻂ ﻣﻊ ﻟﻮﺣﺔ اﻟﺘﻄﻮﻳﺮ ﻋﱪ ﻣﻨﻔﺬ اﻟﺘﻮﺳﻌﺔ اﻹﺿﺎﰲ‪ .‬إن‬
‫اﳍﺪف ﻣﻦ ﻫﺬﻩ اﶈﻴﻄﻴﺎت اﻹﺿﺎﻓﻴﺔ ﻫﻮ اﺳﺘﺜﻤﺎر اﻟﻨﻈﺎم ﰲ ﺑﻨﺎء ﺗﻄﺒﻴﻘﺎت ﻋﻤﻠﻴﺔ أﻛﺜﺮ ﴰﻮﻟﻴﺔ وأﻛﺜﺮ ﲣﺼﺼﻴﺔ ﰲ ﻧﻔﺲ اﻟﻮﻗﺖ‪ .‬اﻟﺸﻜﻞ‪2-6‬‬

‫ﻳﺒﲔ ﻟﻮﺣﺔ اﻟﺘﻮﺳﻌﺔ واﻟﻮﺣﺪات اﶈﻴﻄﻴﺔ اﻹﺿﺎﻓﻴﺔ اﻟﱵ ﰎ ﺗﺼﻤﻴﻤﻬﺎ‪ .‬اﳌﻠﺤﻖ‪ 7-‬ﻳﺘﻀﻤﻦ اﳌﺨﻄﻄﺎت اﻟﺘﺼﻤﻴﻤﻴﺔ ﻟﻠﻮﺣﺔ اﻟﺘﻮﺳﻌﺔ واﻟﻮﺣﺪات‬
‫اﶈﻴﻄﻴﺔ اﻹﺿﺎﻓﻴﺔ‪.‬‬

‫‪U02‬‬
‫‪U01‬‬

‫‪U03‬‬ ‫‪U04‬‬ ‫‪U05‬‬ ‫‪U06‬‬ ‫‪U07‬‬ ‫‪U08‬‬ ‫‪U09‬‬ ‫‪U10‬‬ ‫‪U11‬‬

‫‪U12‬‬

‫‪U13‬‬ ‫‪U14‬‬ ‫‪U15‬‬

‫اﻟﺸﻜﻞ‪ 2-6‬ﻟﻮﺣﺔ اﻟﺘﻮﺳﻌﺔ واﻟﻮﺣﺪات اﶈﻴﻄﻴﺔ اﻹﺿﺎﻓﻴﺔ‬

‫اﻟﻮﺣﺪات اﻹﺿﺎﻓﻴﺔ ﺗﻀﻢ اﶈﻴﻄﻴﺎت اﻟﺘﺎﻟﻴﺔ‪:‬‬

‫‪ :U01 -‬وﺣﺪة إرﺳﺎل واﺳﺘﻘﺒﺎل ﻟﻸﺷﻌﺔ ﲢﺖ اﳊﻤﺮاء )ﺗﻄﺒﻴﻘﺎت اﻟﺘﺤﻜﻢ‪ ،‬ﻧﻘﻞ اﻟﺒﻴﺎﻧﺎت‪ ،‬ﻛﺸﻒ اﻟﻌﻮاﺋﻖ‪.(... ،‬‬
‫‪ :U02 -‬وﺣﺪة ﻗﻴﺎس ﺷﺪة اﻹﺿﺎءة ﺑﺎﺳﺘﺨﺪام ﻣﻘﺎوﻣﺔ ﺿﻮﺋﻴﺔ ‪ LDR‬وﻣﻘﻴﺎس ﺿﻐﻂ وارﺗﻔﺎع )‪.(MPXVxxx‬‬
‫‪ :U03 -‬وﺣﺪة ﺗﻮﻟﻴﺪ ﻧﻐﻤﺎت ﺻﻮﺗﻴﺔ ﺑﺎﺳﺘﺨﺪام ‪.Piezo Buzzer‬‬
‫‪ :U04 -‬وﺣﺪة ﺗﺮاﺳﻞ ﺗﺴﻠﺴﻠﻲ ‪ RS484‬ﺑﺎﺳﺘﺨﺪام اﻟﺸﺮﳛﺔ ‪.MAX1487‬‬
‫‪ :U05 -‬وﺣﺪة ﲢﻜﻢ ﲟﺤﺮك ﺗﻴﺎر ﻣﺴﺘﻤﺮ ‪ 2A‬ﻣﻊ ﻗﻴﺎس ﺳﺮﻋﺔ )‪.(Absolut Encoder‬‬
‫‪ :U06 -‬وﺣﺪة ﺗﻮﻗﻴﺖ ﺑﺎﻟﺰﻣﻦ اﳊﻘﻴﻘﻲ ‪ (DS1307) RTC‬وذاﻛﺮة ‪.I2C – (AT24C512) EEPROM‬‬
‫‪ :U07 -‬وﺣﺪة ﺗﺒﺪﻳﻞ ‪ DAC‬ﺑﺎﺳﺘﺨﺪام ﺷﺒﻜﺔ ‪ Ladder‬ﺑﺪﻗﺔ ‪.8-bit‬‬
‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪314‬‬
‫‪26‬‬ ‫اﻟﻔﺼﻞ اﻟﺴﺎدس | ‪Chapter 6‬‬

‫‪ :U08 -‬وﺣﺪة ﻗﻴﺎس ﺣﺮارة ﺑﺎﺳﺘﺨﺪام ﺣﺴﺎس رﻗﻤﻲ ‪ DS1280‬وﻓﻖ اﻟﱪوﺗﻮﻛﻮل ‪.1-wire‬‬
‫‪ U09 -‬وﺣﺪة ﺗﻮﻟﻴﺪ ﺟﻬﺪ ﺧﻄﻲ ﺗﺸﺎﻬﺑﻲ ﻣﻔﺎﺗﻴﺢ ﳊﻈﻴﺔ‪.‬‬
‫‪ :U10 -‬وﺣﺪة ﻗﻴﺎدة ﶈﺮك ﺧﻄﻲ )‪.(1Amax Stepper Motor‬‬
‫‪ U11 -‬وﺣﺪة ﻗﻴﺎس ﺣﺮارة ﺑﺎﺳﺘﺨﺪام ﺣﺴﺎس ﺗﺸﺎﻬﺑﻲ ‪ LM35‬وﻣﻘﺎوﻣﺔ ذات ﻋﺎﻣﻞ ﺣﺮاري ﺳﺎﻟﺐ )‪.(NTC‬‬
‫‪ :U12 -‬وﺣﺪة إﻇﻬﺎر ﺑﺄرﺑﻊ ﻟﻮﺣﺎت إﻇﻬﺎر رﻗﻤﻴﺔ وﺛﻨﺎﺋﻴﺎت ﺿﻮﺋﻴﺔ ﺗﻌﺘﻤﺪ ﻋﻠﻰ ﻣﺴﺠﻼت إزاﺣﺔ ‪.74HC595‬‬
‫‪ :U13 -‬وﺣﺪة ﲢﻜﻢ اﺳﺘﻄﺎﻋﻴﺔ ﺑﺎﺳﺘﺨﺪام أرﺑﻊ وﺣﺪات ‪.(250V/10A) Relays‬‬
‫‪ :U14 -‬وﺣﺪة إﻇﻬﺎر ﺑﺄرﺑﻊ ﻟﻮﺣﺎت إﻇﻬﺎر رﻗﻤﻴﺔ ﺗﻌﺘﻤﺪ ﻋﻠﻰ ﳕﻂ اﳌﺴﺢ )‪.(Scanning Mode‬‬
‫‪ :U15 -‬وﺣﺪة ﻗﻴﺎدة ﳏﺮك ﺗﻴﺎر ﻣﺴﺘﻤﺮ أو ﳏﺮك ﺧﻄﻮي ﺑﺎﺳﺘﺨﺪام اﻟﺸﺮﳛﺔ ‪.L297‬‬

‫ﻣﻨﻬﺠﻴﺔ ﺗﺼﻤﻴﻢ اﻟﺘﺠﺎرب اﻟﻌﻤﻠﻴﺔ )‪:(Methodology of the Experiments Design‬‬ ‫‪4-6‬‬

‫إن اﳌﻨﻬﺠﻴﺔ اﻟﱵ ﺳﻮف ﻧﻘﻮم ﺑﺎﺗﺒﺎﻋﻬﺎ ﻟﺘﺼﻤﻴﻢ دﻟﻴﻞ اﻟﺘﺠﺮﺑﺔ ﻣﻮﺿﺤﺔ ﻋﻠﻰ اﻟﺸﻜﻞ‪ 3-6‬وﺳﻴﺄﰐ ﺗﻔﺼﻴﻠﻬﺎ ﻻﺣﻘﺎً‪.‬‬

‫• ﻣﻘﺪﻣﺔ ﻋﻦ اﻟﺘﺠﺮﺑﺔ‬
‫• اﳍﺪف ﻣﻦ اﻟﺘﺠﺮﺑﺔ‬ ‫اﻟﻔﻜﺮة‬
‫واﻟﻬﺪف‬
‫• اﳌﺨﻄﻂ اﻟﺼﻨﺪوﻗﻲ ﻟﻠﺘﺠﺮﺑﺔ‬
‫• اﳌﺨﻄﻂ اﳌﺮﺣﻠﻲ ﻟﺘﻨﻔﻴﺬ اﻟﺘﺠﺮﺑﺔ‬ ‫اﻟﺘﺨﻄﻴﻂ‬

‫• اﳌﺨﻄﻂ اﻟﻨﻈﺮي ﻟﻠﻜﻴﺎن اﻟﺼﻠﺐ‬

‫• ﺷﺮح ﻋﻨﺎﺻﺮ اﻟﻜﻴﺎن اﻟﺼﻠﺐ اﳉﺪﻳﺪة‬ ‫اﻟﻜﻴﺎن‬
‫اﻟﺼﻠﺐ‬
‫• وﺿﻊ ﺧﻄﻮات ﺗﺼﻤﻴﻢ ‪ Block Diagram‬واﻟﺬي ﻳﻘﺎﺑﻞ اﻟـ ‪ Architecture‬ﰲ ﻟﻐﺎت ‪.HDL‬‬
‫• وﺿﻊ ﺧﻄﻮات ﺗﺼﻤﻴﻢ ‪ Front Panel‬واﻟﱵ ﺗﻘﺎﺑﻞ اﻟـ‪ Entity‬ﰲ ﻟﻐﺎت ‪.HDL‬‬ ‫اﻟﺘﺼﻤﻴﻢ‬

‫• وﺿﻊ ﺷﺮح ﻟﻠﺘﺼﻤﻴﻢ‪.‬‬

‫• وﺿﻊ اﻷﺳﺌﻠﺔ ﻟﻠﻤﻨﺎﻗﺸﺔ أﺛﻨﺎء وﺑﻌﺪ ﺗﻨﻔﻴﺬ اﻟﺘﺠﺮﺑﺔ وﻗﻴﺎس أداء اﻟﻄﻼب وﲢﻔﻴﺰ اﻷﻓﻜﺎر اﻹﺑﺪاﻋﻴﺔ‪.‬‬ ‫اﻟﺸﺮوح‬

‫• وﺿﻊ اﳌﺬاﻛﺮة اﳌﺘﻌﻠﻘﺔ ﺑﺎﻟﺘﺠﺮﺑﺔ‪.‬‬

‫• وﺿﻊ وﻇﻴﻔﺔ ﻣﺘﻌﻠﻘﺔ ﺑﺎﻟﺘﺠﺮﺑﺔ ﻣﻊ ﻃﻠﺐ ﺗﻄﻮﻳﺮ ﺟﺎﻧﺐ ﳏﺪد وﺣﻞ ﻣﺸﻜﻠﺔ ﻣﻌﻴﻨﺔ ﻳﺘﻢ اﻗﱰاﺣﻬﻤﺎ‪.‬‬ ‫اﻟﻮﻇﻴﻔﺔ‬

‫اﻟﺸﻜﻞ‪ 3-6‬ﻣﻨﻬﺠﻴﺔ إﻋﺪاد دﻟﻴﻞ اﻟﺘﺠﺎرب‬

‫اﻟﺘﺠﺎرب اﻟﻤﺼﻤﻤﺔ )‪:(The Designed Experiments‬‬ ‫‪5-6‬‬

‫ﰲ ﻣﺮﺣﻠﺔ ﻣﺒﻜﺮة ﻣﻦ ﻫﺬا اﻟﺒﺤﺚ ﰎ ﺑﻨﺎء اﻟﻌﺪﻳﺪ ﻣﻦ اﻟﺘﺠﺎرب اﻟﱵ ﻏﻄﺖ ﻣﻌﻈﻢ اﶈﻴﻄﻴﺎت واﻟﺘﻄﺒﻴﻘﺎت اﳌﺪﳎﺔ ﻋﻠﻰ ﻟﻮﺣﺔ اﻟﺘﻄﻮﻳﺮ‬
‫‪ ،Spartan-3E‬إﺿﺎﻓﺔً إﱃ ﳎﻤﻮﻋﺔ إﺿﺎﻓﻴﺔ ﻣﻦ اﻟﺘﺠﺎرب ﺗﺘﻌﻠﻖ ﺑﺎﻟﻮﺣﺪات اﶈﻴﻄﻴﺔ اﻹﺿﺎﻓﻴﺔ اﻟﱵ ﰎ ﺗﺼﻤﻴﻤﻬﺎ‪.‬‬

‫‪315‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Designing The Laboratory Experiments‬‬ ‫ﺗﺼﻤﻴﻢ اﻟﺘﺠﺎرب اﳌﺨﱪﻳﺔ |‬

‫ﻧﻌﺪد ﻋﻠﻰ ﺳﺒﻴﻞ اﳌﺜﺎل‪ :‬ﲡﺎرب اﻟﺘﻌﺎﻣﻞ ﻣﻊ ﺑﻮاﺑﺎت اﻟﺪﺧﻞ واﳋﺮج )‪ ،(GPIO‬اﻟﺘﻌﺎﻣﻞ ﻣﻊ وﺣﺪة اﻟﺘﻮﻗﻴﺖ‪ ،‬اﻟﺘﻌﺎﻣﻞ ﻣﻊ ﺷﺎﺷﺔ اﻹﻇﻬﺎر‬
‫اﻟﺮﺳﻮﻣﻴﺔ‪ ،‬اﻟﺘﻌﺎﻣﻞ ﻣﻊ اﻟﺬواﻛﺮ اﳌﺪﳎﺔ اﻟﺘﺴﻠﺴﻠﻴﺔ واﻟﺘﻔﺮﻋﻴﺔ‪ ،‬اﻟﺘﻌﺎﻣﻞ ﻣﻊ ﻣﺒﺪﻻت اﻹﺷﺎرة ‪ ،DAC/ADC‬اﻟﺘﻌﺎﻣﻞ ﻣﻊ اﻟﻨﻮاﻓﺬ اﻟﺘﺴﻠﺴﻠﻴﺔ‬
‫‪ ،RS232‬واﻟﻌﺪﻳﺪ ﻣﻦ اﻟﺘﺠﺎرب اﻷﺧﺮى واﻟﱵ ﲟﺠﻤﻮﻋﻬﺎ ﻻ ﳝﻜﻦ ﺗﻐﻄﻴﺘﻬﺎ ﻣﻦ ﺧﻼل ﻓﺼﻞ دراﺳﻲ واﺣﺪ ﻓﻘﻂ‪ ،‬وإﳕﺎ ﲢﺘﺎج إﱃ أن ﺗﺒﲎ‬
‫وﺗﻘﺪم وﻓﻖ اﳌﻨﻬﺠﻴﺔ اﳌﺬﻛﻮرة واﻟﻨﻤﻮذج اﳌﺼﻤﻢ ﰲ اﻟﻔﺼﻞ اﳋﺎﻣﺲ ﻋﻠﻰ ﻣﺪى ﻓﺼﻠﲔ دراﺳﻴﲔ ﻣﺘﺘﺎﺑﻌﲔ‪ ،‬ﻋﻠﻰ أن ﻳﺘﻢ ﲢﻀﲑ اﻟﻄﻼب‬
‫ﺑﺸﻜﻞ ﻣﺴﺒﻖ ﰲ ﻣﻘﺮرات اﻷﻧﻈﻤﺔ اﻟﺮﻗﻤﻴﺔ وﺑﺮﳎﺔ اﳌﻌﺎﳉﺎت اﳌﺼﻐﺮة‪.‬‬

‫ﻣﺪﺧﻞ إﻟﻰ ﺑﻴﺌﺔ ‪:(Introduction to LabVIEW FPGA Model) LabVIEW FPGA‬‬ ‫‪6-6‬‬

‫ﺑﺎﻟﻌﻮدة إﱃ اﻟﺸﻜﻞ‪ 34-3‬اﻟﺬي ﳝﺜﻞ اﻟﺒﻨﻴﺔ اﻟﻌﺎﻣﺔ ﳌﻜﻮﻧﺎت ﺷﺮاﺋﺢ اﻟـ‪ FPGA‬ﳒﺪ أن ﺷﺮﳛﺔ اﻟـ‪ FPGA‬ﺗﺘﻜﻮن ﻣﻦ ﻋﺪد ﻣﻦ اﻟﻮﺣﺪات‬
‫اﳌﻨﻄﻘﻴﺔ اﻷﺳﺎﺳﻴﺔ )‪ ،(CLBs, IOBs, DCMs, ERMs, RMIs‬إﺿﺎﻓﺔً إﱃ وﺣﺪات أﺧﺮى ﻣﺪﳎﺔ ﺗﺴﺘﺨﺪم ﰲ ﺗﻄﺒﻴﻘﺎت ﻣﺘﻘﺪﻣﺔ‬
‫)‪ ،(EPCs, GbTs, IPs, DSPBs‬ﳝﺜﻞ اﻟـ‪ CLBs‬اﻟﻜﺘﻞ اﳌﻨﻄﻘﻴﺔ اﻷﺳﺎﺳﻴﺔ اﻟﱵ ﻳﺘﺸﻜﻞ ﻣﻨﻬﺎ اﻟﺪارات اﳌﻨﻄﻘﻴﺔ اﻟﺪاﺧﻠﻴﺔ ﻷي ﺗﻄﺒﻴﻖ‪.‬‬

‫ﰲ اﻟﺒﻴﺌﺔ ‪ LabVIEW FPGA‬ﻳﺘﻢ اﻟﺘﺼﻤﻴﻢ اﻧﻄﻼﻗﺎً ﻣﻦ اﳌﺴﺘﻮى اﻟﻮﻇﻴﻔﻲ ﺑﺪﻻً ﻣﻦ اﳌﺴﺘﻮى اﻟﺒﻨﻴﻮي‪ ،‬وﺑﺎﻟﺘﺎﱄ ﻳﺼﺐ اﳌﺼﻤﻢ اﻫﺘﻤﺎﻣﻪ‬
‫اﻟﻜﺎﻣﻞ ﻋﻠﻰ اﻟﻮﻇﺎﺋﻒ اﳌﻄﻠﻮﺑﺔ ﻣﻦ اﻟﻨﻈﺎم ﺑﺪﻻً ﻣﻦ اﻟﺘﺸﺘﺖ ﰲ ﺗﻔﺎﺻﻴﻞ ﻋﻨﺎﺻﺮ اﻟﻜﻴﺎن اﻟﺼﻠﺐ‪.‬‬

‫ﺗﻮﻓﺮ اﻟﺒﻴﺌﺔ ‪ LabVIEW FPGA‬ﻣﻜﺘﺒﺎت رﺳﻮﻣﻴﺔ ﺑﺮﳎﻴﺔ ﺟﺎﻫﺰة ﻟﻠﺘﺤﻜﻢ ﺑﺎﻟﻌﻨﺎﺻﺮ اﳌﻨﻄﻘﻴﺔ واﳌﻮارد اﳌﻮﺟﻮدة ﻋﻠﻰ ﺷﺮﳛﺔ اﻟـ‪ ،FPGA‬ﺣﻴﺚ‬
‫ﻳﺘﻢ اﻟﺘﺼﻤﻴﻢ ﰲ ﻣﺴﺘﻮ ٍى ٍ‬
‫ﻋﺎل ﻻ ﳛﺘﺎج ﻓﻴﻪ إﱃ اﳋﻮض ﰲ ﺗﻔﺎﺻﻴﻞ اﻟﻜﻴﺎن اﻟﺼﻠﺐ اﳌﻌﻘﺪة واﻟﺸﺎﺋﻜﺔ ﺟﺪاً‪ ،‬وإﳕﺎ ﻳﻜﻔﻲ اﻻﻃﻼع اﻟﻌﺎم ﻋﻠﻰ‬
‫ﻣﻮارد وﺧﺼﺎﺋﺺ اﻟﺸﺮﳛﺔ اﳌﺴﺘﺨﺪﻣﺔ‪.‬‬

‫ﲤﻠﻚ اﻟﺒﻴﺌﺔ ‪ LabVIEW FPGA‬اﻟﻌﺪﻳﺪ ﻣﻦ اﳌﻜﺘﺒﺎت اﳉﺎﻫﺰة اﳌﻀﻤﻨﺔ ﰲ اﻟﱪﻧﺎﻣﺞ إﺿﺎﻓﺔً إﱃ ﻣﻜﺘﺒﺎت أﺧﺮى ذات ﺗﻄﺒﻴﻘﺎت ﺧﺎﺻﺔ‬
‫ﳝﻜﻦ ﲢﻤﻴﻠﻬﺎ أو ﺷﺮاﺋﻬﺎ ﻋﻨﺪ اﳊﺎﺟﺔ إﻟﻴﻬﺎ‪ .‬إن اﺳﺘﺨﺪام ﻫﺬﻩ اﳌﻜﺘﺒﺎت ﺑﺴﻴﻂ ﺟﺪاً وﻳﺘﻢ ﻣﻦ ﺧﻼل ﻋﻤﻠﻴﺔ اﻟﺴﺤﺐ واﻹﻓﻼت ) & ‪Drag‬‬

‫‪.(Drop‬‬

‫ﺗﺘﻮﺿﻊ اﳌﻜﺘﺒﺎت ﰲ ﻟﻮﺣﺔ اﻟﻮﻇﻴﻔﻴﺔ ”‪ “Function‬ﰲ واﺟﻬﺔ اﻟـ”‪ ”Block Diagram‬ﻛﻤﺎ ﻫﻮ ﻣﺒﲔ ﻋﻠﻰ اﻟﺸﻜﻞ‪ ،4-6‬ﰲ ﻫﺬا اﻟﻔﺼﻞ‬
‫ﻟﻦ ﻧﻘﻮم ﺑﺸﺮح ﻫﺬﻩ اﳌﻜﺘﺒﺎت وﻃﺮق اﺳﺘﺨﺪاﻣﻬﺎ‪ ،‬وذﻟﻚ ﻷن اﻷﻣﺮ ﳛﺘﺎج إﱃ ﻣﺌﺎت اﻟﺼﻔﺤﺎت‪ ،‬وإﳕﺎ ﺳﻨﻘﺘﺼﺮ ﻋﻠﻰ ذﻛﺮﻫﺎ ﳎﻤﻠﺔ ﻛﻤﺎ ﻫﻮ‬
‫ﻣﺒﲔ ﰲ اﻷﺷﻜﺎل‪ ،5-6~19-6‬وﺳﻨﻌﺎﰿ ﰲ وﻗﺘﻪ ﻣﻦ ﺧﻼل اﻟﻌﺮوض اﳌﺮﺋﻴﺔ )‪ (Video‬وﻇﺎﺋﻒ وﻋﻤﻞ اﻟﻌﻨﺎﺻﺮ اﳌﻮﺟﻮدة ﰲ اﳌﻜﺘﺒﺎت ﻋﻨﺪ‬
‫اﺳﺘﺨﺪاﻣﻬﺎ‪.‬‬

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‫‪26‬‬ ‫اﻟﻔﺼﻞ اﻟﺴﺎدس | ‪Chapter 6‬‬

‫”‪“Block Diagram‬‬ ‫اﻟﺸﻜﻞ‪ 4-6‬ﻟﻮﺣﺔ إﺿﺎﻓﺔ ﻣﻜﺘﺒﺎت اﻟﻌﻨﺎﺻﺮ ﰲ واﺟﻬﺔ‬

‫اﻟﺸﻜﻞ‪ 5-6‬ﻣﻜﺘﺒﺔ اﻟﻌﻨﺎﺻﺮ واﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ )‪(Boolean‬‬

‫اﻟﺸﻜﻞ‪ 6-6‬ﻣﻜﺘﺒﺔ اﻟﻌﻨﺎﺻﺮ اﻟﺮﻗﻤﻴﺔ واﻟﻌﻤﻠﻴﺎت اﻟﺮﻳﺎﺿﻴﺔ واﻟﺘﺤﻮﻳﻼت اﻟﻌﺪدﻳﺔ )‪(Numeric‬‬

‫اﻟﺸﻜﻞ‪ 7-6‬ﻣﻜﺘﺒﺔ ﻋﻨﺎﺻﺮ اﳌﻘﺎرﻧﺔ )‪(Comparison‬‬

‫‪317‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 Designing The Laboratory Experiments | ‫ﺗﺼﻤﻴﻢ اﻟﺘﺠﺎرب اﳌﺨﱪﻳﺔ‬

(Cluster & Class) ‫ ﺘﺒﺔ اﻷﻧﻮاع وﻋﻨﺎﺻﺮ ﺑﻨﺎء اﺠﻤﻟﻤﻮﻋﺎت‬8-6‫اﻟﺸﻜﻞ‬

(Array) ‫ ﻣﻜﺘﺒﺔ اﳌﺼﻔﻮﻓﺎت‬9-6‫اﻟﺸﻜﻞ‬

(Structure) ‫ ﻣﻜﺘﺒﺔ اﳊﻠﻘﺎت اﻟﺸﺮﻃﻴﺔ واﻟﺒﲎ اﻟﺘﻜﺮارﻳﺔ‬10-6‫اﻟﺸﻜﻞ‬

(Timing) ‫ ﻣﻜﺘﺒﺔ وﺣﺪات اﻟﺘﻮﻗﻴﺖ واﻟﺘﺄﺧﲑ اﻟﺰﻣﲏ‬11-6‫اﻟﺸﻜﻞ‬

(Memory & FIFO) FPGA‫ ﻣﻜﺘﺒﺔ اﻟﺘﻌﺎﻣﻞ ﻣﻊ اﻟﻜﺘﻞ اﻟﺬاﻛﺮﻳﺔ ﻋﻠﻰ ﺷﺮﳛﺔ اﻟـ‬12-6‫اﻟﺸﻜﻞ‬

Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages 318
‫‪26‬‬ ‫اﻟﻔﺼﻞ اﻟﺴﺎدس | ‪Chapter 6‬‬

‫اﻟﺸﻜﻞ‪ 13-6‬ﻣﻜﺘﺒﺔ اﻟﻌﻨﺎﺻﺮ اﻟﻮﻇﻴﻔﻴﺔ اﻟﺮﻳﺎﺿﻴﺔ واﻟﺘﺤﻠﻴﻠﻴﺔ )‪(FPGA Math & Analysis‬‬

‫اﻟﺸﻜﻞ‪ 14-6‬ﻣﻜﺘﺒﺔ اﻟﻌﻨﺎﺻﺮ واﻷدوات اﻟﺘﺤﻠﻴﻠﻴﺔ )‪ (Utilities‬وﻋﻨﺎﺻﺮ ﺗﻮﻟﻴﺪ اﻹﺷﺎرات )‪(Generation‬‬

‫اﻟﺸﻜﻞ‪ 15-6‬ﻣﻜﺘﺒﺔ ﻋﻨﺎﺻﺮ اﻟﺘﺤﻜﻢ اﻟﺮﻗﻤﻲ اﳋﻄﻲ واﻟﻼﺧﻄﻲ )‪(Control‬‬

‫اﻟﺸﻜﻞ‪ 16-6‬ﻣﻜﺘﺒﺔ اﻟﻌﻨﺎﺻﺮ اﻟﺮﻳﺎﺿﻴﺔ اﳌﺘﻘﺪﻣﺔ )‪(High Throughput Math‬‬

‫‪319‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 Designing The Laboratory Experiments | ‫ﺗﺼﻤﻴﻢ اﻟﺘﺠﺎرب اﳌﺨﱪﻳﺔ‬

.FPGA‫ ﻣﻜﺘﺒﺔ اﻟﺘﻌﺎﻣﻞ ﻣﻊ اﻷﻗﻄﺎب اﻟﻔﻴﺰﻳﺎﺋﻴﺔ ﻟﺸﺮﳛﺔ اﻟـ‬17-6‫اﻟﺸﻜﻞ‬

(Synchronization) ‫ ﻣﻜﺘﺒﺔ اﳌﻘﺎﻃﻌﺎت وﻋﻨﺎﺻﺮ اﻟﺘﻮاﻗﺖ‬18-6‫اﻟﺸﻜﻞ‬

(Interfacing) FPGA‫ ﻋﻠﻰ اﳊﺎﺳﺐ ﻟﻠﻮﻇﺎﺋﻒ ﻋﻠﻰ ﺷﺮﳛﺔ اﻟـ‬GUI ‫ ﻣﻜﺘﺒﺔ إﻧﺸﺎء واﺟﻬﺎت‬19-6‫اﻟﺸﻜﻞ‬

.20-6‫إن ﻋﻤﻠﻴﺔ ﲢﻮﻳﻞ اﳌﺨﻄﻂ اﻟﺮﺳﻮﻣﻲ إﱃ ﻣﻠﻒ ﺑﺮﳎﻲ ﺗﺘﻢ ﻣﻦ ﺧﻼل ﺛﻼث ﻣﺮاﺣﻞ ﻣﻮﺿﺤﺔ ﻋﻠﻰ اﻟﺸﻜﻞ‬

LabVIEW VI VHDL Bitfile

•LabVIEW FPGA •Xilinx Compiler •FPGA Target

LabVIEW FPGA ‫ ﰲ اﻟﺒﻴﺌﺔ‬FPGA‫ ﻣﻨﻬﺠﻴﺔ ﺗﻮﻟﻴﺪ اﳌﻠﻒ اﻟﱪﳎﻲ ﻟﺸﺮﳛﺔ اﻟـ‬20-6‫اﻟﺸﻜﻞ‬

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‫‪26‬‬ ‫اﻟﻔﺼﻞ اﻟﺴﺎدس | ‪Chapter 6‬‬

‫إن ﻋﻤﻠﻴﺔ ﺗﻮﻟﻴﺪ اﳌﻠﻒ اﻟﱪﳎﻲ ﺗﺘﻢ ﺑﺸﻜﻞ آﱄ ﺣﻴﺚ أن ﻫﻨﺎك اﻟﻌﺪﻳﺪ ﻣﻦ اﳌﺮاﺣﻞ اﳌﺮﻫﻘﺔ ﻳﺘﻢ ﺗﻨﻔﻴﺬﻫﺎ ﺑﺸﻜﻞ ﻣﺆﲤﺖ‪ ،‬ﻛﻤﺎ ﰲ اﳌﺮﺣﻠﺔ اﻟﺜﺎﻧﻴﺔ‬
‫)‪ (VHDL‬واﻟﱵ ﺗﺘﻀﻤﻦ ﺛﻼث ﻣﺮاﺣﻞ ﺗﺘﻢ ﺑﺸﻜﻞ آﱄ وﻫﻲ‪:‬‬

‫‪ -‬اﻟﱰﲨﺔ )‪ :(Translation‬ﺗﻮﻟﻴﺪ ﺑﺮﻧﺎﻣﺞ اﻟـ‪ VHDL‬ﺑﻨﺎءً ﻋﻠﻰ اﻟﻘﻴﻮد اﻟﺰﻣﻨﻴﺔ واﻧﺘﻘﺎل اﻹﺷﺎرات‪.‬‬
‫‪ -‬ﲢﻘﻴﻖ اﻷﻣﺜﻠﻴﺔ )‪ :(Optimization‬ﲢﻠﻴﻞ اﻟﱪﻧﺎﻣﺞ اﳌﻮﻟﺪ وﲣﻔﻴﺾ ﻋﺪد اﳋﻼﻳﺎ اﳌﻨﻄﻘﻴﺔ اﳌﺴﺘﺨﺪﻣﺔ‪.‬‬
‫‪ -‬اﻟﱰﻛﻴﺐ )‪ :(Synthesis‬وﻫﻮ ﺗﻌﲔ اﳋﻼﻳﺎ اﳌﻨﻄﻘﻴﺔ واﻟﻮﺻﻼت ﻓﻴﻤﺎ ﺑﻴﻨﻬﺎ واﻟﺘﺤﻘﻖ ﻣﻦ اﻷزﻣﻨﺔ‪.‬‬

‫إن ﻛﻞ ﻣﺎ ﳛﺘﺎج إﻟﻴﻪ ﻫﻮ ﺑﻨﺎء اﳌﺨﻄﻂ اﻟﺮﺳﻮﻣﻲ ﻟﻠﺘﻄﺒﻴﻖ وﻣﻦ ﰒ ﺗﻮﻟﻴﺪ اﳌﻠﻒ اﻟﱪﳎﻲ ﻣﻦ ﺧﻼل أﻣﺮ واﺣﺪ ﻓﻘﻂ‪.‬‬

‫ﰲ ﺑﻌﺾ اﻟﺘﻄﺒﻴﻘﺎت رﲟﺎ ﳛﺘﺎج إﱃ ﺑﻨﺎء واﺟﻬﺔ ﻣﺮﺋﻴﺔ ﻟﻠﺮﺑﻂ ﻣﻊ اﳊﺎﺳﺐ‪ ،‬ﻫﺬﻩ اﻟﻮاﺟﻬﺔ ﺗﺪﻋﻰ ﺑـ”‪ ،”Host VI‬ﺣﻴﺚ ﻳﺘﻢ ﻣﻦ ﺧﻼﳍﺎ‬
‫اﻟﺘﺤﻜﻢ ﺑﺎﻟﻮﻇﺎﺋﻒ واﻟﺒﺎراﻣﱰات ﻋﻠﻰ ﺷﺮﳛﺔ اﻟـ‪ FPGA‬وﻛﺬﻟﻚ ﻳﺘﻢ إرﺳﺎل ﺑﺎراﻣﱰات اﳌﻌﺎﳉﺔ ﻣﻦ ﺷﺮﳛﺔ اﻟـ‪ FPGA‬إﱃ اﳊﺎﺳﺐ‪ .‬ﳐﻄﻂ‬
‫اﻟﺘﻄﻮﻳﺮ اﻟﻜﺎﻣﻞ ﻣﻮﺿﺢ ﻋﻠﻰ اﻟﺸﻜﻞ‪.21-6‬‬

‫‪Create FPGA‬‬ ‫‪Test the VI‬‬ ‫‪Compile VI‬‬ ‫‪Create Host‬‬

‫‪VI‬‬ ‫‪on PC‬‬ ‫‪to FPGA‬‬ ‫‪VI‬‬

‫اﻟﺸﻜﻞ‪ 21-6‬ﻣﺮاﺣﻞ ﺗﺼﻤﻴﻢ ﺗﻄﺒﻴﻖ ﰲ اﻟﺒﻴﺌﺔ ‪LabVIEW FPGA‬‬

‫إن اﳌﻨﻬﺠﻴﺔ اﻟﻌﻤﻠﻴﺔ ﻟﺘﻨﻔﻴﺬ اﻟﺘﺠﺮﺑﺔ ﺳﺘﺘﻢ وﻓﻘﺎً ﻻﺳﱰاﺗﻴﺠﻴﺔ اﳌﺨﺘﱪ اﻟﺘﻄﺒﻴﻘﻲ )‪ (Hands-on Lab‬وﻓﻘﺎً ﻟﻠﺸﻜﻞ‪ ،22-6‬ﺣﻴﺚ ﻳﺘﻢ ﰲ اﳌﺮﺣﻠﺔ‬
‫اﻷوﱃ ﺗﻘﺪﱘ اﻻﻋﺘﺒﺎرات واﳌﺒﺎدئ اﻷﺳﺎﺳﻴﺔ ﻟﻠﺘﺠﺮﺑﺔ )‪ ،(Concepts‬ﰒ ﺗﻄﺒﻴﻖ ﻫﺬﻩ اﻻﻋﺘﺒﺎرات ﻟﺒﻨﺎء اﻟﺘﺠﺮﺑﺔ ﺑﺎﺳﺘﺨﺪام اﳊﺎﺳﺐ )‪(CAD‬‬
‫ﰲ اﻟﺒﻴﺌﺔ ‪ ،LabVIEW‬وﺑﻌﺪﻫﺎ ﻳﺘﻢ ﺗﺸﻐﻴﻞ وﳏﺎﻛﺎة اﻟﺘﻄﺒﻴﻖ )‪ (Simulate‬ﰲ اﻟﺒﻴﺌﺔ ‪ ،LabVIEW‬وﻣﻦ ﰒ اﳌﺮﺣﻠﺔ اﻷﺧﲑة وﻫﻲ ﲢﻤﻴﻞ‬
‫اﻟﱪﻧﺎﻣﺞ وﲢﻠﻴﻞ ﺳﻠﻮﻛﻪ ﻋﻠﻰ اﻟﻜﻴﺎن اﻟﺼﻠﺐ )ﺷﺮﳛﺔ اﻟـ‪.(FPGA‬‬

‫‪Concepts‬‬

‫‪Express to‬‬ ‫‪Express to SW‬‬

‫)‪HW (FPGA‬‬ ‫)‪(LabVIEW‬‬

‫‪SW‬‬
‫‪Simulate/Debug‬‬

‫‪LabVIEW‬‬ ‫اﻟﺸﻜﻞ‪ 22-6‬ﻣﻨﻬﺠﻴﺔ اﳌﺨﱪ اﻟﺘﻄﺒﻴﻘﻲ )‪ (Hands-on‬ﻟﻠﺘﺠﺎرب ﰲ اﻟﺒﻴﺌﺔ‬

‫‪321‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Designing The Laboratory Experiments‬‬ ‫ﺗﺼﻤﻴﻢ اﻟﺘﺠﺎرب اﳌﺨﱪﻳﺔ |‬

‫ﻣﻨﻬﺠﻴﺔ إﻋﺪاد اﻟﺘﺠﺎرب اﻟﻤﺨﺒﺮﻳﺔ )‪:(Laboratory Experiments Design Methodology‬‬ ‫‪7-6‬‬

‫ﻓﻴﻤﺎ ﻳﻠﻲ ﺳﻨﻘﺪم أﻣﺜﻠﺔً ﻣﻨﻬﺠﻴﺔً ﻋﻦ أﺳﻠﻮب إﻋﺪاد دﻟﻴﻞ اﻟﺘﺠﺎرب اﳌﺨﱪﻳﺔ وﻓﻘﺎً ﻟﻠﻤﻨﻬﺠﻴﺔ اﻟﱵ ﰎ وﺿﻌﻬﺎ ﰲ اﻟﻔﺼﻞ اﳋﺎﻣﺲ‪ ،‬وﺳﻨﻘﺼﺮ ﰲ‬
‫ﻫﺬﻩ اﻷﻃﺮوﺣﺔ ﻋﻠﻰ ﲡﺮﺑﺔ واﺣﺪة ﻓﻘﻂ‪ .‬إن اﻟﺴﺒﺐ ﰲ ﻫﺬا اﻻﻗﺘﺼﺎر ﻳﻌﻮد إﱃ أن اﻟﻐﺎﻳﺔ ﻟﻴﺴﺖ ﰲ اﻟﻜﻢ اﻟﻌﺪدي‪ ،‬وإﳕﺎ ﰲ اﳌﻨﻬﺠﻴﺔ اﻟﻨﻮﻋﻴﺔ‬
‫اﻟﻌ ْﻮد إﻟﻴﻬﺎ ﻻﺣﻘﺎً ﻋﻨﺪ ﺗﻘﺪﳝﻬﺎ ﻛﻤﻘﺮر ﻋﻤﻠﻲ ﳐﱪي‪ ،‬ﻛﻤﺎ أن اﻟﺼﻔﺤﺎت ﺗﻀﻴﻖ ﻋﻠﻴﻨﺎ ﺑﻌﺪدﻫﺎ‪ ،‬وﱂ ﻳﻌﺪ ﻣﻦ ﻣﺘﺴﻊ‬
‫‪ -‬اﻟﺘﺠﺎرب اﻷﺧﺮى ﳝﻜﻦ َ‬
‫ﻟﻠﻤﺰﻳﺪ‪.‬‬

‫‪ 1-7-6‬اﻟﺘﺠﺮﺑﺔ اﻷوﱃ‪ :‬اﻟﺘﻌﺎﻣﻞ ﻣﻊ أﻗﻄﺎب اﻟﺪﺧﻞ واﳋﺮج )‪:(Exp.1: Dealing with Input-Output Pins‬‬
‫ﺗﺴﻠﺴﻞ اﻟﻌﻤﻠﻴﺎت واﳌﻬﺎم ﺧﻼل اﻟﺘﺠﺮﺑﺔ ﺳﻴﺘﻢ ﻋﻠﻰ اﻟﺸﻜﻞ اﻟﺘﺎﱄ‪:‬‬

‫‪ 1-1-7-6‬ﻣﻘﺪﻣﺔ ﺣﻮل اﻟﺘﺠﺮﺑﺔ )‪:(Introduction about the Experiment‬‬

‫ﺳﻴﺘﻢ ﰲ ﻫﺬﻩ اﻟﺘﺠﺮﺑﺔ رﺑﻂ ﳎﻤﻮﻋﺔ ﺛﻨﺎﺋﻴﺎت ﺿﻮﺋﻴﺔ وﻣﻔﺎﺗﻴﺢ إﱃ أﻗﻄﺎب ﺷﺮﳛﺔ اﻟـ‪ ،FPGA‬ﲝﻴﺚ ﻳﺘﻢ اﺳﺘﺜﻤﺎر أﻗﻄﺎب ﺷﺮﳛﺔ اﻟـ‪FPGA‬‬
‫ﻛﺄﻗﻄﺎب دﺧﻞ وﺧﺮج‪ .‬ﻛﺬﻟﻚ ﺳﻨﻘﻮم ﺑﺮﺑﻂ ‪....‬‬

‫‪ 2-1-7-6‬اﳍﺪف ﻣﻦ اﻟﺘﺠﺮﺑﺔ )‪:(The Experiment Objective‬‬

‫ﺳﻮف ﺗﺘﻌﻠﻢ ﻣﻦ ﺧﻼل ﻫﺬﻩ اﻟﺘﺠﺮﺑﺔ اﳌﻮﺿﻮﻋﺎت اﻟﺘﺎﻟﻴﺔ‪:‬‬

‫‪ ‬إﻧﺸﺎء ﻣﺸﺮوع ﺟﺪﻳﺪ ﰲ اﻟﺒﻴﺌﺔ ‪.LabVIEW‬‬

‫‪ ‬إﺿﺎﻓﺔ ﻟﻮﺣﺔ اﻟﺘﻄﻮﻳﺮ ‪ Spartan-3E‬إﱃ واﺟﻬﺔ اﳌﺸﺮوع‪.‬‬
‫‪ ‬إﻧﺸﺎء أﻗﻄﺎب دﺧﻞ وﺧﺮج ﻟﺸﺮﳛﺔ اﻟـ‪.FPGA‬‬
‫‪ ‬اﻟﺘﻌﺎﻣﻞ ﻣﻊ اﳊﻠﻘﺎت وﻋﻨﺎﺻﺮ اﻟﺘﻮﻗﻴﺖ‪.‬‬
‫‪ ‬ﺗﺮﲨﺔ اﻟﺘﻄﺒﻴﻖ‪ ،‬ﳏﺎﻛﺎﺗﻪ‪ ،‬ﰒ ﺑﺮﳎﺘﻪ ﻋﻠﻰ ﺷﺮﳛﺔ اﻟـ‪.FPGA‬‬

‫‪ 3-1-7-6‬اﳌﺨﻄﻂ اﻟﻨﻈﺮي وﻋﻨﺎﺻﺮ اﻟﻜﻴﺎن اﻟﺼﻠﺐ )‪:(The Schematic Diagram & Hardware‬‬

‫اﻟﺸﻜﻞ‪ 23-6‬ﳐﻄﻂ اﻟﺘﻮﺻﻴﻞ ﻟﻠﺜﻨﺎﺋﻴﺎت اﻟﻀﻮﺋﻴﺔ واﳌﻔﺎﺗﻴﺢ اﻻﻧﺰﻻﻗﻴﺔ واﻟﻠﺤﻈﻴﺔ وﻣﻔﺘﺎح اﳌﻮﺿﻊ‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪322‬‬
‫‪26‬‬ ‫اﻟﻔﺼﻞ اﻟﺴﺎدس | ‪Chapter 6‬‬

‫اﻟﺸﻜﻞ‪ 23-6‬ﻳﺒﲔ ﳐﻄﻂ ﺗﻮﺻﻴﻞ اﻟﺜﻨﺎﺋﻴﺎت اﻟﻀﻮﺋﻴﺔ )‪ (LED0-LED7‬واﳌﻔﺎﺗﻴﺢ اﻻﻧﺰﻻﻗﻴﺔ )‪ (SW0-SW3‬واﳌﻔﺎﺗﻴﺢ اﻟﻠﺤﻈﻴﺔ )‪S0-‬‬

‫‪ (S3‬وﻣﻔﺘﺎح اﳌﻮﺿﻊ اﻟﺪوار )‪ (Rotary Encoder‬ﻣﻊ أﻗﻄﺎب ﺷﺮﳛﺔ اﻟـ‪.FPGA‬‬

‫اﳌﻔﺎﺗﻴﺢ اﻻﻧﺰﻻﻗﻴﺔ )‪:(Slid Switches‬‬

‫ﺗﺘﻮﺿﻊ اﳌﻔﺎﺗﻴﺢ اﻻﻧﺰﻻﻗﻴﺔ اﻷرﺑﻌﺔ )‪ (SW3-SW0‬ﰲ اﻟﺰاوﻳﺔ اﻟﻴﻤﲎ اﻟﺴﻔﻠﻰ ﻣﻦ اﻟﻠﻮﺣﺔ‪ ،‬ﺣﻴﺚ ﻳﺘﻮﺿﻊ ‪ SW0‬ﰲ أﻗﺼﻰ اﻟﻴﻤﲔ‪ .‬ﻋﻨﺪﻣﺎ‬
‫ﺗﻜﻮن وﺿﻌﻴﺔ اﳌﻔﺘﺎح ﻟﻸﻋﻠﻰ )‪ ،(On‬ﻓﺈن اﳌﻔﺘﺎح ﻳﻘﻮم ﺑﻮﺻﻞ ﺟﻬﺪ ‪ LVTTL=3.3v‬إﱃ ﻗﻄﺐ ﺷﺮﳛﺔ اﻟـ‪ ،FPGA‬وﻋﻨﺪﻣﺎ ﺗﻜﻮن وﺿﻌﻴﺔ‬
‫اﳌﻔﺘﺎح ﻟﻸﺳﻔﻞ )‪ ،(Off‬ﻓﺈن اﳌﻔﺘﺎح ﺳﻴﻘﻮم ﺑﻮﺻﻞ ﻗﻄﺐ اﻟﺸﺮﳛﺔ إﱃ ‪.GND‬‬

‫‪NET‬‬ ‫">‪"SW<0‬‬ ‫‪LOC‬‬ ‫=‬ ‫"‪"L13‬‬ ‫|‬ ‫‪IOSTANDARD‬‬ ‫=‬ ‫‪LVTTL‬‬ ‫|‬ ‫‪PULLUP‬‬ ‫;‬
‫‪NET‬‬ ‫">‪"SW<1‬‬ ‫‪LOC‬‬ ‫=‬ ‫"‪"L14‬‬ ‫|‬ ‫‪IOSTANDARD‬‬ ‫=‬ ‫‪LVTTL‬‬ ‫|‬ ‫‪PULLUP‬‬ ‫;‬
‫‪NET‬‬ ‫">‪"SW<2‬‬ ‫‪LOC‬‬ ‫=‬ ‫"‪"H18‬‬ ‫|‬ ‫‪IOSTANDARD‬‬ ‫=‬ ‫‪LVTTL‬‬ ‫|‬ ‫‪PULLUP‬‬ ‫;‬
‫‪NET‬‬ ‫">‪"SW<3‬‬ ‫‪LOC‬‬ ‫=‬ ‫"‪"N17‬‬ ‫|‬ ‫‪IOSTANDARD‬‬ ‫=‬ ‫‪LVTTL‬‬ ‫|‬ ‫‪PULLUP‬‬ ‫;‬

‫اﻟﺸﻜﻞ‪ 24-6‬ﺗﻮﺿﻊ اﳌﻔﺎﺗﻴﺢ اﻻﻧﺰﻻﻗﻴﺔ ﻋﻠﻰ ﻟﻮﺣﺔ اﻟﺘﻄﻮﻳﺮ وﺗﻌﺮﻳﻔﺎت اﻷﻗﻄﺎب‬

‫اﻟﺜﻨﺎﺋﻴﺎت اﻟﻀﻮﺋﻴﺔ )‪:(Discrete LEDs‬‬

‫ﺗﺘﻮﺿﻊ اﻟﺜﻨﺎﺋﻴﺎت اﻟﻀﻮﺋﻴﺔ اﻟﺴﺒﻌﺔ )‪ (LED7-LED0‬ﻓﻮق اﳌﻔﺎﺗﻴﺢ اﻻﻧﺰﻻﻗﻴﺔ‪ ،‬ﺣﻴﺚ ﻳﺘﻮﺿﻊ ‪ LED0‬ﰲ أﻗﺼﻰ اﻟﻴﻤﲔ‪ .‬اﻟﺜﻨﺎﺋﻴﺎت ﺗﻌﻤﻞ‬
‫ﻋﻨﺪ ﺗﻄﺒﻴﻖ ﺟﻬﺪ ﻣﻮﺟﺐ ”‪ “1‬ﻋﻠﻴﻬﺎ ﺣﻴﺚ أن أﺣﺪ أﻄﺎﻬﺑﺎ ﻣﻮﺻﻞ إﱃ ‪ GND‬واﻵﺧﺮ إﱃ ﻗﻄﺐ ﺷﺮﳛﺔ اﻟـ‪ FPGA‬ﻋﱪ ﻣﻘﺎوﻣﺔ ﲢﺪﻳﺪ‬
‫ﺗﻴﺎر ﻗﻴﻤﺘﻬﺎ ‪.390Ω‬‬

‫‪NET‬‬ ‫">‪"LED<7‬‬ ‫‪LOC‬‬ ‫=‬ ‫"‪"F09‬‬ ‫|‬ ‫‪IOSTANDARD‬‬ ‫=‬ ‫‪LVTTL‬‬ ‫|‬ ‫‪SLEW‬‬ ‫=‬ ‫‪SLOW‬‬ ‫|‬ ‫‪DRIVE‬‬ ‫=‬ ‫‪8‬‬ ‫;‬
‫‪NET‬‬ ‫">‪"LED<6‬‬ ‫‪LOC‬‬ ‫=‬ ‫"‪"E09‬‬ ‫|‬ ‫‪IOSTANDARD‬‬ ‫=‬ ‫‪LVTTL‬‬ ‫|‬ ‫‪SLEW‬‬ ‫=‬ ‫‪SLOW‬‬ ‫|‬ ‫‪DRIVE‬‬ ‫=‬ ‫‪8‬‬ ‫;‬
‫‪NET‬‬ ‫">‪"LED<5‬‬ ‫‪LOC‬‬ ‫=‬ ‫"‪"D11‬‬ ‫|‬ ‫‪IOSTANDARD‬‬ ‫=‬ ‫‪LVTTL‬‬ ‫|‬ ‫‪SLEW‬‬ ‫=‬ ‫‪SLOW‬‬ ‫|‬ ‫‪DRIVE‬‬ ‫=‬ ‫‪8‬‬ ‫;‬
‫‪NET‬‬ ‫">‪"LED<4‬‬ ‫‪LOC‬‬ ‫=‬ ‫"‪"C11‬‬ ‫|‬ ‫‪IOSTANDARD‬‬ ‫=‬ ‫‪LVTTL‬‬ ‫|‬ ‫‪SLEW‬‬ ‫=‬ ‫‪SLOW‬‬ ‫|‬ ‫‪DRIVE‬‬ ‫=‬ ‫‪8‬‬ ‫;‬
‫‪NET‬‬ ‫">‪"LED<3‬‬ ‫‪LOC‬‬ ‫=‬ ‫"‪"F11‬‬ ‫|‬ ‫‪IOSTANDARD‬‬ ‫=‬ ‫‪LVTTL‬‬ ‫|‬ ‫‪SLEW‬‬ ‫=‬ ‫‪SLOW‬‬ ‫|‬ ‫‪DRIVE‬‬ ‫=‬ ‫‪8‬‬ ‫;‬
‫‪NET‬‬ ‫">‪"LED<2‬‬ ‫‪LOC‬‬ ‫=‬ ‫"‪"E11‬‬ ‫|‬ ‫‪IOSTANDARD‬‬ ‫=‬ ‫‪LVTTL‬‬ ‫|‬ ‫‪SLEW‬‬ ‫=‬ ‫‪SLOW‬‬ ‫|‬ ‫‪DRIVE‬‬ ‫=‬ ‫‪8‬‬ ‫;‬
‫‪NET‬‬ ‫">‪"LED<1‬‬ ‫‪LOC‬‬ ‫=‬ ‫"‪"E12‬‬ ‫|‬ ‫‪IOSTANDARD‬‬ ‫=‬ ‫‪LVTTL‬‬ ‫|‬ ‫‪SLEW‬‬ ‫=‬ ‫‪SLOW‬‬ ‫|‬ ‫‪DRIVE‬‬ ‫=‬ ‫‪8‬‬ ‫;‬
‫‪NET‬‬ ‫">‪"LED<0‬‬ ‫‪LOC‬‬ ‫=‬ ‫"‪"F12‬‬ ‫|‬ ‫‪IOSTANDARD‬‬ ‫=‬ ‫‪LVTTL‬‬ ‫|‬ ‫‪SLEW‬‬ ‫=‬ ‫‪SLOW‬‬ ‫|‬ ‫‪DRIVE‬‬ ‫=‬ ‫‪8‬‬ ‫;‬

‫اﻟﺸﻜﻞ‪ 25-6‬ﺗﻮﺿﻊ اﻟﺜﻨﺎﺋﻴﺎت اﻟﻀﻮﺋﻴﺔ ﻋﻠﻰ ﻟﻮﺣﺔ اﻟﺘﻄﻮﻳﺮ وﺗﻌﺮﻳﻔﺎت اﻷﻗﻄﺎب‬

‫‪323‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Designing The Laboratory Experiments‬‬ ‫ﺗﺼﻤﻴﻢ اﻟﺘﺠﺎرب اﳌﺨﱪﻳﺔ |‬

‫اﳌﻔﺎﺗﻴﺢ اﻟﻠﺤﻈﻴﺔ )‪:(Push Button‬‬

‫ﺗﺘﻮﺿﻊ اﳌﻔﺎﺗﻴﺢ اﻟﻠﺤﻈﻴﺔ اﻷرﺑﻌﺔ ﰲ اﻟﺰاوﻳﺔ اﻟﻴﺴﺮى اﻟﺴﻔﻠﻰ ﻣﻦ اﻟﻠﻮﺣﺔ وﻫﻲ ﻣﻮزﻋﺔ ﻋﻠﻰ اﻻﲡﺎﻫﺎت اﻷرﺑﻌﺔ ﺣﻮل ﻣﻔﺘﺎح اﳌﻮﺿﻊ اﻟﺪوار‬
‫)‪ ،(Encoder‬وﻗﺪ ﰎ ﺗﺴﻤﻴﺘﻬﺎ ﲝﻴﺚ أن اﳌﻔﺘﺎح اﻟﻴﻤﻴﲏ ﻫﻮ ”‪ “BTN_EAST‬واﳌﻔﺘﺎح اﻟﻴﺴﺎري ﻫﻮ ”‪ “BTN_WEST‬واﳌﻔﺘﺎح‬
‫اﻟﻌﻠﻮي ”‪ “BTN_NORTH‬واﳌﻔﺘﺎح اﻟﺴﻔﻠﻲ ”‪ “BTN_SOUTH‬اﻟﺬي ﻳﺴﺘﺨﺪم أﻳﻀﺎً ﻟﺘﺼﻔﲑ اﻟﱪﻧﺎﻣﺞ ﰲ ﺑﻌﺾ اﻟﺘﻄﺒﻴﻘﺎت‪.‬‬

‫ﻋﻨﺪ اﻟﻀﻐﻂ ﻋﻠﻰ أﺣﺪ اﳌﻔﺎﺗﻴﺢ ﻓﺈﻧﻪ ﻳﺘﻢ وﺻﻞ ﺟﻬﺪ ‪ LVTTL=3.3v‬إﱃ ﻗﻄﺐ ﺷﺮﳛﺔ اﻟـ‪ ،FPGA‬واﻟﺬي ﻳﺆدي إﱃ ﺗﻄﺒﻴﻖ ﺟﻬﺪ ”‪“1‬‬

‫ﻋﻠﻰ ﻗﻄﺐ اﻟﺸﺮﳛﺔ‪ .‬ﺑﺸﻜﻞ ﻣﻌﺎﻛﺲ ﻋﻨﺪﻣﺎ ﻳﺘﻢ ﲢﺮﻳﺮ اﳌﻔﺘﺎح ﺗﻘﻮم ﻣﻘﺎوﻣﺔ اﻟﺴﺤﺐ اﻟﺪاﺧﻠﻴﺔ ﻟﻘﻄﺐ اﻟﺸﺮﳛﺔ ﺑﺘﻄﺒﻴﻖ ﺟﻬﺪ ”‪ “0‬ﰲ ﻫﺬﻩ‬
‫اﳊﺎﻟﺔ‪ ،‬ﻟﺬا ﻻﺑﺪ ﻣﻦ ﺗﻔﻌﻴﻞ ﻣﻘﺎوﻣﺔ اﻟﺴﺤﺐ اﻟﺪاﺧﻠﻴﺔ )‪ .(Pull-down Resistor‬إن زﻣﻦ اﻟﻌﻄﺎﻟﺔ اﳌﻴﻜﺎﻧﻴﻜﻴﺔ ﻟﻠﻤﻔﺎﺗﻴﺢ اﻟﻠﺤﻈﻴﺔ ﻛﺒﲑ‬
‫ﻧﺴﺒﻴﺎً وﻗﺪ ﻳﺼﻞ إﱃ ‪ ،40mS‬ﻟﺬا ﻻﺑﺪ ﻣﻦ إﺿﺎﻓﺔ ﺣﻠﻘﺔ ﺗﺄﺧﲑ ﺑﺮﳎﻴﺔ‪.‬‬

‫اﻟﺸﻜﻞ‪ 26-6‬ﺗﻮﺻﻴﻞ اﳌﻔﺘﺎح اﻟﻠﺤﻈﻲ ﻣﻊ ﻗﻄﺐ ﺷﺮﳛﺔ اﻟـ‪ FPGA‬وﺗﻔﻌﻴﻞ ﻣﻘﺎوﻣﺔ اﻟﺴﺤﺐ اﻟﺪاﺧﻠﻴﺔ‬

‫‪NET‬‬ ‫‪"BTN_EAST" LOC‬‬ ‫=‬ ‫"‪"H13‬‬ ‫|‬ ‫‪IOSTANDARD‬‬ ‫=‬ ‫‪LVTTL‬‬ ‫|‬ ‫‪PULLDOWN‬‬ ‫;‬
‫‪NET‬‬ ‫‪"BTN_NORTH" LOC‬‬ ‫=‬ ‫"‪"V04‬‬ ‫|‬ ‫‪IOSTANDARD‬‬ ‫=‬ ‫‪LVTTL‬‬ ‫|‬ ‫‪PULLDOWN‬‬ ‫;‬
‫‪NET‬‬ ‫‪"BTN_SOUTH" LOC‬‬ ‫=‬ ‫"‪"K17‬‬ ‫|‬ ‫‪IOSTANDARD‬‬ ‫=‬ ‫‪LVTTL‬‬ ‫|‬ ‫‪PULLDOWN‬‬ ‫;‬
‫‪NET‬‬ ‫‪"BTN_WEST" LOC‬‬ ‫=‬ ‫"‪"D18‬‬ ‫|‬ ‫‪IOSTANDARD‬‬ ‫=‬ ‫‪LVTTL‬‬ ‫|‬ ‫‪PULLDOWN‬‬ ‫;‬
‫‪NET‬‬ ‫‪"ROT_CENTER"LOC‬‬ ‫=‬ ‫"‪"V16‬‬ ‫|‬ ‫‪IOSTANDARD‬‬ ‫=‬ ‫‪LVTTL‬‬ ‫|‬ ‫‪PULLDOWN‬‬ ‫;‬
‫‪NET‬‬ ‫‪"ROT_A‬‬ ‫‪" LOC‬‬ ‫=‬ ‫"‪"K18‬‬ ‫|‬ ‫‪IOSTANDARD‬‬ ‫=‬ ‫‪LVTTL‬‬ ‫|‬ ‫‪PULLUP‬‬ ‫;‬
‫‪NET‬‬ ‫‪"ROT_B‬‬ ‫‪" LOC‬‬ ‫=‬ ‫"‪"G18‬‬ ‫|‬ ‫‪IOSTANDARD‬‬ ‫=‬ ‫‪LVTTL‬‬ ‫|‬ ‫‪PULLUP‬‬ ‫;‬

‫اﻟﺸﻜﻞ‪ 27-6‬ﺗﻮﺿﻊ اﳌﻔﺎﺗﻴﺢ اﻻﻧﺰﻻﻗﻴﺔ وﻣﻔﺘﺎح اﳌﻮﺿﻊ ﻋﻠﻰ ﻟﻮﺣﺔ اﻟﺘﻄﻮﻳﺮ وﺗﻌﺮﻳﻔﺎت اﻷﻗﻄﺎب‬

‫ﻣﻔﺘﺎح اﳌﻮﺿﻊ اﻟﺪوار )‪:(Rotary Push Button Encoder‬‬

‫ﻳﺘﻮﺿﻊ ﻫﺬا اﳌﻔﺘﺎح ﰲ وﺳﻂ اﳌﻔﺎﺗﻴﺢ اﻟﻠﺤﻈﻴﺔ اﻷرﺑﻌﺔ وﳝﻜﻦ ﺗﺪوﻳﺮﻩ ﳝﻴﻨﺎً وﻳﺴﺎراً وﺿﻐﻄﻪ ﻟﻸﺳﻔﻞ وﻫﻮ وﳝﻠﻚ ﺛﻼﺛﺔ ﳐﺎرج‪ :‬اﺛﻨﺎن ﻣﻨﻬﻤﺎ‬
‫ﻟﻠﻤﻮﺿﻊ )‪ ،“Shaft Encoder” (ROT_A – ROT_B‬واﻟﺜﺎﻟﺚ ﻫﻮ ﻋﺒﺎرة ﻋﻦ ﻣﻔﺘﺎح ﺿﻐﻂ ﳊﻈﻲ )‪،(ROT_CENTER‬‬
‫وﺑﺎﻟﺘﺎﱄ ﻓﺈن ﻣﻔﺘﺎح اﳌﻮﺿﻊ اﻟﺪوار ﳝﻠﻚ وﻇﻴﻔﺘﲔ‪ :‬ﻛﻤﻔﺘﺎح ﺿﻐﻂ ﳊﻈﻲ وﻫﻮ ﳛﺘﺎج إﱃ ﻣﻘﺎوﻣﺔ ﺳﺤﺐ داﺧﻠﻴﺔ )اﻟﺸﻜﻞ‪ ،(28-6‬أو‬
‫ﻛﺤﺴﺎس ﻣﻮﺿﻊ دوار )‪ (Shaft Encoder‬وﻫﻮ ﳛﺘﺎج إﱃ ﻣﻘﺎوﻣﱵ رﻓﻊ داﺧﻠﻴﺘﲔ‪.‬‬

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‫‪26‬‬ ‫اﻟﻔﺼﻞ اﻟﺴﺎدس | ‪Chapter 6‬‬

‫اﻟﺸﻜﻞ‪ 28-6‬ﺗﻮﺻﻴﻞ ﻣﻔﺘﺎح اﻟﻀﻐﻂ اﻟﻠﺤﻈﻲ ﻣﻊ ﻗﻄﺐ ﺷﺮﳛﺔ اﻟـ‪ FPGA‬وﺗﻔﻌﻴﻞ ﻣﻘﺎوﻣﺔ اﻟﺴﺤﺐ اﻟﺪاﺧﻠﻴﺔ‬

‫ﺑﺸﻜﻞ ﻣﺒﺪﺋﻲ ﳝﻜﻦ ﲤﺜﻴﻞ اﻟﻘﺮص اﻟﺪوار ﰲ ﺣﺴﺎس اﳌﻮﺿﻊ اﻟﺪوار ﺑﻘﺮص ﳏﺪب ﳏﺎط ﲟﻔﺘﺎﺣﲔ ﳊﻈﻴﲔ )اﻟﺸﻜﻞ‪ ،(29-7‬ﰲ اﳊﺎﻟﺔ اﻷوﻟﻴﺔ‬
‫ﻋﻨﺪ ﺛﺒﺎت اﻟﻘﺮص ﻓﺈن ﻛﻼ اﳌﻔﺘﺎﺣﲔ ﻣﻐﻠﻘﲔ‪ ،‬ﻋﻨﺪ اﻟﺘﺪوﻳﺮ‪ ،‬واﻋﺘﻤﺎداً ﻋﻠﻰ اﳉﻬﺔ اﻟﱵ ﻳﺪور ﺑﺎ اﻟﻘﺮص‪ ،‬ﻓﺈن أﺣﺪ اﳌﻔﺎﺗﻴﺢ ﺳﻮف ﻳﻔﺘﺢ ﻗﺒﻞ‬
‫اﻵﺧﺮ ﰒ ﻳﺘﻢ اﻟﺘﺒﺪﻳﻞ ﰲ اﳊﻠﺔ وﻫﻜﺬا‪ ،‬وﻫﺬا ﺑﺪورﻩ ﻳﺆدي إﱃ ﺗﻮﻟﻴﺪ ﻗﻄﺎرﻳﻦ ﻣﻦ اﻟﻨﺒﻀﺎت ﻣﺰاﺣﲔ ﻋﻦ ﺑﻌﻀﻬﺎ ﺑﺰاوﻳﺔ ‪ 90‬درﺟﺔ‪.‬‬

‫اﻟﺸﻜﻞ‪ 29-6‬ﲤﺜﻴﻞ ﻟﻠﺪارة اﻟﺪاﺧﻠﻴﺔ ﳊﺴﺎس اﳌﻮﺿﻊ )‪(Shaft Encoder‬‬

‫اﻟﺸﻜﻞ‪ 30-6‬اﻟﻨﺒﻀﺎت اﳌﻮﻟﺪة ﻋﻠﻰ اﻟﻘﻄﺐ ‪ ROT_A‬واﻟﻘﻄﺐ ‪ ROT_B‬ﻋﻨﺪ اﻟﺘﺪوﻳﺮ ﻟﻠﻴﻤﲔ اﻟﻴﺴﺎر‬

‫إن ﻋﻤﻠﻴﺔ ﻓﻚ اﻟﺘﺸﻔﲑ ﻟﻠﻨﺒﻀﺎت اﳌﻮﻟﺪة ﻋﻠﻰ اﻟﻘﻄﺐ ‪ ROT_A‬واﻟﻘﻄﺐ ‪ ROT_B‬ﻋﻨﺪ اﻟﺘﺪوﻳﺮ ﺑﺴﻴﻄﺔ ﺟﺪاً وﺳﻮف ﻧﺄﰐ ﻋﻠﻰ‬
‫ﺗﻔﺼﻴﻠﻬﺎ ﻻﺣﻘﺎً‪ ،‬إﻻ أﻧﻪ ﻣﻦ اﳌﻬﻢ اﻷﺧﺬ ﺑﻌﲔ اﻻﻋﺘﺒﺎر أﺛﺮ ﺿﺠﻴﺞ اﻟﺘﺒﺪﻳﻞ اﳌﻴﻜﺎﻧﻴﻜﻲ )‪ (Chatter‬واﻟﺬي ﳝﻜﻦ أن ﻳﻮﻟﺪ ﺣﺮﻛﺔ إﺿﺎﻓﻴﺔ أو‬
‫ﺣﱴ ﻳﺒﺪل ﺟﻬﺔ اﳊﺮﻛﺔ ﻛﻤﺎ ﻫﻮ ﻣﺒﲔ ﻋﻠﻰ اﻟﺸﻜﻞ‪.31-6‬‬

‫اﻟﺸﻜﻞ‪ 31-6‬أﺛﺮ ﺿﺠﻴﺞ اﻟﺘﺒﺪﻳﻞ اﳌﻴﻜﺎﻧﻴﻜﻲ أﺛﻨﺎء دوران ﻗﺮص اﳌﻮﺿﻊ‬

‫‪325‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Designing The Laboratory Experiments‬‬ ‫ﺗﺼﻤﻴﻢ اﻟﺘﺠﺎرب اﳌﺨﱪﻳﺔ |‬

‫‪ 4-1-7-6‬ﻣﻘﺪﻣﺔ ﻧﻈﺮﻳﺔ )‪:(Background Theory‬‬

‫‪ 5-1-7-6‬ﺗﺪﻓﻖ اﻟﺒﻴﺎﻧﺎت ﰲ داﺧﻞ ﺷﺮﳛﺔ اﻟـ‪:(Data Flow within the FPGA) FPGA‬‬

‫إن اﻟﺴﺆال اﻟﺬي ﻗﺪ ﻳﺘﺒﺎدر إﱃ اﻷذﻫﺎن ﻫﻮ‪ :‬ﻛﻴﻒ ﻳﺘﻢ ﲢﻮﻳﻞ اﻟﱪﻧﺎﻣﺞ ﻣﻦ ﳐﻄﻂ ‪ LabVIEW‬إﱃ ﺷﺮﳛﺔ اﻟـ‪FPGA‬؟‬

‫إن اﻟﱪﻧﺎﻣﺞ ‪ LabVIEW FPGA‬ﻳﺴﺘﺨﺪم ﺛﻼث ﻋﻨﺎﺻﺮ ﻟﻴﺤﺎﻓﻆ ﻋﻠﻰ ﺗﻨﻔﻖ اﻟﺒﻴﺎﻧﺎت ﺑﲔ اﻟﻌﻘﺪ ﰲ ﺑﻴﺌﺔ ‪LabVIEW‬؛ اﻟﻌﻨﺎﺻﺮ‬
‫ﻣﻮﺿﺤﺔ ﻋﻠﻰ اﻟﺸﻜﻞ‪ 32-6‬وﺗﺘﻀﻤﻦ‪The Enable ،Synchronization ،The Corresponding Logic Function :‬‬

‫‪.Chen‬‬

‫”‪ “Not‬ﰲ ‪ LabVIEW FPGA‬وﻓﻘﺎً ﳌﻨﻬﺠﻴﺔ اﻟـ‪Dataflow‬‬ ‫اﻟﺸﻜﻞ‪ 32-6‬اﻟﻌﻨﺎﺻﺮ اﳌﻄﻠﻮﺑﺔ ﻟﺒﻨﺎء ﺑﻮاﺑﺔ‬

‫وﺑﺎﻟﺘﺎﱄ ﻓﺈن أي ﻋﻨﺼﺮ ﺳﻴﺤﺘﺎج إﱃ ﻗﻼب ﻣﺮﺗﺒﻂ ﺑﺎﻟﻮﻇﻴﻔﻴﺔ اﳌﻨﻄﻘﻴﺔ اﻷﺳﺎﺳﻴﺔ اﳌﺮاد ﺗﻨﻔﻴﺬﻫﺎ وﻗﻼب آﺧﺮ ﺧﺎص ﺑﺎﻟﺘﺰاﻣﻦ وﻗﻼب ﺛﺎﻟﺚ‬
‫ﻟﺘﻔﻌﻴﻞ اﻟﺴﻠﺴﻠﺔ‪ .‬ﻓﻤﺜﻼً وﻣﻦ أﺟﻞ اﻟﺪارة اﳌﺒﻴﻨﺔ ﻋﻠﻰ اﻟﺸﻜﻞ‪ 33-6‬واﻟﱵ ﺗﺘﺄﻟﻒ ﻣﻦ ﻋﻨﺼﺮ ﲢﻜﻢ ‪ Boolean‬وﺑﻮاﺑﺔ ‪ Not‬وﻗﻄﺐ ﺧﺮج‬
‫رﻗﻤﻲ‪ .‬إن ﻋﻨﺼﺮ اﻟﺘﺤﻜﻢ ‪ Boolean‬ﳝﻠﻚ ﻋﻨﺎﺻﺮ ﻣﻨﻄﻘﻴﺔ ﻣﺮﺗﺒﻄﺔ ﻣﻊ ﻣﺴﺠﻞ اﻟﺒﻴﺎﻧﺎت ﻟﺘﺤﺼﻴﻞ اﻟﺒﻴﺎﻧﺎت ﻣﻦ واﺟﻬﺔ اﻟﺘﻄﺒﻴﻖ‪ .‬اﻟﺒﻮاﺑﺔ‬
‫اﳌﻨﻄﻘﻴﺔ ‪ Not‬ﲤﻠﻚ ﻋﻨﺎﺻﺮ ﻣﻨﻄﻘﻴﺔ ﻣﺮﺗﺒﻄﺔ ﺑﻮﻇﻴﻔﺘﻬﺎ إﺿﺎﻓﺔً إﱃ ﻗﻼب ﺗﺰاﻣﻦ وﻗﻼب ﺗﻔﻌﻴﻞ اﻟﺴﻠﺴﻠﺔ‪ .‬اﳋﺮج اﻟﺮﻗﻤﻲ ﺑﺎﳌﺜﻞ ﳝﻠﻚ ﻗﻼب ﺗﺰاﻣﻦ‬
‫وﻗﻼب ﺗﻔﻌﻴﻞ اﻟﺴﻠﺴﻠﺔ‪.‬‬

‫اﻟﺸﻜﻞ‪ 33-6‬ﺗﺪﻓﻖ اﻟﺒﻴﺎﻧﺎت واﻟﺘﺰاﻣﻦ ﰲ ﺷﺮﳛﺔ اﻟـ‪FPGA‬‬

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‫‪26‬‬ ‫اﻟﻔﺼﻞ اﻟﺴﺎدس | ‪Chapter 6‬‬

‫ﻋﻨﺪﻣﺎ ﻳﺘﻢ ﺗﺸﻐﻴﻞ اﻟﱪﻧﺎﻣﺞ ﻓﺈﻧﻪ ﻳﺘﻢ ﺗﻌﻴﲔ اﻟﻘﻴﻤﺔ ”‪ “1‬ﻋﻠﻰ اﳋﻂ ”‪ “Enable‬وذﻟﻚ ﻟﺘﻔﻌﻴﻞ ﻗﻼب اﻟﺘﻮاﻗﺖ اﳌﺮﺗﺒﻂ ﺑﻌﻨﺼﺮ اﻟﺘﺤﻜﻢ‬
‫‪ ،Boolean‬وأﺛﻨﺎء ذﻟﻚ ﻳﺘﻢ ﺗﻄﺒﻴﻖ ﺟﺒﻬﺔ ﺻﺎﻋﺪة ﻋﻠﻰ ﺧﻂ اﻟـ‪ Clock‬واﻟﺬي ﻳﺆدي إﱃ ﻧﻘﻞ اﻟﺒﻴﺎﻧﺎت ﺧﻼل اﳌﺴﺠﻞ إﱃ اﻟﻘﻼب‪ .‬ﺧﻼل‬
‫اﳉﺒﻬﺔ اﻟﺼﺎﻋﺪة اﻟﺜﺎﻧﻴﺔ ﻟﻠـ‪ Clock‬ﻓﺈن ﻗﻼب اﻟﺘﻮاﻗﺖ اﳌﺮﺗﺒﻂ ﺑﺒﻮاﺑﺔ ‪ Not‬ﳝﺮر اﻟﻘﻴﻤﺔ اﳉﺪﻳﺪة‪ .‬وﻣﻊ ﻗﺪح اﳉﺒﺔ اﻟﺼﺎﻋﺪة اﻟﺜﺎﻟﺜﺔ ﻟﻠـ‪Clock‬‬

‫ﻓﺈﻧﻪ ﻳﺘﻢ ﺗﻄﺒﻴﻖ ”‪ “1‬ﻋﻠﻰ ﻗﻄﺐ اﻟﺘﻔﻌﻴﻞ ‪ En‬ﻟﻠﻘﻼب اﻟﺜﺎﻟﺚ وﻳﺆدي ذﻟﻚ إﱃ ﻇﻬﻮر اﻟﻘﻴﻤﺔ ﻋﻠﻰ ﻗﻄﺐ اﳋﺮج اﻟﺮﻗﻤﻲ‪.‬‬

‫إن ﻛﻞ وﺣﺪة ﻣﻨﻄﻘﻴﺔ ﲢﺘﺎج إﱃ دورة ﻫﺰاز واﺣﺪة ﻋﻠﻰ اﻷﻗﻞ‪ ،‬واﻟﺒﻌﺾ اﻵﺧﺮ ﻗﺪ ﳛﺘﺎج إﱃ أﻛﺜﺮ ﻣﻦ ذﻟﻚ ﺗﺒﻌﺎً ﳌﺴﺘﻮى اﻟﺘﻌﻘﻴﺪ اﻟﻮﻇﻴﻔﻲ‪،‬‬
‫ﻛﻤﺎ أن ﺣﻠﻘﺔ ‪ While…Loop‬ﲢﺘﺎج إﱃ دورﺗﲔ إﺿﺎﻓﻴﺘﲔ ﻣﻦ دورات اﳍﺰاز‪ ،‬وﺑﺎﻟﺘﺎﱄ ﻓﺈن ﺳﺮﻋﺔ اﻟﺘﻨﻔﻴﺬ اﻷﻋﻈﻤﻴﺔ ﺗﺘﺤﺪد ﲟﺠﻤﻮع‬
‫اﻟﻌﻨﺎﺻﺮ اﳌﻨﻄﻘﻴﺔ اﻟﺘﺘﺎﺑﻌﻴﺔ‪ ،‬ﻓﻤﻦ أﺟﻞ اﻟﺪارة اﳌﺒﻴﻨﺔ ﰲ اﻟﺸﻜﻞ‪ 33-6‬ﻓﺈﻧﻪ ﻳﺘﻄﻠﺐ ﺛﻼث دورات ﻟﺘﻨﻔﻴﺬ اﻟﻌﻤﻠﻴﺔ اﳌﺒﻴﻨﺔ‪ ،‬وﻣﻦ أﺟﻞ ﺗﺮدد ﻫﺰاز‬
‫‪ 60MHz‬ﻓﺈن ﻣﻌﺪل ﺳﺮﻋﺔ اﻟﺘﻨﻔﻴﺬ اﻷﻋﻈﻤﻲ ﻫﻮ‪.60/3= 20MHz :‬‬

‫‪ 1-5-1-7-6‬اﻟﺪﺧﻞ واﳋﺮج ﰲ اﻟﺒﻴﺌﺔ ‪:(LabVIEW FPGA I/O Types) LabVIEW FPGA‬‬

‫ﻳﻮﺟﺪ ﺛﻼث أﻧﻮاع أﺳﺎﺳﻴﺔ ﻟﻠﺪﺧﻞ واﳋﺮج‪:‬‬

‫‪ -1‬أﻗﻄﺎب دﺧﻞ وﺧﺮج رﻗﻤﻴﺔ ﺛﻨﺎﺋﻴﺔ اﻻﲡﺎﻩ )‪.(bi-directional digital I/O Pins‬‬

‫اﻟﺸﻜﻞ‪ 34-6‬ﻗﻄﱯ دﺧﻞ )‪ (DIO1‬وﺧﺮج )‪ (DIO0‬رﻗﻤﻴﲔ‬

‫‪ -2‬ﺑﻮاﺑﺎت دﺧﻞ وﺧﺮج رﻗﻤﻴﺔ ﺛﻨﺎﺋﻴﺔ اﻻﲡﺎﻩ )‪ (bi-directional digital I/O Ports‬وﻫﻲ ﻋﺒﺎرة ﻋﻦ ﳎﻤﻮﻋﺔ ﻣﻦ اﻗﻄﺎب اﻟﺪﺧﻞ‬
‫واﳋﺮج‪ ،‬وﻳﻌﺘﻤﺪ ﻋﺪدﻫﺎ ﻋﻠﻰ اﳉﻬﺎز أو اﻟﻜﻴﺎن اﻟﺼﻠﺐ وﻏﺎﻟﺒﺎً ﺗﻜﻮن إﻣﺎ ‪ 8, 16, 32‬ﻗﻄﺐ ﰲ ﻛﻞ ﳎﻤﻮﻋﺔ ﺣﻴﺚ ﳝﻜﻦ اﻟﻘﺮاءة‬
‫أو اﻟﻜﺘﺎﺑﺔ ﻋﻠﻰ ﻣﺴﺘﻮى ﻗﻄﺐ وﺣﻴﺪ أو ﻋﻠﻰ ﻛﺎﻣﻞ ﻣﺴﺘﻮى اﻟﺒﻮاﺑﺔ‪.‬‬

‫اﻟﺸﻜﻞ‪ 35-6‬ﺑﻮاﺑﱵ دﺧﻞ )‪ (DIOPORT0‬وﺧﺮج )‪ (DIOPORT1‬رﻗﻤﻴﺘﲔ‬

‫‪ -3‬ﻗﻄﺎب دﺧﻞ وﺧﺮج ﺗﺸﺎﻬﺑﻴﺔ ﺛﻨﺎﺋﻴﺔ اﻻﲡﺎﻩ )‪ (bi-directional analog I/O Pins‬ﺗﺘﻌﺎﻣﻞ ﺑﺎﻟﻔﺎﺻﻠﺔ اﻟﺜﺎﺑﺘﺔ‪.‬‬

‫اﻟﺸﻜﻞ‪ 36-6‬ﻗﻄﱯ دﺧﻞ )‪ (AIO1‬وﺧﺮج )‪ (AIO0‬ﺸﺎﻬﺑﻴﲔ‬

‫‪327‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Designing The Laboratory Experiments‬‬ ‫ﺗﺼﻤﻴﻢ اﻟﺘﺠﺎرب اﳌﺨﱪﻳﺔ |‬

‫‪ 2-5-1-7-6‬ﻋﻨﺎﺻﺮ اﻟﺘﻮﻗﻴﺖ واﻟﺘﺄﺧﲑ اﻟﺰﻣﲏ )‪:(Timing VIs‬‬

‫ﲢﺘﻮي ﻟﻮﺣﺔ ﻋﻨﺎﺻﺮ اﻟﺘﻮﻗﻴﺖ )‪ (Timing‬ﻋﻠﻰ ﻛﻞ وﻇﺎﺋﻒ اﻟﺘﻮﻗﻴﺖ أو اﻟﺘﺄﺧﲑ اﻟﺰﻣﲏ اﻟﱵ ﳛﺘﺎج إﻟﻴﻬﺎ ﰲ ﺗﻄﺒﻴﻘﺎت اﻟـ‪ ،FPGA‬ﻣﺎﻋﺪا‬
‫ﻋﻨﺎﺻﺮ اﻟﺘﻮﻗﻴﺖ اﻟﱵ ﺗﺘﻌﻠﻖ ﺑﺎﳊﻠﻘﺎت اﳌﺘﺰاﻣﻨﺔ )‪.(Timed Loop‬‬

‫‪ Functions‬اﻟﺒﻴﺌﺔ ‪LabVIEW FPGA‬‬ ‫اﻟﺸﻜﻞ‪ 37-6‬ﻋﻨﺎﺻﺮ اﻟﺘﻮﻗﻴﺖ واﻟﺘﺄﺧﲑ اﻟﺰﻣﲏ ﰲ ﻟﻮﺣﺔ اﻟﻌﻨﺎﺻﺮ‬

‫ﻳﻮﺟﺪ ﺛﻼث ﻋﻨﺎﺻﺮ أﺳﺎﺳﻴﺔ ﰲ ﻟﻮﺣﺔ ﻋﻨﺎﺻﺮ اﻟﺘﻮﻗﻴﺖ وﻫﻲ‪.“Loop Timer”, “Wait”, “Tick Count” :‬‬

‫‪ -‬اﻟﻌﻨﺼﺮ ”‪ “Loop Timer‬ﻳﺴﺘﺨﺪم ﻟﻠﺘﺤﻜﻢ ﺑﺰﻣﻦ دورة اﳊﻠﻘﺎت )‪ ،(For...Loop, While…Loop‬وﻳﺴﺘﺨﺪم ﻟﻠﺘﺤﻜﻢ‬
‫ﻌﺪل اﺳﺘﺤﺼﺎل اﻟﺒﻴﺎﻧﺎت ﻣﻦ أﻗﻄﺎب اﻟﺪﺧﻞ اﻟﺘﺸﺎﻬﺑﻴﺔ واﻟﺮﻗﻤﻴﺔ‪ ،‬اﻟﺸﻜﻞ‪.36-6‬‬

‫اﻟﺸﻜﻞ‪ 38-6‬اﺳﺘﺨﺪام اﻟﻌﻨﺼﺮ ”‪ “Loop Timer‬ﻟﻠﺘﺤﻜﻢ ﲟﻌﺪل اﺳﺘﺤﺼﺎل ﺑﻴﺎﻧﺎت ﻛﻞ ‪ 50‬ﻧﺒﻀﺔ‬

‫‪ -‬اﻟﻌﻨﺼﺮ ”‪ “Wait‬ﻳﻀﻴﻒ ﺗﺄﺧﲑ ﺛﺎﺑﺖ وﳏﺪد ﺑﲔ ﻋﻤﻠﻴﺘﲔ ﰲ ﺷﺮﳛﺔ اﻟـ‪ ،FPGA‬وﻳﺴﺘﺨﺪم ﻟﻠﺘﺤﻜﻢ ﺑﻌﺮض اﻟﻨﺒﻀﺔ ﻋﻠﻰ ﻗﻄﺐ‬
‫ﺧﺮج رﻗﻤﻲ‪ ،‬أو إﺿﺎﻓﺔ ﺗﺄﺧﲑ ﺑﲔ ﻗﺪح اﻹﺷﺎرة وإﺻﺪار اﳋﺮج‪.‬‬

‫‪ -‬اﻟﻌﻨﺼﺮ ”‪ “Tick Count‬ﻳﻌﻄﻲ اﻟﻘﻴﻤﺔ اﳊﺎﻟﻴﺔ ﻟﻨﺒﻀﺎت ﻫﺰاز ﺷﺮﳛﺔ اﻟـ‪ FPGA‬وﻳﺴﺘﺨﺪم ﻟﺒﻨﺎء ﻣﺆﻗﺖ زﻣﲏ ﺑﺄزﻣﻨﺔ ﺻﻐﲑة أو‬
‫ﻟﻌﺪ اﻟﺪورات اﻟﺰﻣﻨﻴﺔ اﻟﱵ ﻳﺴﺘﻐﺮﻗﻬﺎ ﺗﻨﻔﻴﺬ إﺟﺮاء ﻣﻌﲔ ﻋﻠﻰ ﺷﺮﳛﺔ اﻟـ‪.FPGA‬‬

‫إن ﻟﻜﻞ ﻋﻨﺼﺮ ﻣﻦ ﻫﺬﻩ اﻟﻌﻨﺎﺻﺮ اﻟﺜﻼﺛﺔ ﻟﻮﺣﺔ إﻋﺪادات ﻳﺘﻢ ﻓﻴﻬﺎ ﺗﻌﻴﲔ وﺣﺪة اﻟﻌﺪ )‪ (Unite: Ticks, μsec, msec‬ودﻗﺔ اﻟﻌﺪاد‬
‫)‪.(Size: 8, 16, 32bit‬‬

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‫‪26‬‬ ‫اﻟﻔﺼﻞ اﻟﺴﺎدس | ‪Chapter 6‬‬

‫اﻟﺸﻜﻞ‪ 39-6‬ﻋﻨﺎﺻﺮ اﻟﺘﻮﻗﻴﺖ اﻟﺜﻼﺛﺔ وﻟﻮﺣﺔ ﺿﺒﻂ اﻟﺒﺎراﻣﱰات‬

‫ﳝﻜﻦ ﲢﺪﻳﺪ زﻣﻦ اﻟﺘﺄﺧﲑ اﻷﻋﻈﻤﻲ ﻣﻦ ﺧﻼل ﺿﺒﻂ وﺣﺪة اﻟﻌﺪ ودﻗﺔ اﻟﻌﺪاد ﻛﻤﺎ ﻫﻮ ﻣﺒﲔ ﺑﺎﳉﺪول‪.1-6‬‬

‫‪Size/Unit‬‬ ‫‪Ticks‬‬ ‫‪μs‬‬ ‫‪ms‬‬

‫‪9‬‬
‫‪32-bit‬‬ ‫‪1 ~ 4.29*10 ticks‬‬ ‫‪1μs ~ 72s‬‬ ‫‪1ms ~ 50days‬‬
‫‪16-bit‬‬ ‫‪1 ~ 65,000 ticks‬‬ ‫‪1μs ~ 65ms‬‬ ‫‪1ms ~ 65s‬‬
‫‪8-bit‬‬ ‫‪1 ~ 256 ticks‬‬ ‫‪1μs ~ 256µs‬‬ ‫‪1ms ~ 256ms‬‬

‫اﳉﺪول‪ 1-6‬ﳎﺎﻻت أزﻣﻨﺔ اﻟﺘﺄﺧﲑ ﻋﻨﺎﺻﺮ اﻟﺘﻮﻗﻴﺖ واﻟﺘﺄﺧﲑ اﻟﺰﻣﲏ‬

‫‪ 3-5-1-7-6‬ﺗﻮاﺑﻊ اﳊﻠﻘﺎت )‪:(Loops Functions‬‬

‫ﻳﻮﺟﺪ ﺛﻼث ﺣﻠﻘﺎت أﺳﺎﺳﻴﺔ ﺗﺴﺘﺨﺪم ﰲ ﺗﻄﺒﻴﻘﺎت اﻟـ‪ FPGA‬ﰲ اﻟﺒﻴﺌﺔ ‪ LabVIEW FPGA‬وﻫﻲ‪:‬‬
‫‪ :Do…Loop (1‬وﻫﻲ ﺣﻠﻘﺔ ﺗﺘﻜﺮر ‪ N‬ﻣﺮة وﺑﻌﺪﻫﺎ ﺗﺘﻮﻗﻒ‪ ،‬وﳝﻜﻦ ﻣﻌﺮﻓﺔ ﻗﻴﻤﺔ ﻋﺪاد اﳊﻠﻘﺔ ‪.i‬‬
‫‪ :While…Loop (2‬ﺣﻠﻘﺔ ﺗﻜﺮارﻳﺔ ﻻ�ﺎﺋﻴﺔ‪ ،‬وﳝﻜﻦ ﻣﻌﺮﻓﺔ ﻗﻴﻤﺔ ﻋﺪاد اﳊﻠﻘﺔ ‪ ،i‬وﺗﻨﺘﻬﻲ ﺑﺄﻣﺮ ‪.Stop‬‬

‫اﻟﺸﻜﻞ‪ 40-6‬اﳊﻠﻘﺔ ‪ Do…Loop‬ﻋﻠﻰ اﻟﻴﺴﺎر واﳊﻠﻘﺔ ‪ While…Loop‬ﻋﻠﻰ اﻟﻴﻤﲔ‬

‫‪ :(SCTL) Single-Cycle Timed Loop (3‬وﻫﻲ ﺣﻠﻘﺔ ﺗﻜﺮارﻳﺔ ﻳﺘﻢ ﺗﻨﻔﻴﺬﻫﺎ ﺧﻼل دورة واﺣﺪة ﻣﻦ دورات اﳍﺰاز‬
‫اﻟﻜﺮﻳﺴﺘﺎﱄ ﻟﺸﺮﳛﺔ اﻟـ‪ ،FPGA‬ﻟﺬﻟﻚ ﻓﺈن اﻟﻌﻨﺎﺻﺮ اﻟﱵ ﻳﺴﺘﻐﺮق ﺗﻨﻔﻴﺬﻫﺎ أﻛﺜﺮ ﻣﻦ دورة واﺣﺪة ﻻ ﳝﻜﻦ اﺳﺘﺨﺪﻣﻬﺎ داﺧﻞ‬
‫‪ – SCTL‬ﳝﻜﻦ اﻻﻃﻼع ﻋﻠﻰ ﻫﺬﻩ اﻟﻌﻨﺎﺻﺮ ﰲ دﻟﻴﻞ اﻟﱪﻧﺎﻣﺞ‪.‬‬

‫‪Single-Cycle Timed Loop‬‬ ‫اﻟﺸﻜﻞ‪ 41-6‬اﳊﻠﻘﺔ‬

‫‪329‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Designing The Laboratory Experiments‬‬ ‫ﺗﺼﻤﻴﻢ اﻟﺘﺠﺎرب اﳌﺨﱪﻳﺔ |‬

‫إن اﺳﺘﺨﺪام ﻋﻨﺼﺮ اﻟـ‪ SCTL‬ﻳﻮﻓﺮ ﰲ ﻋﺪد اﻟﻮﺣﺪات اﳌﻨﻄﻘﻴﺔ اﳌﺴﺘﻬﻠﻜﺔ ﻋﻠﻰ ﺷﺮﳛﺔ اﻟـ‪ ،FPGA‬ﺣﻴﺚ أﻧﻪ ﻳﺘﻢ ﺗﻌﻴﲔ ﻗﻼب ﺗﺰاﻣﻦ واﺣﺪ‬
‫ﻟﻜﻞ اﻟﻌﻨﺎﺻﺮ اﳌﻮﺟﻮدة داﺧﻞ اﳊﻠﻘﺔ‪ ،‬ﰲ ﺣﲔ أﻧﻪ ﳛﺘﺎج إﱃ ﻗﻼب ﻟﻜﻞ ﻋﻨﺼﺮ ﰲ اﳊﺎﻟﺔ اﻟﻌﺎﻣﺔ‪.‬‬

‫‪ 6-1-7-6‬اﳌﺨﻄﻂ اﳌﻨﻬﺠﻲ ﻟﻠﱪﻧﺎﻣﺞ )‪:(The Program Flowchart‬‬

‫‪Run‬‬

‫‪No‬‬ ‫= ‪Stop‬‬ ‫‪Yes‬‬

‫‪End‬‬
‫”‪“On‬‬

‫= ‪SW0‬‬
‫”‪LED0= “on‬‬
‫‪Yes‬‬ ‫”‪“On‬‬

‫‪No‬‬

‫”‪LED0= “off‬‬

‫اﻟﺸﻜﻞ‪ 42-6‬اﳌﺨﻄﻂ اﳌﻨﻬﺠﻲ ﳋﻮارزﻣﻴﺔ ﻋﻤﻞ اﻟﺘﺠﺮﺑﺔ ‪Lab1-Pre‬‬

‫‪ 7-1-7-6‬اﳌﺨﱪ اﻟﺘﻤﻬﻴﺪي )‪:(Pre-Lab1 Session‬‬

‫ﰲ ﺟﻠﺴﺔ اﳌﺨﺘﱪ اﻟﺘﻤﻬﻴﺪي ﺳﻴﺘﻢ اﻟﺘﻌﺮف ﻋﻠﻰ اﻟﺒﻴﺌﺔ اﻟﱪﳎﻴﺔ ‪ LabVIEW FPGA‬وﻋﻠﻰ ﻃﺮﻳﻘﺔ إﻧﺸﺎء ﻣﺸﺮوع ﺟﺪﻳﺪ وإﺿﺎﻓﺔ ﻟﻮﺣﺔ‬
‫اﻟﺘﻄﻮﻳﺮ إﱃ اﳌﺸﺮوع‪.‬‬

‫ﻗﺒﻞ اﳋﻮض ﰲ ﻣﺮاﺣﻞ ﺗﻨﻔﻴﺬ اﻟﺘﺠﺮﺑﺔ ﻳﻄﻠﺐ ﻗﺮاءة اﳌﻌﻠﻮﻣﺎت اﻟﻨﻈﺮﻳﺔ اﻟﺴﺎﺑﻘﺔ وذﻟﻚ اﻻﻃﻼع ﻋﻠﻰ ﻣﻠﻒ اﻟﻔﻴﺪﻳﻮ ‪Lab1_Session_A.avi‬‬

‫واﻟﺬي ﳛﻮي ﻋﻠﻰ ﻣﻘﺪﻣﺔ أﺳﺎﺳﻴﺔ ﳍﺬﻩ اﳉﻠﺴﺔ اﳌﺨﱪﻳﺔ‪ .‬ﺑﻌﺪ ذﻟﻚ ﻗﻢ ﺑﺎﺗﺒﺎع اﳋﻄﻮات اﻟﺘﺎﻟﻴﺔ‪:‬‬

‫‪ -1‬ﻗﻢ ﺑﺈدﺧﺎل ﻗﺮص اﻟـ‪ DVD‬اﳋﺎص ﺑﺎﻟﺘﺠﺎرب اﳌﺨﱪﻳﺔ ﰲ اﻟﺴﻮاﻗﺔ اﻟﻠﻴﺰرﻳﺔ‪.‬‬

‫‪ -2‬ﻗﻢ ﺑﺘﻨﺼﻴﺐ اﻟﺒﻴﺌﺔ اﻟﱪﳎﻴﺔ ‪ LabVIEW Suite 2010‬ﺑﺘﺸﻐﻴﻞ اﳌﻠﻒ ”‪.“2010LV-WinEng.exe‬‬

‫‪ -3‬ﻗﻢ ﺑﺘﻨﺼﻴﺐ ‪ LabVIEW FPGA Module 2010‬ﺑﺘﺸﻐﻴﻞ اﳌﻠﻒ ”‪.“2010FPGA-Eng.exe‬‬

‫‪ -4‬ﻗﻢ ﺑﺘﻨﺼﻴﺐ ‪ LabVIEW Real-Time Module 2010‬ﺑﺘﺸﻐﻴﻞ اﳌﻠﻒ ”‪.“2010LVRT-Eng.exe‬‬

‫‪ -5‬ﻗﻢ ﺑﺘﻨﺼﻴﺐ اﻟﺘﻌﺎرﻳﻒ اﳋﺎﺻﺔ ﺑﻠﻮﺣﺔ ‪ Spartan-3E Kit‬ﺑﺘﺸﻐﻴﻞ اﳌﻠﻒ ”‪.“NISPARTAN3E31.exe‬‬

‫‪ -6‬ﻗﻢ ﺑﺘﺸﻐﻴﻞ اﻟﱪﻧﺎﻣﺞ ‪ LabVIEW.exe‬ﻣﻦ ﻗﺎﺋﻤﺔ "‪."Start>Programs>National Instruments‬‬

‫‪ -7‬اﺿﻐﻂ ﻋﻠﻰ أﻣﺮ ”‪ “Empty Project‬ﻹﻧﺸﺎء ﻣﺸﺮوع ﺟﺪﻳﺪ‪.‬‬

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‫‪26‬‬ ‫اﻟﻔﺼﻞ اﻟﺴﺎدس | ‪Chapter 6‬‬

‫اﻟﺸﻜﻞ‪ 43-6‬اﻟﻮاﺟﻬﺔ اﻟﺮﺋﻴﺴﻴﺔ ﻟﻠﱪﻧﺎﻣﺞ ‪LabVIEW‬‬

‫‪ -8‬ﻗﻢ ﲝﻔﻆ اﳌﺸﺮوع ﺑﺎﺳﻢ ”‪.“Lab1.lvproj‬‬

‫‪ -9‬ﻗﻢ ﺑﺈﺿﺎﻓﺔ ﻟﻮﺣﺔ اﻟﺘﻄﻮﻳﺮ ‪ Xilinx Spartan-3E Starter Board‬ﺑﺎﻟﻀﻐﻂ ﺑﺎﻟﺰر اﻷﳝﻦ ﻟﻠﻔﺄرة ﻋﻠﻰ اﻷﻳﻘﻮﻧﺔ ‪“My‬‬

‫”…‪Computer» New» Targets and Devices…» New Target or Device>Spar‬‬

‫اﻟﺸﻜﻞ‪ 44-6‬إﺿﺎﻓﺔ ﻟﻮﺣﺔ اﻟﺘﻄﻮﻳﺮ ‪ Spartan-3E Starter Board‬إﱃ اﳌﺸﺮوع‬

‫‪ -10‬ﻗﻢ ﺑﺈﺿﺎﻓﺔ اﳌﻔﺘﺎح ‪) SW0‬ﻗﻄﺐ دﺧﻞ( واﻟﺜﻨﺎﺋﻲ اﻟﻀﻮﺋﻲ ‪) LED0‬ﻗﻄﺐ ﺧﺮج( ﺑﺎﻟﻀﻐﻂ ﺑﺎﻟﺰر اﻷﳝﻦ ﻟﻠﻔﺄرة ﻋﻠﻰ اﻷﻳﻘﻮﻧﺔ‬
‫”‪) “FPGA Target (Dev1,Spartan-3E)» New» FPGA I/O‬اﻟﺸﻜﻞ‪.(45-6‬‬
‫‪ -11‬ﻗﻢ ﺑﺈﺿﺎﻓﺔ ﳎﻠﺪ ﻣﺸﺮوع ﺑﺎﻟﻀﻐﻂ ﺑﺎﻟﺰر اﻷﳝﻦ ﻟﻠﻔﺄرة ﻋﻠﻰ ”‪ “FPGA Target‬وﺗﺴﻤﻴﺘﻪ ”‪) “FPGA_Target‬اﻟﺸﻜﻞ‪.(46-6‬‬
‫‪ -12‬ﻗﻢ ﺑﺈﺿﺎﻓﺔ ﻣﺸﺮوع ‪ VI‬ﻟﻀﻐﻂ ﺑﺎﻟﺰر اﻷﳝﻦ ﻟﻠﻔﺄرة ﻋﻠﻰ اﺠﻤﻟﻠﺪ ”‪ “Lab1‬وﻣﻦ ﰒ ﺣﻔﻈﻪ ﺑﺎﺳﻢ ”‪) “Lab1-Pre.vi‬اﻟﺸﻜﻞ‪.(47-6‬‬

‫‪331‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 Designing The Laboratory Experiments | ‫ﺗﺼﻤﻴﻢ اﻟﺘﺠﺎرب اﳌﺨﱪﻳﺔ‬

(LED0) ‫( وﺧﺮج‬SW0) ‫ إﺿﺎﻓﺔ ﻗﻄﺐ دﺧﻞ‬45-6‫اﻟﺸﻜﻞ‬

‫“ إﱃ اﳌﺸﺮوع‬Pre-Lab1” ‫ إﺿﺎﻓﺔ ﳎﻠﺪ ﺗﻄﺒﻴﻖ وﺗﺴﻤﻴﺘﻪ ﺑﺎﺳﻢ‬46-6‫اﻟﺸﻜﻞ‬

“Pre-Lab1” ‫ إﱃ ﳎﻠﺪ اﻟﺘﻄﺒﻴﻖ‬Pre-Lab1-1.vi ‫ وﺣﻔﻈﻪ ﺑﺎﺳﻢ‬VI ‫ إﺿﺎﻓﺔ ﻣﺸﺮوع‬47-6‫اﻟﺸﻜﻞ‬

Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages 332
26 Chapter 6 | ‫اﻟﻔﺼﻞ اﻟﺴﺎدس‬

‫( ﺑﺸﻜﻞ ﻣﺘﺠﺎﻧﺐ ﻛﻤﺎ ﻫﻮ ﻣﺒﲔ ﻋﻠﻰ‬Block Diagram, Front Panel, Project Explorer) ‫ ﻗﻢ ﺑﱰﺗﻴﺐ اﻟﻨﻮاﻓﺬ اﻟﺜﻼث‬-13
.48-6‫اﻟﺸﻜﻞ‬

“Project Explorer” ‫“ وﻣﺪﻳﺮ اﳌﺸﺮوع‬Front Panel” ‫“ واﻟﻮاﺟﻬﺔ‬Block Diagram” ‫ اﶈﺮر اﻟﱪﳎﻲ‬48-6‫اﻟﺸﻜﻞ‬

“Function» ‫“ إﱃ اﳌﺨﻄﻂ ﺑﺎﻟﻀﻐﻂ ﺑﺎﻟﺰر اﻷﳝﻦ ﻟﻠﻔﺄرة‬While Loop” ‫ ﻗﻢ ﺑﺈﺿﺎﻓﺔ ﻋﻨﺼﺮ‬Block Diagram‫ ﰲ ﻟﻮﺣﺔ اﻟـ‬-14

.Structures» While Loop”

Block Diagram‫ إﱃ ﳐﻄﻂ اﻟـ‬While Loop ‫ إﺿﺎﻓﺔ ﺣﻠﻘﺔ‬49-6‫اﻟﺸﻜﻞ‬

:‫ ﻗﻢ ﺑﺈﺿﺎﻓﺔ اﻟﻌﻨﺎﺻﺮ اﻟﺘﺎﻟﻴﺔ‬Block Diagram‫ ﰲ ﻟﻮﺣﺔ اﻟـ‬13‫ ﺑﺎﳌﺜﻞ ﻛﻤﺎ ﰲ اﳋﻄﻮة‬-15

“Function» Structures» Case Structure” :Case Structure .a

“Function» Boolean» True Constant” :True Constant .b

“Function» Boolean» False Constant” :False Constant .c

“Function» Timing» Loop Timer (mSec, 16 Bit)” :Loop Timer .d

333 ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Designing The Laboratory Experiments‬‬ ‫ﺗﺼﻤﻴﻢ اﻟﺘﺠﺎرب اﳌﺨﱪﻳﺔ |‬

‫‪ .e‬ﻗﻢ ﺑﺴﺤﺐ اﻟﻌﻨﺼﺮ ‪ SW0‬ﻣﻦ ﻣﺴﺘﻌﺮض اﳌﺸﺮوع )‪ (Project Explorer‬وإﻓﻼﺗﻪ ﰲ واﺟﻬﺔ اﻟـ‪،Block Diagram‬‬
‫وﺑﺎﳌﺜﻞ ﺑﺎﻟﻨﺴﺒﺔ ﻟﻠﻌﻨﺼﺮ ‪.LED0‬‬
‫ﳝﻜﻦ أﻳﻀﺎً إﺿﺎﻓﺔ اﻟﻌﻨﺼﺮ ﻣﻦ ”‪ “Function» FPGA I/O» I/O Node‬ﰒ ﺗﻌﻴﲔ اﻟﻘﻄﺐ اﳌﻮاﻓﻖ ﻟﻪ ﺑﺎﻟﻨﻘﺮ ﻋﻠﻰ‬
‫‪ I/O Item‬ﺑﺎﻟﺰر اﻷﳝﻦ ﻟﻠﻔﺄرة »‪.Select FPGA I/O» Slide Switches‬‬

‫‪ -16‬اﻧﺘﻘﻞ إﱃ واﺟﻬﺔ اﻟـ‪ Front Panel‬وﻗﻢ ﺑﺈﺿﺎﻓﺔ اﻟﻌﻨﺎﺻﺮ اﻟﺘﺎﻟﻴﺔ ﺑﺎﻟﻨﻘﺮ ﺑﺎﻟﺰر اﻷﳝﻦ ﻟﻠﻔﺄرة‪:‬‬
‫‪ “Control» Boolean» Round Led” :Round Led .a‬وﻗﻢ ﺑﺘﺴﻤﻴﺘﻪ ﺑـ‪.LED1‬‬
‫‪ “Control» Boolean» Round Led” :Round Led .b‬وﻗﻢ ﺑﺘﺴﻤﻴﺘﻪ ﺑـ‪.SW0‬‬
‫‪.“Control» Boolean» Stop Button” :Stop Button .c‬‬
‫ﺳﺘﻼﺣﻆ أن ﻋﻨﺎﺻﺮ اﻟﺘﺤﻜﻢ اﻟﱵ ﰎ إﺿﺎﻓﺘﻬﺎ ﰲ واﺟﻬﺔ اﻟـ‪ Front Panel‬ﻗﺪ ﻇﻬﺮت أﻳﻀﺎً ﻛﻌﻨﺎﺻﺮ وﻇﻴﻔﻴﺔ ﰲ واﺟﻬﺔ اﻟـ ‪Block‬‬

‫‪.Diagram‬‬

‫‪ -17‬ﻗﻢ ﺑﺘﻮﺻﻴﻞ اﳌﺨﻄﻂ ﰲ واﺟﻬﺔ اﻟـ‪ Block Diagram‬ﻛﻤﺎ ﻫﻮ ﻣﺒﲔ ﻋﻠﻰ اﻟﺸﻜﻞ‪.50-6‬‬

‫اﻟﺸﻜﻞ‪ 50-6‬ﳐﻄﻂ اﻟﺘﺼﻤﻴﻤﻲ اﻟﺮﺳﻮﻣﻲ اﻟﻜﺎﻣﻞ ﻟﻠﺘﺠﺮﺑﺔ ‪Lab1-Pre‬‬

‫‪ -18‬ﻗﻢ ﺑﺎﻻﻧﺘﻘﺎل إﱃ ﻣﺴﺘﻌﺮض اﳌﺸﺮوع وﺗﻌﻴﲔ ﳕﻂ اﻟﺘﻨﻔﻴﺬ ﻟﻴﺘﻢ ﻋﻠﻰ اﳊﺎﺳﺐ ﻣﻦ ﺧﻼل اﻟﻨﻘﺮ ﺑﺎﻟﺰر اﻷﳝﻦ ﻟﻠﻔﺄرة ﻋﻠﻰ ‪“FPGA‬‬

‫”‪.Target» Execute VI on» Development Computer with Simulated I/O‬‬

‫اﻟﺸﻜﻞ‪ 51-6‬ﺗﻌﻴﲔ ﻣﻨﺼﺔ ﺗﺸﻐﻴﻞ اﻟﺘﻄﺒﻴﻖ ﰲ ﻣﺴﺘﻌﺮض اﳌﺸﺮوع‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪334‬‬
‫‪26‬‬ ‫اﻟﻔﺼﻞ اﻟﺴﺎدس | ‪Chapter 6‬‬

‫ﻣﻦ ﺷﺮﻳﻂ اﻷدوات ﰲ‬ ‫وﺧﺎﺻﻴﺔ ”‪“Retain Wire Value‬‬ ‫‪ -19‬ﻗﻢ ﺑﺘﻔﻌﻴﻞ ﺧﺎﺻﻴﺔ ”‪“Highlighted Execution‬‬

‫وﻻﺣﻆ ﺳﻠﻮك اﻟﱪﻧﺎﻣﺞ‪.‬‬ ‫واﺟﻬﺔ اﻟـ‪ ،Block Diagram‬ﰒ ﺷﻐﻞ اﳌﺸﺮوع ﺑﺎﻟﻀﻐﻂ ﻋﻠﻰ أﻣﺮ اﻟﺘﺸﻐﻴﻞ ”‪“Run‬‬

‫‪.‬‬ ‫‪ -20‬ﻗﻢ ﺑﺈﻳﻘﺎف اﻟﱪﻧﺎﻣﺞ وﺣﺎول ﺗﺸﻐﻴﻠﻪ ﺧﻄﻮة‪-‬ﺧﻄﻮة ﺑﺎﺳﺘﺨﺪام اﻷواﻣﺮ‬

‫‪ -21‬ﻗﻢ ﺑﺎﻻﻃﻼع ﻋﻠﻰ ﻣﻠﻒ اﻟﻔﻴﺪﻳﻮ ‪ Lab1_Session_B.avi‬واﻟﺬي ﳛﻮي ﻋﻠﻰ ﺷﺮح ﻋﻤﻞ اﻟﺘﺠﺮﺑﺔ وﻋﻨﺎﺻﺮﻫﺎ ﰲ ﻫﺬﻩ اﳉﻠﺴﺔ‬
‫اﳌﺨﱪﻳﺔ‪.‬‬

‫‪ 8-1-7-6‬ﻣﺒﺪأ ﻋﻤﻞ اﻟﺘﺠﺮﺑﺔ )?‪:(How does it Work‬‬

‫إن اﻟﱪﻧﺎﻣﺞ ﺳﻮف ﻳﻌﻤﻞ ﰲ ﺣﻠﻘﺔ ﺗﻜﺮارﻳﺔ ﻻ�ﺎﺋﻴﺔ ﺗﺘﻜﺮر ﻛﻞ ‪ .500ms‬ﻓﻌﻨﺪ وﺿﻊ اﳌﻔﺘﺎح ‪ SW0‬ﻋﻠﻰ ﻟﻮﺣﺔ اﻟﺘﻄﻮﻳﺮ ﻋﻠﻰ اﻟﻮﺿﻌﻴﺔ‬
‫”‪ ،“on‬ﻓﺈن اﳊﺎﻟﺔ ﰲ ﺧﺮج اﳌﻔﺘﺎح ﺳﺘﻜﻮن ”‪ “1‬أو ”‪ ،“True‬اﻷﻣﺮ اﻟﺬي ﺳﻴﺆدي إﱃ ﺗﻔﻌﻴﻞ اﻟﺸﺮط ‪ True‬ﰲ ﻋﻨﺼﺮ ‪“Case‬‬

‫”‪ ،Structure‬وﻳﺆدي ذﻟﻚ إﱃ ﺗﻄﺒﻴﻖ ”‪ “1‬ﻣﻨﻄﻘﻲ ﻋﻠﻰ ﻗﻄﺐ اﻟﻌﻨﺼﺮ ‪ LED0‬وﺑﺎﻟﺘﺎﱄ ﻳﻀﻲء‪.‬‬
‫إن اﻟﻌﻨﺼﺮ ‪ TF:LED1‬واﻟﻌﻨﺼﺮ ‪ TF:SW0‬ﻫﻲ ﻋﻨﺎﺻﺮ ﻟﻮاﺟﻬﺔ اﻟﺘﻄﺒﻴﻖ )‪ (Forint Panel‬وﻫﻲ ﺗﺘﺨﺎﻃﺐ ﻣﺒﺎﺷﺮة ﻣﻊ ﻟﻮﺣﺔ اﻟﺘﻄﻮﻳﺮ ﻣﻦ‬
‫ﺧﻼل ﻣﻨﻔﺬ اﻟـ‪.USB‬‬

‫‪ 9-1-7-6‬ﻧﺸﺎط إﺿﺎﰲ ﻟﻠﻤﺨﺘﱪ اﻟﺘﻤﻬﻴﺪي )‪:(Pre-Lab1 Assignment‬‬

‫ ﺑﺸﻜﻞ ﻓﺮدي أو ﺑﺎﻟﺘﻌﺎون ﻣﻊ زﻣﻼﺋﻚ ﰲ ﻧﻔﺲ اﺠﻤﻟﻤﻮﻋﺔ ﺑﺎﻟﻘﺮاءة ﺣﻮل اﳌﻮﺿﻮﻋﺎت اﻟﺘﺎﻟﻴﺔ ﰲ دﻟﻴﻞ ﻟﻮﺣﺔ اﻟﺘﻄﻮﻳﺮ]‪:[812‬‬
‫‪Chapter 1: Introduction and Overview + Chapter 2: Switches, Buttons, and Knob‬‬

‫ﻗﻢ ﺑﺘﺼﻔﺢ دﻟﻴﻞ اﻟﱪﻧﺎﻣﺞ ‪ LabVIEW‬ﺣﻮل اﻟﻌﻨﺎﺻﺮ اﻟﱵ ﰎ اﺳﺘﺨﺪاﻣﻬﺎ ﰲ اﻟﺘﺠﺮﺑﺔ ﻣﻦ ﺧﻼل ﲢﺪﻳﺪ اﻟﻌﻨﺼﺮ وﻣﻦ ﰒ ﺿﻐﻂ اﳌﻔﺘﺎح ‪F1‬‬

‫ﻋﻠﻰ ﻟﻮﺣﺔ اﳌﻔﺎﺗﻴﺢ واﻟﺬي ﻳﻘﻮدك ﻣﺒﺎﺷﺮة إﱃ اﻟﺼﻔﺤﺔ اﳋﺎﺻﺔ ﺑﺎﻟﻌﻨﺼﺮ ﰲ اﻟﺪﻟﻴﻞ )‪.(User’s Manual‬‬

‫‪ 2-7-6‬ﺟﻠﺴﺔ اﳌﺨﱪ اﻟﺘﻄﺒﻴﻘﻲ )‪:(Hands-on Lab1 Session‬‬

‫ﰲ ﺟﻠﺴﺔ اﳌﺨﺘﱪ اﻟﺘﻄﺒﻴﻘﻲ ﺳﻨﻘﻮم ﺑﺘﺸﻐﻴﻞ ﻣﺸﺮوع اﳉﻠﺴﺔ اﻟﺘﻤﻬﻴﺪﻳﺔ ﻋﻠﻰ ﻟﻮﺣﺔ اﻟﺘﻄﻮﻳﺮ ﰒ ﺳﻨﻘﻮم ﺑﺘﻄﻮﻳﺮ اﳌﺸﺮوع‪.‬‬

‫‪ -22‬ﻗﻢ ﺑﻔﺘﺢ ﻣﻠﻒ اﳌﺸﺮوع ”‪ “Lab1.lvproj‬اﻟﺬي ﻗﻤﺖ ﺑﺈﻧﺸﺎﺋﻪ ﰲ ﺟﻠﺴﺔ اﳌﺨﺘﱪ اﻟﺘﻤﻬﻴﺪي‪.‬‬
‫‪ -23‬ﻗﻢ ﺑﺎﻻﻧﺘﻘﺎل إﱃ ﻣﺴﺘﻌﺮض اﳌﺸﺮوع وﺗﻌﻴﲔ ﳕﻂ اﻟﺘﻨﻔﻴﺬ ﻟﻴﺘﻢ ﻋﻠﻰ اﻟـ‪ FPGA‬ﻣﻦ ﺧﻼل اﻟﻨﻘﺮ ﺑﺎﻟﺰر اﻷﳝﻦ ﻟﻠﻔﺄرة ﻋﻠﻰ ‪“FPGA‬‬

‫”‪.Target» Execute VI on» FPGA Target‬‬

‫‪ -24‬ﻗﻢ ﺑﺘﻮﺻﻴﻞ ﻟﻮﺣﺔ اﻟﺘﻄﻮﻳﺮ ‪ Spartan-3E Starter Board‬ﻣﻊ اﳊﺎﺳﺐ ﻋﱪ ﻣﻨﻔﺬ اﻟـ‪ USB‬وﻗﻢ ﺑﻮﺻﻞ ﻣﻔﺘﺎح اﻟﺘﻐﺬﻳﺔ اﳌﻮﺟﻮد ﻋﻠﻰ‬
‫اﳉﺎﻧﺐ اﻟﻌﻠﻮي اﻟﻴﻤﻴﲏ ﻟﻠﻮﺣﺔ‪.‬‬
‫‪ -25‬ﻗﻢ ﺑﺘﺸﻐﻴﻞ اﻟﱪﻧﺎﻣﺞ ﻣﻦ ﺧﻼل أﻣﺮ اﻟﺘﺸﻐﻴﻞ ”‪ .“Run‬ﺳﻴﻌﻤﻞ اﳌﱰﺟﻢ ﻋﻠﻰ ﺗﻮﻟﻴﺪ اﳌﻠﻒ ‪ Bitfile‬واﻟﺬي ﻳﺘﻢ ﲢﻤﻴﻠﻪ ﻻﺣﻘﺎً ﻋﻠﻰ‬
‫ﺷﺮﳛﺔ اﻟـ‪.FPGA‬‬

‫‪335‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Designing The Laboratory Experiments‬‬ ‫ﺗﺼﻤﻴﻢ اﻟﺘﺠﺎرب اﳌﺨﱪﻳﺔ |‬

‫ﰲ ﺑﺎدئ اﻷﻣﺮ ﺳﻴﻘﻮم اﻟﱪﻧﺎﻣﺞ ﻋﻠﻰ ﺗﻮﻟﻴﺪ ”‪ “Intermediate Files‬ﻛﻤﺎ ﻫﻮ ﻣﺒﲔ ﻋﻠﻰ اﻟﺸﻜﻞ‪ .32-6‬ﻳﻘﻮم ﺑﻌﺪ ذﻟﻚ ﻣﱰﺟﻢ ﺷﺮﻛﺔ‬
‫‪ Xilinx‬اﳌﺪﻣﺞ ﰲ اﻟﱪﻧﺎﻣﺞ ﻋﻠﻰ ﲢﻮﻳﻠﻬﺎ إﱃ ﻣﻠﻔﺎت ‪ VHDL‬وﻣﻦ إﱃ ‪ ،Bitfile‬وﺧﻼل ﻋﻤﻠﻴﺔ اﻟﺘﺤﻮﻳﻞ ﻳﻘﻮم اﻟﺘﻄﺒﻴﻖ ﺑﺈﻋﻄﺎء ﺗﻘﺪﻳﺮ‬
‫أوﱄ ﻟﻠﻤﻮارد اﻟﱵ ﺳﻴﺘﻢ اﺳﺘﺨﺪﻣﻬﺎ ﻋﻠﻰ ﺷﺮﳛﺔ اﻟـ‪ ،FPGA‬ﲝﻴﺚ أﻧﻪ ﰲ ﺣﺎل ﻛﻮن اﳌﻮارد ﺗﺘﺠﺎوز اﳌﻮارد اﳊﻘﻴﻘﺔ اﳌﺘﺎﺣﺔ‪ ،‬ﳝﻜﻦ إﻟﻐﺎء‬
‫ﻋﻤﻠﻴﺔ اﻟﱰﲨﺔ اﻟﱵ ﳝﻜﻦ أن ﺗﺴﺘﻐﺮق ﺳﺎﻋﺎت ﰲ ﺑﻌﺾ اﻟﺘﻄﺒﻴﻘﺎت اﳌﺘﻘﺪﻣﺔ وإﻋﺎدة اﻟﻨﻈﺮ ﰲ اﻟﱪﻧﺎﻣﺞ ﻣﻦ ﺧﻼل ﲢﻘﻴﻖ ﺑﻌﺾ اﻷﻣﺜﻠﻴﺎت‬
‫ﻟﺘﻘﻠﻴﺺ ﺣﺠﻢ اﳌﻮارد اﳌﺴﺘﺨﺪﻣﺔ‪.‬‬

‫”‪“Intermediate Files‬‬ ‫اﻟﺸﻜﻞ‪ 52-6‬ﲢﻮﻳﻞ اﳌﺨﻄﻄﺎت اﻟﺮﺳﻮﻣﻴﺔ إﱃ ﻣﻠﻔﺎت‬

‫اﻟﺸﻜﻞ‪ 53-6‬واﺟﻬﺔ اﻟﺘﻄﺒﻴﻖ ‪ Xilinx Complier Server‬واﻟﺘﻘﺮﻳﺮ اﻟﺘﻘﺪﻳﺮي ﻟﻠﻤﻮارد اﳌﺴﺘﺨﺪﻣﺔ‬

‫اﻟﺸﻜﻞ‪ 54-6‬واﺟﻬﺔ اﻟﺘﻄﺒﻴﻖ ‪ Xilinx Complier Server‬واﻟﺘﻘﺮﻳﺮ اﻟﻨﻬﺎﺋﻲ‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪336‬‬
‫‪26‬‬ ‫اﻟﻔﺼﻞ اﻟﺴﺎدس | ‪Chapter 6‬‬

‫‪ -26‬ﻗﻢ ﺑﺎﺳﺘﺒﺪال ﺣﻠﻘﺔ ‪ Do…While‬ﲝﻠﻘﺔ ‪ Timed Loop‬وذﻟﻚ ﺑﺎﻟﻨﻘﺮ ﻋﻠﻰ ﺣﺎﻓﺔ اﳊﻠﻘﺔ ‪ Do…While‬ﺑﺎﻟﺰر اﻷﳝﻦ ﻟﻠﻔﺄرة‬
‫واﺧﺘﻴﺎر ”‪.“Replace with Timed-Loop‬‬
‫‪ -27‬ﻗﻢ ﲝﺬف ﻋﻨﺼﺮ اﻟﺘﺄﺧﲑ ‪ Loop-Timer‬ﻣﻦ داﺧﻞ اﳊﻠﻘﺔ‪.‬‬

‫اﻟﺸﻜﻞ‪ 55-6‬اﳌﺨﻄﻂ اﻟﺘﺼﻤﻴﻤﻲ اﻟﺮﺳﻮﻣﻲ ﻟﻠﺘﺠﺮﺑﺔ ‪ Lab1-Pre‬ﺑﻌﺪ اﺳﺘﺒﺪال اﳊﻠﻘﺔ‬

‫‪ -28‬ﻗﻢ ﺑﺘﺸﻐﻴﻞ اﻟﺘﻄﺒﻴﻖ وأﻋﺪ اﳋﻄﻮة رﻗﻢ ”‪.“4‬‬

‫‪ -29‬ﺑﻌﺪ اﻧﺘﻬﺎء اﻟﱰﲨﺔ ﻗﻢ ﲟﻘﺎرﻧﺔ اﻟﺘﻘﺮﻳﺮ اﻟﺘﻘﺪﻳﺮي ﻟﻠﻤﻮارد اﳌﺴﺘﺨﺪﻣﺔ ﻋﻠﻰ ﺷﺮﳛﺔ اﻟـ‪ FPGA‬ﰲ اﳊﺎﻟﺘﲔ‪.‬‬
‫‪ -30‬ﻗﻢ ﲝﻔﻆ ﻧﺴﺨﺔ ﻣﻦ ﻣﻠﻒ ”‪ “Lab1-Pre.vi‬اﻟﺬي ﻗﻤﺖ ﺑﺈﻧﺸﺎﺋﻪ ﰲ ﺟﻠﺴﺔ اﳌﺨﺘﱪ اﻟﺘﻤﻬﻴﺪي ﺑﺎﺳﻢ ﺟﺪﻳﺪ ‪“Lab1-‬‬

‫”‪.Main.vi‬‬
‫‪ -31‬ﻗﻢ ﺑﺈﺿﺎﻓﺔ ﲨﻴﻊ اﳌﻔﺎﺗﻴﺢ اﻻﻧﺰﻻﻗﻴﺔ )‪ (SW0-SW3‬واﳌﻔﺎﺗﻴﺢ اﻟﻠﺤﻈﻴﺔ واﻟﺜﻨﺎﺋﻴﺎت اﻟﻀﻮﺋﻴﺔ )‪ (LED0-LED7‬ﺑﻨﻔﺲ اﻟﻄﺮﻳﻘﺔ اﻟﱵ‬
‫ﲤﺖ ﰲ اﳋﻄﻮة رﻗﻢ ”‪.“9‬‬

‫اﻟﺸﻜﻞ‪ 56-6‬ﻣﺪﻳﺮ اﳌﺸﺮوع ﺑﻌﺪ إﺿﺎﻓﺔ ﻋﻨﺎﺻﺮ اﳌﻔﺎﺗﻴﺢ واﻟﺜﻨﺎﺋﻴﺎت‬

‫‪ -32‬ﻗﻢ ﺑﺘﻌﺪﻳﻞ اﳌﺨﻄﻂ ﻟﻴﺘﻮاﻓﻖ ﻣﻊ اﻟﺸﻜﻞ‪ ،56-6‬ﺣﻴﺚ ﻗﻢ ﺑﺈﺿﺎﻓﺔ اﻟﻌﻨﺎﺻﺮ اﻟﺘﺎﻟﻴﺔ‪:‬‬

‫‪“Function» Array» Build Array” :Build Array .a‬‬

‫‪“Function» Array» Index Array” :Index Array .b‬‬

‫‪“Function» Numeric» Conversion» Number to Boolean Array” .c‬‬

‫‪337‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫‪Designing The Laboratory Experiments‬‬ ‫ﺗﺼﻤﻴﻢ اﻟﺘﺠﺎرب اﳌﺨﱪﻳﺔ |‬

‫‪“Function» Numeric» Conversion» Boolean to Number Array” .d‬‬

‫‪ -33‬ﻗﻢ ﺑﺎﻟﻨﻘﺮ ﺑﺎﻟﺰر اﻷﳝﻦ ﻟﻠﻔﺄرة ﻋﻠﻰ ﺧﺮج اﻟﻌﻨﺼﺮ ‪ Build Array‬واﺧﱰ ‪ Create» Indicator‬ﻹﺿﺎﻓﺔ اﻟﻌﻨﺼﺮ ‪.Switches Array‬‬

‫‪ -34‬ﻗﻢ ﺑﺎﻟﻨﻘﺮ ﺑﺎﻟﺰر اﻷﳝﻦ ﻟﻠﻔﺄرة ﻋﻠﻰ ﺧﺮج اﻟﻌﻨﺼﺮ ‪ Number to Boolean Array‬واﺧﱰ ‪ Create» Indicator‬ﻹﺿﺎﻓﺔ اﻟﻌﻨﺼﺮ‬
‫‪.LED Array‬‬

‫اﻟﺸﻜﻞ‪ 57-6‬اﳌﺨﻄﻂ اﻟﺘﺼﻤﻴﻤﻲ اﻟﺮﺳﻮﻣﻲ ﻟﻠﺘﺠﺮﺑﺔ ‪Lab1-Main‬‬

‫‪ -35‬ﻗﻢ ﲝﻔﻆ اﳌﺸﺮوع وﻣﻦ ﰒ ﺗﺸﻐﻴﻠﻪ وﲢﻤﻴﻠﻪ ﻋﻠﻰ ﻟﻮﺣﺔ اﻟﺘﻄﻮﻳﺮ‪.‬‬

‫‪ 1-2-7-6‬ﻣﺒﺪأ ﻋﻤﻞ اﻟﺘﺠﺮﺑﺔ )?‪:(How does it Work‬‬

‫إن اﻟﱪﻧﺎﻣﺞ ﺳﻮف ﻳﻌﻤﻞ ﰲ ﺣﻠﻘﺔ ﺗﻜﺮارﻳﺔ ﻻ�ﺎﺋﻴﺔ ﳝﻜﻦ اﻟﺘﺤﻜﻢ ﺑﺰﻣﻨﻬﺎ ﻣﻦ ﺧﻼل اﻟﻌﻨﺼﺮ ”‪ .“Delay‬ﺳﻴﺘﻢ ﻣﺮاﻗﺒﺔ ﺣﺎﻟﺔ ﲨﻴﻊ اﳌﻔﺎﺗﻴﺢ‬
‫ﻋﻠﻰ ﻟﻮﺣﺔ اﻟﺘﻄﻮﻳﺮ وﻋﻨﺪﻣﺎ ﻳﺘﻮﺿﻊ أﺣﺪﻫﺎ ﻋﻠﻰ اﻟﻮﺿﻌﻴﺔ ”‪ ،“on‬ﻓﺈن اﻟﻌﻨﺼﺮ ”‪ “Build Array‬ﺳﻴﻘﻮم ﺑﺘﺤﻮﻳﻞ اﻟﻘﻴﻤﺔ اﳌﻮاﻓﻘﺔ إﱃ‬
‫ﻣﺼﻔﻮﻓﺔ ﺛﻨﺎﺋﻴﺔ أﺣﺎدﻳﺔ )ﻣﺜﻼً‪ :‬وﺻﻞ اﳌﻔﺘﺎح ‪ SW3‬ﺳﻴﻮﻟﺪ اﻟﻘﻴﻤﺔ ”‪ “7‬ﰲ ﺧﺮج اﳌﺼﻔﻮﻓﺔ وﺳﻴﺆدي إﱃ ﺗﺸﻐﻴﻞ ‪ ،(LED4‬ﻳﺘﻢ ﺑﻌﺪ ذﻟﻚ‬
‫ﲢﻮﻳﻞ اﳌﺼﻔﻮﻓﺔ اﻟﺜﻨﺎﺋﻴﺔ إﱃ ﻋﺪد ﻣﻦ ﺧﻼل ‪ Boolean-to-Number‬وﻣﻦ ﰒ إﻋﺎدة ﺗﻮزﻳﻊ اﻟﻘﻴﻤﺔ اﻟﻌﺸﺮﻳﺔ ﻋﻠﻰ اﳋﺮج اﻟﺜﻨﺎﺋﻲ ﻣﻦ ﺧﻼل‬
‫ﲢﻮﻳﻠﻬﺎ إﱃ ‪ Number-to-Boolean‬وﻣﻦ ﰒ ﺗﻮزﻳﻌﻬﺎ ﺑﺎﺳﺘﺨﺪام اﻟﻌﻨﺼﺮ ‪.Index Array‬‬
‫إن اﻟﻌﻨﺎﺻﺮ اﳌﻮﺟﻮدة ﻋﻠﻰ ﻟﻮﺣﺔ اﻟﺘﺤﻜﻢ ﺗﺘﺨﺎﻃﺐ ﻣﺒﺎﺷﺮة ﻣﻊ ﻟﻮﺣﺔ اﻟﺘﻄﻮﻳﺮ ﻣﻦ ﺧﻼل ﻣﻨﻔﺬ اﻟـ‪ ،USB‬وﺗﺒﲔ اﳊﺎﻟﺔ اﻵﻧﻴﺔ ﳌﺪاﺧﻞ وﳐﺎرج‬
‫اﻟﻠﻮﺣﺔ اﻟﱵ ﰎ ﺗﻌﻴﻴﻨﻬﺎ‪.‬‬

‫‪ 2-2-7-6‬أﺳﺌﻠﺔ اﳌﺨﺘﱪ اﻟﺘﻄﺒﻴﻘﻲ )‪:(Main-Lab1 Quiz‬‬

‫ﻳﻄﻠﺐ ﻣﻨﺎﻗﺸﺔ ﻣﺒﺪأ اﻟﻌﻤﻞ واﻟﻌﻨﺎﺻﺮ ﺑﲔ اﻟﻄﻼب ﰲ ﳎﻤﻮﻋﺎت‪ ،‬وﻣﻦ ﰒ ﻃﺮح ﺣﻠﻮل وﺑﺪاﺋﻞ‪.‬‬

‫‪ 3-2-7-6‬ﻧﺸﺎط إﺿﺎﰲ ﻟﻠﻤﺨﺘﱪ اﻟﺘﻄﺒﻴﻘﻲ )‪:(Mian-Lab1 Assignment‬‬

‫‪ -1‬ﻗﻢ ﺑﺘﺼﻔﺢ دﻟﻴﻞ اﻟﱪﻧﺎﻣﺞ ‪ LabVIEW‬ﺣﻮل اﻟﻌﻨﺎﺻﺮ اﻟﱵ ﰎ اﺳﺘﺨﺪاﻣﻬﺎ ﰲ اﻟﺘﺠﺮﺑﺔ‪.‬‬

‫‪ -2‬ﻗﻢ ﺑﺘﺤﻠﻴﻞ ﺳﲑ اﻹﺷﺎرات ﰲ اﻟﱪﻧﺎﻣﺞ ”‪ “Lab1-Main‬وﺷﺮح ﻋﻤﻠﻪ‪.‬‬
‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪338‬‬
‫‪26‬‬ ‫اﻟﻔﺼﻞ اﻟﺴﺎدس | ‪Chapter 6‬‬

‫‪ -3‬ﻗﻢ ﺑﺒﻨﺎء ﺑﺮﻧﺎﻣﺞ "ﺷﺮﻳﻂ أﺿﻮاء اﻟﺰﻳﻨﺔ" وﻗﻢ ﺑﺘﺸﻐﻴﻠﻪ ﻣﻦ ﺧﻼل اﳌﺨﺘﱪ ﻋﻦ ﺑﻌﺪ أو اﶈﺎﻛﺎة ﲝﻴﺚ أﻧﻪ‪:‬‬
‫‪ .a‬ﺑﺎﻟﻀﻐﻂ ﻋﻠﻰ ”‪ “BTN_East‬ﻳﺘﻢ ﺗﺸﻐﻴﻞ اﻟﺜﻨﺎﺋﻴﺎت اﻟﻀﻮﺋﻴﺔ ﻣﻦ اﻟﻴﻤﲔ إﱃ اﻟﻴﺴﺎر ﺑﺸﻜﻞ دوار‪.‬‬
‫‪ .b‬ﺑﺎﻟﻀﻐﻂ ﻋﻠﻰ ”‪ “BTN_West‬ﻳﺘﻢ ﺗﺸﻐﻴﻞ اﻟﺜﻨﺎﺋﻴﺎت اﻟﻀﻮﺋﻴﺔ ﻣﻦ اﻟﻴﺴﺎر إﱃ اﻟﻴﻤﲔ ﺑﺸﻜﻞ دوار‪.‬‬
‫‪ .c‬ﺑﺎﻟﻀﻐﻂ ﻋﻠﻰ ”‪ “BTN_North‬ﻳﺘﻢ ﺗﺸﻐﻴﻞ اﻟﺜﻨﺎﺋﻴﺎت اﻟﻀﻮﺋﻴﺔ ﻣﻦ اﻟﻴﻤﲔ إﱃ اﻟﻴﺴﺎر ذﻫﺎﺑﺎً‪ ،‬وﻣﻦ اﻟﻴﺴﺎر إﱃ اﻟﻴﻤﲔ‬
‫إﻳﺎﺑﺎً ﺑﺸﻜﻞ ﻣﺘﻜﺮر‪.‬‬

‫‪ 3-7-6‬ﺟﻠﺴﺔ اﳌﺨﱪ ﻋﻦ ﺑﻌﺪ )‪:(Remote Lab1 Session‬‬

‫ﻹﻧﺸﺎء ﺷﺒﻜﺔ اﺗﺼﺎل ﻣﺮﺋﻴﺔ ﺧﺎﺻﺔ ‪ (Virtual Private Network) VPN‬واﻟﻮﺻﻮل إﱃ‬ ‫]‪[813‬‬
‫ﺳﻮف ﻧﺴﺘﺨﺪم اﻟﱪﻧﺎﻣﺞ ‪LogMeIn‬‬

‫ﺟﻬﺎز اﳊﺎﺳﺐ اﳌﺨﺼﺺ ﻟﻠﺘﺠﺮﺑﺔ‪ .‬اﻟﺴﺒﺐ ﰲ اﺳﺘﺨﺪام ﻫﺬا اﻟﱪﻧﺎﻣﺞ أﻧﻪ ﻻ ﻳﺘﻮﻓﺮ ﰲ ﺑﻠﺪﻧﺎ ﻣﺎ ﻳﺴﻤﻰ ﲞﺪﻣﺔ ”‪ “Private IP‬وﺧﺪﻣﺔ‬
‫”‪ .“VPN‬اﻟﱪﻧﺎﻣﺞ ‪ LogMeIn‬ﳝﺜﻞ ﺣﻼً ﳍﺬﻩ اﳌﺸﻜﻠﺔ ﺣﻴﺚ ﻳﻘﻮم ﻋﻠﻰ إﻧﺸﺎء ﺷﺒﻜﺔ اﻓﱰاﺿﻴﺔ ﺧﺎﺻﺔ وﻳﻘﻮم ﺑﺘﻮﻟﻴﺪ رﻗﻢ ‪ IP‬ﺧﺎص‬
‫ﺗﺴﺘﻄﻴﻊ ﻣﻦ ﺧﻼﻟﻪ اﻟﻮﺻﻮل إﱃ أي ﺟﻬﺎز ﻋﻦ ﺑﻌﺪ ﺑﻄﺮﻳﻘﺔ آﻣﻨﺔ ‪ ،‬وﺑﺎﻟﺘﺎﱄ ﳝﻜﻦ ﺗﻔﻌﻴﻞ ﺧﺪﻣﺔ ”‪ “Remote Desktop‬اﳌﻮﺟﻮدة ﰲ أي‬
‫ﻧﻈﺎم ﺗﺸﻐﻴﻞ‪.‬‬

‫ﰎ ﲣﺼﻴﺺ ﺟﻬﺎز ﺣﺎﺳﺐ ﻳﺮﺗﺒﻂ ﻣﻊ ﻟﻮﺣﺔ اﻟﺘﻄﻮﻳﺮ ‪ Spartan-3E Starter Board‬وﻫﻮ ﻣﺰود ﺑﻜﺎﻣﲑا ﻣﺮﺋﻴﺔ ﻟﻌﺮض ﺣﺎﻟﺔ ﻟﻮﺣﺔ اﻟﺘﻄﻮﻳﺮ‪.‬‬
‫ﻛﺬﻟﻚ ﰎ رﺑﻂ ﺟﻬﺎز ”‪ “Logic Analyzer‬ﳕﻮذج )‪ [814]Zeroplus LAP-C(16128‬ﻣﻊ اﳊﺎﺳﺐ ﻋﱪ ﻣﻨﻔﺬ ‪ ،USB‬وﳝﻠﻚ اﳉﻬﺎز‬
‫‪ 16‬ﻨﺎة رﻗﻤﻴﺔ وﻗﻨﺎﺗﲔ ﺗﺸﺎﻬﺑﻴﺘﲔ ﰎ رﺑﻄﻬﺎ ﻣﻊ ﳎﻤﻮﻋﺔ ﻣﻦ ﻷﻗﻄﺎب اﻟﺮﻗﻤﻴﺔ واﻟﺘﺸﺎﻬﺑﻴﺔ ﻋﻠﻰ ﻟﻮﺣﺔ اﻟﺘﻄﻮﻳﺮ ﲝﻴﺚ ﳝﻜﻦ ﻣﺮاﻗﺒﺔ اﳊﺎﻟﺔ اﳌﻨﻄﻘﻴﺔ‬
‫ﻟﻺﺷﺎرات ﻋﻠﻰ اﻷﻗﻄﺎب وﲢﻠﻴﻞ ﺑﺮوﺗﻮﻛﻮﻻت اﻻﺗﺼﺎل اﻟﺘﺴﻠﺴﻠﻲ‪ .‬أﻳﻀﺎً ﰎ وﺻﻞ راﺳﻢ إﺷﺎرة ﻣﻦ اﻟﻨﻮع ‪ HAMEG‬ﳕﻮذج ‪HM1008‬‬

‫ﻟﻘﻴﺎس اﻹﺷﺎرات ذات اﻟﱰدد اﻟﻌﺎﱄ )‪ – (50MHz‬إن اﻻرﺗﺒﺎط ﻣﻊ اﻻﻗﻄﺎب ﳝﻜﻦ ﺗﻌﻴﻴﻨﻪ ﻳﺪوﻳﺎً ﺣﺴﺐ اﻟﺘﺠﺎرب اﳌﻄﻠﻮﺑﺔ‪ .‬اﻟﻨﻈﺎم ﻣﺮﺗﺒﻂ‬
‫إﱃ ﺧﻂ اﺗﺼﺎل رﻗﻤﻲ )‪ (ADSL‬ﺑﺴﺮﻋﺔ ‪ 1MB‬ﻋﱪ ﻣﻮزع )‪ (ADSL Router‬وﳐﺪم داﺧﻠﻲ ﺧﺎص )‪ .(Server‬اﻟﺸﻜﻞ‪ 58-6‬ﻳﺒﲔ‬
‫اﳌﺨﻄﻂ اﳍﻴﻜﻠﻲ ﻟﻌﻨﺎﺻﺮ ﻣﻨﻈﻮﻣﺔ ﺗﺸﻐﻴﻞ اﳌﺨﱪ ﻋﻦ ﺑﻌﺪ )‪.(Remote-Lab‬‬

‫إن ﻛﻠﻔﺔ اﳌﺨﺘﱪ اﻟﺘﺄﺳﻴﺴﻴﺔ أﻗﻞ ﺑﻜﺜﲑ ﻣﻘﺎرﻧﺔ ﻣﻊ اﳌﺨﺎﺑﺮ اﻟﺘﻄﺒﻴﻘﻴﺔ اﻷﺧﺮى ﺣﻴﺚ أن ﻫﺬا اﳌﺨﱪ ﻳﺘﻴﺢ ﻟﻠﻄﻼب اﻟﻌﻤﻞ ﻋﻠﻰ اﻟﺘﺠﺮﺑﺔ دون‬
‫اﳊﺎﺟﺔ ﻟﺘﻨﺼﻴﺐ أي ﺑﺮاﻣﺞ أو ﺗﻌﺎرﻳﻒ ﻛﻴﺎن ﺻﻠﺐ أو ﺷﺮاء أي ﲡﻬﻴﺰات إﺿﺎﻓﻴﺔ‪ ،‬ﻛﻞ ﻣﺎ ﺳﻮف ﳛﺘﺎﺟﻪ اﻟﻄﺎﻟﺐ ﻫﻮ ﺧﻂ إﻧﱰﻧﺖ رﻗﻤﻲ‬
‫)‪ (ADSL‬ﺑﺴﺮﻋﺔ ﻻ ﺗﻘﻞ ﻋﻦ ‪ ،512KB‬ﻛﻤﺎ ﻳﺴﺘﻄﻴﻊ اﻟﻄﺎﻟﺐ اﻟﻮﺻﻮل إﱃ اﻟﺘﺠﺮﺑﺔ ﻣﻦ ﺧﻼل راﺑﻂ دﺧﻮل إﱃ ﺟﻬﺎز اﻟﺘﺠﺮﺑﺔ‪ ،‬ﺣﻴﺚ ﻳﺘﻢ‬
‫ﺗﺰوﻳﺪ اﻟﻄﺎﻟﺐ ﺑﻌﻨﻮان ﺧﺎص )‪ (Private IP‬وﻛﻠﻤﺔ ﻣﺮور ﻟﻠﺪﺧﻮل إﱃ اﻟﺘﺠﺮﺑﺔ وﻳﺘﻢ اﻟﻮﺻﻮل ﻣﻦ ﺧﻼل ﺧﺪﻣﺔ ‪ Remote Desktop‬ﻛﻤﺎ‬
‫ﻫﻮ ﻣﺒﲔ ﻋﻠﻰ اﻟﺸﻜﻞ‪.59-6‬‬

‫‪339‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 Designing The Laboratory Experiments | ‫ﺗﺼﻤﻴﻢ اﻟﺘﺠﺎرب اﳌﺨﱪﻳﺔ‬

VPN
Internet

1MB ADSL Server

Router

Remote-Lab PC
5.0.71.98

USB Bus

USB Bus
Signals Bus

‫ اﳌﺨﻄﻂ اﳍﻴﻜﻠﻲ ﻟﻌﻨﺎﺻﺮ ﻣﻨﻈﻮﻣﺔ ﺗﺸﻐﻴﻞ اﳌﺨﱪ ﻋﻦ ﺑﻌﺪ‬58-6‫اﻟﺸﻜﻞ‬

‫ وﻋﻨﻮان اﻻﺗﺼﺎل ﻣﻊ اﻟﺘﺠﺮﺑﺔ ﻋﻦ ﺑﻌﺪ‬LogMeIn ‫ اﻟﱪﻧﺎﻣﺞ‬59-6‫اﻟﺸﻜﻞ‬

Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages 340
‫‪26‬‬ ‫اﻟﻔﺼﻞ اﻟﺴﺎدس | ‪Chapter 6‬‬

‫اﻟﺸﻜﻞ‪ 60-6‬واﻟﺸﻜﻞ‪ 61-6‬ﻳﺒﻴﻨﺎن ﻣﻨﺼﺔ اﳌﺨﺘﱪ ‪ Remote-Lab‬وﻋﻨﺎﺻﺮ اﻟﺘﺠﺮﺑﺔ واﻟﺘﺠﻬﻴﺰات اﳌﺮﺗﺒﻄﺔ وﻫﻲ ﰲ ﳕﻂ اﻟﺘﺸﻐﻴﻞ ﻋﻦ ﺑﻌﺪ‪.‬‬

‫اﻟﺸﻜﻞ‪ 60-6‬اﳌﻨﺼﺔ واﻟﺘﺠﻬﻴﺰات اﳋﺎﺻﺔ ﺑﺘﺠﺮﺑﺔ اﳌﺨﱪ ﻋﻦ ﺑﻌﺪ‬

‫اﻟﺸﻜﻞ‪ 61-6‬رﺑﻂ ﻟﻮﺣﺔ اﻟﺘﻄﻮﻳﺮ واﻟﻮﺣﺪات اﻹﺿﺎﻓﻴﺔ واﻟﺘﺠﻬﻴﺰات اﻷﺧﺮى‬

‫اﻟﺸﻜﻞ‪ 62-6‬ﻳﺒﲔ ﺳﻄﺢ ﻣﻜﺘﺐ ﺟﻬﺎز ﻳﺘﻮاﺻﻞ ﻣﻊ اﻟﺘﺠﺮﺑﺔ وﻳﺸﻐﻠﻬﺎ ﻋﻦ ﺑﻌﺪ‪ ،‬وﻳﻌﺮض ﺻﻮرة ﺣﻴﺔ ﻟﻠﻮﺣﺔ اﻟﺘﻄﻮﻳﺮ‪ ،‬وﻳﺘﻢ ﻣﺮاﻗﺒﺔ اﻹﺷﺎرات‬
‫وﺗﺴﺠﻴﻠﻬﺎ ﻣﻦ ﺧﻼل اﻟﱪﻧﺎﻣﺞ اﳋﺎص ﲟﺤﻠﻞ اﻹﺷﺎرات )‪ (Logic Analyzer‬اﳌﺮﺗﺒﻂ ﻣﻊ اﻟﺘﺠﺮﺑﺔ‪.‬‬
‫‪341‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 Designing The Laboratory Experiments | ‫ﺗﺼﻤﻴﻢ اﻟﺘﺠﺎرب اﳌﺨﱪﻳﺔ‬

.‫ اﻟﺪﺧﻮل إﱃ اﻟﺘﺠﺮﺑﺔ ﻣﻦ ﺟﻬﺎز ﺑﻌﻴﺪ وﺗﺸﻐﻴﻠﻬﺎ‬62-6‫اﻟﺸﻜﻞ‬

Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages 342
‫‪26‬‬ ‫اﻟﻔﺼﻞ اﻟﺴﺎدس | ‪Chapter 6‬‬

‫اﻟﺨﻼﺻﺔ )‪:(Conclusion‬‬ ‫‪8-6‬‬

‫ﻗﺪم ﻫﺬا اﻟﻔﺼﻞ ﳕﻮذﺟﺎً ﻣﻔﺼﻼً ﻋﻦ اﻟﺪراﺳﺔ اﻟﺘﻄﺒﻴﻘﻴﺔ ﻟﻠﺒﺤﺚ اﺳﺘﻨﺎداً إﱃ اﳍﻴﻜﻠﻴﺔ اﻟﺒﻨﺎﺋﻴﺔ ﻟﻠﺘﺠﺎرب اﻟﻌﻤﻠﻴﺔ اﻟﱵ ﺗﺴﺘﻨﺪ إﱃ ﻣﻮﺿﻮﻋﺎت‬
‫اﻟﻔﺼﻮل اﻟﺴﺎﺑﻘﺔ وﺧﺼﻮﺻﺎً ﳕﻮذج اﻟﺘﻌﻠﻴﻢ اﳌﺨﱪي اﳍﺠﲔ اﻟﺬي ﻳﻀﻢ اﻷﺻﻨﺎف اﻟﺜﻼﺛﺔ ﻟﻠﺘﻌﻠﻴﻢ اﳌﺨﱪي‪.‬‬

‫اﻟﺪراﺳﺔ اﻧﻄﻠﻘﺖ ﻣﻦ ﲝﺚ ﺷﺎﻣﻞ ﻋﻦ ﻟﻮﺣﺔ اﻟﺘﻄﻮﻳﺮ اﻷﻧﺴﺐ ﻟﺒﻨﺎء ﻫﺬا اﻟﻨﻈﺎم اﻟﺘﻌﻠﻴﻤﻲ‪ ،‬إذ أن اﺧﺘﻴﺎر ﻋﻨﺎﺻﺮ وأدوات أي ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ‬
‫ﻳﻌﺘﱪ ﻣﻦ اﻷﻣﻮر اﳍﺎﻣﺔ ﺟﺪاً وﳚﺐ أن ﻳﺘﻢ ﺑﻌﻨﺎﻳﺔ ﻓﺎﺋﻘﺔ‪ ،‬إذ أن اﻷدوات واﻟﻌﻨﺎﺻﺮ ﳚﺐ أن ﺗﻜﻮن ذات ﺻﻠﺔ ﻣﺒﺎﺷﺮة ﺑﺎﻷدوات اﳌﺴﺘﺨﺪﻣﺔ ﰲ‬
‫اﻟﻮاﻗﻊ )اﻟﺼﻨﺎﻋﺔ(‪.‬‬

‫اﻟﺪراﺳﺔ ﻗﺪﻣﺖ أﻳﻀﺎً ﺗﺼﻤﻴﻤﺎً ﻟﻠﻮﺣﺔ ﺗﻮﺳﻌﺔ إﺿﺎﻓﻴﺔ ﺗﺮﺑﻂ إﱃ ﻟﻮﺣﺔ اﻟﺘﻄﻮﻳﺮ‪ ،‬وﳏﻴﻄﻴﺎت أﺧﺮى ﰎ ﺗﺼﻤﻴﻤﻬﺎ ﺑﺪف اﺳﺘﺜﻤﺎر اﻟﻨﻈﺎم ﰲ ﺑﻨﺎء‬
‫ﺗﻄﺒﻴﻘﺎت ﻋﻤﻠﻴﺔ أﻛﺜﺮ ﴰﻮﻟﻴﺔ‪.‬‬

‫اﳌﺮﺣﻠﺔ اﻟﺘﺎﻟﻴﺔ ﻣﻦ ﻫﺬا اﻟﺒﺤﺚ ﺗﻀﻤﻨﺖ ﺑﻨﺎء اﻟﻌﺪﻳﺪ ﻣﻦ اﻟﺘﺠﺎرب واﻟﺘﻄﺒﻴﻘﺎت اﻟﱪﳎﻴﺔ – ﺑﺎﺳﺘﺨﺪام ﻟﻮﺣﺔ اﻟﺘﻄﻮﻳﺮ اﳌﻌﺘﻤﺪة ﰲ اﻟﺪراﺳﺔ واﻟﺒﻴﺌﺔ‬
‫اﻟﱪﳎﻴﺔ اﻟﺮﺳﻮﻣﻴﺔ ‪ LabVIEW‬ﻣﺘﻀﻤﻨﺔً اﳌﻜﺘﺒﺎت اﳋﺎﺻﺔ ﺑﱪﳎﺔ ﺗﻘﻨﻴﺔ اﻟـ‪ – FPGA‬اﻟﱵ ﻏﻄﺖ ﻣﻌﻈﻢ اﶈﻴﻄﻴﺎت واﻟﺘﻄﺒﻴﻘﺎت اﳌﺪﳎﺔ ﻋﻠﻰ‬
‫ﻟﻮﺣﺔ اﻟﺘﻄﻮﻳﺮ ‪ ،Spartan-3E‬إﺿﺎﻓﺔً إﱃ ﳎﻤﻮﻋﺔ إﺿﺎﻓﻴﺔ ﻣﻦ اﻟﺘﺠﺎرب ﺗﺘﻌﻠﻖ ﺑﺎﻟﻮﺣﺪات اﶈﻴﻄﻴﺔ اﻹﺿﺎﻓﻴﺔ اﻟﱵ ﰎ ﺗﺼﻤﻴﻤﻬﺎ‪.‬‬

‫ﻗﺪم ﻫﺬا اﻟﻔﺼﻞ أﻳﻀﺎً ﳕﻮذﺟﺎً ﻣﻨﻬﺠﻴﺎً ﺑﻨﺎﺋﻴﺎً ﻟﺘﺼﻤﻴﻢ دﻟﻴﻞ اﻟﺘﺠﺎرب اﻟﻌﻤﻠﻴﺔ اﻋﺘﻤﺎداً ﻋﻠﻰ اﻟﻨﻤﻮذج اﻟﺸﻤﻮﱄ اﳌﺼﻤﻢ ﰲ اﻟﻔﺼﻞ اﳋﺎﻣﺲ‪،‬‬
‫ﺣﻴﺚ ﰎ وﺿﻊ دﻟﻴﻞ اﻟﺘﺠﺎرب ﲝﻴﺚ ﻳﺴﺘﻄﻴﻊ اﻟﻄﺎﻟﺐ ﺗﻨﻔﻴﺬ اﻟﺘﺠﺮﺑﺔ ﺑﺸﻜﻞ ذاﰐ دون اﳊﺎﺟﺔ إﱃ وﺟﻮد ﻣﻮﺟﻪ ﻟﻪ ﰲ ﻛﻞ ﻣﺮﺣﻠﺔ‪ ،‬وﰎ ﺗﻘﺴﻴﻢ‬
‫ﻛﻞ ﲡﺮﺑﺔ إﱃ ﺛﻼث ﻣﺮاﺣﻞ‪ :‬ﻣﺮﺣﻠﺔ ﺗﺘﻢ ﺑﺸﻜﻞ أوﱄ وﻓﻘﺎً ﻟﻨﻤﻮذج اﳌﺨﺘﱪ اﻟﺘﺤﻀﲑي‪ ،‬وﻣﺮﺣﻠﺔ رﺋﻴﺴﻴﺔ ﺗﺘﺒﻊ ﳕﻮذج اﳌﺨﺘﱪ اﻟﺘﻄﺒﻴﻘﻲ‪ ،‬واﳌﺮﺣﻠﺔ‬
‫اﻷﺧﲑة داﻋﻤﺔ وﺗﺴﺘﻨﺪ إﱃ ﳕﻮذج اﳌﺨﱪ ﻋﻦ ﺑﻌﺪ‪.‬‬

‫اﻟﺒﺤﺚ أﻛﺪ ﻋﻠﻰ أﻧﻪ ﻣﻦ اﳌﻬﻢ ﺟﺪاً ﺗﻘﺪﱘ اﻻﻋﺘﺒﺎرات واﳌﺒﺎدئ اﻷﺳﺎﺳﻴﺔ ﻟﻠﺘﺠﺮﺑﺔ )‪ (Concepts‬ﺑﺸﻜﻞ ﻣﺴﺒﻖ ﺿﻤﻦ اﳌﺨﺘﱪ اﻟﺘﻤﻬﻴﺪي‪،‬‬
‫ﰒ ﺗﻄﺒﻴﻖ ﻫﺬﻩ اﻻﻋﺘﺒﺎرات ﻟﺒﻨﺎء اﻟﺘﺠﺮﺑﺔ ﺑﺎﺳﺘﺨﺪام اﳊﺎﺳﺐ‪ ،‬ﰒ ﻻﺣﻘﺎً ﺗﺸﻐﻴﻞ وﳏﺎﻛﺎة اﻟﺘﻄﺒﻴﻖ ﰲ ﺑﻴﺌﺔ اﳌﺨﺘﱪ اﻟﺘﻄﺒﻴﻘﻲ اﳊﻘﻴﻘﻲ‪.‬‬

‫اﻟﻮﻇﺎﺋﻒ واﻻﺧﺘﺒﺎرات واﳌﺸﺎرﻳﻊ ﺗﻌﺘﱪ ﻋﺎﻣﻼً ﻣﻬﻤﺎً ﰲ ﺗﻌﺰﻳﺰ ﻓﻬﻢ اﻟﻄﻼب وﺗﻌﻤﻴﻖ ﲡﺮﺑﺘﻬﻢ اﻟﻌﻤﻠﻴﺔ‪ ،‬وﻣﻦ اﳌﻬﻢ ﺟﺪاً ﺗﻮﺟﻴﻪ اﻟﻄﻼب ﳓﻮ‬
‫اﻟﺘﻌﻠﻢ اﻟﺘﻌﺎوﱐ اﻟﺘﺸﺎرﻛﻲ ﻣﻦ ﺧﻼل إدارة اﳌﻨﺎﻗﺸﺎت اﳉﻤﺎﻋﻴﺔ ﺣﻮل ﻣﻮﺿﻮﻋﺎت اﻟﺘﺠﺎرب‪.‬‬

‫ﻟﺘﺠﺎرب واﻟﺘﻄﺒﻴﻘﺎت واﻟﻮﻇﺎﺋﻒ واﳌﺸﺎرﻳﻊ اﳌﺴﻨﺪة إﱃ اﻟﻄﻼب ﳚﺐ أن ﺗﻜﻮن ذات ارﺗﺒﺎط ﻣﺒﺎﺷﺮ ﺑﺎﻟﺘﻄﺒﻴﻘﺎت اﻟﻌﻤﻠﻴﺔ اﻟﻮاﻗﻌﻴﺔ وﻬﺗﺪف‬
‫ﺑﺎﻟﻨﺘﻴﺠﺔ إﱃ ﻣﺸﺮوع ﺗﻄﺒﻴﻖ واﻗﻌﻲ ﺣﻘﻴﻘﻲ ﳝﻜﻦ أن ﻳﻜﻮن ﺣﻼً ﻣﺮﺣﻠﻴﺎً أو ﻣﺴﺘﻘﺒﻠﻴﺎً ﳌﺸﻜﻠﺔ ﰲ اﻟﺼﻨﺎﻋﺔ‪.‬‬

‫أﺧﲑاً ﻳﻌﺘﱪ اﳌﺨﺘﱪ ﻋﻦ ﺑﻌﺪ ﺣﻼً ﻣﺜﺎﻟﻴﺎً ﻳﻔﺴﺢ ﻟﻠﻄﺎﻟﺐ اﻟﻔﺮﺻﺔ ﺑﺎﻟﺘﻮاﺻﻞ ﺑﺸﻜﻞ أﻛﱪ ﻣﻊ اﻟﺘﺠﺮﺑﺔ‪ ،‬وذﻟﻚ ﻷن اﻟﻮﻗﺖ اﳌﺘﺎح ﰲ ﺟﻠﺴﺔ‬
‫اﳌﺨﺘﱪ اﻟﺘﻄﺒﻴﻘﻲ ﻻ ﻳﻜﻔﻲ ﻟﺘﻌﻤﻴﻖ اﳌﻔﻬﻮم اﻟﺘﻄﺒﻴﻘﻲ‪.‬‬

‫‪343‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 Designing The Laboratory Experiments | ‫ﺗﺼﻤﻴﻢ اﻟﺘﺠﺎرب اﳌﺨﱪﻳﺔ‬

Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages 344
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814. Zeroplus LAP-C(16128) Logic Analyzer, www.zeroplus.com.tw/logic-analyzer_en

Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages 374
‫‪A1‬‬ ‫اﳌﻠﺤﻖ اﻷول| ‪Appendix 1‬‬

‫اﻟﻤﻠﺤﻖ اﻷول )‪(Appendix 1‬‬

‫‪@Ô‹j‘nèæa@ãÌÏ�n€aÎ@szj€a@÷bœeÎ@pbÓñÏn€aÎ@pbya6”¸aÎ@wˆbn‰€a‬‬

‫‪SUGGESTIONS & RECOMMENDATIONS FOR FUTURE WORK‬‬

‫ﻣﻠﺨﺺ اﻟﺪراﺳﺔ )‪:(The Summery of the Study‬‬

‫اﻟﺪراﺳﺔ اﻟﺒﺤﺜﻴﺔ اﻹﺣﺼﺎﺋﻴﺔ اﻟﻤﻘﺎرﻧﺔ ﻓﻲ اﻟﻔﺼﻞ اﻷول أﻛﺪت ﻋﻠﻰ أﳘﻴﺔ اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ وﻋﻠﻰ ﺿﺮورة ﺗﺒﲏ ﻣﻨﺎﻫﺞ ﺗﻌﻠﻴﻤﻴﺔ ﺗﻮاﻓﻖ‬
‫ﻣﺘﻄﻠﺒﺎت اﻟﺘﻘﺪم اﻟﺘﻜﻨﻮﻟﻮﺟﻲ‪ ،‬وﻗﺪ ﻇﻬﺮ ﺟﻠﻴﺎً أن ﺗﻘﻨﻴﺔ اﻟـ‪ FPGA‬ﻫﻲ اﻟﺘﻘﻨﻴﺔ اﻟﱵ ﲢﺘﻞ أﻋﻠﻰ اﻷوﻟﻮﻳﺎت ﻛﺤﻞ ﺗﻜﻨﻮﻟﻮﺟﻲ ﻣﺮﺣﻠﻲ وﻣﺴﺘﻘﺒﻠﻲ‬
‫ﳌﻌﻈﻢ ﺗﻄﺒﻴﻘﺎت اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ ﺑﻜﺎﻓﺔ ﻓﺮوﻋﻬﺎ ﻣﻦ ﺗﻄﺒﻴﻘﺎت ﺻﻨﺎﻋﻴﺔ وﻃﺒﻴﺔ وﻋﺴﻜﺮﻳﺔ وﺧﺪﻣﻴﺔ وﻏﲑﻫﺎ‪ ،‬وذﻟﻚ ﻧﻈﺮاً ﻟﻠﻤﺮوﻧﺔ اﻟﻜﺒﲑة ﰲ إﻋﺎدة‬
‫ﺗﺸﻜﻴﻞ اﻟﻜﻴﺎن اﻟﺼﻠﺐ ﳍﺬﻩ اﻟﺘﻘﻨﻴﺔ‪ ،‬إﺿﺎﻓﺔً إﱃ ﺳﻌﺔ اﳌﻌﺎﳉﺔ اﻟﻌﺎﻟﻴﺔ‪ ،‬وﻗﺎﺑﻠﻴﺔ إﻋﺎدة اﺳﺘﺨﺪام اﻟﻮﺣﺪات اﻟﱪﳎﻴﺔ "‪ ،"IPs‬وﻏﲑﻫﺎ ﻣﻦ اﳌﻴﺰات‬
‫اﻟﱵ ﻛﺎﻧﺖ ﺳﺒﺒﺎً ﰲ ﺟﻌﻞ ﻫﺬﻩ اﻟﺘﻘﻨﻴﺔ اﳊﻞ اﻟﺒﺪﻳﻞ ﻟﺘﻘﻨﻴﺎت ﻋﺪﻳﺪة ﺳﺎدت ﻟﻌﻘﻮد ﻣﻦ اﻟﺰﻣﻦ‪.‬‬

‫اﻟﺪراﺳﺔ اﻟﺒﺤﺜﻴﺔ اﻹﺣﺼﺎﺋﻴﺔ اﻟﻤﻘﺎرﻧﺔ ﻓﻲ اﻟﻔﺼﻞ اﻟﺜﺎﻧﻲ ﺑﻴﻨﺖ دور اﺳﺘﺨﺪم ﺗﻘﻨﻴﺔ اﻟـ ‪ FPGA‬ﻛﻮﺳﻴﻠﺔ ﺗﻌﻠﻴﻤﻴﺔ أﺳﺎﺳﻴﺔ ﰲ اﳌﺨﺘﱪات‬
‫اﳉﺎﻣﻌﻴﺔ ﻟﺘﻌﻠﻴﻢ اﻟﻄﻼب ﻣﺒﺎدئ ﺗﺼﻤﻴﻢ اﻟﺪارات اﳌﻨﻄﻘﻴﺔ‪ ،‬ﺗﺼﻤﻴﻢ اﻷﻧﻈﻤﺔ اﻟﺮﻗﻤﻴﺔ‪ ،‬ﺗﺼﻤﻴﻢ أﻧﻈﻤﺔ اﻟﺰﻣﻦ اﳊﻘﻴﻘﻲ‪ ،‬ﺑﺮﳎﺔ اﳌﻌﺎﳉﺎت اﳌﺼﻐﺮة‪،‬‬
‫ﺗﺼﻤﻴﻢ أﻧﻈﻤﺔ ﻣﻌﺎﳉﺔ اﻹﺷﺎرة اﻟﺮﻗﻤﻴﺔ‪ ،‬ﺣﻴﺚ أن اﺳﺘﺨﺪام اﻟـ ‪ FPGA‬ﻛﻮﺳﻴﻠﺔ ﺗﻌﻠﻴﻤﺔ ﻳﺰود اﻟﻄﻼب ﺑﺎﻟﻔﺮﺻﺔ اﳌﺜﻠﻰ ﻟﻠﻌﻤﻞ ﻋﻠﻰ ﻣﺸﺎرﻳﻊ‬
‫ﻫﺎدﻓﺔ ذات ﺗﻄﺒﻴﻖ واﻗﻌﻲ وذو أﺛﺮ ﻣﻠﻤﻮس‪ ،‬ﺑﺪﻻً ﻣﻦ اﺳﺘﺨﺪام ﺑﺮاﻣﺞ اﶈﺎﻛﺎة‪ .‬وﻋﻠﻴﻪ‪ ،‬وﻧﻈﺮاً ﻟﻠﺘﻮﺟﻪ اﻟﺘﻜﻨﻮﻟﻮﺟﻲ اﻟﻜﺒﲑ اﻟﺬي ﲢﺘﻠﻪ ﺗﻘﻨﻴﺔ‬
‫اﻟـ‪ FPGA‬واﻟﺘﻄﻮر اﳌﺘﺴﺎرع ﳍﺬﻩ اﻟﺘﻘﻨﻴﺔ‪ ،‬ﻓﺈن اﻟﻌﺪﻳﺪ ﻣﻦ اﻷﲝﺎث أﻛﺪت ﻋﻠﻰ ﺿﺮورة أﻧﻌﻜﺎس ﻫﺬﻩ اﻻﲡﺎﻫﺎت اﻟﺘﻜﻨﻮﻟﻮﺟﻴﺔ اﳉﺪﻳﺪة ﺣﻘﻴﻘﺔ‬
‫ﻋﻤﻠﻴﺔ ﰲ اﻷﻧﺸﻄﺔ اﻟﱰﺑﻮﻳﺔ‪ ،‬وذﻟﻚ ﻣﻦ ﺧﻼل ﺗﺒﲏ ﻣﻨﺎﻫﺞ ﺗﻌﻠﻴﻤﻴﺔ ﺗﻮاﻓﻖ ﻣﺘﻄﻠﺒﺎت اﻟﺘﻘﺪم اﻟﺘﻜﻨﻮﻟﻮﺟﻲ وﺣﺎﺟﺔ اﻟﺼﻨﺎﻋﺔ‪ ،‬وﺑﺎﻟﺘﺎﱄ ﻓﺈﻧﻪ ﻣﻦ‬
‫اﻟﻀﺮوري وﺟﻮد ﻣﺮاﺟﻌﺔ وﺗﻄﻮﻳﺮ ﻣﺴﺘﻤﺮ ﻟﻠﻤﻨﺎﻫﺞ اﻟﺪراﺳﻴﺔ اﳉﺎﻣﻌﻴﺔ‪ ،‬ﺗﺪف إﱃ دﻣﺞ اﻟﺘﻄﻮرات اﳉﺪﻳﺪة ﻟﺘﻘﻨﻴﺔ اﻟـ‪ FPGAs‬أدواﻬﺗﺎ وزﻳﺎدة‬
‫ﻓﺎﻋﻠﻴﺔ وﻓﺎﺋﺪة اﳋﱪة اﻟﻌﻤﻠﻴﺔ ﰲ اﶈﺎﺿﺮات اﻟﻨﻈﺮﻳﺔ‪ ،‬وذﻟﻚ ﻣﻦ ﺧﻼل اﻋﺘﻤﺎد اﺳﱰاﺗﻴﺠﻴﺔ إﺿﺎﻓﺔ ﻣﻨﺎﻫﺞ ﺗﻌﻠﻴﻤﻴﺔ ﻟﺘﺼﻤﻴﻢ اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ‬
‫ﺑﺎﺳﺘﺨﺪام ﺗﻘﻨﻴﺔ اﻟـ‪ ،FPGA‬ﲝﻴﺚ ﺗﺮﺗﻜﺰ ﻫﺬﻩ اﻻﺳﱰاﺗﻴﺠﻴﺔ ﻋﻠﻰ ﻃﺮاﺋﻖ اﻟﺘﺼﻤﻴﻢ وأدواﺗﻪ اﻟﻌﻤﻠﻴﺔ ﺑﺪﻻً ﻣﻦ اﻟﺪﻗﺎﺋﻖ اﻟﻨﻈﺮﻳﺔ‪ ،‬ﲝﻴﺚ ﻳﻜﻮن‬
‫اﻟﻄﻼب أﻗﺮب ﻣﺎ ﳝﻜﻦ إﱃ اﻷدوات واﻻﺳﱰاﺗﻴﺠﻴﺎت اﻟﱵ ﺗﺴﺘﺨﺪم ﰲ اﻟﺼﻨﺎﻋﺔ‪ ،‬وذﻟﻚ ﺑﺪف ﺗﻘﻠﻴﺺ اﻟﻔﺠﻮة ﺑﲔ اﳌﺆﺳﺴﺎت اﻟﺘﻌﻠﻴﻤﻴﺔ‬
‫واﻟﺼﻨﺎﻋﺔ‪ ،‬ﻓﻼ ﻳﺒﻘﻰ اﻟﺘﺴﺎؤل اﶈﲑ ﻳﻄﺮق ﻣﺴﺎﻣﻌﻨﺎ ﻋﻠﻰ اﻟﺪوام ﺑـﺨﻄﺎب‪" :‬ﻛﻢ ﻣﻦ اﻟﻄﻼب واﳌﻬﻨﺪﺳﲔ ﰲ ﻓﺮوع اﻟﻌﻠﻮم اﳍﻨﺪﺳﻴﺔ ﰲ ﺟﺎﻣﻌﺎﺗﻨﺎ‬
‫ﻗﺎدرﻳﻦ ﻋﻠﻰ ﺗﺼﻤﻴﻢ أﻧﻈﻤﺔ اﻟـ‪!FPGA‬؟"‬

‫‪375‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫اﺳﻢ اﳌﻠﺤﻖ | ‪Appendix Name‬‬

‫اﻟﺪراﺳﺔ اﻟﺒﺤﺜﻴﺔ اﻹﺣﺼﺎﺋﻴﺔ اﻟﻤﻘﺎرﻧﺔ ﻓﻲ اﻟﻔﺼﻞ اﻟﺜﺎﻟﺚ ﺟﺎءت ﻣﻜﻤﻠﺔ ﻟﺴﺎﺑﻘﺘﻬﺎ وأﻛﺪت ﻋﻠﻰ أن ﺗﺼﻤﻴﻢ اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ أﺻﺒﺢ ﰲ ﻫﺬا‬
‫اﻟﻮﻗﺖ أﻣﺮاً أﺳﺎﺳﻴﺎً ﰲ اﳌﻨﺎﻫﺞ اﻟﺘﻌﻠﻴﻤﻴﺔ اﳍﻨﺪﺳﻴﺔ‪ ،‬وإن اﺳﺘﺨﺪام ﻟﻐﺎت اﻟﱪﳎﺔ اﻟﺘﻘﻠﻴﺪﻳﺔ اﻟﻨﺼﻴﺔ ﻳﻌﻴﻖ اﻟﻄﻼب واﻟﺒﺎﺣﺜﲔ ﻣﻦ اﻻﺳﺘﻔﺎدة ﻣﻦ‬
‫اﻟﻌﺪﻳﺪ ﺣﻠﻮل اﻟﻜﻴﺎن اﻟﺼﻠﺐ اﳌﺘﻮﻓﺮة )‪ (FPGAs‬واﻟﱵ ﳝﻜﻦ أن ﲡﻌﻞ اﻟﻌﻤﻠﻴﺔ اﻟﺘﻌﻠﻴﻤﻴﺔ أﻛﺜﺮ ﻓﻌﺎﻟﻴﺔ وواﻗﻌﻴﺔ‪ ،‬ﺣﻴﺚ أن ﻟﻐﺎت وﺻﻒ اﻟﻜﻴﺎن‬
‫ﻋﺎل ﻣﻦ اﳋﱪة ﰲ اﻟﻜﻴﺎن اﻟﺼﻠﺐ ﻟﻴﺘﻢ ﺗﻮﻇﻴﻔﻬﺎ ﺑﺸﻜﻞ ﻓﻌﺎل؛ اﻟﺴﺒﺐ اﻟﺬي ﳚﻌﻞ ﻣﻄﻮري اﻟﱪاﻣﺞ‬ ‫اﻟﺼﻠﺐ )‪ (HDLs‬ﲢﺘﺎج إﱃ ﻣﺴﺘﻮى ٍ‬
‫اﳊﺎﺳﻮﺑﻴﺔ ﻳﻌﺎﻧﻮن ﻣﻦ ﻧﻘﺺ اﳋﱪة ﺣﻮل ﺗﻔﺎﺻﻴﻞ وﺗﻌﻘﻴﺪات ﺗﻄﻮﻳﺮ اﻟﻜﻴﺎن اﻟﺼﻠﺐ ﳑﺎ ﳛﺪ ﻣﻦ ﻘﺪرﻬﺗﻢ ﻋﻠﻰ ﺗﺼﻤﻴﻢ وﺗﻄﻮﻳﺮ ﺗﻄﺒﻴﻘﺎت‬
‫اﻟﻜﻴﺎن اﻟﺼﻠﺐ‪ .‬وﻋﻠﻴﻪ ﻓﺈن اﻷﲝﺎث ﺗﺆﻛﺪ ﻋﻠﻰ ﺿﺮورة ﺗﻄﻮﻳﺮ وﺗﺒﲏ ﺑﻴﺌﺎت ﺑﺮﳎﻴﺔ ﺟﺪﻳﺪة ﻋﻠﻰ ﻣﺴﺘﻮى ﺟﺪﻳﺪ‪ ،‬وذﻟﻚ ﺑﻌﻴﺪاً ﻋﻦ اﻟﻠﻐﺎت‬
‫اﻟﻨﺼﻴﺔ ﻣﺜﻞ‪ :‬اﻟﺒﻴﺌﺎت اﻟﺮﺳﻮﻣﻴﺔ ﲝﻴﺚ ﳝﻜﻦ اﻟﱪﳎﺔ ﺑﻜﻼ اﳌﻨﺤﻴﲔ ﺑﻨﻔﺲ اﻟﻮﻗﺖ وﺿﻤﻦ ﺑﻴﺌﺔ ﺑﺮﳎﻴﺔ واﺣﺪة‪ ،‬ﲟﺎ ﰲ ذﻟﻚ ﻣﺮاﺣﻞ اﻟﺘﺤﻠﻴﻞ‬
‫واﻟﻔﺤﺺ واﻟﺘﻨﻔﻴﺬ‪ .‬ﻛﻤﺎ أﻧﻪ ﻣﻦ أﺟﻞ ﺑﺮﳎﺔ اﻷﻧﻈﻤﺔ اﳌﺪﳎﺔ ﻋﻤﻮﻣﺎً‪ ،‬وﺗﻘﻨﻴﺔ اﻟـ‪ FPGA‬ﻋﻠﻰ ﳓﻮ ﺧﺎص‪ ،‬ﻓﺈﻧﻪ ﻣﻦ اﻟﻀﺮوري ﺟﺪاً وﺟﻮد ﲢﻮل‬
‫أو اﻧﺘﻘﺎل ﺟﺬري ﰲ اﳌﻨﻬﺠﻴﺔ اﻟﱪﳎﻴﺔ اﳌﺘﺒﻌﺔ ﻣﻦ ﺧﻼل ﻟﻐﺎت اﻟﱪﳎﻴﺔ اﻟﺮﺳﻮﻣﻴﺔ وذﻟﻚ ﻧﻈﺮاً ﻻرﺗﻜﺎزﻫﺎ ﻋﻠﻰ ﻣﻨﻬﺠﻴﺔ ﺗﺪﻓﻖ اﻟﺒﻴﺎﻧﺎت‬
‫)‪ .(Dataflow‬ﻟﻘﺪ أﺛﺒﺘﺖ ﻟﻐﺎت اﻟﱪﳎﺔ اﻟﺮﺳﻮﻣﻴﺔ )‪ (LabVIEW‬ﻓﻌﺎﻟﻴﺘﻬﺎ ﻋﻠﻰ ﻟﻐﺎت اﻟﱪﳎﺔ اﻟﻨﺼﻴﺔ‪ ،‬ﻛﻤﺎ أ�ﺎ أﺳﺮع ﲞﻤﺲ إﱃ ﻋﺸﺮ‬
‫ﻣﺮات ﻣﻦ اﻟﻠﻐﺎت اﻟﻨﺼﻴﺔ ﰲ ﺗﻄﻮﻳﺮ اﻟﺘﻄﺒﻴﻘﺎت‪ .‬ﻋﻼوةً ﻋﻠﻰ ذﻟﻚ ﻓﺈن ﻟﻐﺎت اﻟﱪﳎﺔ اﻟﺮﺳﻮﻣﻴﺔ ﺗﻌﺰز اﻹﻧﺘﺎﺟﻴﺔ ﻟﺪى اﻟﺒﺎﺣﺜﲔ وﻣﻄﻮري‬
‫اﻟﺘﻄﺒﻴﻘﺎت ﺑﻐﺾ اﻟﻨﻈﺮ ﻋﻦ ﻣﺴﺘﻮى ﱪﻬﺗﻢ اﻟﱪﳎﻴﺔ‪ ،‬وذﻟﻚ ﻷن اﻟﻠﻐﺎت اﻟﺮﺳﻮﻣﻴﺔ ﺗﻌﻄﻲ ﺗﻨﻈﻴﻤﺎً ﺑﺪﻫﻴﺎً‪ ،‬وﲡﻌﻞ اﳌﻌﻠﻮﻣﺎت واﺿﺤﺔ وﻣﺮﺋﻴﺔ‪،‬‬
‫وﻫﻮ اﻟﺴﺒﺐ اﻟﺬي ﳚﻌﻠﻬﺎ ﳏﻂ اﻫﺘﻤﺎم آﻻف اﳉﺎﻣﻌﺎت‪.‬‬

‫اﻟﺪراﺳﺔ اﻟﺒﺤﺜﻴﺔ ﻓﻲ اﻟﻔﺼﻞ اﻟﺮاﺑﻊ أﻛﺪت ﻋﻠﻰ أن ﺗﺼﻤﻴﻢ اﳌﻨﺎﻫﺞ اﻟﺘﻌﻠﻴﻤﻴﺔ ﳚﺐ أن ﻳﺮﺗﺒﻂ ﲟﻔﺎﻫﻴﻢ وﻣﺒﺎدئ ﻫﻨﺪﺳﻴﺔ )وﲢﺪﻳﺪاً ﲟﺒﺎدئ ﻣﻦ‬
‫ﻫﻨﺪﺳﺔ أﻧﻈﻤﺔ اﻟﺘﺤﻜﻢ(‪ ،‬ﻛﻤﺎ أﻛﺪت ﻋﻠﻰ أﳘﻴﺔ دور اﳌﺨﺎﺑﺮ ﰲ اﻟﻌﻠﻮم واﳍﻨﺪﺳﺔ‪ ،‬ﺣﻴﺚ ﺗﻌﺘﱪ اﳌﺨﺎﺑﺮ اﻟﺘﻄﺒﻴﻘﻴﺔ )‪(Hands-on Labs‬‬
‫اﻟﻨﻮع اﻷﻛﺜﺮ ﺷﻴﻮﻋﺎً‪ ،‬وﻟﻜﻦ اﻟﺘﻄﻮرات اﳊﺪﻳﺜﺔ ﰲ ﺗﻜﻨﻮﻟﻮﺟﻴﺎ اﳌﻌﻠﻮﻣﺎت واﻻﺗﺼﺎﻻت أدت إﱃ ﻇﻬﻮر ﻧﻮﻋﲔ ﺟﺪﻳﺪﻳﻦ ﻣﻦ اﻟﺘﻌﻠﻴﻢ اﳌﺨﱪي‬
‫ﳘﺎ‪ :‬اﳌﺨﺎﺑﺮ اﻻﻓﱰاﺿﻴﺔ )‪ ،(Virtual Labs‬واﳌﺨﺎﺑﺮ ﻋﻦ ﺑﻌﺪ )‪ ،(Remote Lab‬وﻗﺪ ﰎ اﺳﺘﻌﺮاض اﻟﺪراﺳﺎت اﻟﱵ ﻗﺎﻣﺖ ﻋﻠﻰ ﳐﺘﻠﻒ‬
‫أﻧﻮاع اﻟﺘﻌﻠﻴﻢ اﳌﺨﱪي واﻟﱵ أﻋﻄﺖ اﻟﺘﻔﺎﺻﻴﻞ ﻋﻦ ﻣﺰاﻳﺎ وﻋﻴﻮب ﻛﻞ ﻧﻮع ﻣﻦ ﺗﻠﻚ اﻷﻧﻮاع‪ .‬ﺗﺒﲔ أﻳﻀﺎً أن ﻫﻨﺎك ﻧﻘﺼﺎً ﰲ اﻟﺪراﺳﺎت اﻟﺘﺠﺮﻳﺒﻴﺔ‬
‫ﺣﻮل أﲝﺎث اﻟﺘﻌﻠﻴﻢ اﳌﺨﱪي‪ ،‬وﻛﺬﻟﻚ ﻓﺈن اﻟﺪراﺳﺎت أﻇﻬﺮت ﺗﻮاﻓﻘﺎً ﻋﺎﻣﺎً ﻋﻠﻰ ﺧﻼﺻﺔ واﺣﺪة وﻫﻲ اﳊﺎﺟﺔ إﱃ اﺳﺘﺨﺪام اﻟﻨﻤﻮذج اﳌﺨﺘﻠﻂ‬
‫ﻟﻠﻤﺨﺎﺑﺮ‪ .‬ﻋﻠﻰ اﻟﺮﻏﻢ ﻣﻦ ﺣﻘﻴﻘﺔ أن اﳌﺨﺎﺑﺮ اﻟﺘﻄﺒﻴﻘﻴﺔ ﻻ زاﻟﺖ ﺗﻠﻌﺐ دوراً ﳏﻮرﻳﺎً ﰲ اﻟﺘﻌﻠﻴﻢ اﳌﺨﱪي‪ ،‬إﻻ أن اﳉﻤﻊ ﺑﻴﻨﻬﺎ وﺑﲔ اﻷﻧﻮاع اﻷﺧﺮى‬
‫وﲢﻘﻴﻖ ﳕﻮذج ﻣﺘﻜﺎﻣﻞ وﺗﻄﺒﻴﻘﻪ ﳝﻜﻦ أن ﻳﻌﻄﻲ ﻧﺘﺎﺋﺞ ﺗﻌﻠﻴﻤﻴﺔ أﻓﻀﻞ‪.‬‬

‫اﻟﺪراﺳﺔ اﻟﺒﺤﺜﻴﺔ اﻟﺘﻄﺒﻴﻘﻴﺔ ﻓﻲ اﻟﻔﺼﻞ اﻟﺨﺎﻣﺲ ﻗﺪﻣﺖ ﲝﺜﺎً ﻣﻔﺼﻼً ﻋﻦ دراﺳﺔ ﺗﻌﻠﻴﻤﻴﺔ ﺗﺮﺑﻮﻳﺔ ﺗﺘﻌﻠﻖ ﺑﺎﻟﺘﻌﻠﻴﻢ اﳌﺨﱪي‪ ،‬اﺳﺘﺨﺪم ﻓﻴﻬﺎ‬
‫ﻣﻨﻬﺠﻴﺎت وﻧﻈﺮﻳﺎت ﻫﻨﺪﺳﺔ اﻟﺘﺤﻜﻢ ﰲ ﳕﺬﺟﺔ اﻟﻌﻤﻠﻴﺔ اﻟﺘﻌﻠﻴﻤﻴﺔ‪ ،‬وﻫﻮ ﳝﺜﻞ أول ﳕﻮذج ﺗﺮﺑﻮي ﺗﻄﺒﻴﻘﻲ ﻳﻌﺘﻤﺪ ﺑﺸﻜﻞ ﻛﺎﻣﻞ ﻋﻠﻰ ﻧﻈﺮﻳﺔ‬
‫‪ Kolb‬ﰲ اﻟﺘﻌﻠﻢ اﻟﺘﺠﺮﻳﱯ ﺟﻨﺒﺎً إﱃ ﺟﻨﺐ ﻣﻊ اﻟﺘﺤﻠﻴﻞ اﻟﺘﺠﺮﻳﱯ‪ .‬اﻟﺪراﺳﺔ اﻧﻄﻠﻘﺖ ﻣﻦ ﺗﺼﻤﻴﻢ ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻟﱪﳎﺔ اﳌﺘﺤﻜﻤﺎت اﳌﺼﻐﺮة‪،‬‬
‫ﺣﻴﺚ ﺗﻀﻤﻦ ﺗﺼﻤﻴﻢ اﻟﻨﻈﺎم اﻟﺘﻌﻠﻴﻤﻲ اﻷوﱄ ﺗﺼﻤﻴﻤﺎً ﻟﻠﻮﺣﺔ ﺗﻄﻮﻳﺮ ﺗﻔﺎﻋﻠﻴﺔ ﻣﻦ ﺧﻼل إﺟﺮاء دراﺳﺔ ﻣﻘﺎرﻧﺔ ﺷﺎﻣﻠﺔ ﻟﻠﻮﺣﺎت اﻟﺘﻄﻮﻳﺮ اﳌﺘﻮﻓﺮة‬
‫ﺎرﻳﺎً‪ ،‬وﻣﻦ ﻫﺬﻩ اﻟﺪراﺳﺔ ﰎ ﺑﻨﺎء ﻟﻮﺣﺔ اﻟﺘﻄﻮﻳﺮ وﻓﻖ ﻣﻌﺎﻳﲑ ﻬﺗﺪف إﱃ زﻳﺎدة ﺗﻔﺎﻋﻞ اﻟﻄﺎﻟﺐ وﻓﺎﺋﺪﺗﻪ ﻣﻦ اﻟﺘﺠﺎرب ﰲ اﳌﺨﺘﱪ اﻟﺘﻄﺒﻴﻘﻲ‪ .‬ﻛﻤﺎ‬
‫ﺗﻀﻤﻨﺖ اﻟﺪراﺳﺔ ﺑﻨﺎء دﻟﻴﻞ ﺷﺎﻣﻞ ﻟﻠﺘﺠﺎرب ﻳﺴﺘﻨﺪ إﱃ ﻣﻨﻬﺠﻴﺔ اﻟﺘﻌﻠﻢ اﻟﺬاﰐ )‪ (Self-Learning‬وﻣﻨﻬﺠﻴﺎت اﻟﺘﻔﺎﻋﻞ ﺑﲔ اﳌﺴﺘﺨﺪم‬
‫واﳊﺎﺳﺐ‪.‬‬

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‫‪A1‬‬ ‫اﳌﻠﺤﻖ اﻷول| ‪Appendix 1‬‬

‫اﻟﺪراﺳﺔ اﻟﺘﻄﺒﻴﻘﻴﺔ ﺗﻀﻤﻨﺖ أﻳﻀﺎً وﺿﻊ ﳕﻮذﺟﲔ‪ :‬اﻷول ﻳﻌﺎﰿ ﳕﻂ اﳌﺨﺘﱪ‪ ،‬واﻟﺜﺎﱐ ﻳﻌﺎﰿ ﻣﻨﻬﺠﻴﺔ ﻋﻤﻞ اﳌﺨﺘﱪ‪ ،‬وﻗﺪ ﰎ ﺗﻄﺒﻴﻖ اﻟﻨﻤﻮذﺟﲔ ﰲ‬
‫اﳉﻠﺴﺎت اﳌﺨﱪﻳﺔ ﳌﻘﺮر اﻟﺘﺼﻤﻴﻢ ﺑﺎﺳﺘﺨﺪام اﳊﺎﺳﺐ ﻋﻠﻰ ﻣﺪى ﻓﺼﻞ ﻛﺎﻣﻞ ﺑﺪف إﻇﻬﺎر اﳌﺴﺘﻠﺰﻣﺎت اﻟﻀﺮورﻳﺔ ﻟﺪﻳﻨﺎﻣﻴﻜﻴﺔ اﻟﺘﻌﻠﻢ‪ .‬اﻟﻨﻤﻮذج‬
‫ﻃﺒﻖ ﻋﻠﻰ ﻃﻼب اﻟﺴﻨﺔ اﻟﺮاﺑﻌﺔ ﻗﺴﻢ ﻫﻨﺪﺳﺔ اﻟﺘﺤﻜﻢ اﻵﱄ واﻷﲤﺘﺔ‪ ،‬وﻋﻘﺪ ﰲ ﻛﻠﻴﺔ اﳍﻨﺪﺳﺔ اﻟﻜﻬﺮﺑﺎﺋﻴﺔ اﻹﻟﻜﱰوﻧﻴﺔ ﲜﺎﻣﻌﺔ ﺣﻠﺐ ﰲ ﳐﱪ‬
‫اﻟﺘﺤﻜﻢ اﻵﱄ‪ .‬إن اﻟﻨﻤﻮذج اﳌﺼﻤﻢ ﻳﺘﻀﻤﻦ ﻧﺸﺎﻃﺎت إﺿﺎﻓﻴﺔ ﻣﻊ اﻟﺘﺠﺎرب اﻟﻌﻤﻠﻴﺔ ﻛﺎﻻﺧﺘﺒﺎرات اﻟﱵ ﺗﺴﺒﻖ وﺗﻠﻲ اﳉﻠﺴﺔ اﳌﺨﱪﻳﺔ وﻛﺬﻟﻚ‬
‫ﺟﻠﺴﺎت اﶈﺎﻛﺎة ﺑﺎﺳﺘﺨﺪام اﳊﺎﺳﺐ‪ ،‬وﻫﺬﻩ اﻟﻨﺸﺎﻃﺎت ﻣﺮﺗﺒﻄﺔ ﺑﺪورة ‪ Kolb‬اﻟﱵ ﲢﻘﻖ اﻟﺘﻌﻠﻢ اﻟﺒﻨﺎﺋﻲ‪.‬‬

‫ﻟﻘﺪ اﻓﱰﺿﻨﺎ ﺟﺪﻻً ﰲ اﻟﺪراﺳﺔ أن ﺿﻌﻒ اﻟﻨﺘﺎﺋﺞ اﻟﺘﻌﻠﻴﻤﻴﺔ ﰲ اﳌﺨﺎﺑﺮ ﻳﻌﻮد إﱃ ﻧﻘﺺ ﺗﻔﻌﻴﻞ اﻟﺒﻌﺪ اﻟﺘﺤﺼﻴﻠﻲ ﻣﻦ ﻧﻈﺮﻳﺔ ‪ Kolb‬ﰲ اﻟﺘﻌﻠﻢ‬
‫اﻟﺘﺠﺮﻳﱯ‪ ،‬ﺣﻴﺚ أن اﻟﻨﻤﻮذج اﻟﺘﺠﺮﻳﱯ وﻧﺘﺎﺋﺞ ﲢﻠﻴﻞ اﻟﺒﻴﺎﻧﺎت اﳋﺎﺻﺔ ﲝﺼﻴﻠﺔ اﻟﺘﻌﻠﻴﻢ اﳌﺨﱪي أﻛﺪت اﻟﻔﺮﺿﻴﺔ اﳌﻄﺮوﺣﺔ اﻷﻣﺮ اﻟﺬي أﻋﻄﻰ‬
‫ﺗﻔﺴﲑاً ﺗﺮﺑﻮﻳﺎً ﻟﺘﻠﻚ اﻟﻨﺘﺎﺋﺞ‪.‬‬

‫ﻧﺘﺎﺋﺞ اﻟﺘﺤﻠﻴﻼت اﻻﺣﺼﺎﺋﻴﺔ أﻇﻬﺮت ﺧﺼﺎﺋﺺ اﻟﻘﻮة ﻟﻠﻨﻤﻮذج ﻣﺘﻤﺜﻼً ﺑﺎﻟﺘﻐﺬﻳﺔ اﻟﻌﻜﺴﻴﺔ اﻟﺒﻨﺎﺋﻴﺔ ﻣﻘﺎﺑﻞ اﻟﻨﻤﺎذج اﻟﻜﻼﺳﻴﻜﻴﺔ اﻟﺘﻘﻠﻴﺪﻳﺔ اﳌﺘﻤﺜﻠﺔ‬
‫ﺑﺎﳊﻠﻘﺔ اﳌﻔﺘﻮﺣﺔ‪ ،‬وﻗﺪ ﻇﻬﺮ أﺛﺮﻩ واﺿﺤﺎً ﻣﻦ ﺧﻼل اﻟﺘﺤﺴﻦ اﻟﻜﺒﲑ ﰲ اﶈﺼﻠﺔ اﻟﺘﻌﻠﻴﻤﻴﺔ ﻟﻠﻤﺠﻤﻮﻋﺔ اﻻﺧﺘﺒﺎرﻳﺔ ﻣﻘﺎرﻧﺔ اﺠﻤﻟﻤﻮﻋﺔ اﻟﻘﻴﺎﺳﻴﺔ‪.‬‬
‫ﻧﺘﺎﺋﺞ اﻟﻌﻤﻠﻴﺔ اﻟﺘﻌﻠﻴﻤﻴﺔ ﰎ ﻗﻴﺎﺳﻬﺎ ﻣﻦ ﺧﻼل اﺧﺘﺒﺎرات ﳐﱪﻳﺔ أﺟﺮﻳﺖ ﻗﺒﻞ وﺑﻌﺪ اﳉﻠﺴﺎت اﳌﺨﱪﻳﺔ‪ ،‬إﺿﺎﻓﺔ إﱃ ﻗﻴﺎﺳﺎت ﻧﻮﻋﻴﺔ ﰎ ﲢﺼﻴﻠﻬﺎ ﻣﻦ‬
‫ﺧﻼل ﻣﺮاﻗﺒﺔ أداء اﻟﻄﻼب أﺛﻨﺎء اﳌﺨﺘﱪ‪ .‬أﻇﻬﺮت اﻟﻨﺘﺎﺋﺞ أﻳﻀﺎً أن اﻟﻨﻈﺎم اﻟﺘﻌﻠﻴﻤﻲ ﰲ اﳊﻠﻘﺔ اﳌﻐﻠﻘﺔ ﻣﺴﺘﻘﺮ وﺛﺎﺑﺖ‪ ،‬وﳝﻠﻚ ﻣﻨﻬﺠﻴﺔ ﻟﺮﻓﺾ‬
‫اﻟﻀﺠﻴﺞ اﳌﺘﺄﺻﻞ )ﻣﺜﻞ ﻣﻌﺎﻣﻞ اﻟﻨﺴﻴﺎن(‪ ،‬وﻫﻮ ﻳﺴﺎﻋﺪ ﻋﻠﻰ ﲢﻔﻴﺰ اﻟﻄﻼب ذوي ﻣﻬﺎرات اﻟﺘﻌﻠﻢ اﳌﻨﺨﻔﻀﺔ ورﻓﻊ ﻣﺴﺘﻮاﻫﻢ‪ .‬ﻛﻤﺎ أﻇﻬﺮ‬
‫اﻟﺘﺤﻠﻴﻞ اﻟﺘﺠﺮﻳﱯ ﻟﻠﻘﻴﺎﺳﺎت اﻟﻜﻤﻴﺔ ﺑﺄﻧﻪ ﻋﻠﻰ اﻟﺮﻏﻢ ﻣﻦ ﺳﻠﻮك ﻗﺮﻳﺐ ﻧﺴﺒﻴﺎً اء ﻛﻼ اﺠﻤﻟﻤﻮﻋﺘﲔ )اﻟﻘﻴﺎﺳﻴﺔ واﻻﺧﺘﺒﺎرﻳﺔ( ﰲ ﻣﺘﺎﺑﻌﺔ اﻟﺪﻟﻴﻞ‬
‫اﻟﺘﻮﺿﻴﺤﻲ ﻟﻠﺘﺠﺎرب ﺧﻼل ﺟﻠﺴﺎت اﳌﺨﺘﱪ‪ ،‬ﺗﻔﺎوت ﺟﻮﻫﺮي ﻛﺒﲑ ﰲ اﻟﻔﻬﻢ اﻟﺘﺼﻮري‪ .‬ﻋﻼوة ﻋﻠﻰ ذﻟﻚ ﻓﺈﻧﻪ ﻇﻬﺮ ﺟﻠﻴﺎً ﰲ ﻃﻼب ﻤﻟﻤﻮﻋﺔ‬
‫اﻻﺧﺘﺒﺎرﻳﺔ ﺣﺎﻓﺰ ﺟﻮﻫﺮي ﳓﻮ ﺣﻞ ﻣﺸﺎﻛﻞ ﻣﻌﻘﺪة إﺿﺎﻓﻴﺔ وﱂ ﻳﻈﻬﺮ ﰲ ﻃﻼب ﻤﻟﻤﻮﻋﺔ اﻟﺘﻘﻠﻴﺪﻳﺔ‪ .‬ﺑﻨﺎءً ﻋﻠﻰ اﻟﻨﺘﺎﺋﺞ‪ ،‬ﰎ ﺗﺼﻤﻴﻢ ﳕﻮذج‬
‫ﺗﻌﻠﻴﻤﻲ ﺑﻨﺎﺋﻲ ﺷﺎﻣﻞ ﻣﺮﺗﺒﻂ ﺑﺪورة ﻛﻮﻟﺐ ﰲ اﻟﺘﻌﻠﻢ اﻟﺘﺠﺮﻳﱯ‪ ،‬ﻛﻤﺎ ﰎ ﺷﺮح أﺟﺰاءﻩ وﻋﻨﺎﺻﺮﻩ‪.‬‬

‫اﻟﺪراﺳﺔ اﻟﻌﻤﻠﻴﺔ اﻟﺘﻄﺒﻴﻘﻴﺔ ﻓﻲ اﻟﻔﺼﻞ اﻟﺴﺎدس ﻗﺪﻣﺖ ﳕﻮذﺟﺎً ﻣﻔﺼﻼً ﻋﻦ اﻟﺪراﺳﺔ اﻟﺘﻄﺒﻴﻘﻴﺔ ﻟﻠﺒﺤﺚ اﺳﺘﻨﺎداً إﱃ اﳍﻴﻜﻠﻴﺔ اﻟﺒﻨﺎﺋﻴﺔ ﻟﻠﺘﺠﺎرب‬
‫اﻟﻌﻤﻠﻴﺔ اﻟﱵ ﺗﺴﺘﻨﺪ إﱃ ﻣﻮﺿﻮﻋﺎت اﻟﻔﺼﻮل اﻟﺴﺎﺑﻘﺔ وﺧﺼﻮﺻﺎً ﳕﻮذج اﻟﺘﻌﻠﻴﻢ اﳌﺨﱪي اﳍﺠﲔ اﻟﺬي ﻳﻀﻢ اﻷﺻﻨﺎف اﻟﺜﻼﺛﺔ ﻟﻠﺘﻌﻠﻴﻢ اﳌﺨﱪي‬
‫وﳕﻮذج اﻟﺘﻌﻠﻴﻢ اﻟﺒﻨﺎﺋﻲ ﰲ اﳊﻠﻘﺔ اﳌﻐﻠﻘﺔ واﻟﺬي ﺗﻮﻟﺪ ﻋﻨﻬﻤﺎ اﻟﻨﻤﻮذج اﻟﺸﻤﻮﱄ اﳌﺼﻤﻢ ﰲ اﻟﻔﺼﻞ اﳋﺎﻣﺲ‪ ،‬ﺣﻴﺚ ﰎ وﺿﻊ دﻟﻴﻞ اﻟﺘﺠﺎرب‬
‫ﲝﻴﺚ ﻳﺴﺘﻄﻴﻊ اﻟﻄﺎﻟﺐ ﺗﻨﻔﻴﺬ اﻟﺘﺠﺮﺑﺔ ﺑﺸﻜﻞ ذاﰐ دون اﳊﺎﺟﺔ إﱃ وﺟﻮد ﻣﻮﺟﻪ ﻟﻪ ﰲ ﻛﻞ ﻣﺮﺣﻠﺔ‪ ،‬وﰎ ﺗﻘﺴﻴﻢ ﻛﻞ ﲡﺮﺑﺔ إﱃ ﺛﻼث ﻣﺮاﺣﻞ‪:‬‬
‫ﻣﺮﺣﻠﺔ ﺗﺘﻢ ﺑﺸﻜﻞ أوﱄ وﻓﻘﺎً ﻟﻨﻤﻮذج اﳌﺨﺘﱪ اﻟﺘﺤﻀﲑي‪ ،‬وﻣﺮﺣﻠﺔ رﺋﻴﺴﻴﺔ ﺗﺘﺒﻊ ﳕﻮذج اﳌﺨﺘﱪ اﻟﺘﻄﺒﻴﻘﻲ‪ ،‬واﳌﺮﺣﻠﺔ اﻷﺧﲑة داﻋﻤﺔ وﺗﺴﺘﻨﺪ إﱃ‬
‫ﳕﻮذج اﳌﺨﱪ ﻋﻦ ﺑﻌﺪ‪.‬‬

‫اﻟﺪراﺳﺔ ﺗﻀﻤﻨﺖ ﲝﺚ ﺷﺎﻣﻞ ﻋﻦ ﻟﻮﺣﺔ اﻟﺘﻄﻮﻳﺮ اﻷﻧﺴﺐ ﻟﺒﻨﺎء ﻫﺬا اﻟﻨﻈﺎم اﻟﺘﻌﻠﻴﻤﻲ‪ ،‬إذ أن اﺧﺘﻴﺎر ﻋﻨﺎﺻﺮ وأدوات أي ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻳﻌﺘﱪ‬
‫ﻣﻦ اﻷﻣﻮر اﳍﺎﻣﺔ ﺟﺪاً وﳚﺐ أن ﻳﺘﻢ ﺑﻌﻨﺎﻳﺔ ﻓﺎﺋﻘﺔ‪ ،‬إذ أن اﻷدوات واﻟﻌﻨﺎﺻﺮ ﳚﺐ أن ﺗﻜﻮن ذات ﺻﻠﺔ ﻣﺒﺎﺷﺮة ﺑﺎﻷدوات اﳌﺴﺘﺨﺪﻣﺔ ﰲ اﻟﻮاﻗﻊ‬
‫)اﻟﺼﻨﺎﻋﺔ(‪ .‬اﻟﺪراﺳﺔ ﻗﺪﻣﺖ أﻳﻀﺎً ﺗﺼﻤﻴﻤﺎً ﻟﻠﻮﺣﺔ ﺗﻮﺳﻌﺔ إﺿﺎﻓﻴﺔ ﺗﺮﺑﻂ إﱃ ﻟﻮﺣﺔ اﻟﺘﻄﻮﻳﺮ‪ ،‬وﳏﻴﻄﻴﺎت أﺧﺮى ﰎ ﺗﺼﻤﻴﻤﻬﺎ ﺑﺪف اﺳﺘﺜﻤﺎر‬
‫اﻟﻨﻈﺎم ﰲ ﺑﻨﺎء ﺗﻄﺒﻴﻘﺎت ﻋﻤﻠﻴﺔ أﻛﺜﺮ ﴰﻮﻟﻴﺔ‪ .‬ﻛﻤﺎ ﰎ ﺑﻨﺎء اﻟﻌﺪﻳﺪ ﻣﻦ اﻟﺘﺠﺎرب واﻟﺘﻄﺒﻴﻘﺎت اﻟﱪﳎﻴﺔ – ﺑﺎﺳﺘﺨﺪام ﻟﻮﺣﺔ اﻟﺘﻄﻮﻳﺮ اﳌﻌﺘﻤﺪة ﰲ‬

‫‪377‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫اﺳﻢ اﳌﻠﺤﻖ | ‪Appendix Name‬‬

‫اﻟﺪراﺳﺔ واﻟﺒﻴﺌﺔ اﻟﱪﳎﻴﺔ اﻟﺮﺳﻮﻣﻴﺔ ‪ LabVIEW‬ﻣﺘﻀﻤﻨﺔً اﳌﻜﺘﺒﺎت اﳋﺎﺻﺔ ﺑﱪﳎﺔ ﺗﻘﻨﻴﺔ اﻟـ‪ – FPGA‬اﻟﱵ ﻏﻄﺖ ﻣﻌﻈﻢ اﶈﻴﻄﻴﺎت واﻟﺘﻄﺒﻴﻘﺎت‬
‫اﳌﺪﳎﺔ ﻋﻠﻰ ﻟﻮﺣﺔ اﻟﺘﻄﻮﻳﺮ ‪ ،Spartan-3E‬إﺿﺎﻓﺔً إﱃ ﳎﻤﻮﻋﺔ إﺿﺎﻓﻴﺔ ﻣﻦ اﻟﺘﺠﺎرب ﺗﺘﻌﻠﻖ ﺑﺎﻟﻮﺣﺪات اﶈﻴﻄﻴﺔ اﻹﺿﺎﻓﻴﺔ اﻟﱵ ﰎ ﺗﺼﻤﻴﻤﻬﺎ‪.‬‬

‫اﻟﺒﺤﺚ أﻛﺪ ﻋﻠﻰ أﻧﻪ ﻣﻦ اﳌﻬﻢ ﺟﺪاً ﺗﻘﺪﱘ اﻻﻋﺘﺒﺎرات واﳌﺒﺎدئ اﻷﺳﺎﺳﻴﺔ ﻟﻠﺘﺠﺮﺑﺔ ﺑﺸﻜﻞ ﻣﺴﺒﻖ ﺿﻤﻦ اﳌﺨﺘﱪ اﻟﺘﻤﻬﻴﺪي‪ ،‬ﰒ ﺗﻄﺒﻴﻖ ﻫﺬﻩ‬
‫اﻻﻋﺘﺒﺎرات ﻟﺒﻨﺎء اﻟﺘﺠﺮﺑﺔ ﺑﺎﺳﺘﺨﺪام اﳊﺎﺳﺐ‪ ،‬ﰒ ﻻﺣﻘﺎً ﺗﺸﻐﻴﻞ وﳏﺎﻛﺎة اﻟﺘﻄﺒﻴﻖ ﰲ ﺑﻴﺌﺔ اﳌﺨﺘﱪ اﻟﺘﻄﺒﻴﻘﻲ اﳊﻘﻴﻘﻲ‪ .‬ﻛﻤﺎ أﻛﺪ اﻟﺒﺤﺚ ﻋﻠﻰ أن‬
‫اﻟﻮﻇﺎﺋﻒ واﻻﺧﺘﺒﺎرات واﳌﺸﺎرﻳﻊ ﺗﻌﺘﱪ ﻋﺎﻣﻼً ﻣﻬﻤﺎً ﰲ ﺗﻌﺰﻳﺰ ﻓﻬﻢ اﻟﻄﻼب وﺗﻌﻤﻴﻖ ﲡﺮﺑﺘﻬﻢ اﻟﻌﻤﻠﻴﺔ‪ ،‬وﻣﻦ اﳌﻬﻢ ﺟﺪاً ﺗﻮﺟﻴﻪ اﻟﻄﻼب ﳓﻮ‬
‫اﻟﺘﻌﻠﻢ اﻟﺘﻌﺎوﱐ اﻟﺘﺸﺎرﻛﻲ ﻣﻦ ﺧﻼل إدارة اﳌﻨﺎﻗﺸﺎت اﳉﻤﺎﻋﻴﺔ ﺣﻮل ﻣﻮﺿﻮﻋﺎت اﻟﺘﺠﺎرب‪ .‬إن اﻟﺘﺠﺎرب واﻟﺘﻄﺒﻴﻘﺎت واﻟﻮﻇﺎﺋﻒ واﳌﺸﺎرﻳﻊ‬
‫ﳌﺴﻨﺪة إﱃ اﻟﻄﻼب ﳚﺐ أن ﺗﻜﻮن ذات ارﺗﺒﺎط ﻣﺒﺎﺷﺮ ﺑﺎﻟﺘﻄﺒﻴﻘﺎت اﻟﻌﻤﻠﻴﺔ اﻟﻮاﻗﻌﻴﺔ وﻬﺗﺪف ﺑﺎﻟﻨﺘﻴﺠﺔ إﱃ ﻣﺸﺮوع ﺗﻄﺒﻴﻖ واﻗﻌﻲ ﺣﻘﻴﻘﻲ ﳝﻜﻦ‬
‫أن ﻳﻜﻮن ﺣﻼً ﻣﺮﺣﻠﻴﺎً أو ﻣﺴﺘﻘﺒﻠﻴﺎً ﳌﺸﻜﻠﺔ ﰲ اﻟﺼﻨﺎﻋﺔ‪.‬‬

‫أﺧﲑاً ﰎ ﺗﺼﻤﻴﻢ ﳐﱪ ﻋﻦ ﺑﻌﺪ ﺣﻴﺚ ﻳﻌﺘﱪ اﳌﺨﺘﱪ ﻋﻦ ﺑﻌﺪ ﺣﻼً ﻣﺜﺎﻟﻴﺎً ﻳﻔﺴﺢ ﻟﻠﻄﺎﻟﺐ اﻟﻔﺮﺻﺔ ﺑﺎﻟﺘﻮاﺻﻞ ﺑﺸﻜﻞ أﻛﱪ ﻣﻊ اﻟﺘﺠﺮﺑﺔ‪ ،‬وذﻟﻚ ﻷن‬
‫اﻟﻮﻗﺖ اﳌﺘﺎح ﰲ ﺟﻠﺴﺔ اﳌﺨﺘﱪ اﻟﺘﻄﺒﻴﻘﻲ ﻻ ﻳﻜﻔﻲ ﻟﺘﻌﻤﻴﻖ اﳌﻔﻬﻮم اﻟﺘﻄﺒﻴﻘﻲ‪.‬‬

‫ﺑﻨﺎءً ﻋﻠﻰ اﻟﺪراﺳﺔ اﻟﺒﺤﺜﻴﺔ ﻓﺈﻧﻨﺎ ﻧﺆﻛﺪ ﻋﻠﻰ ﺿﺮورة وأﳘﻴﺔ إﻋﺎدة اﻟﻨﻈﺮ ﰲ ﺗﻌﺪﻳﻞ اﻟﻨﻤﺎذج اﻟﺘﻌﻠﻴﻤﻴﺔ اﻟﻜﻼﺳﻴﻜﻴﺔ اﳌﻬﻴﻤﻨﺔ ﰲ اﻟﻌﺪﻳﺪ ﻣﻦ‬
‫اﻟﻜﻠﻴﺎت اﳍﻨﺪﺳﻴﺔ إﱃ ﻓﻜﺮة أﻗﺮب إﱃ اﻟﻨﻤﺎذج اﻟﺒﻨﺎﺋﻴﺔ ﻟﱵ ﻬﺗﺪف إﱃ ﺟﻌﻞ اﻟﺘﻌﻠﻢ ﻣﺘﻌﺔ ﰲ أﻋﲔ اﻟﻄﻼب‪.‬‬

‫ﻣﻠﺨﺺ اﻟﻨﺘﺎﺋﺞ )‪:(Outcomes Summery‬‬

‫‪ ‬اﻟﻨﻤﺎذج اﻟﺮﻳﺎﺿﻴﺔ أﻛﺜﺮ دﻗﺔ ﻣﻦ اﻟﻨﻤﺎذج اﻟﻮﺻﻔﻴﺔ اﻟﺘﺼﻮرﻳﺔ‪ ،‬وﺑﺎﻟﺘﺎﱄ ﻓﺈﻧﻪ ﻣﻦ ﺧﻼل اﺳﺘﺨﺪام ﻣﻨﻬﺠﻴﺎت ﻫﻨﺪﺳﺔ ﻧﻈﻢ اﻟﺘﺤﻜﻢ ﰲ‬
‫ﳕﺬﺟﺔ اﻟﻌﻤﻠﻴﺎت اﻟﺘﻌﻠﻴﻤﻴﺔ‪ ،‬ﻓﺈن ذﻟﻚ ﳝﻜﻦ أن ﻳﺆدي إﱃ اﻗﱰاح ﺗﻘﻨﻴﺎت ﲢﻜﻢ ﻋﻠﻰ ﳓﻮ ﻓﻌﺎل ﻟﺘﻮﺟﻴﻪ ﻋﻤﻠﻴﺔ اﻟﺘﺤﺼﻴﻞ اﻟﻌﻠﻤﻲ ﳓﻮ‬
‫ﲢﻘﻴﻖ اﻷﻫﺪاف اﳌﺮﺟﻮة‪.‬‬

‫‪ ‬اﻟﻨﺘﺎﺋﺞ اﻟﺘﺠﺮﻳﺒﻴﺔ أﻇﻬﺮت دﻟﻴﻼً واﺿﺤﺎً ﻋﻠﻰ ﺗﻔﻮق ﳕﻮذج اﻟﺘﻌﻠﻢ اﻟﺒﻨﺎﺋﻲ ﰲ اﳊﻠﻘﺔ اﳌﻐﻠﻘﺔ اﻟﻘﺎﺋﻢ ﻋﻠﻰ ﺣﻞ اﳌﺸﻜﻼت واﳌﺸﺎرﻳﻊ‬
‫)اﻟﻄﺎﻟﺐ ﳏﻮر اﻟﻌﻤﻠﻴﺔ اﻟﺘﻌﻠﻴﻤﻴﺔ ‪ -‬وﻋﻤﻠﻴﺔ ﺑﻨﺎء اﳌﻌﺮﻓﺔ ﻫﻲ ﺑﺸﻜﻞ أﺳﺎﺳﻲ ﻣﺴﺆوﻟﻴﺔ اﻟﻄﺎﻟﺐ( ﻋﻠﻰ اﻟﻨﻤﻮذج اﻟﺘﻌﻠﻴﻤﻲ اﻟﺘﻘﻠﻴﺪي ﰲ‬
‫اﳊﻠﻘﺔ اﳌﻔﺘﻮﺣﺔ )اﳌﻌﻠﻢ ﻫﻮ ﳏﻮر اﻟﻌﻤﻠﻴﺔ اﻟﺘﻌﻠﻴﻤﻴﺔ ‪ -‬ﳝﺜﻞ ﳕﻮذﺟﺎً ﺳﻠﺒﻴﺎً ﻟﻨﻘﻞ اﳌﻌﺮﻓﺔ ﻣﻦ اﳌﺮﺳﻞ )اﳌﻌﻠﻢ( إﱃ اﳌﺴﺘﻘﺒﻞ )اﻟﻄﺎﻟﺐ(‪.‬‬

‫‪ ‬ﻧﺘﺎﺋﺞ اﻟﺘﺤﻠﻴﻼت اﻻﺣﺼﺎﺋﻴﺔ أﻇﻬﺮت ﺧﺼﺎﺋﺺ اﻟﻘﻮة واﻻﺳﺘﻘﺮار ﻟﻨﻤﻮذج اﻟﺘﻐﺬﻳﺔ اﻟﻌﻜﺴﻴﺔ اﻟﺒﻨﺎﺋﻲ ﰲ اﳊﻠﻘﺔ اﳌﻐﻠﻘﺔ ﻣﻘﺎﺑﻞ اﻟﻨﻤﺎذج‬
‫اﻟﻜﻼﺳﻴﻜﻴﺔ اﻟﺘﻘﻠﻴﺪﻳﺔ اﳌﺘﻤﺜﻠﺔ ﺑﺎﳊﻠﻘﺔ اﳌﻔﺘﻮﺣﺔ‪ ،‬وﻗﺪ ﻇﻬﺮ أﺛﺮﻩ واﺿﺤﺎً ﻣﻦ ﺧﻼل اﻟﺘﺤﺴﻦ اﻟﻜﺒﲑ ﰲ اﶈﺼﻠﺔ اﻟﺘﻌﻠﻴﻤﻴﺔ ﻟﻠﻤﺠﻤﻮﻋﺔ‬
‫اﻻﺧﺘﺒﺎرﻳﺔ ﻣﻘﺎرﻧﺔ ﻣﻊ اﻟﻘﻴﺎﺳﻴﺔ‪.‬‬

‫‪ ‬ﳕﻮذج اﻟﺘﻌﻠﻢ اﻟﺒﻨﺎﺋﻲ ﰲ اﳊﻠﻘﺔ اﳌﻐﻠﻘﺔ ﳝﻠﻚ ﻣﻨﻬﺠﻴﺔ ﻟﺮﻓﺾ اﻟﻀﺠﻴﺞ اﳌﺘﺄﺻﻞ )ﻣﺜﻞ ﻣﻌﺎﻣﻞ اﻟﻨﺴﻴﺎن(‪ ،‬وﻫﻮ ﻳﺴﺎﻋﺪ ﻋﻠﻰ ﲢﻔﻴﺰ‬
‫اﻟﻄﻼب ذوي ﻣﻬﺎرات اﻟﺘﻌﻠﻢ اﳌﻨﺨﻔﻀﺔ ورﻓﻊ ﻣﺴﺘﻮاﻫﻢ‪.‬‬

‫‪ ‬ﻟﻠﻤﺨﺘﱪ اﻻﻓﱰاﺿﻲ دور ﻫﺎم ﺟﺪاً ﰲ ﲢﻀﲑ اﻟﻄﻼب ﳉﻠﺴﺔ اﳌﺨﺘﱪ اﻟﺘﻄﺒﻴﻘﻲ‪ ،‬وﻫﻮ ﻳﻌﺰز ﻣﻦ ﺣﺼﻴﻠﺔ اﻟﺘﻌﻠﻢ وﻳﻌﻤﻖ اﻷﺛﺮ اﻹدراﻛﻲ‬
‫ﳌﻀﻤﻮن اﻟﺘﺠﺮﺑﺔ ﻋﻠﻰ اﳌﺴﺘﻮى اﻟﻨﻈﺮي واﻟﺘﻄﺒﻴﻘﻲ‪.‬‬
‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪378‬‬
‫‪A1‬‬ ‫اﳌﻠﺤﻖ اﻷول| ‪Appendix 1‬‬

‫ﻳﺆدي إﱃ اﻟﺘﺤﺴﲔ اﳉﺬري ﰲ ﺣﺼﻴﻠﺔ اﻟﺘﻌﻠّﻢ‪.‬‬

‫‪ ‬اﻹﺻﻼح اﻟﺘﻌﻠﻴﻤﻲ ﰲ اﳌﻨﻬﺠﻴﺔ ﳝﻜﻦ أن ّ‬

‫‪ ‬ﺑﻨﺎءً ﻋﻠﻴﻪ‪ ،‬ﻧﺆﻛﺪ ﻋﻠﻰ ﺿﺮورة وأﳘﻴﺔ إﻋﺎدة اﻟﻨﻈﺮ ﰲ ﺗﻌﺪﻳﻞ اﻟﻨﻤﺎذج اﻟﺘﻌﻠﻴﻤﻴﺔ اﻟﻜﻼﺳﻴﻜﻴﺔ اﳌﻬﻴﻤﻨﺔ ﰲ اﻟﻌﺪﻳﺪ ﻣﻦ اﻟﻜﻠﻴﺎت اﳍﻨﺪﺳﻴﺔ‬
‫ ﻣﻨﻄﻘﺘﻨﺎ‪ ،‬إﱃ ﻓﻜﺮة أﻗﺮب إﱃ اﻟﻨﻤﺎذج اﻟﺒﻨﺎﺋﻴﺔ اﻟﱵ ﻬﺗﺪف إﱃ ﺟﻌﻞ اﻟﺘﻌﻠﻢ ﻣﺘﻌﺔ ﰲ أﻋﲔ اﻟﻄﻼب‪.‬‬

‫آﻓﺎق اﻟﺒﺤﺚ واﻟﺘﻄﻮﻳﺮ اﻟﻤﺴﺘﻘﺒﻠﻲ )‪:(Future Work‬‬

‫‪ ‬إن ﻋﻤﻠﻴﺔ اﻟﺘﻌﻠﻢ وﻋﻤﻠﻴﺔ اﻟﺘﻌﻠﻴﻢ ﺗﻌﺘﱪان ﻋﻤﻠﻴﺎت دﻳﻨﺎﻣﻴﻜﻴﺔ ﻻ ﺧﻄﻴﺔ‪ ،‬وﺑﺎﻟﺘﺎﱄ ﻓﺈن وﺻﻒ ﻣﻌﺎدﻻت ﻧﻈﺎم ﻣﺸﺎﺑﻪ ﻳﻌﺘﱪ أﻣﺮاً ﻣﻌﻘﺪاً‬
‫وﺧﺼﻮﺻﺎً إذا ﻛﺎن اﻟﻨﻈﺎم ﳛﺘﻮي ﻋﻠﻰ اﻟﻌﺪﻳﺪ ﻣﻦ اﳊﺎﻻت اﻟﱵ ﻻ ﺗﻨﺘﻬﻲ وﺑﺎراﻣﱰات اﻟﻨﻈﺎم ﻏﲑ ﻣﻌﺮوﻓﺔ وﻏﲑ ﺛﺎﺑﺘﺔ‪ .‬ﰲ ﻣﺜﻞ ﻫﺬﻩ‬
‫اﻷﻧﻈﻤﺔ ﻳﻌﺘﱪ اﻟﺘﺤﻜﻢ اﻟﻐﺎﻣﺾ )‪ (Fuzzy Logic Control‬اﳊﻞ اﻷﻣﺜﻠﻲ‪ ،‬وذﻟﻚ ﻷن اﻻﻋﺘﺒﺎر اﻷﺳﺎﺳﻲ ﰲ اﻟﺘﺤﻜﻢ اﻟﻐﺎﻣﺾ ﻫﻮ‬
‫ﻣﻌﺮف ﻟﻠﻨﻈﺎم‪.‬‬
‫وﺻﻒ ﻣﺪاﺧﻞ وﳐﺎرج اﻟﻨﻈﺎم ﺑﻐﺾ اﻟﻨﻈﺮ ﻋﻦ ﳕﻮذج اﳊﺎﻟﺔ اﻟﻐﲑ ّ‬

‫‪ ‬رﲟﺎ ﻳﻄﺮح ﻣﻮﺿﻮع ﳕﺬﺟﺔ اﻟﻌﻤﻠﻴﺔ اﻟﺘﻌﻠﻴﻤﻴﺔ ﻣﻦ ﺧﻼل ﻧﻈﺮﻳﺎت اﻟﺘﺤﻜﻢ اﻷﻣﺜﻠﻲ واﻟﺘﺤﻜﻢ اﳌﺘﻘﺪم‪ ،‬ﰲ اﳊﻘﻴﻘﺔ إن اﺳﺘﺨﺪام ﻧﻈﺮﻳﺎت‬
‫اﻟﺘﺤﻜﻢ اﻷﻣﺜﻠﻲ ﻟﻮﺻﻒ ﺳﻠﻮك ﻧﻈﺎم ﺑﺎراﻣﱰاﺗﻪ ﻏﲑ ﻣﻌﺮوﻓﺔ ﻳﻌﺘﱪ أﻣﺮاً ﰲ ﻏﺎﻳﺔ اﻟﺘﻌﻘﻴﺪ‪ ،‬وﺧﺼﻮﺻﺎً أن ﻧﻈﺮﻳﺎت اﻟﺘﺤﻜﻢ اﻷﻣﺜﻠﻲ ﺗﺘﻄﻠﺐ‬
‫اﻟﺘﺤﺪﻳﺪ اﻟﺪﻗﻴﻖ ﻟﺒﺎراﻣﱰات وﻋﻨﺎﺻﺮ اﻟﻨﻈﺎم‪ ،‬وﻫﺬا ﻏﲑ ﳑﻜﻦ ﺑﺎﻟﻨﺴﺒﺔ ﻟﻠﻌﻤﻠﻴﺔ اﻟﺘﻌﻠﻴﻤﻴﺔ ‪ -‬ﻻ ﺷﻚ أﻧﻪ ﻣﻦ اﳌﻤﻜﻦ إﳚﺎد ﳕﻮذج ﺗﻘﺮﻳﱯ‬
‫ﻟﻨﻤﻮذج اﻟﻨﻈﺎم ﻣﻦ ﺧﻼل اﺳﺘﺨﺪام ﻣﻨﻬﺠﻴﺎت ﲢﺪﻳﺪ ﻫﻮﻳﺔ اﻟﻨﻈﻢ )‪ ،(System Identification‬إﻻ أن اﺳﺘﺨﺪام اﻟﺘﺤﻜﻢ اﻟﻐﺎﻣﺾ‬
‫ﺳﻴﻜﻮن أﻓﻀﻞ ﺑﻜﺜﲑ‪.‬‬

‫‪ ‬ﻣﻦ ﺟﺎﻧﺐ آﺧﺮ ﻳﻌﺎﱐ ﻣﻌﻈﻢ اﻟﻄﻼب ﰲ ﺟﺎﻣﻌﺎت اﻟﻮﻃﻦ اﻟﻌﺮﰊ ﻣﻦ ﺿﻌﻒ ﰲ ﻣﻨﻬﺠﻴﺎت اﻟﺘﻄﻮﻳﺮ اﻟﺬاﰐ واﻟﺘﻌﻠﻢ ﻣﺪى اﳊﻴﺎة‪ ،‬وﺑﺎﻟﺘﺎﱄ‬
‫ﻓﺈﻧﻪ ﻻﺑﺪ ﻣﻦ وﺟﻮد أﲝﺎث ﺗﻄﻮﻳﺮ وﺗﻘﻴﻴﻢ ﳌﻨﻬﺠﻴﺎت ﺣﺪﻳﺜﺔ ﺗﺴﺎﻫﻢ ﰲ ﺗﻌﺰﻳﺰ اﻟﺘﻌﻠﻢ ذاﰐ اﻟﺘﻨﻈﻴﻢ ﰲ اﻟﺘﻌﻠﻴﻢ اﳍﻨﺪﺳﻲ ﺑﺎﻻﺳﺘﻌﺎﻧﺔ‬
‫ﺑﺎﻟﺘﻜﻨﻮﻟﻮﺟﻴﺎ اﻟﺘﻌﻠﻴﻤﻴﺔ اﻟﺘﻄﺒﻴﻘﻴﺔ‪.‬‬

‫‪ ‬اﶈﻮر اﻷﺧﲑ ﻫﻮ أﳘﻴﺔ اﳌﺨﺎﺑﺮ ﻋﻦ ﺑﻌﺪ ﰲ ﺗﻌﺰﻳﺰ اﻟﺘﻌﻠﻴﻢ اﳌﺨﱪي‪ ،‬ﺣﻴﺚ أﻧﻪ ﻣﻦ اﳌﻬﻢ رﺑﻂ ﳐﺘﱪات اﻟﻘﻄﺮ ﻋﻦ ﻃﺮﻳﻖ ﺷﺒﻜﺔ اﻷﻧﱰﻧﺖ‬
‫ﲝﻴﺚ ﻳﺘﻢ اﺳﺘﺜﻤﺎرﻫﺎ ﻣﻦ ﻗﺒﻞ اﳉﺎﻣﻌﺎت واﻟﻄﻼب‪.‬‬

‫‪379‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 Appendix Name | ‫اﺳﻢ اﳌﻠﺤﻖ‬

Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages 380
‫‪A2‬‬ ‫اﳌﻠﺤﻖ اﻟﺜﺎﱐ| ‪Appendix 2‬‬

‫اﻟﻤﻠﺤﻖ اﻟﺜﺎﻧﻲ )‪(Appendix 2‬‬

‫‪@Ô‹‡»€a@äã‘æbi@ıáj€a@›j”@ÙÏnèæa@áÌázn€@È‘Ój�m@#@Ô€Îc@äbjnÇa‬‬

‫اﳍﺪف ﻣﻦ ﻫﺬا اﻻﺧﺘﺒﺎر اﻷوﱄ ﻫﻮ ﻣﻌﺮﻓﺔ ﻣﺴﺘﻮى اﻟﻄﻼب ﰲ ﺑﺮﳎﺔ وﺗﺼﻤﻴﻢ ﻧﻈﻢ اﻟﺘﺤﻜﻢ ﺑﺎﺳﺘﺨﺪام اﳌﺘﺤﻜﻤﺎت اﳌﺼﻐﺮة‪ ،‬واﻟﺬي ﺑﺪورﻩ‬
‫ﻳﺴﺎﻋﺪ ﺑﺸﻜﻞ ﺟﻮﻫﺮي ﰲ اﻟﻨﻘﺎط اﻟﺘﺎﻟﻴﺔ‪:‬‬

‫‪ ‬ﲢﺪﻳﺪ ﻣﺪى اﻟﻔﺎﺋﺪة اﶈﺼﻠﺔ ﻣﻦ ﻫﺬا اﳌﻘﺮر ﳑﺎ ﻳﺴﺎﻋﺪ ﰲ ﺗﻄﻮﻳﺮ اﳌﻨﻬﺠﻴﺔ اﻟﻌﻠﻤﻴﺔ واﻟﻌﻤﻠﻴﺔ اﻟﺘﻄﺒﻴﻘﻴﺔ ﻟﻠﻤﻘﺮر‪.‬‬
‫‪ ‬ﲢﺪﻳﺪ اﻻﳓﺮاف اﳌﻌﻴﺎري واﻟﻘﻴﻤﺔ اﳌﺘﻮﺳﻄﺔ وﻣﻌﺮﻓﺔ اﻟﺘﻔﺎوت ﰲ اﳌﺴﺘﻮﻳﺎت ﺑﲔ اﻟﻄﻼب واﻟﺬي ﻳﻨﺘﺞ ﻋﻨﻪ ﺗﻮﺟﻴﻪ زاﺋﺪ ﻟﻠﻄﻼب ﰲ‬
‫اﳌﺴﺘﻮﻳﺎت اﻟﺪﻧﻴﺎ‪.‬‬
‫‪ ‬ﲢﺪﻳﺪ اﳉﺪوى اﻟﺘﻄﺒﻴﻘﻴﺔ ﻟﻨﻈﺮﻳﺔ اﻟﺘﻌﻠﻴﻢ اﻟﺘﻔﺎﻋﻠﻲ‪.‬‬

‫ﺧﻼل اﻻﺧﺘﺒﺎر ﺗﻮﺟﺐ ﻋﻠﻰ ﻛﻞ ﻃﺎﻟﺐ أن‪:‬‬

‫‪ ‬ﻳﻘﻮم ﲝﻞ اﻷﺳﺌﻠﺔ ﺑﺸﻜﻞ ﻓﺮدي ﲤﺎﻣﺎً‪.‬‬

‫‪ ‬ﻻ ﻳﺴﺘﻌﲔ ﺑﺄي ﻣﺮﺟﻊ ﻋﻠﻰ اﻹﻃﻼق‪.‬‬
‫‪ ‬ﻳﺴﺠﻞ اﻟﻮﻗﺖ اﻟﺬي اﺳﺘﻐﺮﻗﻪ ﺣﻞ ﻛﻞ ﺳﺆال ﺑﺸﻜﻞ دﻗﻴﻖ‪.‬‬
‫‪ ‬ﺗﻜﻮن اﻹﺟﺎﺑﺔ ﳐﺘﺼﺮة ودﻗﻴﻘﺔ ﺟﺪاً دون اﳋﺮوج ﻋﻦ اﳌﻮﺿﻮع‪ ،‬وﰲ ﺣﺎل ﻋﺪم ﻣﻌﺮﻓﺔ أي ﺳﺆال ﻳﺘﻢ ﺗﺮﻛﻪ ﻓﺎرﻏﺎً ﺑﺪون ﺣﻞ وﻳﺴﺠﻞ‬
‫اﻟﻮﻗﺖ اﻟﺬي اﺳﺘﻐﺮﻗﻪ ﰲ اﻟﺘﻔﻜﲑ ﳏﺎوﻻً ﻓﻬﻢ ﻓﻜﺮة اﻟﺴﺆال ﻣﻦ أﺟﻞ ﺣﻠﻪ‪.‬‬

‫اﻟﺴﺆال اﻷول‪ :‬ﻣﺎ ﻫﻮ اﻟﻔﺮق ﺑﲔ اﻟﺒﲎ اﻟﺘﺼﻤﻴﻤﻴﺔ اﻷﺳﺎﺳﻴﺔ اﻟﺘﺎﻟﻴﺔ‪ RISC, CISC, MISC :‬وأﻳﻬﺎ ﺗﻌﺘﻤﺪ ﻋﺎﺋﻠﺔ ﻣﺘﺤﻜﻤﺎت ‪AVR‬؟‬

‫اﻟﺴﺆال اﻟﺜﺎﻧﻲ‪ :‬ﻗﺎرن ﺑﺎﺧﺘﺼﺎر ﺑﲔ ﺑﻨﻴﺔ ‪ Harvard‬وﺑﻨﻴﺔ ‪ Von-Neumann‬وأﻳﻬﻤﺎ ﺗﻌﺘﻤﺪ ﻋﺎﺋﻠﺔ ﻣﺘﺤﻜﻤﺎت ‪AVR‬؟‬

‫اﻟﺴﺆال اﻟﺜﺎﻟﺚ‪ :‬ﻗﻢ ﺑﺘﻌﻴﲔ ﻣﺎﻳﻠﻲ‪:‬‬

‫‪ -‬ﻣﺎ ﻫﻲ اﻟﻌﺎﺋﻼت اﻷﺳﺎﺳﻴﺔ ﳌﺘﺤﻜﻤﺎت ‪AVR‬؟‬

‫‪ -‬ﻣﺎﻫﻮ ﻣﺪﻟﻮل اﻟﺮﻣﺰ ‪ ATmega8L–8PI‬اﳌﻜﺘﻮب ﻋﻠﻰ اﻟﻮﺟﻪ اﻟﻌﻠﻮي ﻟﻠﻤﺘﺤﻜﻢ اﳌﺼﻐﺮ؟‬
‫‪ -‬ﻣﺎﻫﻲ ﻋﺪد اﻟﺘﻌﻠﻴﻤﺎت ﰲ اﻟﺜﺎﻧﻴﺔ )‪ (MIPS‬اﻟﱵ ﻳﺴﺘﻄﻴﻊ ﻣﺘﺤﻜﻢ ﻣﺼﻐﺮ ﻣﻦ اﻟﻌﺎﺋﻠﺔ ‪ AVR‬ﺗﻨﻔﻴﺬﻫﺎ ﻋﻠﻤﺎً أن ﺗﺮدد اﳍﺰاز‬
‫اﻟﻜﺮﻳﺴﺘﺎﱄ اﻷﻋﻈﻤﻲ‬
‫‪ (fosc) -‬ﻫﻮ ‪ 16MHZ‬وﻋﺪد دورات اﻵﻟﺔ ﻟﻜﻞ ﺗﻌﻠﻴﻤﺔ )‪ (Clock Cycle‬ﻫﻮ دورة واﺣﺪة ﻓﻘﻂ؟‬
‫‪ -‬ﻣﺎﻫﻮ اﻟﻔﺮق ﺑﲔ اﳌﻘﺎﻃﻌﺎت اﳋﺎرﺟﻴﺔ واﳌﻘﺎﻃﻌﺎت اﻟﺪاﺧﻠﻴﺔ وأﻋﻂ ﻣﺜﺎﻻً ﻋﻦ ﻛﻞ ﻣﻨﻬﻤﺎ؟‬

‫‪381‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫اﺳﻢ اﳌﻠﺤﻖ | ‪Appendix Name‬‬

‫اﻟﺴﺆال اﻟﺮاﺑﻊ‪ :‬ﻣﺎ ﻫﻮ اﻟﻔﺮق ﺑﲔ اﳌﺘﺤﻜﻤﺎت اﳌﺼﻐﺮة )‪ (MCUs‬واﳌﻌﺎﳉﺎت اﳌﺼﻐﺮة )‪ (MPUs‬ﻣﻦ ﺣﻴﺚ‪ :‬اﻟﺒﻨﻴﺔ اﻟﺪاﺧﻠﻴﺔ ‪ -‬اﻷداء‬
‫واﻟﺴﺮﻋﺔ ‪ -‬اﺳﺘﻬﻼك اﻟﻄﺎﻗﺔ ‪ -‬اﻟﺘﻜﻠﻔﺔ وﺗﻌﻘﻴﺪات اﻟﻨﻈﺎم‪ .‬وﰲ ﺣﺎل ﻃﻠﺐ ﺗﺼﻤﻴﻢ ﻧﻈﺎم إﻟﻜﱰوﱐ ﻣﱪﻣﺞ ﻟﺘﻨﻈﻴﻢ درﺟﺔ ﺣﺮارة ﻓﺮن ﻛﻬﺮﺑﺎﺋﻲ‪،‬‬
‫ﻓﻬﻞ ﺗﻘﱰح اﺳﺘﺨﺪام ﻣﻌﺎﰿ ﻣﺼﻐﺮ )‪ (MCU‬أم ﺗﻘﱰح اﺳﺘﺨﺪام ﻣﺘﺤﻜﻢ ﻣﺼﻐﺮ )‪ (MPU‬وﳌﺎذا؟ أرﺳﻢ ﳐﻄﻄﺎً ﺻﻨﺪوﻗﺎً ﻣﺒﺴﻄﺎً ﻟﻠﻨﻈﺎم‬
‫اﳌﺬﻛﻮر‪.‬‬

‫اﻟﺴﺆال اﻟﺨﺎﻣﺲ‪ :‬ﻣﺎ ﻫﻲ اﻟﻄﺮﻳﻘﺔ أو اﳍﻴﻜﻠﺔ اﻷﻣﺜﻠﻴﺔ ﻟﺘﻨﻈﻴﻢ ﻛﺘﺎﺑﺔ اﻟﱪﻧﺎﻣﺞ )‪ (Code Organization‬ﰲ ﻧﻈﻢ اﻟﺘﺤﻜﻢ ﺑﺎﺳﺘﺨﺪام‬
‫اﳌﺘﺤﻜﻤﺎت اﳌﺼﻐﺮة؟‬

‫اﻟﺴﺆال اﻟﺴﺎدس‪ :‬ﻣﺎ ﻫﻮ اﻟﻔﺮق ﺑﲔ اﻟﺘﻌﻠﻴﻤﺘﲔ اﻟﺘﺎﻟﻴﺘﲔ ﰲ ﻛﻞ ﺳﻄﺮ؟‬

‫‪Debounce Pinb.1 , 1 , label , Sub‬‬ ‫‪Bitwait Pinb.1 , Reset‬‬

‫‪Rotate Portb , Left , 1‬‬ ‫‪Shift Portb , Left , 1‬‬

‫اﻟﺴﺆال اﻟﺴﺎﺑﻊ‪ :‬ﻋﻠﻰ اﻟﺸﻜﻞ اﳌﺒﲔ دارة ﻣﻔﺘﺎح إﻟﻜﱰوﱐ ﺑﺎﺳﺘﺨﺪام ﺗﺮاﻧﺰﺳﺘﻮر اﺳﺘﻄﺎﻋﻲ ‪ .P-MOSFET‬واﳌﻄﻠﻮب‪:‬‬

‫ﻣﺎﻫﻮ اﳌﺴﺘﻮى اﳌﻨﻄﻘﻲ ﻹﺷﺎرة اﻟﺘﺤﻜﻢ ﰲ اﻟﻨﻘﻄﺔ ‪ A‬ﻣﻦ أﺟﻞ‬ ‫‪.1‬‬

‫ﺗﺸﻐﻴﻞ اﳊﻤﻞ اﻟﺘﺤﺮﻳﻀﻲ ‪L‬؟‬
‫ﻣﺎﻫﻮ ﺳﺒﺐ وﺿﻊ اﻟﱰاﻧﺰﺳﺘﻮر ‪T1‬؟ ﳌﺎذا ﱂ ﺗﻮﺻﻞ ﻗﺎﻋﺪة ‪Q1‬‬ ‫‪.2‬‬
‫ﻣﺒﺎﺷﺮة إﱃ ﻗﻄﺐ اﳌﺘﺤﻜﻢ؟‬
‫ﺣﺴﺎب اﺳﺘﻄﺎﻋﺔ اﻟﱰاﻧﺰﺳﺘﻮر ‪Q1‬؟‬ ‫‪.3‬‬
‫ﻣﺎﻫﻲ وﻇﻴﻔﺔ اﻟﺜﻨﺎﺋﻲ ‪D‬؟‬ ‫‪.4‬‬

‫اﻟﺴﺆال اﻟﺜﺎﻣﻦ‪ :‬ﻋﻠﻰ اﻟﺸﻜﻞ اﳌﺒﲔ ﺟﺎﻧﺒﺎً دارة اﻟﻘﻴﺎدة ﶈﺮك ﺗﻴﺎر ﻣﺴﺘﻤﺮ ﺑﺎﺳﺘﺨﺪام ﺗﺮاﻧﺰﺳﺘﻮر اﺳﺘﻄﺎﻋﻲ‪ MOSFET‬ﻣﻦ اﻟﻨﻮع ‪N-‬‬

‫‪ .Channel‬واﳌﻄﻠﻮب‪:‬‬

‫ﻣﺎﻫﻮ اﳌﺴﺘﻮى اﳌﻨﻄﻘﻲ ﻹﺷﺎرة اﻟﺘﺤﻜﻢ ﰲ اﻟﻨﻘﻄﺔ ‪ A‬ﻣﻦ أﺟﻞ‬ ‫‪.1‬‬

‫ﺗﺸﻐﻴﻞ اﶈﺮك؟‬
‫ﻣﺎﻫﻲ وﻇﻴﻔﺔ اﻟﻌﻨﺼﺮ ‪ OK‬وﳌﺎذا ﰎ وﺿﻌﻪ ﰲ اﻟﺘﺼﻤﻴﻢ؟‬ ‫‪.2‬‬
‫ﺣﺴﺎب اﺳﺘﻄﺎﻋﺔ اﻟﱰاﻧﺰﺳﺘﻮر ‪Q1‬؟‬ ‫‪.3‬‬
‫ﻳﻮﺟﺪ ﺧﻄﺄ ﺗﺼﻤﻴﻤﻲ ﰲ ﻫﺬﻩ اﻟﺪارة‪ ،‬وﻫﻮ أن اﻟﱰاﻧﺰﺳﺘﻮر ‪Q1‬‬ ‫‪.4‬‬
‫ﺳﻴﻜﻮن ﰲ ﺣﺎﻟﺔ ﻋﻤﻞ ﺑﺪون ﺗﻄﺒﻴﻖ أي إﺷﺎرة ﲢﻜﻢ! ﻓﻤﺎ ﻫﻮ‬
‫اﻗﱰاﺣﻚ ﻟﺘﺼﺤﻴﺢ اﳋﻄﺄ ﻋﻠﻤﺎً أن اﻟﺘﺼﺤﻴﺢ ﳚﺐ أن ﻳﺘﻢ ﻋﻨﺪ‬
‫اﻟﻨﻘﻄﺔ ‪ B‬ﺑﺈﺿﺎﻓﺔ ﻋﻨﺼﺮ ﺟﺪﻳﺪ‪ .‬أو اﻗﱰح ﻣﺎ ﺗﺮاﻩ ﻣﻨﺎﺳﺒﺎً‪.‬‬

‫اﻟﺴﺆال اﻟﺘﺎﺳﻊ‪ :‬ﺻﻨﻒ اﻟﺘﻌﻠﻴﻤﺎت اﻟﺘﺎﻟﻴﺔ ﺣﺴﺐ وﻇﺎﺋﻔﻬﺎ ﰲ اﳉﺪول أدﻧﺎﻩ‪:‬‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪382‬‬
‫‪A2‬‬ ‫اﳌﻠﺤﻖ اﻟﺜﺎﱐ| ‪Appendix 2‬‬

‫‪Dim W As‬‬
‫‪Config Timer1‬‬ ‫‪$baud = 2400‬‬ ‫‪Config Int1 = Falling‬‬ ‫‪Config Adc‬‬
‫‪Integer‬‬
‫‪Reset var‬‬ ‫‪Int1_isr:‬‬
‫‪Config‬‬
‫‪Incr count‬‬ ‫‪$crystal = 2000000‬‬ ‫"‪$regfile="m8def.dat‬‬ ‫‪Set Int_occur‬‬
‫‪Portc=Input‬‬
‫‪NOP‬‬ ‫‪Return‬‬

‫ﺗﻌﻠﻴﻤﺎت ﺗﻨﻔﻴﺬﻳﺔ‬ ‫ﺑﺮﻧﺎﻣﺞ ﻓﺮﻋﻲ‬ ‫ﻣﺘﺤﻮﻻت‬ ‫ﺗﻴﺌﺔ‬ ‫ﺗﻮﺟﻴﻬﺎت‬

‫)‪(Instructions‬‬ ‫)‪(Sub Routine‬‬ ‫)‪(Variables‬‬ ‫)‪(configurations‬‬ ‫)‪(Directives‬‬

‫اﻟﺴﺆال اﻟﻌﺎﺷﺮ‪ :‬ﻣﺪرج أدﻧﺎﻩ ﺑﺮﻧﺎﻣﺞ ﺗﻌﺮﻳﻒ وﺗﺸﻐﻴﻞ ﺷﺎﺷﺔ إﻇﻬﺎر ﻛﺮﻳﺴﺘﺎﻟﻴﺔ )‪ ،(LCD‬واﳌﻄﻠﻮب‪:‬‬
‫‪ .1‬ﺗﻮﺻﻴﻞ أﻗﻄﺎب ﺷﺎﺷﺔ اﻹﻇﻬﺎر ﻣﻊ دارة اﳌﺘﺤﻜﻢ اﳌﺒﲔ ﰲ اﻟﺸﻜﻞ ﺑﻨﺎءً ﻋﻠﻰ اﻟﺘﻌﺮﻳﻒ ﰲ اﻟﱪﻧﺎﻣﺞ اﻟﺘﺎﱄ‪ .‬ﳝﻜﻦ اﻻﺳﺘﻌﺎﻧﺔ ﺑﺎﻟﻮﺛﻴﻘﺔ اﻟﻔﻨﻴﺔ‬
‫اﳌﺮﻓﻘﺔ ﻟﺸﺎﺷﺔ اﻹﻇﻬﺎر اﻟﻜﺮﻳﺴﺘﺎﻟﻴﺔ‪.‬‬
‫‪ .2‬ﻣﺎ ﻫﻮ اﻟﻔﺮق ﺑﲔ ﳕﻂ اﻟﻌﻤﻞ ‪ 4-bit‬و ﳕﻂ اﻟﻌﻤﻞ ‪ 8-bit‬ﰲ ﺷﺎﺷﺔ اﻹﻇﻬﺎر ‪ LCD‬وﳌﺎذا وﺟﺪ ﻫﺬا اﻟﻨﻤﻂ ‪4-bit‬؟‬

‫‪Config Lcdpin = Pin , Db4 = Portd.0 , Db5 = Portd.1 , Db6 = Portd.2 , Db7 = Portd.3 , E = Portd.4 , Rs = Portd.5‬‬

‫اﻟﺴﺆال اﻟﺤﺎدي ﻋﺸﺮ‪ :‬ﻣﺪرج أدﻧﺎﻩ ﺑﺮﻧﺎﻣﺞ ﺗﻌﺮﻳﻒ وﺗﺸﻐﻴﻞ ﺷﺎﺷﺔ إﻇﻬﺎر ﻧﻘﻄﻴﺔ )‪ ،(Graphic-LCD‬واﳌﻄﻠﻮب ﺗﻮﺻﻴﻞ أﻗﻄﺎب ﺷﺎﺷﺔ‬
‫اﻹﻇﻬﺎر ﻣﻊ دارة اﳌﺘﺤﻜﻢ اﳌﺒﲔ ﰲ اﻟﺸﻜﻞ ﺑﻨﺎءً ﻋﻠﻰ اﻟﺘﻌﺮﻳﻒ ﰲ اﻟﱪﻧﺎﻣﺞ‪ .‬ﳝﻜﻦ اﻻﺳﺘﻌﺎﻧﺔ ﺑﺎﻟﻮﺛﻴﻘﺔ اﻟﻔﻨﻴﺔ اﳌﺮﻓﻘﺔ ﻟﺸﺎﺷﺔ اﻹﻇﻬﺎر اﻟﻨﻘﻄﻴﺔ‪.‬‬

‫‪Config Graphlcd = 128 * 64 , Dataport = Portb , Controlport = Portc , Ce = 2 , Cd = 1 , Wr = 4 , Rd = 3 , Reset = 0 , Fs‬‬

‫‪=5, Mode = 8‬‬

‫اﻟﺴﺆال اﻟﺜﺎﻧﻲ ﻋﺸﺮ‪ :‬أدﻧﺎﻩ ﺑﺮﻧﺎﻣﺞ وﺗﺸﻐﻴﻞ ﺷﺎﺷﺔ إﻇﻬﺎر ﻛﺮﻳﺴﺘﺎﻟﻴﺔ )‪ (LCD‬ﻣﻊ ﻟﻮﺣﺔ ﻣﻔﺎﺗﺢ ﺳﺖ ﻋﺸﺮﻳﺔ‪ ،‬واﳌﻄﻠﻮب‪:‬‬

‫‪ .1‬ﺗﻮﺻﻴﻞ أﻗﻄﺎب ﺷﺎﺷﺔ اﻹﻇﻬﺎر وأﻗﻄﺎب ﻟﻮﺣﺔ اﳌﻔﺎﺗﻴﺢ ﻣﻊ دارة اﳌﺘﺤﻜﻢ اﳌﺒﲔ ﰲ اﻟﺸﻚ اﺳﺘﻨﺎداً إﱃ اﻟﱪﻧﺎﻣﺞ اﻟﺘﺎﱄ‪.‬‬

‫‪383‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 Appendix Name | ‫اﺳﻢ اﳌﻠﺤﻖ‬

‫ اﳌﺪرﺟﺔ ﰲ ﺗﻌﺮﻳﻒ ﻟﻮﺣﺔ اﳌﻔﺎﺗﻴﺢ؟‬Delay = 500 ‫ ﻣﺎﻫﻲ وﻇﻴﻔﺔ اﻟﺘﻌﻠﻴﻤﺔ‬.2

Config Lcdpin = Pin , Db4 = Portd.0 , Db5 = Portd.1 , Db6 = Portd.2 , Db7 = Portd.3 , E = Portd.4 , Rs = Portd.5
Config Kbd = Portb , Delay = 500

‫ إﲤﺎم ﺗﻮﺻﻴﻞ اﻟﺪارة‬:‫ واﳌﻄﻠﻮب‬،‫ ﻋﻠﻰ اﻟﺸﻜﻞ اﻟﺘﺎﱄ اﻟﻌﻨﺎﺻﺮ اﳌﻄﻠﻮﺑﺔ ﻟﺪارة ﲢﻜﻢ ﲟﺤﺮك ﺧﻄﻮي ﺛﻨﺎﺋﻲ اﻟﻘﻄﺒﻴﺔ‬:‫اﻟﺴﺆال اﻟﺜﺎﻟﺚ ﻋﺸﺮ‬
‫ ﻓﻤﺎ ﻫﻲ ﻃﺮﻳﻘﺔ اﻟﺘﺤﻜﻢ اﳌﱪﳎﺔ ﰲ‬،‫ ﺑﻨﺎءً ﻋﻠﻰ ﻣﺎ ذﻛﺮﻧﺎﻩ ﰲ اﻟﻔﺼﻞ ﻋﻦ ﻃﺮق اﻟﺘﺤﻜﻢ ﺑﺎﶈﺮﻛﺎت اﳋﻄﻮﻳﺔ‬.‫اﺳﺘﻨﺎداً إﱃ اﻟﱪﻧﺎﻣﺞ اﳌﺪرج أدﻧﺎﻩ‬
‫اﻟﱪﻧﺎﻣﺞ اﳌﺪرج؟‬

$regfile = "2313def.dat"
$crystal = 4000000
Config Portb.0 = Output
Config Portb.1 = Output
Config Portb.2 = Output
Config Portb.4 = Output
Do
Set Portd.0 : Reset Portd.1 : Reset Portd.2 : Reset Portd.4 : Waitms 100
Reset Portd.0 : Set Portd.1 : Reset Portd.2 : Reset Portd.4 : Waitms 100
Reset Portd.0 : Reset Portd.1 : Set Portd.2 : Reset Portd.4 : Waitms 100
Reset Portd.0 : Reset Portd.1 : Reset Portd.2 : Set Portd.4 : Waitms 100
Loop
‫ ﻣﺎ ﻫﻮ‬ATmega8 ‫ ﻊ ﻗﻄﺐ ﻣﺒﺪل ﺗﺸﺎﻬﺑﻲ رﻗﻤﻲ ﻟﻠﻤﻌﺎﰿ‬LM35 ‫اﻟﺴﺆال اﻟﺮاﺑﻊ ﻋﺸﺮ إذا وﺻﻞ ﺣﺴﺎس ﺣﺮارة ﺗﺸﺎﻬﺑﻲ ﻣﻦ اﻟﻨﻮع‬
:‫ وﺑﻔﺮض أن ﻣﻮاﺻﻔﺎت ﻫﺬا اﳊﺴﺎس ﻫﻲ ﻋﻠﻰ اﻟﺸﻜﻞ اﻟﺘﺎﱄ‬،‫ﻣﻮﺿﺢ ﰲ اﻟﺸﻜﻞ أدﻧﺎﻩ‬

𝑇 = 0 → 150℃ ≫ 𝑉𝑠 = 0 → 1.5 𝑉𝑜𝑙𝑑

Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages 384
‫‪A2‬‬ ‫اﳌﻠﺤﻖ اﻟﺜﺎﱐ| ‪Appendix 2‬‬

‫‪ .1‬وﺟﺪ ﻗﻴﻤﺔ ﺧﺮج اﳌﺒﺪل اﻟﺘﺸﺎﻬﺑﻲ اﻟﺮﻗﻤﻲ ﻋﻨﺪ درﺟﺔ ﺣﺮارة ℃‪75‬؟‬
‫‪ .2‬ﻣﺎ ﻫﻮ اﳉﻬﺪ اﳌﺮﺟﻌﻲ ﻟﻠﻤﺒﺪل اﻟﱵ ﺗﻘﱰح اﺳﺘﺨﺪاﻣﻪ وﳌﺎذا؟‬
‫‪ .3‬اﻧﻄﻼﻗﺎً ﳑﺎ ﺳﺒﻖ‪ ،‬ﻣﺎﻫﻲ اﳌﻌﺎدﻟﺔ اﻟﱵ ﺗﻌﻄﻲ درﺟﺔ اﳊﺮارة اﳊﻘﻴﻘﺔ؟‬

‫"‪$regfile = "m8def.dat‬‬
‫‪$crystal = 1000000‬‬
‫‪Config Timer0 = Timer , Prescale = 1 :‬‬
‫‪Timer0 = 255 : On Timer0 Timer1_isr : Enable Timer0 : Enable Interrupts‬‬
‫‪Config Portb.0 = Output : Led Alias Portb.0‬‬
‫‪Do‬‬
‫‪If Flag = 1 Then : Reset Flag : Toggle Led : End If‬‬
‫‪Loop‬‬

‫‪Timer0_isr:‬‬
‫‪Set Flag : Timer0 = 255‬‬
‫‪Return‬‬
‫اﻟﺴﺆال اﻟﺨﺎﻣﺲ ﻋﺸﺮ‪ :‬اﻟﱪﻧﺎﻣﺞ اﻟﺘﺎﱄ ﻳﻘﻮم ﺑﺘﻮﻟﻴﺪ ﻣﻘﺎﻃﻌﺔ ﻣﺆﻗﺖ ﻛﻞ زﻣﻦ ‪ ،T‬اﳌﻄﻠﻮب‪:‬‬
‫‪ .1‬ﺣﺴﺎب ﻗﻴﻤﺔ ‪!T‬‬
‫‪ .2‬ﻋﺪل ﻗﻴﻤﺔ اﻟﺸﺤﻦ ﻟﻠﻤﺆﻗﺖ ﻣﻦ أﺟﻞ ﺗﻮﻟﻴﺪ ﻣﻘﺎﻃﻌﺔ ﻣﺆﻗﺖ ﻛﻞ ‪ 1‬ﺛﺎﻧﻴﺔ‪.‬‬
‫‪ .3‬ﻣﺎﻫﻲ وﻇﻴﻔﺔ ﻫﺬا اﻟﱪﻧﺎﻣﺞ ﻋﻤﻠﻴﺎً وﺑﺎﺧﺘﺼﺎر ﺷﺪﻳﺪ؟‬
‫‪ .4‬ﻣﺎ ﻫﻮ اﻟﻔﺮق ﺑﲔ ﻣﻘﺎﻃﻌﺔ ﻃﻔﺤﺎن اﳌﺆﻗﺖ وﻣﻘﺎﻃﻌﺔ ﻧﻈﲑ اﳌﻘﺎرﻧﺔ ﻟﻠﻤﺆﻗﺖ وأي ﻣﻨﻬﻤﺎ ﻳﻌﺘﻤﺪ اﻟﱪﻧﺎﻣﺞ ﺟﺎﻧﺒﺎً؟‬
‫‪ .5‬ﻣﺎﻫﻲ أﻧﻈﻤﺔ اﻟﺰﻣﻦ اﳊﻘﻴﻘﻲ ‪ RTS‬وأﻳﻦ ﺗﺴﺘﺨﺪم؟‬
‫‪ .6‬ﻣﺎﻫﻮ أﻛﱪ زﻣﻦ ﳝﻜﻦ ﺗﻮﻟﻴﺪﻩ ﺑﻮاﺳﻄﺔ ‪ (8-bit) Timer0‬وﻛﺬﻟﻚ ‪ (16-bit) Timer1‬ﻋﻠﻤﺎً أن ﺗﺮدد اﳍﺰاز اﻟﻜﺮﻳﺴﺘﺎﱄ ﻫﻮ‬
‫‪.16MHZ‬‬
‫‪ .7‬ﰲ ﺣﺎل ﻃﻠﺐ ﺗﻮﻟﻴﺪ زﻣﻦ ﻛﺒﲑ ﻧﺴﺒﻴﺎً )‪ 60‬دﻗﻴﻘﺔ( وﻫﻮ ﺧﺎرج ﻧﻄﺎق اﳌﺆﻗﺖ‪ ،‬ﻓﻤﺎ ﻫﻲ ﻓﻜﺮة اﳊﻞ ﺑﺎﺧﺘﺼﺎر ﺷﺪﻳﺪ؟‬
‫اﻟﺴﺆال اﻟﺴﺎدس ﻋﺸﺮ‪ :‬ﻋﻠﻰ اﻟﺸﻜﻞ اﻟﺘﺎﱄ ﳐﻄﻂ وﺑﺮﻧﺎﻣﺞ ﺳﺎﻋﺔ إﻟﻜﱰوﻧﻴﺔ‪ ،‬واﳌﻄﻠﻮب‪ :‬ﺷﺮح اﻟﱪﻧﺎﻣﺞ ﺳﻄﺮاً ﺳﻄﺮاً وﺑﺎﺧﺘﺼﺎر! ﻣﺎﻫﻲ‬
‫وﻇﻴﻔﺔ اﳍﺰاز اﻟﻜﺮﻳﺴﺘﺎﱄ ‪ (32768HZ) X1‬ﰲ اﳌﺨﻄﻂ؟‬

‫‪385‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫اﺳﻢ اﳌﻠﺤﻖ | ‪Appendix Name‬‬

‫"‪$regfile = "m8def.dat‬‬
‫‪$crystal = 4000000‬‬
‫‪$baud = 9600‬‬
‫‪'----------------------‬‬
‫‪Config Lcdpin = Pin , Db4 = Portb.0 , Db5 = Portb.1 , Db6 = Portb.2 , Db7 = Portb.3 , E = Portb.4 ,‬‬
‫‪Rs = Portb.5‬‬
‫‪Config Lcd = 20 * 4‬‬

‫‪Config Clock = Soft‬‬

‫‪Config Date = Dmy , Separator = /‬‬
‫‪Enable Interrupts‬‬
‫‪'----------------------‬‬
‫"‪Time$ = "16:59:00" : Date$ = "14/04/08‬‬

‫‪Do‬‬
‫‪Print Time$ : Print Date$‬‬
‫‪Lcd Time$ : Locate 2 , 1 : Lcd Date$ : Wait 1 : Cls‬‬
‫‪Loop‬‬
‫اﻟﺴﺆال اﻟﺴﺎﺑﻊ ﻋﺸﺮ‪ :‬ﻳﺮاد ﺗﺼﻤﻴﻢ ﻟﻨﻈﺎم ﳛﻮي ﻣﺘﺤﻜﻢ ﻣﺼﻐﺮ ﻳﺘﻢ رﺑﻄﻪ ﻋﻦ ﻃﺮﻳﻖ ﻧﺎﻓﺬة اﻻﺗﺼﺎﻻت اﻟﺘﺴﻠﺴﻠﻴﺔ ﻟﻠﻤﻌﺎﰿ ‪ UART‬ﻣﻊ‬
‫اﳊﺎﺳﺐ ﻋﻦ ﻃﺮﻳﻖ ﻧﺎﻓﺬة اﻻﺗﺼﺎل اﻟﺘﺴﻠﺴﻠﻲ ‪ ،COM‬واﳌﻄﻠﻮب‪:‬‬
‫‪ .1‬ﻫﻞ ﻧﺴﺘﻄﻴﻊ وﺻﻞ اﻟﻨﺎﻓﺬة ‪ UART‬ﻟﻠﻤﺘﺤﻜﻢ ﻣﺒﺎﺷﺮة ﻣﻊ اﳌﻨﻔﺬ ‪ COM‬اﳊﺎﺳﺐ وﳌﺎذا؟‬
‫‪ .2‬ﻣﺎ ﻫﻲ اﳌﺴﺘﻮﻳﺎت اﳌﻨﻄﻘﻴﺔ اﻟﱵ ﲢﺪد ”‪ “1,0‬ﻟﻠﱪوﺗﻮﻛﻮل ‪RS232‬؟‬
‫‪ .3‬ﻛﻲ ﻧﺴﺘﻄﻴﻊ رﺑﻂ اﳌﺘﺤﻜﻢ ﻣﻊ اﳊﺎﺳﺐ؟ ﻣﺎﻫﻮ اﳍﺪف ﻣﻦ رﺑﻂ اﳌﺘﺤﻜﻢ ﻣﻊ اﻟﻨﺎﻓﺬة اﻟﺘﺴﻠﺴﻠﻴﺔ ﻟﻠﺤﺎﺳﺐ؟‬
‫‪ .4‬ﻣﺎ ﻫﻮ اﻟﺸﻲء اﻷﺳﺎﺳﻲ اﳌﻄﻠﻮب ﺗﻌﺮﻳﻔﻪ ﺑﺮﳎﻴﺎً ﻟﻴﺘﻢ ﻧﻘﻞ اﻟﺒﻴﺎﻧﺎت ﺑﺸﻜﻞ ﻣﺘﻮاﻗﺖ وﺳﻠﻴﻢ ﺑﲔ اﻟﻄﺮﻓﲔ؟‬
‫‪ .5‬أرﺳﻢ ﳐﻄﻄﺎً ﺻﻨﺪوﻗﻴﺎً ﻣﺒﺴﻄﺎً ﻟﻠﻨﻈﺎم‪.‬‬

‫اﻟﺴﺆال اﻟﺜﺎﻣﻦ ﻋﺸﺮ‪ :‬ﺑﻨﺎءً ﻋﻠﻰ اﳌﺨﻄﻂ اﻟﻨﻈﺮي ﻟﻠﺪارة أدﻧﺎﻩ وﺑﺎﻻﺳﺘﻌﺎﻧﺔ ﺑﺎﻟﺘﻌﻠﻴﻤﺎت اﳌﺪرﺟﺔ‪:‬‬
‫‪ .1‬ﻗﻢ ﺑﻜﺘﺎﺑﺔ ﺑﺮﻧﺎﻣﺞ ﻋﺪاد ﻹﻇﻬﺎر اﻷرﻗﺎم ﻣﻦ ﺻﻔﺮ إﱃ ﺗﺴﻌﺔ ﻋﻠﻰ ﺷﺎﺷﺔ اﻹﻇﻬﺎر اﻟﺴﺒﺎﻋﻴﺔ‪.‬‬
‫‪ .2‬أﺣﺴﺐ ﻗﻴﻤﺔ اﳌﻘﺎوﻣﺔ ‪ R2‬ﻋﻠﻤﺎً أن ﺗﻴﺎر اﻟﻘﻄﻌﺔ اﻟﻀﻮﺋﻴﺔ اﻟﻮاﺣﺪة ‪ 10mA‬وﺟﻬﺪ ﻋﻤﻠﻬﺎ ‪.2V‬‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪386‬‬
‫‪A2‬‬ ‫اﳌﻠﺤﻖ اﻟﺜﺎﱐ| ‪Appendix 2‬‬

‫‪Dim I As Byte‬‬
‫‪For I = 0 To 9‬‬
‫‪Next I‬‬
‫)‪Portb = Lookup(i , Seg‬‬
‫‪Config Portb = Output‬‬
‫‪Seg:‬‬
‫‪Data &H40,&H79,&H24,&H30,&H19,&H12, &H02,&H78,&H00‬‬
‫"‪$regfile = "m8def.dat‬‬
‫‪$crystal = 4000000‬‬

‫اﻟﺴﺆال اﻟﺘﺎﺳﻊ ﻋﺸﺮ‪ :‬إذا ﻃﻠﺐ ﻣﻨﻚ ﺗﺼﻤﻴﻢ ﻧﻈﺎم إﻟﻜﱰوﱐ ﳌﺮاﻗﺒﺔ ﺣﺎﻟﺔ اﻟﻄﻘﺲ ﻣﻦ ﺧﻼل اﳊﺴﺎﺳﺎت اﻟﺘﺎﻟﻴﺔ‪ :‬ﺣﺴﺎس ﺣﺮارة ذو ﺧﺮج‬
‫رﻗﻤﻲ )‪ ،SPI‬ﺣﺴﺎس رﻃﻮﺑﺔ ذو ﺧﺮج ﺗﺸﺎﻬﺑﻲ‪ ،‬ﺴﺎس ﺿﻐﻂ ﺟﻮي ذو ﺧﺮج ﺗﺸﺎﻬﺑﻲ‪ ،‬ﺴﺎس ﺳﺮﻋﺔ اﻟﺮﻳﺎح ذو ﺧﺮج ﺗﺸﺎﻬﺑﻲ‪ ،‬ﺣﺴﺎس‬
‫ﻣﺴﺘﻮى اﳌﻴﺎﻩ ذو ﺧﺮج رﻗﻤﻲ‪.‬‬

‫‪ .1‬إذا ﻛﺎن اﳌﻄﻠﻮب ﻗﺮاءة ﺣﺎﻟﺔ ﻫﺬﻩ اﳊﺴﺎﺳﺎت وﺗﺴﺠﻴﻞ اﻟﻘﻴﻢ وﻣﻌﺎﳉﺔ اﻟﻨﺘﺎﺋﺞ ﺧﻼل ﻓﻮاﺻﻞ زﻣﻨﻴﺔ ﻗﺪرﻫﺎ ‪ 5‬دﻗﺎﺋﻖ‪ ،‬ﻫﻞ ﺗﻘﱰح اﺳﺘﺨﺪام‬
‫ﻣﻌﺎﰿ ﻣﺼﻐﺮ أو ﻣﺘﺤﻜﻢ ﻣﺼﻐﺮ ﻟﺘﻨﻔﻴﺬ ﻫﺬا اﻟﻨﻈﺎم وﳌﺎذا؟‬
‫‪ .2‬ﺑﻔﺮض أن ﺣﺴﺎس اﳊﺮارة رﻗﻤﻲ ﺗﺴﻠﺴﻠﻲ )ﺑﺮوﺗﻮﻛﻮل ‪ (SPI‬وﺣﺴﺎس ﻣﺴﺘﻮى اﳌﻴﺎﻩ رﻗﻤﻲ ﲞﺮج ﺗﻔﺮﻋﻲ ‪ ،6-bits‬وﺑﺎﻗﻲ اﳊﺴﺎﺳﺎت‬
‫ﲞﺮج ﺸﺎﻬﺑﻲ‪ ،‬ﻛﻢ ﻋﺪد أﻗﻄﺎب اﳌﻌﺎﰿ اﻟﱵ ﲢﺘﺎﺟﻬﺎ ﻟﻮﺻﻞ ﲨﻴﻊ اﳊﺴﺎﺳﺎت وﻣﺎ ﻫﻲ وﻇﺎﺋﻒ اﻷﻗﻄﺎب؟‬
‫‪ .3‬ﻣﺎ ﻫﻮ ﺗﺼﻮرك ﻟﻠﻤﺨﻄﻂ اﻟﺼﻨﺪوﻗﻲ اﻟﻌﺎم ﳍﺬا اﻟﻨﻈﺎم؟‬
‫‪ .4‬إذا ﰎ ﺗﻌﺪﻳﻞ اﳌﺸﺮوع ﻦ أﺟﻞ ﺗﺼﻤﻴﻢ ﻧﻈﺎم ﻗﻴﺎس ﺑﺎﻟﺰﻣﻦ اﳊﻘﻴﻘﻲ ﻋﻠﻤﺎً أﻧﻪ ﰎ إﺿﺎﻓﺔ ﺣﺴﺎس ﻟﻘﻴﺎس إﺷﺎرات ﺗﺸﺎﻬﺑﻴﺔ ﻳﺒﻠﻎ ﺗﺮددﻫﺎ‬
‫‪ ،100MHZ‬ﻓﻤﺎ ﻫﻮ اﻗﱰاﺣﻚ وﳌﺎذا؟‬

‫اﻟﺴﺆال اﻟﻌﺸﺮون‪ :‬ﻳﺮاد ﺗﺼﻤﻴﻢ ﻧﻈﺎم ﲢﻜﻢ ﺑﺎﺳﺘﺨﺪام اﻷﺷﻌﺔ ﲢﺖ اﳊﻤﺮاء‪ .‬واﳌﻄﻠﻮب‪:‬‬
‫‪ .1‬ﻣﺎ ﻫﻲ ﺑﻨﻴﺔ اﻟﱪوﺗﻮﻛﻮل ‪ RC5 Code‬وﻣﺎ ﻫﻲ اﳌﻘﺎﻃﻌﺔ اﻟﱵ ﻳﺴﺘﺨﺪﻣﻬﺎ ﰲ اﻟﺒﻴﺌﺔ اﻟﱪﳎﻴﺔ ‪Bascom-AVR‬؟‬
‫‪ .2‬ﻣﺎ ﻫﻲ ﺗﻌﻠﻴﻤﺔ اﻹرﺳﺎل واﻻﺳﺘﻘﺒﺎل ﻟﻠﱪوﺗﻮﻛﻮل ‪ RC5‬ﰲ اﻟﺒﻴﺌﺔ اﻟﱪﳎﻴﺔ ‪Bascom-AVR‬؟‬
‫‪ .3‬ﻣﺎ ﻫﻮ زﻣﻦ ﻋﻄﺎﻟﺔ اﻹرﺳﺎل ﺑﲔ أﻣﺮﻳﻦ ﻣﺘﺘﺎﻟﻴﲔ؟‬
‫‪ .4‬ﻣﺎ ﻫﻮ ﻋﺪد أواﻣﺮ اﻟﺘﺤﻜﻢ اﻷﻋﻈﻤﻲ اﻟﱵ ﳝﻜﻦ إرﺳﺎﳍﺎ ﺑﺎﺳﺘﺨﺪام اﻟﱪوﺗﻮﻛﻮل ‪RC5‬؟‬

‫‪387‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 Appendix Name | ‫اﺳﻢ اﳌﻠﺤﻖ‬

Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages 388
‫‪A3‬‬ ‫اﳌﻠﺤﻖ اﻟﺜﺎﻟﺚ| ‪Appendix 3‬‬

‫اﻟﻤﻠﺤﻖ اﻟﺜﺎﻟﺚ )‪(Appendix 3‬‬

‫‪@’y˝€a@äbjnǸaÎ@áÓˇn€a@äbjnǸa@xàbπ‬‬

‫‪PRE-LAB & POST-LAB TESTS‬‬

‫ﻧﻤﻮذج أﺳﺌﻠﺔ اﻻﺧﺘﺒﺎر اﻟﺘﻤﻬﻴﺪي اﻷول )‪.(Pre-Test-1‬‬

‫اﻟﺴﺆال اﻷول )‪ :(120Sec‬ﻋﻠﻰ ﻣﺎذا ﺗﻌﺘﻤﺪ ﻋﻤﻠﻴﺔ ﺗﺸﻐﻴﻞ ﻟﻮﺣﺔ اﻹﻇﻬﺎر ذات اﻟﺴﺒﻊ ﻗﻄﻊ؟‬

‫اﻟﺴﺆال اﻟﺜﺎﱐ )‪ :(120Sec‬أرﺳﻢ ﳐﻄﻂ اﻟﺒﻨﻴﺔ اﻟﺪاﺧﻠﻴﺔ ﻟﻠﻮﺣﺔ إﻇﻬﺎر ذات ﺳﺒﻊ ﻗﻄﻊ ذات ﻣﻬﺒﻂ ﻣﺸﱰك‪.‬‬

‫اﻟﺴﺆال اﻟﺜﺎﻟﺚ )‪ :(300Sec‬أوﺟﺪ ﺟﺪول ﺗﺸﻔﲑ ﻟﻮﺣﺔ إﻇﻬﺎر ﺳﺒﺎﻋﻴﺔ اﻟﻘﻄﻊ ذات ﻣﺼﻌﺪ ﻣﺸﱰك‪.‬‬

‫اﻟﻘﻴﻤﺔ ﻋﻠﻰ اﻟﺒﻮاﺑﺔ ‪PortC‬‬ ‫اﻟﺮﻗﻢ اﻟﻤﻄﻠﻮب‬

‫اﻟﻘﻄﻊ اﻟﺘﻲ ﺗﻌﻤﻞ‬
‫إﻇﻬﺎرﻩ‬
‫‪7-H‬‬ ‫‪6-G‬‬ ‫‪5-F‬‬ ‫‪4-E‬‬ ‫‪3-D‬‬ ‫‪2-C‬‬ ‫‪1-B‬‬ ‫‪0-A‬‬
‫‪0‬‬
‫‪1‬‬
‫‪2‬‬
‫‪3‬‬
‫‪4‬‬
‫‪5‬‬
‫‪6‬‬
‫‪7‬‬
‫‪8‬‬
‫‪9‬‬

‫اﻟﺴﺆال اﻟﺮاﺑﻊ )‪ :(180Sec‬ﻣﺎ ﻫﻮ اﻟﻔﺮق ﺑﲔ اﳍﺰاز اﻟﻜﺮﻳﺴﺘﺎﱄ ﻟﻠﻤﻌﺎﰿ وﻫﺰاز اﻟﺰﻣﻦ اﳊﻘﻴﻘﻲ وﻣﺎ ﻫﻲ ﻗﻴﻤﺔ ﻛﻞ ﻣﻨﻬﻤﺎ وﻣﺎ ﻫﻲ اﻟﻮﺣﺪة‬
‫اﳌﺴﺌﻮﻟﺔ ﻋﻦ ﺗﻮﻟﻴﺪ اﻟﺰﻣﻦ اﳊﻘﻴﻘﻲ ﰲ اﳌﻌﺎﰿ؟‬

‫اﻟﺴﺆال اﳋﺎﻣﺲ )‪ :(180Sec‬ﻣﺎ ﻫﻮ ﻋﺪد اﻷﻗﻄﺎب اﻟﱵ ﳛﺘﺎﺟﻬﺎ ﺗﻮﺻﻴﻞ ﺷﺒﻜﺔ ﻻدر ﺑﺪﻗﺔ ‪ 32-bit‬وﻣﺎ ﻫﻮ اﻗﱰاﺣﻚ ﻟﺘﻮﺻﻴﻠﻬﺎ ﻣﻊ ﻣﺘﺤﻜﻢ‬
‫ﻣﺼﻐﺮ ‪) ATmega8‬دون أن ﻳﺘﻢ اﺳﺘﺒﺪاﻟﻪ( ﻋﻠﻤﺎً أن ﻫﺬا اﳌﺘﺤﻜﻢ ﳝﻠﻚ ﻓﻘﻂ ‪22-I/Os‬؟‬

‫اﻟﺴﺆال اﻟﺴﺎدس )‪ (180Sec‬ﻣﺎ ﻫﻲ أﳕﺎط ﻋﻤﻞ وﺣﺪة اﳌﻘﺎرﻧﺔ اﻟﺘﺸﺎﻬﺑﻴﺔ ﰲ اﳌﺘﺤﻜﻢ ‪ATmega8‬؟‬

‫‪389‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫اﺳﻢ اﳌﻠﺤﻖ | ‪Appendix Name‬‬

‫ﻧﻤﻮذج أﺳﺌﻠﺔ اﻻﺧﺘﺒﺎر اﻟﻼﺣﻖ اﻷول )‪.(Post-Test-1‬‬

‫اﻟﺴﺆال اﻷول )‪ :(600Sec‬أﻛﺘﺐ ﺑﺮﻧﺎﻣﺞ ﺗﺸﻐﻴﻞ ﻟﻮﺣﺔ إﻇﻬﺎر ﻣﻔﺮدة ﺑﺄﻗﺼﺮ ﻃﺮﻳﻘﺔ وأﻗﻞ ﻋﺪد ﳑﻜﻦ ﻣﻦ اﻟﺘﻌﻠﻴﻤﺎت ﻣﻊ اﻟﺮﺳﻢ‪ ،‬واﻗﱰح ﻣﺎ‬
‫ﺗﺮاﻩ ﻣﻨﺎﺳﺒﺎً ‪.‬‬

‫اﻟﺴﺆال اﻟﺜﺎﱐ )‪ :(180Sec‬ﻗﻢ ﺑﺮﺑﻂ اﻟﻌﻨﺎﺻﺮ ﻣﻦ اﻟﻌﻤﻮد اﻷول ﻣﻊ ﻣﺎ ﻳﻘﺎﺑﻠﻬﺎ ﻣﻦ اﻟﻌﻤﻮد اﻟﺜﺎﱐ ﲝﻴﺚ ﻳﺘﻢ رﺑﻂ ﻛﻞ ﺗﻌﻠﻴﻤﺔ ﻣﻊ وﻇﻴﻔﺘﻬﺎ‬
‫ﺑﺘﻮزﻳﻊ اﻷرﻗﺎم ﻟﻠﺘﻌﻠﻴﻤﺎت ﻋﻠﻰ اﻟﻌﻤﻮد اﻟﺜﺎﱐ‪.‬‬

‫اﻟﻌﻤﻮد اﻷول )ﺷﻜﻞ اﻟﺘﻌﻠﻴﻤﺔ(‬ ‫‪No.‬‬ ‫اﻟﻌﻤﻮد اﻟﺜﺎﻧﻲ )وﻇﻴﻔﺔ اﻟﺘﻌﻠﻴﻤﺔ(‬

‫‪ .1‬ﲣﺰﻳﻦ ﺑﻴﺎﻧﺎت )رﻗﻤﻴﺔ‪،‬ﳏﺮﻓﻴﺔ( ﰲ ذاﻛﺮة اﻟﱪﻧﺎﻣﺞ ﻋﻨﺪ‬
‫)‪Var = Lookdown(value,Label,Entries‬‬
‫ﻻﻓﺘﺔ ﻣﻌﻴﻨﺔ‪ ،‬ﺣﻴﺚ أن اﻟﻌﻨﺼﺮ اﻷول ﻟﻪ اﻟﺪﻟﻴﻞ ‪.0‬‬
‫‪ .2‬ﺟﻠﺐ ﻗﻴﻤﺔ ﻣﻦ ‪ LUT‬ﳐﺰن ﰲ ‪ Data‬ﻋﻨﺪ اﻟﻼﻓﺘﺔ‬
‫‪Restore Label‬‬
‫‪ label‬وﻟﻪ اﻟﺪﻟﻴﻞ ‪.Index‬‬
‫‪ .3‬ﺟﻠﺐ ﳏﺮف ﻣﻦ ‪ LUT‬ﳐﺰن ﰲ ‪ Data‬ﻋﻨﺪ اﻟﻼﻓﺘﺔ‬
‫‪Read Var‬‬
‫‪ label‬وﻟﻪ اﻟﺪﻟﻴﻞ ‪.Index‬‬
‫‪ .4‬اﻟﺒﺤﺚ ﻋﻦ دﻟﻴﻞ )‪ (Index‬ﻗﻴﻤﺔ )‪ (value‬ﳐﺰن ﰲ‬
‫‪Data var1 , … , varn‬‬ ‫‪ Data‬ﻋﻨﺪ اﻟﻼﻓﺘﺔ ‪ label‬ﻋﻠﻰ أن ﻳﻴﺘﻢ اﻟﺒﺤﺚ‬
‫ﺿﻤﻦ ﻋﺪد ﳏﺪد ﻣﻦ اﻟﻌﻨﺎﺻﺮ )‪.(Entries‬‬
‫‪ .5‬ﺗﻘﻮم ﺑﻮﺿﻊ ﻣﺆﺷﺮ )ﻋﺪاد( ﺑﻴﺎﻧﺎت إﱃ أول ﻋﻨﺼﺮ‬
‫)‪var = Lookup(Index , label‬‬ ‫ﻣﻮﺟﻮد ﰲ ‪ LUT‬ﳐﺰن ﰲ ‪ Data‬ﻋﻨﺪ اﻟﻼﻓﺘﺔ ‪label‬‬
‫ﻣﻦ أﺟﻞ ﻗﺮاءة اﻟﺒﻴﺎﻧﺎت ﺑﺎﺳﺘﺨﺪام‪Read Var :‬‬
‫‪ .6‬ﻗﺮاءة اﻟﻘﻴﻢ اﳌﻮﺟﻮدة ﰲ ‪ LUT‬ﳐﺰن ﰲ ‪ Data‬واﻟﱵ‬
‫)‪Var = Lookupstr(Index , Label‬‬ ‫ﰎ اﻹﺷﺎرة إﻟﻴﻬﺎ ﺑﺎﺳﺘﺨﺪام اﻟﺘﻌﻠﻴﻤﺔ ‪Restore‬‬
‫وإﺳﻨﺎدﻫﻢ إﱃ اﳌﺘﺤﻮل ‪.Var‬‬

‫اﻟﺴﺆال اﻟﺜﺎﻟﺚ )‪ :(240Sec‬أﻛﺘﺐ اﻟﺘﻌﻠﻴﻤﻴﺔ اﻟﱪﳎﻴﺔ اﳌﻮاﻓﻘﺔ ﻟﻠﺸﺮح ﰲ اﳉﺎﻧﺐ اﻷﳝﻦ‪.‬‬

‫اﻟﺘﻌﻠﻴﻤﺔ اﻟﱪﳎﻴﺔ‬ ‫ﺷﺮح اﻟﺘﻌﻠﻴﻤﺔ‬

‫ﺗﻌﺮﻳﻒ ﺳﺎﻋﺔ اﻟﺰﻣﻦ اﳊﻘﻴﻘﻲ )داﺧﻠﻴﺔ | ﺧﺎرﺟﻲ(‪.‬‬
‫ﺗﻌﻴﲔ ﺷﻜﻞ ﻋﺮض اﻟﺘﺎرﻳﺦ واﻟﻔﻮاﺻﻞ ﺑﲔ اﻟﻴﻮم واﻟﺸﻬﺮ واﻟﺴﻨﺔ‬
‫ﺗﻌﻴﲔ ﻗﻴﻤﺔ اﻓﱰاﺿﻴﺔ ﻟﻠﺘﻮﻗﻴﺖ ﻳﺒﺪأ ﻣﻨﻬﺎ اﻟﺘﻮﻗﻴﺖ‪.‬‬
‫ﺗﻌﻴﲔ ﻗﻴﻤﺔ اﻓﱰاﺿﻴﺔ ﻟﻠﺘﺎرﻳﺦ ﻳﺒﺪأ ﻣﻨﻬﺎ اﻟﺘﺎرﻳﺦ‪.‬‬
‫ﻗﺮاءة اﻟﻘﻴﻤﺔ اﳊﺎﻟﻴﺔ ﻟﻠﻮﻗﺖ‬
‫ﻗﺮاءة اﻟﻘﻴﻤﺔ اﳊﺎﻟﻴﺔ ﻟﻠﺘﺎرﻳﺦ‬

‫اﻟﺴﺆال اﻟﺮاﺑﻊ )‪ :(600Sec‬ﻗﻢ ﺑﺘﺼﻤﻴﻢ ﺷﺒﻜﺔ ﻻدر ﺑﺪﻗﺔ ‪ 10-bit‬واﺣﺴﺐ ﳎﺎل اﻟﻘﻴﻢ اﻟﺮﻗﻤﻴﺔ وأوﺟﺪ ﺟﻬﺪ اﳋﻄﻮة وﺟﻬﺪ ﺧﺮج اﻟﺸﺒﻜﺔ‪.‬‬
‫وﻣﺎ ﻫﻲ اﻟﻐﺎﻳﺔ ﻣﻦ دارة اﻟﻌﺰل وﻣﺎ ﻫﻲ اﳌﺸﺎﻛﻞ اﻟﱵ ﺳﺘﻈﻬﺮ ﻧﺘﻴﺠﺔ اﺳﺘﺨﺪام اﻟﻌﺎزل؟‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪390‬‬
‫‪A3‬‬ ‫اﳌﻠﺤﻖ اﻟﺜﺎﻟﺚ| ‪Appendix 3‬‬

‫اﻟﺴﺆال اﳋﺎﻣﺲ )‪ :(480Sec‬ﻗﻢ ﺑﺘﻮﺻﻴﻒ ﻋﻤﻞ اﻟﱪﻧﺎﻣﺞ اﻟﺘﺎﱄ ﻣﻊ ﲢﺪﻳﺪ ﳕﻂ ﻋﻤﻞ اﳌﻘﺎرن ورﺳﻢ ﳐﻄﻂ ﺧﻮارزﻣﻲ‪.‬‬
‫"‪$regfile = "m128def.dat‬‬
‫‪$crystal = 8000000‬‬
‫‪'-----------------------‬‬
‫‪Config Aci = On , Compare = Off , Trigger = Rising‬‬
‫‪On Aci Isr_aci‬‬
‫‪Enable Aci‬‬
‫‪Start Ac‬‬
‫‪Enable Interrupts‬‬
‫‪'-----------------------‬‬
‫‪Dim I As Byte‬‬
‫‪'-----------------------‬‬
‫‪Do‬‬
‫‪nop‬‬
‫‪Loop‬‬
‫‪End‬‬
‫‪'-----------------------‬‬
‫‪Isr_aci:‬‬
‫‪I = I + 1‬‬
‫‪Print "change: " ; I‬‬
‫‪Waitms 100‬‬
‫‪Return‬‬

‫ﻧﻤﻮذج أﺳﺌﻠﺔ اﻻﺧﺘﺒﺎر اﻟﺘﻤﻬﻴﺪي اﻟﺜﺎﻧﻲ )‪.(Pre-Test-2‬‬

‫اﻟﺴﺆال اﻷول )‪ :180Sec‬ﻣﺎ ﻫﻲ دﻗﺔ اﳌﺒﺪﻻت اﻟﺘﺸﺎﻬﺑﻴﺔ اﻟﺮﻗﻤﻴﺔ ﻟﻠﻌﺎﺋﻠﺔ ‪ AVR‬ﻛﻢ ﻋﺪد اﳌﺒﺪﻻت اﻟﺘﺸﺎﻬﺑﻴﺔ اﻟﺮﻗﻤﻴﺔ ﰲ اﳌﺘﺤﻜﻢ‬
‫‪ ATmega128‬ﻣﺎ ﻫﻲ أﳕﺎط ﻋﻤﻞ اﳌﺒﺪﻻت اﻟﺘﺸﺎﻬﺑﻴﺔ اﻟﺮﻗﻤﻴﺔ ﻟﻠﻌﺎﺋﻠﺔ ‪AVR‬؟‬

‫اﻟﺴﺆال اﻟﺜﺎﱐ )‪ :(240Sec‬ﻣﺎﻫﻲ وﻇﻴﻔﺔ اﳌﻘﺴﻢ اﻟﱰددي ﻟﻠﻤﺒﺪل )‪(Prescaler‬؟ ﻣﺎ ﻫﻲ وﻇﻴﻔﺔ اﳉﻬﺪ اﳌﺮﺟﻌﻲ وﻣﺎ ﻫﻲ أﻧﻮاﻋﻪ اﳌﺘﻮﻓﺮة ﰲ‬
‫ﻣﺘﺤﻜﻤﺎت اﻟﻌﺎﺋﻠﺔ ‪AVR‬؟‬

‫اﻟﺴﺆال اﻟﺜﺎﻟﺚ )‪ :300Sec‬اﺷﺮح ﻃﺮﻳﻘﺔ ﺗﻔﻌﻴﻞ ﳕﻂ ﲣﻔﻴﺾ ﺿﺠﻴﺞ اﳌﺒﺪل؟ ﻛﻴﻒ ﻳﺘﻢ ﻋﺰل ﺟﻬﺪ اﻟﺘﻐﺬﻳﺔ اﻟﺘﺸﺎﻬﺑﻲ ﻋﻦ ﺟﻬﺪ اﻟﺘﻐﺬﻳﺔ‬
‫اﻟﺮﻗﻤﻲ وﳌﺎذا؟‬

‫اﻟﺴﺆال اﻟﺮاﺑﻊ )‪ :(180Sec‬أﻛﺘﺐ ﻋﻼﻗﺔ ﺣﺴﺎب ﻗﻴﻤﺔ ﻣﺴﺠﻞ اﳌﺒﺪل؟ أﻛﺘﺐ ﻋﻼﻗﺔ اﳉﻬﺪ ﻋﻠﻰ دﺧﻞ اﳌﺒﺪل؟‬

‫اﻟﺴﺆال اﳋﺎﻣﺲ )‪ :180Sec‬ﺑﻔﺮض أن ﺟﻬﺪ ﺧﺮج ﺣﺴﺎس ﺗﺸﺎﻬﺑﻲ ﻣﻮﺻﻞ إﱃ ﻗﻄﺐ ﻣﺒﺪل ‪ ADC‬ﻟﻠﻤﺘﺤﻜﻢ ‪ ATmega128‬ﻳﱰاوح‬
‫ﻣﻦ ‪ ،0~1V‬ﻣﺎ ﻫﻮ اﻗﱰاﺣﻚ ﻟﺪارة ﺟﻬﺪ ﻣﺮﺟﻌﻲ ﺧﺎرﺟﻲ؟‬

‫ﳕﻮذج أﺳﺌﻠﺔ اﻻﺧﺘﺒﺎر اﻟﻼﺣﻖ اﻟﺜﺎﱐ )‪.(Post-Lab-2‬‬

‫اﻟﺴﺆال اﻷول )‪ :(300Sec‬ﻳﺮاد ﺗﻮﺻﻴﻞ ﲦﺎﻧﻴﺔ ﻣﻔﺎﺗﻴﺢ ﻣﻊ ﻣﺘﺤﻜﻢ ﻣﺼﻐﺮ ﻳﺘﻮﻓﺮ ﻓﻴﻪ ﻗﻄﺐ واﺣﺪ ﻓﻘﻂ‪ ،‬ﺑﺎﻟﺼﺪﻓﺔ وﺟﺪ أن اﻟﻮﻇﻴﻔﺔ اﻟﺜﺎوﻳﺔ‬
‫ﳍﺬا اﻟﻘﻄﺐ ﻫﻲ ‪ ،ADC7‬ﻣﺎ ﻫﻮ اﻗﱰاﺣﻚ ﳊﻞ ﻫﺬﻩ اﳌﺸﻜﻠﺔ وﺿﺢ ﺑﺎﻟﺮﺳﻢ؟‬

‫‪391‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫اﺳﻢ اﳌﻠﺤﻖ | ‪Appendix Name‬‬

‫اﻟﺴﺆال اﻟﺜﺎﱐ )‪ :(300Sec‬اﺷﺮح اﻟﺘﻌﻠﻴﻤﺎت اﻟﱪﳎﻴﺔ ﰲ اﳉﺎﻧﺐ اﻷﻳﺴﺮ‪.‬‬

‫اﻟﺘﻌﻠﻴﻤﺔ اﻟﱪﳎﻴﺔ‬ ‫ﺷﺮح اﻟﺘﻌﻠﻴﻤﺔ‬

‫‪Config Adc= Single/Free,‬‬
‫‪Prescaler = Auto,‬‬
‫‪Reference = off|Avcc|internal‬‬
‫‪Start Adc‬‬

‫‪Stop Adc‬‬

‫)‪var = Getadc(channel‬‬

‫اﻟﺴﺆال اﻟﺜﺎﻟﺚ )‪ :300Sec‬ﻣﺎ ﻫﻲ اﻻﻋﺘﺒﺎرات اﻟﻌﻤﻠﻴﺔ ﻟﺘﺨﻔﻴﺾ ﺿﺠﻴﺞ اﳌﺒﺪﻻت اﻟﺘﺸﺎﻬﺑﻴﺔ اﻟﺮﻗﻤﻴﺔ واﺳﺘﻘﺮار ﻋﻤﻠﻬﺎ ﰲ ﻣﺘﺤﻜﻤﺎت‬
‫‪AVR‬؟‬

‫اﻟﺴﺆال اﻟﺮاﺑﻊ )‪ :900Sec‬ﺑﻔﺮض أﻧﻪ ﻃﻠﺐ ﻣﻨﻚ ﺗﺼﻤﻴﻢ ﻣﻨﻈﻮﻣﺔ ﻗﻴﺎس رﻗﻤﻴﺔ ﺗﻌﺘﻤﺪ ﻋﻠﻰ ﳎﻤﻮﻋﺔ ﺣﺴﺎﺳﺎت ﺗﺸﺎﻬﺑﻴﺔ ﻟﻴﺘﻢ اﺳﺘﺨﺪاﻣﻬﺎ ﰲ‬
‫ﳏﻄﺔ أرﺻﺎد ﺟﻮﻳﺔ‪ ،‬اﻗﱰح ﻣﺎ ﺗﺸﺎء ﻣﻦ اﳊﺴﺎﺳﺎت وﻗﻢ ﺑﺮﺳﻢ اﳌﺨﻄﻂ اﻟﺼﻨﺪوﻗﻲ ﻟﻠﻨﻈﺎم وﺣﺪد ﻋﺪد أﻗﻄﺎب اﳌﺒﺪﻻت وﳕﻂ ﻋﻤﻠﻬﺎ وارﺳﻢ‬
‫اﳌﺨﻄﻂ اﳋﻮارزﻣﻲ‪.‬‬

‫اﻟﺴﺆال اﳋﺎﻣﺲ )‪ :(300Sec‬ﻣﺎ ﻫﻲ وﻇﻴﻔﺔ اﻟﺪارة اﻟﺘﺎﻟﻴﺔ وﻣﺎ ﻫﻮ اﻗﱰاﺣﻚ ﳊﻞ ﺗﻘﲏ أﻓﻀﻞ )دﻗﺔ أﻋﻠﻰ(؟‬

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‫‪A4‬‬ ‫اﳌﻠﺤﻖ اﻟﺮاﺑﻊ| ‪Appendix 4‬‬

‫اﻟﻤﻠﺤﻖ اﻟﺮاﺑﻊ )‪(Appendix 4‬‬

‫‪@Ú‘‹ÃæaÎ@ÚyÏn–æa@Ú‘‹®a@xàχ‰€@äbjnǸa@xàbπ‬‬

‫‪OPEN-LOOP & CLOSED-LOOP TESTS‬‬

‫ﻧﻤﻮذج أﺳﺌﻠﺔ اﻻﺧﺘﺒﺎر اﻷول )‪ 15 – (Test-1‬دﻗﻴﻘﺔ‪.‬‬

‫اﻟﺴﺆال اﻷول‪ :‬ﺣﺪد ﻣﺪﻟﻮل رﻣﻮز ﺗﻌﺮﻳﻒ اﳌﻌﺎﰿ اﻟﺘﺎﱄ‪:‬‬

‫اﻟﺴﺆال اﻟﺜﺎﱐ‪ :‬ﻗﻢ ﺑﺮﺑﻂ اﻟﻌﻨﺎﺻﺮ ﻣﻦ اﻟﻌﻤﻮد اﻷول ﻣﻊ ﻣﺎ ﻳﻘﺎﺑﻠﻬﺎ ﻣﻦ اﻟﻌﻤﻮد اﻟﺜﺎﱐ ﲝﻴﺚ ﻳﺘﻢ اﻟﺮﺑﻂ ﺑﲔ ﻛﻞ ﻋﺎﺋﻠﺔ ﻣﻦ ﻋﺎﺋﻠﺔ اﳌﻌﺎﳉﺎت‬
‫وﺳﺮﻋﺘﻬﺎ اﻷﻋﻈﻤﻴﺔ‪.‬‬
‫اﻟﻌﻤﻮد اﻷول‬ ‫اﻟﻌﻤﻮد اﻟﺜﺎﱐ‬
‫‪PIC‬‬ ‫‪16MHZ/1Cycle = 16MIPS‬‬
‫‪8051‬‬ ‫‪20MHZ/4Cycle = 5MIPS‬‬
‫‪AVR‬‬ ‫‪24MHZ/12Cycle = 2MIPS‬‬

‫اﻟﺴﺆال اﻟﺜﺎﻟﺚ‪ :‬ﻗﻢ ﺑﺮﺑﻂ اﻟﻌﻨﺎﺻﺮ ﻣﻦ اﻟﻌﻤﻮد اﻷول ﻣﻊ ﻣﺎ ﻳﻘﺎﺑﻠﻬﺎ ﻣﻦ اﻟﻌﻤﻮد اﻟﺜﺎﱐ واﻟﺜﺎﻟﺚ ﲝﻴﺚ ﻳﺘﻢ رﺑﻂ اﻟﺒﻨﻴﺔ اﻟﺘﺼﻤﻴﻤﻴﺔ ﻟﻠﻤﻌﺎﳉﺎت‬
‫ﻋﺪد ﺗﻌﻠﻴﻤﺎﻬﺗﺎ وﻓﻘﺎً ﻟﺘﻘﻨﻴﺔ اﻟﺘﺼﻤﻴﻢ اﻟﱵ ﻳﻌﺘﻤﺪﻫﺎ ﻛﻞ ﻣﻌﺎﰿ‪.‬‬

‫اﻟﻌﻤﻮد اﻷول‬ ‫اﻟﻌﻤﻮد اﻟﺜﺎﱐ‬ ‫اﻟﻌﻤﻮد اﻟﺜﺎﻟﺚ‬

‫‪CISC‬‬ ‫‪30 ~ 130 Instruction‬‬ ‫‪PIC‬‬
‫‪RISC‬‬ ‫‪15 ~ 30 Instruction‬‬ ‫‪8051‬‬
‫‪MISC‬‬ ‫‪150 ~ 1500 Instruction‬‬ ‫‪AVR‬‬

‫اﻟﺴﺆال اﻟﺮاﺑﻊ‪ :‬ﻗﻢ ﺑﺮﺑﻂ اﻟﻌﻨﺎﺻﺮ ﻣﻦ اﻟﻌﻤﻮد اﻷول ﻣﻊ ﻣﺎ ﻳﻘﺎﺑﻠﻬﺎ ﻣﻦ اﻟﻌﻤﻮد اﻟﺜﺎﱐ واﻟﺜﺎﻟﺚ ﲝﻴﺚ ﻳﺘﻢ رﺑﻂ ﻛﻞ ﺗﻌﻠﻴﻤﺔ ﻣﻊ وﻇﻴﻔﺘﻬﺎ ﺑﺘﻮزﻳﻊ‬
‫اﻷرﻗﺎم ﻟﻠﺘﻌﻠﻴﻤﺎت ﻋﻠﻰ اﻟﻌﻤﻮد اﻟﺜﺎﱐ‪.‬‬

‫‪393‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫اﺳﻢ اﳌﻠﺤﻖ | ‪Appendix Name‬‬

‫اﻟﻌﻤﻮد اﻷول )ﺷﻜﻞ اﻟﺘﻌﻠﻴﻤﺔ(‬ ‫‪No.‬‬ ‫اﻟﻌﻤﻮد اﻟﺜﺎﻧﻲ )وﻇﻴﻔﺔ اﻟﺘﻌﻠﻴﻤﺔ(‬

‫‪$baud = 9600‬‬ ‫‪ .1‬ﲢﺪﻳﺪ ﻣﻌﺪل ﺑﻮد اﻟﻨﻘﻞ ﻟﻨﺎﻓﺬة اﻻﺗﺼﺎل اﻟﺘﺴﻠﺴﻠﻲ‬
‫‪Waitms value‬‬ ‫‪ .2‬ﲢﺪﻳﺪ اﺳﻢ اﳌﻌﺎﰿ اﳌﺴﺘﺨﺪم )‪(ATmega128‬‬
‫‪Toggle bit‬‬ ‫‪ .3‬ﲢﺪﻳﺪ ﺗﺮدد اﳍﺰاز اﻟﻜﺮﻳﺴﺘﺎﱄ اﻟﺬي ﻳﻌﻤﻞ ﻋﻠﻴﻪ اﳌﻌﺎﰿ‬
‫‪Config Portc = Output‬‬ ‫‪ .4‬ﺗﺄﺧﲑ زﻣﲏ )ﻗﻴﻤﺔ اﻟﺘﺄﺧﲑ ‪ Value‬ﺗﻌﻄﻰ ﺑﺎﻟﺜﺎﻧﻴﺔ(‬
‫‪Set bit‬‬ ‫‪ .5‬ﺗﺄﺧﲑ زﻣﲏ )ﻗﻴﻤﺔ اﻟﺘﺄﺧﲑ ‪ Value‬ﺗﻌﻄﻰ ﺑﺎﳌﻴﻠﻲ ﺛﺎﻧﻴﺔ(‬
‫"‪$regfile = "m128def.dat‬‬ ‫‪ .6‬ﺗﺄﺧﲑ زﻣﲏ )ﻗﻴﻤﺔ اﻟﺘﺄﺧﲑ ‪ Value‬ﺗﻌﻄﻰ ﺑﺎﳌﻴﻜﺮو ﺛﺎﻧﻴﺔ(‬
‫‪Wait value‬‬ ‫‪ .7‬ﺟﻌﻞ ﻗﻴﻤﺔ )اﻟﺒﺖ‪/‬ﺑﺖ ﻣﻦ ﻣﺘﺤﻮل اﳌﺘﺤﻮل( واﺣﺪ ﻣﻨﻄﻘﻲ‬
‫‪Config Portc = Input‬‬ ‫‪ .8‬ﺟﻌﻞ ﻗﻴﻤﺔ )اﻟﺒﺖ‪/‬ﺑﺖ ﻣﻦ ﻣﺘﺤﻮل اﳌﺘﺤﻮل( ﺻﻔﺮ ﻣﻨﻄﻘﻲ‬
‫‪Waitus value‬‬ ‫‪ .9‬ﺗﻐﻴﲑ ﻗﻴﻤﺔ )اﻟﺒﺖ ﻣﻦ ﻣﺘﺤﻮل اﳌﺘﺤﻮل( إﱃ اﳊﺎﻟﺔ اﳌﻌﺎﻛﺴﺔ‬
‫‪Reset bit‬‬ ‫‪ .10‬ﺗﻌﺮﻳﻒ اﻟﺒﻮاﺑﺔ ‪ C‬ﻛﺒﻮاﺑﺔ ﺧﺮج‬
‫‪$crystal = 1000000‬‬ ‫‪ .11‬ﺗﻌﺮﻳﻒ اﻟﻘﻄﺐ رﻗﻢ ‪ 5‬ﻣﻦ اﻟﺒﻮاﺑﺔ ‪ C‬ﻛﻘﻄﺐ ﺧﺮج‬
‫‪Config Portc.5 = Output‬‬ ‫‪ .12‬ﺗﻌﺮﻳﻒ اﻟﺒﻮاﺑﺔ ‪ C‬ﻛﺒﻮاﺑﺔ دﺧﻞ‬
‫‪Portc = 255‬‬ ‫‪ .13‬ﺗﻌﺮﻳﻒ اﻟﻘﻄﺐ رﻗﻢ ‪ 5‬ﻣﻦ اﻟﺒﻮاﺑﺔ ‪ C‬ﻛﻘﻄﺐ دﺧﻞ‬
‫‪Portc.5 = 1‬‬ ‫‪ .14‬ﺗﻔﻌﻴﻞ ﻣﻘﺎوﻣﺎت اﻟﺮﻓﻊ اﻟﺪاﺧﻠﻴﺔ ﻟﻠﺒﻮاﺑﺔ ‪C‬‬

‫‪Config Pinc.5 = Input‬‬ ‫‪ .15‬ﺗﻔﻌﻴﻞ ﻣﻘﺎوﻣﺔ اﻟﺮﻓﻊ اﻟﺪاﺧﻠﻴﺔ ﻟﻠﻘﻄﺐ رﻗﻢ ‪ 5‬ﻣﻦ اﻟﺒﻮاﺑﺔ ‪C‬‬

‫‪Leds Alias Portd‬‬ ‫‪ 5‬ﻣﻦ اﻟﺒﻮاﺑﺔ ‪C‬‬ ‫‪ .16‬إﻟﻐﺎء ﺗﻔﻌﻴﻞ ﻣﻘﺎوﻣﺔ اﻟﺮﻓﻊ اﻟﺪاﺧﻠﻴﺔ ﻟﻠﻘﻄﺐ رﻗﻢ‬
‫‪Leds Alias Portd.5‬‬ ‫‪ .17‬ﺗﻔﻌﻴﻞ ﺑﻌﺾ ﻣﻘﺎوﻣﺎت اﻟﺮﻓﻊ اﻟﺪاﺧﻠﻴﺔ ﻟﻠﺒﻮاﺑﺔ ‪C‬‬

‫‪Portc = &B11110000‬‬ ‫‪ .18‬ﺗﻌﺮﻳﻒ اﻷﻗﻄﺎب ﻣﻦ اﻟﺒﻮاﺑﺔ ﻛﺪﺧﻞ‪/‬ﺧﺮج‬

‫‪Config Portc = &B11110000‬‬ ‫‪ .19‬اﻟﺒﻮاﺑﺔ )‪ (D‬ﺳﻮف ﻳﺸﺎر إﻟﻴﻬﺎ أﺛﻨﺎء اﻟﱪﻧﺎﻣﺞ ﺑﺎﻻﺳﻢ )‪(Leds‬‬
‫‪Portc.5 = 0‬‬ ‫‪ .20‬ﺗﺼﺮﻳﺢ اﻟﻘﻄﺐ)‪ (5‬ﺳﻮف ﻳﺸﺎر إﻟﻴﻪ ﺑﺎﻻﺳﻢ )‪(Led‬‬
‫‪Debounce Px.y , state , label, Sub‬‬
‫‪ .21‬ﺗﻴﺌﺔ زﻣﻦ ﺗﺄﺧﲑ ﻟﻠﺘﺨﻠﺺ ﻣﻦ اﻟﻌﻄﺎﻟﺔ اﳌﻴﻜﺎﻧﻴﻜﻴﺔ‪.‬‬
‫‪Ex. Debounce Key1 , 0 , Sw1 , Sub‬‬
‫‪ .22‬ﺳﻮف ﻳﻘﻒ اﻟﱪﻧﺎﻣﺞ ﻋﻨﺪ ﻫﺬﻩ اﻟﺘﻌﻠﻴﻤﺔ وﻳﻨﺘﻈﺮ أن ﺗﺼﺒﺢ ﺣﺎﻟﺔ‬
‫‪Config Debounce = time‬‬
‫اﻟﺒﺖ )اﻟﻘﻄﺐ( ﺻﻔﺮ أو واﺣﺪ ﻣﻨﻄﻘﻲ ﻋﻨﺪﻫﺎ ﻳﻜﻤﻞ اﻟﱪﻧﺎﻣﺞ‪.‬‬
‫‪Bitwait x , Set/reset‬‬ ‫‪ .23‬ﺗﺼﺒﺢ ﺣﺎﻟﺘﻪ ﻣﻮاﻓﻘﺔ ﻟﻠﺤﺎﻟﺔ اﶈﺪدة ﰲ ‪ ،state‬ﺳﻮف ﻳﻘﻔﺰ إﱃ‬
‫‪Ex. Bitwait Pinb.7 , reset‬‬ ‫اﻟﱪﻧﺎﻣﺞ اﻟﻔﺮﻋﻲ ﻋﻨﺪ اﻟﻼﻓﺘﺔ ‪ label‬وﻳﻨﻔﺬ اﻟﱪﻧﺎﻣﺞ وﻳﻌﻮد‪.‬‬

‫اﻟﺴﺆال اﳋﺎﻣﺲ‪ :‬ﻗﻢ ﺑﱰﻗﻴﻢ اﳌﺮاﺣﻞ ﰲ اﳉﺪول ﲝﻴﺚ ﲢﻘﻖ اﻟﱰﺗﻴﺐ اﻷﻣﺜﻠﻲ ﳍﻴﻜﻠﻴﺔ ﻛﺘﺎﺑﺔ ﻛﻮد ﺑﺮﳎﻲ ﻗﺎﺑﻞ ﻟﻠﺘﻄﻮﻳﺮ واﻟﺘﻨﻘﻴﺢ‪.‬‬
‫رﻗﻢ اﳌﺮﺣﻠﺔ‬
‫اﳌﺘﺤﻮﻻت )‪(Variables‬‬
‫ﻛﺘﻠﺔ اﻟﱪاﻣﺞ اﻟﻔﺮﻋﻴﺔ )‪(Sub-Routines‬‬
‫ﻛﺘﻠﺔ اﻟﱪﻧﺎﻣﺞ اﻟﺮﺋﻴﺴﻲ )‪(Main Program‬‬
‫اﻟﺘﻮﺟﻴﻬﺎت )‪(Directives‬‬
‫اﻟﺘﻬﻴﺌﺔ )‪(Configurations‬‬
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‫‪A4‬‬ ‫اﳌﻠﺤﻖ اﻟﺮاﺑﻊ| ‪Appendix 4‬‬

‫اﻟﺴﺆال اﻟﺴﺎدس‪ :‬ﻗﻢ ﺑﺮﺑﻂ اﻟﻌﻨﺎﺻﺮ ﻣﻦ اﻟﻌﻤﻮد اﻷول ﻣﻊ ﻣﺎ ﻳﻘﺎﺑﻠﻬﺎ ﻣﻦ اﻟﻌﻤﻮد اﻟﺜﺎﱐ ﲝﻴﺚ ﻳﺘﻢ اﻟﺮﺑﻂ ﺑﲔ ﻣﻌﻴﺎرﻳﺔ اﻟﺘﺼﻤﻴﻢ وﳐﻄﻄﻬﺎ‬
‫اﻟﺼﻨﺪوﻗﻲ‪.‬‬

‫اﻟﻌﻤﻮد اﻷول‬ ‫اﻟﻌﻤﻮد اﻟﺜﺎﱐ‬

‫ﻣﻌﻴﺎرﻳﺔ‬
‫‪Von-Neumann‬‬

‫ﻣﻌﻴﺎرﻳﺔ‬
‫‪Harvard‬‬

‫ﻧﻤﻮذج أﺳﺌﻠﺔ اﻻﺧﺘﺒﺎر اﻟﺜﺎﻧﻲ )‪ 15 – (Test-2‬دﻗﻴﻘﺔ‪.‬‬

‫اﻟﺴﺆال اﻷول‪ :‬ﻣﺎ ﻫﻲ ﻗﻴﻢ اﳌﺘﺤﻮل "‪ "Var‬اﻟﱵ ﺳﺘﻌﻴﺪﻫﺎ اﻟﺘﻌﻠﻴﻤﺔ ")(‪ "Getkbd‬ﻣﻦ أﺟﻞ ﻛﻞ ﻣﻔﺘﺎح؟‬

‫= ‪VAR_S1‬‬ ‫= ‪VAR_S9‬‬
‫= ‪VAR_S2‬‬ ‫= *‪VAR_S‬‬
‫= ‪VAR_S3‬‬ ‫= ‪VAR_S0‬‬
‫= ‪VAR_S4‬‬ ‫= ‪VAR_S#‬‬
‫= ‪VAR_S5‬‬ ‫= ‪VAR_A‬‬
‫= ‪VAR_S6‬‬ ‫= ‪VAR_B‬‬
‫= ‪VAR_S7‬‬ ‫= ‪VAR_C‬‬
‫= ‪VAR_S8‬‬ ‫= ‪VAR_D‬‬

‫اﻟﺴﺆال اﻟﺜﺎﱐ‪:‬‬
‫‪ .1‬ﻣﺎ ﻫﻲ اﻟﻐﺎﻳﺔ ﻣﻦ اﺳﺘﺨﺪام ﻣﻘﺎوﻣﺎت اﻟﺴﺤﺐ اﳋﺎرﺟﻴﺔ )‪Pull-‬‬

‫‪ (Down‬وﻣﱴ ﳓﺘﺎﺟﻬﺎ؟‬
‫‪ .2‬أﻻ ﳝﻜﻦ اﻻﺳﺘﻌﺎﺿﺔ ﻋﻨﻬﺎ ﲟﻘﺎوﻣﺔ اﻟﺴﺤﺐ اﻟﺪاﺧﻠﻴﺔ ﰲ ﺑﻨﻴﺔ‬
‫ﺑﻮاﺑﺔ اﳌﻌﺎﰿ؟‬
‫‪ .3‬ﻣﱴ ﻧﺴﺘﺨﺪم ﻣﻘﺎوﻣﺔ ﺳﺤﺐ )‪(Pull-Down Resistor‬‬
‫وﻣﱴ ﻧﺴﺘﺨﺪم ﻣﻘﺎوﻣﺔ رﻓﻊ )‪(Pull-Up Resistor‬؟‬

‫‪395‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫اﺳﻢ اﳌﻠﺤﻖ | ‪Appendix Name‬‬

‫اﻟﺴﺆال اﻟﺜﺎﻟﺚ‪ :‬ﻗﻢ ﺑﺮﺑﻂ اﻟﻌﻨﺎﺻﺮ ﻣﻦ اﻟﻌﻤﻮد اﻷول ﻣﻊ ﻣﺎ ﻳﻘﺎﺑﻠﻬﺎ ﻣﻦ اﻟﻌﻤﻮد اﻟﺜﺎﱐ واﻟﺜﺎﻟﺚ ﲝﻴﺚ ﻳﺘﻢ رﺑﻂ ﻛﻞ ﺗﻌﻠﻴﻤﺔ ﻣﻊ وﻇﻴﻔﺘﻬﺎ ﺑﺘﻮزﻳﻊ‬
‫اﻷرﻗﺎم ﻟﻠﺘﻌﻠﻴﻤﺎت ﻋﻠﻰ اﻟﻌﻤﻮد اﻟﺜﺎﱐ‪.‬‬

‫اﻟﻌﻤﻮد اﻷول )ﺷﻜﻞ اﻟﺘﻌﻠﻴﻤﺔ(‬ ‫‪No.‬‬ ‫اﻟﻌﻤﻮد اﻟﺜﺎﱐ )وﻇﻴﻔﺔ اﻟﺘﻌﻠﻴﻤﺔ(‬

‫‪Cls‬‬ ‫‪ .1‬ﺗﻌﺮﻳﻒ أﻗﻄﺎب ﺷﺎﺷﺔ اﻹﻇﻬﺎر اﳌﻮﺻﻠﺔ ﻣﻊ اﳌﻌﺎﰿ‬
‫)(‪Var = Getkbd‬‬ ‫‪ .2‬ﻣﺴﺢ ﺷﺎﺷﺔ اﻹﻇﻬﺎر‬
‫‪Lcd var‬‬ ‫‪ .3‬إﻃﻔﺎء ﺷﺎﺷﺔ اﻹﻇﻬﺎر‬
‫)‪Lcd Chr(x‬‬ ‫‪ .4‬ﺗﻌﺮﻳﻒ أﺑﻌﺎد ﺷﺎﺷﺔ اﻹﻇﻬﺎر )أﻋﻤﺪة * أﺳﻄﺮ(‬
‫‪Config Lcdpin=Pin, Db4=Portc.4,‬‬
‫‪ .5‬ﺗﻌﺮﻳﻒ اﻟﺒﻮاﺑﺔ اﳌﻮﺻﻮل ﻣﻌﻬﺎ ﻟﻮﺣﺔ اﳌﻔﺎﺗﻴﺢ وﺗﻌﺮﻳﻒ زﻣﻦ‬
‫‪Db5=Portc.5, Db6 = Portc.6,‬‬
‫‪Db7=Portc.7, E=Portc.2, Rs=Portc.3‬‬
‫اﻟﺘﺄﺧﲑ ﻟﺘﻔﺎدي أﺛﺮ اﻟﻌﻄﺎﻟﺔ اﳌﻴﻜﺎﻧﻴﻜﻴﺔ ﻟﻠﻤﻔﺎﺗﻴﺢ‪.‬‬
‫‪Config Lcd = 20 * 4‬‬ ‫‪LCD Designer‬‬ ‫‪ .6‬ﺗﻌﺮﻳﻒ ﳏﺮف إﺿﺎﰲ ﺑﺎﺳﺘﺨﺪام اﻷداة‬
‫‪Deflcdchar 0 , 14 , 17 , 14 , 17 , 17 ,‬‬
‫‪ .7‬ﻃﺒﺎﻋﺔ ﻗﻴﻤﺔ‪/‬ﳏﺮف ﻋﻠﻰ ﺷﺎﺷﺔ اﻹﻇﻬﺎر‬
‫‪14 , 17 , 14‬‬
‫‪Shiftcursor Left‬‬ ‫‪ .8‬ﲢﺮﻳﻚ ﻣﺆﺷﺮ اﻟﻜﺘﺎﺑﺔ إﱃ اﻟﺴﻄﺮ اﻟﺘﺎﱄ‬
‫‪Config Kbd = Portb , Delay = 150‬‬ ‫‪ .9‬إزاﺣﺔ ﲨﻴﻊ اﳌﻌﻠﻮﻣﺎت ﻋﻠﻰ اﻟﺸﺎﺷﺔ ﻋﻤﻮداً إﱃ اﻟﻴﻤﲔ‬
‫‪Home Upper‬‬ ‫‪ .10‬إزاﺣﺔ ﲨﻴﻊ اﳌﻌﻠﻮﻣﺎت ﻋﻠﻰ اﻟﺸﺎﺷﺔ ﻋﻤﻮداً إﱃ اﻟﻴﺴﺎر‬
‫‪Cursor Off Noblink‬‬ ‫‪ .11‬ﺗﻮﺿﻊ ﻣﺆﺷﺮ اﻟﻜﺘﺎﺑﺔ ﰲ ﻣﻮﻗﻊ )ﺳﻄﺮ‪/‬ﻋﻤﻮد(‬
‫‪Cursor On Blink‬‬ ‫‪ .12‬إزاﺣﺔ ﻣﺆﺷﺮ اﻟﻜﺘﺎﺑﺔ ﻋﻤﻮداً واﺣﺪاً إﱃ اﻟﻴﻤﲔ‬
‫‪Display Off‬‬ ‫‪ .13‬ﻗﺮاءة ﺣﺎﻟﺔ اﳌﻔﺎﺗﻴﺢ‬
‫‪Display On‬‬ ‫‪ .14‬ﻃﺒﺎﻋﺔ اﶈﺮف اﻹﺿﺎﰲ‬
‫‪Thirdline‬‬ ‫‪ .15‬ﺗﺸﻐﻴﻞ ﺷﺎﺷﺔ اﻹﻇﻬﺎر‬
‫‪Shiftlcd Right‬‬ ‫‪ .16‬ﺗﺸﻐﻴﻞ ﻣﺆﺷﺮ اﻟﻜﺘﺎﺑﺔ ﻣﻊ ﺧﻔﻘﺎن‬
‫‪Shiftlcd Left‬‬ ‫‪ .17‬إﻟﻐﺎء ﻣﺆﺷﺮ اﻟﻜﺘﺎﺑﺔ‪.‬‬
‫‪Locate X , Y‬‬ ‫‪ .18‬اﻻﻧﺘﻘﺎل إﱃ اﻟﺴﻄﺮ‪/‬اﻟﻌﻤﻮد اﻷول )ﻧﻘﻄﺔ اﻟﺒﺪاﻳﺔ(‬
‫‪ .19‬ﻳﺮاﻗﺐ ﺣﺎﻟﺔ اﻟﻘﻄﺐ اﶈﺪد ﰲ ‪ Px.y‬ﻛﻠﻤﺎ ﻣﺮ ﻋﻠﻴﻪ وﻋﻨﺪﻣﺎ‬
‫‪Shiftcursor Right‬‬ ‫ﺗﺼﺒﺢ ﺣﺎﻟﺘﻪ ﻣﻮاﻓﻘﺔ ﻟﻠﺤﺎﻟﺔ اﶈﺪدة ﰲ ‪ ،state‬ﺳﻮف ﻳﻘﻔﺰ‬
‫إﱃ اﻟﱪﻧﺎﻣﺞ اﻟﻔﺮﻋﻲ ﻋﻨﺪ اﻟﻼﻓﺘﺔ ‪ label‬وﻳﻨﻔﺬ وﻳﻌﻮد‪.‬‬
‫‪ .20‬ﺗﻴﺌﺔ زﻣﻦ ﺗﺄﺧﲑ )ﻣﻴﻠﻲ ﺛﺎﻧﻴﺔ( ﻋﻦ اﺳﺘﻌﻤﺎل ﺗﻌﻠﻴﻤﺔ‬
‫‪Config Debounce = time‬‬
‫‪ Debounce‬ﻟﻠﺘﺨﻠﺺ ﻣﻦ اﻟﻌﻄﺎﻟﺔ اﳌﻴﻜﺎﻧﻴﻜﻴﺔ‪.‬‬
‫‪Bitwait x , Set/reset‬‬ ‫‪ .21‬ﺳﻮف ﻳﻘﻒ اﻟﱪﻧﺎﻣﺞ ﻋﻨﺪ ﻫﺬﻩ اﻟﺘﻌﻠﻴﻤﺔ وﻳﻨﺘﻈﺮ أن ﺗﺼﺒﺢ‬
‫‪Ex. Bitwait Pinb.7 , reset‬‬ ‫ﺣﺎﻟﺔ اﻟﻘﻄﺐ ﺻﻔﺮ‪/‬واﺣﺪ ﻣﻨﻄﻘﻲ ﻋﻨﺪﻫﺎ ﻳﻜﻤﻞ اﻟﱪﻧﺎﻣﺞ‪.‬‬
‫‪ .22‬ﻳﺮاﻗﺐ ﺣﺎﻟﺔ اﻟﻘﻄﺐ اﶈﺪد ﰲ ‪ Px.y‬ﻛﻠﻤﺎ ﻣﺮ ﻋﻠﻴﻪ وﻋﻨﺪﻣﺎ‬
‫‪Debounce Px.y , state ,label , Sub‬‬
‫ﺗﺼﺒﺢ ﺣﺎﻟﺘﻪ ﻣﻮاﻓﻘﺔ ﻟﻠﺤﺎﻟﺔ اﶈﺪدة ﰲ ‪ ،state‬ﺳﻮف ﻳﻘﻔﺰ‬
‫‪Ex. Debounce Key1 , 0 , Sw1 , Sub‬‬
‫إﱃ اﻟﱪﻧﺎﻣﺞ اﻟﻔﺮﻋﻲ ﻋﻨﺪ اﻟﻼﻓﺘﺔ ‪ label‬وﻳﻨﻔﺬ وﻟﻦ ﻳﻌﻮد‪.‬‬
‫‪Debounce Px.y , state , label‬‬
‫‪ .23‬؟؟‬
‫‪Ex. Debounce Key1 , 0 , Sw1‬‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪396‬‬
‫‪A4‬‬ ‫اﳌﻠﺤﻖ اﻟﺮاﺑﻊ| ‪Appendix 4‬‬

‫اﻟﺴﺆال اﻟﺮاﺑﻊ‪ :‬إذا ﻛﺎن ﻟﺪﻳﻨﺎ ﻣﺘﺤﻜﻢ ﻣﺼﻐﺮ "‪ "ATmega128‬وﺷﺎﺷﺔ إﻇﻬﺎر ﻛﺮﻳﺴﺘﺎﻟﻴﺔ "‪ "LCD 20x4‬وﻟﻮﺣﺔ ﻣﻔﺎﺗﻴﺢ ﺳﺖ ﻋﺸﺮﻳﺔ‬
‫ﻣﻀﺎﻓﺎً إﻟﻴﻬﺎ ﺳﻄﺮﻳﻦ إﺿﺎﻓﻴﲔ‪ ،‬ﻓﻘﻢ ﺑﻮﺻﻞ ﺷﺎﺷﺔ اﻹﻇﻬﺎر وﻟﻮﺣﺔ اﳌﻔﺎﺗﻴﺢ ﻣﻊ اﳌﻌﺎﰿ ﺑﺎﻻﻋﺘﻤﺎد ﻋﻠﻰ ﺗﻌﺮﻳﻔﺎت اﻟﺘﻌﻠﻴﻤﺎت اﳌﺪرﺟﺔ‪.‬‬
‫‪Config Lcdpin = Pin,‬‬
‫‪Db4 = Portf.4, Db5 = Portf.5,‬‬
‫‪Db6 = Portf.6, Db7 = Portf.7, ‬‬
‫‪E = Portf.2,‬‬ ‫‪Rs = Portf.3‬‬

‫‪Config Lcd = 20 * 4‬‬

‫‪Config Kbd = Portb, Rows=6,‬‬

‫‪Row5 = Ping.3, Row6= Ping.4‬‬

‫)(‪Var = Getkbd‬‬

‫ﻧﻤﻮذج أﺳﺌﻠﺔ اﻻﺧﺘﺒﺎر اﻟﺜﺎﻟﺚ )‪ 15 – (Test-3‬دﻗﻴﻘﺔ‪.‬‬

‫اﻟﺴﺆال اﻷول‪ :‬إذا ﻛﺎن ﻟﺪﻳﻨﺎ ﻣﺘﺤﻜﻢ ﻣﺼﻐﺮ "‪ "ATmega128‬وﺷﺎﺷﺔ إﻇﻬﺎر رﺳﻮﻣﻴﺔ "‪ ،"GLCD 128x64‬ﻓﻘﻢ ﺑﻮﺻﻞ ﺷﺎﺷﺔ‬
‫اﻹﻇﻬﺎر ﻣﻊ اﳌﻌﺎﰿ ﺑﺎﻻﻋﺘﻤﺎد ﻋﻠﻰ ﺗﻌﺮﻳﻔﺎت اﻟﺘﻌﻠﻴﻤﺎت اﳌﺪرﺟﺔ‪.‬‬

‫‪Config Graphlcd = 128 * 64sed,‬‬

‫‪Dataport= Porta, Controlport= Portc,‬‬
‫‪Ce = 2 , Ce2 = 4 , RS = 7 , R/W = 6,‬‬
‫‪Reset = 3 , Enable = 5‬‬

‫‪397‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫اﺳﻢ اﳌﻠﺤﻖ | ‪Appendix Name‬‬

‫اﻟﺴﺆال اﻟﺜﺎﱐ‪ :‬ﻣﺎ ﻫﻮ اﻟﻔﺮق ﺑﲔ ﺷﺎﺷﺔ اﻹﻇﻬﺎر اﻟﻜﺮﻳﺴﺘﺎﻟﻴﺔ وﺷﺎﺷﺔ اﻹﻇﻬﺎر اﻟﺮﺳﻮﻣﻴﺔ؟ وﻫﻞ ﳝﻜﻦ اﺳﺘﺨﺪام ﳕﻂ ‪ 4-bit‬ﻟﺮﺑﻂ أﻗﻄﺎب اﻟـ‬
‫‪ Data-bus‬ﻟﺸﺎﺷﺔ اﻹﻇﻬﺎر اﻟﺮﺳﻮﻣﻴﺔ؟‬

‫اﻟﺴﺆال اﻟﺜﺎﻟﺚ‪ :‬ﻗﻢ ﺑﺮﺑﻂ اﻟﻌﻨﺎﺻﺮ ﻣﻦ اﻟﻌﻤﻮد اﻷول ﻣﻊ ﻣﺎ ﻳﻘﺎﺑﻠﻬﺎ ﻣﻦ اﻟﻌﻤﻮد اﻟﺜﺎﱐ ﲝﻴﺚ ﻳﺘﻢ رﺑﻂ ﻛﻞ ﺗﻌﻠﻴﻤﺔ ﻣﻊ وﻇﻴﻔﺘﻬﺎ ﺑﺘﻮزﻳﻊ اﻷرﻗﺎم‬
‫ﻟﻠﺘﻌﻠﻴﻤﺎت ﻋﻠﻰ اﻟﻌﻤﻮد اﻟﺜﺎﱐ‪.‬‬

‫اﻟﻌﻤﻮد اﻷول )ﺷﻜﻞ اﻟﺘﻌﻠﻴﻤﺔ(‬ ‫‪No.‬‬ ‫اﻟﻌﻤﻮد اﻟﺜﺎﱐ )وﻇﻴﻔﺔ اﻟﺘﻌﻠﻴﻤﺔ(‬

‫‪Sound Speaker , Pulses , Periods‬‬ ‫‪ .1‬اﻟﺘﺤﻜﻢ ﺑﺈﻇﻬﺎر أو إﺧﻔﺎء ﻧﻘﻄﺔ )‪(SET/RST Pixel‬‬
‫‪Dtmfout String , Duration‬‬ ‫رﺳﻢ داﺋﺮة ﰲ ﻧﻘﻄﺔ ﻣﺮﺟﻌﻴﺔ وﺑﻘﻄﺮ ‪r‬‬ ‫‪.2‬‬
‫=‪Config Graphlcd = 128 * 64sed , Dataport‬‬
‫= ‪Porta, Controlport= Portc , Ce = 2 , Ce2‬‬ ‫‪ .3‬إﻇﻬﺎر ﺻﻮرة ﰲ ﻣﻮﻗﻊ ﳏﺪد ﻣﻮﺟﻮدة ﻋﻨﺪ ﻻﻓﺘﺔ ﳏﺪدة‬
‫‪4 , Cd = 7 , Rd = 6 , Reset = 3 , Enable =5‬‬
‫"‪$lib "glcdKS108.lib‬‬ ‫‪ .4‬ﺗﻀﻤﲔ ﻣﻠﻒ اﳋﻄﻮط ﻣﻦ ﻣﻠﻒ ﺧﻄﻮط ﺧﺎرﺟﻲ‬
‫‪Setfont Font‬‬ ‫‪ .5‬ﺗﻀﻤﲔ اﻟﺼﻮرة ﻣﻦ ﻣﻠﻒ ‪ bgf‬ﺧﺎرﺟﻲ‬
‫‪Cls‬‬ ‫‪ .6‬ﺗﻮﻟﻴﺪ ﺻﻮت ﻋﻠﻰ اﻟﻘﻄﺐ ﻣﺘﺼﻞ ﻣﻊ ﻣﻜﱪ ﺻﻮﰐ‬
‫‪Cls Text‬‬ ‫‪ .7‬ﺗﻮﻟﻴﺪ ﺻﻮت اﻟﻨﻐﻤﺔ اﻟﺜﻨﺎﺋﻴﺔ ﻣﺘﻌﺪدة اﻟﱰدد ﳌﻔﺎﺗﻴﺢ اﳍﺎﺗﻒ‬
‫‪Cls Graph‬‬ ‫‪ .8‬ﺗﻌﻴﲔ اﳋﻂ اﳌﺮاد اﺳﺘﺨﺪاﻣﻪ‬
‫]‪Lcdat y , x , var [, inv‬‬ ‫‪ .9‬ﻣﺴﺢ اﻟﻨﺼﻮص واﻟﺮﺳﻮم‬
‫‪Line(X0 , Y0) - (X1 , Y1) , Color‬‬ ‫‪ .10‬ﻣﺴﺢ اﻟﻨﺼﻮص ﻓﻘﻂ‬
‫‪Pset X , Y , Color‬‬ ‫‪ .11‬ﻣﺴﺢ اﻟﺮﺳﻮم ﻓﻘﻂ‬
‫‪Circle(X , Y) , r , Color‬‬ ‫‪ .12‬ﻃﺒﺎﻋﺔ ﻣﺘﺤﻮل أو ﻧﺺ ﻋﻠﻰ اﻟﺸﺎﺷﺔ ﰲ ﻣﻮﻗﻊ ﳏﺪد‪.‬‬
‫‪Showpic X , Y , label‬‬ ‫‪ .13‬رﺳﻢ ﺧﻂ اﺳﺘﻨﺎداً إﱃ ﻧﻘﻄﺔ ﺑﺪاﻳﺔ وﻧﻘﻄﺔ �ﺎﻳﺔ‬
‫"‪$include "Font5x8.font‬‬ ‫‪ .14‬ﺗﻌﺮﻳﻒ اﻷﻗﻄﺎب اﳌﻮﺻﻠﺔ ﻣﻊ ﺷﺎﺷﺔ اﻹﻇﻬﺎر اﻟﺮﺳﻮﻣﻴﺔ‪.‬‬
‫"‪$bgf "Smiley1.bgf‬‬ ‫‪ .15‬ﺗﻌﺮﻳﻒ ﻣﻜﺘﺒﺔ ﺷﺎﺷﺔ اﻹﻇﻬﺎر اﻟﺮﺳﻮﻣﻴﺔ‬

‫اﻟﺴﺆال اﻟﺮاﺑﻊ‪ :‬ﻣﺎ ﻫﻲ وﻇﻴﻔﺔ ﻛﻞ ﻣﻦ اﻟﺘﻌﻠﻴﻤﺎت اﻟﺘﺎﻟﻴﺔ؟‬

‫اﻟﺘﻌﻠﻴﻤﺔ اﻟﺒﺮﻣﺠﻴﺔ‬ ‫ﺷﺮح اﻟﺘﻌﻠﻴﻤﺔ‬

‫]‪Shift var , Right/Left [, shift‬‬

‫]‪Rotate var , Right/Left [, rotate‬‬

‫ﻧﻤﻮذج أﺳﺌﻠﺔ اﻻﺧﺘﺒﺎر اﻟﺮاﺑﻊ )‪ 15 – (Test-4‬دﻗﻴﻘﺔ‪.‬‬

‫اﻟﺴﺆال اﻷول‪ :‬ﻣﺎ ﻫﻲ ﻣﺮاﺣﻞ ﺧﻮارزﻣﻴﺔ ﻣﺴﺢ ﺛﻼث ﻟﻮﺣﺎت إﻇﻬﺎر ذات ﺳﺒﻊ ﻗﻄﻊ؟‬

‫اﻟﺴﺆال اﻟﺜﺎﱐ‪ :‬ﻣﺎ ﻫﻮ دﻟﻴﻞ )‪ (Index‬اﻟﻌﻨﺼﺮ اﻷول )‪ (var1‬ﰲ اﻟﺘﻌﻠﻴﻤﺔ‪.[Data var1 , var2 , var3] :‬‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪398‬‬
‫‪A4‬‬ ‫اﳌﻠﺤﻖ اﻟﺮاﺑﻊ| ‪Appendix 4‬‬

‫اﻟﺴﺆال اﻟﺜﺎﻟﺚ‪ :‬اﳌﻄﻠﻮب إﳚﺎد ﺟﺪول اﻟﺘﺸﻔﲑ ﻣﻦ أﺟﻞ ﺗﺸﻐﻴﻞ ﻟﻮﺣﺔ إﻇﻬﺎر ﺳﺒﺎﻋﻴﺔ ذات ﻣﻬﺒﻂ ﻣﺸﱰك ﻟﻸرﻗﺎم اﳌﺪرﺟﺔ‪.‬‬
‫اﻟﻘﻴﻤﺔ ﻋﻠﻰ اﻟﺒﻮاﺑﺔ ‪PortC‬‬ ‫اﻟﺮﻗﻢ اﻟﻤﻄﻠﻮب‬
‫‪7-H‬‬ ‫‪6-G‬‬ ‫‪5-F‬‬ ‫‪4-E‬‬ ‫‪3-D‬‬ ‫‪2-C‬‬ ‫‪1-B‬‬ ‫‪0-A‬‬ ‫إﻇﻬﺎرﻩ‬
‫‪0‬‬
‫‪1‬‬
‫‪2‬‬
‫‪3‬‬
‫‪4‬‬
‫‪5‬‬
‫‪6‬‬
‫‪7‬‬
‫‪8‬‬
‫‪9‬‬

‫اﻟﺴﺆال اﻟﺮاﺑﻊ‪ :‬ﻗﻢ ﺑﺮﺑﻂ اﻟﻌﻨﺎﺻﺮ ﻣﻦ اﻟﻌﻤﻮد اﻷول ﻣﻊ ﻣﺎ ﻳﻘﺎﺑﻠﻬﺎ ﻣﻦ اﻟﻌﻤﻮد اﻟﺜﺎﱐ ﲝﻴﺚ ﻳﺘﻢ رﺑﻂ ﻛﻞ ﺗﻌﻠﻴﻤﺔ ﻣﻊ وﻇﻴﻔﺘﻬﺎ ﺑﺘﻮزﻳﻊ اﻷرﻗﺎم‬
‫اﻟﻌﻤﻮد اﻷول )ﺷﻜﻞ اﻟﺘﻌﻠﻴﻤﺔ(‬
‫]‪Shift var , Right/Left [,shift‬‬
‫]‪Rotate var , Right/Left [,rotate‬‬
‫)‪var = Getrc(pinx , y‬‬
‫‪Data var1 , … , varn‬‬
‫)‪Var=Lookdown(value,Label,Entries‬‬
‫‪Config Rc5 = Pinb.7‬‬
‫)‪Getrc5(address , Command‬‬
‫)‪Var = Lookupstr(Index , Label‬‬
‫‪Restore Label‬‬
‫‪Read Var‬‬
‫)‪var = Lookup(Index , label‬‬
‫‪Rc5send Togbit , Address ,‬‬
‫‪Command‬‬
‫ﻟﻠﺘﻌﻠﻴﻤﺎت ﻋﻠﻰ اﻟﻌﻤﻮد اﻟﺜﺎﱐ‪.‬‬
‫‪No.‬‬ ‫اﻟﻌﻤﻮد اﻟﺜﺎﱐ )وﻇﻴﻔﺔ اﻟﺘﻌﻠﻴﻤﺔ(‬
‫‪ .1‬ﺗﻌﺮﻳﻒ اﻟﻘﻄﺐ اﳌﻮﺻﻮل ﻣﻊ ﺧﺮج ﻣﺴﺘﻘﺒﻞ ‪IR‬‬
‫‪ .2‬ﻓﺤﺺ اﻟﻌﻨﻮان واﻷﻣﺮ ﻣﻦ اﳉﻬﺎز اﳌﺮﺳﻞ‬
‫‪RC5‬‬ ‫‪ .3‬ﺗﻌﻠﻴﻤﺔ إرﺳﺎل وﻓﻖ اﻟﱪوﺗﻮﻛﻮل‬
‫‪ .4‬ﲣﺰﻳﻦ ﺑﻴﺎﻧﺎت ﰲ ذاﻛﺮة اﻟﱪﻧﺎﻣﺞ ﻋﻨﺪ ﻻﻓﺘﺔ ﻣﻌﻴﻨﺔ‬
‫‪label‬‬ ‫‪ .5‬ﺟﻠﺐ ﻗﻴﻤﺔ ﻣﻦ ‪ LUT‬ﳐﺰن ﰲ ‪ Data‬ﻋﻨﺪ اﻟﻼﻓﺘﺔ‬
‫وﻟﻪ اﻟﺪﻟﻴﻞ ‪.Index‬‬
‫‪ .6‬ﻗﻴﺎس زﻣﻦ ﺗﻔﺮﻳﻎ اﳌﻜﺜﻒ واﻟﻨﺎﺗﺞ ﻫﻮ ﺛﺎﺑﺖ زﻣﲏ ﺗﺘﻌﻠﻖ ﻗﻴﻤﺘﻪ‬
‫ﺑﻘﻴﻤﺔ اﳌﻘﺎوﻣﺔ واﳌﻜﺜﻒ ﻣﻌﺎً!‬
‫‪ .7‬إزاﺣﺔ ﺑﺖ ﻣﻦ ﻣﺘﺤﻮل إﱃ اﻟﻴﻤﲔ أو اﻟﻴﺴﺎر وﻋﺪد ﺧﺎﻧﺎت‬
‫اﻹزاﺣﺔ ﳏﺪدة‬
‫‪ .8‬ﺗﺪوﻳﺮ ﺑﺖ ﻣﻦ ﻣﺘﺤﻮل إﱃ اﻟﻴﻤﲔ أو اﻟﻴﺴﺎر وﻋﺪد ﺧﺎﻧﺎت‬
‫اﻟﺪوران ﳏﺪدة‬
‫‪ .9‬اﻟﺒﺤﺚ ﻋﻦ دﻟﻴﻞ )‪ (Index‬ﻗﻴﻤﺔ ﻣﻌﻴﻨﺔ )‪ (value‬ﳐﺰن ﰲ‬
‫‪ Data‬ﻋﻨﺪ اﻟﻼﻓﺘﺔ ‪ label‬وﻋﺪد ﳏﺪد ﻣﻦ اﻟﻌﻨﺎﺻﺮ‪.‬‬
‫‪ .10‬ﺗﻘﻮم ﺑﻮﺿﻊ ﻣﺆﺷﺮ )ﻋﺪاد( ﺑﻴﺎﻧﺎت إﱃ أول ﻋﻨﺼﺮ ﻣﻮﺟﻮد ﰲ‬
‫‪ LUT‬ﳐﺰن ﰲ ‪ Data‬ﻋﻨﺪ اﻟﻼﻓﺘﺔ ‪ label‬ﻣﻦ أﺟﻞ ﻗﺮاءة‬
‫اﻟﺒﻴﺎﻧﺎت ﺑﺎﺳﺘﺨﺪام اﻟﺘﻌﻠﻴﻤﺔ ‪Read Var‬‬
‫‪label‬‬ ‫‪ .11‬ﺟﻠﺐ ﳏﺮف ﻣﻦ ‪ LUT‬ﳐﺰن ﰲ ‪ Data‬ﻋﻨﺪ اﻟﻼﻓﺘﺔ‬
‫وﻟﻪ اﻟﺪﻟﻴﻞ ‪.Index‬‬
‫‪ .12‬ﻗﺮاءة اﻟﻘﻴﻢ اﳌﻮﺟﻮدة ﰲ ‪ LUT‬ﳐﺰن ﰲ ‪ Data‬اﻹﺷﺎرة إﻟﻴﻬﺎ‬
‫ﺑﺎﺳﺘﺨﺪام اﻟﺘﻌﻠﻴﻤﺔ ‪ Restore‬وإﺳﻨﺎدﻫﻢ إﱃ اﳌﺘﺤﻮل ‪.Var‬‬

‫‪399‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 Appendix Name | ‫اﺳﻢ اﳌﻠﺤﻖ‬

‫؟‬Toggle bit ‫ وﻛﻢ ﻋﺪد اﻟﺒﺘﺎت وﻣﺎﻫﻲ وﻇﻴﻔﺔ‬RC5 ‫ ﻣﺎ ﻫﻲ ﺑﻨﻴﺔ اﻟﱪوﺗﻮﻛﻮل‬:‫اﻟﺴﺆال اﳋﺎﻣﺲ‬

‫ ﻣﺎ ﻫﻮ ﳕﻂ اﻟﺘﺤﻜﻢ‬.‫ ﻗﻢ ﺑﺘﻮﺻﻴﻞ اﳌﺘﺤﻜﻢ ﻣﻊ ﻟﻮﺣﺎت اﻹﻇﻬﺎر وﻣﻠﺤﻘﺎﻬﺗﺎ‬،‫اﻟﺴﺆال اﻟﺴﺎدس اﻧﻄﻼﻗﺎً ﻣﻦ اﻟﱪﻧﺎﻣﺞ اﳉﺰﺋﻲ اﳌﺪرج أدﻧﺎﻩ‬
‫اﳌﺴﺘﺨﺪم ﺑﻠﻮﺣﺎت اﻹﻇﻬﺎر ﰲ اﳌﺜﺎل أدﻧﺎﻩ؟‬
Config PORTB = Output : Segments Alias PORTB
Config PORTD.6 = Output : Ctr1 Alias PORTD.6
Config PORTD.7 = Output : Ctr2 Alias PORTD.7

Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages 400
‫‪A5‬‬ ‫اﳌﻠﺤﻖ اﳋﺎﻣﺲ| ‪Appendix 5‬‬

‫اﻟﻤﻠﺤﻖ اﻟﺨﺎﻣﺲ )‪(Appendix 5‬‬

‫‪@Ú‘‹Ã€aÎ@ÚyÏn–æa@Ú‹‘z‹€@Ôuàχ‰€@=Ìãvn€a@·‹»n‹€@ã◊ân€a@›flb«@ëbÓ”@äbjnÇa‬‬

‫‪OPEN-LOOP & CLOSED-LOOP REMEMBERING FACTOR TESTS‬‬

‫اﻟﺮﺟﺎء اﻹﺟﺎﺑﺔ ﻋﻠﻰ اﻷﺳﺌﻠﺔ اﻟﺘﺎﻟﻴﺔ ﺧﻼل زﻣﻦ ﻗﺪرﻩ ‪ 15‬دﻗﻴﻘﺔ ﻓﻘﻂ!‬

‫اﻟﺴﺆال اﻷول )‪ :(60Sec‬ﺣﺪد ﻣﺪﻟﻮل رﻣﻮز ﺗﻌﺮﻳﻒ اﳌﻌﺎﰿ اﻟﺘﺎﱄ‪:‬‬

‫اﻟﺴﺆال اﻟﺜﺎﱐ )‪ :(60Sec‬ﻣﺎ ﻫﻮ ﻋﺪد دورات اﻵﻟﺔ اﻟﻼزﻣﺔ ﻟﺘﻨﻔﻴﺬ ﺗﻌﻠﻴﻤﺔ واﺣﺪة ﳌﻌﺎﳉﺎت ‪ AVR‬و ﻣﺎ ﻫﻮ ﻋﺪد اﻟﺘﻌﻠﻴﻤﺎت اﻟﱵ ﻳﺴﺘﻄﻴﻊ‬
‫ﻣﻌﺎﰿ ‪ AVR‬ﺗﻨﻔﻴﺬﻫﺎ ﺧﻼل ﺛﺎﻧﻴﺔ واﺣﺪة إذا ﻛﺎن ﺗﺮدد اﳍﺰاز اﻟﻜﺮﻳﺴﺘﺎﱄ اﳌﻮﺻﻮل ﻣﻊ اﳌﻌﺎﰿ ﻫﻮ ‪10MHz‬؟‬

‫اﻟﺴﺆال اﻟﺜﺎﻟﺚ )‪ :(60Sec‬ﻗﻢ ﺑﱰﻗﻴﻢ اﳌﺮاﺣﻞ ﰲ اﳉﺪول ﲝﻴﺚ ﲢﻘﻖ اﻟﱰﺗﻴﺐ اﻷﻣﺜﻠﻲ ﳍﻴﻜﻠﻴﺔ ﻛﺘﺎﺑﺔ ﻛﻮد ﺑﺮﳎﻲ‪.‬‬
‫رﻗﻢ اﳌﺮﺣﻠﺔ‬
‫اﳌﺘﺤﻮﻻت )‪(Variables‬‬
‫ﻛﺘﻠﺔ اﻟﱪاﻣﺞ اﻟﻔﺮﻋﻴﺔ )‪(Sub-Routines‬‬
‫ﻛﺘﻠﺔ اﻟﱪﻧﺎﻣﺞ اﻟﺮﺋﻴﺴﻲ )‪(Main Program‬‬
‫اﻟﺘﻮﺟﻴﻬﺎت )‪(Directives‬‬
‫اﻟﺘﻬﻴﺌﺔ )‪(Configurations‬‬

‫اﻟﺴﺆال اﻟﺮاﺑﻊ )‪ :(60Sec‬ﻣﺎ ﻫﻲ وﻇﻴﻔﺔ ﻛﻞ ﻣﻦ اﻟﺘﻌﻠﻴﻤﺎت اﻟﺘﺎﻟﻴﺔ؟‬

‫اﻟﺘﻌﻠﻴﻤﺔ اﻟﺒﺮﻣﺠﻴﺔ‬ ‫ﺷﺮح اﻟﺘﻌﻠﻴﻤﺔ‬

‫]‪Shift var , Right/Left [, shift‬‬

‫]‪Rotate var , Right/Left [, rotate‬‬

‫اﻟﺴﺆال اﳋﺎﻣﺲ )‪ ::(10Sec‬ﻣﺎ ﻫﻮ دﻟﻴﻞ )‪ (Index‬اﻟﻌﻨﺼﺮ اﻷول )‪ (var1‬ﰲ اﻟﺘﻌﻠﻴﻤﺔ‪.[Data var1 , var2 , var3] :‬‬

‫‪401‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 ‫اﺳﻢ اﳌﻠﺤﻖ | ‪Appendix Name‬‬

‫اﻟﺴﺆال اﻟﺴﺎدس )‪ :(180Sec‬اﳌﻄﻠﻮب ﻛﺘﺎﺑﺔ وﻇﺎﺋﻒ اﻟﺘﻌﻠﻴﻤﺎت اﻟﺘﺎﻟﻴﺔ ﺑﺎﺧﺘﺼﺎر ﺷﺪﻳﺪ‪.‬‬

‫اﻟﻌﻤﻮد اﻷول )ﺷﻜﻞ اﻟﺘﻌﻠﻴﻤﺔ(‬ ‫اﻟﻌﻤﻮد اﻟﺜﺎﱐ )وﻇﻴﻔﺔ اﻟﺘﻌﻠﻴﻤﺔ(‬

‫‪$baud = 9600‬‬

‫‪$crystal = 1000000‬‬

‫‪Config Portc.5 = Output‬‬

‫‪Portc.5 = 1‬‬

‫‪Config Debounce = time‬‬

‫‪Debounce Px.y , state , label, Sub‬‬

‫‪Bitwait x , Set/reset‬‬

‫)(‪Var = Getkbd‬‬

‫‪Config Kbd = Portb , Delay = 150‬‬

‫)‪Var=Lookdown(value,Label,Entries‬‬

‫‪Config Rc5 = Pinb.7‬‬

‫‪Restore Label‬‬

‫‪Read Var‬‬

‫)‪var = Lookup(Index , label‬‬

‫اﻟﺴﺆال اﻟﺴﺎﺑﻊ )‪:(60Sec‬‬

‫‪ .4‬ﻣﺎ ﻫﻲ اﻟﻐﺎﻳﺔ ﻣﻦ اﺳﺘﺨﺪام ﻣﻘﺎوﻣﺎت اﻟﺴﺤﺐ اﳋﺎرﺟﻴﺔ )‪Pull-‬‬

‫‪ (Down‬وﻣﱴ ﳓﺘﺎﺟﻬﺎ؟‬
‫‪ .5‬أﻻ ﳝﻜﻦ اﻻﺳﺘﻌﺎﺿﺔ ﻋﻨﻬﺎ ﲟﻘﺎوﻣﺔ اﻟﺴﺤﺐ اﻟﺪاﺧﻠﻴﺔ ﰲ ﺑﻨﻴﺔ‬
‫ﺑﻮاﺑﺔ اﳌﻌﺎﰿ؟‬
‫‪ .6‬ﻣﱴ ﻧﺴﺘﺨﺪم ﻣﻘﺎوﻣﺔ ﺳﺤﺐ )‪(Pull-Down Resistor‬‬
‫وﻣﱴ ﻧﺴﺘﺨﺪم ﻣﻘﺎوﻣﺔ رﻓﻊ )‪(Pull-Up Resistor‬؟‬

‫اﻟﺴﺆال اﻟﺜﺎﻣﻦ )‪ :(60Sec‬ﻣﺎ ﻫﻮ اﻟﻔﺮق ﺑﲔ ﺷﺎﺷﺔ اﻹﻇﻬﺎر‬

‫اﻟﻜﺮﻳﺴﺘﺎﻟﻴﺔ وﺷﺎﺷﺔ اﻹﻇﻬﺎر اﻟﺮﺳﻮﻣﻴﺔ؟ وﻫﻞ ﳝﻜﻦ اﺳﺘﺨﺪام ﳕﻂ ‪ 4-bit‬ﻟﺮﺑﻂ أﻗﻄﺎب اﻟـ ‪ Data-bus‬ﻟﺸﺎﺷﺔ اﻹﻇﻬﺎر اﻟﺮﺳﻮﻣﻴﺔ؟‬
‫اﻟﺴﺆال اﻟﺘﺎﺳﻊ )‪:(120Sec‬‬
‫اﳌﻄﻠﻮب إﳚﺎد ﺟﺪول اﻟﺘﺸﻔﲑ ﻣﻦ أﺟﻞ ﺗﺸﻐﻴﻞ ﻟﻮﺣﺔ إﻇﻬﺎر ﺳﺒﺎﻋﻴﺔ ذات ﻣﻬﺒﻂ ﻣﺸﱰك ﻟﻸرﻗﺎم اﳌﺪرﺟﺔ ﺑﺎﳉﺪول ﻋﻠﻤﺎً أن اﻟﻨﻘﻄﺔ ‪ DP‬ﰲ‬
‫ﺣﺎﻟﺔ ﻋﻤﻞ‪.‬‬

‫‪Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages‬‬ ‫‪402‬‬
‫‪A5‬‬ ‫اﳌﻠﺤﻖ اﳋﺎﻣﺲ| ‪Appendix 5‬‬

‫اﻟﻘﻴﻤﺔ ﻋﻠﻰ اﻟﺒﻮاﺑﺔ ‪PortX‬‬

‫اﻟﺮﻗﻢ‬
‫‪7-H‬‬ ‫‪6-G‬‬ ‫‪5-F‬‬ ‫‪4-E‬‬ ‫‪3-D‬‬ ‫‪2-C‬‬ ‫‪1-B‬‬ ‫‪0-A‬‬
‫‪0‬‬
‫‪1‬‬

‫‪2‬‬

‫‪3‬‬

‫اﻟﺴﺆال اﻟﻌﺎﺷﺮ )‪ :(60Sec‬إذا ﻃﻠﺐ ﻣﻨﻚ ﺗﻮﺻﻴﻞ ﺳﺘﺔ ﻣﻔﺎﺗﻴﺢ ﳊﻈﻴﺔ إﱃ ﻗﻄﺐ وﺣﻴﺪ ﻣﻦ ﻣﻌﺎﰿ ‪ ،AVR‬ﻓﻤﺎ ﻫﻮ اﳊﻞ اﻟﺬي ﺗﻘﱰﺣﻪ‬
‫ﺑﺎﺧﺘﺼﺎر‪.‬‬
‫اﻟﺴﺆال اﳊﺎدي ﻋﺸﺮ )‪10Sec‬إذا ﻃﻠﺐ ﻣﻨﻚ ﻗﻴﺎس ﺟﻬﺪ ﺗﺸﺎﻬﺑﻲ ﻳﺘﻐﲑ ﰲ اﺠﻤﻟﺎل ‪ ،0~10V‬ﻓﻤﺎ ﻫﻮ اﳉﻬﺪ اﳌﺮﺟﻌﻲ اﻟﺬي ﺗﻘﱰﺣﻪ وﻣﺎ‬
‫ﻫﻲ ﻗﻴﻤﺔ اﳉﻬﺪ اﳌﺮﺟﻌﻲ اﻟﺪاﺧﻠﻲ ﻟﻠﻤﻌﺎﰿ ‪ATmega128‬؟‬
‫اﻟﺴﺆال اﻟﺜﺎﱐ ﻋﺸﺮ )‪ :(120Sec‬ﺿﻊ إﺷﺎرة ﺻﺢ أو ﺧﻄﺄ ﲜﺎﻧﺐ اﻟﻌﺒﺎرات اﻟﺘﺎﻟﻴﺔ‪:‬‬
‫‪ J‬ﺗﻌﺘﱪ ﻣﻘﺎﻃﻌﺔ ﻃﻔﺤﺎن اﳌﺆﻗﺖ ﻣﻦ اﳌﻘﺎﻃﻌﺎت اﳋﺎرﺟﻴﺔ وﻣﻘﺎﻃﻌﺔ ﻧﻈﲑ ﻃﻔﺤﺎن اﳌﺆﻗﺖ ﻣﻦ اﳌﻘﺎﻃﻌﺎت اﻟﺪاﺧﻠﻴﺔ!‬
‫‪ J‬ﻋﻤﻠﻴﺔ ﺗﺼﻔﲑ اﳌﻌﺎﰿ ﻟﻴﺴﺖ ﻣﻘﺎﻃﻌﺔ!‬
‫‪ J‬ﻋﻨﺪ ﺣﺪوث ﻣﻘﺎﻃﻌﺔ واﻟﻘﻔﺰ إﱃ ﺑﺮﻧﺎﻣﺞ ﺧﺪﻣﺔ اﳌﻘﺎﻃﻌﺔ ﻓﺈن أي ﻣﻘﺎﻃﻌﺔ ﺧﻼل ذﻟﻚ ﻟﻦ ﻳﺘﻢ اﻻﺳﺘﺠﺎﺑﺔ ﳍﺎ!‬
‫‪ J‬ﻣﺪﺧﻞ اﻟـ ‪ CLK‬ﻟﻠﻌﺪاد‪ 0‬ﻫﻮ ﺗﺮدد اﳍﺰاز اﻟﻜﺮﻳﺴﺘﺎﱄ ﻧﻔﺴﻪ‪ ،‬وﻟﻠﻤﺆﻗﺖ ﻫﻮ اﻟﻨﺒﻀﺎت اﻟﻮاردة ﻋﻠﻰ اﻟﻘﻄﺐ ‪!T0‬‬
‫‪ J‬ﳕﻂ ﺣﺎدﺛﺔ اﳌﺴﻚ ﻟﻠﻤﺆﻗﺖ‪ 1‬ﻣﺮﺗﺒﻂ ﻣﺒﺎﺷﺮة ﺑﺎﳊﺎﻟﺔ ﻋﻠﻰ اﻟﻘﻄﺐ ‪!T1‬‬
‫‪ J‬اﻟﺘﻴﺎر اﻷﻋﻈﻤﻲ اﻟﺬي ﳝﻜﻦ اﺳﺘﺠﺮارﻩ ﻣﻦ ﻗﻄﺐ وﺣﻴﺪ ﳌﻌﺎﰿ ﻣﺼﻐﺮ ﻫﻮ ‪!100mA‬‬
‫‪ J‬ﺳﺮﻋﺔ ﻧﻘﻞ اﻟﺒﻴﺎﻧﺎت ﰲ اﻻﺗﺼﺎﻻت اﻟﻐﲑ ﻣﺘﻮاﻗﺘﺔ ﺗﻌﺘﻤﺪ ﻋﻠﻰ ﻗﻴﻤﺔ اﻟﱰدد ﻋﻠﻰ اﻟﻘﻄﺐ ‪!Sck‬‬
‫‪ J‬ﻳﻌﺘﱪ ﺑﺮوﺗﻮﻛﻮل اﻻﺗﺼﺎل اﻟﺘﺴﻠﺴﻠﻲ ‪ RS232‬واﻟﱪوﺗﻮﻛﻮل ‪ RS485‬ذوا ﻣﻨﺎﻋﺔ ﻋﺎﻟﻴﺔ ﺿﺪ اﻟﻀﺠﻴﺞ!‬
‫‪ J‬ﻳﻌﺘﱪ اﻟﱪوﺗﻮﻛﻮل ‪ RS232‬ﺛﻨﺎﺋﻲ اﻻﲡﺎﻩ!‬
‫‪ J‬ﺣﺎﺟﺔ ﻟﻮﺻﻞ ﻗﻄﺐ اﻟﺘﻐﺬﻳﺔ اﻟﺘﺸﺎﻬﺑﻲ ‪ AVCC‬اﻷرﺿﻲ اﻟﺘﺸﺎﻬﺑﻲ ‪ AGND‬إذا ﱂ ﻳﺘﻢ اﺳﺘﺨﺪام اﳌﺒﺪل!‬

‫‪403‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 Appendix Name | ‫اﺳﻢ اﳌﻠﺤﻖ‬

Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages 404
‫‪A6‬‬ ‫اﳌﻠﺤﻖ اﻟﺴﺎدس| ‪Appendix 6‬‬

‫اﻟﻤﻠﺤﻖ اﻟﺴﺎدس )‪(Appendix 6‬‬

‫‪@Ú‘‹Ã€aÎ@ÚyÏn–æa@Ú‹‘z‹€@xàχ‰€@äbjnǸa@xàbπ‬‬

‫‪OPEN-LOOP & CLOSED-LOOP TESTS‬‬

‫‪405‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 Appendix Name | ‫اﺳﻢ اﳌﻠﺤﻖ‬

Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages 406
‫‪A6‬‬ ‫اﳌﻠﺤﻖ اﻟﺴﺎدس| ‪Appendix 6‬‬

‫@‬
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‫@‬

‫@‬

‫@‬

‫@‬

‫@‬

‫@‬

‫‪407‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 Appendix Name | ‫اﺳﻢ اﳌﻠﺤﻖ‬

Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages 408
‫‪A7‬‬ ‫اﳌﻠﺤﻖ اﻟﺴﺎﺑﻊ| ‪Appendix 7‬‬

‫اﻟﻤﻠﺤﻖ اﻟﺴﺎﺑﻊ )‪(Appendix 7‬‬

‫‪@@ÚÓœbö�a@ÚÓ�Ó0a@paáyÏ€aÎ@Ú»éÏn€a@ÚyÏ‹€@ÚÓ‡Ó‡ón€a@pb��Éæa‬‬

‫‪PERIPHERAL MODULES SCHEMATIC DIAGRAMS‬‬

‫اﳌﺨﻄﻂ اﻟﺘﺼﻤﻴﻤﻲ ﻟﻠﻮﺣﺔ اﻟﺘﻮﺳﻌﺔ اﻟﺮﺋﻴﺴﻴﺔ )‪:(Expantion Card Schematic Diagram‬‬

‫اﳌﺨﻄﻂ اﻟﺘﺼﻤﻴﻤﻲ ﻟﻮﺣﺪة اﻟﱪوﺗﻮﻛﻞ ‪:(I2C Unit Schematic Diagram) I2C‬‬

‫‪409‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 Appendix Name | ‫اﺳﻢ اﳌﻠﺤﻖ‬

:(Relays Unit Schematic Diagram) Relays ‫اﳌﺨﻄﻂ اﻟﺘﺼﻤﻴﻤﻲ ﻟﻮﺣﺪة اﳌﺨﺎرج اﻻﺳﺘﻄﺎﻋﻴﺔ‬

:(Quad-7Segment Unit Schematic Diagram) ‫اﳌﺨﻄﻂ اﻟﺘﺼﻤﻴﻤﻲ ﻟﻮﺣﺪة ﻟﻮﺣﺔ اﻹﻇﻬﺎر اﻟﺮﺑﺎﻋﻴﺔ‬

:(RS485 Unit Schematic Diagram) RS485 ‫اﳌﺨﻄﻂ اﻟﺘﺼﻤﻴﻤﻲ ﻟﻮﺣﺪة اﻟﱪوﺗﻮﻛﻞ‬

Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages 410
‫‪A7‬‬ ‫اﳌﻠﺤﻖ اﻟﺴﺎﺑﻊ| ‪Appendix 7‬‬

‫اﳌﺨﻄﻂ اﻟﺘﺼﻤﻴﻤﻲ ﻟﻮﺣﺪة ‪:(Ladder-DAC Unit Schematic Diagram)Ladder-DAC‬‬

‫اﳌﺨﻄﻂ اﻟﺘﺼﻤﻴﻤﻲ ﻟﻮﺣﺪة ﻟﻮﺣﺔ اﻹﻇﻬﺎر )‪:(7-Segemnt Unit Schematic Diagram‬‬

‫اﳌﺨﻄﻂ اﻟﺘﺼﻤﻴﻤﻲ ﻟﻮﺣﺪة ﳊﺴﺎﺳﺎت اﻟﺘﺸﺎﻬﺑﻴﺔ )‪:(Analog Sensors Unit Schematic Diagram‬‬

‫اﳌﺨﻄﻂ اﻟﺘﺼﻤﻴﻤﻲ ﻟﻮﺣﺪة اﻟﱪوﺗﻮﻛﻞ ‪:(1-wire Unit Schematic Diagram) 1-wire‬‬

‫‪411‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬
 Appendix Name | ‫اﺳﻢ اﳌﻠﺤﻖ‬

:(RC5 Unit Schematic Diagram) RC5 ‫اﳌﺨﻄﻂ اﻟﺘﺼﻤﻴﻤﻲ ﻟﻮﺣﺪة اﻟﱪوﺗﻮﻛﻞ‬

:(Analog Unit Schematic Diagram) ‫اﳌﺨﻄﻂ اﻟﺘﺼﻤﻴﻤﻲ ﻟﻮﺣﺪة اﳌﻔﺎﺗﻴﺢ واﻟﺼﻮت‬

:(Power Drive Unit Schematic Diagram) ‫اﳌﺨﻄﻂ اﻟﺘﺼﻤﻴﻤﻲ ﻟﻮﺣﺪة اﻟﻘﻴﺎدة اﻻﺳﺘﻄﺎﻋﻴﺔ‬

:(Measuer & Control Unit Schematic Diagram) ‫اﳌﺨﻄﻂ اﻟﺘﺼﻤﻴﻤﻲ ﻟﻮﺣﺪة اﻟﻘﻴﺎس واﻟﺘﺤﻜﻢ‬

Innovating a Complete ES-FPGA Educational Paradigm for Teaching Undergraduates Next Generation Programming Languages 412
‫‪A7‬‬ ‫اﳌﻠﺤﻖ اﻟﺴﺎﺑﻊ| ‪Appendix 7‬‬

‫اﳌﺨﻄﻂ اﻟﺘﺼﻤﻴﻤﻲ ﻟﺘﻮﺿﻊ اﻟﻌﻨﺎﺻﺮ ﻋﻠﻰ اﻟﻮﺣﺪات )‪:(Layout Diagrams‬‬

‫@‬

‫‪413‬‬ ‫ﺑﻨﺎء ﻧﻈﺎم ﺗﻌﻠﻴﻤﻲ ﻣﺘﻜﺎﻣﻞ ﻟﻄﻼب اﳌﺮﺣﻠﺔ اﳉﺎﻣﻌﻴﺔ ﰲ ﳎﺎل ﺑﺮﳎﺔ ﻣﺼﻔﻮﻓﺔ اﻟﺒﻮاﺑﺎت اﳌﻨﻄﻘﻴﺔ اﻟﻘﺎﺑﻠﺔ ﻟﻠﱪﳎﺔ ﺣﻘﻠﻴﺎً ﺑﺎﺳﺘﺨﺪام ﻟﻐﺎت اﳉﻴﻞ اﻟﻘﺎدم‬