The document outlines 4 assignments involving analyzing different amplifier circuits: 1) Calculate various gains and impedances for a voltage divider configuration, 2) Do the same for a self-biased JFET circuit and see how gains change with component value changes, 3) Determine gains and impedances for a cascaded amplifier system, 4) Analyze a common-emitter amplifier circuit to find gains, impedances, frequencies, and bandwidth.
The document outlines 4 assignments involving analyzing different amplifier circuits: 1) Calculate various gains and impedances for a voltage divider configuration, 2) Do the same for a self-biased JFET circuit and see how gains change with component value changes, 3) Determine gains and impedances for a cascaded amplifier system, 4) Analyze a common-emitter amplifier circuit to find gains, impedances, frequencies, and bandwidth.
The document outlines 4 assignments involving analyzing different amplifier circuits: 1) Calculate various gains and impedances for a voltage divider configuration, 2) Do the same for a self-biased JFET circuit and see how gains change with component value changes, 3) Determine gains and impedances for a cascaded amplifier system, 4) Analyze a common-emitter amplifier circuit to find gains, impedances, frequencies, and bandwidth.
1. For the voltage-divider configuration shown below
(a) Determine AvNL, Zi, and Zo. (b) Calculate the gain Av and Avs (c) Determine the current gain Ai. (d) Determine Avs, Zi, and Zo using the re model and compare solutions
2. For the self-bias JFET shown below
(a) Determine Avnl, Zi, and Zo.
(b) Determine Av and Avs.
(c) Change RL to 6.8 k and Rsig to 1 kand calculate the new levels of Av and Avs. How are the voltage gains affected by changes in Rsig and RL? 3. For the cascaded system shown below, determine: (a) The loaded voltage gain of each stage. (b) The total gain of the system, Av and Avs. (c) The loaded current gain of each stage. (d) The total current gain of the system. (e) How Zi is affected by the second stage and RL. (f) How Zo is affected by the first stage and Rs. (g) The phase relationship between Vo and Vi.
4. For the circuit shown below
(a) Determine re. (b) Find Avmid _ Vo /Vi. (c) Calculate Zi. (d) Find AvSmid _ Vo /Vs. (e) Determine fLS, fLC, and fLE. (f) Determine the low cutoff frequency. (g) Determine f(hi) and f(lo) (h) Assuming that Cb’e = Cbe and Cb’c = Cbc, find fb and ft (i). Solve for the Bandwidth