LAB 8

Nyquist-Rate ADC Design and Simulation

Name: Mudassir Ali
Roll No.: 21i-2425
Section: IC Design
Date: May 16,2022
Subject: Mixed Signal IC Design
Submitted to: Google Classroom
 Lab Tasks
1. 2x Gain Amplifier

Figure 1: Schematic

Figure 2: Testbench
 Figure 3: Results

An input of 500 mV is applied at input to get an output of 997.3 mV which verify the working.
2. 1.5 bit per stage pipelined ADC

Figure 4: schematic
 Figure 5: Testbench

Figure 6: Results

The above results shows that that and input of 300 mV is applied which is more than vrefby8 thus giving an output of
100 mV and the output bits are 11 which means the circuit is working properly. In the lab manual the results are wrong
which are corrected in report.
3. DAC BASED Successive Approximation ADC

Figure 7: Schematic

Figure 8: Test bench

Figure 9: 5-bit register schematics

Figure 10: SAR Logic Unit

Figure 11: SAR Results Part 1

Figure 12: SAR Results Part 2

 Assignments:
1. Design and Simulate 3-bit Flash ADC

Figure 13: schematic

Figure 14: Testbench

 Figure 15: Thermometer to digital converter

Figure 16: Outputs

3 inputs are applied to the Flash ADC. i.e., 0,1.4, and 3 V. The corresponding outputs are: 000, 011 and 111 which
verify the correct functionality.
2. Simulate 3 stage 1.5-bit pipelined ADC and verify results:

Figure 17: schematic

Figure 18: Testbench

 Figure 19: Results

An input of 500 mV is applied at the input of 3 stage 1.5-bit pipelined ADC. The digital output is 100 (out2 out1
out0). Which verifies the correct functionality of the ADC