Name: Encinada, Keish Einstein

Introduction to HDL – BSCpE 601

02 Laboratory Activity 1

4-bit Multiplexer and Truth Table

Input S1 S0 Y
I0 0 0 I0
I1 0 1 I1
I2 1 0 I2
I3 1 1 I3

Decoder Circuit and Truth Table

A1 A0 D3 D2 D1 D0
0 0 0 0 0 1
0 1 0 0 1 0
1 0 0 1 0 0
1 1 1 0 0 0
D-Latch Circuit and Truth Table

Q D Q
(t + 1)

0 0 0
0 1 1
1 0 0
1 1 1

Observation
- According to what I've seen, the multiplexer has a 4 input, 2 inverters, but only 1 output.
Even though the decoder also has two inverters, the input will still change into a signal,
as seen in the truth table. In contrast to the preceding circuit, the logic circuit for the D-
Latch only has two inputs, one of which is inverted.