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Stopwatch Report
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Report from a project conducted on 20 th July 20 I 0

as part of SEC 4722 at the Microprocessor Laboratory

Section 1, SEC1G3

Group Members
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Rozlina Binti Ibrahim xxxxxx-xx-xxxx
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July 2010 SECIG3

ABSTRACT
We arc required to develop a stop watch program using 68000 Assembly Language, which will
be executed by pressing the reset button on the EASy68K simulator hardware. The stop watch should
have START, CLEAR, STOP, HALT and RESET functions. To implement all the functions, we must
press the interrupts buttons on the EASy68k Integrated Development Interface and all the buttons
pressed will emit a distinguish sound. The stop watch must be accurate to the real time clock. We also
arc required to design the circuit implementation of the hardware.

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July 2010 SECIG3

Table of Contents

I. INTRODUCTION .. ...... .4
2. PROCEDURES ...... .4
3. RESULT AND DICUSSION ....... 5
4. CONCLUSIONS. ....................... .......8
5. REFERENCES .......8
6. APPENDICES ..9

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July 2010 SECIG3

Table of Contents

I. INTRODUCTION ....4
2. PROCEDURES ...... ......4
3. RESULT AND DICUSSION ................. ....... 5
4. CONCLUSIONS .... .8
5. REFERENCES ·········•••••········ ......8
6. APPENDICES ...........•......... ...... 9

IPLI*, IPL2*) to request the encoded priority level of the hardware interrupt. The 3-bit code !PLO* I
IPL2* specifics one of 8 interrupt request from Oto 7. The interrupt mask bits 12, 11, IO, in the status
register determine the level of interrupt that will be function.
The five functions for the Stop Watch arc START, CLEAR, STOP, HALT and RESET.
The START button is to start count and display.
The CLEAR button is to clear the display to 00.00.0 and reset count.
The STOP button is to stop count and stop display.
The HALT button is to stop display but still count.
When RESET, the stop watch will reset everything (count, display, SR & etc)
For this Stop Watch, the number of digit that we arc used is as shown in Figure 0 I.

0 0. 0 0. 0
Figure 0 I: Number of digit used for the stop watch.

2. PROCEDURES
I
A flowchart has been constructed before the program is coded. The purpose of the flowchart is to
easier the coding of the program. Then. program for Stop Watch is coded by using 68000 Assembly
Language. After coding, the program is tested using EASy68k Integrated Development lntc1facc. By
using the interrupt buttons on the EASy68k. the START. CLEAR. STOP, HALT and RESET
functions arc tested.
After the stop watch program is f unctional, the circuit implementation of the hardware is designed
by using PSPICE and Microsoft Visio. Basic gates arc used for the interrupt design for start, clear,
stop, and halt. A true table is drawn first and continues with the K-maps to obtain a simplest form of
gate. After that, the digital circuit of the interrupt is drawn. Lastly, a 555 timer is used for design the
halt-reset pin to obtain the RESET function. For the stop watch, we arc assumed that the frequency of
the processor used is 8MHz. The true table, K-maps, and flowchan of this experiment arc provided at
the appendices of this report.

July 2010 SEC IG3

3. RESULT AND DICUSSION

[ Clock ]

-- [3-'----{>�----,

T I

C!.�,
lmikrola,

.... ....
Figure 02: The circuit for reset and clock input to the microprocessor.

1 I
 Figure 03: Digital circuit to compute the four interrupt levels.

I
5

July 2010 SECIG3 I

For the circuit implementation of Figure 02, 555 timer and additional of resister capacitor is used
to implement the hardware reset. This is due to the hardware reset for 68000 required to be active for
a minimum of I00ms at both *Halt and *RESET pin. Hence, a 555 timer plus some suitable value of
resister capacitor with proper connection to produce a I OOms "LOW" to active the reset when reset
button is pressed.
Figure 03 show the start, clear, stop, halt functions implemented using interrupt of 68000. A basic
gate with SOP method is used as one of the design for the interrupt. Other methods like basic gates, 8
to 3 encoder, nmltiplcxcr, and etc might also be used depends on the designer. A basic gate with SOP
used due to its simplest concept where it produces active high output and additional of inverter for
interrupts that is active low.

SWAP DO
ORG $1000 ANDI.L #$0000FFFF,DO
RESET MOVE.L #$30000,05 DIVU U0,00
;DELAY CONSTANT�(SPEED/10-1044) /18 MOVE.B 00, 01
MOVE.W #$2000, SR MOVE.B (AO,011, 10 (A2)
CLR.L 06 SWAP DO
CLR.L
LEA
07
SEG7,A2
ANDI. L
MOVE .B
#$000000FF,DO
(AO,00), DO
I
CLR.L DO BSET #7, DO
CLR MOVE.B no1000000,(A2, DO) MOVE.B 00,12(A2)
ADO.B #2,DO
CMP.B #16,00 ANDI.L #$0000FFFF,02
BNE CLR DIVU #10,02
LEA SRESET,Al MOVE.B 02,DO
MOVE.B #70, DO MOVE.B (AO,00), 6(A2)
TRAP #15 SWAP 02
LOOP BTST 10, 07 ANDI.L #$000000FF,02
;COUNT FLAG MOVE.B (AO,02),D2
BEQ LOOP BSET #7,02
MOVE.B 02,8 (A2)
RUN BTST #1, 07 RTS
;DISPLAY FLAG
BEQ NODISP OELAY CLR.L 04
JSR DISPLAY MOVE.L 05, 04
NODISP JSR DELAY BTST #1,07
AOD.L #1, 06 BNE DEL
CMP.L #$EA60,06 ADD.L �50 D4 1

;COMPARE WITH lOOMIN (MAXI ;CYCLES DIFFERENCE BETWEEN OISPLAY

BNE SKIP AND NO DISPLAY /CYCLES PER ONE DELAY
CLR.L 06 OEL SUB.L U,04
SKIP BRA RUN BNE DEL
RTS
DISPLAY LEA SEG7,A2
LEA TABLE,A0 HALT BCLR H,07
CLR.L DO ;CLEAR DISPLAY FLAG
CLR.L
CLR.L
01
02
RTS
I
STOP BCLR .a, 07
MOVE.L 06,02 ;CLEAR COUNT FLAG
DIVU #10,02 MOVEM.L 00-02,-(SP)
MOVE.L 02,00 ;SAVE REGISTER DATA
SWAP DO JSR DISPLAY
ANDI.L #$000000FF,DO MOVEM.L (SP)+,00-02
MOVE.B (AO,DO), 14(A2) ;LOAD REGISTER DATA
 STP BTST #0, D7
ANDI. L #$0000FFFF,D2 ; POLL FOR COUNT FLAG CHANGE (START)
DIVU 160,D2 BEQ STP
MOVE.L D2 DO RTS

July 2010 SECIG3

START MOVE.B
RTS
#3,D7 ; SET COUNT&DISPLAY FLAGS
I
CLEAR CLR.L 06 ; CLEAR COUNT
CLR.L D7 ; CLEAR FLAGS
JSR STOP
RTS

ORG $000
DC.L $01000000
ORG $004
DC.L $1000
ORG $064
DC.L !Pl
ORG $068
DC.L IP2
ORG $06C
DC.L IP3
ORG $070
DC.L IP4

ORG $2000
IPl LEA SHALT,Al
MOVE.B #70,DO
TRAP itlS
JSR HALT
RTE
IP2 LEA SSTOP,Al
MOVE.B #70,DO
TRAP
I
115
JSR STOP
RTE
IP3 LEA SCLEAR,Al
MOVE.B #70,DO
TRAP 115
JSR CLEAR
RTE
IP4 LEA SSTART,Al
MOVE.B ll-70,DO
TRAP 115
JSR START
RTE

SEG7 EQU $EOOOOO

TABLE DC.B %00111111, %00000110, %01011011, %01001111,%01100110
DC B %01101101, %01111101, %00000111, %01111111,%01101111
SRESET DC B 'Reset.wav' ,0
SHALT DC.B 'Halt.wav',0
SSTOP DC.B 'Stop.wav',0
SSTART DC.B 'Start.wav' ,0
SCLEAR DC.B 'Clear wav' ,0
END $1000

The source code of the program is shown above, we implcmcnt contra I the flow of the program
with two flags defined in bit 0 and bit I in D7 where bit 0 is count flag, bit I is display flag. Thus the
four interrupt button is changing the flags to its desired state. Example is START button is changing
both flag to' I' which means both counting and displaying will be performed.
I
The delay time for this program is dependent on the speed of the processor and can be defined by
the formula, DELAY CONSTANT= (SPEED/10-1044)/18. Delay Constant refers to the time of
delay, or number of subtracting loop in delay function. Speed is processor speed in Hertz or cycles per

I
July 2010 SECIG3

second. Divide by IO is to get the speed unit into cycles per 0.1 second. I 044 is the number of bus
cycles in without any delay while 18 is number of bus cycles per one loop of delay. By substituting in
the processor speed, we can get the delay constant for 0.1 second, which means every count will be
performed for each 0.1 second. Thus, this Stop Watch program can be calibrated to run in any
processor speed.
In addition, this program has display sensitivity of 0.1 second. However counting sensitivity is
depends on the delay constant, which depends on the speed of processor. As an example, for delay
constant of I 0000, when we push the STOP button at halfway of delay, let's say when the delay
constant is subtracting and stop at 5000. After the START button is pressed, the delay will continue
from delay constant of 5000, and in this case the sensitivity of counting is approximate to 0.1/10000 I
seconds, which is 0.1 micro seconds.

4. CONCLUSIONS
In conclusion, this experiment simulates a stopwatch using EASy68K with function START,
STOP, CLEAR, HALT and RESET. All the functions is able to implement by using interrupt and
reset of EASy68K but one component which is the stopwatch that accurate with real time clock is not
able to implement correctly. This is due to the different processing speed of each computer. Hence,
the stopwatch is not able to perform accurate to the real time clock at different kind of computer, the
delay constant need to be adjusted for each type of processing speed.

5. REFERENCES
[I] James L. Antonakos. (2004). The 68000 Microprocessor: Hardware and Software Principles
and Application: Fifth Edition. Pearson: Prentice Hall.
[2] "Motorola 68000." Wikipedia, the free encyclopedia. 20 July, 2010.
<http://cn.wikipedia.org/wiki/Motoro1a_68000>
[3] "Motorola 68000." The Free Dictionary By Farlex. 20 July, 2010. I
<http://cncyclopedia2.thcfrccdictionary.com/68000+Microproccssor>
[4] Lee Davison. "EASy68K Example programmes." EASy68K. 23 July, 2010.
<http://membcrs.multimania.co.uk/leeedavison/68k/easy68k/indcx.html>
[5] Huntmine. "Stop Watch for Motorola 68hc l2 Microprocessor." Eadaboard.com. 23 July
20I0. <http://www.edaboard.com/ftopic46655.html>
[6] "The 68000 Architecture." OpcnSourceProject.org.cn. 27 July, 2010.
<http://book.opensourceproject.org.c1-.Jcmbcddcd/oreillycdsignbcd/opensourcc/0596003625/dbhardwa
re-chp-7-scct-1.html>

July 2010 SECIG3

6. APPENDICES

A B C D
ILP2 ILP, ILPo
(START) (CLEAR) (STOP) (HALT)
0 0 0 0 0 0 0
0 0 0 I 0 0 I
0 0 I 0 0 I 0
0 0 I I 0 0 0
0 I 0 0 0 I I
0 I 0 I 0 0 0
0 I I 0 0 0 0
0 I I I 0 0 0
I 0 0 0 I 0 0
I 0 0 I 0 0 0
' " ' " " " " I
 I V I V V V V

I 0 I I 0 0 0
I I 0 0 0 0 0
I I 0 I 0 0 0
I I I 0 0 0 0
I I I I 0 0 0
Table 01: The truth table for three interrupt inputs (active high).

AB AB
CD 00 01 11 10 CD 00 01 11 10
00 0 0 0 1 00 0 1 0 0

01 0 0 0 0 01 0 0 0 0

11 0 0 0 0 11 0 0 0 0

10 0 0 0 0 10 l 0 0 0

ILP1 = ADEi> + ABCD

AB
CD 00 01 11 10
00 0 1 0 0
01 l 0 0 0 I
11 0 0 0 0
10 0 0 0 0

ILP0 ~ ABCD + AfiCD

Figure 04: K-Maps for the true table of Table O I (SOP).

July 2010 SECIG3

("Main Program
Delay

Display

Calculate & send

I

Calculate & send

Yes

Calculate & send

value to seven
segment second

Calculate & send

value to seven

Calculate & send

value to seven

Yes

No
I RTS RTS
 '--
Counting
I

Figure 05: The flowchart for Main program, Delay, and Display.

I
10

July 2010 SECIG3

Interrupt Interrupt Interrupt Interrupt

Level 4 Level 3 Level 2 Level 1

IP4 IP3 IP2 IP1

Play Play Play Play

Start sound Clear sound Stop sound Halt sound

I
Start Clear Slop Hatt

RTE RTE RTE RTE

Start Halt

Clear
Set flag D7==3
Display flag

C RTS '
- �)

No

RTS
 Figure 06: The flowchan for interrupt from level 4 to level I.

11
I

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