CHRIST THE KING ENGINEERING COLLEGE

Affiliated to Anna University, Chennai and Approved by AICTE, New Delhi

Karamadai, Coimbatore – 641104
B.E./B.Tech. - DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING
THIRD SEMESTER
EC3352 – DIGITAL SYTEMS DESIGN
MCQ TEST – III
(REGULATION 2021)
Answer All the Questions Date:
Each Question Carries 0.5 Marks of Total 10 Marks
Name of the Student : Marks Awarded
Reg. No. :
Year :
Semester : Signature of the Faculty

1. What will be the output from a D flip-flop if D = 1 and the clock is low?
a. No change b. Toggle between 0 and 1 c. 0 d. 1
2. What characteristic will a TTL digital circuit possess due to its multi-emitter transistor?
a. Low capacitance b. High capacitance c. Low inductance d. High inductance
3. What input should be given to “S” when SR flip – flop is converted to JK flip – flop?
a. K.Q b. K.Q c. J.Q d. J.Q
4. What value is to be considered for a “don’t care condition”?
d. Any number except 0
a. 0 b. 1 c. Either 0 or 1
and 1
5. What is the group of 1s in 4 cells of a K – map called?
a. Pair b. Quad c. Octet d. Octave
What will be the frequency of the output from a JK flip – flop, when J = 1, K = 1, and a clock with pulse
6.
waveform is given?
a. Half the frequency of b. Equal to the frequency c. Twice the frequency of d. Independent of the
clock input of clock input clock input frequency of clock input
What gate is placed between clock input and the input of AND gate to convert a positive level triggered flip –
7.
flop to a negative level triggered flip – flop?
a. NOR gate b. NOT gate c. Buffer d. NAND gate
8. In Digital Circuits, which of the following options represent the synchronous control inputs in a T flip flop?
a. T b. 0 c. Clock d. 1
9. What will a TTL digital circuit possess due to the presence of a multi – emitter transistor?
a. Smaller resistance b. Larger area c. Smaller area d. Larger resistance
10. How must the output of a gate act when it is LOW in a TTL circuit?
a. Acts as a voltage source b. Acts as a current sink c. Acts as a current source d. Acts as a voltage sink

Prepared By Verified by Approved by

Mr. T. ARUN – AP/ECE HoD/ ECE Principal