StrongIRFET

IRF8301MTRPbF
DirectFET™ Power MOSFET ‚
Typical values (unless otherwise specified)
l Ultra-low RDS(on)
VDSS VGS RDS(on) RDS(on)
l Low Profile (<0.7 mm)
l Dual Sided Cooling Compatible  30V max ±20V max 1.3mΩ@10V 1.9mΩ@ 4.5V
l Ultra-low Package Inductance
l Optimized for high speed switching or high current
switch (Power Tool)
l Low Conduction and Switching Losses
l Compatible with existing Surface Mount Techniques 
DirectFET™ ISOMETRIC
MT

Applicable DirectFET Outline and Substrate Outline (see p.7,8 for details)
SQ SX ST MQ MX MT MP
Description
The IRF8301MPbF combines the latest HEXFET® Power MOSFET Silicon technology with the advanced DirectFETTM packaging to achieve
very low on-state resistance in a package that has the footprint of an SO-8 or a PQFN 5x6mm and only 0.7mm profile. The DirectFET
package is compatible with existing layout geometries used in power applications, PCB assembly equipment and vapor phase, infra-red or
convection soldering techniques, when application note AN-1035 is followed regarding the manufacturing methods and processes. The
DirectFET package allows dual sided cooling to maximize thermal transfer in power systems, improving previous best thermal resistance by
80%.

The IRF8301MPbF balances both low resistance and low charge along with ultra low package inductance to reduce both conduction and
switching losses. The reduced total losses and very high current carrying capability make this product ideal for power tools.

Ordering Information
Base Part Number Package Type Standard Pack Orderable Part Number
Form Quantity
IRF8301MPbF DirectFET MT Tape and Reel 4800 IRF8301MTRPbF

Absolute Maximum Ratings

Parameter Max. Units
VGS Gate-to-Source Voltage ±20
ID @ T A = 25°C Continuous Drain Current, VGS @ 10V e 34
ID @ T A = 70°C Continuous Drain Current, VGS @ 10V e 27 A
ID @ T C = 25°C Continuous Drain Current, VGS @ 10V f 192
IDM Pulsed Drain Currentg 250
EAS Single Pulse Avalanche Energy h 260 mJ
IAR Avalanche Currentg 25 A

6 5.0
VGS, Gate-to-Source Voltage (V)

ID = 32A ID= 25A VDS= 24V

5
Typical RDS(on) (mΩ)

4.0
VDS= 15V
4
3.0
3
T J = 125°C 2.0
2

1 1.0
T J = 25°C
0 0.0
0 5 10 15 20 0 10 20 30 40 50 60
QG, Total Gate Charge (nC)
VGS, Gate -to -Source Voltage (V)

Fig 1. Typical On-Resistance vs. Gate Voltage Fig 2. Typical Total Gate Charge vs. Gate-to-Source Voltage

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Static @ TJ = 25°C (unless otherwise specified)

Parameter Min. Typ. Max. Units Conditions
BVDSS Drain-to-Source Breakdown Voltage 30 ––– ––– V VGS = 0V, ID = 250µA
∆ΒVDSS/∆TJ Breakdown Voltage Temp. Coefficient ––– 21 ––– mV/°C Reference to 25°C, ID = 1mA
R DS(on) Static Drain-to-Source On-Resistance ––– 1.3 1.5 mΩ VGS = 10V, ID = 32A i
––– 1.9 2.4 VGS = 4.5V, ID = 25A i
VGS(th) Gate Threshold Voltage 1.35 1.7 2.35 V VDS = VGS, ID = 150µA
∆VGS(th)/∆TJ Gate Threshold Voltage Coefficient ––– -6.0 ––– mV/°C
IDSS Drain-to-Source Leakage Current ––– ––– 1.0 µA VDS = 24V, VGS = 0V
––– ––– 150 VDS = 24V, VGS = 0V, TJ = 125°C
IGSS Gate-to-Source Forward Leakage ––– ––– 100 nA VGS = 20V
Gate-to-Source Reverse Leakage ––– ––– -100 VGS = -20V
gfs Forward Transconductance 150 ––– ––– S VDS = 15V, ID = 25A
Qg Total Gate Charge ––– 51 77
Qgs1 Pre-Vth Gate-to-Source Charge ––– 12 ––– VDS = 15V
Qgs2 Post-Vth Gate-to-Source Charge ––– 5.4 ––– nC VGS = 4.5V
Qgd Gate-to-Drain Charge ––– 16 ––– ID = 25A
Qgodr Gate Charge Overdrive ––– 18 ––– See Fig. 15
Qsw Switch Charge (Qgs2 + Qgd) ––– 21 –––
Qoss Output Charge ––– 28 ––– nC VDS = 16V, VGS = 0V
RG Gate Resistance ––– 1.0 3.0 Ω
td(on) Turn-On Delay Time ––– 20 ––– VDD = 15V, VGS = 4.5V i
tr Rise Time ––– 30 ––– ns ID = 25A
td(off) Turn-Off Delay Time ––– 25 ––– RG = 1.8Ω
tf Fall Time ––– 17 ––– See Fig. 17
C iss Input Capacitance ––– 6140 ––– VGS = 0V
C oss Output Capacitance ––– 1270 ––– pF VDS = 15V
C rss Reverse Transfer Capacitance ––– 590 ––– ƒ = 1.0MHz
Diode Characteristics
Parameter Min. Typ. Max. Units Conditions
IS Continuous Source Current ––– ––– 110 MOSFET symbol
(Body Diode) A showing the
ISM Pulsed Source Current ––– ––– 250 integral reverse
(Body Diode) g p-n junction diode.
VSD Diode Forward Voltage ––– 0.77 1.0 V TJ = 25°C, IS = 25A, VGS = 0V i
trr Reverse Recovery Time ––– 27 41 ns TJ = 25°C, IF = 25A
Qrr Reverse Recovery Charge ––– 45 68 nC di/dt = 500A/µs i

Notes:
 Click on this section to link to the appropriate technical paper.
‚ Click on this section to link to the DirectFET Website.
ƒ Surface mounted on 1 in. square Cu board, steady state.
„ TC measured with thermocouple mounted to top (Drain) of part.
Repetitive rating; pulse width limited by max. junction temperature.
† Starting TJ = 25°C, L = 0.82mH, RG = 25Ω, IAS = 25A.
‡ Pulse width ≤ 400µs; duty cycle ≤ 2%.

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Absolute Maximum Ratings

Parameter Max. Units
PD @TA = 25°C Power Dissipation e 2.8 W
PD @TA = 70°C Power Dissipation e 1.8
PD @TC = 25°C Power Dissipation f 89
TP Peak Soldering Temperature 270 °C
TJ Operating Junction and -40 to + 150
TSTG Storage Temperature Range

Thermal Resistance
Parameter Typ. Max. Units
RθJA Junction-to-Ambient el ––– 45
RθJA Junction-to-Ambient jl 12.5 –––
RθJA Junction-to-Ambient kl 20 ––– °C/W
RθJC Junction-to-Case fl ––– 1.4
RθJ-PCB Junction-to-PCB Mounted 1.0 –––
Linear Derating Factor e 0.022 W/°C

100

D = 0.50
10 0.20
Thermal Response ( Z thJA )

0.10
0.05
1 0.02
0.01

0.1

0.01 Notes:
SINGLE PULSE
( THERMAL RESPONSE ) 1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthja + Tc
0.001
1E-006 1E-005 0.0001 0.001 0.01 0.1 1 10 100 1000
t1 , Rectangular Pulse Duration (sec)

Fig 3. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient ƒ

10
Thermal Response ( Z thJC ) °C/W

1
D = 0.50

0.20
0.10
0.1
0.05
0.02
0.01
0.01
SINGLE PULSE Notes:
( THERMAL RESPONSE ) 1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
0.001
1E-006 1E-005 0.0001 0.001 0.01 0.1 1
t1 , Rectangular Pulse Duration (sec)

Fig 4. Maximum Effective Transient Thermal Impedance, Junction-to-Case

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Notes:
ˆ Used double sided cooling , mounting pad with large heatsink. Š Rθ is measured at TJ of approximately 90°C.
‰ Mounted on minimum footprint full size board with metalized
back and with small clip heatsink.

ƒ Surface mounted on 1 in. square Cu ‰ Mounted to a PCB with ‰ Mounted on minimum

(still air). small clip heatsink (still air) footprint full size board with
metalized back and with small
clip heatsink (still air)

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 IRF8301MTRPbF
1000 1000
VGS VGS
TOP 10V TOP 10V
5.0V 5.0V
4.5V 4.5V
ID, Drain-to-Source Current (A)

ID, Drain-to-Source Current (A)

4.0V 4.0V
100 3.5V 3.5V
3.0V 3.0V
2.8V 100 2.8V
BOTTOM 2.5V BOTTOM 2.5V

10

2.5V
10
2.5V
1

≤60µs PULSE WIDTH ≤60µs PULSE WIDTH

Tj = 25°C Tj = 150°C
0.1 1
0.1 1 10 100 0.1 1 10 100
VDS, Drain-to-Source Voltage (V) V DS, Drain-to-Source Voltage (V)
Fig 5. Typical Output Characteristics Fig 6. Typical Output Characteristics

1000 2.0
VDS = 15V ID = 32A
≤60µs PULSE WIDTH
V GS = 10V
ID, Drain-to-Source Current (A)

Typical RDS(on) (Normalized)

100 V GS = 4.5V
1.5
T J = 150°C
T J = 25°C
10
T J = -40°C

1.0
1

0.1 0.5
1.0 1.5 2.0 2.5 3.0 3.5 4.0 -60 -40 -20 0 20 40 60 80 100 120 140 160
T J , Junction Temperature (°C)
VGS, Gate-to-Source Voltage (V)
Fig 7. Typical Transfer Characteristics Fig 8. Normalized On-Resistance vs. Temperature

100000 5
VGS = 0V, f = 1 MHZ Vgs = 3.5V T J = 25°C
C iss = C gs + C gd, C ds SHORTED Vgs = 4.0V
C rss = C gd Vgs = 4.5V
4 Vgs = 5.0V
C oss = C ds + C gd
Vgs = 8.0V
Typical RDS(on) ( mΩ)

Vgs = 10V
C, Capacitance(pF)

10000
Ciss 3

Coss 2
1000
Crss
1

100 0
0 50 100 150 200
1 10 100
VDS, Drain-to-Source Voltage (V) ID, Drain Current (A)

Fig 9. Typical Capacitance vs.Drain-to-Source Voltage Fig 10. Typical On-Resistance vs.
Drain Current and Gate Voltage

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1000 1000
OPERATION IN THIS AREA
LIMITED BY R DS(on)

ID, Drain-to-Source Current (A)

ISD, Reverse Drain Current (A)

T J = 150°C 100µsec
100 100 10msec
T J = 25°C 1msec
T J = -40°C DC

10 10

1 1
Tc = 25°C
Tj = 150°C
VGS = 0V Single Pulse
0 0.1
0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 0 1 10 100
VSD, Source-to-Drain Voltage (V) VDS, Drain-to-Source Voltage (V)
Fig 11. Typical Source-Drain Diode Forward Voltage Fig 12. Maximum Safe Operating Area

200 3.0

Typical VGS(th) Gate threshold Voltage (V)

160 2.5
ID, Drain Current (A)

120 2.0

ID = 100µA
80 1.5
ID = 150µA
ID = 250µA
1.0 ID = 1.0mA
40
ID = 1.0A

0.5
0
-75 -50 -25 0 25 50 75 100 125 150
25 50 75 100 125 150
T J , Temperature ( °C )
T C , Case Temperature (°C)

Fig 13. Maximum Drain Current vs. Case Temperature Fig 14. Typical Threshold Voltage vs. Junction
Temperature
1200
EAS , Single Pulse Avalanche Energy (mJ)

ID
TOP 2.7A
1000
3.9A
BOTTOM 25A
800

600

400

200

0
25 50 75 100 125 150
Starting T J , Junction Temperature (°C)

Fig 15. Maximum Avalanche Energy vs. Drain Current

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Id
Vds

Vgs

L
VCC
DUT
0
Vgs(th)
1K
S
20K

Qgodr Qgd Qgs2 Qgs1

Fig 16a. Gate Charge Test Circuit Fig 16b. Gate Charge Waveform

V(BR)DSS
15V
tp

L DRIVER
VDS

RGSG
V D.U.T +
- VDD
IAS A
20V
tp 0.01Ω I AS

Fig 17a. Unclamped Inductive Test Circuit Fig 17b. Unclamped Inductive Waveforms

RD
VDS VDS
90%
VGS
D.U.T.
RG
+
- V DD

VGS
10%
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 % VGS
td(on) tr t d(off) tf

Fig 18a. Switching Time Test Circuit Fig 18b. Switching Time Waveforms

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Driver Gate Drive

P.W.
D.U.T P.W.
Period D=
Period
+
***
VGS=10V
ƒ Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
- • Low Leakage Inductance D.U.T. ISD Waveform
Current Transformer
+
Reverse
‚ Recovery Body Diode Forward
-
„ + Current Current
- di/dt
D.U.T. VDS Waveform
Diode Recovery
 dv/dt
VDD
*
RG • dv/dt controlled by RG V DD Re-Applied
+
• Driver same type as D.U.T. ** Voltage Body Diode Forward Drop
• ISD controlled by Duty Factor "D" - Inductor Curent
• D.U.T. - Device Under Test

Ripple ≤ 5% ISD

* Use P-Channel Driver for P-Channel Measurements *** VGS = 5V for Logic Level Devices
** Reverse Polarity for P-Channel
Fig 19. Diode Reverse Recovery Test Circuit for HEXFET® Power MOSFETs

DirectFET™ Board Footprint, MT Outline

(Medium Size Can, T-Designation).
Please see DirectFET application note AN-1035 for all details regarding the assembly of DirectFET.
This includes all recommendations for stencil and substrate designs.

G = GATE
D = DRAIN
S = SOURCE

D D
S
G
S
D D

Note: For the most current drawing please refer to IR website at http://www.irf.com/package/

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DirectFET™ Outline Dimension, MT Outline

(Medium Size Can, T-Designation).
Please see DirectFET application note AN-1035 for all details regarding the assembly of DirectFET. This includes
all recommendations for stencil and substrate designs.

DIMENSIONS
METRIC IMPERIAL
CODE MIN MAX MIN MAX
A 6.25 6.35 0.246 0.250
B 4.80 5.05 0.189 0.199
C 3.85 3.95 0.152 0.156
D 0.35 0.45 0.014 0.018
E 0.78 0.82 0.031 0.032
F 0.88 0.92 0.035 0.036
G 1.78 1.82 0.070 0.072
H 0.98 1.02 0.039 0.040
J 0.63 0.67 0.025 0.026
K 0.88 1.01 0.035 0.039
L 2.46 2.63 0.097 0.104
M 0.616 0.676 0.0235 0.0274
R 0.020 0.080 0.0008 0.0031
P 0.08 0.17 0.003 0.007

DirectFET™ Part Marking

Note: For the most current drawing please refer to IR website at http://www.irf.com/package/

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DirectFET™ Tape & Reel Dimension (Showing component orientation).

LOADED TAPE FEED DIRECTION

8301

NOTE: Controlling dimensions in mm

Std reel quantity is 4800 parts. (ordered as IRF8301MTRPbF
IRF6726MTRPBF). For 1000 parts on 7"
l d IRF6726MTR1PBF
Z>/DE^/KE^
^dEZKWd/KE Ydz DIMENSIONS

K DdZ/ /DWZ/> METRIC IMPERIAL

D/E Dy D/E Dy
NOTE: CONTROLLING
CODE MIN MAX MIN MAX
DIMENSIONS IN MM
 E E A 7.90 8.10 0.311 0.319

 E E
B 3.90 4.10 0.154 0.161
C 11.90 12.30 0.469 0.484
 D 5.45 5.55 0.215 0.219
 E E E 5.10 5.30 0.201 0.209
 E E F 6.50 6.70 0.256 0.264

& E E G 1.50 N.C 0.059 N.C

'
H 1.50 1.60 0.059 0.063

Note: For the most current drawing please refer to IR website at http://www.irf.com/package/

Revision History
Date Comments
09/05/2013 •Added the StrongIRFET logo on the top of the part number, on page 1.

IR WORLD HEADQUARTERS: 101 N. Sepulveda Blvd., El Segundo, California 90245, USA

To contact International Rectifier, please visit http://www.irf.com/whoto-call/

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IMPORTANT NOTICE
The information given in this document shall in no
event be regarded as a guarantee of conditions or
characteristics (“Beschaffenheitsgarantie”) .
With respect to any examples, hints or any typical
values stated herein and/or any information
regarding the application of the product, Infineon
Technologies hereby disclaims any and all
warranties and liabilities of any kind, including
without limitation warranties of non-infringement
of intellectual property rights of any third party.
In addition, any information given in this document
is subject to customer’s compliance with its
obligations stated in this document and any
applicable legal requirements, norms and
standards concerning customer’s products and any
use of the product of Infineon Technologies in
customer’s applications.
The data contained in this document is exclusively
intended for technically trained staff. It is the
responsibility of customer’s technical departments
to evaluate the suitability of the product for the
intended application and the completeness of the
product information given in this document with
respect to such application.
For further information on the product, technology,
delivery terms and conditions and prices please
contact your nearest Infineon Technologies office
(www.infineon.com).
WARNINGS
Due to technical requirements products may
contain dangerous substances. For information on
the types in question please contact your nearest
Infineon Technologies office.
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Technologies in a written document signed by
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Technologies, Infineon Technologies’ products may
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