Advanced Power MOSFET SSS10N60A

FEATURES
BVDSS = 600 V
Avalanche Rugged Technology
Rugged Gate Oxide Technology
RDS(on) = 0.8 Ω
Lower Input Capacitance ID = 5.1 A
Improved Gate Charge
Extended Safe Operating Area
Lower Leakage Current : 25 µA (Max.) @ VDS = 600V
TO-220F
Low RDS(ON) : 0.646 Ω (Typ.)

1
2
3

1.Gate 2. Drain 3. Source

Absolute Maximum Ratings

Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 600 V
o
Continuous Drain Current (TC=25 C) 5.1
ID o A
Continuous Drain Current (TC=100 C) 3.2
IDM Drain Current-Pulsed O
1 36 A
VGS Gate-to-Source Voltage +
_ 30 V
EAS Single Pulsed Avalanche Energy O
2 709 mJ
IAR Avalanche Current O1 5.1 A
EAR Repetitive Avalanche Energy O1 5 mJ
dv/dt Peak Diode Recovery dv/dt O3 3.0 V/ns
o
Total Power Dissipation (TC=25 C) 50 W
PD
Linear Derating Factor 0.4 W/ oC
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range
o
Maximum Lead Temp. for Soldering C
TL 300
Purposes, 1/8 “ from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
R θ JC Junction-to-Case -- 2.5 o
C /W
R θ JA Junction-to-Ambient -- 62.5

Rev. B

©1999 Fairchild Semiconductor Corporation

 N-CHANNEL
SSS10N60A POWER MOSFET

Electrical Characteristics (TC=25oC unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 600 -- -- V VGS=0V,ID=250µ A
∆BV/∆TJ V/ C ID=250 µ A
o
Breakdown Voltage Temp. Coeff. -- 0.66 -- See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250 µA
Gate-Source Leakage , Forward -- -- 100 VGS=30V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-30V
-- -- 25 VDS=600V
IDSS Drain-to-Source Leakage Current µA VDS=480V,TC=125 C
o
-- -- 250
Static Drain-Source
RDS(on) -- -- 0.8 Ω VGS=10V,ID=2.55A O
4
On-State Resistance
gfs Forward Transconductance -- 6.23 -- Ω VDS=50V,ID=2.55A O
4
Ciss Input Capacitance -- 1750 2270
VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 190 220 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 78 90
td(on) Turn-On Delay Time -- 20 50
VDD=300V,ID=10A,
tr Rise Time -- 23 55
ns RG=6.2 Ω
td(off) Turn-Off Delay Time -- 85 180
See Fig 13 O
4 O
5
tf Fall Time -- 30 70
Qg Total Gate Charge -- 74 95 VDS=480V,VGS=10V,
Qgs Gate-Source Charge -- 12 -- nC ID=10A
Qgd Gate-Drain( “Miller “) Charge -- 35.4 -- See Fig 6 & Fig 12 O
4 O
5

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 5.1 Integral reverse pn-diode
A
ISM Pulsed-Source Current O
1 -- -- 36 in the MOSFET
VSD Diode Forward Voltage O4 -- -- 1.4 V TJ=25oC,IS=5.1A,VGS=0V
trr Reverse Recovery Time -- 440 -- ns TJ=25oC,IF=10A
Qrr Reverse Recovery Charge -- 4.7 -- µC diF/dt=100A/µ s O
4

Notes ;
O1 Repetitive Rating : Pulse Width Limited by Maximum Junction Temperature
2 L=50mH, I =5.1A, V =50V, R =27Ω , Starting T =25 C
o
O AS DD G J

O3 ISD <_10A, di/dt <_150A/ µs, VDD <_BVDSS , Starting T J =25 C

o

O4 Pulse Test : Pulse Width = 250 µs, Duty Cycle < _ 2%

O5 Essentially Independent of Operating Temperature
 N-CHANNEL
POWER MOSFET SSS10N60A
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
VGS

[A]
Top : 15V
[A]

10 V
8.0 V
101 7.0 V 101

ID , Drain Current
ID , Drain Current

6.0 V
5.5 V
5.0 V
Bottom : 4.5 V
150 oC

100 100

25 oC @ Notes :
1. VGS = 0 V
@ Notes : 2. VDS = 50 V
1. 250 µs Pulse Test 3. 250 µs Pulse Test
- 55 oC
2. TC = 25 oC
10-1 10-1
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]
[A]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
Drain-Source On-Resistance

2.0
IDR , Reverse Drain Current

1.5 101
RDS(on) , [Ω ]

VGS = 10 V

1.0

100

VGS = 20 V
0.5
@ Notes :
150 oC 1. VGS = 0 V
@ Note : TJ = 25 oC 25 oC 2. 250 µs Pulse Test

0.0 10-1
0 10 20 30 40 0.2 0.4 0.6 0.8 1.0 1.2 1.4
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
3000
[V]

Ciss= Cgs+ Cgd ( Cds= shorted )

Coss= Cds+ Cgd VDS = 120 V
10
[pF]

Crss= Cgd
VGS , Gate-Source Voltage

VDS = 300 V
C iss
2000 VDS = 480 V
Capacitance

5
1000
C oss @ Notes :
1. VGS = 0 V
C rss 2. f = 1 MHz

@ Notes : ID = 10.0 A
00 0
10 101 0 20 40 60 80
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 N-CHANNEL
SSS10N60A POWER MOSFET
Drain-Source Breakdown Voltage

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

1.2 3.0

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
2.5
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 5.0 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
TJ , Junction Temperature [ oC] TJ , Junction Temperature [ oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
6
[A]

[A]

Operation in This Area

102 is Limited by R DS(on)
ID , Drain Current

ID , Drain Current

10 µs
100 µs 4
101
1 ms
10 ms
100 ms
100 DC

2
@ Notes :
10-1 1. TC = 25 oC
2. TJ = 150 oC
3. Single Pulse
10-2 0
100 101 102 103 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [ oC]

Fig 11. Thermal Response

Thermal Response

D=0.5
100

0.2
@ Notes :
0.1 1. Zθ J C (t)=2.5 o
C/W Max.
0.05 2. Duty Factor, D=t1 /t2
10- 1 3. TJ M -TC =PD M *Zθ J C (t)
0.02
ZθJC(t) ,

0.01 PDM

t1
single pulse
t2
10- 2

10- 5 10- 4 10- 3 10- 2 10- 1 100 101

t 1 , Square Wave Pulse Duration [sec]
 N-CHANNEL
POWER MOSFET SSS10N60A
Fig 12. Gate Charge Test Circuit & Waveform

“ Current Regulator ”
VGS
Same Type
50KΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (IG) Current Sampling (ID)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated VDS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 N-CHANNEL
SSS10N60A POWER MOSFET

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS • dv/dt controlled by “RG”

• IS controlled by Duty Factor “D”

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
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In Design product development. Specifications may change in
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