Analog circuit

Review of working of MOSFET

Ankesh Jain
Assistant Professor

Indian Institute of Technology, Delhi

New Delhi 110016
 MOS Transistor
§ NMOS transistor : It’s a four-terminal device

G
S D B
+ + +
n n p
p

2
 MOSCAP
§ MOS capacitor

C Accumulation Depletion Inversion

G Ci
S D B

n +
n +
p+
p

VFB 0 VT VGS

3
 MOS I-V Characteristic
§ MOS transistor : It’s a four-terminal device

VDS

VGS

G
S D B
+ + +
n n p
p
4
 MOS I-V Characteristic
§ MOS transistor : It’s a four-terminal device

NMOS PMOS NMOS PMOS

NMOS PMOS 5
 MOS I-V Characteristic
§ MOS transistor : It’s a four-terminal device

VDS
§ 𝐼𝐺𝑆 = 0
VGS § 𝑉𝐺𝑆 < 𝑉𝑇 : Cutoff region
§ 𝑉𝐺𝑆 ≥ 𝑉𝑇 :
G
S D B § 𝑉𝐷𝑆 ≥ 𝑉𝐷𝑆𝐴𝑇 : Saturation
+ + + § 𝑉𝐷𝑆 < 𝑉𝐷𝑆𝐴𝑇 : linear
n n p
p

6
 MOS I-V Characteristic
§ MOS transistor : It’s a four-terminal device

§ 𝑉𝐺𝑆 < 𝑉𝑇 : Cutoff region

§ 𝐼𝐷𝑆 = 0
§ 𝑉𝐺𝑆 ≥ 𝑉𝑇 , 𝑉𝐷𝑆 ≥ 𝑉𝐷𝑆𝐴𝑇 : Saturation
! &
§ 𝐼𝐷𝑆 = " 𝜇# 𝐶$% '
(𝑉() − 𝑉* )"

§ 𝑉𝐺𝑆 ≥ 𝑉𝑇 , 𝑉𝐷𝑆 < 𝑉𝐷𝑆𝐴𝑇 : linear

&
§ 𝐼𝐷𝑆 = 𝜇# 𝐶$% ((𝑉() −𝑉* )𝑉+) − 0.5(𝑉+) )")
'

7
 MOS I-V Characteristic
§ Boundary of linear and saturation region
! & &
§ 𝜇 𝐶
" # $% '
(𝑉() − 𝑉* )" = 𝜇# 𝐶$% ' ((𝑉() −𝑉* )𝑉+) − 0.5(𝑉+) )")

§ 0.5(𝑉() − 𝑉* )"= ((𝑉() −𝑉* )𝑉+) − 0.5(𝑉+) )")

§ 𝑉() − 𝑉* = 𝑉+)

§ 𝑉( − 𝑉* ≤ 𝑉+ . => Saturation

§ 𝑉( − 𝑉* > 𝑉+ . => Linear

8
 Small signal transconductance
! &
§ 𝐼𝐷 = " 𝜇# 𝐶$% '
(𝑉() − 𝑉* )"

+,! & ",.

§ gm = = 𝜇# 𝐶$% 𝑉() − 𝑉* =
+-"# ' (-!" 0-# )

𝑊
= 2𝜇# 𝐶$% 𝐼𝐷
𝐿

9
 MOS I-V Characteristic
§ Effect of channel length modulation

§ 𝑉𝐺𝑆 ≥ 𝑉𝑇 , 𝑉𝐷𝑆 ≥ 𝑉𝐷𝑆𝐴𝑇 : Saturation

! &
§ 𝐼𝐷 = 𝜇# 𝐶$% 𝑉() − 𝑉* "(1 + 𝜆𝑉𝐷𝑆)
" '

+,.
§ g0 = = 𝜆𝐼𝐷
+-.)

!
§ r0 =
2,.

10
 Small signal equivalent
§ It’s a DC small signal model
§ It has a VCCS and output resistance
§ 𝑔𝑚 is known as small signal transconductance
§ 𝑟0 is known as small signal output impedance
§ In saturation region g𝑚 >> 𝑟0
D
G

gmvGS r0

11
S
 Biasing
VB1 VB2 § 𝑉𝐺𝑆 =?
§ 𝑉𝐷𝑆 =?
R1 R3 § 𝐼𝐷 = ?

ID
§ I𝐺𝑆 = 0
3$
R2 § 𝑉𝐺𝑆 = 𝑉
3% 43$ 5!
§ 𝑉𝐷𝑆 = 𝑉5" − 𝐼. 𝑅6

12
 Load line
VB1 VB2
ID
R1 R3 VB2/R3

ID VGS4

ID1 VGS3
R2
VGS2
VGS1

VB2 VDS

§ Output characteristic of transistor

§ 𝑉𝐷𝑆 = 𝑉," − 𝐼+ 𝑅-
13
 Biasing
VB1 VB2 § Is this biasing scheme
robust?
R1 R3 § 𝐼𝐷 ∝ 𝑉𝑇, 𝜇𝑛𝐶𝑜𝑥, 𝑉𝐵1
§ Square relation makes
voltage biasing more
ID sensitive

R2

14
 Biasing with current
VDD VB2

I R3

???
ID
M1 M2

§ What is gate potential of M1 and M2 ?

§ Does gate potential of M2 will result in 𝐼𝐷 = 𝐼
15
 Biasing with current
VDD VB2

I R3

ID
M1 M2

§ If M1 and M2 are identical transistor

§ I=ID
16
 AC coupling capacitor
VB1 VB2

R1 R3 CCC1
vo
CCC
ID

vin R2

§ AC coupling capacitor 𝐶𝐶𝐶 and 𝐶𝐶𝐶1

§ used to couple AC signal over DC signal
§ Should act like short at signal frequency
17
§ Should act like open at DC
 AC coupling capacitor

R3 CCC1 RL

CCC vo
ID

vin R1||R2

".
§ 𝜔𝑠𝑖𝑔, 𝑚𝑖𝑛 ≫ /
!! (1"||1#)
".
§ 𝜔𝑠𝑖𝑔, 𝑚𝑖𝑛 ≫ /!!"(1$41')
18
 Common source Amplifier
VDD

R1 R3 CCC1 RL
vo
RS CCC
ID

vin
R2

§ Find the operating points

§ Find small signal parameter using operating points
§ Using small signal model find the gain
19
 Common source Amplifier
VDD

R1 R3 CCC1 RL
vo
RS CCC
ID

vin
R2

§ Find the operating points

§ Find VGS, ID, VDS
20
 Common source Amplifier

R3||RL
vo
RS
ID

vin
R2||R1

§ Small signal equivalent

§ Null all DC source
§ Short independent voltage sources
§ Open independent current sources
§ Large capacitors are short circuited 21
 Common source Amplifier

R3||RL
vo
RS
G D

vin gmvgs ro
R2||R1 vgs
S

§ Small signal equivalent

§ Null all DC source
§ Short independent voltage sources
§ Open independent current sources
§ Large capacitors are short circuited 22
 Common source Amplifier
RS G
vo
vin gmvgs ro||R3||RL
R2||R1 vgs

vo = −gmvgs ro ∥ R3 ∥ RL

R2 ∥ 𝑅1
vo = −gmvin
𝑅𝑠 + (R2 ∥ 𝑅1) ro ∥ R3 ∥ RL

vo R2 ∥ 𝑅1
= −gm
vin 𝑅𝑠 + (R2 ∥ 𝑅1) ro ∥ R3 ∥ RL 23
 Common source Amplifier
VDD

R1 R3 CCC1 RL
vo
RS CCC
ID

vin
R2

ωsig ≫ 1/Ccc(RS + (R1| R2 )

ωsig ≫ 1/Ccc1(R3 + RL)
𝜔sig = 10/Ccc(RS + (R1| R2 )
ωsig = 10/Ccc1((R3 ∥ r0) + RL)
24
 Common source Amplifier
VDD

R1 R3 CCC1 RL
VD vo
RS CCC VG ID

vin
R2

§ Higher limit of signal swing

§ VGT = VG + vgs
§ VDT = VD − Avgs
§ Check for the condition of saturation
25
 Common source Amplifier
VDD

R1 R3 CCC1 RL
VD vo
RS CCC VG ID

vin
R2

§ Lower limit of signal swing

§ 0 = ID + gmvgs
56$
§ vgs =
7%
26