Quanta Zr6 RC April 13 2009 Schematics

5 4 3 2 1
BOM MARK
IV@: INT VGA
ZR6 SYSTEM BLOCK DIAGRAM DDR3 PWR
TPS51116 P36
CHARGER
ISL6251 P32
EV@: STUFF FOR EXT VGA THERMAL 3/5V SYS PWR

SP@: STUFF FOR UMA or VGA X'TAL PROTECTION P40 ISL6237 P33
14.318MHz
Penryn 479 Thermal Sensor Fan Driver
REV:C
DISCHARGER CPU CORE PWR
D
CLOCK GENERATOR uFCPGA (G780-1P81U) (G991) P39 OZ8116LN P35
D
P3, P4 P3 P25
ICS:
SELGO: SLG8SP512TTR VGA CORE
+1.05V
P2 OZ8118 P37 UP6111AQDD P34
FSB
667/800/1067 Mhz
NVIDIA EXT_LVDS
N10M-GE1 EXT_CRT CRT
PCIE 16X P24
VRAM DDRII EXT_HDMI SWITCH

DDRIII NB 512MB P17-P23 LVDS
P24
SO-DIMM 0 Dual Channel DDR3 CIRCUIT
Cantiga LVDS INT_LVDS
SO-DIMM 1 667/800 MHz
P16 (GM45/ PM45/ GL40) RGB INT_CRT HDMI
P24 P24
C
P5, P6, P7, P8, P9, P10, P11 C
HDMI switch
INT_HDMI
(PS8101T)
X4 DMI interface P24
HDD (SATA) *1
P25
Ext USB Port x 2
USB 0,1 P26 SATA0
PCI-Express PCIE-1 Mini Card
Int USB Port x 1 ODD (SATA) SATA1 WLAN
USB 7 P26
P25
SB P26
USB 2.0
Bluetooth ICH9M USB8
USB5 P26
B
X'TAL PCIE-6 B
32.768KHz X'TAL
CCD Azalia P12,P13,P14,P15
25MHz
USB11 P24
Media Atheros
LPC Cardreader Giga-LAN
(RTS5159)
(AR8131)
USB2 P30 P28
Audio CODEC EC (WPC775LDG)
(CX20561) P27
P31
X'TAL
32.768KHz
Card Reader Transformer P29
Connector
P30
SPI ROM
P31
RJ45
A
Audio Amplifier MIC Jack Int. MIC P29 A
P27 P27
G1453L P27 Touch Pad K/B COON.
P25 P31
Int. Quanta Computer Inc.

Speaker
P27
PROJECT : ZR6
Size Document Number Rev
1A
Block Diagram
Date: Monday, April 13, 2009 Sheet 1 of 42
5 4 3 2 1
5 4 3 2 1
Clock Generator (CLK)

+3V
BKP1608HS181T_6_1.5A
L44
C645 C399 C637 C635
+3V_CLK
C642 C649 C634

U13
+1V05_CLK
CLK VDD power range 1.05V~3.3V
L26
02
2 VDD_PCI VDD_I/O 12 +1.05V
9 20 BKP1608HS181T_6_1.5A
.1u/10V_4 .1u/10V_4 .1u/10V_4 10u/6.3V_6 VDD_48 VDD_PLL3_I/O C409 C403 C655 C384 C646 C387 C383
16 VDD_PLL3 VDD_SRC_I/O_1 26
*.1u/10V_4 *.1u/10V_4 .1u/10V_4 39 36
VDD_SRC VDD_SRC_I/O_2 10u/6.3V_6 .1u/10V_4 .1u/10V_4 .1u/10V_4
55 VDD_CPU VDD_SRC_I/O_3 45
D C368 33p/50V_4 61 49 .1u/10V_4 *.1u/10V_4 .1u/10V_4 D
VDD_REF VDD_CPU_I/O
1
CG_XIN 60 37 PM_STPCPU# 14
The trace within 500mil XTAL_IN CPU_STOP#
Y2
14.318MHz CG_XOUT PCI_STOP# 38 PM_STPPCI# 14 Pin 56 : It acts as a
59 56 CK_PWRGD 14
XTAL_OUT CKPWRGD/PD# level sensitive strobe
2
C367 33p/50V_4
CPU_0 54 CLK_CPU_BCLK 3 to latch the FS pins
PCI/48M RS=33 ohm when one loading 53
14 SATACLKREQ# R222 475/F_4 SATACLKREQ#_R 1
CPU_0#
51
CLK_CPU_BCLK# 3
CLK_MCH_BCLK 5
and other multiplexed
=22 ohm when two loading LAN_CLKREQ#_R PCI_0/CLKREQ_A# CPU_1_MCH
28 LAN_CLKREQ# R496 475/F_4
PCLK_DEBUG_R
3 PCI_1/CLKREQ_B# CPU_1_MCH# 50 CLK_MCH_BCLK# 5 inputs.
4 PCI_2 SRC_8/CPU_ITP 47
R237 33_4 PCLK_DEBUG_R PCLK_591_R 5 46
26 PCLK_DEBUG PCI_3 SRC_8#/CPU_ITP#
R242 33_4 PCLK_591_R PCLK_PCM_R 6
31 PCLK_591 ^PCI_4/LCDCLK_SEL
R251 33_4 PCLK_ICH_R PCLK_ICH_R 7
13 PCLK_ICH PCIF_5/ITP_EN
CPU_BSEL0 R254 2.2K_4 48
R258 22_4 NC
14 CLKUSB_48 R507 22_4 FSA
30 CLK_Card48 10 USB_48MHz/FS_A
C647 *10p/50V_4 PCLK_DEBUG_R CPU_BSEL1 57 FS_B/TEST_MODE CLK_DREFSSCLK_R
LCDCLK/27M 17
C371 *10p/50V_4 PCLK_591_R CPU_BSEL2 R243 10K_4 18 CLK_DREFSSCLK#_R
R504 33_4 FSC LCDCLK#/27M_SS
14 14M_ICH 62 REF/FS_C/TEST_SEL
C641 *10p/50V_4 PCLK_ICH_R C638 *30p/50V_4
C648 *10p/50V_4 FSA CLK_DREFCLK_R 13 21

SRC_0/DOT_96 SRC_2 CLK_PCIE_SATA 12
CLK_DREFCLK#_R 14 22
SRC_0#/DOT_96# SRC_2# CLK_PCIE_SATA# 12
24 CLK_PCIE_SRC4
SRC_3/CLKREQ_C# T32
+3V CGCLK_SMB 64 25 CLK_PCIE_SRC4#
C SCL SRC_3#/CLKREQ_D# T33 C
CGDAT_SMB 63 27
SDA SRC_4 CLK_PCIE_LAN 28
SRC_4# 28 CLK_PCIE_LAN# 28
SRC_6 41 CLK_PCIE_ICH 13
SRC_6# 40 CLK_PCIE_ICH# 13
Q12 R238 R217 44 CLK_PCIE_SRC7
SRC_7/CLKREQ_F# T30
DMN601K-7 8 43 CLK_PCIE_SRC7#
VSS_PCI SRC_7#/CLKREQ_E# T31
2
10K_4 10K_4 11 30
VSS_48 SRC_9 CLK_PCIE_MINI1 26
15 VSS_I/O SRC_9# 31 CLK_PCIE_MINI1# 26
3 1 CGDAT_SMB 19 34
14,16,26,28 PDAT_SMB VSS_PLL3 SRC_10 CLK_PCIE_3GPLL 6
23 VSS_SRC_1 SRC_10# 35 CLK_PCIE_3GPLL# 6
29 33 CLK_MCH_OE#_C R270 475/F_4
VSS_SRC_2 SRC_11/CLKREQ_H# CLK_MCH_OE# 6
42 32 CLK_PCIE_SRC11# R582 475/F_4 MINI_CLKREQ# 26
+3V VSS_SRC_3 SRC_11#/CLKREQ_G#
52 VSS_CPU
58 RN37
Q11 VSS_REF CLK_DREFCLK_R IV@0_4P2R
1 2 CLK_DREFCLK 6
DMN601K-7 CLK_DREFCLK#_R 3 4 CLK_DREFCLK# 6
2
From GMCH RN38

CLK-GEN_SLG8SP512TTR CLK_DREFSSCLK_R 1 2 IV@0_4P2R
CLK_DREFSSCLK 6
3 1 CGCLK_SMB CLK_DREFSSCLK#_R 3 4
14,16,26,28 PCLK_SMB CLK_DREFSSCLK# 6
RN16
CLK_DREFCLK_R 3 4 EV@0_4P2R
CLK_PCIE_VGA 18
CLK_DREFCLK#_R 1 2 CLK_PCIE_VGA# 18
From Deisceret RN17
CLK_DREFSSCLK_R 3 4 EV@33_4P2R 27M_NONSS 20
B CLK_DREFSSCLK#_R 1 2 B
27M_SS 20
+3V Strap table

CLKREQ_A# Control SRC_0 & SRC_2
CPU Clock select BSEL Frequency Select Table
R494 10K_4 SATACLKREQ#_R
CLKREQ_B# Control LCDCLK & SRC_4
R495 10K_4 LAN_CLKREQ#_R
FSC FSB FSA Frequency
R501 *10K_4 PCLK_DEBUG_R R502 *10K_4 Reserve overclocking
Pin 10/57/62 : For Pin CPU frequency selection 0 0 0 266Mhz
R511 10K_4 CLK_PCIE_SRC11#
0 0 1 133Mhz R246 EV@10K_4 PCLK_PCM_R R500 IV@10K_4

CPU_BSEL0 R252 *short0402
3 CPU_BSEL0 MCH_BSEL0 6
0 1 1 166Mhz
Pin 6 : For Pin 13/14 and 17/18 selection
0 1 0 200Mhz 0 = LCDCLK & DOT96 for internal graphic controller support
CPU_BSEL1 R244 *short0402 1 = 27M & 27M_SS &SRC_0 for external graphic controller support
1 1 0 400Mhz
PCLK_ICH_R R503 10K_4
A A
1 1 1 Reserved
CPU_BSEL2 R499 *short0402
1 0 1 100Mhz
Pin 7 : For Pin 46/47 selection
1 = CPU_ITP
Quanta Computer Inc.
1 0 0 333Mhz
0 = SRC_8 PROJECT : ZR6
CLOCK GENERATOR
1A
CLOCK GENERATOR
5 4 3 2 1
5 4 3 2 1
CPU 1/2 (CPU)

5 H_A#[3..16]
H_A#3
H_A#4
J4
U22A
A[3]# ADS# H1 H_ADS# 5 H_D#[0..15] H_D#[32..47]
03
ADDR GROUP_0
L5 E2 U22B
A[4]# BNR# H_BNR# 5 5 H_D#[0..15] H_D#[32..47] 5
H_A#5 L4 G5 H_D#0 E22 Y22 H_D#32
A[5]# BPRI# H_BPRI# 5 D[0]# D[32]#
H_A#6 K5 H_D#1 F24 AB24 H_D#33
H_A#7 A[6]# H_D#2 D[1]# D[33]# H_D#34
M3 A[7]# DEFER# H5 H_DEFER# 5 E26 D[2]# D[34]# V24
H_A#8 H_D#3 H_D#35
DATA GRP 0
N2 A[8]# DRDY# F21 H_DRDY# 5 G22 D[3]# D[35]# V26
DATA GRP 2
H_A#9 J1 E1 H_D#4 F23 V23 H_D#36
A[9]# DBSY# H_DBSY# 5 D[4]# D[36]#
H_A#10 N3 H_D#5 G25 T22 H_D#37
H_A#11 A[10]# H_D#6 D[5]# D[37]# H_D#38
P5 A[11]# BR0# F1 H_BREQ# 5 E25 D[6]# D[38]# U25
H_A#12 P2 H_D#7 E23 U23 H_D#39
D A[12]# D[7]# D[39]# D
CONTROL
H_A#13 L2 D20 H_IERR# R47 56_4 +1.05V H_D#8 K24 Y25 H_D#40
H_A#14 A[13]# IERR# H_D#9 D[8]# D[40]# H_D#41
P4 A[14]# INIT# B3 H_INIT# 12 G24 D[9]# D[41]# W22
H_A#15 P1 H_D#10 J24 Y23 H_D#42
H_A#16 A[15]# H_D#11 D[10]# D[42]# H_D#43
R1 A[16]# LOCK# H4 H_LOCK# 5 J23 D[11]# D[43]# W24
M1 H_D#12 H22 W25 H_D#44
5 H_ADSTB#0 ADSTB[0]# D[12]# D[44]#
C1 H_D#13 F26 AA23 H_D#45
5 H_REQ#[0..4] RESET# H_CPURST# 5 D[13]# D[45]#
H_REQ#0 K3 F3 H_D#14 K22 AA24 H_D#46
REQ[0]# RS[0]# H_RS#0 5 D[14]# D[46]#
H_REQ#1 H2 F4 H_D#15 H23 AB25 H_D#47
REQ[1]# RS[1]# H_RS#1 5 D[15]# D[47]#
H_REQ#2 K2 G3 J26 Y26
REQ[2]# RS[2]# H_RS#2 5 5 H_DSTBN#0 DSTBN[0]# DSTBN[2]# H_DSTBN#2 5
H_REQ#3 J3 G2 H26 AA26
REQ[3]# TRDY# H_TRDY# 5 5 H_DSTBP#0 DSTBP[0]# DSTBP[2]# H_DSTBP#2 5
H_REQ#4 L1 H25 U22
REQ[4]# 5 H_DINV#0 DINV[0]# DINV[2]# H_DINV#2 5
5 H_A#[17..35] HIT# G6 H_HIT# 5
H_A#17 Y2 E4 H_D#[16..31] H_D#[48..63]
A[17]# HITM# H_HITM# 5 5 H_D#[16..31] H_D#[48..63] 5
H_A#18 U5 H_D#16 N22 AE24 H_D#48
H_A#19 A[18]# XDP_BPM#0 H_D#17 D[16]# D[48]# H_D#49
R3 A[19]# BPM[0]# AD4 T1 K25 D[17]# D[49]# AD24
H_A#20 XDP_BPM#1 H_D#18 H_D#50
ADDR GROUP_1
W6 A[20]# BPM[1]# AD3 T4 P26 D[18]# D[50]# AA21
H_A#21 U4 A[21]# BPM[2]# AD1 XDP_BPM#2 T3 H_D#19 R23 D[19]# D[51]# AB22 H_D#51 Layout note:
H_A#22 Y5 AC4 XDP_BPM#3 T5 H_D#20 L23 AB21 H_D#52
A[22]# BPM[3]# D[20]# D[52]# comp0,2: Zo=27.4ohm, L<0.5"
XDP/ITP SIGNALS
H_A#23 XDP_BPM#4 H_D#21
DATA GRP 1
U1 AC2 T6 M24 AC26 H_D#53
A[23]# PRDY# D[21]# D[53]#
DATA GRP 3
H_A#24 R4 A[24]# PREQ# AC1 XDP_BPM#5 H_D#22 L22 D[22]# D[54]# AD20 H_D#54 comp1,3: Zo=55ohm, L<0.5"
H_A#25 T5 AC5 XDP_TCK Connect it to CPU DBR# is for ITP debug port H_D#23 M23 AE22 H_D#55
H_A#26 A[25]# TCK XDP_TDI H_D#24 D[23]# D[55]# H_D#56
T3 AA6 P25 AF23
H_A#27 W2
A[26]# TDI
AB3 XDP_TDO or CPU interposer (like ICE) to reset the system H_D#25 P23
D[24]# D[56]#
AC25 H_D#57
A[27]# TDO D[25]# D[57]#
H_A#28 W5 A[28]# TMS AB5 XDP_TMS H_D#26 P22 D[26]# D[58]# AE21 H_D#58 Layout note:
H_A#29 Y4 AB6 XDP_TRST# H_D#27 T24 AD21 H_D#59
H_A#30 U2
A[29]# TRST#
C20 SYS_RST# +1.05V H_D#28 R24
D[27]# D[59]#
AC22 H_D#60 DPRSTP# , Daisy Chain
A[30]# DBR# SYS_RST# 14 D[28]# D[60]#
H_A#31 V4 A[31]#
H_D#29 L25 D[29]# D[61]# AD23 H_D#61 (SB>Power>NB>CPU)
H_A#32 W3 H_D#30 T25 AF22 H_D#62
H_A#33 A[32]# H_D#31 D[30]# D[62]# H_D#63
AA4 A[33]# THERMAL N25 D[31]# D[63]# AC23
C H_A#34 AB2 L26 AE25 C
A[34]# 5 H_DSTBN#1 DSTBN[1]# DSTBN[3]# H_DSTBN#3 5
H_A#35 AA3 D21 H_PROCHOT#_D R374 M26 AF24
A[35]# PROCHOT# 5 H_DSTBP#1 DSTBP[1]# DSTBP[3]# H_DSTBP#3 5
V1 A24 H_THERMDA 1K/F_4 N24 AC20
5 H_ADSTB#1 ADSTB[1]# THERMDA 5 H_DINV#1 DINV[1]# DINV[3]# H_DINV#3 5
B25 H_THERMDC
THERMDC H_GTLREF AD26 COMP0 R376 27.4/F_6
12 H_A20M# A6 A20M# GTLREF COMP[0] R26 For Dual Core
PM_THRMTRIP# *1K_4 CPU_TEST1 C23 COMP1
ICH
A5 C7 R54 MISC U26 R375 54.9/F_4

12 H_FERR# FERR# THERMTRIP# TEST1 COMP[1]
C4 R57 *1K_4 CPU_TEST2 D25 AA1 COMP2 R27 27.4/F_6
12 H_IGNNE# IGNNE# TEST2 COMP[2]
T9 CPU_TEST3 C24 Y1 COMP3 R28 54.9/F_4
CPU_TEST4 AF26 TEST3 COMP[3]
12 H_STPCLK# D5 STPCLK# T60 TEST4
C6 H CLK R373 T2 CPU_TEST5 AF1 E5
12 H_INTR LINT0 TEST5 DPRSTP# ICH_DPRSTP# 6,12,35
B4 A22 2K/F_4 T63 CPU_TEST6 A26 B5
12 H_NMI LINT1 BCLK[0] CLK_CPU_BCLK 2 TEST6 DPSLP# H_DPSLP# 12
A3 A21 T8 CPU_TEST7 C3 D24
12 H_SMI# SMI# BCLK[1] CLK_CPU_BCLK# 2 TEST7 DPWR# H_DPWR# 5
2 CPU_BSEL0 B22 BSEL[0] PWRGOOD D6 H_PWRGD 12
M4 RSVD[01] 2 CPU_BSEL1 B23 BSEL[1] SLP# D7 H_CPUSLP# 5
N5 RSVD[02] 2 CPU_BSEL2 C21 BSEL[2] PSI# AE6 PSI# 35
T2 RSVD[03]
V3 Penryn
RSVD[04]
Layout note:
RESERVED
B2 RSVD[05]
D2
D22
RSVD[06] H_GTLREF: Zo=55 ohm
RSVD[07]
D3 RSVD[08] L<0.5", 2/3*VCCP+-2%
F6 RSVD[09]
Penryn
B B
Thermal Trip +1.05V CPU Thermal monitor (THM) +3V XDP PU/PD
+3V
3
R58 SYS_RST# R55 *1K_4

2 Q8
6,14,31,35 DELAY_VR_PWRGOOD
200_6
DMN601K-7 +1.05V
+1.05V VCC_TH
1
C70
XDP_TDO R30 *54.9/F_4
R67 .1u/10V_4
XDP_TDI R31 54.9/F_4
2
56_4
Q7 U5 XDP_TMS R32 54.9/F_4
6,12 PM_THRMTRIP#
PM_THRMTRIP# 1 3 MMBT3904 SYS_SHDN# 33,40
H_THERMDA
31 2ND_MBCLK 8 1 XDP_BPM#5 R29 54.9/F_4
SCLK VCC
31 2ND_MBDATA 7 2 C85 XDP_TCK R34 54.9/F_4
SDA DXP
6 3 2200p_4 XDP_TRST# R33 54.9/F_4
ALERT# DXN
No use Thermal trip CPU side still PU 56ohm.
Processor hot Use Thermal trip can share PU at SB side +3V R68 *10K_4 4 OVERT# GND 5 H_THERMDC
+1.05V No use PROCHOT CPU side still PU 56ohm. 14 THERM_ALERT# R70 *0_4 G780-1P81U XDP_DBRESET# and XDP_TDO
A ADDRESS: 9AH A
Use PROCHOT to optional receiver CPU side PU reserve for XDP
68ohm and through isolat 2.2K ohm to receiver +3V R69 10K_4
R49
side 25 THER_OVERT# GMT AL000780003 Use 2200p
56_4
H_PROCHOT#_D R51 *0_4

WINDBOND AL83L771001 Check Quanta Computer Inc.
H_PROCHOT# 35
PROJECT : ZR6
1A
CPU Host Bus
5 4 3 2 1
5 4 3 2 1
CPU 2/2 (CPU)

A4
A8
A11
A14
U22D
VSS[001]
VSS[002]
VSS[003]
VSS[082]
VSS[083]
VSS[084]
P6
P21
P24
R2
VCC_CORE
A7
A9
U22C
VCC[001] VCC[068] AB20
AB7
VCC_CORE
VCC:38A (Low power type)
VCC:47A (Standard type)
04
VSS[004] VSS[085] VCC[002] VCC[069]
A16 VSS[005] VSS[086] R5 A10 VCC[003] VCC[070] AC7
A19 R22 C25 C49 C50 C48 C26 C487 C488 C62 A12 AC9
VSS[006] VSS[087] VCC[004] VCC[071]
D
A23 VSS[007] VSS[088] R25
*10u/10V_8 10u/6.3V_8 10u/6.3V_8 *10u/10V_8 10u/6.3V_8 *10u/10V_8 *10u/10V_8 *10u/10V_8
A13 VCC[005] VCC[072] AC12 Layout Note: D
AF2 T1 A15 AC13
B6
VSS[008] VSS[089]
T4 A17
VCC[006] VCC[073]
AC15 Inside CPU center cavity in 2 rows
VSS[009] VSS[090] VCC[007] VCC[074]
B8 VSS[010] VSS[091] T23 A18 VCC[008] VCC[075] AC17
B11 VSS[011] VSS[092] T26 A20 VCC[009] VCC[076] AC18
B13 VSS[012] VSS[093] U3 B7 VCC[010] VCC[077] AD7
B16 VSS[013] VSS[094] U6 B9 VCC[011] VCC[078] AD9 VCCP : 2.5A(Supply after VCC Stable)
B19 VSS[014] VSS[095] U21 B10 VCC[012] VCC[079] AD10
B21 U24 B12 AD12 4.5A(Supply before VCC Stable)
VSS[015] VSS[096] VCC[013] VCC[080]
B24 VSS[016] VSS[097] V2 B14 VCC[014] VCC[081] AD14
C5 V5 C489 C495 C496 C497 C23 C480 C59 C483 B15 AD15
VSS[017] VSS[098] VCC[015] VCC[082] +1.05V
C8 VSS[018] VSS[099] V22 B17 VCC[016] VCC[083] AD17
C11 V25 10u/6.3V_8 *10u/10V_8 10u/6.3V_8 *10u/10V_8 *10u/10V_8 10u/6.3V_8 *10u/10V_8 *10u/10V_8 B18 AD18
VSS[019] VSS[100] VCC[017] VCC[084]
C14 VSS[020] VSS[101] W1 B20 VCC[018] VCC[085] AE9
C16 VSS[021] VSS[102] W4 C9 VCC[019] VCC[086] AE10
C19 W23 C10 AE12 C57 C56 C54
VSS[022] VSS[103] VCC[020] VCC[087] + C500
C2 VSS[023] VSS[104] W26 C12 VCC[021] VCC[088] AE13
C22 Y3 C13 AE15 .1u/16V_6 .1u/16V_6 .1u/16V_6
VSS[024] VSS[105] VCC[022] VCC[089] 330u/2V_7343
C25 VSS[025] VSS[106] Y6 C15 VCC[023] VCC[090] AE17
D1 VSS[026] VSS[107] Y21 C17 VCC[024] VCC[091] AE18
D4 VSS[027] VSS[108] Y24 C18 VCC[025] VCC[092] AE20
D8 VSS[028] VSS[109] AA2 D9 VCC[026] VCC[093] AF9
D11 AA5 C53 C52 C479 C482 C66 D10 AF10
VSS[029] VSS[110] VCC[027] VCC[094]
D16 AA11 *10u/10V_8 *10u/10V_8 *10u/10V_8 10u/6.3V_8 10u/6.3V_8 D14 AF14
C VSS[031] VSS[112] VCC[029] VCC[096] C
D23 AA16 D17 AF17 C67 C486 C485
VSS[033] VSS[114] VCC[031] VCC[098]
E3 AA22 E7 AF20 *.1u/16V_6 .1u/16V_6 .1u/16V_6
VSS[035] VSS[116] VCC[033] VCC[100]
E6 VSS[036] VSS[117] AA25 Layout Note: E9 VCC[034]
E8 AB1 E10 G21
E11
VSS[037] VSS[118]
AB4 Place these parts E12
VCC[035] VCCP[01]
V6
VSS[038] VSS[119] VCC[036] VCCP[02]
E14 VSS[039] VSS[120] AB8 reference to Intel demo E13 VCC[037] VCCP[03] J6
E16 AB11 C55 C51 C65 E15 K6
E19
VSS[040] VSS[121]
AB13 board. E17
VCC[038] VCCP[04]
M6
VSS[041] VSS[122] *10u/10V_8 *10u/10V_8 10u/6.3V_8 VCC[039] VCCP[05]
E21 VSS[042] VSS[123] AB16 E18 VCC[040] VCCP[06] J21
E24 VSS[043] VSS[124] AB19 E20 VCC[041] VCCP[07] K21
F5 VSS[044] VSS[125] AB23 F7 VCC[042] VCCP[08] M21
F8 VSS[045] VSS[126] AB26 F9 VCC[043] VCCP[09] N21
F11 VSS[046] VSS[127] AC3 F10 VCC[044] VCCP[10] N6
F13 VSS[047] VSS[128] AC6 F12 VCC[045] VCCP[11] R21
F16 VSS[048] VSS[129] AC8 F14 VCC[046] VCCP[12] R6
F19 VSS[049] VSS[130] AC11 F15 VCC[047] VCCP[13] T21
F2 VSS[050] VSS[131] AC14 F17 VCC[048] VCCP[14] T6
F22 AC16 C63 C64 C60 C61 C492 C490 F18 V21
VSS[051] VSS[132] VCC[049] VCCP[15] +1.5V
F25 VSS[052] VSS[133] AC19 F20 VCC[050] VCCP[16] W21 VCCA:130mA
G4 AC21 *10u/10V_8 *10u/10V_8 10u/6.3V_8 *10u/10V_8 10u/6.3V_8 *10u/10V_8 AA7
VSS[053] VSS[134] VCC[051]
G1 VSS[054] VSS[135] AC24 AA9 VCC[052] VCCA[01] B26
B G23 VSS[055] VSS[136] AD2 AA10 VCC[053] VCCA[02] C26 B
G26 VSS[056] VSS[137] AD5 AA12 VCC[054]
H3 AD8 AA13 AD6 C69 C68
VSS[057] VSS[138] VCC[055] VID[0] H_VID0 35
H6 VSS[058] VSS[139] AD11 AA15 VCC[056] VID[1] AF5 H_VID1 35
H21 AD13 AA17 AE5 .01u/25V_4 10u/6.3V_8
H24 VSS[060] VSS[141] AD16 AA18 VCC[058] VID[3] AF4 H_VID3 35
J2 VSS[061] VSS[142] AD19 AA20 VCC[059] VID[4] AE3 H_VID4 35
J5 AD22 C491 C494 C498 C499 C24 C481 AB9 AF3
J22 VSS[063] VSS[144] AD25 AC10 VCC[061] VID[6] AE2 H_VID6 35
J25 AE1 10u/6.3V_8 10u/6.3V_8 10u/6.3V_8 *10u/10V_8 10u/6.3V_8 *10u/10V_8 AB10 R371 100/F_6 VCC_CORE
VSS[064] VSS[145] VCC[062]
K1 VSS[065] VSS[146] AE4 AB12 VCC[063]
K4 VSS[066] VSS[147] AE8 AB14 VCC[064] VCCSENSE AF7 VCCSENSE 35
K23 VSS[067] VSS[148] AE11 AB15 VCC[065]
K26 VSS[068] VSS[149] AE14 AB17 VCC[066]
L3 VSS[069] VSS[150] AE16 AB18 VCC[067] VSSSENSE AE7 VSSSENSE 35
L6 VSS[070] VSS[151] AE19
L21 AE23 Penryn R372
VSS[071] VSS[152]
L24 VSS[072] VSS[153] AE26 .
M2 A2 + C484 + C493 + C58 + C27 100/F_6
VSS[073] VSS[154]
M5 VSS[074] VSS[155] AF6
M22 AF8 *330u/2V_7343 *330u/2V_7343 *330u/2V_7343 *330u/2V_7343
VSS[075] VSS[156]
M25 VSS[076] VSS[157] AF11 Layout Note:
N1 AF13
N4
VSS[077] VSS[158]
AF16 Z0=27.4,PU/PD L<1"
A VSS[078] VSS[159] A
N23 VSS[079] VSS[160] AF19
N26 VSS[080] VSS[161] AF21
P3 VSS[081] VSS[162] A25
AF25
VSS[163] Quanta Computer Inc.
Penryn Montevina platform : Early Reference Board Schematics Feb 2007. Rev 1.0
. PROJECT : ZR6
stuff 22U*34, NC 22U*2
stuff 330U*2, NC330U*2 Size Document Number Rev
1A
CPU Power
5 4 3 2 1
5 4 3 2 1
GMCH-CANTIGA(CLG)
3 H_D#[0..63]
H_D#0
H_D#1
H_D#2
F2
G8
F8
U28A
H_D#_0
H_D#_1
H_A#_3
H_A#_4
H_A#_5
A14
C15
F16
H13
H_A#3
H_A#4
H_A#5
H_A#6
H_A#[3..35] 3
05
H_D#_2 H_A#_6
QCI P/N H_D#3 E6 H_D#_3 H_A#_7 C18 H_A#7
H_D#4 G2 M16 H_A#8
H_D#5 H_D#_4 H_A#_8 H_A#9
H6 H_D#_5 H_A#_9 J13
D Intel Cantiga (G)M AJSLB940T04 H_D#6 H2 H_D#_6 H_A#_10 P16 H_A#10 D
H_D#7 F6 R16 H_A#11
H_D#8 H_D#_7 H_A#_11 H_A#12
D4 H_D#_8 H_A#_12 N17
Intel Cantiga (P)M AJSLB970T06 H_D#9 H3 H_D#_9 H_A#_13 M13 H_A#13
H_D#10 M9 E17 H_A#14
H_D#11 H_D#_10 H_A#_14 H_A#15
M11 H_D#_11 H_A#_15 P17
Intel Cantiga (G)L A1 AJSLGGM0T04 H_D#12 J1 H_D#_12 H_A#_16 F17 H_A#16
H_D#13 J2 G20 H_A#17
H_D#14 H_D#_13 H_A#_17 H_A#18
N12 H_D#_14 H_A#_18 B19
H_D#15 J6 J16 H_A#19
H_D#16 H_D#_15 H_A#_19 H_A#20
P2 H_D#_16 H_A#_20 E20
H_D#17 L2 H16 H_A#21
H_D#18 H_D#_17 H_A#_21 H_A#22
R2 H_D#_18 H_A#_22 J20
H_D#19 N9 L17 H_A#23
H_D#20 H_D#_19 H_A#_23 H_A#24
L6 H_D#_20 H_A#_24 A17
H_D#21 M5 B17 H_A#25
H_D#22 H_D#_21 H_A#_25 H_A#26
J3 H_D#_22 H_A#_26 L16
H_D#23 N2 C21 H_A#27
H_D#24 H_D#_23 H_A#_27 H_A#28
R1 H_D#_24 H_A#_28 J17
H_D#25 N5 H20 H_A#29
H_D#26 H_D#_25 H_A#_29 H_A#30
N6 H_D#_26 H_A#_30 B18
H_D#27 P13 K17 H_A#31
H_D#28 H_D#_27 H_A#_31 H_A#32
N8 H_D#_28 H_A#_32 B20
H_D#29 L7 F21 H_A#33
C H_D#30 H_D#_29 H_A#_33 H_A#34 C
N10 H_D#_30 H_A#_34 K21
+1.05V H_D#31 M3 L20 H_A#35
H_D#32 H_D#_31 H_A#_35
Y3 H_D#_32
0.3125*VCCP H_D#33
H_D#34
AD14 H_D#_33 H_ADS# H12 H_ADS# 3
Y6 B16
WIDE(10):SPACING(20) , H_D#35 Y10
H_D#_34 H_ADSTB#_0
G17
H_ADSTB#0 3
H_D#_35 H_ADSTB#_1 H_ADSTB#1 3
R90 L<0.5" H_D#36 Y12 H_D#_36 H_BNR# A9 H_BNR# 3
H_D#37 Y14 F11
H_D#_37 H_BPRI# H_BPRI# 3
221/F_4 H_D#38 Y7 G12
HOST
H_D#_38 H_BREQ# H_BREQ# 3
H_D#39 W2 E9
H_D#_39 H_DEFER# H_DEFER# 3
H_SWING H_D#40 AA8 B10
H_D#_40 H_DBSY# H_DBSY# 3
H_D#41 Y9 AH7
H_D#_41 HPLL_CLK CLK_MCH_BCLK 2
H_D#42 AA13 AH6
H_D#_42 HPLL_CLK# CLK_MCH_BCLK# 2
R89 C121 H_D#43 AA9 J11
H_D#_43 H_DPWR# H_DPWR# 3
H_D#44 AA11 F9
H_D#_44 H_DRDY# H_DRDY# 3
100/F_4 .1u/10V_4 H_D#45 AD11 H9
H_D#_45 H_HIT# H_HIT# 3
H_D#46 AD10 E12
H_D#_46 H_HITM# H_HITM# 3
H_D#47 AD13 H11
H_D#_47 H_LOCK# H_LOCK# 3
H_D#48 AE12 C9
H_D#_48 H_TRDY# H_TRDY# 3
H_D#49 AE9
H_D#50 H_D#_49
AA2 H_D#_50
H_D#51 AD8
H_D#52 H_D#_51
AA3 H_D#_52 H_DINV#[3..0] 3
H_D#53 AD3 J8 H_DINV#0
B H_D#54 H_D#_53 H_DINV#_0 H_DINV#1 B
AD7 H_D#_54 H_DINV#_1 L3
H_RCOMP H_D#55 AE14 Y13 H_DINV#2
H_D#56 H_D#_55 H_DINV#_2 H_DINV#3
AF3 H_D#_56 H_DINV#_3 Y1
H_D#57 AC1 H_D#_57 H_DSTBN#[3..0] 3
H_D#58 AE3 L10 H_DSTBN#0
R393 H_D#59 H_D#_58 H_DSTBN#_0 H_DSTBN#1
AC3 H_D#_59 H_DSTBN#_1 M7
Layout Note: H_D#60 AE11 AA5 H_DSTBN#2
24.9/F_4 H_D#61 H_D#_60 H_DSTBN#_2 H_DSTBN#3
AE8 AE6
WIDE(10):SPACING(20) , H_D#62 AG2
H_D#_61 H_DSTBN#_3
H_D#_62 H_DSTBP#[3..0] 3
L<0.5" H_D#63 AD6 H_D#_63 H_DSTBP#_0 L9 H_DSTBP#0
M8 H_DSTBP#1
H_DSTBP#_1 H_DSTBP#2
H_DSTBP#_2 AA6
H_SWING C5 AE5 H_DSTBP#3
H_RCOMP H_SWING H_DSTBP#_3
E3 H_RCOMP H_REQ#[0..4] 3
+1.05V B15 H_REQ#0
H_REQ#_0 H_REQ#1
H_REQ#_1 K13
F13 H_REQ#2
H_REQ#_2 H_REQ#3
H_REQ#_3 B13
C12 B14 H_REQ#4
3 H_CPURST# H_CPURST# H_REQ#_4
R98 E11
3 H_CPUSLP# H_CPUSLP# H_RS#[0..2] 3
2/3*VCCP 1K/F_4 H_RS#_0 B6 H_RS#0
H_RS#1
F12
WIDE(10):SPACING(20), H_RS#_1
C8 H_RS#2
H_RS#_2
A
L<0.5" H_AVREF A11 H_AVREF A
B11 H_DVREF
R102 CANTIGA_PM
C157
2K/F_4 *.1u/10V_4 Quanta Computer Inc.
PROJECT : ZR6
1A
GMCH HOST
5 4 3 2 1
5 4 3 2 1
GMCH-CANTIGA(CLG)
IV@
EV@ +3V_S5
06
U34
Strap table TC7SH08FU
5
U28B 1
4 HWPG_1.5V 31,36
Pin Name Strap description Configuration M36 RSVD1 2
N36 AP24 R577 *short0402 SUSC# 14,31
RSVD2 SA_CK_0 M_CLK0 16
DDR CLK/ CONTROL/COMPENSATION
3
000= FSB 1066MHz R33 RSVD3 SA_CK_1 AT21 M_CLK1 16
R578
CFG[2:0] 010 = FSB 800MHz T33 AV24 12.1K_4 R579 *0_4 SUSB# 14,31
D FSB Frequency Select RSVD4 SB_CK_0 M_CLK2 17 D
011 = FSB 667MHz AH9 RSVD5 SB_CK_1 AU20 M_CLK3 17
AH10 RSVD6
CFG[4:3] Reserved AH12 RSVD7 SA_CK#_0 AR24 M_CLK#0 16
SM_PWROK
AH13 RSVD8 SA_CK#_1 AR21 M_CLK#1 16
0 = DMI X2 K12 AU24 M_CLK#2 17
RSVD9 SB_CK#_0
CFG5 DMI X2 Select 1 = DMI X4(Default) SB_CK#_1 AV20 M_CLK#3 17
R580
10K_4
0 = iTPM Host Interface is enabled SA_CKE_0 BC28 M_CKE0 16
CFG6 iTPM Host Interface 1 = iTPM Host Interface is disabled(Default) SA_CKE_1 AY28 M_CKE1 16
T24 RSVD14 SB_CKE_0 AY36 M_CKE2 17
0 = AMT Firmware will use TLS cipher suite SB_CKE_1 BB36 M_CKE3 17
RSVD
with no confidentiality B31 RSVD15
CFG7 ME TLS Confidentiality BA17
1 = AMT Firmware will use TLS cipher suite SA_CS#_0 M_CS#0 16
M1 RSVD17 SA_CS#_1 AY16 M_CS#1 16
with confidentiality(Default)
SB_CS#_0 AV16 M_CS#2 17 SM_VREF=0.5*VCC_SM
SB_CS#_1 AR13 M_CS#3 17
CFG8 Reserved AY21 RSVD20 SM_PWROK only for
BD17
0 = Reverse Lanes SA_ODT_0
AY17
M_ODT0 16 DDR3.(DDR2 PD only) +1.5VSUS
SA_ODT_1 M_ODT1 16
CFG9 PCIE Graphics Lane Reversal 1 = Normal operation(Default) B2 BF15 M_ODT2 17 SM_DRAMRST# only
RSVD21 SB_ODT_0 M_RCOMP R430 80.6/F_4
BG23 AY13
0 = Enabled BF23
RSVD22 SB_ODT_1 M_ODT3 17 for DDR3.(DDR2:NC) M_RCOMP# R426 80.6/F_4
RSVD23
CFG10 PCIE Loopback enable 1 = Disabled (Default) BH18 RSVD24 SM_RCOMP BG22 M_RCOMP
BF18 BH21 M_RCOMP#
RSVD25 SM_RCOMP#
CFG11 Reserved
BF28 SM_RCOMP_VOH +1.5VSUS
SM_RCOMP_VOH
0 = ALLZ mode enable SM_RCOMP_VOL BH28 SM_RCOMP_VOL
CFG12 ALLZ 1 = disable(Default) SM_VREF R184 10K/F_4
AV42 SM_VREF R194 10K/F_4
SM_VREF
0 = XOR mode enable AR36 SM_PWROK
SM_PWROK
CFG13 XOR 1 = disable(Default) SM_REXT BF17 SM_REXT R108 499/F_4
BC36 DDR3_DRAMRST#
SM_DRAMRST# DDR3_DRAMRST# 16,17
CFG[15:14] Reserved DPLL_REF_CLK B38 CLK_DREFCLK
CLK_DREFCLK 2
DPLL_REF_CLK# A38 CLK_DREFCLK#
CLK_DREFCLK# 2 SM_VREF.Default use voltage divider for
0 = Dynamic ODT disable E41 CLK_DREFSSCLK
C
CFG16 FSB Dynamic ODT 1 = Dynamic ODT Enable(Default)
DPLL_REF_SSCLK
F41 CLK_DREFSSCLK#
CLK_DREFSSCLK 2 poor layout cause +SMDDR_VREF not C
DPLL_REF_SSCLK# CLK_DREFSSCLK# 2
meet spec.And Intel circuit PU/PD is
CFG[18:17] Reserved CLK_PCIE_3GPLL
ME JTAG
F43
PEG_CLK CLK_PCIE_3GPLL 2 1K,But Check list PU/PD is 10K.
CLK
AL34 E43 CLK_PCIE_3GPLL#
ME_JTAG_TCK PEG_CLK# CLK_PCIE_3GPLL# 2
0 = Normal (Default)
CFG19 DMI Lane Reversal 1 = Lanes Reversed AK34 ME_JTAG_TDI DMI_TXN[3:0] 13
0 = Only Digital Display port (SDVO/DP/iHDMI) T21
JTAG_TDO_GMCH AN35
ME_JTAG_TDO DMI_RXN_0 AE41 DMI_TXN0
Digital Display Port or PCIE is operational (Default) AE37 DMI_TXN1
(SDVO/DP/iHDMI) 1 = Digital Display port (SDVO/DP/iHDMI) and T22
JTAG_TMS_GMCHAM35
ME_JTAG_TMS
DMI_RXN_1
DMI_RXN_2 AE47 DMI_TXN2 INTEL FAE Suggest PD for Ext graphics
CFG20 Concurrent with PCIE PCIE are operating simultaneously via PEG DMI_RXN_3 AH39 DMI_TXN3
DMI_TXP[3:0] 13
CLK_DREFCLK# R440 EV@0_4
port AE40 DMI_TXP0 CLK_DREFCLK R444 EV@0_4
DMI_RXP_0 DMI_TXP1 CLK_DREFSSCLK# R199 EV@0_4
2 MCH_BSEL0 T25 CFG_0 DMI_RXP_1 AE38
0 = No SDVO/HDMI Device Present(Default) 2 MCH_BSEL1 R25 CFG_1 DMI_RXP_2 AE48 DMI_TXP2 CLK_DREFSSCLK R198 EV@0_4
SDVO_CTRLDATA SDVO Present 1 = SDVO/HDMI Device present 2 MCH_BSEL2 P25 CFG_2 DMI_RXP_3 AH40 DMI_TXP3
DMI_RXN[3:0] 13
T15 MCH_CFG_3 P20 CFG_3
0 = Digital display(HDMI/DP) device T18 MCH_CFG_4 P24 CFG_4 DMI_TXN_0 AE35 DMI_RXN0
DDPC_CTRLDATA Digital Display Present absent(Default) MCH_CFG_5 C25 AE43 DMI_RXN1
MCH_CFG_6 CFG_5 DMI_TXN_1 DMI_RXN2
1 = Digital display(HDMI/DP) device present N24 CFG_6 DMI_TXN_2 AE46
MCH_CFG_7 M24 AH42 DMI_RXN3
CFG_7 DMI_TXN_3 DMI_RXP[3:0] 13
T16 MCH_CFG_8 E21
MCH_CFG_9 CFG_8 DMI_RXP0 +1.5VSUS
CFG
C23 AD35
DMI
MCH_CFG_10 CFG_9 DMI_TXP_0 DMI_RXP1
C24 CFG_10 DMI_TXP_1 AE44
T17 MCH_CFG_11 N21 AF46 DMI_RXP2 SM_RCOMP_VOH 1K/F_4 R435
MCH_CFG_12 CFG_11 DMI_TXP_2 DMI_RXP3
P21 CFG_12 DMI_TXP_3 AH43
MCH_CFG_13 T21 C565 C563 R434
MCH_CFG_14 CFG_13
T13 R20 CFG_14
T12 MCH_CFG_15 M20 2.2u/6.3V_6 3.01K/F_4
Strap pin MCH_CFG_16
MCH_CFG_17
L21
CFG_15
CFG_16
.01u/25V_4
T14 H21 CFG_17
MCH_CFG_18 P29
GRAPHICS VID
T20 CFG_18
MCH_CFG_19 R28 For EMI SM_RCOMP_VOL
+3V CFG_19 C570 R437
MCH_CFG_20 T28 B33
CFG_20 GFX_VID_0 HDA_BIT_CLK_HDMI
GFX_VID_1 B32
B R153 *4.02K/F_4 MCH_CFG_19 G33 C555 C556 R433 B
R160 *4.02K/F_4 MCH_CFG_20 GFX_VID_2
GFX_VID_3 F33 *10p/50V_4 *22_4
14 PM_SYNC# R29 E33 2.2u/6.3V_6 1K/F_4
PM_SYNC# GFX_VID_4 .01u/25V_4
3,12,35 ICH_DPRSTP# B7 PM_DPRSTP#
16 PM_EXTTS#0 N33 PM_EXT_TS#_0
R146 *2.21K/F_4 MCH_CFG_5 17 PM_EXTTS#1 P32
R138 *2.21K/F_4 MCH_CFG_6 TPM Disable PM_EXT_TS#_1
PM
3,14,31,35 DELAY_VR_PWRGOOD AT40 PWROK GFX_VR_EN C34
+1.05V
R137
R128
*2.21K/F_4
*2.21K/F_4
MCH_CFG_7
13 PLT_RST#
R106
R129
100/F_4
*0_4
RST_IN#_MCH AT11 RSTIN# Check list note : CL_VREF=0.35V
MCH_CFG_9 THRMTRIP#_R T20 NB Thermaltrip
3,12 PM_THRMTRIP# THERMTRIP#
R127 *2.21K/F_4 MCH_CFG_10 R32
14,35 PM_DPRSLPVR DPRSLPVR
R143 *2.21K/F_4 MCH_CFG_12
R132 *2.21K/F_4 MCH_CFG_13 AH37 R169 +1.05V
CL_CLK CL_CLK0 14
R131 *2.21K/F_4 MCH_CFG_16 NB Thermal trip pin CL_DATA AH36 CL_DATA0 14
1K/F_4
BG48 AN36
No use Thermal trip NB side can BF48
NC_1 CL_PWROK
AJ35
MPWROK 14,31
NC_2 CL_RST# CL_RST#0 14
ME
NC.(NB has ODT) BD48 NC_3 CL_VREF AH34 MCH_CLVREF_R R402
BC48 NC_4
PM_DPRSTP# BH47 *10K_4
NC_5 C278 R168
BG47 NC_6
The Daisy chain topology should BE47 N28 DDPC_CTRLCLK
NC_7 DDPC_CTRLCLK
2
BH46 M28 DDPC_DDCDATA .1u/10V_4 511/F_4
be routed from ICH9M to IMVP , NC_8 DDPC_CTRLDATA Q20
BF46 NC_9 SDVO_CTRLCLK G36 SDVO_CTRLCLK 24
then to (G)MCH and CPU, in that TSATN# 3 *MMBT3904
NC
BG45 NC_10 SDVO_CTRLDATA E36 SDVO_CTRLDATA 24 1 TSATN_EC# 31

+3V BH44 K36 CLK_MCH_OE#
order. NC_11 CLKREQ# CLK_MCH_OE# 2
BH43 NC_12 ICH_SYNC# H36 MCH_ICH_SYNC# 14
R175 IV@4.7K_4 SDVO_CTRLDATA BH6
MISC
R181 IV@4.7K_4 SDVO_CTRLCLK NC_13

BH5 NC_14
R162
R163
*2.21K/F_4
*2.21K/F_4
DDPC_DDCDATA BG4 NC_15 TSATN# B12 TSATN# R103 56_4 +1.05V DDPC_CTRL for HDMI port C
DDPC_CTRLCLK BH3
R186 10K_4 CLK_MCH_OE# BF3
NC_16 SDVO_CTRL for HDMI port B
NC_17
BH2 NC_18
BG2 NC_19 HDA_BCLK B28 HDA_BIT_CLK_HDMI
HDA_RST#_HDMI
HDA_BIT_CLK_HDMI 12 If HDMI not support <Checklist ver0.8>
BE2 B30
BG1
NC_20 HDA_RST#
B29 HDA_SDIN_HDMI
HDA_RST#_HDMI 12 HDA --> NC If TSATN# is not used, then it must be terminated
NC_21 HDA_SDI HDA_SDIN_HDMI 12
BF1 NC_22 HDA_SDO C29 HDA_SDOUT_HDMI
HDA_SDOUT_HDMI 12 VCC_HDA-->GND with a 56-Ω pull-up resistor to VCCP.
BD1 A28 HDA_SYNC_HDMI
HDA_SYNC_HDMI 12 Differential signal-->NC
HDA
A +3VSUS NC_23 HDA_SYNC A

BC1 NC_24
F1 NC_25 <Pin out check issue>
R179 10K_4 PM_EXTTS#0 Impact ICH9M VCCHDA and VCCSUSHDA supply 1.5V/3.3V Cantiga EDS 0.7 change Ball B12 to TSATN# from TSATN
R178 10K_4 PM_EXTTS#1 CANTIGA_PM
NOTE:
If (G)MCH's HD Audio signals are connected to ICH9M for
iHDMI, VCCHDA and VCCSUSHDA on ICH9M should be
only on 1.5V. These power pins on ICH9M can be supplied Quanta Computer Inc.
with 3.3V if and only if (G)MCH's HDA is not connected to
ICH9M. Consequently, only 1.5V audio/modem codecs can PROJECT : ZR6
be used on the platform. Size Document Number Rev
1A
GMCH DMI
5 4 3 2 1
5 4 3 2 1
GMCH-CANTIGA(CLG)
IV@
IV&EV Dis/Enable setting
If LVDS no use,all signal can NC
U28C
L<0.5" , If PCIE not support
still connect to +VCC_PEG
+1.05V
07
24 L_BKLT_CTRL L32 L_BKLT_CTRL
G32 T37 EXP_A_COMPX R176 49.9/F_4
EV@ 24 INT_LVDS_BLON
R171 IV@10K_4 L_CTRL_CLK M32
L_BKLT_EN
L_CTRL_CLK
PEG_COMPI
PEG_COMPO T36
D +3V D
R172 IV@10K_4 L_CTRL_DATA M33
SP@ 24 INT_LVDS_EDIDCLK K33
L_CTRL_DATA
L_DDC_CLK PEG_RX#_0 H44 PEG_RXN0
PEG_RXN1
PEG_RXN[15:0] 18
24 INT_LVDS_EDIDDATA J33 L_DDC_DATA PEG_RX#_1 J46
L44 PEG_RXN2 <5/31>Montevina_Schematics_Checklist_Rev0_8
PEG_RX#_2 PEG_RXN3 a)For TVOUT Disabled, TV_DCONSEL[1:0] Connect to GND. But
24 INT_LVDS_DIGON PEG_RX#_3 L40
M29 N41 PEG_RXN4 design guide Rev0.7 show NC.What is correct.
R195 IV@2.4K/F_4 LVDS_IBG L_VDD_EN PEG_RX#_4 PEG_RXN5
C44 P48 b)For CRT DAC Disable, CRT_DDC_CLK, CRT_DDC_DATA .
LVDS_IBG PEG_RX#_5 PEG_RXN6
B43 N44 CRT_HSYNC, CRT_VSYNCThese signals should be connected to
LVDS_VBG PEG_RX#_6 PEG_RXN7
E37 T43 GND. But design guide Rev0.7 show NC, Intel suggest follow
LVDS_VREFH PEG_RX#_7 PEG_RXN8
E38 LVDS_VREFL PEG_RX#_8 U43 Design guide.
INT_TXLCLKOUT- PEG_RXN9
LVDS
24 INT_TXLCLKOUT- C41 LVDSA_CLK# PEG_RX#_9 Y43
24 INT_TXLCLKOUT+ INT_TXLCLKOUT+ C40 Y48 PEG_RXN10
LVDSA_CLK PEG_RX#_10 PEG_RXN11
B37 LVDSB_CLK# PEG_RX#_11 Y36 <check list> <check list>
A37 AA43 PEG_RXN12 For EV@ For IV@
LVDSB_CLK PEG_RX#_12 PEG_RXN13
AD37
INT_TXLOUT0- H47
PEG_RX#_13
AC47 PEG_RXN14 CRT R/G/B 0ohm to GND CRT R/G/B 150ohm to GND
24 INT_TXLOUT0- LVDSA_DATA#_0 PEG_RX#_14
INT_TXLOUT1- E46 AD39 PEG_RXN15 CRTIREF 0ohm to GND CRTIREF 1Kohm to GND
24 INT_TXLOUT1- LVDSA_DATA#_1 PEG_RX#_15
INT_TXLOUT2- G40
24 INT_TXLOUT2- LVDSA_DATA#_2 PEG_RXP[15:0] 18,24
A40 LVDSA_DATA#_3 PEG_RX_0 H43 PEG_RXP0 For topology without the analog switch
GRAPHICS
J44 PEG_RXP1 - if the total motherboard route
PEG_RX_1
24 INT_TXLOUT0+ INT_TXLOUT0+ H48 LVDSA_DATA_0 PEG_RX_2 L43 PEG_RXP2 Can support reversal routing.If CFG9=1, PCI Express length is less than 12", the
24 INT_TXLOUT1+ INT_TXLOUT1+ D45 L41 PEG_RXP3
INT_TXLOUT2+ F40
LVDSA_DATA_1 PEG_RX_3
N40 PEG_RXP4 is normal operation. If CFG9=0, then PEG_TXP0 recommended reference
24 INT_TXLOUT2+ LVDSA_DATA_2 PEG_RX_4 resistor value is 1 kΩ ±1%
C
B40 LVDSA_DATA_3 PEG_RX_5 P47 PEG_RXP5 becomes PEG_TXP15, PEG_TXP1 becomes C
N43 PEG_RXP6 PEG_TXP14, PEG_TXP2 becomes PEG_TXP13, etc. CRTIREF
PEG_RX_6 PEG_RXP7
A41 T42
H38
LVDSB_DATA#_0 PEG_RX_7
U42 PEG_RXP8 similarly for PEG_RXP[15:0] and PEG_RXN[15:0] For IV: 1Kohm
LVDSB_DATA#_1 PEG_RX_8 PEG_RXP9
G37 LVDSB_DATA#_2 PEG_RX_9 Y42 For EV:0ohm
J37 W47 PEG_RXP10
LVDSB_DATA#_3 PEG_RX_10 PEG_RXP11 R161 SP@1K/F_4 CRTIREF
PEG_RX_11 Y37
B42 AA42 PEG_RXP12
LVDSB_DATA_0 PEG_RX_12 PEG_RXP13
G38 LVDSB_DATA_1 PEG_RX_13 AD36
TV_A/B/C F37 AC48 PEG_RXP14
SP@ LVDSB_DATA_2 PEG_RX_14 PEG_RXP15 SP@
PCI-EXPRESS
K37 LVDSB_DATA_3 PEG_RX_15 AD40
For IV: 75ohm CRT_R/G/B
PEG_TXN[15:0] 18,24
For EV:0ohm J41 C_PEG_TXN0 C583 .1u/10V_4 PEG_TXN0
PEG_TX#_0 C_PEG_TXN1 C587 .1u/10V_4 PEG_TXN1 For IV: 150ohm
PEG_TX#_1 M46
R147 SP@75_4 INT_TV_COMP F25 M47 C_PEG_TXN2 C591 .1u/10V_4 PEG_TXN2 For EV:0ohm
R136 SP@75_4 INT_TV_Y/G TVA_DAC PEG_TX#_2 C_PEG_TXN3 C596 .1u/10V_4 PEG_TXN3
H25 TVB_DAC PEG_TX#_3 M40
R151 SP@75_4 INT_TV_C/R K25 M42 C_PEG_TXN4 C618 EV@.1U/10V_4 PEG_TXN4 R155 SP@150/F_4 INT_CRT_BLU
TVC_DAC PEG_TX#_4 C_PEG_TXN5 C588 EV@.1U/10V_4 PEG_TXN5
TV PEG_TX#_5 R48
H24 N38 C_PEG_TXN6 C600 EV@.1U/10V_4 PEG_TXN6 R154 SP@150/F_4 INT_CRT_GRN
TV_RTN PEG_TX#_6 C_PEG_TXN7 C598 EV@.1U/10V_4 PEG_TXN7
PEG_TX#_7 T40
U37 C_PEG_TXN8 C604 EV@.1U/10V_4 PEG_TXN8 R150 SP@150/F_4 INT_CRT_RED
PEG_TX#_8 C_PEG_TXN9 C603 EV@.1U/10V_4 PEG_TXN9
PEG_TX#_9 U40
C31 Y40 C_PEG_TXN10 C608 EV@.1U/10V_4 PEG_TXN10
TV_DCONSEL_0 PEG_TX#_10 C_PEG_TXN11 C594 EV@.1U/10V_4 PEG_TXN11
E32 TV_DCONSEL_1 PEG_TX#_11 AA46
AA37 C_PEG_TXN12 C616 EV@.1U/10V_4 PEG_TXN12
B
PEG_TX#_13 AA40 B
AD43 C_PEG_TXN14 C614 EV@.1U/10V_4 PEG_TXN14
PEG_TX#_15 AC46
PEG_TXP[15:0] 18,24
INT_CRT_BLU E28 J42 C_PEG_TXP0 C580 .1u/10V_4 PEG_TXP0
24 INT_CRT_BLU CRT_BLUE PEG_TX_0
L46 C_PEG_TXP1 C585 .1u/10V_4 PEG_TXP1
INT_CRT_GRN PEG_TX_1 C_PEG_TXP2 C590 .1u/10V_4 PEG_TXP2
24 INT_CRT_GRN G28 CRT_GREEN PEG_TX_2 M48
M39 C_PEG_TXP3 C597 .1u/10V_4 PEG_TXP3
INT_CRT_RED PEG_TX_3 C_PEG_TXP4 C611 EV@.1U/10V_4 PEG_TXP4
24 INT_CRT_RED J28 CRT_RED PEG_TX_4 M43
C_PEG_TXP5 C586 EV@.1U/10V_4 PEG_TXP5
VGA
PEG_TX_5 R47
G29 N37 C_PEG_TXP6 C601 EV@.1U/10V_4 PEG_TXP6
CRT_IRTN PEG_TX_6 C_PEG_TXP7 C599 EV@.1U/10V_4 PEG_TXP7
PEG_TX_7 T39
H32 U36 C_PEG_TXP8 C605 EV@.1U/10V_4 PEG_TXP8
24 INT_CRT_DDCCLK CRT_DDC_CLK PEG_TX_8
J32 U39 C_PEG_TXP9 C602 EV@.1U/10V_4 PEG_TXP9
24 INT_CRT_DDCDAT CRT_DDC_DATA PEG_TX_9
R158 IV@30.1_4 HSYNC_G J29 Y39 C_PEG_TXP10 C609 EV@.1U/10V_4 PEG_TXP10
24 INT_HSYNC CRT_HSYNC PEG_TX_10
CRTIREF E29 Y46 C_PEG_TXP11 C595 EV@.1U/10V_4 PEG_TXP11
R165 IV@30.1_4 VSYNC_G CRT_TVO_IREF PEG_TX_11 C_PEG_TXP12 C617 EV@.1U/10V_4 PEG_TXP12
24 INT_VSYNC L29 CRT_VSYNC PEG_TX_12 AA36
AA39 C_PEG_TXP13 C620 EV@.1U/10V_4 PEG_TXP13
PEG_TX_13
HSYNC/VSYNC serial R place close to NB PEG_TX_14 AD42 C_PEG_TXP14
C_PEG_TXP15
C615
C592
EV@.1U/10V_4
EV@.1U/10V_4
PEG_TXP14
PEG_TXP15
PEG_TX_15 AD46
Discrete Stuffed. (CRT)

HSYNC_G
CRTIREF pull down CANTIGA_PM
for IV cantiga 1.02k ohm/F

A A
VSYNC_G
R159 R166
EV@0_4 EV@0_4 Quanta Computer Inc.
PROJECT : ZR6
1A
GMCH VGA
5 4 3 2 1
5 4 3 2 1
GMCH-CANTIGA(CLG)
08
16 M_A_DQ[63:0] 17 M_B_DQ[63:0]
U28D U28E
M_A_DQ0 AJ38 BD21 M_B_DQ0 AK47 BC16
SA_DQ_0 SA_BS_0 M_A_BS0 16 SB_DQ_0 SB_BS_0 M_B_BS0 17
M_A_DQ1 AJ41 BG18 M_B_DQ1 AH46 BB17
SA_DQ_1 SA_BS_1 M_A_BS1 16 SB_DQ_1 SB_BS_1 M_B_BS1 17
M_A_DQ2 AN38 AT25 M_B_DQ2 AP47 BB33
D SA_DQ_2 SA_BS_2 M_A_BS2 16 SB_DQ_2 SB_BS_2 M_B_BS2 17 D
M_A_DQ3 AM38 M_B_DQ3 AP46
M_A_DQ4 SA_DQ_3 M_B_DQ4 SB_DQ_3
AJ36 SA_DQ_4 SA_RAS# BB20 M_A_RAS# 16 AJ46 SB_DQ_4
M_A_DQ5 AJ40 BD20 M_B_DQ5 AJ48 AU17
SA_DQ_5 SA_CAS# M_A_CAS# 16 SB_DQ_5 SB_RAS# M_B_RAS# 17
M_A_DQ6 AM44 AY20 M_B_DQ6 AM48 BG16
SA_DQ_6 SA_WE# M_A_WE# 16 SB_DQ_6 SB_CAS# M_B_CAS# 17
M_A_DQ7 AM42 M_B_DQ7 AP48 BF14
SA_DQ_7 SB_DQ_7 SB_WE# M_B_WE# 17
M_A_DQ8 AN43 M_B_DQ8 AU47
AN44 SA_DQ_9 AU46 SB_DQ_9
M_A_DQ10 AU40 M_B_DQ10 BA48
SA_DQ_10 M_A_DM[7:0] 16 SB_DQ_10
M_A_DQ11 AT38 AM37 M_A_DM0 M_B_DQ11 AY48
SA_DQ_11 SA_DM_0 SB_DQ_11 M_B_DM[7:0] 17
M_A_DQ12 AN41 AT41 M_A_DM1 M_B_DQ12 AT47 AM47 M_B_DM0
M_A_DQ13 SA_DQ_12 SA_DM_1 M_A_DM2 M_B_DQ13 SB_DQ_12 SB_DM_0 M_B_DM1
AN39 SA_DQ_13 SA_DM_2 AY41 AR47 SB_DQ_13 SB_DM_1 AY47
M_A_DQ14 AU44 AU39 M_A_DM3 M_B_DQ14 BA47 BD40 M_B_DM2
AU42 SA_DQ_15 SA_DM_4 BB12 BC47 SB_DQ_15 SB_DM_3 BF35
M_A_DQ16 AV39 AY6 M_A_DM5 M_B_DQ16 BC46 BG11 M_B_DM4
AY44 SA_DQ_17 SA_DM_6 AT7 BC44 SB_DQ_17 SB_DM_5 BA3
M_A_DQ18 M_A_DM7 M_B_DQ18 M_B_DM6
A
BA40 AJ5 BG43 AP1
B
M_A_DQ19 SA_DQ_18 SA_DM_7 M_B_DQ19 SB_DQ_18 SB_DM_6 M_B_DM7
BD43 SA_DQ_19 M_A_DQS[7:0] 16 BF43 SB_DQ_19 SB_DM_7 AK2
M_A_DQ20 AV41 AJ44 M_A_DQS0 M_B_DQ20 BE45
SA_DQ_20 SA_DQS_0 SB_DQ_20 M_B_DQS[7:0] 17
M_A_DQ21 AY43 AT44 M_A_DQS1 M_B_DQ21 BC41 AL47 M_B_DQS0
M_A_DQ22 SA_DQ_21 SA_DQS_1 M_A_DQS2 M_B_DQ22 SB_DQ_21 SB_DQS_0 M_B_DQS1
BB41 SA_DQ_22 SA_DQS_2 BA43 BF40 SB_DQ_22 SB_DQS_1 AV48
MEMORY
M_A_DQ23 BC40 BC37 M_A_DQS3 M_B_DQ23 BF41 BG41 M_B_DQS2
MEMORY
AY37 SA_DQ_24 SA_DQS_4 AW12 BG38 SB_DQ_24 SB_DQS_3 BG37
M_A_DQ25 BD38 BC8 M_A_DQS5 M_B_DQ25 BF38 BH9 M_B_DQS4
AV37 SA_DQ_26 SA_DQS_6 AU8 BH35 SB_DQ_26 SB_DQS_5 BB2
M_A_DQ27 AT36 AM7 M_A_DQS7 M_B_DQ27 BG35 AU1 M_B_DQS6
SA_DQ_27 SA_DQS_7 M_A_DQS#[7:0] 16 SB_DQ_27 SB_DQS_6
M_A_DQ28 AY38 AJ43 M_A_DQS#0 M_B_DQ28 BH40 AN6 M_B_DQS7
C SA_DQ_28 SA_DQS#_0 SB_DQ_28 SB_DQS_7 M_B_DQS#[7:0] 17 C
M_A_DQ29 BB38 AT43 M_A_DQS#1 M_B_DQ29 BG39 AL46 M_B_DQS#0
M_A_DQ30 SA_DQ_29 SA_DQS#_1 M_A_DQS#2 M_B_DQ30 SB_DQ_29 SB_DQS#_0 M_B_DQS#1
AV36 SA_DQ_30 SA_DQS#_2 BA44 BG34 SB_DQ_30 SB_DQS#_1 AV47
M_A_DQ31 AW36 BD37 M_A_DQS#3 M_B_DQ31 BH34 BH41 M_B_DQS#2
BD13 SA_DQ_32 SA_DQS#_4 AY12 BH14 SB_DQ_32 SB_DQS#_3 BH37
M_A_DQ33 AU11 BD8 M_A_DQS#5 M_B_DQ33 BG12 BG9 M_B_DQS#4
BC11 SA_DQ_34 SA_DQS#_6 AU9 BH11 SB_DQ_34 SB_DQS#_5 BC2
M_A_DQ35 BA12 AM8 M_A_DQS#7 M_B_DQ35 BG8 AT2 M_B_DQS#6
SYSTEM
M_A_DQ36 SA_DQ_35 SA_DQS#_7 M_B_DQ36 SB_DQ_35 SB_DQS#_6 M_B_DQS#7
SYSTEM
AU13 SA_DQ_36 M_A_A[14:0] 16 BH12 SB_DQ_36 SB_DQS#_7 AN5
M_A_DQ37 AV13 BA21 M_A_A0 M_B_DQ37 BF11
SA_DQ_37 SA_MA_0 SB_DQ_37 M_B_A[14:0] 17
M_A_DQ38 BD12 BC24 M_A_A1 M_B_DQ38 BF8 AV17 M_B_A0
M_A_DQ39 SA_DQ_38 SA_MA_1 M_A_A2 M_B_DQ39 SB_DQ_38 SB_MA_0 M_B_A1
BC12 SA_DQ_39 SA_MA_2 BG24 BG7 SB_DQ_39 SB_MA_1 BA25
M_A_DQ40 BB9 BH24 M_A_A3 M_B_DQ40 BC5 BC25 M_B_A2
BA9 SA_DQ_41 SA_MA_4 BG25 BC6 SB_DQ_41 SB_MA_3 AU25
M_A_DQ42 AU10 BA24 M_A_A5 M_B_DQ42 AY3 AW25 M_B_A4
AV9 SA_DQ_43 SA_MA_6 BD24 AY1 SB_DQ_43 SB_MA_5 BB28
M_A_DQ44 BA11 BG27 M_A_A7 M_B_DQ44 BF6 AU28 M_B_A6
BD9 SA_DQ_45 SA_MA_8 BF25 BF5 SB_DQ_45 SB_MA_7 AW28
M_A_DQ46 AY8 AW24 M_A_A9 M_B_DQ46 BA1 AT33 M_B_A8
BA6 SA_DQ_47 SA_MA_10 BC21 BD3 SB_DQ_47 SB_MA_9 BD33
M_A_DQ48 AV5 BG26 M_A_A11 M_B_DQ48 AV2 BB16 M_B_A10
DDR
DDR
AV7 SA_DQ_49 SA_MA_12 BH26 AU3 SB_DQ_49 SB_MA_11 AW33
M_A_DQ50 AT9 BH17 M_A_A13 M_B_DQ50 AR3 AY33 M_B_A12
AN8 SA_DQ_51 SA_MA_14 AY25 AN2 SB_DQ_51 SB_MA_13 BH15
M_A_DQ52 AU5 M_B_DQ52 AY2 AU33 M_B_A14
M_A_DQ53 SA_DQ_52 M_B_DQ53 SB_DQ_52 SB_MA_14
AU6 SA_DQ_53 AV1 SB_DQ_53
B M_A_DQ54 AT5 M_B_DQ54 AP3 B
AN10 SA_DQ_55 AR1 SB_DQ_55
M_A_DQ56 AM11 M_B_DQ56 AL1
AM5 SA_DQ_57 AL2 SB_DQ_57
M_A_DQ58 AJ9 M_B_DQ58 AJ1
AJ8 SA_DQ_59 AH1 SB_DQ_59
M_A_DQ60 AN12 M_B_DQ60 AM2
AM13 SA_DQ_61 AM3 SB_DQ_61
M_A_DQ62 AJ11 M_B_DQ62 AH3
AJ12 SA_DQ_63 AJ3 SB_DQ_63
CANTIGA_PM CANTIGA_PM
A A

PROJECT : ZR6
1A
GMCH DDRIII
5 4 3 2 1
5 4 3 2 1
GMCH-CANTIGA(CLG)
IV@
09
SP@ Power consumption reference to Intel
644135 Cantiga chipset EDS Volume1.
Section 10 Intel check list(Rev 0.8) Intel check list(Rev 0.8)
GM TDP 10.5~12W No description for VCC_SM bulk CAP 270U*1 near to power(+V1.05M).
GS TDP 7~8W
Intel CRB(Rev 0.7) 270U*2 near to NB
PM TDP 7W
330U*1 Reserve near to power Intel CRB(Rev 0.7)
D 330U*1 near to NB 270U*3 near to power(+V1.05M). D
270U*1 near to NB
+1.05V_AXG
ESR=12m ohm
U28G
+1.5VSUS
AP33 VCC_SM_1 VCC_AXG_NCTF_1 W28

AN33 V28 +1.05V U28F
VCC_SM_2 VCC_AXG_NCTF_2
BH32 VCC_SM_3 VCC_AXG_NCTF_3 W26
BG32 VCC_SM_4 VCC_AXG_NCTF_4 V26
C606 C612 C264 + C624 BF32 W25
BD32 VCC_SM_6 VCC_AXG_NCTF_6 V25 AG34 VCC_1
22u/6.3V_8 *22u/6.3V_8 .1u/10V_4 330u/2V_7343 BC32 W24 AC34
VCC_SM_7 VCC_AXG_NCTF_7 VCC_2
BB32 VCC_SM_8 VCC_AXG_NCTF_8 V24 AB34 VCC_3
BA32 W23 C267 C283 C266 C286 + C610 AA34
AY32 VCC_SM_10 VCC_AXG_NCTF_10 V23 Y34 VCC_5
AW32 AM21 .1u/10V_4 *.22u/6.3V_4 .22u/6.3V_4 22u/6.3V_8 330u/2V_7343 V34
AV32 VCC_SM_12 VCC_AXG_NCTF_12 AL21 U34 VCC_7
AU32 VCC_SM_13 VCC_AXG_NCTF_13 AK21 AM33 VCC_8
VCC_SM(1.5V) DDR3 AT32 VCC_SM_14 VCC_AXG_NCTF_14 W21 AK33 VCC_9
AR32 VCC_SM_15 VCC_AXG_NCTF_15 V21 AJ33 VCC_10
AP32 U21 Place close to AG33
POWER
AN32 AM20 AF33
BH31
AK20 the GMCH VCC_12
BG31 VCC_SM_19 VCC_AXG_NCTF_19 W20 AE33 VCC_13
VCC CORE
BF31 VCC_SM_20 VCC_AXG_NCTF_20 U20 AC33 VCC_14
BG30 VCC_SM_21 VCC_AXG_NCTF_21 AM19 AA33 VCC_15
BH29 VCC_SM_22 VCC_AXG_NCTF_22 AL19 Y33 VCC_16
BG29 VCC_SM_23 VCC_AXG_NCTF_23 AK19 W33 VCC_17
BF29 VCC_SM_24 VCC_AXG_NCTF_24 AJ19 V33 VCC_18
BD29 VCC_SM_25 VCC SM VCC_AXG_NCTF_25 AH19 U33 VCC_19
BC29 VCC_SM_26 VCC_AXG_NCTF_26 AG19 AH28 VCC_20
BB29 VCC_SM_27 VCC_AXG_NCTF_27 AF19 AF28 VCC_21
BA29 VCC_SM_28 VCC_AXG_NCTF_28 AE19 AC28 VCC_22
AY29 VCC_SM_29 VCC_AXG_NCTF_29 AB19 AA28 VCC_23
AW29 VCC_SM_30 VCC_AXG_NCTF_30 AA19 AJ26 VCC_24
C AV29 VCC_SM_31 VCC_AXG_NCTF_31 Y19 AG26 VCC_25
C
AU29 VCC_SM_32 VCC_AXG_NCTF_32 W19 AE26 VCC_26
AT29 VCC_SM_33 VCC_AXG_NCTF_33 V19 AC26 VCC_27
AR29 VCC_SM_34 VCC_AXG_NCTF_34 U19 AH25 VCC_28
AP29 VCC_SM_35 VCC_AXG_NCTF_35 AM17 AG25 VCC_29
VCC_AXG_NCTF_36 AK17 AF25 VCC_30
BA36 VCC_SM_36/NC VCC_AXG_NCTF_37 AH17 AG24 VCC_31
BB24 VCC_SM_37/NC VCC_AXG_NCTF_38 AG17 AJ23 VCC_32
BD16 AF17 +1.05V +1.05V_AXG AH23 +1.05V
VCC_SM_38/NC VCC_AXG_NCTF_39 VCC_33
BB21 AE17 AF23
POWER
VCC_SM_39/NC VCC_AXG_NCTF_40 VCC_34
AW16 VCC_SM_40/NC VCC_AXG_NCTF_41 AC17 VCC_NCTF_1 AM32
AW13 AB17 R156 IV@0_8 T32 AL32
VCC_SM_41/NC VCC_AXG_NCTF_42 VCC_35 VCC_NCTF_2
AT13 VCC_SM_42/NC VCC_AXG_NCTF_43 Y17 IV@ VCC_NCTF_3 AK32
W17 R83 IV@0_8 AJ32
+1.05V_AXG VCC_AXG_NCTF_44 VCC_NCTF_4
VCC_AXG_NCTF_45 V17 VCC_NCTF_5 AH32
VCC GFX NCTF
AM16 R80 IV@0_8 AG32

VCC_AXG_NCTF_46 VCC_NCTF_6
Y26 VCC_AXG_1 VCC_AXG_NCTF_47 AL16 VCC_NCTF_7 AE32
1.05V AE25 VCC_AXG_2 VCC_AXG_NCTF_48 AK16 VCC_NCTF_8 AC32
AB25 AJ16 AA32
Graphics core VCC_AXG_3 VCC_AXG_NCTF_49 VCC_NCTF_9
AA25 VCC_AXG_4 VCC_AXG_NCTF_50 AH16 IV&EV Dis/Enable setting VCC_NCTF_10 Y32
VCC_AXG AE24 VCC_AXG_5 VCC_AXG_NCTF_51 AG16 VCC_NCTF_11 W32
AC24 VCC_AXG_6 VCC_AXG_NCTF_52 AF16 Design guide(Table 72) VCC_NCTF_12 U32
VCC_AXG_NCTF AA24 AE16 AM30
VCC_AXG_7 VCC_AXG_NCTF_53 For INT VGA diasble.VCC_AXG power can connect to GND VCC_NCTF_13
6326.84mA Y24 VCC_AXG_8 VCC_AXG_NCTF_54 AC16
+1.05V_AXG VCC_NCTF_14 AL30
AE23 VCC_AXG_9 VCC_AXG_NCTF_55 AB16 VCC_NCTF_15 AK30
AC23 VCC_AXG_10 VCC_AXG_NCTF_56 AA16 VCC_NCTF_16 AH30
AB23 VCC_AXG_11 VCC_AXG_NCTF_57 Y16 VCC_NCTF_17 AG30
AA23 VCC_AXG_12 VCC_AXG_NCTF_58 W16 SP@ VCC_NCTF_18 AF30
AJ21 VCC_AXG_13 VCC_AXG_NCTF_59 V16 VCC_NCTF_19 AE30
AG21 U16 + C505 + C501 C219 C168 C149 C187 C223 C107 C166 AC30
VCC_AXG_14 VCC_AXG_NCTF_60 VCC_NCTF_20
AE21 VCC_AXG_15 VCC_NCTF_21 AB30
AC21 IV@330u/2V_7343 IV@330u/2V_7343 IV@.47u/6.3V_4 SP@1u/10V_6 IV@10u/6.3V_8 IV@22u/6.3V_8 IV@.1u/10V_4 IV@.1u/10V_4 IV@.1u/10V_4 AA30
VCC_AXG_16 VCC_NCTF_22
Voltage regulator is shared between AA21 VCC_AXG_17 VCC_NCTF_23 Y30
the Graphics Core Rail, Y21 VCC_AXG_18 VCC_NCTF_24 W30
VCC NCTF
AH20 V30
VCCA_HPLL,VCCA_MPLL,VCCA_PEG_PLLVCCD_PEG_PLL, VCC_AXG_19 VCC_NCTF_25
VCCA_SM_CK, VCCA_DPLLA, VCCA_DPLLB, VCCD_HPLL,
AF20 VCC_AXG_20 Place close to the GMCH SP@:IV Sutff 1uf Cavity Capacitors VCC_NCTF_26 U30
AE20 AL29
VCCA_SM, VCC_AXF AC20
VCC_AXG_21
Intel check list(Rev 0.8) EVstuff 0 ohm VCC_NCTF_27
AK29
B VCC_AXG_22 VCC_NCTF_28 B
AB20 AJ29
AA20
VCC_AXG_23 220U*2 near to NB(ESR=15m ohm) VCC_NCTF_29
AH29
T17 VCC_AXG_25 Intel CRB(Rev 0.7) VCC_NCTF_31 AG29
T16 AE29
AM15
VCC_AXG_26 270U*4 near to power(+V1.05S). VCC_NCTF_32
AC29
AL15 VCC_AXG_28 330U*2 near to NB VCC_NCTF_34 AA29
AE15 VCC_AXG_29 VCC_NCTF_35 Y29
AJ15 VCC_AXG_30 VCC_NCTF_36 W29
AH15 VCC_AXG_31 VCC_NCTF_37 V29
AG15 VCC_AXG_32 VCC_NCTF_38 AL28
AF15 VCC_AXG_33 VCC_NCTF_39 AK28
AB15 VCC_AXG_34 VCC_NCTF_40 AL26
AA15 VCC_AXG_35 VCC_NCTF_41 AK26
1.8V
VCC GFX
Y15 VCC_AXG_36 VCC_NCTF_42 AK25

V15 AK24
U15
VCC_AXG_37 Internal connect to power VCC_NCTF_43
AK23
AN14 VCC_AXG_39
AM14 VCC_AXG_40 VCC
U14 AV44 VCC_SM_LF1
VCC_AXG_41 VCC_SM_LF1 VCC_SM_LF2 VCC_NCTF
VCC SM LF
T14 VCC_AXG_42 VCC_SM_LF2 BA37

VCC_SM_LF3
VCC_SM_LF3 AM40
VCC_SM_LF4
1210.34mA_EV
VCC_SM_LF4 AV21
AY5 VCC_SM_LF5 CANTIGA_PM 1930.4mA_IV
VCC_SM_LF5 VCC_SM_LF6
VCC_SM_LF6 AM10 ME Engine
+1.05V_AXG BB13 VCC_SM_LF7
VCC_SM_LF7
508.12mA
C163 C151 C142 C211 C292 C290 C319
R112 IV@10/F_4 AJ14 Total Max=2438.52mA
IV@ R110 IV@10/F_4 AH14 VCC_AXG_SENSE .1u/10V_4 .1u/10V_4 .22u/6.3V_4 .22u/6.3V_4 .47u/6.3V_4 1u/10V_4 1u/10V_4
VSS_AXG_SENSE
A CANTIGA_PM
NB Power Status and max current table(1/3) A
1. Route VCC_AXG_SENSE and VSS_AXG_SENSE differentially POWER PLANE S0 S3 S4/S5 Voltage I(max) Note
2. VCC_AXG_SENSE PU to +VGFX_CORE_INT with 10ohm VCC(EXT_VGA) O X X +1.05V 2178mA
and VSS_AXG_SENSE PD with 10ohm for Intel suggest
VCC(INT_VGA) O X X +1.05V 2899mA
VCC_AXG O X X +1.05V 8700mA Graphics Core
VCC_SM(800) O O X +1.8VSUS 3A (DDRII-667) 2.6A
VCC_SM(Standby) O O X +1.8VSUS 1mA Self Refresh during S3
PROJECT : ZR6
(See NB EDS Rev:1.0 Section 10.1 for max current) Size Document Number Rev
1A
(See NB EDS Rev:1.0 Section 12.2 for DC voltage)
GMCH VCC,NCTF
5 4 3 2 1
5 4 3 2 1
GMCH-CANTIGA(CLG)
10
If CRT have Flicker issue
STUFF 5.6 ohm
+3V_CRT_TV_DAC R428 +3V_VCCA_CRT_DAC
Power consumption reference to Intel IV@0_6 C561 C560 C559

Cantiga chipset EDS Volume1. Section 10 IV@.1u/10V_4 SP@.01u/25V_4 *IV@10u/6.3V_8
External Graphics
IV@ (GMCH Integrated Graphics Disable)
IV&EV Dis/Enable setting SP@:INT use 0.01U
EV@ EXT use 0 ohm VCCSYNC_CRT GND
1210 10UH, 10% R427 +3V_A_DAC_BG
0.45A DCR_max = 0.39 SP@:INT use 0.1U 3.3V VCCA_CRT_DAC GND
SP@ EXT use 0 ohm
IV@0_6 C550 C551 C554 1.05V
D
L18 IV@10uH_8_155mA IV@.1u/10V_4 SP@.01u/25V_4 IV@10u/6.3V_8
73mA FSB-1067 VCCD_LVDS GND D
+1.05V
U28H 852mA VCC_TX_LVDS GND
+ C577 C320 U13 +1.05V_VCCP_GMCH R91 *short0805 VCCA_LVDS GND
VTT_1 +1.05V
VTT_2 T13
1.05V IV@220u/2.5V_3528 SP@.1u/10V_4 B27 VCCA_CRT_DAC_1 VTT_3 U12 VCCA_TVDAC GND
+ C527
64.8mA for DPLL_A/B ESR=15 m 3.3V A26 VCCA_CRT_DAC_2 VTT_4 T12
U11
C171 C119 C118 C131
VCCD_QDAC GND
VTT_5
5mA VTT_6 T11 .47u/6.3V_4 2.2u/6.3V_6 4.7u/6.3V_6 4.7u/6.3V_6 330u/2V_7343
VCCA_DAC_BG GND
A25 U10
CRT
VCCA_DAC_BG VTT_7
B25 VSSA_DAC_BG VTT_8 T10 ESR= 12m ohm
VCCA_DPLLA/B always keep to +1.05V USE same GND plane VTT_9 U9 VCC_AXG GND
1210 10UH, 10% (If no use IV dynamic core power) VTT_10 T9
0.45A DCR_max = 0.39 VTT_11 U8 VCC_AXG_NCTF GND
+1.05VM_DPLLA F47 T8
VCCA_DPLLA VTT_12
U7
VTT
L20 IV@10uH_8_155mA +1.05VM_DPLLB VTT_13
+1.05V L48 VCCA_DPLLB VTT_14 T7
VTT_15 U6
+ C573 C329 +1.05VM_HPLL AD1 T6
PLL
VCCA_HPLL VTT_16
VTT_17 U5
IV@220u/2.5V_3528 SP@.1u/10V_4 +1.05VM_MPLL AE1 T5
VCCA_MPLL VTT_18
ESR=15 m VTT_19 V3
1.8V +1.8V_TXLVDS
J48
VTT_20 U3
V2
1.05V VCCA_LVDS VTT_21
13.2mA C325 U2
A LVDS
24mA VTT_22
1.5V J47 VSSA_LVDS VTT_23 T2
+1.05V R383 *short0603 SP@1000p/50V_4 V1 1.05V
414uA VTT_24
VTT_25 U1
C512 C517 321.35mA
+1.5V R469 *short0805 +VCCA_PEG_BG AD48 +1.05VM_AXF R418 *short0805 +1.05V
4.7u/6.3V_6 .1u/10V_4 VCCA_PEG_BG
C623 1.05V C538 C536
1.05V 1.05V
A PEG
3.9 nH, 0.2 nH, 1A .1u/10V_4 50mA 1u/10V_4 *10u_8 1.8V
139.2mA DDR2-800 +1.05VM_PEGPLL AA48 0805 1UH , Rdc = 0.14 - 0.26.
, DCR_max=32 m VCCA_PEG_PLL DDR2-800
L37 BKP1608HS181T_6_1.5A 720mA VCCA_PEG_PLL ESR = 60 m Max rated current = 220 mA
+1.25V for Teenah use(100mA) 124mA
C 1210 0.1uH, 20%, 1A, +1.05V R152 0_6 +1.05VM_A_SM AR20 C
VCCA_SM_1 +1.5VSUS_VCC_SM_CK R307 *short0805
DCR_max=0.078Ω AP20 VCCA_SM_2 +1.5VSUS
C191 C210 C190 AN20
+1.05VM_MPLL_RC R389 0.5/F_6
22u/6.3V_8 4.7u/6.3V_6 1u/10V_4
AR17
AP17
VCCA_SM_3
VCCA_SM_4
VCCA_SM_5
POWER C544
1/F_4 R421 +1.8VSUS_SMCK_RC C537 10u/6.3V_6
AN17 .1u/10V_4
C504 C516 VCCA_SM_6
AT16 VCCA_SM_7
AR16
A SM
22u/6.3V_8 .1u/10V_4 VCCA_SM_8
AP16 VCCA_SM_9
1.05V IV&EV Dis/Enable setting 1.8V
118.8mA
3.3V DDR2-800 +1.8V_TXLVDS R209 IV@0_8 +1.8V
24.15mA for VCCA_TVA_DAC 26mA
39.48mA for VCCA_TVB_DAC +1.05V R144 *short0603 +1.05VM_A_SM_CK AP28 SP@:INT use 1000pf C345 C347
VCCA_SM_CK_1
24.15mA for VCCA_TVC_DAC AN28 B22
CRB : 0 ohm C248 C221 C231 AP25
VCCA_SM_CK_2 VCC_AXF_1
B21 EXT use 0 ohm SP@1000p/50V_4 *IV@22u/6.3V_8
AXF
Total 87.78mA VCCA_SM_CK_3 VCC_AXF_2
Check list : 2.2nH AN25 VCCA_SM_CK_4 VCC_AXF_3 A21
*2.2u/10V_6 22u/6.3V_8 .1u/10V_4 AN24 VCCA_SM_CK_5
AM28 VCCA_SM_CK_NCTF_1
FB 180@100 MHz, 25% 1.5A 3.3V AM26
A CK
VCCA_SM_CK_NCTF_2
DCR_max=90 m AM25 VCCA_SM_CK_NCTF_3
79mA
L39 IV@BKP1608HS181T_6_1.5A IV&EV Dis/Enable setting AL25
AM24
VCCA_SM_CK_NCTF_4 VCC_SM_CK_1 BF21
BH20 3.3V
+3V
SM CK
VCCA_SM_CK_NCTF_5 VCC_SM_CK_2 +3V
AL24 VCCA_SM_CK_NCTF_6 VCC_SM_CK_3 BG20
SP@:INT use 0.01U AM23 BF20
105.3mA
C549 C543 C542 VCCA_SM_CK_NCTF_7 VCC_SM_CK_4 R193 10_4 +1.05V_SD D13
AL23 1 2 CH751
EXT use 0 ohm VCCA_SM_CK_NCTF_8 +1.05V
IV@10u/6.3V_8 IV@.1u/10V_4 SP@.01u/25V_4 C291
VCC_TX_LVDS K47
+3V_CRT_TV_DAC B24 .1u/10V_4
VCCA_TV_DAC_1
CRB no 10U A24 VCCA_TV_DAC_2 VCC_HV_1 C35
TV
Check list need min 10U~100U for VCCA_TV_DAC 1.5V VCC_HV_2 B35
SP@:INT use 0.1U A35 1.05V
HV
50mA VCC_HV_3 +1.05V
R438 IV@0_6 EXT use 0 ohm +VCC_HDA 1782mA
+1.5V A32 VCC_HDA +1.05V_VCC_PEG R466 *short0805
HDA
B VCC_PEG_1 V48 B
C571 +1.5V_TVDAC U48
VCC_PEG_2
V47
PEG
SP@.1u/10V_4 VCC_PEG_3 C328 C607 + C613
VCC_PEG_4 U47
D TV/CRT
VCCD_QDAC share to TV and CRT M25 VCCD_TVDAC VCC_PEG_5 U46 1.05V
4.7u/6.3V_6 22u/6.3V_8 220u/2.5V_3528
VCCD_TVDAC always keep 0.1U/0.022U/10U to +1.5V +1.5V_QDAC L28
456mA
VCCD_QDAC
1.5V VCC_DMI_1 AH48
+1.05V R390 *short0603 +1.05VM_MCH_PLL2 AF1 AF48
35mA VCCD_HPLL VCC_DMI_2 C589
AH47
DMI
R135 *short0603 C515 +1.05VM_PEGPLL VCC_DMI_3
+1.5V 1.05V AA47 VCCD_PEG_PLL VCC_DMI_4 AG47
.1u/10V_4
C216 C215 157.2mA .1u/10V_4
M38 VCCD_LVDS_1
.1u/10V_4 .01u/25V_4 VTTLF1
LVDS
1.5V L37 VCCD_LVDS_2 VTTLF1 A8
L1 VTTLF2
48.363mA for CRT VTTLF2
AB2 VTTLF3
VTTLF
VTTLF3 1.05V
5mA for TV FB 180@100 MHz, 25% 1.5A Internal connect to power
DCR_max=90 m 1.5V C518 C519 C526
0.5mA CANTIGA_PM .47u/6.3V_4 .47u/6.3V_4 .47u/6.3V_4
L11 BKP1608HS181T_6_1.5A
C226
C235 C234
10u/6.3V_8
CRB no 10U .1u/10V_4 .01u/25V_4
Check list need min 10U~100U
Power Net Name Cantiga(V)
for VCCA_QDAC
VCC_AXG_# 1.05V
VCC_AXG_NCTF_#
MODIFY
VCCA_PEG_BG 1.5V
FB 220 @100 MHz, 25%, 2A 1.05V
VCCA_DPLLA 1.05V
50mA
A +1.05V L22 BKP1608HS181T_6_1.5A VCCA_DPLLB 1.05V A
C344 C346 VCCA_SM_# 1.05V

.1u/10V_4 .1u/10V_4 VCCA_HPLL 1.05V
+1.05VM_PEGPLL_RC R208 1/F_4 IV&EV Dis/Enable setting VCCA_MPLL 1.05V
+1.8V R185 IV@0_6 +1.8V_DLVDS
C348 VCCA_SM_CK_# 1.05V
1.8V
10u/6.3V_6 SP@:INT use 1 U C289 VCCA_PEG_PLL 1.05V
60.31mA
EXT use 0 ohm
ESR=60m ohm SP@1u/10V_4 VCC_AXF_# 1.05V
VCCD_HPLL 1.05V PROJECT : ZR6
VCCD_PEG_PLL 1.05V GMCH POWER 1A

5 4 3 2 1
5 4 3 2 1
GMCH-CANTIGA(CLG)
AU48
AR48
AL48
U28I
VSS_1
VSS_2
VSS_100
VSS_101
AM36
AE36
P36
BG21
L12
AW21
AU21
U28J
VSS_199
VSS_200
VSS_201
VSS_297
VSS_298
VSS_299
AH8
Y8
L8
E8
11
VSS_3 VSS_102 VSS_202 VSS_300
BB47 VSS_4 VSS_103 L36 AP21 VSS_203 VSS_301 B8
AW47 VSS_5 VSS_104 J36 AN21 VSS_204 VSS_302 AY7
AN47 VSS_6 VSS_105 F36 AH21 VSS_205 VSS_303 AU7
AJ47 VSS_7 VSS_106 B36 AF21 VSS_206 VSS_304 AN7
AF47 VSS_8 VSS_107 AH35 AB21 VSS_207 VSS_305 AJ7
D
AD47 VSS_9 VSS_108 AA35 R21 VSS_208 VSS_306 AE7 D
AB47 VSS_10 VSS_109 Y35 M21 VSS_209 VSS_307 AA7
Y47 VSS_11 VSS_110 U35 J21 VSS_210 VSS_308 N7
T47 VSS_12 VSS_111 T35 G21 VSS_211 VSS_309 J7
N47 VSS_13 VSS_112 BF34 BC20 VSS_212 VSS_310 BG6
L47 VSS_14 VSS_113 AM34 BA20 VSS_213 VSS_311 BD6
G47 VSS_15 VSS_114 AJ34 AW20 VSS_214 VSS_312 AV6
BD46 VSS_16 VSS_115 AF34 AT20 VSS_215 VSS_313 AT6
BA46 VSS_17 VSS_116 AE34 AJ20 VSS_216 VSS_314 AM6
AY46 VSS_18 VSS_117 W34 AG20 VSS_217 VSS_315 M6
AV46 VSS_19 VSS_118 B34 Y20 VSS_218 VSS_316 C6
AR46 VSS_20 VSS_119 A34 N20 VSS_219 VSS_317 BA5
AM46 VSS_21 VSS_120 BG33 K20 VSS_220 VSS_318 AH5
V46 VSS_22 VSS_121 BC33 F20 VSS_221 VSS_319 AD5
R46 VSS_23 VSS_122 BA33 C20 VSS_222 VSS_320 Y5
P46 VSS_24 VSS_123 AV33 A20 VSS_223 VSS_321 L5
H46 VSS_25 VSS_124 AR33 BG19 VSS_224 VSS_322 J5
F46 VSS_26 VSS_125 AL33 A18 VSS_225 VSS_323 H5
BF44 VSS_27 VSS_126 AH33 BG17 VSS_226 VSS_324 F5
AH44 VSS_28 VSS_127 AB33 BC17 VSS_227 VSS_325 BE4
AD44 VSS_29 VSS_128 P33 AW17 VSS_228
AA44 L33 AT17 BC3
Y44
U44
VSS_30
VSS_31
VSS_32
VSS_129
VSS_130
VSS_131
H33
N32
R17
M17
VSS_229
VSS_230
VSS_231
VSS VSS_327
VSS_328
VSS_329
AV3
AL3
T44 K32 H17 R3
M44
F44
VSS_33
VSS_34
VSS_35
VSS VSS_132
VSS_133
VSS_134
F32
C32
C17
VSS_232
VSS_233
VSS_330
VSS_331
VSS_332
P3
F3
BC43 VSS_36 VSS_135 A31 BA16 VSS_235 VSS_333 BA2
AV43 VSS_37 VSS_136 AN29 VSS_334 AW2
AU43 VSS_38 VSS_137 T29 AU16 VSS_237 VSS_335 AU2
C AM43 VSS_39 VSS_138 N29 AN16 VSS_238 VSS_336 AR2 C
J43 VSS_40 VSS_139 K29 N16 VSS_239 VSS_337 AP2
C43 VSS_41 VSS_140 H29 K16 VSS_240 VSS_338 AJ2
BG42 VSS_42 VSS_141 F29 G16 VSS_241 VSS_339 AH2
AY42 VSS_43 VSS_142 A29 E16 VSS_242 VSS_340 AF2
AT42 VSS_44 VSS_143 BG28 BG15 VSS_243 VSS_341 AE2
AN42 VSS_45 VSS_144 BD28 AC15 VSS_244 VSS_342 AD2
AJ42 VSS_46 VSS_145 BA28 W15 VSS_245 VSS_343 AC2
AE42 VSS_47 VSS_146 AV28 A15 VSS_246 VSS_344 Y2
N42 VSS_48 VSS_147 AT28 BG14 VSS_247 VSS_345 M2
L42 VSS_49 VSS_148 AR28 AA14 VSS_248 VSS_346 K2
BD41 VSS_50 VSS_149 AJ28 C14 VSS_249 VSS_347 AM1
AU41 VSS_51 VSS_150 AG28 BG13 VSS_250 VSS_348 AA1
AM41 VSS_52 VSS_151 AE28 BC13 VSS_251 VSS_349 P1
AH41 VSS_53 VSS_152 AB28 BA13 VSS_252 VSS_350 H1
AD41 VSS_54 VSS_153 Y28
AA41 VSS_55 VSS_154 P28 VSS_351 U24
Y41 VSS_56 VSS_155 K28 AN13 VSS_255 VSS_352 U28
U41 VSS_57 VSS_156 H28 AJ13 VSS_256 VSS_353 U25
T41 VSS_58 VSS_157 F28 AE13 VSS_257 VSS_354 U29
M41 VSS_59 VSS_158 C28 N13 VSS_258 VSS_355 AJ6
G41 VSS_60 VSS_159 BF26 L13 VSS_259
B41 VSS_61 VSS_160 AH26 G13 VSS_260 VSS_NCTF_1 AF32
BG40 VSS_62 VSS_161 AF26 E13 VSS_261 VSS_NCTF_2 AB32
BB40 VSS_63 VSS_162 AB26 BF12 VSS_262 VSS_NCTF_3 V32
AV40 VSS_64 VSS_163 AA26 AV12 VSS_263 VSS_NCTF_4 AJ30
AN40 VSS_65 VSS_164 C26 AT12 VSS_264 VSS_NCTF_5 AM29
H40 VSS_66 VSS_165 B26 AM12 VSS_265 VSS_NCTF_6 AF29
E40 BH25 AA12 AB29
VSS NCTF
VSS_67 VSS_166 VSS_266 VSS_NCTF_7
B
AT39 VSS_68 VSS_167 BD25 J12 VSS_267 VSS_NCTF_8 U26 B
AM39 VSS_69 VSS_168 BB25 A12 VSS_268 VSS_NCTF_9 U23
AJ39 VSS_70 VSS_169 AV25 BD11 VSS_269 VSS_NCTF_10 AL20
AE39 VSS_71 VSS_170 AR25 BB11 VSS_270 VSS_NCTF_11 V20
N39 VSS_72 VSS_171 AJ25 AY11 VSS_271 VSS_NCTF_12 AC19
L39 VSS_73 VSS_172 AC25 AN11 VSS_272 VSS_NCTF_13 AL17
B39 VSS_74 VSS_173 Y25 AH11 VSS_273 VSS_NCTF_14 AJ17
BH38 VSS_75 VSS_174 N25 VSS_NCTF_15 AA17
BC38 VSS_76 VSS_175 L25 Y11 VSS_275 VSS_NCTF_16 U17
BA38 VSS_77 VSS_176 J25 N11 VSS_276
AU38 VSS_78 VSS_177 G25 G11 VSS_277 VSS_SCB_1 BH48
AH38 E25 C11 BH1
VSS SCB
VSS_79 VSS_178 VSS_278 VSS_SCB_2
AD38 VSS_80 VSS_179 BF24 BG10 VSS_279 VSS_SCB_3 A48
AA38 VSS_81 VSS_180 AD12 AV10 VSS_280 VSS_SCB_4 C1
Y38 VSS_82 VSS_181 AY24 AT10 VSS_281
U38 VSS_83 VSS_182 AT24 AJ10 VSS_282 VSS_SCB_6 A3
T38 VSS_84 VSS_183 AJ24 AE10 VSS_283
J38 VSS_85 VSS_184 AH24 AA10 VSS_284 NC_26 E1
F38 VSS_86 VSS_185 AF24 M10 VSS_285 NC_27 D2
C38 VSS_87 VSS_186 AB24 BF9 VSS_286 NC_28 C3
BF37 VSS_88 VSS_187 R24 BC9 VSS_287 NC_29 B4
BB37 VSS_89 VSS_188 L24 AN9 VSS_288 NC_30 A5
AW37 VSS_90 VSS_189 K24 AM9 VSS_289 NC_31 A6
AT37 VSS_91 VSS_190 J24 AD9 VSS_290 NC_32 A43
AN37 VSS_92 VSS_191 G24 G9 VSS_291 NC_33 A44
AJ37 F24 B9 B45
NC
VSS_93 VSS_192 VSS_292 NC_34
H37 VSS_94 VSS_193 E24 BH8 VSS_293 NC_35 C46
C37 VSS_95 VSS_194 BH23 BB8 VSS_294 NC_36 D47
BG36 VSS_96 VSS_195 AG23 AV8 VSS_295 NC_37 B47
BD36 VSS_97 VSS_196 Y23 AT8 VSS_296 NC_38 A46
A AK15 VSS_98 VSS_197 B23 NC_39 F48 A
AU36 VSS_99 VSS_198 A23 NC_40 E48
NC_41 C48
NC_42 B48
CANTIGA_PM A47
NC_43
CANTIGA_PM
PROJECT : ZR6
1A
GMCH VSS
5 4 3 2 1
5 4 3 2 1
C450 18p/50V_4
12
2
1
Y4 R332 Intel ICH9M AJSLB8Q0T03
IV@ 32.768KHZ 10M_6
CLK_32KX1
U32A
C23 RTCX1 FWH0/LAD0 K5 LAD0 26,31
CLK_32KX2 C24 K4
EV@ RTCX2 FWH1/LAD1 LAD1 26,31
3
4
C451 18p/50V_4 L6
FWH2/LAD2 LAD2 26,31 +1.05V
RTC_RST# A25 K2
RTCRST# FWH3/LAD3 LAD3 26,31
SRTC_RST#
RTC
LPC
F20 SRTCRST#
+VCCRTC R570 1M/F_6 SM_INTRUDER# C22 K3
INTRUDER# FWH4/LFRAME# LFRAME# 26,31
D
R569 330K/F_4 ICH_INTVRMEN B22 INTVRMEN LDRQ0# J3 T39 LDRQ0/1# : Internal PU Layout note: D
R568 330K/F_4 LAN100_SLP A22 J1 R484 R255 +1.05V
T38 DPRSTP# , Daisy Chain
ICH9M(CLG) Internal VRM enabled for
E25
LAN100_SLP
GLAN_CLK
LDRQ1#/GPIO23
A20GATE
A20M#
N7
AJ27
R294 8.2K_4 +3V
GATEA20
H_A20M#
31
3
*56_4 *56_4
(SB>Power>NB>CPU)
C13 R474
VccSus1_05, VccSus1_5, LAN_RSTSYNC 56_4
AJ25 ICH_DPRSTP# 3,6,35
VccCL1_5, VccLAN1_05 and DPRSTP#
LAN / GLAN
F14 LAN_RXD0 DPSLP# AE23 H_DPSLP# 3
VccCL1_05. G13 LAN_RXD1 H_FERR#_R R481 56_4
D14 LAN_RXD2 FERR# AJ26 H_FERR# 3
24.9 Ohm pull up to 1.5V
D13 AD22 H_PWRGD 3
for GLAN_COMPI/O is D12
LAN_TXD0 CPUPWRGD
required, no matter intel +3V_S5 LAN_TXD1
E13 LAN_TXD2 IGNNE# AF25 H_IGNNE# 3
CPU
LAN is used or not.
R555 10K_4 ICH_GPIO56 B10 AE22
GLAN_DOCK#/GPIO56 INIT# H_INIT# 3
INTR AG25 H_INTR 3
+1.5V R299 24.9/F_4 B28 L3 R292 10K_4 +3V
GLAN_COMPI RCIN#
B27 GLAN_COMPO RCIN# 31
NMI AF23 H_NMI 3
HDA_BIT_CLK_R AF6 AF24
HDA_BIT_CLK SMI# H_SMI# 3
Internal pull-down HDA_SYNC_R AH4 HDA_SYNC
resistors that are AH27 R483 56_4 +1.05V
STPCLK# H_STPCLK# 3
HDA_RST#_R AE7
always enabled HDA_RST#
AG26 H_THERMTRIP_R R497 54.9/F_4 H_THERMTRIP_RR R493 *0_4
THRMTRIP# PM_THRMTRIP# 3,6
27 ACZ_SDIN0 AF4 HDA_SDIN0
AG4 HDA_SDIN1 TP8 AG27 T25
HDA_SDIN2 AH3 No use Thermal trip SB side still PU 56ohm.(Serial R use 0ohm)
IHDA
HDA_SDIN3 HDA_SDIN2
AE5 HDA_SDIN3 Use Thermal trip can share PU for CPU and SB side(And Serial R use 54.9 ohm)
AH11
C HDA_SDOUT_R AG5
SATA4RXN
AJ11
PU L<2" C
HDA_SDOUT SATA4RXP
SATA4TXN AG12
T24 AG7 HDA_DOCK_EN#/GPIO33 SATA4TXP AF12
T26 AE8 HDA_DOCK_RST#/GPIO34
SATA5RXN AH9
25 SATA_LED# AG8 SATALED# SATA5RXP AJ9
SATA5TXN AE10
25 SATA_RXN0 AJ16 SATA0RXN SATA5TXP AF10
SATA HDD 25 SATA_RXP0 AH16
SATA
C366 .01u/16V_4 SATA_TXN0_C SATA0RXP
25 SATA_TXN0 AF17 SATA0TXN SATA_CLKN AH18 CLK_PCIE_SATA# 2
C365 .01u/16V_4 SATA_TXP0_C AG17 AJ18
25 SATA_TXP0 SATA0TXP SATA_CLKP CLK_PCIE_SATA 2
25 SATA_RXN1 AH13 AJ7 SATA_RBIAS_PN

SATA1RXN SATARBIAS#
ODD (SATA) 25 SATA_RXP1 AJ13 SATA1RXP SATARBIAS AH7
25 SATA_TXN1 C358 .01u/16V_4 SATA_TXN1_C AG14 SATA1TXN
25 SATA_TXP1 C359 .01u/16V_4 SATA_TXP1_C AF14 SATA1TXP SATABIAS L<0.5" R482
ICH9M REV 1.0 24.9/F_4
HD Audio R219 *EV@33_4

RTC
MXM_BIT_CLK_HDMI 21
R225 *EV@33_4
MXM_SDOUT_HDMI 21
R215 *IV@33_4
HDA_BIT_CLK_HDMI 6 Pjt: BCBAT54CZ04
R216 *IV@33_4 HDA_BIT_CLK_R R239 33_4 Ons: BCBAT54CZ70
HDA_SDOUT_HDMI 6 BIT_CLK_AUDIO 27 +3VPCU +VCCRTC
HDA_SDOUT_R R221 33_4 20MIL
ACZ_SDOUT_AUDIO 27
B
24.000 MHz is output from the ICH9M. C369 C353 C360 D39
B
Weak integrated PD on the HDA_SDOUT pin. C357
*10p/50V_4 *10p/50V_4 *10p/50V_4 R544 20K_6 SRTC_RST#
*10p/50V_4 VCCRTC_1
1
For EMI C698 G2
C362 R223
20MIL BAT54C
HDA_BIT_CLK_R C704 1u/10V_4 *SHORT_ PAD
2
R241 *EV@33_4 R213 *EV@33_4 R561 1u/10V_4
MXM_SYNC_HDMI 21 *10p/50V_4 *22_4 MXM_RST#_HDMI 21
R220 *IV@33_4 R214 *IV@33_4
HDA_SYNC_HDMI 6 HDA_RST#_HDMI 6
HDA_SYNC_R R224 33_4 HDA_RST#_R R253 33_4 1K_4
ACZ_SYNC_AUDIO 27 ACZ_RST#_AUDIO 27
R566 20K_6 RTC_RST#
Weak integrated PD on the HDA_SYNC pins C361
1
C706 G3
*10p/50V_4 HDA_SDIN3 R228 *EV@0_4
MXM_SDIN_HDMI 21
HDA_SDIN2 R227 *IV@0_4 1 3 RTC_N01 R543 *16K_6 1u/10V_4 *SHORT_ PAD
HDA_SDIN_HDMI 6 +5VPCU
VCCRTC_2
2
Q31 R542
20MIL
South Bridge Strap Pin (1/3) *MMBT3904 *68.1K/F_4
2
RTC_N03
Pin Name Strap description Sampled Configuration PU/PD
1
CN20 R540
0 = The Flash Descriptor Security will be overridden.
HDA_DOCK_EN/ Flash Descriptor Security This strap should only be enabled in manufacturing BAT_CONN
PWROK 1 = The security measures defined *150K/F_6
Override Strap environments using an external pull-up resistor.
2
GPIO33 in the Flash Descriptor will be in effect
A PCI Express Lane Reversal Internal PU

Change type A
SATALED# PWROK
(Lanes 1-4)
ICH_TP3 HDA_SDOUT Description

TP3 XOR Chain Entrance PWROK ICH_TP3 R545 *1K_4
0 0 RSVD
14 ICH_TP3
0 1 Enter XOR Chain PROJECT : ZR6
XOR Chain Entrance /PCI Express*
HDA_SDOUT Port Config 1 bit 1(Port 1-4) PWROK 1 0 Normal opration(Default) HDA_SDOUT_R R240 *1K_4 +3V Size Document Number Rev
1A
1 1 Set PCIE port config bit 1
ICH9M HOST
5 4 3 2 1
5 4 3 2 1
ICH9M(CLG)
U32B
N29
U32D
PERN1 DMI0RXN V27 DMI_RXN0 6
13
Direct Media Interface

N28 PERP1 DMI0RXP V26 DMI_RXP0 6
D11 F1 REQ0# P27 U29
AD0 REQ0# PETN1 DMI0TXN DMI_TXN0 6
C8 G4 GNT0# P26 U28
D9
AD1 PCI GNT0#
B6 REQ1# PETP1 DMI0TXP DMI_TXP0 6
AD2 REQ1#/GPIO50 GNT1#
E12 AD3 GNT1#/GPIO51 A7 T54 L29 PERN2 DMI1RXN Y27 DMI_RXN1 6
E9 F13 REQ2# L28 Y26
AD4 REQ2#/GPIO52 PERP2 DMI1RXP DMI_RXP1 6
C9 F12 GNT2# T44 M27 W29
AD5 GNT2#/GPIO53 PETN2 DMI1TXN DMI_TXN1 6
E10 E6 REQ3# M26 W28
AD6 REQ3#/GPIO54 PETP2 DMI1TXP DMI_TXP1 6
B7 F6 GNT3# T43
AD7 GNT3#/GPIO55
D C7 AD8 J29 PERN3 DMI2RXN AB27 DMI_RXN2 6 D
C5 D8 J28 AB26
PCI-Express
AD9 C/BE0# PERP3 DMI2RXP DMI_RXP2 6
G11 AD10 C/BE1# B4 K27 PETN3 DMI2TXN AA29 DMI_TXN2 6
F8 AD11 C/BE2# D6 K26 PETP3 DMI2TXP AA28 DMI_TXP2 6
F11 AD12 C/BE3# A5
E7 AD13 26 PCIE_RXN4 G29 PERN4 DMI3RXN AD27 DMI_RXN3 6
A3 D3 IRDY# G28 AD26
AD14 IRDY# 26 PCIE_RXP4 PERP4 DMI3RXP DMI_RXP3 6
D2 E3 WLAN 26 PCIE_TXN4 C423 .1u/10V_4 PCIE_TXN4_C H27 AC29
AD15 PAR PETN4 DMI3TXN DMI_TXN3 6
F10 R1 PCIRST# 26 PCIE_TXP4 C420 .1u/10V_4 PCIE_TXP4_C H26 AC28
AD16 PCIRST# PCIRST# 26 PETP4 DMI3TXP DMI_TXP3 6
D5 C6 DEVSEL#
AD17 DEVSEL# PERR#
D10 AD18 PERR# E4 E29 PERN5 DMI_CLKN T26 CLK_PCIE_ICH# 2
B3 C2 LOCK# E28 T25
AD19 PLOCK# PERP5 DMI_CLKP CLK_PCIE_ICH 2
F7 J4 SERR# F27
AD20 SERR# STOP# PETN5
C3 AD21 STOP# A4 F26 PETP5 DMI_ZCOMP AF29
F3 F5 TRDY# AF28 DMI_IRCOMP_R R249 24.9/F_4 +1.5V
AD22 TRDY# FRAME# DMI_IRCOMP
F4 AD23 FRAME# D7 28 GLAN_RXN C29 PERN6/GLAN_RXN
C1 AD24 28 GLAN_RXP C28 PERP6/GLAN_RXP USBP0N AC5 USBP0- 26
G7 AD25 PLTRST# C14 PLT_RST#
PLT_RST# 6 GLAN 28 GLAN_TXN
C431 .1u/10V_4 GLAN_TXN_SB D27 PETN6/GLAN_TXN USBP0P AC4 USBP0+ 26 EXT-USB
H7 D4 PCLK_ICH 2 C429 .1u/10V_4 GLAN_TXP_SB D26 AD3
AD26 PCICLK 28 GLAN_TXP PETP6/GLAN_TXP USBP1N USBP1- 30
D1 AD27 PME# R2 USBP1P AD2 USBP1+ 30 Cardreader
G5 T58 SPI_CLK_SB D23 AC1 USBP2- 26
AD28 SPI_CS0# SPI_CLK USBP2N
H6 AD29 T51 D24 SPI_CS0# USBP2P AC2 USBP2+ 26 EXT-USB
G1 AD30 PME# internal PU 18K~42K PLACE NEAR ICH9 SPI_CS1# F23 SPI_CS1#/GPIO58/CLGPIO6 USBP3N AA5 USBP3- 26
H3 AD31 WITHIN 600 MIL USBP3P AA4 USBP3+ 26 BLUETOOTH
SPI_MOSI D25 AB2
SPI_MOSI USBP4N USBP4- 26
SPI_MISO Wireless
SPI
Interrupt I/F T52 E23 SPI_MISO USBP4P AB3 USBP4+ 26
INTA# J5 H4 INTE# AA1
INTB# PIRQA# PIRQE#/GPIO2 INTF# USBOC#0 USBP5N
E1 PIRQB# PIRQF#/GPIO3 K6 N4 OC0#/GPIO59 USBP5P AA2
INTC# J6 F2 INTG# USBOC#1 N5 W5
PIRQC# PIRQG#/GPIO4 OC1#/GPIO40 USBP6N USBP6- 26
INTD# C4 G2 INTH# USBOC#2 N6 W4 M/B USB Port
PIRQD# PIRQH#/GPIO5 USBOC#3 P6
OC2#/GPIO41 USB USBP6P
Y3
USBP6+ 26
ICH9M REV 1.0 USBOC#4 OC3#/GPIO42 USBP7N
M1 OC4#/GPIO43 USBP7P Y2
USBOC#5 N2 W1
C
USBOC#6 OC5#/GPIO29 USBP8N C
M4 OC6#/GPIO30 USBP8P W2
USBOC#7 M3 V2
USBOC#8 OC7#/GPIO31 USBP9N
N3 OC8#/GPIO44 USBP9P V3
USBOC#9 N1 U5
USBOC#10 OC9#/GPIO45 USBP10N
P5 OC10#/GPIO46 USBP10P U4
USBOC#11 P3 U1
OC11#/GPIO47 USBP11N USBP11- 24
USBP11P U2 USBP11+ 24 CAMERA
SB_USBBIAS AG2 USBRBIAS
AG1 USBRBIAS#
ICH9M REV 1.0
R226
22.6/F_4
L<0.5",Avoid routing next to clock/high speed signals.
+3V
South Bridge Strap Pin (2/3)

C468
.1u/10V_4
5
PCI Express Port 0 = Default

PLT_RST# 2 HDA_SYNC PWROK
+3V 4
Config 1 bit 0 (Port 1-4) 1 = Setting bit 0
RN27 PLTRST# 18,26,28,30,31
1
B REQ3# 6 5 B
TRDY# 7 4 REQ2# U19 R346 PCI Express Port 0 = Setting bit 2
PWROK
3
STOP# 8 3 FRAME# GNT2# / GPIO53

DEVSEL# 9 2 REQ1# TC7SH08FU 100K_4 Config 2 bit 2 (Port 5-6) 1 = Default
+3V 10 1 INTD#
8.2K_10P8R
GNT1# / GPIO51 ESI Strap(Server Only) PWROK 0 = DMI for ESI-compatible
1 = Default
+3V
RN26 RN25
INTC# 6 5 USBOC#5 6 5 +3V_S5
GNT3# / GPIO55 PWROK 0 = "top-block swap" mode
INTA# 7 4 USBOC#4 7 4 USBOC#2 Top-Block Swap Override 1 = Default
GNT3# R309 *1K_4
SERR# 8 3 USBOC#7 8 3 USBOC#1
INTE# 9 2 INTF# USBOC#0 9 2 USBOC#6
+3V 10 1 INTG# +3V_S5 10 1 USBOC#3
SPI_MOSI Integrated TPM Enable 0 = INT TPM disable(Default)

8.2K_10P8R
10K_10P8R CLPWROK 1 = INT TPM enable
SPI_MOSI R277 *10K_4 +3V_S5
+3V
RN39
PCI_GNT#0 SPI_CS#1 Boot Location
LOCK# 6 5 RN21 GNT0# Boot BIOS Selection 0 PWROK GNT0# R293 *1K_4
7 4 IRDY# USBOC#9 8 7 +3V_S5
REQ0# 8 3 PERR# USBOC#11 6 5 0 1 SPI
9 2 INTB# USBOC#8 4 3
+3V 10 1 INTH# USBOC#10 2 1
SPI_CS1# / 1 0 PCI
8.2K_10P8R 10K_8P4R Boot BIOS Selection 1 CLPWROK SPI_CS1# R274 *1K_4
GPIO58 / CLGPIO6
1 1 LPC(Default)
A A

PROJECT : ZR6
1A
ICH9M PCIE / PCI / USB
5 4 3 2 1
5 4 3 2 1
14
D3A:(1/31) ASF issue:when iAMT is not implemented,
+3V_S5
R547 10K_4 SMB_CLK_ME

ICH9M(CLG) ICH8M SMBus and SMLink should be connected together to support slave mode
Connect SMLINK0 to SMBCLK and SMLINK1 to SMBDATA (Add R474,R475 for debug use)
SATA[x]GP pins if unused require
8.2-k to 10-k pull-up to Vcc3_3 or
8.2-k to 10-k pull-down to ground
R546 10K_4 SMB_DATA_ME
U32C For EMI(EMI)
R552 2.2K_4 PCLK_SMB PCLK_SMB G16 AH23 BOARD_ID2
2,16,26,28 PCLK_SMB SMBCLK SATA0GP/GPIO21 C428 R288
PDAT_SMB A13 AF19 PANEL_ID0 R231 10K_4
2,16,26,28 PDAT_SMB SMBDATA SATA1GP/GPIO19
R553 2.2K_4 PDAT_SMB ICH_GPIO60 E17 AE21 ICH_GPIO36 R236 10K_4 14M_ICH
LINKALERT#/GPIO60/CLGPIO4 SATA4GP/GPIO36
SATA
GPIO
SMB_CLK_ME ICH_GPIO37 R233 10K_4
SMB
C17 SMLINK0 SATA5GP/GPIO37 AD20 +3V
R285 10K_4 RI# SMB_DATA_ME B18
SMLINK1 *10p/50V_4 *22_4
CLK14 H1 14M_ICH 2
R336 10K_4 ICH_GPIO60 RI# F19 AF3 CLKUSB_48 2
Clocks
RI# CLK48
C377 R250
R284 10K_4 SYS_RST# T34 R4 P1 T35
D SYS_RST# SUS_STAT#/LPCPD# SUSCLK CLKUSB_48 D
3 SYS_RST# G19 SYS_RESET#
R548 10K_4 SMB_ALERT# C16
SLP_S3# SUSB# 6,31
6 PM_SYNC# M6 PMSYNC#/GPIO0 SLP_S4# E16 SUSC# 6,31 *10p/50V_4 *22_4
R286 10K_4 PCIE_WAKE# G17 T40
SMB_ALERT# SLP_S5#
A17 SMBALERT#/GPIO11
R549 8.2K_4 PM_BATLOW# C10 T47
PM_STPPCI# S4_STATE#/GPIO26
2 PM_STPPCI# A14 STP_PCI# <Checklist ver0.8>
R268 *10K_4 DNBSWON# PM_STPCPU# E19 G20 ICH_PWROK
SYS GPIO
2 PM_STPCPU# STP_CPU# PWROK If integrated LAN is not used LAN_RST# tie it to GND.NC serial R from RSMRST#.
PWRBTN : 16 ms of internal debounce
R550 10K_4 ICH_GPIO12 logic on this pin and internal PU 24K CLKRUN# L4 M2
If Intel LAN is used with Wake On LAN, tie LAN_RST# to RSMRST# and NC 0ohm.
31 CLKRUN# CLKRUN# DPRSLPVR/GPIO16 PM_DPRSLPVR 6,35
R327 10K_4 ICH_GPIO13 PCIE_WAKE# PM_BATLOW#
Power MGT
26,28,31 PCIE_WAKE# E20 WAKE# BATLOW# B13
31 SERIRQ M5 SERIRQ
+3V THERM_ALERT# AJ23 R3
3 THERM_ALERT# THRM# PWRBTN# DNBSWON# 31
CL_PWROK must not assert after PWROK asserts for IAMT.
R287 8.2K_4 CLKRUN# VR_PWRGD_CLKEN D21 D20 PM_LAN_ENABLE_R R328 *short0402
VRMPWRGD LAN_RST# CL_PWROK to the NB and SB should be connected to existing PWROK inputs
R281 8.2K_4 SERIRQ A20 D22 PM_RSMRST#_R R317 *0_4 PM_RSMRST#_R on the NB and SB on a platform with no IAMT
T82 TP12 RSMRST#
R489 8.2K_4 THERM_ALERT# D31 BAS316 KBSMI#_ICH AG19 R5
31 KBSMI# GPIO1 CK_PWRGD CK_PWRGD 2
D32 BAS316 LID591#_ICH AH21
24,31 LID591# GPIO6
R573 10K_4 EC_SCI# HDMI_SET AG21 R6
GPIO7 CLPWROK MPWROK 6,31
31 EC_SCI# A21 GPIO8
R583 *10K_4 HDMI_SET ICH_GPIO12 C12 B16 T79
ICH_GPIO13 LAN_PHY_PWR_CTRL/GPIO12 SLP_M#
C21
R282 *10K_4 SATACLKREQ# BOARD_ID0
BOARD_ID1
AE18
ENERGY_DETECT/GPIO13
GPIO17 CL_CLK0 F24 CL_CLK0 6
CL VREF
K1 GPIO18 CL_CLK1 B19 T81 <Checklist ver0.8>
R486 *10K_4 MCH_ICH_SYNC# PANEL_ID1 AF8 GPIO20 VREF1 CRB connect to The ICH9M Controller
BOARD_ID3 AJ22 F22
SCLOCK/GPIO22 CL_DATA0 CL_DATA0 6 +3V_S5 Link 1 VREF circuit is
R479 10K_4 KBSMI#_ICH
Controller Link
T55 A9 C19 T57 Checklist connect to
GPIO
GPIO27 CL_DATA1 required only if Intel
T56 D19 GPIO28
R480 10K_4 LID591#_ICH
2 SATACLKREQ#
SATACLKREQ# L1 C25 CL_VREF0_SB +3V(iAMT reserve) AMT is to be supported.
C CR_WAKE# SATACLKREQ#/GPIO35 CL_VREF0 CL_VREF1_SB C
AE19 SLOAD/GPIO38 CL_VREF1 A19
R554 10K_4 PM_STPPCI# ICH_GPIO39 AG22
ICH_GPIO48 SDATAOUT0/GPIO39
AF21 SDATAOUT1/GPIO48 CL_RST0# F21 CL_RST#0 6
R337 10K_4 PM_STPCPU# DMI_TERM_SEL AH24 D18 T53 +3V +3V
ICH_GPIO57 GPIO49 CL_RST1#
A8 GPIO57/CLGPIO5
MEM_LED/GPIO24 A16 T80
+3V_S5 M7 C18 ICH_GPIO10 R318 10K_4
27 PCSPK SPKR GPIO10/SUS_PWR_ACK +3V_S5
TPM Physical MCH_ICH_SYNC# AJ24 C11 ICH_GPIO14 R312 10K_4 R563 R319
6 MCH_ICH_SYNC# MCH_SYNC# GPIO14/AC_PRESENT
R551 10K_4 ICH_TP3 B21 C20 ICH_GPIO9 R306 10K_4
Presence for 12 ICH_TP3 TP3 WOL_EN/GPIO9
ICH_GPIO57 *3.24K/F_6 3.24K/F_6
MISC
T75 AH20
R556 *100/F_4 iTPM. AJ20
TP9
ZS2 Default not
T76 TP10
AJ21 CL_VREF1_SB CL_VREF0_SB
T23 TP11 support IAMT. So this
Stuff HDMI SET ICH9M REV 1.0 interface follow
R256 10K_4 CR_WAKE# CRB/Checklist PU R558 C700 R313 C436
only
R290 10K_4 ICH_PWROK R583 HDMI *453/F_4 *.1u/10V_4 453/F_4 .1u/10V_4
R315 10K_4 HDMI_SET

R315 No HDMI
+3V_S5
ICH PWROK Resume RST M/B ID ID0=0 -->ZK6 ,ID0=1 -->ZR6
ID1=0 -->UMA ,ID1=1 -->Discrete
R571 *10K_4 EC_SCI#
PM_RSMRST#_R 3 1 +3V +3V +3V +3V
RSMRST# 31
Q17
R329 MMBT3906
2
B +3V R492 R487 R298 R230 B
+3V_S5 10K_4 R291 4.7K_4 +3V_S5
R245 10K_4 PANEL_ID1 DELAY_VR_PWRGOOD need PU 2K to +3V. *10K_4 *10K_4 EV@10K_4 10K_4
2
C430 *.1u/10V_4 D36
R490 10K_4 ICH_GPIO39
ZS2 PU at power side BOARD_ID3 BOARD_ID2 BOARD_ID1 BOARD_ID0
3 BAV99
5
R232 10K_4 ICH_GPIO48 1 DELAY_VR_PWRGOOD 3,6,31,35

ICH_PWROK 4
2 PWROK_EC R491 R488 R308 R229
PWROK_EC 31
1
U15
3
R289 100K_4 ZD1 INTEL FAE (08/17) 10K_4 10K_4 IV@10K_4 *10K_4
Follow CHECK LIST V1.5
2
TC7SH08FU D26
"Add RSMRST# isolation (important!!! See
3 BAV99
ww22 Santa Rosa MoW)"
Default stuff for Teenah(Interposer) chipset
ZS2 Intel FAE suggestion to add for to protect
R314
RTC/CMOS data from corruption when system
1
2.2K_4 encounters an abnormal power down
sequence Board ID ID3 ID2 ID1 ID0
A-SMT,ID1=0 -->UMA ,ID1=1 -->Discrete 0 0 0/1 1

0 0 0/1 1
South Bridge Strap Pin (3/3) CLK Enable +3V
0 0 0/1 1
A
C419 0 0 0/1 1 A
*.1u/10V_4
GPIO20 Reserved PWROK U20 0 0 0/1 1
1 5
35 VR_PWRGD_CK410# 2
0 = Default 3 4 VR_PWRGD_CLKEN
SPKR No Reboot PWROK PCSPK R271 *1K_4 +3V
1 = No Reboot mode
NC7SZ04 R339
DMI Termination
0 = for desktop applications 100K_4 PROJECT : ZR6
GPIO49 PWROK 1 = for mobile applications DMI_TERM_SEL R485 *1K_4 Size Document Number Rev
Voltage Internal PU 1A
ICH9M GPIO
5 4 3 2 1
5 4 3 2 1
ICH9M(CLG) Power consumption reference to

Intel ICH9 Family EDS Rev 1.6
15
IV@ 2~3.456v 1.05V
U32E
3.6uA_G3 U32F 1634mA AA26 H5
EV@ +VCCRTC A23 VCCRTC VCC1_05[01] A15 +1.05V AA27
VSS[001]
VSS[002]
VSS[107]
VSS[108] J23
VCC1_05[02] B15 AA3 VSS[003] VSS[109] J26
C707 C705 A6 C15 C394 C404 AA6 J27
V5REF VCC1_05[03] VSS[004] VSS[110]
VCC1_05[04] D15 AB1 VSS[005] VSS[111] AC22
.1u/10V_4 .1u/10V_4 AE1 E15 .1u/10V_4 .1u/10V_4 1.5V AA23 K28
V5REF_SUS VCC1_05[05] VSS[006] VSS[112]
F15 AB28 K29
CHANGE TO 100OHM & 1UF
5V VCC1_05[06] 23mA VSS[007] VSS[113]

AA24 L11 AB29 L13
PER INTEL SUGGESTION:
D 2mA VCC1_5_B[01] VCC1_05[07] VSS[008] VSS[114] D

AA25 VCC1_5_B[02] VCC1_05[08] L12 AB4 VSS[009] VSS[115] L15
+3V D27 2 1 CH751 SB_V5REF AB24 L14 +1.5V_ICH_VCCDMIPLL L28 1uh_6_25mA +1.5V AB5 L2
VCC1_5_B[03] VCC1_05[09] VSS[010] VSS[116]
AB25 VCC1_5_B[04] VCC1_05[10] L16 AC17 VSS[011] VSS[117] L26
C458 AC24 VCC1_5_B[05] VCC1_05[11] L17 C414 C415 500 mA, 20% AC26 VSS[012] VSS[118] L27
+5V R335 100/F_6 5V AC25 L18 AC27 L5
1u/10V_4 VCC1_5_B[06] VCC1_05[12] .01u/25V_4 10u/6.3V_6 VSS[013] VSS[119]
S0:2mA AD24 VCC1_5_B[07] VCC1_05[13] M11 AC3 VSS[014] VSS[120] L7
AD25 VCC1_5_B[08] VCC1_05[14] M18 1.05V AD1 VSS[015] VSS[121] M12
S3/4/5:1mA AE25 P11 AD10 M13
D33 +5VPCU_ICH_V5REF_SUS VCC1_5_B[09] VCC1_05[15] 48mA VSS[016] VSS[122]
+3V_S5 2 1 CH751 AE26 VCC1_5_B[10] VCC1_05[16] P18 AD12 VSS[017] VSS[123] M14
AE27 VCC1_5_B[11] VCC1_05[17] T11 AD13 VSS[018] VSS[124] M15
MODIFY C639 AE28 T18 +1.05V_ICH_DMI L27 NBQ160808T-100Y-N_6_400mA +1.05V AD14 M16
R498 100/F_6 VCC1_5_B[12] VCC1_05[18] VSS[019] VSS[125]
+5V_S5 AE29 VCC1_5_B[13] VCC1_05[19] U11 AD17 VSS[020] VSS[126] M17
.1u/10V_4 F25 U18 C401 C402 5 Ohms @ 100 MHz , 0.7A AD18 M23
CORE
VCC1_5_B[14] VCC1_05[20] VSS[021] VSS[127]
G25 VCC1_5_B[15] VCC1_05[21] V11 AD21 VSS[022] VSS[128] M28
1.5V H24 V12 4.7u/6.3V_6 22u/6.3V_8 AD28 M29
VCC1_5_B[16] VCC1_05[22] VSS[023] VSS[129]
330 Ohms@ 100 MHz , 0805 H25 VCC1_5_B[17] VCC1_05[23] V14 AD29 VSS[024] VSS[130] N11
646mA J24 V16 +1.05V AD4 N12
L24 +1.5V_B VCC1_5_B[18] VCC1_05[24] VSS[025] VSS[131]
+1.5V 1 2 BLM21PG331SN1D_8_1.5A J25 VCC1_5_B[19] VCC1_05[25] V17 1.05V AD5 VSS[026] VSS[132] N13
K24 VCC1_5_B[20] VCC1_05[26] V18 AD6 VSS[027] VSS[133] N14
K25
2mA AD7 N15
+ C657 C408 C386 C388 VCC1_5_B[21] VSS[028] VSS[134]
L23 VCC1_5_B[22] VCCDMIPLL R29 AD9 VSS[029] VSS[135] N16
L24 C405 C413 C382 AE12 N17
220u/2.5V_3528 22u/6.3V_8 22u/6.3V_8 2.2u/6.3V_6 VCC1_5_B[23] VSS[030] VSS[136]
L25 VCC1_5_B[24] VCC_DMI[1] W23 AE13 VSS[031] VSS[137] N18
M24 Y23 .1u/10V_4 .1u/10V_4 4.7u/6.3V_6 AE14 N26
VCC1_5_B[25] VCC_DMI[2] VSS[032] VSS[138]
M25 VCC1_5_B[26] AE16 VSS[033] VSS[139] N27
N23 VCC1_5_B[27] V_CPU_IO[1] AB23 AE17 VSS[034] VSS[140] P12
N24 VCC1_5_B[28] V_CPU_IO[2] AC23 AE2 VSS[035] VSS[141] P13
N25 VCC1_5_B[29] AE20 VSS[036] VSS[142] P14
P24 VCC1_5_B[30] VCC3_3[01] AG29 +3V AE24 VSS[037] VSS[143] P15
P25 VCC1_5_B[31] AE3 VSS[038] VSS[144] P16
VCCA3GP
R24 AJ6 C370 C378 C379 3.3V AE4 P17
VCC1_5_B[32] VCC3_3[02] VSS[039] VSS[145]
R25 VCC1_5_B[33] AE6 VSS[040] VSS[146] P2
R26 AC10 .1u/10V_4 .1u/10V_4 .1u/10V_4 308mA AE9 P23
VCC1_5_B[34] VCC3_3[07] VSS[041] VSS[147]
R27 VCC1_5_B[35] AF13 VSS[042] VSS[148] P28
T24 VCC1_5_B[36] VCC3_3[03] AD19 AF16 VSS[043] VSS[149] P29
T27 VCC1_5_B[37] VCC3_3[04] AF20 Impact ICH9M VCCHDA and AF18 VSS[044] VSS[150] P4
T28 AG24 AF22 P7
VCC1_5_B[38] VCC3_3[05] VCCSUSHDA supply 1.5V/3.3V VSS[045] VSS[151]
VCCP_CORE
C T29 VCC1_5_B[39] VCC3_3[06] AC20 AH26 VSS[046] VSS[152] R11 C
U24 VCC1_5_B[40] AF26 VSS[047] VSS[153] R12
U25 B9 C438 C374 C417 AF27 R13
VCC1_5_B[41] VCC3_3[08] VSS[048] VSS[154]
V24 VCC1_5_B[42] VCC3_3[09] F9 Support INT HDMI HDA AF5 VSS[049] VSS[155] R14
V25 G3 .1u/10V_4 .1u/10V_4 .1u/10V_4 AF7 R15
U23
VCC1_5_B[43] VCC3_3[10]
G6 R475 EV@0_6 +3V 1.5V / 3.3V interface. These power AF9
VSS[050] VSS[156]
R16
VCC1_5_B[44] VCC3_3[11] VSS[051] VSS[157]
W24 VCC1_5_B[45] VCC3_3[12] J2
C632 R477 IV@0_6 +1.5V
11mA only support 1.5V.Device AG13 VSS[052] VSS[158] R17
W25 VCC1_5_B[46] VCC3_3[13] J7 AG16 VSS[053] VSS[159] R18
must to meet.
PCI
1.5V K23 VCC1_5_B[47] VCC3_3[14] K7 AG18 VSS[054] VSS[160] R28
Y24 .1u/10V_4 AG20 T12
47mA VCC1_5_B[48] +3V_HDA_IO_ICH VSS[055] VSS[161]
Y25 VCC1_5_B[49] VCCHDA AJ4 AG23 VSS[056] VSS[162] T13
AG3 VSS[057] VSS[163] T14
+1.5V L43 10uH_8_155mA +1.5V_APLL_ICH AJ19 AJ3 +3V_VCCSUSHDA R478 EV@0_6 +3V_S5 NOTE: AG6 T15
VCCSATAPLL VCCSUSHDA VSS[058] VSS[164]
If (G)MCH's HD Audio signals are connected to ICH9M for AG9 VSS[059] VSS[165] T16
C630 C631 AC16 AC8 TP_VCCSUS1_05_ICH_1 T29 C633 R476 IV@0_6 +1.5VSUS AH12 T17
AD15
VCC1_5_A[01] VCCSUS1_05[1]
F17 TP_VCCSUS1_05_ICH_2 iHDMI, VCCHDA and VCCSUSHDA on ICH9M should be AH14
VSS[060] VSS[166]
T23
VCC1_5_A[02] VCCSUS1_05[2] T41 VSS[061] VSS[167]
10u/6.3V_6 1u/10V_4 AD16 .1u/10V_4 1.5V / 3.3V only on 1.5V. These power pins on ICH9M can be supplied AH17 B26
VCC1_5_A[03] TP_VCCSUS1_5_ICH_1 VSS[062] VSS[168]
ARX
AE15 VCC1_5_A[04] VCCSUS1_5[1] AD8 T28 S0:11mA with 3.3V if and only if (G)MCH's HDA is not connected to AH19 VSS[063] VSS[169] U12
AF15 VCC1_5_A[05] S3/4/5:1mA ICH9M. Consequently, only 1.5V audio/modem codecs can AH2 VSS[064] VSS[170] U13
AG15 F18 VCCSUS1_5_INT_ICH AH22 U14
AH15
VCC1_5_A[06] VCCSUS1_5[2] be used on the platform. AH25
VSS[065] VSS[171]
U15
VCC1_5_A VCC1_5_A[07] C427 VSS[066] VSS[172]
AJ15 VCC1_5_A[08] AH28 VSS[067] VSS[173] U16
1.5V C380 A18 AH5 U17
VCCSUS3_3[01] .1u/10V_4 VSS[068] VSS[174]
1342mA AC11 D16 VCCSUS1_05 power by VCC1_05 in S0 / VCCSUS3_3 in S3/S4/S5 AH8 AD23
VCCPSUS
1u/10V_4 VCC1_5_A[09] VCCSUS3_3[02] VSS[069] VSS[175]

AD11 VCC1_5_A[10] VCCSUS3_3[03] D17 AJ12 VSS[070] VSS[176] U26
AE11 E22
VCCSUS1_5 power by VCC1_5_A in S0 / VCCSUS3_3 in S3/S4/S5 AJ14 U27
VCC1_5_A[11] VCCSUS3_3[04] VSS[071] VSS[177]
ATX
AF11 VCC1_5_A[12] AJ17 VSS[072] VSS[178] U3

AG10 VCC1_5_A[13] AJ8 VSS[073] VSS[179] V1
AG11 VCC1_5_A[14] VCCSUS3_3[05] AF1 +3V_S5 B11 VSS[074] VSS[180] V13
AH10 VCC1_5_A[15] B14 VSS[075] VSS[181] V15
C385 AJ10 T1 3.3V B17 V23
VCC1_5_A[16] VCCSUS3_3[06] C392 C396 C393 VSS[076] VSS[182]
VCCSUS3_3[07] T2 S0:212mA B2 VSS[077] VSS[183] V28
1u/10V_4 AC9 T3 B20 V29
VCC1_5_A[17] VCCSUS3_3[08] .022u/16V_4 .022u/16V_4 .1u/10V_4 S3/4/5:53mA VSS[078] VSS[184]
VCCSUS3_3[09] T4 B23 VSS[079] VSS[185] V4
AC18 VCC1_5_A[18] VCCSUS3_3[10] T5 B5 VSS[080] VSS[186] V5
AC19 VCC1_5_A[19] VCCSUS3_3[11] T6 B8 VSS[081] VSS[187] W26
VCCSUS3_3[12] U6 C26 VSS[082] VSS[188] W27
AC21 U7 C27 W3
VCCPUSB
B VCC1_5_A[20] VCCSUS3_3[13] VSS[083] VSS[189] B

1.5V VCCSUS3_3[14] V6 E11 VSS[084] VSS[190] Y1
G10 VCC1_5_A[21] VCCSUS3_3[15] V7 E14 VSS[085] VSS[191] Y28
11mA G9 W6 E18 Y29
VCCSUS3_3[17] W7 E2 VSS[087] VSS[193] Y4
AC12 VCC1_5_A[23] VCCSUS3_3[18] Y6 E21 VSS[088] VSS[194] Y5
C381 AC13 Y7 E24 AG28
AC14 VCC1_5_A[25] VCCSUS3_3[20] T7 E5 VSS[090] VSS[196] AH6
.1u/10V_4 E8 AF2
VCCCL1_05_INT_ICH VSS[091] VSS[197]
AJ5 VCCUSBPLL VCCCL1_05 G22 F16 VSS[092] VSS[198] B25
F28 VSS[093]
AA7 G23 VCCCL1_5_INT_ICH C425 VCCCL1_05 power by VCC1_05_A in S0 F29 A1
VCC1_5_A[26] VCCCL1_5 VSS[094] VSS_NCTF[01]
USB CORE
AB6 VCC1_5_A[27] G12 VSS[095] VSS_NCTF[02] A2

C424 AB7 A24 C421 C426 .1u/10V_4 VCCCL1_5 power by VCC1_5_A in S0 G14 A28
VCC1_5_A[28] VCCCL3_3[1] VSS[096] VSS_NCTF[03]
1.05V , Powered by VCC1_05 in S0 AC6 VCC1_5_A[29] VCCCL3_3[2] B24 G18 VSS[097] VSS_NCTF[04] A29
.1u/10V_4 AC7 *1u/10V_4 *.1u/10V_4 G21 AH1
VCC1_5_A[30] VSS[098] VSS_NCTF[05]
G24 VSS[099] VSS_NCTF[06] AH29
A10 VCCLAN1_05[1] 3.3V G26 VSS[100] VSS_NCTF[07] AJ1
C441 .1u/10V_4 VCCLAN1_05_INT_ICH A11 G27 AJ2
VCCLAN1_05[2] S0:19mA VSS[101] VSS_NCTF[08]
G8 VSS[102] VSS_NCTF[09] AJ28
3.3V A12 S3/4/5:73mA H2 AJ29
R342 *short0603 VCCLAN3_3 VCCLAN3_3[1] VCCCL3_3 R341 *short0603 VSS[103] VSS_NCTF[10]
S0:19mA +3V B12 VCCLAN3_3[2] +3V H23 VSS[104] VSS_NCTF[11] B1
H28 VSS[105] VSS_NCTF[12] B29
S3/4/5:78mA If use SB MAC for LAN function. C460 A27 H29
VCCGLANPLL VSS[106]
And support wake up need
GLAN POWER
.1u/10V_4 D28 ICH9M REV 1.0

connect to relation power. D29
VCCGLAN1_5[1]
If use SB MAC for LAN function. And
VCCGLAN1_5[2]
E26 VCCGLAN1_5[3] support wake up need connect to
+1.5V L33 1uh_6_25mA +1.5V_ICH_GLANPLL_R E27 VCCGLAN1_5[4] relation power.
1.5V C462 A26
C461 VCCGLAN3_3
23mA 10u/6.3V_6 2.2u/6.3V_6 ICH9M REV 1.0
1.5V +1.5V_B
80mA
A C389 A
MODIFY 4.7u/6.3V_6
3.3V R320 *short0603 VCCGLAN3_3

+3V
1mA

PROJECT : ZR6
1A
ICH9 POWER
5 4 3 2 1
5 4 3 2 1
DDR3 (DDR)
16
+3V
R378 R377
2
10K_4 10K_4
3 1 SDA_DDR
2,14,26,28 PDAT_SMB
Q19
CN13A M_A_DQ[63:0] 8
D 8 M_A_A[14:0] D
M_A_A0 98 5 M_A_DQ0 +3V RHU002N06
M_A_A1 A0 DQ0 M_A_DQ1
97 A1 DQ1 7
M_A_A2 96 15 M_A_DQ2
95 A3 DQ3 17
2
M_A_A4 92 4 M_A_DQ4
91 A5 DQ5 6
M_A_A6 90 16 M_A_DQ6 3 1 SCL_DDR
A6 DQ6 2,14,26,28 PCLK_SMB
M_A_A7 86 18 M_A_DQ7
M_A_A8 A7 DQ7 M_A_DQ8 Q18
89 A8 DQ8 21
M_A_A9 85 23 M_A_DQ9
M_A_A10 A9 DQ9 M_A_DQ10 RHU002N06
107 A10/AP DQ10 33
M_A_A11 84 35 M_A_DQ11 +1.5VSUS
83 A12/BC# DQ12 22
M_A_A13 119 24 M_A_DQ13
80 A14 DQ14 34 CN13B
M_A_A15 78 36 M_A_DQ15
PC2100 DDR3 SDRAM SO-DIMM

TP2 A15 DQ15
39 M_A_DQ16 75 44
DQ16 M_A_DQ17 VDD1 VSS16
8 M_A_BS0 109 BA0 DQ17 41 76 VDD2 VSS17 48
108 51 M_A_DQ18 81 49
8 M_A_BS1 BA1 DQ18 VDD3 VSS18
79 53 M_A_DQ19 82 54
8 M_A_BS2 BA2 DQ19 VDD4 VSS19
114 40 M_A_DQ20 87 55
6 M_CS#0 S0# DQ20 VDD5 VSS20
121 42 M_A_DQ21 88 60
101 50 M_A_DQ22 93 61
6 M_CLK0 CK0 DQ22 VDD7 VSS22
103 52 M_A_DQ23 94 65
6 M_CLK#0 CK0# DQ23 VDD8 VSS23
102 57 M_A_DQ24 99 66
104 59 M_A_DQ25 100 71
73 67 M_A_DQ26 105

6 M_CKE0 CKE0 DQ26 VDD11 VSS26 72
74 69 M_A_DQ27 106 127
6 M_CKE1 CKE1 DQ27 VDD12 VSS27
115 56 M_A_DQ28 111 128
8 M_A_CAS# CAS# DQ28 VDD13 VSS28
C 110 58 M_A_DQ29 112 133 C
8 M_A_RAS# RAS# DQ29 VDD14 VSS29
113 68 M_A_DQ30 117 134
8 M_A_WE# WE# DQ30 VDD15 VSS30
R60 10K/F_4 DIMM0_SA0 197 70 M_A_DQ31 118 138
R61 10K/F_4 DIMM0_SA1 SA0 DQ31 M_A_DQ32 VDD16 VSS31
201 SA1 DQ32 129 123 VDD17 VSS32 139
SCL_DDR 202 131 M_A_DQ33 124 144
17 SCL_DDR SCL DQ33 VDD18 VSS33
SDA_DDR 200 141 M_A_DQ34 145
17 SDA_DDR SDA DQ34 VSS34
143 M_A_DQ35 199 150
DQ35 +3V VDDSPD VSS35
116 130 M_A_DQ36 151
6 M_ODT0 ODT0 DQ36 VSS36
120 132 M_A_DQ37 77 155
6 M_ODT1 ODT1 DQ37 NC1 VSS37
140 M_A_DQ38 122 156
8 M_A_DM[7:0] DQ38 NC2 VSS38
M_A_DM0 11 142 M_A_DQ39 125 161
M_A_DM1 DM0 DQ39 M_A_DQ40 NCTEST VSS39
28 DM1 DQ40 147 VSS40 162
(204P)
M_A_DM2 46 149 M_A_DQ41 198 167

DM2 DQ41 6 PM_EXTTS#0 EVENT# VSS41
M_A_DM3 63 157 M_A_DQ42 30 168
DM3 DQ42 6,17 DDR3_DRAMRST# RESET# VSS42
M_A_DM4 136 159 M_A_DQ43 172
M_A_DM5 DM4 DQ43 M_A_DQ44 VSS43
153 DM5 DQ44 146 VSS44 173
M_A_DM6 170 148 M_A_DQ45 1 178
DM6 DQ45 +SMDDR_VREF VREF_DQ VSS45
M_A_DM7 187 158 M_A_DQ46 126 179
DM7 DQ46 M_A_DQ47 VREF_CA VSS46
8 M_A_DQS[7:0] DQ47 160 VSS47 184
M_A_DQS0 12 163 M_A_DQ48 185
M_A_DQS1 DQS0 DQ48 M_A_DQ49 VSS48
29 DQS1 DQ49 165 2 VSS1 VSS49 189
M_A_DQS2 47 175 M_A_DQ50 3 190
DQS2 DQ50 VSS2 VSS50
(204P)
M_A_DQS3 64 177 M_A_DQ51 8 195
M_A_DQS4 DQS3 DQ51 M_A_DQ52 VSS3 VSS51
137 DQS4 DQ52 164 9 VSS4 VSS52 196
M_A_DQS5 154 166 M_A_DQ53 13
M_A_DQS6 DQS5 DQ53 M_A_DQ54 VSS5
171 DQS6 DQ54 174 14 VSS6
M_A_DQS7 188 176 M_A_DQ55 19
8 M_A_DQS#[7:0] DQS7 DQ55 VSS7
M_A_DQS#0 10 181 M_A_DQ56 20
M_A_DQS#1 DQS#0 DQ56 M_A_DQ57 VSS8
27 DQS#1 DQ57 183 25 VSS9
M_A_DQS#2 45 191 M_A_DQ58 26 203 +SMDDR_VTERM
B
M_A_DQS#3 DQS#2 DQ58 M_A_DQ59 VSS10 VTT1 B
62 DQS#3 DQ59 193 31 VSS11 VTT2 204
M_A_DQS#4 135 180 M_A_DQ60 32
M_A_DQS#5 DQS#4 DQ60 M_A_DQ61 VSS12
152 DQS#5 DQ61 182 37 VSS13 G1 G1
M_A_DQS#6 169 192 M_A_DQ62 38 G2
M_A_DQS#7 DQS#6 DQ62 M_A_DQ63 VSS14 G2
186 DQS#7 DQ63 194 43 VSS15
DDR3-DIMM0 DDR3-DIMM0
+1.5VSUS +SMDDR_VREF
Place these Caps near So-Dimm0.
C109 *470P/50V_4
R78 *0_6
+SMDDR_VTERM 17,36,39
C207 C186 C165 C145 C134 C236 C196 C173 C155 C137 C214 C628
+ R93 *10K/F_4 +1.5VSUS
10U/6.3V_6 10U/6.3V_6 10U/6.3V_6 10U/6.3V_6 10U/6.3V_6 10U/6.3V_6 *.1U/10V_4 .1U/10V_4 *.1U/10V_4 .1U/10V_4 .1U/10V_4 R87 *10K/F_4
330U/6.3V_6X5.7
A +SMDDR_VREF +3V +SMDDR_VTERM A
C108 C106 C93 C90 C86 C76 C78 C77 C72 C71 C73
.1U/10V_4 2.2U/6.3V_6 2.2U/6.3V_6 .1U/10V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 *10U/6.3V_6 *10U/6.3V_6 10U/6.3V_6
PROJECT : ZR6
1A
DDR3 DIMM-0(H=5.2)
5 4 3 2 1
5 4 3 2 1
DDR3 (DDR)
17
CN12A M_B_DQ[63:0] 8
D 8 M_B_A[14:0] D
M_B_A0 98 5 M_B_DQ0
M_B_A1 A0 DQ0 M_B_DQ1
97 A1 DQ1 7
M_B_A2 96 15 M_B_DQ2
95 A3 DQ3 17
M_B_A4 92 4 M_B_DQ4
91 A5 DQ5 6
M_B_A6 90 16 M_B_DQ6
86 A7 DQ7 18
M_B_A8 89 21 M_B_DQ8
85 A9 DQ9 23
M_B_A10 107 33 M_B_DQ10
M_B_A11 A10/AP DQ10 M_B_DQ11 +1.5VSUS
84 A11 DQ11 35
M_B_A12 83 22 M_B_DQ12
M_B_A13 A12/BC# DQ12 M_B_DQ13
119 A13 DQ13 24
M_B_A14 80 34 M_B_DQ14
M_B_A15 A14 DQ14 M_B_DQ15 CN12B
78 36

TP3 A15 DQ15
39 M_B_DQ16 75 44
DQ16 M_B_DQ17 VDD1 VSS16
8 M_B_BS0 109 BA0 DQ17 41 76 VDD2 VSS17 48
108 51 M_B_DQ18 81 49
8 M_B_BS1 BA1 DQ18 VDD3 VSS18
79 53 M_B_DQ19 82 54
8 M_B_BS2 BA2 DQ19 VDD4 VSS19
114 40 M_B_DQ20 87 55
121 42 M_B_DQ21 88 60
101 50 M_B_DQ22 93 61
103 52 M_B_DQ23 94 65
102 57 M_B_DQ24 99 66
104 59 M_B_DQ25 100 71
73 67 M_B_DQ26 105

6 M_CKE2 CKE0 DQ26 VDD11 VSS26 72
74 69 M_B_DQ27 106 127
6 M_CKE3 CKE1 DQ27 VDD12 VSS27
115 56 M_B_DQ28 111 128
8 M_B_CAS# CAS# DQ28 VDD13 VSS28
C 110 58 M_B_DQ29 112 133 C
8 M_B_RAS# RAS# DQ29 VDD14 VSS29
113 68 M_B_DQ30 117 134
8 M_B_WE# WE# DQ30 VDD15 VSS30
R72 10K/F_4 DIMM1_SA0 197 70 M_B_DQ31 118 138
R71 10K/F_4 DIMM1_SA1 SA0 DQ31 M_B_DQ32 VDD16 VSS31
201 SA1 DQ32 129 123 VDD17 VSS32 139
202 131 M_B_DQ33 124 144
+3V 16 SCL_DDR SCL DQ33 VDD18 VSS33
200 141 M_B_DQ34 145
16 SDA_DDR SDA DQ34 VSS34
143 M_B_DQ35 199 150
DQ35 +3V VDDSPD VSS35
116 130 M_B_DQ36 151
6 M_ODT2 ODT0 DQ36 VSS36
120 132 M_B_DQ37 77 155
6 M_ODT3 ODT1 DQ37 NC1 VSS37
140 M_B_DQ38 122 156
8 M_B_DM[7:0] DQ38 NC2 VSS38
M_B_DM0 11 142 M_B_DQ39 125 161
M_B_DM1 DM0 DQ39 M_B_DQ40 NCTEST VSS39
28 DM1 DQ40 147 VSS40 162
(204P)
M_B_DM2 46 149 M_B_DQ41 198 167

DM2 DQ41 6 PM_EXTTS#1 EVENT# VSS41
M_B_DM3 63 157 M_B_DQ42 30 168
DM3 DQ42 6,16 DDR3_DRAMRST# RESET# VSS42
M_B_DM4 136 159 M_B_DQ43 172
M_B_DM5 DM4 DQ43 M_B_DQ44 VSS43
153 DM5 DQ44 146 VSS44 173
M_B_DM6 170 148 M_B_DQ45 1 178
DM6 DQ45 +SMDDR_VREF VREF_DQ VSS45
M_B_DM7 187 158 M_B_DQ46 126 179
DM7 DQ46 M_B_DQ47 VREF_CA VSS46
8 M_B_DQS[7:0] DQ47 160 VSS47 184
M_B_DQS0 12 163 M_B_DQ48 185
M_B_DQS1 DQS0 DQ48 M_B_DQ49 VSS48
29 DQS1 DQ49 165 2 VSS1 VSS49 189
M_B_DQS2 47 175 M_B_DQ50 3 190
DQS2 DQ50 VSS2 VSS50
(204P)
M_B_DQS3 64 177 M_B_DQ51 8 195
M_B_DQS4 DQS3 DQ51 M_B_DQ52 VSS3 VSS51
137 DQS4 DQ52 164 9 VSS4 VSS52 196
M_B_DQS5 154 166 M_B_DQ53 13
M_B_DQS6 DQS5 DQ53 M_B_DQ54 VSS5
171 DQS6 DQ54 174 14 VSS6
M_B_DQS7 188 176 M_B_DQ55 19
8 M_B_DQS#[7:0] DQS7 DQ55 VSS7
M_B_DQS#0 10 181 M_B_DQ56 20
M_B_DQS#1 DQS#0 DQ56 M_B_DQ57 VSS8
27 DQS#1 DQ57 183 25 VSS9
M_B_DQS#2 45 191 M_B_DQ58 26 203 +SMDDR_VTERM
B
M_B_DQS#3 DQS#2 DQ58 M_B_DQ59 VSS10 VTT1 B
62 DQS#3 DQ59 193 31 VSS11 VTT2 204
M_B_DQS#4 135 180 M_B_DQ60 32
M_B_DQS#5 DQS#4 DQ60 M_B_DQ61 VSS12
152 DQS#5 DQ61 182 37 VSS13 G1 G1
M_B_DQS#6 169 192 M_B_DQ62 38 G2
M_B_DQS#7 DQS#6 DQ62 M_B_DQ63 VSS14 G2
186 DQS#7 DQ63 194 43 VSS15
DDR3-DIMM1 DDR3-DIMM1
+1.5VSUS
Place these Caps near So-Dimm1.
C175 C233 C194 C252 C150 C208 C217 C138 C156 C172 C192 C502
+
10U/6.3V_6 10U/6.3V_6 10U/6.3V_6 10U/6.3V_6 10U/6.3V_6 10U/6.3V_6 *.1U/10V_4 .1U/10V_4 *.1U/10V_4 .1U/10V_4 .1U/10V_4
*330U/6.3V_6X5.7
A +SMDDR_VREF +3V +SMDDR_VTERM A
C115 C110 C92 C89 C81 C82 C80 C79 C74 C83 C84
.1U/10V_4 2.2U/6.3V_6 2.2U/6.3V_6 .1U/10V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 *10U/6.3V_6 *10U/6.3V_6 10U/6.3V_6
PROJECT : ZR6
1A
DDR3 DIMM-1(H=9.2)
5 4 3 2 1
5 4 3 2 1
NV10M (VGA)
18
U27A
+VGA1.1V BGA969-NVIDIA-NB9P-GS
~ 500mA
<SKU>
AK16 AP17 PEG_TXP0_R RN28 3 4 EV@0_4P2R

PEX_IOVDD_1 PEX_RX0 PEG_TXP0 7,24
AK17 AN17 PEG_TXN0_R 1 2
PEX_IOVDD_2 PEX_RX0* PEG_TXN0 7,24
C258 C280 C271 C256 C276 C269 C564 AK21 AN19 PEG_TXP1_R RN29 3 4 EV@0_4P2R
D PEX_IOVDD_3 PEX_RX1 PEG_TXP1 7,24 D
AK24 AP19 PEG_TXN1_R 1 2
PEX_IOVDD_4 PEX_RX1* PEG_TXN1 7,24
EV@22U/6.3V_8 EV@1U/6.3V_4 EV@.1U/10V_4 EV@.1U/10V_4 AK27 AR19 PEG_TXP2_R RN30 3 4 EV@0_4P2R
PEX_IOVDD_5 PEX_RX2 PEG_TXP2 7,24
EV@.47U/6.3V_4 AR20 PEG_TXN2_R 1 2
PEX_RX2* PEG_TXN2 7,24
EV@4.7U/6.3V_6 EV@1U/6.3V_4 AP20 PEG_TXP3_R RN31 3 4 EV@0_4P2R
PEX_RX3 PEG_TXP3 7,24
AN20 PEG_TXN3_R 1 2
PEX_RX3* PEG_TXN3 7,24
AG11 AN22 PEG_TXP4
PEX_IOVDDQ_1 PEX_RX4 PEG_TXP4 7
AG12 AP22 PEG_TXN4
PEX_IOVDDQ_2 PEX_RX4* PEG_TXN4 7
AG13 AR22 PEG_TXP5
+VGA1.1V PEX_IOVDDQ_3 PEX_RX5 PEG_TXP5 7
1600mA AG15
AG16
PEX_IOVDDQ_4 PEX_RX5* AR23
AP23
PEG_TXN5
PEG_TXP6
PEG_TXN5 7
PEG_TXP6 7
PEX_IOVDDQ_5 PEX_RX6 PEG_TXN6
AG17 PEX_IOVDDQ_6 PEX_RX6* AN23 PEG_TXN6 7
AG18 AN25 PEG_TXP7
C568 C566 C282 C558 C275 C257 AG22 AP25 PEG_TXN7
AG23 AR25 PEG_TXP8
EV@22U/6.3V_8 EV@1U/6.3V_4 EV@.47U/6.3V_4 EV@.1U/10V_4 AG24 AR26 PEG_TXN8
AG25 AP26 PEG_TXP9
EV@4.7U/6.3V_6 EV@.47U/6.3V_4 AG26 AN26 PEG_TXN9
AJ14 AN28 PEG_TXP10
AJ15 AP28 PEG_TXN10
AJ19 AR28 PEG_TXP11
AJ21 AR29 PEG_TXN11
AJ22 AP29 PEG_TXP12
AJ24 AN29 PEG_TXN12
AJ25 AN31 PEG_TXP13
AJ27 AP31 PEG_TXN13
AK18 AR31 PEG_TXP14
AK20 AR32 PEG_TXN14
AK23 AR34 PEG_TXP15
AK26 AP34 PEG_TXN15
C AL16 PEX_IOVDDQ_25
C
+3V AL17 C_PEG_RXP0 C317 EV@.1U/10V_4

PEX_TX0 PEG_RXP0 7
AM17 C_PEG_RXN0 C318 EV@.1U/10V_4
PEX_TX0* PEG_RXN0 7
J10
J11
VDD33_1 PCI EXPRESS PEX_TX1 AM18
AM19
C_PEG_RXP1
C_PEG_RXN1
C304
C303
EV@.1U/10V_4
EV@.1U/10V_4
PEG_RXP1 7
PEG_RXN1 7
C153 C179 C188 VDD33_2 PEX_TX1* C_PEG_RXP2 C333 EV@.1U/10V_4
J12 VDD33_3 PEX_TX2 AL19 PEG_RXP2 7
J13 AK19 C_PEG_RXN2 C332 EV@.1U/10V_4
VDD33_4 PEX_TX2* PEG_RXN2 7
EV@1U/6.3V_4 EV@.1U/10V_4 EV@.1U/10V_4 J9 AL20 C_PEG_RXP3 C316 EV@.1U/10V_4
VDD33_5 PEX_TX3 PEG_RXP3 7,24
PEX_TX3* PEG_RXN3 7
AM21 C_PEG_RXP4 C302 EV@.1U/10V_4
PEX_TX4 PEG_RXP4 7
PEX_TX4* PEG_RXN4 7
37 VGA_SENSE AD20 AL22 C_PEG_RXP5 C341 EV@.1U/10V_4
VDD_SENSE PEX_TX5 PEG_RXP5 7
AK22 C_PEG_RXN5 C340 EV@.1U/10V_4
PEX_TX5* PEG_RXN5 7
SI-2 4/10 For Nvidia recommend. PEX_TX6 AL23 C_PEG_RXP6 C313 EV@.1U/10V_4
PEG_RXP6 7
C_PEG_RXN6
100mA AD19
PEX_TX6* AM23
AM24 C_PEG_RXP7
C314
C300
EV@.1U/10V_4
EV@.1U/10V_4
PEG_RXN6 7
PEG_RXP7 7
GND_SENSE PEX_TX7 C_PEG_RXN7 C299 EV@.1U/10V_4
PEX_TX7* AM25 PEG_RXN7 7
+VGA1.1V AL25 C_PEG_RXP8 C312 EV@.1U/10V_4
PEX_TX8 PEG_RXP8 7
12~16 mils width PEX_TX8* AK25 C_PEG_RXN8 C311 EV@.1U/10V_4
PEG_RXN8 7
L16 EV@MLG1608B10NJ_6 +PEX_PLLVDD AG14 AL26 C_PEG_RXP9 C338 EV@.1U/10V_4
PEX_PLLVDD PEX_TX9 PEG_RXP9 7
PEX_TX9* PEG_RXN9 7
C255 C249 C254 C243 C268 AM27 C_PEG_RXP10 C298 EV@.1U/10V_4
PEX_TX10 PEG_RXP10 7
PEX_TX10* PEG_RXN10 7
EV@4.7U/6.3V_6 EV@4.7U/6.3V_6 EV@1U/6.3V_4 EV@.1U/10V_4 EV@.01U/16V_4 AG19 AL28 C_PEG_RXP11 C310 EV@.1U/10V_4
PEX_CAL_PD_VDDQ PEX_TX11 PEG_RXP11 7
AK28 C_PEG_RXN11 C309 EV@.1U/10V_4
AK29 C_PEG_RXP12 C335 EV@.1U/10V_4
AL29 C_PEG_RXN12 C334 EV@.1U/10V_4
AG20 AM29 C_PEG_RXP13 C296 EV@.1U/10V_4
PEX_CAL_PU_GND PEX_TX13 PEG_RXP13 7
B PEX_TX13* PEG_RXN13 7 B
AM31 C_PEG_RXP14 C308 EV@.1U/10V_4
A2 AN32 C_PEG_RXP15 C326 EV@.1U/10V_4
NC_1 PEX_TX15 PEG_RXP15 7
AB7 AP32 C_PEG_RXN15 C327 EV@.1U/10V_4
NC_2 PEX_TX15* PEG_RXN15 7
AD6 NC_3
AF6 NC_4
AG6 AR16 CLK_PCIE_VGA
NC_5 PEX_REFCLK CLK_PCIE_VGA 2
AJ5 AR17 CLK_PCIE_VGA#
NC_6 PEX_REFCLK* CLK_PCIE_VGA# 2
AK15 NC_7
AL7 NC_8
D35 AJ17 R170 *EV@200_4
NC_9 PEX_TSTCLK_OUT
E35 NC_10 PEX_TSTCLK_OUT* AJ18
E7 NC_11 D7
F7 NC_12
H32 AM16 VGA_RST# 1 2
NC_13 PEX_RST* PLTRST# 13,26,28,30,31
M7 NC_14
P6 AR13 T73
NC_15 PEX_CLKREQ* *EV@BAS316
P7 NC_16
R7 AG21 PEX_TERMP R115 EV@2.49K/F_4 R43
NC_17 PEX_TERMP *EV@100K/F_4
U7 NC_18
V6 AP35 TESTMODE R456 EV@10K/F_4
NC_19 TESTMODE
R42 EV@0_4
A A

PROJECT : ZR6
1A
NV10X (PCIE I/F) 1/5
5 4 3 2 1
5 4 3 2 1
19
U27B U27C
NV10M (VGA) BGA969-NVIDIA-NB9P-GS

<SKU>
BGA969-NVIDIA-NB9P-GS
<SKU>
V32 R30 VMA_DQ0 C17 D11

23 VMA_MA3 FBA_CMD0 FBA_D0 23 VMA_DQ[63..0] FBC_CMD0 FBC_D0
23 VMA_MA0 W31 FBA_CMD1 MEMORY I/F A FBA_D1 R32 VMA_DQ1 B19 FBC_CMD1 FBC_D1 E11
23
23
VMA_MA2
VMA_MA1
U31
Y32
FBA_CMD2 FBA_D2 P31
N30
VMA_DQ2
VMA_DQ3
23 VMA_DM[7..0] D18
F21
FBC_CMD2 MEMORY I/F B FBC_D2 F10
D8
FBA_CMD3 FBA_D3 VMA_DQ4 FBC_CMD3 FBC_D3
23 VMA_MA3H AB35 FBA_CMD4 FBA_D4 L31 23 VMA_WDQS[7..0] A23 FBC_CMD4 FBC_D4 F8
AB34 M32 VMA_DQ5 D21 F9
23 VMA_MA4H FBA_CMD5 FBA_D5 FBC_CMD5 FBC_D5
W35 M30 VMA_DQ6 B23 E8
23 VMA_MA5H FBA_CMD6 FBA_D6 23 VMA_RDQS[7..0] FBC_CMD6 FBC_D6
W33 L30 VMA_DQ7 E20 F12
23 VMA_CS0# W30 FBA_CMD8 FBA_D8 P33 G21 FBC_CMD8 FBC_D8 B11
T34 P34 VMA_DQ9 F20 C13
23 VMA_WE# FBA_CMD9 FBA_D9 FBC_CMD9 FBC_D9
T35 N35 VMA_DQ10 F19 A11
23 VMA_BA0 FBA_CMD10 FBA_D10 FBC_CMD10 FBC_D10
D AB31 P35 VMA_DQ11 F23 B8 D
23 VMA_CKE FBA_CMD11 FBA_D11 FBC_CMD11 FBC_D11
Y30 N34 VMA_DQ12 A22 A8
23 VMA_ODT FBA_CMD12 FBA_D12 FBC_CMD12 FBC_D12
Y34 L33 VMA_DQ13 C22 C8
23 VMA_MA2H FBA_CMD13 FBA_D13 FBC_CMD13 FBC_D13
W32 L32 VMA_DQ14 B17 C11
23 VMA_MA12 FBA_CMD14 FBA_D14 FBC_CMD14 FBC_D14
AA30 N33 VMA_DQ15 F24 C10
23 VMA_RAS# FBA_CMD15 FBA_D15 FBC_CMD15 FBC_D15
AA32 K31 VMA_DQ16 C25 D12
Y33 K30 VMA_DQ17 E22 E13
U32 G30 VMA_DQ18 C20 F17
23 VMA_BA1 FBA_CMD18 FBA_D18 FBC_CMD18 FBC_D18
Y31 K32 VMA_DQ19 B22 F15
U34 G32 VMA_DQ20 A19 F16
Y35 H30 VMA_DQ21 D22 E16
W34 F30 VMA_DQ22 D20 F14
V30 G31 VMA_DQ23 E19 F13
23 VMA_MA4 U35 FBA_CMD24 FBA_D24 H33 VMA_DQ24 Add for 64x16 vram D19 FBC_CMD24 FBC_D24 D13
U30 K35 VMA_DQ25 F18 A13
23 VMA_CAS# FBA_CMD25 FBA_D25 FBC_CMD25 FBC_D25
U33 K33 VMA_DQ26 C19 B13
23 VMA_BA2 AB30 FBA_CMD27 FBA_D27 G34 F22 FBC_CMD27 FBC_D27 A14
AB33 K34 VMA_DQ28 C23 C16
FBA_CMD28 FBA_D28 FBC_CMD28 FBC_D28
Add for 64x16 vram T33 FBA_CMD29 FBA_D29 E33 VMA_DQ29 R130 EV@10K/F_4 VMA_ODT B20 FBC_CMD29 FBC_D29 A17
W29 E34 VMA_DQ30 A20 B16
FBA_D31 G33 FBC_D31 D16
VMA_DM0 P30 AG30 VMA_DQ32 F11 D24
VMA_DM1 FBA_DQM0 FBA_D32 VMA_DQ33 FBC_DQM0 FBC_D32
P32 FBA_DQM1 FBA_D33 AH31 D10 FBC_DQM1 FBC_D33 D26
VMA_DM2 J30 AG32 VMA_DQ34 R141 EV@10K/F_4 VMA_CKE D15 E25
H34 FBA_DQM3 FBA_D35 AF31 A16 FBC_DQM3 FBC_D35 F25
VMA_DM4 AF32 AF30 VMA_DQ36 D27 F27
AF35 FBA_DQM5 FBA_D37 AD30 D28 FBC_DQM5 FBC_D37 E28
VMA_DM6 AL32 AC32 VMA_DQ38 D34 F28
AL34 FBA_DQM7 FBA_D39 AE30 A34 FBC_DQM7 FBC_D39 D29
AE32 VMA_DQ40 A25
VMA_WDQS0 FBA_D40 VMA_DQ41 FBC_D40
N31 FBA_DQS_WP0 FBA_D41 AF33 E10 FBC_DQS_WP0 FBC_D41 B25
VMA_WDQS1 L34 AF34 VMA_DQ42 A10 D25
VMA_WDQS2 FBA_DQS_WP1 FBA_D42 VMA_DQ43 FBC_DQS_WP1 FBC_D42
C
J32 FBA_DQS_WP2 FBA_D43 AE35 D14 FBC_DQS_WP2 FBC_D43 C26 C
VMA_WDQS3 H35 AE33 VMA_DQ44 C14 C28
AE31 FBA_DQS_WP4 FBA_D45 AE34 E26 FBC_DQS_WP4 FBC_D45 B28
VMA_WDQS5 AC33 AC35 VMA_DQ46 B26 A28
AJ32 FBA_DQS_WP6 FBA_D47 AB32 D32 FBC_DQS_WP6 FBC_D47 A29
VMA_WDQS7 AJ34 AN33 VMA_DQ48 A32 E29
FBA_DQS_WP7 FBA_D48 VMA_DQ49 FBC_DQS_WP7 FBC_D48
FBA_D49 AK32 FBC_D49 F29
VMA_RDQS0 N32 AL33 VMA_DQ50 D9 D30
VMA_RDQS1 FBA_DQS_RN0 FBA_D50 VMA_DQ51 FBC_DQS_RN0 FBC_D50
L35 FBA_DQS_RN1 FBA_D51 AM33 B10 FBC_DQS_RN1 FBC_D51 E31
VMA_RDQS2 H31 AL31 VMA_DQ52 for DDR2 need use E14 C33
G35 FBA_DQS_RN3 FBA_D53 AK30 B14 FBC_DQS_RN3 FBC_D53 D33
VMA_RDQS4 AD32 AJ30 VMA_DQ54 CMD11(CKE) and F26 F32
AC34 FBA_DQS_RN5 FBA_D55 AH30 CMD12(ODT) A26 FBC_DQS_RN5 FBC_D55 E32
VMA_RDQS6 AJ31 AM35 VMA_DQ56 D31 B29
AJ35 FBA_DQS_RN7 FBA_D57 AH33 A31 FBC_DQS_RN7 FBC_D57 C29
AH35 VMA_DQ58 B31
FBA_D58 VMA_DQ59 FBC_D58
P29 FBA_WDS0 FBA_D59 AH32 G11 FBC_WDS0 FBC_D59 C31
R29 AH34 VMA_DQ60 G12 B32
FBA_WDS0* FBA_D60 VMA_DQ61 FBC_WDS0* FBC_D60
L29 FBA_WDS1 FBA_D61 AM34 G14 FBC_WDS1 FBC_D61 C32
M29 AL35 VMA_DQ62 G15 B34
FBA_WDS1* FBA_D62 VMA_DQ63 FBC_WDS1* FBC_D62
AD29 FBA_WDS2 FBA_D63 AJ33 G24 FBC_WDS2 FBC_D63 B35
AE29 FBA_WDS2* G25 FBC_WDS2*
AG29 +1.8V G27
FBA_WDS3 VMA_CLK0 FBC_WDS3
AH29 FBA_WDS3* FBA_CLK0 T32 VMA_CLK0 23 use internal Vref, ext G28 FBC_WDS3* FBC_CLK0 E17
+1.8V T31 VMA_CLK0# +1.8V D17
FBA_CLK0* VMA_CLK0# 23 divider no stuff FBC_CLK0*
AC31 VMA_CLK1 D23
FBA_CLK1 VMA_CLK1 23 FBC_CLK1
AA27 AC30 VMA_CLK1# N27 E23
FBVDDQ_1 FBA_CLK1* VMA_CLK1# 23 FBVDDQ_28 FBC_CLK1*
AA29 R100 P27
FBVDDQ_2 *EV@1K/F_4 FBVDDQ_29
AA31 FBVDDQ_3 R27 FBVDDQ_30
AB27 FBVDDQ_4 15mils width T27 FBVDDQ_31
AB29 J27 +FB_VREF1 U27
FBVDDQ_5 FB_VREF FBVDDQ_32
AC27 FBVDDQ_6 U29 FBVDDQ_33
AD27 FBVDDQ_7 V27 FBVDDQ_34
B AE27 FBVDDQ_8 V29 FBVDDQ_35
B
AJ28 C128 R97 V34
FBVDDQ_9 *EV@.1U/10V_4 *EV@1K/F_4 FBVDDQ_36
B18 FBVDDQ_10 W27 FBVDDQ_37 FB_CAL_PD_VDDQ K27 FB_CAL_PD_VDDQ R99 EV@30.1/F_4 +1.8V
E21 FBVDDQ_11 Y27 FBVDDQ_38
G17 FBVDDQ_12
G18 L27 FB_CAL_PU_GND R111 EV@30.1/F_4
FBVDDQ_13 FB_CAL_PU_GND
G22 FBVDDQ_14
G8 FBVDDQ_15
G9 FBVDDQ_16 FB_CAL_TERM_GND M27 FB_CAL_TERM_GND R104 *EV@30.1/F_4
H29 FBVDDQ_17 For Debug only R91 Install for DDR3
J14 FBVDDQ_18
J15 T30 FBA_DEBUG *EV@60.4/F_4 R119 +1.8V G19 FBC_DEBUG R95 *EV@60.4/F_4 +1.8V
FBVDDQ_19 FBA_DEBUG FBC_DEBUG
J16 FBVDDQ_20
J17 L15 R86 no stuff
FBVDDQ_21
J20 FBVDDQ_22 15mils width EV@HCB1608KF-181T15_6
J21 AG27 +FB_PLLAVDD +VGA1.1V J19 +FB_PLLAVDD
FBVDDQ_23 FB_DLLAVDD0 FB_DLLAVDD1
J22 FBVDDQ_24 C139 C146 C244 C122
G96 only
J23 FBVDDQ_25 FB_PLLAVDD0 AF27 FB_PLLAVDD1 J18
J24 C140 C242
FBVDDQ_26 EV@.1U/10V_4 EV@.1U/10V_4 EV@1U/6.3V_4 EV@4.7U/6.3V_6 *EV@.1U/10V_4
J29 FBVDDQ_27
*EV@.1U/10V_4
+1.8V +1.8V
C545 C127 C574 C94 C112 C509 C540 C507 C218 C169 C277 C511 C164 C176 C148 C510 C213
*EV@22P/50V_4 EV@22P/50V_4 EV@4.7U/6.3V_6 EV@.47U/6.3V_4 EV@4.7U/6.3V_6 EV@.47U/6.3V_4 EV@.1U/10V_4 EV@.1U/10V_4 EV@.1U/10V_4
*EV@22P/50V_4 EV@.47U/6.3V_4 EV@.1U/10V_4 EV@.47U/6.3V_4 EV@.1U/10V_4 EV@.1U/10V_4 EV@.1U/10V_4 EV@.1U/10V_4

A A
+1.8V
C508 C111 C117 C141 C114 C113 C133 C130 C147 C195 C230 C152 C206 C136
EV@4.7U/6.3V_6 EV@.47U/6.3V_4 EV@4.7U/6.3V_6 EV@.47U/6.3V_4 EV@.1U/10V_4 EV@.1U/10V_4 EV@.1U/10V_4 Quanta Computer Inc.
EV@.47U/6.3V_4 EV@.1U/10V_4 EV@.47U/6.3V_4 EV@.1U/10V_4 EV@.1U/10V_4 EV@.1U/10V_4 EV@.1U/10V_4
PROJECT : ZR6
1A
NV10X (MEMORY I/F) 2/5
5 4 3 2 1
5 4 3 2 1
+1.8V NV10M (VGA)

L41 EV@HCB1608KF-181T15_6 +IFPAB_PLLVDD
100 mA
AK9
U27D
<SKU>
IFPAB_PLLVDD IFPA_TXC AM11

AM12
EV_TXLCLKOUT+ 24
20
IFPA_TXC* EV_TXLCLKOUT- 24
C578 C575 C279
R173 *EV@1K/F_4 AJ11
IFPAB(LVDS) IFPA_TXD0 AM8
AL8
EV_TXLOUT0+ 24
EV_TXLOUT0- 24
EV@4.7U/6.3V_6 EV@4700P/25V_4 EV@470P/50V_4 IFPAB_RSET IFPA_TXD0*
IFPA_TXD1 AM10 EV_TXLOUT1+ 24
IFPA_TXD1* AM9 EV_TXLOUT1- 24
IFPA_TXD2 AK10 EV_TXLOUT2+ 24
50 mA IFPA_TXD2* AL10 EV_TXLOUT2- 24
AG9 IFPA_IOVDD IFPA_TXD3 AK11
IFPA_TXD3* AL11
50 mA IFPB_TXC AP13
L14 EV@HCB1608KF-181T15_6 +IFPAB_IOVDD AG10 AN13
D IFPB_IOVDD IFPB_TXC* D
IFPB_TXD4 AN8
C247 C246 C251 C265 C250 C259 AP8
IFPB_TXD4*
IFPB_TXD5 AP10
EV@4.7U/6.3V_6 EV@4.7U/6.3V_6 EV@4700P/25V_4 EV@4700P/25V_4 EV@470P/50V_4 EV@470P/50V_4 AN10
IFPB_TXD5*
IFPB_TXD6 AR11
+1.8V AR10
IFPB_TXD6*
IFPB_TXD7 AN11
IFPB_TXD7* AP11
L40 EV@HCB1608KF-181T15_6 +IFPCD_PLLVDD AJ9 AN3

IFPCD_PLLVDD AUX* Fix Ball out and Pin Name
AUX AP2
C132 C572 C260 C261
R432 EV@1K/F_4 AK7 IFPCD DPL3_TXC AR2
AP1
HDMI_CLK-_R
HDMI_CLK+_R
C293
C294
EV@.1U/10V_4
EV@.1U/10V_4
HDMI_CLK-
HDMI_CLK+
24
24
EV@1U/6.3V_4 EV@4.7U/6.3V_6 EV@4700P/25V_4 EV@470P/50V_4 IFPCD_RSET DPL3_TXC HDMI_TX0N_R C305 EV@.1U/10V_4
DPL2_TXD0 AM4 HDMI_TX0N 24
IFPC DPL2_TXD0 AM3 HDMI_TX0P_R
HDMI_TX1N_R
C306 EV@.1U/10V_4
HDMI_TX0P 24
AM5 C323 EV@.1U/10V_4
DPL1_TXD1 HDMI_TX1N 24
AL5 HDMI_TX1P_R C324 EV@.1U/10V_4
DPL1_TXD1 HDMI_TX1P 24
AJ8 AM6 HDMI_TX2N_R C322 EV@.1U/10V_4
IFPC_IOVDD DPL0_TXD2 HDMI_TX2N 24
AM7 HDMI_TX2P_R C321 EV@.1U/10V_4
+VGA1.1V DPL0_TXD2 HDMI_TX2P 24
AUX AN4
L42 EV@HCB1608KF-181T15_6 +IFPCD_IOVDD AK8 AP4
IFPD_IOVDD AUX
DPL3_TXC AR4
C579 C581 C576 C584 C287 C274 AR5
DPL3_TXC
DPL2_TXD0 AP5
EV@4.7U/6.3V_6 EV@1U/6.3V_4 EV@1U/6.3V_4 EV@4700P/25V_4 EV@470P/50V_4 EV@470P/50V_4 IFPD DPL2_TXD0 AN5
DPL1_TXD1 AN7 TMDS channel two
DPL1_TXD1 AP7
DPL0_TXD2 AR7
DPL0_TXD2 AR8
IFPEF_PLLVDD AJ6 AE4

IFPEF_PLLVDD IFPE_AUX
T72 IFPE_AUX* AD4
R164 AL1 IFPEF IFPE_L0 AH6

AH5
EV@10K/F_4 IFPEF_RSET IFPE_L0*
IFPE_L1 AH4
IFPE_L1* AG4
IFPE_L2 AF4
C
IFPE_L2* AF5 C
IFPEF_IOVDD AE7 AE6
IFPE_IOVDD IFPE_L3
IFPE_L3* AE5 Display port output
IFPF_AUX AF3
AD7 IFPF_IOVDD IFPF_AUX* AF2
IFPF_L0 AL2
IFPF_L0* AL3
R425 AJ3
EV@10K/F_4 IFPF_L1
IFPF_L1* AJ2
IFPF_L2 AJ1
IFPF_L2* AH1
IFPF_L3 AH2
+3V AH3
IFPF_L3*
L17 EV@HCB1608KF-181T15_6 +DACA_VDD AJ12 AM15 EV_VGA_RED R187 EV@150/F_4
DACA_VDD DACA_RED EV_VGA_RED 24
DACA_VREF AK12
DACA(CRT) AM14 EV_VGA_GRN 24
EV_VGA_GRN R188 EV@150/F_4
DACA_VREF DACA_GREEN
DACA_RSET AK13 AL14 EV_VGA_BLU R189 EV@150/F_4
DACA_RSET DACA_BLUE EV_VGA_BLU 24
C285 C270 C284 C281 R454 AM13 CRT_HSYNC R190 EV@33_4 Close to GPU
DACA_HSYNC EV_HSYNC 24
AL13 CRT_VSYNC R191 EV@33_4
DACA_VSYNC EV_VSYNC 24
EV@4.7U/6.3V_6 EV@4700P/25V_4 EV@470P/50V_4 EV@.1U/10V_4 EV@124/F_4
I2CA_SCL G1 EV_CRTDCLK 24
I2CA_SDA G4 EV_CRTDDAT 24
+DACB_VDD AG7 AK4
DACC_VDD DACC_RED
T71 AK6
DACC(CRT2) AL4
DACC_VREF DACC_GREEN
R431 T70 AH7 AJ4 +3V
EV@10K/F_4 DACC_RSET DACC_BLUE
DACC_HSYNC AM1
DACC_VSYNC AM2
G3 I2CB_SCL R404 EV@2.2K_4

I2CB_SCL I2CB_SDA R405 EV@2.2K_4
I2CB_SDA G2
B B
+DACC_VD AC6 AA4
DACB_VDD DACB_RED
R145 T68 AC5
DACB(TV) AB4
DACB_VREF DACB_GREEN
EV@10K/F_4
T67
SI Build
AB6 DACB_RSET DACB_BLUE Y4
+VGA1.1V AB5 T69
DACB_CSYNC
L13 EV@HCB1608KF-181T15_6 +NV_PLLVDD 65mA AE9 D2 27M_SS
27M_SS 2
PLLVDD XTAL_SSIN
C227 C224 C238 C241 C245 50mA AD9
XTAL_PLL XTAL_OUTBUFF D1 BXTALOUT
VID_PLLVDD 27M_NONSS
EV@1U/6.3V_4 EV@1U/6.3V_4 EV@1U/6.3V_4 EV@.1U/10V_4 EV@.1U/10V_4 25mA AF9
XTAL_IN B1 27M_NONSS 2
SP_PLLVDD
XTAL_OUT B2
NVidia suggest:
10 kΩ pull-down only if
no spread chip used.
27M_SS
BXTALOUT
SPREAD SPECTRUM
+3V
SI Build
+3V R395 *EV@22_4 27M_SS R391 R396
EV@10K/F_4 EV@10K/F_4
GFX27M_L
C520
R379 R392 *EV@10P/50V_4
*EV@10K/F_4 *EV@10K/F_4
U23
A ICSS_PD 8 2 +3V_SSC R394 *EV@4.7_6 A
PD# VDD +3V
BXTALOUT 1 4
CLKIN CLKOUT
5 ICSS_RFO C506 C503 C514 C513
EV_LVDS_DDCCLK REFOUT R397
21,24 EV_LVDS_DDCCLK 7 SCL
EV_LVDS_DDCDAT 6 3 *EV@10K/F_4 *EV@.1U/10V_4 *EV@4.7U/6.3V_6
21,24 EV_LVDS_DDCDAT SDA GND *EV@470P/50V_4 *EV@4.7U/6.3V_6
*EV@ICS91730AMLF-T

I2C ADDRESS: 0xD4H PROJECT : ZR6
1A
NV10X (DISPLAY) 3/5
5 4 3 2 1
5 4 3 2 1
21
U27E
NV10M (VGA) +3V BGA969-NVIDIA-NB9P-GS

<SKU>
P9 MIOA_VDDQ_1 MIOA_D0 N1
R9 MIOA_VDDQ_2 MIOA MIOA_D1 P4
C180 C178 T9 P1
MIOA_VDDQ_3 MIOA_D2
U9 P2
EV@4.7U/6.3V_6 EV@.1U/10V_4 MIOA_VDDQ_4 MIOA_D3
MIOA_D4 P3
T3
N10P-GE1 (G96) Straps
MIOA_D5
T2
MIOA_D6
MIOA_D7
MIOA_D8
T1
U4
N10M-GE1 (G98) Straps PCI_DEVID[4]/SUBVENDOR +3V
GPIO ASSIGNMENTS
U5 MIOA_CAL_PD_VDDQ MIOA_D9 U1
MIOA_D10 U2
MIOA_D11 U3
T5 R6 R380 R382 R381
MIOA_CAL_PU_GND MIOA_D12
D MIOA_D13 T6
*EV@4.99K/F_4 D
MIOA_D14 N6 GPIO I/O ACTIVE USAGE *EV@4.99K/F_4 EV@45.3K/F_4
N5 P5 ROM_SI
MIOA_VREF MIOA_CTL3 ROM_SO
MIOA_HSYNC N3
L3
0 IN N/A PRIMARY DVI HOTPLUG ROM_SCLK
MIOA_VSYNC
MIOA_DE N2 1 IN N/A SECONDARY DVI HOTPLUG
+3V MIOA_CLKOUT R4
T4
2 OUT HIGH PANEL BACKLIGHT PWM R386 R388 R387
MIOA_CLKOUT*
MIOA_CLKIN N4 R412 EV@10K/F_4
3 OUT HIGH PANEL POWER ENABLE EV@4.99K/F_4 *EV@4.99K/F_4 EV@15K/F_4
AA9 MIOB_VDDQ_1 MIOB_D0 Y1 4 OUT HIGH PANEL BACKLIGHT ENABLE

AB9 MIOB_VDDQ_2 MIOB MIOB_D1 Y2
C189 C154 W9
Y9
MIOB_VDDQ_3 MIOB_D2 Y3
AB3
5 OUT N/A NVVDD VID0
MIOB_VDDQ_4 MIOB_D3
EV@4.7U/6.3V_6 EV@.1U/10V_4
MIOB_D4 AB2
AB1
6 OUT N/A NVVDD VID1
MIOB_D5 +3V
MIOB_D6 AC4
AC1
7 OUT N/A FBVDD VID0 SEE Datasheet for details on G10x Straps!
MIOB_D7
AA7
MIOB_D8 AC2
AC3
8 IN LOW THERMAL ALERT
MIOB_CAL_PD_VDDQ MIOB_D9
MIOB_D10 AE3
AE2
9 OUT LOW FAN PWM R420 R423 R414
MIOB_D11
NVidia Propose Remove C3134,C3681,R3092,R3402,R3063,R3064,C3076
AA6 MIOB_CAL_PU_GND MIOB_D12 U6
W6
10 OUT N/A FBVREF SELECT EV@45.3K/F_4 *EV@4.99K/F_4 EV@24.9K/F_4
MIOB_D13
MIOB_D14 Y6
W5 STRAP0
11 OUT N/A SLI SYNC0 STRAP0
MIOB_D15
AF1 MIOB_VREF MIOB_D16 W7
V7
STRAP1
STRAP2
12 IN N/A AC DETECT STRAP1
STRAP2
MIOB_D17
W3
13 OUT LOW PS CONTROL OR HDMI_CEC
MIOB_CTL3
MIOB_HSYNC W1
W2
14 OUT HIGH PS CONTROL R417 R424 R415
MIOB_VSYNC
MIOB_DE Y5 Delete T31 *EV@4.99K/F_4 EV@10K/F_4 *EV@15K/F_4
MIOB_CLKOUT V4
MIOB_CLKOUT* W4
C AE1 R429 EV@10K/F_4 C
MIOB_CLKIN
GFX_THMD- B4 K1 T65
THERMDN GPIO0
GPIO1 K2 HDMI_HP_EV 24
K3 EV_LVDS_BL_BRGHT
GPIO2 EV_LVDS_BL_BRGHT 24
GFX_THMD+ B5 THERMDP GPIO3 H3
H2
EV_LVDS_VDDEN 24
EV_LVDS_BLON 24
Logical Strap Bit Mapping
GPIO4
GPIO5 H1 GPU_VID0 37 R414 PU-VDD PD
JTAG_TCK MISC1
JTAG_TCK AP14 H4
GPIO6 GPU_VID1 37
JTAG_TMS
PCI_DEVID: STRAP2
AR14 H5 T11
JTAG_TDI JTAG_TMS (GPIOS,JTAG,THERM,I2C) GPIO7 VGA_THERM#
T74
JTAG_TDO
AN14
AN16
JTAG_TDI GPIO8 H6
J7 ALERT
VGA_THERM# 31 +3V 5K 1000 0000
JTAG_TRST# JTAG_TDO GPIO9 T64
AP16 JTAG_TRST* GPIO10 K4
K5 T66 JTAG_TMS R448 EV@10K/F_4 NB9M-GE 0x06E 8 1000 10K 1001 0001
GPIO11 MXM_ACIN JTAG_TDI R447 EV@10K/F_4
31 MXM_SMCLK E2
GPIO12 H7
J4 VGA_OVT# R75 EV@10K/F_4 NB9M-GS 0x06E 9 1001 15K 1010 0010
I2CS_SCL GPIO13 ALERT R408 EV@10K/F_4
31 MXM_SMDATA
20,24 EV_LVDS_DDCCLK
EV_LVDS_DDCCLK R81 EV@33_4 I2CC_SCL_G
E1
E3
I2CS_SDA GPIO14 J6
L1 I2CE_SCL_G R384 EV@2.2K_4 NB9P-GE2 0x064 8 1000 20K 1011 0011
EV_LVDS_DDCDAT R84 EV@33_4 I2CC_SDA_G I2CC_SCL GPIO15 I2CE_SDA_G R94 EV@2.2K_4
20,24 EV_LVDS_DDCDAT
24 HDMI_DDCCLK
HDMI_DDCCLK
E4
F4
I2CC_SDA GPIO16 L2
L4 NB9P-GS 0x064 9 1001 25K 1100 0100
I2CD_SCL GPIO17
24 HDMI_DDCDATA
HDMI_DDCDATA G5 I2CD_SDA GPIO18 M4 SI Build N10P-GE1 0x065 2 0010 30K 1101 0101
I2CE_SCL_G D5 L7
I2CE_SDA_G I2CE_SCL GPIO19 JTAG_TCK
E5 I2CE_SDA GPIO20 L5
K6 JTAG_TRST#
R449
R450
EV@10K/F_4
EV@10K/F_4 N10M-GE1 0x06E C 1100 default 35K 1110 0110
GPIO21 EV_LVDS_BL_BRGHT R385 EV@2K/F_4
GPIO22 L6
M6 MXM_ACIN R514 EV@10K/F_4 45K 1111 0111
GPIO23
HD Audio Level :3V J26 BBIASN_NC ROM_CS* C3
J25 BBIASP_NC MISC2(ROM) ROM_SI D3 ROM_SI
ROM_SO
ROM_SO C4
MXM_BIT_CLK_HDMI D7 D4 ROM_SCLK
12 MXM_BIT_CLK_HDMI HDA_BCLK ROM_SCLK
MXM_RST#_HDMI D6
12 MXM_RST#_HDMI HDA_RST*
R92 EV@10_4 MXM_SDIN_HDMI_R C7 F6 HDCP_SCL
12 MXM_SDIN_HDMI HDA_SDI I2CH_SCL
MXM_SDOUT_HDMI B7 G6 HDCP_SDA
12 MXM_SDOUT_HDMI HDA_SDO I2CH_SDA
C125
12 MXM_SYNC_HDMI
MXM_SYNC_HDMI A7 HDA_SYNC
A5 SPDIF_VGA
R386 Config Definitions Die
STRAP_REF_3V3 SPDIF
R109 EV@40.2K/F_4 N9 STRAP_REF_3V3 CS25102FB02
B
EV@10P/50V_4
CLOSE U38
R107 EV@40.2K/F_4 STRAP_REF_MIOB M9 STRAP_REF_MIOB BUFRST* A4
C5 R85 5K 64Mx16 DDR2 Hynix E B
PGOOD_OUT*
EMI
RFU AK14 CS31002FB26
RFU_GND K9 EV@35.7K/F_4
10K 64Mx16 DDR2 Samsung Q
R88 EV@10K/F_4 MXM_RST#_HDMI
NVidia Request CS32002FB29

20K Samsung E
64Mx16 DDR2
HDCP ROM DHCP ROM

Low: Crypto ROM
+3V
+3V HDCP_SCL
Hi: I2C ROM
R177 +3V +3V +3V

SI Build
*EV@10K_4 Change P/N
+3V
I2C ADDRESS: 0x98H MXM_ACIN 3 1 1
U24
8 R399
47K
A0 VCC R403
2 7 EV@2.2K_4
10K
R73 R182 A1 WP EV@2.2K_4

3 6 HDCP_SCL C521
*EV@2.2K_4 Q33 *EV@10K_4 A2 SCL HDCP_SCL
2
U6 *EV@DTA114YUA 4 5 HDCP_SDA EV@.1U/10V_4 HDCP_SDA

EV_LVDS_DDCCLK R77 *EV@0_4 GFX_SDA MAX6649_O# R74 *EV@0_4 VGA_OVT# GND SDA
A 7 SDAT OVT 4 A
3
EV_LVDS_DDCDAT R79 *EV@0_4 GFX_SCL 8 EV@AT24C16B R398

SCLK MAX6649_A# R76 *EV@0_4 ALERT *EV@10K/F_4
ALERT 6
+3V
R82 *EV@200_4 MAX6649_V 1
VCC Waiting Confirm from Nvidia
2 GFX_THMD+ 2
DXP ACIN 31,32
C105
GND
5 3 C98
*EV@.1U/16V_4GND DXN Q32
*EV@2200P/50V_4 *EV@DMN601K-7
9
GFX_THMD-
*EV@G799P8UF
THERMAL TRACE CONSTRAINTS
R183 *EV@0_4 Quanta Computer Inc.
VGA THERMAIL CIRCUIT Use 10MIL Guard(GND) Trace around THERMDC and THERMDA PROJECT : ZR6
1A
NV10X (GPIO & STRRAPS) 4/5
5 4 3 2 1
5 4 3 2 1
NV10M (VGA) U27G
<SKU> 22
+VGACORE
U27F
+VGACORE
NVVDD Decoupling AA11
AA12
AA13
AA14
AA15
GND_1
GND_2
GND_3
GND_4
GND_5
GROUND
GND_096
GND_097
GND_098
GND_099
GND_100
E15
E18
E24
E27
E30
AA16 GND_6 GND_101 E6
BGA969-NVIDIA-NB9P-GS AA17 GND_7 GND_102 E9
D
<SKU> AA18 GND_8 GND_103 F2 D
AA19 GND_9 GND_104 F31
AB11 VDD_001 VDD_057 P21 AA2 GND_10 GND_105 F34
AB13 VDD_002 VDD_058 P23 AA20 GND_11 GND_106 F5
+VGACORE
AB15
AB17
VDD_003 NVVDD VDD_059 P25
R11 PLACE NEAR BALLS
NEAR BGA
AA21
AA22
GND_12 GND_107 J2
J31
VDD_004 VDD_060 GND_13 GND_108
AB19 VDD_005 VDD_061 R12 AA23 GND_14 GND_109 J34
AB21 VDD_006 VDD_062 R13 AA24 GND_15 GND_110 J5
AB23 VDD_007 VDD_063 R14 AA25 GND_16 GND_111 L9
AB25 R15 C199 C237 C205 C225 C222 C200 C201 C529 AA34 M11
VDD_008 VDD_064 + GND_17 GND_112
AC11 VDD_009 VDD_065 R16 AA5 GND_18 GND_113 M13
AC12 R17 EV@.022U/16V_4 EV@.022U/16V_4 EV@.022U/16V_4 EV@.022U/16V_4 EV@.022U/16V_4 EV@4.7U/6.3V_6 *EV@22P/50V_4 AB12 M15
AC13 VDD_011 VDD_067 R18 AB14 GND_20 GND_115 M17
AC15 R20 EV@330U/2.5V_6032 AB18 M2
AC18 R23 C170 C158 C160 C162 C167 C240 AB24 M25
AC19 VDD_017 VDD_073 R24 AC9 GND_26 GND_121 M31
AC20 R25 EV@.022U/16V_4 EV@.022U/16V_4 EV@.022U/16V_4 EV@.022U/16V_4 EV@.022U/16V_4 EV@4.7U/6.3V_6 AD11 M34
AC21 VDD_019 VDD_075 T12 AD13 GND_28 GND_123 M5
AC22 VDD_020 VDD_076 T14 AD15 GND_29 GND_124 N11
AD12 T22 C212 C183 C159 C193 C174 C204 AD23 N15
AD14 VDD_025 VDD_081 T24 AD25 GND_34 GND_129 N16
AD16 V11 EV@.1U/10V_4 EV@.1U/10V_4 EV@.1U/10V_4 EV@.1U/10V_4 EV@.1U/10V_4 EV@4.7U/6.3V_6 AD31 N17
AD18 VDD_027 VDD_083 V13 AD34 GND_36 GND_131 N18
AD22 VDD_028 VDD_084 V15 AD5 GND_37 GND_132 N19
C AD24 VDD_029 VDD_085 V17 AE11 GND_38 GND_133 N20 C
L11 VDD_030 VDD_086 V19 AE12 GND_39 GND_134 N21
L13 V23 C182 C220 C177 C181 C232 AE14 N23
L15 W11 EV@.1U/10V_4 EV@.1U/10V_4 EV@.1U/10V_4 EV@.1U/10V_4 EV@.1U/10V_4 AE16 N25
L16 VDD_035 VDD_091 W12 AE17 GND_44 GND_139 P12
L23 VDD_042 VDD_098 W19 AE24 GND_51 GND_146 R2
L24 VDD_043 VDD_099 W20 AE25 GND_52 GND_147 R31
L25 VDD_044 VDD_100 W21 AG2 GND_53 GND_148 R34
M12 W22 AG31 R5
M14
VDD_045 VDD_101
W23
Follow Design Guide DG-03276-001 4.7uFx3 AG34
GND_54 GND_149
T11
M16 VDD_047 VDD_103 W24 and 0.22x10 uF instead of 0.1uF x10 AG5 GND_56 GND_151 T13
M18 VDD_048 VDD_104 W25 AK2 GND_57 GND_152 T15
M20 VDD_049 VDD_105 Y12 AK31 GND_58 GND_153 T17
P11 VDD_052 VDD_108 Y18 AL12 GND_61 GND_156 T23
P13 VDD_053 VDD_109 Y20 AL15 GND_62 GND_157 T25
P15 VDD_054 VDD_110 Y22 AL18 GND_63 GND_158 U11
P17 VDD_055 VDD_111 Y24 AL21 GND_64 GND_159 U12
P19 VDD_056 AL24 GND_65 GND_160 U13
AL27 GND_66 GND_161 U14
B
AL30 GND_67 GND_162 U15 B
AL6 GND_68 GND_163 U16
AL9 GND_69 GND_164 U17
AN2 GND_70 GND_165 U18
AN34 GND_71 GND_166 U19
AP12 GND_72 GND_167 U20
AP15 GND_73 GND_168 U21
AP18 GND_74 GND_169 U22
AP21 GND_75 GND_170 U23
AP24 GND_76 GND_171 U24
AP27 GND_77 GND_172 U25
AP3 GND_78 GND_173 V12
power up sequence AP30
AP33
GND_79 GND_174 V14
V16
GND_80 GND_175
AP6 GND_081 GND_176 V18
AP9 GND_082 GND_177 V2
B12 GND_083 GND_178 V20
PXE 1.2VDD B15 GND_084 GND_179 V22
B21 GND_085 GND_180 V24
PXE 1.1VDD B24 GND_086 GND_181 V31
B27 GND_087 GND_182 V5
B3 GND_088 GND_183 V9
B30 GND_089 GND_184 Y11
B33 GND_090 GND_185 Y13
I/O 3.3V B6 GND_091 GND_186 Y15
B9 GND_092 GND_187 Y17
C2 GND_093 GND_188 Y19
C34 GND_094 GND_189 Y21
E12 GND_095 GND_190 Y23
NVCORE GND_191 Y25
A A
1.8VFBDDQ

PROJECT : ZR6
1A
NV10X (POWER & GND) 5/5
5 4 3 2 1
5 4 3 2 1
NV10M (VGA)
23
VMA_CLK0
19 VMA_CLK0
U7
VMA_DQ3 B9 J2 VMREFA0 R400 EV@1K/F_4 U25
UDQ7 VREF +1.8V
VMA_DQ4 B1 15mil VMA_DQ27 B9 J2 VMREFA0
VMA_DQ0 UDQ6 R401 EV@1K/F_4 VMA_DQ24 UDQ7 VREF R406
D9 UDQ5 B1 UDQ6 15mil
VMA_DQ6 D1 VMA_DQ30 D9 EV@475/F_4
VMA_DQ7 UDQ4 C525 EV@.1U/10V_4 VMA_DQ28 UDQ5
D3 UDQ3 VDD1 A1 D1 UDQ4
VMA_DQ1 D7 E1 VMA_DQ25 D3 A1
UDQ2 VDD2 UDQ3 VDD1
VMA_DQ5 C2 UDQ1 VDD3 J9 SI Build VMA_DQ29 D7 UDQ2 VDD2 E1 19 VMA_CLK0#
VMA_CLK0#
VMA_DQ2 C8 M9 VMA_DQ26 C2 J9
VMA_DQ10 UDQ0 VDD4 VMA_DQ31 UDQ1 VDD3
F9 LDQ7 VDD5 R1 +1.8V C8 UDQ0 VDD4 M9
VMA_DQ14 F1 VMA_DQ20 F9 R1
LDQ6 LDQ7 VDD5 +1.8V
VMA_DQ8 H9 A9 N10P-GE1/N10M-GE1: 50% FBVDD VMA_DQ19 F1
VMA_DQ13 LDQ5 VDDQ1 VMA_DQ22 LDQ6
D
H1 LDQ4 VDDQ2 C1 H9 LDQ5 VDDQ1 A9 D
VMA_DQ12 H3 C3 N10M-GE1: 50% , R429 ( 1K ) VMA_DQ17 H1 C1
VMA_DQ11 LDQ3 VDDQ3 VMA_DQ21 LDQ4 VDDQ2 VMA_CLK1
H7 LDQ2 VDDQ4 C7 H3 LDQ3 VDDQ3 C3 19 VMA_CLK1
VMA_DQ15 G2 C9 VMA_DQ18 H7 C7
VMA_DQ9 LDQ1 VDDQ5 VMA_DQ16 LDQ2 VDDQ4
G8 LDQ0 VDDQ6 E9 G2 LDQ1 VDDQ5 C9
G1 VMA_DQ23 G8 E9
VMA_DM0 VDDQ7 LDQ0 VDDQ6 R439
B3 UDM VDDQ8 G3 VDDQ7 G1
VMA_DM1 F3 G7 VMA_DM3 B3 G3 EV@475/F_4
LDM VDDQ9 VMA_DM2 UDM VDDQ8
VDDQ10 G9 F3 LDM VDDQ9 G7
VMA_WDQS0 B7 G9
VMA_RDQS0 UDQS VMA_WDQS3 VDDQ10 VMA_CLK1#
A8 UDQS B7 UDQS 19 VMA_CLK1#
VMA_WDQS1 F7 J1 VMA_RDQS3 A8
VMA_RDQS1 LDQS VDDL VMA_WDQS2 UDQS
E8 LDQS F7 LDQS VDDL J1 N10M-GE1/N10P-GE1: 475R
VMA_RDQS2 E8
VMA_CLK0 LDQS
J8 CK NC1 A2
VMA_CLK0# K8 E2 VMA_CLK0 J8 A2
VMA_BA2 CK NC2 VMA_CLK0# CK NC1
19 VMA_BA2 L1 BA2 K8 CK NC2 E2
VMA_BA1 L3 R3 VMA_BA2 L1
19 VMA_BA1 BA1 NC4 BA2
VMA_BA0 L2 R7 VMA_BA1 L3 R3 CS14752FB11 RES CHIP 475 1/16W +-1%(0402)
19 VMA_BA0 BA0 NC5 BA1 NC4
R8 VMA_BA0 L2 R7
VMA_MA12 NC6 BA0 NC5
19 VMA_MA12 R2 A12 NC6 R8
VMA_MA11 P7 VMA_MA12 R2
19 VMA_MA11 A11 A12
VMA_MA10 M2 A3 VMA_MA11 P7
19 VMA_MA10 A10 VSS1 A11
VMA_MA9 P3 E3 VMA_MA10 M2 A3
19 VMA_MA9 A9 VSS2 A10 VSS1
VMA_MA8 P8 J3 VMA_MA9 P3 E3
VMA_MA7 P2 N1 VMA_MA8 P8 J3
VMA_MA6 N7 P9 VMA_MA7 P2 N1
19
19
VMA_MA5
VMA_MA4
VMA_MA5
VMA_MA4
N3
N8
A5
A4 VSSQ1 A7
VMA_MA6
VMA_MA5
N7
N3
A6
A5
VSS5 P9
(By pass capacitor)
VMA_MA3 N2 B2 VMA_MA4 N8 A7
19 VMA_MA3 A3 VSSQ2 A4 VSSQ1 +1.8V
C VMA_MA2 M7 B8 VMA_MA3 N2 B2 C
19 VMA_MA2 A2 VSSQ3 A3 VSSQ2
VMA_MA1 M3 D2 VMA_MA2 M7 B8 C96 C95 C539 C553
VMA_MA0 M8 D8 VMA_MA1 M3 D2
E7 VMA_MA0 M8 D8 EV@.1U/10V_4 EV@.1U/10V_4 EV@.1U/10V_4 EV@.1U/10V_4
VMA_ODT VSSQ6 A0 VSSQ5
19 VMA_ODT K9 ODT VSSQ7 F2 VSSQ6 E7
VMA_CKE K2 F8 VMA_ODT K9 F2
19 VMA_CKE CKE VSSQ8 ODT VSSQ7
VMA_CS0# L8 H2 VMA_CKE K2 F8
19 VMA_CS0# CS VSSQ9 CKE VSSQ8
VMA_WE# K3 H8 VMA_CS0# L8 H2
19 VMA_WE# WE VSSQ10 CS VSSQ9
VMA_RAS# K7 VMA_WE# K3 H8
19 VMA_RAS# RAS WE VSSQ10
VMA_CAS# L7 J7 VMA_RAS# K7
19 VMA_CAS# CAS VSSDL RAS +1.8V
VMA_CAS# L7 J7
EV@H5PS1G63EFR-20L CAS VSSDL C562 C209 C523 C97
EV@H5PS1G63EFR-20L
EV@1000P/50V_4 EV@.1U/10V_4 EV@.1U/10V_4 EV@4.7U/6.3V_6
U9
VMA_DQ33 B9 J2 VMREFA1 R451 EV@1K/F_4 U29
UDQ7 VREF +1.8V
VMA_DQ34 B1 15mil VMA_DQ57 B9 J2 VMREFA1
VMA_DQ32 UDQ6 R453 EV@1K/F_4 VMA_DQ62 UDQ7 VREF
D9 UDQ5 B1 UDQ6 15mil +1.8V
VMA_DQ38 D1 VMA_DQ60 D9
VMA_DQ37 UDQ4 C582 EV@.1U/10V_4 VMA_DQ61 UDQ5 C534 C522 C129 C120
D3 UDQ3 VDD1 A1 D1 UDQ4
VMA_DQ36 D7 E1 VMA_DQ63 D3 A1
UDQ2 VDD2 UDQ3 VDD1
VMA_DQ39 C2 UDQ1 VDD3 J9 SI Build VMA_DQ59 D7 UDQ2 VDD2 E1 EV@1000P/50V_4 EV@.1U/10V_4 EV@.1U/10V_4 EV@4.7U/6.3V_6
VMA_DQ35 C8 M9 VMA_DQ56 C2 J9
VMA_DQ45 UDQ0 VDD4 VMA_DQ58 UDQ1 VDD3
F9 LDQ7 VDD5 R1 +1.8V C8 UDQ0 VDD4 M9
VMA_DQ46 F1 VMA_DQ53 F9 R1
LDQ6 LDQ7 VDD5 +1.8V
VMA_DQ41 H9 A9 VMA_DQ52 F1
VMA_DQ47 LDQ5 VDDQ1 VMA_DQ54 LDQ6
H1 LDQ4 VDDQ2 C1 N10P-GE1/N10M-GE1: 50% FBVDD H9 LDQ5 VDDQ1 A9 +1.8V
VMA_DQ44 H3 C3 VMA_DQ48 H1 C1
VMA_DQ42 LDQ3 VDDQ3 VMA_DQ50 LDQ4 VDDQ2 C126 C567 C557 C552
B
H7 LDQ2 VDDQ4 C7 N10M-GE1: 50% ,R433 ( 1K ) H3 LDQ3 VDDQ3 C3 B
VMA_DQ43 G2 C9 VMA_DQ49 H7 C7
VMA_DQ40 LDQ1 VDDQ5 VMA_DQ51 LDQ2 VDDQ4 EV@1000P/50V_4 EV@.1U/10V_4 EV@.1U/10V_4 EV@4.7U/6.3V_6
G8 LDQ0 VDDQ6 E9 G2 LDQ1 VDDQ5 C9
G1 VMA_DQ55 G8 E9
VMA_DM4 VDDQ7 LDQ0 VDDQ6
B3 UDM VDDQ8 G3 VDDQ7 G1
VMA_DM5 F3 G7 VMA_DM7 B3 G3
LDM VDDQ9 VMA_DM6 UDM VDDQ8
VDDQ10 G9 F3 LDM VDDQ9 G7 +1.8V
VMA_WDQS4 B7 G9
VMA_RDQS4 UDQS VMA_WDQS7 VDDQ10 C262 C533 C569 C116
A8 UDQS B7 UDQS
VMA_WDQS5 F7 J1 VMA_RDQS7 A8
VMA_RDQS5 LDQS VDDL VMA_WDQS6 UDQS EV@1000P/50V_4 EV@.1U/10V_4 EV@.1U/10V_4 EV@4.7U/6.3V_6
E8 LDQS F7 LDQS VDDL J1
VMA_RDQS6 E8
VMA_CLK1 LDQS
J8 CK NC1 A2
VMA_CLK1# K8 E2 VMA_CLK1 J8 A2
VMA_BA2 CK NC2 VMA_CLK1# CK NC1
L1 BA2 K8 CK NC2 E2
VMA_BA1 L3 R3 VMA_BA2 L1 For DB:
VMA_BA0 BA1 NC4 VMA_BA1 BA2
L2 BA0 NC5 R7 L3 BA1 NC4 R3 19 VMA_DQ[63..0]
NC6 R8 VMA_BA0 L2 BA0 NC5 R7 N10P/N10M : AKD5LG-T510(Samsung,64M*16)
VMA_MA12 R2 R8
A12 NC6 19 VMA_DM[7..0]
VMA_MA11 P7 VMA_MA12 R2 AKD5LG-TW02(Hynix,64M*16)
VMA_MA10 A11 VMA_MA11 A12
M2 A10 VSS1 A3 P7 A11 19 VMA_WDQS[7..0]
VMA_MA9 P3 E3 VMA_MA10 M2 A3
VMA_MA8 A9 VSS2 VMA_MA9 A10 VSS1
P8 A8 VSS3 J3 P3 A9 VSS2 E3 19 VMA_RDQS[7..0]
VMA_MA7 P2 N1 VMA_MA8 P8 J3
VMA_MA6 A7 VSS4 VMA_MA7 A8 VSS3
N7 A6 VSS5 P9 P2 A7 VSS4 N1
VMA_MA5H N3 VMA_MA6 N7 P9
19 VMA_MA5H A5 A6 VSS5
VMA_MA4H N8 A7 VMA_MA5H N3
19 VMA_MA4H A4 VSSQ1 A5
VMA_MA3H N2 B2 VMA_MA4H N8 A7
19 VMA_MA3H A3 VSSQ2 A4 VSSQ1
VMA_MA2H M7 B8 VMA_MA3H N2 B2
19 VMA_MA2H A2 VSSQ3 A3 VSSQ2
VMA_MA1 M3 D2 VMA_MA2H M7 B8
VMA_MA0 A1 VSSQ4 VMA_MA1 A2 VSSQ3
A M8 A0 VSSQ5 D8 M3 A1 VSSQ4 D2 A
E7 VMA_MA0 M8 D8
VMA_ODT VSSQ6 A0 VSSQ5
K9 ODT VSSQ7 F2 VSSQ6 E7
VMA_CKE K2 F8 VMA_ODT K9 F2
VMA_CS0# CKE VSSQ8 VMA_CKE ODT VSSQ7
L8 CS VSSQ9 H2 K2 CKE VSSQ8 F8
VMA_WE# K3 H8 VMA_CS0# L8 H2
VMA_RAS# WE VSSQ10 VMA_WE# CS VSSQ9
K7 K3 H8
VMA_CAS# L7
RAS
CAS VSSDL J7 VMA_RAS#
VMA_CAS#
K7
WE
RAS
VSSQ10 Quanta Computer Inc.
L7 CAS VSSDL J7
EV@H5PS1G63EFR-20L
EV@H5PS1G63EFR-20L PROJECT : ZR6
1A
NV10X VRAM-1(GDDR2 BGA84)
5 4 3 2 1
1 2 3 4 5 6 7 8
24
+3V
C135 .1u/16V_4 D30
LCD_ON(LDS)
CRT(CRT) +5V_CRT2
PANEL VCC CONTROL LCD_VCC
1
D12
2
1N5819HW
1 +5V_CRT2 25 MIL CRT_SEN#
C528
+5V 3
CN11 1000p/50V_4
16
*DA204U
CRT 2 C10 C21 C9 C8 C12
6
VGA_RED L12 BLM18BA220SN1D_6_0.5A CRT_R1 1 11 CRT_11 T19 .1U/10V_4 2.2U/10V_8 .1U/10V_4 .01U/16V_4 22U/10V_1206
7
VGA_GRN L10 BLM18BA220SN1D_6_0.5A CRT_G1 2 12 UMA to CRT
8
VGA_BLU L9 BLM18BA220SN1D_6_0.5A CRT_B1 3 13
9 VGA_RED R121 IV@0_4
INT_CRT_RED 7 +3V
4 14
R142 C229 R122 C203 R116 C185 C184 C202 C228 10 VGA_GRN R118 IV@0_4
INT_CRT_GRN 7
5 15 U1
150/F_4 10p/50V_4 150/F_4 10p/50V_4 150/F_4 10p/50V_4 10p/50V_4 10p/50V_4 10p/50V_4 VGA_BLU R114 IV@0_4
INT_CRT_BLU 7
C13 6 1
HSYNC R126 IV@0_4 IN OUT
INT_HSYNC 7
17
1u/10V_4 4 2
A R409 10K_4 VSYNC R134 IV@0_4 IN GND A
+3V INT_VSYNC 7
LCD_VCC_ON R20 *short0402 DISP_ON_R 3 5
D44 BAS316 CRT_SEN# CRTDCLK R140 IV@0_4 ON/OFF GND
31 CRT_SENSE# INT_CRT_DDCCLK 7
R411 *0_4 CRTDDAT R149 IV@0_4 IC(5P) G5243T11U
INT_CRT_DDCDAT 7
C531 2.2u/6.3V_6 R24 IV@0_4
7 INT_LVDS_DIGON
U26 CM2009 MXM to CRT 21 EV_LVDS_VDDEN
R21 EV@0_4 LCD_VCC_ON
+5V 1 16 VSYNC1 R123 15_4 VSYNC1_1 R23
C546 .22u/10V_4 VCC_SYNC SYNC_OUT2
<Check list ver:0.8>
7 14 HSYNC1 R124 15_4 HSYNC1_1 VGA_RED R120 EV@0_4 100K_4
+3V VCC_DDC SYNC_OUT1 EV_VGA_RED 20 UMA: 100K pull-down to GND
+5V_CRT2 R413 *0_4 +5V_CRT2_R8 15 VSYNC CM2009-02 have internal 15 ohm C535 C541 VGA_GRN R117 EV@0_4
BYP SYNC_IN2 EV_VGA_GRN 20
C532 .22u/10V_4
+3V 2 13 HSYNC +5V_CRT2 10p/50V_4 10p/50V_4 VGA_BLU R113 EV@0_4
VCC_VIDEO SYNC_IN1 EV_VGA_BLU 20
C161 C547
C548 CRT_R1 3 10 CRTDCLK R416 2.2K_4 +3V HSYNC R125 EV@0_4
VIDEO_1 DDC_IN1 EV_HSYNC 20
.22u/10V_4 CRT_G1 CRTDDAT R419 2.2K_4
R422
4.7K_4
R105
4.7K_4
10p/50V_4 10p/50V_4
VSYNC R133 EV@0_4
Backlight Control(LDS) D8 *BAS316
4 VIDEO_2 DDC_IN2 11 +3V EV_VSYNC 20 +3V 1 2
CRT_B1 5 9 CRTDCLK_R CRTDCLK R139 EV@0_4
VIDEO_3 DDC_OUT1 EV_CRTDCLK 20
6 12 CRTDDAT_R CRTDDAT R148 EV@0_4 R52 *short0402 BL_STATE 31
GND DDC_OUT2 EV_CRTDDAT 20
R46 R44
1K_4
10K_4
BL_ON 2 1 LID591# 14,31
3
D9
LVDS(LDS) Lid Switch (HSR) BAS316
3
+3VPCU
=> MXM +3VPCU
BL# 2
BRIGHTNESS 21 EV_LVDS_BL_BRGHT
R50 *EV@0_4 2 EC_FPBACK# 31
3
=> UMA C288 1u/10V_4 Q3
DPST 7 L_BKLT_CTRL
R48 IV@0_4 R174
7 INT_LVDS_BLON
R56 IV@0_4 DMN601K-7
=> EC
1
Q2
1
R45 EV@0_4 BRIGHTNESS *470K_4 R53 EV@0_4 LVDS_BLON 2 DTC144EUA
31 CONTRAST 21 EV_LVDS_BLON
LID591# 2 HE1
PT3661-BB R59
SOT23_123-2_8-1_9 Q4
100K_4 DMN601K-7
1
PT3661-BB (PLC) : AL003661003
ME268-002 (FCE) : AL000268000
B B
HDMI(HDM)
R210 *IV@4.7K_4
HDMI_HP_A
LCD EDID SMBus PU Active Buffer
R211 *IV@4.7K_4
+5V
*RSX101M-30
R8 EV@0_4 +3V R212 *IV@4.7K_4 MB_HDMI_DDCDAT
20,21 EV_LVDS_DDCCLK +3V MB_HDMI_DDCCLK +5V D43 2 1 CN15
R2 IV@0_4 LVDS_EDIDCLK R5 2.2K_4 R472 *IV@0_4
7 INT_LVDS_EDIDCLK +3V +3V C330 C339
R473 *IV@0_4 HDMI_OE# HDMITX2P_C 1 change HDMI conn 12/30
D2+
20,21 EV_LVDS_DDCDAT
R9 EV@0_4
PS8101 : AL008101000 *.1u/16V_4 *.1u/16V_4
HDMITX2N_C
2 D2 Shield
3
R3 IV@0_4 LVDS_EDIDDATA R6 2.2K_4 PS8101T : AL008101001 U11 HDMITX1P_C 4
D2-
36
35
34
33
32
31
30
29
28
27
26
25
7 INT_LVDS_EDIDDATA +3V D1+
5 D1 Shield
HDMITX1N_C 6 20
From GMCH
GND
CFG1
CFG0
VCC
DDC_EN
GND
GND
VCC
OE#
HPD_SINK
SDA_SINK
SCL_SINK
HDMITX0P_C D1- SHELL1
7 D0+ SHELL2 21
65mil 8 D0 Shield
VIN VIN 37 24 HDMITX0N_C 9 22
HDMITX2P GND GND HDMITX2P_C HDMICLKP_C D0- SHELL3
38 IN_D1- OUT_D1- 23 10 CK+ SHELL4 23
C11 C1 C7 HDMITX2N 39 22 HDMITX2N_C 11
IN_D1+ OUT_D1+ HDMICLKN_C CK Shield
+3V 40 VCC VCC 21 +3V 12 CK-
10u/25V_1206 10u/25V_1206 .1u/25V_6 HDMITX1P 41 20 HDMITX1P_C 13
HDMITX1N IN_D2- OUT_D2- HDMITX1N_C CE Remote
CN1
42
43
IN_D2+
*IV@PS8101T
OUT_D2+ 19
18 HDMI_DDCCLK_MB
14
15
NC FOR UMA iHDMI HPD
HDMITX0P GND GND HDMITX0P_C HDMI_DDCDATA_MB DDC CLK
32 30 44 IN_D3- OUT_D3- 17 16 DDC DATA
LVDS_EDIDDATA HDMITX0N 45 16 HDMITX0N_C 17
31 29 LVDS_EDIDCLK IN_D3+ OUT_D3+ GND
33 28 +3V 46 VCC VCC 15 +3V 18 +5V
HDMICLKP 47 14 HDMICLKP_C HDMI_HP_A 19
34 27 TXLCLKOUT- HDMICLKN IN_D4- OUT_D4- HDMICLKN_C HP DET PEG_RXP3 R207 *IV@0_4 HDMI_HP_IV#
26 48 IN_D4+ OUT_D4+ 13 7,18 PEG_RXP3
TXLCLKOUT+
RT_EN#
25 49 Thermal GND
REXT
HPD#
*HDM@HDMI-C12816-119A5-L
GND
GND
GND
24
VCC
VCC
SDA
PC0
PC1
SCL
TXLOUT0- R204
23 TXLOUT0+ *EV@100K_4
22
21 Equalization Control
1
2
3
4
5
6
7
8
9
10
11
20
TXLOUT1- 12
TXLOUT1+ PC1 PC0 EQ Control R236,R237,R239,R240 for 2'nd source
19
18 TXLOUT2- L L 8dB
17
16
TXLOUT2+ L H 4dB +3V +3V SDVO I2C Control
15 H L 12dB R459 *IV@0_4
H H 0dB +3V R462 *IV@0_4
14
LS_REXT
*RB501V-40
13 SDVO_CTRLCLK 6
BRIGHTNESS R202 *IV@4.7K_4 +5V D14 2 1 R196 *2.2K_4
12 SDVO_CTRLDATA 6
BL_ON R201 *IV@4.7K_4
11
10 USBP11- R206 *IV@499/F_4 HDMI_HP_IV#_RR R205 *short0402 HDMI_HP_IV# R197 *EV@0_4 MB_HDMI_DDCCLK R218 *short0402 HDMI_DDCCLK_MB
9 for CCD power +3V 21 HDMI_DDCCLK
C USBP11+ C
8 C331 *.1u/16V_4
7 +3V
6
5 +3V
LCD_VCC C349 C625 C621 C626 C622 C627 C342 C343 *RB501V-40
4 LCD_VCC D15 R203 *2.2K_4
3 +5V 2 1
VIN *IV@2.2u/6.3V_6 *IV@.1u/16V_4 *IV@.1u/16V_4 *IV@.1u/16V_4 *IV@.1u/16V_4 *IV@.1u/16V_4 *IV@.1u/16V_4 *IV@.1u/16V_4
2 VIN C2 R200 *EV@0_4 MB_HDMI_DDCDAT R234 *short0402 HDMI_DDCDATA_MB
1 21 HDMI_DDCDATA
.1u/16V_4
LCD_CON30 C336 *.1u/16V_4
+3V +3V
OE# control for

TXLCLKOUT- RN9 INT_TXLCLKOUT- power saving HP-detect for
3 4 IV@0_4P2R INT_TXLCLKOUT- 7 R460 R457 +3V
TXLCLKOUT+ 1 2 INT_TXLCLKOUT+ INT_TXLCLKOUT+ 7 *IV@10K_4 PS8101 only *IV@20K/F_6
From MXM EV@Hot-plug
TXLOUT0- RN5 1 2 IV@0_4P2R INT_TXLOUT0- RN33 3 4 *EV@0_4P2R HDMITX0N_C HDMI_OE# HDMI_HP_IV#
INT_TXLOUT0- 7 20 HDMI_TX0N
TXLOUT0+ 3 4 INT_TXLOUT0+ INT_TXLOUT0+ 7 1 2 HDMITX0P_C R455
20 HDMI_TX0P
3
3
UMA to LVDS +5V *EV@10K_4
TXLOUT1- RN7 1 2 IV@0_4P2R INT_TXLOUT1- RN34 3 4 *EV@0_4P2R HDMITX1N_C
TXLOUT1+ 3 4 INT_TXLOUT1+ INT_TXLOUT1+ 7 1 2 HDMITX1P_C HDMI_HP_EV 21
20 HDMI_TX1P
HDMI_HP_A 2 HDMI_HP_IV#_RR 2 R458
3
TXLOUT2- RN3 1 2 IV@0_4P2R INT_TXLOUT2- RN35 3 4 *EV@0_4P2R HDMITX2N_C *IV@7.5K/F_4 R452
TXLOUT2+ 3 4 INT_TXLOUT2+ 1 2 HDMITX2P_C Q26 Q27 *EV@10K_4
INT_TXLOUT2+ 7 20 HDMI_TX2P
*IV@DMN601K-7 *IV@DMN601K-7
RN32 3 4 *EV@0_4P2R HDMICLKN_C HP_EV 2
20 HDMI_CLK-
1
1
TXLCLKOUT- RN8 1 2 EV@0_4P2R EV_TXLCLKOUT- 1 2 HDMICLKP_C
EV_TXLCLKOUT- 20 20 HDMI_CLK+
3
TXLCLKOUT+ 3 4 EV_TXLCLKOUT+ Q24
EV_TXLCLKOUT+ 20
*EV@DMN601K-7
TXLOUT0- RN4 3 4 EV@0_4P2R EV_TXLOUT0-
EV_TXLOUT0- 20 From GMCH (iHDMI) ST need stuff R214,R213
1
TXLOUT0+ 1 2 EV_TXLOUT0+ HDMI_HP_A 2
EV_TXLOUT0+ 20
PEG_TXP2 RN12 3 4 *IV@0_4P2R HDMITX0P
7,18 PEG_TXP2
TXLOUT1- RN6 3 4 EV@0_4P2R EV_TXLOUT1- MXM to LVDS PEG_TXN2 1 2 HDMITX0N NV suggestion near
TXLOUT1+ 1 2 EV_TXLOUT1+
EV_TXLOUT1- 20
EV_TXLOUT1+ 20
7,18 PEG_TXN2
PEG_TXP1 RN11 HDMITX1P
FOR NV HDMI HDMI connector
Q25
7,18 PEG_TXP1 3 4 *IV@0_4P2R *EV@DMN601K-7
1
TXLOUT2- RN2 3 4 EV@0_4P2R EV_TXLOUT2- PEG_TXN1 1 2 HDMITX1N
EV_TXLOUT2- 20 7,18 PEG_TXN1
TXLOUT2+ 1 2 EV_TXLOUT2+
EV_TXLOUT2+ 20
PEG_TXP0 RN10 3 4 *IV@0_4P2R HDMITX2P R465 *EV@499/F_4 HDMI_TX0P
7,18 PEG_TXP0 Q28
PEG_TXN0 1 2 HDMITX2N R464 *EV@499/F_4 HDMI_TX0N
7,18 PEG_TXN0
1
*EV@DMN601K-7
PEG_TXP3 RN13 3 4 *IV@0_4P2R HDMICLKP R468 *EV@499/F_4 HDMI_TX1P
7,18 PEG_TXP3
PEG_TXN3 1 2 HDMICLKN R467 *EV@499/F_4 HDMI_TX1N
D
7,18 PEG_TXN3 D
2
Camera(CCD) Modify +3V
+3V
R471 *EV@499/F_4 HDMI_TX2P
HDMI_TX2N
20mil R470 *EV@499/F_4
for CCD power
R463 *EV@499/F_4 HDMI_CLK+
3
NVHDMI_499 R461 *EV@499/F_4 HDMI_CLK-
C722 C477
10U/6.3V_6 4.7u/6.3V_6
L1
USBP11-
13 USBP11- 1 2
4 3 USBP11+
13 USBP11+ PROJECT : ZR6
*WCM2012-90 Size Document Number Rev
1A
LVDS/CRT/CCD/HDMI/MIC
1 2 3 4 5 6 7 8
5 4 3 2 1
25
+3V
Power/Suspend: Green/Amber
SATA HDD(HDD) SATA ODD(ODD) R41 U3
LED(UIF)
CN17
TC7SH08FU
Power LED
31 SUSLED# 4 2
5
23 10K_4 1 LED1 PWR_VCC R355 330_4
GND23 +3V_S5
4 SATA_LED#_R 3 1 LED_G/A
31 PWRLED#
GND1 1 12 SATA_LED# 2
RXP 2 SATA_TXP0 12 Battery LED
3
RXN 3 SATA_TXN0 12 31 BATLED1# 4 2
4 LED2 BAT_VCC R356 330_4
GND2 +3VPCU
5 SATA_RXN0_C C372 .01u/16V_4 SATA_RXN0 12 3 1 LED_G/A
TXN 31 BATLED0#
D 6 SATA_RXP0_C C373 .01u/16V_4 SATA_RXP0 12 CN10 R40 *0_4 D
TXP R349 1M_6
GND3 7 GND14 14
1 R348 1M_6
GND1
3.3V 8 +3V RXP 2 SATA_TXP1 12
9 3
3.3V
10
120mil RXN
4
SATA_TXN1 12
3.3V GND2 SATA_RXN1_C C198 .01u/16V_4 D3 LED_BLUE R4 221/F_4
GND 11 For ESD TXN 5 SATA_RXN1 12 BT_LED 26
12 U12 6 SATA_RXP1_C C197 .01u/16V_4 SATA_RXP1 12
GND *CM1293A-04SO TXP D6 LED_Green R365 221/F_4
GND 13 GND3 7 31 CAPSLED#
14 SATA_TXN0 1 6 SATA_RXN0_C
5V CH1 CH4 D5 LED_Green R369 221/F_4
5V 15 31 NUMLED# +3V
16 +5V 2 5 +5V 8 SATA_DP R101 1K_4
5V VN VP DP SATA_LED#_R D4 LED_Green R368 221/F_4
17 9
GND
18
120mil SATA_TXP0 3 4 SATA_RXP0_C +5V
10
+5V
For ESD
RSVD CH2 CH3 +5V U8 D2 LED_ORANGE R10 221/F_4
GND 19 RSVD 11 26 WLAN_LED#
20 12 *CM1293A-04SO
12V GND SATA_RXP1_C SATA_TXP1 D1 LED_Green R1 221/F_4
12V 21 +3V GND 13 1 CH1 CH4 6
12V 22 D1 Power LED near PW SW
C375 C363 C364 15 2 5 +5V
GND15 VN VP
GND24 24
4.7u/6.3V_6 4.7u/6.3V_6 .1u/16V_4 C18534-11305-L SATA_RXN1_C 3 4 SATA_TXN1
SA@127043FR022GX51ZR CH2 CH3
Power Button
C
120mil (UIF) C
+5V +5V
C356 C355 C354 C350 C351 C352 C524 C530 C144 C143 C124 C123
+
+
100u/6.3V_3528 4.7u/6.3V_6 .1u/16V_4 .1u/16V_4 .01u/16V_4 .01u/16V_4 100u/6.3V_3528 10u/6.3V_8 .1u/16V_4 .1u/16V_4 .1u/16V_4 .1u/16V_4 3 2
31 MX0
1 4 31 NBSWON# 3 2
5 1 4
BT_SW# 6 5
MY0 31
SW2 6
MISAKI_SW_H1.5 SW3
MISAKI_SW_H1.5
31 MX1 3 2
1 4
5
WLAN_SW# 6
SW1
+3V MISAKI_SW_H1.5
FAN(THM) Q22 MODIFY

2
R180 *DMN601K-7 +3V

B *10K_4 B
3 1
+5V THER_OVERT# 3
TP CONN 25mil
R157 R65 4.7K_4 R64 0_6 TP_VCC
+5V +5V
10K_6
+5V R66 4.7K_4 C75 .1u/16V_4 TP_12P
31 FANSIG 1 1
R167 *short0805 2
L3 BK1608LL121_6_150mA TPDATA_R 2
31 TPDATA 3 3
C273 U10 CN14 L4 BK1608LL121_6_150mA TPCLK_R
31 TPCLK 4 4
2 3 TH_FAN_POWER FAN 5
VIN VO 1 5
*2.2u/6.3V_6 1
GND 5
6
30 MIL 25
C87 C88
TP_RIGHT#
6
7
6
FON# GND C272 C263 C253 36 10p/50V_4 10p/50V_4 7
GND 7 4 8 8
CPUFAN# R441 *0_4 4 8 .01u/16V_4 9
VSET GND 22u/6.3V_8 1000p/50V_4 9
10 10
*G991 11
TP_LEFT# D11 TP_LEFT# 11
1 2 *Uclamp0511P_4_ESD 12 12
+3V TP_RIGHT# D10 1 2 *Uclamp0511P_4_ESD CN3
+3V +5V
SW5 SW4 11/09 modify
R443
A A
10K_4 TP_RIGHT# 3 2 TP_LEFT# 3 2
R442 R436 1 4 1 4
FAN_PWM_E 10K_4 10K_4 5 5
6 6
3
THER_OVERT# R446 10K_4 THER_OVERT#_B 2 Q23 MISAKI_SW_H1.5 MISAKI_SW_H1.5

MMBT3904 PROJECT : ZR6
1 3 FAN_PWM_CN
1

R445 *short0402 FAN_PWM_EC Q21 1A
31 CPUFAN# MMBT3904 HDD/ODD/LED/SW/TP/FAN/MMB
5 4 3 2 1
1 2 3 4 5 6 7 8
26
R266 *0_6
Bluetooth(BTM) +3V
MINI-CARD(MPC) BT_POWER
20mil
+3VSUS 1 3
Q14 AO3413 C406

+1.5V +3V
2
CN19 4.7u/6.3V_6
51 52 R310 *short0402
Reserved +3.3V 31 BT_POWERON#
49 50 CN6
Reserved GND
13 PCIRST# 47 Reserved +1.5V 48
2 PCLK_DEBUG 45 Reserved LED_WPAN# 46 25 BT_LED 1 1 6 6
43 44 WLAN_LED#_A R538 *short0402 L25 2 7
Reserved LED_WLAN# WLAN_LED# 25 2 7
+3V R537 *0_6 +3V_MINI_R_A 41 42 4 3 USBP3+ 3
Reserved LED_WWAN# 13 USBP3+ 3
TV use +3V 39 40 1 2 USBP3- 4
A Reserved GND 13 USBP3- 4
C681 *.1u/16V_4 37 38 USBP4+_C R536 *short0402 5 A
Reserved USB_D+ USBP4+ 13 5
35 36 USBP4-_C R532 *short0402 *WCM2012-90
GND USB_D- USBP4- 13
13 PCIE_TXP4 33 PETp0 GND 34
31 32 MINI_SMDATA CON5_BT_L
13 PCIE_TXN4 PETn0 SMB_DATA
29 30 MINI_SMCLK
GND SMB_CLK
27 GND +1.5V 28
25 26
13 PCIE_RXP4
23
PERp0 GND
24
MODIFY Follow Z07
13 PCIE_RXN4 PERn0 +3.3Vaux
21 GND PERST# 22 PLTRST# 13,18,28,30,31
19 20 RF_EN
Reserved Reserved RF_EN 31
17 Reserved GND 18 120mil
15 16
INT. USB(USB) L45
GND Reserved LFRAME# 12,31
13 14 USBPWRP1 USBPWR1
2 CLK_PCIE_MINI1 REFCLK+ Reserved LAD3 12,31
2 CLK_PCIE_MINI1# 11 REFCLK- Reserved 12 LAD2 12,31
9 10 CN16 + C629 TI201209G121_8_3A
2 MINI_CLKREQ# GND Reserved LAD1 12,31
7 8 L23 8
CLKREQ# Reserved LAD0 12,31 1 GND
+5V_TV-CARD R262 *0_6 +5V_TV-CARD_R_A 5 6 4 3 USBP6+ 7 100U/16V_6.3X6
Reserved +1.5V 13 USBP6+ 3 GND
TV use +5V R260 *0_6 +5V_TV-CARD_R_B 3 4 1 2 USBP6- 6 C640 +
Reserved GND 13 USBP6- 2 GND
1 2 5 C636
WAKE# +3.3V *WCM2012-90 4 GND 470p/50V_4
53 PAD53 PAD54 54
PCIE_WAKE_WL_R_# C107H6-10405-L *100u/6.3V_3528
MINI CARD_A
C437 R311 For EMI

PCLK_DEBUG +5VPCU U30
+3VSUS C643 10u/10V_8 G547F2P81U
120mil
2 8 USBPWR1
*10p/50V_4 *22_4 C644 1u/10V_4 IN1 OUT3 USBP6+ D16
3 IN2 OUT2 7 2 1 *MLVG06031R
R257 6
OUT1
2
B USBON# USBP6- D17 B

4 EN# 2 1 *MLVG06031R
Q13 4.7K_4 1 GND R505 *6.34K/F_4
9 GND-C OC# 5
*DTC144EUA
3 1 PCIE_WAKE_WL_R_# R296
14,28,31 PCIE_WAKE#
+3V
10K_4
2
3 1 MINI_SMDATA
+5V +1.5V 2,14,16,28 PDAT_SMB
Q16 EXT. USB(USB)
500mA, 25mil DMN601K-7
R264 *0_6 +5V_TV-CARD
R295 *0_4
C395 C391 C656 C673 C690
R279
*4.7u/6.3V_6 *.1u/16V_4 .1u/16V_4 .1u/16V_4 4.7u/6.3V_6
120mil +5VPCU CN8
+3V
C410 10u/10V_8
2
10K_4 12
C411 1u/10V_4 12
11 11
3 1 MINI_SMCLK 10
2,14,16,28 PCLK_SMB L31 10
Q15 9
DMN601K-7 USBP2- USBP2- 9
13 USBP2- 1 2 8 8
USBP2+ 4 3 USBP2+ 7
13 USBP2+ 7
R278 *0_4
+3V +3V for WWAN card is 2.75A L32 *WCM2012-90
6 6
5 5
USBP0- 1 2 USBP0- 4
13 USBP0- 4
USBP0+ 4 3 USBP0+ 3
13 USBP0+ 3
2 2
C679 C680 C683 C675 C651 C671 C693 *WCM2012-90 1
31 USBON# 1
C 4.7u/6.3V_6 4.7u/6.3V_6 *4.7u/6.3V_6 *4.7u/6.3V_6 .1u/16V_4 .1u/16V_4 .1u/16V_4 C
DUAL USB CONN
Modfiy C
HOLE20 HOLE22 HOLE19 HOLE25

h-tc236bc315d142p2 h-tc236bc315d142p2 h-tc236bc315d142p2 H-C236D142P2
HOLE26 HOLE27
H-C236D142P2 H-C236D142P2
HOLE13
*H-C315D110P2
HOLE15
*h-tc315bsd106p2
HOLE17 HOLE9 HOLE11
*h-tc315bc433d106p2 *H-C315D106P2 *H-C315D110P2
HOLE12
*H-C51D51N
(OTH)
+3V_S5 +1.5VSUS +1.05V +VGACORE
1
1
C716 C239 C91 C104
.1u/10V_4 1000p/50V_4 1000p/50V_4 *1000p/50V_4

HOLE1 HOLE14 HOLE6 HOLE28 HOLE16
HOLE29 HOLE30 HOLE21 HOLE24 HOLE23 HOLE31 *H-C315D106P2 *H-C315D106P2 *O-ZR6-1 *h-c91d91n *H-C315D106P2
h-c157d63pt h-c157d63pt h-c236d142pt h-tc236bc315d142p2 H-C236D142P2 H-C236D142P2
For EMI(EMI)
1
1
1
D D
HOLE8 HOLE5 HOLE3 HOLE18 HOLE4 HOLE7 HOLE10 HOLE2

*H-C315D106P2-8 *H-C315D106P2-8 *hg-c315d106p2 *H-C315D106P2-8 *hg-c315d106p2 *H-C315D110P2-8 *H-TC315BSD106P2-8 *h-tc224bc315d106p2-8
7 6 7 6 7 6 7 6 7 6 7 6 7 6 7 6
8 5 8 5 8 5 8 5 8 5 8 5 8 5 8 5
9 4 9 4 9 4 9 4 9 4 9 4 9 4 9 4
1
2
3
1
2
3
1
2
3
1
2
3
1
2
3
1
2
3
1
2
3
1
2
3
PROJECT : ZR6
1A
MINI/USB/BT/HOLE
1 2 3 4 5 6 7 8
5 4 3 2 1
Speaker Amplifier(AMP)
Codec CX20561-15Z (ADO)
27
+5V_ADO
C666
QFN +3AVDD
ADOGND
4.7u/6.3V_6
.1u/16V_4
+3V_S5 R574 0_6 +AZA_VDD C667

INSPKR+ R526 47K/F_6
R541 *0_6 C711 C464 C701 C446 1u/10V_4
11
13
+3AVDD
6
INSPKL+ R515 47K/F_6 U31
MODIFY REV:C 10u/6.3V_6 .1u/16V_4 .1u/16V_4 C694 .1u/16V_4
VCC
VCC
NC
NC
C709 .1u/16V_4 For EMI FRONT-L C658 1u/10V_6 FRONT-L-1 R512 20K/F_6 FRONT-L-2 15
C469 R347 LIN-
C447 .1u/16V_4 ADOGND
C712 10u/6.3V_6 BIT_CLK_AUDIO FRONT-R C676 1u/10V_6 FRONT-R-1R525 20K/F_6 FRONT-R-2 7 5 BYPASS C670 4.7u/6.3V_6
RIN- BYPASS
D D
AVEE C688 .1u/16V_4 ADOGND C674 1u/10V_6 FRONT+L-1R528 20K/F_6 FRONT+L-2 16 12 INSPKR+
R575 IV@0_4 *10p/50V_4 *22_4 LIN+ RVO1
+1.5VSUS
C684 10u/6.3V_6 C677 1u/10V_6 FRONT+R-1R527 20K/F_6 FRONT+R-2 8 9 INSPKR-
THERMALPAD
ADOGND RIN+ RVO2
+3V_S5 R576 EV@0_4
INSPKL- R524 47K/F_6 1 INSPKL+
44
26
40
36
LVO1
9
4
3
C708 .1u/16V_4 U33 ADOGND
C470 .1u/16V_4 INSPKR- R522 47K/F_6 1453 MUTE# 14 4 INSPKL-
DVDD_1-8
DVDD_3-3
DVDD_44
AVDD_26
AVDD_40
VDD_IO
AVEE
SHDN# LVO2
VSS
VSS
Determining HDA use +1.5V/+3V
HP
34 HPL G1453L
PORTA_L
17
10
11 35 HPR
12 ACZ_RST#_AUDIO RESET# PORTA_R
12 BIT_CLK_AUDIO 6 BIT_CLK MICBIASB 19

12 ACZ_SYNC_AUDIO 10 SYNC PORTB_L 14
12 ACZ_SDIN0 R572 33_4 ACZ_SDIN20561 8 15
SDATA_IN PORTB_R
12 ACZ_SDOUT_AUDIO 5 SDATA_OUT EXT MIC.
18 MIC1-VREFO R557 4.7K_4
MICBIASC MIC1_LL C463 2.2u/6.3V_6 MIC1_LL1 R343 100_4 MIC1_L1 ADOGND
PORTC_L 16
T78 DIB_P 43 17 MIC1_RR C459 2.2u/6.3V_6 MIC1_RR1 R338 100_4 MIC1_R1
R62 100K_4 DIB_N DIB_P PORTC_R
MODIFY 42 DIB_N
ADOGND C448 10u/6.3V_6
PORTD_L 27 INT MIC.
C710 .1u/16V_4 PCBEEP 12 28 +3AVDD R321 1K_4 MIC2-VREFO R330 4.7K_4
14 PCSPK PC_BEEP PORTD_R
48 S/PDIF CX20561
MIC_L
MIC_R
20
21
MIC2_INT_L
MIC2_INT_R
C699
C697
2.2u/6.3V_6
2.2u/6.3V_6 MIC2_INTL1 MIC2_INT LINE OUT(AMP)
R331 0_4
29 MODIFY CN21
R559 *10K_4 GPIO2 MONO FRONT-L
45 GPIO2 STEREO_L 30 1 7
R562 *10K_4 GPIO1 46 31 FRONT-R R565 5.11K/F_4 +3AVDD HPL R530 5.1_4 HPL_SYS1 L49 BK1608LL121_6_150mA HPL_SYS 2
EAPD# GPIO1 STEREO_R
47 EAPD#/GPIO0 SPEAKER 6
C R567 5.11K/F_4 LINEOUT_JD# HP_JD# HPR R533 5.1_4 HPR_SYS1 L50 BK1608LL121_6_150mA HPR_SYS 3 C
4
13 SENSEA R560 20K/F_4 MIC1_JD# EXT MIC._JD# HPPLG# 5 8
SENSEA
1 24 CX20561_VILT R534 R531 C682 C672 Line-in JACK Green
DMIC_CLOCK VREF_FILT *1K_4 *1K_4 100P/NPO/50V_6 100P/NPO/50V_6
2 DMIC_1/2
39 CX20561_FLY_P Normal Close Jack
FLY_P CX20561_FLY_N C444 1u/6.3V_4 C442 C454 ADOGND
FLY_N 37
ADOGND
PC Beep GAIN CONTROL 22 CX20561_RVD22 .1u/16V_4 10u/6.3V_6 ADOGND
DVSS_41
VREF_HI
AVSS_25
AVSS_38
AVSS_49
CX20561_RVD23
DVSS_7
VREF_LO 23
GAIN GPIO1 GPIO2 32 LINEOUT_JD#
RESERVED_32
RESERVED_33 33
C691 C695
3
0dB 10K 10K CX20561-15Z ADOGND
7
41
25
38
49
1u/6.3V_4 1u/6.3V_4
R539
-6dB omit omit 2 HPPLG# +3AVDD

ADOGND
Q30
10K_4
-12dB 10K omit DMN601K-7
1
-18dB omit 10K ADOGND
ADOGND
CODER Power(ADO)
AMP Power(AMP) +5V
MIC(AMP)
+3V L51 +3AVDD
B U35 FBMH1608HM151_6_2A 60mil CN18 B
1 5 R581 *0_6 1 7
VIN VOUT MIC1_L1 L46 BK1608LL121_6_150mA MIC1_L 2
2
C714 C689 C692 C685 C687 C686

2.2U/10V_8
6
C713 2 MIC1_JD# MIC1_R1 L47 BK1608LL121_6_150mA MIC1_R 3
GND 1u/6.3V_4 *4.7u/6.3V_6 .1u/16V_4 4.7u/6.3V_6 .1u/16V_4 .1u/16V_4 4
1
3
+5V L48 +5V_ADO MIC1_PLG 5 8
FBMH1608HM151_6_2A 3 4
60mil EN NC ADOGND
R521
C660 C654 MIC-JACK-PINK
G9091-330T11U(SOT23-5) Q29 2 MIC1_PLG +3AVDD
C659 C661 C665 C664 100P/50V_6 100P/50V_6
DMN601K-7
4.7u/6.3V_6 .1u/16V_4 4.7u/6.3V_6 .1u/16V_4 10K_4
INT MIC.(ADO)
1
ADOGND Normal Close Jack
ADOGND INT MIC
ADOGND
MIC2_INT
1
C99 2
*22p_4 CN5
MUTE(AMP) (ADO) R506 *short0603

R508 *short0603
R535 *short0603
R345 *short0603
C650 .1u/16V_4
+3V C653 .1u/16V_4
C703 .1u/16V_4
C678 .1u/16V_4
+3AVDD +3AVDD R564 C465 *1000p/50V_4
A SPEAKER(AMP) CN4 ESD(AMP) D34 D38 100K_4
C456 *1000p/50V_4
A
INSPKR- L6 BKP1608HS181T_6_1.5A INSPKR-N SPEAKER-CON 1 1

INSPKR+ L5 BKP1608HS181T_6_1.5A INSPKR+N 1 MIC1_JD# HPPLG# ADOGND
25 3 3 31 AMP_MUTE# 1 2
INSPKL- L7 BKP1608HS181T_6_1.5A INSPKL-N D42 BAS316
INSPKL+ L8 BKP1608HS181T_6_1.5A INSPKL+N 36 *DA204U *DA204U EAPD# 1453 MUTE#
4 2 2 1 2
D40 *BAS316
C100 C101 C102 C103 ACZ_RST#_AUDIO 1 2
D41 *BAS316
180p_4 180p_4 180p_4 180p_4 D35 D37 Quanta Computer Inc.
HPL_SYS 1 2 HPR_SYS 1 2
*Uclamp0511P_4_ESD *Uclamp0511P_4_ESD PROJECT : ZR6
1A
CODEC/AMP/MDC
5 4 3 2 1
5 4 3 2 1
LAN Controller
13
13
13
GLAN_RXN
GLAN_RXP
GLAN_TXN
C38
C39
.1u/10V_4
.1u/10V_4
PCIE_RXN6
PCIE_RXP6
37
38
44
U2
TX_N
TX_P
RX_N
DVDDL
DVDDL
DVDD_REG
28
32
45
VDDL12 VDDL12
(30mils) VDDCIO_18
28
13 GLAN_TXP 43 RX_P DVDD_REG 46
CLK_PCIE_LAN# 40 1 LX/VDD18O L2 4.7uH/1A_2X2

2 CLK_PCIE_LAN# CLK_PCIE_LAN REFCLKN LX C34 .1u/10V_4
2 CLK_PCIE_LAN 41 REFCLKP
D C45 C47 D
VDD33 2 +3V_S5
VPD_DATA 30
VPD_CLK TWSI_DATA/TEST_PAD +2.5V_LAN C36 C37 C44
29 TWSI_CLK/3.3V VDD3V 5 +2.5V_LAN .1u/16V_4 10u/10V_8
33 15 1u/6.3V_4 10u/10V_8 10u/10V_8

2,14,16,26 PDAT_SMB SMDATA VDDHO
2,14,16,26 PCLK_SMB 31 SMCLK AVDDH 19
AVDDH 25 EMI C720 1u/10V_4
Atheros
13,18,26,30,31 PLTRST# 3 PERSTn
11 AVDDL_LAN C18 1000p/50V_4
PCIE_WAKE_R# AVDD_REG
4 WAKEn VDD11_REG 8 VAUX_12
AVDDL 16
AR8131
R22 2.37K/F_4 RBIAS 12 22
RBIAS AVDDL
AVDDL 36
34 TESTMODE AVDDL 39
35 42 VDDL12_LAN R36 0_6
NO CONN AVDDL C43 .1u/10V_4
EMI C723 .1u/10V_4
C19 33p/50V_4 CLK_LAN_X1 10 SENSITIVE PIN! 6 VDDCIO_18
XTLI PER FAE SUGGESTION, VDD17 C32 .1u/10V_4
2
CLK_LAN_X2 RESERVE ONE BEAD FOR EMI.
9 XTLO TRXN[3] 24 LAN_TRD3N 29
Y1 23
TRXP[3] LAN_TRD3P 29
25MHZ 7 21
SEL_25MHz TRXN[2] LAN_TRD2N 29
TRXP[2] 20 LAN_TRD2P 29
C
C22 33p/50V_41 TRXN[1] 18 LAN_TRD1N 29 C
49 GND1 TRXP[1] 17 LAN_TRD1P 29
TRXN[0] 14 LAN_TRD0N 29
TRXP[0] 13 LAN_TRD0P 29
+3V_S5
R35 5.1K/F_6
LED_ACTn 47 LAN_ACTLED# 29
LED_LINK10/100n 48 LAN_LINKLED# 29
26 LED_1000# R25 *0_4
LED_LINK1000n
2
R37 27 LAN_CLKREQ#
CLKREQn LAN_CLKREQ# 2
4.7K_4 R26 *4.7K_4 +3V_S5
AR8131
3 1 PCIE_WAKE_R#
14,26,31 PCIE_WAKE#
Q1
DTC144EUA
Decoupling CAP PLACE NEAR IC SIDE EEPROM

B B
VAUX_12
close pin8 +3V_S5
C29 C40 C35 C16 C14 C30

LAN_TRD0N
LAN_TRD1N
LAN_TRD2N
LAN_TRD3N
LAN_TRD0P
LAN_TRD1P
LAN_TRD2P
LAN_TRD3P
.1u/10V_4 .1u/10V_4 .1u/10V_4 .1u/10V_4 .1u/10V_4 1u/10V_4 R39 R38
*4.7K_4 *4.7K_4
for pin 8/16/22/36/39 U4
VPD_DATA 5 1
VDDL12 VPD_CLK SDA A0
6 SCL A1 2
A2 3
7 WP
close pin45 VDDL12 R18 R17 R16 R15 R14 R13 R12 R11
49.9/F_4 49.9/F_4 49.9/F_4 49.9/F_4 49.9/F_4 49.9/F_4 49.9/F_4 49.9/F_4 4 8 +3V_S5
C41 C31 C28 C42 GND VCC
*24C02 C46
1u/10V_4 .1u/10V_4 .1u/10V_4 .1u/10V_4
LAN_N0
LAN_N1
LAN_N2
LAN_N3
*.1u/16V_4
for pin45/28/32/46
+2.5V_LAN
A close pin15 EMI A
C6 C5 C4 C3
C33 C17 C20 C15 .1u/16V_4 .1u/16V_4 .1u/16V_4 .1u/16V_4
.1u/10V_4 1u/10V_4 1u/10V_4 .1u/10V_4

PROJECT : ZR6
for pin 5/15/19/25. Size Document Number Rev
1A
AR8131 GLAN
5 4 3 2 1
1 2 3 4 5 6 7 8
VDDCIO_18 L36
For EMI
0_6
C721 C473 C474

VDDCIO_18_LAN
C476 C475
29
1u/10V_4 .1u/16V_4 .1u/16V_4
.1u/16V_4 .1u/16V_4
A A
TRANSFORMER RJ45 CN9
Close to Transformer pin 1,4,7,10
LAN_LINKLED# R370 220_8 10
28 LAN_LINKLED# GREEN_N
+3V_S5 9 GREEN_P
X-TX3N 8
X-TX3P TX1-
7 TX1+
X-TX1N 6
U21 X-TX2N RX1-
5 TX2- GND2 14
1 24 X-TX2P 4
LAN_TRD3N TCT1 MCT1 X-TX3N X-TX1P TX2+
28 LAN_TRD3N 2 TD1+ MX1+ 23 3 RX1+ GND1 13
LAN_TRD3P 3 22 X-TX3P X-TX0N 2
28 LAN_TRD3P TD1- MX1- RX2-
X-TX0P 1 RX2+
4 TCT2 MCT2 21
LAN_TRD2N 5 20 X-TX2N
28 LAN_TRD2N TD2+ MX2+
LAN_TRD2P 6 19 X-TX2P 12
28 LAN_TRD2P TD2- MX2- YELLOW_N
R360 220_8 11
28 LAN_ACTLED# YELLOW_P
7 TCT3 MCT3 18
LAN_TRD1N 8 17 X-TX1N AOP_RJ45
28 LAN_TRD1N TD3+ MX3+
LAN_TRD1P 9 16 X-TX1P
28 LAN_TRD1P TD3- MX3-
10 15 LAN_ACTLED#
B
LAN_TRD0N TCT4 MCT4 X-TX0N
B
28 LAN_TRD0N 11 TD4+ MX4+ 14
LAN_TRD0P 12 13 X-TX0P LAN_LINKLED#
28 LAN_TRD0P TD4- MX4-
BOT-GST5900B LF
R359 R361 R362 R363 EMI

75/F_8 75/F_8 75/F_8 75/F_8
1
D28 D29 C466 C467
.1u/10V_4 .1u/10V_4
2
*RCLAMP0521P.TCT *RCLAMP0521P.TCT
EMI
C478
220p/3KV_1808
C C
D D

PROJECT : ZR6
1A
LAN Transformer and RJ45/BT
1 2 3 4 5 6 7 8
A B C D E
30
+3V_CARD
4 IN 1 CARD READER
(MMC)
R353 / C472 = NC / NC (RTS5158E)
MODE_SEL R353 / C472 = 0 ohm / NC (RTS5159) VCC_XD
R350 VCC_XD
RESET to EC GPIO (Confirm Anda) R353 C472
100K/F_4
CN7
XD_R/B# 1 20 XD_D3/MS_D1
CARD_RST# R352 *short0402 CARD_RST#_R *short0402 *47P/50V_4 XD_RE#/SD_D2 XD-R/B MS-DATA1 XD_D5/MS_BS
2 XD-RE MS-BS 21
XD_CE# 3 22
4
C471 XD_CLE XD-CE 4IN1-GND2 4
4 XD-CLE SD-VCC 23
R351 1u/10V_4 XD_ALE 5 24 SD_CLK/MS_SCLK
XD_WE#/SD_D3 XD-ALE SD-CLK XD_D6/MS_D0/SD_D0
6 XD-WE SD-DAT0 25
*0_4 XD_WP# 7 26 XD_D2/MS_D2
T59 XD_D0 XD-WP XD-D2 XD_D3/MS_D1
8 XD-D0 XD-D3 27
XD_D1 9 28 XD_D4/SD_D1
XD_RE#/SD_D2 XD-D1 XD-D4 XD_D4/SD_D1
PLTRST# 13,18,26,28,31 10 SD-DAT2 SD-DAT1 29
XD_WE#/SD_D3 XD_D5/MS_BS
XD_WE#/SD_D3
11 30
XD_RE#/SD_D2
CARD_RST#_R
SD_CMD SD-DAT3 XD-D5 XD_D6/MS_D0/SD_D0
12 31
XTLO
SD-CMD XD-D6
XTLI
MODE_SEL
13 32 XD_D7/MS_D3
4IN1-GND1 XD-D7
XD_R/B#
XD_WP#
14 33
XD_CLE
XD_CE#
XD_ALE
R354 *short0402 SD_CLK/MS_SCLK MS-VCC XD-VCC XD_CD#
2 CLK_Card48 15 MS-SCLK XD-CD-SW 34
XD_D7/MS_D3 16 35 SD_WP#
MS_CD# MS-DATA3 SD-WP-SW SD_CD#
17 MS-INS SD-CD-SW 36
XD_D2/MS_D2 18
U18 XD_D6/MS_D0/SD_D0 MS-DATA2
19
48
47
46
45
44
43
42
41
40
39
38
37
Vreg out 1.8V from Internal 3.3VLDO MS-DATA0
37
XTLO
AG_PLL
MODE_SEL
RST#
XD_CLE
XD_CE#
XD_ALE
SD_D2/XD_RE#
XD_RDY
SD_D4/XD_WP#/MS_D7
SD_D3/XD_WE#
XTLI
SHIELD1-GND
SHIELD2-GND 38
C702 C696 41
1u/10V_4 SHIELD3-GND
SHIELD4-GND 42
3 .1u/16V_4 3
VREG 1 36 SD_CMD CONN_CARDREADER
AV_PLL SD_CMD
R344 6.19K/F_4 RREF 2 35 XD_D0
RREF SD_D5/XD_D0/MS_D6
Modify 3 34 XD_D1 L34 22_4 SD_CLK/MS_SCLK
NC1 SD_CLK/XD_D1/MS_CLK
13 USBP1- 4 DM D3V3 33
C457
+3V_CARD CARDREADER POWER
13 USBP1+ 5 DP DGND 32
.1u/16V_4
6 31 XD_D7/MS_D3 +3VSUS +3V_CARD
7
AGND
NC2
RTS5159 SD_D6/XD_D7/MS_D3
NC3 30 R322 *0_8 40mil

Modify MS_CD#
+3V_CARD 8 3V3_IN MS_INS# 29
+3V C440 C439
VCC_XD 9 28 XD_D2/MS_D2
CARD_3V3 SD_D7/XD_D2/MS_D2 R324 10u/6.3V_6 .1u/16V_4
+3V_CARD VREG 10 27 XD_D6/MS_D0/SD_D0 *short0805
C452 C455 VREG SD_D0/XD_D6/MS_D0
2 11 26 XD_D3/MS_D1 2
.1u/16V_4 .1u/16V_4 D3V3 XD_D3/MS_D1
C445 12 25 XD_D5/MS_BS VCC_XD
DGND SD_D1/XD_D4 XD_D5/MS_BS
30mil
XTAL_CTR
.1u/16V_4
XD_CD#
SD_CD#
SD_WP
MS_D4
MS_D5
GPIO0
For EMI
EEDO
R326 C398 C412 C453 C390

EECS
EESK
EEDI
XD_D1 *100K_4 4.7u/6.3V_6 .01u/16V_4 .01u/16V_4 .01u/16V_4

RTS5159-GR
13
14
15
16
17
18
19
20
21
22
23
24
C715
XD_D4/SD_D1
SD_WP#
XD_CD#
SD_CD#
+3V_CARD
XTAL_CTR CLK source 10p/50V_4
GPIO0
EEDO
EECS
EESK
EEDI
Pull-high 48MHz from CLK gen.
Floating 12MHz from Crystal

T49 T48 T50
1 1
T46 T45
PROJECT : ZR6
1A
CARD READER RTS5159
A B C D E
5 4 3 2 1
EC(KBC)
+3VPCU
+3VPCU L29 BK1608HS220_6_1A
30mil
E775AGND
C432
.1u/16V_4_X7R
+A3VPCU
C434
10u/6.3V_6
+3V
I/O ADDRESS SETTING
BADDR1-0
00
Index
I/O Address
XOR TREE TEST MODE

Data
31
C416 C418
01 CORE DEFINED
4.7u/6.3V_6
C663 C376 C433 C662 C668 C669 .1u/16V_4_X7R 10 2Eh 2Fh
115
102
U14
19
46
76
88
4
4.7u/6.3V_6 .1u/16V_4_X7R *.1u/16V_4_X7R .1u/16V_4_X7R *.1u/16V_4_X7R .1u/16V_4_X7R 11 164Eh 164Fh
VCC1
VCC2
VCC3
VCC4
VCC5
AVCC
VDD
D
SHBM=0: Enable shared memory with host BIOS D
LFRAME# 3 97 BADDR0 BADDR0 R303 10K_4

12,26 LFRAME# LFRAME GPI90/AD0 TEMP_MBAT 32
LAD0 126 98
12,26 LAD0 LAD0 GPI91/AD1 TSATN_EC# 6
LAD1 127 99 TPD_TRIP BADDR1 uR_SOUT_CR R302 *10K_4
12,26 LAD1 LAD1 GPI92/AD2
LAD2 128 A/D 100
12,26 LAD2 LAD2 GPI93/AD3 ICMNT 32
LAD3 1 108 SHBM SHBM R269 10K_4
12,26 LAD3 LAD3 GPIO05/AD4
For PCICLK 2 PCLK_591
PCLK_591 2 LCLK GPIO04/AD5 96
14 CLKRUN# 8 GPIO11/CLKRUN 1/13 Comfirm by vendor mail :

GPI94/DA0 101 CC-SET 32 Disabled ('1') if using FWH device on LPC.
12 GATEA20 121 105
GA20 GPI95/DA1 Enabled ('0') if using SPI flash for both system BIOS and EC firmware
For EMI 122
D/A GPI96/DA2 106
107
12 RCIN# KBRST GPI97/DA3 BL_STATE 24
PCLK_591 PU +3V for SCI D18 2 1 BAS316 SCI#_uR 29 LPC
14 EC_SCI# ECSCI/GPIO54
64
24 EC_FPBACK#
EC_FPBACK# 6 GPIO24/LDRQ
GPIO01/TB2
GPIO03/AD6 95
ACIN 21,32
NBSWON# 25
SM BUS PU +3VPCU
GPIO06 93 LID591# 14,24
R283 T42 E_KEY 124 94
GPIO10/LPCPD GPIO07/AD7 SUSB# 6,14
119 MBCLK R513 4.7K_4
GPIO23/SCL3 MXM_SMCLK 21
*22_4 PLTRST# 7 109 MBDATA R509 4.7K_4
13,18,26,28,30 PLTRST# LREST GPIO30/CIRTX2
GPIO31/SDA3 120 MXM_SMDATA 21
USBON# 123 65 MXM_SMCLK R304 4.7K_4
26 USBON# GPIO67/PWUREQ GPIO32/D_PWM BATLED0# 25
66 MXM_SMDATA R305 4.7K_4
GPIO33/H_PWM BATLED1# 25
C422 SERIRQ 125 15
14 SERIRQ SERIRQ GPIO36/TB3 VRON 35
*10p/50V_4 16 +3V
GPIO40/F_PWM SUSLED# 25
PU +3V for SMI 14 KBSMI# 9 GPIO65/SMI GPIO42/TCK 17
GPIO GPIO43/TMS 20 AMP_MUTE# 27
2ND_MBCLK R259 4.7K_4
GPIO44/TDI 21
MX0 54 22 2ND_MBDATA R261 4.7K_4
25 MX0 KBSIN0 GPIO45/E_PWM CPUFAN# 25
MX1 55 23 CRT_SENSE# R523 4.7K_4
25 MX1 KBSIN1 GPIO46/CIRRXM/TRST
PU +3V for SMI MX2 56 KBSIN2 GPO47/SCL4 24
MX3 57 25
C KBSIN3 GPIO50/TDO D/C# 32 C
MX4 58 26
CN2 KBSIN4 GPIO51/TA3 S5_ON 33,40
MX5 59 27 +3VPCU +3V_S5
1 1 MY0
MY1
MX6
MX7
60
KBSIN5
KBSIN6
GPIO52/CIRTX2/RDY
GPIO53/SDA4 28
DNBSWON#_uR R276 *short0402
PCIE_WAKE# 14,26,28
ACER ID U16
2 2 61 KBSIN7 GPIO81 91 DNBSWON# 14
3 MY2 110 MXM_SMCLK 6 1
3 MY3 MY0 GPO82/TRIS BADDR0 MXM_SMDATA SCL A0 R316 R323
4 4 25 MY0 53 KBSOUT0/JENK GPO84/BADDR0 112 5 SDA A1 2
5 MY4 MY1 52 80 3 *0_4 *short0402
5 MY5 MY2 KBSOUT1/TCK GPIO41 A2
6 6 51 KBSOUT2/TMS
7 MY6 MY3 50 7 8
7 KBSOUT3/TDI WP VCC
8 8 MY7
MY8 +3VPCU
MY4
MY5
49 KBSOUT4/JEN0 KB GPIO56/TA1 31 GND 4
C449
9 9 48 KBSOUT5/TDO GPIO20/TA2 117 SUSON 36,39
10 MY9 RP1 10K_10P8R MY6 47 63 24C02
10 KBSOUT6/RDY GPIO14/TB1 FANSIG 25
11 MY10 10 1 MX3 MY7 43 *.1u/16V_4_X7R
11 KBSOUT7
12 12 MY11
MY12
MX4 9
MX5 8
2 MX2 MY8 42 KBSOUT8 TIMER GPIO15/A_PWM 32 CONTRAST 24
13 13 3 MX1 MY9 41 KBSOUT9 GPIO21/B_PWM 118 NUMLED# 25
14 MY13 MX6 7 4 MX0 MY10 40 62
14 KBSOUT10 GPIO13/C_PWM PWRLED# 25
15 MY14 MX7 6 5 MY11 39 81
15 KBSOUT11 GPIO66/G_PWM CAPSLED# 25
16 MY15 MY12 38
16 MY16 MY13 KBSOUT12/GPIO64
17 37
17
18 18 MY17 +3VPCU MY14 36
KBSOUT13/GPIO63
KBSOUT14/GPIO62 GPIO77/SPI_DI 84 CRT_SENSE#
CRT_SENSE# 24
SPI FLASH 2'nd Source AKE38ZA0Q00 +3VPCU
19 19 MX7
MX6
MY15
MY16
35 KBSOUT15/GPIO61/XOR_OUT SPI GPO76/SPI_DO/SHBM 83 SHBM
CELL-SET U17
20 20 34 GPIO60/KBSOUT16 GPIO75/SPI_SCK 82 T36
21 MX5 MY17 33 SPI_SDI_uR R325 22_4 SPI_SDI_uR_R 2 8
21 MX4 GPIO57/KBSOUT17 SO VDD
22 22
23 MX3 75 RSMRST#_uR R519 *short0402 SPI_SDO_uR 5 7 C443
23 GPIO72/IRRX1/SIN2 RSMRST# 14 SI HOLD
24 MX2 MBCLK 70 73
24 32 MBCLK GPIO17/SCL1 GPIO70/IRRX2_IRSL0 SUSC# 6,14
25 MX1 MBDATA 69 74 PWROK_EC_uR R516 *short0402 SPI_SCK_uR 6 3 .1u/16V_4_X7R
25 32 MBDATA GPIO22/SDA1 GPIO71/IRTX/SOUT2 PWROK_EC 14 SCK WP
26 26 MX0
3 2ND_MBCLK
2ND_MBCLK
2ND_MBDATA
67 GPIO73/SCL2 SMB IR GPIO87/CIRRXM/SIN_CR 113 RF_EN
RF_EN 26
R333 10K_4 SPI_CS0#_uR
3 2ND_MBDATA 68 GPIO74/SDA2 GPIO34/CIRRXL 14 +3VPCU 1 CE VSS 4
FFC_26P_KB 114 HWPG
GPIO16/CIRTX uR_SOUT_CR W25X16AVSSIG
GPO83/SOUT_CR/BADDR1 111
CP4 TPCLK 72
25 TPCLK GPIO37/PSCLK1
1 2 MY13 TPDATA 71 1/13 Comfirm by vendor mail :
25 TPDATA GPIO35/PSDAT1
3 4 MY12 10 86 SPI_SDI_uR
B 32 CHG-EN GPIO26/PSCLK2 F_SDI If the Southbridge enables 'Long Wait Abort' by default, the B
5 6 MY11 26 BT_POWERON# 11 GPIO27PSDAT2 PS/2 F_SDO 87 SPI_SDO_uR_R R275 22_4 SPI_SDO_uR
flash device should be 50MHz (or faster)
7
*220PX4
8 MY10 34,36,37,38,39 MAINON 12 GPIO25/PSCLK3 FIU F_CS0 90 SPI_CS0#_uR
SPI_SCK_uR_R R280 22_4 SPI_SCK_uR
21 VGA_THERM# 13 GPIO12/PSDAT3 F_SCK 92
CP3 E775_32KX1 77 30 ECDB_CLOCK T27

MY9 32KX1/32KCLKIN GPIO55/CLKOUT +3V
1 2
3 4 MY8
VCC_POR 85 VCC_POR# R272 47K_4 +3VPCU HWPG
5 6
VCORF
AGND
R265 20M_6 E775_32KX2 VREF_uR R297 *short0402 +A3VPCU R273

GND1
GND2
GND3
GND4
GND5
GND6
7 8 79 32KX2 VREF 104

*220PX4
CP2 R267 WPCE775LA0DG 10K_4

5
18
45
78
89
116
103
VCORF_uR 44
1 2 MY7 D19 EV@BAS316

37 1V8_ON
3 4 MY6 Y3 32.768KHZ 33K/F_4
5 6 MY5 1 4 D24 BAS316
6,36 HWPG_1.5V
7 8 MY4 2 3
*220PX4 C435 .1u/16V_4_X7R D20 BAS316 HWPG
34 HWPG_1.05V
C397 .1u/16V_4_X7R
CP7 C400 C407 C652 D25 BAS316
1 2 MX0 15p/50V_4 15p/50V_4 L30 1'st AKE38ZP0N01 : Winbond W25X16AVSSIG 38,39 HWPG_1.8V
R263
3 4 MX1 1u/10V_4 D21 BAS316 *short0402
5 6 MX2 E775AGND 2'nd AKE37FP0Z13 : MXIC MX25L1605AM2C-15G 33 SYS_HWPG
7 8 MX3 BK1608HS220_6_1A D22 *BAS316
*220PX4 3'rd AKE38ZA0Q00 : EON EN25F16-100HIP 3,6,14,35 DELAY_VR_PWRGOOD
MPWROK 6,14
E775AGND D23 EV@BAS316
CP6 4'rd AKE38ZN0800 : AMIC A25L016 37 HWPG_1.1V
1 2 MX4
3 4 MX5
5 6 MX6
7
*220PX4
8 MX7 POWER-ON PAD(UIF) Thermal Sensor(THM) INTERNAL KEYBOARD STRIP SET
CP1 +3V
A 1 2 MY3 +3VPCU A
3 4 MY2
5 6 MY1 MY0 R247 10K_4
G1
7 8 MY0
*220PX4 NBSWON# 1 2 R300
47K/F_4
CP5 R301
1 2 MY17 *SHORT_ PAD 100K/F _4 NTC
3 4 MY16
5 6 MY15
MY14
TPD_TRIP Quanta Computer Inc.
7 8
*220PX4
PROJECT : ZR6
1A
WPCE775C_0DG & FLASH
5 4 3 2 1
5 4 3 2 1
20277-044L
3
PL1
HI0805R800R-00_8
VA PD13
PDS1040S-13
1
2
3 1
PR139
0.02_7520 R1
2 VA2 3
PQ19
AP4435GH
4
VIN PQ21
3 4
32
PC84 PR3 AP4435GH
1
2 2200p/50V_6 PC83 PC82 PC5 PR14 PC87 PC89 33K_6
1
PL2 0.1u/50V_6 0.1u/50V_6 0.1u/50V_6 220K/F_6 0.1u/50V_6 2200p/50V_6
1 HI0805R800R-00_8
PC85 PC86 PD12
D 0.1u/50V_6 0.1u/50V_6 P4SMAJ20A D
2
PJ2 1 6
PR1 PR2
PD4 PR22 2 5 10K_6
D/C# 31
SW1010CPT 220K/F_6
3 4 SHORT 0 0402
3
PQ1
IMD2AT108
2
PQ2
CSIP_1 DMN601K-7
1
VIN
PC28
2200p/50V_4
PR52 PR54 ISL6251_VDD EMI request

2.2/F_6 20/F_6
+3VPCU PR75
PC30 4.7_6 PC44 PC41 PC43 PC129 PC49
0.1u/50V_6 4.7u/10V_8 2200p/50V_6 0.1u/50V_6 *10u/25V_1206 *10u/25V_1206
ISL6251_VDDP PC48 PC128
10u/25V_1206 *10u/25V_1206
C CSIP CSIN C
5
6
7
8
PD5
19
20
15
1
PR45 PR44 RB500V-40
10K/F_6 100K/F_6 PR61
CSIP
CSIN
VDD
VDDP
20/F_6 PR72 PC39 4
6251LR CSOP 21 2.7_6 0.1u/50V_8
CSOP
BOOT 16 6251B_2 6251B_1
PC35
21,31 ACIN
3
0.047u/25V_6 PQ5 PR147
17 ISL6251_UGATE AO4496 PL7 0.03_3720
PU1 BAT-V CSON 22 UGATE 6.8uH
CSON
3
2
1
CM1293A-04SO 2 6251LR 1 2 BAT-V
1 6 MBDATA PR60 18 ISL6251_PHASE
CH1 CH4 PHASE
5
6
7
8
PQ3 20/F_6
2 5 +3VPCU DMN601K-7 PR64
VN VP PU3 ISL6251_LGATE 2.2/F_4
LGATE 14
1
TEMP_MBAT 3 4 MBCLK ACPRN 23 ISL6251A 4

CH2 CH3 ACPRN PC20
PR59 PC29 13 0.01u/50V_6
10/F_6 0.1u/50V_6 PGND PC36
DCIN 24 12 PQ4 *2200p/50V_4
PC90 DCIN GND AO4710 PC103
0.1u/50V_6 PR58 6251LR 2200p/50V_6 PC111
3
2
1
2 1 82.5K/F_6 11 VADJ T7 10u/25V_1206
6251ACSET 2 VADJ BAT-V
Use Z06 conn for A-SMT ACSET PC106
B change to XXXXXX PC95 HI0805R800R-00_8 10 VREF 10u/25V_1206
100p/50V_6 PL3 PR57 ACLIM
3 EN
BAT-V 10K/F_6
VCOMP
ICOMP
CELLS
B B
CHLIM
VRFE
R2
ICM
PJ1 PR74
MBAT+ PL5 196K/F_6
1 HI0805R800R-00_8
2
6251ICOMP 5
6251VCOMP1 6
9
3 31 CHG-EN
9 4 ACLIM
10 5 PD1 PR53 VREF
6 RB500V-40 SHORT 0 0603
7 CC-SET 31
8 TEMP_MBAT PR76
BATTERY Con.
PC2 PC3
PR20
*0_6
TEMP_MBAT 31
6251EN 6251CELLS_1 PC45
100p/50V_6
R3 15K/F_6
47p/50V_6 47p/50V_6
+3VPCU
PR25 PR56 0.01u/50V_6
PC37 PR70
100K/F_6 100K/F_6 100_4
PR15 PR16 PR63 6251VCOMP2 ICMNT
ICMNT 31
100_4 100_4 SHORT 0 0603
PR67 LIM = (1/R2)*(((0.05/VREF=2.39)VACLM)+0.050)
MBCLK 31 3.3K/F_6
CURRNT LIMIT POINT =(90w/19v)*0.85= 4.026A
MBDATA 31 PC42 4.026A=(1/0.02)((0.05/2.365)Vaclm+0.05)
PC38 PC32 3300p/50V_4
*100p/50V_6 0.01u/50V_6
Vaclm=((33//152)/(33//152+19.6//152))*Vref
1
A A
1
PD2 PD3 PR13 PC7

R2=adapter current sense resistnece
*ZD5.6V *ZD5.6V *100K/F_6 0.01u/50V_6
2

PROJECT : ZR6
CELL-SET = Hi ----> Cells = VDD ---->4S Size Document Number Rev
CELL-SET = Low ----> Cells = GND ---->3S Charger (ISL6251A) 1A

5 4 3 2 1
5 4 3 2 1
33
MAIND
MAIND 36,39
SUSD
SUSD 39
PR182 VL
3,40 SYS_SHDN#
VIN
SHORT 0 0402
1
D VIN VIN D
PR180
1
39K/F_4
+ PC169 PC171 PC173 PC172 PC174 PC175 PC165 PC164 PC166
2
PC163 0.1u/50V_6 2200p/50V_6 10u/25V_1206 *10u/25V_1206 PD15 0.1u/50V_6 0.01u/16V_4 PR187 0.1u/50V_6 2200p/50V_4 10u/25V_1206
100u/25V_6X7.7 3V5V_EN ZD5.6V *0_6
2
PR175 PR177 VL
SHORT 0 0402 SHORT 0 0402
PR185
0_4
PR186 PC177
100K/F_4 PC178 1u/16V_6
5V_EN
3V_EN
5
6
7
8
4.7u/10V_8 OCP : 8A
PR121
0_4 PR209
REF 3V_DH 4 +3VPCU
PQ34
8
7
6
5
OCP: 8A PC176 *0_4 AO4496
0.1u/50V_6
REFIN2
+5VPCU PR188
8
7
6
5
4
3
2
1
4 5V_DH 200K/F_4
PL13
LDOREFIN
LDO
VIN
ONLDO
NC
VCC
TON
REF
3
2
1
2R2uH-5.8mR
PQ36 3V_LX
AO4496 PR178
5
6
7
8
+5VPCU 9 32 196K/F_6
PL12 BYP REFIN2 PR173
10 OUT1 ILIM2 31 1 2
1
2
3
C 2R2uH-5.8mR 11 30 *2.2/F_4 C
5V_LX FB1 PU10 OUT2 SKIP 3V_DL4
1 2 12 ILIM1 SKIP# 29
DDPWRGD_R 13 ISL6237 28 DDPWRGD_R PR117
8 PGOOD1 PGOOD2
7
6
5
PR179 5V_EN 14 27 3V_EN 0_6 +
PR169 196K/F_6 EN1 EN2 PC170 PC161 PC162
15 DH1 DH2 26
PR116 *2.2/F_4 16 25 *2200p/50V_4 0.1u/50V_6 330u/6.3V_6X5.7
+ *63.4K/F_4 5V_DL LX1 LX2
4 37 PAD
PC160 PC158 PC159 36 PAD
3
2
1
PGND
PVCC
10u/25V_1206 330u/6.3V_6X5.7 0.1u/50V_6
BST1
BST2
GND
PAD
PAD
PAD
DL1
DL2
PC168 PC80 PQ37
NC
*2200p/50V_4 PC81 0.1u/50V_6 AO4710
PQ35 0.1u/50V_6 PR113
35
34
33
17
18
19
20
21
22
23
24
PR118 AO4710 PR114 1/F_6
1
2
3
0_4 1/F_6
PR120 PR115
*0_6 *0_6
VL SKIP REF
PR172
PC79 *0_6 PR171
2 0.1u/50V_6 PC167 SHORT 0 0603
PD11 1u/16V_6
CHN217 3 PR119
10K/F_4 : CS31002FB26 OCP:8A 0_6
1
OCP:8A PR170 L(ripple current)
PC78 0_6 +3VPCU
PC76 2 0.1u/50V_6 =(19-3.3)*3.3/(2.2u*0.5M*19)
L(ripple current)
0.1u/50V_6 PD10 ~2.48A
=(19-5)*5/(2.2u*0.4M*19) CHN217 3
B B
~4.18A Iocp=8-(2.48/2)=6.67A PR174
1 100K/F_4
Iocp=10-(4.18/2)=5.91A PR112 PR184 PR181 Vth=6.67A*15mOhm=94.714mV
22_8 *200K/F_4 *0_6 R(Ilim)=(94.714mV*10)/5uA
Vth=5.91A*14.2mOhm=83.922mV +15V_ALWP REFIN2 DDPWRGD_R
+15V ~191K SYS_HWPG 31
1
R(Ilim)=(83.922mV*10)/5uA
PR176
~169K PC77 PR183 SHORT 0 0402
0.1u/50V_6 *39K/F_4
+3VPCU +3VPCU
3
VIN +3V_S5 +5V_S5 +15V +5VPCU +5VPCU +3VPCU SUSD 2 S5D 2
PQ14 PQ15
PR125 PR123 PR124 PR126 AO3404 AO3404
1
1M_6 22_8 22_8 1M_6
5
6
7
8
5
6
7
8 +3VSUS +3V_S5
1
2
5
6
S5D 3 PQ13 MAIND 4 MAIND 4

0.3A 0.17A
AO6402A C717 C718 C719
3
A PQ33 PQ38 .1u/10V_4 .1u/10V_4 .1u/10V_4 A

4
2 AO4496 AO4496
31,40 S5_ON
2 2 2
3
2
1
3
2
1
PR122 PQ16 PQ17 PQ12

1
PQ18 1M_6 DMN601K-7 DMN601K-7 DMN601K-7

+5V_S5
DTC144EU
1
2.25A
+5V +3V
4.54A 5.26A
PROJECT : ZR6
1A
SYSTEM 5V/3V (ISL6237)
5 4 3 2 1
5 4 3 2 1
+5V_S5
VIN
34
PR153 PD14 PC52
D D
10/F_6 RB500V-40 2200P/50V_4
5
PR149 PC121 PC123
1M_6 *0.1u/50V_6
4.7u/6.3V_6
2
PR151 4 PQ26 PC53 PC131
PU7 0_6 AOL1448 0.1u/50V_6 10u/25V_1206
UP6111AQDD
1
2
3
PR150 47K_6 PC120
15 13 0.1u/50V_6
31,36,37,38,39 MAINON EN/DEM BOOT PL9
+3V 16 12 UGATE-1V 1R0uH-3mR
PC115 TON UGATE
0.1u/50V_6 1 11 PHASE-1V
VOUT PHASE +1.05V
PR69 2 10 PR68 2.8K/F_6
VDD OC
5
*10K/F_6
3 9 PR82
1.05V
FB VDDP + 4.02K/F_6
C C
4 8 LGATE-1V 4 PR159
OCP: 12A
31 HWPG_1.05V PGOOD LGATE *2.2/F_6 PC55
6 7
R1 33p/50V_6
GND PGND
1
2
3
PQ29
5 17
Rds*OCP=RILIM*20uA AOL1718
NC TPAD PC132
14 *2200p/50V_6
NC
1
PC135 PR89
PC119 PC133 10u/10V_8 10K/F_6
1u/16V_6 560u/2.5V_6X5.7
R2
2
PC117
*1000p/50V_6 PC114
0.01u/50V_6 1V_FB
VOUT=(1+R1/R2)*0.75
B B
AOL1412 Rdson=4.6mOhm +1.05V
TON=3.85p*RTON*Vout/(Vin-0.5)
OCP=16-0.8A
Frequency=Vout/(Vin*TON) L(ripple current)
=(19-1.05)*1.05/(1u*272k*19)
TON=3.85p*1M*1/(Vin-0.5) ~3.646A PC125
0.1u/50V_6
4.6m*12=RILIM*20uA
Frequency=1/(0.0036767)=272K RILIM=2.76K--- 2.8K
A A

PROJECT : ZR6
1A
VCCP 1.05V(UP6111A)
5 4 3 2 1
5 4 3 2 1
PR129
*0_4
PR130
*0_4
PR131
*0_4
+3VPCU
PR132
*0_4
PR133
*0_4
PR134
*0_4
PR135
*0_4
+3VPCU
DELAY_VR_PWRGOOD 3,6,14,31
35
VIN
H_VID6 H_VID5 H_VID4 H_VID3 H_VID2 H_VID1 H_VID0
+
PC9 PC96 PC10 PC8 PC92
2200p/50V_6 10u/25V_1206 10u/25V_1206 0.1u/50V_6 100u/25V_6X7.7
D PR17 D
5
*2.2_6
6266A_UG1
30A
4 PQ20
AOL1448 VCC_CORE
PR36 VIN +3V PC6
1
2
3
*2200p/50V_6 PL4
0.36uH
SHORT 0 0805 6266A_PH1 1 2
PR39 PR136 PR138
4
5
10/F_6 10_4 1.91K/F_4
+5V_S5 PR27
2.2_6 + +
6266A_LG1 4 PC93 PC94
330u/2V_7343 *330u/2V_7343
PR18 PC107 PC88
1
2
3
4.99K/F_6 PR146 0.1u/50V_6 0.1u/50V_6 PQ22 PC16
PWR_MON PGD_IN 10/F_6 AOL1718 *2200p/50V_6
PC1
0.1u/50V_6
22
20
48
1
PR11 PR4
PC105 0_6 0_6
VCC
VIN
PGOOD
3V3
1u/25V_8
PR23 3.65K/F_6
21 VSUM
GND
Close to Phase 1 Inductor UGATE1 35
49 PR19 10K/F_6
GND_T
BOOT1 36
3 PSI# PSI#
Throttling temp. PR137 PR12 1/F_6
PR9 2.2_6 PC91
10K/F_6 105 degree C 0.22u/25V_8
C
VR_ON 34 PR5 *0_6 C
PR6 0_4 PSI#_1 PHASE1 ISEN2
2 PSI#
LGATE1 32
PR26 PR10 *0_4 PGD_IN 3
*10K/F_4 PGD_IN
PGND1 33
+3V_S5 PR24 147K/F_6 4 RBIAS ISEN1
ISEN1 24
3 H_PROCHOT# 5 VR_TT# VIN
PR21 PR140
470K_4 NTC 4.02K/F_4 6 +5V_S5 PC4
NTC 0.22u/25V_6 +
PVCC 31
PC97 VSOFT 7 PC26 PC116 PC27 PC25
0.01u/16V_4 PC98 SOFT PC99 2200p/50V_6 10u/25V_1206 10u/25V_1206 0.1u/50V_6 PC108
0.022u/50V_6 4.7u/10V_8 100u/25V_6X7.7
Panasonic H_VID0 37 PR66
VID0
5
4 H_VID0 *2.2_6
ERT-J0EV474J H_VID1 38 PU6 27
4 H_VID1 VID1 UGATE2
ISL6266A
H_VID2 39 26 6266A_UG2 4 PQ24
4 H_VID2 VID2 BOOT2 AOL1448
H_VID3 40 PR142 PC33
4 H_VID3 VID3
1
2
3
2.2_6 PC100 *2200p/50V_6 PL6
H_VID4 41 0.22u/25V_8 0.36uH
4 H_VID4 VID4
28 6266A_PH2 1 2
H_VID5 PHASE2
4 H_VID5 42 VID5
LGATE2 30
4
5
H_VID6 43
4 H_VID6 VID6
PR7 29 PR37
0_4 VR_ON PGND2 2.2_6 + + +
31 VRON 44 VR_ON
PR8 23 ISEN2 6266A_LG2 4 PC11 PC12 PC23
499/F_4 DPRSLPVR 45 ISEN2 330u/2V_7343 *330u/2V_7343 *330u/2V_7343
6,14 PM_DPRSLPVR DPRSLPVR
1
2
3
PR128 0_4 ICH_DPRSTP#_R 46 PC21 PQ23 PC22
3,6,12 ICH_DPRSTP# DPRSTP#
25 0.22u/25V_6 AOL1718 *2200p/50V_6
PR127 0_4 CLKEN# NC
14 VR_PWRGD_CK410# 47 CLK_EN# PR34 PR40
B 0_6 0_6 B
8 PC101 PR141
PR145 OCSET 1000p/50V_4 13.3K/F_4
1K/F_4 13 VDIFF
19 VSUM
PR143 PC102 PR144 VSUM
100/F_4 2200p/50V_6 1K/F_4
12 FB2
PC104 PR42
11 0.068u/25V_6 2.7K/F_4
FB PR28 3.65K/F_6
PC110 PR41 VSUM
0.22u/25V_6 11K/F_4
PR30 10K/F_6
PC18 PR29 PC15 10 PR55
100P/50V_4 97.6K/F_4 220p/50V_4 COMP 10K _6 NTC
PR38 1/F_6
VO 18
Panasonic
PR46 *0_6
DROOP
ISL6266_VO
PC19 PR35 ERT-J1VR103J ISEN1

VSEN
9 VW
RTN
DFB
1000p/50V_6 11.3K/F_4
PC109
0.33u/10V_6 Close to Phase 1 Inductor
15
14
16
17
PR33 PR43
3.9K/F_4 1K/F_4
PC17 VCC_CORE
330p/50V_4 PC24
180p/50V_4
A PC13 PC14 PR32 A

330p/50V_4 0.01u/16V_4 10/F_6
Parallel
VCCSENSE 4
VSSSENSE 4

PR31
10/F_6 PROJECT : ZR6
1A
CPU CORE(ISL6266A)
5 4 3 2 1
5 4 3 2 1
36
D D
PC122
10u/6.3V_8
PR71 PC40
0_6 0.1u/50V_6
+SMDDR_VTERM
VIN
PC113 PC118
10u/10V_8 10u/10V_8
5
4 PQ27
AOL1448
25
24
23
22
21
20
19
PC51 PC50 PC130 OCP: 11A
1
2
3
2200p/50V_6 10u/25V_1206 10u/25V_1206
GND
VLDOIN
DRVH
LL
DRVL
VTT
VBST
PL8
2R2uH-5.8mR 9A
1 18 +1.5VSUS
VTTGND PGND
2 VTTSNS CS_GND 17
5
PR152 5.1K/F_6
3 TPS51116REGR 16
GND PU2 CS
4 PR73
+1.5VSUS 4 15 +5VPCU *2.2/F_6 +
C +1.5VSUS MODE V5IN C
PC68
1
2
3
PQ25 10u/6.3V_8
5 14 AOL1718
+SMDDR_VREF VTTREF V5FILT
1
PR65
PC112 +5VPCU PC31 5.1_6 PC34 PC46
VDDQSNS
6
VDDQSET
COMP PGOOD 13
0.033u/50V_6 1u/10V_4 1u/10V_4 *2200p/50V_6 PC139
2
560u/2.5V_6X5.7
PR62
NC
NC
S3
S5
100K/F_6 +3VPCU
7
10
11
12
FOR DDR II
HWPG_1.5V 6,31
PR49
620K/F_4
VIN
S5_1.5V PR50 SHORT 0 0402

SUSON 31,39
S3_1.5V PR51 SHORT 0 0402

MAINON 31,34,37,38,39
AO1412 Rdson=3.~4.6mOhm
PR48
Vout = (PR150/PR149) X 0.75 + 0.75
10K/F_6
OCP=15.5+0.5A
B PR155 *0_4 PR148
L(ripple current) B
T61 VDDIO_FB_H *0_4 =(19-1.8)*1.8/(2.2u*400k*19)
S3_1.5V S5_1.5V
T62 VDDIO_FB_L ~1.03A
PR154 *0_4
PR47
10K/F_6
4.6m*16=RILIM*10uA
RILIM=5.06K~5.1K
(10u*PR154)/Rdson+Delta_I/2=Iocp
+1.5VSUS
5
6
7
8
33,39 MAIND 4
PQ32
AO4496
A A
3
2
1
+1.5V

PROJECT : ZR6
1A
DDR 1.5V(TPS51116)
5 4 3 2 1
1 2 3 4 5
31,34,36,38,39 MAINON
MAINON
V1.2GND PC58
EV@0.1u/50V_6
PC59
EV@1000p/50V_6
37
R1 VID[1:0] INPUTS OUTPUTS VOUT1
PR77
EV@158K/F_6
V1.2GND V1.2GND
VID1 VID0 Set G1 G0 OD1 OD2 OD3
A A
R4 R3 R2 0 0 1.2V 0 0 2.75* R2/(R1+R2)=2.75*121/(121+158) = 1.192 (G0=0, G1=0)

PR93 PR80 PR78
PC67 EV@332K/F_4 EV@750K/F_6 PR83 0 1 1.1V 0 1 2.75*(R2||R3)/[(R2||R3)+R1] = 1.092 (G0=1. G1=0)
PR91 EV@150p/50V_4 EV@121K/F_6 EV@33K/F_6
EV@100K/F_6
3
1 0 1.0V 1 0 2.75*(R2||R4)/ [(R2||R4)+R1] = 0.99 (G0=0, G1=1)
PR88
EV@2.2K_4 V1.2GND
21 GPU_VID1 2 2 1 1 0.9V 1 1 2.75*(R2||R3||R4)/ [(R2||R3||R4)+R1] = 0.91 (G0=1, G1=1)
PC57 PR84
G1 G0 EV@0.1u/50V_6 MCP67 TABLE
PQ7 PQ6 EV@63.4K/F_6
EV@DMN601K-7 EV@DMN601K-7
1
1
V1.2GND V1.2GND
V1.2GND V1.2GND
21 GPU_VID0
PR94 PC65 PC56
PR92 EV@2.7K_4 EV@1u/16V_6
VIN
EV@150p/50V_4
VDDA
EV@100K/F_6 +3V V1.2GND EMI request
V1.2GND V1.2GND VIN
5
17
16
15
14
13
B V1.2GND
PC137 OCP:18A B
AGND
VDDA
TEST
VREF
VSET
MAINON PR99 PR95 PR90 PC60 4 EV@2200p/50V_6 14A
EV@10K_6 EV@1K_4 EV@330K/F_4EV@1000p/50V_6
1 12 CSN PC72 PC71 PC70 +VGACORE
OCT CSN V1.2GND
1
2
3
EV@0.1u/50V_6 EV@10u/25V_1206
PC64 V1.2GND EV@10u/25V_1206
EV@0.01u/50V_6 PQ28
PR98 V1.2GND 2 11 CSP V1.2GND EV@AOL1448
SHORT 0 0603 VIN CSP
PU4 PC61
EV@OZ8111 EV@22p/50V_4 PL10
3 10 PHASE-1.2V
ON/SKIP LX
EV@1R5uH-3.9mR
PR96 4 9 UGATE-1.2V PR160 PR85

PGD HDR
GNDP
EV@51/F_6 + +
VDDP
EV@100K/F_6 LDR *EV@2.2_4
BST
5
PR97 PC142
SHORT 0 0603 PR86 PC63 *EV@330u/2V_7343
PC66 EV@100K/F_6 EV@4700P/50V_6
5
EV@0.22u/25V_6 4
V1.2GND
PC140 PC143 PC141
1
2
3
+5V *EV@2200p/50V_4 EV@330u/2V_7343 EV@10u/6.3V_8
31 1V8_ON
PQ30
LGATE-1.2V EV@AOL1718
PR101
EV@22_6
VDDA
CSP
C PD6 C
EV@RB500V-40
PR100 PC69 CSN
EV@1u/16V_6
SHORT 0 0805
18 VGA_SENSE
M92LP
V1.2GND
PR79
*EV@100/F_4
+1.5VSUS +3V_S5
1
PR156
EV@100K_4
PC124 PC126 PU8
2
EV@10u/6.3V_8 EV@0.1u/10V_4 EV@G973

5 VIN POK 7 HWPG_1.1V 31
9 VIN1 GND 1
MAINON PR157 EV@0_6 8 3 +VGA1.1V

EN VOUT
+5VPCU
2.435A
1
6 VCNTL VOUT 4
FB
2
D PR158 PC127 D
EV@100K_4 *0.1u/50V_6 PC47 PR87
2
EV@1u/10V_4 EV@13K/F_6
2
R2
R1 PC136 PC134 PC138
PR81
EV@34K/F_6 EV@10u/6.3V_8 EV@10u/6.3V_8 EV@0.1u/10V_4
Vout =0.8(1+R1/R2) 1 2
=1.5V PC54 PROJECT : ZR6

EV@0.047u/16V_4 Size Document Number Rev
1A
VGA M92LP (OZ8118)
1 2 3 4 5
5 4 3 2 1
VIN
+5V_S5
D
PR166
EV@10/F_6
PD9
EV@RB500V-40
PC150
EV@4.7u/6.3V_6 1 D1
UGATE-1.8V
G1 8 PC151
PC153
EV@10u/25V_1206 38 D
1
PR162 PC149 EV@0.1u/50V_6
EV@1M_6 *EV@0.1u/50V_6 2 D1 S1/D2 7
2
PR164 LGATE-1.8V 3 G2 6 PC152
PU9 EV@0_6 EV@2200P/50V_4
EV@UP6111AQDD 4 S2 5
PR163 EV@47K_6 PC147
15 13 EV@0.1u/50V_6
31,34,36,37,39 MAINON EN/DEM BOOT PQ31
OCP: 4A
+3V 16 12 UGATE-1.8V EV@AO4932 PL11
PC146 TON UGATE EV@2.5uH
EV@0.1u/50V_6 1 11 PHASE-1.8V
VOUT PHASE +1.8V
2 10 PR165 EV@3.92K/F_6
PR167 VDD OC PR111
*EV@10K/F_6 3 9 EV@14K/F_6
2.73A
FB VDDP +
C C
4 8 LGATE-1.8V PR168
31,39 HWPG_1.8V PGOOD LGATE *EV@2.2/F_6 PC75
6 7
R1 EV@33p/50V_6
GND PGND
5 17
Rds*OCP=RILIM*20uA
NC TPAD PC154
14 *EV@2200p/50V_6
NC
1
PC156 PR110
PC148 EV@560u/2.5V_6X5.7 EV@10K/F_6
EV@1u/16V_6 PC155
R2
2
EV@10u/10V_8
PC144
*EV@1000p/50V_6 PC145
EV@0.01u/50V_6 1.8V_FB
VOUT=(1+R1/R2)*0.75
B B
AO4932 Rds=15.6~19.6mOhm +1.8V
TON=3.85p*RTON*Vout/(Vin-0.5)
OCP=16-0.8A
Frequency=Vout/(Vin*TON) L(ripple current)
=(19-1.8)*1.8/(2.5u*272k*19)
TON=3.85p*1M*1/(Vin-0.5) ~2.14A PC157
EV@0.1u/50V_6
19.6m*4=RILIM*20uA
Frequency=1/(0.0036767)=272K RILIM=3.92K
A A

PROJECT : ZR6
1A
VCCP 1.8V(UP6111A)
5 4 3 2 1
5 4 3 2 1
39
+3V
1
PR207
+5VPCU
D IV@100K_4 D
PC182 PU11
2
IV@0.1u/50V_6 IV@RT9025-25PSP
4 VPP PGOOD 1 HWPG_1.8V 31,38
PS10 SHORT 0 0603
31,34,36,37,38 MAINON 2 VEN VO 6 +1.8V
+3V_S5 3 VIN 0.3A

8 GND
ADJ
9 GND NC 5
PR208 PC185
7
IV@43.2K/F_6 IV@10u/10V_8
0.8V
PC183 PC184 PC181
IV@10u/10V_8 IV@0.1u/50V_6 *IV@0.1u/50V_6
PR206
IV@34K/F_6
Vout =0.8(1+R1/R2)
=1.8V
C C
VIN +3VSUS +SMDDR_VTERM +1.5VSUS +15V
PR193 PR189 PR190 PR191 PR192

1M_6 22_8 22_8 22_8 1M_6
SUS_ON_G SUSD
SUSD 33
3
3
3
PR194
31,36 SUSON 2 1M_6 2 2 2 2
PC179
PQ40 PQ41 PQ42 PQ43 *2200p/50V_4
1
PQ39 DMN601K-7 DMN601K-7 DMN601K-7 DMN601K-7

1
PR195 DTC144EU
1
1
100K_4
2
B B
VIN +3V +5V +VGACORE +1.05V +1.5V +1.8V +15V
PR203 PR196 PR197 PR198 PR199 PR200 PR201 PR202

1M_6 22_8 22_8 22_8 22_8 22_8 22_8 1M_6
MAINON_ON_G MAIND
MAIND 33,36
3
3
3
PR204
MAINON 2 1M_6 2 2 2 2 2 2 2
PC180
1
PQ45 PQ46 PQ47 PQ48 PQ49 PQ50 PQ51 *2200p/50V_4

PR205 PQ44 DMN601K-7 DMN601K-7 DMN601K-7 DMN601K-7 DMN601K-7 DMN601K-7 DMN601K-7
1
100K_4 DTC144EU
1
1
2
A A

PROJECT : ZR6
1A
Discharge
5 4 3 2 1
1 2 3 4 5
40
VIN
A A
PD8
SW1010CPT
PR108
1M_6
1
S5_ON PQ11
31,33 S5_ON
AO3409
TH_ON 2
3
thermal protection
3
S5_ON 2
PQ10
1
VL VL DTC144EU
B B
SYS_SHDN# 3,33
PR104 PR103
1.33K/F_4 200K/F_4 PR105
200K/_6
PC74
0.1u/50V_6
3
8
PR161
10K _6 NTC 2.469V 3 +
1 2
2 - PQ9
PU5A DMN601K-7
4
LM393 PC73
1
0.1u/50V_6
PR102
C 200K/F_4 C
+3VPCU
3
VL
S5_ON 2
PR109
PQ8 100K/F_6
DMN601K-7
PR106
PU5B
1
10K/F_6
PD7
5 +
7 NC_TEMP T10
4.95V 6 -
RB500V-40
LM393
For EC control thermal protection (output 3.3V)
PR107
1M/F_6
D D

PROJECT : ZR6
1A
Thermal Protection
1 2 3 4 5
5 4 3 2 1
MODEL
MODEL: REV ZR6 MB
CHANGE LIST
FROM TO
PAGE
1 1A
A First release 2 1A 3B
3 1A
B Page23:Change C209,C522,C567,C533 from CH31003MB14 to CH41002KB93
4 1A
Page10:change net name +1.8VSUS_TXLVDS-->+1.5VSUS_TXLVDS,+1.8VSUS_VCC_SM_CK-->+1.5VSUS_VCC_SM_CK
D ZR6 MB Page24:change R174 from 100k to 470K,Del R177 to slove Hall sensor issue 5 2A D
Page25:U12 No stuff and Del R248 to no stuff 6 1A

Page12:Change R543,R542,Q31 to no stuff,because ZR6 battery can't charging 7 1A
Page21:VGA ID pin R387 stuff 15k,R382 stuff 45.3K,R414 stuff 25K,R381/R415 no stuff 8 1A
Page14:MB ID pinR298 Value change to EV@,R308 Valule change to IV@ 9 3A
Page26:change L25 layout and del RN19 and change L23 layout and del RN14 10 3A
Page24:change L1 layout and del RN1 11 1A 3B
Page24:Change LCD connector(OT2) 12 1A
Page33:Mirror the PJ2 connector 13 1A
Page26:change CN19 footprint to mipci800055fb052g100pl-52p-ldv as ZG5 and Del debug card 0 ohm R518,R517,R514,R511,R510,R315,R310 14 3A
Page6:Change DD3 power OK circuit as ZK6 15 2A
Page26:Del R520,R529 and change R538,R536,R532 footprint to short pad 16 1A
Page24:U11 add pin 49 to thermal pad gnd 17 3A 3B
Page25:Change CN3 footprint to af712l-a2g1t-12p-l-zr6 18 2A
C Page32:Change CN2 footprint to 88502-260N-26P-L-ZR6 19 3A C
Page29:Change U21 footprint to trf-10-1-24p-zr6 20 1A

Page27:Change U33 footprint to tqfn48-7x7-5-49p-zr6 21 3A
Page26:Change CN8 footprint to bl123-10r-10p-l-zr6 22 1A
Page25:Change D1、D2、D3 footprint to led-ht-110nb5-3p-zr6 23 3A
Page27:Change CN18 Part Number to DFTJ06FR212 and Change CN21 Part Number to DFTJ06FR211 24 3A
Page33:Change PJ1 Part Number to DFHD08MR064 for ZR6 25 2A
Page17:Change C502 to no stuff for cost down 26 3A
Page26:Change CN8 footprint to bl123-10r-10p-l-zr6& Partumber change to DFFC10FR017 27 2A
Page2:Del RN15,RN36,RN18,RN22,RN20,RN24,RN23 for cost down &Change R252,R244,R499 to short pad 28 3A
Page4:Change C58 to No stuff 29 3A 3B
Page29:change R366,R367,R357,R358 to short pad for cost down 30 1A
Page27:change R506,R508,R535,R345 to short pad for cost down 31 3A
Page24:Del R346,R7 for cost down 32 2A
Page25:Del R218,R407 for cost down 33 2A
B
Page26:change C683,C675 to no stuff 34 2A B
Page31:Add C715 for EMI 35 2A 3B

Page31:Del C466,C467,L35 for cost down 36 2A
Page24:Add CN1 Pin33,Pin34 to GND ,Add R248,R218 for HDMI and Add L52,L53,L54,L55 for EMI 37 2A
Page10:change L38 to R037 38 2A
Page2:Add R511 for Mini_CLKREQ# pull up 39 3A 3B
Page40:change +3VSUS to +3V_S5,HWPG_1.5V to HWPG_1.8V 40
Page24:1.Del R248,R218,2.L19,L21 change to R218,R234,3.change D14,D15,R196,R197,R203,R200 vaule to stuff
Page12:Change C450,C451 to 18P
Page28:Change C19,C22 to 33P
Page21:Add MXM ACIN circuit,R177R182,Q33,Q32,R183
Page27:change R574 to no stuff and R541 to stuff
Page24:Add D44 and Del R410
Page28:change R39,R38,U4,C46 to no stuff
A Page18-23:change T65,T74,T11,T69,T68,T64,T67,T70,T73,T66,T72,T71 footprint to T3050 A
Page26:Change C629 to 100uf and C636 to no stuff

Page6:change R175 and R181 to 47K for HDMI vender request
Page24:Change R197,R200 to EV@
PROJECT : ZR6
MB Assy' P/N: 31ZR6MB0000/10/20/30/40/50/60/70 Project :ZR6 MB Document No.: Size Document Number Rev
1A
Thermal Protection
Approved by : Johnny_O Drawing by :Andy Chen DATE: 2009/03/04 Date: Monday, April 13, 2009 Sheet 41 of 42
5 4 3 2 1
5 4 3 2 1
MODEL
MODEL: REV ZR6 MB
CHANGE LIST
FROM TO
PAGE
1 1A
B Page6:change R175 and R181 to 4.7K for HDMI vender request
2 1A 3B
3 1A
C Page10:change net name +1.5VSUS_TXLVDS--> +1.8V_TXLVDS
4 1A
Page3:Del Q5,Q6,R62,R63
D ZR6 MB Page3:change Par Number from AL000780000 to AL000780003 for thermal sensor address change to 9AH 5 2A D
Page21:Del Q10,Q9,R96,R86 6 1A
Page27:R574 stuff and R541 no stuff 7 1A
Page31:R300,R301 stuff thermal sensor 8 1A
Page37:change PC65,PC67 to 150pF 9 3A
Page28:change U2 PartNumber from AL008131001 to AL008131002(LAN chip) 10 3A
Page27:change R530,R533 from 10 ohm to 5.1 ohm for headphone 11 1A 3B
Page27:change CN8 (usb) 12 pin board to board 12 1A
Page26:Change CN5 footprint to cwy027-b0g1z-2p-l,CN16(USB )footprint change to usb-c107h6-10405-l-4p-r-v-nb4 13 1A
Page30:Change CN7 footprint to 4IN1-R015-212-LM-42P-H-nb4 14 3A
Page32:PJ1 footprint change to bat-btj-08qn0b-8p-r-v-nb4 15 2A
Page32:Del R510,change Hole15 footprint from h-tc315bc433d106p2 to h-tc315bsd106p2 16 1A
Page04:change C493 to no stuff 17 3A 3B
Page27:Del T77 and Add R62 18 2A
C Page26:change Hole21 footprint to h-c236d142pt-8 19 3A C
Page24:Change D1、D2、D3 footprint to led-ht-110nb5-3p 20 1A

Page24:Change R218,R234 to shortpad 21 3A
Page26:Change R310 to shortpad 22 1A
Page10:Change R91,R307,R418,R466,R469 to shortpad 23 3A
Page29:Add C466,C467 for EMI,Add R358,R357,R366,R367 and change DGND to LAN GND 24 3A
Page26:Add C716 for EMI 25 2A
Page30:Change L34 to 0 ohm and C715 to 10P,Change R512,R525,R528,R527 to 20K 1% and Change R526,R515,R524,R522 to 47K 1% 26 3A
Page25:Change R1,R4,R10,R365,R369,R368 to 221 ohm and Change D1,D2,D3 part number 27 2A
Page14:Change R282 to no stuff 28 3A
Page28:Change R26 to no stuff 29 3A 3B
Page26:Change Hole29 part number to MBZR6005010 30 1A
Page29:Del net name LAN_LNK_LED_PWR 31 3A
32 2A
Page14:Add R583 and R315 at GPIO7 for HDMI option,change R583 to no stuff and R315 to stuff
33 2A
B
D Page24:change HDMI item to no stuff(remove this function)
34 2A B
Page12:change R225,R216,R241,R220,R219,R215,R213,R214,R228,R227 to no stuff for remove HDMI Audio

35 2A 3B
Page26:Change Hole 16 footprint as hole1
36 2A
37 2A
Page37:change PR97,PR98 to short-pad ,change PU4 OZ8116 change to OZ8111 for cost issue ,Del PC62
38 2A
E Page27:C670 change value from 1U to 4.7U ( CH5471M9907 )
39 3A 3B
Page29:change c478 from 1000p to 220p.( CH122GK1I10 )
40
Page28:change C18 from 0.1u to 1000p ( CH21006JB10),change C20 from 0.1u to 1u ( CH5102K9B06 ) ,ADD C723 0.1u ( CH41002KB93 ),ADD C720 1u ( CH5102K9B06 )
Page25:change DHP00DA1G03->DHPTME53201
Page24:add C722 ( CH6101M9905 ) to solve ISN issue
Page27:the PC beep will change Gain from -6db to -18 db , so R559 needs stuff 10k on all BOM.
Page34:change PC133 from CC7560JMZ15 to CC7560JMZ02 for cost down
Page33:change PC158,PC162 from CC73301MZB2 to CC73301MZ04 for cost down
A A
Page37:change PQ6,PQ7 from BAM700200F6 to BAM601K0003 for cost down

PROJECT : ZR6
MB Assy' P/N: 31ZR6MB0000/10/20/30/40/50/60/70 Project :ZR6 MB Document No.: Size Document Number Rev
1A
Thermal Protection
Approved by : Johnny_O Drawing by :Andy Chen DATE: 2009/03/04 Date: Monday, April 13, 2009 Sheet 42 of 42
5 4 3 2 1
www.s-manuals.com

Quanta Zr6 RC April 13 2009 Schematics

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Quanta Zr6 RC April 13 2009 Schematics

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5 4 3 2 1

EV@: STUFF FOR EXT VGA THERMAL 3/5V SYS PWR

VRAM DDRII EXT_HDMI SWITCH

Int. Quanta Computer Inc.

Clock Generator (CLK)

C642 C649 C634

C648 *10p/50V_4 FSA CLK_DREFCLK_R 13 21

From GMCH RN38

+3V Strap table

0 0 1 133Mhz R246 EV@10K_4 PCLK_PCM_R R500 IV@10K_4

CPU 1/2 (CPU)

A5 C7 R54 MISC U26 R375 54.9/F_4

R58 SYS_RST# R55 *1K_4

H_PROCHOT#_D R51 *0_4

CPU 2/2 (CPU)

DDR CLK/ CONTROL/COMPENSATION

BG45 NC_10 SDVO_CTRLDATA E36 SDVO_CTRLDATA 24 1 TSATN_EC# 31

R181 IV@4.7K_4 SDVO_CTRLCLK NC_13

A +3VSUS NC_23 HDA_SYNC A

Discrete Stuffed. (CRT)

for IV cantiga 1.02k ohm/F

M_A_DQ36 SA_DQ_35 SA_DQS#_7 M_B_DQ36 SB_DQ_35 SB_DQS#_6 M_B_DQS#7

M_A_DQ49 SA_DQ_48 SA_MA_11 M_A_A12 M_B_DQ49 SB_DQ_48 SB_MA_10 M_B_A11

Quanta Computer Inc.

AP33 VCC_SM_1 VCC_AXG_NCTF_1 W28

AM16 R80 IV@0_8 AG32

Y15 VCC_AXG_36 VCC_NCTF_42 AK25

T14 VCC_AXG_42 VCC_SM_LF2 BA37

+3V_CRT_TV_DAC R428 +3V_VCCA_CRT_DAC

Power consumption reference to Intel IV@0_6 C561 C560 C559

C344 C346 VCCA_SM_# 1.05V

Date: Monday, April 13, 2009 Sheet 10 of 42

25 SATA_RXN1 AH13 AJ7 SATA_RBIAS_PN

ICH9M REV 1.0 24.9/F_4

HD Audio R219 *EV@33_4

A PCI Express Lane Reversal Internal PU

ICH_TP3 HDA_SDOUT Description

Direct Media Interface

L<0.5",Avoid routing next to clock/high speed signals.

South Bridge Strap Pin (2/3)

PCI Express Port 0 = Default

STOP# 8 3 FRAME# GNT2# / GPIO53

SPI_MOSI Integrated TPM Enable 0 = INT TPM disable(Default)

Quanta Computer Inc.

R547 10K_4 SMB_CLK_ME

R315 10K_4 HDMI_SET

R232 10K_4 ICH_GPIO48 1 DELAY_VR_PWRGOOD 3,6,31,35

A-SMT,ID1=0 -->UMA ,ID1=1 -->Discrete 0 0 0/1 1

ICH9M(CLG) Power consumption reference to

5V VCC1_05[06] 23mA VSS[007] VSS[113]

D 2mA VCC1_5_B[01] VCC1_05[07] VSS[008] VSS[114] D

1u/10V_4 VCC1_5_A[09] VCCSUS3_3[02] VSS[069] VSS[175]

AF11 VCC1_5_A[12] AJ17 VSS[072] VSS[178] U3

B VCC1_5_A[20] VCCSUS3_3[13] VSS[083] VSS[189] B

AB6 VCC1_5_A[27] G12 VSS[095] VSS_NCTF[02] A2

.1u/10V_4 D28 ICH9M REV 1.0

3.3V R320 *short0603 VCCGLAN3_3

Quanta Computer Inc.

PC2100 DDR3 SDRAM SO-DIMM

PC2100 DDR3 SDRAM SO-DIMM

M_A_DM2 46 149 M_A_DQ41 198 167

A +SMDDR_VREF +3V +SMDDR_VTERM A

PC2100 DDR3 SDRAM SO-DIMM