OTA Analysis

Over José Amaya Amaya

Víctor Hugo Muñoz López

Description of the problem 𝑊 𝑚𝐴

𝜇𝑝 𝐶𝑜𝑥 ( ) 0.834 [ ]
𝐿 𝑝 𝑉2
The analysis consists of three parts. The first part
involves determining the specifications of the PMOS 𝜆 0.073 [𝑉 −1 ]]
transconductance operational amplifier (OTA) shown in
Figure 1. These specifications include: 𝑉𝑡ℎ𝑝 −1.59 [𝑉]

1. Gain at low and high frequencies. W/L0,1,2,6=W/Ln; W/L0a=2*W/Ln

2. Bandwidth. W/L3,4,5=W/Lp
3. Phase margin. Table I. Characteristics of the transistors.
4. Gain margin.
𝐼𝐵𝐼𝐴𝑆 33 [𝑢𝐴]
In the second part, the objective is to determine the input
signal of the OTA (amplitude and frequency) to achieve
𝑉𝐷𝐷 3.3 [𝑉]
a signal-to-noise ratio (SNR) at the output of 60 [dB]. To
accomplish this, a noise analysis of the OTA must be
conducted. 𝑉𝐶𝑀 2 [𝑉]

Table II. Bias Point

The third part of the workshop involves simulating and
verifying the results obtained theoretically.
In Table 3, the physical values of the capacitances associated
with the circuit are detailed. The capacitance Cc, also known
as compensation capacitance, serves the function of isolating
the dominant poles. These poles, located at the outputs of the
first and second stages, experience separation influenced by
the Miller effect present in the second stage.

This Miller effect phenomenon results in a reduction of input

impedance, leading to an apparent increase in input
capacitance. In other words, the presence of compensation
capacitance contributes to keeping the dominant poles
independent and well-defined, thereby preserving the stability
of the circuit.
Figure 1. Schematic OTA.
𝑍
𝑍𝑖𝑛 =
1 − 𝐴𝑣
Data Table
1 1
=
𝑊 𝑚𝐴 𝑆𝐶𝑖𝑛 𝑆𝐶𝐶 (1 − 𝐴𝑣 )
𝜇𝑛 𝐶𝑜𝑥 ( ) 1.37 [ 2 ]
𝐿 𝑛 𝑉
𝐶𝑖𝑛 = 𝐶𝐶 (1 − 𝐴𝑣 )
NMOS 𝜆 0.057 [𝑉 −1 ]
From the above equation, we can recognize that the gain 𝐴𝑣 is
𝑉𝑡ℎ𝑛 1.4 [𝑉] negative because the second stage of the OTA is comprised of
a common source, which has negative gain.
 This gain is given by:
Compensation 50 [𝑝𝐹]
Capacitor (𝐶𝐶 ) 𝑉𝑜𝑢𝑡
𝐴𝑣 = = 𝐴𝑣1 ∗ 𝐴𝑣2
5 [𝑝𝐹] 𝑉𝑖𝑛𝑑𝑖𝑓
Load Capacitor (𝐶𝐿 ) The gain of an active load differential pair amplifier is given
Table 3. Capacitance Values by [1]:
𝐴𝑣1 = −𝐺𝑀 𝑅𝑜𝑢𝑡
From this operating point, we can obtain transistor parameters Where 𝐺𝑀 is the equivalent transconductance of the active
such as transconductance (gm) and dynamic resistance. (ro).
load differential pair, which is found by the ratio [2]:
1
𝑟𝑜 =
𝜆𝐼𝐷
𝑟𝑜0 = 𝑟𝑜1 = 𝑟𝑜2 = 𝑟𝑜6 = 531.63 [𝑘Ω]
𝑟𝑜3 = 𝑟𝑜4 = 𝑟𝑜5 = 415.11 [𝑘Ω]
𝑟𝑜𝑎 = 265.815 [𝑘Ω]

𝑊
𝑔𝑚 = √2𝜇𝐶𝑜𝑥 𝐼
𝐿 𝐷
𝑔𝑚0 = 𝑔𝑚1 = 𝑔𝑚2 = 𝑔𝑚6 = 300.699 [𝜇𝐴/𝑉 ]
𝑔𝑚3 = 𝑔𝑚4 = 𝑔𝑚5 = 234.61 [𝜇𝐴/𝑉 ]
𝑔𝑚𝑎 = 425.25 [𝜇𝐴/𝑉 ]

First Part
Figure 3. Determination of the equivalent transconductance of the
Determine the specifications of the transconductance OTA.
operational amplifier. (OTA) 𝐼𝑜𝑢𝑡
𝐺𝑀 =
1. Gain at low and high frequencies: 𝑉𝑖𝑛𝑑𝑖𝑓

By finding the short-circuit output current, grounding the

output and summing the currents at that node, it was
determined that:
𝑉𝑖𝑛 𝑉𝑖𝑛
𝑖𝑜 = −𝑔𝑚 − 𝑔𝑚
2 2
𝑖𝑜
= −𝑔𝑚
𝑉𝑖𝑛

The equivalent transconductance is approximately:

𝐺𝑀 ≈ −𝑔𝑚

Additionally, the output impedance of the active load

Figure 2. Schematic OTA.
• Gain at low frequencies:
The low-frequency gain is composed of the product of the
gains of the two stages, the active load differential pair, and
the common source that provides the OTA's output voltage.
differential pair was determined to be given by:
𝑅𝑜𝑢𝑡 ≈ 𝑟𝑜3,4 ∥ 𝑟𝑜1,2
So, the gain of the active load amplifier is given by:
𝐴𝑣1 = −𝐺𝑚 𝑅𝑜𝑢𝑡 ≈ 𝑔𝑚1,2 (𝑟𝑜3,4 ∥ 𝑟𝑜1,2 )
And the gain of the common source at the output is given by:
 𝐴𝑣2 = −𝑔𝑚5 (𝑟𝑜5 ∥ 𝑟𝑜6 )

So, the gain of the OTA at low frequencies is given by:

𝐴𝐿𝐹 = 𝐴𝑣1 𝐴𝑣2 = −𝑔𝑚1,2 𝑔𝑚5 (𝑟𝑜3,4 ∥ 𝑟𝑜1,2 )(𝑟𝑜5 ∥ 𝑟𝑜6 )

𝑽𝒐𝒖𝒕
𝐴𝐿𝐹 = −3833.2[𝑉/𝑉 ]
𝐴𝐿𝐹 = 71.67[𝑑𝐵 ]

• Mid-band Gain:

Due to the fact that the capacitor behaves like a short circuit at
high frequencies, the following equivalent circuit is obtained, Figure 5. Equivalent schematic for determining high-frequency gain
of the OTA.
as shown in Figure 3. The gain at high frequencies is given
by:
1 𝑔𝑚1,2 For N=2, this parameter corresponds to the number of energy-
𝐴𝐻𝐿 = 𝑔𝑚1,2 (𝑟𝑜1,2 ∥ 𝑟𝑜3,4 ∥ 𝑟𝑜5 ∥ 𝑟𝑜6 ∥ )≈ storing elements, in this case, capacitors Cc and CL.
𝑔𝑚5 𝑔𝑚5
Assuming a transfer function for the Vout/Io1 ratio in the
𝐴𝐻𝐿 = 1.2364[𝑉/𝑉] form:
𝐴𝐻𝐿 = 1.84[𝑑𝐵] 𝑎0 + 𝑎1 𝑠 + 𝑎2 𝑠 2
𝐻(𝑠) =
𝑏0 + 𝑏1 𝑠 + 𝑏2 𝑠 2

The time constants and transfer constants of the circuit were

determined to find the coefficients 𝑎𝑛 and 𝑏𝑛 for the
numerator and denominator, respectively.

𝑎0 = 𝐻0
𝑎1 = 𝜏10 𝐻1 + 𝜏20 𝐻2
𝑎2 = 𝜏10 𝜏21 𝐻12

𝑏0 = 1
𝑏1 = 𝜏10 + 𝜏20
𝑏2 = 𝜏10 𝜏21

Figure 4. Equivalent Schematic of OTA in Mid-Band. 𝐻0 = −𝑔𝑚5 (𝑟𝑜2 ∥ 𝑟𝑜4 )(𝑟𝑜5 ∥ 𝑟𝑜6 ) = 12.7477 [𝑀Ω]
𝐻1 = 0
(𝑟𝑜2 ∥ 𝑟𝑜4 ) ∥ (𝑟𝑜5 ∥ 𝑟𝑜6 )
• Gain at high frequencies: 𝐻2 = = 4.112 [𝑘Ω]
1 + 𝑔𝑚5 (𝑟𝑜2 ∥ 𝑟𝑜4 ) ∥ (𝑟𝑜5 ∥ 𝑟𝑜6 )
To determine the gain at high frequencies of the 𝐻12 = 0
transconductance operational amplifier (OTA), the
following small-signal equivalent circuit was created. 𝜏10 = 𝐶𝐿 (𝑟𝑜5 ∥ 𝑟𝑜6 ) = 1.1655 [𝜇𝑠]
This allowed the determination of the amplifier's transfer 𝜏20 = 𝐶𝐶 [(𝑟𝑜2 ∥ 𝑟𝑜4 ) + (𝑟𝑜5 ∥ 𝑟𝑜6 ) + 𝑔𝑚5 (𝑟𝑜2 ∥ 𝑟𝑜4 )(𝑟𝑜5 ∥ 𝑟𝑜6 )]
function using the Hajimiri method [3], to find the poles = 660.69 [𝜇𝑠]
and zeros of the amplifier by determining the time 𝜏21 = 𝐶𝐶 (𝑟𝑜2 ∥ 𝑟𝑜4 ) = 11.6549 [𝜇𝑠]
constants and transfer constants of the circuit.
So, the transfer function Vout/Io1 is given by:

12.7477𝑀 + 2.7167𝑠
𝐻(𝑠) =
1 + 661.85𝜇 𝑠 + 13.5837𝑝 𝑠 2

The poles and zero of the OTA were determined by factoring

the transfer function, resulting in a value of: 4. Gain Margin:

𝜔𝑧 = −4.6923 [𝑀𝑟𝑎𝑑/𝑠] For gain margin, the goal is to determine the frequency at
𝜔𝑝1 = −1.5109 [𝑘𝑟𝑎𝑑/𝑠] which the phase crosses -180° to ascertain the gain at that
𝜔𝑝2 = −48.7223 [𝑀𝑟𝑎𝑑/𝑠] frequency and calculate the gain margin.

𝜔𝑓 𝜔𝑓
So, the high-frequency gain is given by: ∠𝐴(𝑗𝜔) = − [tan−1 ( ) + tan−1 ( )
4.6923𝑀 1.5109𝑘
𝜔𝑓
𝑠 + tan−1 ( )] = −180°
3833.2 (1 − ) 48.7223𝑀
𝐴𝑣 (𝑠) = 4.6923𝑀
𝑠 𝑠
(1 + ) (1 + ) 𝜔𝑓 = 15.1223 [𝑀𝑟𝑎𝑑/𝑠]
1.5109𝑘 48.7223𝑀
𝑓𝑓 = 2.4067 [𝑀𝐻𝑧]
2. Bandwidth (BW):
The gain at the phase crossover frequency of -180° is given
Assuming the bandwidth of the OTA as the frequency of the by:
first pole, the following bandwidth in Hertz for the amplifier 𝜔𝑓 2
was obtained. 3833.2√1 + ( )
4.6923𝑀
𝜔𝑝 |𝐴(𝑗𝜔)| =
𝐵𝑊 = 1 = 240.47 [𝐻𝑧] 𝜔𝑓 2 𝜔𝑓 2
2𝜋 √[1 + ( ) ] [1 + ( ) ]
1.5109𝑘 48.7223𝑀
3. Phase Margin: |𝐴(𝑗𝜔)| = 1.23429 [𝑉/𝑉]
𝑠 |𝐴(𝑗𝜔)| = 1.8263 [𝑑𝐵]
3833.2 (1 − )
𝐴(𝑠) = 4.6923𝑀
𝑠 𝑠
(1 + ) (1 + ) Resulting in a gain margin of -1.8263 dB, indicating system
1.5109𝑘 48.7223𝑀
instability despite the applied compensation.
For the phase margin, the goal is to determine the frequency at
which the gain crosses 1, in order to determine the phase at 𝐺𝑀 = −1.8263 [𝑑𝐵]
that frequency.
Second Part
𝜔𝑔 2
3833.2√1 + ( ) In this second part of the work, the input signal of the OTA
4.6923𝑀
|𝐴(𝑗𝜔)| = =1 (amplitude and frequency) was determined to achieve a signal-
𝜔𝑔 2 𝜔𝑔 2
√[1 + ( ) ] [1 + ( ) ] to-noise ratio (SNR) at the output of 60 [dB]. For this, a noise
1.5109𝑘 48.7223𝑀 analysis at the output of the OTA must be performed.

𝜔𝑔 = 36.1088 [𝑀𝑟𝑎𝑑/𝑠] Various sources of noise affecting the OTA output were
𝑓𝑔 = 5.7469 [𝑀𝐻𝑧] identified (see Figure 5). These are attributed to the thermal
noise of each transistor in the amplifier. For this analysis,
flicker noise was ignored.
The phase at the crossover frequency of 0 dB is given by:

𝜔𝑔 𝜔𝑔
∠𝐴(𝑗𝜔) = − [tan−1 ( ) + tan−1 ( )
4.6923𝑀 1.5109𝑘
𝜔𝑔
+ tan−1 ( )]
48.7223𝑀

∠𝐴(𝑗𝜔) = −211.01°

Resulting in a phase margin of -31°, indicating system

instability despite the compensation applied.

𝑃𝑀 = 180° − 211.01° = −31°

Figure 6. Noise Sources in the OTA.
By determining the short-circuit output current noise of the
active load pair stage, the noise contribution to the output of
 ∞
this stage can be obtained. This is done by multiplying it by 1
the 𝑅𝑜𝑢𝑡 2 of the respective stage. Then, by multiplying it by 𝑉𝑛2𝑜𝑢𝑡𝑅𝑀𝑆 = ̅̅̅̅̅̅
𝑉𝑛2𝑜𝑢𝑡 ∫ 𝑑𝑓
the square of the common-source gain, the noise voltage at the 2𝜋𝑓 2
0 (1 + ( ) )
output of the transistors in this stage is determined using 1.5109𝑘
Razavi's lemma [1]. Finally, the noise at the output due to
transistors M5 and M6 forming the common source is 1.9202𝑛 𝜋
𝑉𝑛2𝑜𝑢𝑡𝑅𝑀𝑆 = ∗
determined by summing their spectral densities and 2𝜋 2
multiplying by the OTA's output impedance. The noise from 1.5109𝑘
current mirrors, being insignificant compared to other noise
sources, was omitted for simplicity in the analysis. 𝑉𝑛2𝑜𝑢𝑡𝑅𝑀𝑆 = 725.30 [𝑛𝑉]

By setting the desired signal-to-noise ratio, the amplitude of

the input signal was determined to achieve a 60 dB SNR. This
is considering that the RMS value of the noise at the amplifier
output is 851.96 nV.
𝐴2
𝑉2𝑠𝑜𝑢𝑡𝑅𝑀𝑆 ∗ |𝐴𝐿𝐹 |2
𝑆𝑁𝑅 = 10 log ( ) = 10 log ( 2 )
𝑉2𝑛𝑜𝑢𝑡𝑅𝑀𝑆 𝑉2𝑛𝑜𝑢𝑡𝑅𝑀𝑆

𝐴2
∗ |3833.2|2
𝑆𝑁𝑅 = 10 log ( 2 ) = 60 [𝑑𝐵]
725.30𝑛

𝐴 = 314.2 [𝑚𝑉]

Third Part
Figure 7. Assumed Noise Sources in the OTA.
̅̅̅̅̅
𝐼𝑛2𝑜1 = ̅̅̅̅̅̅̅
𝐼𝑛2𝑜𝑢𝑡1 = 4𝑘𝑇𝛾(2𝑔𝑚2 + 2𝑔𝑚4 ) Simulation and Verification of Theoretically Obtained Results.
In Figure 6, the simulation circuit of the proposed OTA can be
The spectral noise density at the output is given by: observed.

2 2 2
4𝑘𝑇𝛾 [(2𝑔𝑚2 + 2𝑔𝑚4 )(𝑟𝑜2 ∥ 𝑟𝑜4 ) (𝑔𝑚5 (𝑟𝑜5 ∥ 𝑟𝑜6 )) + (𝑔𝑚5 + 𝑔𝑚6 )(𝑟𝑜6 ∥ 𝑟𝑜5 ) ]
̅̅̅̅̅̅
𝑉𝑛2𝑜𝑢𝑡 =
𝜔 2
[1 + ( ) ]
1.5109𝑘

Resulting in a spectral noise density at the output at low

frequencies of:
𝑛𝑉 2
̅̅̅̅̅̅
𝑉𝑛2𝑜𝑢𝑡 = 1.9202 [ ]
𝐻𝑧
𝜇𝑉
𝑉𝑛𝑜𝑢𝑡 = 43.82 [ ]
√𝐻𝑧
Figure 8. OTA Simulation in LTspice.
The RMS value of the squared noise signal was calculated,
thus achieving a signal-to-noise ratio of 60 dB for an input
source amplitude determined based on the considerations 1. Gain at low and high frequencies
mentioned earlier.
∞
̅̅̅̅̅̅
𝑉 2
𝑛𝑜𝑢𝑡
Gain at low frequencies:
2
𝑉𝑛𝑜𝑢𝑡𝑅𝑀𝑆 = ∫ 𝑑𝑓 For the low-frequency gain, the following Bode plot was
2𝜋𝑓 2 obtained, where the gain value in the flat band was measured:
0 (1 + ( ) )
𝜔𝑝1
 𝑨𝑴𝑩 = 𝟏. 𝟐𝟑𝟔𝟒[𝑽/𝑽]
𝑨𝑴𝑩 = 𝟏. 𝟖𝟒[𝒅𝑩]

2. Bandwidth

To measure the bandwidth of the circuit, the first pole was

assumed, resulting in a bandwidth of 263.026 Hz.

Figure 9. OTA Gain.

Thus, obtaining a gain value of 70.6355 dB, which is very

close to the theoretically calculated value. This small
difference is attributed to the use of a level 7 transistor model
in the simulation, which is more advanced than the
theoretically calculated values.

Figure 10. Bandwidth OTA.

𝐴𝐿𝐹 = 𝐴𝑣1 𝐴𝑣2 = 3833.2 [𝑉/𝑉 ]

𝐴𝐿𝐹 = 71.67 [𝑑𝐵 ]
𝜔𝑝1
𝐵𝑊 = = 240.47 [𝐻𝑧]
Gain at high frequencies: 2𝜋

The gain at high frequencies was obtained. The zero and the
second pole were then compared to the measured values on the 3. Phase Margin
Bode plot of the simulation. The gain value in the midband
was also compared. The phase margin in the simulation gives a value of
approximately -26.95°, a value not too far from the theoretical
𝒔 value. found
𝟑𝟖𝟑𝟑. 𝟐 (𝟏 − )
𝑨𝑯𝑭 (𝒔) = 𝟒. 𝟔𝟗𝟐𝟑𝑴
𝒔 𝒔
(𝟏 + ) (𝟏 + )
𝟏. 𝟓𝟏𝟎𝟗𝒌 𝟒𝟖. 𝟕𝟐𝟐𝟑𝑴

Figure 11. Phase Margin OTA.

 Figure 13. Noise spectral density at the output of the OTA.

𝑷𝑴 = 𝟏𝟖𝟎° − 𝟐𝟏𝟏. 𝟎𝟏° = −𝟑𝟏° The noise value in the flat band is very close to the value
found in the theoretical analysis.
4. Gain Margin

The gain margin obtained by simulation is -1.41235 dB, a

value very close to the theoretical value, due to the use of a
level 7 simulation and a simplified analysis.

𝑛𝑉 2
̅̅̅̅̅̅
𝑉𝑛2𝑜𝑢𝑡 = 1.9216 [ ]
𝐻𝑧
𝜇𝑉
𝑉𝑛𝑜𝑢𝑡 = 43.836 [ ]
√𝐻𝑧

Finally, the RMS value of the noise at the output was

measured, giving a value of 919.68 uV.
Figure 12. Gain Margin OTA.

𝑉𝑛2𝑜𝑢𝑡𝑅𝑀𝑆 = 725.85 [𝑛𝑉]

𝑉𝑛𝑜𝑢𝑡𝑅𝑀𝑆 = 851.97 [𝜇𝑉]
𝐴 = 314.323 [𝑚𝑉]

Therefore, with the designed amplitude value, a SNR of 59.99

dB is obtained, thus meeting the desired specification.

𝑀𝐺 = −1.8263 [𝑑𝐵] 𝟑𝟏𝟒. 𝟐𝒎

∗ 𝟑𝟖𝟑𝟑. 𝟐
( √𝟐 )
Noise Analysis and SNR 𝑺𝑵𝑹 = 𝟏𝟎 𝐥𝐨𝐠 𝟖𝟓𝟏. 𝟗𝟕𝝁

After carrying out a noise simulation in LTspice, the following = 𝟓𝟗. 𝟗𝟗 [𝒅𝑩]
noise spectral density was obtained at the output:
An amplitude of 314.2 mV is needed to have a SNR of 60 dB, but
this amplitude causes the output to saturate, due to the high gain of
the OTA, since we have 3.3V on the power supply.
 Table III. Comparison of measurements
Measure Theoretical Simulation
Low-frequency gain. 71.67 dB 70.63 [dB]
Bandwidth 240.47 Hz 263.02 Hz
Phase Margin -31.0° -26.95°
Gain Margin -1.8263 dB 1.41 dB
𝑉𝑛𝑜𝑢𝑡𝑅𝑀𝑆 851.97 [𝜇𝑉] 919.68 [µV]

Table VI, Design values for SNR = 60 [dB]

Design Value
Amplitude 314.2 [mV]
Frequency 50 Hz

Theoretical values have a negligible associated error

compared to those obtained in simulation, this percentage is
since a level 7 model is used in simulation, and a level 1
model is used theoretically.

References

[1] B. Razavi, Design Analog CMOS Integrated

Circuits, Penn Plaza,New York: Mc Graw Hill
Education, 2017.

[2] D. R. H. Phillip E. Allen, CMOS Analog Circuit

Design, New York Oxford: OXFORD
UNIVERSITY PRESS, 2012.

[3] A. Hajimiri, «Generalized Time- and Transfer-

Constant Circuit Analysis,» IEEE Transactions on
Circuits and Systems I: Regular Papers, vol. vol. 57,
nº no. 6, pp. pp. 1105-1121, June 2010.