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A B C D E
1 1
Compal Confidential
2
Q5WV8 Schematics Document 2
AMD "Comal" Platform
AMD Trinity APU / Hudson M3 FCH / ATI Thames XT
3 3
2012-01-05A
LA-8331P REV: 0.4
4 4
Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2011/07/08 Deciphered Date 2015/07/08 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC,MB A8331
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4019H2
Date: Wednesday, February 29, 2012 Sheet 1 of 52
A B C D E
A B C D E
Compal Confidential
Model Name : Q5WV8
1
VRAM 1G/2G 1
64M16/128M16 x 8
page 18, 19
R03 Resverd
Thermal Sensor ATI Vancuver

DDR3 AMD Comal
PCIe x 16 Gen2
ADM1032 Thames XT 128Bit DDR3
page 14
uFCBGA-962 AMD FS1R2 APU Memory BUS(DDR3)
DP2 204pin DDRIII-SO-DIMM X2
Page 13~17 APU HDMI Dual Channel
HDMI LVDS VGA (UMA / Muxless) Trinity BANK 0, 1, 2, 3 Page 11,12
1.5V DDRIII 800~1866MHz
(DIS Only) (DIS Only) (DIS Only) DP0
uPGA-722 Package
HDMI Conn.
page 23
LVDS DP1 Page 6~10
2 Translator DP x 4 2
LVDS Conn. P_GPP x 3
page 22 RTD2132S GEN1 (DP1 TXP/N 0~4) UMI
page 21
ML for FCH VGA USB20 USB20 USB30 CMOS Bluetooth Mini Mini
eDP Panel UMA eDP M/B*1 Sub/B*2 M/B*1 Camera Conn.
Card 1 Card 2
page 22
page 36 page 36 page 36 page 22 page 36 page 34 page 34
CRT Conn. FCH CRT (VGA DAC) Port 10 Port 0 Port 0 Port 5 Port 7 Port 8 Port 9
page 24 FCH USB
(USB3.0) Port 1 (USB3.0)
3.3V 48MHz
GPP3 GPP2 GPP1 GPP0

Hudson-M2/M3
HD Audio 3.3V 24.576MHz/48Mhz
uFCBGA-656
Card Reader MINI Card 2 MINI Card 1 LAN(GbE) SATA Gen2
Realtek (Option) (Wireless LAN) Atheros Page 25~29
RTS5209 page 31 page 34 page 34
AR8151 page 32
GPP0 port 0 port 1
3
LPC BUS 3
GEN2
SATA HDD1 ODD HDA Codec
Transformer / RJ45
page 33 Conn. Conn. ALC271X VB6
page 30 page 30
ALC281X page 38
LED
page 39
ENE
KB930/KB9012
page 38
RTC CKT. USB30
page 25
Fresco FL1009 Touch Pad Int.KBD
On M/B page 35 page 39 page 39
Power On/Off CKT. Sub board
page 37
LID SW - Power/B
page 39
Fan Control
4
page 30 4
USB20/B
BIOS ROM
DC/DC -USB20 x2 page 36
Interface CKT.page SYS BIOS (4M)
41 page 26 Security Classification Compal Secret Data Compal Electronics, Inc.
USB30/B Issued Date 2011/07/08 Deciphered Date 2015/07/08 Title
-USB20 x1+ USB30 x1 SCHEMATIC,MB A8331

Power Circuit EC BIOS (128K) THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
B
Document Number Rev
B
page 42~51 page 36 page 39 DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 4019H2
A B C D E
5 4 3 2 1
CLOCK DISTRIBUTION DISPLAY DISTRIBUTION

: LVDS PATH
, : eDP PATH
: APU HDMI PATH
LVDS CONN
B_SODIMM
A_SODIMM
D : VGA HDMI PATH D
TXOUT[0:2]+/- TXOUT[1:2]+/-
TXCLK+/- I2CC_SCL/DA
TZOUT[0:2]+/-
TZCLK+/-
I2CC_SCL/DA TXOUT[1:2]+/-
AMD R
I2CC_SCL/DA
TXOUT[0:2]+/- TZOUT[0:2]+/-
ATI VGA TXCLK+/- TZCLK+/-
I2CC_SCL/DA
MEM_MB_CLK7_P/N
MEM_MB_CLK1_P/N
MEM_MA_CLK7_P/N
MEM_MA_CLK1_P/N
1066~1866MHz
1066~1866MHz
Whistler/Seymour/Thames
APU_TXOUT[0:2]+/-
C
APU_TXOUT[1:2]+/-
R R
APU_TXOUT_CLK+/-
APU_TZOUT[0:2]+/- APU_LVDS_CLK/DATA
CLK_PEG_VGAP/N
APU_TZOUT_CLK+/-
100MHz APU_LVDS_CLK/DATA
Place near
the pin
C
APU_DISP_CLKP/N
C AMD 100MHz AMD LVDS_OUT C
RTD2132 DP0_TXP/N[0:1]_R VGA_TXOUT[1:2]+/-

CPU FS1 SOCKET
FCH DP_IN
DP0_AUXP/N_R VGA_LCD_CLK/DATA
APU_CLKP/N Hudson-M2/M3 VGA_TXOUT[0:2]+/- VGA_TZOUT[0:2]+/-
VGA_TXCLK+/- VGA_TZCLK+/-
100MHz Internal CLK GEN R
VGA_LCD_CLK/DATA
Place near
the pin
DP0_AUX GPP_CLK
100MHz
LVDS Transtator 32.768KHz 25MHz

R
C
DP0_TXP/N[0:1]
DP0_AUXP/N
B
GPP4 GPP3 GPP2 GPP1 GPP0 DP0 DPE DPF B
WLAN WLAN PCIE_GFX[0:11] C

USB30 M/B USB30 SUS/B
OPT PCI Socket Mini PCI Socket
GbE LAN APU C
VGA
PCIE_GFX[12:15] PCIE_GFX[0:15]
DP1 R DAC1 DPA
25MHz
FCH
R R
R R
A A
CRT CONN HDMI CONN

SCHEMATIC,MB A8331
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 4019H2 B
5 4 3 2 1
A B C D E
ZZZ ZZZ2 ZZZ3
Voltage Rails
SIGNAL
Power Plane Description S1 S3 S5 STATE SLP_S1# SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock
PCB X76 X76
Part Number = DA60000QV00 Part Number = X76356BOL02 Part Number = X76356BOL03
VIN Adapter power supply (19V) N/A N/A N/A Full ON HIGH HIGH HIGH HIGH ON ON ON ON PCB 0OH LA-8331P REV0 M/B TMSSAM2G@ SEYHYN1G@
B+ AC or battery power rail for power circuit. N/A N/A N/A ZZZ1 ZZZ4
S1(Power On Suspend) LOW HIGH HIGH HIGH ON ON ON LOW
+CPU_CORE Core voltage for CPU ON OFF OFF
1
+CPU_CORE_NB Voltage for On-die VGA of APU ON OFF OFF S3 (Suspend to RAM) LOW LOW HIGH HIGH ON ON OFF OFF 1
+VGA_CORE 0.95-1.2V switched power rail ON OFF OFF X76 X76

S4 (Suspend to Disk) LOW LOW LOW HIGH ON OFF OFF OFF Part Number = X76356BOL01 Part Number = X76356BOL04
+VDDCI 0.95-1.2V switched power rail ON OFF OFF TMSHYN2G@ SEYSAM1G@
+0.75VS 0.75V switched power rail for DDR terminator ON ON OFF S5 (Soft OFF) LOW LOW LOW LOW ON OFF OFF OFF
+1.0VSG 1.0V switched power rail for VGA ON OFF OFF
+1.1ALW 1.1V switched power rail for FCH ON ON ON* Board ID / SKU ID Table for AD channel
+1.1VS 1.1V switched power rail for FCH ON OFF OFF Vcc 3.3V +/- 5%
+1.2VS 1.2V switched power rail for APU ON OFF OFF Ra/Rc/Re 100K +/- 5% BOARD ID Table
+1.5V 1.5V power rail for CPU VDDIO and DDR ON ON OFF Board ID Rb / Rd / Rf V AD_BID min V AD_BID typ V AD_BID max Board ID PCB Revision
+1.5VS 1.5V switched power rail ON OFF OFF 0 0 0 V 0 V 0 V 0 EVT
+1.8VSG 1.8V switched power rail ON OFF OFF 1 8.2K +/- 5% 0.216 V 0.250 V 0.289 V 1 EVT2
+2.5VS 2.5V for CPU_VDDA ON OFF OFF 2 18K +/- 5% 0.436 V 0.503 V 0.538 V 2 DVT
+3VALW 3.3V always on power rail ON ON ON* 3 33K +/- 5% 0.712 V 0.819 V 0.875 V 3
+3V_LAN 3.3V power rail for LAN ON ON ON 4 56K +/- 5% 1.036 V 1.185 V 1.264 V 4
+3VS 3.3V switched power rail ON OFF OFF 5 100K +/- 5% 1.453 V 1.650 V 1.759 V 5
+5VALW 5V always on power rail ON ON ON* 6 200K +/- 5% 1.935 V 2.200 V 2.341 V 6
2
+5VS 5V switched power rail ON OFF OFF 7 NC 2.500 V 3.300 V 3.300 V 7 2
+VSB VSB always on power rail ON ON ON*

+RTCVCC RTC power ON ON ON
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF. BOM Option Table BOM Config
BOM UMA Thames EVT2 DVT DVT DVT DVT DVT
Structure Description UMA UMA-LVDS UMA-eDP PX5 PX5 PX5
1G-LVDS 1G-eDP 2G-LVDS
M2@ Use Hudson-M2 V
M3@ Use Hudson-M3 V V V V V V V
930@ Use EC 930 V V
9012@ Use EC 9012 V V V V V V
UMA@ Display output from APU (UMA only or PX) V V V V V V V V
x = 1 is read cmd, x= 0 is writee cmd. DISO@ Display output from VGA (DIS only)
VGALVDS@ VGA output LVDS (DIS only)
External PCI Devices
Device IDSEL# REQ#/GNT# Interrupts VGA@ Use VGA (PX or DIS only) V V V V
THA@ VGA: Thames V V V V
3 3
SEY@ VGA: Seymour
128@ Use VRAM channel A&B V V V V
PX@ PX function V V V V
BACO@ BACO function (PX4.0) V
NOBACO@ Without BACO function (DISO and PX5.0) V V V
EC SM Bus1 address EC SM Bus2 address

TL@ LVDS Translator (for LVDS) V V V V V V
Device Address HEX Device Address HEX EDP@ Use eDP Panel V V
Smart Battery 0001 011X b 16H ADI ADM1032 (VGA) 1001 101X b 9AH APUEDP@ APU output eDP V V
SB-TSI (APU) 1001 100X b 98H VGAEDP@ VGA output eDP (DIS only)
LVDS TR( RTD-2132S) 1010 100X b A8H 271@ Realtek ALC271x VB6 V V V V V V V V
VGA Internal Thermal 1000 001X b 82H 281@ Realtek ALC281x
ZERO@ ZERO Power ODD function
FL@ Fresco FL1009 USB3.0 Controller V
8151@ LAN Atheros AR8151 10/100/1000M LAN V V V V V V
FCH FCH
8152@ LAN Atheros AR8152 10/100M LAN
4 SM Bus 0 address SM Bus 1 address X76@ VRAM ID Table (Load By X76J) 4
Device Address HEX Device Address HEX CONN@ Connector (Control by ME)
DDR DIMM1 1101 000X b 90
DDR DIMM2 1101 001X b 94
SCHEMATIC,MB A8331
B B
4019H2
A B C D E
5 4 3 2 1
AMD APU FS1R2

BATTERY BATT+ PU21 PU27 +CPU_CORE
+CPU_CORE 0.7~1.475V VDD CORE 60A
12.6V CHARGER ISL6277HRTZ-T +CPU_CORE_NB
BQ24725RGRR +CPU_CORE_NB 0.7~1.475V VDDNB 37A
PU25 +2.5VS +2.5VS VDDA 750mA
APL5508 +1.5V +1.5V VDDIO 3.2A
PU19 +1.2VS
AC ADAPTOR VIN +1.2VS +1.2VS VDDR 8.5A
D RT8209MGQW D
19V 90W
RAM DDRIII SODIMMX2

+1.5V +1.5V +1.5V
PU26 +1.5V VDD_MEM 4A
RT8207MZQW +0.75VS
B+ +0.75VS +0.75VS VTT_MEM 0.5A
VGA ATI
+VGA_CORE Whistler/Seymour/Granville
PU10 +VGA_CORE
TPS51218DSCR 0.85~1.1V VDDC 47A
PU7
+VDDCI 0.9~1.0V VDDCI 4.6A
SY8033BDBC U41
AO4430L PU24 +1.0VSG DPLL_VDDC: 125 mA
PU20 +1.5VSG SPV10: 120 mA
APL5930 +1.0VSG
TPS51212DSCR PCIE_VDDC: 2000 mA
DP[A:E]_VDD10: 680 mA
VRAM 512/1GB/2GB
+1.5VSG
+1.5VSG VDDR1: 3400 mA 64M / 128Mx16 * 4 / 8
PU5 +1.1VALW
RT8209MGQW PLL_PVDD: 75 mA +1.5VSG 2.4 A
TSVDD: 20 mA
AVDD: 70 mA
C VDD1DI: 100 mA C
VDD2DI: 50 mA
A2VDDQ: 1.5 mA
PU2 +3VALW
U40 PU23 VDD_CT: 110 mA
RT8205EGQW +1.8VSG +1.8VSG VDDR4: 170 mA
+5VALW SI4800 SY8033BDBC
PCIE_PVDD: 40 mA
MPV18: 150 mA
SPV18: 75 mA
+3VS
PCIE_VDDR: 400 mA
DP[A:F]_VDD18: 920 mA
DP[A:F]_PVDD: 120 mA
+INVPWR_B+
+3VS Q98
+3VSG A2VDD: 130 mA
AP2301GN +3VSG
U38 VDDR3: 60 mA
SI4800
LCD panel +5VS FCH AMD Hudson M2/M3

15.6"
VDDPL_11_DAC: 7 mA
VDDAN_11_ML: 226 mA
B+ 300mA U39 VDDCR_11: 1007 mA
AO4430L +1.1VS +1.1VS +1.1VS
+3.3 350mA VDDAN_11_CLK: 340 mA
VDDAN_11_PCIE: 1088 mA
VDDAN_11_SATA: 1337 mA
+5VS VDDAN_11_USB_S: 140 mA

FAN Control VDDCR_11_USB_S: 197 mA
+1.1VALW
B APL5607 VDDAN_11_SSUSB_S: 282 mA B
+1.1VALW
Q63 VDDCR_11_SSUSB_S: 424 mA
AP2301 VDDCR_11_S: 187 mA
+5VS 500mA VDDPL_11_SYS: 70 mA
U54 +5VALW VDDIO_33_PCIGP: 131 mA

TPA2301DRG4 VDDPL_33_SYS: 47 mA
+USB_VCCA
VDDPL_33_DAC: 20 mA
+3VS VDDPL_33_ML: 20 mA
+3VS +3VS VDDAN_33_DAC: 200 mA
VDDPL_33_PCIE: 43 mA
USB X2 VDDPL_33_SATA: 93 mA
+1.5VS
VDDIO_AZ_S: 26 mA
+5V
Dual+1
2.5A +3VALW VDDPL_33_SSUSB_S: 20 mA
+3VALW VDDPL_33_USB_S: 17 mA
VDDAN_33_USB_S: 658 mA
+3VALW
VDDIO_33_S: 59 mA
VDDXL_33_S: 5 mA
SATA Audio Codec Card reader EC LAN VDDAN_33_HWM_S: 12 mA
HDD*1 ALC271X RTS5209 ENE KB9012 A13 Atheros AR8151 Mini Card
ODD*1
VDDIO_33_GBE_S
+5V 3A +5V 45mA +3.3VALW 30mA +3.3VALW 201mA +1.5VS 500mA VDDCR_11_GBE_S
+3.3VS +3.3VS 3mA +3.3VS 1A GND VDDIO_GBE_S
+3.3V +3.3VS 25mA +3.3VALW 330mA
RTC
A
Bettary RTC BAT VDDBT_RTC_G A

SCHEMATIC,MB A8331
Custom B
4019H2
5 4 3 2 1
A B C D E
<13> PCIE_GTX_C_FRX_P[0..15] PCIE_FTX_C_GRX_P[0..15] <13>
<13> PCIE_GTX_C_FRX_N[0..15] PCIE_FTX_C_GRX_N[0..15] <13>
JCPU1A
PCI EXPRESS
PCIE_GTX_C_FRX_P0 AB8 AB2 PCIE_FTX_GRX_P0 C917 VGA@ 1 2 .1U_0402_16V7K PCIE_FTX_C_GRX_P0
PCIE_GTX_C_FRX_N0 P_GFX_RXP0 P_GFX_TXP0 PCIE_FTX_GRX_N0 C918 VGA@ .1U_0402_16V7K PCIE_FTX_C_GRX_N0
AB7 P_GFX_RXN0 P_GFX_TXN0 AB1 1 2
1 PCIE_GTX_C_FRX_P1 PCIE_FTX_GRX_P1 C919 VGA@ .1U_0402_16V7K PCIE_FTX_C_GRX_P1 1
AA9 P_GFX_RXP1 P_GFX_TXP1 AA3 1 2
PCIE_GTX_C_FRX_N1 AA8 AA2 PCIE_FTX_GRX_N1 C920 VGA@ 1 2 .1U_0402_16V7K PCIE_FTX_C_GRX_N1
PCIE_GTX_C_FRX_P2 P_GFX_RXN1 P_GFX_TXN1 PCIE_FTX_GRX_P2 C921 VGA@ .1U_0402_16V7K PCIE_FTX_C_GRX_P2
AA5 P_GFX_RXP2 P_GFX_TXP2 Y5 1 2
PCIE_GTX_C_FRX_N2 AA6 Y4 PCIE_FTX_GRX_N2 C922 VGA@ 1 2 .1U_0402_16V7K PCIE_FTX_C_GRX_N2
Y8 P_GFX_RXP3 P_GFX_TXP3 Y2 1 2
PCIE_GTX_C_FRX_N3 Y7 Y1 PCIE_FTX_GRX_N3 C924 VGA@ 1 2 .1U_0402_16V7K PCIE_FTX_C_GRX_N3
W9 P_GFX_RXP4 P_GFX_TXP4 W3 1 2
PCIE_GTX_C_FRX_N4 W8 W2 PCIE_FTX_GRX_N4 C926 VGA@ 1 2 .1U_0402_16V7K PCIE_FTX_C_GRX_N4
W5 V5 1 2
GRAPHICS
W6 P_GFX_RXN5 P_GFX_TXN5 V4 1 2
PCIE_GTX_C_FRX_P6 V8 V2 PCIE_FTX_GRX_P6 C929 VGA@ 1 2 .1U_0402_16V7K PCIE_FTX_C_GRX_P6
V7 P_GFX_RXN6 P_GFX_TXN6 V1 1 2
PCIE_GTX_C_FRX_P7 U9 U3 PCIE_FTX_GRX_P7 C931 VGA@ 1 2 .1U_0402_16V7K PCIE_FTX_C_GRX_P7
U8 P_GFX_RXN7 P_GFX_TXN7 U2 1 2
PCIE_GTX_C_FRX_P8 U5 T5 PCIE_FTX_GRX_P8 C933 VGA@ 1 2 .1U_0402_16V7K PCIE_FTX_C_GRX_P8
U6 P_GFX_RXN8 P_GFX_TXN8 T4 1 2
PCIE_GTX_C_FRX_P9 T8 T2 PCIE_FTX_GRX_P9 C936 VGA@ 1 2 .1U_0402_16V7K PCIE_FTX_C_GRX_P9
T7 P_GFX_RXN9 P_GFX_TXN9 T1 1 2
PCIE_GTX_C_FRX_P10 R9 R3 PCIE_FTX_GRX_P10 C938 VGA@ 1 2 .1U_0402_16V7K PCIE_FTX_C_GRX_P10
R8 P_GFX_RXN10 P_GFX_TXN10 R2 1 2
PCIE_GTX_C_FRX_P11 R5 P5 PCIE_FTX_GRX_P11 C940 VGA@ 1 2 .1U_0402_16V7K PCIE_FTX_C_GRX_P11
R6 P_GFX_RXN11 P_GFX_TXN11 P4 1 2
PCIE_GTX_C_FRX_P12 P8 P2 PCIE_FTX_GRX_P12 C942 VGA@ 1 2 .1U_0402_16V7K PCIE_FTX_C_GRX_P12
2 P7 P_GFX_RXN12 P_GFX_TXN12 P1 1 2 2
PCIE_GTX_C_FRX_P13 N9 N3 PCIE_FTX_GRX_P13 C944 VGA@ 1 2 .1U_0402_16V7K PCIE_FTX_C_GRX_P13
N8 P_GFX_RXN13 P_GFX_TXN13 N2 1 2
PCIE_GTX_C_FRX_P14 N5 M5 PCIE_FTX_GRX_P14 C946 VGA@ 1 2 .1U_0402_16V7K PCIE_FTX_C_GRX_P14
N6 P_GFX_RXN14 P_GFX_TXN14 M4 1 2
PCIE_GTX_C_FRX_P15 M8 M2 PCIE_FTX_GRX_P15 C948 VGA@ 1 2 .1U_0402_16V7K PCIE_FTX_C_GRX_P15
M7 P_GFX_RXN15 P_GFX_TXN15 M1 1 2
AE5 AD5 PCIE_FTX_DRX_P0 C950 1 2 .1U_0402_16V7K

<32> PCIE_DTX_C_FRX_P0 P_GPP_RXP0 P_GPP_TXP0 PCIE_FTX_C_DRX_P0 <32>
AE6 AD4 PCIE_FTX_DRX_N0 C951 1 2 .1U_0402_16V7K GLAN
<32> PCIE_DTX_C_FRX_N0 P_GPP_RXN0 P_GPP_TXN0 PCIE_FTX_C_DRX_N0 <32>
AD8 AD2 PCIE_FTX_DRX_P1 C952 1 2 .1U_0402_16V7K
AD7
GPP
AD1 PCIE_FTX_DRX_N1 C953 1 2 .1U_0402_16V7K WLAN
AC9 AC3 PCIE_FTX_DRX_P2 C954 1 @ 2 .1U_0402_16V7K
AC8 AC2 PCIE_FTX_DRX_N2 C955 1 @ 2 .1U_0402_16V7K Option Mini (R03 modify Reserved)
AC5 AB5 PCIE_FTX_DRX_P3 C1014 1 2 .1U_0402_16V7K
AC6 AB4 PCIE_FTX_DRX_N3 C1011 1 2 .1U_0402_16V7K Card Reader
AG8 AG2 UMI_FTX_MRX_P0 C956 1 2 .1U_0402_16V7K
<25> UMI_MTX_C_FRX_P0 P_UMI_RXP0 P_UMI_TXP0 UMI_FTX_C_MRX_P0 <25>
AG9 AG3 UMI_FTX_MRX_N0 C957 1 2 .1U_0402_16V7K
<25> UMI_MTX_C_FRX_N0 P_UMI_RXN0 P_UMI_TXN0 UMI_FTX_C_MRX_N0 <25>
AG6 AF4 UMI_FTX_MRX_P1 C958 1 2 .1U_0402_16V7K
AG5 AF5 UMI_FTX_MRX_N1 C959 1 2 .1U_0402_16V7K
AF7 AF1 UMI_FTX_MRX_P2 C960 1 2 .1U_0402_16V7K
UMI
AF8 AF2 UMI_FTX_MRX_N2 C961 1 2 .1U_0402_16V7K

AE8 AE2 UMI_FTX_MRX_P3 C962 1 2 .1U_0402_16V7K
3 AE9 AE3 UMI_FTX_MRX_N3 C963 1 2 .1U_0402_16V7K 3
+1.2VS 1 2 P_ZVDDP AG11 AH11 P_ZVSS 1 2

R539 196_0402_1% P_ZVDDP P_ZVSS R540 196_0402_1%
LOTES_ACA-ZIF-109-P12-A_FS1R2
CONN@
4 4

SCHEMATIC,MB A8331
B B
4019H2
A B C D E
A B C D E
1 1
JCPU1C
JCPU1B MEMORY CHANNEL B
<12> DDRB_SMA[15..0] DDRB_SDQ[63..0] <12>
MEMORY CHANNEL A DDRB_SMA0 T27 A14 DDRB_SDQ0
<11> DDRA_SMA[15..0] DDRA_SDQ[63..0] <11> MB_ADD0 MB_DATA0
DDRA_SMA0 U20 E13 DDRA_SDQ0 DDRB_SMA1 P24 B14 DDRB_SDQ1
DDRA_SMA1 MA_ADD0 MA_DATA0 DDRA_SDQ1 DDRB_SMA2 MB_ADD1 MB_DATA1 DDRB_SDQ2
R20 MA_ADD1 MA_DATA1 J13 P25 MB_ADD2 MB_DATA2 D16
DDRA_SMA2 R21 H15 DDRA_SDQ2 DDRB_SMA3 N27 E16 DDRB_SDQ3
P22 MA_ADD3 MA_DATA3 J15 N26 MB_ADD4 MB_DATA4 B13
DDRA_SMA4 P21 H13 DDRA_SDQ4 DDRB_SMA5 M28 C13 DDRB_SDQ5
N24 MA_ADD5 MA_DATA5 F13 M27 MB_ADD6 MB_DATA6 B16
DDRA_SMA6 N23 F15 DDRA_SDQ6 DDRB_SMA7 M24 A16 DDRB_SDQ7
DDRA_SMA7 MA_ADD6 MA_DATA6 DDRA_SDQ7 DDRB_SMA8 MB_ADD7 MB_DATA7
N20 MA_ADD7 MA_DATA7 E15 M25 MB_ADD8
DDRA_SMA8 N21 DDRB_SMA9 L26 C17 DDRB_SDQ8
DDRA_SMA9 MA_ADD8 DDRA_SDQ8 DDRB_SMA10 MB_ADD9 MB_DATA8 DDRB_SDQ9
M21 MA_ADD9 MA_DATA8 H17 U26 MB_ADD10 MB_DATA9 B18
DDRA_SMA10 U23 F17 DDRA_SDQ9 DDRB_SMA11 L27 B20 DDRB_SDQ10
M22 MA_ADD11 MA_DATA10 E19 K27 MB_ADD12 MB_DATA11 A20
DDRA_SMA12 L24 J19 DDRA_SDQ11 DDRB_SMA13 W26 E17 DDRB_SDQ12
AA25 MA_ADD13 MA_DATA12 G16 K25 MB_ADD14 MB_DATA13 B17
DDRA_SMA14 L21 H16 DDRA_SDQ13 DDRB_SMA15 K24 B19 DDRB_SDQ14
DDRA_SMA15 MA_ADD14 MA_DATA13 DDRA_SDQ14 MB_ADD15 MB_DATA14 DDRB_SDQ15
L20 MA_ADD15 MA_DATA14 H19 MB_DATA15 C19
F19 DDRA_SDQ15 DDRB_SBS0# U27
MA_DATA15 <12> DDRB_SBS0# MB_BANK0
DDRA_SBS0# U24 DDRB_SBS1# T28 C21 DDRB_SDQ16
<11> DDRA_SBS0# MA_BANK0 <12> DDRB_SBS1# MB_BANK1 MB_DATA16
DDRA_SBS1# U21 H20 DDRA_SDQ16 DDRB_SBS2# K28 B22 DDRB_SDQ17
<11> DDRA_SBS1# MA_BANK1 MA_DATA16 <12> DDRB_SBS2# MB_BANK2 MB_DATA17
DDRA_SBS2# L23 F21 DDRA_SDQ17 C23 DDRB_SDQ18
<11> DDRA_SBS2# MA_BANK2 MA_DATA17 <12> DDRB_SDM[7..0] MB_DATA18
J23 DDRA_SDQ18 DDRB_SDM0 D14 A24 DDRB_SDQ19
<11> DDRA_SDM[7..0] MA_DATA18 MB_DM0 MB_DATA19
DDRA_SDM0 E14 H23 DDRA_SDQ19 DDRB_SDM1 A18 D20 DDRB_SDQ20
DDRA_SDM1 MA_DM0 MA_DATA19 DDRA_SDQ20 DDRB_SDM2 MB_DM1 MB_DATA20 DDRB_SDQ21
J17 MA_DM1 MA_DATA20 G20 A22 MB_DM2 MB_DATA21 B21
DDRA_SDM2 E21 E20 DDRA_SDQ21 DDRB_SDM3 C25 E23 DDRB_SDQ22
DDRA_SDM3 MA_DM2 MA_DATA21 DDRA_SDQ22 DDRB_SDM4 MB_DM3 MB_DATA22 DDRB_SDQ23
F25 MA_DM3 MA_DATA22 G22 AF25 MB_DM4 MB_DATA23 B23
DDRA_SDM4 AD27 H22 DDRA_SDQ23 DDRB_SDM5 AG22
DDRA_SDM5 MA_DM4 MA_DATA23 DDRB_SDM6 MB_DM5 DDRB_SDQ24
AC23 MA_DM5 AH18 MB_DM6 MB_DATA24 E24
2 DDRA_SDM6 DDRA_SDQ24 DDRB_SDM7 DDRB_SDQ25 2
AD19 MA_DM6 MA_DATA24 G24 AD14 MB_DM7 MB_DATA25 B25
DDRA_SDM7 AC15 E25 DDRA_SDQ25 B27 DDRB_SDQ26
MA_DM7 MA_DATA25 DDRA_SDQ26 DDRB_SDQS0 MB_DATA26 DDRB_SDQ27
MA_DATA26 G27 <12> DDRB_SDQS0 C15 MB_DQS_H0 MB_DATA27 D28
DDRA_SDQS0 G14 G26 DDRA_SDQ27 DDRB_SDQS0# B15 B24 DDRB_SDQ28
<11> DDRA_SDQS0 MA_DQS_H0 MA_DATA27 <12> DDRB_SDQS0# MB_DQS_L0 MB_DATA28
DDRA_SDQS0# H14 F23 DDRA_SDQ28 DDRB_SDQS1 E18 D24 DDRB_SDQ29
<11> DDRA_SDQS0# MA_DQS_L0 MA_DATA28 <12> DDRB_SDQS1 MB_DQS_H1 MB_DATA29
DDRA_SDQS1 G18 H24 DDRA_SDQ29 DDRB_SDQS1# D18 D26 DDRB_SDQ30
DDRA_SDQS1# H18 E28 DDRA_SDQ30 DDRB_SDQS2 E22 C27 DDRB_SDQ31
DDRA_SDQS2 J21 F27 DDRA_SDQ31 DDRB_SDQS2# D22
<11> DDRA_SDQS2 MA_DQS_H2 MA_DATA31 <12> DDRB_SDQS2# MB_DQS_L2
DDRA_SDQS2# H21 DDRB_SDQS3 B26 AG26 DDRB_SDQ32
<11> DDRA_SDQS2# MA_DQS_L2 <12> DDRB_SDQS3 MB_DQS_H3 MB_DATA32
DDRA_SDQS3 E27 AB28 DDRA_SDQ32 DDRB_SDQS3# A26 AH26 DDRB_SDQ33
DDRA_SDQS3# E26 AC27 DDRA_SDQ33 DDRB_SDQS4 AG24 AF23 DDRB_SDQ34
DDRA_SDQS4 AE26 AD25 DDRA_SDQ34 DDRB_SDQS4# AG25 AG23 DDRB_SDQ35
DDRA_SDQS4# AD26 AA24 DDRA_SDQ35 DDRB_SDQS5 AG21 AG27 DDRB_SDQ36
DDRA_SDQS5 AB22 AE28 DDRA_SDQ36 DDRB_SDQS5# AF21 AF27 DDRB_SDQ37
DDRA_SDQS5# AA22 AD28 DDRA_SDQ37 DDRB_SDQS6 AG17 AH24 DDRB_SDQ38
DDRA_SDQS6 AB18 AB26 DDRA_SDQ38 DDRB_SDQS6# AG18 AE24 DDRB_SDQ39
DDRA_SDQS6# AA18 AC25 DDRA_SDQ39 DDRB_SDQS7 AH14
<11> DDRA_SDQS6# MA_DQS_L6 MA_DATA39 <12> DDRB_SDQS7 MB_DQS_H7
DDRA_SDQS7 AA14 DDRB_SDQS7# AG14 AE22 DDRB_SDQ40
<11> DDRA_SDQS7 MA_DQS_H7 <12> DDRB_SDQS7# MB_DQS_L7 MB_DATA40
DDRA_SDQS7# AA15 Y23 DDRA_SDQ40 AH22 DDRB_SDQ41
<11> DDRA_SDQS7# MA_DQS_L7 MA_DATA40 MB_DATA41
AA23 DDRA_SDQ41 DDRB_CLK0 R26 AE20 DDRB_SDQ42
MA_DATA41 <12> DDRB_CLK0 MB_CLK_H0 MB_DATA42
DDRA_CLK0 T21 Y21 DDRA_SDQ42 DDRB_CLK0# R27 AH20 DDRB_SDQ43
<11> DDRA_CLK0 MA_CLK_H0 MA_DATA42 <12> DDRB_CLK0# MB_CLK_L0 MB_DATA43
DDRA_CLK0# T22 AA20 DDRA_SDQ43 DDRB_CLK1 P27 AD23 DDRB_SDQ44
<11> DDRA_CLK0# MA_CLK_L0 MA_DATA43 <12> DDRB_CLK1 MB_CLK_H1 MB_DATA44
DDRA_CLK1 R23 AB24 DDRA_SDQ44 DDRB_CLK1# P28 AD22 DDRB_SDQ45
<11> DDRA_CLK1 MA_CLK_H1 MA_DATA44 <12> DDRB_CLK1# MB_CLK_L1 MB_DATA45
DDRA_CLK1# R24 AD24 DDRA_SDQ45 AD21 DDRB_SDQ46
<11> DDRA_CLK1# MA_CLK_L1 MA_DATA45 MB_DATA46
AA21 DDRA_SDQ46 DDRB_CKE0 J26 AD20 DDRB_SDQ47
MA_DATA46 <12> DDRB_CKE0 MB_CKE0 MB_DATA47
DDRA_CKE0 H28 AC21 DDRA_SDQ47 DDRB_CKE1 J27
<11> DDRA_CKE0 MA_CKE0 MA_DATA47 <12> DDRB_CKE1 MB_CKE1
DDRA_CKE1 H27 AF19 DDRB_SDQ48
<11> DDRA_CKE1 MA_CKE1 MB_DATA48
AA19 DDRA_SDQ48 DDRB_ODT0 W27 AE18 DDRB_SDQ49
MA_DATA48 <12> DDRB_ODT0 MB_ODT0 MB_DATA49
DDRA_ODT0 Y25 AC19 DDRA_SDQ49 DDRB_ODT1 Y28 AE16 DDRB_SDQ50
<11> DDRA_ODT0 MA_ODT0 MA_DATA49 <12> DDRB_ODT1 MB_ODT1 MB_DATA50
DDRA_ODT1 AA27 AC17 DDRA_SDQ50 AH16 DDRB_SDQ51
<11> DDRA_ODT1 MA_ODT1 MA_DATA50 MB_DATA51
AA17 DDRA_SDQ51 DDRB_SCS0# V25 AG20 DDRB_SDQ52
MA_DATA51 <12> DDRB_SCS0# MB_CS_L0 MB_DATA52
DDRA_SCS0# V22 AB20 DDRA_SDQ52 DDRB_SCS1# Y27 AG19 DDRB_SDQ53
3 <11> DDRA_SCS0# MA_CS_L0 MA_DATA52 <12> DDRB_SCS1# MB_CS_L1 MB_DATA53 3
DDRA_SCS1# AA26 Y19 DDRA_SDQ53 AF17 DDRB_SDQ54
<11> DDRA_SCS1# MA_CS_L1 MA_DATA53 MB_DATA54
AD18 DDRA_SDQ54 DDRB_SRAS# V24 AD16 DDRB_SDQ55
MA_DATA54 <12> DDRB_SRAS# MB_RAS_L MB_DATA55
DDRA_SRAS# V21 AD17 DDRA_SDQ55 DDRB_SCAS# V27
<11> DDRA_SRAS# MA_RAS_L MA_DATA55 <12> DDRB_SCAS# MB_CAS_L
DDRA_SCAS# W24 DDRB_SWE# V28 AG15 DDRB_SDQ56
<11> DDRA_SCAS# MA_CAS_L <12> DDRB_SWE# MB_WE_L MB_DATA56
DDRA_SWE# W23 AA16 DDRA_SDQ56 AD15 DDRB_SDQ57
<11> DDRA_SWE# MA_WE_L MA_DATA56 MB_DATA57
Y15 DDRA_SDQ57 MEM_MB_RST# J25 AG13 DDRB_SDQ58
MA_DATA57 <12> MEM_MB_RST# MB_RESET_L MB_DATA58
MEM_MA_RST# H25 AA13 DDRA_SDQ58 MEM_MB_EVENT# T25 AD13 DDRB_SDQ59
<11> MEM_MA_RST# MA_RESET_L MA_DATA58 <12> MEM_MB_EVENT# MB_EVENT_L MB_DATA59
MEM_MA_EVENT# T24 AC13 DDRA_SDQ59 AG16 DDRB_SDQ60
<11> MEM_MA_EVENT# MA_EVENT_L MA_DATA59 MB_DATA60
Y17 DDRA_SDQ60 AF15 DDRB_SDQ61
MA_DATA60 DDRA_SDQ61 MB_DATA61 DDRB_SDQ62
+MEM_VREF W20 M_VREF MA_DATA61 AB16 MB_DATA62 AE14
AB14 DDRA_SDQ62 AF13 DDRB_SDQ63
MA_DATA62 MB_DATA63
15mil +1.5V 1 2 M_ZVDDIO W21 M_ZVDDIO MA_DATA63 Y13 DDRA_SDQ63
R541 39.2_0402_1%
Place them close to APU within 1" CONN@
CONN@
EVENT# pull high 0.75V reference voltage

+1.5V
+1.5V
2
4 R542 4
1K_0402_1%
R544 1 2 1K_0402_5% MEM_MA_EVENT# 15mil
1
R545 1 2 1K_0402_5% MEM_MB_EVENT# +MEM_VREF

2
1 2
R543 C964
1K_0402_1% C965 Security Classification Compal Secret Data Compal Electronics, Inc.
1000P_0402_50V7K .1U_0402_16V7K 2011/07/08 2015/07/08 Title
2 1 Issued Date Deciphered Date
SCHEMATIC,MB A8331
1
A B C D E
A B C D E
Place near APU Place near APU

JCPU1D
ANALOG/DISPLAY/MISC DP0_AUXP 2 1
To LVDS C971 1 2 .1U_0402_16V7K UMA@ DP0_TXP0 L3 D1 DP0_AUXP C972 1 2 .1U_0402_16V7K UMA@ To LVDS R554UMA@ 1.8K_0402_5%
<21> DP0_TXP0_C DP0_TXP0 DP0_AUXP DP0_AUXP_C <21>
Translator C973 1 2 .1U_0402_16V7K UMA@ DP0_TXN0 L2 D2 DP0_AUXN C974 1 2 .1U_0402_16V7K UMA@ Translator DP0_AUXN 2 1
<21> DP0_TXN0_C DP0_TXN0 DP0_AUXN DP0_AUXN_C <21>
DISPLAY PORT
R555 UMA@ 1.8K_0402_5%
To eDP C966 1 2 .1U_0402_16V7K APUEDP@ DP0_TXP1 K5 E1 ML_VGA_AUXP C975 1 2 .1U_0402_16V7K UMA@ ML_VGA_AUXP 2 1
<21> DP0_TXP1_C DP0_TXP1 DP1_AUXP ML_VGA_AUXP_C <26>
Panel C967 1 2 .1U_0402_16V7K APUEDP@ DP0_TXN1 K4 E2 ML_VGA_AUXN C976 1 2 .1U_0402_16V7K UMA@ To FCH R547 UMA@ 1.8K_0402_5%
<21> DP0_TXN1_C DP0_TXN1 DP1_AUXN ML_VGA_AUXN_C <26>
ML_VGA_AUXN 2 1
K2 D5 APU_HDMI_CLK R556 UMA@ 1.8K_0402_5%
DP0_TXP2 DP2_AUXP APU_HDMI_CLK <23>
K1 D6 APU_HDMI_DATA To HDMI
DP0_TXN2 DP2_AUXN APU_HDMI_DATA <23>
J3 E5
0
DP0_TXP3 DP3_AUXP
J2 DP0_TXN3 DP3_AUXN E6
1 1
DISPLAY PORT
C977 1 2 .1U_0402_16V7K UMA@ DP1_TXP0 H5 F5
<26> ML_VGA_TXP0 DP1_TXP0 DP4_AUXP
DISPLAY PORT 1
C968 1 2 .1U_0402_16V7K UMA@ DP1_TXN0 H4 F6
<26> ML_VGA_TXN0 DP1_TXN0 DP4_AUXN
C969 1 2 .1U_0402_16V7K UMA@ DP1_TXP1 H2 G5
+1.5V <26> ML_VGA_TXP1 DP1_TXP1 DP5_AUXP
To FCH C970 1 2 .1U_0402_16V7K UMA@ DP1_TXN1 H1 G6
<26> ML_VGA_TXN1 DP1_TXN1 DP5_AUXN
MISC.
VGA ML
C978 1 2 .1U_0402_16V7K UMA@ DP1_TXP2 G3 D3 DP0_HPD LVDS/eDP
<26> ML_VGA_TXP2 DP1_TXP2 DP0_HPD DP0_HPD <10>
R579 1 2 1K_0402_5% APU_SIC C979 1 2 .1U_0402_16V7K UMA@ DP1_TXN2 G2 E3 DP1_HPD CRT
<26> ML_VGA_TXN2 DP1_TXN2 DP1_HPD DP1_HPD <10>
D7 DP2_HPD HDMI
DP2_HPD DP2_HPD <23>
R581 1 2 1K_0402_5% APU_SID C980 1 2 .1U_0402_16V7K UMA@ DP1_TXP3 F2 E7
<26> ML_VGA_TXP3 DP1_TXP3 DP3_HPD
C981 1 2 .1U_0402_16V7K UMA@ DP1_TXN3 F1 F7
<26> ML_VGA_TXN3 DP1_TXN3 DP4_HPD
R791 1 2 1K_0402_5% ALERT_L G7
DP5_HPD
L9
DISPLAY PORT 2
<23> APU_HDMI_TXD2+ DP2_TXP0
L8 C6 DP_ENBKL VDDIO level
<23> APU_HDMI_TXD2- DP2_TXN0 DP_BLON DP_ENBKL <10>
B6 DP_ENVDD Need Level shift
DP_DIGON DP_ENVDD <10>
R604 2 1 1K_0402_5% ALLOW_STOP L5 A6 DP_INT_PWM
<23> APU_HDMI_TXD1+ DP2_TXP1 DP_VARY_BL DP_INT_PWM <10>
To HDMI <23> APU_HDMI_TXD1- L6 DP2_TXN1
R577 2 1 1K_0402_5% C1 DP_AUX_ZVSS R569 1 2 150_0402_1%
@ DP_AUX_ZVSS
<23> APU_HDMI_TXD0+ K8 DP2_TXP2
+1.5VS Allow_STOP leakage issue K7 AD12
<23> APU_HDMI_TXD0- DP2_TXN2 TEST6
TEST28_H L10 T16
<23> APU_HDMI_TXC+ J6 DP2_TXP3 TEST28_L M10 T15
<23> APU_HDMI_TXC- J5 DP2_TXN3 TEST30_H P19
TEST30_L R19
R578 2 1 300_0402_5% APU_RST# APU_CLKP AE11 T19
<25> APU_CLKP CLKIN_H TEST32_H
100MHz APU_CLKN AD11 N19
<25> APU_CLKN CLKIN_L TEST32_L
CLK
R580 2 1 300_0402_5% APU_PWRGD
100MHz APU_DISP_CLKP AB11 P18 T6
<25> APU_DISP_CLKP DISP_CLKIN_H TEST4
R575 1 @ 2 1K_0402_5% APU_SVC NSS APU_DISP_CLKN AA11 R18 T7
<25> APU_DISP_CLKN DISP_CLKIN_L TEST5
TEST9 M18 T8
R576 1 @ 2 1K_0402_5% APU_SVD N18 T9
2 APU_SVC TEST10 2
<50> APU_SVC B3 SVC TEST14 F11 T10
TEST
R92 1 @ 2 1K_0402_5% APU_SVT SVI 2.0 APU_SVD A3 G11
SER.
<50> APU_SVD SVD TEST15 T11
(0 ohm APU_SVT C3 H11 T12
<50> APU_SVT SVT TEST16
at Power Side) TEST17 J11 T13
SB-TSI (S5 Domain) APU_SIC AG12
APU_SID SIC APU_TEST18 R582 1K_0402_5%
AH12 SID TEST18 F12 1 2
G12 APU_TEST19 R583 1 2 1K_0402_5%
APU_RST# R598 1 TEST19
<25> APU_RST# 2 0_0402_5% APU_RST#_APU AF10 RESET_L TEST20 J12 APU_TEST20 R584 1 2 1K_0402_5%
For ESD request close APU side APU_PWRGD R615 1 2 0_0402_5% APU_PWRGD_APU AB12 H12 APU_TEST24 R574 1 2 1K_0402_5%
<25,50> APU_PWRGD PWROK TEST24
ALLOW_STOP
CTRL
<25> ALLOW_STOP AC12 DMAACTIVE_L
TEST35 change to PU for
APU_PROCHOT# AC10 AA12 TEST35 R558 1 2 300_0402_5% +1.5V HDMI can not output
APU_THERMTRIP# AE12 PROCHOT_L TEST35 R559 @ 300_0402_5%
THERMTRIP_L 1 2 20110126
APU_RST# ALERT_L AF12 AE10 TEST25_H R557 1 2 510_0402_1%
C40 33P_0402_50V8J ALERT_L TEST25_H TEST25_L R548 510_0402_1%
TEST25_L AD10 1 2 +1.2VS
APU_PWRGD APU_TDI H10
C38 33P_0402_50V8J APU_TDO TDI M_TEST R564 1 @
J10 TDO TEST31 K22 2 39.2_0402_1% +1.5V
2 1 APU_PROCHOT# APU_TCK F10 R567 1 2 39.2_0402_1%
TCK
JTAG
C36 22P_0402_50V8J Internal PU when no use HDT APU_TMS G10
APU_THERMTRIP# APU_TRST# TMS
2 1 F9 TRST_L
C35 22P_0402_50V8J APU_DBRDY G9
APU_DBREQ# DBRDY FS1R2 R571 1 +HDT_VCC
H9 DBREQ_L FS1R2 W10 2 10K_0402_5% +3VALW Close to Header
<50> APU_VDD_RUN_FB_L B4 VSS_SENSE R592 1 2 1K_0402_5% APU_TDI_R
SENSE
C5 VDDP_SENSE RSVD1 Y10
RSVD
APU_VDDNB_SEN A4 AA10
<50> APU_VDDNB_SEN VDDNB_SENSE RSVD2
A5 Y12 R593 1 2 1K_0402_5% APU_TCK_R
APU_VDD_SEN VDDIO_SENSE RSVD3
<50> APU_VDD_SEN C4 VDD_SENSE RSVD4 K21
B5 R594 1 2 1K_0402_5% APU_TMS_R
VDDR_SENSE
LOTES_ACA-ZIF-109-P12-A_FS1R2 R595 1 2 1K_0402_5% APU_TRST#
Route as differential with APU_VDD_RUN_FB_L CONN@
R596 1 2 1K_0402_5% APU_DBREQ#_R
3 3
CPU TSI interface level shift Asserted as an input to +1.5V

HDT Debug conn
force processor into
BSH111, the Vgs is: HTC-active state
min = 0.4V
Max = 1.3V
2
C935 1 2 0.1U_0402_16V4Z +HDT_VCC

R586
T14
1K_0402_5% R89 JP1
+3VS 1 R535 2 1 R536 2 When APU High -> MOS OFF (Vgs < 0.4V ) 1 2 1 2 APU_TCK_R R606 1 2 0_0402_5% APU_TCK
0_0603_5% 1 2
APU Low -> MOS ON (Vgs > 1.3V)
1
31.6K_0402_1% 30K_0402_1% 3 4 APU_TMS_R R613 1 2 0_0402_5% APU_TMS

3 4
APU_PROCHOT# 1 2 5 6 APU_TDI_R R616 1 2 0_0402_5% APU_TDI
EC_THERM# <25,37,44,50> 5 6
Vg = 1.607 V R591
2
G
Q9 0_0402_5% 7 8 R618 1 2 0_0402_5% APU_TDO

+1.5V 7 8
APU_SID 3 1 EC_SMB_DA2 APU_TRST# R84 1 2 0_0402_5% 9 10 R599 1 @ 2 0_0402_5% APU_PWRGD
EC_SMB_DA2 <14,21,37> 9 10
S
THERMTRIP shutdown Indicates to the FCH that a thermal trip

BSH111_SOT23-3 temperature: 115 degree has occurred. Its assertion will cause the FCH R601 1 2 10K_0402_5% 11 12 R602 1 @ 2 0_0402_5% APU_RST#
11 12
1
to transition the system to S5 immediately R603 1 2 10K_0402_5% 13 13 14 14 R621 1 2 0_0402_5% APU_DBRDY

2
R605 1 2 10K_0402_5% 15 16 APU_DBREQ#_R R6221 2 0_0402_5% APU_DBREQ#

15 16
2
G
Q10 R610 R609

2 2
1K_0402_5% 10K_0402_5% 17 18 R607 1 2 0_0402_5% APU_TEST19

17 18
B
APU_SIC 3 1 EC_SMB_CK2
EC_SMB_CK2 <14,21,37>
1
Q12 R608 1 2 0_0402_5% APU_TEST18

S
19 19 20 20
E
BSH111_SOT23-3 APU_THERMTRIP# 3 1 1 2 H_THERMTRIP# <27>

C
4 R611 0_0402_5% 4
MMBT3904_SOT23-3 1 2 MAINPWON <37,42,44>
R612 @ 0_0402_5% SAMTE_ASP-136446-07-B
CONN@

SCHEMATIC,MB A8331
Custom B
4019H2
A B C D E
A B C D E
Power Name Consumption

VDD +CPU_CORE @ @
+CPU_CORE 60A +CPU_CORE Decoupling
C982
C996
C983
C984
C997
C985
C986
C67
C66
C65
C987
C988
C989
C998
C990
C991
C992
C68
C993
C994
C999
C995
C29
1 1 1 1 1
VDDNB 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 JCPU1F
+ + + + +
+CPU_CORE_NB 37A 330uF x 3@ x2 J20 VSS_1 VSS_73 A19
L4 VSS_2 VSS_74 A21
22uF x 10 @ x5
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
0.22U_0402_10V4Z
0.22U_0402_10V4Z
.01U_0402_16V7K
.01U_0402_16V7K
.01U_0402_16V7K
180P_0402_50V8J
180P_0402_50V8J
330U_D2_2V_Y
330U_D2_2V_Y
330U_D2_2V_Y
330U_D2_2V_Y
180P_0402_50V8J
330U_D2_2V_Y
VDDIO 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
R7 VSS_3 VSS_75 A23
+1.5V 3.2A 0.22uF x2 W18 VSS_4 VSS_76 A25
A15 VSS_5 VSS_77 A7
VDDP / VDDR 0.01uF x3 AB17 VSS_6 VSS_78 AA4
AC22 AA7
+1.2VS 5A / 3.5A 180pF x2 @ x1
AE21
VSS_7 VSS_79
AB13
VSS_8 VSS_80
VDDA AF24 VSS_9 VSS_81 AB15
1 1
AH23 AB19
+2.5VS 0.75A AH25
VSS_10 VSS_82
AB21
VSS_11 VSS_83
B7 VSS_12 VSS_84 AB23
+CPU_CORE_NB @ @ C14 AB25
VSS_13 VSS_85
+CPU_CORE_NB Decoupling C16 VSS_14 VSS_86 AB27
C1000
C1001
C62
C61
C57
C1004
C1005
C1006
C1007
C1008
C1009
C1010
1 1 C2 VSS_15 VSS_87 AB9
1 1 1 1 1 1 1 1 1 1 C20 VSS_16 VSS_88 AC14
+ +
330uF x2 C22 VSS_17 VSS_89 AC16
C24 VSS_18 VSS_90 AC18
22uF x2 @ x5
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
10U_0603_6.3V6M
0.22U_0402_10V4Z
0.22U_0402_10V4Z
180P_0402_50V8J
180P_0402_50V8J
180P_0402_50V8J
330U_D2_2V_Y
330U_D2_2V_Y
C26 VSS_19 VSS_91 AC20
+CPU_CORE JCPU1E +CPU_CORE 2 2 2 2 2 2 2 2 2 2 2 2
10uF x1 C28 VSS_20 VSS_92 AC24
D13 VSS_21 VSS_93 AC26
F8 VDD_1 VDD_32 R11 0.22uF x2 D15 VSS_22 VSS_94 AC28
H6 VDD_2 VDD_33 T10 180pF x3 D17 VSS_23 VSS_95 AC4
J1 VDD_3 VDD_34 H8 D19 VSS_24 VSS_96 AC7
J14 VDD_4 VDD_35 G1 Decoupling between CPU and DIMMs D23 VSS_25 VSS_97 AD9
P6 VDD_5 VDD_36 U11 across VDDIO and VSS split D25 VSS_26 VSS_98 AE13
P10 VDD_6 VDD_37 W11 D27 VSS_27 VSS_99 AE15
J16 VDD_7 VDD_38 W13 E4 VSS_28 VSS_100 AE17
J18 VDD_8 VDD_39 W15 +1.5V +1.5V E9 VSS_29 VSS_101 M9
J9 VDD_9 VDD_40 W17 +1.5V / VDDIO Decoupling F14 VSS_30 VSS_102 N10
C1012
C1013
C56
C55
C14
C15
C16
C17
C1018
C1019
C1020
C1021
C1022
C1023
C1024
C1025
C5
C1027
C1028
C1029
C1030
K19 VDD_10 VDD_41 W19 1 F16 VSS_31 VSS_103 N4
K3 VDD_11 VDD_42 AB3 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 F18 VSS_32 VSS_104 N7
+
K17 VDD_12 VDD_43 AD3 330uF x1 F20 VSS_33 VSS_105 R10
M3 VDD_13 VDD_44 AD6 F22 VSS_34 VSS_106 R4
22uF x4
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
0.22U_0402_10V4Z
0.22U_0402_10V4Z
0.22U_0402_10V4Z
0.22U_0402_10V4Z
0.22U_0402_10V4Z
0.22U_0402_10V4Z
180P_0402_50V8J
180P_0402_50V8J
330U_D2_2V_Y
0.22U_0402_10V4Z
0.22U_0402_10V4Z
180P_0402_50V8J
180P_0402_50V8J
K6 VDD_14 VDD_45 AE1 F26 VSS_35 VSS_107 T11
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
V10 VDD_15 VDD_46 L1 4.7uF x4 F28 VSS_36 VSS_108 T9
V18 Y6 G13 U10
GND
VDD_16 VDD_47 0.22uF x6 VSS_37 VSS_109
V3 VDD_17 VDD_48 M6 G15 VSS_38 VSS_110 U18
F3 VDD_18 VDD_49 N11 180pF x1 @x1 G17 VSS_39 VSS_111 U4
L18 VDD_19 VDD_50 N1 G19 VSS_40 VSS_112 U7
V6 VDD_20 VDD_51 T3 G21 VSS_41 VSS_113 V11
2 2
W1 VDD_21 VDD_52 T6 G23 VSS_42 VSS_114 AE19
T18 VDD_22 VDD_53 U19 G25 VSS_43 VSS_115 AE23
Y14 VDD_23 VDD_54 U1 G4 VSS_44 VSS_116 AE25
AA1 VDD_24 VDD_55 Y16 +1.2VS J22 VSS_45 VSS_117 AE27
AB6 VDD_25 VDD_56 Y18 VDDR Decoupling J24 VSS_46 VSS_118 AE4
C54
C53
C52
C1052
C1053
C1048
C1044
C1045
AC1 VDD_26 VDD_57 Y3 J4 VSS_47 VSS_119 AE7
R1 D4 1 1 1 1 1 1 1 1 Close JCPU1.AG10,AH8,AH9,AH10 J7 AF14
VDD_27 VDD_58 VSS_48 VSS_120
P3 VDD_28 VDD_59 F4 K11 VSS_49 VSS_121 AF16
K10 VDD_29 VDD_60 AF6 K14 VSS_50 VSS_122 AF18
10uF x3
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
0.22U_0402_10V4Z
0.22U_0402_10V4Z
1000P_0402_50V7K
180P_0402_50V8J
180P_0402_50V8J
H3 VDD_30 VDD_61 AF3 K9 VSS_51 VSS_123 AF20
2 2 2 2 2 2 2 2
M19 VDD_31 VDD_62 L11 0.22uF x2 AC11 VSS_52 VSS_124 AF22
L19 VSS_53 VSS_125 AF26
1000pF x1 L7 VSS_54 VSS_126 AF28
+CPU_CORE_NB C8 VDDNB_1 VDDNB_13 C11 +CPU_CORE_NB 180pF x2 M11 VSS_55 VSS_127 AF9
D10 VDDNB_2 VDDNB_14 C12 AF11 VSS_56 VSS_128 AG4
B8 VDDNB_3 VDDNB_15 D9 V19 VSS_57 VSS_129 AG7
POWER
B12 VDDNB_4 VDDNB_16 D8 V9 VSS_58 VSS_130 AH13

C9 VDDNB_5 VDDNB_17 D12 W16 VSS_59 VSS_131 AH15
A9 VDDNB_6 VDDNB_18 D11 W4 VSS_60 VSS_132 AH17
A10 B11 @ +1.2VS W7 AH19
VDDNB_7 VDDNB_19 +1.2VS VSS_61 VSS_133
A8 VDDNB_8 VDDNB_20 A12 VDDP Decoupling Y11 VSS_62 VSS_134 AH21
C51
C8
C7
C6
C1036
C1037
C50
C1034
C1035
C1038
A11 VDDNB_9 VDDNB_21 B10 Y20 VSS_63 VSS_135 P9
E10 E12 1 1 1 1 1 1 1 1 1 Close JCPU1.AH3~7 1 Y22 C18
VDDNB_10 VDDNB_22 VSS_64 VSS_136
E11 VDDNB_11 VDDNB_23 B9 Y9 VSS_65 VSS_137 D21
C10 + A17 W14
VDDNB_12 22uF x1 VSS_66 VSS_138
22U_0805_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
0.22U_0402_10V4Z
0.22U_0402_10V4Z
1000P_0402_50V7K
180P_0402_50V8J
180P_0402_50V8J
K13 VDDNB_CAP A13 P11
VDDNB_CAP_1 2 2 2 2 2 2 2 2 2 VSS_67 VSS_139
220U_6.3V_M
VDDNB_CAP_2 K12 10uF x3 K16 VSS_68 VSS_140 C7
2
C1002
C1003
C1026
F24 VSS_69 VSS_141 E8

1 1 1 0.22uF x2 G8 VSS_70 VSS_142 K18
1000pF @x1 H7 VSS_71 VSS_143 W12
+1.5V H26 VDDIO_1 VDDIO_19 T23 J8 VSS_72
180pF x2
22U_0805_6.3V6M
22U_0805_6.3V6M
180P_0402_50V8J
K20 VDDIO_2 VDDIO_20 T26

3 2 2 2 LOTES_ACA-ZIF-109-P12-A_FS1R2 3
J28 VDDIO_3 VDDIO_21 U22
K23 U25 CONN@
VDDIO_4 VDDIO_22
K26 VDDIO_5 VDDIO_23 U28
L22 Y26 FBMA-L11-201209-221LMA30T_0805
VDDIO_6 VDDIO_24 L1
L25 VDDIO_7 VDDIO_25 T20
L28 VDDIO_8 VDDIO_26 R28 +2.5VS 2 1 +APU_VDDA
M20 VDDIO_9 VDDIO_27 R25
C18
C1041
C1040
C1043
M23 VDDIO_10 VDDIO_28 R22

M26 VDDIO_11 VDDIO_29 V20 1 1 1 1 VDDA Decoupling
N22 V23 Northbridge Power Pins
VDDIO_12 VDDIO_30
N25 V26 for Remote Decoupling
VDDIO_13 VDDIO_31 Power Sequence of APU
47U_0805_4V6
0.22U_0402_10V4Z
3300P_0402_50V7-K
180P_0402_50V8J
N28 VDDIO_14 VDDIO_32 W22

2 2 2 2 47uF x1
P20 VDDIO_15 VDDIO_33 W25
P23 W28 0.22uF x1
P26
VDDIO_16 VDDIO_34
Y24 3300pF x1
+1.5V
VDDIO_17 VDDIO_35
AA28 VDDIO_18 VDDIO_36 G28 +1.5V
180pF x1
+1.2VS AH6 AG10 +1.2VS
+2.5VS Group A
VDDP_1 VDDR_1
AH5 VDDP_2 VDDR_2 AH8
AH4 VDDP_3 VDDR_3 AH9
AH3 AH10
AH7
VDDP_4 VDDR_4 +1.5VS
VDDP_5
+APU_VDDA AB10 VDDA
+CPU_CORE
CONN@
Group B
+CPU_CORE_NB
4 4
Decoupling Caps.
+1.2VS
Pop / @ 330uF 220uF 47uF 22uF 10uF 4.7uF 0.22uF 0.01uF 3300pF 1nF 180pF
Pumori 2.0 0 19/11 7 5 17 3 1 1/1 13/3 Security Classification Compal Secret Data Compal Electronics, Inc.
Comal 7/2 1 1 19/11 7 4 17 3 1 1/1 14/2
SCHEMATIC,MB A8331
P5WS5 7/2 1 1 13 3 8 19 3 1 4 16 DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 4019H2 B
A B C D E
5 4 3 2 1
H
P
D
P
a
n
e
l
E
N
B
K
L
+3VS
+5VS +3VS
1
@ @ UMA@
2
R68 R53 R614
4.7K_0402_5% 1K_0402_5% UMA@ 4.7K_0402_5%
R87 R617
2
D 0_0402_5% 100K_0402_5% APU_ENBKL D
Translator and eDP HPD 1 @ 2 DP0_HPD
DP0_HPD <8>
1
6
1
From Translator or Conn. D D16 @
2 UMA@ 2 1 PLT_RST# <25,37>
LVDS_HPD 2 @ 5 @ G Q14
<21,22> LVDS_HPD
MMBT3904_SOT23-3
Q92A Q92B UMA@ S 2N7002K_SOT23-3
RB751V-40_SOD323-2
1
DMN66D0LDW-7_SOT363-6 DMN66D0LDW-7_SOT363-6 UMA@ Q15 C
3
<8> DP_ENBKL 1 2 2
R619 2.2K_0402_5% B
2
E
3
UMA@
R620
R86 1 UMA@ 2 0_0402_5% 100K_0402_5%
1
APU_ENBKL R624 1 UMA@ 2 0_0402_5% ENBKL <37>
+5VS +3VS
R625 1 DISO@ 2 0_0402_5%
<14> VGA_ENBKL
1
2
@ @
P
a
n
e
l
E
N
V
D
D
R71 R69
4.7K_0402_5% 1K_0402_5% R85
0_0402_5%
2
CRT HPD 1 @ 2 DP1_HPD

DP1_HPD <8>
C +3VS C
From FCH
6
FCH_CRT_HPD 2 @ 5 @
<26> FCH_CRT_HPD
Q94A Q94B
1
DMN66D0LDW-7_SOT363-6 DMN66D0LDW-7_SOT363-6
1
2
APUEDP@
APUEDP@ R632
R631 4.7K_0402_5%
100K_0402_5%
2
APU_ENVDD <22>
1
R88 1 UMA@ 2 0_0402_5% D
2 APUEDP@
APUEDP@ G Q18
MMBT3904_SOT23-3 S 2N7002K_SOT23-3
1
Q19 C
3
<8> DP_ENVDD 1 2 2
R633 2.2K_0402_5% B
APUEDP@ E
3
2
APUEDP@
R634
100K_0402_5%
1
P
a
n
e
l
P
W
M
B B
+3VS
1
UMA@
1
R636
UMA@ 4.7K_0402_5%
R635
2
47K_0402_5%
APU_INVT_PWM <21,22>
1
D
2 UMA@
UMA@ G Q20
R637 S 2N7002K_SOT23-3
1
2.2K_0402_5% C
3
1 2 2 Q21
<8> DP_INT_PWM B UMA@
E
3
1
MMBT3904_SOT23-3
UMA@
R638
4.7K_0402_5%
2
A A

SCHEMATIC,MB A8331
5 4 3 2 1
A B C D E
+VREF_DQ +1.5V +1.5V
15mil JDIMM1
1 VREF_DQ VSS1 2
3 4 DDRA_SDQ4 DDRA_SDQ[0..63]
DDRA_SDQ0 VSS2 DQ4 DDRA_SDQ5 DDRA_SDQ[0..63] <7>
5 DQ0 DQ5 6
DDRA_SDQ1 7 8 DDRA_SDM[0..7]
DQ1 VSS3 DDRA_SDM[0..7] <7>
9 10 DDRA_SDQS0#
VSS4 DQS#0 DDRA_SDQS0# <7> DDRA_SMA[0..15]
DDRA_SDM0 11 12 DDRA_SDQS0 DDRA_SMA[0..15] <7>
DM0 DQS0 DDRA_SDQS0 <7>
13 VSS5 VSS6 14
DDRA_SDQ2 15 16 DDRA_SDQ6
DDRA_SDQ3 DQ2 DQ6 DDRA_SDQ7
17 DQ3 DQ7 18
19 VSS7 VSS8 20
1 DDRA_SDQ8 DDRA_SDQ12 1
21 DQ8 DQ12 22
DQ9 DQ13
25 VSS9 VSS10 26
DDRA_SDQS1# 27 28 DDRA_SDM1
<7> DDRA_SDQS1# DQS#1 DM1
DDRA_SDQS1 29 30 MEM_MA_RST# Place near DIMM1
<7> DDRA_SDQS1 DQS1 RESET# MEM_MA_RST# <7>
31 VSS11 VSS12 32
DDRA_SDQ11 DQ10 DQ14 DDRA_SDQ15 +1.5V
35 DQ11 DQ15 36
37 VSS13 VSS14 38
DDRA_SDQ16 39 40 DDRA_SDQ20 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
41 DQ17 DQ21 42 2 2 2 2 2 2 2 2 2 2
43 VSS15 VSS16 44
DDRA_SDQS2# 45 46 DDRA_SDM2 C1067 C1068 C1069 C1070 C1071 C1072 C1073 C1074 C1075 C1076
DDRA_SDQS2 47 48
<7> DDRA_SDQS2 DQS2 VSS17 1 1 1 1 1 1 1 1 1 1
49 50 DDRA_SDQ22
DDRA_SDQ18 VSS18 DQ22 DDRA_SDQ23 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
51 DQ18 DQ23 52
DDRA_SDQ19 53 54
DQ19 VSS19 DDRA_SDQ28
55 VSS20 DQ28 56
DDRA_SDQ25 DQ24 DQ29
59 DQ25 VSS21 60
61 62 DDRA_SDQS3#
VSS22 DQS#3 DDRA_SDQS3# <7>
DDRA_SDM3 63 64 DDRA_SDQS3 +0.75VS +1.5V
65 VSS23 VSS24 66
DDRA_SDQ26 67 68 DDRA_SDQ30 0.1U_0402_16V4Z 1 2
DDRA_SDQ27 DQ26 DQ30 DDRA_SDQ31 C1106 0.1U_0402_16V4Z
69 DQ27 DQ31 70 2 2 1
71 VSS25 VSS26 72
C1077 C1078 C1079
1 1 2
DDRA_CKE0 73 74 DDRA_CKE1 0.1U_0402_16V4Z 4.7U_0603_6.3V6K
<7> DDRA_CKE0 CKE0 CKE1 DDRA_CKE1 <7>
75 VDD1 VDD2 76
77 78 DDRA_SMA15
2 DDRA_SBS2# NC1 A15 DDRA_SMA14 2
<7> DDRA_SBS2# 79 BA2 A14 80
81 VDD3 VDD4 82
DDRA_SMA12 83 84 DDRA_SMA11
DDRA_SMA9 A12/BC# A11 DDRA_SMA7
85 A9 A7 86
87 VDD5 VDD6 88
DDRA_SMA8 89 90 DDRA_SMA6
DDRA_SMA5 A8 A6 DDRA_SMA4
91 A5 A4 92
93 VDD7 VDD8 94
DDRA_SMA3 95 96 DDRA_SMA2 +VREF_CA +1.5V
DDRA_SMA1 A3 A2 DDRA_SMA0 +VREF_DQ +1.5V
97 A1 A0 98
99 VDD9 VDD10 100
2
DDRA_CLK0 101 102 DDRA_CLK1
<7> DDRA_CLK0 CK0 CK1 DDRA_CLK1 <7>
2
DDRA_CLK0# 103 104 DDRA_CLK1# R640
<7> DDRA_CLK0# CK0# CK1# DDRA_CLK1# <7>
105 106 R639 1K_0402_1%
DDRA_SMA10 VDD11 VDD12 DDRA_SBS1# 1K_0402_1%
107 A10/AP BA1 108 DDRA_SBS1# <7>
DDRA_SBS0# 109 110 DDRA_SRAS# 15mil
<7> DDRA_SBS0# DDRA_SRAS# <7>
1
BA0 RAS# +VREF_CA
111 112 15mil
1
DDRA_SWE# VDD13 VDD14 DDRA_SCS0# +VREF_DQ
<7> DDRA_SWE# 113 WE# S0# 114 DDRA_SCS0# <7>
1000P_0402_50V7K
0.1U_0402_16V4Z
DDRA_SCAS# 115 116 DDRA_ODT0
<7> DDRA_SCAS# CAS# ODT0 DDRA_ODT0 <7>
1000P_0402_50V7K
4.7U_0603_6.3V6K
0.1U_0402_16V4Z
117 VDD15 VDD16 118
4.7U_0603_6.3V6K
DDRA_SMA13 119 120 DDRA_ODT1 1 1 1
A13 ODT1 DDRA_ODT1 <7>
2
DDRA_SCS1# 121 122 1 1 1 @ C1064 C1065
<7> DDRA_SCS1# S1# NC2
C1063
123 124 15mil @ R642
VDD17 VDD18
C1060
125 126 +VREF_CA R641 1K_0402_1%
NCTEST VREF_CA 1K_0402_1% 2 2 2
127 VSS27 VSS28 128
DDRA_SDQ32 DDRA_SDQ36 2 2 2
129 130
1
131 132 1
1
DQ33 DQ37 C1066
133 VSS29 VSS30 134
DDRA_SDQS4# 135 136 DDRA_SDM4 C1061 C1062
DDRA_SDQS4 137 138 1000P_0402_50V7K
<7> DDRA_SDQS4 DQS4 VSS31 2
139 140 DDRA_SDQ38
DDRA_SDQ34 VSS32 DQ38 DDRA_SDQ39
141 DQ34 DQ39 142
3 DDRA_SDQ35 3
143 DQ35 VSS33 144
145 146 DDRA_SDQ44
147 DQ40 DQ45 148
DDRA_SDQ41 149 150
DQ41 VSS35 DDRA_SDQS5#
151 VSS36 DQS#5 152 DDRA_SDQS5# <7>
DDRA_SDM5 153 154 DDRA_SDQS5
155 VSS37 VSS38 156
159 DQ43 DQ47 160
161 VSS39 VSS40 162
165 DQ49 DQ53 166
167 VSS41 VSS42 168
DDRA_SDQS6# 169 170 DDRA_SDM6
DDRA_SDQS6 171 172
<7> DDRA_SDQS6 DQS6 VSS43
173 174 DDRA_SDQ54
175 DQ50 DQ55 176
DDRA_SDQ51 177 178
DQ51 VSS45 DDRA_SDQ60
179 VSS46 DQ60 180
DDRA_SDQ57 DQ56 DQ61
183 DQ57 VSS47 184
185 186 DDRA_SDQS7#
VSS48 DQS#7 DDRA_SDQS7# <7>
DDRA_SDM7 187 188 DDRA_SDQS7
189 VSS49 VSS50 190
193 DQ59 DQ63 194
R643 10K_0402_5% 195 196
VSS51 VSS52 MEM_MA_EVENT#
1 2 197 SA0 EVENT# 198 MEM_MA_EVENT# <7>
+3VS 199 200
+3VS VDDSPD SDA FCH_SDATA0 <12,27,34>
201 SA1 SCL 202 FCH_SCLK0 <12,27,34>
203 VTT1 VTT2 204 +0.75VS
1
4 R645 4
1 1 205 G1 G2 206
C1080 C1081 10K_0402_5% CONN@ Part Number = SP07000PE00

2.2U_0603_6.3V4Z 0.1U_0402_16V4Z SUYIN_600023HB204G256ZL PCB Footprint = SUYIN_600023HB204G256ZL_204P
2
2 2

2011/07/08 2015/07/08 Title
DIMM_A STD H:8mm Issued Date Deciphered Date
SCHEMATIC,MB A8331
<Address: 00> AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom B
4019H2
A B C D E
A B C D E
+VREF_DQ +1.5V +1.5V
15mil JDIMM2
1 VREF_DQ VSS1 2
3 4 DDRB_SDQ4 DDRB_SDQ[0..63]
DDRB_SDQ0 VSS2 DQ4 DDRB_SDQ5 DDRB_SDQ[0..63] <7>
5 DQ0 DQ5 6
DDRB_SDQ1 7 8 DDRB_SDM[0..7]
DQ1 VSS3 DDRB_SDM[0..7] <7>
9 10 DDRB_SDQS0#
VSS4 DQS#0 DDRB_SDQS0# <7> DDRB_SMA[0..15]
DDRB_SDM0 11 12 DDRB_SDQS0 DDRB_SMA[0..15] <7>
DM0 DQS0 DDRB_SDQS0 <7>
13 VSS5 VSS6 14
DDRB_SDQ2 15 16 DDRB_SDQ6
DDRB_SDQ3 DQ2 DQ6 DDRB_SDQ7
17 DQ3 DQ7 18
19 VSS7 VSS8 20
1 DDRB_SDQ8 DDRB_SDQ12 1
21 DQ8 DQ12 22
DQ9 DQ13
25 VSS9 VSS10 26
DDRB_SDQS1# 27 28 DDRB_SDM1
<7> DDRB_SDQS1# DQS#1 DM1
DDRB_SDQS1 29 30 MEM_MB_RST#
<7> DDRB_SDQS1 DQS1 RESET# MEM_MB_RST# <7>
31 VSS11 VSS12 32
35 DQ11 DQ15 36
37 VSS13 VSS14 38
41 DQ17 DQ21 42
43 VSS15 VSS16 44 Place near DIMM2
DDRB_SDQS2 47 48
<7> DDRB_SDQS2 DQS2 VSS17
49 50 DDRB_SDQ22 +1.5V
DDRB_SDQ18 VSS18 DQ22 DDRB_SDQ23
51 DQ18 DQ23 52
DDRB_SDQ19 53 54 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
DQ19 VSS19 DDRB_SDQ28
55 VSS20 DQ28 56 2 2 2 2 2 2 2 2 2 2
DDRB_SDQ25 DQ24 DQ29 C1089 C1090 C1091 C1092 C1093 C1094 C1095 C1096 C1097 C1098
59 DQ25 VSS21 60
61 62 DDRB_SDQS3#
VSS22 DQS#3 DDRB_SDQS3# <7> 1 1 1 1 1 1 1 1 1 1
DDRB_SDM3 63 64 DDRB_SDQS3
65 66 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
DDRB_SDQ26 VSS23 VSS24 DDRB_SDQ30
67 DQ26 DQ30 68
DQ27 DQ31
71 VSS25 VSS26 72
+0.75VS +1.5V +1.5V

DDRB_CKE0 73 74 DDRB_CKE1
<7> DDRB_CKE0 CKE0 CKE1 DDRB_CKE1 <7>
75 76 0.1U_0402_16V4Z 1 2
VDD1 VDD2 DDRB_SMA15 C1107 0.1U_0402_16V4Z
77 NC1 A15 78 2 2 1 1
2 DDRB_SBS2# DDRB_SMA14 2
<7> DDRB_SBS2# 79 BA2 A14 80
81 82 C1099 C1100 C1101 + @
DDRB_SMA12 VDD3 VDD4 DDRB_SMA11 C9
83 A12/BC# A11 84
DDRB_SMA9 DDRB_SMA7 1 1 2 330U_D2_2V_Y
85 A9 A7 86
0.1U_0402_16V4Z 4.7U_0603_6.3V6K 2 Change To D2 Type 20110905
87 VDD5 VDD6 88
DDRB_SMA8 89 90 DDRB_SMA6
DDRB_SMA5 A8 A6 DDRB_SMA4
91 A5 A4 92
93 VDD7 VDD8 94
DDRB_SMA3 95 96 DDRB_SMA2
DDRB_SMA1 A3 A2 DDRB_SMA0
97 A1 A0 98
99 VDD9 VDD10 100
DDRB_CLK0 101 102 DDRB_CLK1
<7> DDRB_CLK0 CK0 CK1 DDRB_CLK1 <7>
DDRB_CLK0# 103 104 DDRB_CLK1#
<7> DDRB_CLK0# CK0# CK1# DDRB_CLK1# <7>
105 VDD11 VDD12 106
DDRB_SMA10 107 108 DDRB_SBS1#
A10/AP BA1 DDRB_SBS1# <7>
DDRB_SBS0# 109 110 DDRB_SRAS#
<7> DDRB_SBS0# BA0 RAS# DDRB_SRAS# <7>
111 VDD13 VDD14 112
DDRB_SWE# 113 114 DDRB_SCS0#
<7> DDRB_SWE# WE# S0# DDRB_SCS0# <7>
DDRB_SCAS# 115 116 DDRB_ODT0
<7> DDRB_SCAS# CAS# ODT0 DDRB_ODT0 <7>
117 VDD15 VDD16 118
DDRB_SMA13 119 120 DDRB_ODT1
A13 ODT1 DDRB_ODT1 <7> +VREF_DQ +VREF_CA
DDRB_SCS1# 121 122
<7> DDRB_SCS1# S1# NC2
123 VDD17 VDD18 124 15mil
125 NCTEST VREF_CA 126 +VREF_CA 15mil +VREF_DQ
15mil +VREF_CA
127 VSS27 VSS28 128
DQ32 DQ36
1000P_0402_50V7K
1000P_0402_50V7K
DDRB_SDQ33 131 132 DDRB_SDQ37 1
DQ33 DQ37
4.7U_0603_6.3V6K
0.1U_0402_16V4Z
4.7U_0603_6.3V6K
0.1U_0402_16V4Z
133 134 C1088
DDRB_SDQS4# VSS29 VSS30 DDRB_SDM4 1000P_0402_50V7K
<7> DDRB_SDQS4# 135 DQS#4 DM4 136 1 1 1 1 1 1
DDRB_SDQS4 137 138 C1083 C1084 C1086 C1087
<7> DDRB_SDQS4 DQS4 VSS31 2
C1082
C1085
139 140 DDRB_SDQ38
141 DQ34 DQ39 142
3 DDRB_SDQ35 2 2 2 2 2 2 3
143 DQ35 VSS33 144
145 146 DDRB_SDQ44
147 DQ40 DQ45 148
DDRB_SDQ41 149 150
DQ41 VSS35 DDRB_SDQS5#
151 VSS36 DQS#5 152 DDRB_SDQS5# <7>
155 VSS37 VSS38 156
159 DQ43 DQ47 160
161 VSS39 VSS40 162
165 DQ49 DQ53 166
167 VSS41 VSS42 168
DDRB_SDQS6 171 172
<7> DDRB_SDQS6 DQS6 VSS43
173 174 DDRB_SDQ54
175 DQ50 DQ55 176
DDRB_SDQ51 177 178
DQ51 VSS45 DDRB_SDQ60
179 VSS46 DQ60 180
DDRB_SDQ57 DQ56 DQ61
183 DQ57 VSS47 184
185 186 DDRB_SDQS7#
VSS48 DQS#7 DDRB_SDQS7# <7>
189 VSS49 VSS50 190
193 DQ59 DQ63 194
R646 10K_0402_5% 195 196
VSS51 VSS52 MEM_MB_EVENT#
1 2 197 SA0 EVENT# 198 MEM_MB_EVENT# <7>
+3VS 199 VDDSPD SDA 200 FCH_SDATA0 <11,27,34>
201 SA1 SCL 202 FCH_SCLK0 <11,27,34>
203 VTT1 VTT2 204 +0.75VS
1
4 R648 4
205 G1 G2 206
10K_0402_5% TYCO 2-2013022-1 204P H4 DDR3

CONN@ PCB Footprint = FOX_AS0A626-U4SN-7F_204P
2
Part Number = SP07000JN10

2011/07/08 2015/07/08 Title
DIMM_B STD H:4mm Issued Date Deciphered Date
SCHEMATIC,MB A8331
<Address: 01> AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom B
4019H2
A B C D E
A B C D E
<DIGON> <VARY_BL>
Controls panel digital power on/off. LCD PWM (pulse width modulated)
GFX PCIE LANE REVERSAL Active High
External 10-kΩ pull-down recommended.
output to adjust LCD brightness
Active High
External 10-kΩ pull-down recommended.
PCIE_FTX_C_GRX_P[0..15] U8A U8G
<6> PCIE_FTX_C_GRX_P[0..15] PCIE_GTX_C_FRX_P[0..15]
PCIE_FTX_C_GRX_N[0..15] PCIE_GTX_C_FRX_P[0..15] <6> R386 1 DISO@ 2 10K_0402_5%
<6> PCIE_FTX_C_GRX_N[0..15] PCIE_GTX_C_FRX_N[0..15]
PCIE_GTX_C_FRX_N[0..15] <6> LVDS CONTROL
VARY_BL AK27 VGA_INVT_PWM <22>
DIGON AJ27 VGA_ENVDD <22>
PCIE_FTX_C_GRX_P0 AA38 Y33 PCIE_GTX_FRX_P0 C580 1 2 .1U_0402_16V7K PCIE_GTX_C_FRX_P0 R387 1 DISO@ 2 10K_0402_5%
1
PCIE_FTX_C_GRX_N0 PCIE_RX0P PCIE_TX0P PCIE_GTX_FRX_N0 C291 .1U_0402_16V7K PCIE_GTX_C_FRX_N0 1
Y37 PCIE_RX0N PCIE_TX0N Y32 1 2
VGA@
VGA@ AK35
PCIE_FTX_C_GRX_P1
PCIE_FTX_C_GRX_N1
Y35
W36
PCIE_RX1P PCIE_TX1P W33
W32
PCIE_GTX_FRX_P1
PCIE_GTX_FRX_N1
C247 1
C473
2
1 2
.1U_0402_16V7K
.1U_0402_16V7K
PCIE_GTX_C_FRX_P1
PCIE_GTX_C_FRX_N1
TXCLK_UP_DPF3P
TXCLK_UN_DPF3N AL36 Display Port F config
PCIE_RX1N PCIE_TX1N
VGA@ TXOUT_U0P_DPF2P AJ38
VGA@ TXOUT_U0N_DPF2N AK37
PCIE_FTX_C_GRX_P2 W38 U33 PCIE_GTX_FRX_P2 C572 1 2 .1U_0402_16V7K PCIE_GTX_C_FRX_P2
PCIE_FTX_C_GRX_N2 PCIE_RX2P PCIE_TX2P PCIE_GTX_FRX_N2 C288 .1U_0402_16V7K PCIE_GTX_C_FRX_N2
V37 PCIE_RX2N PCIE_TX2N U32 1 2 TXOUT_U1P_DPF1P AH35
VGA@ TXOUT_U1N_DPF1N AJ36
VGA@
PCIE_FTX_C_GRX_P3 V35 U30 PCIE_GTX_FRX_P3 C579 1 2 .1U_0402_16V7K PCIE_GTX_C_FRX_P3 AG38
PCIE_FTX_C_GRX_N3 PCIE_RX3P PCIE_TX3P PCIE_GTX_FRX_N3 C316 .1U_0402_16V7K PCIE_GTX_C_FRX_N3 TXOUT_U2P_DPF0P
U36 PCIE_RX3N PCIE_TX3N U29 1 2 TXOUT_U2N_DPF0N AH37
VGA@
VGA@ TXOUT_U3P AF35
PCIE_FTX_C_GRX_P4 U38 T33 PCIE_GTX_FRX_P4 C287 1 2 .1U_0402_16V7K PCIE_GTX_C_FRX_P4 AG36
PCIE_FTX_C_GRX_N4 PCIE_RX4P PCIE_TX4P PCIE_GTX_FRX_N4 C228 .1U_0402_16V7K PCIE_GTX_C_FRX_N4 TXOUT_U3N
T37 PCIE_RX4N PCIE_TX4N T32 1 2
PCI EXPRESS INTERFACE

VGA@
PCIE_FTX_C_GRX_P5 T35 T30 PCIE_GTX_FRX_P5 C224 1 2
VGA@
.1U_0402_16V7K PCIE_GTX_C_FRX_P5
LVTMDP Display Port E config eDP
PCIE_FTX_C_GRX_N5 PCIE_RX5P PCIE_TX5P PCIE_GTX_FRX_N5 C576 .1U_0402_16V7K PCIE_GTX_C_FRX_N5 VGA_TXCLK+
R36 PCIE_RX5N PCIE_TX5N T29 1 2 TXCLK_LP_DPE3P AP34 VGA_TXCLK+ <22>
VGA@ AR34 VGA_TXCLK- DP3
TXCLK_LN_DPE3N VGA_TXCLK- <22>
VGA@
PCIE_FTX_C_GRX_P6 R38 P33 PCIE_GTX_FRX_P6 C295 1 2 .1U_0402_16V7K PCIE_GTX_C_FRX_P6 AW37 VGA_TXOUT0+
PCIE_RX6P PCIE_TX6P TXOUT_L0P_DPE2P VGA_TXOUT0+ <22>
PCIE_FTX_C_GRX_N6 P37 P32 PCIE_GTX_FRX_N6 C472 1 2 .1U_0402_16V7K PCIE_GTX_C_FRX_N6 AU35 VGA_TXOUT0- DP2
PCIE_RX6N PCIE_TX6N TXOUT_L0N_DPE2N VGA_TXOUT0- <22>
VGA@
VGA@ AR37 VGA_TXOUT1+
TXOUT_L1P_DPE1P VGA_TXOUT1+ <22>
PCIE_FTX_C_GRX_P7 P35 P30 PCIE_GTX_FRX_P7 C242 1 2 .1U_0402_16V7K PCIE_GTX_C_FRX_P7 AU39 VGA_TXOUT1- DP1
PCIE_RX7P PCIE_TX7P TXOUT_L1N_DPE1N VGA_TXOUT1- <22>
PCIE_FTX_C_GRX_N7 N36 P29 PCIE_GTX_FRX_N7 C468 1 2 .1U_0402_16V7K PCIE_GTX_C_FRX_N7
PCIE_RX7N PCIE_TX7N VGA_TXOUT2+
2 VGA@ TXOUT_L2P_DPE0P AP35 VGA_TXOUT2+ <22> 2
VGA@ AR35 VGA_TXOUT2- DP0
TXOUT_L2N_DPE0N VGA_TXOUT2- <22>
PCIE_FTX_C_GRX_P8 N38 N33 PCIE_GTX_FRX_P8 C581 1 2 .1U_0402_16V7K PCIE_GTX_C_FRX_P8
M37 PCIE_RX8N PCIE_TX8N N32 1 2 TXOUT_L3P AN36
VGA@ TXOUT_L3N AP37
VGA@
PCIE_FTX_C_GRX_P9 M35 N30 PCIE_GTX_FRX_P9 C574 1 2 .1U_0402_16V7K PCIE_GTX_C_FRX_P9
L36 PCIE_RX9N PCIE_TX9N N29 1 2 Link E and link F can only be configured as one
VGA@ DisplayPort link at a time (mutually exclusive).
VGA@ S IC 216-0833000 A11 THAMES XT M2 ( eDP is connected to link E. )
PCIE_FTX_C_GRX_P10 L38 L33 PCIE_GTX_FRX_P10 C474 1 2 .1U_0402_16V7K PCIE_GTX_C_FRX_P10 THA@
K37 PCIE_RX10N PCIE_TX10N L32 1 2
VGA@
VGA@
PCIE_FTX_C_GRX_P11 K35 L30 PCIE_GTX_FRX_P11 C337 1 2 .1U_0402_16V7K PCIE_GTX_C_FRX_P11
J36 PCIE_RX11N PCIE_TX11N L29 1 2
VGA@
VGA@
PCIE_FTX_C_GRX_P12 J38 K33 PCIE_GTX_FRX_P12 C582 1 2 .1U_0402_16V7K PCIE_GTX_C_FRX_P12
PCIE_FTX_C_GRX_N12 PCIE_RX12P PCIE_TX12P PCIE_GTX_FRX_N12 C578 .1U_0402_16V7K PCIE_GTX_C_FRX_N12 +3VSG
H37 PCIE_RX12N PCIE_TX12N K32 1 2
VGA@
VGA@
PCIE_FTX_C_GRX_P13 H35 J33 PCIE_GTX_FRX_P13 C577 1 2 .1U_0402_16V7K PCIE_GTX_C_FRX_P13
G36 PCIE_RX13N PCIE_TX13N J32 1 2
1
VGA@ @
VGA@ R394
PCIE_FTX_C_GRX_P14 G38 K30 PCIE_GTX_FRX_P14 C570 1 2 .1U_0402_16V7K PCIE_GTX_C_FRX_P14 2.2K_0402_5% PX@
PCIE_FTX_C_GRX_N14 PCIE_RX14P PCIE_TX14P PCIE_GTX_FRX_N14 C571 .1U_0402_16V7K PCIE_GTX_C_FRX_N14 U21
F37 PCIE_RX14N PCIE_TX14N K29 1 2
5
VGA@
2
VGA@ 2
P
3 <25,27> PE_GPIO0 B 3
PCIE_FTX_C_GRX_P15 F35 H33 PCIE_GTX_FRX_P15 C336 1 2 .1U_0402_16V7K PCIE_GTX_C_FRX_P15 4 VGA_RST#
PCIE_FTX_C_GRX_N15 PCIE_RX15P PCIE_TX15P PCIE_GTX_FRX_N15 C197 .1U_0402_16V7K PCIE_GTX_C_FRX_N15 Y
E37 PCIE_RX15N PCIE_TX15N H32 1 2 <25,31,32,34,35> APU_PCIE_RST# 1 A
G
VGA@
VGA@
3
NC7SZ08P5X_NL_SC70-5
CLOCK
<25> CLK_PEG_VGA AB35 PCIE_REFCLKP
<25> CLK_PEG_VGA# AA36 PCIE_REFCLKN 1 DISO@ 2
R159 0_0402_5%
CALIBRATION
Y30 VGA_PCIE_CALRP R388 1 2 1.27K_0402_1%
PCIE_CALRP VGA@
2 1 AH16 Y29 VGA_PCIE_CALRN R390 1 2 2K_0402_1% +1.0VSG
R389 VGA@ 10K_0402_5% PWRGOOD PCIE_CALRN VGA@
3.3-V tolerant VGA_RST# AA30 PERSTB

1
@
R402 S IC 216-0833000 A11 THAMES XT M2
10K_0402_5% THA@
Part Number = SA00004WI20
2
4 4

SCHEMATIC,MB A8331
Custom B
4019H2
A B C D E
A B C D E
U8B
Strap Name Pin Straps description <all internal PD> Setting +3VSG External VGA Thermal Sensor
VIP Device Strap Enable indicates to the software driver (Internal PD) U9 @
VIP_DEVICE_EN V2SYNC 0: Driver would ignore the value sampled on VHAD_0 during reset 0 AU24 1 8 VGA_SMB_CK2
TXCAP_DPA3P VGA_HDMI_TXC+ <23> VDD SCLK
(GENLK_VSYNC) 1: VHAD_0 to determine whether or not a VIP slave device TXCAM_DPA3N AV23 VGA_HDMI_TXC- <23> 1 @
0.1U_0402_16V4Z
C324
GPU_THERM_D+ 2 7 VGA_SMB_DA2
2200P_0402_50V7K D+ SDATA
VGA Disable determines (Internal PD) TX0P_DPA2P AT25 VGA_HDMI_TXD0+ <23>
VGA_DIS GPIO9 0: VGA Controller capacity enabled 0 MUTI GFX AR24 C325 1 2 @ 3 6 THM_ALERT#
DPA TX0M_DPA2N VGA_HDMI_TXD0- <23> 2 D- ALERT#
1: The device will not be recognized as the system’s VGA controller
AU26 GPU_THERM_D- 4 5 1 2 +3VSG
TX1P_DPA1P VGA_HDMI_TXD1+ <23> THERM# GND
Transmitter Power Saving Enable (Internal PD) AV25 R391 @ 4.7K_0402_5%
TX1M_DPA1N VGA_HDMI_TXD1- <23>
TX_PWRS_ENB GPIO0 0: 50% Tx output swing 1
1: full Tx output swing AR8 AT27 ADM1032ARMZ-2REEL_MSOP8
NC_DVPCNTL_MVP_0 TX2P_DPA0P VGA_HDMI_TXD2+ <23>
AU8 NC_DVPCNTL_MVP_1 TX2M_DPA0N AR26 VGA_HDMI_TXD2- <23>
PCI Express Transmitter De-emphasis Enable (Internal PD) AP8 NC_DVPCNTL_0
TX_DEEMPH_EN 0: Tx de-emphasis diabled R03 modify BOM +3VSG
GPIO1 1 AW8 NC_DVPCNTL_1 TXCBP_DPB3P AR30
1: Tx de-emphasis enabled AR3 NC_DVPCNTL_2 TXCBM_DPB3N AT29
AR1 +3VSG
1
VRAM_ID0 NC_DVPCLK 1
GPIO13,12,11 (config 2,1,0) : (Internal PD) memory apertures AU1 DVPDATA_0 TX3P_DPB2P AV31
2
CONFIG[2] GPIO13 a) If BIOS_ROM_EN = 1, then Config[2:0] defines CONFIG[3:0] VRAM_ID1 AU3 AU30
VRAM_ID2 DVPDATA_1 DPB TX3M_DPB2N R392 R393 VGA@
the ROM type. AW3 DVPDATA_2
128 MB 000 VRAM_ID3 4.7K_0402_5% 4.7K_0402_5% Q8A
CONFIG[1] GPIO12 001 AP6 DVPDATA_3 TX4P_DPB1P AR32
2
b) If BIOS_ROM_EN = 0, then Config[2:0] defines 256 MB 001 * AW5 DVPDATA_4 TX4M_DPB1N AT31 VGA@ VGA@ DMN66D0LDW-7_SOT363-6
CONFIG[0] GPIO11 the primary memory aperture size. 64 MB 010 AU5
1
DVPDATA_5 VGA_SMB_CK2 EC_SMB_CK2
AR6 DVPDATA_6 TX5P_DPB0P AT33 1 6 EC_SMB_CK2 <8,21,37>
BIOS_ROM_EN GPIO22 Enable external BIOS ROM device (Internal PD) AW6 DVPDATA_7 TX5M_DPB0N AU32
0: Diable, 1: Enable 0 AU6 DVPDATA_8
5
AT7 DVPDATA_9 TXCCP_DPC3P AU14
AUD[1] HSYNC 00: No audio function; 10: Audio for DisplayPort only; AV7 DVPDATA_10 TXCCM_DPC3N AV13
11 AN7 VGA_SMB_DA2 4 3 EC_SMB_DA2
01: Audio for DisplayPort and HDMI if adapter is detected; DVPDATA_11 EC_SMB_DA2 <8,21,37>
AUD(0) VSYNC 11: Audio for both DisplayPort and HDMI
AV9 DVPDATA_12 TX0P_DPC2P AT15
VGA@ Q8B DMN66D0LDW-7_SOT363-6
AT9 DVPDATA_13 TX0M_DPC2N AR14
0= Advertises the PCI-E device as 2.5 GT/s capable at power-on AR10 DVPDATA_14
1= Advertises the PCI-E device as 5.0 GT/s capable at power-on DPC
BIF_GEN2_EN GPIO2 0 AW10 DVPDATA_15 TX1P_DPC1P AU16
5.0 GT/s capability will be controlled by software AU10 DVPDATA_16 TX1M_DPC1N AV15
AP10 NC_DVPDATA_17
H2SYNC Internal use only. THIS PAD HAS AN INTERNAL AV11 NC_DVPDATA_18 TX2P_DPC0P AT17
RESERVED (GENLK_CLK) PULL-DOWN AND MUST BE 0 V AT RESET. The AT11 NC_DVPDATA_19 TX2M_DPC0N AR16
GPIO8 AR12 NC_DVPDATA_20
pad may be left unconnected DNI AW12 NC_DVPDATA_21 NC_TXCDP_DPD3P AU20
GPIO21 AU12 NC_DVPDATA_22 NC_TXCDM_DPD3N AT19
AP12 NC_DVPDATA_23
NC_TX3P_DPD2P AT21
+3VSG Global Swap Lock on AJ21 SWAPLOCKA NC_TX3M_DPD2N AR20
AK21 SWAPLOCKB
Multiple GPUs DPD AU22
R395 VGA_GPIO0 NC_TX4P_DPD1P
1 VGA@ 2 10K_0402_5%
NC_TX4M_DPD1N AV21
R396 1 VGA@ 2 10K_0402_5% VGA_GPIO1
R397 1 @ 2 10K_0402_5% VGA_GPIO2 GPIO5 fast-power reduction: I2C AT23
R398 @ 10K_0402_5% VGA_GPIO3 NC_TX5P_DPD0P
1 2 HW control will casue display disturb Move to NC_TX5M_DPD0N AR22
R401 1 @ 2 10K_0402_5% VGA_GPIO4
should use SW method control DDCCLK_AUX3P,DDCDATA_AUX3N, AK26 SCL
AJ26 SDA Not share via for other GND
GPIO6 voltage control signal ,No use can NC
R405 1 VGA@ 2 10K_0402_5% VGA_GPIO11 AD39
R VGA_CRT_R <24>
R406 1 @ 2 10K_0402_5% VGA_GPIO12 GENERAL PURPOSE I/O AD37
R408 @ VGA_GPIO13 VGA_GPIO0 RB
1 2 10K_0402_5% AH20 GPIO_0
R409 1 @ 2 3K_0402_5% GPIO_22_ROMCSB DISCRETE ONLY R02 modify, R03 modify BOM VGA_GPIO1 AH18 AE36
GPIO_1 G VGA_CRT_G <24>
P
D
1
0
0
K
a
t
E
C
s
i
d
e
2 VGA_GPIO2 AN16 AD35 2

VGA_SMB_DA2 R469 1 VGA@ 2 0_0402_5% VGA_GPIO3 GPIO_2 GB VGA_CRT_R R423 1 DISO@ 2 150_0402_1%
AH23 GPIO_3_SMBDATA
VGA_SMB_CK2 R527 1 VGA@ 2 0_0402_5% VGA_GPIO4 AJ23 AF37 VGA_CRT_G R424 1 DISO@ 2 150_0402_1%
GPIO_4_SMBCLK B VGA_CRT_B <24>
AH17 AE38 VGA_CRT_B R425 1 DISO@ 2 150_0402_1%
<10> VGA_ENBKL GPIO_5_AC_BATT DAC1 BB
AJ17 GPIO_6
GPIO7 Controls backlight on/off. 2 DISO@ 1 VGA_ENBKL
V
R
A
M
I
D
AK17 GPIO_7_BLON HSYNC AC36 VGA_CRT_HSYNC <24>

R413 10K_0402_5% AJ13 AC38
Active High ,need external PD GPIO_8_ROMSO VSYNC VGA_CRT_VSYNC <24>
ROM AH15 GPIO_9_ROMSI HSYNC:VSYNC
if GPIO22 High ,GPIO 11-13->CFG[0:2] AJ16 GPIO_10_ROMSCK
Config ROM type ,GPU has internal PD VGA_GPIO11 AK16 AB34 R414 1 2 499_0402_1% L8 11: Audio for both DisplayPort and HDMI
VGA_GPIO12 GPIO_11 RSET VGA@ BLM18AG121SN1D_2P +3VSG
+1.8VSG VGA_GPIO13
AL16 GPIO_12 +AVDD
10mil
GPIO6,15,16,20 AM16 GPIO_13 70mA AVDD AD34 2 1 +1.8VSG
AM14 AE34 VGA@ VGA@ VGA@ VGA@ AUD Strap VGA_CRT_VSYNC R417 1 DISO@ 2 10K_0402_5%
Voltage control signal GPIO_14_HPD2 AVSSQ
22U_0805_6.3V6M
C331
GPU_VID0 AM13 10mil 1 1 1 VGA_CRT_HSYNC R418 1 DISO@ 2 10K_0402_5%
GPIO6,15 no use can NC <49> GPU_VID0 GPIO_15_PWRCNTL_0
1U_0402_6.3V6K
C329
0.1U_0402_16V4Z
C330
VDDCI_VID AK14 100mA AC33 +VDD1DI AMD ref:120ohm/0.3A
<45> VDDCI_VID GPIO_16 VDD1DI
R426 R427 R428 R429 Thermal monitor interrupt THM_ALERT# AG30 AC34 VGA_HDMI_SDATA R419 1 DISO@ 2 10K_0402_5%
VGA_EDP_HPD GPIO_17_THERMAL_INT VSS1DI VGA_HDMI_SCLK R420 1 DISO@ 2 10K_0402_5%
<22> VGA_EDP_HPD AN14 GPIO_18_HPD3 CRT,HDMI
1
2 2 2
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
Critical temperature fault AM17 GPIO_19_CTF DDC

X76@
X76@
X76@
X76@
GPU_VID1 AL13 AC30 VGA_CRT_CLK R421 1 DISO@ 2 10K_0402_5%

<49> GPU_VID1 GPIO_20_PWRCNTL_1 R2/NC
Reserved AJ14 AC31 VGA_CRT_DATA R422 1 DISO@ 2 10K_0402_5%
GPIO_22_ROMCSB GPIO_21_BB_EN R2B/NC
AK13 GPIO_22_ROMCSB
VRAM_ID0 External BIOS device AN13 AD30 L9
2
VRAM_ID1 T21 GPIO_23_CLKREQB G2/NC

ON(1)/OFF(0) inter PD AM23 JTAG_TRSTB G2B/NC AD31
VRAM_ID2 T18 AN23 2 1 +1.8VSG
VRAM_ID3 T22 JTAG_TDI VGA@
Internal Debug AK23 JTAG_TCK B2/NC AF30
T25 AL24 AF31 VGA@ 1 VGA@ 1 VGA@ 1 BLM18AG121SN1D_2P
no use can floating JTAG_TMS B2B/NC
1
1
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
1U_0402_6.3V6K
C332
0.1U_0402_16V4Z
C333
10U_0603_6.3V6M
C334
T17 AM24 AMD ref:120ohm/0.3A
ON(1)/OFF(0) JTAG_TDO
X76@
X76@
X76@
X76@
AJ19 GENERICA SM010030010

Stereo Sync AK19 GENERICB C/NC AC32
2 2 2 200ma 120ohm@100mhz DCR 0.2
no use can NC AJ20 GENERICC Y/NC AD32
AK20 AF32
2
GENERICD COMP/NC
For ATI Cross fire AJ24 GENERICE_HPD4
R432 R433 R434 R435 AH26 DAC2
no use can NC NC_GENERICF_HPD5
AH24 NC_GENERICG_HPD6 H2SYNC/GENLK_CLK AD29 T2
V2SYNC/GENLK_VSYNC AC29 T3
VGA_HDMI_DET HPD AK24
<23> VGA_HDMI_DET HPD1
VDD2DI/NC AG31
VREFG:Use a voltage divider to set VREFG = 1.80 V / 3 100mA AG32
VSS2DI/NC
3 DVPDATA ID3ID2ID1ID0 Van SPD Name (or 0.60-V nominal). 3
+1.8VSG R430 1 VGA@ 2 499_0402_1%
00h 0 0 0 0 SAM 933 K4W1G1646G-BC11 64Mx16 20mil 100mA A2VDD/NC AG33
R431 1 VGA@ 2 249_0402_1%
01h 0 0 0 1 SAM 933 K4W2G1646C-HC11 128Mx16 2mA A2VDDQ/NC AD33
C335 1 2 0.1U_0402_16V4Z +VGA_VREF AH13
VREFG
02h 0 0 1 0 A2VSSQ/TSVSSQ AF33
VGA@
03h 0 0 1 1 +1.8VSG
VGA@ L10
20mil
R2SET/NC AA29 1 2
04h 0 1 0 0 AMD 900 23EY2387MB11 64Mx16 2 1 +DPLL_PVDD AM32 R436 VGA@ 715_0402_1%
BLM18AG121SN1D_2P DPLL_PVDD
1 1 VGA@ 1 VGA@ AN32 DPLL_PVSS 75mA
0.1U_0402_16V4Z
C340
1U_0402_6.3V6K
C341
05h 0 1 0 1 AMD 900 23EY4187MA11 128Mx16 VGA@

C339 20mil DDC/AUX AM26 VGA_HDMI_SCLK
PLL/CLOCK DDC1CLK VGA_HDMI_SCLK <23>
06h 0 1 1 0 10U_0603_6.3V6M AN31 AN26 VGA_HDMI_SDATA HDMI
2 2 2 DPLL_VDDC DDC1DATA VGA_HDMI_SDATA <23>
125mA
07h 0 1 1 1 +1.0VSG AUX1P AM27
27MCLK AV33 AL27
VGA@ L11 XTALOUT AU34 XTALIN AUX1N Outputs are open drain and 5-V tolerant.
08h 1 0 0 0 HYN 900 H5TQ1G63DFR-11C XTALOUT
2 1 +DPLL_VDDC AM19 External pull-up resistors to 3.3 V or 5 V are required.
BLM18AG121SN1D_2P 1 VGA@ 1 VGA@ 1 VGA@ DDC2CLK +3VSG
09h 1 0 0 1 HYN 900 H5TQ2G63BFR-11C DDC2DATA AL19 These signals must be pulled high (to 3.3 V or 5 V) before
10U_0603_6.3V6M
C345
0.1U_0402_16V4Z
C346
1U_0402_6.3V6K
C347
XO_IN AW34 VGALVDS@

XO_IN 4.7K_0402_5% R399
or after VDDC and VDD_CT are powered up.
0Ah 1 0 1 0 AUX2P AN20 2 1
XO_IN2 AW35 AM20 4.7K_0402_5% 2 1 R400
2 2 2 XO_IN2 AUX2N VGALVDS@
0Bh 1 0 1 1
1
AL30 VGA_LCD_CLK
DDCCLK_AUX3P VGA_LCD_CLK <22>
0Ch 1 1 0 0 MIC 900 MT41J64M16JT-107G:G R443 R444 AM30 VGA_LCD_DAT LVDS
DDCDATA_AUX3N VGA_LCD_DAT <22>
@ @
0Dh 1 1 0 1 MIC 900 MT41J128M16HA-107G:D 0_0402_5% 0_0402_5% AL29
NC_DDCCLK_AUX4P
AF29 AM29
2
DPLUS THERMAL NC_DDCDATA_AUX4N

0Eh 1 1 1 0 AG29 DMINUS
AN21 VGA_CRT_CLK
DDCCLK_AUX5P VGA_CRT_CLK <24>
0Fh 1 1 1 1 AM21 VGA_CRT_DATA CRT
DDCDATA_AUX5N VGA_CRT_DATA <24>
AK32 TS_FDO
DDC6CLK AJ30
GPU_THERM_D+ AL31 AJ31 A source detection pull-down resistor (100-k
GPU_THERM_D- TS_A/NC DDC6DATA
5% tolerance) is required on each AUXP signal
NC_DDCCLK_AUX7P AK30 and a pull-up resistor (100-k 5% tolerance) to
AJ32 TSVDD NC_DDCDATA_AUX7N AK29 3.3 V is required on each AUXN signal.
AJ33 TSVSS 20mA
4 4
VGA@
XTALOUT 2 1 27MCLK +1.8VSG L12 S IC 216-0833000 A11 THAMES XT M2
R445 1M_0402_5% BLM18AG121SN1D_2P 10mil THA@
2 1 +TSVDD
VGA@ X4 VGA@ 1 1 1
2 1 VGA@ VGA@ VGA@
10U_0603_6.3V6M
C350
1U_0402_6.3V6K
C351
0.1U_0402_16V4Z
C352
27MHZ_16PF_X5H027000FG1H
VGA@ VGA@ 2 2 2
C353 C354
18P_0402_50V8J 18P_0402_50V8J
SCHEMATIC,MB A8331
Custom B
4019H2
A B C D E
A B C D E
U8C U8D
DDR2 DDR2 DDR2 DDR2
GDDR3/GDDR5 GDDR5/GDDR3 MAA[0..12] GDDR3/GDDR5 GDDR5/GDDR3 MAB[0..12]
MDA[0..63] DDR3 DDR3 MAA[0..12] <18> MDB[0..63] DDR3 DDR3 MAB[0..12] <19>
<18> MDA[0..63] <19> MDB[0..63]
MDA0 C37 G24 MAA0 MDB0 C5 P8 MAB0
MDA1 NC_DQA0_0/DQA_0 NC_MAA0_0/MAA_0 MAA1 MDB1 DQB0_0/DQB_0 MAB0_0/MAB_0 MAB1
C35 NC_DQA0_1/DQA_1 NC_MAA0_1/MAA_1 J23 C3 DQB0_1/DQB_1 MAB0_1/MAB_1 T9
MDA2 A35 H24 MAA2 MDB2 E3 P9 MAB2
E34 NC_DQA0_3/DQA_3 NC_MAA0_3/MAA_3 J24 E1 DQB0_3/DQB_3 MAB0_3/MAB_3 N7
MEMORY INTERFACE A
MDA4 G32 H26 MAA4 MDB4 F1 N8 MAB4
NC_DQA0_4/DQA_4 NC_MAA0_4/MAA_4 DQB0_4/DQB_4 MAB0_4/MAB_4
MEMORY INTERFACE B
MDA5 D33 J26 MAA5 MDB5 F3 N9 MAB5
F32 NC_DQA0_6/DQA_6 NC_MAA0_6/MAA_6 H21 F5 DQB0_6/DQB_6 MAB0_6/MAB_6 U9
MDA7 E32 G21 MAA7 MDB7 G4 U8 MAB7
1 MDA8 NC_DQA0_7/DQA_7 NC_MAA0_7/MAA_7 MAA8 MDB8 DQB0_7/DQB_7 MAB0_7/MAB_7 MAB8 1
D31 NC_DQA0_8/DQA_8 NC_MAA1_0/MAA_8 H19 H5 DQB0_8/DQB_8 MAB1_0/MAB_8 Y9
MDA9 F30 H20 MAA9 MDB9 H6 W9 MAB9
C30 NC_DQA0_10/DQA_10 NC_MAA1_2/MAA_10 L13 J4 DQB0_10/DQB_10 MAB1_2/MAB_10 AC8
MDA11 A30 G16 MAA11 MDB11 K6 AC9 MAB11
MDA12 NC_DQA0_11/DQA_11 NC_MAA1_3/MAA_11 MAA12 A_BA[0..2] MDB12 DQB0_11/DQB_11 MAB1_3/MAB_11 MAB12 B_BA[0..2]
F28 NC_DQA0_12/DQA_12 NC_MAA1_4/MAA_12 J16 A_BA[0..2] <18> K5 DQB0_12/DQB_12 MAB1_4/MAB_12 AA7 B_BA[0..2] <19>
MDA13 C28 H16 A_BA2 MDB13 L4 AA8 B_BA2
+1.5VSG MDA14 NC_DQA0_13/DQA_13 NC_MAA1_5/MAA_13_BA2 A_BA0 MDB14 DQB0_13/DQB_13 MAB1_5/BA2 B_BA0
A28 NC_DQA0_14/DQA_14 NC_MAA1_6/MAA_14_BA0 J17 M6 DQB0_14/DQB_14 MAB1_6/BA0 Y8
MDA15 E28 H17 A_BA1 +1.5VSG MDB15 M1 AA9 B_BA1
MDA16 NC_DQA0_15/DQA_15 NC_MAA1_7/MAA_A15_BA1 DQMA#[0..7] MDB16 DQB0_15/DQB_15 MAB1_7/BA1 DQMB#[0..7]
D27 NC_DQA0_16/DQA_16 DQMA#[0..7] <18> M3 DQB0_16/DQB_16 DQMB#[0..7] <19>
MDA17 F26 A32 DQMA#0 MDB17 M5 H3 DQMB#0
NC_DQA0_17/DQA_17 NC_WCKA0_0/DQMA_0 DQB0_17/DQB_17 WCKB0_0/DQMB_0
1
MDA18 C26 C32 DQMA#1 MDB18 N4 H1 DQMB#1

NC_DQA0_18/DQA_18 NC_WCKA0B_0/DQMA_1 DQB0_18/DQB_18 WCKB0B_0/DQMB_1
1
R446 MDA19 A26 D23 DQMA#2 MDB19 P6 T3 DQMB#2
VGA@ MDA20 NC_DQA0_19/DQA_19 NC_WCKA0_1/DQMA_2 DQMA#3 R447 MDB20 DQB0_19/DQB_19 WCKB0_1/DQMB_2 DQMB#3
F24 NC_DQA0_20/DQA_20 NC_WCKA0B_1/DQMA_3 E22 P5 DQB0_20/DQB_20 WCKB0B_1/DQMB_3 T5
40.2_0402_1% 15mil MDA21 C24 C14 DQMA#4 VGA@ MDB21 R4 AE4 DQMB#4
MDA22 NC_DQA0_21/DQA_21 NC_WCKA1_0/DQMA_4 DQMA#5 40.2_0402_1% MDB22 DQB0_21/DQB_21 WCKB1_0/DQMB_4 DQMB#5
A24 A14 15mil T6 AF5
2
MVREFDA MDA23 NC_DQA0_22/DQA_22 NC_WCKA1B_0/DQMA_5 DQMA#6 MDB23 DQB0_22/DQB_22 WCKB1B_0/DQMB_5 DQMB#6

E24 E10 T1 AK6
2
MDA24 NC_DQA0_23/DQA_23 NC_WCKA1_1/DQMA_6 DQMA#7 MVREFDB MDB24 DQB0_23/DQB_23 WCKB1_1/DQMB_6 DQMB#7
C22 NC_DQA0_24/DQA_24 NC_WCKA1B_1/DQMA_7 D9 U4 DQB0_24/DQB_24 WCKB1B_1/DQMB_7 AK5
1
1 MDA25 A22 QSA[0..7] MDB25 V6 QSB[0..7]

NC_DQA0_25/DQA_25 QSA[0..7] <18> DQB0_25/DQB_25 QSB[0..7] <19>
1
GDDR5/DDR2/GDDR3 GDDR5/DDR2/GDDR3
0.1U_0402_16V4Z
C355
R448 VGA@ MDA26 F22 C34 QSA0 MDB26 V1 F6 QSB0

MDA27 NC_DQA0_26/DQA_26 NC_EDCA0_0/QSA_0/RDQSA_0 QSA1 MDB27 DQB0_26/DQB_26 EDCB0_0/QSB_0/RDQSB_0 QSB1
D21 NC_DQA0_27/DQA_27 NC_EDCA0_1/QSA_1/RDQSA_1 D29 1 V3 DQB0_27/DQB_27 EDCB0_1/QSB_1/RDQSB_1 K3
0.1U_0402_16V4Z
C356
100_0402_1% VGA@ MDA28 A20 D25 QSA2 R449 VGA@ MDB28 Y6 P3 QSB2
2 MDA29 NC_DQA0_28/DQA_28 NC_EDCA0_2/QSA_2/RDQSA_2 QSA3 100_0402_1% MDB29 DQB0_28/DQB_28 EDCB0_2/QSB_2/RDQSB_2 QSB3
F20 E20 Y1 V5
2
MDA30 NC_DQA0_29/DQA_29 NC_EDCA0_3/QSA_3/RDQSA_3 QSA4 VGA@ MDB30 DQB0_29/DQB_29 EDCB0_3/QSB_3/RDQSB_3 QSB4

D19 E16 Y3 AB5
2
MDA31 NC_DQA0_30/DQA_30 NC_EDCA1_0/QSA_4/RDQSA_4 QSA5 2 MDB31 DQB0_30/DQB_30 EDCB1_0/QSB_4/RDQSB_4 QSB5
E18 NC_DQA0_31/DQA_31 NC_EDCA1_1/QSA_5/RDQSA_5 E12 Y5 DQB0_31/DQB_31 EDCB1_1/QSB_5/RDQSB_5 AH1
MDA32 C18 J10 QSA6 MDB32 AA4 AJ9 QSB6
MDA33 NC_DQA1_0/DQA_32 NC_EDCA1_2/QSA_6/RDQSA_6 QSA7 MDB33 DQB1_0/DQB_32 EDCB1_2/QSB_6/RDQSB_6 QSB7
A18 NC_DQA1_1/DQA_33 NC_EDCA1_3/QSA_7/RDQSA_7 D7 AB6 DQB1_1/DQB_33 EDCB1_3/QSB_7/RDQSB_7 AM5
MDA34 F18 QSA#[0..7] MDB34 AB1 QSB#[0..7]
+1.5VSG NC_DQA1_2/DQA_34 QSA#[0..7] <18> DQB1_2/DQB_34 QSB#[0..7] <19>
MDA35 D17 A34 QSA#0 MDB35 AB3 G7 QSB#0
MDA36 NC_DQA1_3/DQA_35 NC_DDBIA0_0/QSA_0B/WDQSA_0 QSA#1 +1.5VSG MDB36 DQB1_3/DQB_35 DDBIB0_0/QSB_0B/WDQSB_0 QSB#1
A16 NC_DQA1_4/DQA_36 NC_DDBIA0_1/QSA_1B/WDQSA_1 E30 AD6 DQB1_4/DQB_36 DDBIB0_1/QSB_1B/WDQSB_1 K1
MDA37 F16 E26 QSA#2 MDB37 AD1 P1 QSB#2
2 MDA38 NC_DQA1_5/DQA_37 NC_DDBIA0_2/QSA_2B/WDQSA_2 QSA#3 MDB38 DQB1_5/DQB_37 DDBIB0_2/QSB_2B/WDQSB_2 QSB#3 2
D15 NC_DQA1_6/DQA_38 NC_DDBIA0_3/QSA_3B/WDQSA_3 C20 AD3 DQB1_6/DQB_38 DDBIB0_3/QSB_3B/WDQSB_3 W4
1
MDA39 E14 C16 QSA#4 MDB39 AD5 AC4 QSB#4

NC_DQA1_7/DQA_39 NC_DDBIA1_0/QSA_4B/WDQSA_4 DQB1_7/DQB_39 DDBIB1_0/QSB_4B/WDQSB_4
1
R450 MDA40 F14 C12 QSA#5 MDB40 AF1 AH3 QSB#5
VGA@ MDA41 NC_DQA1_8/DQA_40 NC_DDBIA1_1/QSA_5B/WDQSA_5 QSA#6 R451 MDB41 DQB1_8/DQB_40 DDBIB1_1/QSB_5B/WDQSB_5 QSB#6
D13 NC_DQA1_9/DQA_41 NC_DDBIA1_2/QSA_6B/WDQSA_6 J11 AF3 DQB1_9/DQB_41 DDBIB1_2/QSB_6B/WDQSB_6 AJ8
40.2_0402_1% 15mil MDA42 F12 F8 QSA#7 VGA@ MDB42 AF6 AM3 QSB#7
MDA43 NC_DQA1_10/DQA_42NC_DDBIA1_3/QSA_7B/WDQSA_7 40.2_0402_1% MDB43 DQB1_10/DQB_42 DDBIB1_3/QSB_7B/WDQSB_7
A12 15mil AG4
2
MVREFSA MDA44 NC_DQA1_11/DQA_43 ODTA0 MDB44 DQB1_11/DQB_43 ODTB0

D11 J21 ODTA0 <18> AH5 T7 ODTB0 <19>
2
MDA45 NC_DQA1_12/DQA_44 NC_ADBIA0/ODTA0 ODTA1 MVREFSB MDB45 DQB1_12/DQB_44 ADBIB0/ODTB0 ODTB1
F10 NC_DQA1_13/DQA_45 NC_ADBIA1/ODTA1 G19 ODTA1 <18> AH6 DQB1_13/DQB_45 ADBIB1/ODTB1 W7 ODTB1 <19>
1
1 MDA46 A10 MDB46 AJ4

NC_DQA1_14/DQA_46 DQB1_14/DQB_46
1
0.1U_0402_16V4Z
C357
R452 VGA@ MDA47 C10 H27 CLKA0 1 MDB47 AK3 L9 CLKB0

NC_DQA1_15/DQA_47 NC_CLKA0 CLKA0 <18> DQB1_15/DQB_47 CLKB0 CLKB0 <19>
0.1U_0402_16V4Z
C358
MDA48 G13 G27 CLKA0# R453 MDB48 AF8 L8 CLKB0#
NC_DQA1_16/DQA_48 NC_CLKA0B CLKA0# <18> DQB1_16/DQB_48 CLKB0B CLKB0# <19>
100_0402_1% VGA@ MDA49 H13 VGA@ MDB49 AF9
2 MDA50 NC_DQA1_17/DQA_49 CLKA1 100_0402_1% VGA@ MDB50 DQB1_17/DQB_49 CLKB1
J13 J14 CLKA1 <18> AG8 AD8 CLKB1 <19>
2
MDA51 NC_DQA1_18/DQA_50 NC_CLKA1 CLKA1# 2 MDB51 DQB1_18/DQB_50 CLKB1 CLKB1#

H11 H14 CLKA1# <18> AG7 AD7 CLKB1# <19>
2
MDA52 NC_DQA1_19/DQA_51 NC_CLKA1B MDB52 DQB1_19/DQB_51 CLKB1B
G10 NC_DQA1_20/DQA_52 AK9 DQB1_20/DQB_52
MDA53 G8 K23 RASA0# MDB53 AL7 T10 RASB0#
NC_DQA1_21/DQA_53 NC_RASA0B RASA0# <18> DQB1_21/DQB_53 RASB0B RASB0# <19>
MDA54 K9 K19 RASA1# MDB54 AM8 Y10 RASB1#
NC_DQA1_22/DQA_54 NC_RASA1B RASA1# <18> DQB1_22/DQB_54 RASB1B RASB1# <19>
MDA55 K10 MDB55 AM7
MDA56 NC_DQA1_23/DQA_55 CASA0# MDB56 DQB1_23/DQB_55 CASB0#
G9 NC_DQA1_24/DQA_56 NC_CASA0B K20 CASA0# <18> AK1 DQB1_24/DQB_56 CASB0B W10 CASB0# <19>
MDA57 A8 K17 CASA1# MDB57 AL4 AA10 CASB1#
NC_DQA1_25/DQA_57 NC_CASA1B CASA1# <18> DQB1_25/DQB_57 CASB1B CASB1# <19>
MDA58 C8 MDB58 AM6
MDA59 NC_DQA1_26/DQA_58 CSA0#_0 MDB59 DQB1_26/DQB_58 CSB0#_0
E8 NC_DQA1_27/DQA_59 NC_CSA0B_0 K24 CSA0#_0 <18> AM1 DQB1_27/DQB_59 CSB0B_0 P10 CSB0#_0 <19>
MDA60 A6 K27 MDB60 AN4 L10
MDA61 NC_DQA1_28/DQA_60 NC_CSA0B_1 MDB61 DQB1_28/DQB_60 CSB0B_1
C6 NC_DQA1_29/DQA_61 AP3 DQB1_29/DQB_61
MDA62 E6 M13 CSA1#_0 MDB62 AP1 AD10 CSB1#_0
NC_DQA1_30/DQA_62 NC_CSA1B_0 CSA1#_0 <18> DQB1_30/DQB_62 CSB1B_0 CSB1#_0 <19>
MDA63 A5 K16 MDB63 AP5 AC10
NC_DQA1_31/DQA_63 NC_CSA1B_1 DQB1_31/DQB_63 CSB1B_1
MVREFDA L18 K21 CKEA0 U10 CKEB0
+1.5VSG NC_MVREFDA NC_CKEA0 CKEA0 <18> CKEB0 CKEB0 <19>
MVREFSA L20 J20 CKEA1 MVREFDB Y12 AA11 CKEB1
NC_MVREFSA NC_CKEA1 CKEA1 <18> MVREFDB CKEB1 CKEB1 <19>
MVREFSB AA12
3
WEA0# MVREFSB WEB0# 3
1 VGA@ 2 L27 NC_MEM_CALRN0 NC_WEA0B K26 WEA0# <18> WEB0B N10 WEB0# <19>
R454 1 VGA@ 2 243_0402_1% N12 L15 WEA1# AB11 WEB1#
MEM_CALRN1 NC_WEA1B WEA1# <18> WEB1B WEB1# <19>
R455 1 VGA@ 2 243_0402_1% AG12 R459
R456 243_0402_1% NC_MEM_CALRN2 5.11K_0402_1%
1 VGA@ 2 M12 H23 2 VGA@ 1 TESTEN AD28 T8
MEM_CALRP1 NC_MAA0_8 MAA13 <18> TESTEN MAB0_8 MAB13 <19>
R457 1 VGA@ 2 243_0402_1% M27 J19 W8
R458 NC_MEM_CALRP0 NC_MAA1_8 TEST_MCLK MAB1_8
1 VGA@ 2 243_0402_1% AH12 AK10
GDDR5
NC_MEM_CALRP2 CLKTESTA
GDDR5
R460 243_0402_1% Differential for testing TEST_YCLK AL10 AH11 1 2 1 2

and DNI component CLKTESTB DRAM_RST VRAM_RST# <18,19>
VGA@ VGA@
0.1U_0402_16V4Z
0.1U_0402_16V4Z
for normal operation. R461 R462
2 2 10_0402_5% 51.1_0402_1%
2
C360
C361
1 VGA@
@ @ VGA@ C359
S IC 216-0833000 A11 THAMES XT M2 R463 120P_0402_50V8
S IC 216-0833000 A11 THAMES XT M2 1 1 THA@ 5.11K_0402_1%
THA@ 2
1
1
1
R464 R465
@ @
51.1_0402_1% 51.1_0402_1%
Place all these components very close
2
to GPU (Within 25mm) and
keep all component close to
each Other (within5mm) except Rser2
The suggested components are tested on the AMD

reference board only. Customers must measure the slew
on each memory part to ensure that the slew rate meets
4 the DRAM specification. 4

SCHEMATIC,MB A8331
A B C D E
A B C D E
R04 Modify BOM

U8E
+1.5VSG
VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ MEM I/O
1 SM010014520 3000ma 220ohm@100mhz DCR 0.04
1U_0402_6.3V6K
C375
1U_0402_6.3V6K
C376
1U_0402_6.3V6K
C362
1U_0402_6.3V6K
C377
1U_0402_6.3V6K
C378
1U_0402_6.3V6K
C379
1U_0402_6.3V6K
C380
1U_0402_6.3V6K
C363
PCIE
@ +
1 1 1 1 1 1 1 1 40mil +PCIE_VDDR
AC7 VDDR1#1 PCIE_VDDR#1 AA31 2 1 +1.8VSG
C374 AD11 AA32 VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ L13 VGA@
330U_2.5V_M VDDR1#2 PCIE_VDDR#2 FBMA-L11-201209-221LMA30T_0805
AF7 VDDR1#3 PCIE_VDDR#3 AA33 1 1 1 1 1 1
2 2 2 2 2 2 2 2 2
0.1U_0402_16V4Z
C381
0.1U_0402_16V4Z
C382
1U_0402_6.3V6K
C364
1U_0402_6.3V6K
C383
1U_0402_6.3V6K
C365
10U_0603_6.3V6M
C384
AG10 VDDR1#4 PCIE_VDDR#4 AA34 220ohm/2A
AJ7 VDDR1#5 440mA PCIE_VDDR#5 V28
AK8 VDDR1#6 PCIE_VDDR#6 W29
2 2 2 2 2 2
AL9 VDDR1#7 PCIE_VDDR#7 W30
VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ G11 Y31
VDDR1#8 PCIE_VDDR#8
1U_0402_6.3V6K
C385
1U_0402_6.3V6K
C366
1U_0402_6.3V6K
C386
1U_0402_6.3V6K
C387
1U_0402_6.3V6K
C388
1U_0402_6.3V6K
C367
1U_0402_6.3V6K
C389
1U_0402_6.3V6K
C390
1 1 1 1 1 1 1 1 G14 VDDR1#9 PCIE_VDDR/PCIE_PVDD AB37
1 G17 VDDR1#10
1
G20 VDDR1#11 PCIE_VDDC#1 G30 +1.0VSG
G23 G31 VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@
2 2 2 2 2 2 2 2 VDDR1#12 PCIE_VDDC#2
G26 VDDR1#13 PCIE_VDDC#3 H29 1 1 1 1 1 1 1 1
1U_0402_6.3V6K
C391
1U_0402_6.3V6K
C392
1U_0402_6.3V6K
C368
1U_0402_6.3V6K
C393
1U_0402_6.3V6K
C369
1U_0402_6.3V6K
C370
1U_0402_6.3V6K
C394
10U_0603_6.3V6M
C395
G29 VDDR1#14 PCIE_VDDC#4 H30
H10 VDDR1#15 PCIE_VDDC#5 J29
VGA@ J7 3400mA 2A J30
VDDR1#16 PCIE_VDDC#6 2 2 2 2 2 2 2 2
1U_0402_6.3V6K
C401
1 1 VGA@ 1 VGA@ 1 VGA@ 1 VGA@ 1 VGA@ 1 VGA@ 1 VGA@ 1 J9 VDDR1#17 PCIE_VDDC#7 L28
10U_0603_6.3V6M
C396
10U_0603_6.3V6M
C371
10U_0603_6.3V6M
C372
10U_0603_6.3V6M
C373
10U_0603_6.3V6M
C397
1U_0402_6.3V6K
C398
1U_0402_6.3V6K
C399
1U_0402_6.3V6K
C400
K11 VDDR1#18 PCIE_VDDC#8 M28
VGA@ K13 N28
VDDR1#19 PCIE_VDDC#9
K8 VDDR1#20 PCIE_VDDC#10 R28
2 2 2 2 2 2 2 2 2
L12 VDDR1#21 PCIE_VDDC#11 T28
L16 VDDR1#22 PCIE_VDDC#12 U28
L21 VDDR1#23
L23 VDDR1#24
L26 VDDR1#25 VDDC#1 AA15 +VGA_CORE
1U_0402_6.3V6K
C405
1U_0402_6.3V6K
C406
1U_0402_6.3V6K
C407
1U_0402_6.3V6K
C408
1U_0402_6.3V6K
C409
1U_0402_6.3V6K
C410
1U_0402_6.3V6K
C411
1U_0402_6.3V6K
C412
1U_0402_6.3V6K
C413
1U_0402_6.3V6K
C414
CORE
SM010030010 +1.8VSG 2
L14
1 L7 VDDR1#26 VDDC#2 AA17 1 1 1 1 1 1 1 1 1 1
1 1 1 M11 VDDR1#27 VDDC#3 AA20
300ma 120ohm@100mhz DCR 0.3
0.1U_0402_16V4Z
C404
120ohm/0.3A BLM18AG121SN1D_2P VGA@ VGA@ N11 AA22
VDDR1#28 VDDC#4
10U_0603_6.3V6M
C402
1U_0402_6.3V6K
C403
VGA@ VGA@ P7 AA24 VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@
VDDR1#29 VDDC#5 2 2 2 2 2 2 2 2 2 2
R11 VDDR1#30 VDDC#6 AA27
2 2 2
U11 VDDR1#31 VDDC#7 AB16
U7 VDDR1#32 VDDC#8 AB18
Y11 VDDR1#33 VDDC#9 AB21
Ref137-12~ remove Bead Y7 VDDR1#34 VDDC#10 AB23
1U_0402_6.3V6K
C416
1U_0402_6.3V6K
C417
1U_0402_6.3V6K
C418
1U_0402_6.3V6K
C419
1U_0402_6.3V6K
C420
1U_0402_6.3V6K
C421
1U_0402_6.3V6K
C422
1U_0402_6.3V6K
C423
1U_0402_6.3V6K
C424
1U_0402_6.3V6K
C425
VDDC#11 AB26 1 1 1 1 1 1 1 1 1 1
+3VSG VDDC#12 AB28
1 1 1 VDDC#13 AC17
0.1U_0402_16V4Z
C427
VGA@ VGA@ AC20 VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@
VDDC#14 2 2 2 2 2 2 2 2 2 2
10U_0603_6.3V6M
C415
1U_0402_6.3V6K
C426
LEVEL
VGA@
20mil TRANSLATION VDDC#15 AC22
VDDC#16 AC24
2 2 2
POWER
+VDD_CT AF26 AC27
VDD_CT#1 VDDC#17
AF27 VDD_CT#2 VDDC#18 AD18
10U_0603_6.3V6M
C428
10U_0603_6.3V6M
C429
10U_0603_6.3V6M
C430
10U_0603_6.3V6M
C431
10U_0603_6.3V6M
C432
10U_0603_6.3V6M
C433
10U_0603_6.3V6M
C434
AG26 VDD_CT#3 219mA VDDC#19 AD21 1 1 1 1 1 1 1 1
VGA@
1
VGA@
2
AG27 VDD_CT#4 VDDC#20 AD23 2
AD26 + C435 + C436
VDDC#21 VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ 330U_2.5V_M 330U_2.5V_M
SM010030010 +1.8VSG
L16
2 1
VGA@ VGA@ VGA@ I/O VDDC#22 AF17
2 2 2 2 2 2 2
VDDC#23 AF20
300ma 120ohm@100mhz DCR 0.3 120ohm/0.3ABLM18AG121SN1D_2P 1 1 1 +VDDR3 AF23 AF22
2 2
VDDR3#1 VDDC#24
10U_0603_6.3V6M
C437
1U_0402_6.3V6K
C438
0.1U_0402_16V4Z
C439
VGA@ 10mil AF24 VDDR3#2 VDDC#25 AG16
AG23 VDDR3#3 60mA VDDC#26 AG18
AG24 VDDR3#4 VDDC#27 AG21
2 2 2
20mil 47A VDDC#28 AH22
VDDC#29 AH27
+VDDR4_5 AF13 AH28
VDDR4#4 VDDC#30
AF15 VDDR4#5 VDDC#31 M26 BIF_VDDC
AG13 VDDR4#7 VDDC#32 N24 Park/Madison:Connect to VDDC
AG15 N27 +BIF_VDDC +BIF_VDDC
VDDR4#8 VDDC/BIF_VDDC#33 Seymour/Whisler:
170mA VDDC#34 R18
VDDC#35 R21 dGPU operating:VDDC
AD12 VDDR4#1 VDDC#36 R23 BACO mode:+1.0V
AF11 VDDR4#2 55mA VDDC#37 R26
AF12 VDDR4#3 VDDC#38 T17
AG11 VDDR4#6 VDDC#39 T20 2010/04/27
VDDC#40 T22 non-BACO design,N27,T27
VDDC#41 T24
connect BIF_VDDC to VDDC
470ohm/1A VDDC/BIF_VDDC#42 T27
VDDC#43 U16 For BACO design
SM010030010 M20 NC_VDDRHA VDDC#44 U18
M21 NC_VSSRHA VDDC#45 U21
200ma 120ohm@100mhz DCR 0.2 U23
VDDC#46
VDDC#47 U26
L17 V12 V17
NC_VDDRHB VDDC#48
+1.8VSG 2 1 U12 NC_VSSRHB VDDC#49 V20
BLM18AG121SN1D_2P VGA@ VGA@ VGA@ VGA@ VGA@ V22
VGA@ VDDC#50
1 1 1 1 1 VDDC#51 V24
10U_0603_6.3V6M
C440
1U_0402_6.3V6K
C441
0.1U_0402_16V4Z
C442
1U_0402_6.3V6K
C443
0.1U_0402_16V4Z
C444
VDDC#52 V27 VDDCI and VDDC should have seperate regulators with a merge option on PCB
VDDC#53 Y16
PLL Y18 For Madison and Park, VDDCI and VDDC can share one common regulator
2 2 2 2 2 VDDC#54
3
VDDC#55 Y21 3
VDDC#56 Y23 (GDDR3/DDR3 1.12V@4A VDDCI)

SM010030010 20mil +MPV_18
H7 MPV18#1 VDDC#57 Y26
200ma 120ohm@100mhz DCR 0.2
H8 MPV18#2 150mA VDDC#58 Y28 SM01000BY00 5000ma 120ohm@100mhz DCR 0.02
L20 +VDDCI
10mil +SPV_18
Granville VDDCI:4.6A L19 VGA@
+1.8VSG 2 1
BLM18AG121SN1D_2P VGA@ VGA@ VGA@ L18
AM10 SPV18 75mA +VDDCI
160mil
VGA@
20mil +SPV10 VDDCI#1 AA13
VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@
2 1
FBMA-L11-201209-121LMA50T_0805
+VGA_CORE
1 1 1 +1.0VSG 2 1 AN9 SPV10 120mA VDDCI#2 AB13
10U_0603_6.3V6M
C458
1U_0402_6.3V6K
C459
0.1U_0402_16V4Z
C460
VGA@ VGA@ VGA@ AC12 1 1 1 1 1 1 1 1 1 1

VDDCI#3
10U_0603_6.3V6M
C445
1U_0402_6.3V6K
C446
0.1U_0402_16V4Z
C447
1U_0402_6.3V6K
C448
1U_0402_6.3V6K
C449
1U_0402_6.3V6K
C450
1U_0402_6.3V6K
C451
1U_0402_6.3V6K
C452
1U_0402_6.3V6K
C453
1U_0402_6.3V6K
C454
1U_0402_6.3V6K
C455
1U_0402_6.3V6K
C456
1U_0402_6.3V6K
C457
BLM18AG121SN1D_2P 1 1 1 AN10 AC15 L21 VGA@
VGA@ SPVSS VDDCI#4
VDDCI#5 AD13 2 1
2 2 2 FBMA-L11-201209-121LMA50T_0805
470ohm/1A VDDCI#6 AD16
2 2 2 2 2 2 2 2 2 2
SM010030010 2 2 2 VDDCI#7 M15
M16
200ma 120ohm@100mhz DCR 0.2 VOLTAGE VDDCI#8
SENESE
5A VDDCI#9 M18
VDDCI#10 M23
GCORE_SEN
10mil VDDCI#11 N13 No Pop for Heathrow and Chelsea
<49> GCORE_SEN AF28 FB_VDDC VDDCI#12 N15
VDDCI#13 N17
VDDCI#14 N20
VDDCI_SEN AG28 N22 VGA@ VGA@ VGA@ VGA@ VGA@
<45> VDDCI_SEN FB_VDDCI ISOLATED VDDCI#15
1U_0402_6.3V6K
C461
0.1U_0402_16V4Z
C462
10U_0603_6.3V6M
C463
10U_0603_6.3V6M
C464
10U_0603_6.3V6M
C465
R12
CORE I/O VDDCI#16 R13 1 1 1 1 1
FB_GND VDDCI#17
AH29 FB_GND VDDCI#18 R16
VDDCI#19 T12
1
VDDCI#20 T15
@ 2 2 2 2 2
VDDCI#21 V15
R466 Y13
0_0402_5% VDDCI#22
2
S IC 216-0833000 A11 THAMES XT M2

THA@
4 4

SCHEMATIC,MB A8331
Custom B
4019H2
A B C D E
A B C D E
U8F
DPA_VDD18,DPA_PVDD,DPB_VDD18,DPB_PVDD Seymour/Whistler：
can combian to DPAB_VDD18 DPA_VDD10,DPB_VDD10
DPC_VDD18,DPC_PVDD,DPD_VDD18,DPD_PVDD can combian to DPAB_VDD10
AB39 PCIE_VSS#1 GND#1 A3 can combian to DPCD_VDD18 DPC_VDD10,DPD_VDD10
E39 PCIE_VSS#2 GND#2 A37 (DPD_VDD18,DPD_PVDD not applicable on Robson/Park) can combian to DPCD_VDD10
F34 PCIE_VSS#3 GND#3 AA16
F39 PCIE_VSS#4 GND#4 AA18 DPE_VDD18,DPE_PVDD,DPF_VDD18,DPF_PVDD DPE_VDD10,DPD_VDD10
G33 PCIE_VSS#5 GND#5 AA2 can combian to DPEF_VDD18 can combian to DPEF_VDD10
G34 PCIE_VSS#6 GND#6 AA21
H31 PCIE_VSS#7 GND#7 AA23
H34 AA26
H39
PCIE_VSS#8 GND#8
AA28
DPx-VSSR,DPx_PVSS can combian to DP_VSSR
PCIE_VSS#9 GND#9
1
J31 PCIE_VSS#10 GND#10 AA6 (Manhatann should have individual GND) 1
J34 AB12
K31
PCIE_VSS#11 GND#11
AB15 where x is A,B,C,D,E,F
PCIE_VSS#12 GND#12
K34 PCIE_VSS#13 GND#13 AB17
K39 AB20 U8H SM01000BL00
PCIE_VSS#14 GND#14
L31 PCIE_VSS#15 GND#15 AB22 1000ma 470ohm@100mhz DCR 0.2
L34 AB24 DP C/D POWER DP A/B POWER
PCIE_VSS#16 GND#16 L23
M34 PCIE_VSS#17 GND#17 AB27 Manhatann:300mA 20mil 20mil MCK1608471YZF_0603
M39 PCIE_VSS#18 GND#18 AC11
Seymour:150mA +DPABCD_VDD18
AP20 DPCD/DPC_VDD18#1 DPAB/DPA_VDD18#1 AN24
+DPABCD_VDD18
300mA
N31 PCIE_VSS#19 GND#19 AC13 AP21 DPCD/DPC_VDD18#2 DPAB/DPA_VDD18#2 AP24 2 1 +1.8VSG
N34 AC16 VGA@
PCIE_VSS#20 GND#20
P31 PCIE_VSS#21 GND#21 AC18 1 1 1
P34 AC2 20mil 20mil VGA@ VGA@ VGA@
PCIE_VSS#22 GND#22
10U_0603_6.3V6M
C469
0.1U_0402_16V4Z
C470
1U_0402_6.3V6K
C471
P39 PCIE_VSS#23 GND#23 AC21 AP13 DPCD/DPC_VDD10#1 DPAB/DPA_VDD10#1 AP31
R34 AC23 +DPABCD_VDD10 AT13 AP32 +DPABCD_VDD10
PCIE_VSS#24 GND#24 DPCD/DPC_VDD10#2 DPAB/DPA_VDD10#2 2 2 2
T31 PCIE_VSS#25 GND#25 AC26
T34 PCIE_VSS#26 GND#26 AC28
T39 PCIE_VSS#27 GND#27 AC6 AN17 DP/DPC_VSSR#1 DP/DPA_VSSR#1 AN27
U31 PCIE_VSS#28 GND#28 AD15 AP16 DP/DPC_VSSR#2 DP/DPA_VSSR#2 AP27
U34 PCIE_VSS#29 GND#29 AD17 AP17 DP/DPC_VSSR#3 DP/DPA_VSSR#3 AP28
V34 PCIE_VSS#30 GND#30 AD20 AW14 DP/DPC_VSSR#4 DP/DPA_VSSR#4 AW24
V39 PCIE_VSS#31 GND#31 AD22 AW16 DP/DPC_VSSR#5 DP/DPA_VSSR#5 AW26
W31 PCIE_VSS#32 GND#32 AD24
W34 PCIE_VSS#33 GND#33 AD27
Y34 PCIE_VSS#34 GND#34 AD9 20mil 20mil
Y39 PCIE_VSS#35 GND#35 AE2 AP22 DPCD/DPD_VDD18#1 DPAB/DPB_VDD18#1 AP25
AE6 +DPABCD_VDD18 AP23 AP26 +DPABCD_VDD18 SM01000BL00
GND#36 DPCD/DPD_VDD18#2 DPAB/DPB_VDD18#2
GND#37 AF10 1000ma 470ohm@100mhz DCR 0.2
GND#38 AF16 20mil L25
GND#39 AF18
+DPABCD_VDD10
20mil MCK1608471YZF_0603
AF21 Manhatann:220mA AP14 AN33 220mA
F15 GND#100
GND GND#40
GND#41
GND#42
AG17
AG2 Seymour:110mA
AP15
DPCD/DPD_VDD10#1
DPCD/DPD_VDD10#2
DPAB/DPB_VDD10#1
DPAB/DPB_VDD10#2 AP33 +DPABCD_VDD10 2
VGA@
1 +1.0VSG
2 2
F17 GND#101 GND#43 AG20
F19 GND#102 GND#44 AG22 1 VGA@ 1 VGA@ 1 VGA@
0.1U_0402_16V4Z
C475
1U_0402_6.3V6K
C476
10U_0603_6.3V6M
C477
F21 GND#103 GND#45 AG6 AN19 DP/DPD_VSSR#1 DP/DPB_VSSR#1 AN29
F23 GND#104 GND#46 AG9 AP18 DP/DPD_VSSR#2 DP/DPB_VSSR#2 AP29
F25 GND#105 GND#47 AH21 AP19 DP/DPD_VSSR#3 DP/DPB_VSSR#3 AP30
2 2 2
F27 GND#106 GND#48 AJ10 AW20 DP/DPD_VSSR#4 DP/DPB_VSSR#4 AW30
F29 GND#107 GND#49 AJ11 AW22 DP/DPD_VSSR#5 DP/DPB_VSSR#5 AW32
F31 GND#108 GND#50 AJ2
F33 AJ28 R467 R468
GND#109 GND#51 150_0402_1% 150_0402_1%
F7 GND#110 GND#52 AJ6 SM01000BL00 DP mode:300mA
F9 GND#111 GND#53 AK11 1000ma 470ohm@100mhz DCR 0.2 2 1 AW18 DPCD_CALR DPAB_CALR AW28 1 2
G2 AK31 LVDS mode:440mA VGA@ VGA@
GND#112 GND#54 L26
G6 GND#113 GND#55 AK7
MCK1608471YZF_0603
20mil 20mA
H9 GND#114 GND#56 AL11
+DPEF_VDD18
DP E/F POWER DP PLL POWER
+DPABCD_VDD18
10mil
J2 GND#115 GND#57 AL14 +1.8VSG 2 1 AH34 DPEF/DPE_VDD18#1 DPAB_VDD18/DPA_PVDD AU28
J27 AL17 VGA@ AJ34 AV27
GND#116 GND#58 DPEF/DPE_VDD18#2 DP_VSSR/DPA_PVSS
J6 GND#117 GND#59 AL2 1 VGA@ 1 VGA@ 1 VGA@
10U_0603_6.3V6M
C478
1U_0402_6.3V6K
C479
0.1U_0402_16V4Z
C480
J8 GND#118 GND#60 AL20
PX_EN
20mil 20mA
K14 GND#119 GND/PX_EN#61 AL21 PX_EN <20>
+DPEF_VDD10 +DPABCD_VDD18
10mil
K7 GND#120 GND#62 AL23 AL33 DPEF/DPE_VDD10#1 DPAB_VDD18/DPB_PVDD AV29
2 2 2
L11 GND#121 GND#63 AL26 PX_EN: PU at P.20 AM33 DPEF/DPE_VDD10#2 DP_VSSR/DPB_PVSS AR28
L17 GND#122 GND#64 AL32
L2 AL6 SBIOS will control VGA power on/off. 20mA
GND#123 GND#65
L22 GND#124 GND#66 AL8 High :BACO mode enable +DPABCD_VDD18
10mil
L24 GND#125 GND#67 AM11 AN34 DP/DPE_VSSR#1 DPCD_VDD18/DPC_PVDD AU18
L6 GND#126 GND#68 AM31 LOW:BACO disable AP39 DP/DPE_VSSR#2 DP_VSSR/DPC_PVSS AV17
M17 GND#127 GND#69 AM9 AR39 DP/DPE_VSSR#3
M22 GND#128 GND#70 AN11 AU37 DP/DPE_VSSR#4 20mA
M24 GND#129 GND#71 AN2
+DPABCD_VDD18
10mil
N16 GND#130 GND#72 AN30 DPCD_VDD18/DPD_PVDD AV19
N18 GND#131 GND#73 AN6 DP_VSSR/DPD_PVSS AR18
3
N2 GND#132 GND#74 AN8 20mil 3
N21 GND#133 GND#75 AP11
+DPEF_VDD18
AF34 DPEF/DPF_VDD18#1 20mA
N23 GND#134 GND#76 AP7 SM01000BL00 AG34 DPEF/DPF_VDD18#2 10mil
N26 AP9 AM37 +DPEF_VDD18
GND#135 GND#77 1000ma 470ohm@100mhz DCR 0.2 DPEF_VDD18/DPE_PVDD
N6 GND#136 GND#78 AR5
L27
DP mode:220mA 20mil DP_VSSR/DPE_PVSS AN38
R15 GND#137 GND#79 B11
R17 B13 MCK1608471YZF_0603 LVDS mode:240mA AK33 20mA
GND#138 GND#80 +DPEF_VDD10 DPEF/DPF_VDD10#1
R2 GND#139 GND#81 B15 +1.0VSG 2
VGA@
1 AK34 DPEF/DPF_VDD10#2 +DPEF_VDD18
10mil
R20 GND#140 GND#82 B17 DPEF_VDD18/DPF_PVDD AL38
R22 GND#141 GND#83 B19 1 VGA@ 1 VGA@ 1 VGA@ DP_VSSR/DPF_PVSS AM35
10U_0603_6.3V6M
C481
1U_0402_6.3V6K
C482
0.1U_0402_16V4Z
C483
R24 GND#142 GND#84 B21
R27 GND#143 GND#85 B23 AF39 DP/DPF_VSSR#1
R6 GND#144 GND#86 B25 AH39 DP/DPF_VSSR#2
2 2 2
T11 GND#145 GND#87 B27 AK39 DP/DPF_VSSR#3
T13 GND#146 GND#88 B29 AL34 DP/DPF_VSSR#4
T16 GND#147 GND#89 B31 AM34 DP/DPF_VSSR#5
T18 GND#148 GND#90 B33
T21 GND#149 GND#91 B7
T23 B9 R470
GND#150 GND#92
T26 GND#151 GND#93 C1 2 1 AM39 DPEF_CALR
U15 C39 VGA@
GND#153 GND#94 150_0402_1%
U17 GND#154 GND#95 E35
U2 E5 S IC 216-0833000 A11 THAMES XT M2
GND#155 GND#96 THA@
U20 GND#156 GND#97 F11
U22 GND#157 GND#98 F13
U24 GND#158
U27 GND#159
U6 GND#160
V11 GND#161
V16 GND#163 Park/Madison :AL21left NC
V18 GND#164
V21 GND#165
V23 GND#166 Seymour/Whistler:
4 4
V26 GND#167
W2 GND#168
AL21:PX_EN
W6 GND#169 use to control discreate GPU regulators
Y15 GND#170
Y17 GND#171
for power express BACO mode
Y20 GND#172 Support BACO:
Y22 GND#173 VSS_MECH#1 A39
Y24 GND#174 VSS_MECH#2 AW1 output High3.3V:turn off regulators (BACO mode on) Security Classification Compal Secret Data Compal Electronics, Inc.
Y27 AW39
U13
GND#175 VSS_MECH#3 output Low0V:turn on regulators (BACO mode off) 2011/07/08 2015/07/08 Title
GND#152 Issued Date Deciphered Date
V13 GND#162 need PD resistor SCHEMATIC,MB A8331
S IC 216-0833000 A11 THAMES XT M2 No support BACO: THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THA@ left NC DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom B
REF137-13 update MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4019H2
A B C D E
A B C D E
U11 U12 U13 U14
VREFCA_A1 M8 E3 MDA22 VREFCA_A2 M8 E3 MDA25 VREFCA_A3 M8 E3 MDA35 VREFCA_A4 M8 E3 MDA48

VREFDA_Q1 H1 VREFCA DQL0 MDA19 VREFDA_Q2 VREFCA DQL0 MDA30 VREFDA_Q3 VREFCA DQL0 MDA32 VREFDA_Q4 VREFCA DQL0 MDA51
VREFDQ DQL1 F7 H1 VREFDQ DQL1 F7 H1 VREFDQ DQL1 F7 H1 VREFDQ DQL1 F7
F2 MDA21 F2 MDA24 F2 MDA38 F2 MDA55
MAA0 DQL2 MDA18 MAA0 DQL2 MDA29 MAA0 DQL2 MDA34 MAA0 DQL2 MDA54
N3 A0 DQL3 F8 N3 A0 DQL3 F8 N3 A0 DQL3 F8 N3 A0 DQL3 F8
MAA1 P7 H3 MDA23 MAA1 P7 H3 MDA26 MAA1 P7 H3 MDA37 MAA1 P7 H3 MDA50
MAA2 A1 DQL4 MDA16 MAA2 A1 DQL4 MDA31 MAA2 A1 DQL4 MDA36 MAA2 A1 DQL4 MDA52
P3 A2 DQL5 H8 P3 A2 DQL5 H8 P3 A2 DQL5 H8 P3 A2 DQL5 H8
MAA3 N2 G2 MDA20 MAA3 N2 G2 MDA27 MAA3 N2 G2 MDA39 MAA3 N2 G2 MDA49
MAA4 A3 DQL6 MDA17 MAA4 A3 DQL6 MDA28 MAA4 A3 DQL6 MDA33 MAA4 A3 DQL6 MDA53
MAA5 P2 MAA5 P2 MAA5 P2 MAA5 P2
MAA6 A5 MAA6 A5 MAA6 A5 MAA6 A5
R8 A6 R8 A6 R8 A6 R8 A6
MAA7 R2 D7 MDA0 MAA7 R2 D7 MDA15 MAA7 R2 D7 MDA43 MAA7 R2 D7 MDA63
MAA8 A7 DQU0 MDA5 MAA8 A7 DQU0 MDA11 MAA8 A7 DQU0 MDA44 MAA8 A7 DQU0 MDA58
T8 A8 DQU1 C3 T8 A8 DQU1 C3 T8 A8 DQU1 C3 T8 A8 DQU1 C3
MAA9 R3 C8 MDA1 MAA9 R3 C8 MDA14 MAA9 R3 C8 MDA40 MAA9 R3 C8 MDA60
1 MAA10 A9 DQU2 MDA7 MAA10 A9 DQU2 MDA10 MAA10 A9 DQU2 MDA45 MAA10 A9 DQU2 MDA59 1
L7 A10/AP DQU3 C2 L7 A10/AP DQU3 C2 L7 A10/AP DQU3 C2 L7 A10/AP DQU3 C2
MAA11 R7 A7 MDA3 MAA11 R7 A7 MDA13 MAA11 R7 A7 MDA42 MAA11 R7 A7 MDA61
MAA12 A11 DQU4 MDA4 MAA12 A11 DQU4 MDA9 MAA12 A11 DQU4 MDA46 MAA12 A11 DQU4 MDA56
N7 A12 DQU5 A2 N7 A12 DQU5 A2 N7 A12 DQU5 A2 N7 A12 DQU5 A2
MAA13 T3 B8 MDA2 MAA13 T3 B8 MDA12 MAA13 T3 B8 MDA41 MAA13 T3 B8 MDA62
A13 DQU6 MDA6 A13 DQU6 MDA8 A13 DQU6 MDA47 A13 DQU6 MDA57
T7 A14 DQU7 A3 T7 A14 DQU7 A3 T7 A14 DQU7 A3 T7 A14 DQU7 A3
M7 A15/BA3 M7 A15/BA3 M7 A15/BA3 M7 A15/BA3
+1.5VSG +1.5VSG +1.5VSG +1.5VSG
M2 B2 A_BA0 M2 B2 A_BA0 M2 B2 A_BA0 M2 B2

<15> A_BA0 BA0 VDD BA0 VDD BA0 VDD BA0 VDD
N8 D9 A_BA1 N8 D9 A_BA1 N8 D9 A_BA1 N8 D9
M3 G7 A_BA2 M3 G7 A_BA2 M3 G7 A_BA2 M3 G7
VDD K2 VDD K2 VDD K2 VDD K2
MDA[0..63] N1 N1 N1 N1
<15> MDA[0..63] VDD VDD VDD VDD
CLKA0 J7 N9 CLKA0 J7 N9 CLKA1 J7 N9 CLKA1 J7 N9
CLKA0# CK VDD CLKA0# CK VDD CLKA1# CK VDD CLKA1# CK VDD
K7 CK VDD R1 K7 CK VDD R1 K7 CK VDD R1 K7 CK VDD R1
K9 R9 CKEA0 K9 R9 K9 R9 CKEA1 K9 R9
<15> CKEA0 CKE/CKE0 VDD +1.5VSG CKE/CKE0 VDD +1.5VSG <15> CKEA1 CKE/CKE0 VDD +1.5VSG CKE/CKE0 VDD +1.5VSG
ODTA0_1 K1 A1 ODTA0_1 K1 A1 ODTA1_1 K1 A1 ODTA1_1 K1 A1

<15> MAA[13..0] ODT/ODT0 VDDQ ODT/ODT0 VDDQ ODT/ODT0 VDDQ ODT/ODT0 VDDQ
L2 A8 CSA0#_0 L2 A8 L2 A8 CSA1#_0 L2 A8
<15> CSA0#_0 CS/CS0 VDDQ CS/CS0 VDDQ <15> CSA1#_0 CS/CS0 VDDQ CS/CS0 VDDQ
J3 C1 RASA0# J3 C1 J3 C1 RASA1# J3 C1
<15> RASA0# RAS VDDQ RAS VDDQ <15> RASA1# RAS VDDQ RAS VDDQ
K3 C9 CASA0# K3 C9 K3 C9 CASA1# K3 C9
<15> CASA0# CAS VDDQ CAS VDDQ <15> CASA1# CAS VDDQ CAS VDDQ
L3 D2 WEA0# L3 D2 L3 D2 WEA1# L3 D2
<15> WEA0# WE VDDQ WE VDDQ <15> WEA1# WE VDDQ WE VDDQ
<15> DQMA#[7..0] VDDQ E9 VDDQ E9 VDDQ E9 VDDQ E9
VDDQ F1 VDDQ F1 VDDQ F1 VDDQ F1
QSA2 F3 H2 QSA3 F3 H2 QSA4 F3 H2 QSA6 F3 H2
QSA0 DQSL VDDQ QSA1 DQSL VDDQ QSA5 DQSL VDDQ QSA7 DQSL VDDQ
C7 DQSU VDDQ H9 C7 DQSU VDDQ H9 C7 DQSU VDDQ H9 C7 DQSU VDDQ H9
<15> QSA[7..0]
DQMA#2 E7 A9 DQMA#3 E7 A9 DQMA#4 E7 A9 DQMA#6 E7 A9
DQMA#0 DML VSS DQMA#1 DML VSS DQMA#5 DML VSS DQMA#7 DML VSS
D3 DMU VSS B3 D3 DMU VSS B3 D3 DMU VSS B3 D3 DMU VSS B3
2 2
VSS E1 VSS E1 VSS E1 VSS E1
VSS G8 VSS G8 VSS G8 VSS G8
QSA#2 G3 J2 QSA#3 G3 J2 QSA#4 G3 J2 QSA#6 G3 J2
<15> QSA#[7..0] DQSL VSS DQSL VSS DQSL VSS DQSL VSS
QSA#0 B7 J8 QSA#1 B7 J8 QSA#5 B7 J8 QSA#7 B7 J8
DQSU VSS DQSU VSS DQSU VSS DQSU VSS
VSS M1 VSS M1 VSS M1 VSS M1
VSS P1 VSS P1 VSS P1 VSS P1
VRAM_RST# T2 P9 VRAM_RST# T2 P9 VRAM_RST# T2 P9 VRAM_RST# T2 P9
<15,19> VRAM_RST# RESET VSS RESET VSS RESET VSS RESET VSS
VSS T1 VSS T1 VSS T1 VSS T1
L8 ZQ/ZQ0 VSS T9 L8 ZQ/ZQ0 VSS T9 L8 ZQ/ZQ0 VSS T9 L8 ZQ/ZQ0 VSS T9
1
1
J1 NC/ODT1 VSSQ B1 J1 NC/ODT1 VSSQ B1 J1 NC/ODT1 VSSQ B1 J1 NC/ODT1 VSSQ B1
R471 L1 B9 R472 L1 B9 R473 L1 B9 R474 L1 B9
243_0402_1% NC/CS1 VSSQ 243_0402_1% NC/CS1 VSSQ 243_0402_1% NC/CS1 VSSQ 243_0402_1% NC/CS1 VSSQ
J9 NC/CE1 VSSQ D1 J9 NC/CE1 VSSQ D1 J9 NC/CE1 VSSQ D1 J9 NC/CE1 VSSQ D1
128@ L9 D8 128@ L9 D8 128@ L9 D8 128@ L9 D8
NCZQ1 VSSQ NCZQ1 VSSQ NCZQ1 VSSQ NCZQ1 VSSQ
E2 E2 E2 E2
2
2
VSSQ VSSQ VSSQ VSSQ
VSSQ E8 VSSQ E8 VSSQ E8 VSSQ E8
VSSQ F9 VSSQ F9 VSSQ F9 VSSQ F9
VSSQ G1 VSSQ G1 VSSQ G1 VSSQ G1
96-BALL 96-BALL 96-BALL 96-BALL

SDRAM DDR3 SDRAM DDR3 SDRAM DDR3 SDRAM DDR3
K4W1G1646G-BC11_FBGA96 K4W1G1646G-BC11_FBGA96 K4W1G1646G-BC11_FBGA96 K4W1G1646G-BC11_FBGA96
+1.5VSG X76@ X76@ X76@ X76@
+1.5VSG +1.5VSG +1.5VSG +1.5VSG +1.5VSG +1.5VSG +1.5VSG +1.5VSG
Pull high for Madison and Park...
ODTA0_1
1
1
R484 R475 R476 R477 R478 R479 R480 R481 R482
128@ 56_0402_1% 4.99K_0402_1% 128@ 4.99K_0402_1% 128@ 4.99K_0402_1% 128@ 4.99K_0402_1% 128@ 4.99K_0402_1% 128@ 4.99K_0402_1%
128@ 4.99K_0402_1% 128@ 4.99K_0402_1% 128@
3 ODTA0 2 3
<15> ODTA0 1 1 2
R483 0_0402_5% 128@ 15mil 15mil 15mil 15mil 15mil 15mil 15mil 15mil
2
2
R486 VREFCA_A1 VREFDA_Q1 VREFCA_A2 VREFDA_Q2 VREFCA_A3 VREFDA_Q3 VREFCA_A4 VREFDA_Q4
R485 0_0402_5% 56_0402_1%
1
1
ODTA1 2 1 1 2 1 1 1 1 1 1 1 1
<15> ODTA1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
128@ 128@ R487 C484 R488 R489 C486 R490 C487 R491 C488 R492 C489 R493 C490 R494 C491
4.99K_0402_1% 4.99K_0402_1% C485 4.99K_0402_1% 4.99K_0402_1% 4.99K_0402_1% 4.99K_0402_1% 128@ 4.99K_0402_1% 4.99K_0402_1% 128@
ODTA1_1 128@ 128@ 128@ 128@ 128@ 128@ 128@ 128@ 128@ 128@ 128@ 128@ 128@ 128@
2 2 2 2 2 2 2 2
2
2
+1.5VSG +1.5VSG +1.5VSG
+1.5VSG
128@ 128@ 128@ 128@ 128@ 128@ 128@ 128@ 128@ 128@ 128@ 128@ 128@ 128@ 128@
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 128@ 128@ 128@ 128@ 128@
1U_0402_6.3V6K
C492
1U_0402_6.3V6K
C493
1U_0402_6.3V6K
C494
1U_0402_6.3V6K
C495
1U_0402_6.3V6K
C496
1U_0402_6.3V6K
C497
1U_0402_6.3V6K
C498
1U_0402_6.3V6K
C499
1U_0402_6.3V6K
C500
1U_0402_6.3V6K
C501
1U_0402_6.3V6K
C502
1U_0402_6.3V6K
C503
1U_0402_6.3V6K
C504
1U_0402_6.3V6K
C505
1U_0402_6.3V6K
C506
128@ 1 1 1 1 1
1U_0402_6.3V6K
C507
1U_0402_6.3V6K
C508
1U_0402_6.3V6K
C509
1U_0402_6.3V6K
C510
1U_0402_6.3V6K
C511
<15> CLKA0 1 2
R495 56_0402_1%
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
128@ 2 2 2 2 2
<15> CLKA0# 1 2
R496 56_0402_1%
+1.5VSG
1
+1.5VSG
128@ C512
.01U_0402_16V7K 128@ 128@ 128@ 128@
2 128@ 128@ 128@ 128@ 1 10U_0603_6.3V6M 1 1 1
C519
10U_0603_6.3V6M
C520
10U_0603_6.3V6M
C517
10U_0603_6.3V6M
C518
1 1 1 1
4 128@ 4
10U_0603_6.3V6M
C513
10U_0603_6.3V6M
C514
10U_0603_6.3V6M
C515
10U_0603_6.3V6M
C516
<15> CLKA1 1 2
R497 56_0402_1% 2 2 2 2
2 2 2 2
128@
<15> CLKA1# 1 2
R498 56_0402_1%
1
C521 Security Classification Compal Secret Data Compal Electronics, Inc.
128@ .01U_0402_16V7K 2011/07/08 2015/07/08 Title
Issued Date Deciphered Date
2
SCHEMATIC,MB A8331
A B C D E
A B C D E
U15 U16 U17 U18
VREFCB_A1 M8 E3 MDB26 VREFCB_A2 M8 E3 MDB22 VREFCB_A3 M8 E3 MDB35 VREFCB_A4 M8 E3 MDB55

VREFDB_Q1 H1 VREFCA DQL0 MDB28 VREFDB_Q2 H1 VREFCA DQL0 MDB20 VREFDB_Q3 H1 VREFCA DQL0 MDB37 VREFDB_Q4 H1 VREFCA DQL0 MDB49
VREFDQ DQL1 F7 VREFDQ DQL1 F7 VREFDQ DQL1 F7 VREFDQ DQL1 F7
F2 MDB27 F2 MDB21 F2 MDB34 F2 MDB52
MAB0 DQL2 MDB31 MAB0 DQL2 MDB18 MAB0 DQL2 MDB39 MAB0 DQL2 MDB50
N3 A0 DQL3 F8 N3 A0 DQL3 F8 N3 A0 DQL3 F8 N3 A0 DQL3 F8
MAB1 P7 H3 MDB25 MAB1 P7 H3 MDB19 MAB1 P7 H3 MDB33 MAB1 P7 H3 MDB53
MAB2 A1 DQL4 MDB30 MAB2 A1 DQL4 MDB17 MAB2 A1 DQL4 MDB38 MAB2 A1 DQL4 MDB48
MAB3 N2 G2 MDB24 MAB3 N2 G2 MDB23 MAB3 N2 G2 MDB32 MAB3 N2 G2 MDB54
MAB4 A3 DQL6 MDB29 MAB4 A3 DQL6 MDB16 MAB4 A3 DQL6 MDB36 MAB4 A3 DQL6 MDB51
MAB5 P2 MAB5 P2 MAB5 P2 MAB5 P2
MAB6 A5 MAB6 A5 MAB6 A5 MAB6 A5
R8 A6 R8 A6 R8 A6 R8 A6
MAB7 R2 D7 MDB15 MAB7 R2 D7 MDB1 MAB7 R2 D7 MDB44 MAB7 R2 D7 MDB56
MAB8 A7 DQU0 MDB10 MAB8 A7 DQU0 MDB6 MAB8 A7 DQU0 MDB43 MAB8 A7 DQU0 MDB59
T8 A8 DQU1 C3 T8 A8 DQU1 C3 T8 A8 DQU1 C3 T8 A8 DQU1 C3
MAB9 R3 C8 MDB12 MAB9 R3 C8 MDB0 MAB9 R3 C8 MDB47 MAB9 R3 C8 MDB63
1 MAB10 A9 DQU2 MDB11 MAB10 A9 DQU2 MDB4 MAB10 A9 DQU2 MDB41 MAB10 A9 DQU2 MDB62 1
L7 A10/AP DQU3 C2 L7 A10/AP DQU3 C2 L7 A10/AP DQU3 C2 L7 A10/AP DQU3 C2
MAB11 R7 A7 MDB13 MAB11 R7 A7 MDB3 MAB11 R7 A7 MDB45 MAB11 R7 A7 MDB57
MAB12 A11 DQU4 MDB9 MAB12 A11 DQU4 MDB7 MAB12 A11 DQU4 MDB40 MAB12 A11 DQU4 MDB61
N7 A12 DQU5 A2 N7 A12 DQU5 A2 N7 A12 DQU5 A2 N7 A12 DQU5 A2
MAB13 T3 B8 MDB14 MAB13 T3 B8 MDB2 MAB13 T3 B8 MDB46 MAB13 T3 B8 MDB58
A13 DQU6 MDB8 A13 DQU6 MDB5 A13 DQU6 MDB42 A13 DQU6 MDB60
T7 A14 DQU7 A3 T7 A14 DQU7 A3 T7 A14 DQU7 A3 T7 A14 DQU7 A3
M7 A15/BA3 M7 A15/BA3 M7 A15/BA3 M7 A15/BA3
+1.5VSG +1.5VSG +1.5VSG +1.5VSG
M2 B2 B_BA0 M2 B2 B_BA0 M2 B2 B_BA0 M2 B2

<15> B_BA0 BA0 VDD BA0 VDD BA0 VDD BA0 VDD
N8 D9 B_BA1 N8 D9 B_BA1 N8 D9 B_BA1 N8 D9
M3 G7 B_BA2 M3 G7 B_BA2 M3 G7 B_BA2 M3 G7
MDB[0..63] K8 K8 K8 K8
<15> MDB[0..63] VDD VDD VDD VDD
VDD N1 VDD N1 VDD N1 VDD N1
CLKB0 J7 N9 CLKB0 J7 N9 CLKB1 J7 N9 CLKB1 J7 N9
CLKB0# CK VDD CLKB0# CK VDD CLKB1# CK VDD CLKB1# CK VDD
K7 CK VDD R1 K7 CK VDD R1 K7 CK VDD R1 K7 CK VDD R1
K9 R9 CKEB0 K9 R9 K9 R9 CKEB1 K9 R9
<15> CKEB0 CKE/CKE0 VDD +1.5VSG CKE/CKE0 VDD +1.5VSG <15> CKEB1 CKE/CKE0 VDD +1.5VSG CKE/CKE0 VDD +1.5VSG
<15> MAB[13..0]
ODTB0_1 K1 A1 ODTB0_1 K1 A1 ODTB1_1 K1 A1 ODTB1_1 K1 A1
ODT/ODT0 VDDQ CSB0#_0 ODT/ODT0 VDDQ ODT/ODT0 VDDQ CSB1#_0 ODT/ODT0 VDDQ
<15> CSB0#_0 L2 CS/CS0 VDDQ A8 L2 CS/CS0 VDDQ A8 <15> CSB1#_0 L2 CS/CS0 VDDQ A8 L2 CS/CS0 VDDQ A8
J3 C1 RASB0# J3 C1 J3 C1 RASB1# J3 C1
<15> RASB0# RAS VDDQ RAS VDDQ <15> RASB1# RAS VDDQ RAS VDDQ
K3 C9 CASB0# K3 C9 K3 C9 CASB1# K3 C9
<15> CASB0# CAS VDDQ CAS VDDQ <15> CASB1# CAS VDDQ CAS VDDQ
L3 D2 WEB0# L3 D2 L3 D2 WEB1# L3 D2
<15> DQMB#[7..0] <15> WEB0# WE VDDQ WE VDDQ <15> WEB1# WE VDDQ WE VDDQ
VDDQ E9 VDDQ E9 VDDQ E9 VDDQ E9
VDDQ F1 VDDQ F1 VDDQ F1 VDDQ F1
QSB3 F3 H2 QSB2 F3 H2 QSB4 F3 H2 QSB6 F3 H2
QSB1 DQSL VDDQ QSB0 DQSL VDDQ QSB5 DQSL VDDQ QSB7 DQSL VDDQ
C7 DQSU VDDQ H9 C7 DQSU VDDQ H9 C7 DQSU VDDQ H9 C7 DQSU VDDQ H9
<15> QSB[7..0]
DQMB#3 E7 A9 DQMB#2 E7 A9 DQMB#4 E7 A9 DQMB#6 E7 A9
DQMB#1 DML VSS DQMB#0 DML VSS DQMB#5 DML VSS DQMB#7 DML VSS
D3 DMU VSS B3 D3 DMU VSS B3 D3 DMU VSS B3 D3 DMU VSS B3
2 2
VSS E1 VSS E1 VSS E1 VSS E1
<15> QSB#[7..0] VSS G8 VSS G8 VSS G8 VSS G8
QSB#3 G3 J2 QSB#2 G3 J2 QSB#4 G3 J2 QSB#6 G3 J2
QSB#1 DQSL VSS QSB#0 DQSL VSS QSB#5 DQSL VSS QSB#7 DQSL VSS
B7 DQSU VSS J8 B7 DQSU VSS J8 B7 DQSU VSS J8 B7 DQSU VSS J8
VSS P1 VSS P1 VSS P1 VSS P1
VRAM_RST# T2 P9 VRAM_RST# T2 P9 VRAM_RST# T2 P9 VRAM_RST# T2 P9
<15,18> VRAM_RST# RESET VSS RESET VSS RESET VSS RESET VSS
VSS T1 VSS T1 VSS T1 VSS T1
L8 ZQ/ZQ0 VSS T9 L8 ZQ/ZQ0 VSS T9 L8 ZQ/ZQ0 VSS T9 L8 ZQ/ZQ0 VSS T9
1
1
J1 NC/ODT1 VSSQ B1 J1 NC/ODT1 VSSQ B1 J1 NC/ODT1 VSSQ B1 J1 NC/ODT1 VSSQ B1
R499 L1 B9 R500 L1 B9 R501 L1 B9 R502 L1 B9
VGA@ NC/CS1 VSSQ VGA@ NC/CS1 VSSQ VGA@ NC/CS1 VSSQ VGA@ NC/CS1 VSSQ
243_0402_1% J9 NC/CE1 VSSQ D1 243_0402_1% J9 NC/CE1 VSSQ D1 243_0402_1% J9 NC/CE1 VSSQ D1 243_0402_1% J9 NC/CE1 VSSQ D1
L9 NCZQ1 VSSQ D8 L9 NCZQ1 VSSQ D8 L9 NCZQ1 VSSQ D8 L9 NCZQ1 VSSQ D8
E2 E2 E2 E2
2
2
VSSQ VSSQ VSSQ VSSQ
VSSQ E8 VSSQ E8 VSSQ E8 VSSQ E8
VSSQ F9 VSSQ F9 VSSQ F9 VSSQ F9
96-BALL 96-BALL 96-BALL 96-BALL

SDRAM DDR3 SDRAM DDR3 SDRAM DDR3 SDRAM DDR3
Pull high for Madison and Park... K4W1G1646G-BC11_FBGA96 K4W1G1646G-BC11_FBGA96 K4W1G1646G-BC11_FBGA96 K4W1G1646G-BC11_FBGA96
X76@ X76@ X76@ X76@
+1.5VSG +1.5VSG +1.5VSG +1.5VSG +1.5VSG
+1.5VSG +1.5VSG +1.5VSG +1.5VSG
1
1
ODTB0_1
1
R503 R504 R505 R506
R512 4.99K_0402_1% VGA@ 4.99K_0402_1% VGA@ 4.99K_0402_1% VGA@ 4.99K_0402_1% VGA@ R507 R508 R509 R510
3 VGA@ 56_0402_1% 4.99K_0402_1% VGA@ 4.99K_0402_1% VGA@ 4.99K_0402_1% VGA@ 4.99K_0402_1% VGA@ 3
ODTB0 R511 1 2
<15> ODTB0
2
2
VGA@
2
0_0402_5% VREFCB_A1 VREFDB_Q1 VREFCB_A2 VREFDB_Q2
R514 VREFCB_A3 VREFDB_Q3 VREFCB_A4 VREFDB_Q4
1
1
VGA@ 56_0402_1% 1 1 1 1
1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
ODTB1 R513 1 2 R515 C522 R516 C523 R517 C524 R518 C525 1 1 1 1
<15> ODTB1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
VGA@ 4.99K_0402_1% VGA@ 4.99K_0402_1% VGA@ 4.99K_0402_1% VGA@ 4.99K_0402_1% VGA@ R519 C526 R520 C527 R521 C528 R522 C529
0_0402_5% VGA@ VGA@ VGA@ VGA@ 4.99K_0402_1% VGA@ 4.99K_0402_1% VGA@ 4.99K_0402_1% VGA@ 4.99K_0402_1% VGA@
ODTB1_1 2 2 2 2 VGA@ VGA@ VGA@ VGA@
2
2
2 2 2 2
2
R523 56_0402_1%
1 2 +1.5VSG +1.5VSG
<15> CLKB0
VGA@ +1.5VSG +1.5VSG
R524 56_0402_1% VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@
1 2 1 1 1 1 1 1 1 1 1 1 VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@
<15> CLKB0#
1U_0402_6.3V6K
C531
1U_0402_6.3V6K
C532
1U_0402_6.3V6K
C533
1U_0402_6.3V6K
C534
1U_0402_6.3V6K
C535
1U_0402_6.3V6K
C536
1U_0402_6.3V6K
C537
1U_0402_6.3V6K
C538
1U_0402_6.3V6K
C539
1U_0402_6.3V6K
C540
VGA@ 1 1 1 1 1 1 1 1 1 1
1U_0402_6.3V6K
C541
1U_0402_6.3V6K
C542
1U_0402_6.3V6K
C543
1U_0402_6.3V6K
C544
1U_0402_6.3V6K
C545
1U_0402_6.3V6K
C546
1U_0402_6.3V6K
C547
1U_0402_6.3V6K
C548
1U_0402_6.3V6K
C549
1U_0402_6.3V6K
C550
1
VGA@ C530 2 2 2 2 2 2 2 2 2 2
+1.5VSG 2 2 2 2 2 2 2 2 2 2
.01U_0402_16V7K
2 +1.5VSG
R525
56_0402_1%
<15> CLKB1 1 2 1 VGA@ 1 VGA@ 1 VGA@ 1 VGA@
10U_0603_6.3V6M
C551
10U_0603_6.3V6M
C552
10U_0603_6.3V6M
C554
10U_0603_6.3V6M
C553
VGA@ 1 1 1 1
R526 VGA@ VGA@ VGA@ VGA@
10U_0603_6.3V6M
C555
10U_0603_6.3V6M
C556
10U_0603_6.3V6M
C557
10U_0603_6.3V6M
C558
56_0402_1%
2 2 2 2
<15> CLKB1# 1 2
4 VGA@ 2 2 2 2 4
1
VGA@ C559
.01U_0402_16V7K
2

SCHEMATIC,MB A8331
A B C D E
5 4 3 2 1
VGA Muxless and Dis only Status Mapping table

Power Sequence of Thames
Dis only Muxless High performance GPU Muxless Power-saving GPU
VGA_PWR_ON 1 1 0
SUSP#
1.5_VDDC_PWREN 1 1 0
+3VSG +3.3VSG ON ON OFF
+1.8VSG ON ON OFF
VGA_ON 10ms
+1.0VSG ON ON OFF
D VGA_PWR_ON +VGA_CORE ON ON OFF D
+1.5VSG ON ON OFF
1.5_VDDC_PWREN
+BIF_VDDC +VGA_CORE +VGA_CORE OFF
+VGA_CORE
VGA Muxless with BACO Status Mapping table VGA Power Enable Signal Mapping table
+1.5VSG Normal mode BACO mode Graville Whistler and Seymour
PX_EN 0 1 VGA_PWR_ON source signal INT_VGAPWR_ON VGA_ON
+1.0VSG
1.5_VDDC_PWREN 1 0 +3.3VSG VGA_PWR_ON SUSP#
+1.8VSG VDDC_EN 1 0 +1.8VSG VGA_PWR_ON VGA_PWR_ON
20ms
1.0_EN 0 1 +1.0VSG VGA_PWR_ON VGA_PWR_ON
+3.3VSG ON ON +VDDCI VGA_PWR_ON Combine with +VGA_CORE
+1.8VSG ON ON +VGA_CORE VGA_PWR_ON 1.5_VDDC_PWREN
+5VALW For PX sequence, >2mS delay is required between
PE_GPIO1 and VGA_PWR_ON +1.0VSG ON ON +1.5VSG VGA_PWR_ON 1.5_VDDC_PWREN
+VGA_CORE ON OFF
2
Pop for matreial reduce <DISO need pop>

@
R1113
+1.5VSG ON OFF NOBACO@ R649 1 2 0_0402_5%
100K_0402_5%
+BIF_VDDC +VGA_CORE +1.0VSG +3VS C1103 BACO@
PE_GPIO1
1
PE_GPIO1# 0.1U_0402_16V4Z
1 2
1
C C
D
VGA_PWR_ON >2ms BACO@
5
PE_GPIO1 2 @ U19
G Q62 VGA_PWR_ON 2
P
B
1
S 2N7002K_SOT23-3 4 1.5_VDDC_PWREN
Y 1.5_VDDC_PWREN <40,45,47,49>
VGA@ +3VS R650 1 BACO@ 2 10K_0402_5% 1
3
G
R1115
100K_0402_5% NC7SZ08P5X_NL_SC70-5
3
2
1
D
<17> PX_EN 1 BACO@ 2 2 BACO@
R651 0_0402_5% G Q22
1
+3VALW +3VALW S 2N7002K_SOT23-3
BACO@
VGA Power ON Circuit
3
R652
5.11K_0402_1% +5VS +5VS
14
14
2
U44A U44B
Delay SUSP# 10ms VGA@ VGA@
P
2
<37> VGA_ON 1 VGA@ 2 1 IN O 2 3 IN O 4 1 VGA@ 2
R111 0_0402_5% 2 R170 0_0402_5% BACO@ BACO@
G
R653 R654
VGA@ 74LVC14APW_TSSOP14 74LVC14APW_TSSOP14 1K_0402_5% 1K_0402_5%
7
C208
1
0.1U_0402_16V4Z 1 VAN_GPIO1_DELAY VDDC_EN
BACO@ C1104 +3VS
0.1U_0402_16V4Z 1.0_EN
2 1
3
DMN66D0LDW-7_SOT363-6
Q23A
Q23B
BACO@
5
+3VALW +3VALW U20
B 1.5_VDDC_PWREN B
1 BACO@ 2 2
P
R655 0_0402_5% B
Y 4 2 5
1 BACO@ BACO@
<27,49> VGA_PWRGD A
G
14
14
4
Delay EC_PWROK 50ms U44C U44D From +VGA_CORE regulator NC7SZ08P5X_NL_SC70-5
3
VGA@ VGA@
P
1 @ 2 5 @
<37> INT_VGAPWR_ON
R115 0_0402_5% IN O 6 9 IN O 8 1
R172
2
0_0402_5%
2
G
C210 Heathrow and Chelsea +1.0VSG connect to +BIF_VDDC

@ 74LVC14APW_TSSOP14 74LVC14APW_TSSOP14
7
0.1U_0402_16V4Z R02 Modify @

1 MAN_GPIO1_DELAY 1 2
R657 0_0805_5%
+BIF_VDDC +VGA_CORE
2
DISO@ +1.0VSG BACO@ Q24 BACO@ Q25

R116 20mil 30mil NOBACO@
+3VS
D
+3VALW +3VALW 0_0402_5%
S
3 1 1 3 1 2
VGA@ R656 0_0805_5%
C211 AO3416L_SOT23-3 AO3416L_SOT23-3 1 Pop for PX5 & DISO
1
1
@ 2 0.1U_0402_16V4Z
G
1
G
2
2
R118 VGA@
31.6K_0402_1% 1.0_EN C1105
14
14
U44E U44F 2 22U_0805_6.3V6M

PX@ VGA@ VGA@ PX@
For VGA Power on control
P
P
2
<25,27> PE_GPIO1 1 R119 2 11 IN O 10 13 IN O 12 1 2 VGA_PWR_ON <40,46>

30K_0402_1% R120 VDDC_EN R03 Modify BOM
6
2 0_0402_5% 2
74LVC14APW_TSSOP14 74LVC14APW_TSSOP14 @
7
2
G
VGA@ C213 C214
G
PE_GPIO1# 1 2 2 Q89A .1U_0402_16V7K 0.1U_0402_16V4Z 30mil AO3416 NMOS
R121 @ 0_0402_5% 1 VGA@ 1
3 1 1 3 Vgs(th)(Max)= 1V
BACO@ BACO@
S
1
A DMN66D0LDW-7_SOT363-6 Q26 Q27 Rds(on)(Max)= 22m ohm @Vgs=4.5V A

+VGA_CORE AO3416L_SOT23-3 AO3416L_SOT23-3
VGA@
VAN_GPIO1_DELAY 1 VGA@ 2 5 Q89B
R122 0_0402_5% DMN66D0LDW-7_SOT363-6
MAN_GPIO1_DELAY 1 @ 2
4
R123 0_0402_5%
For VGA Sequence Issue 0923
SCHEMATIC,MB A8331
5 4 3 2 1
5 4 3 2 1
Swap for Meet 40 pin LVDS define (FW Support)

+3VS +3VS_PS
+3VS_PS
30mil 30mil U46 TL@
2 1 TL@ 19 APU_TXOUT0- APU_TXOUT0- <22>
R1160 TL@ 0_0603_5% L76 2 TXEC+
1 DP_V33 40mil 3 DP_V33 TXEC- 20 APU_TXOUT0+ APU_TXOUT0+ <22>
FBMA-L11-201209-221LMA30T_0805
+1.2VS TL@ 60mil13 21 APU_TXOUT1-
SWR_VDD TXE2+ APU_TXOUT1- <22>
Power
Close to Pin3 L78 2 1 SWR_VDD 18 22 APU_TXOUT1+
LVDS
D PVCC TXE2- APU_TXOUT1+ <22> D
60mil FBMA-L11-201209-221LMA30T_0805
DP_V33 2 1 SWR_V12 L77 1 2 SWR_LX 60mil12 23 APU_TXOUT2- APU_TXOUT2- <22>
R1178 TL@ 4.7UH_PG031B-4R7MS_1.1A_20% SWR_LX TXE1+ APU_TXOUT2+
11 SWR_VCCK TXE1- 24 APU_TXOUT2+ <22>
10U_0603_6.3V6M
C20
0.1U_0402_16V4Z
C1482
0.1U_0402_16V4Z
C1483
0_0603_5% @ 27 VCCK APU_TXOUT_CLK-
1 1 1 7 DP_V12 TXE0+ 25 APU_TXOUT_CLK- <22>
R04 Modify BOM 60mil 26 APU_TXOUT_CLK+ APU_TXOUT_CLK+ <22>
TXE0-
TL@
TL@
TL@
2 2 2
RTD2132S
DP0_AUXP_C 2
<8> DP0_AUXP_C AUX_P
DP-IN
DP0_AUXN_C 1 14 1 TL@ 2
GPIO
<8> DP0_AUXN_C AUX_N GPIO(PWM OUT) TL_INVT_PWM <22>
15 R1161 0_0402_5%
GPIO(Panel_VCC) TL_ENVDD <22>
DP0_TXP0_C 5 16 1 TL@ 2
<8> DP0_TXP0_C LANE0P GPIO(PWM IN) APU_INVT_PWM <10,22>
DP0_TXN0_C 6 17 R1162 0_0402_5%
<8> DP0_TXN0_C LANE0N GPIO(BL_EN) TL_BKOFF# <22>
Close to L2 Close to Pin13 Close to P18 CSCL 9 LVDS 29 APU_LVDS_CLK APU_LVDS_CLK <22>
CSDA CIICSCL1 MIICSCL1 APU_LVDS_DAT
10 CIICSDA1 EDID MIICDA1 28 APU_LVDS_DAT <22>
Other
SWR_VDD
10U_0603_6.3V6M
C21
0.1U_0402_16V4Z
C1485
22U_0805_6.3V6M
C1486
0.1U_0402_16V4Z
C1487
0.1U_0402_16V4Z
C1488
<10,22> LVDS_HPD 1 2 TL_HPD 32 ROM 31 MIIC_SCL

HPD MIICSCL0 MIIC_SDA
1 1 1 1 1 MIICSDA0 30
R1169 8 +3VS_PS
C DP_REXT C
1
1K_0402_5% 4 33
DP_GND GND
2
TL@
TL@
TL@
TL@
TL@
TL@ TL@ APU_LVDS_DAT 1 TL@ 2

2 2 2 2 2 R1168 TL@ R1163 4.7K_0402_5%
100K_0402_5% R30 RTD2132S-VE-CG_QFN32_5X5 APU_LVDS_CLK 1 TL@ 2
12K_0402_1% Part Number = SA00004EU10 R1164 4.7K_0402_5%
2
R04 Modify BOM Pop when no use MIIC_SCL 1 TL@ 2
1
EEEPRON R1165 4.7K_0402_5%
MIIC_SDA 1 TL@ 2
R1166 4.7K_0402_5%
2
Change to 12Kohm 1% (DG ref.) CSCL 1 TL@ 2
Close to Close to Close to 20101114 @ R1167 4.7K_0402_5%
L3 Pin27 Pin7 R1177 CSDA 1 TL@ 2
10K_0402_5% R1170 4.7K_0402_5%
SWR_V12
1
22U_0805_6.3V6M
C1489
0.1U_0402_16V4Z
C1490
0.1U_0402_16V4Z
C1491
0.1U_0402_16V4Z
C1492
1 1 1 1 APU Co-lay eDP function

TL@
TL@
TL@
TL@
DP0_TXP0_C R1171 1 2 APUEDP@ 0_0402_5% APU_TXOUT2+

2 2 2 2 DP0_TXN0_C R1172 APUEDP@ 0_0402_5% APU_TXOUT2-
1 2
DP0_TXP1_C R1173 1 2 APUEDP@ 0_0402_5% APU_TXOUT1+
<8> DP0_TXP1_C
DP0_TXN1_C R1174 1 2 APUEDP@ 0_0402_5% APU_TXOUT1-
<8> DP0_TXN1_C
B DP0_AUXP_C R1175 1 2 APUEDP@ 0_0402_5% APU_LVDS_CLK B
DP0_AUXN_C R1176 1 2 APUEDP@ 0_0402_5% APU_LVDS_DAT
E
E
R
O
M
+3VS +3VS_PS
SWR_VDD
1
U2 TL@
10K_0402_5% 10K_0402_5%
8 VCC A0 1
7 2 R1182 R1181 TL@
WP A1
2
MIIC_SCL 6 3 Q90A
2
MIIC_SDA SCL A2
5 SDA GND 4
1 @ 2 CSDA 1 6 EC_SMB_DA2
<37> TL_DATA EC_SMB_DA2 <8,14,37>
CAT24C64WI-GT3_SO8 R1179
0_0402_5% DMN66D0LDW-7_SOT363-6 TL@
5
Q90B
1 @ 2 CSCL 4 3 EC_SMB_CK2
<37> TL_CLK EC_SMB_CK2 <8,14,37>
R1180
A 0_0402_5% DMN66D0LDW-7_SOT363-6 A

SCHEMATIC,MB A8331
B B
4019H2
5 4 3 2 1
5 4 3 2 1
+LCDVDD UMA/DIS LVDS/eDP Mapping table

Panel LCDVDD Control +3VS UMA DIS Panel
1
R707 +3VALW 60mils LVDS eDP LVDS eDP Conn.
300_0603_5% 1 APU_TXOUT0+ VGA_TXOUT0+ TXOUT0+
C1153 APU_TXOUT0- VGA_TXOUT0- TXOUT0-
1
4.7U_0603_6.3V6K
6 2
R708 APU_TXOUT1+ DP0_TXP1_R VGA_TXOUT1+ eDP_TX1P TXOUT1+
10K_0402_5% 2 APU_TXOUT1- DP0_TXN1_R VGA_TXOUT1- TXOUT1-
eDP_TX1N
3
Q28A APU_TXOUT2+ DP0_TXP0_R VGA_TXOUT2+ eDP_TX0P TXOUT2+
2
DMN66D0LDW-7_SOT363-6 2 2 1 2 Q29 APU_TXOUT2- DP0_TXN0_R VGA_TXOUT2- eDP_TX0N TXOUT2-
R709 1K_0402_5% AP2301GN-HF_SOT23-3
D APU_TXOUT_CLK+ VGA_TXCLK+ TXCLK+ D
1
3
+LCDVDD APU_TXOUT_CLK- VGA_TXCLK- TXCLK-
Q28B
R712 1 TL@ 2 0_0402_5% C1152 60mils
<21> TL_ENVDD
1
.047U_0402_16V7K APU_TZOUT0+ VGA_TZOUT0+ TZOUT0+
2
4.7U_0603_6.3V6K
R710 1APUEDP@ 2 0_0402_5% 5 APU_TZOUT0- VGA_TZOUT0- TZOUT0-
<10> APU_ENVDD
1 1
C1149
R711 1 DISO@ 2 0_0402_5% C1154 APU_TZOUT1+ VGA_TZOUT1+ TZOUT1+
<13> VGA_ENVDD
4
V
G
A
_
E
N
V
D
D
P
D
a
t
V
G
A
s
i
d
e
UMA@ 0.1U_0402_16V4Z APU_TZOUT1- VGA_TZOUT1- TZOUT1-

R713
100K_0402_5% 2 2 APU_TZOUT2+ VGA_TZOUT2+ TZOUT2+
APU_TZOUT2- VGA_TZOUT2- TZOUT2-
1
APU_TZOUT_CLK+ VGA_TZCLK+ TZCLK+
APU_TZOUT_CLK- VGA_TZCLK- TZCLK-
+3VS EDP@
TL@ R714 0_0402_5% APU_LVDS_CLK DP0_AUXP_R VGA_LCD_CLK eDP_AUXP I2CC_SCL
Panel Backlight Control U22 APU_LVDS_DAT DP0_AUXN_R VGA_LCD_DATA eDP_AUXN I2CC_SDA
5
TL_BKOFF# R718 1 TL@ 2 0_0402_5% 2
P
<21> TL_BKOFF# B
4 DISPOFF# R972 1 2 0_0402_5%
BKOFF# Y
<37> BKOFF# 1 A
1
1 2 USB20_P5_R
<27> USB20_P5 1 2
1 TL@ 2
3
R715 10K_0402_5% R730 L90 @ OCE2012120YZF_4P
1 @ 2 10K_0402_5%
<27> USB20_N5 4 4 3 3 USB20_N5_R
R722 10K_0402_5%
2
1 DISO@ 2 Mosify for Fn+F5 function issue R975 1 2 0_0402_5% +INVPWR_B+
R714 0_0402_5% 20110315 B+ C1155
L36 40mils 680P_0402_50V7K
Panel PWM Control 1 2 2 1
EC_INVT_PWM 1 DISO@ 2 INVT_PWM FBMA-L11-201209-221LMA30T_0805
<37> EC_INVT_PWM
R716 0_0402_5% 2 1
2
C VGA_INVT_PWM @ DISPOFF# C
<13> VGA_INVT_PWM 1 2 1 2
R717 0_0402_5% R719 C1163 220P_0402_50V7K C1156
APU_INVT_PWM 1APUEDP@ 2 100K_0402_5% INVT_PWM 1 2 68P_0402_50V8J
<10,21> APU_INVT_PWM
R720 0_0402_5% C1164 220P_0402_50V7K
TL_INVT_PWM 1 TL@ 2
<21> TL_INVT_PWM
1
R721 0_0402_5%
@
D6
eDP HDP for APU and VGA 6 I/O4 I/O2 3 USB20_P5_R
+3VS +3VS
+3VS 5 VDD GND 2

1
EDP@ EDP@
R723 R724
10K_0402_5% 10K_0402_5% USB20_N5_R 4 1
VGAEDP@ I/O3 I/O1
LCD/LED PANEL Conn.
2
<14> VGA_EDP_HPD 2 1 EDP@ AZC099-04S.R7G_SOT23-6

R725 0_0402_5% Q31A
3
APUEDP@ DMN66D0LDW-7_SOT363-6 JLVDS1

<10,21> LVDS_HPD 2 1 CONN@
R726 0_0402_5% +INVPWR_B+ 1
EDP@ EDP_HPD 1
5 2 2 1 2 2 G1 41
DMN66D0LDW-7_SOT363-6 Q31B R727 3 42
3 G2
1
200K_0402_5% 4 43
4
EDP@ 4 G3
+LCDVDD 5 5 G4 44
R728 6 45
100K_0402_5% 6 G5
+3VS 7 7 G6 46
1 @ 2 EDP@ INVT_PWM 8
2
R729 0_0402_5% DISPOFF# 8

9 9
B I2CC_SCL B
10 10
I2CC_SDA 11 11
12 12
DG ref. Need close to eDP Conn. TXOUT0- 13
Place near LVDS Conn UMA@ R1240 1 2 0_0402_5% TXOUT0- 201011251400 TXOUT0+ 14
13
<21> APU_TXOUT0- 14
UMA@ R1241 1 2 0_0402_5% TXOUT0+ 15
<21> APU_TXOUT0+ 15
TXOUT1- 16
UMA@ R1242 1 +3VS 16
eDP_TX1N <21> APU_TXOUT1- 2 0_0402_5% TXOUT1- TXOUT1+ 17 17
eDP_TX1P UMA@ R1243 1 2 0_0402_5% TXOUT1+ 18
Translator <21> APU_TXOUT1+
TXOUT2- 19
18
19
2
eDP_TX0N UMA@ R1244 1 2 0_0402_5% TXOUT2- TXOUT2+ 20

LVDS Output eDP_TX0P
<21> APU_TXOUT2-
<21> APU_TXOUT2+
UMA@ R1245 1 2 0_0402_5% TXOUT2+ APUEDP@
R34 TXCLK-
21
20
21
22 22
UMA@ R1246 1 2 0_0402_5% TXCLK- 100K_0402_5% TXCLK+ 23
<21> APU_TXOUT_CLK- 23
UMA@ R1247 1 2 0_0402_5% TXCLK+ 24
<21> APU_TXOUT_CLK+
1
I2CC_SDA TXOUT2- EDP@ R1250 24

1 2 0_0402_5% EDP_TX0N 25 25
eDP_AUXP <21> APU_LVDS_CLK UMA@ R1248 1 2 0_0402_5% I2CC_SCL TXOUT2+ EDP@ R1251 1 2 0_0402_5% EDP_TX0P 26
UMA@ R1249 1 26
eDP_AUXN <21> APU_LVDS_DAT 2 0_0402_5% I2CC_SDA I2CC_SCL 1 2 27 27
APUEDP@ R33 100K_0402_5% TXOUT1- EDP@ R1252 1 2 0_0402_5% EDP_TX1N 28
TXOUT1+ EDP@ R1253 28
1 2 0_0402_5% EDP_TX1P 29 29
30 30
VGALVDS@ R732 1 2 0_0402_5% TXOUT0- I2CC_SDA EDP@ R1254 1 2 0_0402_5% EDP_AUXN 31
<13> VGA_TXOUT0- 31
VGALVDS@ R735 1 2 0_0402_5% TXOUT0+ VGA Co-lay eDP function I2CC_SCL EDP@ R1255 1 2 0_0402_5% EDP_AUXP 32
<13> VGA_TXOUT0+ 32
33 33
eDP_TX1N VGALVDS@ R731 1 2 0_0402_5% TXOUT1- VGAEDP@ R732 .1U_0402_16V7K EDP_HPD 34
<13> VGA_TXOUT1- 34
2
eDP_TX1P VGALVDS@ R733 1 2 0_0402_5% TXOUT1+ 35

VGA <13> VGA_TXOUT1+
VGAEDP@ R735 .1U_0402_16V7K 36
35
36
2
eDP_TX0N VGALVDS@ R734 1 2 0_0402_5% TXOUT2- +3VS 37

LVDS Output eDP_TX0P
<13> VGA_TXOUT2-
<13> VGA_TXOUT2+
VGALVDS@ R736 1 2 0_0402_5% TXOUT2+ VGAEDP@ R737 .1U_0402_16V7K USB20_N5_R 38
37
38
2
USB20_P5_R 39
VGALVDS@ R737 1 39
<13> VGA_TXCLK- 2 0_0402_5% TXCLK- VGAEDP@ R738 .1U_0402_16V7K 40 40
2
VGALVDS@ R738 1 2 0_0402_5% TXCLK+

A <13> VGA_TXCLK+ A
VGAEDP@ R741 .1U_0402_16V7K I-PEX_20143-040E-20F
2
eDP_AUXP <14> VGA_LCD_CLK VGALVDS@ R741 1 2 0_0402_5% I2CC_SCL Part Number = SP010016810
eDP_AUXN VGALVDS@ R742 1 2 0_0402_5% I2CC_SDA VGAEDP@ R742 .1U_0402_16V7K PCB Footprint = I-PEX_20143-040E-20F_40P
<14> VGA_LCD_DAT
2

SCHEMATIC,MB A8331
B B
4019H2
5 4 3 2 1
5 4 3 2 1
+3VS +3VS +HDMI_5V_OUT

+HDMI_5V_OUT JHDMI1
HDMI_HPD 19
F1 HP_DET
W=40mils W=40mils +HDMI_5V_OUT 18 +5V
2
4.7K_0402_5%
4.7K_0402_5%
+5VS 1 2 UMA@ UMA@ 17
UMA@ HDMI_SDATA DDC/CEC_GND
1 16 SDA
1.1A_6V_SMD1812P110TF C1165 R748 HDMI_SCLK 15 SCL
1
2K_0402_1%
2K_0402_1%
0.1U_0402_16V4Z 0_0402_5% 14 Reserved
R745
R746
R749
R750
13
1
2 HDMI_R_CK- CEC
12 CK- GND 20
D D
11 CK_shield GND 21
HDMI_R_CK+ 10 22
2
CK+ GND
2
HDMI_R_D0- 9 23
D0- GND
G
Q32 8
HDMI_R_D0+ D0_shield
7 D0+
1 DISO@ 2 3 1 HDMI_SCLK HDMI_R_D1- 6 D1-
<14> VGA_HDMI_SCLK R751 0_0402_5% 2N7002K_SOT23-3
D
5 D1_shield
2
1 UMA@ 2 HDMI_R_D1+ 4 D1+
<8> APU_HDMI_CLK
G
R752 0_0402_5% Q33 HDMI_R_D2- 3 D2-
2 D2_shield
1 DISO@ 2 3 1 HDMI_SDATA HDMI_R_D2+ 1 D2+
<14> VGA_HDMI_SDATA R753 0_0402_5% 2N7002K_SOT23-3
D
1 UMA@ 2 SUYIN_100042GR019M23BZR
<8> APU_HDMI_DATA R754 0_0402_5% CONN@
Part Number = DC232001100
PCB Footprint = ACON_HMR2E-AK120D_19P
+3VS +3VSG +5VS
4.7K_0402_5%
2
1 R74
UMA@ DISO@
R73 R72
1K_0402_5% 1 4.7K_0402_5%
2
C C
<14> VGA_HDMI_DET 2 DISO@ 1
R767 0_0402_5% 3
6
<8> DP2_HPD 2 UMA@ 1 HDMI_C_CLK- R756 1 2 0_0402_5% HDMI_R_CK-
R771 0_0402_5%
1 1 2 2
For APU_HDMI_HPD 5 2 HDMI_HPD @ L38
Q96B Q96A WCM2012F2S-900T04_0805
2
DMN66D0LDW-7_SOT363-6 DMN66D0LDW-7_SOT363-6 4 4 3
4
1
3
R75 HDMI_C_CLK+ 1 2 HDMI_R_CK+
100K_0402_5% R765 0_0402_5%
1
HDMI_C_TX0- R769 1 2 0_0402_5% HDMI_R_D0-
DISO@R757
DISO@R757 1 2 0_0402_5% HDMI_C_TX2-_R 1 2
<14> VGA_HDMI_TXD2- 1 2
DISO@R758
DISO@R758 1 2 0_0402_5% HDMI_C_TX2+_R UMA use 604 ohm SCL v1.01 @ L39
<14> VGA_HDMI_TXD2+
DISO@R759
DISO@R759 1 2 0_0402_5% HDMI_C_TX1-_R WCM2012F2S-900T04_0805
<14> VGA_HDMI_TXD1- VGA use 499 ohm
DISO@R760
DISO@R760 1 2 0_0402_5% HDMI_C_TX1+_R 4 4 3
<14> VGA_HDMI_TXD1+ 3
DISO@R761
DISO@R761 1 2 0_0402_5% HDMI_C_TX0-_R
From VGA <14>
<14>
VGA_HDMI_TXD0-
VGA_HDMI_TXD0+
DISO@R763
DISO@R763
DISO@R764
DISO@R764
1 2 0_0402_5%
0_0402_5%
HDMI_C_TX0+_R
HDMI_C_CLK-_R
For UMA HDMI HDMI_C_TX0+
R779
1 2
0_0402_5%
HDMI_R_D0+
<14> VGA_HDMI_TXC- 1 2
<14> VGA_HDMI_TXC+
DISO@R766
DISO@R766 1 2 0_0402_5% HDMI_C_CLK+_R termination BOM option
HDMI_C_TX1- R781 1 2 0_0402_5% HDMI_R_D1-
B R784 2 UMA@1 604_0402_1% B
UMA@ R770 1 2 0_0402_5% HDMI_C_TX2-_R R786 2 UMA@1 604_0402_1% 1 2
<8> APU_HDMI_TXD2- 1 2
UMA@ R772 1 2 0_0402_5% HDMI_C_TX2+_R @ L40
<8> APU_HDMI_TXD2+
UMA@ R773 1 2 0_0402_5% HDMI_C_TX1-_R R788 2 UMA@1 604_0402_1% WCM2012F2S-900T04_0805
<8> APU_HDMI_TXD1-
UMA@ R774 1 2 0_0402_5% HDMI_C_TX1+_R R790 2 UMA@1 604_0402_1% 4 4 3
<8> APU_HDMI_TXD1+ 3
UMA@ R776 1 2 0_0402_5% HDMI_C_TX0-_R
From APU <8>
<8>
APU_HDMI_TXD0-
APU_HDMI_TXD0+
UMA@ R777
UMA@ R778
1 2 0_0402_5%
0_0402_5%
HDMI_C_TX0+_R
HDMI_C_CLK-_R
R792 2 UMA@1 604_0402_1%
R795 2 UMA@1 604_0402_1%
HDMI_C_TX1+
R782
1 2
0_0402_5%
HDMI_R_D1+
<8> APU_HDMI_TXC- 1 2
UMA@ R780 1 2 0_0402_5% HDMI_C_CLK+_R
<8> APU_HDMI_TXC+
R797 2 UMA@1 604_0402_1% HDMI_C_TX2- R783 1 2 0_0402_5% HDMI_R_D2-
Near the connector R799 2 UMA@1 604_0402_1%
1 1 2 2
HDMI_C_TX2-_R C1166 2 1 .1U_0402_16V7K
HDMI_C_TX2-DISO@
DISO@R784
R784 1 2 499_0402_1% @ L41
HDMI_C_TX2+_R C1167 2 1 .1U_0402_16V7K
HDMI_C_TX2+DISO@
DISO@R786
R786 1 2 499_0402_1% WCM2012F2S-900T04_0805
1
Q35 4 4 3
HDMI_C_TX1-_R C1168 2 D 3
1 .1U_0402_16V7K
HDMI_C_TX1-DISO@
DISO@R788
R788 1 2 499_0402_1% +HDMI_5V_OUT 2N7002K_SOT23-3
HDMI_C_TX1+_R C1169 2 1 .1U_0402_16V7K
HDMI_C_TX1+DISO@
DISO@R790
R790 1 2 499_0402_1% 2 HDMI_C_TX2+ 1 2 HDMI_R_D2+
G R794 0_0402_5%
1
HDMI_C_TX0-_R C1170 2 1 .1U_0402_16V7K

HDMI_C_TX0-DISO@
DISO@R792
R792 1 2 499_0402_1% S
HDMI_C_TX0+_R C1171 2 1 .1U_0402_16V7K
HDMI_C_TX0+DISO@
DISO@R795
R795 1 2 499_0402_1% R801
3
HDMI_C_CLK-_R C1172 2 1 .1U_0402_16V7K

HDMI_C_CLK-DISO@
DISO@R797
R797 1 2 499_0402_1% 100K_0402_5%
HDMI_C_CLK+_R C1173 2 1 .1U_0402_16V7K
HDMI_C_CLK+DISO@
DISO@R799
R799 1 2 499_0402_1%
2
A A

SCHEMATIC,MB A8331
B B
4019H2
5 4 3 2 1
A B C D E
W=40mils
+5VS +R_CRT_VCC +CRT_VCC
D22 F2 W=40mils
2
2 1 1 2
2
@ @ RB491D_SC59-3 1.1A_6V_SMD1812P110TF
D20 D21 1
T19
1
AZC199-02SPR7G_SOT23-3 AZC199-02SPR7G_SOT23-3
C1174 JCRT1
1
1 0.1U_0402_16V4Z CONN@ 1
2 DC060005800
CRT_R L42 1 2 CRT_R_2
FCM2012CF-800T06_2P
C
R
T
C
o
n
n
e
c
t
o
r
6
11
CRT_G L43 1 2 CRT_G_2 1
FCM2012CF-800T06_2P 7
12
CRT_B L44 1 2 CRT_B_2 2
FCM2012CF-800T06_2P 8
10P_0402_50V8J
10P_0402_50V8J
10P_0402_50V8J
10P_0402_50V8J
10P_0402_50V8J
10P_0402_50V8J
13
1
1
150_0402_1%
150_0402_1%
150_0402_1%
1 1 1 1 1 1 3
C1175
C1176
C1177
C1178
C1179
C1180
9 SUYIN_070546HR015M25FZR
R805
R806
R807
14 PCB Footprint = SUYIN_070546HR015M25FZR_15P
4
2 2 2 2 2 2
10 G 16
2
2
15 G 17
1 5
C1181
100P_0402_50V8J
2 T20
+CRT_VCC
L45 1 2 CRT_HSYNC_2
2 2
1 2 R808 2 1 10K_0402_5% FCM2012CF-800T06_2P DSUB_12
C1182 0.1U_0402_16V4Z
L46 1 2 CRT_VSYNC_2 1
5
U23 FCM2012CF-800T06_2P 1 1
74AHCT1G125GW_SOT353-5
P
OE#
CRT_HSYNC 2 CRT_HSYNC_1 C1183 C1184 DSUB_15

A Y 4 10P_0402_50V8J 10P_0402_50V8J C1185 2
G
2 2 68P_0402_50V8J 1
3
C1186
+CRT_VCC 68P_0402_50V8J
2
C1187 1 2 0.1U_0402_16V4Z
5
1
P
OE#
CRT_VSYNC 2 4 CRT_VSYNC_1
A Y
G
U24
74AHCT1G125GW_SOT353-5
3
FCH_CRT_R R809 2 UMA@ 1 0_0402_5% CRT_R

Close to Conn side
3 Use common via <26> FCH_CRT_R 3
FCH_CRT_G R810 2 UMA@ 1 0_0402_5% CRT_G +3VSG +CRT_VCC

<26> FCH_CRT_G
FCH_CRT_B R811 2 UMA@ 1 0_0402_5% CRT_B
<26> FCH_CRT_B
FCH_CRT_HSYNC R814 2 UMA@ 1 0_0402_5% CRT_HSYNC
From FCH <26> FCH_CRT_HSYNC
1
FCH_CRT_VSYNC R815 2 UMA@ 1 0_0402_5% CRT_VSYNC R812 R813
<26> FCH_CRT_VSYNC
4.7K_0402_5% 4.7K_0402_5%
2
FCH_CRT_DDC_SDA R816 2 UMA@ 1 0_0402_5% DSUB_12
<26> FCH_CRT_DDC_SDA
2
<26> FCH_CRT_DDC_SCL FCH_CRT_DDC_SCL R817 2 UMA@ 1 0_0402_5% DSUB_15 VGA_CRT_DATA 1 6 DSUB_12
DISO@ Q5A
5
VGA_CRT_R R818 2 DISO@ 1 0_0402_5% CRT_R DMN66D0LDW-7_SOT363-6
<14> VGA_CRT_R
VGA_CRT_G R819 2 DISO@ 1 0_0402_5% CRT_G VGA_CRT_CLK 4 3 DSUB_15
<14> VGA_CRT_G
VGA_CRT_B R820 2 DISO@ 1 0_0402_5% CRT_B DISO@ Q5B DMN66D0LDW-7_SOT363-6
<14> VGA_CRT_B
From VGA <14> VGA_CRT_HSYNC
VGA_CRT_HSYNC R821 2 DISO@ 1 0_0402_5% CRT_HSYNC
VGA_CRT_VSYNC R822 2 DISO@ 1 0_0402_5% CRT_VSYNC

<14> VGA_CRT_VSYNC
4 4
VGA_CRT_DATA
<14> VGA_CRT_DATA
VGA_CRT_CLK
<14> VGA_CRT_CLK Security Classification Compal Secret Data Compal Electronics, Inc.
SCHEMATIC,MB A8331
B B
4019H2
A B C D E
A B C D E
U25A
C1188 1 2 150P_0402_50V8J
HUDSON-2
PCI Host Bus Reset (To EC) APU_PCIE_RST#_C AE2 AF3
R825 1 PCIE_RST# PCICLK0
2 33_0402_5%
PCI CLKS
<10,37> PLT_RST# AD5 A_RST# PCICLK1/GPO36 AF1 PCI_CLK1 <28>
PCICLK2/GPO37 AF5
C1189 1 2 .1U_0402_16V7K UMI_MTX_FRX_P0 AE30 AG2
<6> UMI_MTX_C_FRX_P0 UMI_TX0P PCICLK3/GPO38 PCI_CLK3 <28>
C1190 1 2 .1U_0402_16V7K UMI_MTX_FRX_N0 AE32 AF6
<6> UMI_MTX_C_FRX_N0 UMI_TX0N PCICLK4/14M_OSC/GPO39 PCI_CLK4 <28>
C1191 1 2 .1U_0402_16V7K UMI_MTX_FRX_P1 AD33
<6> UMI_MTX_C_FRX_P1 UMI_TX1P
C1192 1 2 .1U_0402_16V7K UMI_MTX_FRX_N1 AD31 AB5
<6> UMI_MTX_C_FRX_N1 UMI_TX1N PCIRST#
C1196 1 2 .1U_0402_16V7K UMI_MTX_FRX_P2 AD28
<6> UMI_MTX_C_FRX_P2 UMI_TX2P
C1197 1 2 .1U_0402_16V7K UMI_MTX_FRX_N2 AD29
<6> UMI_MTX_C_FRX_N2 UMI_TX2N
C1198 1 2 .1U_0402_16V7K UMI_MTX_FRX_P3 AC30 AJ3
<6> UMI_MTX_C_FRX_P3 UMI_TX3P AD0/GPIO0 +3VALW
C1194 1 2 .1U_0402_16V7K UMI_MTX_FRX_N3 AC32 AL5
<6> UMI_MTX_C_FRX_N3 UMI_TX3N AD1/GPIO1
AG4 For PCIE device reset on FS1 C1193
1 UMI_FTX_C_MRX_P0 AD2/GPIO2 1
<6> UMI_FTX_C_MRX_P0 AB33 UMI_RX0P AD3/GPIO3 AL6 (GFX,GLAN,WLAN,LVDS Travis) 1 2
UMI_FTX_C_MRX_N0 AB31 AH3
PCI EXPRESS INTERFACES

<6> UMI_FTX_C_MRX_N0 UMI_RX0N AD4/GPIO4
UMI_FTX_C_MRX_P1 AB28 AJ5 0.1U_0402_16V4Z
<6> UMI_FTX_C_MRX_P1 UMI_RX1P AD5/GPIO5
5
UMI_FTX_C_MRX_N1 AB29 AL1
UMI_FTX_C_MRX_P2 Y33 AN5 2
P
<6> UMI_FTX_C_MRX_P2 UMI_RX2P AD7/GPIO7 B
UMI_FTX_C_MRX_N2 Y31 AN6 APU_PCIE_RST#_C R829 1 2 33_0402_5% 4
<6> UMI_FTX_C_MRX_N2 UMI_RX2N AD8/GPIO8 Y APU_PCIE_RST# <13,31,32,34,35>
UMI_FTX_C_MRX_P3 Y28 AJ1 1
<6> UMI_FTX_C_MRX_P3 UMI_RX3P AD9/GPIO9 A
G
UMI_FTX_C_MRX_N3 Y29 AL8 1 U26
AL3 C1195 R826 NC7SZ08P5X_NL_SC70-5
3
R827 1 AD11/GPIO11
2 590_0402_1% PCIE_CALRP AF29 PCIE_CALRP AD12/GPIO12 AM7 150P_0402_50V8J @ 8.2K_0402_5%
+PCIE_VDDR_FCH R828 1 2 2K_0402_1% PCIE_CALRN AF31 PCIE_CALRN AD13/GPIO13 AJ6
2
AK7
1
FL@ C1207 1
FL@C1207 PCIE_MTX_DRX_P0 AD14/GPIO14
<35> PCIE_MTX_C_DRX_P0 2 .1U_0402_16V7K V33 GPP_TX0P AD15/GPIO15 AN8
FL@C1208
FL@ C1208 1 2 .1U_0402_16V7K PCIE_MTX_DRX_N0 V31 AG9
<35> PCIE_MTX_C_DRX_N0 GPP_TX0N AD16/GPIO16
W30 GPP_TX1P AD17/GPIO17 AM11
W32 GPP_TX1N AD18/GPIO18 AJ10
AB26 GPP_TX2P AD19/GPIO19 AL12
AB27 GPP_TX2N AD20/GPIO20 AK11
AA24 GPP_TX3P AD21/GPIO21 AN12
AA23 GPP_TX3N AD22/GPIO22 AG12
AD23/GPIO23 AE12 PCI_AD23 <28>
PCIE_DTX_C_MRX_P0 AA27 AC12
<35> PCIE_DTX_C_MRX_P0 GPP_RX0P AD24/GPIO24 PCI_AD24 <28>
PCIE_DTX_C_MRX_N0 AA26 AE13
<35> PCIE_DTX_C_MRX_N0 GPP_RX0N AD25/GPIO25 PCI_AD25 <28>
W27
PCI INTERFACE
AF13 PCI_AD26 <28>
GG
PP
PP
P
oP
r
t
0t
F
o
ro
UU
SS
BB
3
03
o
no
SM
U/
S
/
B2
GPP_RX1P AD26/GPIO26
V27 GPP_RX1N AD27/GPIO27 AH13 PCI_AD27 <28>
o
r
1
F
r
0
n
B
0
1
0
1
1
0
3
V26 GPP_RX2P AD28/GPIO28 AH14 T26
L
e
v
e
l
s
h
i
f
t
t
o
I
S
L
6
2
7
7
W26 GPP_RX2N AD29/GPIO29 AD15
W24 AC15 VGA_PWRGD_R Change to GPIO51
GPP_RX3P AD30/GPIO30
W23 GPP_RX3N AD31/GPIO31 AE16
CBE0# AN3
CBE1# AJ8
CBE2# AN10
2 2
+1.1VS_CKVDD R833 1 2 2K_0402_1% CLK_CALRN F27 CLK_CALRN CBE3# AD12
FRAME# AG10
DEVSEL# AK9
AL10 CRCLK_REQ# 1 2 +3VS
IRDY# R835 8.2K_0402_5%
G30 PCIE_RCLKP TRDY# AF10 Removed R02
For "EXT" CLK mode, input to PCIE, USB30_CLKREQ#
SS G28 PCIE_RCLKN PAR AE10
AH1
1
R879
2
10K_0402_5%
APU_DISP_CLKP STOP#
<8> APU_DISP_CLKP R26 DISP_CLKP PERR# AM9
APU DISP APU_DISP_CLKN T26 AH8
<8> APU_DISP_CLKN DISP_CLKN SERR#
REQ0# AG15
NSS H33
H31
DISP2_CLKP REQ1#/GPIO40 AG13
AF15
DISP2_CLKN REQ2#/CLK_REQ8#/GPIO41 CRCLK_REQ#
REQ3#/CLK_REQ5#/GPIO42 AM17 CRCLK_REQ# <31>
APU_CLKP T24 AD16
<8> APU_CLKP APU_CLKP GNT0#
APU APU_CLKN R854 1 @ 2 0_0402_5%
R
T
C
B
A
T
T
C
o
n
n
.
<8> APU_CLKN T23 APU_CLKN GNT1#/GPO44 AD13 PE_GPIO0 <13,27>
AD21 R873 1 @ 2 0_0402_5%
GNT2#/SD_LED/GPO45 PE_GPIO1 <20,27>
CLK_PEG_VGA J30 AK17 T24
<13> CLK_PEG_VGA SLT_GFX_CLKP GNT3#/CLK_REQ7#/GPIO46
VGA CLK_PEG_VGA# K29 AD19 +RTCBATT
<13> CLK_PEG_VGA# SLT_GFX_CLKN CLKRUN#
LOCK# AH9
1
H27 GPP_CLK0P
H28 AF18
+
GPP_CLK0N INTE#/GPIO32 LPC_CLK0_EC
INTF#/GPIO33 AE18 1 2 1 2
J27 AC16 R58 @ 10_0402_5% C44 @ 10P_0402_50V8J
GPP_CLK1P INTG#/GPIO34
K26 GPP_CLK1N INTH#/GPIO35 AD18
For EMI Requirement Close to U25
CLK_PCIE_MINI1 F33
CLOCK GENERATOR
<34> CLK_PCIE_MINI1 GPP_CLK2P

Wireless LAN CLK_PCIE_MINI1# F31
<34> CLK_PCIE_MINI1# GPP_CLK2N LPC_CLK0_EC JBATT1
SS CLK_PCIE_LAN E33
LPCCLK0 B25 LPC_CLK0_EC <28,37>
CONN@
<32> CLK_PCIE_LAN GPP_CLK3P
Ethernet LAN CLK_PCIE_LAN# E31 D25 LPC_CLK1 CCM_060003HA002G202ZL
<32> CLK_PCIE_LAN# GPP_CLK3N LPCCLK1 LPC_CLK1 <28>
D27 LPC_AD0 Part Number = SP07000OU10
LAD0 LPC_AD0 <37>
CLK_PCIE_MINI2 LPC_AD1 PCB Footprint = CCM_060003HA002G202ZL_2P
-
<34> CLK_PCIE_MINI2 M23 GPP_CLK4P LAD1 C28 LPC_AD1 <37>
3 CLK_PCIE_MINI2# LPC_AD2 3
MINI2(option) <34> CLK_PCIE_MINI2# M24 A26 LPC_AD2 <37>
2
GPP_CLK4N LAD2 LPC_AD3
LPC
LAD3 A29 LPC_AD3 <37>

CLK_PCIE_CR M27 A31 LPC_FRAME#
<31> CLK_PCIE_CR GPP_CLK5P LFRAME# LPC_FRAME# <37>
Card Reader CLK_PCIE_CR# M26 B27
<31> CLK_PCIE_CR# GPP_CLK5N LDRQ0#
AE27 USB30_CLKREQ#
LDRQ1#/CLK_REQ6#/GPIO49 USB30_CLKREQ# <35>
CLK_PCIE_USB30 N25 AE19 SERIRQ SERIRQ <37>
<35> CLK_PCIE_USB30 GPP_CLK6P SERIRQ/GPIO48
USB3.0(FL1009)<35> CLK_PCIE_USB30# N26
CLK_PCIE_USB30# GPP_CLK6N APU_PWRGD
R23 C41 33P_0402_50V8J
GPP_CLK7P ALLOW_STOP APU_RST#
R24 GPP_CLK7N DMA_ACTIVE# G25 ALLOW_STOP <8>
E28 EC_THERM_R# 1 @ 2 C42 33P_0402_50V8J
PROCHOT# EC_THERM# <8,37,44,50>
N27 E26 APU_PWRGD R853 0_0402_5% for ESD Close FCH Side
GPP_CLK8P APU_PG APU_PWRGD <8,50>
APU
R27 GPP_CLK8N LDT_STP# G26

F26 APU_RST#
APU_RST# APU_RST# <8>
APU_PG/APU_RST#/LDT_STP# : OD pin
J26 14M_25M_48M_OSC DMA_ACTIVE# : IN/OD, 0.8V threshold
H7 PROCHOT# : IN, 0.8V threshold +RTCBATT
S5_CORE_EN RTC_CLK_R
RTCCLK F1 1 2 RTC_CLK <28,37> LDT_STP : No use, NC
F3 R855 22_0402_5% DMA active. The FCH drives the DMA_ACTIVE# to
INTRUDER_ALERT#
1
1 2 1 2 25M_X1 C31 E6 RTCVCC_R
C1200 R856 0_0402_5% 25M_X1 VDDBT_RTC_G APU to notify DMA activity. This will cause the APU R857
S5 PLUS
to reestablish the UMI link quicker.

1
27P_0402_50V8J G2 32K_X1 1K_0402_5%

R858 32K_X1
X1 1M_0402_5% 25M_X2 C33
2
25M_X2 +RTCVCC D23
2
G4 32K_X2 2
32K_X2
1 2 1 2 1
C1201 25MHZ_20PF_7A25000012 R859 510_0402_5% 3 +CHGRTC
0.1U_0402_16V4Z
27P_0402_50V8J 1 1 W=20mils
2
HUDSON-M2_FCBGA656 C1202 C1203 1 BAV70W_SOT323-3
M2@ 0.1U_0402_16V4Z 1U_0402_6.3V6K R860 C1204
for Clear CMOS @ If a diode is implemented between the FCH and battery,
4 2 2 0_0603_5% the VDDBT_RTC_G input voltage is within 200 mV of 4
32K_X1 M3@ 2
1 2 the battery voltage.
1
C1205
C1205,C1206 22P_0402_50V8J X5
1
4 3 U25
Change for G3 OSC NC
RTC timing issue R861 1 OSC NC 2
20M_0402_5% 218-0755042 A13 HUDSON-M3 656P
<improve amplitude> 32.768KHZ_12.5PF_Q13MC14610002 Part Number = SA000043IB0 Security Classification Compal Secret Data Compal Electronics, Inc.
2
R03 Modify to 22pF Issued Date 2011/07/08 2015/07/08 Title

32K_X2 Deciphered Date
follow Vender suggest 1 2
SCHEMATIC,MB A8331
C1206
22P_0402_50V8J Close to HUDSON-M2 AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
A B C D E
A B C D E
4MB SPI ROM +3VALW

U25B
HUDSON-2
(Non-share) 0.1U_0402_16V4Z
2
C466
1
SATA_STX_DRX_P0 AK19 AL14 +3VALW R626
<30> SATA_STX_DRX_P0 SATA_TX0P SD_CLK/SCLK_2/GPIO73
SATA_STX_DRX_N0 AM19 AN14 10K_0402_5% U28
<30> SATA_STX_DRX_N0 SATA_TX0N SD_CMD/SLOAD_2/GPIO74
HDD1 AJ12 1 2 FCH_SPI_CS1# 1 8 FCH_SPI_VCC
SATA_DTX_C_SRX_N0 SD_CD/GPIO75 FCH_SPI_MISO CS# VCC FCH_SPI_HOLD#
<30> SATA_DTX_C_SRX_N0 AL20 SATA_RX0N SD_WP/GPIO76 AH12 2 SO/SIO1 HOLD# 7 2 1
SD CARD
SATA_DTX_C_SRX_P0 AN20 AK13 1 2 FCH_SPI_WP# 3 6 FCH_SPI_CLK R935
<30> SATA_DTX_C_SRX_P0 SATA_RX0P SD_DATA0/SDATI_2/GPIO77 WP# SCLK
AM13 R934 4 5 FCH_SPI_MOSI 10K_0402_5%
SATA_STX_DRX_P1 SD_DATA1/SDATO_2/GPIO78 10K_0402_5% GND SI/SIO0
<30> SATA_STX_DRX_P1 AN22 SATA_TX1P SD_DATA2/GPIO79 AH15
SATA_STX_DRX_N1 AL22 AJ14 EON_32M_EN25Q32B-104HIP_SOP_8P
<30> SATA_STX_DRX_N1 SATA_TX1N SD_DATA3/GPIO80
ODD SATA_DTX_C_SRX_N1
1 <30> SATA_DTX_C_SRX_N1 AH20 SATA_RX1N GBE_COL AC4 1
SATA_DTX_C_SRX_P1 AJ20 AD3 @R36
@ R36 @C23
@ C23
<30> SATA_DTX_C_SRX_P1 SATA_RX1P GBE_CRS
AD9 FCH_SPI_CLK 1 2 1 2
GBE_MDCK 10_0402_5%
AJ22 SATA_TX2P GBE_MDIO W10
AH22 AB8 10P_0402_50V8J
SATA_TX2N GBE_RXCLK
GBE_RXD3 AH7
AM23 SATA_RX2N GBE_RXD2 AF7
AK23 AE7 GBE_COL / GBE_CRS / GBE_MDIO
SATA_RX2P GBE_RXD1
GBE_RXD0 AD7 GBE_RXERR / Left unconnected.
AH24 SATA_TX3P GBE_RXCTL/RXDV AG8 FCH SCL V1.20 19-35
AJ24 SATA_TX3N GBE_RXERR AD1
AB7 GBE_PHY_INTR
GBE LAN
GBE_TXCLK
AN24 AF9 Pulled-up to +3.3V_S5 with a 10-KΩ 5% resistor.
SATA_RX3N GBE_TXD3 +3VALW
AL24 SATA_RX3P GBE_TXD2 AG6 FCH SCL v1.20 #19-85
GBE_TXD1 AE8
AL26 AD8 GBE_PHY_INTR 1 2
SATA_TX4P GBE_TXD0 R892 10K_0402_5%
AN26 SATA_TX4N GBE_TXCTL/TXEN AB9
SERIAL ATA
GBE_PHY_PD AC2
AJ26 AA7 Removed RGMII/MII support and updated termination
SATA_RX4N GBE_PHY_RST# GBE_PHY_INTR
AH26 W9 requirements for GBE_COL, GBE_CRS, GBE_RXERR
SATA_RX4P GBE_PHY_INTR
and GBE_MDIO when RGMII/MII interface is not used.
AN29 SATA_TX5P FCH DGv1.20 / SCL v1.20
AL28 V6 FCH_SPI_MISO
SATA_TX5N SPI_DI/GPIO164 FCH_SPI_MOSI
SPI_DO/GPIO163 V5
SPI ROM
AK27 V3 FCH_SPI_CLK_R R35 1 2 0_0402_5% FCH_SPI_CLK
SATA_RX5N SPI_CLK/GPIO162 FCH_SPI_CS1#
AM27 SATA_RX5P SPI_CS1#/GPIO165 T6
V1 FCH_SPI_WP#
ROM_RST#/SPI_WP#/GPIO161
AL29 NC6
AN31 NC7
L30 FCH_CRT_R
VGA_RED FCH_CRT_R <24>
AL31 R896 1 2 150_0402_1%
NC8
AL33 NC9
2 FCH_CRT_G 2
VGA_GREEN L32 FCH_CRT_G <24>
AH33 R897 1 2 150_0402_1%
NC10
AH31 NC11
M29 FCH_CRT_B
VGA_BLUE FCH_CRT_B <24>
AJ33 R898 1 2 150_0402_1%
VGA DAC
NC12
AJ31 NC13
M28 FCH_CRT_HSYNC
VGA_HSYNC/GPO68 FCH_CRT_HSYNC <24>
N30 FCH_CRT_VSYNC
VGA_VSYNC/GPO69 FCH_CRT_VSYNC <24>
M33 FCH_CRT_DDC_SDA
VGA_DDC_SDA/GPO70 FCH_CRT_DDC_SDA <24>
1K_0402_1% 2 1 R899 SATA_CALRP AF28 N32 FCH_CRT_DDC_SCL
SATA_CALRP VGA_DDC_SCL/GPO71 FCH_CRT_DDC_SCL <24>
+AVDD_SATA 931_0402_1%2 1 R900 SATA_CALRN AF27 SATA_CALRN

VGA_DAC_RSET K31 1 2
R901 715_0402_1%
SATA_LED# AD22
<38> SATA_LED# SATA_ACT#/GPIO67
V28 ML_VGA_AUXP_C
AUX_VGA_CH_P ML_VGA_AUXP_C <8>
+3VS R902 1 2 10K_0402_5% V29 ML_VGA_AUXN_C
AUX_VGA_CH_N ML_VGA_AUXN_C <8>
VGA MAINLINK
AF21 SATA_X1
U28 AUXCAL1 2 +VDDAN_11_ML
AUXCAL R903 100_0402_1%
T31 ML_VGA_TXP0
ML_VGA_L0P ML_VGA_TXP0 <8>
T33 ML_VGA_TXN0
ML_VGA_L0N ML_VGA_TXN0 <8>
AG21 T29 ML_VGA_TXP1
SATA_X2 ML_VGA_L1P ML_VGA_TXP1 <8>
T28 ML_VGA_TXN1
R32 ML_VGA_TXP2
R30 ML_VGA_TXN2
P29 ML_VGA_TXP3
P28 ML_VGA_TXN3
FCH_CRT_HPD 2 1 +FCH_VDDAN_33_DAC_R
3
ML_VGA_HPD/GPIO229 C29 FCH_CRT_HPD 10K_0402_5%
FCH_CRT_HPD <10>
R904 3
WL_OFF#_2 AH16 N2 1 2
<34> WL_OFF#_2 FANOUT0/GPIO52 VIN0/GPIO175
AM15 R5 10K_0402_5%
BT_ON# FANOUT1/GPIO53 HW MONITOR
<36> BT_ON# AJ16 FANOUT2/GPIO54 VIN1/GPIO176 M3 1 2
R6 10K_0402_5%
W_DISABLE#_2 AK15 L2 1 2
<34> W_DISABLE#_2 FANIN0/GPIO56 VIN2/SDATI_1/GPIO177
WL_OFF# AN16 R7 10K_0402_5%
<34> WL_OFF# FANIN1/GPIO57
AL16 FANIN2/GPIO58 VIN3/SDATO_1/GPIO178 N4 1 2
R8 10K_0402_5%
VIN4/SLOAD_1/GPIO179 P1 1 2
ODD_PWR K6 R9 10K_0402_5%
<30> ODD_PWR TEMPIN0/GPIO171
VIN5/SCLK_1/GPIO180 P3 1 2
R10 10K_0402_5%
1 2 K5 TEMPIN1/GPIO172 VIN6/GBE_STAT3/GPIO181 M1 1 2 GPIO181 Enabled integrated pull-down/up and left unconnected.
R14 10K_0402_5% R11 @ 10K_0402_5%
VIN7/GBE_LED3/GPIO182 M5 1 2
1 2 K3 R12 10K_0402_5%
R15 10K_0402_5% TEMPIN2/GPIO173
NC1 AG16
1 2 M6 TEMPIN3/TALERT#/GPIO174 NC2 AH10
R16 10K_0402_5% A28
NC3
NC4 G27
NC5 L4
HUDSON-M2_FCBGA656
M2@
4 4

SCHEMATIC,MB A8331
A B C D E
A B C D E
R03 modify
FL@ Update BOM Structure
FCH_PCIE_RST# IS FOR PCIE C1211
DEVICES ON Hudson-M2/M3 1 2 150P_0402_50V8J U25D
FL@ HUDSON-2
FCH_PCIE_RST#_R
USB MISC
<35> FCH_PCIE_RST# 1 2 AB6 PCIE_RST2#/PCI_PME#/GEVENT4# USBCLK/14M_25M_48M_OSC G8
R837 33_0402_5% EC_LID_OUT# R2
<37> EC_LID_OUT# RI#/GEVENT22#
W7 B9 USB_RCOMP R863 1 2 11.8K_0402_1%
SLP_S3# SPI_CS3#/GBE_STAT1/GEVENT21# USB_RCOMP
<37> SLP_S3# T3 SLP_S3#
SLP_S5# W2 H1
<37> SLP_S5# SLP_S5# USB_FSD1P/GPIO186
PBTN_OUT# J4 H3 Hudson-M2/M3
<37> PBTN_OUT# PWR_BTN# USB_FSD1N
FCH_PWRGD N7 OHCI CTL
<37> FCH_PWRGD PWR_GOOD
USB 1.1
H6 DEV 20, Fn 5
ACPI / WAKE UP EVENTS

TEST0 USB_FSD0P/GPIO185
T9 TEST0 USB_FSD0N H5 <Disable CTL>
TEST1 T10
TEST2 TEST1/TMS
V9 TEST2 USB_HSD13P H10
1 USB_HSD13N G10 1
EC_GA20 AE22
<37> EC_GA20 GA20IN/GEVENT0#
USB_HSD12P K10 Hudson-M2 Hudson-M3
EC_KBRST# AG19 J12 30 Pin Sub board USB3.0 Conn EHCI CTL xHCI CTL
<37> EC_KBRST# KBRST#/GEVENT1# USB_HSD12N
EC_SCI# R9 DEV 22, Fn 2 DEV 16, Fn 1
<37> EC_SCI# LPC_PME#/GEVENT3#
THERMTRIP: EC_SMI# C26 G12 <Disable CTL of M2> xHCI CTL
<37> EC_SMI# LPC_SMI#/GEVENT23# USB_HSD11P
Need level shift from +3VALW to +1.5V T5 LPC_PD#/GEVENT5# USB_HSD11N F12 30 Pin Sub board USB3.0 Conn DEV 16, Fn 0
SYS_RESET# U4
Note: Ensure FCH internal pull-up resistor FCH_PCIE_WAKE# K1 SYS_RESET#/GEVENT19#
K12 USB30_P10
<32,34,35> FCH_PCIE_WAKE# WAKE#/GEVENT8# USB_HSD10P USB30_P10 <36>
to +3.3V S5 is disabled to prevent leakage V7 K13 USB30_N10
USB30_N10 <36> On board USB Conn
H_THERMTRIP# IR_RX1/GEVENT20# USB_HSD10N
when APU is powered down. <8> H_THERMTRIP# R10 THRMTRIP#/SMBALERT#/GEVENT2#
WD_PWRGD AF19 B11 USB20_P9
WD_PWRGD USB_HSD9P USB20_P9 <34>
D11 USB20_N9 Mini2-Option Hudson-M2/M3
USB_HSD9N USB20_N9 <34>
EC_RSMRST# U2 EHCI CTL
<37> EC_RSMRST# RSMRST#
E10 USB20_P8 DEV 19, Fn 2
USB_HSD8P USB20_P8 <34>
SM bus 0-->S0 PWR domain MINI2_CLKREQ# AG24 F10 USB20_N8 Mini1-WLAN
<34> MINI2_CLKREQ# CLK_REQ4#/SATA_IS0#/GPIO64 USB_HSD8N USB20_N8 <34>
LAN_CLKREQ# AE24
SM bus 1-->S5 PWR domain <32> LAN_CLKREQ# CLK_REQ3#/SATA_IS1#/GPIO63 USB20_P7
AE26 SMARTVOLT1/SATA_IS2#/GPIO50 USB_HSD7P C10 USB20_P7 <36>
AF22 A10 USB20_N7 BT
USB 2.0
CLK_REQ0#/SATA_IS3#/GPIO60 USB_HSD7N USB20_N7 <36>
FCH GEVENT (S5 domain) AH17 SATA_IS4#/FANOUT3/GPIO55
with isolation circuit to avoid leakage AG18 SATA_IS5#/FANIN3/GPIO59 USB_HSD6P H9
FCH_SPKR AF24 G9
<39> FCH_SPKR SPKR/GPIO66 USB_HSD6N
FCH_SCLK0
GPIO
<11,12,34> FCH_SCLK0 AD26 SCL0/GPIO43
+3VS +3VS FCH_SDATA0 AD25 A8 USB20_P5
<11,12,34> FCH_SDATA0 SDA0/GPIO47 USB_HSD5P USB20_P5 <22>
R03 modify for TP 6P/8P FCH_SCLK1 T7 C8 USB20_N5 Camera
<38> FCH_SCLK1 SCL1/GPIO227 USB_HSD5N USB20_N5 <22>
FCH_SDATA1 R7
<38> FCH_SDATA1 SDA1/GPIO228
2
ZERO@ MINI1_CLKREQ# AG25 F8

<34> MINI1_CLKREQ# CLK_REQ2#/FANIN4/GPIO62 USB_HSD4P
R954 AG22 E8 Hudson-M2/M3
CLK_REQ1#/FANOUT4/GPIO61 USB_HSD4N
2
10K_0402_5% J2 EHCI CTL

IR_LED#/LLB#/GPIO184
G
VGA_PWRGD_R AG26 C6 DEV 18, Fn 2

SMARTVOLT2/SHUTDOWN#/GPIO51 USB_HSD3P
V8 A6 <Support Wakeup>
1
DDR3_RST#/GEVENT7#/VGA_PD USB_HSD3N
<30> ODD_DA# 3 1ODD_DA#_1 W8 GBE_LED0/GPIO183
S
Y6 SPI_HOLD#/GBE_LED1/GEVENT9# USB_HSD2P C5
Q84 V10 A5
2N7002K_SOT23-3 GBE_LED2/GEVENT10# USB_HSD2N
AA8 GBE_STAT0/GEVENT11#
ZERO@ AF25 C1 USB20_P1
CLK_REQG#/GPIO65/OSCIN/IDLEEXIT# USB_HSD1P USB20_P1 <36>
C3 USB20_N1
+3VS +3VS USB_HSD1N USB20_N1 <36>
For Right Side USB2.0 Port
2 M7 E1 USB20_P0 2
<35> SMIB BLINK/USB_OC7#/GEVENT18# USB_HSD0P USB20_P0 <36>
ODD_DA#_1 R8 E3 USB20_N0
USB_OC6#/IR_TX1/GEVENT6# USB_HSD0N USB20_N0 <36>
2
USB OC
T1 USB_OC5#/IR_TX0/GEVENT17#
R955 R78 1 2 0_0402_5% P6 C16 USBSS_CALRP R864 1 M3@ 2 1K_0402_1%
<30> ODD_PLUG# USB_OC4#/IR_RX0/GEVENT16# USBSS_CALRP
2
10K_0402_5% ZERO@ T32 F5 A16 USBSS_CALRN R865 1 M3@ 2 1K_0402_1% +FCH_VDD_11_SSUSB_S

USB_OC3#/AC_PRES/TDO/GEVENT15# USBSS_CALRN
G
CARD_DET_FCH P5
USB_OC1# USB_OC2#/TCK/GEVENT14#
<36> USB_OC1# J7 A14
1
USB_OC1#/TDI/GEVENT13# USB_SS_TX3P
<31> CARD_DET 3 1CARD_DET_FCH <36> USB_OC0#
USB_OC0# T8 USB_OC0#/SPI_TPM_CS#/TRST#/GEVENT12# USB_SS_TX3N C14
S
Hudson-M3
Q85 C12 xHCI CTL
2N7002K_SOT23-3 USB_SS_RX3P
USB_SS_RX3N A12 DEV 16, Fn 1
xHCI CTL
R866 1 2 33_0402_5% HDA_BITCLK AB3 D15 USB30_MTX_DRX_P2 DEV 16, Fn 0
<39> HDA_BITCLK_AUDIO AZ_BITCLK USB_SS_TX2P USB30_MTX_DRX_P2 <36>
R867 1 2 33_0402_5% HDA_SDOUT AB1 B15 USB30_MTX_DRX_N2
<39> HDA_SDOUT_AUDIO AZ_SDOUT USB_SS_TX2N USB30_MTX_DRX_N2 <36>
HDA_SDIN0
HD AUDIO
<39> HDA_SDIN0 AA2 AZ_SDIN0/GPIO167
33ohm termination HDA_SDIN1 Y5 E14 USB30_MRX_DTX_P2 30 Pin Sub board
USB 3.0
AZ_SDIN1/GPIO168 USB_SS_RX2P USB30_MRX_DTX_P2 <36>
resistor at CODEC side HDA_SDIN2 Y3 F14 USB30_MRX_DTX_N2
HDA_SDIN3 AZ_SDIN2/GPIO169 USB_SS_RX2N USB30_MRX_DTX_N2 <36> USB3.0 Conn
Y1 AZ_SDIN3/GPIO170
R868 1 2 33_0402_5% HDA_SYNC AD6 F15 USB30_MTX_DRX_P1
<39> HDA_SYNC_AUDIO AZ_SYNC USB_SS_TX1P USB30_MTX_DRX_P1 <36>
R869 1 2 33_0402_5% HDA_RST# AE4 G15 USB30_MTX_DRX_N1
<39> HDA_RST_AUDIO# AZ_RST# USB_SS_TX1N USB30_MTX_DRX_N1 <36>
H13 USB30_MRX_DTX_P1 30 Pin Sub board
USB_SS_RX1P USB30_MRX_DTX_P1 <36>
G13 USB30_MRX_DTX_N1
USB_SS_RX1N USB30_MRX_DTX_N1 <36> USB3.0 Conn
+3VALW FCH_GPIO187 K19 J16 USB30_MTX_DRX_P0 C39 M3@1 2 .1U_0402_16V7K
PS2_DAT/SDA4/GPIO187 USB_SS_TX0P USB30TXP <35,36>
FCH_GPIO188 J19 H16 USB30_MTX_DRX_N0 C37 M3@1 2 .1U_0402_16V7K
PS2_CLK/CEC/SCL4/GPIO188 USB_SS_TX0N USB30TXN <35,36>
FCH_GPIO166 J21 On board
USB_OC1# SPI_CS2#/GBE_STAT2/GPIO166 USB30_MRX_DTX_P0
1 2 USB_SS_RX0P J15 USB30_MRX_DTX_P0 <36> USB Conn
R54 100K_0402_5% R03 modify R03 modify for Resverd K15 USB30_MRX_DTX_N0
USB_SS_RX0N USB30_MRX_DTX_N0 <36>
1 2 H_THERMTRIP# remove D44/D45
R871 10K_0402_5% FCH_GPIO189 D21
FCH_SCLK1 FCH_GPIO190 PS2KB_DAT/GPIO189 R870 10K_0402_5%
1 2 C20 PS2KB_CLK/GPIO190 SCL2/GPIO193 H19 1 2
R874 2.2K_0402_5% 2 PX@ 1 D23 G19 R872 1 2 10K_0402_5%
<13,25> PE_GPIO0 PS2M_DAT/GPIO191 EMBEDDED CTRL SDA2/GPIO194
1 2 FCH_SDATA1 0_0402_5% 2 PX@ 1 R842 C22 G22 R90 1 2 10K_0402_5%
<20,25> PE_GPIO1 PS2M_CLK/GPIO192 SCL3_LV/GPIO195
R876 2.2K_0402_5% 0_0402_5% R843 G21 R91 1 2 10K_0402_5%
@ EC_LID_OUT# SDA3_LV/GPIO196
1 2 EC_PWM0/EC_TIMER0/GPIO197 E22
R877 100K_0402_5% H22
FCH_PCIE_WAKE# EC_PWM1/EC_TIMER1/GPIO198 EC_PWM2
3
1 2 F21 KSO_0/GPIO209 EC_PWM2/EC_TIMER2/WOL_EN/GPIO199 J22 EC_PWM2 <28> 3
R878 10K_0402_5% E20 H21
@ SYS_RESET# KSO_1/GPIO210 EC_PWM3/EC_TIMER3/GPIO200
1 2 F20 KSO_2/GPIO211
R18 10K_0402_5% A22 K21
@ SMIB KSO_3/GPIO212 KSI_0/GPIO201
1 2 E18 KSO_4/GPIO213 KSI_1/GPIO202 K22 For PCIE device reset on FS1
R37 10K_0402_5% A20 F22
LAN_CLKREQ# KSO_5/GPIO214 KSI_2/GPIO203 (GFX,GLAN,WLAN,LVDS Travis)
1 2 J18 KSO_6/GPIO215 KSI_3/GPIO204 F24
R942 8.2K_0402_5% R03 modify H18 E24
KSO_7/GPIO216 KSI_4/GPIO205
G18 KSO_8/GPIO217 KSI_5/GPIO206 B23
B21 KSO_9/GPIO218 KSI_6/GPIO207 C24
For FCH internal debug use K18 KSO_10/GPIO219 KSI_7/GPIO208 F18
+3VALW D19
@ TEST0 KSO_11/GPIO220
1 2 A18 KSO_12/GPIO221
R887 2.2K_0402_5% EDP@ M2@ PX@ VGA@ C18
@ TEST1 KSO_13/GPIO222
1 2 B19 KSO_14/GPIO223
2.2K_0402_5%
2.2K_0402_5%
2.2K_0402_5%
2.2K_0402_5%
2.2K_0402_5%
R889 2.2K_0402_5% B17 KSO_15/GPIO224

1
1 @ 2 TEST2 A24
R890 2.2K_0402_5% KSO_16/GPIO225
D17 KSO_17/GPIO226
R62
R57
R47
R45
R43
@
+3VS HUDSON-M2_FCBGA656
2
FCH_GPIO189 M2@
1 2 FCH_SCLK0 FCH_GPIO190
R880 2.2K_0402_5% FCH_GPIO188
1 2 FCH_SDATA0 FCH_GPIO187 +3VALW
R881 2.2K_0402_5% FCH_GPIO166 @ C1199
1 2 MINI1_CLKREQ# 1 2
1
1
100K_0402_5%
R61
100K_0402_5%
R55
100K_0402_5%
R48
100K_0402_5%
100K_0402_5%
R882 8.2K_0402_5%
1 2 MINI2_CLKREQ# 0.1U_0402_16V4Z
5
R883 8.2K_0402_5% @ @ U27

1 2 WD_PWRGD 2
P
B
R46
R44
R862 10K_0402_5% <20,49> VGA_PWRGD VGA_PWRGD 4 1 @ 2 VGA_PWRGD_R

2
LAN_CLKREQ# Y R830 0_0402_5%

1 2 1 A
G
R940 @ 8.2K_0402_5%
3
1 2 EC_RSMRST# 1 2
R884 2.2K_0402_5% R831 @ 100K_0402_5%
1 @ 2 HDA_BITCLK
4 R885 10K_0402_5% 1 2 4
1 @ 2 HDA_SDIN0 R832 0_0402_5%
R886 10K_0402_5% Project SKU ID Value
1 @ 2 HDA_SDIN1
R888 10K_0402_5% GPIO189 (use VGA) Low (UMA) High (VGA)
1 @ 2 HDA_SDIN2
R891 10K_0402_5% GPIO190 (use PX) Low (noPX) High (PX)
1 @ 2 HDA_SDIN3
R893 10K_0402_5% GPIO188 (USB2/3) High (2.0) Low (3.0)
GPIO187 (LVDS/eDP) Low (LVDS) High (eDP)

GPIO166 (Resverd) 2011/07/08 2015/07/08 Title
SCHEMATIC,MB A8331
C B
4019H2
A B C D E
A B C D E
STRAP PINS
PCI_CLK1 PCI_CLK3 PCI_CLK4 LPC_CLK0 LPC_CLK1 EC_PWM2 RTC_CLK
1 1
PULL ALLOW USE NON_FUSION EC CLKGEN LPC ROM S5 PLUS
HIGH PCIE GEN2 DEBUG CLOCK MODE ENABLED ENABLED MODE
STRAPS DISABLED
DEFAULT DEFAULT DEFAULT
PULL FORCE IGNORE FUSION EC CLKGEN SPI ROM S5 PLUS

LOW PCIE GEN1 DEBUG CLOCK DISABLED DISABLE MODE
STRAP MODE ENABLED
DEFAULT DEFAULT DEFAULT DEFAULT
L47 30mil
1 2
FBMA-L11-201209-221LMA30T_0805
220 ohm
+3VS +FCH_VDDAN_33_DAC_R
+3VS +3VS +3VS +3VALW +3VALW +3VALW +3VALW
R905
R906 10K_0402_5%
R907 10K_0402_5%
R908 10K_0402_5%
R909 10K_0402_5%
R910 10K_0402_5%
R911 10K_0402_5%
2.2U_0603_6.3V4Z
0.1U_0402_16V4Z
1
C1209
C1210
1 1
10K_0402_5%
@ @ @ @ Remove VGA_PD
2
2
2 2
<25> PCI_CLK1
2 <25> PCI_CLK3 2
<25> PCI_CLK4
<25,37> LPC_CLK0_EC
<25> LPC_CLK1
<27> EC_PWM2
<25,37> RTC_CLK
1 2
R915 10K_0402_5%
R917 10K_0402_5%
R918 10K_0402_5%
R919 10K_0402_5%
R920 10K_0402_5%
R921 2.2K_0402_5%
R922 2.2K_0402_5%
R912 0_0402_5%
1
1
+1.1VS +FCH_VDDAN_11_MLDAC
@ @ @ 30mil
2
2
DEBUG STRAPS Remove VGA_PD
FCH HAS 15K INTERNAL PU FOR PCI_AD[27:23]
3 3
PCI_AD26 PCI_AD27 PCI_AD25 PCI_AD24 PCI_AD23
USE PCI DISABLE USE FC USE DEFAULT DISABLE PCI

PULL PLL ILA PLL PCIE STRAPS MEM BOOT
HIGH AUTORUN
DEFAULT DEFAULT DEFAULT DEFAULT DEFAULT
PULL BYPASS ENABLE BYPASS USE EEPROM ENABLE PCI

LOW PCI PLL ILA FC PLL PCIE STRAPS MEM BOOT
AUTORUN
<25> PCI_AD27
<25> PCI_AD26
<25> PCI_AD25
<25> PCI_AD24
<25> PCI_AD23
R926 2.2K_0402_5%
R927 2.2K_0402_5%
R928 2.2K_0402_5%
R929 2.2K_0402_5%
R930 2.2K_0402_5%
4 4
1
@ @ @ @ @
2

SCHEMATIC,MB A8331
A B C D E
A B C D E
+VCC_FCH_R +1.1VS
U25C 1007mA
131mA 10mils 1 2
1U_0402_6.3V6K
1U_0402_6.3V6K
.1U_0402_16V7K
.1U_0402_16V7K
2.2U_0603_6.3V4Z
22U_0805_6.3V6M
HUDSON-2 R937 0_0805_5%
50mils
C1213
C1214
C1215
C1216
C1217
C1219
+3VS 1 2 +VDDIO_33_PCIGP AB17 T14
+3VS VDDIO_33_PCIGP_1 VDDCR_11_1
22U_0805_6.3V6M
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
R20 0_0603_5% AB18 T17 1 1 1 1 1 1
VDDIO_33_PCIGP_2 VDDCR_11_2
C1218
C1228
C1220
C1221
L3 U25E
PCI/GPIO I/O
AE9 VDDIO_33_PCIGP_3 VDDCR_11_3 T20
1 2 +VDDPL_3.3V 1 1 1 1 AD10 U16
VDDIO_33_PCIGP_4 VDDCR_11_4
2.2U_0603_6.3V4Z
MBK1608221YZF_2P HUDSON-2
.1U_0402_16V7K
AG7 VDDIO_33_PCIGP_5 VDDCR_11_5 U18
2 2 2 2 2 2
CORE S0
C1222
C1229
220 ohm AC13 VDDIO_33_PCIGP_6 VDDCR_11_6 V14 A3 VSS VSS T25
1 1
1 1 AB12 VDDIO_33_PCIGP_7 VDDCR_11_7 V17 A33 VSS VSS T27
2 2 2 2
AB13 VDDIO_33_PCIGP_8 VDDCR_11_8 V20 B7 VSS VSS U6
AB14 VDDIO_33_PCIGP_9 VDDCR_11_9 Y17 B13 VSS VSS U14
AB16 +1.1VS_CKVDD +1.1VS D9 U17
2 2 VDDIO_33_PCIGP_10 VSS VSS
47mA 10mils 20mils 340mA D13 VSS VSS U20
+VDDPL_3.3V H24 H26 +1.1VS_CKVDD 1 2 E5 U21
VDDPL_33_SYS VDDAN_11_CLK_1 VSS VSS
1U_0402_6.3V6K
1U_0402_6.3V6K
.1U_0402_16V7K
.1U_0402_16V7K
2.2U_0603_6.3V4Z
20mA 10mils J25 R25 0_0603_5% E12 U30
+FCH_VDDAN_33_DAC_R VDDAN_11_CLK_2 VSS VSS
C1223
C1224
C1225
C1226
C1230
+VDDPL_33_DAC
CLKGEN I/O
+FCH_VDDPL_33_MLDAC 2 1 V22 VDDPL_33_DAC VDDAN_11_CLK_3 K24 E16 VSS VSS U32
20mA R22 0_0402_5% 10mils VDDAN_11_CLK_4 L22 1 1 1 1 1 E29 VSS VSS V11
1 2 +FCH_VDDPL_33_MLDAC 2 +VDDPL_33_ML
1 U22 VDDPL_33_ML VDDAN_11_CLK_5 M22 F7 VSS VSS V16
R19 0_0603_5% 200mA R23 0_0402_5% 10mils N21 F9 V18
+3VS VDDAN_11_CLK_6 VSS VSS
2.2U_0603_6.3V4Z
+FCH_VDDAN_33_DAC_R
.1U_0402_16V7K
T22 VDDAN_33_DAC VDDAN_11_CLK_7 N22 F11 VSS VSS W4
2 2 2 2 2
C1227
C1231
@ L4 VDDPL_33_SSUSB_S 20mA 10mils P22 F13 W6

R936 2 M2@ 10_0402_5% +FCH_VDDPL_33_SSUSB_S VDDAN_11_CLK_8 VSS VSS
1 2 1 1 For Hudson3 USB3.0 only L18 VDDPL_33_SSUSB_S F16 VSS VSS W25
MBK1608221YZF_2P 17mA 10mils F17 W28
For Hudson2, connect to GND +FCH_VDDPL_33_USB_S +PCIE_VDDR_FCH +1.1VS VSS VSS
220 ohm D7 VDDPL_33_USB_S 50mils F19 VSS VSS Y14
2 2
43mA 10mils VDDAN_11_PCIE_1 AB24 1088mA F23 VSS VSS Y16
+VDDPL_33_PCIE AH29 Y21 +PCIE_VDDR_FCH 1 2 F25 Y18
VDDPL_33_PCIE VDDAN_11_PCIE_2 VSS VSS
PCI EXPRESS
1U_0402_6.3V6K
1U_0402_6.3V6K
.1U_0402_16V7K
.1U_0402_16V7K
2.2U_0603_6.3V4Z
93mA 10mils AE25 R938 0_0805_5% F29 AA6
VDDAN_11_PCIE_3 VSS VSS
C1233
C1234
C1235
C1236
C1237
LDO_CAP: Internally generated 1.8V +VDDPL_33_SATA AG28 VDDPL_33_SATA VDDAN_11_PCIE_4 AD24 G6 VSS VSS AA12
supply for the RGB outputs VDDAN_11_PCIE_5 AB23 1 1 1 1 1 G16 VSS VSS AA13
For A11: Cap = 1nF @ AA22 G32 AA14
+3VALW VDDAN_11_PCIE_6 VSS VSS
For A12, Cap = DNI 1 2 M31 LDO_CAP VDDAN_11_PCIE_7 AF26 H12 VSS VSS AA16
M3@ L6 +FCH_VDDAN_11_MLDAC C1232 2.2U_0603_6.3V4Z AG27 H15 AA17
VDDAN_11_PCIE_8 2 2 2 2 2 VSS VSS
2 +FCH_VDDPL_33_SSUSB_S L24 7mA
GROUND
1 10mils H29 VSS VSS AA25
2.2U_0603_6.3V4Z
.1U_0402_16V7K
MBK1608221YZF_2P 1 2 1 2 +VDDPL_11_DAC V21 J6 AA28

VDDPL_11_DAC +1.1VS VSS VSS
C1238
C1239
MBK1608221YZF_2P R24 0_0402_5% 60mils J9 AA30

+VDDAN_11_ML VSS VSS
220 ohm 1 1 220 ohm/2A 226mA VDDAN_11_SATA_1 AA21 1337mA+AVDD_SATA J10 VSS VSS AA32
1 2 20mils Y20 +AVDD_SATA 1 2 J13 AB25
VDDAN_11_SATA_4 VSS VSS
.1U_0402_16V7K
.1U_0402_16V7K
1U_0402_6.3V6K
1U_0402_6.3V6K
.1U_0402_16V7K
.1U_0402_16V7K
22U_0805_6.3V6M
R1148 0_0603_5% Y22 AB21 R941 0_0805_5% J28 AC6
VDDAN_11_ML_1 VDDAN_11_SATA_2 VSS VSS
MAIN LINK
M3@
M3@
C1240
4.7U_0603_6.3V6K
C1241
C1242
C1243
C1244
C1245
C1246
C1247
SERIAL ATA
V23 VDDAN_11_ML_2 VDDAN_11_SATA_3 AB22 J32 VSS VSS AC18
2 2
1 1 1 V24 VDDAN_11_ML_3 VDDAN_11_SATA_5 AC22 1 1 1 1 1 K7 VSS VSS AC28
2 2
V25 VDDAN_11_ML_4 VDDAN_11_SATA_6 AC21 K16 VSS VSS AD27
VDDAN_11_SATA_7 AA20 K27 VSS VSS AE6
VDDAN_11_SATA_8 AA18 K28 VSS VSS AE15
+VDDAN_33_USB 2 2 2 2 2 2 2 2
VDDAN_11_SATA_9 AB20 L6 VSS VSS AE21
L7 AC19 L12 AE28
VDDAN_11_SATA_10 +3VALW VSS VSS
1 2+FCH_VDDPL_33_USB_S AB10 VDDIO_33_GBE_S L13 VSS VSS AF8
2.2U_0603_6.3V4Z
.1U_0402_16V7K
MBK1608221YZF_2P 10mils 59mA L15 AF12

VSS VSS
C1248
C1249
220 ohm AB11 N18 +VDDIO_33_S 1 2 L16 AF16

VDDCR_11_GBE_S_1 VDDIO_33_S_1 VSS VSS
GBE LAN
.1U_0402_16V7K
.1U_0402_16V7K
2.2U_0603_6.3V4Z
1 1 AA11 L19 R26 0_0402_5% L21 AF33
VDDCR_11_GBE_S_2 VDDIO_33_S_2 VSS VSS
C1250
C1251
C1252
VDDIO_33_S_3 M18 M13 VSS VSS AG30
3.3V_S5 I/O
1 2 AA9 VDDIO_GBE_S_1 VDDIO_33_S_4 V12 1 1 1 M16 VSS VSS AG32
R945 0_0402_5% AA10 V13 M21 AH5
2 2 +3VALW VDDIO_GBE_S_2 VDDIO_33_S_5 VSS VSS
VDDIO_33_S_6 Y12 M25 VSS VSS AH11
L54 658mA 30mils Y13 N6 AH18
+VDDAN_33_USB VDDIO_33_S_7 2 2 2 VSS VSS
1 2 G7 VDDAN_33_USB_S_1 VDDIO_33_S_8 W11 N11 VSS VSS AH19
1U_0402_6.3V6K
1U_0402_6.3V6K
10U_0603_6.3V6M
10U_0603_6.3V6M
.1U_0402_16V7K
FBMA-L11-201209-221LMA30T_0805 H8 N13 AH21
+3VS VDDAN_33_USB_S_2 +3VALW VSS VSS
C1253
C1254
C1255
C1256
C1257
220 ohm/3A J8 VDDAN_33_USB_S_3 N23 VSS VSS AH23
L15 1 1 1 1 1 K8 10mils 5mA M3@ L28 N24 AH25
+VDDPL_33_PCIE VDDAN_33_USB_S_4 +VDDXL_3.3V VSS VSS
1 2 K9 VDDAN_33_USB_S_5 VDDXL_33_S G24 1 2 P12 VSS VSS AH27
2.2U_0603_6.3V4Z
.1U_0402_16V7K
.1U_0402_16V7K
2.2U_0603_6.3V4Z
MBK1608221YZF_2P M9 MBK1608221YZF_2P P18 AJ18
VDDAN_33_USB_S_6 +3VS VSS VSS
C1258
C1259
C1260
C1261
220 ohm 2 2 2 2 2
M10 VDDAN_33_USB_S_7 P20 VSS VSS AJ28
1 1 N9 1 1 M2@ L30 P21 AJ29
VDDAN_33_USB_S_8 VSS VSS
N10 VDDAN_33_USB_S_9 1 2 P31 VSS VSS AK21
M12 MBK1608221YZF_2P P33 AK25
VDDAN_33_USB_S_10 VSS VSS
2 2
N12 VDDAN_33_USB_S_11 2 2
220 ohm R4 VSS VSS AL18
M11 VDDAN_33_USB_S_12 R11 VSS VSS AM21
+1.1VALW R25 AM25
L57 +1.1VALW VSS VSS
140mA 10mils R28 AN1
USB
+VDDAN_11_USB_S VSS VSS
1 2 U12 VDDAN_11_USB_S_1 10mils 187mA T11 VSS VSS AN18
2.2U_0603_6.3V4Z
.1U_0402_16V7K
MBK1608221YZF_2P U13 N20 +VDDCR_1.1V 1 2 T16 AN28

+3VS VDDAN_11_USB_S_2 VDDCR_11_S_1 VSS VSS
C1262
C1263
1U_0402_6.3V6K
1U_0402_6.3V6K
220 ohm M20 R1145 0_0603_5% T18 AN33
VDDCR_11_S_2 VSS VSS
C1264
C1265
L22 1 1
3 +VDDPL_33_SATA 3
1 2 1 1 SYSON <35,37,40,48> N8 VSSAN_HWM VSSPL_DAC T21
2.2U_0603_6.3V4Z
.1U_0402_16V7K
MBK1608221YZF_2P L28
VSSAN_DAC
C1266
C1267
220 ohm K25 VSSXL VSSANQ_DAC K33
2
2 2
G
1 1 @ N28
2 2 Q13 VSSIO_DAC
H25 VSSPL_SYS
3 1 AO3416L_SOT23-3 EFUSE R6
+1.1VALW
D
2 2 L59 +1.1VALW
197mA 10mils
1 2 +VDDCR_1.1V_USB T12 10mils 70mA L29
VDDCR_11_USB_S_1
2.2U_0603_6.3V4Z
.1U_0402_16V7K
.1U_0402_16V7K
MBK1608221YZF_2P T13 J24 +VDDPL_1.1V 1 2 HUDSON-M2_FCBGA656

VDDCR_11_USB_S_2 VDDPL_11_SYS_S
C1268
C1269
C1270
2.2U_0603_6.3V4Z
220 ohm MBK1608221YZF_2P M2@
.1U_0402_16V7K
+1.1VS
C1271
C1272
1 1 1 Connected to VSS through a dedicated via.
1 1 L31
1 @ 2
MBK1608221YZF_2P
2 2 2
2 2
220 ohm
+3VALW
+FCH_VDD_11_SSUSB_S 12mA
20mils 10mils +VDDAN_33_HWM
282mA P16 VDDAN_11_SSUSB_S_1 VDDAN_33_HWM_S M8 1 2
2.2U_0603_6.3V4Z
M3@ 2 +VDDAN_SSUSB R27 0_0402_5% AMD reply:
.1U_0402_16V7K
1 M14 VDDAN_11_SSUSB_S_2
1U_0402_6.3V6K
.1U_0402_16V7K
.1U_0402_16V7K
C1472
C1473
R1149 0_0603_5% N14 VDDAN_33_HWM_S: Please connect
VDDAN_11_SSUSB_S_3
C1273
C1274
C1275
For FCH M2 - BOM option 40mils P13 1 1 it to +3.3V_S5 directly if HWM is not used.
VDDAN_11_SSUSB_S_4
+FCH_VDD_11_SSUSB_S
VDDAN_11_SSUSB_S / VDDAN_11_SSUSB_S 1 1 1 P14 VDDAN_11_SSUSB_S_5

USB SS
Connected to VSS.
2 2
M3@
M3@
M3@
2 2 2 30mils
N16
1
M2@ M2@ VDDCR_11_SSUSB_S_1 +3VS

N17 VDDCR_11_SSUSB_S_2
C1275 C1281 P17 10mils 26mA
0_0402_5% 0_0402_5% VDDCR_11_SSUSB_S_3 +VDDIO_AZ
M17 VDDCR_11_SSUSB_S_4 VDDIO_AZ_S AA4 1 2
4 R28 0_0402_5% VDDIO_AZ_S should be tied to 4
2
POWER 1 2 +3.3/1.5V_S5 rail if Wake on Ring

424mA C1276 2.2U_0603_6.3V4Z is supported
+1.1VALW 2 1 1 M3@ 2 +VDDCR_11_SSUSB HUDSON-M2_FCBGA656 1 2
10U_0603_6.3V6M
1U_0402_6.3V6K
.1U_0402_16V7K
.1U_0402_16V7K
L61 M3@ R1150 0_0603_5% M2@ C1277 .1U_0402_16V7K

C1278
C1279
C1280
C1281
FBMA-L11-201209-221LMA30T_0805
42 ohm/4A 1 1 1 1
M3@
M3@
M3@
M3@
2 2 2 2 Issued Date 2011/07/08 Deciphered Date 2015/07/08 Title
SCHEMATIC,MB A8331
A B C D E
A B C D E F G H
SATA HDD1 Conn. SATA ODD Conn.

JHDD1 JODD1
1 S H-CONN SANTA 205503-1 13P H5.5
C1283 1 GND
<26> SATA_STX_DRX_P0 2 .01U_0402_16V7K SATA_STX_C_DRX_P0 2 RX+
C1285 1 2 .01U_0402_16V7K SATA_STX_C_DRX_N0 3 1
<26> SATA_STX_DRX_N0 RX- GND
4 <26> SATA_STX_DRX_P1 C1301 1 2 .01U_0402_16V7K SATA_STX_C_DRX_P1 2
C1287 1 GND A+
<26> SATA_DTX_C_SRX_N0 2 .01U_0402_16V7K SATA_DTX_SRX_N0 5 TX- <26> SATA_STX_DRX_N1 C1300 1 2 .01U_0402_16V7K SATA_STX_C_DRX_N1 3 A-
<26> SATA_DTX_C_SRX_P0 C1289 1 2 .01U_0402_16V7K SATA_DTX_SRX_P0 6 4
TX+ C1302 1 GND
7 GND <26> SATA_DTX_C_SRX_N1 2 .01U_0402_16V7K SATA_DTX_SRX_N1 5 B-
C1303 1 2 .01U_0402_16V7K SATA_DTX_SRX_P1 6
1 <26> SATA_DTX_C_SRX_P1 B+ 1
7 GND
+3VS 8
+3VS 3.3V
9 3.3V
1 10 R79 1 2 0_0402_5% 8
3.3V <27> ODD_PLUG# DP
C1290 11 ZERO@ 100mils 9
GND +5VS_ODD +5V
12 GND 10 +5V GND 17
0.1U_0402_16V4Z 13 R80 1 2 0_0402_5% 11 16
2 GND <27> ODD_DA# MD GND
14 ZERO@ 12 15
5V GND GND
+5VS_HDD1
80mils 15 5V 13 GND GND 14
+5VS 2 1 16 5V
R953 0_0805_5% 17 10U_0805_10V4Z 0.1U_0402_16V4Z
GND CONN@
18 Rsv
10U_0603_6.3V6M 0.1U_0402_16V4Z 19 1 1 1 1
GND C1304 C1305 C1306 C1307
20 12V
1 1 1 1 21 12V Part Number = SP010013G00
C1292 C1293 C1294 C1295 22 12V 2 2 2 2 PCB Footprint = OCTEK_SLS-13SB1G_13P_RV
23 GND
24 GND
2 2 2 2 1U_0402_6.3V6K 1000P_0402_50V7K
CONN@
1U_0402_6.3V6K 1000P_0402_50V7K OCTEK_SAT-22DD1G
Part Number = DC010002Q00
PCB Footprint = OCTEK_SAT-22DD1G_22P
+5VS +5VS_ODD +5VS_ODD
100mils R793 100mils
0_0805_5%
2
2 1
ZERO@
Change to +5VS +5VS +VSB R1129
D
20110208 6 470_0603_5%
S
1 5 4
1
1
2
2 ZERO@ 2
2
ZERO@ ZERO@ C812 1 ZERO@
1
R21 R789 1U_0402_6.3V6K Q86
G
10K_0402_5% 470K_0402_5% 2 SI3456BDV-T1-E3_TSOP6 D
3
2 ODD_EN#
1
G
ODD_EN# ODD_EN S
ZERO@ ZERO@
3
6
2
Q91A ZERO@ 1 ZERO@ Q75
DMN66D0LDW-7_SOT363-6 ZERO@ R785 C811 2N7002K_SOT23-3
Q91B 1.5M_0402_5% .1U_0603_25V7K
2 5 DMN66D0LDW-7_SOT363-6
<26> ODD_PWR 2
1
1
4
S
c
r
e
w
H
o
l
e
F
o
l
l
o
w
P
5
W
E
0
FAN
F
A
N
S
t
a
n
d
-
O
f
f
H1 H2 H3 H7
H_3P4 H_3P4 H_3P4 H_3P4
@ @ @ @
1
+5VS
3 C1404 10U_0805_10V4Z 3
1 2
H8 H9 H10 H11 H13 H14 H15 H16 H17 H18 H28

H_3P0 H_3P0 H_3P0 H_3P0 H_3P0 H_3P0 H_3P0 H_3P0 H_3P0 H_3P0 H_3P0
U35
1 EN GND 8
2 7 @ @ @ @ @ @ @ @ @ @ @
1
1
+VCC_FAN1 VIN GND
3 VOUT GND 6
<37> EN_DFAN1 1 2 4 VSET GND 5
R1065 0_0402_5% 1
@ APL5607KI-TRG_SO8 H19 H20 H21 H22 H23 H24
C1405 H_4P0 H_4P0 H_4P2 H_4P2 H_4P2 H_4P2
0.1U_0402_16V4Z
2
@ @ @ @ @ @
1
1
C1406
10U_0805_10V4Z For Layout request H26 H27 H29 R03 Add
1 2 Delete H25 H_3P0N H_3P5X3P0N H_3P5N
20110419
+3VS C1407
1000P_0402_50V7K @ @ @
1
1 2
1
R1066 FD1 FD3 FD2 FD4

10K_0402_5%
40mil JFAN1 @ @ @ @
2
+VCC_FAN1 1 1 1
4 FIDUCIAL_C40M80 FIDUCIAL_C40M80 FIDUCIAL_C40M80 FIDUCIAL_C40M80 4
<37> FAN_SPEED1 2 2
3 3
1
C1408 4
1000P_0402_50V7K GND
5 GND
2 CONN@
ACES_85205-03001
Part Number = SP02000AG00 Security Classification Compal Secret Data Compal Electronics, Inc.
PCB Footprint = ACES_85205-03001_3P 2011/07/08 2015/07/08 Title
SCHEMATIC,MB A8331
B B
4019H2
A B C D E F G H
5 4 3 2 1
U55 10mil
<6> PCIE_FTX_C_DRX_P3 PCIE_FTX_C_DRX_P3 1 48 RREF 1 2

HSIP RREF R1700 6.2K_0402_1%
<6> PCIE_FTX_C_DRX_N3 PCIE_FTX_C_DRX_N3 2 47 60mil +3VS_CR
HSIN 3V3_IN
<25> CLK_PCIE_CR CLK_PCIE_CR 3 46 CRCLK_REQ#
REFCLKP CLK_REQ# CRCLK_REQ# <25>
D CLK_PCIE_CR# APU_PCIE_RST# D
<25> CLK_PCIE_CR# 4 REFCLKN PERST# 45 APU_PCIE_RST# <13,25,32,34,35>
1 2 AV12 20mil 5 44
C1700 4.7U_0603_6.3V6K AV12 EEDO
D3-Delink function for AMD
1 2 PCIE_DTX_FRX_P3 6 43 1 2 0: Card remove, PCIE De-link
<6> PCIE_DTX_C_FRX_P3 HSOP EECS CARD_DET <27>
C1701 .1U_0402_16V7K R1701 0_0402_5%
PCIE_DTX_FRX_N3 1: Card Insert PCIE link
<6> PCIE_DTX_C_FRX_N3 1 2 7 HSON EESK 42
C1702 .1U_0402_16V7K
8 41 5IN1_LED#
AV12 1 GND GPIO/EEDI 5IN1_LED# <38> PU on LED side
2 DV12
R1704 @ 0_0402_5% 1 2 DV12 20mil 9 40 MS_INS#
C1703 0.1U_0402_16V4Z DV12 MS_INS#
+CARDPWR 40mil 10 800mA 39 SD_CD#
Card1_3V3 SD_CD# JREAD1
+3VS_CR 60mil 11 38 SP15_SDWP_XDD7 +XDPWR_SDPWR_MSPWR
3V3_IN SP15 SP8_MSD4_XDD0
11 SD_VCC XD_D0 31
12 400mA 37 SP14_XDD6 1 2 MSCLK 1 2 40mil 18 32 SP9_MSD0_XDD1
Card2_3V3 SP14 R1703 0_0402_5% MS_VCC XD_D1 SP10_MSD2_XDD2
39 XD_VCC XD_D2 33
XD_CD# 13 36 SP13_MSD7_XDD5 @ C1719 34 SP11_MSD6_XDD3
XD_CD# SP13 10P_0402_50V8J XD_D3 SP12_MSD3_XDD4
XD_D4 35
1 2 20mil DV33_18 14 35 SP12_MSD3_XDD4 SD_CLK_R 8 36 SP13_MSD7_XDD5
C1706 1U_0402_6.3V6K DV33_18 SP12 SD_CMD_R SD_CLK XD_D5 SP14_XDD6
16 SD_CMD XD_D6 37
1 2 15 34 SP11_MSD6_XDD3 SD_CD# 1 38 SP15_SDWP_XDD7
C1705 @ 4.7U_0603_6.3V6K GND SP11 SP15_SDWP_XDD7 2 SD_CD XD_D7
C SD_WP C
SP1_SDD7_XDRDY16 33 SP10_MSD2_XDD2 SD_D0_R 4 22 XD_CD#
SP1 SP10 SD_D1_R SD/MMC_DAT0 XD_CD SP1_SDD7_XDRDY
3 SD/MMC_DAT1 XD_R/B 23
SP2_SDD6_XDRE# 17 32 SP9_MSD0_XDD1 SD_D2_R 21 24 SP2_SDD6_XDRE#
SP2 SP9 SD_D3_R SD/MMC_DAT2 XD_RE SP3_SDD5_XDCE#
19 SD/MMC_DAT3 XD_CE 25
SP3_SDD5_XDCE# 18 31 SP8_MSD4_XDD0 26 SP5_MSBS_XDCLE
SP3 SP8 XD_CLE SP6_MSD5_XDALE
27
SP4_SDD4_XDWE#19
SP4 SP7 30 SP7_MSD1_XDWP# Card Reader XD_ALE
XD_WE 28 SP4_SDD4_XDWE#
29 SP7_MSD1_XDWP#
SD_D1_R 1
R1705
2 SD_D1
0_0402_5%
20 SD_D1 SP6 29 SP6_MSD5_XDALE Connector XD_WP-IN
SD_GND 6
SD_D0_R 1 2 SD_D0 21 28 SP5_MSBS_XDCLE 1 2 SP9_MSD0_XDD1 10 13
R1706 0_0402_5% SD_D0 SP5 C1707 4.7U_0603_6.3V6K SP7_MSD1_XDWP# 9 MS_DATA0 SD_GND
MS_DATA1 MS_GND 5
1 2 SD_CLK_R 1 2 SD_CLK 22 27 DV12_S 1 2 SP10_MSD2_XDD2 12 20
C1720 R1707 10_0402_5% SD_CLK DV12_S C1709 0.1U_0402_16V4Z SP12_MSD3_XDD4 15 MS_DATA2 MS_GND
MS_DATA3 XD_GND 30
4.7P_0402_50V8C SD_CMD_R 1 2 SD_CMD 23 26 MSCLK 17 40
R1708 0_0402_5% SD_CMD GND MS_INS# MS_SCLK XD_GND
14 MS_INS GND 41
SD_D3_R 1 2 SD_D3 24 25 SD_D2 1 2 SD_D2_R SP5_MSBS_XDCLE 7 42
R1709 0_0402_5% SD_D3 SD_D2 R1710 0_0402_5% MS_BS GND
TAITW_R013-P17-HM_NR
RTS5209-GR_LQFP48_7X7 CONN@
Part Number = SA000042A00 Part Number = SP07000RU00
PCB Footprint = RTS5209-GR_LQFP48_7X7 PCB Footprint = TAITW_R013-P17-HM_40P_NR
B B
60mil 60mil 40mil 40mil For EMI Requirement Close to JREAD1

+3VS +3VS_CR +CARDPWR +XDPWR_SDPWR_MSPWR
SD_CLK_R 1 2 1 2
R1713 R1711 10_0402_5% C1710 4.7P_0402_50V8C
1 2 1 2
R1712 0_0603_5% 0_0603_5% MSCLK 1 2 1 2
10U_0603_6.3V6M
C1715
0.1U_0402_16V4Z
C1716
0.1U_0402_16V4Z
C1717
0.1U_0402_16V4Z
C1718
10U_0603_6.3V6M
C1713
0.1U_0402_16V4Z
C1711
0.1U_0402_16V4Z
C1712
R1714 10_0402_5% C1714 10P_0402_50V8J
1
1 1 1 1 1 1 1
100K_0402_5%
@R1715
@ R1715
2 2 2 2 2 2 2
2
Close to Pin 11,47 close to JREAD1
A A

SCHEMATIC,MB A8331
B B
4019H2
5 4 3 2 1
5 4 3 2 1
Power On strapping
Pin Description Chip Default
H:Over Clock Enable
LED0 H
L:Over Clock Disable PD 5.1K
U56 LED0,1,2 intel Pull UP 1 2 *
R1800 5.1K_0402_5% H:SWR Switch mode regulator Select *
1 2 PCIE_DTX_FRX_N0 29 38 LED2 --
<6> PCIE_DTX_C_FRX_N0 TX_N LED_0 LAN_ACT <33>
C1800 .1U_0402_16V7K AR8151 Pin23=LED2.
D
1 2 PCIE_DTX_FRX_P0 30
Atheros LED_1 39
23 1 2 LAN_CLKREQ#
LAN_LINK# <33> D
<6> PCIE_DTX_C_FRX_P0 TX_P 8151-AL1A LED_2
C1801 .1U_0402_16V7K R1803 8152@ 0_0402_5% AR8152, Pin23 is CLKREQ
PCIE_FTX_C_DRX_N036
<6> PCIE_FTX_C_DRX_N0 RX_N
TRXN0 12 LAN_MIDI0- <33>
PCIE_FTX_C_DRX_P035 11
<6> PCIE_FTX_C_DRX_P0 RX_P TRXP0 LAN_MIDI0+ <33>
TRXN1 15 LAN_MIDI1- <33>
R1801 1 2 0_0402_5% CLK_PCIE_LAN#_R 32 14
<25> CLK_PCIE_LAN# REFCLK_N TRXP1 LAN_MIDI1+ <33>
R1802 1 2 0_0402_5% CLK_PCIE_LAN_R 33 18
<25> CLK_PCIE_LAN REFCLK_P TRXN2 LAN_MIDI2- <33>
TRXP2 17 LAN_MIDI2+ <33> Place Close to Pin40
R1804 1 2 0_0402_5% 2 21 DCR< 0.15 ohm
<13,25,31,34,35> APU_PCIE_RST# PERST# TRXN3 LAN_MIDI3- <33>
TRXP3 20 LAN_MIDI3+ <33> Rate current > 1A
PU at EC side R1805 1 2 0_0402_5% LAN_PME# 3
<37> EC_PME# WAKE#
R1806 1 @ 2 0_0402_5% 25 10 LAN_RBIAS 1 2
<27,34,35> FCH_PCIE_WAKE# SMCLK RBIAS +3V_LAN +1.7_VDDCT +1.7_LX
26 R1807 2.37K_0402_1%
SMDATA L1801
Close Pin 10
28 TEST_RST VDD33 1 1 2
27 4.7UH_PG031B-4R7MS_1.1A_20%
TESTMODE
0.1U_0402_16V4Z
C1807
1U_0402_6.3V6K
C1802
10U_0805_10V4Z
C1808
10U_0805_10V4Z
C1809
1000P_0402_50V7K
C1803
0.1U_0402_16V4Z
C1810
10U_0805_10V4Z
C1804
PCB Footprint = CYNTE_PG031B-4R7MS_2P
40 +1.7_LX +1.7_LX 1 1 1 1 1 1
LAN_XTALO LX
7 XTLO
R03 change footprint
LAN_XTALI 8 XTLI +1.7_VDDCT @ @
1 2 VDDCT 5 +1.7_VDDCT
C1805 8152@ 0.1U_0402_16V4Z 2 2 2 2 2 2
C 1 2 C
1 2 4 C1806 0.1U_0402_16V4Z
<27> LAN_CLKREQ# CLKREQ#
R1808 8151@ 0_0402_5% 24 +1.1_DVDDL
DVDDL
PU at FCH side DVDDL_REG 37
0.1U_0402_16V4Z
C1821
1U_0402_6.3V6K
C1822
0.1U_0402_16V4Z
C1823
+1.1_AVDDL 13 Pin16 for AR8152 LED2
LAN_XTALI +1.1_AVDDL AVDDL R1818 8151@ 0_0402_5%
19 AVDDL 1 1 1
+1.1_AVDDL 31 16 1 2
LAN_XTALO +1.1_AVDDL AVDDL AVDDH
34 AVDDL AVDDH 22
X3 +1.1_AVDDL 6 9 +2.7_AVDDH
AVDDL_REG AVDDH_REG 2 2 2
1 2
0.1U_0402_16V4Z
C1811
0.1U_0402_16V4Z
C1812
0.1U_0402_16V4Z
C1813
0.1U_0402_16V4Z
C1814
1U_0402_6.3V6K
C1815
0.1U_0402_16V4Z
C1816
0.1U_0402_16V4Z
C1817
1U_0402_6.3V6K
C1818
0.1U_0402_16V4Z
C1819
0.1U_0402_16V4Z
C1820
C1824
25MHZ_20PF_7A25000012
C1825
1 1 1 1 1 1 41 GND 1 1 1 1
1 1
S IC AR8151-BL1A-RL QFN 40P E-LAN CTRL Near Near
8151@
8151@
8151@
8151@ Pin37 Pin24
2 2 2 2 2 2 2 2 2 2
33P_0402_50V8J
33P_0402_50V8J
2 2
Near Near Near Near Near Near Near Near

Place Close to LAN chip
Pin13 Pin19 Pin31 Pin34 Pin6 Pin9 Pin22 Pin16
LAN_MIDI0+ R1809 1 2 @1 2 C1826 1000P_0402_50V7K
49.9_0402_1%
B LAN_MIDI0- R1810 1 2 1 2 C1827 0.1U_0402_16V4Z B
49.9_0402_1%
R04 modify 1219 +3V_LAN +3VALW LAN_MIDI1+ R1811 1 2 @1 2 C1828 1000P_0402_50V7K
L1800 49.9_0402_1%
1 2 LAN_MIDI1- R1812 1 2 1 2 C1829 0.1U_0402_16V4Z
FBMA-L11-201209-221LMA30T_0805 49.9_0402_1%
LAN_MIDI2+ R1813 1 2 @1 2 C1830 1000P_0402_50V7K
Q1801 @ 8151@ 49.9_0402_1%
AO3419L_SOT23-3 LAN_MIDI2- R1814 1 2 1 2 C1831 0.1U_0402_16V4Z
8151@ 49.9_0402_1% 8151@
D
1 3
LAN_MIDI3+ R1815 1 2 @1 2 C1832 1000P_0402_50V7K
8151@ 49.9_0402_1%
LAN_MIDI3- R1816 1 2 1 2 C1833 0.1U_0402_16V4Z
8151@ 49.9_0402_1% 8151@
Note 1 : 8152 no mount MDI3+, MDI3-, MDI2-, MDI2+

G
@
resister and cap
2
LAN_PWR_EN# 1 2
<37> LAN_PWR_EN#
R1819 1
0_0402_5% @ Note 2 : C1, C3, C5, C7 reserved for EMI.
C1839
0.1U_0402_16V4Z
2
A A
Configure Configure
Pin4 R1808 C1805 Pin23 R1803 Security Classification Compal Secret Data Compal Electronics, Inc.
AR8152 VDDCT_REG * CLKREQn * SCHEMATIC,MB A8331
AR8151 CLKREQn LED[2] DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B 4019H2 B
* MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5 4 3 2 1
5 4 3 2 1
D D
Timag only (Height) LAN Connector

T30
<32> LAN_MIDI0+ LAN_MIDI0+ 1 16 RJ45_MIDI0+ 2 1

LAN_MIDI0- TD+ TX+ RJ45_MIDI0- 220P_0402_50V7K C1533
<32> LAN_MIDI0- 2 TD- TX- 15
3 14 JRJ45
CT CT
4 NC NC 13 +3V_LAN 9 Green LED+
5 NC NC 12
6 CT CT 11 <32> LAN_LINK# 1 2 10 Green LED-
<32> LAN_MIDI1+ LAN_MIDI1+ 7 10 RJ45_MIDI1+ 1 R1215 1K_0402_5%
LAN_MIDI1- RD+ RX+ RJ45_MIDI1- RJ45_MIDI0+
<32> LAN_MIDI1- 8 RD- RX- 9 1 PR1+ SHLD1 14
C1534 13
RJ45_MIDI0- SHLD2
68P_0402_50V8J 2 PR1-
TAIMAG_HD-024A 2
@
RJ45_MIDI1+ 3
T31 8151@ PR2+
RJ45_MIDI2+ 4
LAN_MIDI2+ RJ45_MIDI2+ PR3+
<32> LAN_MIDI2+ 1 TD+ TX+ 16
<32> LAN_MIDI2- LAN_MIDI2- 2 15 RJ45_MIDI2- RJ45_MIDI2- 5
C TD- TX- PR3- C
3 14 check value
CT CT RJ45_MIDI1-
4 NC NC 13 6 PR2-
5 NC NC 12
6 11 RJ45_MIDI3+ 7
LAN_MIDI3+ CT CT RJ45_MIDI3+ PR4+
<32> LAN_MIDI3+ 7 RD+ RX+ 10
<32> LAN_MIDI3- LAN_MIDI3- 8 9 RJ45_MIDI3- R1218 RJ45_MIDI3- 8
RD- RX- 1K_0402_5% PR4-
1 R1
1 R3
1 R2
1 R4
TAIMAG_HD-024A <32> LAN_ACT 1 2 11 Yellow LED+ 40mil
1
C1535 12 Yellow LED-
8151@
8151@
220P_0402_50V7K
1 2 +1.7_VDDCT_R CONN@
+1.7_VDDCT 2
R1817 SANTA_130451-K
C1
C2
C3
C4
C1834
C1835
C1836
C1837
C1838
0_0603_5% Part Number = DC234005010

2
2
1 1 1 1 1 1 1 1 1 PCB Footprint = SANTA_130451-K_12P
75_0402_1%
75_0402_1%
75_0402_1%
75_0402_1%
R04 modify for EMI
@ @ @ @ @ 1 2
1U_0402_6.3V6K
.1U_0402_16V7K
1000P_0402_50V7K
.1U_0402_16V7K
1000P_0402_50V7K
.1U_0402_16V7K
1000P_0402_50V7K
.1U_0402_16V7K
1000P_0402_50V7K
C1538 10P_0603_50V8-J LANGND

2 2 2 2 2 2 2 2 2 RJ45_GND 1 2
100UH_SSC0301101MCF_0.18A_20%
B88069X9231T203_4P5X3P2-2
C1537 10P_1206_2KV8J
RJ45_GND
3
10U_0603_6.3V6M
.1U_0402_16V7K
40mil 2 1
1
B @ 1 @ B
@ JP4 1
C43
L86
JP5
C24
B88069X9231T203_4P5X3P2-2 D42
Place close to TCT pin 2 1 AZ5125-02S.R7G_SOT23-3
2 SCA00001A00
1
@ JP3 2
2
B88069X9231T203_4P5X3P2-2 R03 modify for ESD Pop
A A

SCHEMATIC,MB A8331
B B
4019H2
5 4 3 2 1
A B C D E
R04 Modify TOP View - Right (Wireless LAN) R04 Modify

R1009 0_0402_5%
1 @ 2
(STD H6.7 mm)
<37> WLAN_PME# +1.5VS_MINI1
JMINI1
<27,32,35> FCH_PCIE_WAKE# R984 0_0402_5%
1 @ WLAN_PME#_R1
2 2 40mil +3VS_MINI1
1 2
1 2 3 3 4 4 R04 Modify
R991 0_0402_5% 5 6 20mil +1.5VS_MINI1 1 1 1
5 6 C1342 C1343 C1344
<27> MINI1_CLKREQ# 2 1 7 7 8 8
RB751V-40_SOD323-2 D44 @ 9 10 R04 Modify
1 9 10 4.7U_0603_6.3V6K 0.1U_0402_16V4Z 0.1U_0402_16V4Z 1
<25> CLK_PCIE_MINI1# 11 11 12 12
2 2 2
<25> CLK_PCIE_MINI1 13 13 14 14
15 16 1 @ 2 WL_OFF#_EC
15 16 WL_OFF#_EC <37>
17 18 R1016 0_0402_5%
17 18 R985 1
19 19 20 20 2 0_0402_5% WL_OFF#
WL_OFF# <26>
21 22 APU_PCIE_RST#
21 22 APU_PCIE_RST# <13,25,31,32,35> +3VS_MINI1
<6> PCIE_DTX_C_FRX_N1 23 23 24 24 R04 Modify
<6> PCIE_DTX_C_FRX_P1 25 25 26 26 R04 Modify
27 27 28 28
29 30 MINI1_SMBCLK R988 1 @ 2 0_0402_5% FCH_SCLK0 1 1 1
29 30 FCH_SCLK0 <11,12,27>
<6> PCIE_FTX_C_DRX_N1 31 32 MINI1_SMBDAT R989 1 @ 2 0_0402_5% FCH_SDATA0
31 32 FCH_SDATA0 <11,12,27>
<6> PCIE_FTX_C_DRX_P1 33 34 C1339 C1340 C1341
33 34 USB20_N8 10U_0603_6.3V6M 1U_0402_6.3V6K 1U_0402_6.3V6K
35 35 36 36 USB20_N8 <27>
USB20_P8 2 2 2
37 37 38 38 USB20_P8 <27>
R04 Modify +3VS_MINI1 39 39 40 40
41 42 WIMAX_LED1# R992 2 @ 1 0_0402_5% 2 1 +3VS_MINI1
41 42 MINI1_LED#_R R50 2
43 43 44 44 1 0_0402_5% R994 100K_0402_5% MINI1_LED# <37>
45 45 46 46
R993 1 2 100K_0402_5% 47 48
R995 1 0_0402_5% E51TXD_P80DATA_R 47 48
<37> E51TXD_P80DATA 2 49 49 50 50
R996 1 2 0_0402_5% E51RXD_P80CLK_R 51 52
<37> E51RXD_P80CLK 51 52
R997 1 2 1K_0402_5%
<26> W_DISABLE#_2
R1017 1 @ 2 0_0402_5% 53 54
<37> EC_BT_OFF# GNDGND
R04 Modify R986
2 2
For Combo Card BT Disable CONN@ 40mil 0_0805_5% 40mil
ACES_51711-0520W-001 +3VS 1 2 +3VS_MINI1
R04 Modify Part Number = SP07000PV00 R987
PCB Footprint = ACES_51711-0520W-001_52P 0_0603_5% @ Q1901
+1.5VS 1 2 +1.5VS_MINI1 40mil AO3419L_SOT23-3
D
+3VALW 3 1
20mil
1
R990
@ 470_0603_5%
G
2
2
+3VALW 1 23VSWLAN_GATE_R 1 2 3VSWLAN_GATE 3VSWLAN_R
R1005 R1004
3
C1355
100K_0402_5% 1K_0402_5%
TOP View - Left (Option) 1
6
R1008 3VSWLAN_GATE
(STD H5.7mm) 5
0.1U_0402_16V4Z
1K_0402_5% Q1902A
JMINI2 DMN66D0LDW-7_SOT363-6 2 Q1902B
<37> WLAN_PWR_ON 1 2 2
4
FCH_PCIE_WAKE# R998 1 @ 2 0_0402_5% 1 2 +3VS 1 DMN66D0LDW-7_SOT363-6
1 2
3 4
1
3 4 C1366
3 5 5 6 6 +1.5VS 3
<27> MINI2_CLKREQ# 7 8 0.1U_0402_16V4Z
7 8 2
9 9 10 10
<25> CLK_PCIE_MINI2# 11 11 12 12
<25> CLK_PCIE_MINI2 13 13 14 14
15 15 16 16
17 17 18 18
19 20 R999 2 @ 1 0_0402_5% WL_OFF#_2
19 20 WL_OFF#_2 <26>
21 22 APU_PCIE_RST#
21 22 +3VS_MINI2 R1000 1 @
<6> PCIE_DTX_C_FRX_N2 23 23 24 24 2 0_0603_5% +3VS
25 26 R1001 1 @ 2 0_0603_5% +3VALW
<6> PCIE_DTX_C_FRX_P2 25 26
27 27 28 28
29 30 MINI2_SMBCLK R1002 1 @ 2 0_0402_5% FCH_SCLK0
29 30 R1003 1 @ +1.5VS +3VS
<6> PCIE_FTX_C_DRX_N2 31 31 32 32 MINI2_SMBDAT 2 0_0402_5% FCH_SDATA0
<6> PCIE_FTX_C_DRX_P2 33 33 34 34
35 36 USB20_N9
35 36 USB20_N9 <27>
37 38 USB20_P9 1 1 1 1 1 1
37 38 USB20_P9 <27>
+3VS 39 40 @ @ @ @ @ @
39 40 R1006 2 @
41 41 42 42 WIMAX_LED2# 1 0_0402_5% C1336 C1337 C1338 C1333 C1334 C1335
43 44 MINI1_LED# MINI1_LED# 4.7U_0603_6.3V6K 0.1U_0402_16V4Z 0.1U_0402_16V4Z 10U_0603_6.3V6M 1U_0402_6.3V6K 1U_0402_6.3V6K
43 44 2 2 2 2 2 2
45 45 46 46
47 48 1 @ 2 +3VS
E51TXD_P80DATA_R 47 48 R1007 100K_0402_5%
49 49 50 50
E51RXD_P80CLK_R 51 52
4
51 52 4
53 54
(9~16mA)
GND1 GND2
CONN@ Security Classification Compal Secret Data Compal Electronics, Inc.

BELLW_80003-1021 2011/07/08 2015/07/08 Title
Part number = SP07000JZ00
PCB Footprint = BELLW_80003-1021_52P
SCHEMATIC,MB A8331
B B
4019H2
A B C D E
5 4 3 2 1
U58 FL@
FL@ R1900 1 2 0_0402_5% USB30_RST# B13 +1.05V_USB3.0
<27> FCH_PCIE_RST# PERST#
@ R1901 1 2 0_0402_5% A55
<13,25,31,32,34> APU_PCIE_RST#
<25> CLK_PCIE_USB30
CLK_PCIE_USB30 B17 PCIECKP
U2DP0
U2DM0 A56 40mA V1280 1 2 +3VALW to +3V Transfer
CLK_PCIE_USB30# B18 R1902 FL@ 0_0402_5%
Super speed USB Port 0

<25> CLK_PCIE_USB30# PCIECKM +3VALW +3V_USB3.0
PCI Express
SSTXP0 B48 40mA V1281 1 2 U57 FL@
FL@ C1900 1 2 0.1U_0402_10V7K PCIE_DTX_MRX_P0 A23 PCIETXP SSTXM0 B49 R1905 FL@ 0_0402_5%
<25> PCIE_DTX_C_MRX_P0 FL@ C1901 1 2 0.1U_0402_10V7K PCIE_DTX_MRX_N0 A24 PCIETXM 3 VIN VOUT 1
<25> PCIE_DTX_C_MRX_N0 SYSON
SSRXP0 B50 <29,37,40,48> SYSON 4 VIN/CE VOUT 5
PCIE_MTX_C_DRX_P0B15 B51
<25> PCIE_MTX_C_DRX_P0 PCIERXP SSRXM0
PCIE_MTX_C_DRX_N0B16 2
<25> PCIE_MTX_C_DRX_N0 PCIERXM GND
A57 UREF0 FL@ R1906
FL@R1906 1 2 12.1K_0402_1%
UREF0
D
FL@ R1907 1 2 12.1K_0402_1% PCIEREXT A18 PCIEREXT UCAP0 B47 UCAP0 FL@C1902
FL@ C1902 1 2 2200P_0402_50V7K Close to Chip RT9701-PB_SOT23-5
D
FL@ C1903 1 2 0.1U_0402_10V7K PCIERCAP B19 PCIECAP UV1280 A58 V1280 FL@C1905
FL@ C1905 1 2 4.7U_0603_6.3V6K
PPWR0 A50
B39 FL@R1903
FL@ R1903 1 2 10K_0402_5% +3V_USB3.0
OVCN0
R03 modify BOM
ESD request 93mA A4 C1911 for reduce +1.5v noise
+3V_USB3.0
B45
AVCC33X
AVCC33X +1.5V to +1.05V Transfer
Analog 3.3V power

C1906 1 1 C1907 B2 U2DP1
U2DP1 U2DP1 <36> +5VALW +1.5V +1.05V_USB3.0
1 2 USB30_RST# 1U_0402_6.3V6K 0.1U_0402_10V7K B3 U2DN1 U59 FL@
FL@ U2DM1 U2DN1 <36>
C1904 @ 10P_0402_50V8J FL@ A3 APL5930KAI-TRG_SO8
Super speed USB Port 1

AGND33
1U_0402_6.3V6K
C1910
10U_0603_6.3V6M
C1911
A59 A7 U3TX_DP1 FL@ C1908
FL@C1908 1 2 0.1U_0402_10V7K USB30TXP <27,36> +5VALW 6
2 2 AGND33 SSTXP1 U3TX_DN1 FL@C1909
FL@ C1909 0.1U_0402_10V7K VCNTL
B6 AGND33 SSTXM1 A8 1 2 USB30TXN <27,36> 1 1 +1.5V 5 VIN VOUT 3
B44 AGND33 9 VIN VOUT 4
A9 U3RXDP1_L FL@R1910
FL@ R1910
SSRXP1 U3RXDP1_L <36>
FL@
A10 U3RXDN1_L +1.05V_USB3.0_EN 8 10K_0402_5%
73mA A12 SSRXM1 U3RXDN1_L <36> 2 2 EN
1 2 PVCC33X 1 2 7 2 1 2
GND
+3V_USB3.0 PVCC33X +5VALW POK FB
FL@ R1908 B4 UREF1 FL@ R1911
FL@R1911 1 2 12.1K_0402_1% FL@ R1909
UREF1
1
+1.05V_USB3.0
10U_0603_6.3V6M
C1915
0_0603_5% A6 UCAP1 FL@C1912
FL@ C1912 1 2 2200P_0402_50V7K Close to Chip 5.1K_0402_1%
UCAP1
10U_0603_6.3V6M
C1913
0.1U_0402_10V7K
C1916
1000P_0402_50V7K
C1917
B5 V1281 FL@C1914
FL@ C1914 1 2 4.7U_0603_6.3V6K R1912 1
1
UV1281
Analog 1.05V power

1 2 1 20mil 82mA A17 A48 FL@
AVCC10X PPWR1 USB_OC_FL# 32.4K_0402_1%
A22 AVCC10X OVCN1 A46 USB_OC_FL# <36>
10U_0603_6.3V6M
C1919
1U_0402_6.3V6K
C1920
0.1U_0402_10V7K
C1921
1000P_0402_50V7K
C1922
FL@
A60
2
AVCC10X 2
FL@
FL@
FL@
1 1 2 1 B7 AVCC10X 1 2 PU at
2 1 2 +1.05V_USB3.0 C1918 FL@ SYSON +1.05V_USB3.0_EN
XCKSEL0 A51 3 Power MOS side 1 2
FL1009 B41 22P_0402_50V8J R1914 FL@ 10K_0402_5%
XCKSEL1
FL@
FL@
FL@
FL@
36mA B14 1
2 2 1 2 AVCC10 3
A52 X6 12MHZ_12PF_7V12000011 FL@
XCK
10U_0603_6.3V6M
C1924
1U_0402_6.3V6K
C1925
0.1U_0402_10V7K
C1926
1000P_0402_50V7K
C1927
FL@ 4 C1923
GND
1
1 1 1 1 A19 B43 XSCI 0.1U_0402_10V7K
AGND10 XSCI 2
A61 AGND10
C A62 R1915 @ C
AGND10
Crystal
FL@
FL@
FL@
FL@
B8 1M_0402_5% 2 Vout=0.8(1+10K/32.4K)
2 2 2 2 AGND10 GND
B9
1.042 ~ 1.0469 ~ 1.0519V
2
AGND10
B20 AGND10 XSCO 1 FL@ C1928
FL@C1928 Spec: 0.9975 ~ 1.05 ~ 1.1025
XSCO A53
FL@R1916
FL@ R1916 22P_0402_50V8J
1
1 2 1 2
B34 0_0402_5%
PPWRCTL
internal power
+V2.5_OUT 100mA B11
PVCC25OX FL@ R1917
FL@R1917
AUXDET A39 1 2 4.7K_0402_5% +3V_USB3.0
OD pin A14 FL@R1918
FL@ R1918 1 2 0_0402_5% FCH:WAKE#/GEVENT8# (S5)
WAKE# FCH_PCIE_WAKE# <27,32,34>
4.7U_0603_6.3V6K
C1929
0.1U_0402_10V7K
C1930
1000P_0402_50V7K
C1931
OD pin CLKREQ# A15 USB30_CLKREQ#_L PU 10k to +3VALW at FCH side

1 1 1 R1919 1 FL@ 2 0_0402_5% +V2.5_IN_1 A5 OD pin B28 SMIN
PVCC25X SMIN
A21 PVCC25X
R1920 1 FL@ 2 0_0402_5% +V2.5_IN_3 B46 PVCC25X +3V_USB3.0 +3VS
FL@
FL@
FL@
4.7U_0603_6.3V6K
C1932
1000P_0402_50V7K
C1933
0.1U_0402_10V7K
C1934
2 2 2 ROMSDA T34
1 1 1 ROMSDA B27
ROMSCL T33
EEPROM
A1 PGND ROMSCL A35
1
A20 A33 ROMPRES @R1921
@ R1921 1 2 4.7K_0402_5% +3V_USB3.0
PGND ROMPRES
FL@
FL@
FL@
A54 FL@ FL@

2 2 2 PGND R1928 Q1900B
B10 PGND
5
10K_0402_5% DMN66D0LDW-7_SOT363-6
2
B22 USB30_CLKREQ#_L 3 4
U2LNKN USB30_CLKREQ# <25>
Digital IO power
6mA A44 B21 CLKREQ# (A15),output,OD

+3V_USB3.0 DVCC33X PCIELNKN
B12 DVCC33X SSLNKN A27 Fresco suggest 10kohm pull up FCH:LDRQ1#/CLK_REQ6#/GPIO49 (S0)
1U_0402_6.3V6K
C1938
0.1U_0402_10V7K
C1939
B38 DVCC33X DATTXN A28

1 1 DATRXN B24
A26 DVCC33
B
B25 DVCC33 B
+3V_USB3.0
FL@
FL@
B30 DVCC33 NC A2
2 2
NC A29
NC A30
NC A31
1
23mA A11 A32 R1929
DVCC10X NC @ FL@
A13 DVCC10X NC A34
+1.05V_USB3.0 B40 A37 4.7K_0402_5% Q1900A
DVCC10X NC
2
Digital Core power
B42 A38 DMN66D0LDW-7_SOT363-6

DVCC10X NC
1U_0402_6.3V6K
C1940
0.1U_0402_10V7K
C1941
B52 A40
2
DVCC10X NC SMIN
1 1 NC A43 1 6 SMIB <27>
71mA A16 A45
DVCC10 NC
A25 DVCC10 NC A47 FCH:BLINK/USB_OC7#/GEVENT18# (S5)
+3V_USB3.0
FL@
FL@
A36 DVCC10 NC A49

2 2 SMIN(B28)
A41 DVCC10 NC A63
A42 DVCC10 NC A64 output pin,GPIO,
B23 DVCC10 NC B1 internal 75kohm pull-up
1
B26 DVCC10 NC B29
B32 B31 FL@
DVCC10 NC 4.7K_0402_5%
NC B33
B35 R1925
NC
B36
2
NC
A65 B37 FLTESTN
DGND TESTN
FL1009-2Q0_DRQFN116_9X9 Part Number = SA00004T700
S IC FL1009-2Q0 DRQFN 116P D-USB3.0 CONT
Fresco USB3.0 Power Down Sequence Fresco USB3.0 Power Up Sequence

A A
3.3V Should be power down before 1.05V at least 1ms
+3V_USB3.0
+3V_USB3.0
+1.05V_USB3.0 Issued Date 2011/07/08 Deciphered Date 2015/07/08 Title
SCHEMATIC,MB A8331
+1.05V_USB3.0 Size Document Number Rev
Custom B
4019H2
5 4 3 2 1
5 4 3 2 1
For ESD request +USB3_VCCA
R1224 1 @ 2 0_0402_5%
Usb Cap for BOM select D43 @
USB30TXN USB30TXN 4 3 USB30TXN_L USB30TXP_L1 1 109 USB30TXP_L
<27,35> USB30TXN 4 3
220U_6.3V_M
C1572
470P_0402_50V7K
C1571
USB30TXP 1
<27,35> USB30TXP OCE2012120YZF_4P USB30TXN_L2 2 98 USB30TXN_L 1
USB30TXP L88 1 2 USB30TXP_L +
1 2 USB30RXP_L4 4 77 USB30RXP_L
From FCH R1225 1 @ 2 0_0402_5%
USB30RXN_L5 5 66 USB30RXN_L 2 2
R1237 1 M3@ 2 0_0402_5% USB30RXN R1226 1 @ 2 0_0402_5%
D <27> USB30_MRX_DTX_N0 D
R1236 1 M3@ 2 0_0402_5% USB30RXP 3 3
<27> USB30_MRX_DTX_P0
USB30RXN 4 3 USB30RXN_L
R1235 4 3 8
<27> USB30_P10 1 M3@ 2 0_0402_5% USB20P
R1232 1 M3@ 2 0_0402_5% USB20N OCE2012120YZF_4P JUSB1
<27> USB30_N10 L89 1
USB30RXP 2 USB30RXP_L YSCLAMP0524P_SLP2510P8-10-9 ACON TARAC-9V1391 9P USB3.0 H0.4
1 2 USB30TXP_L 9 SSTX+
R1228 1 @ 2 0_0402_5% 1
D4 USB30TXN_L VBUS
8
From Fresco R971 @ 0_0402_5%
4 I/O3 I/O1 1 USB20N_L USB20P_L 3
SSTX-
D+
1 2 7 GND
R1238 1 FL@ 2 0_0402_5% USB30RXN USB20N_L 2 10
<35> U3RXDN1_L D- GND
R1239 1 FL@ 2 0_0402_5% USB30RXP USB20P 1 2 USB20P_L USB30RXP_L 6 11
<35> U3RXDP1_L 1 2 SSRX+ GND
+USB3_VCCA 5 VDD GND 2 4 GND GND 12
R1234 1 FL@ 2 0_0402_5% USB20P L64 OCE2012120YZF_4P USB30RXN_L 5 13
<35> U2DP1 SSRX- GND
R1233 1 FL@ 2 0_0402_5% USB20N USB20N 4 3 USB20N_L
<35> U2DN1 4 3 CONN@
R974 1 @ 2 0_0402_5% USB20P_L 6 3 Part Number = DC23300AG00
I/O4 I/O2 PCB Footprint = ACON_TARA4-9K1311_9P
AZC099-04S.R7G_SOT23-6
SC300001G00
+5VALW +USB3_VCCA +3VALW
C 60mils 60mils C
1
U54
C22 AP2301MPG-13_MSOP8 R965
10U_0805_10V4Z 1 100K_0402_5%
GND VOUT 8 R60 1 M3@ 2 0_0402_5%
1 2 2 VIN VOUT 7 USB_OC0# <27>
1
2
P
i
n
U
S
B
2
0
/
B
C
o
n
n
3
0
P
i
n
U
S
B
3
0
/
B
Z
i
f
C
o
n
n
.
3 VOUT 6
2
VIN
EPAD
4 R59 1 FL@ 2 0_0402_5%
<40> SYSON# EN FLG 5 1
R969
2 USB_OC_FL# <35>
10K_0402_5% 1
JUSB3 C1320
9
JUSB2 CONN@ 0.1U_0402_16V4Z
CONN@ 1 1 2
1 1 2 2
USB20_N0 2 +5VALW 3
USB20_P0 2 3
3 3 4 4
4 4 5 5
USB20_N1 5 6
USB20_P1 5 6 +3VALW +3VS
6 6 7 7
7 7 8 8
SYSON# 8 9
8 SYSON# 9
9 9 10 10 1
10 11 C1327
11
10
11 GND 13
<27> USB_OC1#
12
11
12
C1326
0.1U_0402_16V4Z
1U_0402_6.3V6K Bluetooth Conn.
+5VALW 12 12 GND 14 13 13
<27> USB30_MRX_DTX_N2 2
B 14 14 B
3
<27> USB30_MRX_DTX_P2 +BT_VCC
15 15
ACES_85201-1205N 16 1 2 2
<27> USB30_MTX_DRX_N2 16 <26> BT_ON#
17 R982 10K_0402_5% AP2301GN-HF_SOT23-3 JBT1
<27> USB30_MTX_DRX_P2 17 Q42
18 18 10 GND 8 8
USB20_P1_R 19 7
USB20_N1_R 19 C1330 7
20 W=40mils 6 USB20_P7 <27>
1
20 0.1U_0402_16V4Z 6
21 21 +BT_VCC 5 5 USB20_N7 <27>
USB20_P0_R 22 4
22 4
4.7U_0603_6.3V6K
C1331
0.1U_0402_16V4Z
C1332
USB20_N0_R 23 3
23 3
1
24 24 1 2 2
25 R983 9 1
<27> USB30_MRX_DTX_N1 25 300_0603_5% GND 1
26 26
<27> USB30_MRX_DTX_P1 ACES_87213-0800G
27 27 2 CONN@
<27> USB30_MTX_DRX_N1 28 32
2
28 GND2 Part Number = SP02000CZ00
<27> USB30_MTX_DRX_P1 29 29
30 31 PCB Footprint = ACES_87213-0800G_8P
30 GND1
1
D
R29 1 @ 2 0_0402_5% USB20_N0_R 2
<27> USB20_N0
R31 1 @ 2 0_0402_5% USB20_P0_R ACES_87152-30051 G Q43
<27> USB20_P0
Part Number = SP010015Z00 S 2N7002K_SOT23-3
R32 1 @ 2 0_0402_5% USB20_N1_R PCB Footprint = ACES_87152-30051_30P-S
<27> USB20_N1
3
R51 1 @ 2 0_0402_5% USB20_P1_R
<27> USB20_P1
A A

SCHEMATIC,MB A8331
B B
4019H2
5 4 3 2 1
5 4 3 2 1
+3VALW Analog Project ID definition Analog Board ID definition

+3VALW +3VALW
L65
C1345 C1346 C1347 C1348 C1349 C1350 1 2 +EC_VCCA
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1000P_0402_50V7K
1000P_0402_50V7K
1 1 1 1 2 2 BLM18AG601SN1D_2P @
1 R1025 R1024
C1351 Ra 100K_0402_5% Ra 100K_0402_5%
+EC_VCC_VL 0.1U_0402_16V4Z
2 2 2 2 1 1
1
2 AD_PID0 AD_BID0
ECAGND
1
1 1
D @ C1364 R1026 C1356 D
Rb R1035 Rb
111
125
100K_0402_5% 0.1U_0402_16V4Z 33K_0402_5% 0.1U_0402_16V4Z
22
33
96
67
9
U31 2 2
2
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/VCC
EC_VDD0
EC_VDD/VCC
EC_VDD/AVCC
R04 Modify
R04 modify BID=03 for PVT
EC_GA20 1 21
<27> EC_GA20 GATEA20/GPIO00 GPIO0F EC_BT_OFF# <34>
EC_KBRST# 2 23
<27> EC_KBRST# KBRST#/GPIO01 BEEP#/GPIO10 BEEP# <39>
SERIRQ 3 26 WLAN_PME#
<25> SERIRQ SERIRQ GPIO12 WLAN_PME# <34>
LPC_FRAME# 4 27 ACOFF
<25> LPC_FRAME# LPC_FRAME# ACOFF/GPIO13 ACOFF <41>
C1352 R1014 LPC_AD3 5
<25> LPC_AD3 LPC_AD3
22P_0402_50V8J 22_0402_5% LPC_AD2 7 PWM Output C1354 .01U_0402_16V7K 2 1 ECAGND
<25> LPC_AD2 LPC_AD2
2 1 2 1 LPC_AD1 8 63 BATT_TEMP
<25> LPC_AD1 LPC_AD1 BATT_TEMP/AD0/GPIO38 BATT_TEMP <44>
LPC_AD0 10 LPC & MISC 64
<25> LPC_AD0 LPC_AD0 AD1/GPIO39
65 ADP_I
ADP_I/AD2/GPIO3A ADP_I <43,44>
LPC_CLK0_EC 12 AD Input 66 AD_BID0 1 9012@ 2 +3VLP
<25,28> LPC_CLK0_EC CLK_PCI_EC AD3/GPIO3B
PLT_RST# 13 75 AD_PID0 R04 Modify 0_0402_5% R66
<10,25> PLT_RST# PCIRST#/GPIO05 AD4/GPIO42
+3VALW 2 1 EC_RST# 37 76 Remove C1361,C1362 +EC_VCC_VL 1 930@ 2 +3VALW
R1011 47K_0402_5% EC_SCI# EC_RST# IMON/AD5/GPIO43 0_0402_5% R67
<27> EC_SCI# 20 EC_SCII#/GPIO0E
2 1 <34> WLAN_PWR_ON 1 2 38 GPIO1D
C1353 0.1U_0402_16V4Z R1015 0_0402_5% EC_SMB_CK1 2 1 +3VALW
R04 Modify 68 2.2K_0402_5% R1027
DAC_BRIG/GPIO3C EN_DFAN1 EC_SMB_DA1
DA Output EN_DFAN1/GPIO3D 70 EN_DFAN1 <30> 2 1
KSI0 55 71 2.2K_0402_5% R1028
KSO[0..17] KSI1 KSI0/GPIO30 IREF/GPIO3E
KSO[0..17] <38> 56 KSI1/GPIO31 CHGVADJ/GPIO3F 72
KSI2 57 KSO1 2 @ 1
KSI[0..7] KSI3 KSI2/GPIO32 EC_MUTE# 47K_0402_5% R1029
KSI[0..7] <38> 58 KSI3/GPIO33 EC_MUTE#/GPIO4A 83 EC_MUTE# <39>
C KSI4 59 84 EAPD KSO2 2 @ 1 C
KSI4/GPIO34 USB_EN#/GPIO4B EAPD <39>
KSI5 60 85 TL_CLK 47K_0402_5% R1030
KSI5/GPIO35 CAP_INT#/GPIO4C TL_CLK <21>
KSI6 61 PS2 Interface 86 TL_DATA LID_SW# 1 2
KSI6/GPIO36 EAPD/GPIO4D TL_DATA <21>
KSI7 62 87 TP_CLK 100K_0402_5% R1031
KSI7/GPIO37 TP_CLK/GPIO4E TP_CLK <38>
KSO0 39 88 TP_DATA EC_PME# 2 1
KSO0/GPIO20 TP_DATA/GPIO4F TP_DATA <38>
KSO1 40 10K_0402_5% R1032
KSO2 KSO1/GPIO21 ENBKL
41 KSO2/GPIO22 1 2
KSO3 42 97 VGATE VGATE <50> 100K_0402_5% R1034
KSO4 KSO3/GPIO23 CPU1.5V_S3_GATE/GPXIOA00
43 KSO4/GPIO24 WOL_EN/GPXIOA01 98
KSO5 VLDT_EN
KSO6
44 KSO5/GPIO25 Int. K/B ME_EN/GPXIOA02 99
9012_PH1
VLDT_EN <40,47>
45 KSO6/GPIO26 Matrix VCIN0_PH/GPXIOD00 109 9012_PH1 <44> 2 1 +3VALW
KSO7 46 SPI Device Interface 2.2K_0402_5% R1020
KSO8 KSO7/GPIO27 EC_SMB_CK2 @
47 KSO8/GPIO28 2 1 +3VS
KSO9 48 119 EC_SI_SPI_SO 2.2K_0402_5% R1021
KSO9/GPIO29 SPIDI/GPIO5B EC_SI_SPI_SO <38>
KSO10 49 120 EC_SO_SPI_SI EC_SMB_DA2 2 @ 1
KSO10/GPIO2A SPIDO/GPIO5C EC_SO_SPI_SI <38>
KSO11 50 SPI Flash ROM 126 EC_SPICLK_L 2.2K_0402_5% R1022
KSO12 KSO11/GPIO2B SPICLK/GPIO58 EC_SPICS#/FSEL#
51 KSO12/GPIO2C SPICS#/GPIO5A 128 EC_SPICS#/FSEL# <38> 2 1 +3VALW
KSO13 52 2.2K_0402_5% R1023
KSO14 KSO13/GPIO2D
53 KSO14/GPIO2E
KSO15 54 73 ENBKL TP_CLK 2 1
KSO16 KSO15/GPIO2F ENBKL/AD6/GPIO40 ENBKL <10> 4.7K_0402_5% R1018
81 KSO16/GPIO48 PECI_KB930/AD7/GPIO41 74 +5VS
KSO17 82 89 FSTCHG TP_DATA 2 1
KSO17/GPIO49 FSTCHG/GPIO50 FSTCHG <43>
90 BATT_BLUE_LED# 4.7K_0402_5% R1019
BATT_CHG_LED#/GPIO52 BATT_BLUE_LED# <38>
CAPS_LED#/GPIO53 91
EC_SMB_CK1 77 GPIO 92 BATT_AMB_LED# VR_ON 2 1
<43,44> EC_SMB_CK1 EC_SMB_CK1/GPIO44 PWR_LED#/GPIO54 BATT_AMB_LED# <38>
EC_SMB_DA1 78 93 PWR_LED PWR_LED <38> 100K_0402_5% R1012
<43,44> EC_SMB_DA1 EC_SMB_DA1/GPIO45 BATT_LOW_LED#/GPIO55
EC_SMB_CK2 79 SM Bus 95 SYSON
<8,14,21> EC_SMB_CK2 EC_SMB_CK2/GPIO46 SYSON/GPIO56 SYSON <29,35,40,48>
EC_SMB_DA2 80 121 VR_ON BATT_TEMP 2 1
<8,14,21> EC_SMB_DA2 EC_SMB_DA2/GPIO47 VR_ON/GPIO57 VR_ON <50>
127 100P_0402_50V8J C1360
B PM_SLP_S4#/GPIO59 ACIN B
2 1
100P_0402_50V8J C1363
SLP_S3# 6 100 EC_RSMRST#
<27> SLP_S3# PM_SLP_S3#/GPIO04 EC_RSMRST#/GPXIOA03 EC_RSMRST# <27>
SLP_S5# 14 101 EC_LID_OUT# Reserve for EMI, close to EC
<27> SLP_S5# PM_SLP_S5#/GPIO07 EC_LID_OUT#/GPXIOA04 EC_LID_OUT# <27>
EC_SMI# 15 102 9012_VCIN
<27> EC_SMI# EC_SMI#/GPIO08 PROCHOT_IN/GPXIOA05 9012_VCIN <44>
Delay EC_PWROK 50ms INT_VGAPWR_ON 16 103 EC_THERM
<20> INT_VGAPWR_ON GPIO0A H_PROCHOT#_EC/GPXIOA06 EC_SPICLK <38>
for VGA criterial MINI1_LED# 17 104 GPXO07
<34> MINI1_LED# GPIO0B VCOUT0_PH/GPXIOA07
LAN_PWR_EN# 18 GPO 105 BKOFF# EC_SPICLK_L 1 2 1 2
<32> LAN_PWR_EN# GPIO0C BKOFF#/GPXIOA08 BKOFF# <22> Delay SUSP# 10ms
R04 Modify WL_OFF#_EC 19 GPIO 106 PBTN_OUT# R1033 C1357
<34> WL_OFF#_EC GPIO0D PBTN_OUT#/GPXIOA09 PBTN_OUT# <27>
EC_INVT_PWM 25 107 10_0402_5% 10P_0402_50V8J
<22> EC_INVT_PWM EC_INVT_PWM/GPIO11 PCH_APWROK/GPXIOA10
FAN_SPEED1 28 108 VGA_ON VGA_ON <20>
<30> FAN_SPEED1 EC_PME# FAN_SPEED1/GPIO14 SA_PGOOD/GPXIOA11
<32> EC_PME# 29 EC_PME#/GPIO15
E51TXD_P80DATA 30 GPXO07 1 930@ 2
<34> E51TXD_P80DATA EC_TX/GPIO16 FCH_PWRGD <27>
E51RXD_P80CLK 31 110 ACIN 0_0402_5% R64
<34> E51RXD_P80CLK EC_RX/GPIO17 AC_IN/GPXIOD01 ACIN <40,42,43>
FCH_PWRGD 1 9012@ 2 GPIO18 32 112 EC_ON 1 @ 2
R1058 0_0402_5% PWR_SUSP_LED# PCH_PWROK/GPIO18 EC_ON/GPXIOD02 ON/OFF EC_ON <38,42> 0_0402_5% R65 MAINPWON <8,42,44>
<38> PWR_SUSP_LED# 34 SUSP_LED#/GPIO19 ON/OFF/GPXIOD03 114 ON/OFF <38>
WLAN_LED# 36 GPI 115 LID_SW#
<38> WLAN_LED# NUM_LED#/GPIO1A LID_SW#/GPXIOD04 LID_SW# <38>
116 SUSP#
SUSP#/GPXIOD05 SUSP# <40,43,48>
GPXIOD06 117
T27 118
PECI_KB9012/GPXIOD07
AGND/AGND
EC_CRY1 122 XCLKI/GPIO5D

2 EC_CRY2
GND/GND
GND/GND
GND/GND
GND/GND
<25,28> RTC_CLK 1 123 XCLKO/GPIO5E V18R 124 EC_THERM# <8,25,44,50>

R1036 0_0402_5% 1
1
1
GND0
2 C1359 Low Active (+1.5V)

R1037 @ C1358 D
100K_0402_5% 9012@ 4.7U_0603_6.3V6K EC_THERM 2
22P_0402_50V8J KB9012QF-A3_LQFP128_14X14 2 G Q30
11
24
35
94
113
69
1 Part Number = SA00004OB20 2N7002K_SOT23-3

20mil S
2
High Active
3
A A
ECAGND 2 1
L66
BLM18AG601SN1D_2P

SCHEMATIC,MB A8331
Size Document Number
Rev
Custom B
4019H2
5 4 3 2 1
T
P
C
o
n
n
.
P
o
w
e
r
B
u
t
t
o
n
P
O
W
E
R
/
B
+3VLP +3VALW
2 1 +5VS
R1059 0_0402_5%
2
CONN@ TP_VDD 2 @ 1 +3VS
2
930@ JTP1 R1057 0_0402_5%
9012@ R1040 JPWR1 1 FCH_SCLK1
1 FCH_SCLK1 <27> +5VS
R56 100K_0402_5% 1 +3VALW 2 TP_VDD
100K_0402_5% 1 LID_SW# 2 TP_CLK
2 LID_SW# <37> 3 TP_CLK <37>
1
2 3 TP_DATA
3 4 TP_DATA <37> 1 C1371
1
3 4 LEFT_BTN# 0.1U_0402_16V4Z
2 1 4 4 5 5
9012@ R1056 0_0402_5% 5 +3VS 6 RIGHT_BTN#
5 6
220P_0402_50V7K
C1376
220P_0402_50V7K
C1377
D26 6 PWR_LED# 7
6 ON/OFFBTN# 7 FCH_SDATA1 2
2 ON/OFF <37> 7 7 8 8 FCH_SDATA1 <27> 1 1
ON/OFFBTN# 1 8 9
8 GND
3 51ON# <41> GND 9 GND 10
GND 10
R04 modify BAV70W_SOT323-3 2 2
930@ ACES_85201-0805N ACES_FAN10-08203-9800
2 CONN@ PCB Footprint = ACES_FAN10-08203-9800_8P-T
ON/OFF 930@ Part Number = SP01000H200 ACES_85201-0605N
C1365 PCB Footprint = ACES_85201-0805N_8P Part Number = SP01000LB00 RIGHT_BTN# TP_CLK
1000P_0402_50V7K
1
1 LEFT_BTN# TP_DATA
@
2
R1061 SW3 SW4
0_0603_5% D EVQPLHA15_4P EVQPLHA15_4P
EC_ON 2 930@ LEFT_BTN# 3 1 RIGHT_BTN# 3 1
<37,42> EC_ON
2
G Q44
2
S 2N7002K_SOT23-3 4 2 4 2
930@ D29 @ D27 @
1
R1043 AZ5125-02S.R7G_SOT23-3 AZ5125-02S.R7G_SOT23-3
5
6
5
6
10K_0402_5%
1
Part Number = SCA00001A00
PCB Footprint = AZ5125-02SPR7G_SOT23-3
L
E
D
K
B
C
o
n
n
.
JKB1
Power/SUS Battery 3G / WLAN BlueTooth ACIN
LED Status
KSI[0..7]
ON SUS Full Charge 3G WLAN
KSO0 1 1 KSI[0..7] <37>
KSO1 2
KSO2 2 KSO[0..17]
KSO3
3 3 KSO[0..17] <37> NEW70/80/90 Blue Amber Blue Amber Amber
4 4
KSO4 5
KSO5 5
6 6
KSO6 7 KSO16 C1378 1 2 100P_0402_50V8J removed
KSO7 7 PWR_LED#
8 8
KSO8 9 KSO17 C1379 1 2 100P_0402_50V8J LED5
KSO9 9 LTST-C191TBKT-CA_BLUE
10 10
KSO10 11 KSO7 C1381 1 2 100P_0402_50V8J
11
1
KSO11 12 +3VALW 1 2 2 1 PWR_LED#
KSO12 12 KSO6 C1382 1 100P_0402_50V8J R374 B D
13 13 2
KSO13 14 51_0402_5% <37> PWR_LED 2
KSO14 14 KSO5 C1385 1 100P_0402_50V8J LED1 G Q48
15 15 2
2
KSO15 16 LTST-C191KFKT-2CA_ORANGE S 2N7002K_SOT23-3
KSO16 16 KSO4 C1387 1 100P_0402_50V8J R1063
17 2
3
KSO17 17 PWR_SUSP_LED# 100K_0402_5%
18 18 +3VALW 1 2 2 1 PWR_SUSP_LED# <37>
KSI0 19 19
R378 A
KSI1 20 390_0402_5%
1
KSI2 20 KSO0 C1397 1 100P_0402_50V8J
21 21 2
KSI3 22 LED6
KSI4 22 KSI5 C1399 1 100P_0402_50V8J LTST-C191TBKT-CA_BLUE
23 23 2
KSI5 24
KSI6 24 KSI6 C1401 1 100P_0402_50V8J BATT_BLUE_LED#
25 25 G1 27 2 +3VALW 1 2 2 1 BATT_BLUE_LED# <37>
KSI7 26 26 G2 28 R379 B
KSI7 C1403 1 2 100P_0402_50V8J 51_0402_5% +3VS
LED2
CONN@ PCB Footprint = ACES_85201-26051_26P LTST-C191KFKT-2CA_ORANGE
ACES_85201-26051 Part Number = SP01000GE00 +3VS
2
1 2 2 1 BATT_AMB_LED# BATT_AMB_LED# <37>
R376 A R1060
KSO15 C1380 1 2 100P_0402_50V8J KSI2 C1396 1 2 100P_0402_50V8J 390_0402_5% 10K_0402_5%
KSO14 C1383 1 2 100P_0402_50V8J KSO9 C1398 1 2 100P_0402_50V8J +3VALW 1 @ 2 LED4
1
5
R381 LTST-C191KFKT-2CA_ORANGE U34
KSO13 C1384 1 2 100P_0402_50V8J KSI3 C1400 1 2 100P_0402_50V8J 390_0402_5% 2
P
B 5IN1_LED# <31>
+3VS 1 2 2 1 WLAN_LED# MEDIA_LED# 4
WLAN_LED# <37> Y
KSO12 C1386 1 2 100P_0402_50V8J KSO8 C1402 1 2 100P_0402_50V8J R377 A A 1 SATA_LED# <26>
G
390_0402_5%
3
KSI0 C1388 1 2 100P_0402_50V8J KSO3 C1389 1 2 100P_0402_50V8J
LED7
KSO11 C1390 1 2 100P_0402_50V8J KSI4 C1391 1 2 100P_0402_50V8J
+3VS 1 2 2 1 MEDIA_LED#
KSO10 C1392 1 2 100P_0402_50V8J KSO2 C1393 1 2 100P_0402_50V8J R380 B
130_0402_5%
KSI1 C1394 1 2 100P_0402_50V8J KSO1 C1395 1 2 100P_0402_50V8J LTST-C191TBKT-CA_BLUE
LED3
2 1
B
LTST-C191TBKT-CA_BLUE
R04 Modify LED Vender to LITE-ON

Change R follow Q5WVH
EC BIOS ROM 930@ 930@
+3VALW 1 2 C1370 1 2 0.1U_0402_16V4Z
R1049 0_0603_5%
930@
+SPI_VCC C1374 22P_0402_50V8J
2 930@ 1 2 1
U42 930@ R1055 10_0402_5%
EC_SPICS#/FSEL# 1 8
<37> EC_SPICS#/FSEL# CE# VDD
R1050 1 930@ 2 4.7K_0402_5% EC_SPI_WP# 3 6 EC_SPICLK_R R1051 1 930@ 2 0_0402_5%
WP# SCK EC_SPICLK <37>
+3VALW R1052 1 930@ 2 4.7K_0402_5% EC_SPI_HOLD#7 5 EC_SO_SPI_SI_R R1053 1 930@ 2 0_0402_5%
HOLD# SI EC_SO_SPI_SI <37>
4 2 EC_SI_SPI_SO_R R1054 1 930@ 2 0_0402_5%
VSS SO EC_SI_SPI_SO <37>
MX25L1005AMC-12G_SO8

SCHEMATIC,MB A8331
B B
4019H2
5 4 3 2 1
+VDDA JSPK2
R1067 1
0_0805_5% Int. Speaker Conn. 2
1
2
1
+5VS 2 1
R1068
@ +3VS 10K_0402_5% SPKL+ L94 MBK1608301YZF_2P~N SPK_L+ 3
U36 SPKL- L91 MBK1608301YZF_2P~N SPK_L- G1
4
60mil 1 60mil SPKR+ L92 MBK1608301YZF_2P~N SPK_R+ G2
2
IN SPKR- L93 MBK1608301YZF_2P~N SPK_R- ACES_88266-02001
1 OUT 5 +VDDA 1 2
1
C1409 2 C1410 1U_0402_6.3V6K 20mil CONN@
GND
3
0.1U_0402_16V4Z R1073
3 @ 1
4 2 10K_0402_5% R1074 JSPK1
2 SHDN BYP C1411 10K_0402_5% 1 1
G9191-475T1U_SOT23-5 0.01U_0402_16V7K 2
2
2
4.75V
2
D MONO_IN D33 D34 D
(output = 300 mA) 1 2
1
C1412 1U_0402_6.3V6K AZ5125-02S.R7G_SOT23-3 AZ5125-02S.R7G_SOT23-3 3 G1
1
C SCA00001A00 SCA00001A00 4
@ R1075 G2
<37> BEEP# 1 2 1 2 2 1 2 R02 modify 0926 for ESD
L67 Part Number = SM010014520 +PVDD_HDA C1413 560_0402_5% B Q49 R1076 2.4K_0402_1% ACES_88266-02001
FBMA-L11-201209-221LMA30T_0805 1U_0402_6.3V6K E
40mil CONN@
3
+5VS 2 1 2SC2411K_SOT23-3
R1077
1 1 <27> FCH_SPKR 1 2 1 2
@ C1414 560_0402_5%
1
C1415 C1416 1U_0402_6.3V6K
10U_0805_10V4Z 0.1U_0402_16V4Z D35 Int. MIC Conn.
2
2 2 RB751V-40_SOD323-2 +INTMIC_VREFO
R1078 R03 modify for ESD Resverd
0_0603_5%
1
For EMI
R03 modify INT_MIC_L R1079
1
10K_0402_5%
3
L68 Part Number = SM010014520 CONN@ 15mil L69 Part Number = SM010004010
FBMA-L11-201209-221LMA30T_0805 JMIC2 FBMA-L11-160808-700LMT_2P
40mil
2
2 1 +PVDD1_HDA @ 1 INT_MIC_L 1 2 INT_MIC_R 15mil
+VDDA
1 1 HD Audio Codec D36
AZ5125-02S.R7G_SOT23-3
1
2 2
1
C1417 C1418 C1419
1
10U_0805_10V4Z 0.1U_0402_16V4Z 3
2 2 G1 220P_0402_50V7K
G2 4
2
L70 ACES_88266-02001
BLM18AG121SN1D_2P Part Number = SP020008Y00
C1420 Part Number = SM010030010 PCB Footprint = ACES_88266-02001_2P
+3VS_DVDD 0.1U_0402_16V4Z 2 1 +3VS
L71 Part Number = SM010030010 +AVDD_HDA
BLM18AG121SN1D_2P C1423 10mil
C
2 1 0.1U_0402_16V4Z 40mil 1 1 1
MIC_PLUG# +MIC1_VREFO C
+VDDA
1 1 1 C1425
10U_0603_6.3V6M HP_PLUG#
C1422 C1424 2 2 2
MIC JACK
2
10U_0805_10V4Z 0.1U_0402_16V4Z C1421
2 2 2 0.1U_0402_16V4Z
D38 D39
RB751V-40_SOD323-2 RB751V-40_SOD323-2
25
38
39
46
9
U37
1 1
1 1
D37
DVDD
AVDD1
AVDD2
PVDD1
PVDD2
DVDD_IO
1
1 2 MIC2_C_L 14 AZ5125-02S.R7G_SOT23-3 JMIC1
INT_MIC_R INT_MIC C1426 4.7U_0603_6.3V6K LINE2_L Part Number = SCA00001A00 CONN@
Internal MIC 2 1
R1080 1K_0402_5% MIC2_C_R R1081 R1085 HONGLIN 13-18200601CP 3.6D 6P AUDIO
1
C1427
2
4.7U_0603_6.3V6K
15 LINE2_R 35mA SPKL+ R02 modify 0926 for ESD 4.7K_0402_5% 4.7K_0402_5% Part Number = DC230007R00
1 2 LINE2_C_L 16
68mA 600mA SPK_OUT_L+ 40
PCB Footprint = SUYIN_010030HR006G132ZL_6P
2
MIC2_L
Combo MIC COM_MIC 2 1 COM_MIC_R C1428 4.7U_0603_6.3V6K 1
R1082 1K_0402_5% 1 2 LINE2_C_R 17 41 SPKL- MIC1_L 1 2 MIC1_L_1 L72 1 2 MIC1_L_R 2
C1429 4.7U_0603_6.3V6K MIC2_R SPK_OUT_L- R1084 1K_0603_5% FBMA-L11-160808-700LMT_2P
23 45 SPKR+ MIC1_R 1 2 MIC1_R_1 L73 1 2 MIC1_R_R
INT_MIC LINE1_L SPK_OUT_R+ R1083 1K_0603_5% FBMA-L11-160808-700LMT_2P
External MIC 3
1000P_0402_50V7K
C1432 220P_0402_50V7K
C1433 220P_0402_50V7K
24 LINE1_R
1 44 SPKR- 4
SPK_OUT_R-
3
C1580
MIC1_L 1 2 MIC1_C_L 21 SM010004010 300ma 70ohm@100mhz DCR 0.3 1 1

C1430 4.7U_0603_6.3V6K MIC1_L HP_LEFT MIC_PLUG# 5
HPOUT_L 32
MIC1_R 1 2 MIC1_C_R 22 6
2 C1431 4.7U_0603_6.3V6K MIC1_R HP_RIGHT
HPOUT_R 33
CBN 2 2
1 35 CBN
8 1 2 HDA_SDIN0 <27> D40
1
C1434 SDATA_IN R1086 33_0402_5% AZ5125-02S.R7G_SOT23-3
2.2U_0603_6.3V4Z CBP 36 5 HDA_SDOUT_AUDIO <27> Part Number = SCA00001A00
2 CBP SDATA_OUT
Combo MIC +MIC2_VREFO 29 MIC2_VREFO 10mil SYNC 10 HDA_SYNC_AUDIO <27> R02 modify 0926 for ESD
B B
RESET# 11 HDA_RST_AUDIO# <27>

30 R1133
MIC1_VREFO_R 0_0402_5% +MIC2_VREFO
BCLK 6 HDA_BITCLK_AUDIO <27>
External MIC 31 10mil EAPD_R 1 281@ 2 COM_MIC
+MIC1_VREFO MIC1_VREFO_L
1 @ 2 1 2
3
R1087 0_0402_5% C1435 22P_0402_50V8J
@ MIC2JD R1088
Internal MIC +INTMIC_VREFO 28 LDD_CAP 10mil 2.2K_0402_5%
C1436 10U_0805_10V4Z 2
GPIO0/DMIC_DATA
1
Q50 D R1089
1 2
2
3 271@ 2 1 2 COM_MIC D41
1
GPIO1/DMIC_CLK BSH111_SOT23-3 G 22K_0402_5% AZ5125-02S.R7G_SOT23-3
2 1 19 JDREF
1
R1090 20K_0402_1% 4 S 1 SCA00001A00
3
PD# EC_MUTE# <37> C1437 R52
10U_0805_10V4Z 22K_0402_5% R02 modify 0926 for ESD
HP_PLUG# C1438 2
1 2 1 2 2.2U_0603_6.3V4Z 34 10mil 12 MONO_IN
2
R1091 39.2K_0402_1% CPVEE PCBEEP
MIC_PLUG# 2 1 SENSE_A 13 20
MIC2JD R1092 20K_0402_1% R1093 1 271@
R1094 1 271@
2 20K_0402_1% SENSE_B
EAPD_R
18
SENSE A
SENSE B
MONO_OUT
AVSS2 37 C1439
2 2
C1440 Headphone Out
<37> EAPD 2 0_0402_5% 47 EAPD
JHP1 CONN@
10mil 27 CODEC_VREF 1 2 330P_0402_50V7K 330P_0402_50V7K COM_MIC 3
VREF
2
C1441 0.1U_0402_16V4Z 1 1
48 SPDIFO 6
@ 1 2
R1107 7 26 @ C1442 2.2U_0402_6.3V6M HP_LEFT 1 2 HPOUT_L_1 1 2 HPOUT_L_2 1
0_0402_5% DVSS AVSS1 R1095 51.1_0402_1% L74 FBMA-L11-160808-700LMT_2P
PVSS2 43
49 42 HP_RIGHT 1 2 HPOUT_R_1 1 2 HPOUT_R_2 2
1
GND PVSS1 R1096 51.1_0402_1% L75 FBMA-L11-160808-700LMT_2P 4

ALC271X-VB6-CG_QFN48_6X6
DGND AGND HP_PLUG# 5
A A
PJ27 PJ28
JUMP_43X39 JUMP_43X39 HONGLIN 13-18200613CP 3.6D 6P AUDIO
1 1 Part Number = DC230008000
2 2 1 1 2 2 PCB Footprint = SINGA_2SJ2326-001111_6P-T
PJ29 PJ30
JUMP_43X39 JUMP_43X39
1 2 2 1 2 2
1 1 Security Classification Compal Secret Data Compal Electronics, Inc.
PJ31 PJ26 2011/07/08 2015/07/08 Title
1 1
SCHEMATIC,MB A8331
2 2 1 1 2 2 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
GND GNDA GND GNDA MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5 4 3 2 1
A B C D E
+
5
V
A
L
W
T
O
+
5
V
S
(
5
A
)
+
1
.
1
V
A
L
W
T
O
+
1
.
1
V
S
(
1
.
1
A
)
+5VALW +5VALW
+5VALW +5VS
2
U38 +1.1VALW +1.1VS
SI4800BDY-T1-GE3_SO8 U39 R1097 R1098
8 1 AO4430L_SO8 100K_0402_5% 100K_0402_5%
7 2 8 1
2
10U_0805_10V4Z
10U_0805_10V4Z
10U_0805_10V4Z
C1446
1U_0402_6.3V6K
C1444
10U_0603_6.3V6M
C1447
1U_0402_6.3V6K
C1449
6 3 7 2
1
2
10U_0603_6.3V6M
C1448
1 1 5 1 1 6 3 1 1 VLDT_EN#
1
C1443
R1099 @ 1 5 SYSON#
<36> SYSON#
1
C1445
470_0603_5% R1100 R1101
3
1K_0402_5% 470_0603_5% D Q52B
3 1
4
2 2 2 2 2 2 DMN66D0LDW-7_SOT363-6
<37,47> VLDT_EN 2
3 1
2 G Q51
1
S 2N7002K_SOT23-3 5
1 <29,35,37,48> SYSON 1
1
5 SUSP R1102
4
+VSB 1 2 5VS_GATE 5 VLDT_EN# 10K_0402_5% R1104
R1103 100K_0402_5% Q53B +VSB 1 2 1.1VS_GATE 100K_0402_5%
2
1 R1105 Q54B
4
6
6
47K_0402_5% DMN66D0LDW-7_SOT363-6
2
+5VALW
300K_0402_5%
R1106
C1450 1
1
.1U_0603_25V7K
SUSP Q53A 2 VLDT_EN# C1451
2 2
2
Q54A .1U_0603_25V7K
DMN66D0LDW-7_SOT363-6 DMN66D0LDW-7_SOT363-6 2 R1108
1
1
100K_0402_5%
1 2
1
+
3
V
A
L
W
T
O
+
3
V
S
(
3
.
3
A
)
D SUSP
<37,42,43> ACIN ACIN 2 +3VS For Power noise
6
G Q57 20110127 Q52A
+3VALW +3VS S 2N7002K_SOT23-3 2 1 DMN66D0LDW-7_SOT363-6
U40 C19 680P_0402_50V7K
3
SI4800BDY-T1-GE3_SO8 Q57 change to SB000008J10 2 1 <37,43,48> SUSP# 2
8 1 20101228 C27 680P_0402_50V7K
1
7 2 2 1
1
2
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
1U_0402_6.3V6K
6 3 1 1 C28 680P_0402_50V7K
C1455
1 1 5 2 1 R1109
C1452
R1110 C31 680P_0402_50V7K 10K_0402_5%

C1453
C1454
470_0603_5%
4
2
2 2
3 1
2 2
V
G
A
P
o
w
e
r
+VSB 2 1 3VS_GATE 5 SUSP
2 R1112 200K_0402_5% 2
+1.5V to +1.5VSG (1.5A)
6
Q60B
4
1
SUSP 2 Q60A C1456 +1.5V +1.5VSG
.1U_0603_25V7K @
DMN66D0LDW-7_SOT363-6 2 U41
1
AO4430L_SO8 @ @
8 1 C1457 C1458
7 2 1 1
+
1
.
5
V
T
O
+
1
.
5
V
S
(
1
.
5
A
)
2
6 3
@ 1 1 5 VGA@
10U_0603_6.3V6M
1U_0402_6.3V6K
C1459 R1114
10U_0603_6.3V6M @ 2 2 470_0603_5%
4
+1.5V AP2301GN-HF_SOT23-3 +1.5VS C1460
3 1
Q63 2 2 10U_0603_6.3V6M
3 1
2
+5VALW
10U_0603_6.3V6M
1 @
C1461
R1118 5 1.5_VDDC_PWREN#
R1116 R1117 100K_0402_5% Q64B
2
2
100K_0402_5% 470_0603_5% +VSB 1 2 1.5VSG_GATE DMN66D0LDW-7_SOT363-6 VGA@
4
2
1 @ VGA@ R1119
1
3 1
VGA@ C1462 100K_0402_5%
6
Q64A .1U_0603_25V7K
6
1
2 VGA_PWR_ON#
1
R1122 Q65A 5 SUSP 1.5_VDDC_PWREN# 2 1 2
SUSP# 2 1 2 @
1
47K_0402_5% 1 Q65B R1120 1 @
4
1
47K_0402_5% @ R1121 D VGA@
1
C1463 C1464 510K_0402_5% <20,46> VGA_PWR_ON 2 Q68
1 2
3 0.22U_0402_10V4Z .1U_0402_16V7K G 2N7002K_SOT23-3 3
2 2 S
1
D @ VGA@
3
ACIN 2 Q69 R1123
G 2N7002K_SOT23-3 100K_0402_5%
S
2
+1.0VSG +VGA_CORE +1.8VSG +1.2VS @
+3VS R1111 +3VSG
0_0603_5%
2
1 2 +5VALW
R1125 R1126 R1127 R1128
470_0603_5% 470_0603_5% 470_0603_5% 470_0603_5% Q98
2
VGA@ VGA@ VGA@ AP2301GN-HF_SOT23-3
VGA@
1 1
1 1
1 1
1 1
R03 modify for 3 1 R1131

VGA power sequence 100K_0402_5%
2
D D D D
1
VGA@
VGA@
2 VGA_PWR_ON# 2 1.5_VDDC_PWREN# 2 VGA_PWR_ON# 2 VLDT_EN# VGA@ VGA@ 1.5_VDDC_PWREN#
G G G G +5VALW R1132
1 1
2
1
S Q71 S Q72 S Q73 S Q74 VGA@ VGA@ 470_0603_5%
2N7002K_SOT23-3 2N7002K_SOT23-3 2N7002K_SOT23-3 2N7002K_SOT23-3 R1124 R1130 C1578 C1579 D VGA@
3
1
10U_0603_6.3V6M
1U_0402_6.3V6K
VGA@ VGA@ VGA@ 2 1 1 2 <20,45,47,49> 1.5_VDDC_PWREN 2 Q77
200K_0402_5% 10K_0402_5% 2 2 G 2N7002K_SOT23-3
2
1
VGA@ S
6
C1577 Q99B VGA@
3
+1.5V +2.5VS +0.75VS
0.1U_0402_16V4Z
VGA@ R1134
VGA@ 1
5 VGA_PWR_ON# 10K_0402_5%
VGA_PWR_ON 2 Q99A DMN66D0LDW-7_SOT363-6
2
2
4 DMN66D0LDW-7_SOT363-6 4
4
R1135 R1136 R1137
1
470_0603_5% 470_0603_5% 470_0603_5%

1 1
1 1
1 1
D D D
2 SYSON# 2 SUSP 2 SUSP Security Classification Compal Secret Data Compal Electronics, Inc.
G G G
Q78 Q79 Q80
S
2N7002K_SOT23-3
S
2N7002K_SOT23-3
S
2N7002K_SOT23-3 SCHEMATIC,MB A8331
3
B B
4019H2
A B C D E
5 4 3 2 1
Part Number = SP02000VQ00

PCB Footprint = LIYO_309001-04301-031_4P
S W-CONN CVILUX CI0104M1HRR-NH 4P P2.0
PJP1
PL1
SMB3025500YA_2P
VIN
1 1 1 2
2 2
3 3
4 4
GND 5
1
GND 6
PC1 PC2 PC3 PC4
CONN@ 1000P_0402_50V7K 100P_0402_50V8J 100P_0402_50V8J 1000P_0402_50V7K
2
D D
VIN
2
PD1 @
LL4148_LL34-2
1
PD2
LL4148_LL34-2
BATT+ 2 1
1
PR1 @ PR2 @
68_1206_5% 68_1206_5%
PQ1 VS
TP0610K-T1-E3_SOT23-3
2
N1 3 1
0.22U_0603_25V7K
1
PJ1 PJ2
1
PR3 1 PC6
+3VALWP 1 1 2 2 +3VALW +1.8VSGP 1 1 2 2 +1.8VSG
PC5
C 100K_0402_5% 0.1U_0603_25V7K C
2
(3.9A,160mils ,Via NO.= 8) (3A,120mils ,Via NO.=6)

2
<38> 51ON# 1 2
PJ3 PJ4
PR4 1 2 1 2
22K_0402_5% +5VALWP 1 2 +5VALW +1.1VALWP 1 2 +1.1VALW
(5A,200mils ,Via NO.= 10) (7A,280mils ,Via NO.=14)
PJ6
PJ5
+0.75VSP 1 1 2 2 +0.75VS
+VSBP 1 1 2 2 +VSB JUMP_43X79
JUMP_43X39 (3A,120mils ,Via NO.=6)
Pre_CHG (120mA,40mils ,Via NO.= 2)
PQ2
PR5 VIN PR7 LL4148_LL34-2 TP0610K-T1-E3_SOT23-3
0_0603_5% 1K_1206_5% PD3 B+
+CHGRTC 1 2 1 2 2 1 3 1
+3VLP PJP3
100K_0402_5%
100K_0402_5%
PR8 JUMP_43X118 Short R02 modify
1K_1206_5% 1 PJ8
1 2 2
1
1
PR9
1 2 PR10 +1.5VSGP 1 2 +1.5VSG

1 2
PR11 PJP4 JUMP_43X118
1K_1206_5% JUMP_43X118 (8.1A,320mils ,Via NO.=17)
2
1 2 +VGA_COREP 1 1 2 2
2
+VGA_CORE
B PJ9 B
PR12
1
1K_1206_5% +2.5VSP 1 2 +2.5VS
PR13 1 2
1 2
100K_0402_5% JUMP_43X39
PJ11
12
1
+1.0VSGP 1 1 2 2 +1.0VSG
PD4 JUMP_43X39 PJ10
<37> ACOFF 2 +1.2VSP 1 1 2 2 +1.2VS
1 2 2
<42> +5VALWP 3 JUMP_43X118
PQ4
BAS40CW_SOT323-3 PQ3 PDTC115EU_SOT323-3
PDTC115EU_SOT323-3
3
@ PJ24
+VDDCIP 1 1 2 2 +VDDCI
PJ7
JUMP_43X118 +1.5VP 1 2 +1.5V
1 2
JUMP_43X118
PJ13
1 1 2 2
JUMP_43X118
A A

SCHEMATIC,MB A8331
5 4 3 2 1
5 4 3 2 1
2VREF_8205
1U_0603_10V6K
1
PC29
2
10U_0805_25V6K
10U_0805_25V6K
D D
1
1
PC104
PC110
PR50 PR51
13.3K_0402_1% 30K_0402_1%
1 2 1 2
2
@ @
PR52 PR53
RT8205_B+ 20K_0402_1% 20K_0402_1% RT8205_B+
1 2 1 2
PL3
HCB4532KF-800T90_1812
B+ 1 2 Typ: 175mA +3VLP
ENTRIP2
ENTRIP1
2200P_0402_50V7K
2200P_0402_50V7K
0.1U_0402_25V6
0.1U_0603_25V7K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
0.1U_0603_25V7K
PR54 PR55
137K_0402_1% 154K_0402_1%
PC31
PC38
4.7U_0805_10V6K
1 2 1 2
1
1
PC32
PC33
PC34
PC35
PC36
PC37
PC200
5
PU2
2
2
PC39
ENTRIP2
REF
FB2
TONSEL
FB1
ENTRIP1
1
25 P PAD
PQ20 PQ21
2
SIS412DN-T1-GE3_POWERPAK8-5 4 4 SIS412DN-T1-GE3_POWERPAK8-5
7 VO2 VO1 24
SPOK <44,45>
8 23 PR57 PC41
C PR56 VREG3 PGOOD 2.2_0603_1% 0.1U_0603_25V7K C
1
2
3
3
2
1
1 2 1 2 BST_3V 9 BOOT2 BOOT1 22 BST_5V 1 2 1 2
2.2_0603_1%
4.7UH_PCMC063T-4R7MN_5.5A_20% PC40 UG_3V 10
VFB=2.0V 21 UG_5V PL5
PL4 0.1U_0603_25V7K UGATE2 UGATE1 4.7UH_PCMC063T-4R7MN_5.5A_20%
1 2 LX_3V 11 20 LX_5V 1 2 +5VALWP
+3VALWP PHASE2 PHASE1
1
1
4.7_1206_5%
4.7_1206_5%
LG_3V 12 19 LG_5V
LGATE2 LGATE1
5
PR58
PR60
SKIPSEL
PQ22 PR59 @
VREG5
SI7716ADN-T1-GE3_POWERPAK8-5 0_0402_5%
GND
VIN
MAINPWON RT8205LGQW_WQFN24_4X4
NC
EN
1 2 1 1
2
2
4
PC42 + 4 PC43 +
13
14
15
16
17
18
1
1
680P_0402_50V7K
680P_0402_50V7K
220U_6.3V_M PR61 220U_6.3V_M
PD8
PC44
PC45
499K_0402_1% PQ23
2 SI7716ADN-T1-GE3_POWERPAK8-5 2
1 2 1 2
2
1
2
3
2
B+
3
2
1
RLZ5.1B_LL34
100K_0402_1%
1U_0603_10V6K
VL
1
PC46
1
PR62
PC47
4.7U_0805_10V6K
ENTRIP1 ENTRIP2 Typ: 175mA
2
2
2
RT8205_B+
6
1
D D
0.1U_0603_25V7K
PQ106A 2 5
B DMN66D0LDW-7_SOT363-6 G G B
2VREF_8205
2
PC48
PQ106B
S S DMN66D0LDW-7_SOT363-6 TONSEL=VREF (1)SMPS1=300KHZ (+5VALWP)
1
(2)SMPS2=375KHZ(+3VALWP)
PR79
100K_0402_1%
VL 2 1
9012@ PR102
0_0402_5%
<37,38> EC_ON 1 2 +3.3VALWP +5VALWP

PR80 Ipeak=5.78A ; 1.2Ipeak=6.94A; Imax=4.05A Ipeak=7A ; 1.2Ipeak=8.4A; Imax=4.9A
0_0402_5% f=375KHz, L=4.7UH f=300KHz, L=4.7UH,Rentrip=154k ohm
1
1 2
<8,37,44> MAINPWON Rdson=15~18m ohm Rdson=15~18m ohm
930@ PD15 930@ PR81 1/2Delta I = 1/2 *(19-3)*(3/19)/(375KHz*4.7UH)=0.716A 1/2Delta I = 1/2 *(19-5)*(5/19)/(300KHz*4.7UH)=1.306A
LL4148_LL34-2 1M_0402_1%
2 1 1 2 2 PQ25 Vlimit=10*10^-6*110Kohm/10=0.14V Vlimit=10*10^-6*154Kohm/10=0.15V
VIN PDTC115EUA_SC70-3 Ilimit=0.11/(18m*1.2)~0.11/(15m)=6.34A~9.13A Ilimit=0.15/(18m*1.2)~0.15/(15m)=7.13~10.26A
402K_0402_1%
4.7U_0603_6.3V6K
Iocp=7.06A~9.85AA (7.06A>6.94A -> ok) -DVT- Iocp=8.44~11.57A (8.44>8.4 -> OK)

2 930@ 1
PR82
PC67
PR83
3
316K_0402_1%
1 930@ 2
VS
2
10K_0402_1%
930@ PR84
1
1M_0402_1%
1 2 PR85
A VL 930@
A
1
D
3 2
2
VS G D
5 930@ PQ105B
7,40,43> ACIN 2 S G DMN66D0LDW-7_SOT363-6 Security Classification Compal Secret Data Compal Electronics, Inc.
1
PQ105A 930@ 2011/07/08 2015/07/08 Title

S
SCHEMATIC,MB A8331
4
PQ24 930@
PDTC115EUA_SC70-3 AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
3
Custom B
4019H2
5 4 3 2 1
A B C D
for reverse input protection
1
D
2 PQ85
G SI1304BDL-T1-E3_SC70-3
S
3
1 2 1 2
10U_0805_25V6K
10U_0805_25V6K
@
1 PR287 PR288 PJ32 1
1
PC278
PC279
1M_0402_5% 3M_0402_5% 2 1
2 1
JUMP_43X118
2
VIN P1 P2 PR289 B+ @ @
PQ86 PQ87 0.02_2512_1% PQ88
AO4466L_SO8 AO4466L_SO8 PL26 AO4466L_SO8
8 1 1 8 1 4 1 2CHG_B+ 8 1
2200P_0402_50V7K
7 2 2 7 7 2
0.1U_0402_25V6
10U_0805_25V6K
10U_0805_25V6K
6 3 3 6 2 3 1.2UH_1231AS-H-1R2N=P3_2.9A_30% 6 3
0.1U_0402_25V6
2200P_0402_50V7K
5 5 5
0.01U_0402_50V7K
1
1
0_0402_5%
PC280
PC281
PC282
PC283
PR290
1
VIN
0_0402_5%
PC275
PR291
4
4
PC285
PC286
2
1
@ 2 0.1U_0402_25V6
1
PC284
1 2 @
2
2
0.1U_0402_25V6
PD11
2
BAS40CW_SOT323-3
1
BQ24725_BATDRV 1 2
PC287
PR292
1
4.12K_0603_1%
4.12K_0603_1%
PC288 4.12K_0603_1%
0.047U_0402_25V7K
1
1 2
PR293
PR294
5
10_1206_1%
0_0603_5%
1
VIN
PR296
PR295
0.1U_0603_25V7K
2
2
1
2 PR298 PQ89 2
1
@ PR297 0_0402_5% SIS412DN-T1-GE3_POWERPAK8-5
BQ24725_ACN
PC289
BQ24725_ACP
1
3.3_1210_5% DH_CHG 1 2DH_CHG-1 4
BQ24725_BST
PC290 PD12
BQ24725_LX
2
1 2 RB751V-40_SOD323-2 BATT+
1 2
DH_CHG
1U_0603_25V6K PC292 PL27 PR300
3
2
1
1 2 10UH_FDVE1040-H-100M=P3_6.5A_20% 0.01_1206_1%
@ PR299 BQ24725_LX 1 2 CHG 1 4
3.3_1210_5% 1U_0603_25V6K
5
20
19
18
17
16
SIS412DN-T1-GE3_POWERPAK8-5
2 3
2
CSOP1
4.7_1206_5%
PU21
2200P_0402_50V7K
0.01U_0402_50V7K
CSON1
1
PHASE
HIDRV
BTST
VCC
REGN
PR301
10U_0805_25V6K
10U_0805_25V6K
1
21
0.1U_0402_25V6
0.1U_0402_25V6
PAD
1
@ PC291
PC296
PC297
PC293
PC294
1
1
SX34 SMA
PQ90
PD13
2.2U_0805_25V6K 1 15 DL_CHG 4
2
ACN LODRV
PC298
PC295
2
2
2 14 @
680P_0402_50V7K
2
ACP GND PR302
3
2
1
2
1
BQ24725ARGRR_VQFN20_3P5X3P5 10_0603_5%
PC300
BQ24725_CMSRC 3 13 SRP 1 2 CSOP1
CMSRC SRP
2
0.1U_0603_25V7K
BQ24725_ACDRV 4 12 SRN 1 2 CSON1
2
ACDRV SRN
PC299
PR303
6.8_0603_5%
+3VLP 1 2 5 11 BQ24725_BATDRV
PR304 ACOK BATDRV
ACDET
100K_0402_1%
IOUT
3 3
SDA
SCL
ILIM
<37,40,42> ACIN
+3VALW
6
10
ACDET Pre_CHG
1
PD14 1 2
0.01U_0402_25V7K
RB751V-40_SOD323-2 PR305
1
100K_0402_1%
316K_0402_1%
PR306 VIN PR307 1
PC301
PR308
1
2M_0402_1% 280K_0603_0.1%
2
1 2
Vin Dectector
2
2
2
1
1
PR310
PR309 154K_0603_0.1%
Min. Typ Max.
2M_0402_1% L-->H 17.852V 18.063V 18.275V
2
H-->L 17.476V 17.687V 17.898V

1 2
ACDET
0.1U_0402_16V7K
EC_SMB_CK1 <37,44> ILIM and external DPM

1
PR311
PC302
100K_0402_1% PR312
PQ91 66.5K_0603_0.1%
<37> FSTCHG 1 2 2 Min. Typ Max.
2
PDTC115EUA_SC70-3
EC_SMB_DA1 <37,44>
PR313 3.906A 4.006A 4.108A
2
1
0_0402_5%
4 D 2 1 1 2 4
ADP_I <37,44>
3
<37,40,48> SUSP# 2
1
G PC303 @ PC304
PQ92 S 100P_0402_50V8J 0.1U_0402_16V7K
2N7002KW_SOT323-3 Close EC
3

SCHEMATIC,MB A8331
Custom B
4019H2
A B C D
5 4 3 2 1
Part Number = DC040008G00

PCB Footprint = SUYIN_200275GR008G13GZR_8P-T
PJP2
SUYIN_200275GR008G16BZR 8P
D D
GND 10
GND 9
8 8
7 7
6 EC_SMDA
6
2
5 EC_SMCA
5 TH PR250
4 4
3 PI 100_0402_1%
3
2 2
1 PH1 under CPU botten side :
1
1
2
CONN@
PR251
CPU thermal protection at 92 +/- 3 degree C
100_0402_1%
<40,41> EC_SMB_DA1 <37,43>
+3VLP ADP_I <37,43>
VMB
1
UMA@ PR34
1
3.92K_0402_1%
PL19
<40,41> EC_SMB_CK1 <37,43> +3VLP
SMB3025500YA_2P
1
1 2 BATT+ PR252
1
1K_0402_5%
1
PR255 PC233 PR254
1
6.49K_0402_1% 0.1U_0603_25V7K +3VLP 21K_0402_1% VGA@ PR34 PR267 @
2
PC234 PC235 2 1 8.87K_0402_1% 100K_0402_1%
+3VALWP
2
1000P_0402_50V7K 0.01U_0402_25V7K
2
2
2
PU17
2
@ PR256 1 8 2 1
VCC TMSNS1 9012_PH1 <37>
1
100K_0402_1%
PR258 2 7 2 PR259 1 PR266
1K_0402_1% GND RHYST1 0_0402_5%
1
3 6 9.53K_0402_1%
C <8,37,42> MAINPWON OT1 TMSNS2 9012_VCIN <37> C
2
<8,25,37,50> EC_THERM#
+3VLP 4 OT2 RHYST2 5 1 2 2 1
1
G718TM1U_SOT23-8 VGA@ PR36 PR261
PR257 16.2K_0402_1% 0_0402_5% PR253 @
BATT_TEMP <37> 100K_0402_1%
100K_0402_1%
1
D UMA@ PR36
1
PQ65 2 10.5K_0402_1%
2
2N7002W-T/R7_SOT323-3 G PH1
S 100K_0402_1%_NCP15WF104F03RC PR38
3
10K_0402_1%
2
PQ77
TP0610K-T1-E3_SOT23-3
B+ 3 1 +VSBP
100K_0402_1%
0.22U_0603_25V7K
1
1
PR262
PC236
C236
PC237
@
@P 0.1U_0603_25V7K
2
2
2
PR263
VL 22K_0402_1%
1 2
2
PR264
100K_0402_1%
B B
PR265
1
1K_0402_5% D
1 2 2 PQ78
<42,45> SPOK
G 2N7002W-T/R7_SOT323-3
S
3
1
1U_0402_6.3V6K
PC238
A A

SCHEMATIC,MB A8331
5 4 3 2 1
A B C D
VFB= 0.7V
Vo=VFB*(1+5.76K/10K)= 1.1V
Freq= 266~314KHz , 290KHz(typ)
PL28
Cesr= 15m ohm FBMA-L18-453215-900LMA90T_1812
Ipeak= 5.21A Imax= 3.65A Iocp=6.25A 1.1VALW_B+ 2 1
Iocp= 7.7A~11.84A
B+
2200P_0402_50V7K
2200P_0402_50V7K
0.1U_0402_25V6
0.1U_0402_25V6
4.7U_0805_25V6-K
4.7U_0805_25V6-K
5
1
PC305
PC306
PC307
PC308
PC309
PC310
2
2
1 1
@
4 PQ93
PR314 PC311
3
2
1
PU22 0_0603_5% 0.1U_0603_25V7K
PR315 1 10 BST_1.1VALW 1 2 1 2
105K_0402_1% PGOOD VBST
PR316 2 1 TRIP_1.1VALW 2 9 DH_1.1VALW PL29
0_0402_5% TRIP DRVH 2.2U_FDV0630-2R2M-P3_7.2A_20%
<42,44> SPOK 1 2 1 EN_1.1VALW 3 EN SW 8 SW_1.1VALW 1 2 +1.1VALWP
5
FB_1.1VALW 4 7 1.1VALW_5V +5VALW
@ PC312
@PC312 VFB V5IN
1
0.1U_0402_16V7K RF_1.1VALW 5 6 DL_1.1VALW 1
2
TST DRVL
1
11 PR317 + PC314
TP PC313 PQ94 4.7_1206_5% 330U_6.3V_M
4
PR318 TPS51212DSCR_SON10_3X3 1U_0603_10V6K SI7716ADN-T1-GE3_POWERPAK8-5
2
470K_0402_1% 2
2
1
PC316
3
2
1
680P_0402_50V7K
Rds=2.6mΩ(Typ)
2
3.2mΩ(Max)
PR319
VFB=0.7V 5.76K_0402_1%
2 1
2 2
1
PR320
10K_0402_1%
2
@
@ @ PL9
4
PJ17 PU7 2.2UH_MSCDRI-74A-2R2M-E_6.5A_20%

1 2 10 2 LX_VDDCIP 1 2
+5VS
PG
1 2 PVIN LX +VDDCIP
68P_0402_50V8J
JUMP_43X79 9 3
PVIN LX 1
22U_0805_6.3VAM
22U_0805_6.3VAM
4.7_1206_5% @ @ @
1
1
PC76 @ 8 PR97 PC75 PR101 @
SVIN
1
22U_0805_6.3VAM 0_0402_5% PC78 @
6 FB_VDDCIP PC82
2
2
EN_VDDCIP FB
5
2
2
EN
NC
NC
TP
3 1 @ 2 3
FB=0.6Volt
11
1 2 PR100
<20,40,47,49> 1.5_VDDC_PWREN 3.4K_0402_1%
0.1U_0402_10V7K
680P_0603_50V7K
PR99
2
PC77
100K_0402_5% @ SY8033BDBC_DFN10_3X3
1
@ PR104 @
2
1M_0402_5% PC79 1 @ 2 VDDCI_SEN <16>

@ PR107
2
10_0402_5%
1
+3VSG
1
1
PR108 @
1
20K_0402_1% PR109
@ 10K_0402_5%
2
PR95 @
10K_0402_1% PR111
2
1
D 10K_0402_5%
2
2 2 1 VDDCI_VID <14>
G
1
S @
3
1
PQ28 @ @
2N7002W-T/R7_SOT323-3 PC85 PR112
2 4700P_0402_25V7K 100K_0402_5%
2
4 4

SCHEMATIC,MB A8331
Rev
Custom B
4019H2
A B C D
5 4 3 2 1
D D
Note:Imax=3.3A
VGA@
PU23 VGA@ PL30
PJ14
4
2.2UH_MSCDRI-74A-2R2M-E_6.5A_20%
1 2 10 2 LX_1.8V 1 2
+3VS
PG
1 2 PVIN LX +1.8VSGP
68P_0402_50V8J
JUMP_43X79 9 3
PVIN LX
PC318
4.7_1206_5%
1
VGA@ PC317 VGA@
22U_0805_6.3VAM
22U_0805_6.3VAM
8 SVIN
1
PR321
22U_0805_6.3VAM VGA@ PR322
PC319
PC320
6 10K_0402_1% VGA@
2
FB VGA@
5
2
VGA@ PR323 EN
NC
NC
TP
100K_0402_1% FB_1.8V VGA@
VGA_PWR_ON 1.8V_EN
1 2 FB=0.6V
11
1
1
680P_0603_50V7K
0.1U_0402_10V7K
PC323
VGA@ PC321
SY8033BDBC_DFN10_3X3 VGA@ PR324
1
4.99K_0402_1%
2
VGA@ PC322
2
0.22U_0603_25V7K @
2
C C
+3VALW
+1.5V
1
VGA@ PC324
1U_0402_6.3V6K
2
1
PJ15
1
JUMP_43X79 Note:Imax=3.0A
PU24 VGA@
2
6 PU25
VPP APL5508-25DC-TRL_SOT89-3
5 3
2
9
VIN
TP
VO
VO 4 +1.0VSGP
1
+3VS 2 3
IN OUT
+2.5VSP
1
8 FB=0.8V VGA@ PR325

VEN
1
B B
VGA@ PC327 1.54K_0402_1% VGA@ PC325 VGA@ PC326
4.7U_0805_6.3V6K
7 2
GND
POK ADJ
1
4.7U_0603_6.3V6K 0.022U_0402_25V7K 22U_0805_6.3V6M GND
2
1
PC328
2
PC329
APL5930 1U_0402_6.3V6K @ PR326
1
150_1206_5%
2
1
2
VGA@ PR327
6.04K_0402_1%
VGA@ PR328
2
20K_0402_1%
<20,40> VGA_PWR_ON 1 2
1
1
VGA@ PC330 @ PR329

0.22U_0402_6.3V6K 22K_0402_5% Ien=10uA, Vth=0.3V, notice
2
the res. and pull high

2
voltage from HW
A A

SCHEMATIC,MB A8331
C B
4019H2
5 4 3 2 1
5 4 3 2 1
VFB= 0.7V
Vo=VFB*(1+7.15K/10K)= 1.2V
Freq= 266~314KHz , 290KHz(typ)
PL22
Cesr= 15m ohm FBMA-L18-453215-900LMA90T_1812
Ipeak= 8.5A Imax= 6A Iocp=10.2 1.2V_B+ 2 1
Iocp= 10.86A~17.33A B+
2200P_0402_50V7K
2200P_0402_50V7K
0.1U_0402_25V6
0.1U_0402_25V6
4.7U_0805_25V6-K
4.7U_0805_25V6-K
5
6
7
8
1
PC251
PC252
PC253
PC254
PC255
PC256
D D
2
@
4 PQ81
AO4466L_SO8
PR274 PC257
3
2
1
PU19 0_0603_5% 0.1U_0603_25V7K
PR273 1 10 BST_1.2V 1 2 1 2
105K_0402_1% PGOOD VBST
PR275 2 1 TRIP_1.2V 2 9 DH_1.2V PL23
0_0402_5% TRIP DRVH 2.2U_FDV0630-2R2M-P3_7.2A_20%
<37,40> VLDT_EN 1 2 EN_1.2V 3 EN SW 8 SW_1.2V 1 2 +1.2VSP
1
5
6
7
8
FB_1.2V 4 7 1.2V_5V +5VALW
@ PC258 VFB V5IN
1
0.1U_0402_16V7K RF_1.2V 5 6 DL_1.2V 1
2
TST DRVL
1
1
11 PQ82 PR276 + PC260
TP PC259 FDS6670AS_NL_SO8 4.7_1206_5% 330U_2.5V_M
4
PR277 TPS51212DSCR_SON10_3X3 1U_0603_10V6K
2
470K_0402_1% 2
2
1
PC262
3
2
1
680P_0402_50V7K
Rds=2.6mΩ(Typ)
2
3.2mΩ(Max)
C C
PR278
VFB=0.7V 7.15K_0402_1%
2 1
1
PR279
10K_0402_1%
2
VFB= 0.704V
Vo=VFB*(1+11.5K/10K)= 1.5V VGA@ PL24
Freq=290KHz(typ) FBMA-L18-453215-900LMA90T_1812
1.5VSG_B+ 2 1
B+
Cesr= 15m ohm
2200P_0402_50V7K
2200P_0402_50V7K
0.1U_0402_25V6
0.1U_0402_25V6
4.7U_0805_25V6-K
4.7U_0805_25V6-K
Ipeak= 5A Imax= 3.5A Iocp=6A
5
Iocp= 6.4A~9.8A
1
VGA@ PC263
VGA@ PC264
VGA@ PC265
VGA@ PC266
VGA@ PC267
PC268
2
2
@
4
PQ83 VGA@
B B
VGA@ PR281 PC269 VGA@
3
2
1
PU20 VGA@ 0_0603_5% 0.1U_0603_25V7K
VGA@ PR280 1 10 BST_1.5VSG 1 2 1 2
VGA@ 82.5K_0402_1% PGOOD VBST
PR282 2 1 TRIP_1.5VSG 2 9 DH_1.5VSG VGA@ PL25
20K_0402_1% TRIP DRVH 2.2U_FDV0630-2R2M-P3_7.2A_20%
45,49> 1.5_VDDC_PWREN 1 2 EN_1.5VSG 3 EN SW 8 SW_1.5VSG 1 2 +1.5VSGP
1
5
FB_1.5VSG 4 7 1.5VSG_5V +5VALW
VGA@ PC270 VFB V5IN
1
0.22U_0402_16V7K RF_1.5VSG 5 6 DL_1.5VSG 1
2
TST DRVL
1
11 PR283 VGA@ + PC272 VGA@

TP PC271 VGA@ 4.7_1206_5% 330U_2.5V_M
4
PR284 VGA@ TPS51212DSCR_SON10_3X3 1U_0603_10V6K PQ84 VGA@
2
2
470K_0402_1% SI7716ADN-T1-GE3_POWERPAK8-5 2
2
1
PC274 VGA@
3
2
1
680P_0402_50V7K
Rds=2.6mΩ(Typ)
2
3.2mΩ(Max)
VGA@ PR285
VFB=0.7V 11.5K_0402_1%
2 1
A A
1
PR286 VGA@
10K_0402_1%
2
SCHEMATIC,MB A8331
Custom B
4019H2
5 4 3 2 1
A B C D
PL31
FBMA-L18-453215-900LMA90T_1812
1.5V_B+ 2 1 B+
2200P_0402_50V7K
560P_0402_50V7K
2200P_0402_50V7K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
0.1U_0402_25V6
0.1U_0402_25V6
1
1
PC331
PC332
PC333
PC334
PC335
PC336
PC337
5
2
@
1
+1.5VP 1
4
PQ95
1
MDU1516URH_POWERDFN56-8-5
1
PJ16
3
2
1
JUMP_43X79
2
PR330 PC338 PL32
BST_1.5V
2
UG_1.5V
2.2_0603_1% 0.1U_0603_25V7K 1UH_MMD-10DZ-1R0M-X1A_18A_20%
LX_1.5V
1 2 BST_1.5V-1 1 2 1 2
+0.75VSP +1.5VP
靠近Output Cap PAD
10U_0805_25V6K
10U_0805_25V6K
1
5
20
19
18
17
16
1
1
PC339
PC340
PU26 PR331
PQ96 4.7_1206_5% 1
VTT
VLDOIN
BOOT
UGATE
PHASE
21 MDU1511RH_POWERDFN56-8-5
2
2
PAD + PC341
1 15 LG_1.5V 4 330U_X_2VM_R9M
VTTGND LGATE
1
PC342 2
2 14 Rds=2.6mΩ(Typ) 680P_0402_50V7K
2
VTTSNS PGND PR332
3
2
1
6.19K_0402_1% 3.2mΩ(Max)
3 GND CS 13 2 1
RT8207MZQW_WQFN20_3X3
4 VTTREF VDDP 12
2 2
5 11 2 1
+1.5VP VDDQ VDD
+5VALW
PGOOD
PR333
+3VALW
1
1U_0603_10V6K
5.1_0603_5%
TON
PC343
FB
S3
S5
0.033U_0402_16V7K
2
1
10K_0402_5%
PC344
6
10
PR334
PC345
1U_0603_10V6K
S3_1.5V
S5_1.5V
2
PR335
0_0402_5% @
2
<37,40,43> SUSP# 1 2 PGOOD_1.5V
PR336 PR337
0_0402_5% 887K_0402_1%
<29,35,37,40> SYSON 1 2 2 1 1.5V_B+
PR338
1
@ PC346 @ PC347 5.9K_0402_1%

0.1U_0402_16V7K 0.1U_0402_16V7K 2 1
2
FB=0.75V
1
To GND = 1.5V
PR339 To VDD = 1.8V
5.76K_0402_1%
2
3 3
VFB= 0.75V
Ipeak= 15A Imax= 10.5A Iocp=18A
STATE S3 S5 1.5VP 0.75VSP Iocp= 17.24A~25.47A
S0 Hi Hi On On
Off
S3 Lo Hi On (Hi-Z)
S4/S5 Lo Lo Off Off

(Discharge) (Discharge)
Note: S3 - sleep ; S5 - power off
4 4

SCHEMATIC,MB A8331
Size
Document Number Rev
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 4019H2
A B C D
5 4 3 2 1
VGA@ PL15
FBMA-L18-453215-900LMA90T_1812
B+ 1 2 B+_CORE
2200P_0402_50V7K
+3VS
1 VGA@
1 VGA@
1 VGA@
1 VGA@
PC190
2200P_0402_25V7K
1
0.1U_0603_25V7K
2
10U_0805_25V6K
10U_0805_25V6K
@ VGA@ PR142
D 10K_0402_5% D
5
PC97 2
PC98 2
PC99 2
PC100 2
2
<20,27> VGA_PWRGD
4 PQ42 VGA@
MDU1516URH_POWERDFN56-8-5
VGA@ PR143 VGA@ PC105
PU10 VGA@ 2.2_0603_1% 0.1U_0603_25V7K
VGA@ PR145 1 10 BST_VCORE 1 2 1 2
3
2
1
42.2K_0402_1% PGOOD VBST
1 2 2 9 DH_VCORE VGA@ PL16
TRIP DRVH 0.36UH_PCMC104T-R36MN1R17_30A_20%
+3VS 3 8 SW_VCORE 1 2
EN SW +VGA_COREP
4 VFB V5IN 7 +5VALW
1
1 2 5 6 DL_VCORE
RF DRVL
2
1
VGA@ PQ45 VGA@ PR147
ESR=10mohm
2
@ PR146 VGA@ PR200 11 MDU1511RH_POWERDFN56-8-5 4.7_1206_5% VGA@ VGA@ PR206
TP
5
10K_0402_5% 470K_0402_1% VGA@ PC106 PC201 0_0402_5%
2
TPS51212DSCR_SON10_3X3 1U_0603_6.3V6M .1U_0402_16V7K
2
VGA@ PR217 VFB=0.6V VGA@ PQ44 1
1
2
10K_0402_1% MDU1511RH_POWERDFN56-8-5 VGA@ PR212
1
1 2 10_0402_5% + PC108 VGA@
<20,40,45,47> 1.5_VDDC_PWREN
4 4 VGA@ PC109 2 1 560U_2.5V_M
680P_0603_50V7K
2
1
2
C VGA@ PC166 C
.1U_0402_16V7K
2
3
2
1
3
2
1
2
PR222 VGA@
1.2K_0402_1%
THA@ PR202 PR202 SEY@
1 1
5.9K_0402_1% GCORE_SEN
GCORE_SEN <16>
Rds=2.9m/3.5mOHM
1
PC202 VGA@
1000P_0402_50V7K
2
5.11K_0402_1%
+3VSG
2
1
SEY@ PR218
2
THA@ PR218
VGA@ PC169 VGA@ PR198 36.5K_0402_1% VGA@ PR211
2200P_0402_25V7K 20.5K_0402_1% 10K_0402_5%
1
2
VGA@ PR199
1
6
27.4K_0402_1% D 40.2K_0402_1%
VGA_CORE 2 1 2
SEY@ PR208 G
F=1/(75*e-12*44.2)=300K
2
1
Ipeak=25A Imax=17.5A Iocp=30A VGA@ PQ47A S
1
THA@ PR208 VGA@ PC168 @ PR207
124K_0402_1% +3VSG 4700P_0402_25V7K 10K_0402_5%
1
41.2K_0402_1%
2
B VGA@ PR203 B
10K_0402_5%
VGA@ PR219
3
D 10K_0402_5%
1
5 1 2 +3VSG
G
2
VGA@ PQ47B S VGA@ PC167
4
DMN66D0LDW-7_SOT363-6 4700P_0402_25V7K @ PR201
2
10K_0402_5%
@ PR165
2
For Whistler 10K_0402_5%
1
VGA@ PR210
1/2Delta I=4.05A
6
D 10K_0402_5%
GPIO 20 GPIO 15 Thames Seymour Vtrip=36.5K*10uA=0.365V 2 2 1
GPU_VID1 <14>
1
VGA@PQ68A G
Iocpmin=0.365V/(8*1.6m)+1/2Delta I=28.51A+4.05A
GPU_VID1 GPU_VID0 Core Voltage Level Core Voltage Level =32.56A S VGA@ PR197
1
10K_0402_5%
+3VSG
2
1 1 0.875V 0.9V
For Seymour
2
1 0 0.9V 1.0V 1/2Delta I=4.31A @ PR209
Vtrip=40.2K*10uA=0.402V VGA@ PR213 10K_0402_5%
3
D 10K_0402_5%
0 1 0.95V 1.05V Iocp=0.402V/(8*3.2m)+1/2Delta I 5 2 1
GPU_VID0 <14>
11
=15.70A+4.31A=20.01A VGA@ PQ68B G
DMN66D0LDW-7_SOT363-6 VGA@ PR205
A A
0 0 1.00V 1.15V S 10K_0402_5%
2
Security Classification Compal Secret Data AP Compal Electronics, Inc.
SCHEMATIC,MB A8331
Custom B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 4019H2
5 4 3 2 1
5 4 3 2 1
CPU_B+ PL33
FBMA-L18-453215-900LMA90T_1812
2 1 B+
2200P_0402_50V7K
10U_1206_25V6M
10U_1206_25V6M
0.01U_0402_25V7K
2200P_0402_50V7K
2200P_0402_50V7K
100U_25V_M
0.01U_0402_25V7K
0.01U_0402_25V7K
1
10U_0805_25V6K
10U_0805_25V6K
1
1
PC348 +
PC352
PC353
PC349
PC350
PC358
PC359
PR340
1
PC351
PC354
PC355
PC356
PC357
330P_0402_50V7K 2K_0402_1%
2 1 2 1 PR341
2
0_0603_5% 2
<8> APU_VDDNB_SEN
2
PR343 PR344 PC360 @ PR345 UGATE_NB1 2 1UGATE_NB1-1 4 PQ97
3.01K_0402_1% 137K_0402_1% 390P_0402_50V7K 32.4K_0402_1% MDU1516URH_POWERDFN56-8-5
2 1 2 1 2 1 2 1
3
2
1
PR342 PR346 PC361 PR347 PC362 PL34
10_0402_5% 0_0402_5% 1000P_0402_50V7K 301_0402_1% 100P_0402_50V8J 0.36UH_PCMC104T-R36MN1R17_30A_20%
D D
2 1 2 1 2 1 2 1 2 1 PHASE_NB1 1 4
+CPU_CORE_NB +CPU_CORE_NB
PC364 PR348 PC363 2 3
1
VSUMP_NB 1000P_0402_50V7K 2.2_0603_1% 0.22U_0603_25V7K
BOOT_NB1
10K_0402_5%_ERTJ0ER103J
2 1 2 1 PR349 PR351
1
2.61K_0402_1%
2 1 4.7_1206_5% 10K_0402_1%
PR350
ISEN1_NB 2 1 1 2 ISEN2_NB
0.022U_0402_16V7K
0.22U_0402_10V6K
1 2
2
11K_0402_1%
LGATE_NB1 4 PR354 PR352

2
2
PR353
PC367 3.65K_0402_1% 10K_0402_1%

12
PC365
PC366
PH3
PQ98 680P_0603_50V7K VSUMP_NB 2 1

MDU1511RH_POWERDFN56-8-5
1
2
PR356
1
3
2
1
PR355 1_0402_1%
422_0402_1% VSUMN_NB 2 1 CPU_B+
2
VSUMN_NB 2 1 FCCM_NB
1
1
2200P_0402_50V7K
@ PC369
10U_1206_25V6M
10U_1206_25V6M
42.2K_0603_1%
PR357
0.01U_0402_25V7K
@ PR358
PC368 100_0402_1% 220P_0402_50V7K
PC371
PC372
PC373
PC374
0.1U_0603_50V7K 2 1 2 1 LGATE_NB1
2
1
PWM_NB
PC370 PHASE_NB1
0.22U_0402_10V6K PR359
2 1 ISEN1_NB UGATE_NB1 0_0603_5% PQ99
2
+5VS UGATE_NB2 2 1UGATE3-1 4 MDU1516URH_POWERDFN56-8-5
PC375 PR360 PC376
0.22U_0402_10V6K PU28 2.2_0603_1% 0.22U_0603_25V7K
48
47
46
45
44
43
42
41
40
39
38
37
2
2 1 ISEN2_NB PU27 6 VCC UGATE 1 2 1 2 1

2
PR361
ISUMP_NB
ISEN1_NB
ISUMN_NB
VSEN_NB
FB_NB
COMP_NB
PGOOD_NB
FCCM_NB
PWM2_NB
LGATEX
PHASEX
UGATEX
3
2
1
1U_0603_16V6K
110K_0402_1% PC377 @ PR362 FCCM_NB 7 2 BOOT_NB2 PL35
1000P_0402_25V6 10_0402_5% CPU_B+ FCCM BOOT 0.36UH_PCMC104T-R36MN1R17_30A_20%
1
1
+5VS 2 1 1 36 BOOT_NB1 PWM_NB 3 8 PHASE_NB2 1 4
+CPU_CORE_NB
1
ISEN2_NB BOOTX PWM PHASE
PC378
PR363 27.4K_0402_1% PR364
2 1 2 35 2 1 4 5 LGATE_NB2 2 3
2
NTC_NB VIN GND LGATE
1
9 TP
PH4 3 34 BOOT2 0_0603_5% PR365
IMON_NB BOOT2
1
470K_0402_5%_TSM0B474J4702RE +5VALW ISL6208BCRZ-T_QFN8_2X2 4.7_1206_5%
C 2 1 <8> APU_SVC 2 1 SVC 4 SVC UGATE2 33 UGATE2 PC379 C
1
PR366 0_0402_5% 0.22U_0603_25V7K PR369
1 2
10K_0402_1%
2 1 5 32 PHASE2 PR414 4 10K_0402_1%

<8,25,37,44> EC_THERM# VR_HOT_L PHASE2
1
PR367 0_0402_5% 0_0603_5% PC380 ISEN2_NB 2 1 1 2 ISEN1_NB

2
+5VS
PR368
2 1 SVD 6 31 LGATE2 @ PR413 PQ100 680P_0603_50V7K

<8> APU_SVD SVD LGATE2
PR371 0_0402_5% ISL6277HRTZ-T_TQFN48_6X6 0_0402_5% MDU1511RH_POWERDFN56-8-5 PR373 PR370
2
@PR372
@ PR372 +1.5VS 2 1 VDDIO 7 30 2 1 3.65K_0402_1% 10K_0402_1%
3
2
1
100K_0402_5% PR374 0_0402_5% VDDIO VDDP PR376 VSUMP_NB 2 1
2
<8> APU_SVT 2 1 SVT 8 29 2 1

1
SVT VDD
1U_0603_16V6K
+1.5VS PR375 0_0402_5% 1_0603_5%
<37> VR_ON 2 1 ENABLE 9 ENABLE PWM_Y 28 PR379
1
1U_0603_16V6K
PR377 0_0402_5% 1_0402_1%
CPU_B+
PC382
PR380
<8,25> APU_PWRGD 2 1 PWROK 10 PWROK LGATE1 27 LGATE1 VSUMN_NB 2 1
PC381
110K_0402_1% PR378 0_0402_5%
2
1 2 11 26 PHASE1
IMON PHASE1
2200P_0402_50V7K
10U_1206_25V6M
10U_1206_25V6M
0.01U_0402_25V7K
PC383 12 25 UGATE1
1000P_0402_25V6 NTC UGATE1
PGOOD
BOOT1
ISUMN
ISUMP
COMP
ISEN3
ISEN2
ISEN1
+3VS
VSEN
1 2
RTN
1
FB2
+5VS
PC385
PC384
PC386
PC387
FB
TP
5
PR382 27.4K_0402_1% PR383
13
14
15
16
17
18
19
20
21
22
23
24
49
2
1
2 1 0_0402_5%
2 1 ISEN3 PR385
PH5 PR381 0_0603_5%
470K_0402_5%_TSM0B474J4702RE 2 1 ISEN2 BOOT1 100K_0402_5% UGATE1 2 1UGATE1-1 4
2 1 @PR384
@ PR384 PQ101
2
10_0402_5% ISEN1 MDU1516URH_POWERDFN56-8-5
0.22U_0402_10V6K
0.22U_0402_10V6K
1
VGATE <37> PL36
3
2
1
1
PR386 0.36UH_PCMC104T-R36MN1R17_30A_20%
10K_0402_1% PC390 PHASE1 1 4
10P_0402_50V8J +CPU_CORE
2
2
PC388
PC389
2 1 PR389 PC391 ISEN1 2 PR387 1 2 3 1 2 ISEN2

2
5
VSUM- 2.2_0603_1% 0.22U_0603_25V7K 10K_0402_1%
1
BOOT1 2 1 2 1 PR390 PR388
4.7_1206_5% PR391 10K_0402_1%
VSUM+ 3.65K_0402_1%
B B
2.61K_0402_1%
10K_0402_5%_ERTJ0ER103J
PC392 PR393 PC393 @ PR394 VSUM+ 2 1

1
1000P_0402_50V7K 301_0402_1% 100P_0402_50V8J 32.4K_0402_1% LGATE1 4
1 2
330P_0402_50V7K
PR392
0.022U_0402_16V7K
0.22U_0402_10V6K
2 1 2 1 2 1 2 1 PC394
PQ102 680P_0603_50V7K PR396
2
MDU1511RH_POWERDFN56-8-5 1_0402_1%
2
2
11K_0402_1%
PR397 PR398 PC395 VSUM- 2 1

12
3
2
1
2
PH6
PR395
PC396
PC397
PC398
2.1K_0402_1% 137K_0402_1% 390P_0402_50V7K

2 1 2 1 2 1
1
CPU_B+
1
PR399
549_0402_1% PR400 PC399
2
2200P_0402_50V7K
10U_1206_25V6M
10U_1206_25V6M
0.01U_0402_25V7K
VSUM- 2 1 2K_0402_1% 680P_0402_50V7K
2 1 2 1
5
@ PC401
1
@ PR401 820P_0402_25V7
1
PC402
PC403
PC405
PC404
PC400 100_0402_1% PR402
0.1U_0603_50V7K 2 1 2 1 10_0402_5% PR403
2
2 1 +CPU_CORE 0_0603_5%
2
PR404 UGATE2 2 1UGATE2-1 4 PQ103
0_0402_5% MDU1516URH_POWERDFN56-8-5
2 1
APU_VDD_SEN <8>
3
2
1
PR405 PL37
0_0402_5% 0.36UH_PCMC104T-R36MN1R17_30A_20%
0.01U_0402_25V7K
2 1 PHASE2 1 4
PR409 APU_VDD_RUN_FB_L <8> +CPU_CORE
10_0402_5% PR408 PC407 ISEN2 2 PR406 1 2 3 1 2 ISEN1
2
1
2 1 2.2_0603_1% 0.22U_0603_25V7K 10K_0402_1%
PC406
BOOT2 2 1 2 1 PR410 PR407

4.7_1206_5% PR411 10K_0402_1%
1
3.65K_0402_1%
VSUM+ 2 1
1 2
LGATE2 4
PC408
PQ104 680P_0603_50V7K PR412
MDU1511RH_POWERDFN56-8-5 1_0402_1%
2
A VSUM- 2 1 A
3
2
1

SCHEMATIC,MB A8331
Custom B
4019H2
5 4 3 2 1
5 4 3 2 1
Version change list (P.I.R. List) Page 1 of 2

for PWR
Item Fixed Issue Reason for change Rev. PG# Modify List Date Phase
D
1 D
5
C C
10
B B
11
12
13
14
15
A A
16

SCHEMATIC,MB A8331
Rev
Custom B
4019H2
5 4 3 2 1
5 4 3 2 1
Version change list (P.I.R. List)

EVT Stage (0.1~0.2) DVT Stage (0.2~0.3) PVT Stage
D D
1.Unpop C954, C955 for Mini2 reserved.
0817 Pop C1025 180p for VDDIO (SCL v1.02) 2.Remove R587, R588, Q11 for no need level shift.
Change D16,D17 to SCS00000Z00 3.Pop R469, R527
Unpop U9, R391, C352, C324
0818 Change Q50 from BSH138 to BSH111 for VGA Internal Thermal Interface.
Unpop R1100 for +1.1VALW 4.Unpop C374 330uF for Use discrete +1.5VSG circuit.
Add D26 BOM Structure for 930@ 5.Add R1169 1k for RTS2132 Vender suggestion.
unpop D4 for USB issue 6.Reserved R1177 for option EEPROM.
7.Add R1178 for RTS2132 discrete +1.2VS power.
8.Reserved SMBUS(TL_CLK/TL_DATA) to EC for EEEPROM option.
0903 1.Change Card Reader Controller to RTS5209
9.Reserved BACO circuit and pop C1105.
2.Change LAN to Atheros AR8151
10.Change D4, D6 to AZC099 for ESD reserved.
3.Removed D17
11.Change D20, D21 to AZC199-02SPR7G for ESD reserved.
12.Remove D44, D45 for no need.
0904 Add Mini2 Debug Port 13.Change C1211, R837 BOM to TL@.
0905 1.Add Fresco FL1009 USB3.0 Controller 14.Change JTP1 to 6P/8P co-lay footprint for WIN8.
15.Add SMBUS(FCH_SCLK1/FCH_SDATA1) for JTP1.
C P20. BACO BIFVDDC update 16.Reserved GPIO166 for future used. C
P25. remove Q25 APU power ok 17.Add H29 for ME update.

18.Add C1719, C1720 10pF for RTD5209 EMI request.
0915 1.Remove EC X2 19.Change L1801 footprint.
20.Pop D42 and change to SCA00001A00 for ESD.
0916 1.Add C1361/C1362 10pF for EMI 21.Change C1537 to 10pF 2KV for EMI/ESD.
2.Change D27/D29 footprint to AZ5125 22.Unpop C1336, C1337, C1338, C1333, C1334, C1335
3.Add R402 10k for reserved for MINI2 Reserved.
4.Add R469/R527 for VGA Internal Thermal Senser 23.Modify C1911 always pop for noise reduce.
24.Modify R60 to M3@.
0926 1.Change D4 to SC300001G00 for ESD request 25.Change Board ID to "02" for DVT.
2.Change D33/D34/D37/D40/D41 to SCA00001A00 for ESD request 26.Add Q30 for EC_THERM reverse for EC common code.
27.Change 9012_PH2 netname to 9012_VCIN for VC function.
28.Unpop R65 for External OTP.
29.Change L68 +5VS to +VDDA.
30.Chnage R1124 to 200k, R1130 to 10k for VGA Power Sequence.
31.Pop R997 for W/L BT combo card BT ON/OFF
B
32.Change U28 SPI ROM from MXIC to EON B
A A

SCHEMATIC,MB A8331
B B
4019H2
5 4 3 2 1

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A B C D E

AMD "Comal" Platform

AMD Trinity APU / Hudson M3 FCH / ATI Thames XT

Security Classification Compal Secret Data Compal Electronics, Inc.

Thermal Sensor ATI Vancuver

GPP3 GPP2 GPP1 GPP0

-USB20 x1+ USB30 x1 SCHEMATIC,MB A8331

CLOCK DISTRIBUTION DISPLAY DISTRIBUTION

C AMD 100MHz AMD LVDS_OUT C

RTD2132 DP0_TXP/N[0:1]_R VGA_TXOUT[1:2]+/-

LVDS Transtator 32.768KHz 25MHz

WLAN WLAN PCIE_GFX[0:11] C

CRT CONN HDMI CONN

Security Classification Compal Secret Data Compal Electronics, Inc.

ZZZ ZZZ2 ZZZ3

+VGA_CORE 0.95-1.2V switched power rail ON OFF OFF X76 X76

+VSB VSB always on power rail ON ON ON*

EC SM Bus1 address EC SM Bus2 address

AMD APU FS1R2

RAM DDRIII SODIMMX2

LCD panel +5VS FCH AMD Hudson M2/M3

+5VS VDDAN_11_USB_S: 140 mA

U54 +5VALW VDDIO_33_PCIGP: 131 mA

Security Classification Compal Secret Data Compal Electronics, Inc.

<13> PCIE_GTX_C_FRX_P[0..15] PCIE_FTX_C_GRX_P[0..15] <13>

<13> PCIE_GTX_C_FRX_N[0..15] PCIE_FTX_C_GRX_N[0..15] <13>

AE5 AD5 PCIE_FTX_DRX_P0 C950 1 2 .1U_0402_16V7K

AF8 AF2 UMI_FTX_MRX_N2 C961 1 2 .1U_0402_16V7K

+1.2VS 1 2 P_ZVDDP AG11 AH11 P_ZVSS 1 2

Security Classification Compal Secret Data Compal Electronics, Inc.

EVENT# pull high 0.75V reference voltage

R545 1 2 1K_0402_5% MEM_MB_EVENT# +MEM_VREF

Place near APU Place near APU

<50> APU_VDD_RUN_FB_L B4 VSS_SENSE R592 1 2 1K_0402_5% APU_TDI_R

CPU TSI interface level shift Asserted as an input to +1.5V

C935 1 2 0.1U_0402_16V4Z +HDT_VCC

31.6K_0402_1% 30K_0402_1% 3 4 APU_TMS_R R613 1 2 0_0402_5% APU_TMS

Q9 0_0402_5% 7 8 R618 1 2 0_0402_5% APU_TDO

THERMTRIP shutdown Indicates to the FCH that a thermal trip

to transition the system to S5 immediately R603 1 2 10K_0402_5% 13 13 14 14 R621 1 2 0_0402_5% APU_DBRDY

R605 1 2 10K_0402_5% 15 16 APU_DBREQ#_R R6221 2 0_0402_5% APU_DBREQ#

Q10 R610 R609

1K_0402_5% 10K_0402_5% 17 18 R607 1 2 0_0402_5% APU_TEST19

Q12 R608 1 2 0_0402_5% APU_TEST18

BSH111_SOT23-3 APU_THERMTRIP# 3 1 1 2 H_THERMTRIP# <27>

Security Classification Compal Secret Data Compal Electronics, Inc.

Power Name Consumption

B12 VDDNB_4 VDDNB_16 D8 V9 VSS_58 VSS_130 AH13

F24 VSS_69 VSS_141 E8

K20 VDDIO_2 VDDIO_20 T26

M23 VDDIO_10 VDDIO_28 R22

N28 VDDIO_14 VDDIO_32 W22

CRT HPD 1 @ 2 DP1_HPD

Security Classification Compal Secret Data Compal Electronics, Inc.

+VREF_DQ +1.5V +1.5V

C1080 C1081 10K_0402_5% CONN@ Part Number = SP07000PE00

Security Classification Compal Secret Data Compal Electronics, Inc.

+VREF_DQ +1.5V +1.5V

+0.75VS +1.5V +1.5V

10K_0402_5% TYCO 2-2013022-1 204P H4 DDR3

Part Number = SP07000JN10

Security Classification Compal Secret Data Compal Electronics, Inc.

PCI EXPRESS INTERFACE